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Implement UART driver files for AT32UC3B: Working commit

This commit is contained in:
Raman Gopalan 2023-10-16 13:30:11 +05:30 committed by Meco Man
parent ecd29fda60
commit 265a55303e
13 changed files with 503 additions and 373 deletions
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26
bsp/avr32uc3b0/.config
View File

@ -74,8 +74,8 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
CONFIG_RT_VER_NUM=0x50002
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x50100
# CONFIG_RT_USING_STDC_ATOMIC is not set
# CONFIG_RT_USING_CACHE is not set
# CONFIG_RT_USING_HW_ATOMIC is not set
@ -121,7 +121,7 @@ CONFIG_RT_UNAMED_PIPE_NUMBER=64
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
CONFIG_RT_SERIAL_USING_DMA=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
@ -984,3 +984,23 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# Uncategorized
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_PIN=y
CONFIG_BSP_USING_UART=y
# CONFIG_BSP_USING_UART0 is not set
# CONFIG_BSP_UART0_TX_PIN_19 is not set
# CONFIG_BSP_UART0_TX_PIN_43 is not set
# CONFIG_BSP_UART0_RX_PIN_18 is not set
# CONFIG_BSP_UART0_RX_PIN_42 is not set
CONFIG_BSP_USING_UART1=y
CONFIG_BSP_UART1_TX_PIN_34=y
# CONFIG_BSP_UART1_TX_PIN_23 is not set
CONFIG_BSP_UART1_TX_PIN=34
CONFIG_BSP_UART1_TX_PIN_FUNCTION=2
CONFIG_BSP_UART1_RX_PIN_35=y
# CONFIG_BSP_UART1_RX_PIN_24 is not set
CONFIG_BSP_UART1_RX_PIN=35
CONFIG_BSP_UART1_RX_PIN_FUNCTION=2

93
bsp/avr32uc3b0/Kconfig
View File

@ -26,3 +26,96 @@ config ENV_DIR
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
menu "On-chip Peripheral Drivers"
config BSP_USING_PIN
bool "Enable GPIO"
select RT_USING_PIN
default y
menuconfig BSP_USING_UART
bool "Enable UART"
select RT_USING_SERIAL
default y
if BSP_USING_UART
config BSP_USING_UART0
bool "Enable UART0"
default n
if BSP_USING_UART0
choice
prompt "uart0 tx pin number (GP)"
depends on BSP_USING_UART0
default BSP_UART0_TX_PIN_43
config BSP_UART0_TX_PIN_19
bool "19"
config BSP_UART0_TX_PIN_43
bool "43"
endchoice
config BSP_UART0_TX_PIN
int
default 19 if BSP_UART0_TX_PIN_19
default 43 if BSP_UART0_TX_PIN_43
config BSP_UART0_TX_PIN_FUNCTION
int
default 0 if BSP_UART0_TX_PIN_19
default 2 if BSP_UART0_TX_PIN_43
choice
prompt "uart0 rx pin number (GP)"
depends on BSP_USING_UART0
default BSP_UART0_RX_PIN_42
config BSP_UART0_RX_PIN_18
bool "18"
config BSP_UART0_RX_PIN_42
bool "42"
endchoice
config BSP_UART0_RX_PIN
int
default 18 if BSP_UART0_RX_PIN_18
default 42 if BSP_UART0_RX_PIN_42
config BSP_UART0_RX_PIN_FUNCTION
int
default 0 if BSP_UART0_RX_PIN_18
default 2 if BSP_UART0_RX_PIN_42
endif
config BSP_USING_UART1
bool "Enable UART1"
default y
if BSP_USING_UART1
choice
prompt "uart1 tx pin number (GP)"
depends on BSP_USING_UART1
default BSP_UART1_TX_PIN_34
config BSP_UART1_TX_PIN_34
bool "34"
config BSP_UART1_TX_PIN_23
bool "23"
endchoice
config BSP_UART1_TX_PIN
int
default 34 if BSP_UART1_TX_PIN_34
default 23 if BSP_UART1_TX_PIN_23
config BSP_UART1_TX_PIN_FUNCTION
int
default 2 if BSP_UART1_TX_PIN_34
default 0 if BSP_UART1_TX_PIN_23
choice
prompt "uart1 rx pin number (GP)"
depends on BSP_USING_UART1
default BSP_UART1_RX_PIN_35
config BSP_UART1_RX_PIN_35
bool "35"
config BSP_UART1_RX_PIN_24
bool "24"
endchoice
config BSP_UART1_RX_PIN
int
default 35 if BSP_UART1_RX_PIN_35
default 24 if BSP_UART1_RX_PIN_24
config BSP_UART1_RX_PIN_FUNCTION
int
default 2 if BSP_UART1_RX_PIN_35
default 0 if BSP_UART1_RX_PIN_24
endif
endif
endmenu

2
bsp/avr32uc3b0/SConscript
View File

@ -2,7 +2,7 @@ import rtconfig
Import('RTT_ROOT')
from building import *
src_bsp = ['application.c', 'startup.c', 'board.c']
src_bsp = ['application.c', 'startup.c', 'board.c', 'drv_uart.c']
src = File(src_bsp)
CPPPATH = [RTT_ROOT + '/bsp/avr32uc3b0']

2
bsp/avr32uc3b0/SConstruct
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@ -10,7 +10,7 @@ else:
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-' + rtconfig.ARCH + '.' + rtconfig.TARGET_EXT
TARGET = 'rtthread-' + rtconfig.PART + '.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],

8
bsp/avr32uc3b0/application.c
View File

@ -19,12 +19,12 @@ static void rt_thread_entry_led1(void* parameter)
while (1)
{
/* led on */
rt_kprintf("LED1 on\r\n");
//rt_kprintf("LED1 on\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA08);
rt_thread_delay(RT_TICK_PER_SECOND / 2); /* sleep 0.5 second and switch to other thread */
/* led off */
rt_kprintf("LED1 off\r\n");
//rt_kprintf("LED1 off\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA08);
rt_thread_delay(RT_TICK_PER_SECOND / 2);
}
@ -37,12 +37,12 @@ void rt_thread_entry_led2(void* parameter)
while (1)
{
/* led on */
rt_kprintf("LED2 on");
//rt_kprintf("LED2 on");
gpio_tgl_gpio_pin(AVR32_PIN_PA07);
rt_thread_delay(RT_TICK_PER_SECOND);
/* led off */
rt_kprintf("LED2 off\r\n");
//rt_kprintf("LED2 off\r\n");
gpio_tgl_gpio_pin(AVR32_PIN_PA07);
rt_thread_delay(RT_TICK_PER_SECOND);
}

51
bsp/avr32uc3b0/board.c
View File

@ -1,11 +1,12 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2010-03-30 Kyle First version
* Date Author Notes
* 2010-03-30 Kyle First version
* 2023-10-13 Raman Gopalan Move UART specific code sections into the drv_uart files
*/
#include <rtthread.h>
@ -14,16 +15,7 @@
#include "gpio.h"
#include "usart.h"
#include "intc.h"
#include "serial.h"
#define FOSC0 12000000
#define FCPU 60000000
#define FHSB FCPU
#define FPBA FCPU
#define FPBB FCPU
extern void rt_hw_serial_isr(void);
extern void rt_hw_usart_init(void);
#include "drv_uart.h"
/**
* System tick interrupt handler.
@ -52,24 +44,7 @@ static void peripherals_init(void)
.osc0_startup = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC
};
pm_configure_clocks(&pm_freq_param);
/*
* USART1 initialization
*/
gpio_enable_module_pin(AVR32_USART1_TXD_0_1_PIN, AVR32_USART1_TXD_0_1_FUNCTION);
gpio_enable_module_pin(AVR32_USART1_RXD_0_1_PIN, AVR32_USART1_RXD_0_1_FUNCTION);
static const usart_options_t usartOptions = {
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(&AVR32_USART1, &usartOptions, FCPU);
INTC_init_interrupts();
INTC_register_interrupt(&rt_hw_serial_isr, AVR32_USART1_IRQ, AVR32_INTC_INT0);
AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
}
/**
@ -84,14 +59,20 @@ static void cpu_counter_init(void)
void rt_hw_board_init(void)
{
extern struct rt_device _rt_usart_device;
extern struct avr32_serial_device uart;
Disable_global_interrupt();
peripherals_init();
cpu_counter_init();
rt_hw_serial_register(&_rt_usart_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart);
rt_console_set_device("uart1");
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_SERIAL
rt_hw_uart_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
}

313
bsp/avr32uc3b0/drv_uart.c Normal file
View File

@ -0,0 +1,313 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-02-05 Bernard first version
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
* in the buffer.
* 2010-03-29 Bernard cleanup code.
* 2010-03-30 Kyle Ported from STM32 to AVR32.
* 2023-10-13 Raman Gopalan UART driver for at32uc3b: Initial version
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "drv_uart.h"
#ifdef RT_USING_SERIAL
#include "compiler.h"
#include "usart.h"
#include "gpio.h"
#include "intc.h"
#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
#endif
#ifdef BSP_USING_UART0
void avr32uc3b_uart0_isr(void);
#endif
#ifdef BSP_USING_UART1
void avr32uc3b_uart1_isr(void);
#endif
#ifdef BSP_USING_UART2
void avr32uc3b_uart2_isr(void);
#endif
/* AVR32UC3B uart driver */
struct avr32uc3b_uart_dev
{
rt_serial_t parent;
avr32_usart_t *instance;
rt_uint32_t irqno;
rt_uint32_t irq_level;
rt_uint32_t tx_pin;
rt_uint32_t tx_pin_function;
rt_uint32_t rx_pin;
rt_uint32_t rx_pin_function;
void (*uart_isr)(void);
};
static struct avr32uc3b_uart_dev uart_dev[] =
{
#ifdef BSP_USING_UART0
{
.instance = (avr32_usart_t *)&AVR32_USART0,
.irqno = AVR32_USART0_IRQ,
.irq_level = AVR32_INTC_INT0,
.tx_pin = BSP_UART0_TX_PIN,
.tx_pin_function = BSP_UART0_TX_PIN_FUNCTION,
.rx_pin = BSP_UART0_RX_PIN,
.rx_pin_function = BSP_UART0_RX_PIN_FUNCTION,
.uart_isr = avr32uc3b_uart0_isr,
},
#endif
#ifdef BSP_USING_UART1
{
.instance = (avr32_usart_t *)&AVR32_USART1,
.irqno = AVR32_USART1_IRQ,
.irq_level = AVR32_INTC_INT0,
.tx_pin = BSP_UART1_TX_PIN,
.tx_pin_function = BSP_UART1_TX_PIN_FUNCTION,
.rx_pin = BSP_UART1_RX_PIN,
.rx_pin_function = BSP_UART1_RX_PIN_FUNCTION,
.uart_isr = avr32uc3b_uart1_isr,
},
#endif
#ifdef BSP_USING_UART2
{
.instance = (avr32_usart_t *)&AVR32_USART2,
.irqno = AVR32_USART2_IRQ,
.irq_level = AVR32_INTC_INT0,
.tx_pin = BSP_UART2_TX_PIN,
.tx_pin_function = BSP_UART2_TX_PIN_FUNCTION,
.rx_pin = BSP_UART2_RX_PIN,
.rx_pin_function = BSP_UART2_RX_PIN_FUNCTION,
.uart_isr = avr32uc3b_uart2_isr,
},
#endif
};
enum
{
#ifdef BSP_USING_UART0
UART0_INDEX,
#endif
#ifdef BSP_USING_UART1
UART1_INDEX,
#endif
#ifdef BSP_USING_UART2
UART2_INDEX,
#endif
};
#ifdef BSP_USING_UART0
void avr32uc3b_uart0_isr(void)
{
rt_interrupt_enter();
/* read interrupt status and clear it */
if (usart_test_hit(&AVR32_USART0)) /* rx ind */
{
rt_hw_serial_isr(&uart_dev[UART0_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
}
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_UART1
void avr32uc3b_uart1_isr(void)
{
rt_interrupt_enter();
/* read interrupt status and clear it */
if (usart_test_hit(&AVR32_USART1)) /* rx ind */
{
rt_hw_serial_isr(&uart_dev[UART1_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
}
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_UART2
void avr32uc3b_uart2_isr(void)
{
rt_interrupt_enter();
/* read interrupt status and clear it */
if (usart_test_hit(&AVR32_USART2)) /* rx ind */
{
rt_hw_serial_isr(&uart_dev[UART2_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
}
rt_interrupt_leave();
}
#endif
/**
* @addtogroup AVR32UC3
*/
/*@{*/
static rt_err_t avr32uc3b_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct avr32uc3b_uart_dev *uart = RT_NULL;
unsigned char l_parity;
unsigned short l_stop;
unsigned long l_baud;
unsigned char l_data_bits;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
// Set the TX and RX pins by using the function select on the GPIO
// Set datasheet for more information on function select
gpio_enable_module_pin(uart->tx_pin, uart->tx_pin_function);
gpio_enable_module_pin(uart->rx_pin, uart->rx_pin_function);
/* Parity settings */
if (cfg->parity == PARITY_ODD)
l_parity = USART_ODD_PARITY;
else if (cfg->parity == PARITY_EVEN)
l_parity = USART_EVEN_PARITY;
else
l_parity = USART_NO_PARITY;
/* Stopbit settings */
if (cfg->stop_bits == STOP_BITS_1)
l_stop = USART_1_STOPBIT;
else
l_stop = USART_2_STOPBITS;
l_baud = cfg->baud_rate;
l_data_bits = cfg->data_bits;
/* Populate */
usart_options_t usart_options = {
.baudrate = l_baud,
.charlength = l_data_bits,
.paritytype = l_parity,
.stopbits = l_stop,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(uart->instance, &usart_options, FCPU);
return RT_EOK;
}
static rt_err_t avr32uc3b_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct avr32uc3b_uart_dev *uart = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
switch (cmd)
{
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
// Set up a RX interrupt
// We need to set up the handler first
// And set up and enable the interrupt handlers
//INTC_init_interrupts();
INTC_register_interrupt(uart->uart_isr, uart->irqno, uart->irq_level);
//*(uart->instance)->ier = AVR32_USART_IER_RXRDY_MASK;
AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
break;
}
return RT_EOK;
}
static int avr32uc3b_uart_putc(struct rt_serial_device *serial, char c)
{
struct avr32uc3b_uart_dev *uart = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
usart_putchar(uart->instance, c);
return 1;
}
static int avr32uc3b_uart_getc(struct rt_serial_device *serial)
{
struct avr32uc3b_uart_dev *uart = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
int ch;
if (usart_read_char(uart->instance, &ch) == USART_SUCCESS)
return ch;
return -1;
}
const static struct rt_uart_ops _uart_ops =
{
avr32uc3b_uart_configure,
avr32uc3b_uart_control,
avr32uc3b_uart_putc,
avr32uc3b_uart_getc,
RT_NULL,
};
/*
* UART Initiation
*/
int rt_hw_uart_init(void)
{
rt_err_t ret = RT_EOK;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef BSP_USING_UART0
uart_dev[UART0_INDEX].parent.ops = &_uart_ops;
uart_dev[UART0_INDEX].parent.config = config;
ret = rt_hw_serial_register(&uart_dev[UART0_INDEX].parent,
"uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
&uart_dev[UART0_INDEX]);
RT_ASSERT(ret == RT_EOK);
#endif
#ifdef BSP_USING_UART1
uart_dev[UART1_INDEX].parent.ops = &_uart_ops;
uart_dev[UART1_INDEX].parent.config = config;
ret = rt_hw_serial_register(&uart_dev[UART1_INDEX].parent,
"uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
&uart_dev[UART1_INDEX]);
RT_ASSERT(ret == RT_EOK);
#endif
#ifdef BSP_USING_UART2
uart_dev[UART2_INDEX].parent.ops = &_uart_ops;
uart_dev[UART2_INDEX].parent.config = config;
ret = rt_hw_serial_register(&uart_dev[UART2_INDEX].parent,
"uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
&uart_dev[UART2_INDEX]);
RT_ASSERT(ret == RT_EOK);
#endif
return ret;
}
#endif /* RT_USING_SERIAL */
/*@}*/

35
bsp/avr32uc3b0/drv_uart.h Normal file
View File

@ -0,0 +1,35 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first version
* 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
* 2010-03-30 Kyle Ported from STM32 to AVR32.
* 2023-10-13 Raman Gopalan UART driver for at32uc3b: Initial version
*/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
#include "compiler.h"
#include "usart.h"
#define FOSC0 12000000
#define FCPU 60000000
#define FHSB FCPU
#define FPBA FCPU
#define FPBB FCPU
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_DMA_NODE_SIZE 4
#ifdef RT_USING_SERIAL
int rt_hw_uart_init(void);
#endif
#endif

16
bsp/avr32uc3b0/rtconfig.h
View File

@ -47,8 +47,8 @@
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x50002
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x50100
/* RT-Thread Components */
@ -76,7 +76,6 @@
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
@ -225,5 +224,16 @@
/* Uncategorized */
/* On-chip Peripheral Drivers */
#define BSP_USING_PIN
#define BSP_USING_UART
#define BSP_USING_UART1
#define BSP_UART1_TX_PIN_34
#define BSP_UART1_TX_PIN 34
#define BSP_UART1_TX_PIN_FUNCTION 2
#define BSP_UART1_RX_PIN_35
#define BSP_UART1_RX_PIN 35
#define BSP_UART1_RX_PIN_FUNCTION 2
#endif

5
bsp/avr32uc3b0/rtconfig.py
View File

@ -5,6 +5,7 @@ ARCH = 'avr32'
CPU = 'uc3'
PART = 'uc3b0256'
BOARD = 'USERBOARD'
ATOMICS = ' -D__STDC_NO_ATOMICS__'
CROSS_TOOL = 'gcc'
@ -13,7 +14,7 @@ if os.getenv('RTT_CC'):
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = 'C:/Program Files/Atmel/AVR Tools/AVR Toolchain/bin'
EXEC_PATH = 'C:/Program Files (x86)/Atmel/AVR Tools/AVR Toolchain/bin'
elif CROSS_TOOL == 'keil':
print('================ERROR============================')
print('Not support keil yet!')
@ -44,7 +45,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mpart=' + PART
CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
CFLAGS = DEVICE + ' -DBOARD=' + BOARD + ATOMICS + ' -fmessage-length=0 -ffunction-sections -masm-addr-pseudos'
AFLAGS = ' -c -x assembler-with-cpp' + DEVICE
LFLAGS = DEVICE + ' -Wl,--gc-sections --rodata-writable -Wl,--direct-data -LSOFTWARE_FRAMEWORK/UTILS/LIBS/NEWLIB_ADDONS -T avr32elf_uc3b0256.lds'

2
bsp/avr32uc3b0/startup.c
View File

@ -39,7 +39,7 @@ int main(void)
/* init finsh */
finsh_system_init();
#if !defined(RT_USING_POSIX_STDIO) && defined(RT_USING_DEVICE)
finsh_set_device(FINSH_DEVICE_NAME);
finsh_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#endif

273
libcpu/avr32/uc3/serial.c
View File

@ -1,273 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-02-05 Bernard first version
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
* in the buffer.
* 2010-03-29 Bernard cleanup code.
* 2010-03-30 Kyle Ported from STM32 to AVR32.
*/
#include "serial.h"
#include "compiler.h"
#include "usart.h"
struct rt_device _rt_usart_device;
struct avr32_serial_int_rx _rt_usart_rx;
struct avr32_serial_device uart =
{
.uart_device = (avr32_usart_t *) &AVR32_USART1,
.int_rx = &_rt_usart_rx
};
/**
* @addtogroup AVR32UC3
*/
/*@{*/
/* RT-Thread Device Interface */
static rt_err_t rt_serial_init (rt_device_t dev)
{
struct avr32_serial_device* uart = (struct avr32_serial_device*) dev->user_data;
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_memset(uart->int_rx->rx_buffer, 0, sizeof(uart->int_rx->rx_buffer));
uart->int_rx->read_index = 0;
uart->int_rx->save_index = 0;
}
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
}
return RT_EOK;
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_ssize_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct avr32_serial_device* uart;
ptr = buffer;
err_code = RT_EOK;
uart = (struct avr32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* interrupt mode Rx */
while (size)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (uart->int_rx->read_index != uart->int_rx->save_index)
{
/* read a character */
*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
size--;
/* move to next position */
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
}
else
{
/* set error code */
err_code = -RT_EEMPTY;
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
}
else
{
/* polling mode */
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
{
while (usart_test_hit(uart->uart_device))
{
*ptr = uart->uart_device->rhr & 0xff;
ptr ++;
}
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_ssize_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_uint8_t* ptr;
rt_err_t err_code;
struct avr32_serial_device* uart;
err_code = RT_EOK;
ptr = (rt_uint8_t*)buffer;
uart = (struct avr32_serial_device*)dev->user_data;
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
{
/* interrupt mode Tx, does not support */
RT_ASSERT(0);
}
else
{
/* polling mode */
if (dev->flag & RT_DEVICE_FLAG_STREAM)
{
/* stream mode */
while (size)
{
usart_putchar(uart->uart_device, (int) *ptr);
++ptr; --size;
}
}
else
{
/* write data directly */
while (size)
{
usart_bw_write_char(uart->uart_device, (int) *ptr);
++ptr; --size;
}
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
{
struct avr32_serial_device* uart;
RT_ASSERT(dev != RT_NULL);
uart = (struct avr32_serial_device*)dev->user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_SUSPEND:
/* suspend device */
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
break;
case RT_DEVICE_CTRL_RESUME:
/* resume device */
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
break;
}
return RT_EOK;
}
/*
* serial register for STM32
* support STM32F103VB and STM32F103ZE
*/
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial)
{
RT_ASSERT(device != RT_NULL);
if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
(flag & RT_DEVICE_FLAG_INT_TX))
{
RT_ASSERT(0);
}
device->type = RT_Device_Class_Char;
device->rx_indicate = RT_NULL;
device->tx_complete = RT_NULL;
device->init = rt_serial_init;
device->open = rt_serial_open;
device->close = rt_serial_close;
device->read = rt_serial_read;
device->write = rt_serial_write;
device->control = rt_serial_control;
device->user_data = serial;
/* register a character device */
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
}
/* ISR for serial interrupt */
void rt_hw_serial_isr(void)
{
struct avr32_serial_device* uart = (struct avr32_serial_device*) _rt_usart_device.user_data;
rt_base_t level;
if (usart_test_hit(uart->uart_device))
{
/* interrupt mode receive */
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
/* disable interrupt */
level = rt_hw_interrupt_disable();
/* save character */
uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->rhr & 0xff;
uart->int_rx->save_index ++;
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->save_index = 0;
/* if the next position is read index, discard this 'read char' */
if (uart->int_rx->save_index == uart->int_rx->read_index)
{
uart->int_rx->read_index ++;
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
uart->int_rx->read_index = 0;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
/* invoke callback */
if (_rt_usart_device.rx_indicate != RT_NULL)
{
rt_size_t rx_length;
/* get rx length */
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
uart->int_rx->save_index - uart->int_rx->read_index;
_rt_usart_device.rx_indicate(&_rt_usart_device, rx_length);
}
}
else
{
usart_reset_status(uart->uart_device);
}
}
/*@}*/

50
libcpu/avr32/uc3/serial.h
View File

@ -1,50 +0,0 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first version
* 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
* 2010-03-30 Kyle Ported from STM32 to AVR32.
*/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rthw.h>
#include <rtthread.h>
#include "compiler.h"
#include "usart.h"
#define UART_RX_BUFFER_SIZE 64
#define UART_TX_DMA_NODE_SIZE 4
/* data node for Tx Mode */
struct avr32_serial_data_node
{
rt_uint8_t *data_ptr;
rt_size_t data_size;
struct avr32_serial_data_node *next, *prev;
};
struct avr32_serial_int_rx
{
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct avr32_serial_device
{
avr32_usart_t *uart_device;
/* rx structure */
struct avr32_serial_int_rx* int_rx;
};
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct avr32_serial_device *serial);
void rt_hw_serial_isr();
#endif