rm48x50: VFP lazy stacking
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT will turn on VFP for all threads and stack all the VFP registers. When doing lazy stacking, VFP will only be turned on for the thread who issued VFP instructions. Currently, if a thread turned on VFP, it cannot be turned off. RTT will never know what time the thread doesn't need VFP any more. The thread might could turn off the VFP for it self in proper time.
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@ -72,8 +72,8 @@ _coreInitRegisters_
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orr r2, r2, #0xF00000
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orr r2, r2, #0xF00000
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mcr p15, #0x00, r2, c1, c0, #0x02
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mcr p15, #0x00, r2, c1, c0, #0x02
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; Enable FPV
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.if (RT_VFP_LAZY_STACKING) = 0
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fmrx R2, fpexc
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fmrx r2, fpexc
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orr r2, r2, #0x40000000
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orr r2, r2, #0x40000000
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fmxr fpexc, r2
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fmxr fpexc, r2
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@ -93,6 +93,7 @@ _coreInitRegisters_
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fmdrr d13, r1, r1
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fmdrr d13, r1, r1
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fmdrr d14, r1, r1
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fmdrr d14, r1, r1
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fmdrr d15, r1, r1
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fmdrr d15, r1, r1
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.endif
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bl next1
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bl next1
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next1
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next1
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bl next2
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bl next2
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@ -21,8 +21,7 @@
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resetEntry
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resetEntry
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b _c_int00
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b _c_int00
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undefEntry
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b turnon_VFP
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b undefEntry
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svcEntry
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svcEntry
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b svcEntry
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b svcEntry
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prefetchEntry
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prefetchEntry
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@ -33,5 +32,13 @@ reservedEntry
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b IRQ_Handler
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b IRQ_Handler
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ldr pc,[pc,#-0x1b0]
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ldr pc,[pc,#-0x1b0]
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.sect ".text"
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turnon_VFP
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; Enable FPV
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STMDB sp!, {r0}
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fmrx r0, fpexc
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orr r0, r0, #0x40000000
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fmxr fpexc, r0
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LDMIA sp!, {r0}
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subs pc, lr, #4
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;-------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------
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@ -211,6 +211,7 @@
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// #define RTGUI_USING_MOUSE_CURSOR
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// #define RTGUI_USING_MOUSE_CURSOR
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// </section>
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// </section>
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#define RT_VFP_LAZY_STACKING
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// </RDTConfigurator>
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// </RDTConfigurator>
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#endif
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#endif
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@ -75,13 +75,13 @@ __no_vfp_frame1
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.if (__TI_VFP_SUPPORT__)
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.if (__TI_VFP_SUPPORT__)
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LDMIA sp!, {r0} ; get fpexc
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LDMIA sp!, {r0} ; get fpexc
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VMSR fpexc, r0 ; restore fpexc
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TST r0, #0x40000000
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TST r0, #0x40000000
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BEQ __no_vfp_frame2
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BEQ __no_vfp_frame2
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LDMIA sp!, {r1} ; get fpscr
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LDMIA sp!, {r1} ; get fpscr
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VMSR fpscr, r1
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VMSR fpscr, r1
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VLDMIA sp!, {d0-d15}
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VLDMIA sp!, {d0-d15}
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__no_vfp_frame2
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__no_vfp_frame2
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VMSR fpexc, r0
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.endif
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.endif
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LDMIA sp!, {r4} ; pop new task cpsr to spsr
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LDMIA sp!, {r4} ; pop new task cpsr to spsr
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@ -99,13 +99,13 @@ rt_hw_context_switch_to
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.if (__TI_VFP_SUPPORT__)
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.if (__TI_VFP_SUPPORT__)
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LDMIA sp!, {r0} ; get fpexc
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LDMIA sp!, {r0} ; get fpexc
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VMSR fpexc, r0
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TST r0, #0x40000000
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TST r0, #0x40000000
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BEQ __no_vfp_frame_to
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BEQ __no_vfp_frame_to
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LDMIA sp!, {r1} ; get fpscr
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LDMIA sp!, {r1} ; get fpscr
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VMSR fpscr, r1
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VMSR fpscr, r1
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VLDMIA sp!, {d0-d15}
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VLDMIA sp!, {d0-d15}
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__no_vfp_frame_to
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__no_vfp_frame_to
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VMSR fpexc, r0
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.endif
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.endif
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LDMIA sp!, {r4} ; pop new task cpsr to spsr
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LDMIA sp!, {r4} ; pop new task cpsr to spsr
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@ -162,13 +162,13 @@ __no_vfp_frame_str_irq
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.if (__TI_VFP_SUPPORT__)
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.if (__TI_VFP_SUPPORT__)
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LDMIA sp!, {r0} ; get fpexc
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LDMIA sp!, {r0} ; get fpexc
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VMSR fpexc, r0
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TST r0, #0x40000000
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TST r0, #0x40000000
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BEQ __no_vfp_frame_ldr_irq
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BEQ __no_vfp_frame_ldr_irq
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LDMIA sp!, {r1} ; get fpscr
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LDMIA sp!, {r1} ; get fpscr
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VMSR fpscr, r1
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VMSR fpscr, r1
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VLDMIA sp!, {d0-d15}
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VLDMIA sp!, {d0-d15}
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__no_vfp_frame_ldr_irq
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__no_vfp_frame_ldr_irq
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VMSR fpexc, r0
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.endif
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.endif
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LDMIA sp!, {r0-r12,lr}
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LDMIA sp!, {r0-r12,lr}
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@ -184,13 +184,13 @@ rt_hw_context_switch_interrupt_do
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.if (__TI_VFP_SUPPORT__)
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.if (__TI_VFP_SUPPORT__)
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LDMIA sp!, {r0} ; get fpexc
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LDMIA sp!, {r0} ; get fpexc
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VMSR fpexc, r0
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TST r0, #0x40000000
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TST r0, #0x40000000
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BEQ __no_vfp_frame_do1
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BEQ __no_vfp_frame_do1
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LDMIA sp!, {r1} ; get fpscr
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LDMIA sp!, {r1} ; get fpscr
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VMSR fpscr, r1
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VMSR fpscr, r1
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VLDMIA sp!, {d0-d15}
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VLDMIA sp!, {d0-d15}
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__no_vfp_frame_do1
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__no_vfp_frame_do1
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VMSR fpexc, r0
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.endif
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.endif
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LDMIA sp!, {r0-r12,lr} ; reload saved registers
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LDMIA sp!, {r0-r12,lr} ; reload saved registers
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@ -235,13 +235,13 @@ __no_vfp_frame_do2
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.if (__TI_VFP_SUPPORT__)
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.if (__TI_VFP_SUPPORT__)
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LDMIA sp!, {r0} ; get fpexc
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LDMIA sp!, {r0} ; get fpexc
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VMSR fpexc, r0
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TST r0, #0x40000000
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TST r0, #0x40000000
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BEQ __no_vfp_frame_do3
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BEQ __no_vfp_frame_do3
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LDMIA sp!, {r1} ; get fpscr
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LDMIA sp!, {r1} ; get fpscr
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VMSR fpscr, r1
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VMSR fpscr, r1
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VLDMIA sp!, {d0-d15}
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VLDMIA sp!, {d0-d15}
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__no_vfp_frame_do3
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__no_vfp_frame_do3
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VMSR fpexc, r0
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.endif
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.endif
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LDMIA sp!, {r4} ; pop new task's cpsr to spsr
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LDMIA sp!, {r4} ; pop new task's cpsr to spsr
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@ -58,8 +58,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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*(--stk) = SVCMODE; /* arm mode */
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*(--stk) = SVCMODE; /* arm mode */
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#ifdef __TI_VFP_SUPPORT__
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#ifdef __TI_VFP_SUPPORT__
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#define VFP_DATA_NR 32
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#ifndef RT_VFP_LAZY_STACKING
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{
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{
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#define VFP_DATA_NR 32
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int i;
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int i;
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for (i = 0; i < VFP_DATA_NR; i++)
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for (i = 0; i < VFP_DATA_NR; i++)
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@ -68,9 +69,13 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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}
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}
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/* FPSCR TODO: do we need to set the values other than 0? */
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/* FPSCR TODO: do we need to set the values other than 0? */
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*(--stk) = 0;
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*(--stk) = 0;
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/* FPEXC. Enable the FVP by default. */
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/* FPEXC. Enable the FVP if no lazy stacking. */
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*(--stk) = 0x40000000;
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*(--stk) = 0x40000000;
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}
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}
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#else
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/* FPEXC. Disable the FVP by default. */
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*(--stk) = 0x00000000;
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#endif
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#endif
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#endif
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/* return task's current stack address */
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/* return task's current stack address */
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