Merge pull request #1301 from balanceTWK/master
[BSP] add other uart|添加其他串口
This commit is contained in:
commit
1c318bafb7
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@ -7,7 +7,7 @@ cwd = os.path.join(str(Dir('#')), 'drivers')
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# add the general drivers.
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src = Split("""
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board.c
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usart.c
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drv_uart.c
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hyper_flash_boot.c
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drv_sdram.c
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""")
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@ -16,7 +16,7 @@
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#include <rtthread.h>
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#include "board.h"
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#include "usart.h"
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#include "drv_uart.h"
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static struct rt_memheap system_heap;
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@ -1,5 +1,5 @@
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/*
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* File : usart.c
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* File : drv_uart.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2013, RT-Thread Development Team
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*
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@ -10,9 +10,10 @@
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* Change Logs:
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* Date Author Notes
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* 2017-10-10 Tanek the first version
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* 2018-03-17 laiyiketang Add other uart.
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*/
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#include <rtthread.h>
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#include "usart.h"
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#include "drv_uart.h"
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#include "fsl_common.h"
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#include "fsl_lpuart.h"
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@ -20,14 +21,21 @@
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#ifdef RT_USING_SERIAL
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#if !defined(RT_USING_UART0) && !defined(RT_USING_UART1) && \
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!defined(RT_USING_UART2) && !defined(RT_USING_UART3) && \
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!defined(RT_USING_UART4) && !defined(RT_USING_UART5) && \
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!defined(RT_USING_UART6) && !defined(RT_USING_UART7)
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/* GPIO外设时钟会在LPUART_Init中自动配置, 如果定义了以下宏则不会自动配置 */
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#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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#endif
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#if !defined(RT_USING_UART1) && !defined(RT_USING_UART2) && \
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!defined(RT_USING_UART3) && !defined(RT_USING_UART4) && \
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!defined(RT_USING_UART5) && !defined(RT_USING_UART6) && \
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!defined(RT_USING_UART7) && !defined(RT_USING_UART8)
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#error "Please define at least one UARTx"
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#endif
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#include <rtdevice.h>
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/* imxrt uart driver */
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@ -55,7 +63,7 @@ void LPUART1_IRQHandler(void)
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#if defined(RT_USING_UART2)
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struct rt_serial_device serial2;
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void USART2_IRQHandler(void)
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void LPUART2_IRQHandler(void)
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{
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uart_isr(&serial2);
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}
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@ -65,7 +73,7 @@ void USART2_IRQHandler(void)
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#if defined(RT_USING_UART3)
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struct rt_serial_device serial3;
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void UART3_IRQHandler(void)
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void LPUART3_IRQHandler(void)
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{
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uart_isr(&serial3);
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}
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@ -75,7 +83,7 @@ void UART3_IRQHandler(void)
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#if defined(RT_USING_UART4)
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struct rt_serial_device serial4;
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void UART4_IRQHandler(void)
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void LPUART4_IRQHandler(void)
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{
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uart_isr(&serial4);
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}
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@ -84,7 +92,7 @@ void UART4_IRQHandler(void)
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#if defined(RT_USING_UART5)
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struct rt_serial_device serial5;
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void USART5_IRQHandler(void)
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void LPUART5_IRQHandler(void)
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{
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uart_isr(&serial5);
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}
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@ -94,7 +102,7 @@ void USART5_IRQHandler(void)
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#if defined(RT_USING_UART6)
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struct rt_serial_device serial6;
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void UART6_IRQHandler(void)
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void LPUART6_IRQHandler(void)
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{
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uart_isr(&serial6);
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}
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@ -104,7 +112,7 @@ void UART6_IRQHandler(void)
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#if defined(RT_USING_UART7)
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struct rt_serial_device serial7;
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void UART7_IRQHandler(void)
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void LPUART7_IRQHandler(void)
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{
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uart_isr(&serial7);
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}
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@ -114,7 +122,7 @@ void UART7_IRQHandler(void)
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#if defined(RT_USING_UART8)
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struct rt_serial_device serial8;
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void UART8_IRQHandler(void)
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void LPUART8_IRQHandler(void)
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{
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uart_isr(&serial8);
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}
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@ -122,14 +130,70 @@ void UART8_IRQHandler(void)
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#endif /* RT_USING_UART8 */
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static const struct imxrt_uart uarts[] = {
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#ifdef RT_USING_UART1
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#ifdef RT_USING_UART1
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{
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LPUART1,
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LPUART1_IRQn,
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&serial1,
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"uart1",
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},
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#endif
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#endif
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#ifdef RT_USING_UART2
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{
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LPUART2,
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LPUART2_IRQn,
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&serial2,
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"uart2",
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},
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#endif
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#ifdef RT_USING_UART3
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{
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LPUART3,
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LPUART3_IRQn,
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&serial3,
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"uart3",
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},
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#endif
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#ifdef RT_USING_UART4
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{
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LPUART4,
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LPUART4_IRQn,
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&serial4,
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"uart4",
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},
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#endif
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#ifdef RT_USING_UART5
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{
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LPUART5,
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LPUART5_IRQn,
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&serial5,
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"uart5",
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},
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#endif
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#ifdef RT_USING_UART6
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{
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LPUART6,
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LPUART6_IRQn,
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&serial6,
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"uart6",
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},
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#endif
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#ifdef RT_USING_UART7
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{
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LPUART7,
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LPUART7_IRQn,
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&serial7,
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"uart7",
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},
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#endif
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#ifdef RT_USING_UART8
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{
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LPUART8,
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LPUART8_IRQn,
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&serial8,
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"uart8",
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},
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#endif
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};
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@ -164,19 +228,20 @@ uint32_t BOARD_DebugConsoleSrcFreq(void)
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*/
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void imxrt_uart_gpio_init(struct imxrt_uart *uart)
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{
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if (uart->uart_base == LPUART1)
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if (uart->uart_base != RT_NULL)
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{
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
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#ifdef RT_USING_UART1
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CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
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0U); /* Software Input On Field: Input Path is determined by functionality */
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
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0x10B0u); /* Slew Rate Field: Slow Slew Rate
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IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
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0x10B0u); /* Slew Rate Field: Slow Slew Rate
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Drive Strength Field: R0/6
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Speed Field: medium(100MHz)
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Open Drain Enable Field: Open Drain Disabled
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@ -185,8 +250,8 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
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Pull Up / Down Config. Field: 100K Ohm Pull Down
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Hyst. Enable Field: Hysteresis Disabled */
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
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0x10B0u); /* Slew Rate Field: Slow Slew Rate
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IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
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0x10B0u); /* Slew Rate Field: Slow Slew Rate
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Drive Strength Field: R0/6
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Speed Field: medium(100MHz)
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Open Drain Enable Field: Open Drain Disabled
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@ -194,6 +259,128 @@ void imxrt_uart_gpio_init(struct imxrt_uart *uart)
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Pull / Keep Select Field: Keeper
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Pull Up / Down Config. Field: 100K Ohm Pull Down
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Hyst. Enable Field: Hysteresis Disabled */
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#endif
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#ifdef RT_USING_UART2
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART3
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART4
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_B1_00_LPUART4_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_B1_01_LPUART4_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_B1_00_LPUART4_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_B1_01_LPUART4_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART5
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_B1_12_LPUART5_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_B1_13_LPUART5_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_B1_12_LPUART5_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_B1_13_LPUART5_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART6
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART7
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_31_LPUART7_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_EMC_32_LPUART7_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_EMC_31_LPUART7_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_EMC_32_LPUART7_RX,
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0x10B0u);
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#endif
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#ifdef RT_USING_UART8
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CLOCK_EnableClock(kCLOCK_Iomuxc);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
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0U);
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IOMUXC_SetPinMux(
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IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
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0U);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
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0x10B0u);
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IOMUXC_SetPinConfig(
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IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
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0x10B0u);
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#endif
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}
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else
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{
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|
@ -324,10 +511,10 @@ static void uart_isr(struct rt_serial_device *serial)
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LPUART_Type *base;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct imxrt_uart *) serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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base = uart->uart_base;
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RT_ASSERT(base != RT_NULL);
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|
@ -339,7 +526,7 @@ static void uart_isr(struct rt_serial_device *serial)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
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}
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|
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/* If RX overrun. */
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if (LPUART_STAT_OR_MASK & base->STAT)
|
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{
|
||||
|
@ -363,7 +550,6 @@ int imxrt_hw_usart_init(void)
|
|||
{
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
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int i;
|
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|
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for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
|
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{
|
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uarts[i].serial->ops = &imxrt_uart_ops;
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* File : usart.h
|
||||
* File : drv_uart.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
|
@ -12,8 +12,8 @@
|
|||
* 2017-10-10 Tanek the first version
|
||||
*/
|
||||
|
||||
#ifndef __USART_H__
|
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#define __USART_H__
|
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#ifndef __DRV_USART_H__
|
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#define __DRV_USART_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
File diff suppressed because it is too large
Load Diff
|
@ -73,7 +73,7 @@
|
|||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>1</tvExp>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
|
@ -101,7 +101,9 @@
|
|||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<nTsel>2</nTsel>
|
||||
<bSchkAxf>0</bSchkAxf>
|
||||
<bTchkAxf>0</bTchkAxf>
|
||||
<nTsel>3</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
|
@ -164,11 +166,16 @@
|
|||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
<bLintAuto>0</bLintAuto>
|
||||
<Lin2Executable></Lin2Executable>
|
||||
<Lin2ConfigFile></Lin2ConfigFile>
|
||||
<bLin2Auto>0</bLin2Auto>
|
||||
<bAutoGenD>0</bAutoGenD>
|
||||
<bAuto2GenD>0</bAuto2GenD>
|
||||
<LntExFlags>0</LntExFlags>
|
||||
<pMisraName></pMisraName>
|
||||
<pszMrule></pszMrule>
|
||||
<pSingCmds></pSingCmds>
|
||||
<pMultCmds></pMultCmds>
|
||||
<pMisraNamep></pMisraNamep>
|
||||
<pszMrulep></pszMrulep>
|
||||
<pSingCmdsp></pSingCmdsp>
|
||||
<pMultCmdsp></pMultCmdsp>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
|
|
|
@ -8,11 +8,13 @@
|
|||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060528::V5.06 update 5 (build 528)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>MIMXRT1052:M7</Device>
|
||||
<Vendor>NXP</Vendor>
|
||||
<PackID>NXP.iMXRT_DFP.1.0.1</PackID>
|
||||
<PackID>NXP.iMXRT_DFP.1.0.2</PackID>
|
||||
<PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x00060000) IRAM2(0x00000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec />
|
||||
<StartupFile />
|
||||
|
@ -414,9 +416,9 @@
|
|||
</Files>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>usart.c</FileName>
|
||||
<FileName>drv_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>drivers\usart.c</FilePath>
|
||||
<FilePath>drivers\drv_uart.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
<Files>
|
||||
|
|
Loading…
Reference in New Issue