From 17ce4a462bd388edfd9e7dd995084276a5ff8336 Mon Sep 17 00:00:00 2001 From: zhiqiandeng <125748066+zhiqiandeng@users.noreply.github.com> Date: Tue, 23 May 2023 16:07:16 +0800 Subject: [PATCH] [bsp][yichip] add yc3122-pos (#7526) Co-authored-by: supperthomas <78900636@qq.com> --- .github/workflows/action.yml | 1 + bsp/yichip/yc3122-pos/.config | 998 ++ bsp/yichip/yc3122-pos/Kconfig | 27 + .../yc3122-pos/Libraries/.ignore_format.yml | 9 + .../Device/YICHIP/YC3122/Include/YC3122.svd | 11215 ++++++++++++++++ .../YICHIP/YC3122/Include/system_yc3122.h | 79 + .../Device/YICHIP/YC3122/Include/yc3122.h | 5342 ++++++++ .../Source/Templates/arm/startup_yc3122.s | 284 + .../Source/Templates/gcc/startup_yc3122.S | 214 + .../Source/Templates/iar/startup_yc3122.s | 225 + .../YC3122/Source/Templates/system_yc3122.c | 99 + .../Libraries/CMSIS/Include/cmsis_armcc.h | 865 ++ .../Libraries/CMSIS/Include/cmsis_armclang.h | 1869 +++ .../Libraries/CMSIS/Include/cmsis_compiler.h | 266 + .../Libraries/CMSIS/Include/cmsis_gcc.h | 2085 +++ .../Libraries/CMSIS/Include/cmsis_iccarm.h | 935 ++ .../Libraries/CMSIS/Include/cmsis_version.h | 39 + .../Libraries/CMSIS/Include/core_armv8mbl.h | 1918 +++ .../Libraries/CMSIS/Include/core_armv8mml.h | 2927 ++++ .../Libraries/CMSIS/Include/core_cm0.h | 949 ++ .../Libraries/CMSIS/Include/core_cm0plus.h | 1083 ++ .../Libraries/CMSIS/Include/core_cm1.h | 976 ++ .../Libraries/CMSIS/Include/core_cm23.h | 1993 +++ .../Libraries/CMSIS/Include/core_cm3.h | 1941 +++ .../Libraries/CMSIS/Include/core_cm33.h | 3002 +++++ .../Libraries/CMSIS/Include/core_cm4.h | 2129 +++ .../Libraries/CMSIS/Include/core_cm7.h | 2671 ++++ .../Libraries/CMSIS/Include/core_sc000.h | 1022 ++ .../Libraries/CMSIS/Include/core_sc300.h | 1915 +++ .../Libraries/CMSIS/Include/mpu_armv7.h | 270 + .../Libraries/CMSIS/Include/mpu_armv8.h | 333 + .../Libraries/CMSIS/Include/tz_context.h | 70 + bsp/yichip/yc3122-pos/Libraries/SConscript | 29 + .../yc3122-pos/Libraries/core/board_config.h | 1979 +++ .../yc3122-pos/Libraries/core/core_rv_31xx.h | 423 + .../yc3122-pos/Libraries/core/rom_api.h | 77 + bsp/yichip/yc3122-pos/Libraries/core/system.c | 391 + bsp/yichip/yc3122-pos/Libraries/core/system.h | 59 + bsp/yichip/yc3122-pos/Libraries/core/type.h | 77 + .../yc3122-pos/Libraries/sdk/libyc_qspi.a | Bin 0 -> 6302 bytes bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.c | 227 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.h | 81 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.c | 298 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.h | 243 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.h | 194 + .../yc3122-pos/Libraries/sdk/yc_qspi.lib | Bin 0 -> 130222 bytes bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.c | 382 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.h | 157 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.c | 105 + bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.h | 66 + .../Libraries/startup/startup_rv32.s | 423 + bsp/yichip/yc3122-pos/README.md | 47 + bsp/yichip/yc3122-pos/SConscript | 11 + bsp/yichip/yc3122-pos/SConstruct | 40 + bsp/yichip/yc3122-pos/applications/SConscript | 15 + bsp/yichip/yc3122-pos/applications/main.c | 120 + bsp/yichip/yc3122-pos/drivers/Kconfig | 26 + bsp/yichip/yc3122-pos/drivers/SConscript | 29 + bsp/yichip/yc3122-pos/drivers/board.c | 58 + bsp/yichip/yc3122-pos/drivers/board.h | 43 + bsp/yichip/yc3122-pos/drivers/drv_gpio.c | 269 + bsp/yichip/yc3122-pos/drivers/drv_gpio.h | 16 + bsp/yichip/yc3122-pos/drivers/drv_uart.c | 193 + bsp/yichip/yc3122-pos/drivers/drv_uart.h | 16 + .../drivers/linker_scripts/link.icf | 32 + .../drivers/linker_scripts/link.lds | 161 + .../drivers/linker_scripts/link.sct | 16 + bsp/yichip/yc3122-pos/drivers/ports/fal_cfg.h | 51 + .../drivers/ports/fal_flash_yc3122_port.c | 88 + bsp/yichip/yc3122-pos/figures/YC3122-pos.png | Bin 0 -> 2260454 bytes bsp/yichip/yc3122-pos/project.ewd | 2834 ++++ bsp/yichip/yc3122-pos/project.ewp | 2303 ++++ bsp/yichip/yc3122-pos/project.eww | 10 + bsp/yichip/yc3122-pos/project.uvoptx | 925 ++ bsp/yichip/yc3122-pos/project.uvprojx | 1482 ++ bsp/yichip/yc3122-pos/rtconfig.h | 239 + bsp/yichip/yc3122-pos/rtconfig.py | 152 + bsp/yichip/yc3122-pos/template.ewp | 2032 +++ bsp/yichip/yc3122-pos/template.eww | 10 + bsp/yichip/yc3122-pos/template.uvopt | 184 + bsp/yichip/yc3122-pos/template.uvoptx | 177 + bsp/yichip/yc3122-pos/template.uvprojx | 390 + 82 files changed, 64931 insertions(+) create mode 100644 bsp/yichip/yc3122-pos/.config create mode 100644 bsp/yichip/yc3122-pos/Kconfig create mode 100644 bsp/yichip/yc3122-pos/Libraries/.ignore_format.yml create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/YC3122.svd create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/system_yc3122.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/yc3122.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/arm/startup_yc3122.s create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/gcc/startup_yc3122.S create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/iar/startup_yc3122.s create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/system_yc3122.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armcc.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armclang.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_compiler.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_gcc.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_iccarm.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_version.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mbl.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mml.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0plus.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm1.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm23.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm3.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm33.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm4.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm7.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc000.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc300.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv7.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv8.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/tz_context.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/SConscript create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/board_config.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/core_rv_31xx.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/rom_api.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/system.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/system.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/core/type.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/libyc_qspi.a create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.lib create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.c create mode 100644 bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.h create mode 100644 bsp/yichip/yc3122-pos/Libraries/startup/startup_rv32.s create mode 100644 bsp/yichip/yc3122-pos/README.md create mode 100644 bsp/yichip/yc3122-pos/SConscript create mode 100644 bsp/yichip/yc3122-pos/SConstruct create mode 100644 bsp/yichip/yc3122-pos/applications/SConscript create mode 100644 bsp/yichip/yc3122-pos/applications/main.c create mode 100644 bsp/yichip/yc3122-pos/drivers/Kconfig create mode 100644 bsp/yichip/yc3122-pos/drivers/SConscript create mode 100644 bsp/yichip/yc3122-pos/drivers/board.c create mode 100644 bsp/yichip/yc3122-pos/drivers/board.h create mode 100644 bsp/yichip/yc3122-pos/drivers/drv_gpio.c create mode 100644 bsp/yichip/yc3122-pos/drivers/drv_gpio.h create mode 100644 bsp/yichip/yc3122-pos/drivers/drv_uart.c create mode 100644 bsp/yichip/yc3122-pos/drivers/drv_uart.h create mode 100644 bsp/yichip/yc3122-pos/drivers/linker_scripts/link.icf create mode 100644 bsp/yichip/yc3122-pos/drivers/linker_scripts/link.lds create mode 100644 bsp/yichip/yc3122-pos/drivers/linker_scripts/link.sct create mode 100644 bsp/yichip/yc3122-pos/drivers/ports/fal_cfg.h create mode 100644 bsp/yichip/yc3122-pos/drivers/ports/fal_flash_yc3122_port.c create mode 100644 bsp/yichip/yc3122-pos/figures/YC3122-pos.png create mode 100644 bsp/yichip/yc3122-pos/project.ewd create mode 100644 bsp/yichip/yc3122-pos/project.ewp create mode 100644 bsp/yichip/yc3122-pos/project.eww create mode 100644 bsp/yichip/yc3122-pos/project.uvoptx create mode 100644 bsp/yichip/yc3122-pos/project.uvprojx create mode 100644 bsp/yichip/yc3122-pos/rtconfig.h create mode 100644 bsp/yichip/yc3122-pos/rtconfig.py create mode 100644 bsp/yichip/yc3122-pos/template.ewp create mode 100644 bsp/yichip/yc3122-pos/template.eww create mode 100644 bsp/yichip/yc3122-pos/template.uvopt create mode 100644 bsp/yichip/yc3122-pos/template.uvoptx create mode 100644 bsp/yichip/yc3122-pos/template.uvprojx diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml index 662df2ec50..d890f19b2b 100644 --- a/.github/workflows/action.yml +++ b/.github/workflows/action.yml @@ -63,6 +63,7 @@ jobs: - "at32/at32f425-start" - "at32/at32f435-start" - "at32/at32f437-start" + - "yichip/yc3122-pos" - "hc32/ev_hc32f4a0_lqfp176" - "hc32/ev_hc32f460_lqfp100_v2" - "hc32l196" diff --git a/bsp/yichip/yc3122-pos/.config b/bsp/yichip/yc3122-pos/.config new file mode 100644 index 0000000000..8320f63ab3 --- /dev/null +++ b/bsp/yichip/yc3122-pos/.config @@ -0,0 +1,998 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=8 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=100 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_KPRINTF_USING_LONGLONG is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP=y +CONFIG_RT_MEMHEAP_FAST_MODE=y +# CONFIG_RT_MEMHEAP_BEST_MODE is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +CONFIG_RT_VER_NUM=0x50001 +# CONFIG_RT_USING_STDC_ATOMIC is not set +# CONFIG_RT_USING_CACHE is not set +# CONFIG_RT_USING_HW_ATOMIC is not set +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +# CONFIG_RT_USING_CPU_FFS is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# DFS: device virtual file system +# +# CONFIG_RT_USING_DFS is not set +# CONFIG_RT_USING_FAL is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +# CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set +# CONFIG_RT_USING_PWM is not set +CONFIG_RT_USING_MTD_NOR=y +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +CONFIG_RT_USING_SPI=y +# CONFIG_RT_USING_SPI_BITOPS is not set +# CONFIG_RT_USING_QSPI is not set +# CONFIG_RT_USING_SPI_MSD is not set +CONFIG_RT_USING_SFUD=y +CONFIG_RT_SFUD_USING_SFDP=y +CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y +# CONFIG_RT_SFUD_USING_QSPI is not set +CONFIG_RT_SFUD_SPI_MAX_HZ=50000000 +# CONFIG_RT_DEBUG_SFUD is not set +# CONFIG_RT_USING_ENC28J60 is not set +# CONFIG_RT_USING_SPI_WIFI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set +# CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# C/C++ and POSIX layer +# +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_POSIX_TIMER is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Network +# +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_AT is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_ADT is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_VBUS is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LWIP is not set +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_EZ_IOT_OS is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set +# CONFIG_PKG_USING_RYANW5500 is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set +# CONFIG_PKG_USING_ZEPHYR_POLLING is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_3GPP_AMRNB is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set +# CONFIG_PKG_USING_FLASH_BLOB is not set +# CONFIG_PKG_USING_MLIBC is not set + +# +# peripheral libraries and drivers +# + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_STHS34PF80 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ESP_IDF is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_ILI9341 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_AIP650 is not set +# CONFIG_PKG_USING_FINGERPRINT is not set +# CONFIG_PKG_USING_SPI_TOOLS is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + +# +# miscellaneous packages +# + +# +# project laboratory +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_MORSE is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_ARDUINO_U8GLIB_ARDUINO is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set + +# +# Other +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set +# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# +CONFIG_SOC_YC3122=y + +# +# Hardware Drivers Config +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y + +# +# UART Drivers +# +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_INTER_FLASH is not set diff --git a/bsp/yichip/yc3122-pos/Kconfig b/bsp/yichip/yc3122-pos/Kconfig new file mode 100644 index 0000000000..c5d60b0ac0 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Kconfig @@ -0,0 +1,27 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" + +config SOC_YC3122 + bool + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +source "drivers/Kconfig" diff --git a/bsp/yichip/yc3122-pos/Libraries/.ignore_format.yml b/bsp/yichip/yc3122-pos/Libraries/.ignore_format.yml new file mode 100644 index 0000000000..eaae820eee --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/.ignore_format.yml @@ -0,0 +1,9 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CMSIS +- core +- sdk +- startup diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/YC3122.svd b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/YC3122.svd new file mode 100644 index 0000000000..982f361f93 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/YC3122.svd @@ -0,0 +1,11215 @@ + + + YC3122 + 1.0 + ARMCM0 + ARM 32-bit Cortex-M0 Microcontroller based device, CPU clock up to 80MHz, etc. + YC is supplying the software is provided for YC3122 microprocessor. + + CM0 + r1p0 + little + false + false + 8 + false + + 8 + 32 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + + MMCU + 1.0 + MMCU + MMCU + 0xd0000 + + 0 + 0x110 + registers + + + USB + 0 + + + I2C0 + 1 + + + I2C1 + 2 + + + QSPI + 3 + + + SPI0 + 4 + + + SPI1 + 5 + + + HSPI + 6 + + + SEC + 7 + + + UART0 + 8 + + + UART1 + 9 + + + UART2 + 10 + + + UART3 + 11 + + + MEMCP + 12 + + + SCI0 + 13 + + + SCI1 + 14 + + + MSR + 15 + + + GPIO + 16 + + + TMRG0 + 17 + + + TMRG1 + 18 + + + SDIO + 19 + + + PSARM + 20 + + + RSA + 21 + + + SM4 + 22 + + + TRNG + 23 + + + WDT + 24 + + + DCMI + 25 + + + ADC + 26 + + + RTC + 27 + + + RSVD1 + 28 + + + POWER + 29 + + + SOFTWARE + 30 + + + RISCV + 31 + + + + + CTRL + * CTRL * + 0x0 + 32 + 0x00000000 + + + BITBAND_CFG + bitband 每一BIT对应的地址长度(0x2\n0000对应的地址是0x800000)\n0: RAM每一BIT对应的地址长度是8-bit\n1: RAM每一BIT对应的地址长度是32-bit + [8:8] + read-write + + + SCSCLK_EN + m0 scsclk的使能 + [6:6] + read-write + + + FCLK_EN + m0 fclk的使能 + [5:5] + read-write + + + DCLK_EN + m0 dclk的使能 + [4:4] + read-write + + + WFI_EN + m0 WFI的使能 + [2:2] + read-write + + + LTSLEEP + 写1 M0,进入浅睡眠模式\n注意:此BIT写1后必须要有6个以上的NOP指令,否则退\n出浅睡眠时可能会出错 + [1:1] + read-write + + + LTSLEEP_EN + 使能 lightsleep + [0:0] + write-only + + + + + + WKUP_SRC + * WKUP_SRC * + 0x4 + 32 + 0x00000000 + + + VAL + 唤醒中断源设置: 每1bit对应0~31号中断 + [31:0] + read-write + + + + + + ERROR_STATUS + * ERROR_STATUS * + 0x8 + 32 + 0x00000000 + + + ERR_CLR + 写1会清除所有的CPU ERROR状态 + [16:16] + read-write + + + DMA_MPU + 当这1bit置1,代表DMA MPU错误 + [8:8] + read-only + + + MPU_ROM + 当这1bit置1,代表rom区域非法访问 + [7:7] + read-only + + + RCODE_CRC + 当这1bit置1,代表RV代码读取CRC校验错误 + [6:6] + read-only + + + RV_ACCESS + 当这1bit置1,代表risc-v访问不存在的地\n址空间 + [5:5] + read-only + + + RV_MPU + 当这1bit置1,代表RV MPU错误 + [4:4] + read-only + + + RAM_NOEXE + 当这1bit置1,代表M0 RAM执行代码错误 + [3:3] + read-only + + + MPU + 当这1bit置1,代表M0 MPU错误 + [2:2] + read-only + + + MEM + 当这1bit置1,代表ROM或RAM奇偶校验错误 + [1:1] + read-only + + + CODE_CRC + 当这1bit置1,代表M0的代码 CRC校验错误 + [0:0] + read-only + + + + + + IRQ_ADDR0 + * IRQ_ADDR0 * + 0x20 + 32 + 0x00000000 + + + VAL + M0的中断起始地址 + [31:0] + read-write + + + + + + CURR_CLK + * CURR_CLK * + 0x24 + 32 + 0x00000000 + + + MS_CLK + DELAY_MS所需时钟(单位CLK) + [19:0] + read-write + + + US_CLK + DELAY_US所需时钟(单位CLK) + [31:20] + read-write + + + + + + RV_CTRL + * RV_CTRL * + 0x100 + 32 + 0x00000000 + + + SLP_STATUS + RV睡眠状态\n1:睡眠\n0:没有睡眠 + [25:25] + read-only + + + RST_STATUS + RV复位状态\n1:复位\n0:没有复位 + [24:24] + read-only + + + FS_LOCK + RV独立睡眠配置锁定\n1: 锁定 FS_LOCK和FS_EN + [20:20] + read-write + + + FS_EN + RV独立睡眠配置\n0xa: M0和RV独立睡眠\nothers: M0睡眠会强制RV一起睡眠 + [19:16] + read-write + + + RESET + RV复位使能\n0x0a: enable risc-v\nothers: reset riscv + [11:8] + read-write + + + CLK_EN + RV 时钟使能\n0x0a: 使能 risc-v clock\nothers: 失能 risc-v clock + [3:0] + read-write + + + + + + RV_IRQ + * RV_IRQ * + 0x104 + 32 + 0x00000000 + + + TRIG + 写‘1’会触发m0_to_rv中断,中断pend\ning寄存器和wakeup enable配置在riscv\n寄存器中\n必须写0清除,否则会导致一直触发 + [16:16] + read-write + + + IRQ + rv_to_m0中断状态位,使能之前必须先清除一\n下该标志位,否则上次中断状态会直接触发中断 + [8:8] + read-write + + + EN + rv_to_m0中断使能 + [0:0] + read-write + + + + + + SW_IRQ + * SW_IRQ * + 0x108 + 32 + 0x00000000 + + + CODE + 用户软件自己可以操作的8BIT + [15:8] + read-write + + + TRIG + 软件写1会触发软件中断 + [1:1] + read-write + + + EN + M0软件中断使能 + [0:0] + read-write + + + + + + BIN_IRQ + * BIN_IRQ * + 0x10c + 32 + 0x00000000 + + + ONED_IE + 一维码二值化中断使能 + [1:1] + read-write + + + QR_IE + 二维码二值化中断使能 + [0:0] + read-write + + + + + + + + MMPU + 1.0 + MMPU + MMPU + 0xd8080 + + 0 + 0x80 + registers + + + + + CTRL_ID + * CTRL_ID * + 0x0 + 32 + 0x00000000 + + + VAL + MPU ID + [31:0] + read-only + + + + + + CTRL + * CTRL * + 0x4 + 32 + 0x00000000 + + + VAL + MPU使能 + [0:0] + read-write + + + + + + CTRL_FSR + * CTRL_FSR * + 0xc + 32 + 0x00000000 + + + VAL + [4:2] fault region\n[1:0] fault status + [31:0] + read-write + + + + + + CTRL_FAR + * CTRL_FAR * + 0x10 + 32 + 0x00000000 + + + VAL + fault address + [31:0] + read-write + + + + + + PROTECTION + * PROTECTION * + 0x14 + 16 + 0x00000000 + + + VAL + protection15：0\n00：no access\n01：private only\n10：private + user read only\n11：Full Access + [15:0] + read-write + + + + + + USER_START + * USER_START * + 0x18 + 32 + 0x00000000 + + + VAL + 用户程序起始地址 + [31:0] + read-write + + + + + + REGION_BASE0 + * REGION_BASE0 * + 0x40 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE1 + * REGION_BASE1 * + 0x44 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE2 + * REGION_BASE2 * + 0x48 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE3 + * REGION_BASE3 * + 0x4c + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE4 + * REGION_BASE4 * + 0x50 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE5 + * REGION_BASE5 * + 0x54 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE6 + * REGION_BASE6 * + 0x58 + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_BASE7 + * REGION_BASE7 * + 0x5c + 32 + 0x00000000 + + + VAL + [0]regionx_enable [20:6]\n BASEx_REG + [31:0] + read-write + + + + + + REGION_LIMIT0 + * REGION_LIMIT0 * + 0x60 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT0_REG + [31:0] + read-write + + + + + + REGION_LIMIT1 + * REGION_LIMIT1 * + 0x64 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT1_REG + [31:0] + read-write + + + + + + REGION_LIMIT2 + * REGION_LIMIT2 * + 0x68 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT2_REG + [31:0] + read-write + + + + + + REGION_LIMIT3 + * REGION_LIMIT3 * + 0x6c + 32 + 0x00000000 + + + VAL + [20:6] LIMIT3_REG + [31:0] + read-write + + + + + + REGION_LIMIT4 + * REGION_LIMIT4 * + 0x70 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT4_REG + [31:0] + read-write + + + + + + REGION_LIMIT5 + * REGION_LIMIT5 * + 0x74 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT5_REG + [31:0] + read-write + + + + + + REGION_LIMIT6 + * REGION_LIMIT6 * + 0x78 + 32 + 0x00000000 + + + VAL + [20:6] LIMIT6_REG + [31:0] + read-write + + + + + + REGION_LIMIT7 + * REGION_LIMIT7 * + 0x7c + 32 + 0x00000000 + + + VAL + [20:6] LIMIT7_REG + [31:0] + read-write + + + + + + + + MHSPI + 1.0 + MHSPI + MHSPI + 0xd8400 + + 0 + 0x34 + registers + + + + + CTRL + * CTRL * + 0x0 + 32 + 0x00000000 + + + FIRST_BIT + 帧格式位\n0：先发送MSB;\n1：先发送LSB\n注：y_to_rgb_mode为1时,先进行y转rgb操\n作,再按配置比特顺序进行发送 + [26:26] + read-write + + + Y2RGB + buff内容转RGB565控制位\n0：无操作;\n1：buffer内容为8-bit灰度，实际发送时会自动转\n换为16-bit RGB565发送。 + [25:25] + read-write + + + RX_PHASE + 控制接收相位调整值位,按bit采样位偏移N个cl\nk个 个数\n0-7: 采样时间延后(rx_adj_clk + 1)*\nHspi_clk不得大于clk_div。\n + [23:20] + read-write + + + CLK_DIV + HSPI预分频位\n0-7：分频值为(clk_div + 1)*2。 + [19:16] + read-write + + + TRX_DLY + 发送和接收保护间隔位\n0-7：软件增加Hspi_clk*(trx_dly+1)\n*4个周期时长。 + [15:12] + read-write + + + FIFO_CTRL + FIFO软件控制权限使能位\n0: 软件无法操作FIFO,仅运行DMA自动操作\n1: 软件可以操作FIFO,不使用DMA时,可以直接使用\nFIFO进行收发 + [11:11] + read-write + + + NCS_DLY + NCS提前拉低和滞后拉高的延时位\n0-7：spi_clk*(ncs_dly+1)。 + [10:8] + read-write + + + RXD_EN + 接收相位调整使能开关\n0：失能相位调整;\n1：使能相位调整。 + [7:7] + read-write + + + RTX_SEQ + 收发序列控制位\n0：收发同时进行，长度为tx_len;\n1：先进行tx_len次发送, 再进行rx_len次接收\n（rx_len为0时跳过接收） + [6:6] + read-write + + + CPHA + 时钟相位\n0：空闲状态时，SCK保持低电平；\n1：空闲状态时，SCK保持高电平； + [5:5] + read-write + + + CPOL + 时钟极性位\n0：失能相位调整\n1：使能相位调整 + [4:4] + read-write + + + START + HSPI启动位，自动开启DMA_START\n0：无动作\n1：硬件启动一次HSPI收发 + [3:3] + read-write + + + START_SEL + DCMI多行中断选择\n0: DCMI DMA0\n1: DCMI DMA1 + [2:2] + read-write + + + START_EN + DCMI多行中断启动spi使能\n0: 禁止硬件启动spi\n1: 允许硬件启动spi + [1:1] + read-write + + + EN + 接收相位调整使能开关\n0：失能HSPI\n1：使能HSPI + [0:0] + read-write + + + + + + FIFO + * FIFO * + 0x4 + 32 + 0x00000000 + + + RX_DATA + 读取RX_FIFO数据\n0-7：写寄存器时，直接将此字节写入Rx_FIFO，\n读取此寄存器时，表示Rx_FIFO当前值; + [31:24] + read-write + + + TX_DATA + 读取Tx_FIFO数据\n0-7：写寄存器时，直接将此字节写入Tx_FIFO，\n读取此寄存器时，表示Tx_FIFO当前值; + [23:16] + read-write + + + AUTO_RST + fifo自动复位\n0: do not effect\n1: 每次传输完成后,自动复位一下fifo + [11:11] + read-write + + + RX_FULL + RXFIFO状态位\n0：非满;\n1：满。 + [10:10] + read-only + + + RX_EMPTY + RXFIFO状态位\n0：非空;\n1：空。 + [9:9] + read-only + + + RX_RPTR_INC + 读取RXFIFO字节位，写1, RX_DATA读\n地址加1\n0：无操作；\n1：读取FIFO中一个字节 + [8:8] + read-write + + + RST + 软件复位FIFO\n0: do not effect\n1: reset fifo + [3:3] + read-write + + + TX_FULL + TXFIFO状态位\n0：非满;\n1：满。 + [2:2] + read-only + + + TX_EMPTY + TXFIFO状态位\n0：非空;\n1：空。 + [1:1] + read-only + + + TX_RPTR_INC + 读取TXFIFO字节位，写1, TX_DATA读\n地址加1\n0：无操作；\n1：读取FIFO中一个字节； + [0:0] + read-write + + + + + + DMA + * DMA * + 0x8 + 32 + 0x00000000 + + + PINGPANG_EN + SPI发送数据时,DMA从内存中乒乓buffer\n取数\n0: disable pingpang\n1: enable pingpang,tx_saddr~\ntx_saddr+tx_len和tx_saddr+tx_\nlen ~ tx_saddr+tx_len*2 + [6:6] + read-write + + + RX_PTR_INC + RXFIFO状态位\n0：rx_addr自增;\n1：rx_addr不自增。 + [5:5] + read-write + + + TX_PTR_INC + TXFIFO状态位\n0：tx_addr自增\n1：tx_addr不自增。 + [4:4] + read-write + + + START + 启动DMA传输位，同AUTO_START搭配使用\n0：无操作；\n1：启动一次dma传输任务 + [3:3] + read-write + + + AUTO_START + DMA自动传输位\n0：dma不会自动启动，必须手动通过dma_start_\nman启动;\n1：spi_start自动启动dma，无须手动启动dma\n。 + [1:1] + read-write + + + EN + DMA控制位\n0：失能DMA;\n1：使能DMA。 + [0:0] + read-write + + + + + + IRQ + * IRQ * + 0xc + 32 + 0x00000000 + + + SOQ_EN + 检测START信号丢失使能位\n0: 失能；\n1: 使能。 + [21:21] + read-write + + + RXFO_EN + 接收FIFO溢出控制位\n0: 失能接收FIFO未溢出;\n1: 使能接收FIFO溢出; + [20:20] + read-write + + + RXFH_EN + 接收FIFO高水准线控制位\n0: 失能高于低水准线;\n1: 使能高于水准线。 + [19:19] + read-write + + + TXFO_EN + 发送FIFO溢出控制位\n0: 失能发送FIFO未溢出;\n1: 使能发送FIFO溢出。 + [18:18] + read-write + + + TXFL_EN + 发送FIFO低水准线控制位\n0: 失能低于低水准线；\n1: 使能低于低水准线。 + [17:17] + read-write + + + DMA_EN + DMA发送完成控制位\n0: 失能DMA发送;\n1: 使能DMA发送。 + [16:16] + read-write + + + SOQ_MIS + 丢失一次HSPI任务状态位\n0: 未错过任务；\n1: 出错，错过一次任务。 + [13:13] + read-write + + + RXFO_MIS + 接收FIFO溢出状态位\n0: 接收FIFO未溢出设定字节个数;\n1: 接收FIFO溢出设定字节个数。 + [12:12] + read-write + + + RXFH_MIS + 接收FIFO高水准线状态位\n0: 不高于低水准线;\n1: 高于水准线。 + [11:11] + read-write + + + TXFO_MIS + 发送FIFO溢出状态位\n0: 发送FIFO未溢出设定字节个数;\n1: 发送FIFO溢出设定字节个数。 + [10:10] + read-write + + + TXFL_MIS + 发送FIFO低水准线状态位\n0: 不低于低水准线；\n1: 低于低水准线。 + [9:9] + read-write + + + DMA_MIS + DMA传输状态位\n0: DMA发送未完成;\n1: DMA发送完成。 + [8:8] + read-write + + + SOQ_RIS + HSPI start信号来临时，上次传输还未完成\n， \n此时会错过一个HSPI任务，出现错误。\n0: 未错过任务；\n1: 出错，错过一次任务 + [5:5] + read-write + + + RXFO_RIS + 接收FIFO溢出标志位\n0: 接收FIFO未溢出设定字节个数;\n1: 接收FIFO溢出设定字节个数。 + [4:4] + read-write + + + RXFH_RIS + 接收FIFO高水准线标志位\n0: 不高于低水准线;\n1: 高于水准线。 + [3:3] + read-write + + + TXFO_RIS + 发送FIFO溢出标志位\n0: 发送FIFO未溢出设定字节个数;\n1: 发送FIFO溢出设定字节个数。 + [2:2] + read-write + + + TXFL_RIS + 发送FIFO低水准线标志位\n0: 不低于低水准线；\n1: 低于低水准线； + [1:1] + read-write + + + DMA_RIS + DMA发送完成标志位\n0: DMA发送未完成；\n1: DMA完成一次传输发送； + [0:0] + read-write + + + + + + DMA_TX_SADDR + * DMA_TX_SADDR * + 0x10 + 32 + 0x00000000 + + + VAL + 存放发送数据起始地址，必须四字节对齐。 + [19:0] + read-write + + + + + + DMA_RX_SADDR + * DMA_RX_SADDR * + 0x14 + 32 + 0x00000000 + + + VAL + 接收数据的起始地址，必须四字节对齐 + [19:0] + read-write + + + + + + DMA_TX_LEN + * DMA_TX_LEN * + 0x18 + 32 + 0x00000000 + + + VAL + HSPI发送数据字节长度，配置为0时，表示仅接收 + [19:0] + read-write + + + + + + DMA_RX_LEN + * DMA_RX_LEN * + 0x1c + 32 + 0x00000000 + + + VAL + HSPI接收数据字节长度，配置为0时，表示仅发送 + [19:0] + read-write + + + + + + DMA_TX_ADDR + * DMA_TX_ADDR * + 0x20 + 32 + 0x00000000 + + + VAL + 存放当前发送数据的地址。 + [19:0] + read-only + + + + + + DMA_RX_ADDR + * DMA_RX_ADDR * + 0x24 + 32 + 0x00000000 + + + VAL + 存放当前接收数据的地址。 + [19:0] + read-only + + + + + + FIFO_CTRL + * FIFO_CTRL * + 0x30 + 32 + 0x00000000 + + + TX_ITEMS + 读取RX_FIFO的数据个数。 + [28:24] + read-only + + + RX_ITEMS + 读取Tx_FIFO的数据个数。 + [20:16] + read-only + + + TX_WATERLEVEL + 接收FIFO高水线，\n接收FIFO数据大于等于此长度，并且水线值不为0时，\n触发rx_fifo_hi中断。 + [12:8] + read-write + + + RX_WATERLEVEL + 发送FIFO低水线，\n发送FIFO数据小于等于此长度，并且水线值不为0时，\n触发tx_fifo_lo中断。 + [4:0] + read-write + + + + + + + + MWDT + 1.0 + MWDT + MWDT + 0xf0000 + + 0 + 0x10 + registers + + + + + CONFIG + * CONFIG * + 0x0 + 32 + 0x00000000 + + + OFF_LOCK + wdt_off_lock\n1: wdt_off不起作用\n0: wdt_off起作用 + [12:12] + read-write + + + OFF + 关闭wdt\nwdt_off_lock为0,并且wdt_on为0时,设\n置wdt_off为1,再设置wdt_off为0,可关闭w\ndt + [11:11] + read-write + + + CLK_DIV + hclk预分频,最大16分频,实际使用的时钟频率\n是clk/(wdt_clk_div+1) + [10:7] + read-write + + + EN + 0 :WDT功能关闭. 1: WDT 功能打开. + [6:6] + read-write + + + MODE + 0 :复位 1:中断 + [5:5] + read-write + + + RELOAD + WDT计数时长为(2^(wdt_preset-1\n))个hclk_div时钟周期 + [4:0] + read-write + + + + + + CNT + * CNT * + 0x4 + 32 + 0x00000000 + + + CNT + WDT CNT + [31:0] + read-only + + + + + + IRQ_STATUS + WDT IRQ STATUS + 0x08 + 32 + 0x00000000 + + + + STATE + WDT IRQ STATUS + [0:0] + read-only + + + + + KICK + WDT KICK, 必须写 0x5937 + IRQ_STATUS + 0x08 + + + + VALUE + WDT KICK,必须写 0x5937 + [31:0] + write-only + + + + + + CLEAR + * CLEAR * + 0xc + 32 + 0x00000000 + + + CLEAR + 向这个寄存器中写1清除WDT 中断 + [0:0] + read-write + + + + + + + + MSCI0 + 1.0 + MSCI0 + MSCI0 + 0xf0400 + + 0 + 0x90 + registers + + + + + MODE + * MODE * + 0x0 + 32 + 0x00000000 + + + EDC_EN + EDC错误检测使能 \n0: 失能 \n1: 使能 + [16:16] + read-write + + + MST_EN + 主机模式使能 \n0: 失能 \n1: 使能 + [15:15] + read-write + + + CLK_SEL + CLK时钟源控制位(PWM0~PWM7) + [14:12] + read-write + + + CWT_EN + CWT计时器使能 \n0: 失能\n1: 使能 + [11:11] + read-write + + + BGT_EN + 块保护时间使能 \n0: 失能 \n1: 使能 + [10:10] + read-write + + + EN + SCI7816使能 \n0: 失能 \n1: 使能 + [9:9] + read-write + + + RET_EN + 重传使能位\n0:失能\n1:使能 + [8:8] + read-write + + + RET_TIME + 重传次数 + [7:5] + read-write + + + ETU_NUM + ETU个数控制位 + [4:3] + read-write + + + OD + OD控制位\n0: 开漏模式 \n1: 推挽模式(default) + [2:2] + read-write + + + CODE_DRT + 编码选择控制位\n0:正向编码 \n1:反向编码 + [1:1] + read-write + + + TPS + 模式控制位\n0:T=0 \n1:T=1 + [0:0] + read-write + + + + + + CTRL + * CTRL * + 0x8 + 32 + 0x00000000 + + + TS_TEST + 检测TS字节\n0:不起作用\n1:接收到数据为03时校验位电平取反 + [2:2] + read-write + + + TFIFO_CL + 发送FIFO内容清除控制位\n0:不起作用\n1:清除FIFO内数据 + [1:1] + read-write + + + RFIFO_CL + 接收FIFO内容清除控制位\n0:不起作用\n1:清除FIFO内数据 + [0:0] + read-write + + + + + + STATUS + * STATUS * + 0xc + 32 + 0x00000000 + + + CHK_BIT + 检验位状态\n0:检验位正确 \n1:检验位错误 + [8:8] + read-write + + + CWT_OT + CWT超时状态位\n0:没超时 \n1:超时 (参考:SCI7816_CWT寄存器说明） + [7:7] + read-write + + + BGT_OT + BGT超时状态位\n0:没超时 \n1:超时 (参考:SCI7816_BGT寄存器说明） + [6:6] + read-write + + + RET_CHK + 重传奇偶校验检测状态位\n0: 奇偶校验正确 \n1: 奇偶校验错误（在重传功能开启时,只有在发送达到重传\n次数时仍有错误发生,此位才被置位） + [5:5] + read-write + + + TFIFO_F + 发送缓冲器满状态位\n0: 发送缓冲器不满 \n1: 发送缓冲器满 + [4:4] + read-write + + + TFIFO_N + 发送缓冲器空状态位\n0: 发送缓冲器空 \n1: 发送缓冲器中不空 + [3:3] + read-write + + + PRT_CHK + 奇偶校验状态位\n0: 奇偶校验正确 \n1: 奇偶校验错误 + [2:2] + read-write + + + RFIFO_F + 接收缓冲器满状态位\n0:接收缓冲器不满 \n1:接收缓冲器满 + [1:1] + read-write + + + RFIFO_N + 接收缓冲器空状态位\n0:接收缓冲器空 \n1:接收缓冲器中不空 + [0:0] + read-write + + + + + + INT_IO + * INT_IO * + 0x10 + 32 + 0x00000000 + + + T_FNS + 发送完成标志位\n0:没发送完成\n1:已发送完成 + [1:1] + read-write + + + R_FNS + 接收完成标志位\n0:没接收完成\n1:已接收完成 + [0:0] + read-write + + + + + + DATA + * DATA * + 0x20 + 32 + 0x00000000 + + + VAL + 在发送或接收模式下分别充当发送或接收buffer\n角色 + [7:0] + read-write + + + + + + ETU + * ETU * + 0x28 + 32 + 0x00000000 + + + VAL + 配置SCI7816通讯速率 + [12:0] + read-write + + + + + + BGT + * BGT * + 0x2c + 32 + 0x00000000 + + + VAL + 配置SCI7816块反向发送时间间隔,max 6\n3 + [5:0] + read-write + + + + + + CWT + * CWT * + 0x30 + 32 + 0x00000000 + + + CWT_SRT + CWT计时开始\n0:CWT未开始计时\n1:CWT计时立即生效 + [24:24] + read-write + + + CWT_TMR + 配置SCI7816CWT定时值,发送字节完成,接\n收起始时启动计时 + [23:0] + read-write + + + + + + EDC + * EDC * + 0x34 + 32 + 0x00000000 + + + VAL + 保存 LRC 计算结果 + [7:0] + read-write + + + + + + IS + * IS * + 0x60 + 32 + 0x00000000 + + + R_SRT + 接收到毛刺信号,会触发此中断,仅rx_en使能时\n会触发\nbwt期间,bwt会自动恢复重启,可以触发超时\ncwt期间,毛刺到来会重置cwt计数器,wt超时时间会变\n长 + [14:14] + read-write + + + CWT_FLG + cwt标志, 写 '1' 清除 IS 和 IES + [13:13] + read-write + + + R_FNS + 接收完成 + [12:12] + read-write + + + T_FNS + 发送完成 + [11:11] + read-write + + + SHTCUT + tbd + [10:10] + read-write + + + TFIFO_OVF + 主机写入 发送FIFO 时 发送FIFO 满,T\nFIFO_OVF 溢出中断\n接收时,主机读 FIFO 下溢可能会导致此中断断言 + [9:9] + read-write + + + RFIFO_OVF + 设备接收字节时 接收FIFO 满,RFIFO_O\nVF 溢出中断 + [8:8] + read-write + + + TFIFO_LA + T_ITEMS <= TL_WTL\n发生中断后,应首先填充T_ITEMS至水线以上,或改变水\n线,才能清除中断\nTL_WTL为0时,不触发此中断 + [7:7] + read-write + + + RFIFO_HA + R_ITEMS <= RH_WTL\n发生中断后,应首先读取rx_fifo至水线以下,或改变水\n线,才能清除中断\nRH_WTL为0时,不触发此中断 + [6:6] + read-write + + + T_ERR + 发送错误,T0 重试次数超过配置,T1 从未触发\n此错误 + [5:5] + read-write + + + T_DONE + 成功传输 FIFO 中的最后一个字节 + [4:4] + read-write + + + BWT_TO + 接收 BWT 定时器超时中断 + [3:3] + read-write + + + CWT_TO + 接收 CWT 定时器超时中断 + [2:2] + read-write + + + R_ERR + 接收错误中断,T0 重试次数超过配置,T1 奇偶\n校验错误 + [1:1] + read-write + + + R_DONE + 成功接收到1个字节 + [0:0] + read-write + + + + + + IE + * IE * + 0x64 + 32 + 0x00000000 + + + R_SRT + 使能 R_SRT 中断控制位 + [14:14] + read-write + + + CWT_FLG + 使能 CWT_FLG 中断控制位 + [13:13] + read-write + + + R_FNS + 使能 R_FNS 中断控制位 + [12:12] + read-write + + + T_FNS + 使能 T_FNS 中断控制位 + [11:11] + read-write + + + SHTCUT + 使能 SHTCUT 中断控制位 + [10:10] + read-write + + + TFIFO_OVF + 使能 TFIFO_OVF 中断控制位 + [9:9] + read-write + + + RFIFO_OVF + 使能 RFIFO_OVF 中断控制位 + [8:8] + read-write + + + TFIFO_LA + 使能 TFIFO_LA 中断控制位 + [7:7] + read-write + + + RFIFO_HA + 使能 RFIFO_HA 中断控制位 + [6:6] + read-write + + + T_ERR + 使能 T_ERR 中断控制位 + [5:5] + read-write + + + T_DONE + 使能 T_DONE 中断控制位 + [4:4] + read-write + + + BWT_TO + 使能 BWT_TO 中断控制位 + [3:3] + read-write + + + CWT_TO + 使能 CWT_TO 中断控制位 + [2:2] + read-write + + + R_ERR + 使能 R_ERR 中断控制位 + [1:1] + read-write + + + R_DONE + 使能 R_DONE 中断控制位 + [0:0] + read-write + + + + + + IES + * IES * + 0x68 + 32 + 0x00000000 + + + R_SRT + 使能 R_SRT 中断状态控制位 + [14:14] + read-write + + + CWT_FLG + 使能 CWT_FLG 中断状态控制位 + [13:13] + read-write + + + R_FNS + 使能 R_FNS 中断状态控制位 + [12:12] + read-write + + + T_FNS + 使能 T_FNS 中断状态控制位 + [11:11] + read-write + + + SHTCUT + 使能 SHTCUT 中断状态控制位 + [10:10] + read-write + + + TFIFO_OVF + 使能 TFIFO_OVF 中断状态控制位 + [9:9] + read-write + + + RFIFO_OVF + 使能 RFIFO_OVF 中断状态控制位 + [8:8] + read-write + + + TFIFO_LA + 使能 TFIFO_LA 中断状态控制位 + [7:7] + read-write + + + RFIFO_HA + 使能 RFIFO_HA 中断状态控制位 + [6:6] + read-write + + + T_ERR + 使能 T_ERR 中断状态控制位 + [5:5] + read-write + + + T_DONE + 使能 T_DONE 中断状态控制位 + [4:4] + read-write + + + BWT_TO + 使能 BWT_TO 中断状态控制位 + [3:3] + read-write + + + CWT_TO + 使能 CWT_TO 中断状态控制位 + [2:2] + read-write + + + R_ERR + 使能 R_ERR 中断状态控制位 + [1:1] + read-write + + + R_DONE + 使能 R_DONE 中断状态控制位 + [0:0] + read-write + + + + + + CTRL2 + * CTRL2 * + 0x6c + 32 + 0x00000000 + + + BWT_RNG + 接收 BWT 定时器运行状态 + [30:30] + read-only + + + BWTA_ST + 接收 BWT 自动停止使能控制位\n0:接收 BWT 定时器不会自动停止\n1:当发送”BWTA_ST”位时,接收 BWT 定时器将\n自动停止 + [29:29] + read-write + + + BWTA_SRT + 接收 BWT 自动启动使能控制位\n0:接收 BWT 定时器不会自动启动\n1:当发送”BWTA_SRT”位时,接收 BWT 定时器\n将自动启动 + [28:28] + read-write + + + BWT_RLD + 写”1”接收 BWT 重新装载,始终读回”0” + [27:27] + write-only + + + BWT_SRT + 写”1”接收 BWT 开始,始终读回”0” + [26:26] + write-only + + + BWT_ST + 写”1”接收 BWT 停止,始终读回”0” + [25:25] + write-only + + + BWT_EN + 接收 BWT 使能控制位\n0:接收 BWT 定时器失能\n1:接收 BWT 定时器使能 + [24:24] + read-write + + + CWT_RNG + 接收 CWT 定时器运行状态 + [21:21] + read-only + + + CWTA_SRT + 接收 CWT 自动启动使能控制位\n0:接收 CWT 定时器不会自动启动\n1:当发送”CWTA_SRT”位时,接收 CWT 定时器\n将自动启动 + [20:20] + read-write + + + CWT_RLD + 写”1”接收 CWT 重新装载,始终读回”0” + [19:19] + write-only + + + CWT_SRT + 写”1”接收 CWT 开始,始终读回”0” + [18:18] + write-only + + + CWT_ST + 写”1”接收 CWT 停止,始终读回”0” + [17:17] + write-only + + + CWT_EN + 接收 CWT 定时器使能控制位\n0:接收 CWT 定时器失能\n1:接收 CWT 定时器使能 + [16:16] + read-write + + + CWTC_DSA + 清除 CWT 计数器控制位\n0:使用发送开始位或接收开始位清除 CWT 计数器\n1:不清除 CWT 计数器 + [14:14] + read-write + + + CWTS_SL + CWT开始选择控制位\n0:接收缓冲器等待或者发送字节结束\n1:接收起始位或发送起始位 + [13:13] + read-write + + + BGTS_SL + BGT开始选择控制位\n0:接收开始\n1:接收启动位,更可重新定位 + [12:12] + read-write + + + FST_FLG + 发送第一个字节标志位\n0:不传输第一个字节\n1:下面的字节是要传送的第一个字节 + [11:11] + read-only + + + FST_W + 发送第一个字节等待块保护时间\n0:第一个字节发送不考虑 BGT_FLG\n1:当发送第一个字节时,等待 BGT_FLG 置”1” + [10:10] + read-write + + + FST_RF + 写1将刷新 FST_FLG 置1 + [9:9] + write-only + + + FST_EN + 使能发送第一个字节控制位\n0:第一个字节传输失能\n1:第一个字节发送开始或当 BGT_FLG 置"1" + [8:8] + read-write + + + RX_EN + 使能接收数据控制位\n0:失能\n1:使能 + [1:1] + read-write + + + TX_EN + 使能发送数据控制位\n0:失能\n1:使能 + [0:0] + read-write + + + + + + CWT_TO + * CWT_TO * + 0x70 + 32 + 0x00000000 + + + VAL + 接收 CWT 超时预设值 + [23:0] + read-write + + + + + + CWT_RLD + * CWT_RLD * + 0x74 + 32 + 0x00000000 + + + VAL + 接收 CWT 重新加载值 + [23:0] + read-write + + + + + + CWT_CNT + * CWT_CNT * + 0x78 + 32 + 0x00000000 + + + VAL + 接收 CWT 当前计数值 + [23:0] + read-write + + + + + + STATUS_FSM + * STATUS_FSM * + 0x7c + 32 + 0x00000000 + + + RX_WAIT + RX_WAIT_STATE + [25:25] + read-only + + + RX_ERR_GAD + RX_ERROR_GUARD_STATE + [24:24] + read-only + + + RX_GARD + RX_GUARD_STATE + [23:23] + read-only + + + RX_ERR + RX_ERROR_STATE + [22:22] + read-only + + + RX_PRT_CHK + RX_PARITY_CHECK_STATE + [21:21] + read-only + + + RX_PRT + RX_PARITY_STATE + [20:20] + read-only + + + RX_DTA + RX_DATA_STATE + [19:19] + read-only + + + RX_STR + RX_START_STATE + [18:18] + read-only + + + RX_RDY + RX_READY_STATE + [17:17] + read-only + + + RX_IDLE + RX_IDLE_STATE + [16:16] + read-only + + + TX_GAD + TX_GUARD_STATE + [8:8] + read-only + + + TX_ERR_GAD + TX_ERROR_GUARD_STATE + [7:7] + read-only + + + TX_ERR_DET + TX_ERROR_DETECT_STATE + [6:6] + read-only + + + TX_INT_GAD + TX_INT_GUARD_STATE + [5:5] + read-only + + + TX_PRT + TX_PARITY_STATE + [4:4] + read-only + + + TX_DTA + TX_DATA_STATE + [3:3] + read-only + + + TX_LD_DTA + TX_LOAD_DATA_STATE + [2:2] + read-only + + + TX_STR + TX_START_STATE + [1:1] + read-only + + + TX_IDLE + TX_IDLE_STATE + [0:0] + read-only + + + + + + BWT_TO + * BWT_TO * + 0x80 + 32 + 0x00000000 + + + VAL + 接收 BWT 超时预设值 + [23:0] + read-write + + + + + + BWT_RLD + * BWT_RLD * + 0x84 + 32 + 0x00000000 + + + VAL + 接收 BWT 重装载值 + [23:0] + read-write + + + + + + BWT_CNT + * BWT_CNT * + 0x88 + 32 + 0x00000000 + + + VAL + 接收 BWT 当前计数值 + [23:0] + read-write + + + + + + FIFO_CTRL + * FIFO_CTRL * + 0x8c + 32 + 0x00000000 + + + R_ITEMS + 接收 FIFO 字节数 + [15:12] + read-only + + + T_ITEMS + 发送 FIFO 字节数 + [11:8] + read-only + + + RH_WTL + FIFO_ITEMS >= RH_WTL 时,触\n发 RFIFO_HA 中断\n注意:RH_WTL 为0时,不触发中断 + [7:4] + read-write + + + TL_WTL + T_ITEMS <= TL_WTL 时,触发 T\nFIFO_LA 中断\n注意：TL_WTL 为0时,不触发中断 + [3:0] + read-write + + + + + + + + MSCI1 + 0xf0800 + + + + MTIM + 1.0 + 32 TIMER + TIMER + 0xf0c00 + + 0 + 0x78 + registers + + + + + 18 + 4 + PERIOD[%s] + period Register + 0x00 + read-write + 0x00000000 + + + + period + period + [31:0] + read-write + + + + + + CTRL1 + pwm Control Register(0~7) + 0x48 + 32 + read-write + 0x00000000 + + + + PWM0EN + Enable or disable TIMER + [0:0] + read-write + + + + PWM0FIR + TIMER initial level + [1:1] + read-write + + + + PWM0MD + TIMER mode + [2:2] + read-write + + + + PWM0REL + TIMER AUTO RELOAD + [3:3] + read-write + + + + PWM1EN + Enable or disable TIMER1 + [4:4] + read-write + + + + PWM1FIR + TIMER initial level + [5:5] + read-write + + + + PWM1MD + TIMER mode + [6:6] + read-write + + + + PWM1REL + TIMER AUTO RELOAD + [7:7] + read-write + + + + PWM2EN + Enable or disable TIMER2 + [8:8] + read-write + + + + PWM2FIR + TIMER initial level + [9:9] + read-write + + + + PWM2MD + TIMER mode + [10:10] + read-write + + + + PWM2REL + TIMER AUTO RELOAD + [11:11] + read-write + + + + PWM3EN + Enable or disable TIMER3 + [12:12] + read-write + + + + PWM3FIR + TIMER initial level + [13:13] + read-write + + + + PWM3MD + TIMER mode + [14:14] + read-write + + + + PWM3REL + TIMER AUTO RELOAD + [15:15] + read-write + + + + PWM4EN + Enable or disable TIMER4 + [16:16] + read-write + + + + PWM4FIR + TIMER initial level + [17:17] + read-write + + + + PWM4MD + TIMER mode + [18:18] + read-write + + + + PWM4REL + TIMER AUTO RELOAD + [19:19] + read-write + + + + PWM5EN + Enable or disable TIMER5 + [20:20] + read-write + + + + PWM5FIR + TIMER initial level + [21:21] + read-write + + + + PW5MD + TIMER mode + [22:22] + read-write + + + + PWM5REL + TIMER AUTO RELOAD + [23:23] + read-write + + + + PWM6EN + Enable or disable TIMER6 + [24:24] + read-write + + + + PWM6FIR + TIMER initial level + [25:25] + read-write + + + + PWM6MD + TIMER mode + [26:26] + read-write + + + + PWM6REL + TIMER AUTO RELOAD + [27:27] + read-write + + + + PWM7EN + Enable or disable TIMER7 + [28:28] + read-write + + + + PWM7FIR + TIMER initial level + [29:29] + read-write + + + + PWM7MD + TIMER mode + [30:30] + read-write + + + + PWM7REL + TIMER AUTO RELOAD + [31:31] + read-write + + + + + + CTRL2 + pwm Control Register(8) + 0x4c + 32 + read-write + 0x00000000 + + + + PWM8EN + Enable or disable TIMER + [0:0] + read-write + + + + PWM8FIR + TIMER initial level + [1:1] + read-write + + + + PWM8MD + TIMER mode + [2:2] + read-write + + + + PWM8REL + TIMER AUTO RELOAD + [3:3] + read-write + + + + IRQ_EN + The timer crresponds to the interrupt enable control bit + [12:4] + read-write + + + + IRQ_CLR + Clear interrupt control bits + [21:13] + read-write + + + + + + 9 + 4 + 32 + CNT[%s] + 0x50 + read-only + + + + cnt + cnt + [31:0] + read-only + + + + + + IRQ_NUM + pwm IRQ status Register + 0x74 + 32 + read-write + 0x00000000 + + + + PWM_IRQ_PEND + PWM_IRQ status + [8:0] + read-only + + + + + + + + MCRC + 1.0 + MCRC + MCRC + 0xf8204 + + 0 + 0x7e + registers + + + + + RESULT + * RESULT * + 0x0 + 32 + 0x00000000 + + + VAL + 存放CRC运算的初值及结果 + [31:0] + read-write + + + + + + MASK + * MASK * + 0x4 + 32 + 0x00000000 + + + VAL + 计算掩码,不影响CRC最终运算结果 + [31:0] + read-write + + + + + + DATA + * DATA * + 0x7c + 16 + 0x00000000 + + + VAL + 存放参与CRC运算的数据 + [15:0] + read-write + + + + + + + + MRCC + 1.0 + MRCC + MRCC + 0xf8400 + + 0 + 0x2c + registers + + + + + HCLK_CTRL + * HCLK_CTRL * + 0x0 + 32 + 0x00000000 + + + UART_SEL + UART时钟clk_uart选择。\n0: rc192m分频后生成的48M时钟\n1: pll_hsi_48m,切换PLL频率会抖动\n2: pll_hse_48m,切换PLL频率会抖动 + [15:14] + read-write + + + USB_SEL + USB时钟clk_usb选择。\n0: rc192m分频后生成的48M时钟\n1: pll_hsi_48m,切换PLL频率会抖动\n2: pll_hse_48m,切换PLL频率会抖动 + [13:12] + read-write + + + + + + PCLK_CTRL + * PCLK_CTRL * + 0x4 + 32 + 0x00000000 + + + DIV_EN + PCLK分频使能 + [2:2] + read-write + + + SEL + PCLK使用的分频值选择\n0: 1分频\n1: 2分频\n2: 4分频\n3: 8分频 + [1:0] + read-write + + + + + + RSA_CLK + * RSA_CLK * + 0x8 + 32 + 0x00000000 + + + CLK_CFG + 每16个clk_rsa中,前n个可以强制为0,此\n寄存器用于选择n值,从这里输出的时钟最终给到RSA模块1\n : 每16个clk_rsa中,前3个周期强制为0\n2, 4, 5 :每16个clk_rsa中,前2个周期强\n制为0\n3 : 每16个clk_rsa中,第一个强制为0\n6, 7 :clk_rsa输入等于输出\nOthers : 每16个clk_rsa中,前7个周期强\n制为0 + [3:0] + read-write + + + + + + CLK_EN + * CLK_EN * + 0xc + 32 + 0x00000000 + + + RC48M + RC48M数字模块时钟开关 + [29:29] + read-write + + + RV_REG + RV_REG数字模块时钟开关 + [28:28] + read-write + + + RV_SYS + RV_SYS数字模块时钟开关 + [27:27] + read-write + + + MPU_DMA + MPU_DMA数字模块时钟开关 + [26:26] + read-write + + + MEMCP + MEMCP数字模块时钟开关 + [25:25] + read-write + + + CHGPUMP + CHGPUMP数字模块时钟开关 + [24:24] + read-write + + + SD + SD数字模块时钟开关 + [23:23] + read-write + + + DCMI + DCMI数字模块时钟开关 + [22:22] + read-write + + + DAC + DAC数字模块时钟开关 + [21:21] + read-write + + + HSPI + HSPI数字模块时钟开关 + [20:20] + read-write + + + PSRAM + PSRAM数字模块时钟开关 + [19:19] + read-write + + + MSR_ADC + 7811_ADC数字模块时钟开关 + [17:17] + read-write + + + MSR + 7811数字模块时钟开关 + [16:16] + read-write + + + UART + UART数字模块时钟开关 + [15:15] + read-write + + + SM4 + SM4数字模块时钟开关 + [14:14] + read-write + + + SCI1 + SCI1数字模块时钟开关 + [13:13] + read-write + + + SCI0 + SCI0数字模块时钟开关 + [12:12] + read-write + + + GPIO + GPIO数字模块时钟开关 + [11:11] + read-write + + + AES + AES数字模块时钟开关 + [10:10] + read-write + + + RSA + RSA数字模块时钟开关 + [9:9] + read-write + + + DES + DES数字模块时钟开关 + [8:8] + read-write + + + SPI + SPI数字模块时钟开关 + [7:7] + read-write + + + USB + USB数字模块时钟开关 + [6:6] + read-write + + + WDT + WDT数字模块时钟开关 + [5:5] + read-write + + + PWM + PWM数字模块时钟开关 + [4:4] + read-write + + + CRC + CRC数字模块时钟开关 + [3:3] + read-write + + + SHA + SHA数字模块时钟开关 + [2:2] + read-write + + + QSPI + qspi数字模块时钟开关 + [1:1] + read-write + + + RNG + rng数字模块时钟开关 + [0:0] + read-write + + + + + + MCU_CLK + * MCU_CLK * + 0x10 + 32 + 0x00000000 + + + RAND_MASK + DIV_HI和DIV_LO会加上(随机数& RA\nND_MASK) + [27:24] + read-write + + + DIV_HI + 输入给MCU的时钟的低电平持续时间 = (DIV\n_HI +1)个clk + [23:16] + read-write + + + DIV_LO + 输入给MCU的时钟的低电平持续时间 = (DIV\n_LO+1)个clk + [15:8] + read-write + + + RAND_EN + 为1则使能MCU时钟随机功能 + [5:5] + read-write + + + DIV_SEL + MCU时钟分频选择\n0：选择非分频时钟作为 clk_mcu\n1：选择分频时钟作为clk_mcu\n注意：当从'1'变为'0'时,应先设置div_sel为'\n0',延迟至少两个周期,然后清除div_en,不要同时清\n除这两位。当从'0'变为'1'时,应先设置div_en为\n'1',延迟至少两个周期,然后设置 + [4:4] + read-write + + + DIV_EN + 为1则使能MCU时钟分频 + [3:3] + read-write + + + RC_32K + 为1则使能内部RC32K（LSI）为系统时钟,同\n时屏蔽其他所有的设置 + [2:2] + read-write + + + SEL + MCU时钟来源选择\n0: rc192m\n1: pll_192M\n2: pll_256M\n3: pll_48M, + [1:0] + read-write + + + + + + PER1_CLK + * PER1_CLK * + 0x14 + 32 + 0x00000000 + + + QSPI_DIV_HI + 输入给QSPI的时钟的低电平持续时间 = (QS\nPI_DIV_HI+1)个clk + [31:28] + read-write + + + QSPI_DIV_LO + 输入给QSPI的时钟的低电平持续时间 = (QS\nPI_DIV_LO+1)个clk + [27:24] + read-write + + + QSPI_SEL + QSPI总线时钟来源选择\n0: CLK_MCU\n1: RC192M\n2: pll_192M\n3: pll_48M + [17:16] + read-write + + + AHB_DIV_HI + 输入给AHB的时钟的高电平持续时间 = (AHB\n_DIV_HI +1)个clk + [15:12] + read-write + + + AHB_DIV_LO + 输入给AHB的时钟的低电平持续时间 = (AHB\n_DIV_LO+1)个clk + [11:8] + read-write + + + AHB_RAND_MASK + AHB_DIV_HI和AHB_DIV_LO会加上\n(随机数&AHB_RAND_MASK) + [7:4] + read-write + + + AHB_RAND_EN + 为1则使能AHB总线时钟随机功能 + [3:3] + read-write + + + AHB_SEL + AHB总线时钟来源选择\n0: CLK_MCU\n1: RC192M\n2: pll_192M\n3: pll_48M + [1:0] + read-write + + + + + + PER2_CLK + * PER2_CLK * + 0x18 + 32 + 0x00000000 + + + HSPI_DIV_HI + 输入给HSPI的时钟的高电平持续时间 = (HS\nPI_DIV_HI +1)个clk + [31:28] + read-write + + + HSPI_DIV_LO + 输入给HSPI的时钟的低电平持续时间 = (HS\nPI_DIV_LO+1)个clk + [27:24] + read-write + + + HSPI_DIV_EN + 为1则使能HSPI时钟分频 + [21:21] + read-write + + + HSPI_DIV_SEL + HSPI时钟分频选择\n0：选择非分频时钟作为 clk_hspi\n1：选择分频时钟作为 clk_hspi + [20:20] + read-write + + + HSPI_PLL_SEL + HSPI时钟来源选择\n0: pll_hsi\n1: pll_hse + [19:19] + read-write + + + HSPI_SEL + PSRAM总线时钟来源选择\n0: CLK_MCU\n1: RC192M\n2: pll_192M\n3: pll_256M + [17:16] + read-write + + + PSRAM_DIV_HI + 输入给PSRAM的时钟的高电平持续时间 = (P\nSRAM_DIV_HI +1)个clk + [15:12] + read-write + + + PSRAM_DIV_LO + 输入给PSRAM的时钟的低电平持续时间 = (P\nSRAM_DIV_LO+1)个clk + [11:8] + read-write + + + PSRAM_DIV_EN + 为1则使能PSRAM时钟分频 + [5:5] + read-write + + + PSRAM_DIV_SEL + PSRAM时钟分频选择\n0：选择非分频时钟作为 clk_psram\n1：选择分频时钟作为clk_psram + [4:4] + read-write + + + PSRAM_PLL_SEL + PSRAM时钟来源选择\n0: pll_hsi\n1: pll_hse + [3:3] + read-write + + + PSRAM_SEL + PSRAM总线时钟来源选择\n0: CLK_MCU\n1: RC192M\n2: pll_192M\n3: pll_256M + [1:0] + read-write + + + + + + PER3_CLK + * PER3_CLK * + 0x1c + 32 + 0x00000000 + + + GPIO1_DIV_HI + GPIO奇数脚输出的时钟的高电平持续时间 = (\nGPIO1_DIV_HI+1)个clk + [31:30] + read-write + + + GPIO1_DIV_LO + GPIO奇数脚输出的时钟的低电平持续时间 = (\nGPIO1_DIV_LO+1)个clk + [29:28] + read-write + + + GPIO1_EN + GPIO奇数脚时钟输出使能 + [27:27] + read-write + + + GPIO1_SEL + GPIO奇数脚时钟输出,需要把奇数的GPIO配置\n成 55:GPIO_CLK_OUT\n0: clk_rc48m\n1: clk_pll_hsi_48m\n2: clk_pll_hse_48m + [25:24] + read-write + + + GPIO0_DIV_HI + GPIO偶数脚输出的时钟的高电平持续时间 = (\nGPIO0_DIV_HI+1)个clk + [23:22] + read-write + + + GPIO0_DIV_LO + GPIO偶数脚输出的时钟的低电平持续时间 = (\nGPIO0_DIV_LO+1)个clk + [21:20] + read-write + + + GPIO0_EN + GPIO偶数脚时钟输出使能 + [19:19] + read-write + + + GPIO0_SEL + GPIO偶数脚时钟输出,需要把偶数的GPIO配置\n成 55:GPIO_CLK_OUT\n0: clk_rc48m\n1: clk_pll_hsi_48m\n2: clk_pll_hse_48m + [17:16] + read-write + + + ADAC_DIV_HI + 输入给ADAC的时钟的高电平持续时间 = (AD\nAC_DIV_HI +1)个clk + [15:14] + read-write + + + ADAC_DIV_LO + 输入给ADAC的时钟的低电平持续时间 = (AD\nAC_DIV_LO+1)个clk + [13:12] + read-write + + + ADAC_EN + ADAC时钟分频使能来源选择\n0：选择非分频时钟作为 clk_adac\n1：选择分频时钟作为clk_adac + [11:11] + read-write + + + ADAC_SEL + ADAC时钟来源选择\n0: rc48m\n1: pll_hsi_48m\n2: pll_hse_48m + [9:8] + read-write + + + ICE_DIV_HI + 输入给ICE的时钟的高电平持续时间 = (ICE\n_DIV_HI +1)个clk + [7:6] + read-write + + + ICE_DIV_LO + 输入给ICE的时钟的低电平持续时间 = (ICE\n_DIV_LO+1)个clk + [5:4] + read-write + + + ICE_EN + ICE时钟分频使能来源选择\n0：选择非分频时钟作为 clk_ice\n1：选择分频时钟作为clk_ice + [3:3] + read-write + + + ICE_SEL + ICE时钟来源选择\n0: rc48m\n1: pll_hsi_48m\n2: pll_hse_48m + [1:0] + read-write + + + + + + CLK_PLL_SEL + * CLK_PLL_SEL * + 0x20 + 32 + 0x00000000 + + + RSA_PLL_SEL + RSA的时钟来源选择\n0x5: PLL_HSE\nOthers:PLL_HSI + [31:28] + read-write + + + MCU_PLL_SEL + MCU的时钟来源选择\n0x5: PLL_HSE\nOthers:PLL_HSI + [27:24] + read-write + + + QSPI_PLL_SEL + QSPI的时钟来源选择\n0x5: PLL_HSE\nOthers:PLL_HSI + [19:16] + read-write + + + AHB_PLL_SEL + AHB的时钟来源选择\n0x5: PLL_HSE\nOthers:PLL_HSI + [11:8] + read-write + + + PLL_SEL_LOCK + 为1后锁定AHB,QSPI,MCU,RSA的时钟\n选择,且无法解锁。 + [0:0] + read-write + + + + + + OSC32K_CALI + * OSC32K_CALI * + 0x24 + 32 + 0x00000000 + + + TIME + 校准持续时长,校准时间长度为(2^cali_ti\nme)个 OSC32K 周期 + [31:28] + read-write + + + DONE + 校准完成信号\n校准开始后,此信号会变成'0',校准完成后,此信号会变为\n'1' + [25:25] + read-only + + + START + 校准启动信号\n写'1'后,延迟1us,再写'0',上升沿触发校准开始 + [24:24] + read-write + + + CNT + time所表示的时间长度内,48M时钟计数值\n注意：校准时钟源使用的是clk_gpio1_sel选择的\n48M时钟 + [23:0] + read-only + + + + + + CLK_RSA + * CLK_RSA * + 0x28 + 32 + 0x00000000 + + + DIV_HI + 输入给RSA的时钟的高电平持续时间 = (DIV\n_HI+1)个clk + [15:12] + read-write + + + DIV_LO + 输入给RSA的时钟的低电平持续时间 = (DIV\n_LO+1)个clk + [11:8] + read-write + + + RAND_MASK + DIV_HI和DIV_LO会加上(随机数& RA\nND_MASK) + [7:4] + read-write + + + RAND_EN + RSA时钟随机使能\n0:失能RSA时钟随机\n1:使能RSA时钟随机 + [3:3] + read-write + + + SEL + RSA时钟来源选择\n0: cpu\n1: rc192m\n2: pll_out_norm, (192M)\n3: pll_out_max, (256M) + [1:0] + read-write + + + + + + + + MSYSCTRL + 1.0 + MSYSCTRL + MSYSCTRL + 0xf8520 + + 0 + 0x48 + registers + + + + + CHGR_EVENT_IRQ + * CHGR_EVENT_IRQ * + 0x0 + 32 + 0x00000000 + + + EVENT1_EN + chgr_event[11:10]事件检测使能,\n使能中断前必须先使能这一比特,power_key一直使能\n,无法更改 + [18:18] + read-write + + + EVENT0_EN + chgr_event[9:0]事件检测使能,使能\n中断前必须先使能这一比特 + [17:17] + read-write + + + IE + chgr中断使能总开关 + [16:16] + read-write + + + PWK + power key irq + [12:12] + read-write + + + VBAT_OV + ad_lpm_vbat_ov_flag + [11:11] + read-write + + + DET_AON + ad_lpm_chgr_in_det_aon + [10:10] + read-write + + + CC_OV_CV + ad_lpm_chgr_cc_ov_cv + [9:9] + read-write + + + DPPM_OV_CC + ad_lpm_chgr_dppm_ov_cc + [8:8] + read-write + + + DPPM_OV_CV + ad_lpm_chgr_dppm_ov_cv + [7:7] + read-write + + + PGOOD + ad_lpm_chgr_pgood + [6:6] + read-write + + + UVLO_OK_AON + ad_lpm_chgr_uvlo_ok_aon + [5:5] + read-write + + + RESET + ad_lpm_chgr_reset + [4:4] + read-write + + + ICHG + ad_lpm_chgr_state_ichg + [3:3] + read-write + + + IND + ad_lpm_chgr_state_ind + [2:2] + read-write + + + RCH_EN + ad_lpm_chgr_state_rch_en + [1:1] + read-write + + + VBAT_LV + ad_lpm_chgr_state_vbat_l\nv + [0:0] + read-write + + + + + + CHGR_EVENT_ICTRL + * CHGR_EVENT_ICTRL * + 0x4 + 32 + 0x00000000 + + + PWK_IT + power_key + [28:28] + read-write + + + VBAT_OV_IT + ad_lpm_vbat_ov_flag + [27:27] + read-only + + + DET_AON_IT + ad_lpm_chgr_in_det_aon + [26:26] + read-write + + + CC_OV_CV_IT + ad_lpm_chgr_cc_ov_cv + [25:25] + read-only + + + DPPM_OV_CC_IT + ad_lpm_chgr_dppm_ov_cc + [24:24] + read-write + + + DPPM_OV_CV_IT + ad_lpm_chgr_dppm_ov_cv + [23:23] + read-only + + + PGOOD_IT + ad_lpm_chgr_pgood + [22:22] + read-write + + + UVLO_OK_AON_IT + ad_lpm_chgr_uvlo_ok_aon + [21:21] + read-only + + + RESET_IT + ad_lpm_chgr_reset + [20:20] + read-write + + + ICHG_IT + ad_lpm_chgr_state_ichg + [19:19] + read-only + + + IND_IT + ad_lpm_chgr_state_ind + [18:18] + read-write + + + RCH_EN_IT + ad_lpm_chgr_state_rch_en + [17:17] + read-only + + + VBAT_LV_IT + ad_lpm_chgr_state_vbat_l\nv 中断类型\n0: 低电平 \n1: 高电平 + [16:16] + read-write + + + PWK_IE + power_key + [12:12] + read-write + + + VBAT_OV_IE + ad_lpm_vbat_ov_flag + [11:11] + read-only + + + DET_AON_IE + ad_lpm_chgr_in_det_aon + [10:10] + read-write + + + CC_OV_CV_IE + ad_lpm_chgr_cc_ov_cv + [9:9] + read-only + + + DPPM_OV_CC_IE + ad_lpm_chgr_dppm_ov_cc + [8:8] + read-write + + + DPPM_OV_CV_IE + ad_lpm_chgr_dppm_ov_cv + [7:7] + read-only + + + PGOOD_IE + ad_lpm_chgr_pgood + [6:6] + read-write + + + UVLO_OK_AON_IE + ad_lpm_chgr_uvlo_ok_aon + [5:5] + read-only + + + RESET_IE + ad_lpm_chgr_reset + [4:4] + read-write + + + ICHG_IE + ad_lpm_chgr_state_ichg + [3:3] + read-only + + + IND_IE + ad_lpm_chgr_state_ind + [2:2] + read-write + + + RCH_EN_IE + ad_lpm_chgr_state_rch_en + [1:1] + read-only + + + VBAT_LV_IE + ad_lpm_chgr_state_vbat_l\nv 中断使能\n0: 禁止\n1: 使能 + [0:0] + read-write + + + + + + RNG_CTRL + * RNG_CTRL * + 0x8 + 32 + 0x00000000 + + + + RNG_DATA0 + * RNG_DATA0 * + 0xc + 32 + 0x00000000 + + + VAL + 访问此寄存器可以获得随机数 + [31:0] + read-write + + + + + + RNG_DATA1 + * RNG_DATA1 * + 0x10 + 32 + 0x00000000 + + + VAL + 访问此寄存器可以获得随机数 + [31:0] + read-write + + + + + + RNG_DATA2 + * RNG_DATA2 * + 0x14 + 32 + 0x00000000 + + + VAL + 访问此寄存器可以获得随机数 + [31:0] + read-write + + + + + + RNG_DATA3 + * RNG_DATA3 * + 0x18 + 32 + 0x00000000 + + + VAL + 访问此寄存器可以获得随机数 + [31:0] + read-write + + + + + + rom_switch + * rom_switch * + 0x1c + 8 + 0x00000000 + + + ALARM_EN + 报警使能\n1：使能报警\n0：失能报警 + [7:7] + read-write + + + SRAM_NEXE + RAM不能跑程序,写0无效(产品阶段固定为1) + [6:6] + read-write + + + LOCK_ANA + 锁定模拟寄存器 + [5:5] + read-write + + + LOCK_OTP + lock_otp \n写1锁定寄存器 sfr_otphid_addr / sf\nr_otpuser_addr + [4:4] + read-write + + + DEBUG_EN + 使能DEBUG功能(产品阶段固定为0)\n0: 失能debug功能;\n1: 使能debug功能 + [3:3] + read-write + + + LOCK_SEC + loc_sec + [1:1] + read-write + + + ROM_SW + 写1后置位,写0无效,模块复位后,恢复到0。(产\n品阶段固定为1)\n锁定的寄存器：\nALARM_EN\nBTM_EN\ngpio_ICE\ngpio_SWDAT\nsfr_ramkey_sel\nsfr_medcon_wr\nQAES regs + [0:0] + read-write + + + + + + LPM_BUSY_CFG + * LPM_BUSY_CFG * + 0x20 + 32 + 0x00000000 + + + AON_STATE + 0: lpm/rtc register acce\nss finish\n1: lpm/rtc register access o\nngoing + [4:4] + read-only + + + LPM_STATE + 0: lpm access finish\n1: lpm access ongoing + [3:3] + read-only + + + RTC_STATE + 0: rtc access finish\n1: rtc access ongoing + [2:2] + read-only + + + LPM_EN + 0: 总线访问LPM时,不等待LPM完成直接返回\n,软件查询STATE标志确定是否访问完成\n1: 总线访问LPM时,等待LPM访问完成才释放总线,软\n件无须查询STATE标志 + [1:1] + read-write + + + RTC_EN + 0: 总线访问RTC时,不等待RTC完成直接返回\n,软件查询STATE标志确定是否访问完成\n1: 总线访问RTC时,等待LPM访问完成才释放总线,软\n件无须查询STATE标志 + [0:0] + read-write + + + + + + LPM_RDATA + * LPM_RDATA * + 0x24 + 32 + 0x00000000 + + + RDATA + lpm access read data + [31:0] + read-only + + + + + + RTC_RDATA + * RTC_RDATA * + 0x28 + 32 + 0x00000000 + + + RDATA + rtc access read data + [31:0] + read-only + + + + + + AON_RDATA + * AON_RDATA * + 0x2c + 32 + 0x00000000 + + + RDATA + lpm/rtc access read data\n, the last read value of lpm\n or rtc + [31:0] + read-only + + + + + + pwk_state + * pwk_state * + 0x40 + 32 + 0x00000000 + + + STATE + POWER_KEY按键状态 + [0:0] + read-only + + + + + + VIO_IRQ + * VIO_IRQ * + 0x44 + 32 + 0x00000000 + + + VIO1_STATUS + vio1 pgood状态\n1: vio1 电源电压正常\n0: vio1电源电压低于设定值 + [9:9] + read-only + + + VIO0_STATUS + vio pgood状态\n1: vio 电源电压正常\n0: vio电源电压低于设定值 + [8:8] + read-only + + + VIO1_IRQ + vio1 pgood irq 状态\n1: vio1 电压低于配置值,vio1_pgood由高\n变为低 + [6:6] + read-write + + + VIO0_IRQ + vio pgood irq 状态\n1: vio 电压低于配置值,vio_pgood由高变为\n低 + [5:5] + read-write + + + IRQ_STATE + vio pgood 中断总状态\n1: vio0或vio1其中之一电压低于配置值 + [4:4] + read-only + + + VIO1_EN + vio1 pgood 中断开关 + [2:2] + read-write + + + VIO0_EN + vio0 pgood 中断开关 + [1:1] + read-write + + + IE + vio 中断总开关 + [0:0] + read-write + + + + + + + + MRSTGEN + 1.0 + MRSTGEN + MRSTGEN + 0xf8574 + + 0 + 0xc + registers + + + + + RST_EN + * RST_EN * + 0x0 + 32 + 0x00000000 + + + GPIO_SEL + 复位GPIO选择\n0: ice_rst/m0_dbg_rst复位外设时,不\n复位GPIO\n1: ice_rst/m0_dbg_rst复位外设时,复\n位GPIO + [16:16] + read-write + + + TS_U + 1: 使能低温自检复位功能 + [11:11] + read-write + + + TS_O + 1: 使能高温自检复位功能 + [10:10] + read-write + + + VBUT_U + 1: 使能纽扣电池3.3v输出低压自检复位功能 + [9:9] + read-write + + + VBUT_O + 1: 使能纽扣电池3.3v输出高压自检复位功能 + [8:8] + read-write + + + DVDD_U + 1: 使能纽扣电池1.2v输出低压自检复位功能 + [7:7] + read-write + + + VSEC_U + 1: 使能锂电池3.3v输出低压自检复位功能 + [6:6] + read-write + + + VSEC_O + 1: 使能锂电池3.3v输出高压自检复位功能 + [5:5] + read-write + + + VDDSEC_U + 1: 使能安全域电源1.2v输出低压自检复位功能 + [4:4] + read-write + + + WDT + 1: 使能看门狗复位功能 + [1:1] + read-write + + + SOFT + 1: 使能软件复位功能 + [0:0] + read-write + + + + + + RST_TYPE + * RST_TYPE * + 0x4 + 32 + 0x00000000 + + + TS_U + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [11:11] + read-write + + + TS_O + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [10:10] + read-write + + + VBUT_U + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [9:9] + read-write + + + VBUT_O + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [8:8] + read-write + + + DVDD_U + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [7:7] + read-write + + + VSEC_U + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [6:6] + read-write + + + VSEC_O + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [5:5] + read-write + + + VDDSEC_U + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [4:4] + read-write + + + WDT + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [1:1] + read-write + + + SOFT + 软件可读写,若对应的复位信号触发,则硬件自动置1\n,清0需由软件完成。 + [0:0] + read-write + + + + + + RESET + * RESET * + 0x8 + 32 + 0x00000000 + + + RESET + 复位使能:\n写入 "0x55" ,触发软件复位,sw_rst\n写入 "0x50" ,触发软件复位,ic_rst\n写入 "0xAB“ ,触发sci复位,rst_sci\n写入 "0xAE“ ,触发sci2复位,rst_sci_\n2\n写入 "0xC3" ,触发7811复位,rst_7811 + [7:0] + write-only + + + + + + + + MSECURE + 1.0 + MSECURE + MSECURE + 0xf85c0 + + 0 + 0x1c + registers + + + + + CTRL + * CTRL * + 0x0 + 32 + 0x00000000 + + + THRESHOLD + sensor检测警报持续时间门限,大于此门限发出\n警报,否则不报警。\n时间门限值: (2^sensor_delay)*hclk + [11:8] + read-write + + + SEC_EN + 1: sensor检测使能。\n[7]: 低温自检,ad_ts_uth/uthb\n[6]: 高温自检,ad_ts_oth/othb\n[5]: 纽扣电池3.3v输出低压自检,ad_vbat_\nuvh/uvhb\n[4]: 纽扣电池3.3v输出高压自检,ad_vbat_\novh/ovhb\n[3]: 纽扣电池1.2v输出低压自检,ad_dvddl\npm_uvh/uvhb\n[2]: 锂电池3.3v输出低压自检,ad_vsec_u\nv/uvb\n[1]: 锂电池3.3v输出高压自检,ad_vsec_o\nv/ovb\n[0]: 安全域电源1.2v输出低压自检,ad_vdds\nec_uv/uvb + [7:0] + read-write + + + + + + result + * result * + 0x4 + 32 + 0x00000000 + + + TS_UTHB + 低温自检电路结果输出 + [24:24] + read-only + + + TS_UTH + 低温自检电路结果输出 + [23:23] + read-only + + + TS_OTHB + 高温自检电路结果输出 + [22:22] + read-only + + + TS_OTH + 高温自检电路结果输出 + [21:21] + read-only + + + VBUT_UVHB + 纽扣电池3.3v输出低压自检电路结果输出 + [20:20] + read-only + + + VBUT_UVH + 纽扣电池3.3v输出低压自检电路结果输出 + [19:19] + read-only + + + VBUT_OVHB + 纽扣电池3.3v输出高压自检电路结果输出 + [18:18] + read-only + + + VBUT_OVH + 纽扣电池3.3v输出高压自检电路结果输出 + [17:17] + read-only + + + DVDDLPM_UVHB + 纽扣电池1.2v输出低压自检电路结果输出 + [16:16] + read-only + + + DVDDLPM_UVH + 纽扣电池1.2v输出低压自检电路结果输出 + [15:15] + read-only + + + VSEC_UHVB + 锂电池3.3v输出低压自检电路结果输出 + [14:14] + read-only + + + VSEC_UVH + 锂电池3.3v输出低压自检电路结果输出 + [13:13] + read-only + + + VSEC_OVHB + 锂电池3.3v输出高压自检电路结果输出 + [12:12] + read-only + + + VSEC_OVH + 锂电池3.3v输出高压自检电路结果输出 + [11:11] + read-only + + + VDDSEC_UHVB + 安全域电源1.2v输出低压自检电路结果输出 + [10:10] + read-only + + + VDDSEC_UVH + 安全域电源1.2v输出低压自检电路结果输出 + [9:9] + read-only + + + STATE + 1: 对应检测项报警。\n[8]: 低温自检警报\n[7]: 高温自检警报\n[6]: 纽扣电池3.3v输出低压自检警报\n[5]: 纽扣电池3.3v输出高压自检警报\n[4]: 纽扣电池1.2v输出低压自检警报\n[3]: 锂电池3.3v输出低压自检警报\n[2]: 锂电池3.3v输出高压自检警报\n[1]: 安全域电源1.2v输出低压自检警报 + [8:1] + read-only + + + + + + RTC_IE + * RTC_IE * + 0x10 + 32 + 0x00000000 + + + LSE_IRQ + rtc_lse_irq flag, 仅指中断标志\n,清除需要使用RTC_LSE寄存器 + [17:17] + read-only + + + LSI_IRQ + rtc_lsi_irq flag, 仅指中断标志\n,清除需要使用RTC_LSI寄存器 + [16:16] + read-only + + + LSE_IE + 1: enable rtc_lse irq + [1:1] + read-write + + + LSI_IE + 1: enable rtc_lsi irq + [0:0] + read-write + + + + + + IE + * IE * + 0x14 + 32 + 0x00000000 + + + LPM_IRQ + lpm security irq status + [16:16] + read-only + + + CORE_IE + CORE SEC中断开关\n1: enable core security even\nt interrupt + [1:1] + read-write + + + IE + SEC中断总开关\nboth lpm security events and\n core security events will t\nrigger secure_irq + [0:0] + read-write + + + + + + SENSOR_CTRL + * SENSOR_CTRL * + 0x18 + 32 + 0x00000000 + + + VDDSEC_SEL + threshold voltage select\nion(sim tt 50deg, voltage fr\nom low to high): \n0000: 867mV\n0001: 887mV\n0010: 907mV\n0011: 927mV\n0100: 947mV\n0101: 967mV\n0110: 987mV\n0111: 1005mV\n1000: 1025mV\n1001: 1045mV\n1010: 1065mV\n1011: 1085mV\n1100: 1105mV\n1101: 1125mV\n1110: 1145mV\n1111: 1165mV + [27:24] + read-write + + + VSEC_H_SEL + threshold voltage select\nion(sim tt 50deg, voltage fr\nom low to high):\n0000: 3.369\n0001: 3.419\n0010: 3.469\n0011: 3.522\n0100: 3.576\n0101: 3.631\n0110: 3.688\n0111: 3.748\n1000: 3.809\n1001: 3.872\n1010: 3.937\n1011: 4.005\n1100: 4.074\n1101: 4.147\n1110: 4.222\n1111: 4.299 + [23:20] + read-write + + + VSEC_L_SEL + threshold voltage select\nion(sim tt 50deg, voltage fr\nom low to high):\n0000: 1.938\n0001: 1.971\n0010: 2.005\n0011: 2.040\n0100: 2.076\n0101: 2.113\n0110: 2.152\n0111: 2.193\n1000: 2.235\n1001: 2.278\n1010: 2.324\n1011: 2.371\n1100: 2.420\n1101: 2.471\n1110: 2.525\n1111: 2.580 + [19:16] + read-write + + + VDDSEC_EN + 0x5, disable sensor, els\ne enable sensor + [7:4] + read-write + + + VSEC_EN + 0x5, disable sensor, els\ne enable sensor + [3:0] + read-write + + + + + + + + MGPIO + 1.0 + 8 GPIO + MGPIO + 0xf8700 + + 0 + 0xe1 + registers + + + + + 80 + 1 + CTRL[%s] + 0x00 + 8 + + + + FUNC + GPIO function + [5:0] + read-write + + + + MODE + GPIO mode + [7:6] + read-write + + + + + + 5 + 2 + INTR[%s] + 0x80 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + 5 + 2 + IRQ_LEVEL[%s] + 0x90 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + 5 + 2 + IRQ_RISE[%s] + 0xa0 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + 5 + 2 + IRQ_FALL[%s] + 0xB0 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + 5 + 2 + IRQ_STATUS[%s] + 0xc0 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + IRQ_NUM + GPIO_IRQ_INDEX register + 0xcf + 8 + 0x00 + + + + INDEX + GPIO_IRQ_INDEX + [7:0] + read-only + + + + + + 5 + 2 + IN_LEVEL[%s] + 0xd0 + 16 + + + PIN0 + [0:0] + read-write + + + PIN1 + [1:1] + read-write + + + PIN2 + [2:2] + read-write + + + PIN3 + [3:3] + read-write + + + PIN4 + [4:4] + read-write + + + PIN5 + [5:5] + read-write + + + PIN6 + [6:6] + read-write + + + PIN7 + [7:7] + read-write + + + PIN8 + [8:8] + read-write + + + PIN9 + [9:9] + read-write + + + PIN10 + [10:10] + read-write + + + PIN11 + [11:11] + read-write + + + PIN12 + [12:12] + read-write + + + PIN13 + [13:13] + read-write + + + PIN14 + [14:14] + read-write + + + PIN15 + [15:15] + read-write + + + + + + OD_CTRL + GPIO_OD register + 0xe0 + 8 + 0x00 + + + + PA10 + GPIO_OD + [0:0] + read-write + + + PB6 + GPIO_OD + [1:1] + read-write + + + PC1 + GPIO_OD + [2:2] + read-write + + + PC8 + GPIO_OD + [3:3] + read-write + + + PD0 + GPIO_OD + [4:4] + read-write + + + PD12 + GPIO_OD + [5:5] + read-write + + + PE12 + GPIO_OD + [6:6] + read-write + + + PE6 + GPIO_OD + [7:7] + read-write + + + + + + + + MDMA + 1.0 + 32 DMA + 0xf8800 + + 0 + 0x1c + registers + + + + + SRC_ADDR + DMA_SRC_ADDR register + 0x00 + 32 + 0x00000000 + + + + VAL + source address + [31:0] + write-only + + + + + + DEST_ADDR + DMA_DEST_ADDR register + 0x04 + 32 + 0x00000000 + + + + VAL + dest address + [31:0] + write-only + + + + + + LEN_LOW + DMA_LEN_LOW register + 0x08 + 32 + 0x00000000 + + + + RX_LEN_L + buff len + [15:0] + read-write + + + + TX_LEN_L + buff len + [31:16] + read-write + + + + + + CTRL + DMA control register + 0x0c + 32 + 0x00000000 + + + + LOOPBACK + loop back mode + [0:0] + read-write + + + + INT_MODE + enable interrupt + [1:1] + read-write + + + + RADDR_LOCK + lock read addr + [2:2] + read-write + + + + WADDR_LOCK + lock write addr + [3:3] + read-write + + + + RX_LEN_H + rx len + [11:8] + read-write + + + + TX_LEN_H + tx len + [15:12] + read-write + + + + PP_BUF + flag slave/dcmi + [16:16] + read-write + + + + RESET + init write 0,write 1 + [29:29] + read-write + + + + CLEAR_INT + clear DMA int + [30:30] + read-write + + + + START + enable DMA + [31:31] + read-write + + + + + + STATUS + DMA status + 0x10 + 32 + 0x00000000 + + + + DONE + DMA status + [0:0] + read-only + + + + + + RPTR + Sends the current address of the BUF read pointer + 0x14 + 32 + 0x00000000 + + + + VAL + Sends the current address of the BUF read pointer + [31:0] + read-only + + + + + + WPRT + received the current address of the BUF read pointer + 0x18 + 32 + 0x00000000 + + + + VAL + receiced the current address of the BUF read pointer + [31:0] + read-only + + + + + + + + MDMA_QSPI + 1.0 + QSPI + MDMA + 0xf8800 + + + + MDMA_SPI0 + 0xf8900 + + + + MDMA_SPI1 + 0xf8a00 + + + + MDMA_UART0 + 0xf8b00 + + + + MDMA_UART1 + 0xf8c00 + + + + MDMA_UART2 + 0xf8d00 + + + + MDMA_UART3 + 0xf8e00 + + + + MDMA_7811 + 0xf8f00 + + + + MDMA_MEMCP + 0xf9000 + + + + MDMA_IIC0 + 0xf9100 + + + + MDMA_IIC1 + 0xf9200 + + + + MSPI + 1.0 + MSPI + MSPI + 0xf891c + + 0 + 0x4 + registers + + + + + CTRL + * CTRL * + 0x0 + 32 + 0x00000000 + + + WAIT_DMA + 0: ignore dma status\n1: 等待dma 完全写入ram ,再开始接收下1 by\nte + [19:19] + read-write + + + FIRST_BIT + 1: 先发送lsb\n0:先发送MSB + [18:18] + read-write + + + RX_PHASE + 0: normal receive sample\n point\n1: receive sample point dela\ny one clock of ahb_bus + [17:17] + read-write + + + SCK_DIR + ncs 与 sck 输入输出选择\n0: 输出(master mode)\n1: 输入(slave mode) + [16:16] + read-write + + + AUTO_START + 1: spi dma可以被dcmi多行中断自动启\n动 + [15:15] + read-write + + + RW_DELAY + 反向间隔（value*16个clock） + [14:8] + read-write + + + DCMI_EN + 0: 8-bit spi mode\n1: 8-bit byte y extended to \n16-bit rgb565 + [7:7] + read-write + + + RESET + spi_reset + [6:6] + read-write + + + CPOL + CPOL （空闲状态时钟电平） 1: High \n 0: Low + [5:5] + read-write + + + CPHA + CPHA 1: 偶数边沿采样 0: 奇数边沿\n采样 + [4:4] + read-write + + + MODE + 0: Master Mode 1：Slave \nMode + [3:3] + read-write + + + CLK_DIV + SPICLK 分频系数 (1<<CTRL[2:0\n]) + [2:0] + read-write + + + + + + + + MSPI0 + 0xf891c + MSPI + + + + MSPI1 + 0xf8a1c + + + + MUART + 1.0 + MUART + MUART + 0xf8b1c + + 0 + 0x10 + registers + + + + + CTRL + * CTRL * + 0x0 + 8 + 0x00000000 + + + RESET_BAUD + UART重置波特率位\n0：无操作\n1：必须先配置好波特率，置位1后 波特率才能生效。\n + [7:7] + read-write + + + HDX_EN + UART全双工/双工模式控制位\n0：全双工\n1：半双工\n + [6:6] + read-write + + + SMART_CARD + UART 智能卡模式控制位\n0：关闭智能卡\n1：开启智能卡模式 + [5:5] + read-write + + + FLOW_CTRL + UART 模块流控控制位\n0：无流控模式\n1：有流控模式\n + [4:4] + read-write + + + STOP_BITS + UART 停止位\n0：1bit停止位\n1：2bit停止位\n + [3:3] + read-write + + + DATA_BITS + UART 校验使能位\n0：无校验位,仅发送8bit数据\n1：有校验位,发送9bit数据。\n + [2:2] + read-write + + + PARITY + UART 校验位\n0：Parity_Even(偶校验)\n1：Parity_Odd(奇校验)\n + [1:1] + read-write + + + RX_EN + UART 使能位\n0：失能Rx功能\n1：使能Rx功能\n + [0:0] + read-write + + + + + + RX_INT_LEN + * RX_INT_LEN * + 0x1 + 8 + 0x00000000 + + + VAL + 控制串口接收中断长度，为0不触发中断 + [7:0] + read-write + + + + + + BAUD + * BAUD * + 0x2 + 16 + 0x00000000 + + + TX_INT_EN + 发送中断使能位 0：失能tx中断 1：使能tx\n中断 + [15:15] + read-write + + + BAUD_RATE + 配置波特率 (波特率=时钟/寄存器的值) + [14:0] + read-write + + + + + + TIMEOUT_INT + * TIMEOUT_INT * + 0x4 + 16 + 0x00000000 + + + VAL + 0：不启用。当收到数据后开始计时，超时未收到下一\n个字节则触发中断，接收超时中断时间值（48*value）\n。 + [15:0] + read-write + + + + + + RX_DATA + * RX_DATA * + 0x8 + 8 + 0x00000000 + + + VAL + 读取UART的数据 + [7:0] + read-only + + + + + + STATUS + * STATUS * + 0xc + 32 + 0x00000000 + + + RX_ITEMS_L + 当前RX BUF中的数据个数低16位 + [31:16] + read-write + + + RX_ITEMS_H + 当前RX BUF中的数据个数高4位 + [15:12] + read-write + + + RX_NEAR_FULL + 0:rx buf 数据未接近满 1:rx bu\nf 数据接近满 + [2:2] + read-write + + + RX_FULL + 0:rx buf 未满 1:rx buf 满 + [1:1] + read-write + + + RX_EMPTY + 0:rx buf 非空 1:rx buf 为空 + [0:0] + read-write + + + + + + + + MUART0 + 0xf8b1c + MUART + + + + MUART1 + 0xf8c1c + + + + MUART2 + 0xf8d1c + + + + MUART3 + 0xf8e1c + + + + + MIIC + 1.0 + MIIC + MIIC + 0xf911c + + 0 + 0x8 + registers + + + + + CTRL1 + * CTRL1 * + 0x0 + 32 + 0x00000000 + + + SCLL + scll scl低电平时间 + [7:0] + read-write + + + SCLH + sclh scl高电平时间 + [15:8] + read-write + + + STSU + stsu 起始位建立时间 + [23:16] + read-write + + + STHD + sthd 起始位保持时间 + [31:24] + read-write + + + + + + CTRL2 + * CTRL2 * + 0x4 + 32 + 0x00000000 + + + SOSU + sosu 停止位建立时间 + [7:0] + read-write + + + DTSU + dtsu 数据位的建立时间 + [15:8] + read-write + + + DTHD + dthd 数据位的保持时间 + [23:16] + read-write + + + RESTART + restart 注意！！！这一bit是控\n制I2C协议中restart时序的,而不是复位I2C寄存\n器；在写从设备的时候置0,在读从设备的时候要置1 + [24:24] + read-write + + + + + + + + MI2C0 + 0xf911c + MIIC + + + + MI2C1 + 0xf921c + + + + MLPM + 1.0 + MLPM + MLPM + 0xfa800 + + 0 + 0x328 + registers + + + + + LDO_POR + analog register + 0x00 + 32 + 0xF004D040 + + + + RG_LPM_LDO_LPM_VSEL + digital aon ldo vout sel + [4:0] + read-write + + + + RG_LPM_LDO_LPM_0P33VDD_BYPB + LPM 0.33vdd ldo bypass to gnd enable control, low active + [5:5] + read-write + + + + RG_LPM_HVLDO_OCP_EN + HVLDO over current protection enable + [6:6] + read-write + + + + RG_LPM_POR_DEGLITCH_OPT + Vcoin POR deglitch optimization control, high active + [7:7] + read-write + + + + RG_LPM_VSEC_POR_DEGLITCH_OPT + Vlion POR deglitch optimization control, high active + [8:8] + read-write + + + + RG_LPM_LDO_SEC_VTRIM + Security main LDO output voltage control + [15:12] + read-write + + + + RG_LPM_OSC192M_VC + RC OSC 192MHz frequency control + [24:16] + read-write + + + + RG_LPM_LDO_SEC_EN + Security main LDO enable + [28:28] + read-write + + + + RG_LPM_LDO_OSC192M_EN + RC OSC 192MHz LDO enable + [29:29] + read-write + + + + RG_LPM_OSC192M_RSTN + RC OSC 192MHz resetn + [30:30] + read-write + + + + RG_LPM_OSC192M_EN + RC OSC 192MHz enable + [31:31] + read-write + + + + + + OSC_XTAL + analog register + 0x04 + 32 + 0x2F0 + + + + OSC_XTAL_REF_MODE_EN + mode cfg + [0:0] + read-write + + + + OSC_XTAL_IB_OBUF + xtal output buffer bias current ctrl + [2:1] + read-write + + + + OSC_XTAL_IB_CTRL + xtal core bias current ctrl + [7:4] + read-write + + + + OSC_XTAL_CTRIM + xtal cap bank selection + [12:8] + read-write + + + + OSC_XTAL_EN_REG + xtal regulator enable, high active + [13:13] + read-write + + + + OSC_XTAL_EN + xtal core enable, high active + [14:14] + read-write + + + + OSC_XTAL_DIV2_EN + xtal to clkpll ref freq div2 enable, high active + [15:15] + read-write + + + + + + XO32K + XO32K control + 0x10 + 32 + 0x58945 + + + + RG_LPM_XO32K_RG_XTAL_CGM_ISEL + xo32k constant-gm current selection + [1:0] + read-write + + + + RG_LPM_XO32K_RDC_SEL + xo32k gm gate-drain dc res type selection + [4:2] + read-write + + + + RG_LPM_XO32K_ITUNE + xo32k gm current selection + [9:5] + read-write + + + + RG_LPM_XO32K_GMP_BYPASS + xo32k gm pmos bypass, high active. when xo32k mode + [10:10] + read-write + + + + RG_LPM_XO32K_DISCONNECT + disconnect xo32k analog circuit from gpio pad, high active + [11:11] + read-write + + + + RG_LPM_XO32K_COMP_VREF_TUNE + xo32k comp voltage selection when vrefn from vgen, control bits higher + [13:12] + read-write + + + + RG_LPM_XO32K_COMP_VN_SEL + xo32k hysteresis comp negative input signal selection + [14:14] + read-write + + + + RG_LPM_XO32K_COMP_VGEN_EN + xo32k comp vrefn voltage gen circuit enable, high active + [15:15] + read-write + + + + RG_LPM_XO32K_COMP_TH_SEL + xo32k hysteresis comp threshold voltage selection, control bits higher, vth higher + [17:16] + read-write + + + + RG_LPM_XO32K_COMP_ISEL + xo32k hysteresis comp current selection + [19:18] + read-write + + + + RG_LPM_XO32K_COMP_IB_LARGE + xo32k hysteresis comp and current-starved invter bais current enlarge control, high active + [20:20] + read-write + + + + DA_LPM_XO32K_EN + xo32k enable, high active + [21:21] + read-write + + + + + + CHGR_CTRL + CHGR control register + 0x20 + 32 + 0x00000000 + + + + RG_LPM_CHGR_TERMC + Charging termination current control + [1:0] + read-write + + + + RG_LPM_CHGR_TCC + analog register + [3:2] + read-write + + + + RG_LPM_CHGR_SHUTDOWN_SW + Force off charger pass transistor + [4:4] + read-write + + + + RG_LPM_CHGR_SHUTDOWN_CORE + Force off charger CC/CV loop + [5:5] + read-write + + + + RG_LPM_CHGR_SHUTDOWN_BIAS + Force off charger bias + [6:6] + read-write + + + + RG_LPM_CHGR_RCHC + Battery voltage threshold adjustments for re-charging in 53mV/steps + [11:8] + read-write + + + + RG_LPM_CHGR_INSC_ENB + Charger input sink current enable. Used to wake up charger case and to be turned off upon the end of charging process + [12:12] + read-write + + + + RG_LPM_CHGR_ICHG_SET + Charging current control in CC phase + [19:16] + read-write + + + + RG_LPM_CHGR_FORCE_CV + Charger CV mode force enable + [20:20] + read-write + + + + RG_LPM_CHGR_FORCE_CORE_ON + Force on charger CC/CV loop when charger is in standby mode + [21:21] + read-write + + + + RG_LPM_CHGR_FORCE_CC + Charger CC mode force enable + [22:22] + read-write + + + + RG_LPM_CHGR_CVC + analog register + [27:24] + read-write + + + + RG_LPM_CHGR_RLIMIT_ENB + analog register + [28:28] + read-write + + + + + + GPIO_WKEN_W0 + * GPIO_WKEN_W0 * + 0x200 + 32 + 0x00000000 + + + LOW + gpio[31:0] 深度睡眠唤醒使能 + [31:0] + read-write + + + + + + GPIO_WKEN_W1 + * GPIO_WKEN_W1 * + 0x204 + 32 + 0x00000000 + + + MID + gpio[63:32] 深度睡眠唤醒使能 + [31:0] + read-write + + + + + + GPIO_WKEN_W2 + * GPIO_WKEN_W2 * + 0x208 + 32 + 0x00000000 + + + HIGH + gpio[79:64] 深度睡眠唤醒使能 + [15:0] + read-write + + + + + + GPIO_WK_LEVEL + * GPIO_WK_LEVEL * + 0x210 + 32 + 0x00000000 + + + LEVEL + GPIO唤醒电平设置\n0: GPIO高电平唤醒深度睡眠\n1: GPIO低电平唤醒深度睡眠 + [0:0] + read-write + + + + + + GPIO_LATCH + * GPIO_LATCH * + 0x214 + 32 + 0x00000000 + + + LATCH + nan + [0:0] + read-write + + + + + + DEEP_SLEEP + * DEEP_SLEEP * + 0x220 + 32 + 0x00000000 + + + EN + 写0x5a会进入深度睡眠 + [7:0] + write-only + + + + + + WAKEUP_CTRL + * WAKEUP_CTRL * + 0x224 + 32 + 0x00000000 + + + RTC_LSE + 1: 使能LSE定时唤醒深度睡眠 + [2:2] + read-write + + + RTC_LSI + 1:使能LSI定时唤醒深度睡眠 + [1:1] + read-write + + + SEC_EN + 1: 使能安全事件唤醒深度睡眠 + [0:0] + read-write + + + + + + WAIT_LDO_CTRL + * WAIT_LDO_CTRL * + 0x228 + 32 + 0x00000000 + + + CNT + core_ldo打开后,等待cnt个osc32k\n周期后,开始启动系统,首次上电默认值为32ms\ndeep_sleep时,可通过合理设置此延迟值,减少系统\n退出deep_sleep时间 + [9:0] + read-write + + + + + + WKUP_HVLDO_CTRL + * WKUP_HVLDO_CTRL * + 0x22c + 32 + 0x00000000 + + + PWK_OFF_DISABLE + power key off disable\n0xaa: 禁用power key 关闭系统功能\nothers: 使能power 关闭系统功能 + [31:24] + read-write + + + CHGR_IN_TURN_ON + chgr_in事件打开系统使能\n0xaa: 关闭chgr_in事件打开系统功能\nothers: 打开chgr_in事件打开系统功能 + [23:16] + read-write + + + FIRST + 1: 深度睡眠唤醒时,先打开HVLDO,再进行上\n电过程 + [0:0] + read-write + + + + + + RTC_LSE_CTRL + * RTC_LSE_CTRL * + 0x230 + 32 + 0x00000000 + + + SEL + RTC_LSE的时钟选择\n0: 用LSI作为RTC_LSE的时钟\n1:用LSEZ作为RTC_LSE的时钟 + [1:1] + read-write + + + EN + 使能 RTC LSE的时钟 + [0:0] + read-write + + + + + + CHGR_EVENT_EN + * CHGR_EVENT_EN * + 0x240 + 32 + 0x00000000 + + + EVENT1 + 1: 使能CHGR_WKUP[11:10]充电标\n志位检测和唤醒,使能后需要延时1ms再配置CHGR_WK\nUP_HI_EN[11:10]/CHGR_WKUP_LO\n_EN[11:10] + [1:1] + read-write + + + EVENT0 + 1: 使能CHGR_WKUP[9:0]充电标志位\n检测和唤醒,使能后需要延时1ms再配置CHGR_WKUP\n_HI_EN[9:0]/CHGR_WKUP_LO_EN[\n9:0] + [0:0] + read-write + + + + + + CHGR_WKUP_HI_EN + * CHGR_WKUP_HI_EN * + 0x244 + 32 + 0x00000000 + + + PWK + power_key + [12:12] + read-write + + + VBAT_OV + ad_lpm_vbat_ov_flag + [11:11] + read-write + + + DET_AON + ad_lpm_chgr_in_det_aon + [10:10] + read-write + + + CC_OV_CV + ad_lpm_chgr_cc_ov_cv + [9:9] + read-write + + + DPPM_OV_CC + ad_lpm_chgr_dppm_ov_cc + [8:8] + read-write + + + DPPM_OV_CV + ad_lpm_chgr_dppm_ov_cv + [7:7] + read-write + + + PGOOD + ad_lpm_chgr_pgood + [6:6] + read-write + + + UVLO_OK_AON + ad_lpm_chgr_uvlo_ok_aon + [5:5] + read-write + + + RESET + ad_lpm_chgr_reset + [4:4] + read-write + + + ICHG + ad_lpm_chgr_state_ichg + [3:3] + read-write + + + IND + ad_lpm_chgr_state_ind + [2:2] + read-write + + + RCH_EN + ad_lpm_chgr_state_rch_en + [1:1] + read-write + + + VBAT_LV + ad_lpm_chgr_state_vbat_l\nv + [0:0] + read-write + + + + + + CHGR_WKUP_LO_EN + * CHGR_WKUP_LO_EN * + 0x248 + 32 + 0x00000000 + + + PWK + power_key + [12:12] + read-write + + + VBAT_OV + ad_lpm_vbat_ov_flag + [11:11] + read-write + + + DET_AON + ad_lpm_chgr_in_det_aon + [10:10] + read-write + + + CC_OV_CV + ad_lpm_chgr_cc_ov_cv + [9:9] + read-write + + + DPPM_OV_CC + ad_lpm_chgr_dppm_ov_cc + [8:8] + read-write + + + DPPM_OV_CV + ad_lpm_chgr_dppm_ov_cv + [7:7] + read-write + + + PGOOD + ad_lpm_chgr_pgood + [6:6] + read-write + + + UVLO_OK_AON + ad_lpm_chgr_uvlo_ok_aon + [5:5] + read-write + + + RESET + ad_lpm_chgr_reset + [4:4] + read-write + + + ICHG + ad_lpm_chgr_state_ichg + [3:3] + read-write + + + IND + ad_lpm_chgr_state_ind + [2:2] + read-write + + + RCH_EN + ad_lpm_chgr_state_rch_en + [1:1] + read-write + + + VBAT_LV + ad_lpm_chgr_state_vbat_l\nv + [0:0] + read-write + + + + + + PWK_CTRL + * PWK_CTRL * + 0x260 + 32 + 0x00000000 + + + LDO_EN + 写1 打开HVLDO + [17:17] + write-only + + + LDO_OFF + 写1 关闭HVLDO + [16:16] + write-only + + + OFF_TIME + power_key按下多长时间关闭系统配置\n00: 4s\n01: 5s\n10: 6s\n11: 7s + [5:4] + read-write + + + ON_TIME + power key 按下多长时间唤醒系统配置\n00: 128ms\n01: 384ms\n10: 640ms\n11: 896ms + [1:0] + read-write + + + + + + LDO_EXEN_CTRL + * LDO_EXEN_CTRL * + 0x264 + 32 + 0x00000000 + + + GPIO + 0xaa: gpio 模式,pu/pd/ie/o\n/oen受寄存器控制\nothers: ldo_exen模式,pu/pd/ie始\n终为0,oen为0允许输出,o输出hvldo_en信号 + [31:24] + read-write + + + IN + ldo_exen input value + [9:9] + read-only + + + IE + 0: disable input\n1: enable input + [8:8] + read-write + + + PU + 1: enable pull-up + [5:5] + read-write + + + PD + 1: enable pull-down + [4:4] + read-write + + + OUT + nan + [2:2] + read-write + + + OEN + 0: enable output\n1: disable output + [0:0] + read-write + + + + + + CLK_CTRL + * CLK_CTRL * + 0x280 + 32 + 0x00000000 + + + EN + 1: 使能寄存器时钟 + [0:0] + read-write + + + + + + ACCESS_CODE + * ACCESS_CODE * + 0x2a0 + 32 + 0x00000000 + + + ACCESS_CODE + 按照顺序写入"0x55->0xaa->0x17"\n 来设置或者清除 "access_en" + [7:0] + read-write + + + + + + ACCESS_EN + * ACCESS_EN * + 0x2a4 + 32 + 0x00000000 + + + ACCESS_EN + 这1bit 只能在ACCESS_CODE设置后写\n入\n1: 打开LPM寄存器写入权限\n0: 关闭LPM寄存器写入权限\n注：每次退出深度睡眠后,access_code和acce\nss_en会自动清0,必须重新使能 + [0:0] + read-write + + + + + + BAKEUP_REG0 + * BAKEUP_REG0 * + 0x300 + 32 + 0x00000000 + + + REG + 复位值是0x5555_5555 + [31:0] + read-write + + + + + + BAKEUP_REG1 + * BAKEUP_REG1 * + 0x304 + 32 + 0x00000000 + + + REG + 复位值是0xaaaa_aaaa + [31:0] + read-write + + + + + + BAKEUP_REG2 + * BAKEUP_REG2 * + 0x320 + 32 + 0x00000000 + + + REG + 无复位功能寄存器 + [31:0] + read-write + + + + + + BAKEUP_REG3 + * BAKEUP_REG3 * + 0x324 + 32 + 0x00000000 + + + REG + 无复位功能寄存器 + [31:0] + read-write + + + + + + + + MBPK + 1.0 + MBPK + MBPK + 0xfac00 + + 0 + 0x94 + registers + + + + + 32 + 4 + KEY[%s] + key + 0x0 + 32 + 0x00000000 + + + + RST + * RST * + 0x80 + 32 + 0x00000000 + + + RESET + 写1会复位KEY,BPK的配置,SENSOR的配\n置。 + [0:0] + write-only + + + + + + CLR + * CLR * + 0x84 + 32 + 0x00000000 + + + CLR + 每一bit控制256-bit 的KEY清除 , \n写“1”将清除相应的区域 + [3:0] + write-only + + + + + + LR + * LR * + 0x88 + 32 + 0x00000000 + + + LOCK_READ + 每一bit控制256-bit 的KEY的锁定 ,\n 写“1”将锁定读取相应的区域 + [3:0] + read-write + + + + + + LW + * LW * + 0x8c + 32 + 0x00000000 + + + LOCK_WRITE + 每一bit控制256-bit 的KEY的锁定 ,\n 写“1”将锁定写入相应的区域 + [3:0] + read-write + + + + + + LOCK + * LOCK * + 0x90 + 32 + 0x00000000 + + + RESET_LOCK + 1:锁定RESET寄存器 + [4:4] + read-write + + + CLR_LOCK + 1:锁定CLR寄存器 + [3:3] + read-write + + + LKR_LOCK + 1:锁定LOCK_READ寄存器 + [2:2] + read-write + + + LKW_LOCK + 1:锁定LOCK_WRITE寄存器 + [1:1] + read-write + + + LOCK_SELF + 1:锁定LOCK寄存器本身(通常用于配置好其他的\n锁定过后,且无法解锁) + [0:0] + read-write + + + + + + + + MSEC + 1.0 + MSEC + MSEC + 0xfae00 + + 0 + 0xc8 + registers + + + + + LC + * LC * + 0x0 + 32 + 0x00000000 + + + VAL + 仅支持比特置1操作,不支持清0回退\n0x01: 上电非安全状态\n其他值：用户自定义 + [7:0] + read-write + + + + + + LOCK + * LOCK * + 0x4 + 32 + 0x00000000 + + + SHIELD + 1:锁定SHIELD_EN/SHIELD_CTR\nL寄存器 + [4:4] + read-write + + + SENSOR + 1:锁定SENSOR_EN/SENSOR_CTR\nL/SENSOR_THRES寄存器 + [3:3] + read-write + + + TAMPER + 1:锁定TAMP_EN/TAMP_CTRL/TA\nMP_STA_CTRL/TAMP_DYN_CTRL寄存器 + [2:2] + read-write + + + ACTION + 1:锁定 ALERT_ACTION寄存器 + [1:1] + read-write + + + LOCK_SELF + 1:锁定LOCK寄存器本身(通常用于配置好其他的\n锁定过后,且无法解锁) + [0:0] + read-write + + + + + + ALERT_FILT + * ALERT_FILT * + 0x8 + 32 + 0x00000000 + + + CNT_CLR + 写1 清除CNT寄存器的是值 + [16:16] + write-only + + + THOLD + 当THOLD的配置大于等于CNT的值的时候会触发\n ALERT_ACTION + [11:8] + read-write + + + CNT + 当TAMPER/SENSOR/SHIELD的报警\n发生时cnt寄存器会加1 + [3:0] + read-only + + + + + + ALERT_ACTION + * ALERT_ACTION * + 0xc + 32 + 0x00000000 + + + RESET_SYSTEM + 当ALERT_ACTION发生时,除了该寄存器配\n置成0x5能失能复位系统动作,其他配置都会导致复位系统 + [19:16] + read-write + + + CLEAR_KEY + 当ALERT_ACTION发生时,除了该寄存器配\n置成0x5能失能清除秘钥动作,其他配置都会导致清除秘钥 + [3:0] + read-write + + + + + + SOFT_ATTACK_EN + * SOFT_ATTACK_EN * + 0x20 + 32 + 0x00000000 + + + EN + 置‘1’后无法清0\n1: 使能soft_attack功能 + [0:0] + read-write + + + + + + SOFT_ATTACK_LOCK + * SOFT_ATTACK_LOCK * + 0x24 + 32 + 0x00000000 + + + LOCK + 软件攻击锁定\n0: 解锁 soft attack\n1: 锁定 soft attack\n注：写此寄存器可置1和清0,写其他任意寄存器,此寄存器会\n置1 + [0:0] + read-write + + + + + + SOFT_ATTACK + * SOFT_ATTACK * + 0x28 + 32 + 0x00000000 + + + TYPE + soft_attack位检测到1时,锁存写数据的\n比特7到4 + [7:4] + read-write + + + TRIGGER + 写1触发软件攻击\n注：必须先写soft_attack_lock为0,再写此\n寄存器,中间不能插入其他寄存器读写操作 + [0:0] + write-only + + + + + + IE + * IE * + 0x30 + 32 + 0x00000000 + + + KEY_CLEAR + 1:使能清除秘钥触发中断 + [4:4] + read-write + + + SOFT_ATTACK + 1:使能soft attact触发中断 + [3:3] + read-write + + + SHIELD + 1:使能SHIELD触发中断 + [2:2] + read-write + + + SENSOR + 1:使能SENSOR触发中断 + [1:1] + read-write + + + TAMPER + 1:使能TAMPER触发中断 + [0:0] + read-write + + + + + + IRQ + * IRQ * + 0x34 + 32 + 0x00000000 + + + KEY_CLEAR + 写‘1’清除KEY_CLEAR中断状态 + [4:4] + read-write + + + SOFT_ATTACK + 写‘1’清除SOFT_ATTACK中断状态 + [3:3] + read-write + + + SHIELD + 写‘1’清除SHIELD中断状态 + [2:2] + read-write + + + SENSOR + 写‘1’清除SENSOR中断状态 + [1:1] + read-write + + + TAMPER + 写‘1’清除TAMPER中断状态 + [0:0] + read-write + + + + + + STATUS + * STATUS * + 0x38 + 32 + 0x00000000 + + + KEY_CLEAR + 清除秘钥中断状态 + [18:18] + read-only + + + SOFT_ATTACK + 软件攻击中断状态 + [17:17] + read-only + + + SHIELD_ALARM + SHIELD中断状态 + [16:16] + read-only + + + SENSOR_ALARM + SENSOR中断状态 + [8:8] + read-only + + + TAMP_ALARM + TAMPER中断状态,每1BIT代表一个TAMP\nER触发中断 + [7:0] + read-only + + + + + + TAMP_EN + * TAMP_EN * + 0x40 + 32 + 0x00000000 + + + TAMP_7 + TAMPER7 使能\n0x5:使能\nOthers:使能 + [31:28] + read-write + + + TAMP_6 + TAMPER6 使能\n0x5:使能\nOthers:使能 + [27:24] + read-write + + + TAMP_5 + TAMPER5 使能\n0x5:使能\nOthers:使能 + [23:20] + read-write + + + TAMP_4 + TAMPER4 使能\n0x5:使能\nOthers:使能 + [19:16] + read-write + + + TAMP_3 + TAMPER3 使能\n0x5:使能\nOthers:使能 + [15:12] + read-write + + + TAMP_2 + TAMPER2 使能\n0x5:使能\nOthers:使能 + [11:8] + read-write + + + TAMP_1 + TAMPER1 使能\n0x5:使能\nOthers:使能 + [7:4] + read-write + + + TAMP_0 + TAMPER0 使能\n0x5:使能\nOthers:使能 + [3:0] + read-write + + + + + + TAMP_CTRL + * TAMP_CTRL * + 0x44 + 32 + 0x00000000 + + + PU_EN + TAMPER IO上拉使能(每1BIT对应控制一\n个 TAMPER IO)\n动态模式:需要把输入脚上拉或下拉\n静态模式:把对应IO上拉,PULL_AUTO为1时,自动\n在静态检测期间使能上拉,其他时间禁止上拉,以减少功耗\n注：Tamper IO 上电默认开启上拉,每个IO上拉或\n下拉只能选择一个 + [31:24] + read-write + + + PD_EN + TAMPER IO下拉使能(每1BIT对应控制一\n个 TAMPER IO)\n动态模式:需要把输入脚上拉或下拉\n静态模式:把对应IO下拉,PULL_AUTO为1时,自动\n在静态检测期间使能下拉,其他时间禁止下拉,以减少功耗 + [23:16] + read-write + + + IE + TAMPER IO使能\n动态模式,输入管脚需要使能IE,输出管脚不需要\n静态模式,所有管脚均需要使能IE,PULL_AUTO为1\n时,自动在静态检测期间使能IE,其他时间禁止IE,以减少\n功耗 + [15:8] + read-write + + + MODE + TAMPER IO模式(每1BIT控制两个IO,\n按顺序对应IO0~7)\n0:静态模式\n1:动态模式 + [3:0] + read-write + + + + + + TAMP_STA_CTRL + * TAMP_STA_CTRL * + 0x48 + 32 + 0x00000000 + + + ALERT_LEVEL + 分别对应8个引脚的静态报警电平\n0: 低电平报警\n1: 高电平报警 + [31:24] + read-write + + + CHK_DLY + 静态上下拉开启后,延迟多长时间后进行检测\n0: 1ms\n1: 4ms\n2: 8ms\n3: 16ms + [23:22] + read-write + + + CHK_GAP + 静态检测间隔\n0: 1ms\n1: 2ms\n2: 4ms\n3: 8ms + [21:20] + read-write + + + PULL_AUTO + 0: 静态上下拉由软件控制\n1: 静态上下拉只在配置工作期间有效,由硬件自动控制 + [10:10] + read-write + + + PROT_MODE + 静态报警触发后,保护模式选择\n0: 引脚处于高阻状态\n1: 引脚自动上下拉（取决于外部电平） + [9:9] + read-write + + + PROT_EN + 静态报警触发后,IO是否启动自动保护\n0: 不开启 ,继续进行检测\n1: 开启 ,停止检测,进入保护模式,保护模式由PROT\n_MODE确定 + [8:8] + read-write + + + FILT_WIN + 静态检测窗口报警过滤选择\n0: 一个窗口检测到报警即为报警\n1: 连续两个窗口检测到报警即为报警\n2: 连续三个窗口检测到报警即为报警\n3: 连续四个窗口检测到报警即为报警 + [5:4] + read-write + + + CHK_WIN + 窗口内采样过滤选择\n0: 窗口内进行一次采样,一次采样成功即触发窗口报警\n1: 窗口内进行两次采样,连续两次采样成功即触发窗口报警\n2: 窗口内进行三次采样,连续三次采样成功即触发窗口报警\n3: 窗口内进行四次采样,连续四次采样成功即触发窗口报警 + [3:2] + read-write + + + PERIOD + 静态检测周期\n0: 32ms\n1: 125ms\n2: 500ms\n3: 0.9999s + [1:0] + read-write + + + + + + TAMP_DYN_CTRL + * TAMP_DYN_CTRL * + 0x4c + 32 + 0x00000000 + + + PROT_MODE + 动态报警触发后,保护模式选择\n0: 引脚处于高阻状态\n1: 引脚自动上下拉（取决于外部电平） + [9:9] + read-write + + + PROT_EN + 动态报警触发后,IO是否启动自动保护\n0: 不开启 \n1: 开启 ,保护模式由PROT_MODE确定 + [8:8] + read-write + + + CHK_WIN + 窗口内采样过滤选择\n0: 窗口内进行一次采样,一次采样成功即触发窗口报警\n1: 窗口内进行两次采样,连续两次采样成功即触发窗口报警\n2: 窗口内进行三次采样,连续三次采样成功即触发窗口报警\n3: 窗口内进行四次采样,连续四次采样成功即触发窗口报警 + [3:2] + read-write + + + PERIOD + 动态检测周期\n0: 32ms\n1: 125ms\n2: 500ms\n3: 0.9999s + [1:0] + read-write + + + + + + TAMP_IO_STATUS + * TAMP_IO_STATUS * + 0x50 + 32 + 0x00000000 + + + PU + IO上拉状态 + [31:24] + read-only + + + PD + IO下拉状态 + [23:16] + read-only + + + OEN + IO使能状态 + [15:8] + read-only + + + IE + IO IE状态 + [7:0] + read-only + + + + + + SENSOR_EN + * SENSOR_EN * + 0x80 + 32 + 0x00000000 + + + +TEMP_EN + 温度传感器使能:\n0x5:失能\nOthers:使能 + [11:8] + read-write + + + VBUT_3_3_EN + 纽扣电池3.3V输入电压传感器使能:\n0x5:失能\nOthers:使能 + [7:4] + read-write + + + VBUT_1_2_EN + 纽扣电池1.2V输出电压传感器使能:\n0x5:失能\nOthers:使能 + [3:0] + read-write + + + + + + SENSOR_CTRL + * SENSOR_CTRL * + 0x84 + 32 + 0x00000000 + + + CHK_EN + 传感器检测使能\n[4]: 低温检测使能\n[3]: 高温检测使能\n[2]: 纽扣电池3.3v输出低压检测使能\n[1]: 纽扣电池3.3v输出高压检测使能\n[0]: 纽扣电池1.2v输出低压检测使能 + [28:24] + read-write + + + DELAY + 警报持续时间门限,大于门限的信号,将触发报警。用\n于滤除毛刺,防止虚警。\n00: 1*(1/32k)=31.25us\n01: 8*(1/32k)=250us\n10: 32*(1/32k)=1ms\n11: 128*(1/32k)=4ms\n注：这个时间必须小于sensor_duration时间 + [19:18] + read-write + + + DUR + Sensor检测时间长度。\n00: always on\n01: 2ms\n10: 8ms\n11: 16ms + [17:16] + read-write + + + + + + SENSOR_THRES + * SENSOR_THRES * + 0x88 + 32 + 0x00000000 + + + TS_OTC + 高温报警温度设置\n0: 85\n1: 90\n2: 95\n3: 100\n4: 105 + [22:20] + read-write + + + TS_UTC + 低温报警温度设置\n0: -40\n1: -35\n2: -30\n3: -25\n4: -20 + [18:16] + read-write + + + VBUT_H + 纽扣电池3.3V输入电压高报警设置\n0000: 3.471\n0001: 3.577\n0010: 3.690\n0011: 3.810\n0100: 3.938\n0101: 4.076\n0110: 4.223\n0111: 4.381\n1000: 4.552\n1001: 4.736\n1010: 4.936\n1011: 5.154\n1100: 5.392\n1101: 5.653\n1110: 5.926\n1111: 6.115 + [15:12] + read-write + + + VBUT_L + 纽扣电池3.3V输入电压低报警设置\n0000: 1.938\n0001: 1.971\n0010: 2.005\n0011: 2.040\n0100: 2.076\n0101: 2.113\n0110: 2.152\n0111: 2.193\n1000: 2.235\n1001: 2.278\n1010: 2.324\n1011: 2.371\n1100: 2.420\n1101: 2.471\n1110: 2.525\n1111: 2.580 + [11:8] + read-write + + + DVDDLPM_L + 纽扣电池1.2V输出电压低报警设置\n报警值等于 0.83+DVDDLPM_L*0.02 + [3:0] + read-write + + + + + + SHIELD_EN + * SHIELD_EN * + 0xc0 + 32 + 0x00000000 + + + EN_7 + SHIELD 7使能\n0x5 :失能\nOthers: 使能 + [31:28] + read-write + + + EN_6 + SHIELD 6使能\n0x5 :失能\nOthers: 使能 + [27:24] + read-write + + + EN_5 + SHIELD 5使能\n0x5 :失能\nOthers: 使能 + [23:20] + read-write + + + EN_4 + SHIELD 4使能\n0x5 :失能\nOthers: 使能 + [19:16] + read-write + + + EN_3 + SHIELD 3使能\n0x5 :失能\nOthers: 使能 + [15:12] + read-write + + + EN_2 + SHIELD 2使能\n0x5 :失能\nOthers: 使能 + [11:8] + read-write + + + EN_1 + SHIELD 1使能\n0x5 :失能\nOthers: 使能 + [7:4] + read-write + + + EN_0 + SHIELD 0使能\n0x5 :失能\nOthers: 使能 + [3:0] + read-write + + + + + + SHIELD_CTRL + * SHIELD_CTRL * + 0xc4 + 32 + 0x00000000 + + + CHK_WIN + 窗口内采样过滤选择\n0: 窗口内进行一次采样,一次采样成功即触发窗口报警\n1: 窗口内进行两次采样,连续两次采样成功即触发窗口报警\n2: 窗口内进行三次采样,连续三次采样成功即触发窗口报警\n3: 窗口内进行四次采样,连续四次采样成功即触发窗口报警 + [9:8] + read-write + + + PERIOD + Shield工作周期\n0: 32ms\n1: 125ms\n2: 500ms\n3: 0.9999s + [1:0] + read-write + + + + + + + + MRTC + 1.0 + MRTC + MRTC + 0xfaf00 + + 0 + 0x18 + registers + + + + + EN + * EN * + 0x0 + 32 + 0x00000000 + + + VAL + 1: 使能RTC 0:失能RTC + [0:0] + read-write + + + + + + SEC_CNT + * SEC_CNT * + 0x4 + 32 + 0x00000000 + + + VAL + 设置一秒校准值 + [15:0] + read-write + + + + + + IE + * IE * + 0x8 + 32 + 0x00000000 + + + ALARM + 1: 允许闹钟中断 0:禁止闹钟中断 + [1:1] + read-write + + + SEC + 1: 允许秒中断 0:禁止秒中断 + [0:0] + read-write + + + + + + IRQ_STATUS + * IRQ_STATUS * + 0xc + 32 + 0x00000000 + + + ALARM + 1: 闹钟中断,clk_alm_ie为0时也会置\n位,但不会触发中断 + [1:1] + read-write + + + SEC + 1: 秒中断,scnd_ie为0时也会置位,但不\n会触发中断 + [0:0] + read-write + + + + + + ALARM + * ALARM * + 0x10 + 32 + 0x00000000 + + + IRQPREVAL + 闹钟中断预设值 + [31:0] + read-write + + + + + + TIME + * TIME * + 0x14 + 32 + 0x00000000 + + + VAL + 读操作读取当前RTC计数器值\n写操作改写当前RTC计数器值,仅支持32-bit操作 + [31:0] + read-write + + + + + + + + MRTCLSI + 0xfaf00 + MRTC + + + + MRTCLSE + 0xfb000 + + + + MADC + 1.0 + MADC + MADC + 0xfbb00 + + 0 + 0x50 + registers + + + + + CTRL1 + * CTRL1 * + 0x0 + 32 + 0x00000000 + + + SAMP_EDGE + ADC采样边沿选择\n0:下降沿采样\n1: 上升沿采样 + [2:2] + read-write + + + AWD_EN + ADC看门狗使能,ADC采样值超过看门狗门限时会\n触发ADC看门狗中断\n0::失能\n1::使能 + [1:1] + read-write + + + EN + adc模块数字开关\n0: 失能ADC模块\n1: 使能ADC模块 + [0:0] + read-write + + + + + + CTRL2 + * CTRL2 * + 0x4 + 32 + 0x00000000 + + + TRIG_EN + 定时器溢出触发ADC采样(仅适用于单次采样模式)\n0:失能\n1:使能 + [24:16] + read-write + + + SAMP_MODE + 采样模式\n0:单次采样模式\n1:连续采样模式 + [8:8] + read-write + + + SGL_START + 软件写'1',启动一次ADC采(仅在SAMP_M\nODE为0时生效) + [0:0] + write-only + + + + + + IE + * IE * + 0x10 + 32 + 0x00000000 + + + AWD + ADC看门狗中断使能\n0:失能\n1.使能 + [3:3] + read-write + + + FIFO_FULL + FIFO数据溢出中断使能\n0:失能\n1.使能 + [2:2] + read-write + + + FIFO_OVER + FIFO数据超过FIFO_LIMIT中断使能\n0:失能\n1.使能 + [1:1] + read-write + + + DONE + 采样结束中断使能\n0:失能\n1.使能 + [0:0] + read-write + + + + + + STATUS + * STATUS * + 0x14 + 32 + 0x00000000 + + + AWD + ADC看门狗中断状态,写1清除中断 + [3:3] + read-write + + + FIFO_FULL + FIFO数据溢出中断状态,写1清除中断 + [2:2] + read-write + + + FIFO_OVER + FIFO数据超过FIFO_LIMIT中断状态,写\n1清除中断 + [1:1] + read-write + + + DONE + 采样结束中断状态,写1清除中断 + [0:0] + read-write + + + + + + FIFO_CTRL + * FIFO_CTRL * + 0x20 + 32 + 0x00000000 + + + EN + ADC FIFO使能\n1:ADC数据有效转换值会写入FIFO\n0:ADC数据有效转换值不会写入FIFO + [17:17] + read-write + + + RST + ADC FIFO复位 + [16:16] + read-write + + + ITEMS + FIFO中的有效数据量 + [12:8] + read-only + + + LIMIT + 当LIMIT>0,且ITEMS>=LIMIT时触\n发FIFO_OVER中断 + [4:0] + read-write + + + + + + FIFO + * FIFO * + 0x24 + 32 + 0x00000000 + + + DATA + 使用FIFO时的ADC取数寄存器(未使能电压转换\n功能时,读到的为原始AD值;使能电压转换功能时,读到的为\n电压值的二进制补码,单位为mv) + [12:0] + read-only + + + + + + DATA + * DATA * + 0x28 + 32 + 0x00000000 + + + VAL + 不使用FIFO时的ADC取数寄存器(未使能电压转\n换功能时,读到的为原始AD值;使能电压转换功能时,读到的\n为电压值的二进制补码,单位为mv) + [12:0] + read-only + + + + + + AWD + * AWD * + 0x30 + 32 + 0x00000000 + + + HIGH_LIMIT + ADC看门狗的高阈值(使能电压转换时,需同时启用\n负电压归零功能才能使用ADC看门狗功能) + [28:16] + read-write + + + LOW_LIMIT + ADC看门狗的低阈值(使能电压转换时,需同时启用\n负电压归零功能才能使用ADC看门狗功能) + [12:0] + read-write + + + + + + REF_AD + * REF_AD * + 0x40 + 32 + 0x00000000 + + + VAL + 基准电压AD值 + [9:0] + read-write + + + + + + REF_VOL + * REF_VOL * + 0x44 + 32 + 0x00000000 + + + VAL + 基准电压(mV) + [12:0] + read-write + + + + + + SLOPE + * SLOPE * + 0x48 + 32 + 0x00000000 + + + VAL + 电压转换斜率((vol_high-vol_low\n)/(vol_high_ref-vol_low_ref)\n)*64计算得到的10-bit整数值 + [9:0] + read-write + + + + + + CONVERT_CTRL + * CONVERT_CTRL * + 0x4c + 32 + 0x00000000 + + + NEG_ZERO + 负电压归零控制(写1时,负电压以0V输出) + [1:1] + read-write + + + EN + 电压转换功能开关\n1: 使能电压转换\n0: 失能电压转换(输出原始ADC采样值) + [0:0] + read-write + + + + + + + + MISO7811 + 1.0 + MISO7811 + MISO7811 + 0xf8f00 + MDMA_7811 + + 0 + 0x60 + registers + + + + + BASE_ADDR_T1 + * BASE_ADDR_T1 * + 0x0 + 32 + 0x00000000 + + + ISO_BASE_ADDR + Character write base add\nress for track 1 + [19:0] + read-write + + + + + + BASE_ADDR_T2 + * BASE_ADDR_T2 * + 0x4 + 32 + 0x00000000 + + + ISO_BASE_ADDR + Character write base add\nress for track 2 + [19:0] + read-write + + + + + + BASE_ADDR_T3 + * BASE_ADDR_T3 * + 0x8 + 32 + 0x00000000 + + + ISO_BASE_ADDR + Character write base add\nress for track 3 + [19:0] + read-write + + + + + + CTRL + * CTRL * + 0xc + 32 + 0x00000000 + + + T3_BUFFULL_CLR_IRQ + Clear 7811 track 3 buffe\nr full interrupt + [31:31] + read-write + + + T3_BUFFULL_IRQ_EN + 7811 track 3 buffer full\n interrupt enable + [30:30] + read-write + + + T2_BUFFULL_CLR_IRQ + Clear 7811 track 2 buffe\nr full interrupt + [29:29] + read-write + + + T2_BUFFULL_IRQ_EN + 7811 track 2 buffer full\n interrupt enable + [28:28] + read-write + + + T1_BUFFULL_CLR_IRQ + Clear 7811 track 1 buffe\nr full interrupt + [27:27] + read-write + + + T1_BUFFULL_IRQ_EN + 7811 track 1 buffer full\n interrupt enable + [26:26] + read-write + + + T3_CHANNEL_SEL + Channel select signal fo\nr track 3 + [25:24] + read-write + + + T2_CHANNEL_SEL + Channel select signal fo\nr track 2 + [23:22] + read-write + + + T1_CHANNEL_SEL + Channel select signal fo\nr track 1 + [21:20] + read-write + + + T3_DC_CALC_WIN + DC calculation window co\nnfiguration for track 3 + [19:18] + read-write + + + T3_DC_CANCEL_EN + Enable DC cancellation f\nor track 3 + [17:17] + read-write + + + T2_DC_CALC_WIN + DC calculation window co\nnfiguration for track 2 + [16:15] + read-write + + + T2_DC_CANCEL_EN + Enable DC cancellation f\nor track 2 + [14:14] + read-write + + + T1_DC_CALC_WIN + DC calculation window co\nnfiguration for track 1 + [13:12] + read-write + + + T1_DC_CANCEL_EN + Enable DC cancellation f\nor track 1 + [11:11] + read-write + + + TIMER_CLR_IRQ + Clear 7811 timer interru\npt + [10:10] + read-write + + + TIMER_IRQ_EN + 7811 timer interrupt ena\nble + [9:9] + read-write + + + TIMER_EN + Timer enable + [8:8] + read-write + + + SOFT_RESET + soft reset for AHB bus c\nontrol + [7:7] + read-write + + + T3_CLR_IRQ + Clear 7811 track 3 inter\nrupt + [6:6] + read-write + + + T3_IRQ_EN + 7811 track 3 interrupt \nenable + [5:5] + read-write + + + T2_CLR_IRQ + Clear 7811 track 2 inter\nrupt + [4:4] + read-write + + + T2_IRQ_EN + 7811 track 2 interrupt \nenable + [3:3] + read-write + + + T1_CLR_IRQ + Clear 7811 track 1 inter\nrupt + [2:2] + read-write + + + T1_IRQ_EN + 7811 track 1 interrupt \nenable + [1:1] + read-write + + + RX_EN + 7811 decoder enable + [0:0] + read-write + + + + + + T1_PEAK_VALUE_CFG + * T1_PEAK_VALUE_CFG * + 0x10 + 32 + 0x00000000 + + + THLD_RATIO + Peak value threshold rat\nio + [16:13] + read-write + + + ALPHA + Coefficient for peak val\nue update IIR filter + [12:9] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [8:0] + read-write + + + + + + T1_PEAK_WIDTH_CFG + * T1_PEAK_WIDTH_CFG * + 0x14 + 32 + 0x00000000 + + + UPDATA_RATIO4 + Pulse width update ratio\n4 + [31:28] + read-write + + + UPDATA_RATIO3 + Pulse width update ratio\n3 + [27:24] + read-write + + + UPDATA_RATIO2 + Pulse width update ratio\n2 + [23:20] + read-write + + + UPDATA_RATIO1 + Pulse width update ratio\n1 + [19:16] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [14:0] + read-write + + + + + + T1_PULSE_WIDTH_CFG + * T1_PULSE_WIDTH_CFG * + 0x18 + 32 + 0x00000000 + + + PEAK_SEL_RATIO2 + Pulse width thld ratio2 \nfor peak select + [31:28] + read-write + + + PEAK_SEL_RATIO1 + Pulse width thld ratio1 \nfor peak select + [27:24] + read-write + + + PULSE_WID_BETA + Coefficient for pulse wi\ndth threshold IIR filter + [21:18] + read-write + + + PULSE_WID_MAX + Maximum pulse width valu\ne + [17:3] + read-write + + + SYNC_ZERO_WIN + Synchronized zero judgem\nent window + [2:0] + read-write + + + + + + T1_DECODE_CFG + * T1_DECODE_CFG * + 0x1c + 32 + 0x00000000 + + + RATIO8 + Pulse width threshold8 f\nor decode + [31:28] + read-write + + + RATIO7 + Pulse width threshold7 f\nor decode + [27:24] + read-write + + + RATIO6 + Pulse width threshold6 f\nor decode + [23:20] + read-write + + + RATIO5 + Pulse width threshold5 f\nor decode + [19:16] + read-write + + + RATIO4 + Pulse width threshold4 f\nor decode + [15:12] + read-write + + + RATIO3 + Pulse width threshold3 f\nor decode + [11:8] + read-write + + + RATIO2 + Pulse width threshold2 f\nor decode + [7:4] + read-write + + + RATIO1 + Pulse width threshold1 f\nor decode + [3:0] + read-write + + + + + + T2_PEAK_VALUE_CFG + * T2_PEAK_VALUE_CFG * + 0x20 + 32 + 0x00000000 + + + THLD_RATIO + Peak value threshold rat\nio + [16:13] + read-write + + + ALPHA + Coefficient for peak val\nue update IIR filter + [12:9] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [8:0] + read-write + + + + + + T2_PEAK_WIDTH_CFG + * T2_PEAK_WIDTH_CFG * + 0x24 + 32 + 0x00000000 + + + PULSE_WID_RATIO4 + Pulse width update ratio\n4 + [31:28] + read-write + + + PULSE_WID_RATIO3 + Pulse width update ratio\n3 + [27:24] + read-write + + + PULSE_WID_RATIO2 + Pulse width update ratio\n2 + [23:20] + read-write + + + PULSE_WID_RATIO1 + Pulse width update ratio\n1 + [19:16] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [14:0] + read-write + + + + + + T2_PULSE_WIDTH_CFG + * T2_PULSE_WIDTH_CFG * + 0x28 + 32 + 0x00000000 + + + PEAK_SEL_RATIO2 + Pulse width thld ratio2 \nfor peak select + [31:28] + read-write + + + PEAK_SEL_RATIO1 + Pulse width thld ratio1 \nfor peak select + [27:24] + read-write + + + PULSE_WID_BETA + Coefficient for pulse wi\ndth threshold IIR filter + [21:18] + read-write + + + PULSE_WID_MAX + Maximum pulse width valu\ne + [17:3] + read-write + + + SYNC_ZERO_WIN + Synchronized zero judgem\nent window + [2:0] + read-write + + + + + + T2_DECODE_CFG + * T2_DECODE_CFG * + 0x2c + 32 + 0x00000000 + + + RATIO8 + Pulse width threshold8 f\nor decode + [31:28] + read-write + + + RATIO7 + Pulse width threshold7 f\nor decode + [27:24] + read-write + + + RATIO6 + Pulse width threshold6 f\nor decode + [23:20] + read-write + + + RATIO5 + Pulse width threshold5 f\nor decode + [19:16] + read-write + + + RATIO4 + Pulse width threshold4 f\nor decode + [15:12] + read-write + + + RATIO3 + Pulse width threshold3 f\nor decode + [11:8] + read-write + + + RATIO2 + Pulse width threshold2 f\nor decode + [7:4] + read-write + + + RATIO1 + Pulse width threshold1 f\nor decode + [3:0] + read-write + + + + + + T3_PEAK_VALUE_CFG + * T3_PEAK_VALUE_CFG * + 0x30 + 32 + 0x00000000 + + + THLD_RATIO + Peak value threshold rat\nio + [16:13] + read-write + + + ALPHA + Coefficient for peak val\nue update IIR filter + [12:9] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [8:0] + read-write + + + + + + T3_PEAK_WIDTH_CFG + * T3_PEAK_WIDTH_CFG * + 0x34 + 32 + 0x00000000 + + + PULSE_WID_RATIO4 + Pulse width update ratio\n4 + [31:28] + read-write + + + PULSE_WID_RATIO3 + Pulse width update ratio\n3 + [27:24] + read-write + + + PULSE_WID_RATIO2 + Pulse width update ratio\n2 + [23:20] + read-write + + + PULSE_WID_RATIO1 + Pulse width update ratio\n1 + [19:16] + read-write + + + THLD_INIT + Initial peak value thres\nhold + [14:0] + read-write + + + + + + T3_PULSE_WIDTH_CFG + * T3_PULSE_WIDTH_CFG * + 0x38 + 32 + 0x00000000 + + + PEAK_SEL_RATIO2 + Pulse width thld ratio2 \nfor peak select + [31:28] + read-write + + + PEAK_SEL_RATIO1 + Pulse width thld ratio1 \nfor peak select + [27:24] + read-write + + + PULSE_WID_BETA + Coefficient for pulse wi\ndth threshold IIR filter + [21:18] + read-write + + + PULSE_WID_MAX + Maximum pulse width valu\ne + [17:3] + read-write + + + SYNC_ZERO_WIN + Synchronized zero judgem\nent window + [2:0] + read-write + + + + + + T3_DECODE_CFG + * T3_DECODE_CFG * + 0x3c + 32 + 0x00000000 + + + RATIO8 + Pulse width threshold8 f\nor decode + [31:28] + read-write + + + RATIO7 + Pulse width threshold7 f\nor decode + [27:24] + read-write + + + RATIO6 + Pulse width threshold6 f\nor decode + [23:20] + read-write + + + RATIO5 + Pulse width threshold5 f\nor decode + [19:16] + read-write + + + RATIO4 + Pulse width threshold4 f\nor decode + [15:12] + read-write + + + RATIO3 + Pulse width threshold3 f\nor decode + [11:8] + read-write + + + RATIO2 + Pulse width threshold2 f\nor decode + [7:4] + read-write + + + RATIO1 + Pulse width threshold1 f\nor decode + [3:0] + read-write + + + + + + STATUS + * STATUS * + 0x40 + 32 + 0x00000000 + + + T3_FIFO_WR_ERR + Track 3 fifo write error + [13:13] + read-only + + + T2_FIFO_WR_ERR + Track 2 fifo write error + [12:12] + read-only + + + T1_FIFO_WR_ERR + Track 1 fifo write error + [11:11] + read-only + + + T3_RX_DONE + 7811 decoder rx done sig\nnal for track3 + [10:10] + read-only + + + T2_RX_DONE + 7811 decoder rx done sig\nnal for track2 + [9:9] + read-only + + + T1_RX_DONE + 7811 decoder rx done sig\nnal for track1 + [8:8] + read-only + + + T3_BUF_FULL + Track 3 buffer full + [6:6] + read-only + + + T2_BUF_FULL + Track 2 buffer full + [5:5] + read-only + + + T1_BUF_FULL + Track 1 buffer full + [4:4] + read-only + + + TIMER_MEET + Timer meet limit + [3:3] + read-only + + + T3_WR_DONE + Shared memory write done\n signal for track3 + [2:2] + read-only + + + T2_WR_DONE + Shared memory write done\n signal for track2 + [1:1] + read-only + + + T1_WR_DONE + Shared memory write done\n signal for track1 + [0:0] + read-only + + + + + + CHAR_NUM + * CHAR_NUM * + 0x44 + 32 + 0x00000000 + + + TRACK3 + Track 3 character number + [23:16] + read-only + + + TRACK2 + Track 2 character number + [15:8] + read-only + + + TRACK1 + Track 1 character number + [7:0] + read-only + + + + + + INTERFER_CHAR_NUM + * INTERFER_CHAR_NUM * + 0x48 + 32 + 0x00000000 + + + TRACK3 + Track 3 interference cha\nracter number + [23:16] + read-only + + + TRACK2 + Track 2 interference cha\nracter number + [15:8] + read-only + + + TRACK1 + Track 1 interference cha\nracter number + [7:0] + read-only + + + + + + DC_EST + * DC_EST * + 0x4c + 32 + 0x00000000 + + + TRACK3 + Track 3 dc value for dco\nc + [29:20] + read-only + + + TRACK2 + Track 2 dc value for dco\nc + [19:10] + read-only + + + TRACK1 + Track 1 dc value for dco\nc + [9:0] + read-only + + + + + + END_ADDR_T1 + * END_ADDR_T1 * + 0x50 + 32 + 0x00000000 + + + ISO_END_ADDR + Character write end addr\ness for track 1 + [19:0] + read-write + + + + + + END_ADDR_T2 + * END_ADDR_T2 * + 0x54 + 32 + 0x00000000 + + + ISO_END_ADDR + Character write end addr\ness for track 2 + [19:0] + read-write + + + + + + END_ADDR_T3 + * END_ADDR_T3 * + 0x58 + 32 + 0x00000000 + + + ISO_END_ADDR + Character write end addr\ness for track 3 + [19:0] + read-write + + + + + + TIMER_LIMIT + * TIMER_LIMIT * + 0x5c + 32 + 0x00000000 + + + LIMIT + Timer limit for interrup\nt + [31:0] + read-write + + + + + + + + ANA_LDO_CLK + 1.0 + 32 ANA_LDO_CLK + ANA_LDO_CLK + 0xfb200 + + 0 + 0x4 + registers + + + + + LDO_CTRL + LDO control + 0x00 + 32 + 0x35494 + + + + OTP_LDO_VSEL + OTP ldo25 voitage selction + [2:0] + read-write + + + + OTP_LDO_EN + OTP ldo25 enable + [3:3] + read-write + + + + LDO_CARD_VSEL + 7816 LDO output voltage select + [5:4] + read-write + + + + LDO_CARD_EN + 7816 LDO enable + [6:6] + read-write + + + + LDO_CARD_OCP_EN + 7816 LDO over-current protection + [7:7] + read-write + + + + LDO_CARD_VTRIM + 7816 LDO output voltage trim + [10:8] + read-write + + + + LDO_CARD_0P33VDD + 7816 sink LDO for GPIO floating ground pull down + [11:11] + read-write + + + + LDO_BBPLLVCO_VSEL + bbpll vco ldo output voltage select + [13:12] + read-write + + + + LDO_BBPLL_VSEL + bbpll ldo output voltage select + [15:14] + read-write + + + + LDO_IBLOAD_SEL + bbpll bleed current sel + [16:16] + read-write + + + + LDO_HVSEL + bbpll ldo high voltage sel + [17:17] + read-write + + + + LDO_EN_BBPLL2 + bbpll2 ldo enable + [18:18] + read-write + + + + LDO_EN_BBPLL1 + bbpll1 ldo enable + [19:19] + read-write + + + + + + + + ANA_BBPLL + 1.0 + 32 ANA_BBPLL + ANA_BBPLL + 0xfb210 + + 0x00 + 0x1c + registers + + + + + BBPLL1_CTRL0 + BBPLL1 control + 0x0 + 32 + 0x80102 + + + + BBPLL1_CP_IBSEL + lcp sel + [2:0] + read-write + + + + BBPLL1_CLKGEN_CK48M_WIDTH + pulse width select + [5:4] + read-write + + + + BBPLL1_CLKGEN_CK48M_SEL + Pulse width select mode enable + [8:8] + read-write + + + + BBPLL1_CLKGEN_CK48M_DIVN + div_ratio of 48MHz + [22:16] + read-write + + + + + + BBPLL1_CTRL1 + BBPLL1 control + 0x4 + 32 + 0x00000000 + + + + BBPLL1_DIVR_FRAC + divr of pll + [23:0] + read-write + + + + + + BBPLL1_CTRL2 + BBPLL1 control + 0x8 + 32 + 0xA0052 + + + + BBPLL1_VCO_IBSEL + Bias current select of vco + [1:0] + read-write + + + + BBPLL1_RSTN + Reset signal of pll + [2:2] + read-write + + + + BBPLL1_LOOPDIV_WIDTH + Pulse width select + [5:4] + read-write + + + + BBPLL1_LOOPDIV_SEL + Pulse width select mode enable + [6:6] + read-write + + + + BBPLL1_FREFDIV2_SEL + Reference clk div sel + [7:7] + read-write + + + + BBPLL1_EN_VCO + VCO enable + [8:8] + read-write + + + + BBPLL1_EN_PFDCP + pfd and chargepump enable + [9:9] + read-write + + + + BBPLL1_EN_LOOPDIV + loopdivider enable + [10:10] + read-write + + + + BBPLL1_EN_CLKGEN_CK48M_DIV2 + 48M div2 enable + [11:11] + read-write + + + + BBPLL1_EN_CLKGEN_256M + 256M clk_gen enable + [12:12] + read-write + + + + BBPLL1_EN_CLKGEN_192M + 192M clk_gen enable + [13:13] + read-write + + + + BBPLL1_EN_CLKGEN_48M + 48M clk_gen enable + [14:14] + read-write + + + + BBPLL1_EN_CLKGEN + clk_gen enable + [15:15] + read-write + + + + BBPLL1_DIVR_INT + divr of pll + [21:16] + read-write + + + + + + BBPLL2_CTRL0 + BBPLL2 control + 0xc + 32 + 0x80102 + + + + BBPLL2_CP_IBSEL + lcp sel + [2:0] + read-write + + + + BBPLL2_CLKGEN_CK48M_WIDTH + pulse width select + [5:4] + read-write + + + + BBPLL2_CLKGEN_CK48M_SEL + Pulse width select mode enable + [8:8] + read-write + + + + BBPLL2_CLKGEN_CK48M_DIVN + div_ratio of 48MHz + [22:16] + read-write + + + + + + BBPLL2_CTRL1 + BBPLL2 control + 0x10 + 32 + 0x00000000 + + + + BBPLL2_DIVR_FRAC + divr of pll + [23:0] + read-write + + + + + + BBPLL2_CTRL2 + BBPLL2 control + 0x14 + 32 + 0xA0050 + + + + BBPLL2_VCO_IBSEL + Bias current select of vco + [1:0] + read-write + + + + BBPLL2_RSTN + Reset signal of pll + [2:2] + read-write + + + + BBPLL2_LOOPDIV_WIDTH + Pulse width select + [5:4] + read-write + + + + BBPLL2_LOOPDIV_SEL + Pulse width select mode enable + [6:6] + read-write + + + + BBPLL2_FREFDIV2_SEL + Reference clk div sel + [7:7] + read-write + + + + BBPLL2_EN_VCO + VCO enable + [8:8] + read-write + + + + BBPLL2_EN_PFDCP + pfd and chargepump enable + [9:9] + read-write + + + + BBPLL2_EN_LOOPDIV + loopdivider enable + [10:10] + read-write + + + + BBPLL2_EN_CLKGEN_CK48M_DIV2 + 48M div2 enable + [11:11] + read-write + + + + BBPLL2_EN_CLKGEN_256M + 256M clk_gen enable + [12:12] + read-write + + + + BBPLL2_EN_CLKGEN_192M + 192M clk_gen enable + [13:13] + read-write + + + + BBPLL2_EN_CLKGEN_48M + 48M clk_gen enable + [14:14] + read-write + + + + BBPLL2_EN_CLKGEN + clk_gen enable + [15:15] + read-write + + + + BBPLL2_DIVR_INT + divr of pll + [21:16] + read-write + + + + + + BBPLL_CTRL + BBPLL control + 0x18 + 32 + 0x400100 + + + + BBPLL_TST_SEL + pll test select + [2:0] + read-write + + + + BBPLL_TST_EN_VCTRL + vctrl test enable + [3:3] + read-write + + + + BBPLL_TST_EN_CK + clk test enable + [4:4] + read-write + + + + BBPLL_TST_EN + pll test enable + [5:5] + read-write + + + + BBPLL_TST_CKSEL + clk test select + [6:6] + read-write + + + + BBPLL_PFD_TONSEL + pfd ton select + [7:7] + read-write + + + + BBPLL_PFD_PWERES_SEL + Power Res select + [9:8] + read-write + + + + BBPLL_DSM_ORDER_SEL + DSM mesh order select + [10:10] + read-write + + + + BBPLL_DSM_DITHEREN + DSM dither enable + [11:11] + read-write + + + + BBPLL2_PFD_FREF_PHSEL + fref phase select + [12:12] + read-write + + + + BBPLL2_PFD_FDIV_PHSEL + fdiv phase select + [13:13] + read-write + + + + BBPLL2_DSM_CKSEL + DSM clk select + [14:14] + read-write + + + + BBPLL2_DSM_CK_PHSEL + DSM clk phase select + [15:15] + read-write + + + + BBPLL1_PFD_FREF_PHSEL + fref phase select + [16:16] + read-write + + + + BBPLL1_PFD_FDIV_PHSEL + fdiv phase select + [17:17] + read-write + + + + BBPLL1_DSM_CKSEL + DSM clk select + [18:18] + read-write + + + + BBPLL1_DSM_CK_PHSEL + DSM clk phase select + [19:19] + read-write + + + + BBPLL_CKIN_SEL + PLL clk input select + [21:20] + read-write + + + + RG_BBPLL_CLKGEN_PWERES_SEL + Power Res select + [23:22] + read-write + + + + + + + + ANA_MCR + 1.0 + 32 ANA_MCR + ANA_MCR + 0xfb230 + + 0 + 0xc + registers + + + + + CTRL0 + MCR control + 0x00 + 32 + 0x9494c200 + + + + ADC_CLK_EN + MCR ADC clock enable + [9:9] + read-write + + + + ADC_EN + MCR ADC enable + [10:10] + read-write + + + + ADC_EN_BIASGEN + MCR ADC reference voltage enable + [11:11] + read-write + + + + ADC_EN_CONSTGM + MCR ADC constant Gm bias enable + [12:12] + read-write + + + + ADC_EN_REG + MCR ADC regulator enable + [13:13] + read-write + + + + ADC_CLKSEL + MCR ADC clock select + [15:14] + read-write + + + + DCOC_PGA0 + MCR CH0 PGA DCOC DAC input + [21:16] + read-write + + + + ADC_REFBUF_VREF + MCR ADC differential reference voltage control + [23:22] + read-write + + + + DCOC_PGA1 + MCR CH1 PGA DCOC DAC input + [29:24] + read-write + + + + ADC_REGA_VCTRL + MCR ADC analog regulator output voltage control + [31:30] + read-write + + + + + + CTRL1 + MCR control + 0x4 + 32 + 0x3156780 + + + + DCOC_PGA2 + MCR CH2 PGA DCOC DAC input + [5:0] + read-write + + + + ADC_REGD_VCTRL + MCR ADC digital regulator output voltage control + [7:6] + read-write + + + + ADC_IBC_REFBUF + MCR ADC differential reference voltage buffer bias current control + [10:8] + read-write + + + + ADC_IBC_REFBUF2 + MCR ADC bias voltage buffer bias current control + [11:11] + read-write + + + + ADC_VCTRL_BIASGEN + MCR ADC bias voltage control + [14:12] + read-write + + + + PGA0_EN + MCR CH0 PGA enable + [15:15] + read-write + + + + PGA_CSEL + MCR lowpass cap selection cap + [18:16] + read-write + + + + PGA1_EN + MCR CH1 PGA enable + [19:19] + read-write + + + + PGA_IOUTSEL + MCR PAG output current enhance + [22:20] + read-write + + + + PGA2_EN + MCR CH2 PGA enable + [23:23] + read-write + + + + PGA_R1SEL + pag input resistor selection + [26:24] + read-write + + + + PGA_VCM_GEN_EN + MCR PGA input common mode buffer enable + [27:27] + read-write + + + + PGA_CM_EN + MCR PGA input common mode feedback enable + [31:31] + read-write + + + + + + CTRL2 + MCR control + 0x8 + 32 + 0xc630000 + + + + PGA_RES_BYPASS + MCR control + [8:8] + read-write + + + + PGA_LDO_EN + MCR PGA LDO enable + [11:11] + read-write + + + + ADC_CHANNEL_SEL + mcr adc test channel sel + [13:12] + read-write + + + + ADC_CHANNEL_EN + mcr adc test channel enable + [14:14] + read-write + + + + ADC_OUT_EN + MCR adc input connect to test pad enable + [15:15] + read-write + + + + PGA0_GC + MCR CH0 PGA gain control + [20:16] + read-write + + + + PGA1_GC + MCR CH1 PGA gain control + [25:21] + read-write + + + + PGA2_GC + MCR CH2 PGA gain control + [30:26] + read-write + + + + + + + + ADC_ANALOG + 1.0 + 32 ADC_ANALOG + ADC_ANALOG + 0xfb240 + + 0 + 0x8 + registers + + + + + ADC_CTRL0 + ADC_CTRL0 + 0x00 + 32 + 0X8830 + + + + MISC_SARADC_EN_REG + GPADC regulator enable. 0: off; 1: on + [0:0] + read-write + + + + MISC_SARADC_EN_CONSTGM + GPADC constant Gm bias enable. 0: off; 1: on + [1:1] + read-write + + + + MISC_SARADC_EN_BIASGEN + GPADC reference voltage enable. 0: off; 1: on + [2:2] + read-write + + + + MISC_SARADC_EN + GPADC enable. 0: off; 1: on + [3:3] + read-write + + + + MISC_GBG_FASTSETTLING + The global bandgap fast settling enable + [8:8] + read-write + + + + MISC_GBG_EN + The global bandgap enable + [9:9] + read-write + + + + + + ADC_CTRL1 + ADC_CTRL1 + 0x04 + 32 + 0xF7F0A86 + + + + MISC_SARADC_VCTRL_BIASGEN + GPADC bias voltage control 425mV+25mV*misc_saradc_vctrl_biasgen + [2:0] + read-write + + + + MISC_SARADC_SEL_CH_S + GPADC channel select + [5:3] + read-write + + + + MISC_SARADC_REGD_VCTRL + GPADC digital regulator output voltage control. 0: 1.0V; 1: 1.1V; 2: 1.2V; 3: 1.3V + [7:6] + read-write + + + + MISC_SARADC_REGA_VCTRL + GPADC analog regulator output voltage control. 0: 1.0V; 1: 1.1V; 2: 1.2V; 3: 1.3V + [9:8] + read-write + + + + MISC_SARADC_REFBUF_VREF_CTRL + GPADC differential reference voltage control. + [11:10] + read-write + + + + MISC_SARADC_MODE + 0=gpio,1=gpio diff,2=hvin,3=vinlpm,4=temperature + [14:12] + read-write + + + + MISC_SARADC_IBUF_GC + GPADC full scale control + [16:15] + read-write + + + + MISC_SARADC_IBUF_EN_RC + GPADC input buffer feedback capacitor enable + [17:17] + read-write + + + + MISC_SARADC_IBUF_BW + GPADC input buffer bandwidth control + [19:18] + read-write + + + + MISC_SARADC_IBC_REFBUF + GPADC differential reference voltage buffer bias current control + [22:20] + read-write + + + + MISC_SARADC_IBC_REFBUF2 + GPADC bias voltage buffer bias current control + [23:23] + read-write + + + + MISC_SARADC_IBC_IBUF + GPAADC input buffer bias control + [26:24] + read-write + + + + MISC_SARADC_IBC_CMBUF + GPADC biasgen buffer bias current control + [27:27] + read-write + + + + + + + + ANA_RNG + 1.0 + 32 ANA_RNG + ANA_RNG + 0xfb260 + + 0x00 + 0x8 + registers + + + + + RNG_CTRL0 + RNG control + 0x0 + 32 + 0x80000 + + + + RG_NCS_I_SET + NCS current setting + [19:17] + read-write + + + + DA_NCS_EN + NCS enable + [20:20] + read-write + + + + DA_NCS_RESETN + NCS reset + [21:21] + read-write + + + + DA_LDO_TRNG_EN + Security TRNG LDO enable. + [22:22] + read-write + + + + DA_TRNG_BIAS_EN + TRNG bias enable signal, high active + [23:23] + read-write + + + + DA_TRNG_TRNGA_OSCJ_EN + TRNGA LFOSC enable signal,high active + [24:24] + read-write + + + + DA_TRNG_TRNGB_OSCJ_EN + TRNGB LFOSC enable signal,high active + [25:25] + read-write + + + + DA_TRNG_TRNGC_OSCJ_EN + TRNGC LFOSC enable signal,high active + [26:26] + read-write + + + + DA_TRNG_TRNGD_OSCJ_EN + TRNGD LFOSC enable signal,high active + [27:27] + read-write + + + + DA_TRNG_TRNGOA_EN + TRNGA HFOSC enable signal,high active + [28:28] + read-write + + + + DA_TRNG_TRNGOB_EN + TRNGB HFOSC enable signal,high active + [29:29] + read-write + + + + DA_TRNG_TRNGOC_EN + TRNGC HFOSC enable signal,high active + [30:30] + read-write + + + + DA_TRNG_TRNGOD_EN + TRNGD HFOSC enable signal,high active + [31:31] + read-write + + + + + + RNG_CTRL1 + RNG control + 0x4 + 32 + 0x45454545 + + + + RG_TRNG_TRNGA_ON_JITTER + TRNGA LFOSC jitter control signal + [1:0] + read-write + + + + RG_TRNG_TRNGA_OSCJ_TRIM + TRNGA LFOSC frequency control signal + [3:2] + read-write + + + + RG_TRNG_TRNGA_OSCJ_VREF + TRNGA LFOSC vref control signal + [6:4] + read-write + + + + DA_TRNG_TRNGOA_CLR + TRNGA sample DFF output clear signal,low active + [7:7] + read-write + + + + RG_TRNG_TRNGB_ON_JITTER + TRNGB LFOSC jitter control signal + [9:8] + read-write + + + + RG_TRNG_TRNGB_OSCJ_TRIM + TRNGB LFOSC frequency control signal + [11:10] + read-write + + + + RG_TRNG_TRNGB_OSCJ_VREF + TRNGB LFOSC vref control signal + [14:12] + read-write + + + + DA_TRNG_TRNGOB_CLR + TRNGB sample DFF output clear signal,low active + [15:15] + read-write + + + + RG_TRNG_TRNGC_ON_JITTER + TRNGC LFOSC jitter control signal + [17:16] + read-write + + + + RG_TRNG_TRNGC_OSCJ_TRIM + TRNGC LFOSC frequency control signal + [19:18] + read-write + + + + RG_TRNG_TRNGC_OSCJ_VREF + TRNGC LFOSC vref control signal + [22:20] + read-write + + + + DA_TRNG_TRNGOC_CLR + TRNGC sample DFF output clear signal,low active + [23:23] + read-write + + + + RG_TRNG_TRNGD_ON_JITTER + TRNGD LFOSC jitter control signal + [25:24] + read-write + + + + RG_TRNG_TRNGD_OSCJ_TRIM + TRNGD LFOSC frequency control signal + [27:26] + read-write + + + + RG_TRNG_TRNGD_OSCJ_VREF + TRNGD LFOSC vref control signal + [30:28] + read-write + + + + DA_TRNG_TRNGOD_CLR + TRNGD sample DFF output clear signal,low active + [31:31] + read-write + + + + + + + + ANA_CHGR + 1.0 + 32 ANA + ANA_CHGR + 0xfb270 + + 0 + 0x4 + registers + + + + + STATE + CHGR state + 0x00 + 32 + 0x00000000 + + + + CHGR_STATE_VBAT_LV + CHGR_STATE_VBAT_LV + [0:0] + read-only + + + + CHGR_STATE_RCH_EN + CHGR_STAT_RCH_EN + [1:1] + read-only + + + + CHGR_STATE_IND + CHGR_STATE_IND + [2:2] + read-only + + + + CHGR_STATE_ICHG + CHGR_STATE_ICHG + [3:3] + read-only + + + + CHGR_RESET + CHGR_RESET + [4:4] + read-only + + + + CHGR_UVLO_OK_AON + CHGR_UVLO_OK_AON + [5:5] + read-only + + + + CHGR_PGOOD + CHGR_PGOOD + [6:6] + read-only + + + + CHGR_DPPM_OV_CV + CHGR_DPPM_OV_CC + [7:7] + read-only + + + + CHGR_DPPM_OV_CC + CHGR_DPPM_OV_CC + [8:8] + read-only + + + + CHGR_CC_OV_CV + CHGR_CC_OV_CV + [9:9] + read-only + + + + CHGR_IN_DET_AON + CHGR_IN_DET_AON + [10:10] + read-only + + + + VBAT_OV_FLAG + VBAT_OV_FLAG + [11:11] + read-only + + + + + + + + USB + 1.0 + 32 USB + USB + 0xfb400 + + 0 + 0x3A + registers + + + + + USB_CONFIG + USB_CONFIG + 0x00 + 8 + 0x00 + + + + enable_iso[0] + enable ISO for endpoint 2 OUT + [0:0] + read-write + + + + enable_iso[1] + 1:enable ISO for endpoint 2 IN + [1:1] + read-write + + + + bias + USB pad bias control + [3:2] + read-write + + + + usb_en + enable usb function + [4:4] + read-write + + + + dev_speed + enable usb function + [5:5] + read-write + + + + dev_resume + resume device + [6:6] + read-write + + + + epc_rmtwkupfeat + endpoint wakeup enable + [7:7] + read-write + + + + + + USB_INT_MASK + USB_INT_MASK + 0x01 + 8 + 0x00 + + + + setup_irq_mask + setup interrupt mask + [0:0] + read-write + + + + suspend_irq_mask + suspend interrupt mask + [1:1] + read-write + + + + NAK_irq_mask + NAK interrupt mask + [2:2] + read-write + + + + reset_irq_mask + reset interrupt mask + [3:3] + read-write + + + + ACK_irq_mask + ACK interrupt mask + [4:4] + read-write + + + + RXready_irq_mask + RXready interrupt mask + [5:5] + read-write + + + + RXfull_irq_mask + RXfull interrupt mask + [6:6] + read-write + + + + txdone0_irq_mask + txdone0 interrupt mask + [7:7] + read-write + + + + + + USB_DRV + USB_DRV + 0x02 + 8 + 0x00 + + + + txdone1_irq_mask + txdone1 interrupt mask + [0:0] + read-write + + + + txdone2_irq_mask + txdone2 interrupt mask + [1:1] + read-write + + + + txdone3_irq_mask + txdone3 interrupt mask + [2:2] + read-write + + + + usb_drv + usb_drv + [4:3] + read-write + + + + + + USB_ADDR + USB_ADDR + 0x03 + 8 + 0x00 + + + + dev_addr + device address + [6:0] + read-write + + + + bcst_noack + disable broadcast(address 0) packet receive + [7:7] + read-write + + + + + + USB_RX_SADDR + USB_RX_SADDR + 0x04 + 24 + 0x000000 + + + + rx_startaddr + rx_start address + [23:0] + read-write + + + + + + USB_RX_BUFLEN + USB_RX_BUFLEN + 0x07 + 24 + 0x000000 + + + + rx_buflen + rx_buflen + [23:0] + read-write + + + + + + USB_TX_SADDR0 + USB_TX_SADDR0 + 0x0a + 24 + 0x000000 + + + + tx_saddr0 + tx_saddress0 + [23:0] + read-write + + + + + + USB_TX_SADDR1 + USB_TX_SADDR1 + 0x0d + 24 + 0x000000 + + + + tx_saddr1 + tx_saddress1 + [23:0] + read-write + + + + + + USB_TX_SADDR2 + USB_TX_SADDR2 + 0x10 + 24 + 0x000000 + + + + tx_saddr2 + tx_saddress2 + [23:0] + read-write + + + + + + USB_TX_SADDR3 + USB_TX_SADDR3 + 0x13 + 24 + 0x000000 + + + + tx_saddr3 + tx_saddress3 + [23:0] + read-write + + + + + + USB_HMODE + USB_HMODE + 0x16 + 8 + 0x00 + + + + usb_hmode + usb host mode + [0:0] + read-write + + + + reset_device + usb reset device + [1:1] + read-write + + + + dma_enable + usb dma enable + [2:2] + read-write + + + + mram_select + mram select + [3:3] + read-write + + + + sof_enable + sof enable + [4:4] + read-write + + + + sof_window + sof window + [7:5] + read-write + + + + + + USB_RX_RPTR + USB_RX_RPTR + 0x1c + 32 + 0x00000000 + + + + usb_rx_rptr + USB RX DMA read pointer + [23:0] + read-write + + + + + + USB_TRIG + USB_TRIG + 0x20 + 8 + 0x00 + + + + ep0_trig + send endpoint 0 data in fifo + [0:0] + write-only + + + + ep1_trig + send endpoint 1 data in fifo + [1:1] + write-only + + + + ep2_trig + send endpoint 2 data in fifo + [2:2] + write-only + + + + ep3_trig + send endpoint 3 data in fifo + [3:3] + write-only + + + + ep0_send_zero + endpoint 0 reply zero length packet to host + [4:4] + write-only + + + + ep1_send_zero + endpoint 1 reply zero length packet to host + [5:5] + write-only + + + + ep2_send_zero + endpoint 2 reply zero length packet to host + [6:6] + write-only + + + + ep3_send_zero + endpoint 3 reply zero length packet to host + [7:7] + write-only + + + + + + USB_STALL + USB_STALL + 0x21 + 8 + 0x00 + + + + ep0_stall + set endpoint 0 to stall + [0:0] + write-only + + + + ep1_in_stall + set endpoint 1 in to stall + [1:1] + write-only + + + + ep1_out_stall + set endpoint 1 out to stall + [2:2] + write-only + + + + ep2_in_stall + set endpoint 2 in to stall + [3:3] + write-only + + + + ep2_out_stall + set endpoint 2 out to stall + [4:4] + write-only + + + + ep3_in_stall + set endpoint 3 in to stall + [5:5] + write-only + + + + ep3_out_stall + set endpoint 3 out to stall + [6:6] + write-only + + + + host_mode_start + host mode start + [7:7] + write-only + + + + + + USB_TOGGLE + USB_TOGGLE + 0x22 + 8 + 0x00 + + + + ep0_toggle + endpoint 0 to data0 + [0:0] + write-only + + + + ep1_in_toggle + endpoint 1 in to data0 + [1:1] + write-only + + + + ep1_out_toggle + endpoint 1 out to data0 + [2:2] + write-only + + + + ep2_in_toggle + endpoint 2 in to data0 + [3:3] + write-only + + + + ep2_out_toggle + endpoint 2 out to data0 + [4:4] + write-only + + + + ep3_in_toggle + endpoint 3 in to data0 + [5:5] + write-only + + + + ep3_out_toggle + endpoint 3 out to data0 + [6:6] + write-only + + + + reset + reset udc and pll and rxcnt + [7:7] + write-only + + + + + + USB_RX_WPTR + USB_RX_WPTR + 0x30 + 32 + 0x00000000 + + + + usb_rx_wptr + USB RX DMA write pointer + [23:0] + read-only + + + + ep0_stall_state + endpoint 0 stall state + [24:24] + read-write + + + + ep1_in_stall_state + endpoint 1 in stall state + [25:25] + read-write + + + + ep1_out_stall_state + endpoint 1 out stall state + [26:26] + read-write + + + + ep2_in_stall_state + endpoint 2 in stall state + [27:27] + read-write + + + + ep2_out_stall_state + endpoint 2 out stall state + [28:28] + read-write + + + + ep3_in_stall_state + endpoint 3 in stall state + [29:29] + read-write + + + + ep3_out_stall_state + endpoint 3 out stall state + [30:30] + read-write + + + + + + USB_STATUS + USB_STATUS + 0x34 + 16 + 0x0000 + + + + setup_state + usb setup state + [0:0] + read-write + + + + suspend_state + usb suspend state + [1:1] + read-write + + + + NAK_state + usb NAK state + [2:2] + read-write + + + + reset_state + usb reset state + [3:3] + read-write + + + + ACK_state + usb ACK state + [4:4] + read-write + + + + RX_ready_state + usb RX ready state + [5:5] + read-write + + + + RX_full_state + usb RX full state + [6:6] + read-write + + + + tx_done0_state + usb tx done0 state + [7:7] + read-write + + + + tx_done1_state + usb tx done1 state + [8:8] + read-write + + + + tx_done2_state + usb tx done2 state + [9:9] + read-write + + + + tx_done3_state + usb tx done3 state + [10:10] + read-write + + + + + + USB_TX_BUSY + USB_TX_BUSY + 0x36 + 8 + 0x00 + + + + ep0_in_busy + endpoint 0 in fifo busy state + [0:0] + read-only + + + + ep1_in_busy + endpoint 1 in fifo busy state + [1:1] + read-only + + + + ep2_in_busy + endpoint 2 in fifo busy state + [2:2] + read-only + + + + ep3_in_busy + endpoint 3 in fifo busy state + [3:3] + read-only + + + + usb_DN_state + usb DN state + [4:4] + read-only + + + + usb_DP_state + usb DP state + [5:5] + read-only + + + + RX_empty_state + usb RX empty state + [6:6] + read-only + + + + + + USB_RXCNT + USB_RXCNT + 0x37 + 8 + 0x00 + + + + usb_rxcnt + usb rx count + [7:0] + read-only + + + + + + USB_SOF + USB_SOF + 0x38 + 16 + 0x0000 + + + + usb_sof_cnt + usb sof count + [15:0] + read-only + + + + + + + \ No newline at end of file diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/system_yc3122.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/system_yc3122.h new file mode 100644 index 0000000000..546fad1baa --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/system_yc3122.h @@ -0,0 +1,79 @@ +/**************************************************************************//** + * @file system_.h + * @brief CMSIS Cortex-M# Device Peripheral Access Layer Header File for + * Device + * @version V3.10 + * @date 23. November 2012 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#ifndef SYSTEM_YC3122_H /* ToDo: replace '' with your device name */ +#define SYSTEM_YC3122_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include "yc3122.h" +#include "type.h" +#include "rom_api.h" + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System and update the SystemCoreClock variable. + */ +extern void SystemInit (void); + +/** + * Update SystemCoreClock variable + * + * @param none + * @return none + * + * @brief Updates the SystemCoreClock with current core Clock + * retrieved from cpu registers. + */ +extern void SystemCoreClockUpdate (void); + +#ifdef __cplusplus +} +#endif + +#endif /* SYSTEM__H */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/yc3122.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/yc3122.h new file mode 100644 index 0000000000..5eb42d98a2 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Include/yc3122.h @@ -0,0 +1,5342 @@ +/****************************************************************************** + * @file yc3122.h + * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File for + * YC3122 + * @version V1.00 + * @date 15. July 2021 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list ofC conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +/** @addtogroup + * @{ + */ + +/** @addtogroup YC3122 + * @{ + */ + +#ifndef __YC3122_H__ +#define __YC3122_H__ + +#ifdef __cplusplus +extern "C" { +#endif + + + /** @addtogroup Configuration_of_CMSIS + * @{ + */ + + + +/* =========================================================================================================================== */ +/* ================ Interrupt Number Definition ================ */ +/* =========================================================================================================================== */ +typedef enum IRQn +{ + /****** Cortex-M# Processor Exceptions Numbers ***************************************************/ + Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */ + NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */ + HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */ + SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */ + PendSV_IRQn = -2, /*!< -2 Pendable request for system service */ + SysTick_IRQn = -1, /*!< -1 System Tick Timer */ + /****** Device Specific Interrupt Numbers ********************************************************/ + USB_IRQn = 0, + I2C0_IRQn = 1, + I2C1_IRQn = 2, + QSPI_IRQn = 3, + SPI0_IRQn = 4, + SPI1_IRQn = 5, + HSPI_IRQn = 6, + SEC_IRQn = 7, + UART0_IRQn = 8, + UART1_IRQn = 9, + UART2_IRQn = 10, + UART3_IRQn = 11, + MEMCP_IRQn = 12, + SCI0_IRQn = 13, + SCI1_IRQn = 14, + MSR_IRQn = 15, + GPIO_IRQn = 16, + TMRG0_IRQn = 17, + TMRG1_IRQn = 18, + SDIO_IRQn = 19, + PSARM_IRQn = 20, + RSA_IRQn = 21, + SM4_IRQn = 22, + TRNG_IRQn = 23, + WDT_IRQn = 24, + DCMI_IRQn = 25, + ADC_IRQn = 26, + RTC_IRQn = 27, + RSVD1_IRQn = 28, + POWER_IRQn = 29, + SOFTWARE_IRQn = 30, + RISCV_IRQn = 31 +} IRQn_Type; + +/* + * ========================================================================== + * ----------- Processor and Core Peripheral Section ------------------------ + * ========================================================================== + */ + +/* Configuration of the Cortex-M# Processor and Core Peripherals */ +#define __CM0_REV 0x0000U /*!< Core Revision r0p0 */ +#define __NVIC_PRIO_BITS 2U /*!< Number of 2 Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ + +/*@}*/ /* end of group _CMSIS */ + +#if defined(__USE_YC_M0__) +#include "core_cm0.h" /* Cortex-M# processor and core peripherals */ +#elif defined(__USE_YC_RISC_V__) +#include "core_rv_31xx.h" +#endif + +#include "system_yc3122.h" /* System include file */ + + +#ifndef __IM /*!< Fallback for older CMSIS versions */ +#define __IM __I +#endif +#ifndef __OM /*!< Fallback for older CMSIS versions */ +#define __OM __O +#endif +#ifndef __IOM /*!< Fallback for older CMSIS versions */ +#define __IOM __IO +#endif + +/* ======================================== Start of section using anonymous unions ======================================== */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#pragma clang diagnostic ignored "-Wgnu-anonymous-struct" +#pragma clang diagnostic ignored "-Wnested-anon-types" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + + +/******************************************************************************/ +/* Device Specific Peripheral registers structures */ +/******************************************************************************/ +/** @addtogroup Device_Peripheral_peripherals + * @{ + */ + +#include +#include + +/* ToDo: add here your device specific peripheral access structure typedefs + following is an example for a timer */ +#define BIT0 (0x00000001U) +#define BIT1 (0x00000002U) +#define BIT2 (0x00000004U) +#define BIT3 (0x00000008U) +#define BIT4 (0x00000010U) +#define BIT5 (0x00000020U) +#define BIT6 (0x00000040U) +#define BIT7 (0x00000080U) +#define BIT8 (0x00000100U) +#define BIT9 (0x00000200U) +#define BIT10 (0x00000400U) +#define BIT11 (0x00000800U) +#define BIT12 (0x00001000U) +#define BIT13 (0x00002000U) +#define BIT14 (0x00004000U) +#define BIT15 (0x00008000U) +#define BIT16 (0x00010000U) +#define BIT17 (0x00020000U) +#define BIT18 (0x00040000U) +#define BIT19 (0x00080000U) +#define BIT20 (0x00100000U) +#define BIT21 (0x00200000U) +#define BIT22 (0x00400000U) +#define BIT23 (0x00800000U) +#define BIT24 (0x01000000U) +#define BIT25 (0x02000000U) +#define BIT26 (0x04000000U) +#define BIT27 (0x08000000U) +#define BIT28 (0x10000000U) +#define BIT29 (0x20000000U) +#define BIT30 (0x40000000U) +#define BIT31 (0x80000000U) + +#define BIT(n) (1UL << (n)) + + +/*Todo: DMA MPU*/ + +#define MPU_DMA_REGION_LEN 4 +typedef struct +{ + __IO uint32_t REGION_SADDR :25; + __IO uint32_t REGION_SADDR_RSVD :7 ; + __IO uint32_t REGION_EADDR :25; + __IO uint32_t REGION_EADDR_RSVD :7 ; +} REGION_ADDR_TypeDef; + +typedef struct +{ + __IO uint32_t MPU_DMA_CTRL :1 ; + __I uint32_t MPU_DMA_CTRL_RSVD :31; + + __IO uint32_t REGION0_RW_ENABLE :2 ; + __IO uint32_t REGION1_RW_ENABLE :2 ; + __IO uint32_t REGION2_RW_ENABLE :2 ; + __IO uint32_t REGION3_RW_ENABLE :2 ; + __I uint32_t MPU_DMA_PROT_RSVD :24; + __IO uint32_t MPU_DMA0_FAULT :2 ; /* !< MEMCP */ + __IO uint32_t MPU_DMA1_FAULT :2 ; /* !< USB/QSPI/DAC/SDIO/I2C/SPI/UART/7811 */ + __IO uint32_t MPU_DMA2_FAULT :2 ; /* !< DCMI_DMA0 */ + __IO uint32_t MPU_DMA3_FAULT :2 ; /* !< DCMI_DMA1 */ + __IO uint32_t MPU_DMA4_FAULT :2 ; /* !< DCMI_DMA2 */ + __IO uint32_t MPU_DMA5_FAULT :2 ; /* !< PSRAM */ + __IO uint32_t MPU_DMA6_FAULT :2 ; /* !< HSPI */ + __IO uint32_t MPU_DMA7_FAULT :2 ; /* !< QR_BINARIZE */ + __IO uint32_t MPU_DMA8_FAULT :2 ; /* !< QSORT */ + __IO uint32_t MPU_DMA9_FAULT :2 ; /* !< CANNY_BINARIZE */ + __IO uint32_t MPU_DMA10_FAULT :2 ; /* !< FAST_BINRIZE */ + __I uint32_t MPU_DMA_FAULT_RSVD :10; + __I uint32_t MPU_DMA_RSVD1[5] ; + + REGION_ADDR_TypeDef REGION_ADDRS[MPU_DMA_REGION_LEN]; + __I uint32_t MPU_DMA_RSVD2[16] ; + __I uint32_t DMA_FAULT_ADDR :25; + __I uint32_t DMA_FAULT_ADDR_RSVD :7 ; +} MPU_DMA_TypeDef; /*132byte*/ + +/* =========================================================================================================================== */ +/* ================ Device Specific Peripheral Section ================ */ +/* =========================================================================================================================== */ + + +/** @addtogroup Device_Peripheral_peripherals + * @{ + */ + + + +/* =========================================================================================================================== */ +/* ================ MMCU ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MMCU (MMCU) + */ + +typedef struct { /*!< (@ 0x000D0000) MMCU Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL * */ + + struct { + __OM uint32_t LTSLEEP_EN : 1; /*!< [0..0] 使能 lightsleep */ + __IOM uint32_t LTSLEEP : 1; /*!< [1..1] 写1 M0,进入浅睡眠模式 + 注意:此BIT写1后必须要有6个以上的NOP指令,否则退 + 出浅睡眠时可能会出错 */ + __IOM uint32_t WFI_EN : 1; /*!< [2..2] m0 WFI的使能 */ + __IM uint32_t : 1; + __IOM uint32_t DCLK_EN : 1; /*!< [4..4] m0 dclk的使能 */ + __IOM uint32_t FCLK_EN : 1; /*!< [5..5] m0 fclk的使能 */ + __IOM uint32_t SCSCLK_EN : 1; /*!< [6..6] m0 scsclk的使能 */ + __IM uint32_t : 1; + __IOM uint32_t BITBAND_CFG : 1; /*!< [8..8] bitband 每一BIT对应的地址长度(0x2 + 0000对应的地址是0x800000) + 0: RAM每一BIT对应的地址长度是8-bit + 1: RAM每一BIT对应的地址长度是32-bit */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * WKUP_SRC * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 唤醒中断源设置: 每1bit对应0~31号中断 */ + } bit; + } WKUP_SRC; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * ERROR_STATUS * */ + + struct { + __IM uint32_t CODE_CRC : 1; /*!< [0..0] 当这1bit置1,代表M0的代码 CRC校验错误 */ + __IM uint32_t MEM : 1; /*!< [1..1] 当这1bit置1,代表ROM或RAM奇偶校验错误 */ + __IM uint32_t MPU : 1; /*!< [2..2] 当这1bit置1,代表M0 MPU错误 */ + __IM uint32_t RAM_NOEXE : 1; /*!< [3..3] 当这1bit置1,代表M0 RAM执行代码错误 */ + __IM uint32_t RV_MPU : 1; /*!< [4..4] 当这1bit置1,代表RV MPU错误 */ + __IM uint32_t RV_ACCESS : 1; /*!< [5..5] 当这1bit置1,代表risc-v访问不存在的地 + 址空间 */ + __IM uint32_t RCODE_CRC : 1; /*!< [6..6] 当这1bit置1,代表RV代码读取CRC校验错误 */ + __IM uint32_t MPU_ROM : 1; /*!< [7..7] 当这1bit置1,代表rom区域非法访问 */ + __IM uint32_t DMA_MPU : 1; /*!< [8..8] 当这1bit置1,代表DMA MPU错误 */ + __IM uint32_t : 7; + __IOM uint32_t ERR_CLR : 1; /*!< [16..16] 写1会清除所有的CPU ERROR状态 */ + } bit; + } ERROR_STATUS; + __IM uint32_t RESERVED[5]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * IRQ_ADDR0 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] M0的中断起始地址 */ + } bit; + } IRQ_ADDR0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * CURR_CLK * */ + + struct { + __IOM uint32_t MS_CLK : 20; /*!< [19..0] DELAY_MS所需时钟(单位CLK) */ + __IOM uint32_t US_CLK : 12; /*!< [31..20] DELAY_US所需时钟(单位CLK) */ + } bit; + } CURR_CLK; + __IM uint32_t RESERVED1[54]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000100) * RV_CTRL * */ + + struct { + __IOM uint32_t CLK_EN : 4; /*!< [3..0] RV 时钟使能 + 0x0a: 使能 risc-v clock + others: 失能 risc-v clock */ + __IM uint32_t : 4; + __IOM uint32_t RESET : 4; /*!< [11..8] RV复位使能 + 0x0a: enable risc-v + others: reset riscv */ + __IM uint32_t : 4; + __IOM uint32_t FS_EN : 4; /*!< [19..16] RV独立睡眠配置 + 0xa: M0和RV独立睡眠 + others: M0睡眠会强制RV一起睡眠 */ + __IOM uint32_t FS_LOCK : 1; /*!< [20..20] RV独立睡眠配置锁定 + 1: 锁定 FS_LOCK和FS_EN */ + __IM uint32_t : 3; + __IM uint32_t RST_STATUS : 1; /*!< [24..24] RV复位状态 + 1:复位 + 0:没有复位 */ + __IM uint32_t SLP_STATUS : 1; /*!< [25..25] RV睡眠状态 + 1:睡眠 + 0:没有睡眠 */ + } bit; + } RV_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000104) * RV_IRQ * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] rv_to_m0中断使能 */ + __IM uint32_t : 7; + __IOM uint32_t IRQ : 1; /*!< [8..8] rv_to_m0中断状态位,使能之前必须先清除一 + 下该标志位,否则上次中断状态会直接触发中断 */ + __IM uint32_t : 7; + __IOM uint32_t TRIG : 1; /*!< [16..16] 写‘1’会触发m0_to_rv中断,中断pend + ing寄存器和wakeup enable配置在riscv + 寄存器中 + 必须写0清除,否则会导致一直触发 */ + } bit; + } RV_IRQ; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000108) * SW_IRQ * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] M0软件中断使能 */ + __IOM uint32_t TRIG : 1; /*!< [1..1] 软件写1会触发软件中断 */ + __IM uint32_t : 6; + __IOM uint32_t CODE : 8; /*!< [15..8] 用户软件自己可以操作的8BIT */ + } bit; + } SW_IRQ; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000010C) * BIN_IRQ * */ + + struct { + __IOM uint32_t QR_IE : 1; /*!< [0..0] 二维码二值化中断使能 */ + __IOM uint32_t ONED_IE : 1; /*!< [1..1] 一维码二值化中断使能 */ + } bit; + } BIN_IRQ; +} MMCU_Type; /*!< Size = 272 (0x110) */ + + + +/* =========================================================================================================================== */ +/* ================ MMPU ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MMPU (MMPU) + */ + +typedef struct { /*!< (@ 0x000D8080) MMPU Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL_ID * */ + + struct { + __IM uint32_t VAL : 32; /*!< [31..0] MPU ID */ + } bit; + } CTRL_ID; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * CTRL * */ + + struct { + __IOM uint32_t VAL : 1; /*!< [0..0] MPU使能 */ + } bit; + } CTRL; + __IM uint32_t RESERVED; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * CTRL_FSR * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [4:2] fault region + [1:0] fault status */ + } bit; + } CTRL_FSR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * CTRL_FAR * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] fault address */ + } bit; + } CTRL_FAR; + + union { + __IOM uint16_t reg; /*!< (@ 0x00000014) * PROTECTION * */ + + struct { + __IOM uint16_t VAL : 16; /*!< [15..0] protection15：0 + 00：no access + 01：private only + 10：private + user read only + 11：Full Access */ + } bit; + } PROTECTION; + __IM uint16_t RESERVED1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * USER_START * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 用户程序起始地址 */ + } bit; + } USER_START; + __IM uint32_t RESERVED2[9]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) * REGION_BASE0 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000044) * REGION_BASE1 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) * REGION_BASE2 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE2; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) * REGION_BASE3 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE3; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000050) * REGION_BASE4 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE4; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000054) * REGION_BASE5 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE5; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000058) * REGION_BASE6 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE6; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000005C) * REGION_BASE7 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [0]regionx_enable [20:6] + BASEx_REG */ + } bit; + } REGION_BASE7; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000060) * REGION_LIMIT0 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT0_REG */ + } bit; + } REGION_LIMIT0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000064) * REGION_LIMIT1 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT1_REG */ + } bit; + } REGION_LIMIT1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000068) * REGION_LIMIT2 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT2_REG */ + } bit; + } REGION_LIMIT2; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000006C) * REGION_LIMIT3 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT3_REG */ + } bit; + } REGION_LIMIT3; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000070) * REGION_LIMIT4 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT4_REG */ + } bit; + } REGION_LIMIT4; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000074) * REGION_LIMIT5 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT5_REG */ + } bit; + } REGION_LIMIT5; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000078) * REGION_LIMIT6 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT6_REG */ + } bit; + } REGION_LIMIT6; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000007C) * REGION_LIMIT7 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] [20:6] LIMIT7_REG */ + } bit; + } REGION_LIMIT7; +} MMPU_Type; /*!< Size = 128 (0x80) */ + + + +/* =========================================================================================================================== */ +/* ================ DCMI ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 DCMI (DCMI) + */ + +typedef struct { /*!< (@ 0x000D8200) DCMI Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) DCMI_CR Control Register */ + + struct { + __IOM uint32_t CAPTURE : 1; /*!< [0..0] CAPTURE enable */ + __IOM uint32_t CM : 1; /*!< [1..1] CAPTURE_MODE */ + __IOM uint32_t CROP : 1; /*!< [2..2] crop feature */ + __IOM uint32_t JPEG : 1; /*!< [3..3] JPEG format */ + __IOM uint32_t ESS : 1; /*!< [4..4] Embedded synchronization select */ + __IOM uint32_t PCKPOL : 1; /*!< [5..5] Pixel clock sampling along selection */ + __IOM uint32_t HSPOL : 1; /*!< [6..6] Horizontal synchronization polarity */ + __IOM uint32_t VSPOL : 1; /*!< [7..7] Vertical synchronization polarity */ + __IOM uint32_t FCRC : 2; /*!< [9..8] Frame capture rate control */ + __IOM uint32_t EDM : 3; /*!< [12..10] Extended data mode control */ + __IOM uint32_t SPI_MODE : 1; /*!< [13..13] SPI ddr mode select */ + __IOM uint32_t ENABLE : 1; /*!< [14..14] DCMI enable */ + __IM uint32_t : 1; + __IOM uint32_t BSM : 2; /*!< [17..16] Byte select mode */ + __IOM uint32_t OEBS : 1; /*!< [18..18] Odd enable of byte select */ + __IOM uint32_t LSM : 1; /*!< [19..19] Line select mode */ + __IOM uint32_t OELS : 1; /*!< [20..20] Odd enable of line select */ + __IM uint32_t : 3; + __IOM uint32_t IN_WIRE : 1; /*!< [24..24] DCMI input data line bit sequence */ + __IOM uint32_t IN_DDR : 1; /*!< [25..25] DDR double - edge sequential selection */ + __IM uint32_t : 1; + __IOM uint32_t DATA_LSB : 1; /*!< [27..27] data mode select */ + __IOM uint32_t BIT_LSB : 1; /*!< [28..28] BIT mode select */ + } bit; + } DCMI_CR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) DCMI_SR Control Register */ + + struct { + __IM uint32_t HSYNC : 1; /*!< [0..0] DCMI_HSYNC,pin status */ + __IM uint32_t VSYNC : 1; /*!< [1..1] DCMI_VSYNC,pin status */ + __IM uint32_t : 6; + __IM uint32_t AFIFO_STU : 8; /*!< [15..8] afifo status */ + __IM uint32_t CURR_ST : 4; /*!< [19..16] curr st */ + __IM uint32_t : 4; + __IM uint32_t BLOCK_EN : 1; /*!< [24..24] block enable */ + __IM uint32_t CAPTURE_EN : 1; /*!< [25..25] capture enable */ + __IM uint32_t SNAPSHOT_MODE : 1; /*!< [26..26] snapshot mode */ + } bit; + } DCMI_SR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) DCMI_RIS Control Register */ + + struct { + __IOM uint32_t FRAME : 1; /*!< [0..0] interrupt status */ + __IOM uint32_t ERR : 1; /*!< [1..1] interrupt status */ + __IOM uint32_t VSYNC : 1; /*!< [2..2] interrupt status */ + __IOM uint32_t LINE : 1; /*!< [3..3] interrupt status */ + __IOM uint32_t DMA0_LINES : 1; /*!< [4..4] interrupt status */ + __IOM uint32_t DMA0_OVFL : 1; /*!< [5..5] interrupt status */ + __IOM uint32_t DMA0_FRAEND : 1; /*!< [6..6] interrupt status */ + __IOM uint32_t DMA1_LINES : 1; /*!< [7..7] interrupt status */ + __IOM uint32_t DMA1_OVFL : 1; /*!< [8..8] interrupt status */ + __IOM uint32_t DMA1_FRAEND : 1; /*!< [9..9] interrupt status */ + __IOM uint32_t DMA2_LINES : 1; /*!< [10..10] interrupt status */ + __IOM uint32_t DMA2_OVFL : 1; /*!< [11..11] interrupt status */ + __IOM uint32_t DMA2_FRAEND : 1; /*!< [12..12] interrupt status */ + __IM uint32_t : 11; + __IM uint32_t DMA0_HALF : 1; /*!< [24..24] buffer status */ + __IM uint32_t DMA1_HALF : 1; /*!< [25..25] buffer status */ + __IM uint32_t DMA2_HALF : 1; /*!< [26..26] buffer status */ + } bit; + } RIS; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) DCMI_IER Control Register */ + + struct { + __IOM uint32_t FRAME : 1; /*!< [0..0] capture complete interrupt enable */ + __IOM uint32_t ERR : 1; /*!< [1..1] synochronization error interrupt enable */ + __IOM uint32_t VSYNC : 1; /*!< [2..2] VSYNC interrupt enable */ + __IOM uint32_t LINE : 1; /*!< [3..3] Line interrupt enable */ + __IOM uint32_t DMA0_LINES : 1; /*!< [4..4] DAM0 lines interrupt enable */ + __IOM uint32_t DMA0_OVFL : 1; /*!< [5..5] DAM0 OVFL interrupt enable */ + __IOM uint32_t DMA0_FRAEND : 1; /*!< [6..6] DAM0 frame end interrupt enable */ + __IOM uint32_t DMA1_LINES : 1; /*!< [7..7] DAM1 lines interrupt enable */ + __IOM uint32_t DMA1_OVFL : 1; /*!< [8..8] DAM1 OVFL interrupt enable */ + __IOM uint32_t DMA1_FRAEND : 1; /*!< [9..9] DAM1 frame end interrupt enable */ + __IOM uint32_t DMA2_LINES : 1; /*!< [10..10] DAM2 lines interrupt enable */ + __IOM uint32_t DMA2_OVFL : 1; /*!< [11..11] DAM2 OVFL interrupt enable */ + __IOM uint32_t DMA2_FRAEND : 1; /*!< [12..12] DAM2 frame end interrupt enable */ + } bit; + } IER; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) DCMI_MIR Control Register */ + + struct { + __IOM uint32_t FRAME : 1; /*!< [0..0] capture complete masked interrupt status */ + __IOM uint32_t ERR : 1; /*!< [1..1] Synochronization error masked interrupt status */ + __IOM uint32_t VSYNC : 1; /*!< [2..2] VSYNC masked interrupt status */ + __IOM uint32_t LINE : 1; /*!< [3..3] Line masked interrupt status */ + __IOM uint32_t DMA0_LINES : 1; /*!< [4..4] DMA0 Line masked interrupt status */ + __IOM uint32_t DMA0_OVFL : 1; /*!< [5..5] DMA0 OVFL masked interrupt status */ + __IOM uint32_t DMA0_FRAEND : 1; /*!< [6..6] DMA0 frame end masked interrupt status */ + __IOM uint32_t DMA1_LINES : 1; /*!< [7..7] DMA1 Line masked interrupt status */ + __IOM uint32_t DMA1_OVFL : 1; /*!< [8..8] DMA1 OVFL masked interrupt status */ + __IOM uint32_t DMA1_FRAEND : 1; /*!< [9..9] DMA1 frame end masked interrupt status */ + __IOM uint32_t DMA2_LINES : 1; /*!< [10..10] DMA2 Line masked interrupt status */ + __IOM uint32_t DMA2_OFVL : 1; /*!< [11..11] DMA2 OVFL masked interrupt status */ + __IOM uint32_t DMA2_FRAEND : 1; /*!< [12..12] DMA2 frame end masked interrupt status */ + __IM uint32_t : 11; + __IM uint32_t DMA0_HALF : 1; /*!< [24..24] buffer interrupt status */ + __IM uint32_t DMA1_HALF : 1; /*!< [25..25] buffer interrupt status */ + __IM uint32_t DMA2_HALF : 1; /*!< [26..26] buffer interrupt status */ + } bit; + } MIR; + __IM uint32_t RESERVED; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) DCMI_ESCR control register */ + + struct { + __IOM uint32_t FSC : 8; /*!< [7..0] frame start delimiter code */ + __IOM uint32_t LSC : 8; /*!< [15..8] line start delimiter code */ + __IOM uint32_t LEC : 8; /*!< [23..16] line end delimiter code */ + __IOM uint32_t FEC : 8; /*!< [31..24] Frame end delimiter code */ + } bit; + } ESCR; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000001C) DCMI_ESUR control register */ + + struct { + __IOM uint32_t FSU : 8; /*!< [7..0] frame start delimiter unmask */ + __IOM uint32_t LSU : 8; /*!< [15..8] Line start delimiter unmask */ + __IOM uint32_t LEU : 8; /*!< [23..16] Line end delimiter unmask */ + __IOM uint32_t FEU : 8; /*!< [31..24] frame end delimiter unmask */ + } bit; + } ESUR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) DCMI_CWSTRT control register */ + + struct { + __IOM uint32_t HOFFCNT : 14; /*!< [13..0] Horizontal offset count,start index is 0 */ + __IM uint32_t : 2; + __IOM uint32_t VST : 14; /*!< [29..16] Vertical start line count,start index is 0 */ + } bit; + } CWSTRT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) DCMI_CWSIZE control register */ + + struct { + __IOM uint32_t CAPCNT : 14; /*!< [13..0] capture count */ + __IM uint32_t : 2; + __IOM uint32_t VLINE : 14; /*!< [29..16] Vertical line count */ + } bit; + } CWSIZE; + __IM uint32_t RESERVED1; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000002C) DCMI_ESHR control register */ + + struct { + __IM uint32_t : 4; + __IOM uint32_t AFIFO_WR_FBD : 1; /*!< [4..4] afifo write allow or prohibit */ + __IOM uint32_t AFIFO_RST_SW : 1; /*!< [5..5] afifo rst_sw */ + __IOM uint32_t END_AFIFO_RST_EN : 1; /*!< [6..6] Reset the FIFO at the end of DCMI sampling */ + __IOM uint32_t START_AFIFO_RST_EN : 1; /*!< [7..7] Reset the FIFO at the start of DCMI sampling */ + __IOM uint32_t ESS_HEADER1 : 8; /*!< [15..8] Embedded synchronization word byte 1 value */ + __IOM uint32_t ESS_HEADER2 : 8; /*!< [23..16] Embedded synchronization word byte 2 value */ + __IOM uint32_t ESS_HEADER3 : 8; /*!< [31..24] Embedded synchronization word byte 3 value */ + } bit; + } ESHR; + __IM uint32_t RESERVED2[3]; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000003C) RX_CNT register */ + + struct { + __IM uint32_t PIXELS : 20; /*!< [19..0] The number of pixels received on the last frame */ + __IM uint32_t LINES : 12; /*!< [31..20] The number of rows */ + } bit; + } RX_CNT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) DCMI_DMA0_CTRL register */ + + struct { + __IOM uint32_t DMA_EN : 1; /*!< [0..0] DMA enable */ + __IOM uint32_t CROP_EN : 1; /*!< [1..1] CROP enable */ + __IM uint32_t : 6; + __IOM uint32_t PIXEL_SEL_MODE : 2; /*!< [9..8] column selection mode */ + __IOM uint32_t PIXEL_SEL_START : 1; /*!< [10..10] column selection start */ + __IM uint32_t : 1; + __IOM uint32_t LINE_SEL_MODE_LO : 2; /*!< [13..12] line selection mode */ + __IOM uint32_t LINE_SEL_START : 2; /*!< [15..14] line selection start */ + __IOM uint32_t FORMAT_TRANSFER : 2; /*!< [17..16] Format transfer */ + __IOM uint32_t YUV_TO_RGB_MODE : 1; /*!< [18..18] rgb mode selection */ + __IOM uint32_t RGB565_BYTE_SEQ : 1; /*!< [19..19] rgb byte seq */ + __IOM uint32_t YUV422_Y_LOC : 1; /*!< [20..20] Y location of YUV422 */ + __IOM uint32_t YUV422_UV_LOC : 1; /*!< [21..21] UV location of YUV422 */ + __IM uint32_t : 2; + __IOM uint32_t WORD_SEQ_PRE_FT : 1; /*!< [24..24] WORD_SEQ_PRE_FT */ + __IOM uint32_t WORD_SEQ_POST_FT : 1; /*!< [25..25] WORD_SEQ_POST_FT */ + __IM uint32_t : 2; + __IOM uint32_t LINE_SEL_MODE_HI : 4; /*!< [31..28] LINE_SEL_MODE_HI */ + } bit; + } DMA0_CTRL; + __IM uint32_t RESERVED3; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) crop position */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop start position */ + __IM uint32_t : 2; + __IOM uint32_t VSTART : 14; /*!< [29..16] vertical crop start position */ + } bit; + } DMA0_CSTART; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) crop SIZE */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop size */ + __IM uint32_t : 2; + __IOM uint32_t VSIZE : 14; /*!< [29..16] vertical crop size */ + } bit; + } DMA0_CSIZE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000050) DMA buffer status */ + + struct { + __IOM uint32_t LINES_IRQ_EN : 1; /*!< [0..0] IRQ status */ + __IOM uint32_t FRAME_START_REFRESH : 1; /*!< [1..1] When a frame_start is encountered, update dma_addr to + start_addr */ + __IOM uint32_t DMA_SADDR_REFRESH_EN : 1; /*!< [2..2] Enable */ + __IM uint32_t : 5; + __IM uint32_t BUFFER_EMPTY : 1; /*!< [8..8] buffer_status */ + __IM uint32_t BUFFER_VALID : 1; /*!< [9..9] buffer status */ + __IM uint32_t : 6; + __IOM uint32_t LINES_IRQ_SEL : 8; /*!< [23..16] IRQ selection */ + } bit; + } DMA0_BUF; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000054) DMA buffer start address */ + + struct { + __IOM uint32_t SADDR : 24; /*!< [23..0] DMA buffer start address */ + } bit; + } DMA0_SADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000058) DMA buffer length */ + + struct { + __IOM uint32_t LEN : 24; /*!< [23..0] DMA buffer length */ + } bit; + } DMA0_LEN; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000005C) DMA current */ + + struct { + __IM uint32_t WADDR : 24; /*!< [23..0] DMA current write address */ + } bit; + } DMA0_WADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000060) DCMI_DMA0_CTRL register */ + + struct { + __IOM uint32_t DMA_EN : 1; /*!< [0..0] DMA enable */ + __IOM uint32_t CROP_EN : 1; /*!< [1..1] CROP enable */ + __IM uint32_t : 6; + __IOM uint32_t PIXEL_SEL_MODE : 2; /*!< [9..8] column selection mode */ + __IOM uint32_t PIXEL_SEL_START : 1; /*!< [10..10] column selection start */ + __IM uint32_t : 1; + __IOM uint32_t LINE_SEL_MODE_LO : 2; /*!< [13..12] line selection mode */ + __IOM uint32_t LINE_SEL_START : 2; /*!< [15..14] line selection start */ + __IOM uint32_t FORMAT_TRANSFER : 2; /*!< [17..16] Format transfer */ + __IOM uint32_t YUV_TO_RGB_MODE : 1; /*!< [18..18] rgb mode selection */ + __IOM uint32_t RGB565_BYTE_SEQ : 1; /*!< [19..19] rgb byte seq */ + __IOM uint32_t YUV422_Y_LOC : 1; /*!< [20..20] Y location of YUV422 */ + __IOM uint32_t YUV422_UV_LOC : 1; /*!< [21..21] UV location of YUV422 */ + __IM uint32_t : 2; + __IOM uint32_t WORD_SEQ_PRE_FT : 1; /*!< [24..24] WORD_SEQ_PRE_FT */ + __IOM uint32_t WORD_SEQ_POST_FT : 1; /*!< [25..25] WORD_SEQ_POST_FT */ + __IM uint32_t : 2; + __IOM uint32_t LINE_SEL_MODE_HI : 4; /*!< [31..28] LINE_SEL_MODE_HI */ + } bit; + } DMA1_CTRL; + __IM uint32_t RESERVED4; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000068) crop position */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop start position */ + __IM uint32_t : 2; + __IOM uint32_t VSTART : 14; /*!< [29..16] vertical crop start position */ + } bit; + } DMA1_CSTART; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000006C) crop SIZE */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop size */ + __IM uint32_t : 2; + __IOM uint32_t VSIZE : 14; /*!< [29..16] vertical crop size */ + } bit; + } DMA1_CSIZE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000070) DMA buffer status */ + + struct { + __IOM uint32_t LINES_IRQ_EN : 1; /*!< [0..0] IRQ status */ + __IOM uint32_t FRAME_START_REFRESH : 1; /*!< [1..1] When a frame_start is encountered, update dma_addr to + start_addr */ + __IOM uint32_t DMA_SADDR_REFRESH_EN : 1; /*!< [2..2] Enable */ + __IM uint32_t : 5; + __IM uint32_t BUFFER_EMPTY : 1; /*!< [8..8] buffer_status */ + __IM uint32_t BUFFER_VALID : 1; /*!< [9..9] buffer status */ + __IM uint32_t : 6; + __IOM uint32_t LINES_IRQ_SEL : 8; /*!< [23..16] IRQ selection */ + } bit; + } DMA1_BUF; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000074) DMA buffer start address */ + + struct { + __IOM uint32_t SADDR : 24; /*!< [23..0] DMA buffer start address */ + } bit; + } DMA1_SADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000078) DMA buffer length */ + + struct { + __IOM uint32_t LEN : 24; /*!< [23..0] DMA buffer length */ + } bit; + } DMA1_LEN; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000007C) DMA current */ + + struct { + __IM uint32_t WADDR : 24; /*!< [23..0] DMA current write address */ + } bit; + } DMA1_WADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000080) DCMI_DMA0_CTRL register */ + + struct { + __IOM uint32_t DMA_EN : 1; /*!< [0..0] DMA enable */ + __IOM uint32_t CROP_EN : 1; /*!< [1..1] CROP enable */ + __IM uint32_t : 6; + __IOM uint32_t PIXEL_SEL_MODE : 2; /*!< [9..8] column selection mode */ + __IOM uint32_t PIXEL_SEL_START : 1; /*!< [10..10] column selection start */ + __IM uint32_t : 1; + __IOM uint32_t LINE_SEL_MODE_LO : 2; /*!< [13..12] line selection mode */ + __IOM uint32_t LINE_SEL_START : 2; /*!< [15..14] line selection start */ + __IOM uint32_t FORMAT_TRANSFER : 2; /*!< [17..16] Format transfer */ + __IOM uint32_t YUV_TO_RGB_MODE : 1; /*!< [18..18] rgb mode selection */ + __IOM uint32_t RGB565_BYTE_SEQ : 1; /*!< [19..19] rgb byte seq */ + __IOM uint32_t YUV422_Y_LOC : 1; /*!< [20..20] Y location of YUV422 */ + __IOM uint32_t YUV422_UV_LOC : 1; /*!< [21..21] UV location of YUV422 */ + __IM uint32_t : 2; + __IOM uint32_t WORD_SEQ_PRE_FT : 1; /*!< [24..24] WORD_SEQ_PRE_FT */ + __IOM uint32_t WORD_SEQ_POST_FT : 1; /*!< [25..25] WORD_SEQ_POST_FT */ + __IM uint32_t : 2; + __IOM uint32_t LINE_SEL_MODE_HI : 4; /*!< [31..28] LINE_SEL_MODE_HI */ + } bit; + } DMA2_CTRL; + __IM uint32_t RESERVED5; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000088) crop position */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop start position */ + __IM uint32_t : 2; + __IOM uint32_t VSTART : 14; /*!< [29..16] vertical crop start position */ + } bit; + } DMA2_CSTART; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000008C) crop SIZE */ + + struct { + __IOM uint32_t HSIZE : 14; /*!< [13..0] horizonal crop size */ + __IM uint32_t : 2; + __IOM uint32_t VSIZE : 14; /*!< [29..16] vertical crop size */ + } bit; + } DMA2_CSIZE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000090) DMA buffer status */ + + struct { + __IOM uint32_t LINES_IRQ_EN : 1; /*!< [0..0] IRQ status */ + __IOM uint32_t FRAME_START_REFRESH : 1; /*!< [1..1] When a frame_start is encountered, update dma_addr to + start_addr */ + __IOM uint32_t DMA_SADDR_REFRESH_EN : 1; /*!< [2..2] Enable */ + __IM uint32_t : 5; + __IM uint32_t BUFFER_EMPTY : 1; /*!< [8..8] buffer_status */ + __IM uint32_t BUFFER_VALID : 1; /*!< [9..9] buffer status */ + __IM uint32_t : 6; + __IOM uint32_t LINES_IRQ_SEL : 8; /*!< [23..16] IRQ selection */ + } bit; + } DMA2_BUF; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000094) DMA buffer start address */ + + struct { + __IOM uint32_t SADDR : 24; /*!< [23..0] DMA buffer start address */ + } bit; + } DMA2_SADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000098) DMA buffer length */ + + struct { + __IOM uint32_t LEN : 24; /*!< [23..0] DMA buffer length */ + } bit; + } DMA2_LEN; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000009C) DMA current */ + + struct { + __IM uint32_t WADDR : 24; /*!< [23..0] DMA current write address */ + } bit; + } DMA2_WADDR; +} MDCMI_Type; /*!< Size = 160 (0xa0) */ + +/* =========================================================================================================================== */ +/* ================ MHSPI ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MHSPI (MHSPI) + */ + +typedef struct { /*!< (@ 0x000D8400) MHSPI Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] 接收相位调整使能开关 + 0：失能HSPI + 1：使能HSPI */ + __IOM uint32_t START_EN : 1; /*!< [1..1] DCMI多行中断启动spi使能 + 0: 禁止硬件启动spi + 1: 允许硬件启动spi */ + __IOM uint32_t START_SEL : 1; /*!< [2..2] DCMI多行中断选择 + 0: DCMI DMA0 + 1: DCMI DMA1 */ + __IOM uint32_t START : 1; /*!< [3..3] HSPI启动位，自动开启DMA_START + 0：无动作 + 1：硬件启动一次HSPI收发 */ + __IOM uint32_t CPOL : 1; /*!< [4..4] 时钟极性位 + 0：失能相位调整 + 1：使能相位调整 */ + __IOM uint32_t CPHA : 1; /*!< [5..5] 时钟相位 + 0：空闲状态时，SCK保持低电平； + 1：空闲状态时，SCK保持高电平； */ + __IOM uint32_t RTX_SEQ : 1; /*!< [6..6] 收发序列控制位 + 0：收发同时进行，长度为tx_len; + 1：先进行tx_len次发送, 再进行rx_len次接收 + （rx_len为0时跳过接收） */ + __IOM uint32_t RXD_EN : 1; /*!< [7..7] 接收相位调整使能开关 + 0：失能相位调整; + 1：使能相位调整。 */ + __IOM uint32_t NCS_DLY : 3; /*!< [10..8] NCS提前拉低和滞后拉高的延时位 + 0-7：spi_clk*(ncs_dly+1)。 */ + __IOM uint32_t FIFO_CTRL : 1; /*!< [11..11] FIFO软件控制权限使能位 + 0: 软件无法操作FIFO,仅运行DMA自动操作 + 1: 软件可以操作FIFO,不使用DMA时,可以直接使用 + FIFO进行收发 */ + __IOM uint32_t TRX_DLY : 4; /*!< [15..12] 发送和接收保护间隔位 + 0-7：软件增加Hspi_clk*(trx_dly+1) + *4个周期时长。 */ + __IOM uint32_t CLK_DIV : 4; /*!< [19..16] HSPI预分频位 + 0-7：分频值为(clk_div + 1)*2。 */ + __IOM uint32_t RX_PHASE : 4; /*!< [23..20] 控制接收相位调整值位,按bit采样位偏移N个cl + k个 个数 + 0-7: 采样时间延后(rx_adj_clk + 1)* + Hspi_clk不得大于clk_div。 + */ + __IM uint32_t : 1; + __IOM uint32_t Y2RGB : 1; /*!< [25..25] buff内容转RGB565控制位 + 0：无操作; + 1：buffer内容为8-bit灰度，实际发送时会自动转 + 换为16-bit RGB565发送。 */ + __IOM uint32_t FIRST_BIT : 1; /*!< [26..26] 帧格式位 + 0：先发送MSB; + 1：先发送LSB + 注：y_to_rgb_mode为1时,先进行y转rgb操 + 作,再按配置比特顺序进行发送 */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * FIFO * */ + + struct { + __IOM uint32_t TX_RPTR_INC : 1; /*!< [0..0] 读取TXFIFO字节位，写1, TX_DATA读 + 地址加1 + 0：无操作； + 1：读取FIFO中一个字节； */ + __IM uint32_t TX_EMPTY : 1; /*!< [1..1] TXFIFO状态位 + 0：非空; + 1：空。 */ + __IM uint32_t TX_FULL : 1; /*!< [2..2] TXFIFO状态位 + 0：非满; + 1：满。 */ + __IOM uint32_t RST : 1; /*!< [3..3] 软件复位FIFO + 0: do not effect + 1: reset fifo */ + __IM uint32_t : 4; + __IOM uint32_t RX_RPTR_INC : 1; /*!< [8..8] 读取RXFIFO字节位，写1, RX_DATA读 + 地址加1 + 0：无操作； + 1：读取FIFO中一个字节 */ + __IM uint32_t RX_EMPTY : 1; /*!< [9..9] RXFIFO状态位 + 0：非空; + 1：空。 */ + __IM uint32_t RX_FULL : 1; /*!< [10..10] RXFIFO状态位 + 0：非满; + 1：满。 */ + __IOM uint32_t AUTO_RST : 1; /*!< [11..11] fifo自动复位 + 0: do not effect + 1: 每次传输完成后,自动复位一下fifo */ + __IM uint32_t : 4; + __IOM uint32_t TX_DATA : 8; /*!< [23..16] 读取Tx_FIFO数据 + 0-7：写寄存器时，直接将此字节写入Tx_FIFO， + 读取此寄存器时，表示Tx_FIFO当前值; */ + __IOM uint32_t RX_DATA : 8; /*!< [31..24] 读取RX_FIFO数据 + 0-7：写寄存器时，直接将此字节写入Rx_FIFO， + 读取此寄存器时，表示Rx_FIFO当前值; */ + } bit; + } FIFO; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * DMA * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] DMA控制位 + 0：失能DMA; + 1：使能DMA。 */ + __IOM uint32_t AUTO_START : 1; /*!< [1..1] DMA自动传输位 + 0：dma不会自动启动，必须手动通过dma_start_ + man启动; + 1：spi_start自动启动dma，无须手动启动dma + 。 */ + __IM uint32_t : 1; + __IOM uint32_t START : 1; /*!< [3..3] 启动DMA传输位，同AUTO_START搭配使用 + 0：无操作； + 1：启动一次dma传输任务 */ + __IOM uint32_t TX_PTR_INC : 1; /*!< [4..4] TXFIFO状态位 + 0：tx_addr自增 + 1：tx_addr不自增。 */ + __IOM uint32_t RX_PTR_INC : 1; /*!< [5..5] RXFIFO状态位 + 0：rx_addr自增; + 1：rx_addr不自增。 */ + __IOM uint32_t PINGPANG_EN : 1; /*!< [6..6] SPI发送数据时,DMA从内存中乒乓buffer + 取数 + 0: disable pingpang + 1: enable pingpang,tx_saddr~ + tx_saddr+tx_len和tx_saddr+tx_ + len ~ tx_saddr+tx_len*2 */ + } bit; + } DMA; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * IRQ * */ + + struct { + __IOM uint32_t DMA_RIS : 1; /*!< [0..0] DMA发送完成标志位 + 0: DMA发送未完成； + 1: DMA完成一次传输发送； */ + __IOM uint32_t TXFL_RIS : 1; /*!< [1..1] 发送FIFO低水准线标志位 + 0: 不低于低水准线； + 1: 低于低水准线； */ + __IOM uint32_t TXFO_RIS : 1; /*!< [2..2] 发送FIFO溢出标志位 + 0: 发送FIFO未溢出设定字节个数; + 1: 发送FIFO溢出设定字节个数。 */ + __IOM uint32_t RXFH_RIS : 1; /*!< [3..3] 接收FIFO高水准线标志位 + 0: 不高于低水准线; + 1: 高于水准线。 */ + __IOM uint32_t RXFO_RIS : 1; /*!< [4..4] 接收FIFO溢出标志位 + 0: 接收FIFO未溢出设定字节个数; + 1: 接收FIFO溢出设定字节个数。 */ + __IOM uint32_t SOQ_RIS : 1; /*!< [5..5] HSPI start信号来临时，上次传输还未完成 + ， + 此时会错过一个HSPI任务，出现错误。 + 0: 未错过任务； + 1: 出错，错过一次任务 */ + __IM uint32_t : 2; + __IOM uint32_t DMA_MIS : 1; /*!< [8..8] DMA传输状态位 + 0: DMA发送未完成; + 1: DMA发送完成。 */ + __IOM uint32_t TXFL_MIS : 1; /*!< [9..9] 发送FIFO低水准线状态位 + 0: 不低于低水准线； + 1: 低于低水准线。 */ + __IOM uint32_t TXFO_MIS : 1; /*!< [10..10] 发送FIFO溢出状态位 + 0: 发送FIFO未溢出设定字节个数; + 1: 发送FIFO溢出设定字节个数。 */ + __IOM uint32_t RXFH_MIS : 1; /*!< [11..11] 接收FIFO高水准线状态位 + 0: 不高于低水准线; + 1: 高于水准线。 */ + __IOM uint32_t RXFO_MIS : 1; /*!< [12..12] 接收FIFO溢出状态位 + 0: 接收FIFO未溢出设定字节个数; + 1: 接收FIFO溢出设定字节个数。 */ + __IOM uint32_t SOQ_MIS : 1; /*!< [13..13] 丢失一次HSPI任务状态位 + 0: 未错过任务； + 1: 出错，错过一次任务。 */ + __IM uint32_t : 2; + __IOM uint32_t DMA_EN : 1; /*!< [16..16] DMA发送完成控制位 + 0: 失能DMA发送; + 1: 使能DMA发送。 */ + __IOM uint32_t TXFL_EN : 1; /*!< [17..17] 发送FIFO低水准线控制位 + 0: 失能低于低水准线； + 1: 使能低于低水准线。 */ + __IOM uint32_t TXFO_EN : 1; /*!< [18..18] 发送FIFO溢出控制位 + 0: 失能发送FIFO未溢出; + 1: 使能发送FIFO溢出。 */ + __IOM uint32_t RXFH_EN : 1; /*!< [19..19] 接收FIFO高水准线控制位 + 0: 失能高于低水准线; + 1: 使能高于水准线。 */ + __IOM uint32_t RXFO_EN : 1; /*!< [20..20] 接收FIFO溢出控制位 + 0: 失能接收FIFO未溢出; + 1: 使能接收FIFO溢出; */ + __IOM uint32_t SOQ_EN : 1; /*!< [21..21] 检测START信号丢失使能位 + 0: 失能； + 1: 使能。 */ + } bit; + } IRQ; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * DMA_TX_SADDR * */ + + struct { + __IOM uint32_t VAL : 20; /*!< [19..0] 存放发送数据起始地址，必须四字节对齐。 */ + } bit; + } DMA_TX_SADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * DMA_RX_SADDR * */ + + struct { + __IOM uint32_t VAL : 20; /*!< [19..0] 接收数据的起始地址，必须四字节对齐 */ + } bit; + } DMA_RX_SADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * DMA_TX_LEN * */ + + struct { + __IOM uint32_t VAL : 20; /*!< [19..0] HSPI发送数据字节长度，配置为0时，表示仅接收 */ + } bit; + } DMA_TX_LEN; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000001C) * DMA_RX_LEN * */ + + struct { + __IOM uint32_t VAL : 20; /*!< [19..0] HSPI接收数据字节长度，配置为0时，表示仅发送 */ + } bit; + } DMA_RX_LEN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * DMA_TX_ADDR * */ + + struct { + __IM uint32_t VAL : 20; /*!< [19..0] 存放当前发送数据的地址。 */ + } bit; + } DMA_TX_ADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * DMA_RX_ADDR * */ + + struct { + __IM uint32_t VAL : 20; /*!< [19..0] 存放当前接收数据的地址。 */ + } bit; + } DMA_RX_ADDR; + __IM uint32_t RESERVED[2]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000030) * FIFO_CTRL * */ + + struct { + __IOM uint32_t RX_WATERLEVEL : 5; /*!< [4..0] 发送FIFO低水线， + 发送FIFO数据小于等于此长度，并且水线值不为0时， + 触发tx_fifo_lo中断。 */ + __IM uint32_t : 3; + __IOM uint32_t TX_WATERLEVEL : 5; /*!< [12..8] 接收FIFO高水线， + 接收FIFO数据大于等于此长度，并且水线值不为0时， + 触发rx_fifo_hi中断。 */ + __IM uint32_t : 3; + __IM uint32_t RX_ITEMS : 5; /*!< [20..16] 读取Tx_FIFO的数据个数。 */ + __IM uint32_t : 3; + __IM uint32_t TX_ITEMS : 5; /*!< [28..24] 读取RX_FIFO的数据个数。 */ + } bit; + } FIFO_CTRL; +} MHSPI_Type; /*!< Size = 52 (0x34) */ + + + +/* =========================================================================================================================== */ +/* ================ MWDT ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MWDT (MWDT) + */ + +typedef struct { /*!< (@ 0x000F0000) MWDT Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CONFIG * */ + + struct { + __IOM uint32_t RELOAD : 5; /*!< [4..0] WDT计数时长为(2^(wdt_preset-1 + ))个hclk_div时钟周期 */ + __IOM uint32_t MODE : 1; /*!< [5..5] 0 :复位 1:中断 */ + __IOM uint32_t EN : 1; /*!< [6..6] 0 :WDT功能关闭. 1: WDT 功能打开. */ + __IOM uint32_t CLK_DIV : 4; /*!< [10..7] hclk预分频,最大16分频,实际使用的时钟频率 + 是clk/(wdt_clk_div+1) */ + __IOM uint32_t OFF : 1; /*!< [11..11] 关闭wdt + wdt_off_lock为0,并且wdt_on为0时,设 + 置wdt_off为1,再设置wdt_off为0,可关闭w + dt */ + __IOM uint32_t OFF_LOCK : 1; /*!< [12..12] wdt_off_lock + 1: wdt_off不起作用 + 0: wdt_off起作用 */ + } bit; + } CONFIG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * CNT * */ + + struct { + __IM uint32_t CNT : 32; /*!< [31..0] WDT CNT */ + } bit; + } CNT; + + union { + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) WDT IRQ STATUS */ + + struct { + __IM uint32_t STATE : 1; /*!< [0..0] WDT IRQ STATUS */ + } bit; + } IRQ_STATUS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) WDT KICK, 必须写 0x5937 */ + + struct { + __OM uint32_t VALUE : 32; /*!< [31..0] WDT KICK,必须写 0x5937 */ + } bit; + } KICK; + }; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * CLEAR * */ + + struct { + __IOM uint32_t CLEAR : 1; /*!< [0..0] 向这个寄存器中写1清除WDT 中断 */ + } bit; + } CLEAR; +} MWDT_Type; /*!< Size = 16 (0x10) */ + + + +/* =========================================================================================================================== */ +/* ================ MSCI0 ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MSCI0 (MSCI0) + */ + +typedef struct { /*!< (@ 0x000F0400) MSCI0 Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * MODE * */ + + struct { + __IOM uint32_t TPS : 1; /*!< [0..0] 模式控制位 + 0:T=0 + 1:T=1 */ + __IOM uint32_t CODE_DRT : 1; /*!< [1..1] 编码选择控制位 + 0:正向编码 + 1:反向编码 */ + __IOM uint32_t OD : 1; /*!< [2..2] OD控制位 + 0: 开漏模式 + 1: 推挽模式(default) */ + __IOM uint32_t ETU_NUM : 2; /*!< [4..3] ETU个数控制位 */ + __IOM uint32_t RET_TIME : 3; /*!< [7..5] 重传次数 */ + __IOM uint32_t RET_EN : 1; /*!< [8..8] 重传使能位 + 0:失能 + 1:使能 */ + __IOM uint32_t EN : 1; /*!< [9..9] SCI7816使能 + 0: 失能 + 1: 使能 */ + __IOM uint32_t BGT_EN : 1; /*!< [10..10] 块保护时间使能 + 0: 失能 + 1: 使能 */ + __IOM uint32_t CWT_EN : 1; /*!< [11..11] CWT计时器使能 + 0: 失能 + 1: 使能 */ + __IOM uint32_t CLK_SEL : 3; /*!< [14..12] CLK时钟源控制位(PWM0~PWM7) */ + __IOM uint32_t MST_EN : 1; /*!< [15..15] 主机模式使能 + 0: 失能 + 1: 使能 */ + __IOM uint32_t EDC_EN : 1; /*!< [16..16] EDC错误检测使能 + 0: 失能 + 1: 使能 */ + } bit; + } MODE; + __IM uint32_t RESERVED; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * CTRL * */ + + struct { + __IOM uint32_t RFIFO_CL : 1; /*!< [0..0] 接收FIFO内容清除控制位 + 0:不起作用 + 1:清除FIFO内数据 */ + __IOM uint32_t TFIFO_CL : 1; /*!< [1..1] 发送FIFO内容清除控制位 + 0:不起作用 + 1:清除FIFO内数据 */ + __IOM uint32_t TS_TEST : 1; /*!< [2..2] 检测TS字节 + 0:不起作用 + 1:接收到数据为03时校验位电平取反 */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * STATUS * */ + + struct { + __IOM uint32_t RFIFO_N : 1; /*!< [0..0] 接收缓冲器空状态位 + 0:接收缓冲器空 + 1:接收缓冲器中不空 */ + __IOM uint32_t RFIFO_F : 1; /*!< [1..1] 接收缓冲器满状态位 + 0:接收缓冲器不满 + 1:接收缓冲器满 */ + __IOM uint32_t PRT_CHK : 1; /*!< [2..2] 奇偶校验状态位 + 0: 奇偶校验正确 + 1: 奇偶校验错误 */ + __IOM uint32_t TFIFO_N : 1; /*!< [3..3] 发送缓冲器空状态位 + 0: 发送缓冲器空 + 1: 发送缓冲器中不空 */ + __IOM uint32_t TFIFO_F : 1; /*!< [4..4] 发送缓冲器满状态位 + 0: 发送缓冲器不满 + 1: 发送缓冲器满 */ + __IOM uint32_t RET_CHK : 1; /*!< [5..5] 重传奇偶校验检测状态位 + 0: 奇偶校验正确 + 1: 奇偶校验错误（在重传功能开启时,只有在发送达到重 + �� + 次数时仍有错误发生,此位才被置位） */ + __IOM uint32_t BGT_OT : 1; /*!< [6..6] BGT超时状态位 + 0:没超时 + 1:超时 (参考:SCI7816_BGT寄存器说明） */ + __IOM uint32_t CWT_OT : 1; /*!< [7..7] CWT超时状态位 + 0:没超时 + 1:超时 (参考:SCI7816_CWT寄存器说明） */ + __IOM uint32_t CHK_BIT : 1; /*!< [8..8] 检验位状态 + 0:检验位正确 + 1:检验位错误 */ + } bit; + } STATUS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * INT_IO * */ + + struct { + __IOM uint32_t R_FNS : 1; /*!< [0..0] 接收完成标志位 + 0:没接收完成 + 1:已接收完成 */ + __IOM uint32_t T_FNS : 1; /*!< [1..1] 发送完成标志位 + 0:没发送完成 + 1:已发送完成 */ + } bit; + } INT_IO; + __IM uint32_t RESERVED1[3]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * DATA * */ + + struct { + __IOM uint32_t VAL : 8; /*!< [7..0] 在发送或接收模式下分别充当发送或接收buffer + 角色 */ + } bit; + } DATA; + __IM uint32_t RESERVED2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * ETU * */ + + struct { + __IOM uint32_t VAL : 13; /*!< [12..0] 配置SCI7816通讯速率 */ + } bit; + } ETU; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000002C) * BGT * */ + + struct { + __IOM uint32_t VAL : 6; /*!< [5..0] 配置SCI7816块反向发送时间间隔,max 6 + 3 */ + } bit; + } BGT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000030) * CWT * */ + + struct { + __IOM uint32_t CWT_TMR : 24; /*!< [23..0] 配置SCI7816CWT定时值,发送字节完成,接 + 收起始时启动计时 */ + __IOM uint32_t CWT_SRT : 1; /*!< [24..24] CWT计时开始 + 0:CWT未开始计时 + 1:CWT计时立即生效 */ + } bit; + } CWT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000034) * EDC * */ + + struct { + __IOM uint32_t VAL : 8; /*!< [7..0] 保存 LRC 计算结果 */ + } bit; + } EDC; + __IM uint32_t RESERVED3[10]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000060) * IS * */ + + struct { + __IOM uint32_t R_DONE : 1; /*!< [0..0] 成功接收到1个字节 */ + __IOM uint32_t R_ERR : 1; /*!< [1..1] 接收错误中断,T0 重试次数超过配置,T1 奇偶 + 校验错误 */ + __IOM uint32_t CWT_TO : 1; /*!< [2..2] 接收 CWT 定时器超时中断 */ + __IOM uint32_t BWT_TO : 1; /*!< [3..3] 接收 BWT 定时器超时中断 */ + __IOM uint32_t T_DONE : 1; /*!< [4..4] 成功传输 FIFO 中的最后一个字节 */ + __IOM uint32_t T_ERR : 1; /*!< [5..5] 发送错误,T0 重试次数超过配置,T1 从未触发 + 此错误 */ + __IOM uint32_t RFIFO_HA : 1; /*!< [6..6] R_ITEMS <= RH_WTL + 发生中断后,应首先读取rx_fifo至水线以下,或改变水 + 线,才能清除中断 + RH_WTL为0时,不触发此中断 */ + __IOM uint32_t TFIFO_LA : 1; /*!< [7..7] T_ITEMS <= TL_WTL + 发生中断后,应首先填充T_ITEMS至水线以上,或改变水 + 线,才能清除中断 + TL_WTL为0时,不触发此中断 */ + __IOM uint32_t RFIFO_OVF : 1; /*!< [8..8] 设备接收字节时 接收FIFO 满,RFIFO_O + VF 溢出中断 */ + __IOM uint32_t TFIFO_OVF : 1; /*!< [9..9] 主机写入 发送FIFO 时 发送FIFO 满,T + FIFO_OVF 溢出中断 + 接收时,主机读 FIFO 下溢可能会导致此中断断言 */ + __IOM uint32_t SHTCUT : 1; /*!< [10..10] tbd */ + __IOM uint32_t T_FNS : 1; /*!< [11..11] 发送完成 */ + __IOM uint32_t R_FNS : 1; /*!< [12..12] 接收完成 */ + __IOM uint32_t CWT_FLG : 1; /*!< [13..13] cwt标志, 写 '1' 清除 IS 和 IES */ + __IOM uint32_t R_SRT : 1; /*!< [14..14] 接收到毛刺信号,会触发此中断,仅rx_en使能时 + 会触发 + bwt期间,bwt会自动恢复重启,可以触发超时 + cwt期间,毛刺到来会重置cwt计数器,wt超时时间会变 + 长 */ + } bit; + } IS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000064) * IE * */ + + struct { + __IOM uint32_t R_DONE : 1; /*!< [0..0] 使能 R_DONE 中断控制位 */ + __IOM uint32_t R_ERR : 1; /*!< [1..1] 使能 R_ERR 中断控制位 */ + __IOM uint32_t CWT_TO : 1; /*!< [2..2] 使能 CWT_TO 中断控制位 */ + __IOM uint32_t BWT_TO : 1; /*!< [3..3] 使能 BWT_TO 中断控制位 */ + __IOM uint32_t T_DONE : 1; /*!< [4..4] 使能 T_DONE 中断控制位 */ + __IOM uint32_t T_ERR : 1; /*!< [5..5] 使能 T_ERR 中断控制位 */ + __IOM uint32_t RFIFO_HA : 1; /*!< [6..6] 使能 RFIFO_HA 中断控制位 */ + __IOM uint32_t TFIFO_LA : 1; /*!< [7..7] 使能 TFIFO_LA 中断控制位 */ + __IOM uint32_t RFIFO_OVF : 1; /*!< [8..8] 使能 RFIFO_OVF 中断控制位 */ + __IOM uint32_t TFIFO_OVF : 1; /*!< [9..9] 使能 TFIFO_OVF 中断控制位 */ + __IOM uint32_t SHTCUT : 1; /*!< [10..10] 使能 SHTCUT 中断控制位 */ + __IOM uint32_t T_FNS : 1; /*!< [11..11] 使能 T_FNS 中断控制位 */ + __IOM uint32_t R_FNS : 1; /*!< [12..12] 使能 R_FNS 中断控制位 */ + __IOM uint32_t CWT_FLG : 1; /*!< [13..13] 使能 CWT_FLG 中断控制位 */ + __IOM uint32_t R_SRT : 1; /*!< [14..14] 使能 R_SRT 中断控制位 */ + } bit; + } IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000068) * IES * */ + + struct { + __IOM uint32_t R_DONE : 1; /*!< [0..0] 使能 R_DONE 中断状态控制位 */ + __IOM uint32_t R_ERR : 1; /*!< [1..1] 使能 R_ERR 中断状态控制位 */ + __IOM uint32_t CWT_TO : 1; /*!< [2..2] 使能 CWT_TO 中断状态控制位 */ + __IOM uint32_t BWT_TO : 1; /*!< [3..3] 使能 BWT_TO 中断状态控制位 */ + __IOM uint32_t T_DONE : 1; /*!< [4..4] 使能 T_DONE 中断状态控制位 */ + __IOM uint32_t T_ERR : 1; /*!< [5..5] 使能 T_ERR 中断状态控制位 */ + __IOM uint32_t RFIFO_HA : 1; /*!< [6..6] 使能 RFIFO_HA 中断状态控制位 */ + __IOM uint32_t TFIFO_LA : 1; /*!< [7..7] 使能 TFIFO_LA 中断状态控制位 */ + __IOM uint32_t RFIFO_OVF : 1; /*!< [8..8] 使能 RFIFO_OVF 中断状态控制位 */ + __IOM uint32_t TFIFO_OVF : 1; /*!< [9..9] 使能 TFIFO_OVF 中断状态控制位 */ + __IOM uint32_t SHTCUT : 1; /*!< [10..10] 使能 SHTCUT 中断状态控制位 */ + __IOM uint32_t T_FNS : 1; /*!< [11..11] 使能 T_FNS 中断状态控制位 */ + __IOM uint32_t R_FNS : 1; /*!< [12..12] 使能 R_FNS 中断状态控制位 */ + __IOM uint32_t CWT_FLG : 1; /*!< [13..13] 使能 CWT_FLG 中断状态控制位 */ + __IOM uint32_t R_SRT : 1; /*!< [14..14] 使能 R_SRT 中断状态控制位 */ + } bit; + } IES; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000006C) * CTRL2 * */ + + struct { + __IOM uint32_t TX_EN : 1; /*!< [0..0] 使能发送数据控制位 + 0:失能 + 1:使能 */ + __IOM uint32_t RX_EN : 1; /*!< [1..1] 使能接收数据控制位 + 0:失能 + 1:使能 */ + __IM uint32_t : 6; + __IOM uint32_t FST_EN : 1; /*!< [8..8] 使能发送第一个字节控制位 + 0:第一个字节传输失能 + 1:第一个字节发送开始或当 BGT_FLG 置'1' */ + __OM uint32_t FST_RF : 1; /*!< [9..9] 写1将刷新 FST_FLG 置1 */ + __IOM uint32_t FST_W : 1; /*!< [10..10] 发送第一个字节等待块保护时间 + 0:第一个字节发送不考虑 BGT_FLG + 1:当发送第一个字节时,等待 BGT_FLG 置”1” */ + __IM uint32_t FST_FLG : 1; /*!< [11..11] 发送第一个字节标志位 + 0:不传输第一个字节 + 1:下面的字节是要传送的第一个字节 */ + __IOM uint32_t BGTS_SL : 1; /*!< [12..12] BGT开始选择控制位 + 0:接收开始 + 1:接收启动位,更可重新定位 */ + __IOM uint32_t CWTS_SL : 1; /*!< [13..13] CWT开始选择控制位 + 0:接收缓冲器等待或者发送字节结束 + 1:接收起始位或发送起始位 */ + __IOM uint32_t CWTC_DSA : 1; /*!< [14..14] 清除 CWT 计数器控制位 + 0:使用发送开始位或接收开始位清除 CWT 计数器 + 1:不清除 CWT 计数器 */ + __IM uint32_t : 1; + __IOM uint32_t CWT_EN : 1; /*!< [16..16] 接收 CWT 定时器使能控制位 + 0:接收 CWT 定时器失能 + 1:接收 CWT 定时器使能 */ + __OM uint32_t CWT_ST : 1; /*!< [17..17] 写”1”接收 CWT 停止,始终读回”0” */ + __OM uint32_t CWT_SRT : 1; /*!< [18..18] 写”1”接收 CWT 开始,始终读回”0” */ + __OM uint32_t CWT_RLD : 1; /*!< [19..19] 写”1”接收 CWT 重新装载,始终读回”0” */ + __IOM uint32_t CWTA_SRT : 1; /*!< [20..20] 接收 CWT 自动启动使能控制位 + 0:接收 CWT 定时器不会自动启动 + 1:当发送”CWTA_SRT”位时,接收 CWT 定时器 + 将自动启动 */ + __IM uint32_t CWT_RNG : 1; /*!< [21..21] 接收 CWT 定时器运行状态 */ + __IM uint32_t : 2; + __IOM uint32_t BWT_EN : 1; /*!< [24..24] 接收 BWT 使能控制位 + 0:接收 BWT 定时器失能 + 1:接收 BWT 定时器使能 */ + __OM uint32_t BWT_ST : 1; /*!< [25..25] 写”1”接收 BWT 停止,始终读回”0” */ + __OM uint32_t BWT_SRT : 1; /*!< [26..26] 写”1”接收 BWT 开始,始终读回”0” */ + __OM uint32_t BWT_RLD : 1; /*!< [27..27] 写”1”接收 BWT 重新装载,始终读回”0” */ + __IOM uint32_t BWTA_SRT : 1; /*!< [28..28] 接收 BWT 自动启动使能控制位 + 0:接收 BWT 定时器不会自动启动 + 1:当发送”BWTA_SRT”位时,接收 BWT 定时器 + 将自动启动 */ + __IOM uint32_t BWTA_ST : 1; /*!< [29..29] 接收 BWT 自动停止使能控制位 + 0:接收 BWT 定时器不会自动停止 + 1:当发送”BWTA_ST”位时,接收 BWT 定时器将 + 自动停止 */ + __IM uint32_t BWT_RNG : 1; /*!< [30..30] 接收 BWT 定时器运行状态 */ + } bit; + } CTRL2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000070) * CWT_TO * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 CWT 超时预设值 */ + } bit; + } CWT_TO; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000074) * CWT_RLD * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 CWT 重新加载值 */ + } bit; + } CWT_RLD; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000078) * CWT_CNT * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 CWT 当前计数值 */ + } bit; + } CWT_CNT; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000007C) * STATUS_FSM * */ + + struct { + __IM uint32_t TX_IDLE : 1; /*!< [0..0] TX_IDLE_STATE */ + __IM uint32_t TX_STR : 1; /*!< [1..1] TX_START_STATE */ + __IM uint32_t TX_LD_DTA : 1; /*!< [2..2] TX_LOAD_DATA_STATE */ + __IM uint32_t TX_DTA : 1; /*!< [3..3] TX_DATA_STATE */ + __IM uint32_t TX_PRT : 1; /*!< [4..4] TX_PARITY_STATE */ + __IM uint32_t TX_INT_GAD : 1; /*!< [5..5] TX_INT_GUARD_STATE */ + __IM uint32_t TX_ERR_DET : 1; /*!< [6..6] TX_ERROR_DETECT_STATE */ + __IM uint32_t TX_ERR_GAD : 1; /*!< [7..7] TX_ERROR_GUARD_STATE */ + __IM uint32_t TX_GAD : 1; /*!< [8..8] TX_GUARD_STATE */ + __IM uint32_t : 7; + __IM uint32_t RX_IDLE : 1; /*!< [16..16] RX_IDLE_STATE */ + __IM uint32_t RX_RDY : 1; /*!< [17..17] RX_READY_STATE */ + __IM uint32_t RX_STR : 1; /*!< [18..18] RX_START_STATE */ + __IM uint32_t RX_DTA : 1; /*!< [19..19] RX_DATA_STATE */ + __IM uint32_t RX_PRT : 1; /*!< [20..20] RX_PARITY_STATE */ + __IM uint32_t RX_PRT_CHK : 1; /*!< [21..21] RX_PARITY_CHECK_STATE */ + __IM uint32_t RX_ERR : 1; /*!< [22..22] RX_ERROR_STATE */ + __IM uint32_t RX_GARD : 1; /*!< [23..23] RX_GUARD_STATE */ + __IM uint32_t RX_ERR_GAD : 1; /*!< [24..24] RX_ERROR_GUARD_STATE */ + __IM uint32_t RX_WAIT : 1; /*!< [25..25] RX_WAIT_STATE */ + } bit; + } STATUS_FSM; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000080) * BWT_TO * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 BWT 超时预设值 */ + } bit; + } BWT_TO; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000084) * BWT_RLD * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 BWT 重装载值 */ + } bit; + } BWT_RLD; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000088) * BWT_CNT * */ + + struct { + __IOM uint32_t VAL : 24; /*!< [23..0] 接收 BWT 当前计数值 */ + } bit; + } BWT_CNT; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000008C) * FIFO_CTRL * */ + + struct { + __IOM uint32_t TL_WTL : 4; /*!< [3..0] T_ITEMS <= TL_WTL 时,触发 T + FIFO_LA 中断 + 注意：TL_WTL 为0时,不触发中断 */ + __IOM uint32_t RH_WTL : 4; /*!< [7..4] FIFO_ITEMS >= RH_WTL 时,触 + 发 RFIFO_HA 中断 + 注意:RH_WTL 为0时,不触发中断 */ + __IM uint32_t T_ITEMS : 4; /*!< [11..8] 发送 FIFO 字节数 */ + __IM uint32_t R_ITEMS : 4; /*!< [15..12] 接收 FIFO 字节数 */ + } bit; + } FIFO_CTRL; +} MSCI0_Type; /*!< Size = 144 (0x90) */ + + + +/* =========================================================================================================================== */ +/* ================ MTIM ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 TIMER (MTIM) + */ + +typedef struct { /*!< (@ 0x000F0C00) MTIM Structure */ + + union { + __IOM uint32_t reg[18]; /*!< (@ 0x00000000) period Register */ + + struct { + __IOM uint32_t period : 32; /*!< [31..0] period */ + } bit[18]; + } PERIOD; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) pwm Control Register(0~7) */ + + struct { + __IOM uint32_t PWM0EN : 1; /*!< [0..0] Enable or disable TIMER */ + __IOM uint32_t PWM0FIR : 1; /*!< [1..1] TIMER initial level */ + __IOM uint32_t PWM0MD : 1; /*!< [2..2] TIMER mode */ + __IOM uint32_t PWM0REL : 1; /*!< [3..3] TIMER AUTO RELOAD */ + __IOM uint32_t PWM1EN : 1; /*!< [4..4] Enable or disable TIMER1 */ + __IOM uint32_t PWM1FIR : 1; /*!< [5..5] TIMER initial level */ + __IOM uint32_t PWM1MD : 1; /*!< [6..6] TIMER mode */ + __IOM uint32_t PWM1REL : 1; /*!< [7..7] TIMER AUTO RELOAD */ + __IOM uint32_t PWM2EN : 1; /*!< [8..8] Enable or disable TIMER2 */ + __IOM uint32_t PWM2FIR : 1; /*!< [9..9] TIMER initial level */ + __IOM uint32_t PWM2MD : 1; /*!< [10..10] TIMER mode */ + __IOM uint32_t PWM2REL : 1; /*!< [11..11] TIMER AUTO RELOAD */ + __IOM uint32_t PWM3EN : 1; /*!< [12..12] Enable or disable TIMER3 */ + __IOM uint32_t PWM3FIR : 1; /*!< [13..13] TIMER initial level */ + __IOM uint32_t PWM3MD : 1; /*!< [14..14] TIMER mode */ + __IOM uint32_t PWM3REL : 1; /*!< [15..15] TIMER AUTO RELOAD */ + __IOM uint32_t PWM4EN : 1; /*!< [16..16] Enable or disable TIMER4 */ + __IOM uint32_t PWM4FIR : 1; /*!< [17..17] TIMER initial level */ + __IOM uint32_t PWM4MD : 1; /*!< [18..18] TIMER mode */ + __IOM uint32_t PWM4REL : 1; /*!< [19..19] TIMER AUTO RELOAD */ + __IOM uint32_t PWM5EN : 1; /*!< [20..20] Enable or disable TIMER5 */ + __IOM uint32_t PWM5FIR : 1; /*!< [21..21] TIMER initial level */ + __IOM uint32_t PW5MD : 1; /*!< [22..22] TIMER mode */ + __IOM uint32_t PWM5REL : 1; /*!< [23..23] TIMER AUTO RELOAD */ + __IOM uint32_t PWM6EN : 1; /*!< [24..24] Enable or disable TIMER6 */ + __IOM uint32_t PWM6FIR : 1; /*!< [25..25] TIMER initial level */ + __IOM uint32_t PWM6MD : 1; /*!< [26..26] TIMER mode */ + __IOM uint32_t PWM6REL : 1; /*!< [27..27] TIMER AUTO RELOAD */ + __IOM uint32_t PWM7EN : 1; /*!< [28..28] Enable or disable TIMER7 */ + __IOM uint32_t PWM7FIR : 1; /*!< [29..29] TIMER initial level */ + __IOM uint32_t PWM7MD : 1; /*!< [30..30] TIMER mode */ + __IOM uint32_t PWM7REL : 1; /*!< [31..31] TIMER AUTO RELOAD */ + } bit; + } CTRL1; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) pwm Control Register(8) */ + + struct { + __IOM uint32_t PWM8EN : 1; /*!< [0..0] Enable or disable TIMER */ + __IOM uint32_t PWM8FIR : 1; /*!< [1..1] TIMER initial level */ + __IOM uint32_t PWM8MD : 1; /*!< [2..2] TIMER mode */ + __IOM uint32_t PWM8REL : 1; /*!< [3..3] TIMER AUTO RELOAD */ + __IOM uint32_t IRQ_EN : 9; /*!< [12..4] The timer crresponds to the interrupt enable control + bit */ + __IOM uint32_t IRQ_CLR : 9; /*!< [21..13] Clear interrupt control bits */ + } bit; + } CTRL2; + + union { + __IM uint32_t reg[9]; /*!< (@ 0x00000050) [0..8] */ + + struct { + __IM uint32_t cnt : 32; /*!< [31..0] cnt */ + } bit[9]; + } CNT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000074) pwm IRQ status Register */ + + struct { + __IM uint32_t PWM_IRQ_PEND : 9; /*!< [8..0] PWM_IRQ status */ + } bit; + } IRQ_NUM; +} MTIM_Type; /*!< Size = 120 (0x78) */ + + + +/* =========================================================================================================================== */ +/* ================ MCRC ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MCRC (MCRC) + */ + +typedef struct { /*!< (@ 0x000F8204) MCRC Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * RESULT * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 存放CRC运算的初值及结果 */ + } bit; + } RESULT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * MASK * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 计算掩码,不影响CRC最终运算结果 */ + } bit; + } MASK; + __IM uint32_t RESERVED[29]; + + union { + __IOM uint16_t reg; /*!< (@ 0x0000007C) * DATA * */ + + struct { + __IOM uint16_t VAL : 16; /*!< [15..0] 存放参与CRC运算的数据 */ + } bit; + } DATA; + __IM uint16_t RESERVED1; +} MCRC_Type; /*!< Size = 128 (0x80) */ + + + +/* =========================================================================================================================== */ +/* ================ MRCC ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MRCC (MRCC) + */ + +typedef struct { /*!< (@ 0x000F8400) MRCC Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * HCLK_CTRL * */ + + struct { + __IM uint32_t : 12; + __IOM uint32_t USB_SEL : 2; /*!< [13..12] USB时钟clk_usb选择。 + 0: rc192m分频后生成的48M时钟 + 1: pll_hsi_48m,切换PLL频率会抖动 + 2: pll_hse_48m,切换PLL频率会抖动 */ + __IOM uint32_t UART_SEL : 2; /*!< [15..14] UART时钟clk_uart选择。 + 0: rc192m分频后生成的48M时钟 + 1: pll_hsi_48m,切换PLL频率会抖动 + 2: pll_hse_48m,切换PLL频率会抖动 */ + } bit; + } HCLK_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * PCLK_CTRL * */ + + struct { + __IOM uint32_t SEL : 2; /*!< [1..0] PCLK使用的分频值选择 + 0: 1分频 + 1: 2分频 + 2: 4分频 + 3: 8分频 */ + __IOM uint32_t DIV_EN : 1; /*!< [2..2] PCLK分频使能 */ + } bit; + } PCLK_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * RSA_CLK * */ + + struct { + __IOM uint32_t CLK_CFG : 4; /*!< [3..0] 每16个clk_rsa中,前n个可以强制为0,此 + 寄存器用于选择n值,从这里输出的时钟最终给到RSA模块1 + : 每16个clk_rsa中,前3个周期强制为0 + 2, 4, 5 :每16个clk_rsa中,前2个周期强 + 制为0 + 3 : 每16个clk_rsa中,第一个强制为0 + 6, 7 :clk_rsa输入等于输出 + Others : 每16个clk_rsa中,前7个周期强 + 制为0 */ + } bit; + } RSA_CLK; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * CLK_EN * */ + + struct { + __IOM uint32_t RNG : 1; /*!< [0..0] rng数字模块时钟开关 */ + __IOM uint32_t QSPI : 1; /*!< [1..1] qspi数字模块时钟开关 */ + __IOM uint32_t SHA : 1; /*!< [2..2] SHA数字模块时钟开关 */ + __IOM uint32_t CRC : 1; /*!< [3..3] CRC数字模块时钟开关 */ + __IOM uint32_t PWM : 1; /*!< [4..4] PWM数字模块时钟开关 */ + __IOM uint32_t WDT : 1; /*!< [5..5] WDT数字模块时钟开关 */ + __IOM uint32_t USB : 1; /*!< [6..6] USB数字模块时钟开关 */ + __IOM uint32_t SPI : 1; /*!< [7..7] SPI数字模块时钟开关 */ + __IOM uint32_t DES : 1; /*!< [8..8] DES数字模块时钟开关 */ + __IOM uint32_t RSA : 1; /*!< [9..9] RSA数字模块时钟开关 */ + __IOM uint32_t AES : 1; /*!< [10..10] AES数字模块时钟开关 */ + __IOM uint32_t GPIO : 1; /*!< [11..11] GPIO数字模块时钟开关 */ + __IOM uint32_t SCI0 : 1; /*!< [12..12] SCI0数字模块时钟开关 */ + __IOM uint32_t SCI1 : 1; /*!< [13..13] SCI1数字模块时钟开关 */ + __IOM uint32_t SM4 : 1; /*!< [14..14] SM4数字模块时钟开关 */ + __IOM uint32_t UART : 1; /*!< [15..15] UART数字模块时钟开关 */ + __IOM uint32_t MSR : 1; /*!< [16..16] 7811数字模块时钟开关 */ + __IOM uint32_t MSR_ADC : 1; /*!< [17..17] 7811_ADC数字模块时钟开关 */ + __IM uint32_t : 1; + __IOM uint32_t PSRAM : 1; /*!< [19..19] PSRAM数字模块时钟开关 */ + __IOM uint32_t HSPI : 1; /*!< [20..20] HSPI数字模块时钟开关 */ + __IOM uint32_t DAC : 1; /*!< [21..21] DAC数字模块时钟开关 */ + __IOM uint32_t DCMI : 1; /*!< [22..22] DCMI数字模块时钟开关 */ + __IOM uint32_t SD : 1; /*!< [23..23] SD数字模块时钟开关 */ + __IOM uint32_t CHGPUMP : 1; /*!< [24..24] CHGPUMP数字模块时钟开关 */ + __IOM uint32_t MEMCP : 1; /*!< [25..25] MEMCP数字模块时钟开关 */ + __IOM uint32_t MPU_DMA : 1; /*!< [26..26] MPU_DMA数字模块时钟开关 */ + __IOM uint32_t RV_SYS : 1; /*!< [27..27] RV_SYS数字模块时钟开关 */ + __IOM uint32_t RV_REG : 1; /*!< [28..28] RV_REG数字模块时钟开关 */ + __IOM uint32_t RC48M : 1; /*!< [29..29] RC48M数字模块时钟开关 */ + } bit; + } CLK_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * MCU_CLK * */ + + struct { + __IOM uint32_t SEL : 2; /*!< [1..0] MCU时钟来源选择 + 0: rc192m + 1: pll_192M + 2: pll_256M + 3: pll_48M, */ + __IOM uint32_t RC_32K : 1; /*!< [2..2] 为1则使能内部RC32K（LSI）为系统时钟,同 + 时屏蔽其他所有的设置 */ + __IOM uint32_t DIV_EN : 1; /*!< [3..3] 为1则使能MCU时钟分频 */ + __IOM uint32_t DIV_SEL : 1; /*!< [4..4] MCU时钟分频选择 + 0：选择非分频时钟作为 clk_mcu + 1：选择分频时钟作为clk_mcu + 注意：当从'1'变为'0'时,应先设置div_sel为' + 0',延迟至少两个周期,然后清除div_en,不要同时清 + 除这两位。当从'0'变为'1'时,应先设置div_en为 + '1',延迟至少两个周期,然后设置 */ + __IOM uint32_t RAND_EN : 1; /*!< [5..5] 为1则使能MCU时钟随机功能 */ + __IM uint32_t : 2; + __IOM uint32_t DIV_LO : 8; /*!< [15..8] 输入给MCU的时钟的低电平持续时间 = (DIV + _LO+1)个clk */ + __IOM uint32_t DIV_HI : 8; /*!< [23..16] 输入给MCU的时钟的低电平持续时间 = (DIV + _HI +1)个clk */ + __IOM uint32_t RAND_MASK : 4; /*!< [27..24] DIV_HI和DIV_LO会加上(随机数& RA + ND_MASK) */ + } bit; + } MCU_CLK; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * PER1_CLK * */ + + struct { + __IOM uint32_t AHB_SEL : 2; /*!< [1..0] AHB总线时钟来源选择 + 0: CLK_MCU + 1: RC192M + 2: pll_192M + 3: pll_48M */ + __IM uint32_t : 1; + __IOM uint32_t AHB_RAND_EN : 1; /*!< [3..3] 为1则使能AHB总线时钟随机功能 */ + __IOM uint32_t AHB_RAND_MASK : 4; /*!< [7..4] AHB_DIV_HI和AHB_DIV_LO会加上 + (随机数&AHB_RAND_MASK) */ + __IOM uint32_t AHB_DIV_LO : 4; /*!< [11..8] 输入给AHB的时钟的低电平持续时间 = (AHB + _DIV_LO+1)个clk */ + __IOM uint32_t AHB_DIV_HI : 4; /*!< [15..12] 输入给AHB的时钟的高电平持续时间 = (AHB + _DIV_HI +1)个clk */ + __IOM uint32_t QSPI_SEL : 2; /*!< [17..16] QSPI总线时钟来源选择 + 0: CLK_MCU + 1: RC192M + 2: pll_192M + 3: pll_48M */ + __IM uint32_t : 6; + __IOM uint32_t QSPI_DIV_LO : 4; /*!< [27..24] 输入给QSPI的时钟的低电平持续时间 = (QS + PI_DIV_LO+1)个clk */ + __IOM uint32_t QSPI_DIV_HI : 4; /*!< [31..28] 输入给QSPI的时钟的低电平持续时间 = (QS + PI_DIV_HI+1)个clk */ + } bit; + } PER1_CLK; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * PER2_CLK * */ + + struct { + __IOM uint32_t PSRAM_SEL : 2; /*!< [1..0] PSRAM总线时钟来源选择 + 0: CLK_MCU + 1: RC192M + 2: pll_192M + 3: pll_256M */ + __IM uint32_t : 1; + __IOM uint32_t PSRAM_PLL_SEL : 1; /*!< [3..3] PSRAM时钟来源选择 + 0: pll_hsi + 1: pll_hse */ + __IOM uint32_t PSRAM_DIV_SEL : 1; /*!< [4..4] PSRAM时钟分频选择 + 0：选择非分频时钟作为 clk_psram + 1：选择分频时钟作为clk_psram */ + __IOM uint32_t PSRAM_DIV_EN : 1; /*!< [5..5] 为1则使能PSRAM时钟分频 */ + __IM uint32_t : 2; + __IOM uint32_t PSRAM_DIV_LO : 4; /*!< [11..8] 输入给PSRAM的时钟的低电平持续时间 = (P + SRAM_DIV_LO+1)个clk */ + __IOM uint32_t PSRAM_DIV_HI : 4; /*!< [15..12] 输入给PSRAM的时钟的高电平持续时间 = (P + SRAM_DIV_HI +1)个clk */ + __IOM uint32_t HSPI_SEL : 2; /*!< [17..16] PSRAM总线时钟来源选择 + 0: CLK_MCU + 1: RC192M + 2: pll_192M + 3: pll_256M */ + __IM uint32_t : 1; + __IOM uint32_t HSPI_PLL_SEL : 1; /*!< [19..19] HSPI时钟来源选择 + 0: pll_hsi + 1: pll_hse */ + __IOM uint32_t HSPI_DIV_SEL : 1; /*!< [20..20] HSPI时钟分频选择 + 0：选择非分频时钟作为 clk_hspi + 1：选择分频时钟作为 clk_hspi */ + __IOM uint32_t HSPI_DIV_EN : 1; /*!< [21..21] 为1则使能HSPI时钟分频 */ + __IM uint32_t : 2; + __IOM uint32_t HSPI_DIV_LO : 4; /*!< [27..24] 输入给HSPI的时钟的低电平持续时间 = (HS + PI_DIV_LO+1)个clk */ + __IOM uint32_t HSPI_DIV_HI : 4; /*!< [31..28] 输入给HSPI的时钟的高电平持续时间 = (HS + PI_DIV_HI +1)个clk */ + } bit; + } PER2_CLK; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000001C) * PER3_CLK * */ + + struct { + __IOM uint32_t ICE_SEL : 2; /*!< [1..0] ICE时钟来源选择 + 0: rc48m + 1: pll_hsi_48m + 2: pll_hse_48m */ + __IM uint32_t : 1; + __IOM uint32_t ICE_EN : 1; /*!< [3..3] ICE时钟分频使能来源选择 + 0：选择非分频时钟作为 clk_ice + 1：选择分频时钟作为clk_ice */ + __IOM uint32_t ICE_DIV_LO : 2; /*!< [5..4] 输入给ICE的时钟的低电平持续时间 = (ICE + _DIV_LO+1)个clk */ + __IOM uint32_t ICE_DIV_HI : 2; /*!< [7..6] 输入给ICE的时钟的高电平持续时间 = (ICE + _DIV_HI +1)个clk */ + __IOM uint32_t ADAC_SEL : 2; /*!< [9..8] ADAC时钟来源选择 + 0: rc48m + 1: pll_hsi_48m + 2: pll_hse_48m */ + __IM uint32_t : 1; + __IOM uint32_t ADAC_EN : 1; /*!< [11..11] ADAC时钟分频使能来源选择 + 0：选择非分频时钟作为 clk_adac + 1：选择分频时钟作为clk_adac */ + __IOM uint32_t ADAC_DIV_LO : 2; /*!< [13..12] 输入给ADAC的时钟的低电平持续时间 = (AD + AC_DIV_LO+1)个clk */ + __IOM uint32_t ADAC_DIV_HI : 2; /*!< [15..14] 输入给ADAC的时钟的高电平持续时间 = (AD + AC_DIV_HI +1)个clk */ + __IOM uint32_t GPIO0_SEL : 2; /*!< [17..16] GPIO偶数脚时钟输出,需要把偶数的GPIO配置 + 成 55:GPIO_CLK_OUT + 0: clk_rc48m + 1: clk_pll_hsi_48m + 2: clk_pll_hse_48m */ + __IM uint32_t : 1; + __IOM uint32_t GPIO0_EN : 1; /*!< [19..19] GPIO偶数脚时钟输出使能 */ + __IOM uint32_t GPIO0_DIV_LO : 2; /*!< [21..20] GPIO偶数脚输出的时钟的低电平持续时间 + = ( + GPIO0_DIV_LO+1)个clk */ + __IOM uint32_t GPIO0_DIV_HI : 2; /*!< [23..22] GPIO偶数脚输出的时钟的高电平持续时间 + = ( + GPIO0_DIV_HI+1)个clk */ + __IOM uint32_t GPIO1_SEL : 2; /*!< [25..24] GPIO奇数脚时钟输出,需要把奇数的GPIO配置 + 成 55:GPIO_CLK_OUT + 0: clk_rc48m + 1: clk_pll_hsi_48m + 2: clk_pll_hse_48m */ + __IM uint32_t : 1; + __IOM uint32_t GPIO1_EN : 1; /*!< [27..27] GPIO奇数脚时钟输出使能 */ + __IOM uint32_t GPIO1_DIV_LO : 2; /*!< [29..28] GPIO奇数脚输出的时钟的低电平持续时间 + = ( + GPIO1_DIV_LO+1)个clk */ + __IOM uint32_t GPIO1_DIV_HI : 2; /*!< [31..30] GPIO奇数脚输出的时钟的高电平持续时间 + = ( + GPIO1_DIV_HI+1)个clk */ + } bit; + } PER3_CLK; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * CLK_PLL_SEL * */ + + struct { + __IOM uint32_t PLL_SEL_LOCK : 1; /*!< [0..0] 为1后锁定AHB,QSPI,MCU,RSA的时钟 + 选择,且无法解锁。 */ + __IM uint32_t : 7; + __IOM uint32_t AHB_PLL_SEL : 4; /*!< [11..8] AHB的时钟来源选择 + 0x5: PLL_HSE + Others:PLL_HSI */ + __IM uint32_t : 4; + __IOM uint32_t QSPI_PLL_SEL : 4; /*!< [19..16] QSPI的时钟来源选择 + 0x5: PLL_HSE + Others:PLL_HSI */ + __IM uint32_t : 4; + __IOM uint32_t MCU_PLL_SEL : 4; /*!< [27..24] MCU的时钟来源选择 + 0x5: PLL_HSE + Others:PLL_HSI */ + __IOM uint32_t RSA_PLL_SEL : 4; /*!< [31..28] RSA的时钟来源选择 + 0x5: PLL_HSE + Others:PLL_HSI */ + } bit; + } CLK_PLL_SEL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * OSC32K_CALI * */ + + struct { + __IM uint32_t CNT : 24; /*!< [23..0] time所表示的时间长度内,48M时钟计数值 + 注意：校准时钟源使用的是clk_gpio1_sel选择的 + 48M时钟 */ + __IOM uint32_t START : 1; /*!< [24..24] 校准启动信号 + 写'1'后,延迟1us,再写'0',上升沿触发校准开始 */ + __IM uint32_t DONE : 1; /*!< [25..25] 校准完成信号 + 校准开始后,此信号会变成'0',校准完成后,此信号会变为 + '1' */ + __IM uint32_t : 2; + __IOM uint32_t TIME : 4; /*!< [31..28] 校准持续时长,校准时间长度为(2^cali_ti + me)个 OSC32K 周期 */ + } bit; + } OSC32K_CALI; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * CLK_RSA * */ + + struct { + __IOM uint32_t SEL : 2; /*!< [1..0] RSA时钟来源选择 + 0: cpu + 1: rc192m + 2: pll_out_norm, (192M) + 3: pll_out_max, (256M) */ + __IM uint32_t : 1; + __IOM uint32_t RAND_EN : 1; /*!< [3..3] RSA时钟随机使能 + 0:失能RSA时钟随机 + 1:使能RSA时钟随机 */ + __IOM uint32_t RAND_MASK : 4; /*!< [7..4] DIV_HI和DIV_LO会加上(随机数& RA + ND_MASK) */ + __IOM uint32_t DIV_LO : 4; /*!< [11..8] 输入给RSA的时钟的低电平持续时间 = (DIV + _LO+1)个clk */ + __IOM uint32_t DIV_HI : 4; /*!< [15..12] 输入给RSA的时钟的高电平持续时间 = (DIV + _HI+1)个clk */ + } bit; + } CLK_RSA; +} MRCC_Type; /*!< Size = 44 (0x2c) */ + + + +/* =========================================================================================================================== */ +/* ================ MSYSCTRL ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MSYSCTRL (MSYSCTRL) + */ + +typedef struct { /*!< (@ 0x000F8520) MSYSCTRL Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CHGR_EVENT_IRQ * */ + + struct { + __IOM uint32_t VBAT_LV : 1; /*!< [0..0] ad_lpm_chgr_state_vbat_l + v */ + __IOM uint32_t RCH_EN : 1; /*!< [1..1] ad_lpm_chgr_state_rch_en */ + __IOM uint32_t IND : 1; /*!< [2..2] ad_lpm_chgr_state_ind */ + __IOM uint32_t ICHG : 1; /*!< [3..3] ad_lpm_chgr_state_ichg */ + __IOM uint32_t RESET : 1; /*!< [4..4] ad_lpm_chgr_reset */ + __IOM uint32_t UVLO_OK_AON : 1; /*!< [5..5] ad_lpm_chgr_uvlo_ok_aon */ + __IOM uint32_t PGOOD : 1; /*!< [6..6] ad_lpm_chgr_pgood */ + __IOM uint32_t DPPM_OV_CV : 1; /*!< [7..7] ad_lpm_chgr_dppm_ov_cv */ + __IOM uint32_t DPPM_OV_CC : 1; /*!< [8..8] ad_lpm_chgr_dppm_ov_cc */ + __IOM uint32_t CC_OV_CV : 1; /*!< [9..9] ad_lpm_chgr_cc_ov_cv */ + __IOM uint32_t DET_AON : 1; /*!< [10..10] ad_lpm_chgr_in_det_aon */ + __IOM uint32_t VBAT_OV : 1; /*!< [11..11] ad_lpm_vbat_ov_flag */ + __IOM uint32_t PWK : 1; /*!< [12..12] power key irq */ + __IM uint32_t : 3; + __IOM uint32_t IE : 1; /*!< [16..16] chgr中断使能总开关 */ + __IOM uint32_t EVENT0_EN : 1; /*!< [17..17] chgr_event[9:0]事件检测使能,使能 + 中断前必须先使能这一比特 */ + __IOM uint32_t EVENT1_EN : 1; /*!< [18..18] chgr_event[11:10]事件检测使能, + 使能中断前必须先使能这一比特,power_key一直使能 + ,无法更改 */ + } bit; + } CHGR_EVENT_IRQ; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * CHGR_EVENT_ICTRL * */ + + struct { + __IOM uint32_t VBAT_LV_IE : 1; /*!< [0..0] ad_lpm_chgr_state_vbat_l + v 中断使能 + 0: 禁止 + 1: 使能 */ + __IM uint32_t RCH_EN_IE : 1; /*!< [1..1] ad_lpm_chgr_state_rch_en */ + __IOM uint32_t IND_IE : 1; /*!< [2..2] ad_lpm_chgr_state_ind */ + __IM uint32_t ICHG_IE : 1; /*!< [3..3] ad_lpm_chgr_state_ichg */ + __IOM uint32_t RESET_IE : 1; /*!< [4..4] ad_lpm_chgr_reset */ + __IM uint32_t UVLO_OK_AON_IE : 1; /*!< [5..5] ad_lpm_chgr_uvlo_ok_aon */ + __IOM uint32_t PGOOD_IE : 1; /*!< [6..6] ad_lpm_chgr_pgood */ + __IM uint32_t DPPM_OV_CV_IE : 1; /*!< [7..7] ad_lpm_chgr_dppm_ov_cv */ + __IOM uint32_t DPPM_OV_CC_IE : 1; /*!< [8..8] ad_lpm_chgr_dppm_ov_cc */ + __IM uint32_t CC_OV_CV_IE : 1; /*!< [9..9] ad_lpm_chgr_cc_ov_cv */ + __IOM uint32_t DET_AON_IE : 1; /*!< [10..10] ad_lpm_chgr_in_det_aon */ + __IM uint32_t VBAT_OV_IE : 1; /*!< [11..11] ad_lpm_vbat_ov_flag */ + __IOM uint32_t PWK_IE : 1; /*!< [12..12] power_key */ + __IM uint32_t : 3; + __IOM uint32_t VBAT_LV_IT : 1; /*!< [16..16] ad_lpm_chgr_state_vbat_l + v 中断类型 + 0: 低电平 + 1: 高电平 */ + __IM uint32_t RCH_EN_IT : 1; /*!< [17..17] ad_lpm_chgr_state_rch_en */ + __IOM uint32_t IND_IT : 1; /*!< [18..18] ad_lpm_chgr_state_ind */ + __IM uint32_t ICHG_IT : 1; /*!< [19..19] ad_lpm_chgr_state_ichg */ + __IOM uint32_t RESET_IT : 1; /*!< [20..20] ad_lpm_chgr_reset */ + __IM uint32_t UVLO_OK_AON_IT : 1; /*!< [21..21] ad_lpm_chgr_uvlo_ok_aon */ + __IOM uint32_t PGOOD_IT : 1; /*!< [22..22] ad_lpm_chgr_pgood */ + __IM uint32_t DPPM_OV_CV_IT : 1; /*!< [23..23] ad_lpm_chgr_dppm_ov_cv */ + __IOM uint32_t DPPM_OV_CC_IT : 1; /*!< [24..24] ad_lpm_chgr_dppm_ov_cc */ + __IM uint32_t CC_OV_CV_IT : 1; /*!< [25..25] ad_lpm_chgr_cc_ov_cv */ + __IOM uint32_t DET_AON_IT : 1; /*!< [26..26] ad_lpm_chgr_in_det_aon */ + __IM uint32_t VBAT_OV_IT : 1; /*!< [27..27] ad_lpm_vbat_ov_flag */ + __IOM uint32_t PWK_IT : 1; /*!< [28..28] power_key */ + } bit; + } CHGR_EVENT_ICTRL; + __IOM uint32_t RNG_CTRL; /*!< (@ 0x00000008) * RNG_CTRL * */ + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * RNG_DATA0 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 访问此寄存器可以获得随机数 */ + } bit; + } RNG_DATA0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * RNG_DATA1 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 访问此寄存器可以获得随机数 */ + } bit; + } RNG_DATA1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * RNG_DATA2 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 访问此寄存器可以获得随机数 */ + } bit; + } RNG_DATA2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * RNG_DATA3 * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 访问此寄存器可以获得随机数 */ + } bit; + } RNG_DATA3; + + union { + __IOM uint8_t reg; /*!< (@ 0x0000001C) * rom_switch * */ + + struct { + __IOM uint8_t ROM_SW : 1; /*!< [0..0] 写1后置位,写0无效,模块复位后,恢复到0。(产 + 品阶段固定为1) + 锁定的寄存器： + ALARM_EN + BTM_EN + gpio_ICE + gpio_SWDAT + sfr_ramkey_sel + sfr_medcon_wr + QAES regs */ + __IOM uint8_t LOCK_SEC : 1; /*!< [1..1] loc_sec */ + __IM uint8_t : 1; + __IOM uint8_t DEBUG_EN : 1; /*!< [3..3] 使能DEBUG功能(产品阶段固定为0) + 0: 失能debug功能; + 1: 使能debug功能 */ + __IOM uint8_t LOCK_OTP : 1; /*!< [4..4] lock_otp + 写1锁定寄存器 sfr_otphid_addr / sf + r_otpuser_addr */ + __IOM uint8_t LOCK_ANA : 1; /*!< [5..5] 锁定模拟寄存器 */ + __IOM uint8_t SRAM_NEXE : 1; /*!< [6..6] RAM不能跑程序,写0无效(产品阶段固定为1) */ + __IOM uint8_t ALARM_EN : 1; /*!< [7..7] 报警使能 + 1：使能报警 + 0：失能报警 */ + } bit; + } rom_switch; + __IM uint8_t RESERVED; + __IM uint16_t RESERVED1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * LPM_BUSY_CFG * */ + + struct { + __IOM uint32_t RTC_EN : 1; /*!< [0..0] 0: 总线访问RTC时,不等待RTC完成直接返回 + ,软件查询STATE标志确定是否访问完成 + 1: 总线访问RTC时,等待LPM访问完成才释放总线,软 + 件无须查询STATE标志 */ + __IOM uint32_t LPM_EN : 1; /*!< [1..1] 0: 总线访问LPM时,不等待LPM完成直接返回 + ,软件查询STATE标志确定是否访问完成 + 1: 总线访问LPM时,等待LPM访问完成才释放总线,软 + 件无须查询STATE标志 */ + __IM uint32_t RTC_STATE : 1; /*!< [2..2] 0: rtc access finish + 1: rtc access ongoing */ + __IM uint32_t LPM_STATE : 1; /*!< [3..3] 0: lpm access finish + 1: lpm access ongoing */ + __IM uint32_t AON_STATE : 1; /*!< [4..4] 0: lpm/rtc register acce + ss finish + 1: lpm/rtc register access o + ngoing */ + } bit; + } LPM_BUSY_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * LPM_RDATA * */ + + struct { + __IM uint32_t RDATA : 32; /*!< [31..0] lpm access read data */ + } bit; + } LPM_RDATA; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * RTC_RDATA * */ + + struct { + __IM uint32_t RDATA : 32; /*!< [31..0] rtc access read data */ + } bit; + } RTC_RDATA; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000002C) * AON_RDATA * */ + + struct { + __IM uint32_t RDATA : 32; /*!< [31..0] lpm/rtc access read data + , the last read value of lpm + or rtc */ + } bit; + } AON_RDATA; + __IM uint32_t RESERVED2[4]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) * pwk_state * */ + + struct { + __IM uint32_t STATE : 1; /*!< [0..0] POWER_KEY按键状态 */ + } bit; + } pwk_state; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000044) * VIO_IRQ * */ + + struct { + __IOM uint32_t IE : 1; /*!< [0..0] vio 中断总开关 */ + __IOM uint32_t VIO0_EN : 1; /*!< [1..1] vio0 pgood 中断开关 */ + __IOM uint32_t VIO1_EN : 1; /*!< [2..2] vio1 pgood 中断开关 */ + __IM uint32_t : 1; + __IM uint32_t IRQ_STATE : 1; /*!< [4..4] vio pgood 中断总状态 + 1: vio0或vio1其中之一电压低于配置值 */ + __IOM uint32_t VIO0_IRQ : 1; /*!< [5..5] vio pgood irq 状态 + 1: vio 电压低于配置值,vio_pgood由高变为 + 低 */ + __IOM uint32_t VIO1_IRQ : 1; /*!< [6..6] vio1 pgood irq 状态 + 1: vio1 电压低于配置值,vio1_pgood由高 + 变为低 */ + __IM uint32_t : 1; + __IM uint32_t VIO0_STATUS : 1; /*!< [8..8] vio pgood状态 + 1: vio 电源电压正常 + 0: vio电源电压低于设定值 */ + __IM uint32_t VIO1_STATUS : 1; /*!< [9..9] vio1 pgood状态 + 1: vio1 电源电压正常 + 0: vio1电源电压低于设定值 */ + } bit; + } VIO_IRQ; +} MSYSCTRL_Type; /*!< Size = 72 (0x48) */ + + + +/* =========================================================================================================================== */ +/* ================ MRSTGEN ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MRSTGEN (MRSTGEN) + */ + +typedef struct { /*!< (@ 0x000F8574) MRSTGEN Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * RST_EN * */ + + struct { + __IOM uint32_t SOFT : 1; /*!< [0..0] 1: 使能软件复位功能 */ + __IOM uint32_t WDT : 1; /*!< [1..1] 1: 使能看门狗复位功能 */ + __IM uint32_t : 2; + __IOM uint32_t VDDSEC_U : 1; /*!< [4..4] 1: 使能安全域电源1.2v输出低压自检复位功能 */ + __IOM uint32_t VSEC_O : 1; /*!< [5..5] 1: 使能锂电池3.3v输出高压自检复位功能 */ + __IOM uint32_t VSEC_U : 1; /*!< [6..6] 1: 使能锂电池3.3v输出低压自检复位功能 */ + __IOM uint32_t DVDD_U : 1; /*!< [7..7] 1: 使能纽扣电池1.2v输出低压自检复位功能 */ + __IOM uint32_t VBUT_O : 1; /*!< [8..8] 1: 使能纽扣电池3.3v输出高压自检复位功能 */ + __IOM uint32_t VBUT_U : 1; /*!< [9..9] 1: 使能纽扣电池3.3v输出低压自检复位功能 */ + __IOM uint32_t TS_O : 1; /*!< [10..10] 1: 使能高温自检复位功能 */ + __IOM uint32_t TS_U : 1; /*!< [11..11] 1: 使能低温自检复位功能 */ + __IM uint32_t : 4; + __IOM uint32_t GPIO_SEL : 1; /*!< [16..16] 复位GPIO选择 + 0: ice_rst/m0_dbg_rst复位外设时,不 + 复位GPIO + 1: ice_rst/m0_dbg_rst复位外设时,复 + 位GPIO */ + } bit; + } RST_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * RST_TYPE * */ + + struct { + __IOM uint32_t SOFT : 1; /*!< [0..0] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t WDT : 1; /*!< [1..1] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IM uint32_t : 2; + __IOM uint32_t VDDSEC_U : 1; /*!< [4..4] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t VSEC_O : 1; /*!< [5..5] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t VSEC_U : 1; /*!< [6..6] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t DVDD_U : 1; /*!< [7..7] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t VBUT_O : 1; /*!< [8..8] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t VBUT_U : 1; /*!< [9..9] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t TS_O : 1; /*!< [10..10] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + __IOM uint32_t TS_U : 1; /*!< [11..11] 软件可读写,若对应的复位信号触发,则硬件自动置1 + ,清0需由软件完成。 */ + } bit; + } RST_TYPE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * RESET * */ + + struct { + __OM uint32_t RESET : 8; /*!< [7..0] 复位使能: + 写入 '0x55' ,触发软件复位,sw_rst + 写入 '0x50' ,触发软件复位,ic_rst + 写入 '0xAB“ ,触发sci复位,rst_sci + 写入 '0xAE“ ,触发sci2复位,rst_sci_ + 2 + 写入 '0xC3' ,触发7811复位,rst_7811 */ + } bit; + } RESET; +} MRSTGEN_Type; /*!< Size = 12 (0xc) */ + + + +/* =========================================================================================================================== */ +/* ================ MSECURE ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MSECURE (MSECURE) + */ + +typedef struct { /*!< (@ 0x000F85C0) MSECURE Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL * */ + + struct { + __IOM uint32_t SEC_EN : 8; /*!< [7..0] 1: sensor检测使能。 + [7]: 低温自检,ad_ts_uth/uthb + [6]: 高温自检,ad_ts_oth/othb + [5]: 纽扣电池3.3v输出低压自检,ad_vbat_ + uvh/uvhb + [4]: 纽扣电池3.3v输出高压自检,ad_vbat_ + ovh/ovhb + [3]: 纽扣电池1.2v输出低压自检,ad_dvddl + pm_uvh/uvhb + [2]: 锂电池3.3v输出低压自检,ad_vsec_u + v/uvb + [1]: 锂电池3.3v输出高压自检,ad_vsec_o + v/ovb + [0]: 安全域电源1.2v输出低压自检,ad_vdds + ec_uv/uvb */ + __IOM uint32_t THRESHOLD : 4; /*!< [11..8] sensor检测警报持续时间门限,大于此门限发出 + 警报,否则不报警。 + 时间门限值: (2^sensor_delay)*hclk */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * result * */ + + struct { + __IM uint32_t : 1; + __IM uint32_t STATE : 8; /*!< [8..1] 1: 对应检测项报警。 + [8]: 低温自检警报 + [7]: 高温自检警报 + [6]: 纽扣电池3.3v输出低压自检警报 + [5]: 纽扣电池3.3v输出高压自检警报 + [4]: 纽扣电池1.2v输出低压自检警报 + [3]: 锂电池3.3v输出低压自检警报 + [2]: 锂电池3.3v输出高压自检警报 + [1]: 安全域电源1.2v输出低压自检警报 */ + __IM uint32_t VDDSEC_UVH : 1; /*!< [9..9] 安全域电源1.2v输出低压自检电路结果输出 */ + __IM uint32_t VDDSEC_UHVB : 1; /*!< [10..10] 安全域电源1.2v输出低压自检电路结果输出 */ + __IM uint32_t VSEC_OVH : 1; /*!< [11..11] 锂电池3.3v输出高压自检电路结果输出 */ + __IM uint32_t VSEC_OVHB : 1; /*!< [12..12] 锂电池3.3v输出高压自检电路结果输出 */ + __IM uint32_t VSEC_UVH : 1; /*!< [13..13] 锂电池3.3v输出低压自检电路结果输出 */ + __IM uint32_t VSEC_UHVB : 1; /*!< [14..14] 锂电池3.3v输出低压自检电路结果输出 */ + __IM uint32_t DVDDLPM_UVH : 1; /*!< [15..15] 纽扣电池1.2v输出低压自检电路结果输出 */ + __IM uint32_t DVDDLPM_UVHB : 1; /*!< [16..16] 纽扣电池1.2v输出低压自检电路结果输出 */ + __IM uint32_t VBUT_OVH : 1; /*!< [17..17] 纽扣电池3.3v输出高压自检电路结果输出 */ + __IM uint32_t VBUT_OVHB : 1; /*!< [18..18] 纽扣电池3.3v输出高压自检电路结果输出 */ + __IM uint32_t VBUT_UVH : 1; /*!< [19..19] 纽扣电池3.3v输出低压自检电路结果输出 */ + __IM uint32_t VBUT_UVHB : 1; /*!< [20..20] 纽扣电池3.3v输出低压自检电路结果输出 */ + __IM uint32_t TS_OTH : 1; /*!< [21..21] 高温自检电路结果输出 */ + __IM uint32_t TS_OTHB : 1; /*!< [22..22] 高温自检电路结果输出 */ + __IM uint32_t TS_UTH : 1; /*!< [23..23] 低温自检电路结果输出 */ + __IM uint32_t TS_UTHB : 1; /*!< [24..24] 低温自检电路结果输出 */ + } bit; + } result; + __IM uint32_t RESERVED[2]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * RTC_IE * */ + + struct { + __IOM uint32_t LSI_IE : 1; /*!< [0..0] 1: enable rtc_lsi irq */ + __IOM uint32_t LSE_IE : 1; /*!< [1..1] 1: enable rtc_lse irq */ + __IM uint32_t : 14; + __IM uint32_t LSI_IRQ : 1; /*!< [16..16] rtc_lsi_irq flag, 仅指中断标志 + ,清除需要使用RTC_LSI寄存器 */ + __IM uint32_t LSE_IRQ : 1; /*!< [17..17] rtc_lse_irq flag, 仅指中断标志 + ,清除需要使用RTC_LSE寄存器 */ + } bit; + } RTC_IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * IE * */ + + struct { + __IOM uint32_t IE : 1; /*!< [0..0] SEC中断总开关 + both lpm security events and + core security events will t + rigger secure_irq */ + __IOM uint32_t CORE_IE : 1; /*!< [1..1] CORE SEC中断开关 + 1: enable core security even + t interrupt */ + __IM uint32_t : 14; + __IM uint32_t LPM_IRQ : 1; /*!< [16..16] lpm security irq status */ + } bit; + } IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * SENSOR_CTRL * */ + + struct { + __IOM uint32_t VSEC_EN : 4; /*!< [3..0] 0x5, disable sensor, els + e enable sensor */ + __IOM uint32_t VDDSEC_EN : 4; /*!< [7..4] 0x5, disable sensor, els + e enable sensor */ + __IM uint32_t : 8; + __IOM uint32_t VSEC_L_SEL : 4; /*!< [19..16] threshold voltage select + ion(sim tt 50deg, voltage fr + om low to high): + 0000: 1.938 + 0001: 1.971 + 0010: 2.005 + 0011: 2.040 + 0100: 2.076 + 0101: 2.113 + 0110: 2.152 + 0111: 2.193 + 1000: 2.235 + 1001: 2.278 + 1010: 2.324 + 1011: 2.371 + 1100: 2.420 + 1101: 2.471 + 1110: 2.525 + 1111: 2.580 */ + __IOM uint32_t VSEC_H_SEL : 4; /*!< [23..20] threshold voltage select + ion(sim tt 50deg, voltage fr + om low to high): + 0000: 3.369 + 0001: 3.419 + 0010: 3.469 + 0011: 3.522 + 0100: 3.576 + 0101: 3.631 + 0110: 3.688 + 0111: 3.748 + 1000: 3.809 + 1001: 3.872 + 1010: 3.937 + 1011: 4.005 + 1100: 4.074 + 1101: 4.147 + 1110: 4.222 + 1111: 4.299 */ + __IOM uint32_t VDDSEC_SEL : 4; /*!< [27..24] threshold voltage select + ion(sim tt 50deg, voltage fr + om low to high): + 0000: 867mV + 0001: 887mV + 0010: 907mV + 0011: 927mV + 0100: 947mV + 0101: 967mV + 0110: 987mV + 0111: 1005mV + 1000: 1025mV + 1001: 1045mV + 1010: 1065mV + 1011: 1085mV + 1100: 1105mV + 1101: 1125mV + 1110: 1145mV + 1111: 1165mV */ + } bit; + } SENSOR_CTRL; +} MSECURE_Type; /*!< Size = 28 (0x1c) */ + + + +/* =========================================================================================================================== */ +/* ================ MGPIO ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 8 GPIO (MGPIO) + */ + +typedef struct { /*!< (@ 0x000F8700) MGPIO Structure */ + + union { + __IOM uint8_t reg[80]; /*!< (@ 0x00000000) [0..79] */ + + struct { + __IOM uint8_t FUNC : 6; /*!< [5..0] GPIO function */ + __IOM uint8_t MODE : 2; /*!< [7..6] GPIO mode */ + } bit[80]; + } CTRL; + __IM uint16_t RESERVED[24]; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x00000080) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } INTR; + __IM uint16_t RESERVED1[3]; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x00000090) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } IRQ_LEVEL; + __IM uint16_t RESERVED2[3]; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x000000A0) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } IRQ_RISE; + __IM uint16_t RESERVED3[3]; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x000000B0) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } IRQ_FALL; + __IM uint16_t RESERVED4[3]; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x000000C0) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } IRQ_STATUS; + __IM uint16_t RESERVED5[2]; + __IM uint8_t RESERVED6; + + union { + __IOM uint8_t reg; /*!< (@ 0x000000CF) GPIO_IRQ_INDEX register */ + + struct { + __IM uint8_t INDEX : 8; /*!< [7..0] GPIO_IRQ_INDEX */ + } bit; + } IRQ_NUM; + + union { + __IOM uint16_t reg[5]; /*!< (@ 0x000000D0) [0..4] */ + + struct { + __IOM uint16_t PIN0 : 1; /*!< [0..0] PIN0 */ + __IOM uint16_t PIN1 : 1; /*!< [1..1] PIN1 */ + __IOM uint16_t PIN2 : 1; /*!< [2..2] PIN2 */ + __IOM uint16_t PIN3 : 1; /*!< [3..3] PIN3 */ + __IOM uint16_t PIN4 : 1; /*!< [4..4] PIN4 */ + __IOM uint16_t PIN5 : 1; /*!< [5..5] PIN5 */ + __IOM uint16_t PIN6 : 1; /*!< [6..6] PIN6 */ + __IOM uint16_t PIN7 : 1; /*!< [7..7] PIN7 */ + __IOM uint16_t PIN8 : 1; /*!< [8..8] PIN8 */ + __IOM uint16_t PIN9 : 1; /*!< [9..9] PIN9 */ + __IOM uint16_t PIN10 : 1; /*!< [10..10] PIN10 */ + __IOM uint16_t PIN11 : 1; /*!< [11..11] PIN11 */ + __IOM uint16_t PIN12 : 1; /*!< [12..12] PIN12 */ + __IOM uint16_t PIN13 : 1; /*!< [13..13] PIN13 */ + __IOM uint16_t PIN14 : 1; /*!< [14..14] PIN14 */ + __IOM uint16_t PIN15 : 1; /*!< [15..15] PIN15 */ + } bit[5]; + } IN_LEVEL; + __IM uint16_t RESERVED7[3]; + + union { + __IOM uint8_t reg; /*!< (@ 0x000000E0) GPIO_OD register */ + + struct { + __IOM uint8_t PA10 : 1; /*!< [0..0] GPIO_OD */ + __IOM uint8_t PB6 : 1; /*!< [1..1] GPIO_OD */ + __IOM uint8_t PC1 : 1; /*!< [2..2] GPIO_OD */ + __IOM uint8_t PC8 : 1; /*!< [3..3] GPIO_OD */ + __IOM uint8_t PD0 : 1; /*!< [4..4] GPIO_OD */ + __IOM uint8_t PD12 : 1; /*!< [5..5] GPIO_OD */ + __IOM uint8_t PE12 : 1; /*!< [6..6] GPIO_OD */ + __IOM uint8_t PE6 : 1; /*!< [7..7] GPIO_OD */ + } bit; + } OD_CTRL; + __IM uint8_t RESERVED8; + __IM uint16_t RESERVED9; +} MGPIO_Type; /*!< Size = 228 (0xe4) */ + + + +/* =========================================================================================================================== */ +/* ================ MDMA ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 DMA (MDMA) + */ + +typedef struct { /*!< (@ 0x000F8800) MDMA Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) DMA_SRC_ADDR register */ + + struct { + __OM uint32_t VAL : 32; /*!< [31..0] source address */ + } bit; + } SRC_ADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) DMA_DEST_ADDR register */ + + struct { + __OM uint32_t VAL : 32; /*!< [31..0] dest address */ + } bit; + } DEST_ADDR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) DMA_LEN_LOW register */ + + struct { + __IOM uint32_t RX_LEN_L : 16; /*!< [15..0] buff len */ + __IOM uint32_t TX_LEN_L : 16; /*!< [31..16] buff len */ + } bit; + } LEN_LOW; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) DMA control register */ + + struct { + __IOM uint32_t LOOPBACK : 1; /*!< [0..0] loop back mode */ + __IOM uint32_t INT_MODE : 1; /*!< [1..1] enable interrupt */ + __IOM uint32_t RADDR_LOCK : 1; /*!< [2..2] lock read addr */ + __IOM uint32_t WADDR_LOCK : 1; /*!< [3..3] lock write addr */ + __IM uint32_t : 4; + __IOM uint32_t RX_LEN_H : 4; /*!< [11..8] rx len */ + __IOM uint32_t TX_LEN_H : 4; /*!< [15..12] tx len */ + __IOM uint32_t PP_BUF : 1; /*!< [16..16] flag slave/dcmi */ + __IM uint32_t : 12; + __IOM uint32_t RESET : 1; /*!< [29..29] init write 0,write 1 */ + __IOM uint32_t CLEAR_INT : 1; /*!< [30..30] clear DMA int */ + __IOM uint32_t START : 1; /*!< [31..31] enable DMA */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) DMA status */ + + struct { + __IM uint32_t DONE : 1; /*!< [0..0] DMA status */ + } bit; + } STATUS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) Sends the current address of the BUF read pointer */ + + struct { + __IM uint32_t VAL : 32; /*!< [31..0] Sends the current address of the BUF read pointer */ + } bit; + } RPTR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) received the current address of the BUF read + pointer */ + + struct { + __IM uint32_t VAL : 32; /*!< [31..0] receiced the current address of the BUF read pointer */ + } bit; + } WPRT; +} MDMA_Type; /*!< Size = 28 (0x1c) */ + + + +/* =========================================================================================================================== */ +/* ================ MSPI ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MSPI (MSPI) + */ + +typedef struct { /*!< (@ 0x000F891C) MSPI Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL * */ + + struct { + __IOM uint32_t CLK_DIV : 3; /*!< [2..0] SPICLK 分频系数 (1<0xaa->0x17' + 来设置或者清除 'access_en' */ + } bit; + } ACCESS_CODE; + + union { + __IOM uint32_t reg; /*!< (@ 0x000002A4) * ACCESS_EN * */ + + struct { + __IOM uint32_t ACCESS_EN : 1; /*!< [0..0] 这1bit 只能在ACCESS_CODE设置后写 + 入 + 1: 打开LPM寄存器写入权限 + 0: 关闭LPM寄存器写入权限 + 注：每次退出深度睡眠后,access_code和acce + ss_en会自动清0,必须重新使能 */ + } bit; + } ACCESS_EN; + __IM uint32_t RESERVED9[22]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000300) * BAKEUP_REG0 * */ + + struct { + __IOM uint32_t REG : 32; /*!< [31..0] 复位值是0x5555_5555 */ + } bit; + } BAKEUP_REG0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000304) * BAKEUP_REG1 * */ + + struct { + __IOM uint32_t REG : 32; /*!< [31..0] 复位值是0xaaaa_aaaa */ + } bit; + } BAKEUP_REG1; + __IM uint32_t RESERVED10[6]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000320) * BAKEUP_REG2 * */ + + struct { + __IOM uint32_t REG : 32; /*!< [31..0] 无复位功能寄存器 */ + } bit; + } BAKEUP_REG2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000324) * BAKEUP_REG3 * */ + + struct { + __IOM uint32_t REG : 32; /*!< [31..0] 无复位功能寄存器 */ + } bit; + } BAKEUP_REG3; +} MLPM_Type; /*!< Size = 808 (0x328) */ + + + +/* =========================================================================================================================== */ +/* ================ MBPK ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MBPK (MBPK) + */ + +typedef struct { /*!< (@ 0x000FAC00) MBPK Structure */ + __IOM uint32_t KEY[32]; /*!< (@ 0x00000000) key */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000080) * RST * */ + + struct { + __OM uint32_t RESET : 1; /*!< [0..0] 写1会复位KEY,BPK的配置,SENSOR的配 + 置。 */ + } bit; + } RST; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000084) * CLR * */ + + struct { + __OM uint32_t CLR : 4; /*!< [3..0] 每一bit控制256-bit 的KEY清除 , + 写“1”将清除相应的区域 */ + } bit; + } CLR; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000088) * LR * */ + + struct { + __IOM uint32_t LOCK_READ : 4; /*!< [3..0] 每一bit控制256-bit 的KEY的锁定 , + 写“1”将锁定读取相应的区域 */ + } bit; + } LR; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000008C) * LW * */ + + struct { + __IOM uint32_t LOCK_WRITE : 4; /*!< [3..0] 每一bit控制256-bit 的KEY的锁定 , + 写“1”将锁定写入相应的区域 */ + } bit; + } LW; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000090) * LOCK * */ + + struct { + __IOM uint32_t LOCK_SELF : 1; /*!< [0..0] 1:锁定LOCK寄存器本身(通常用于配置好其他的 + 锁定过后,且无法解锁) */ + __IOM uint32_t LKW_LOCK : 1; /*!< [1..1] 1:锁定LOCK_WRITE寄存器 */ + __IOM uint32_t LKR_LOCK : 1; /*!< [2..2] 1:锁定LOCK_READ寄存器 */ + __IOM uint32_t CLR_LOCK : 1; /*!< [3..3] 1:锁定CLR寄存器 */ + __IOM uint32_t RESET_LOCK : 1; /*!< [4..4] 1:锁定RESET寄存器 */ + } bit; + } LOCK; +} MBPK_Type; /*!< Size = 148 (0x94) */ + + + +/* =========================================================================================================================== */ +/* ================ MSEC ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MSEC (MSEC) + */ + +typedef struct { /*!< (@ 0x000FAE00) MSEC Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * LC * */ + + struct { + __IOM uint32_t VAL : 8; /*!< [7..0] 仅支持比特置1操作,不支持清0回退 + 0x01: 上电非安全状态 + 其他值：用户自定义 */ + } bit; + } LC; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * LOCK * */ + + struct { + __IOM uint32_t LOCK_SELF : 1; /*!< [0..0] 1:锁定LOCK寄存器本身(通常用于配置好其他的 + 锁定过后,且无法解锁) */ + __IOM uint32_t ACTION : 1; /*!< [1..1] 1:锁定 ALERT_ACTION寄存器 */ + __IOM uint32_t TAMPER : 1; /*!< [2..2] 1:锁定TAMP_EN/TAMP_CTRL/TA + MP_STA_CTRL/TAMP_DYN_CTRL寄存器 */ + __IOM uint32_t SENSOR : 1; /*!< [3..3] 1:锁定SENSOR_EN/SENSOR_CTR + L/SENSOR_THRES寄存器 */ + __IOM uint32_t SHIELD : 1; /*!< [4..4] 1:锁定SHIELD_EN/SHIELD_CTR + L寄存器 */ + } bit; + } LOCK; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * ALERT_FILT * */ + + struct { + __IM uint32_t CNT : 4; /*!< [3..0] 当TAMPER/SENSOR/SHIELD的报警 + 发生时cnt寄存器会加1 */ + __IM uint32_t : 4; + __IOM uint32_t THOLD : 4; /*!< [11..8] 当THOLD的配置大于等于CNT的值的时候会触发 + ALERT_ACTION */ + __IM uint32_t : 4; + __OM uint32_t CNT_CLR : 1; /*!< [16..16] 写1 清除CNT寄存器的是值 */ + } bit; + } ALERT_FILT; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * ALERT_ACTION * */ + + struct { + __IOM uint32_t CLEAR_KEY : 4; /*!< [3..0] 当ALERT_ACTION发生时,除了该寄存器配 + 置成0x5能失能清除秘钥动作,其他配置都会导致清除秘钥 + */ + __IM uint32_t : 12; + __IOM uint32_t RESET_SYSTEM : 4; /*!< [19..16] 当ALERT_ACTION发生时,除了该寄存器配 + 置成0x5能失能复位系统动作,其他配置都会导致复位系统 + */ + } bit; + } ALERT_ACTION; + __IM uint32_t RESERVED[4]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * SOFT_ATTACK_EN * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] 置‘1’后无法清0 + 1: 使能soft_attack功能 */ + } bit; + } SOFT_ATTACK_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * SOFT_ATTACK_LOCK * */ + + struct { + __IOM uint32_t LOCK : 1; /*!< [0..0] 软件攻击锁定 + 0: 解锁 soft attack + 1: 锁定 soft attack + 注：写此寄存器可置1和清0,写其他任意寄存器,此寄存器 + �� + 置1 */ + } bit; + } SOFT_ATTACK_LOCK; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * SOFT_ATTACK * */ + + struct { + __OM uint32_t TRIGGER : 1; /*!< [0..0] 写1触发软件攻击 + 注：必须先写soft_attack_lock为0,再写此 + 寄存器,中间不能插入其他寄存器读写操作 */ + __IM uint32_t : 3; + __IOM uint32_t TYPE : 4; /*!< [7..4] soft_attack位检测到1时,锁存写数据的 + 比特7到4 */ + } bit; + } SOFT_ATTACK; + __IM uint32_t RESERVED1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000030) * IE * */ + + struct { + __IOM uint32_t TAMPER : 1; /*!< [0..0] 1:使能TAMPER触发中断 */ + __IOM uint32_t SENSOR : 1; /*!< [1..1] 1:使能SENSOR触发中断 */ + __IOM uint32_t SHIELD : 1; /*!< [2..2] 1:使能SHIELD触发中断 */ + __IOM uint32_t SOFT_ATTACK : 1; /*!< [3..3] 1:使能soft attact触发中断 */ + __IOM uint32_t KEY_CLEAR : 1; /*!< [4..4] 1:使能清除秘钥触发中断 */ + } bit; + } IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000034) * IRQ * */ + + struct { + __IOM uint32_t TAMPER : 1; /*!< [0..0] 写‘1’清除TAMPER中断状态 */ + __IOM uint32_t SENSOR : 1; /*!< [1..1] 写‘1’清除SENSOR中断状态 */ + __IOM uint32_t SHIELD : 1; /*!< [2..2] 写‘1’清除SHIELD中断状态 */ + __IOM uint32_t SOFT_ATTACK : 1; /*!< [3..3] 写‘1’清除SOFT_ATTACK中断状态 */ + __IOM uint32_t KEY_CLEAR : 1; /*!< [4..4] 写‘1’清除KEY_CLEAR中断状态 */ + } bit; + } IRQ; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000038) * STATUS * */ + + struct { + __IM uint32_t TAMP_ALARM : 8; /*!< [7..0] TAMPER中断状态,每1BIT代表一个TAMP + ER触发中断 */ + __IM uint32_t SENSOR_ALARM : 1; /*!< [8..8] SENSOR中断状态 */ + __IM uint32_t : 7; + __IM uint32_t SHIELD_ALARM : 1; /*!< [16..16] SHIELD中断状态 */ + __IM uint32_t SOFT_ATTACK : 1; /*!< [17..17] 软件攻击中断状态 */ + __IM uint32_t KEY_CLEAR : 1; /*!< [18..18] 清除秘钥中断状态 */ + } bit; + } STATUS; + __IM uint32_t RESERVED2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) * TAMP_EN * */ + + struct { + __IOM uint32_t TAMP_0 : 4; /*!< [3..0] TAMPER0 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_1 : 4; /*!< [7..4] TAMPER1 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_2 : 4; /*!< [11..8] TAMPER2 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_3 : 4; /*!< [15..12] TAMPER3 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_4 : 4; /*!< [19..16] TAMPER4 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_5 : 4; /*!< [23..20] TAMPER5 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_6 : 4; /*!< [27..24] TAMPER6 使能 + 0x5:使能 + Others:使能 */ + __IOM uint32_t TAMP_7 : 4; /*!< [31..28] TAMPER7 使能 + 0x5:使能 + Others:使能 */ + } bit; + } TAMP_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000044) * TAMP_CTRL * */ + + struct { + __IOM uint32_t MODE : 4; /*!< [3..0] TAMPER IO模式(每1BIT控制两个IO, + 按顺序对应IO0~7) + 0:静态模式 + 1:动态模式 */ + __IM uint32_t : 4; + __IOM uint32_t IE : 8; /*!< [15..8] TAMPER IO使能 + 动态模式,输入管脚需要使能IE,输出管脚不需要 + 静态模式,所有管脚均需要使能IE,PULL_AUTO为1 + 时,自动在静态检测期间使能IE,其他时间禁止IE,以减少 + 功耗 */ + __IOM uint32_t PD_EN : 8; /*!< [23..16] TAMPER IO下拉使能(每1BIT对应控制一 + 个 TAMPER IO) + 动态模式:需要把输入脚上拉或下拉 + 静态模式:把对应IO下拉,PULL_AUTO为1时,自动 + 在静态检测期间使能下拉,其他时间禁止下拉,以减少功� + */ + __IOM uint32_t PU_EN : 8; /*!< [31..24] TAMPER IO上拉使能(每1BIT对应控制一 + 个 TAMPER IO) + 动态模式:需要把输入脚上拉或下拉 + 静态模式:把对应IO上拉,PULL_AUTO为1时,自动 + 在静态检测期间使能上拉,其他时间禁止上拉,以减少功� + + 注：Tamper IO 上电默认开启上拉,每个IO上拉或 + 下拉只能选择一个 */ + } bit; + } TAMP_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) * TAMP_STA_CTRL * */ + + struct { + __IOM uint32_t PERIOD : 2; /*!< [1..0] 静态检测周期 + 0: 32ms + 1: 125ms + 2: 500ms + 3: 0.9999s */ + __IOM uint32_t CHK_WIN : 2; /*!< [3..2] 窗口内采样过滤选择 + 0: 窗口内进行一次采样,一次采样成功即触发窗口报警 + 1: 窗口内进行两次采样,连续两次采样成功即触发窗口报 + �� + 2: 窗口内进行三次采样,连续三次采样成功即触发窗口报 + �� + 3: 窗口内进行四次采样,连续四次采样成功即触发窗口报 + �� */ + __IOM uint32_t FILT_WIN : 2; /*!< [5..4] 静态检测窗口报警过滤选择 + 0: 一个窗口检测到报警即为报警 + 1: 连续两个窗口检测到报警即为报警 + 2: 连续三个窗口检测到报警即为报警 + 3: 连续四个窗口检测到报警即为报警 */ + __IM uint32_t : 2; + __IOM uint32_t PROT_EN : 1; /*!< [8..8] 静态报警触发后,IO是否启动自动保护 + 0: 不开启 ,继续进行检测 + 1: 开启 ,停止检测,进入保护模式,保护模式由PROT + _MODE确定 */ + __IOM uint32_t PROT_MODE : 1; /*!< [9..9] 静态报警触发后,保护模式选择 + 0: 引脚处于高阻状态 + 1: 引脚自动上下拉（取决于外部电平） */ + __IOM uint32_t PULL_AUTO : 1; /*!< [10..10] 0: 静态上下拉由软件控制 + 1: 静态上下拉只在配置工作期间有效,由硬件自动控制 */ + __IM uint32_t : 9; + __IOM uint32_t CHK_GAP : 2; /*!< [21..20] 静态检测间隔 + 0: 1ms + 1: 2ms + 2: 4ms + 3: 8ms */ + __IOM uint32_t CHK_DLY : 2; /*!< [23..22] 静态上下拉开启后,延迟多长时间后进行检测 + 0: 1ms + 1: 4ms + 2: 8ms + 3: 16ms */ + __IOM uint32_t ALERT_LEVEL : 8; /*!< [31..24] 分别对应8个引脚的静态报警电平 + 0: 低电平报警 + 1: 高电平报警 */ + } bit; + } TAMP_STA_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) * TAMP_DYN_CTRL * */ + + struct { + __IOM uint32_t PERIOD : 2; /*!< [1..0] 动态检测周期 + 0: 32ms + 1: 125ms + 2: 500ms + 3: 0.9999s */ + __IOM uint32_t CHK_WIN : 2; /*!< [3..2] 窗口内采样过滤选择 + 0: 窗口内进行一次采样,一次采样成功即触发窗口报警 + 1: 窗口内进行两次采样,连续两次采样成功即触发窗口报 + �� + 2: 窗口内进行三次采样,连续三次采样成功即触发窗口报 + �� + 3: 窗口内进行四次采样,连续四次采样成功即触发窗口报 + �� */ + __IM uint32_t : 4; + __IOM uint32_t PROT_EN : 1; /*!< [8..8] 动态报警触发后,IO是否启动自动保护 + 0: 不开启 + 1: 开启 ,保护模式由PROT_MODE确定 */ + __IOM uint32_t PROT_MODE : 1; /*!< [9..9] 动态报警触发后,保护模式选择 + 0: 引脚处于高阻状态 + 1: 引脚自动上下拉（取决于外部电平） */ + } bit; + } TAMP_DYN_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000050) * TAMP_IO_STATUS * */ + + struct { + __IM uint32_t IE : 8; /*!< [7..0] IO IE状态 */ + __IM uint32_t OEN : 8; /*!< [15..8] IO使能状态 */ + __IM uint32_t PD : 8; /*!< [23..16] IO下拉状态 */ + __IM uint32_t PU : 8; /*!< [31..24] IO上拉状态 */ + } bit; + } TAMP_IO_STATUS; + __IM uint32_t RESERVED3[11]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000080) * SENSOR_EN * */ + + struct { + __IOM uint32_t VBUT_1_2_EN : 4; /*!< [3..0] 纽扣电池1.2V输出电压传感器使能: + 0x5:失能 + Others:使能 */ + __IOM uint32_t VBUT_3_3_EN : 4; /*!< [7..4] 纽扣电池3.3V输入电压传感器使能: + 0x5:失能 + Others:使能 */ + __IOM uint32_t TEMP_EN : 4; /*!< [11..8] 温度传感器使能: + 0x5:失能 + Others:使能 */ + } bit; + } SENSOR_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000084) * SENSOR_CTRL * */ + + struct { + __IM uint32_t : 16; + __IOM uint32_t DUR : 2; /*!< [17..16] Sensor检测时间长度。 + 00: always on + 01: 2ms + 10: 8ms + 11: 16ms */ + __IOM uint32_t DELAY : 2; /*!< [19..18] 警报持续时间门限,大于门限的信号,将触发报警。用 + 于滤除毛刺,防止虚警。 + 00: 1*(1/32k)=31.25us + 01: 8*(1/32k)=250us + 10: 32*(1/32k)=1ms + 11: 128*(1/32k)=4ms + 注：这个时间必须小于sensor_duration时间 */ + __IM uint32_t : 4; + __IOM uint32_t CHK_EN : 5; /*!< [28..24] 传感器检测使能 + [4]: 低温检测使能 + [3]: 高温检测使能 + [2]: 纽扣电池3.3v输出低压检测使能 + [1]: 纽扣电池3.3v输出高压检测使能 + [0]: 纽扣电池1.2v输出低压检测使能 */ + } bit; + } SENSOR_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000088) * SENSOR_THRES * */ + + struct { + __IOM uint32_t DVDDLPM_L : 4; /*!< [3..0] 纽扣电池1.2V输出电压低报警设置 + 报警值等于 0.83+DVDDLPM_L*0.02 */ + __IM uint32_t : 4; + __IOM uint32_t VBUT_L : 4; /*!< [11..8] 纽扣电池3.3V输入电压低报警设置 + 0000: 1.938 + 0001: 1.971 + 0010: 2.005 + 0011: 2.040 + 0100: 2.076 + 0101: 2.113 + 0110: 2.152 + 0111: 2.193 + 1000: 2.235 + 1001: 2.278 + 1010: 2.324 + 1011: 2.371 + 1100: 2.420 + 1101: 2.471 + 1110: 2.525 + 1111: 2.580 */ + __IOM uint32_t VBUT_H : 4; /*!< [15..12] 纽扣电池3.3V输入电压高报警设置 + 0000: 3.471 + 0001: 3.577 + 0010: 3.690 + 0011: 3.810 + 0100: 3.938 + 0101: 4.076 + 0110: 4.223 + 0111: 4.381 + 1000: 4.552 + 1001: 4.736 + 1010: 4.936 + 1011: 5.154 + 1100: 5.392 + 1101: 5.653 + 1110: 5.926 + 1111: 6.115 */ + __IOM uint32_t TS_UTC : 3; /*!< [18..16] 低温报警温度设置 + 0: -40 + 1: -35 + 2: -30 + 3: -25 + 4: -20 */ + __IM uint32_t : 1; + __IOM uint32_t TS_OTC : 3; /*!< [22..20] 高温报警温度设置 + 0: 85 + 1: 90 + 2: 95 + 3: 100 + 4: 105 */ + } bit; + } SENSOR_THRES; + __IM uint32_t RESERVED4[13]; + + union { + __IOM uint32_t reg; /*!< (@ 0x000000C0) * SHIELD_EN * */ + + struct { + __IOM uint32_t EN_0 : 4; /*!< [3..0] SHIELD 0使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_1 : 4; /*!< [7..4] SHIELD 1使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_2 : 4; /*!< [11..8] SHIELD 2使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_3 : 4; /*!< [15..12] SHIELD 3使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_4 : 4; /*!< [19..16] SHIELD 4使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_5 : 4; /*!< [23..20] SHIELD 5使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_6 : 4; /*!< [27..24] SHIELD 6使能 + 0x5 :失能 + Others: 使能 */ + __IOM uint32_t EN_7 : 4; /*!< [31..28] SHIELD 7使能 + 0x5 :失能 + Others: 使能 */ + } bit; + } SHIELD_EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x000000C4) * SHIELD_CTRL * */ + + struct { + __IOM uint32_t PERIOD : 2; /*!< [1..0] Shield工作周期 + 0: 32ms + 1: 125ms + 2: 500ms + 3: 0.9999s */ + __IM uint32_t : 6; + __IOM uint32_t CHK_WIN : 2; /*!< [9..8] 窗口内采样过滤选择 + 0: 窗口内进行一次采样,一次采样成功即触发窗口报警 + 1: 窗口内进行两次采样,连续两次采样成功即触发窗口报 + �� + 2: 窗口内进行三次采样,连续三次采样成功即触发窗口报 + �� + 3: 窗口内进行四次采样,连续四次采样成功即触发窗口报 + �� */ + } bit; + } SHIELD_CTRL; +} MSEC_Type; /*!< Size = 200 (0xc8) */ + + + +/* =========================================================================================================================== */ +/* ================ MRTC ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MRTC (MRTC) + */ + +typedef struct { /*!< (@ 0x000FAF00) MRTC Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * EN * */ + + struct { + __IOM uint32_t VAL : 1; /*!< [0..0] 1: 使能RTC 0:失能RTC */ + } bit; + } EN; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * SEC_CNT * */ + + struct { + __IOM uint32_t VAL : 16; /*!< [15..0] 设置一秒校准值 */ + } bit; + } SEC_CNT; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * IE * */ + + struct { + __IOM uint32_t SEC : 1; /*!< [0..0] 1: 允许秒中断 0:禁止秒中断 */ + __IOM uint32_t ALARM : 1; /*!< [1..1] 1: 允许闹钟中断 0:禁止闹钟中断 */ + } bit; + } IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * IRQ_STATUS * */ + + struct { + __IOM uint32_t SEC : 1; /*!< [0..0] 1: 秒中断,scnd_ie为0时也会置位,但不 + 会触发中断 */ + __IOM uint32_t ALARM : 1; /*!< [1..1] 1: 闹钟中断,clk_alm_ie为0时也会置 + 位,但不会触发中断 */ + } bit; + } IRQ_STATUS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * ALARM * */ + + struct { + __IOM uint32_t IRQPREVAL : 32; /*!< [31..0] 闹钟中断预设值 */ + } bit; + } ALARM; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * TIME * */ + + struct { + __IOM uint32_t VAL : 32; /*!< [31..0] 读操作读取当前RTC计数器值 + 写操作改写当前RTC计数器值,仅支持32-bit操作 */ + } bit; + } TIME; +} MRTC_Type; /*!< Size = 24 (0x18) */ + + + +/* =========================================================================================================================== */ +/* ================ MADC ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MADC (MADC) + */ + +typedef struct { /*!< (@ 0x000FBB00) MADC Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * CTRL1 * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] adc模块数字开关 + 0: 失能ADC模块 + 1: 使能ADC模块 */ + __IOM uint32_t AWD_EN : 1; /*!< [1..1] ADC看门狗使能,ADC采样值超过看门狗门限时会 + 触发ADC看门狗中断 + 0::失能 + 1::使能 */ + __IOM uint32_t SAMP_EDGE : 1; /*!< [2..2] ADC采样边沿选择 + 0:下降沿采样 + 1: 上升沿采样 */ + } bit; + } CTRL1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * CTRL2 * */ + + struct { + __OM uint32_t SGL_START : 1; /*!< [0..0] 软件写'1',启动一次ADC采(仅在SAMP_M + ODE为0时生效) */ + __IM uint32_t : 7; + __IOM uint32_t SAMP_MODE : 1; /*!< [8..8] 采样模式 + 0:单次采样模式 + 1:连续采样模式 */ + __IM uint32_t : 7; + __IOM uint32_t TRIG_EN : 9; /*!< [24..16] 定时器溢出触发ADC采样(仅适用于单次采样模式) + 0:失能 + 1:使能 */ + } bit; + } CTRL2; + __IM uint32_t RESERVED[2]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * IE * */ + + struct { + __IOM uint32_t DONE : 1; /*!< [0..0] 采样结束中断使能 + 0:失能 + 1.使能 */ + __IOM uint32_t FIFO_OVER : 1; /*!< [1..1] FIFO数据超过FIFO_LIMIT中断使能 + 0:失能 + 1.使能 */ + __IOM uint32_t FIFO_FULL : 1; /*!< [2..2] FIFO数据溢出中断使能 + 0:失能 + 1.使能 */ + __IOM uint32_t AWD : 1; /*!< [3..3] ADC看门狗中断使能 + 0:失能 + 1.使能 */ + } bit; + } IE; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * STATUS * */ + + struct { + __IOM uint32_t DONE : 1; /*!< [0..0] 采样结束中断状态,写1清除中断 */ + __IOM uint32_t FIFO_OVER : 1; /*!< [1..1] FIFO数据超过FIFO_LIMIT中断状态,写 + 1清除中断 */ + __IOM uint32_t FIFO_FULL : 1; /*!< [2..2] FIFO数据溢出中断状态,写1清除中断 */ + __IOM uint32_t AWD : 1; /*!< [3..3] ADC看门狗中断状态,写1清除中断 */ + } bit; + } STATUS; + __IM uint32_t RESERVED1[2]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * FIFO_CTRL * */ + + struct { + __IOM uint32_t LIMIT : 5; /*!< [4..0] 当LIMIT>0,且ITEMS>=LIMIT时触 + 发FIFO_OVER中断 */ + __IM uint32_t : 3; + __IM uint32_t ITEMS : 5; /*!< [12..8] FIFO中的有效数据量 */ + __IM uint32_t : 3; + __IOM uint32_t RST : 1; /*!< [16..16] ADC FIFO复位 */ + __IOM uint32_t EN : 1; /*!< [17..17] ADC FIFO使能 + 1:ADC数据有效转换值会写入FIFO + 0:ADC数据有效转换值不会写入FIFO */ + } bit; + } FIFO_CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * FIFO * */ + + struct { + __IM uint32_t DATA : 13; /*!< [12..0] 使用FIFO时的ADC取数寄存器(未使能电压转换 + 功能时,读到的为原始AD值;使能电压转换功能时,读到的� + + 电压值的二进制补码,单位为mv) */ + } bit; + } FIFO; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * DATA * */ + + struct { + __IM uint32_t VAL : 13; /*!< [12..0] 不使用FIFO时的ADC取数寄存器(未使能电压转 + 换功能时,读到的为原始AD值;使能电压转换功能时,读到� + + 为电压值的二进制补码,单位为mv) */ + } bit; + } DATA; + __IM uint32_t RESERVED2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000030) * AWD * */ + + struct { + __IOM uint32_t LOW_LIMIT : 13; /*!< [12..0] ADC看门狗的低阈值(使能电压转换时,需同时启用 + 负电压归零功能才能使用ADC看门狗功能) */ + __IM uint32_t : 3; + __IOM uint32_t HIGH_LIMIT : 13; /*!< [28..16] ADC看门狗的高阈值(使能电压转换时,需同时启用 + 负电压归零功能才能使用ADC看门狗功能) */ + } bit; + } AWD; + __IM uint32_t RESERVED3[3]; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) * REF_AD * */ + + struct { + __IOM uint32_t VAL : 10; /*!< [9..0] 基准电压AD值 */ + } bit; + } REF_AD; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000044) * REF_VOL * */ + + struct { + __IOM uint32_t VAL : 13; /*!< [12..0] 基准电压(mV) */ + } bit; + } REF_VOL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) * SLOPE * */ + + struct { + __IOM uint32_t VAL : 10; /*!< [9..0] 电压转换斜率((vol_high-vol_low + )/(vol_high_ref-vol_low_ref) + )*64计算得到的10-bit整数值 */ + } bit; + } SLOPE; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) * CONVERT_CTRL * */ + + struct { + __IOM uint32_t EN : 1; /*!< [0..0] 电压转换功能开关 + 1: 使能电压转换 + 0: 失能电压转换(输出原始ADC采样值) */ + __IOM uint32_t NEG_ZERO : 1; /*!< [1..1] 负电压归零控制(写1时,负电压以0V输出) */ + } bit; + } CONVERT_CTRL; +} MADC_Type; /*!< Size = 80 (0x50) */ + + + +/* =========================================================================================================================== */ +/* ================ MISO7811 ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief MISO7811 (MISO7811) + */ + +typedef struct { /*!< (@ 0x000F8F00) MISO7811 Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) * BASE_ADDR_T1 * */ + + struct { + __IOM uint32_t ISO_BASE_ADDR : 20; /*!< [19..0] Character write base add + ress for track 1 */ + } bit; + } BASE_ADDR_T1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) * BASE_ADDR_T2 * */ + + struct { + __IOM uint32_t ISO_BASE_ADDR : 20; /*!< [19..0] Character write base add + ress for track 2 */ + } bit; + } BASE_ADDR_T2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) * BASE_ADDR_T3 * */ + + struct { + __IOM uint32_t ISO_BASE_ADDR : 20; /*!< [19..0] Character write base add + ress for track 3 */ + } bit; + } BASE_ADDR_T3; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) * CTRL * */ + + struct { + __IOM uint32_t RX_EN : 1; /*!< [0..0] 7811 decoder enable */ + __IOM uint32_t T1_IRQ_EN : 1; /*!< [1..1] 7811 track 1 interrupt + enable */ + __IOM uint32_t T1_CLR_IRQ : 1; /*!< [2..2] Clear 7811 track 1 inter + rupt */ + __IOM uint32_t T2_IRQ_EN : 1; /*!< [3..3] 7811 track 2 interrupt + enable */ + __IOM uint32_t T2_CLR_IRQ : 1; /*!< [4..4] Clear 7811 track 2 inter + rupt */ + __IOM uint32_t T3_IRQ_EN : 1; /*!< [5..5] 7811 track 3 interrupt + enable */ + __IOM uint32_t T3_CLR_IRQ : 1; /*!< [6..6] Clear 7811 track 3 inter + rupt */ + __IOM uint32_t SOFT_RESET : 1; /*!< [7..7] soft reset for AHB bus c + ontrol */ + __IOM uint32_t TIMER_EN : 1; /*!< [8..8] Timer enable */ + __IOM uint32_t TIMER_IRQ_EN : 1; /*!< [9..9] 7811 timer interrupt ena + ble */ + __IOM uint32_t TIMER_CLR_IRQ : 1; /*!< [10..10] Clear 7811 timer interru + pt */ + __IOM uint32_t T1_DC_CANCEL_EN : 1; /*!< [11..11] Enable DC cancellation f + or track 1 */ + __IOM uint32_t T1_DC_CALC_WIN : 2; /*!< [13..12] DC calculation window co + nfiguration for track 1 */ + __IOM uint32_t T2_DC_CANCEL_EN : 1; /*!< [14..14] Enable DC cancellation f + or track 2 */ + __IOM uint32_t T2_DC_CALC_WIN : 2; /*!< [16..15] DC calculation window co + nfiguration for track 2 */ + __IOM uint32_t T3_DC_CANCEL_EN : 1; /*!< [17..17] Enable DC cancellation f + or track 3 */ + __IOM uint32_t T3_DC_CALC_WIN : 2; /*!< [19..18] DC calculation window co + nfiguration for track 3 */ + __IOM uint32_t T1_CHANNEL_SEL : 2; /*!< [21..20] Channel select signal fo + r track 1 */ + __IOM uint32_t T2_CHANNEL_SEL : 2; /*!< [23..22] Channel select signal fo + r track 2 */ + __IOM uint32_t T3_CHANNEL_SEL : 2; /*!< [25..24] Channel select signal fo + r track 3 */ + __IOM uint32_t T1_BUFFULL_IRQ_EN : 1; /*!< [26..26] 7811 track 1 buffer full + interrupt enable */ + __IOM uint32_t T1_BUFFULL_CLR_IRQ : 1; /*!< [27..27] Clear 7811 track 1 buffe + r full interrupt */ + __IOM uint32_t T2_BUFFULL_IRQ_EN : 1; /*!< [28..28] 7811 track 2 buffer full + interrupt enable */ + __IOM uint32_t T2_BUFFULL_CLR_IRQ : 1; /*!< [29..29] Clear 7811 track 2 buffe + r full interrupt */ + __IOM uint32_t T3_BUFFULL_IRQ_EN : 1; /*!< [30..30] 7811 track 3 buffer full + interrupt enable */ + __IOM uint32_t T3_BUFFULL_CLR_IRQ : 1; /*!< [31..31] Clear 7811 track 3 buffe + r full interrupt */ + } bit; + } CTRL; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) * T1_PEAK_VALUE_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 9; /*!< [8..0] Initial peak value thres + hold */ + __IOM uint32_t ALPHA : 4; /*!< [12..9] Coefficient for peak val + ue update IIR filter */ + __IOM uint32_t THLD_RATIO : 4; /*!< [16..13] Peak value threshold rat + io */ + } bit; + } T1_PEAK_VALUE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) * T1_PEAK_WIDTH_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 15; /*!< [14..0] Initial peak value thres + hold */ + __IM uint32_t : 1; + __IOM uint32_t UPDATA_RATIO1 : 4; /*!< [19..16] Pulse width update ratio + 1 */ + __IOM uint32_t UPDATA_RATIO2 : 4; /*!< [23..20] Pulse width update ratio + 2 */ + __IOM uint32_t UPDATA_RATIO3 : 4; /*!< [27..24] Pulse width update ratio + 3 */ + __IOM uint32_t UPDATA_RATIO4 : 4; /*!< [31..28] Pulse width update ratio + 4 */ + } bit; + } T1_PEAK_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) * T1_PULSE_WIDTH_CFG * */ + + struct { + __IOM uint32_t SYNC_ZERO_WIN : 3; /*!< [2..0] Synchronized zero judgem + ent window */ + __IOM uint32_t PULSE_WID_MAX : 15; /*!< [17..3] Maximum pulse width valu + e */ + __IOM uint32_t PULSE_WID_BETA : 4; /*!< [21..18] Coefficient for pulse wi + dth threshold IIR filter */ + __IM uint32_t : 2; + __IOM uint32_t PEAK_SEL_RATIO1 : 4; /*!< [27..24] Pulse width thld ratio1 + for peak select */ + __IOM uint32_t PEAK_SEL_RATIO2 : 4; /*!< [31..28] Pulse width thld ratio2 + for peak select */ + } bit; + } T1_PULSE_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000001C) * T1_DECODE_CFG * */ + + struct { + __IOM uint32_t RATIO1 : 4; /*!< [3..0] Pulse width threshold1 f + or decode */ + __IOM uint32_t RATIO2 : 4; /*!< [7..4] Pulse width threshold2 f + or decode */ + __IOM uint32_t RATIO3 : 4; /*!< [11..8] Pulse width threshold3 f + or decode */ + __IOM uint32_t RATIO4 : 4; /*!< [15..12] Pulse width threshold4 f + or decode */ + __IOM uint32_t RATIO5 : 4; /*!< [19..16] Pulse width threshold5 f + or decode */ + __IOM uint32_t RATIO6 : 4; /*!< [23..20] Pulse width threshold6 f + or decode */ + __IOM uint32_t RATIO7 : 4; /*!< [27..24] Pulse width threshold7 f + or decode */ + __IOM uint32_t RATIO8 : 4; /*!< [31..28] Pulse width threshold8 f + or decode */ + } bit; + } T1_DECODE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000020) * T2_PEAK_VALUE_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 9; /*!< [8..0] Initial peak value thres + hold */ + __IOM uint32_t ALPHA : 4; /*!< [12..9] Coefficient for peak val + ue update IIR filter */ + __IOM uint32_t THLD_RATIO : 4; /*!< [16..13] Peak value threshold rat + io */ + } bit; + } T2_PEAK_VALUE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000024) * T2_PEAK_WIDTH_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 15; /*!< [14..0] Initial peak value thres + hold */ + __IM uint32_t : 1; + __IOM uint32_t PULSE_WID_RATIO1 : 4; /*!< [19..16] Pulse width update ratio + 1 */ + __IOM uint32_t PULSE_WID_RATIO2 : 4; /*!< [23..20] Pulse width update ratio + 2 */ + __IOM uint32_t PULSE_WID_RATIO3 : 4; /*!< [27..24] Pulse width update ratio + 3 */ + __IOM uint32_t PULSE_WID_RATIO4 : 4; /*!< [31..28] Pulse width update ratio + 4 */ + } bit; + } T2_PEAK_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000028) * T2_PULSE_WIDTH_CFG * */ + + struct { + __IOM uint32_t SYNC_ZERO_WIN : 3; /*!< [2..0] Synchronized zero judgem + ent window */ + __IOM uint32_t PULSE_WID_MAX : 15; /*!< [17..3] Maximum pulse width valu + e */ + __IOM uint32_t PULSE_WID_BETA : 4; /*!< [21..18] Coefficient for pulse wi + dth threshold IIR filter */ + __IM uint32_t : 2; + __IOM uint32_t PEAK_SEL_RATIO1 : 4; /*!< [27..24] Pulse width thld ratio1 + for peak select */ + __IOM uint32_t PEAK_SEL_RATIO2 : 4; /*!< [31..28] Pulse width thld ratio2 + for peak select */ + } bit; + } T2_PULSE_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000002C) * T2_DECODE_CFG * */ + + struct { + __IOM uint32_t RATIO1 : 4; /*!< [3..0] Pulse width threshold1 f + or decode */ + __IOM uint32_t RATIO2 : 4; /*!< [7..4] Pulse width threshold2 f + or decode */ + __IOM uint32_t RATIO3 : 4; /*!< [11..8] Pulse width threshold3 f + or decode */ + __IOM uint32_t RATIO4 : 4; /*!< [15..12] Pulse width threshold4 f + or decode */ + __IOM uint32_t RATIO5 : 4; /*!< [19..16] Pulse width threshold5 f + or decode */ + __IOM uint32_t RATIO6 : 4; /*!< [23..20] Pulse width threshold6 f + or decode */ + __IOM uint32_t RATIO7 : 4; /*!< [27..24] Pulse width threshold7 f + or decode */ + __IOM uint32_t RATIO8 : 4; /*!< [31..28] Pulse width threshold8 f + or decode */ + } bit; + } T2_DECODE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000030) * T3_PEAK_VALUE_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 9; /*!< [8..0] Initial peak value thres + hold */ + __IOM uint32_t ALPHA : 4; /*!< [12..9] Coefficient for peak val + ue update IIR filter */ + __IOM uint32_t THLD_RATIO : 4; /*!< [16..13] Peak value threshold rat + io */ + } bit; + } T3_PEAK_VALUE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000034) * T3_PEAK_WIDTH_CFG * */ + + struct { + __IOM uint32_t THLD_INIT : 15; /*!< [14..0] Initial peak value thres + hold */ + __IM uint32_t : 1; + __IOM uint32_t PULSE_WID_RATIO1 : 4; /*!< [19..16] Pulse width update ratio + 1 */ + __IOM uint32_t PULSE_WID_RATIO2 : 4; /*!< [23..20] Pulse width update ratio + 2 */ + __IOM uint32_t PULSE_WID_RATIO3 : 4; /*!< [27..24] Pulse width update ratio + 3 */ + __IOM uint32_t PULSE_WID_RATIO4 : 4; /*!< [31..28] Pulse width update ratio + 4 */ + } bit; + } T3_PEAK_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000038) * T3_PULSE_WIDTH_CFG * */ + + struct { + __IOM uint32_t SYNC_ZERO_WIN : 3; /*!< [2..0] Synchronized zero judgem + ent window */ + __IOM uint32_t PULSE_WID_MAX : 15; /*!< [17..3] Maximum pulse width valu + e */ + __IOM uint32_t PULSE_WID_BETA : 4; /*!< [21..18] Coefficient for pulse wi + dth threshold IIR filter */ + __IM uint32_t : 2; + __IOM uint32_t PEAK_SEL_RATIO1 : 4; /*!< [27..24] Pulse width thld ratio1 + for peak select */ + __IOM uint32_t PEAK_SEL_RATIO2 : 4; /*!< [31..28] Pulse width thld ratio2 + for peak select */ + } bit; + } T3_PULSE_WIDTH_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000003C) * T3_DECODE_CFG * */ + + struct { + __IOM uint32_t RATIO1 : 4; /*!< [3..0] Pulse width threshold1 f + or decode */ + __IOM uint32_t RATIO2 : 4; /*!< [7..4] Pulse width threshold2 f + or decode */ + __IOM uint32_t RATIO3 : 4; /*!< [11..8] Pulse width threshold3 f + or decode */ + __IOM uint32_t RATIO4 : 4; /*!< [15..12] Pulse width threshold4 f + or decode */ + __IOM uint32_t RATIO5 : 4; /*!< [19..16] Pulse width threshold5 f + or decode */ + __IOM uint32_t RATIO6 : 4; /*!< [23..20] Pulse width threshold6 f + or decode */ + __IOM uint32_t RATIO7 : 4; /*!< [27..24] Pulse width threshold7 f + or decode */ + __IOM uint32_t RATIO8 : 4; /*!< [31..28] Pulse width threshold8 f + or decode */ + } bit; + } T3_DECODE_CFG; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000040) * STATUS * */ + + struct { + __IM uint32_t T1_WR_DONE : 1; /*!< [0..0] Shared memory write done + signal for track1 */ + __IM uint32_t T2_WR_DONE : 1; /*!< [1..1] Shared memory write done + signal for track2 */ + __IM uint32_t T3_WR_DONE : 1; /*!< [2..2] Shared memory write done + signal for track3 */ + __IM uint32_t TIMER_MEET : 1; /*!< [3..3] Timer meet limit */ + __IM uint32_t T1_BUF_FULL : 1; /*!< [4..4] Track 1 buffer full */ + __IM uint32_t T2_BUF_FULL : 1; /*!< [5..5] Track 2 buffer full */ + __IM uint32_t T3_BUF_FULL : 1; /*!< [6..6] Track 3 buffer full */ + __IM uint32_t : 1; + __IM uint32_t T1_RX_DONE : 1; /*!< [8..8] 7811 decoder rx done sig + nal for track1 */ + __IM uint32_t T2_RX_DONE : 1; /*!< [9..9] 7811 decoder rx done sig + nal for track2 */ + __IM uint32_t T3_RX_DONE : 1; /*!< [10..10] 7811 decoder rx done sig + nal for track3 */ + __IM uint32_t T1_FIFO_WR_ERR : 1; /*!< [11..11] Track 1 fifo write error */ + __IM uint32_t T2_FIFO_WR_ERR : 1; /*!< [12..12] Track 2 fifo write error */ + __IM uint32_t T3_FIFO_WR_ERR : 1; /*!< [13..13] Track 3 fifo write error */ + } bit; + } STATUS; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000044) * CHAR_NUM * */ + + struct { + __IM uint32_t TRACK1 : 8; /*!< [7..0] Track 1 character number */ + __IM uint32_t TRACK2 : 8; /*!< [15..8] Track 2 character number */ + __IM uint32_t TRACK3 : 8; /*!< [23..16] Track 3 character number */ + } bit; + } CHAR_NUM; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000048) * INTERFER_CHAR_NUM * */ + + struct { + __IM uint32_t TRACK1 : 8; /*!< [7..0] Track 1 interference cha + racter number */ + __IM uint32_t TRACK2 : 8; /*!< [15..8] Track 2 interference cha + racter number */ + __IM uint32_t TRACK3 : 8; /*!< [23..16] Track 3 interference cha + racter number */ + } bit; + } INTERFER_CHAR_NUM; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000004C) * DC_EST * */ + + struct { + __IM uint32_t TRACK1 : 10; /*!< [9..0] Track 1 dc value for dco + c */ + __IM uint32_t TRACK2 : 10; /*!< [19..10] Track 2 dc value for dco + c */ + __IM uint32_t TRACK3 : 10; /*!< [29..20] Track 3 dc value for dco + c */ + } bit; + } DC_EST; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000050) * END_ADDR_T1 * */ + + struct { + __IOM uint32_t ISO_END_ADDR : 20; /*!< [19..0] Character write end addr + ess for track 1 */ + } bit; + } END_ADDR_T1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000054) * END_ADDR_T2 * */ + + struct { + __IOM uint32_t ISO_END_ADDR : 20; /*!< [19..0] Character write end addr + ess for track 2 */ + } bit; + } END_ADDR_T2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000058) * END_ADDR_T3 * */ + + struct { + __IOM uint32_t ISO_END_ADDR : 20; /*!< [19..0] Character write end addr + ess for track 3 */ + } bit; + } END_ADDR_T3; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000005C) * TIMER_LIMIT * */ + + struct { + __IOM uint32_t LIMIT : 32; /*!< [31..0] Timer limit for interrup + t */ + } bit; + } TIMER_LIMIT; +} MISO7811_Type; /*!< Size = 96 (0x60) */ + + + +/* =========================================================================================================================== */ +/* ================ ANA_LDO_CLK ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ANA_LDO_CLK (ANA_LDO_CLK) + */ + +typedef struct { /*!< (@ 0x000FB200) ANA_LDO_CLK Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) LDO control */ + + struct { + __IOM uint32_t OTP_LDO_VSEL : 3; /*!< [2..0] OTP ldo25 voitage selction */ + __IOM uint32_t OTP_LDO_EN : 1; /*!< [3..3] OTP ldo25 enable */ + __IOM uint32_t LDO_CARD_VSEL : 2; /*!< [5..4] 7816 LDO output voltage select */ + __IOM uint32_t LDO_CARD_EN : 1; /*!< [6..6] 7816 LDO enable */ + __IOM uint32_t LDO_CARD_OCP_EN : 1; /*!< [7..7] 7816 LDO over-current protection */ + __IOM uint32_t LDO_CARD_VTRIM : 3; /*!< [10..8] 7816 LDO output voltage trim */ + __IOM uint32_t LDO_CARD_0P33VDD : 1; /*!< [11..11] 7816 sink LDO for GPIO floating ground pull down */ + __IOM uint32_t LDO_BBPLLVCO_VSEL : 2; /*!< [13..12] bbpll vco ldo output voltage select */ + __IOM uint32_t LDO_BBPLL_VSEL : 2; /*!< [15..14] bbpll ldo output voltage select */ + __IOM uint32_t LDO_IBLOAD_SEL : 1; /*!< [16..16] bbpll bleed current sel */ + __IOM uint32_t LDO_HVSEL : 1; /*!< [17..17] bbpll ldo high voltage sel */ + __IOM uint32_t LDO_EN_BBPLL2 : 1; /*!< [18..18] bbpll2 ldo enable */ + __IOM uint32_t LDO_EN_BBPLL1 : 1; /*!< [19..19] bbpll1 ldo enable */ + } bit; + } LDO_CTRL; +} ANA_LDO_CLK_Type; /*!< Size = 4 (0x4) */ + + + +/* =========================================================================================================================== */ +/* ================ ANA_BBPLL ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ANA_BBPLL (ANA_BBPLL) + */ + +typedef struct { /*!< (@ 0x000FB210) ANA_BBPLL Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) BBPLL1 control */ + + struct { + __IOM uint32_t BBPLL1_CP_IBSEL : 3; /*!< [2..0] lcp sel */ + __IM uint32_t : 1; + __IOM uint32_t BBPLL1_CLKGEN_CK48M_WIDTH : 2;/*!< [5..4] pulse width select */ + __IM uint32_t : 2; + __IOM uint32_t BBPLL1_CLKGEN_CK48M_SEL : 1;/*!< [8..8] Pulse width select mode enable */ + __IM uint32_t : 7; + __IOM uint32_t BBPLL1_CLKGEN_CK48M_DIVN : 7;/*!< [22..16] div_ratio of 48MHz */ + } bit; + } BBPLL1_CTRL0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) BBPLL1 control */ + + struct { + __IOM uint32_t BBPLL1_DIVR_FRAC : 24; /*!< [23..0] divr of pll */ + } bit; + } BBPLL1_CTRL1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) BBPLL1 control */ + + struct { + __IOM uint32_t BBPLL1_VCO_IBSEL : 2; /*!< [1..0] Bias current select of vco */ + __IOM uint32_t BBPLL1_RSTN : 1; /*!< [2..2] Reset signal of pll */ + __IM uint32_t : 1; + __IOM uint32_t BBPLL1_LOOPDIV_WIDTH : 2; /*!< [5..4] Pulse width select */ + __IOM uint32_t BBPLL1_LOOPDIV_SEL : 1; /*!< [6..6] Pulse width select mode enable */ + __IOM uint32_t BBPLL1_FREFDIV2_SEL : 1; /*!< [7..7] Reference clk div sel */ + __IOM uint32_t BBPLL1_EN_VCO : 1; /*!< [8..8] VCO enable */ + __IOM uint32_t BBPLL1_EN_PFDCP : 1; /*!< [9..9] pfd and chargepump enable */ + __IOM uint32_t BBPLL1_EN_LOOPDIV : 1; /*!< [10..10] loopdivider enable */ + __IOM uint32_t BBPLL1_EN_CLKGEN_CK48M_DIV2 : 1;/*!< [11..11] 48M div2 enable */ + __IOM uint32_t BBPLL1_EN_CLKGEN_256M : 1; /*!< [12..12] 256M clk_gen enable */ + __IOM uint32_t BBPLL1_EN_CLKGEN_192M : 1; /*!< [13..13] 192M clk_gen enable */ + __IOM uint32_t BBPLL1_EN_CLKGEN_48M : 1; /*!< [14..14] 48M clk_gen enable */ + __IOM uint32_t BBPLL1_EN_CLKGEN : 1; /*!< [15..15] clk_gen enable */ + __IOM uint32_t BBPLL1_DIVR_INT : 6; /*!< [21..16] divr of pll */ + } bit; + } BBPLL1_CTRL2; + + union { + __IOM uint32_t reg; /*!< (@ 0x0000000C) BBPLL2 control */ + + struct { + __IOM uint32_t BBPLL2_CP_IBSEL : 3; /*!< [2..0] lcp sel */ + __IM uint32_t : 1; + __IOM uint32_t BBPLL2_CLKGEN_CK48M_WIDTH : 2;/*!< [5..4] pulse width select */ + __IM uint32_t : 2; + __IOM uint32_t BBPLL2_CLKGEN_CK48M_SEL : 1;/*!< [8..8] Pulse width select mode enable */ + __IM uint32_t : 7; + __IOM uint32_t BBPLL2_CLKGEN_CK48M_DIVN : 7;/*!< [22..16] div_ratio of 48MHz */ + } bit; + } BBPLL2_CTRL0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000010) BBPLL2 control */ + + struct { + __IOM uint32_t BBPLL2_DIVR_FRAC : 24; /*!< [23..0] divr of pll */ + } bit; + } BBPLL2_CTRL1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000014) BBPLL2 control */ + + struct { + __IOM uint32_t BBPLL2_VCO_IBSEL : 2; /*!< [1..0] Bias current select of vco */ + __IOM uint32_t BBPLL2_RSTN : 1; /*!< [2..2] Reset signal of pll */ + __IM uint32_t : 1; + __IOM uint32_t BBPLL2_LOOPDIV_WIDTH : 2; /*!< [5..4] Pulse width select */ + __IOM uint32_t BBPLL2_LOOPDIV_SEL : 1; /*!< [6..6] Pulse width select mode enable */ + __IOM uint32_t BBPLL2_FREFDIV2_SEL : 1; /*!< [7..7] Reference clk div sel */ + __IOM uint32_t BBPLL2_EN_VCO : 1; /*!< [8..8] VCO enable */ + __IOM uint32_t BBPLL2_EN_PFDCP : 1; /*!< [9..9] pfd and chargepump enable */ + __IOM uint32_t BBPLL2_EN_LOOPDIV : 1; /*!< [10..10] loopdivider enable */ + __IOM uint32_t BBPLL2_EN_CLKGEN_CK48M_DIV2 : 1;/*!< [11..11] 48M div2 enable */ + __IOM uint32_t BBPLL2_EN_CLKGEN_256M : 1; /*!< [12..12] 256M clk_gen enable */ + __IOM uint32_t BBPLL2_EN_CLKGEN_192M : 1; /*!< [13..13] 192M clk_gen enable */ + __IOM uint32_t BBPLL2_EN_CLKGEN_48M : 1; /*!< [14..14] 48M clk_gen enable */ + __IOM uint32_t BBPLL2_EN_CLKGEN : 1; /*!< [15..15] clk_gen enable */ + __IOM uint32_t BBPLL2_DIVR_INT : 6; /*!< [21..16] divr of pll */ + } bit; + } BBPLL2_CTRL2; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000018) BBPLL control */ + + struct { + __IOM uint32_t BBPLL_TST_SEL : 3; /*!< [2..0] pll test select */ + __IOM uint32_t BBPLL_TST_EN_VCTRL : 1; /*!< [3..3] vctrl test enable */ + __IOM uint32_t BBPLL_TST_EN_CK : 1; /*!< [4..4] clk test enable */ + __IOM uint32_t BBPLL_TST_EN : 1; /*!< [5..5] pll test enable */ + __IOM uint32_t BBPLL_TST_CKSEL : 1; /*!< [6..6] clk test select */ + __IOM uint32_t BBPLL_PFD_TONSEL : 1; /*!< [7..7] pfd ton select */ + __IOM uint32_t BBPLL_PFD_PWERES_SEL : 2; /*!< [9..8] Power Res select */ + __IOM uint32_t BBPLL_DSM_ORDER_SEL : 1; /*!< [10..10] DSM mesh order select */ + __IOM uint32_t BBPLL_DSM_DITHEREN : 1; /*!< [11..11] DSM dither enable */ + __IOM uint32_t BBPLL2_PFD_FREF_PHSEL : 1; /*!< [12..12] fref phase select */ + __IOM uint32_t BBPLL2_PFD_FDIV_PHSEL : 1; /*!< [13..13] fdiv phase select */ + __IOM uint32_t BBPLL2_DSM_CKSEL : 1; /*!< [14..14] DSM clk select */ + __IOM uint32_t BBPLL2_DSM_CK_PHSEL : 1; /*!< [15..15] DSM clk phase select */ + __IOM uint32_t BBPLL1_PFD_FREF_PHSEL : 1; /*!< [16..16] fref phase select */ + __IOM uint32_t BBPLL1_PFD_FDIV_PHSEL : 1; /*!< [17..17] fdiv phase select */ + __IOM uint32_t BBPLL1_DSM_CKSEL : 1; /*!< [18..18] DSM clk select */ + __IOM uint32_t BBPLL1_DSM_CK_PHSEL : 1; /*!< [19..19] DSM clk phase select */ + __IOM uint32_t BBPLL_CKIN_SEL : 2; /*!< [21..20] PLL clk input select */ + __IOM uint32_t RG_BBPLL_CLKGEN_PWERES_SEL : 2;/*!< [23..22] Power Res select */ + } bit; + } BBPLL_CTRL; +} ANA_BBPLL_Type; /*!< Size = 28 (0x1c) */ + + + +/* =========================================================================================================================== */ +/* ================ ANA_MCR ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ANA_MCR (ANA_MCR) + */ + +typedef struct { /*!< (@ 0x000FB230) ANA_MCR Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) MCR control */ + + struct { + __IM uint32_t : 9; + __IOM uint32_t ADC_CLK_EN : 1; /*!< [9..9] MCR ADC clock enable */ + __IOM uint32_t ADC_EN : 1; /*!< [10..10] MCR ADC enable */ + __IOM uint32_t ADC_EN_BIASGEN : 1; /*!< [11..11] MCR ADC reference voltage enable */ + __IOM uint32_t ADC_EN_CONSTGM : 1; /*!< [12..12] MCR ADC constant Gm bias enable */ + __IOM uint32_t ADC_EN_REG : 1; /*!< [13..13] MCR ADC regulator enable */ + __IOM uint32_t ADC_CLKSEL : 2; /*!< [15..14] MCR ADC clock select */ + __IOM uint32_t DCOC_PGA0 : 6; /*!< [21..16] MCR CH0 PGA DCOC DAC input */ + __IOM uint32_t ADC_REFBUF_VREF : 2; /*!< [23..22] MCR ADC differential reference voltage control */ + __IOM uint32_t DCOC_PGA1 : 6; /*!< [29..24] MCR CH1 PGA DCOC DAC input */ + __IOM uint32_t ADC_REGA_VCTRL : 2; /*!< [31..30] MCR ADC analog regulator output voltage control */ + } bit; + } CTRL0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) MCR control */ + + struct { + __IOM uint32_t DCOC_PGA2 : 6; /*!< [5..0] MCR CH2 PGA DCOC DAC input */ + __IOM uint32_t ADC_REGD_VCTRL : 2; /*!< [7..6] MCR ADC digital regulator output voltage control */ + __IOM uint32_t ADC_IBC_REFBUF : 3; /*!< [10..8] MCR ADC differential reference voltage buffer bias current + control */ + __IOM uint32_t ADC_IBC_REFBUF2 : 1; /*!< [11..11] MCR ADC bias voltage buffer bias current control */ + __IOM uint32_t ADC_VCTRL_BIASGEN : 3; /*!< [14..12] MCR ADC bias voltage control */ + __IOM uint32_t PGA0_EN : 1; /*!< [15..15] MCR CH0 PGA enable */ + __IOM uint32_t PGA_CSEL : 3; /*!< [18..16] MCR lowpass cap selection cap */ + __IOM uint32_t PGA1_EN : 1; /*!< [19..19] MCR CH1 PGA enable */ + __IOM uint32_t PGA_IOUTSEL : 3; /*!< [22..20] MCR PAG output current enhance */ + __IOM uint32_t PGA2_EN : 1; /*!< [23..23] MCR CH2 PGA enable */ + __IOM uint32_t PGA_R1SEL : 3; /*!< [26..24] pag input resistor selection */ + __IOM uint32_t PGA_VCM_GEN_EN : 1; /*!< [27..27] MCR PGA input common mode buffer enable */ + __IM uint32_t : 3; + __IOM uint32_t PGA_CM_EN : 1; /*!< [31..31] MCR PGA input common mode feedback enable */ + } bit; + } CTRL1; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000008) MCR control */ + + struct { + __IM uint32_t : 8; + __IOM uint32_t PGA_RES_BYPASS : 1; /*!< [8..8] MCR control */ + __IM uint32_t : 2; + __IOM uint32_t PGA_LDO_EN : 1; /*!< [11..11] MCR PGA LDO enable */ + __IOM uint32_t ADC_CHANNEL_SEL : 2; /*!< [13..12] mcr adc test channel sel */ + __IOM uint32_t ADC_CHANNEL_EN : 1; /*!< [14..14] mcr adc test channel enable */ + __IOM uint32_t ADC_OUT_EN : 1; /*!< [15..15] MCR adc input connect to test pad enable */ + __IOM uint32_t PGA0_GC : 5; /*!< [20..16] MCR CH0 PGA gain control */ + __IOM uint32_t PGA1_GC : 5; /*!< [25..21] MCR CH1 PGA gain control */ + __IOM uint32_t PGA2_GC : 5; /*!< [30..26] MCR CH2 PGA gain control */ + } bit; + } CTRL2; +} ANA_MCR_Type; /*!< Size = 12 (0xc) */ + + + +/* =========================================================================================================================== */ +/* ================ ADC_ANALOG ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ADC_ANALOG (ADC_ANALOG) + */ + +typedef struct { /*!< (@ 0x000FB240) ADC_ANALOG Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) ADC_CTRL0 */ + + struct { + __IOM uint32_t MISC_SARADC_EN_REG : 1; /*!< [0..0] GPADC regulator enable. 0: off; 1: on */ + __IOM uint32_t MISC_SARADC_EN_CONSTGM : 1;/*!< [1..1] GPADC constant Gm bias enable. 0: off; 1: on */ + __IOM uint32_t MISC_SARADC_EN_BIASGEN : 1;/*!< [2..2] GPADC reference voltage enable. 0: off; 1: on */ + __IOM uint32_t MISC_SARADC_EN : 1; /*!< [3..3] GPADC enable. 0: off; 1: on */ + __IOM uint32_t MISC_SARADC_clk : 2; + __IM uint32_t : 2; + __IOM uint32_t MISC_GBG_FASTSETTLING : 1; /*!< [8..8] The global bandgap fast settling enable */ + __IOM uint32_t MISC_GBG_EN : 1; /*!< [9..9] The global bandgap enable */ + } bit; + } ADC_CTRL0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) ADC_CTRL1 */ + + struct { + __IOM uint32_t MISC_SARADC_VCTRL_BIASGEN : 3;/*!< [2..0] GPADC bias voltage control 425mV+25mV*misc_saradc_vctrl_biasgen */ + __IOM uint32_t MISC_SARADC_SEL_CH_S : 3; /*!< [5..3] GPADC channel select */ + __IOM uint32_t MISC_SARADC_REGD_VCTRL : 2;/*!< [7..6] GPADC digital regulator output voltage control. 0: 1.0V; + 1: 1.1V; 2: 1.2V; 3: 1.3V */ + __IOM uint32_t MISC_SARADC_REGA_VCTRL : 2;/*!< [9..8] GPADC analog regulator output voltage control. 0: 1.0V; + 1: 1.1V; 2: 1.2V; 3: 1.3V */ + __IOM uint32_t MISC_SARADC_REFBUF_VREF_CTRL : 2;/*!< [11..10] GPADC differential reference voltage control. */ + __IOM uint32_t MISC_SARADC_MODE : 3; /*!< [14..12] 0=gpio,1=gpio diff,2=hvin,3=vinlpm,4=temperature */ + __IOM uint32_t MISC_SARADC_IBUF_GC : 2; /*!< [16..15] GPADC full scale control */ + __IOM uint32_t MISC_SARADC_IBUF_EN_RC : 1;/*!< [17..17] GPADC input buffer feedback capacitor enable */ + __IOM uint32_t MISC_SARADC_IBUF_BW : 2; /*!< [19..18] GPADC input buffer bandwidth control */ + __IOM uint32_t MISC_SARADC_IBC_REFBUF : 3;/*!< [22..20] GPADC differential reference voltage buffer bias current + control */ + __IOM uint32_t MISC_SARADC_IBC_REFBUF2 : 1;/*!< [23..23] GPADC bias voltage buffer bias current control */ + __IOM uint32_t MISC_SARADC_IBC_IBUF : 3; /*!< [26..24] GPAADC input buffer bias control */ + __IOM uint32_t MISC_SARADC_IBC_CMBUF : 1; /*!< [27..27] GPADC biasgen buffer bias current control */ + } bit; + } ADC_CTRL1; +} ADC_ANALOG_Type; /*!< Size = 8 (0x8) */ + + + +/* =========================================================================================================================== */ +/* ================ ANA_RNG ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ANA_RNG (ANA_RNG) + */ + +typedef struct { /*!< (@ 0x000FB260) ANA_RNG Structure */ + + union { + __IOM uint32_t reg; /*!< (@ 0x00000000) RNG control */ + + struct { + __IM uint32_t : 17; + __IOM uint32_t RG_NCS_I_SET : 3; /*!< [19..17] NCS current setting */ + __IOM uint32_t DA_NCS_EN : 1; /*!< [20..20] NCS enable */ + __IOM uint32_t DA_NCS_RESETN : 1; /*!< [21..21] NCS reset */ + __IOM uint32_t DA_LDO_TRNG_EN : 1; /*!< [22..22] Security TRNG LDO enable. */ + __IOM uint32_t DA_TRNG_BIAS_EN : 1; /*!< [23..23] TRNG bias enable signal, high active */ + __IOM uint32_t DA_TRNG_TRNGA_OSCJ_EN : 1; /*!< [24..24] TRNGA LFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGB_OSCJ_EN : 1; /*!< [25..25] TRNGB LFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGC_OSCJ_EN : 1; /*!< [26..26] TRNGC LFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGD_OSCJ_EN : 1; /*!< [27..27] TRNGD LFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGOA_EN : 1; /*!< [28..28] TRNGA HFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGOB_EN : 1; /*!< [29..29] TRNGB HFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGOC_EN : 1; /*!< [30..30] TRNGC HFOSC enable signal,high active */ + __IOM uint32_t DA_TRNG_TRNGOD_EN : 1; /*!< [31..31] TRNGD HFOSC enable signal,high active */ + } bit; + } RNG_CTRL0; + + union { + __IOM uint32_t reg; /*!< (@ 0x00000004) RNG control */ + + struct { + __IOM uint32_t RG_TRNG_TRNGA_ON_JITTER : 2;/*!< [1..0] TRNGA LFOSC jitter control signal */ + __IOM uint32_t RG_TRNG_TRNGA_OSCJ_TRIM : 2;/*!< [3..2] TRNGA LFOSC frequency control signal */ + __IOM uint32_t RG_TRNG_TRNGA_OSCJ_VREF : 3;/*!< [6..4] TRNGA LFOSC vref control signal */ + __IOM uint32_t DA_TRNG_TRNGOA_CLR : 1; /*!< [7..7] TRNGA sample DFF output clear signal,low active */ + __IOM uint32_t RG_TRNG_TRNGB_ON_JITTER : 2;/*!< [9..8] TRNGB LFOSC jitter control signal */ + __IOM uint32_t RG_TRNG_TRNGB_OSCJ_TRIM : 2;/*!< [11..10] TRNGB LFOSC frequency control signal */ + __IOM uint32_t RG_TRNG_TRNGB_OSCJ_VREF : 3;/*!< [14..12] TRNGB LFOSC vref control signal */ + __IOM uint32_t DA_TRNG_TRNGOB_CLR : 1; /*!< [15..15] TRNGB sample DFF output clear signal,low active */ + __IOM uint32_t RG_TRNG_TRNGC_ON_JITTER : 2;/*!< [17..16] TRNGC LFOSC jitter control signal */ + __IOM uint32_t RG_TRNG_TRNGC_OSCJ_TRIM : 2;/*!< [19..18] TRNGC LFOSC frequency control signal */ + __IOM uint32_t RG_TRNG_TRNGC_OSCJ_VREF : 3;/*!< [22..20] TRNGC LFOSC vref control signal */ + __IOM uint32_t DA_TRNG_TRNGOC_CLR : 1; /*!< [23..23] TRNGC sample DFF output clear signal,low active */ + __IOM uint32_t RG_TRNG_TRNGD_ON_JITTER : 2;/*!< [25..24] TRNGD LFOSC jitter control signal */ + __IOM uint32_t RG_TRNG_TRNGD_OSCJ_TRIM : 2;/*!< [27..26] TRNGD LFOSC frequency control signal */ + __IOM uint32_t RG_TRNG_TRNGD_OSCJ_VREF : 3;/*!< [30..28] TRNGD LFOSC vref control signal */ + __IOM uint32_t DA_TRNG_TRNGOD_CLR : 1; /*!< [31..31] TRNGD sample DFF output clear signal,low active */ + } bit; + } RNG_CTRL1; +} ANA_RNG_Type; /*!< Size = 8 (0x8) */ + +/* =========================================================================================================================== */ +/* ================ ANA_CHGR ================ */ +/* =========================================================================================================================== */ + + +/** + * @brief 32 ANA_CHGR (ANA_CHGR) + */ + +typedef struct { /*!< (@ 0x000FB270) ANA_CHGR Structure */ + + union { + __IM uint32_t reg; /*!< (@ 0x00000000) CHGR state */ + + struct { + __IM uint32_t CHGR_STATE_VBAT_LV : 1; + __IM uint32_t CHGR_STATE_RCH_EN : 1; + __IM uint32_t CHGR_STATE_IND : 1; + __IM uint32_t CHGR_STATE_ICHG : 1; + __IM uint32_t CHGR_RESET : 1; + __IM uint32_t CHGR_UVLO_OK_AON : 1; + __IM uint32_t CHGR_PGOOD : 1; + __IM uint32_t CHGR_DPPM_OV_CV : 1; + __IM uint32_t CHGR_DPPM_OV_CC : 1; + __IM uint32_t CHGR_CC_OV_CV : 1; + __IM uint32_t CHGR_IN_DET_AON : 1; + __IM uint32_t VBAT_OV_FLAG : 1; + } bit; + } STATE; +} ANA_CHGR_Type; /*!< Size = 4 (0x4) */ +/** @} */ /* End of group Device_Peripheral_peripherals */ + + +/* =========================================================================================================================== */ +/* ================ Device Specific Peripheral Address Map ================ */ +/* =========================================================================================================================== */ + + +/** @addtogroup Device_Peripheral_peripheralAddr + * @{ + */ + +#define MMCU_BASE 0x000D0000UL +#define MMPU_BASE 0x000D8080UL +#define MDCMI_BASE 0x000D8200UL +#define MHSPI_BASE 0x000D8400UL +#define MWDT_BASE 0x000F0000UL +#define MSCI0_BASE 0x000F0400UL +#define MSCI1_BASE 0x000F0800UL +#define MTIM_BASE 0x000F0C00UL +#define MCRC_BASE 0x000F8204UL +#define MRCC_BASE 0x000F8400UL +#define MSYSCTRL_BASE 0x000F8520UL +#define MRSTGEN_BASE 0x000F8574UL +#define MSECURE_BASE 0x000F85C0UL +#define MGPIO_BASE 0x000F8700UL +#define MDMA_BASE 0x000F8800UL +#define MDMA_QSPI_BASE 0x000F8800UL +#define MDMA_SPI0_BASE 0x000F8900UL +#define MDMA_SPI1_BASE 0x000F8A00UL +#define MDMA_UART0_BASE 0x000F8B00UL +#define MDMA_UART1_BASE 0x000F8C00UL +#define MDMA_UART2_BASE 0x000F8D00UL +#define MDMA_UART3_BASE 0x000F8E00UL +#define MDMA_7811_BASE 0x000F8F00UL +#define MDMA_MEMCP_BASE 0x000F9000UL +#define MDMA_IIC0_BASE 0x000F9100UL +#define MDMA_IIC1_BASE 0x000F9200UL +#define MSPI_BASE 0x000F891CUL +#define MSPI0_BASE 0x000F891CUL +#define MSPI1_BASE 0x000F8A1CUL +#define MUART_BASE 0x000F8B1CUL +#define MUART0_BASE 0x000F8B1CUL +#define MUART1_BASE 0x000F8C1CUL +#define MUART2_BASE 0x000F8D1CUL +#define MUART3_BASE 0x000F8E1CUL +#define MIIC_BASE 0x000F911CUL +#define MI2C0_BASE 0x000F911CUL +#define MI2C1_BASE 0x000F921CUL +#define MLPM_BASE 0x000FA800UL +#define MBPK_BASE 0x000FAC00UL +#define MSEC_BASE 0x000FAE00UL +#define MRTC_BASE 0x000FAF00UL +#define MRTCLSI_BASE 0x000FAF00UL +#define MRTCLSE_BASE 0x000FB000UL +#define MADC_BASE 0x000FBB00UL +#define MISO7811_BASE 0x000F8F00UL +#define ANA_LDO_CLK_BASE 0x000FB200UL +#define ANA_BBPLL_BASE 0x000FB210UL +#define ANA_MCR_BASE 0x000FB230UL +#define ADC_ANALOG_BASE 0x000FB240UL +#define ANA_RNG_BASE 0x000FB260UL +#define ANA_CHGR_BASE 0x000FB270UL +/** @} */ /* End of group Device_Peripheral_peripheralAddr */ + + +/* =========================================================================================================================== */ +/* ================ Peripheral declaration ================ */ +/* =========================================================================================================================== */ + + +/** @addtogroup Device_Peripheral_declaration + * @{ + */ + +#define MMCU ((MMCU_Type*) MMCU_BASE) +#define MMPU ((MMPU_Type*) MMPU_BASE) +#define MDCMI ((MDCMI_Type*) MDCMI_BASE) +#define MHSPI ((MHSPI_Type*) MHSPI_BASE) +#define MWDT ((MWDT_Type*) MWDT_BASE) +#define MSCI0 ((MSCI0_Type*) MSCI0_BASE) +#define MSCI1 ((MSCI0_Type*) MSCI1_BASE) +#define MTIM ((MTIM_Type*) MTIM_BASE) +#define MCRC ((MCRC_Type*) MCRC_BASE) +#define MRCC ((MRCC_Type*) MRCC_BASE) +#define MSYSCTRL ((MSYSCTRL_Type*) MSYSCTRL_BASE) +#define MRSTGEN ((MRSTGEN_Type*) MRSTGEN_BASE) +#define MSECURE ((MSECURE_Type*) MSECURE_BASE) +#define MGPIO ((MGPIO_Type*) MGPIO_BASE) +#define MDMA ((MDMA_Type*) MDMA_BASE) +#define MDMA_QSPI ((MDMA_Type*) MDMA_QSPI_BASE) +#define MDMA_SPI0 ((MDMA_Type*) MDMA_SPI0_BASE) +#define MDMA_SPI1 ((MDMA_Type*) MDMA_SPI1_BASE) +#define MDMA_UART0 ((MDMA_Type*) MDMA_UART0_BASE) +#define MDMA_UART1 ((MDMA_Type*) MDMA_UART1_BASE) +#define MDMA_UART2 ((MDMA_Type*) MDMA_UART2_BASE) +#define MDMA_UART3 ((MDMA_Type*) MDMA_UART3_BASE) +#define MDMA_7811 ((MDMA_Type*) MDMA_7811_BASE) +#define MDMA_MEMCP ((MDMA_Type*) MDMA_MEMCP_BASE) +#define MDMA_IIC0 ((MDMA_Type*) MDMA_IIC0_BASE) +#define MDMA_IIC1 ((MDMA_Type*) MDMA_IIC1_BASE) +#define MSPI ((MSPI_Type*) MSPI_BASE) +#define MSPI0 ((MSPI_Type*) MSPI0_BASE) +#define MSPI1 ((MSPI_Type*) MSPI1_BASE) +#define MUART ((MUART_Type*) MUART_BASE) +#define MUART0 ((MUART_Type*) MUART0_BASE) +#define MUART1 ((MUART_Type*) MUART1_BASE) +#define MUART2 ((MUART_Type*) MUART2_BASE) +#define MUART3 ((MUART_Type*) MUART3_BASE) +#define MIIC ((MIIC_Type*) MIIC_BASE) +#define MI2C0 ((MIIC_Type*) MI2C0_BASE) +#define MI2C1 ((MIIC_Type*) MI2C1_BASE) +#define MLPM ((MLPM_Type*) MLPM_BASE) +#define MBPK ((MBPK_Type*) MBPK_BASE) +#define MSEC ((MSEC_Type*) MSEC_BASE) +#define MRTC ((MRTC_Type*) MRTC_BASE) +#define MRTCLSI ((MRTC_Type*) MRTCLSI_BASE) +#define MRTCLSE ((MRTC_Type*) MRTCLSE_BASE) +#define MADC ((MADC_Type*) MADC_BASE) +#define MISO7811 ((MISO7811_Type*) MISO7811_BASE) +#define ANA_LDO_CLK ((ANA_LDO_CLK_Type*) ANA_LDO_CLK_BASE) +#define ANA_BBPLL ((ANA_BBPLL_Type*) ANA_BBPLL_BASE) +#define ANA_MCR ((ANA_MCR_Type*) ANA_MCR_BASE) +#define ADC_ANALOG ((ADC_ANALOG_Type*) ADC_ANALOG_BASE) +#define ANA_RNG ((ANA_RNG_Type*) ANA_RNG_BASE) +#define ANA_CHGR ((ANA_CHGR_Type*) ANA_CHGR_BASE) + + +#define MCU_TypeDef MMCU_Type +#define DCMI_TypeDef MDCMI_Type +#define HSPI_TypeDef MHSPI_Type +#define WDT_TypeDef MWDT_Type +#define SCI7816_TypeDef MSCI0_Type +#define TIM_Module_TypeDef MTIM_Type +#define RCC_TypeDef MRCC_Type +#define SYSCTRL_TypeDef MSYSCTRL_Type +#define RSTGEN_TypeDef MRSTGEN_Type +#define SECURE_TypeDef MSECURE_Type +#define DMA_TypeDef MDMA_Type +#define SPI_TypeDef MSPI_Type +#define UART_TypeDef MUART_Type +#define ISO7811_TypeDef MISO7811_Type +#define I2C_TypeDef MIIC_Type +#define LPM_TypeDef MLPM_Type +#define BPK_TypeDef MBPK_Type +#define SEC_TypeDef MSEC_Type +#define RTC_TypeDef MRTC_Type +#define ANA_LDO_CLK_TypeDef ANA_LDO_CLK_Type +#define ANA_BBPLL_TypeDef ANA_BBPLL_Type +#define ANA_MCR_TypeDef ANA_MCR_Type +#define ADC_ANALOG_TypeDef ADC_ANALOG_Type +#define ANA_RNG_TypeDef ANA_RNG_Type +#define ANA_CHGR_TypeDef ANA_CHGR_Type +#define ADC_TypeDef MADC_Type +/** @} */ /* End of group Device_Peripheral_peripherals */ + +#define YC3122_FLASH_BASE (0x01000000UL) /*!< (FLASH ) Base Address */ +#define YC3122_SRAM_BASE (0x00020000UL) /*!< (SRAM ) Base Address */ +#define YC3122_PERIPH_BASE (0x000B0000UL) /*!< (Peripheral) Base Address */ +#define YC3122_FPERIPH_BASE (0x000D0000UL) /*!< (fast Peripheral) Base Address>*/ +#define YC3122_SRAM_SIZE (0x80000) +#define YC3122_OTP_BASE (0x00000000UL) +#define YC3122_OTP_SIZE (0x2000) + + +/* ========================================= End of section using anonymous unions ========================================= */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#endif + +/** @addtogroup Exported_constants + * @{ + */ + +/** @addtogroup Peripheral_Registers_Bits_Definition + * @{ + */ + +/******************************************************************************/ +/* Peripheral Registers_Bits_Definition */ +/******************************************************************************/ +/****************** Bit definition for TIM_CTRL register ********************/ +#define TIM_CTRL_ENABLE BIT0 +#define TIM_CTRL_START_LEVEL BIT1 +#define TIM_CTRL_MODE BIT2 +#define TIM_CTRL_AUTO_RELOAD BIT3 + +/******************** Bit definition for rst register ***********************/ +#define SW_RST ((uint8_t)0x55) +#define SCI_RST ((uint8_t)0xAB) +#define MSR_RST ((uint8_t)0xC3) + +/******************* Bit definition for BPK_LR register *********************/ +#define BPK_LR_LOCK_SELF BIT0 +#define BPK_LR_LOCK_KEYWRITE BIT1 +#define BPK_LR_LOCK_KEYREAD BIT2 +#define BPK_LR_LOCK_KEYCLEAR BIT3 +#define BPK_LR_LOCK_RESET BIT4 +#define BPK_LR_LOCK_ALL (BIT1|BIT2|BIT3|BIT4) + +/****************** Bit definition for SENSOR_LR register *******************/ +#define SEC_LOCK_LOCK BIT0 +#define ACTION_LOCK BIT1 +#define TAMPER_LOCK BIT2 +#define SENSOR_LOCK BIT3 +#define SHIELD_LOCK BIT4 +#define SENSOR_LOCK_ALL (BIT1|BIT2|BIT3|BIT4) + +/****************** Bit definition for RTC_IRQ register *********************/ +#define RTC_SECOND_IRQ BIT0 +#define RTC_ALARM_IRQ BIT1 +#define RTC_ALL_IRQ (BIT0|BIT1) + +#ifdef __cplusplus +} +#endif + +#endif /* __YC3122_H__ */ + +/** @} */ /* End of group YC3122 */ + +/** @} */ /* End of group */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/arm/startup_yc3122.s b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/arm/startup_yc3122.s new file mode 100644 index 0000000000..f539d98936 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/arm/startup_yc3122.s @@ -0,0 +1,284 @@ +;/* +; * Copyright (c) 2006-2020, YICHIP Development Team +; * @file yc_startup.s +; * @brief source file for setting startup +; * +; * Change Logs: +; * Date Author Version Notes +; * 2020-11-06 wushengyan V1.0.0 the first version +; * 2021-03-11 wushengyan V1.0.2 Change for New ROM +; */ +Stack_Size EQU 0x400 + + AREA STACK, NOINIT, READWRITE, ALIGN=4 +Stack_Mem SPACE Stack_Size +__initial_sp + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x200 + AREA HEAP, NOINIT, READWRITE, ALIGN=4 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + PRESERVE8 + THUMB + +; Vector Table Mapped to Address 0 at Reset Rom code change to 0x1000200 + AREA RESET, CODE, READONLY ,ALIGN=4 + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size +__Vectors DCD __initial_sp + DCD Reset_Handler ;//reset 1 + DCD 0x00000000 ;//NMI 2 + DCD hard_fault_handler ;//HARD 3 + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD svc_handler ;//SVC 11 + DCD 0 ; + DCD 0 ; + DCD pendsv_handler ;//PENDSV 14 + DCD systick_handler ;//SYSTICK 15 + DCD USB_IRQHandler ;//IQR0 + DCD I2C0_IRQHandler ;//IQR1 + DCD I2C1_IRQHandler ;//IQR2 + DCD QSPI_IRQHandler ;//IQR3 + DCD SPI0_IRQHandler ;//IQR4 + DCD SPI1_IRQHandler ; + DCD HSPI_IRQHandler ; + DCD SEC_IRQHandler ; + DCD UART0_IRQHandler ; + DCD UART1_IRQHandler ; + DCD UART2_IRQHandler ; + DCD UART3_IRQHandler ; + DCD MEMCP_IRQHandler ; + DCD SCI0_IRQHandler ; + DCD SCI1_IRQHandler ; + DCD MSR_IRQHandler ; + DCD GPIO_IRQHandler ; + DCD TMRG0_IRQHandler ; + DCD TMRG1_IRQHandler ; + DCD SDIO_IRQHandler ; + DCD PSARM_IRQHandler ; + DCD RSA_IRQHandler ; + DCD SM4_IRQHandler ; + DCD TRNG_IRQHandler ; + DCD WDT_IRQHandler ; + DCD DCMI_IRQHandler ; + DCD ADC_IRQHandler ; + DCD RTC_IRQHandler ; + DCD BIN_IRQHandler ; + DCD POWER_IRQHandler ; + DCD SOFTWARE_IRQHandler ; + DCD RISCV_IRQHandler ; +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + +isr PROC + LDR R1,=0x1000200 + LDR R0,[R0,R1] + BX R0 + NOP + NOP + NOP + ENDP + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +hard_fault_handler PROC + EXPORT hard_fault_handler + IMPORT HardFault_Handler + ldr r0,=HardFault_Handler + bx r0 + nop + ENDP + +svc_handler PROC + EXPORT svc_handler + ldr r0,=SVC_IRQHandler + bx r0 + nop + ENDP + +pendsv_handler PROC + EXPORT pendsv_handler + IMPORT PendSV_Handler + ldr r0,=PendSV_Handler + bx r0 + nop + ENDP + +systick_handler PROC + EXPORT systick_handler + IMPORT SysTick_Handler + ldr r0,=SysTick_Handler + bx r0 + nop + ENDP + + + ALIGN + +Default_Handler PROC +; ToDo: Add here the export definition for the device specific external interrupts handler + EXPORT HARD_FAULT_IRQHandler [WEAK] + EXPORT SVC_IRQHandler [WEAK] + EXPORT PENDSV_IRQHandler [WEAK] + EXPORT SYSTICK_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT TIMER0_IRQHandler [WEAK] + EXPORT TIMER1_IRQHandler [WEAK] + EXPORT TIMER2_IRQHandler [WEAK] + EXPORT TIMER3_IRQHandler [WEAK] + EXPORT TIMER4_IRQHandler [WEAK] + EXPORT TIMER5_IRQHandler [WEAK] + EXPORT TIMER6_IRQHandler [WEAK] + EXPORT TIMER7_IRQHandler [WEAK] + EXPORT TIMER8_IRQHandler [WEAK] + EXPORT CHGRIN_IRQHandler [WEAK] + EXPORT VBAT_IRQHandler [WEAK] + EXPORT USB_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT QSPI_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT HSPI_IRQHandler [WEAK] + EXPORT SEC_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT MEMCP_IRQHandler [WEAK] + EXPORT SCI0_IRQHandler [WEAK] + EXPORT SCI1_IRQHandler [WEAK] + EXPORT MSR_IRQHandler [WEAK] + EXPORT GPIO_IRQHandler [WEAK] + EXPORT TMRG0_IRQHandler [WEAK] + EXPORT TMRG1_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT PSARM_IRQHandler [WEAK] + EXPORT RSA_IRQHandler [WEAK] + EXPORT SM4_IRQHandler [WEAK] + EXPORT TRNG_IRQHandler [WEAK] + EXPORT WDT_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT BIN_IRQHandler [WEAK] + EXPORT POWER_IRQHandler [WEAK] + EXPORT SOFTWARE_IRQHandler [WEAK] + EXPORT RISCV_IRQHandler [WEAK] + + +; ToDo: Add here the names for the device specific external interrupts handler +HARD_FAULT_IRQHandler +SVC_IRQHandler +PENDSV_IRQHandler +SYSTICK_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +EXTI5_IRQHandler +EXTI6_IRQHandler +EXTI7_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +TIMER4_IRQHandler +TIMER5_IRQHandler +TIMER6_IRQHandler +TIMER7_IRQHandler +TIMER8_IRQHandler +CHGRIN_IRQHandler +VBAT_IRQHandler +USB_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +QSPI_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +HSPI_IRQHandler +SEC_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +MEMCP_IRQHandler +SCI0_IRQHandler +SCI1_IRQHandler +MSR_IRQHandler +GPIO_IRQHandler +TMRG0_IRQHandler +TMRG1_IRQHandler +SDIO_IRQHandler +PSARM_IRQHandler +RSA_IRQHandler +SM4_IRQHandler +TRNG_IRQHandler +WDT_IRQHandler +DCMI_IRQHandler +ADC_IRQHandler +RTC_IRQHandler +BIN_IRQHandler +POWER_IRQHandler +SOFTWARE_IRQHandler +RISCV_IRQHandler + B . + ENDP + + + ALIGN + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap PROC + LDR R0, = Heap_Mem + LDR R1, = __initial_sp + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + ENDP + + ALIGN + + ENDIF + + + END diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/gcc/startup_yc3122.S b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/gcc/startup_yc3122.S new file mode 100644 index 0000000000..719d1a91bb --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/gcc/startup_yc3122.S @@ -0,0 +1,214 @@ +;/* +; * Copyright (c) 2006-2020, YICHIP Development Team +; * @file yc_flash_start_gcc.s +; * @brief source file for setting flash_start_gcc +; * +; * Change Logs: +; * Date Author Version Notes +; * 2020-11-06 wushengyan V1.0.0 the first version +; */ + +.org 0x200 + .global Reset_Handler,HARD_FAULT_IRQHandler,SVC_IRQHandler,PENDSV_IRQHandler,SYSTICK_IRQHandler + +vectors: + .long 0x00030000 + .long Reset_Handler ;//reset 1 + .long 0x00000000 ;//NMI 2 + .long hard_fault_handler ;//HARD 3 + .long 0 ; + .long 0 ; + .long 0 ; + .long 0 ; + .long 0 ; + .long 0 ; + .long 0 ; + .long svc_handler ;//SVC 11 + .long 0 ; + .long 0 ; + .long pendsv_handler ;//PENDSV 14 + .long systick_handler ;//SYSTICK 15 + .long USB_IRQHandler ;//IQR0 + .long I2C0_IRQHandler ;//IQR1 + .long I2C1_IRQHandler ;//IQR2 + .long QSPI_IRQHandler ;//IQR3 + .long SPI0_IRQHandler ;//IQR4 + .long SPI1_IRQHandler ; + .long HSPI_IRQHandler ; + .long SEC_IRQHandler ; + .long UART0_IRQHandler ; + .long UART1_IRQHandler ; + .long UART2_IRQHandler ; + .long UART3_IRQHandler ; + .long MEMCP_IRQHandler ; + .long SCI0_IRQHandler ; + .long SCI1_IRQHandler ; + .long MSR_IRQHandler ; + .long GPIO_IRQHandler ; + .long TMRG0_IRQHandler ; + .long TMRG1_IRQHandler ; + .long SDIO_IRQHandler ; + .long PSARM_IRQHandler ; + .long RSA_IRQHandler ; + .long SM4_IRQHandler ; + .long TRNG_IRQHandler ; + .long WDT_IRQHandler ; + .long DCMI_IRQHandler ; + .long ADC_IRQHandler ; + .long RTC_IRQHandler ; + .long BIN_IRQHandler ; + .long POWER_IRQHandler ; + .long SOFTWARE_IRQHandler ; + .long RISCV_IRQHandler ; + .thumb_func +isr: + LDR R1,=0x1000200 + LDR R0,[R0,R1] + BX R0 + NOP + NOP + NOP + .thumb_func +Reset_Handler: + LDR R0,=SystemInit + BLX R0 + LDR R0,=hardware_init + BX R0 + +hard_fault_handler: + ldr r0,=HardFault_Handler + bx r0 + +svc_handler: + ldr r0,=SVC_IRQHandler + bx r0 + +pendsv_handler: + ldr r0,=PendSV_Handler + bx r0 + +systick_handler: + ldr r0,=SysTick_Handler + bx r0 + + .thumb + .thumb_func +hardware_init: + ldr r1, =__exidx_start + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + sub r3, r2 + ble .L_loop1_done + + .L_loop1: + sub r3, #4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .L_loop1 + + .L_loop1_done: + +;/* Single BSS section scheme. +; * +; * The BSS section is specified by following symbols +; * _sbss: start of the BSS section. +; * _ebss: end of the BSS section. +; * +; * Both addresses must be aligned to 4 bytes boundary. +; */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + mov r0, #0 + + sub r2, r1 + ble .L_loop3_done + + .L_loop3: + sub r2, #4 + str r0, [r1, r2] + bgt .L_loop3 + .L_loop3_done: + ldr r0,=0x12345 + ldr r3,=0x1111 + bl main + + .globl delay + .syntax unified +delay: + subs r0,#1 + bne delay + nop + bx lr + +.align 1 +.thumb_func +.weak Default_Handler +.type Default_Handler, %function + +Default_Handler: + b . + .size Default_Handler, . - Default_Handler + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers + */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, Default_Handler + .endm + + def_irq_handler HARD_FAULT_IRQHandler + def_irq_handler SVC_IRQHandler + def_irq_handler PENDSV_IRQHandler + def_irq_handler SYSTICK_IRQHandler + def_irq_handler EXTI0_IRQHandler + def_irq_handler EXTI1_IRQHandler + def_irq_handler EXTI2_IRQHandler + def_irq_handler EXTI3_IRQHandler + def_irq_handler EXTI4_IRQHandler + def_irq_handler TIMER0_IRQHandler + def_irq_handler TIMER1_IRQHandler + def_irq_handler TIMER2_IRQHandler + def_irq_handler TIMER3_IRQHandler + def_irq_handler TIMER4_IRQHandler + def_irq_handler TIMER5_IRQHandler + def_irq_handler TIMER6_IRQHandler + def_irq_handler TIMER7_IRQHandler + def_irq_handler TIMER8_IRQHandler + def_irq_handler CHGRIN_IRQHandler + def_irq_handler VBAT_IRQHandler + def_irq_handler USB_IRQHandler + def_irq_handler I2C0_IRQHandler + def_irq_handler I2C1_IRQHandler + def_irq_handler QSPI_IRQHandler + def_irq_handler SPI0_IRQHandler + def_irq_handler SPI1_IRQHandler + def_irq_handler HSPI_IRQHandler + def_irq_handler SEC_IRQHandler + def_irq_handler UART0_IRQHandler + def_irq_handler UART1_IRQHandler + def_irq_handler UART2_IRQHandler + def_irq_handler UART3_IRQHandler + def_irq_handler MEMCP_IRQHandler + def_irq_handler SCI0_IRQHandler + def_irq_handler SCI1_IRQHandler + def_irq_handler MSR_IRQHandler + def_irq_handler GPIO_IRQHandler + def_irq_handler TMRG0_IRQHandler + def_irq_handler TMRG1_IRQHandler + def_irq_handler SDIO_IRQHandler + def_irq_handler PSARM_IRQHandler + def_irq_handler RSA_IRQHandler + def_irq_handler SM4_IRQHandler + def_irq_handler TRNG_IRQHandler + def_irq_handler WDT_IRQHandler + def_irq_handler DCMI_IRQHandler + def_irq_handler ADC_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler BIN_IRQHandler + def_irq_handler POWER_IRQHandler + def_irq_handler SOFTWARE_IRQHandler + def_irq_handler RISCV_IRQHandler diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/iar/startup_yc3122.s b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/iar/startup_yc3122.s new file mode 100644 index 0000000000..142b4c1612 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/iar/startup_yc3122.s @@ -0,0 +1,225 @@ +;/* +; * Copyright (c) 2006-2020, YICHIP Development Team +; * @file startup_yc3122.s +; * @brief source file for setting startup +; * +; * Change Logs: +; * Date Author Version Notes +; * 2022-11-08 kiven V1.0.0 the first version +; */ + + MODULE ?cstartup ; // 定义模块名称 + + ;Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start ; // IAR 入口函数 + EXTERN SystemInit ; // 系统初始化函数 + PUBLIC _vector_table ; // 中断向量表地址 + + ALIGNROM 2 + DATA ; // 定义数据段 +_vector_table ;中断向量表 + DCD sfe(CSTACK) + DCD Reset_Handler ;//reset 1 + DCD 0x00000000 ;//NMI 2 + DCD hard_fault_handler ;//HARD 3 + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD 0 ; + DCD svc_handler ;//SVC 11 + DCD 0 ; + DCD 0 ; + DCD pendsv_handler ;//PENDSV 14 + DCD systick_handler ;//SYSTICK 15 + DCD USB_IRQHandler ;//IQR0 + DCD I2C0_IRQHandler ;//IQR1 + DCD I2C1_IRQHandler ;//IQR2 + DCD QSPI_IRQHandler ;//IQR3 + DCD SPI0_IRQHandler ;//IQR4 + DCD SPI1_IRQHandler ; + DCD HSPI_IRQHandler ; + DCD SEC_IRQHandler ; + DCD UART0_IRQHandler ; + DCD UART1_IRQHandler ; + DCD UART2_IRQHandler ; + DCD UART3_IRQHandler ; + DCD MEMCP_IRQHandler ; + DCD SCI0_IRQHandler ; + DCD SCI1_IRQHandler ; + DCD MSR_IRQHandler ; + DCD GPIO_IRQHandler ; + DCD TMRG0_IRQHandler ; + DCD TMRG1_IRQHandler ; + DCD SDIO_IRQHandler ; + DCD PSARM_IRQHandler ; + DCD RSA_IRQHandler ; + DCD SM4_IRQHandler ; + DCD TRNG_IRQHandler ; + DCD WDT_IRQHandler ; + DCD DCMI_IRQHandler ; + DCD ADC_IRQHandler ; + DCD RTC_IRQHandler ; + DCD BIN_IRQHandler ; + DCD POWER_IRQHandler ; + DCD SOFTWARE_IRQHandler ; + DCD RISCV_IRQHandler ; + + THUMB ;//进入THUMB模式（THUMB-2指令集） + SECTION .intvec:CODE:REORDER(2) + CODE + PUBLIC isr +isr + LDR R1,=_vector_table + LDR R0,[R0,R1] + BX R0 + NOP + NOP + NOP + + PUBLIC Reset_Handler +Reset_Handler + LDR R0, =sfe(CSTACK) + mov sp, R0 + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + +hard_fault_handler PROC + EXPORT hard_fault_handler + IMPORT HardFault_Handler + LDR r0,=HardFault_Handler + BX r0 + nop + ENDP + +svc_handler PROC + EXPORT svc_handler + ldr r0,=SVC_IRQHandler + BX r0 + nop + ENDP + +pendsv_handler PROC + EXPORT pendsv_handler + IMPORT PendSV_Handler + LDR r0,=PendSV_Handler + BX r0 + nop + ENDP + +systick_handler PROC + EXPORT systick_handler + IMPORT SysTick_Handler + LDR r0,=SysTick_Handler + BX r0 + nop + ENDP + +; // 定义默认的中断函数，这里只是弱定义，可以被用户自己定义的中断向量函数覆盖 + PUBWEAK HARD_FAULT_IRQHandler + PUBWEAK SVC_IRQHandler + PUBWEAK PENDSV_IRQHandler + PUBWEAK SYSTICK_IRQHandler + PUBWEAK EXTI_IRQHandler + PUBWEAK TIMER0_IRQHandler + PUBWEAK TIMER1_IRQHandler + PUBWEAK TIMER2_IRQHandler + PUBWEAK TIMER3_IRQHandler + PUBWEAK TIMER4_IRQHandler + PUBWEAK TIMER5_IRQHandler + PUBWEAK TIMER6_IRQHandler + PUBWEAK TIMER7_IRQHandler + PUBWEAK TIMER8_IRQHandler + PUBWEAK CHGRIN_IRQHandler + PUBWEAK VBAT_IRQHandler + PUBWEAK USB_IRQHandler + PUBWEAK I2C0_IRQHandler + PUBWEAK I2C1_IRQHandler + PUBWEAK QSPI_IRQHandler + PUBWEAK SPI0_IRQHandler + PUBWEAK SPI1_IRQHandler + PUBWEAK HSPI_IRQHandler + PUBWEAK SEC_IRQHandler + PUBWEAK UART0_IRQHandler + PUBWEAK UART1_IRQHandler + PUBWEAK UART2_IRQHandler + PUBWEAK UART3_IRQHandler + PUBWEAK MEMCP_IRQHandler + PUBWEAK SCI0_IRQHandler + PUBWEAK SCI1_IRQHandler + PUBWEAK MSR_IRQHandler + PUBWEAK GPIO_IRQHandler + PUBWEAK TMRG0_IRQHandler + PUBWEAK TMRG1_IRQHandler + PUBWEAK SDIO_IRQHandler + PUBWEAK PSARM_IRQHandler + PUBWEAK RSA_IRQHandler + PUBWEAK SM4_IRQHandler + PUBWEAK TRNG_IRQHandler + PUBWEAK WDT_IRQHandler + PUBWEAK DCMI_IRQHandler + PUBWEAK ADC_IRQHandler + PUBWEAK RTC_IRQHandler + PUBWEAK BIN_IRQHandler + PUBWEAK POWER_IRQHandler + PUBWEAK SOFTWARE_IRQHandler + PUBWEAK RISCV_IRQHandler + +; ToDo: Add here the names for the device specific external interrupts handler +HARD_FAULT_IRQHandler +SVC_IRQHandler +PENDSV_IRQHandler +SYSTICK_IRQHandler +EXTI_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +TIMER4_IRQHandler +TIMER5_IRQHandler +TIMER6_IRQHandler +TIMER7_IRQHandler +TIMER8_IRQHandler +CHGRIN_IRQHandler +VBAT_IRQHandler +USB_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +QSPI_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +HSPI_IRQHandler +SEC_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +MEMCP_IRQHandler +SCI0_IRQHandler +SCI1_IRQHandler +MSR_IRQHandler +GPIO_IRQHandler +TMRG0_IRQHandler +TMRG1_IRQHandler +SDIO_IRQHandler +PSARM_IRQHandler +RSA_IRQHandler +SM4_IRQHandler +TRNG_IRQHandler +WDT_IRQHandler +DCMI_IRQHandler +ADC_IRQHandler +RTC_IRQHandler +BIN_IRQHandler +POWER_IRQHandler +SOFTWARE_IRQHandler +RISCV_IRQHandler + B . + END diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/system_yc3122.c b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/system_yc3122.c new file mode 100644 index 0000000000..7d35a0620a --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Device/YICHIP/YC3122/Source/Templates/system_yc3122.c @@ -0,0 +1,99 @@ +/**************************************************************************//** + * @file system_.c + * @brief CMSIS Cortex-M# Device Peripheral Access Layer Source File for + * Device + * @version V3.10 + * @date 23. November 2012 + * + * @note + * + ******************************************************************************/ +/* Copyright (c) 2012 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + + +#include +#include "system_yc3122.h" + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +/* ToDo: add here your necessary defines for device initialization + following is an example for different system frequencies */ +#define __HSI (192000000UL) + +#define __SYSTEM_CLOCK (__HSI / 4) + + +/*---------------------------------------------------------------------------- + Clock Variable definitions + *----------------------------------------------------------------------------*/ +/* ToDo: initialize SystemCoreClock with the system core clock frequency value + achieved after system intitialization. + This means system core clock frequency after call to SystemInit() */ +uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/ +/*---------------------------------------------------------------------------- + Clock functions + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ +{ +/* ToDo: add code to calculate the system frequency based upon the current + register settings. + This function can be used to retrieve the system core clock frequeny + after user changed register sittings. */ + SystemCoreClock = __SYSTEM_CLOCK; +} + +/** + * Initialize the system + * + * @param none + * @return none + * + * @brief Setup the microcontroller system. + * Initialize the System. + */ +void SystemInit (void) +{ + /* ToDo: add code to initialize the system + do not use global variables because this function is called before + reaching pre-main. RW section maybe overwritten afterwards. */ + + /* Write access code "0x55->0xaa->0x17" to set or clear "access_en" */ + MLPM->ACCESS_CODE.reg = 0x55; + MLPM->ACCESS_CODE.reg = 0xaa; + MLPM->ACCESS_CODE.reg = 0x17; + if (MLPM->ACCESS_EN.reg != ENABLE) + { + MLPM->ACCESS_EN.reg = ENABLE; + } + MLPM->BAKEUP_REG1.reg = 0xaaaaaaaa; +} diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armcc.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armcc.h new file mode 100644 index 0000000000..4d9d0645d3 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armcc.h @@ -0,0 +1,865 @@ +/**************************************************************************//** + * @file cmsis_armcc.h + * @brief CMSIS compiler ARMCC (Arm Compiler 5) header file + * @version V5.0.4 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CMSIS_ARMCC_H +#define __CMSIS_ARMCC_H + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677) + #error "Please use Arm Compiler Toolchain V4.0.677 or later!" +#endif + +/* CMSIS compiler control architecture macros */ +#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \ + (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) ) + #define __ARM_ARCH_6M__ 1 +#endif + +#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1)) + #define __ARM_ARCH_7M__ 1 +#endif + +#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1)) + #define __ARM_ARCH_7EM__ 1 +#endif + + /* __ARM_ARCH_8M_BASE__ not applicable */ + /* __ARM_ARCH_8M_MAIN__ not applicable */ + + +/* CMSIS compiler specific defines */ +#ifndef __ASM + #define __ASM __asm +#endif +#ifndef __INLINE + #define __INLINE __inline +#endif +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static __inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE static __forceinline +#endif +#ifndef __NO_RETURN + #define __NO_RETURN __declspec(noreturn) +#endif +#ifndef __USED + #define __USED __attribute__((used)) +#endif +#ifndef __WEAK + #define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED + #define __PACKED __attribute__((packed)) +#endif +#ifndef __PACKED_STRUCT + #define __PACKED_STRUCT __packed struct +#endif +#ifndef __PACKED_UNION + #define __PACKED_UNION __packed union +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x))) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr))) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr))) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __enable_irq(); */ + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __disable_irq(); */ + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_INLINE uint32_t __get_IPSR(void) +{ + register uint32_t __regIPSR __ASM("ipsr"); + return(__regIPSR); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_INLINE uint32_t __get_APSR(void) +{ + register uint32_t __regAPSR __ASM("apsr"); + return(__regAPSR); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_INLINE uint32_t __get_xPSR(void) +{ + register uint32_t __regXPSR __ASM("xpsr"); + return(__regXPSR); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_INLINE uint32_t __get_PSP(void) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + return(__regProcessStackPointer); +} + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) +{ + register uint32_t __regProcessStackPointer __ASM("psp"); + __regProcessStackPointer = topOfProcStack; +} + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_INLINE uint32_t __get_MSP(void) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + return(__regMainStackPointer); +} + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) +{ + register uint32_t __regMainStackPointer __ASM("msp"); + __regMainStackPointer = topOfMainStack; +} + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xFFU); +} + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + register uint32_t __regBasePriMax __ASM("basepri_max"); + __regBasePriMax = (basePri & 0xFFU); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & (uint32_t)1U); +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ + + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +__STATIC_INLINE uint32_t __get_FPSCR(void) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + register uint32_t __regfpscr __ASM("fpscr"); + return(__regfpscr); +#else + return(0U); +#endif +} + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_INLINE void __set_FPSCR(uint32_t fpscr) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + register uint32_t __regfpscr __ASM("fpscr"); + __regfpscr = (fpscr); +#else + (void)fpscr; +#endif +} + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __nop + + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI __wfi + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __wfe + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __sev + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +#define __ISB() do {\ + __schedule_barrier();\ + __isb(0xF);\ + __schedule_barrier();\ + } while (0U) + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() do {\ + __schedule_barrier();\ + __dsb(0xF);\ + __schedule_barrier();\ + } while (0U) + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() do {\ + __schedule_barrier();\ + __dmb(0xF);\ + __schedule_barrier();\ + } while (0U) + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV __rev + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value) +{ + rev16 r0, r0 + bx lr +} +#endif + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. + \param [in] value Value to reverse + \return Reversed value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value) +{ + revsh r0, r0 + bx lr +} +#endif + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +#define __ROR __ror + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __breakpoint(value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + #define __RBIT __rbit +#else +__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value != 0U; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ + return result; +} +#endif + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ __clz + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr)) +#else + #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr)) +#else + #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr)) +#else + #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXB(value, ptr) __strex(value, ptr) +#else + #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXH(value, ptr) __strex(value, ptr) +#else + #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020) + #define __STREXW(value, ptr) __strex(value, ptr) +#else + #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop") +#endif + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __clrex + + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __ssat + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __usat + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +#ifndef __NO_EMBEDDED_ASM +__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value) +{ + rrx r0, r0 + bx lr +} +#endif + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr)) + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr)) + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRBT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRHT(value, ptr) __strt(value, ptr) + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +#define __STRT(value, ptr) __strt(value, ptr) + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) + +#define __SADD8 __sadd8 +#define __QADD8 __qadd8 +#define __SHADD8 __shadd8 +#define __UADD8 __uadd8 +#define __UQADD8 __uqadd8 +#define __UHADD8 __uhadd8 +#define __SSUB8 __ssub8 +#define __QSUB8 __qsub8 +#define __SHSUB8 __shsub8 +#define __USUB8 __usub8 +#define __UQSUB8 __uqsub8 +#define __UHSUB8 __uhsub8 +#define __SADD16 __sadd16 +#define __QADD16 __qadd16 +#define __SHADD16 __shadd16 +#define __UADD16 __uadd16 +#define __UQADD16 __uqadd16 +#define __UHADD16 __uhadd16 +#define __SSUB16 __ssub16 +#define __QSUB16 __qsub16 +#define __SHSUB16 __shsub16 +#define __USUB16 __usub16 +#define __UQSUB16 __uqsub16 +#define __UHSUB16 __uhsub16 +#define __SASX __sasx +#define __QASX __qasx +#define __SHASX __shasx +#define __UASX __uasx +#define __UQASX __uqasx +#define __UHASX __uhasx +#define __SSAX __ssax +#define __QSAX __qsax +#define __SHSAX __shsax +#define __USAX __usax +#define __UQSAX __uqsax +#define __UHSAX __uhsax +#define __USAD8 __usad8 +#define __USADA8 __usada8 +#define __SSAT16 __ssat16 +#define __USAT16 __usat16 +#define __UXTB16 __uxtb16 +#define __UXTAB16 __uxtab16 +#define __SXTB16 __sxtb16 +#define __SXTAB16 __sxtab16 +#define __SMUAD __smuad +#define __SMUADX __smuadx +#define __SMLAD __smlad +#define __SMLADX __smladx +#define __SMLALD __smlald +#define __SMLALDX __smlaldx +#define __SMUSD __smusd +#define __SMUSDX __smusdx +#define __SMLSD __smlsd +#define __SMLSDX __smlsdx +#define __SMLSLD __smlsld +#define __SMLSLDX __smlsldx +#define __SEL __sel +#define __QADD __qadd +#define __QSUB __qsub + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \ + ((int64_t)(ARG3) << 32U) ) >> 32U)) + +#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCC_H */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armclang.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armclang.h new file mode 100644 index 0000000000..162a400ea1 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_armclang.h @@ -0,0 +1,1869 @@ +/**************************************************************************//** + * @file cmsis_armclang.h + * @brief CMSIS compiler armclang (Arm Compiler 6) header file + * @version V5.0.4 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ + +#ifndef __CMSIS_ARMCLANG_H +#define __CMSIS_ARMCLANG_H + +#pragma clang system_header /* treat file as system include file */ + +#ifndef __ARM_COMPAT_H +#include /* Compatibility header for Arm Compiler 5 intrinsics */ +#endif + +/* CMSIS compiler specific defines */ +#ifndef __ASM + #define __ASM __asm +#endif +#ifndef __INLINE + #define __INLINE __inline +#endif +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static __inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline +#endif +#ifndef __NO_RETURN + #define __NO_RETURN __attribute__((__noreturn__)) +#endif +#ifndef __USED + #define __USED __attribute__((used)) +#endif +#ifndef __WEAK + #define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED + #define __PACKED __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wpacked" +/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma clang diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __enable_irq(); see arm_compat.h */ + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +/* intrinsic void __disable_irq(); see arm_compat.h */ + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Control Register (non-secure) + \details Returns the content of the non-secure Control Register when in secure mode. + \return non-secure Control Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Control Register (non-secure) + \details Writes the given value to the non-secure Control Register when in secure state. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) +{ + __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); +} +#endif + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); +} +#endif + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); +} +#endif + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Priority Mask (non-secure) + \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Priority Mask (non-secure) + \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) +{ + __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); +} +#endif + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __enable_fault_irq __enable_fiq /* see arm_compat.h */ + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +#define __disable_fault_irq __disable_fiq /* see arm_compat.h */ + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Base Priority (non-secure) + \details Returns the current value of the non-secure Base Priority register when in secure state. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Base Priority (non-secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); +} +#endif + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Fault Mask (non-secure) + \details Returns the current value of the non-secure Fault Mask register when in secure state. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Fault Mask (non-secure) + \details Assigns the given value to the non-secure Fault Mask register when in secure state. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); +} +#endif + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + +/** + \brief Get Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + return result; +#endif +} + +#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); +#endif +} +#endif + + +/** + \brief Get Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + return result; +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. + \param [in] MainStackPtrLimit Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); +#endif +} +#endif + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#define __get_FPSCR (uint32_t)__builtin_arm_get_fpscr +#else +#define __get_FPSCR() ((uint32_t)0U) +#endif + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#define __set_FPSCR __builtin_arm_set_fpscr +#else +#define __set_FPSCR(x) ((void)(x)) +#endif + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP __builtin_arm_nop + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI __builtin_arm_wfi + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE __builtin_arm_wfe + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV __builtin_arm_sev + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +#define __ISB() __builtin_arm_isb(0xF); + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +#define __DSB() __builtin_arm_dsb(0xF); + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +#define __DMB() __builtin_arm_dmb(0xF); + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV(value) __builtin_bswap32(value) + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REV16(value) __ROR(__REV(value), 16) + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. + \param [in] value Value to reverse + \return Reversed value + */ +#define __REVSH(value) (int16_t)__builtin_bswap16(value) + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + op2 %= 32U; + if (op2 == 0U) + { + return op1; + } + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +#define __RBIT __builtin_arm_rbit + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ (uint8_t)__builtin_clz + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDREXB (uint8_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDREXH (uint16_t)__builtin_arm_ldrex + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDREXW (uint32_t)__builtin_arm_ldrex + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXB (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXH (uint32_t)__builtin_arm_strex + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STREXW (uint32_t)__builtin_arm_strex + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +#define __CLREX __builtin_arm_clrex + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT __builtin_arm_ssat + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT __builtin_arm_usat + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); +} + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief Load-Acquire (8 bit) + \details Executes a LDAB instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire (16 bit) + \details Executes a LDAH instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire (32 bit) + \details Executes a LDA instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief Store-Release (8 bit) + \details Executes a STLB instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (16 bit) + \details Executes a STLH instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (32 bit) + \details Executes a STL instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Load-Acquire Exclusive (8 bit) + \details Executes a LDAB exclusive instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +#define __LDAEXB (uint8_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (16 bit) + \details Executes a LDAH exclusive instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +#define __LDAEXH (uint16_t)__builtin_arm_ldaex + + +/** + \brief Load-Acquire Exclusive (32 bit) + \details Executes a LDA exclusive instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +#define __LDAEX (uint32_t)__builtin_arm_ldaex + + +/** + \brief Store-Release Exclusive (8 bit) + \details Executes a STLB exclusive instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXB (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (16 bit) + \details Executes a STLH exclusive instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEXH (uint32_t)__builtin_arm_stlex + + +/** + \brief Store-Release Exclusive (32 bit) + \details Executes a STL exclusive instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +#define __STLEX (uint32_t)__builtin_arm_stlex + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) + +__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#define __SSAT16(ARG1,ARG2) \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +#define __USAT16(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +#if 0 +#define __PKHBT(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +#define __PKHTB(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + if (ARG3 == 0) \ + __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ + else \ + __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) +#endif + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__ARM_FEATURE_DSP == 1) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#endif /* __CMSIS_ARMCLANG_H */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_compiler.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_compiler.h new file mode 100644 index 0000000000..94212eb87a --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_compiler.h @@ -0,0 +1,266 @@ +/**************************************************************************//** + * @file cmsis_compiler.h + * @brief CMSIS compiler generic header file + * @version V5.0.4 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CMSIS_COMPILER_H +#define __CMSIS_COMPILER_H + +#include + +/* + * Arm Compiler 4/5 + */ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + + +/* + * Arm Compiler 6 (armclang) + */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #include "cmsis_armclang.h" + + +/* + * GNU Compiler + */ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + + +/* + * IAR Compiler + */ +#elif defined ( __ICCARM__ ) + #include + + +/* + * TI Arm Compiler + */ +#elif defined ( __TI_ARM__ ) + #include + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __attribute__((packed)) + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed)) + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed)) + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + + +/* + * TASKING Compiler + */ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __packed__ + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __packed__ + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __packed__ + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __packed__ T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __align(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + + +/* + * COSMIC Compiler + */ +#elif defined ( __CSMC__ ) + #include + + #ifndef __ASM + #define __ASM _asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + // NO RETURN is automatically detected hence no warning here + #define __NO_RETURN + #endif + #ifndef __USED + #warning No compiler specific solution for __USED. __USED is ignored. + #define __USED + #endif + #ifndef __WEAK + #define __WEAK __weak + #endif + #ifndef __PACKED + #define __PACKED @packed + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT @packed struct + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION @packed union + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + @packed struct T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. + #define __ALIGNED(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + + +#else + #error Unknown compiler. +#endif + + +#endif /* __CMSIS_COMPILER_H */ + diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_gcc.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_gcc.h new file mode 100644 index 0000000000..2d9db15a5d --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_gcc.h @@ -0,0 +1,2085 @@ +/**************************************************************************//** + * @file cmsis_gcc.h + * @brief CMSIS compiler GCC header file + * @version V5.0.4 + * @date 09. April 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CMSIS_GCC_H +#define __CMSIS_GCC_H + +/* ignore some GCC warnings */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-conversion" +#pragma GCC diagnostic ignored "-Wconversion" +#pragma GCC diagnostic ignored "-Wunused-parameter" + +/* Fallback for __has_builtin */ +#ifndef __has_builtin + #define __has_builtin(x) (0) +#endif + +/* CMSIS compiler specific defines */ +#ifndef __ASM + #define __ASM __asm +#endif +#ifndef __INLINE + #define __INLINE inline +#endif +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline +#endif +#ifndef __NO_RETURN + #define __NO_RETURN __attribute__((__noreturn__)) +#endif +#ifndef __USED + #define __USED __attribute__((used)) +#endif +#ifndef __WEAK + #define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED + #define __PACKED __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif + + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Control Register (non-secure) + \details Returns the content of the non-secure Control Register when in secure mode. + \return non-secure Control Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Control Register (non-secure) + \details Writes the given value to the non-secure Control Register when in secure state. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) +{ + __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); +} +#endif + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); +} +#endif + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); +} +#endif + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Priority Mask (non-secure) + \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + return(result); +} +#endif + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Priority Mask (non-secure) + \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) +{ + __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); +} +#endif + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Base Priority (non-secure) + \details Returns the current value of the non-secure Base Priority register when in secure state. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Base Priority (non-secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); +} +#endif + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Fault Mask (non-secure) + \details Returns the current value of the non-secure Fault Mask register when in secure state. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Fault Mask (non-secure) + \details Assigns the given value to the non-secure Fault Mask register when in secure state. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); +} +#endif + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + +/** + \brief Get Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + return result; +#endif +} + +#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); +#endif +} +#endif + + +/** + \brief Get Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + return result; +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. + \param [in] MainStackPtrLimit Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); +#endif +} +#endif + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +__STATIC_FORCEINLINE uint32_t __get_FPSCR(void) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#if __has_builtin(__builtin_arm_get_fpscr) +// Re-enable using built-in when GCC has been fixed +// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + return __builtin_arm_get_fpscr(); +#else + uint32_t result; + + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + return(result); +#endif +#else + return(0U); +#endif +} + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#if __has_builtin(__builtin_arm_set_fpscr) +// Re-enable using built-in when GCC has been fixed +// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + __builtin_arm_set_fpscr(fpscr); +#else + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); +#endif +#else + (void)fpscr; +#endif +} + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_RW_REG(r) "+l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_RW_REG(r) "+r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP() __ASM volatile ("nop") + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI() __ASM volatile ("wfi") + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE() __ASM volatile ("wfe") + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV() __ASM volatile ("sev") + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +__STATIC_FORCEINLINE void __ISB(void) +{ + __ASM volatile ("isb 0xF":::"memory"); +} + + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__STATIC_FORCEINLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); +} + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__STATIC_FORCEINLINE void __DMB(void) +{ + __ASM volatile ("dmb 0xF":::"memory"); +} + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __REV(uint32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + return __builtin_bswap32(value); +#else + uint32_t result; + + __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +#endif +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE int16_t __REVSH(int16_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + return (int16_t)__builtin_bswap16(value); +#else + int16_t result; + + __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +#endif +} + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + op2 %= 32U; + if (op2 == 0U) + { + return op1; + } + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value != 0U; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ +#endif + return result; +} + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +#define __CLZ (uint8_t)__builtin_clz + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + return(result); +} + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +__STATIC_FORCEINLINE void __CLREX(void) +{ + __ASM volatile ("clrex" ::: "memory"); +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] ARG1 Value to be saturated + \param [in] ARG2 Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT(ARG1,ARG2) \ +__extension__ \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] ARG1 Value to be saturated + \param [in] ARG2 Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT(ARG1,ARG2) \ + __extension__ \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); +} + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief Load-Acquire (8 bit) + \details Executes a LDAB instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire (16 bit) + \details Executes a LDAH instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire (32 bit) + \details Executes a LDA instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief Store-Release (8 bit) + \details Executes a STLB instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (16 bit) + \details Executes a STLH instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Store-Release (32 bit) + \details Executes a STL instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief Load-Acquire Exclusive (8 bit) + \details Executes a LDAB exclusive instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire Exclusive (16 bit) + \details Executes a LDAH exclusive instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire Exclusive (32 bit) + \details Executes a LDA exclusive instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief Store-Release Exclusive (8 bit) + \details Executes a STLB exclusive instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief Store-Release Exclusive (16 bit) + \details Executes a STLH exclusive instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief Store-Release Exclusive (32 bit) + \details Executes a STL exclusive instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); + return(result); +} + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) + +__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#define __SSAT16(ARG1,ARG2) \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +#define __USAT16(ARG1,ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ + __RES; \ + }) + +__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +#if 0 +#define __PKHBT(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +#define __PKHTB(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + if (ARG3 == 0) \ + __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ + else \ + __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) +#endif + +#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \ + ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) ) + +#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \ + ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) ) + +__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__ARM_FEATURE_DSP == 1) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#pragma GCC diagnostic pop + +#endif /* __CMSIS_GCC_H */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_iccarm.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_iccarm.h new file mode 100644 index 0000000000..11c4af0eba --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_iccarm.h @@ -0,0 +1,935 @@ +/**************************************************************************//** + * @file cmsis_iccarm.h + * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file + * @version V5.0.7 + * @date 19. June 2018 + ******************************************************************************/ + +//------------------------------------------------------------------------------ +// +// Copyright (c) 2017-2018 IAR Systems +// +// Licensed under the Apache License, Version 2.0 (the "License") +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +//------------------------------------------------------------------------------ + + +#ifndef __CMSIS_ICCARM_H__ +#define __CMSIS_ICCARM_H__ + +#ifndef __ICCARM__ + #error This file should only be compiled by ICCARM +#endif + +#pragma system_include + +#define __IAR_FT _Pragma("inline=forced") __intrinsic + +#if (__VER__ >= 8000000) + #define __ICCARM_V8 1 +#else + #define __ICCARM_V8 0 +#endif + +#ifndef __ALIGNED + #if __ICCARM_V8 + #define __ALIGNED(x) __attribute__((aligned(x))) + #elif (__VER__ >= 7080000) + /* Needs IAR language extensions */ + #define __ALIGNED(x) __attribute__((aligned(x))) + #else + #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. + #define __ALIGNED(x) + #endif +#endif + + +/* Define compiler macros for CPU architecture, used in CMSIS 5. + */ +#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ +/* Macros already defined */ +#else + #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' + #if __ARM_ARCH == 6 + #define __ARM_ARCH_6M__ 1 + #elif __ARM_ARCH == 7 + #if __ARM_FEATURE_DSP + #define __ARM_ARCH_7EM__ 1 + #else + #define __ARM_ARCH_7M__ 1 + #endif + #endif /* __ARM_ARCH */ + #endif /* __ARM_ARCH_PROFILE == 'M' */ +#endif + +/* Alternativ core deduction for older ICCARM's */ +#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ + !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) + #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) + #define __ARM_ARCH_6M__ 1 + #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) + #define __ARM_ARCH_7M__ 1 + #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) + #define __ARM_ARCH_7EM__ 1 + #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #else + #error "Unknown target." + #endif +#endif + + + +#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 + #define __IAR_M0_FAMILY 1 +#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 + #define __IAR_M0_FAMILY 1 +#else + #define __IAR_M0_FAMILY 0 +#endif + + +#ifndef __ASM + #define __ASM __asm +#endif + +#ifndef __INLINE + #define __INLINE inline +#endif + +#ifndef __NO_RETURN + #if __ICCARM_V8 + #define __NO_RETURN __attribute__((__noreturn__)) + #else + #define __NO_RETURN _Pragma("object_attribute=__noreturn") + #endif +#endif + +#ifndef __PACKED + #if __ICCARM_V8 + #define __PACKED __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED __packed + #endif +#endif + +#ifndef __PACKED_STRUCT + #if __ICCARM_V8 + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_STRUCT __packed struct + #endif +#endif + +#ifndef __PACKED_UNION + #if __ICCARM_V8 + #define __PACKED_UNION union __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_UNION __packed union + #endif +#endif + +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif + +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline +#endif + +#ifndef __FORCEINLINE + #define __FORCEINLINE _Pragma("inline=forced") +#endif + +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE +#endif + +#ifndef __UNALIGNED_UINT16_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint16_t __iar_uint16_read(void const *ptr) +{ + return *(__packed uint16_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) +#endif + + +#ifndef __UNALIGNED_UINT16_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) +{ + *(__packed uint16_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint32_t __iar_uint32_read(void const *ptr) +{ + return *(__packed uint32_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) +#endif + +#ifndef __UNALIGNED_UINT32_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) +{ + *(__packed uint32_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32 /* deprecated */ +#pragma language=save +#pragma language=extended +__packed struct __iar_u32 { uint32_t v; }; +#pragma language=restore +#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) +#endif + +#ifndef __USED + #if __ICCARM_V8 + #define __USED __attribute__((used)) + #else + #define __USED _Pragma("__root") + #endif +#endif + +#ifndef __WEAK + #if __ICCARM_V8 + #define __WEAK __attribute__((weak)) + #else + #define __WEAK _Pragma("__weak") + #endif +#endif + + +#ifndef __ICCARM_INTRINSICS_VERSION__ + #define __ICCARM_INTRINSICS_VERSION__ 0 +#endif + +#if __ICCARM_INTRINSICS_VERSION__ == 2 + + #if defined(__CLZ) + #undef __CLZ + #endif + #if defined(__REVSH) + #undef __REVSH + #endif + #if defined(__RBIT) + #undef __RBIT + #endif + #if defined(__SSAT) + #undef __SSAT + #endif + #if defined(__USAT) + #undef __USAT + #endif + + #include "iccarm_builtin.h" + + #define __disable_fault_irq __iar_builtin_disable_fiq + #define __disable_irq __iar_builtin_disable_interrupt + #define __enable_fault_irq __iar_builtin_enable_fiq + #define __enable_irq __iar_builtin_enable_interrupt + #define __arm_rsr __iar_builtin_rsr + #define __arm_wsr __iar_builtin_wsr + + + #define __get_APSR() (__arm_rsr("APSR")) + #define __get_BASEPRI() (__arm_rsr("BASEPRI")) + #define __get_CONTROL() (__arm_rsr("CONTROL")) + #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) + + #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + #define __get_FPSCR() (__arm_rsr("FPSCR")) + #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) + #else + #define __get_FPSCR() ( 0 ) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #define __get_IPSR() (__arm_rsr("IPSR")) + #define __get_MSP() (__arm_rsr("MSP")) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __get_MSPLIM() (0U) + #else + #define __get_MSPLIM() (__arm_rsr("MSPLIM")) + #endif + #define __get_PRIMASK() (__arm_rsr("PRIMASK")) + #define __get_PSP() (__arm_rsr("PSP")) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __get_PSPLIM() (0U) + #else + #define __get_PSPLIM() (__arm_rsr("PSPLIM")) + #endif + + #define __get_xPSR() (__arm_rsr("xPSR")) + + #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) + #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) + #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) + #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) + #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __set_MSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) + #endif + #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) + #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __set_PSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) + #endif + + #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) + #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE))) + #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) + #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) + #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) + #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) + #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) + #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) + #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) + #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) + #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) + #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) + #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) + #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __TZ_get_PSPLIM_NS() (0U) + #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) + #else + #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) + #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) + #endif + + #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) + #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) + + #define __NOP __iar_builtin_no_operation + + #define __CLZ __iar_builtin_CLZ + #define __CLREX __iar_builtin_CLREX + + #define __DMB __iar_builtin_DMB + #define __DSB __iar_builtin_DSB + #define __ISB __iar_builtin_ISB + + #define __LDREXB __iar_builtin_LDREXB + #define __LDREXH __iar_builtin_LDREXH + #define __LDREXW __iar_builtin_LDREX + + #define __RBIT __iar_builtin_RBIT + #define __REV __iar_builtin_REV + #define __REV16 __iar_builtin_REV16 + + __IAR_FT int16_t __REVSH(int16_t val) + { + return (int16_t) __iar_builtin_REVSH(val); + } + + #define __ROR __iar_builtin_ROR + #define __RRX __iar_builtin_RRX + + #define __SEV __iar_builtin_SEV + + #if !__IAR_M0_FAMILY + #define __SSAT __iar_builtin_SSAT + #endif + + #define __STREXB __iar_builtin_STREXB + #define __STREXH __iar_builtin_STREXH + #define __STREXW __iar_builtin_STREX + + #if !__IAR_M0_FAMILY + #define __USAT __iar_builtin_USAT + #endif + + #define __WFE __iar_builtin_WFE + #define __WFI __iar_builtin_WFI + + #if __ARM_MEDIA__ + #define __SADD8 __iar_builtin_SADD8 + #define __QADD8 __iar_builtin_QADD8 + #define __SHADD8 __iar_builtin_SHADD8 + #define __UADD8 __iar_builtin_UADD8 + #define __UQADD8 __iar_builtin_UQADD8 + #define __UHADD8 __iar_builtin_UHADD8 + #define __SSUB8 __iar_builtin_SSUB8 + #define __QSUB8 __iar_builtin_QSUB8 + #define __SHSUB8 __iar_builtin_SHSUB8 + #define __USUB8 __iar_builtin_USUB8 + #define __UQSUB8 __iar_builtin_UQSUB8 + #define __UHSUB8 __iar_builtin_UHSUB8 + #define __SADD16 __iar_builtin_SADD16 + #define __QADD16 __iar_builtin_QADD16 + #define __SHADD16 __iar_builtin_SHADD16 + #define __UADD16 __iar_builtin_UADD16 + #define __UQADD16 __iar_builtin_UQADD16 + #define __UHADD16 __iar_builtin_UHADD16 + #define __SSUB16 __iar_builtin_SSUB16 + #define __QSUB16 __iar_builtin_QSUB16 + #define __SHSUB16 __iar_builtin_SHSUB16 + #define __USUB16 __iar_builtin_USUB16 + #define __UQSUB16 __iar_builtin_UQSUB16 + #define __UHSUB16 __iar_builtin_UHSUB16 + #define __SASX __iar_builtin_SASX + #define __QASX __iar_builtin_QASX + #define __SHASX __iar_builtin_SHASX + #define __UASX __iar_builtin_UASX + #define __UQASX __iar_builtin_UQASX + #define __UHASX __iar_builtin_UHASX + #define __SSAX __iar_builtin_SSAX + #define __QSAX __iar_builtin_QSAX + #define __SHSAX __iar_builtin_SHSAX + #define __USAX __iar_builtin_USAX + #define __UQSAX __iar_builtin_UQSAX + #define __UHSAX __iar_builtin_UHSAX + #define __USAD8 __iar_builtin_USAD8 + #define __USADA8 __iar_builtin_USADA8 + #define __SSAT16 __iar_builtin_SSAT16 + #define __USAT16 __iar_builtin_USAT16 + #define __UXTB16 __iar_builtin_UXTB16 + #define __UXTAB16 __iar_builtin_UXTAB16 + #define __SXTB16 __iar_builtin_SXTB16 + #define __SXTAB16 __iar_builtin_SXTAB16 + #define __SMUAD __iar_builtin_SMUAD + #define __SMUADX __iar_builtin_SMUADX + #define __SMMLA __iar_builtin_SMMLA + #define __SMLAD __iar_builtin_SMLAD + #define __SMLADX __iar_builtin_SMLADX + #define __SMLALD __iar_builtin_SMLALD + #define __SMLALDX __iar_builtin_SMLALDX + #define __SMUSD __iar_builtin_SMUSD + #define __SMUSDX __iar_builtin_SMUSDX + #define __SMLSD __iar_builtin_SMLSD + #define __SMLSDX __iar_builtin_SMLSDX + #define __SMLSLD __iar_builtin_SMLSLD + #define __SMLSLDX __iar_builtin_SMLSLDX + #define __SEL __iar_builtin_SEL + #define __QADD __iar_builtin_QADD + #define __QSUB __iar_builtin_QSUB + #define __PKHBT __iar_builtin_PKHBT + #define __PKHTB __iar_builtin_PKHTB + #endif + +#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #define __CLZ __cmsis_iar_clz_not_active + #define __SSAT __cmsis_iar_ssat_not_active + #define __USAT __cmsis_iar_usat_not_active + #define __RBIT __cmsis_iar_rbit_not_active + #define __get_APSR __cmsis_iar_get_APSR_not_active + #endif + + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #define __get_FPSCR __cmsis_iar_get_FPSR_not_active + #define __set_FPSCR __cmsis_iar_set_FPSR_not_active + #endif + + #ifdef __INTRINSICS_INCLUDED + #error intrinsics.h is already included previously! + #endif + + #include + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #undef __CLZ + #undef __SSAT + #undef __USAT + #undef __RBIT + #undef __get_APSR + + __STATIC_INLINE uint8_t __CLZ(uint32_t data) + { + if (data == 0U) { return 32U; } + + uint32_t count = 0U; + uint32_t mask = 0x80000000U; + + while ((data & mask) == 0U) + { + count += 1U; + mask = mask >> 1U; + } + return count; + } + + __STATIC_INLINE uint32_t __RBIT(uint32_t v) + { + uint8_t sc = 31U; + uint32_t r = v; + for (v >>= 1U; v; v >>= 1U) + { + r <<= 1U; + r |= v & 1U; + sc--; + } + return (r << sc); + } + + __STATIC_INLINE uint32_t __get_APSR(void) + { + uint32_t res; + __asm("MRS %0,APSR" : "=r" (res)); + return res; + } + + #endif + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #undef __get_FPSCR + #undef __set_FPSCR + #define __get_FPSCR() (0) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #pragma diag_suppress=Pe940 + #pragma diag_suppress=Pe177 + + #define __enable_irq __enable_interrupt + #define __disable_irq __disable_interrupt + #define __NOP __no_operation + + #define __get_xPSR __get_PSR + + #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) + + __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) + { + return __LDREX((unsigned long *)ptr); + } + + __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) + { + return __STREX(value, (unsigned long *)ptr); + } + #endif + + + /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + #if (__CORTEX_M >= 0x03) + + __IAR_FT uint32_t __RRX(uint32_t value) + { + uint32_t result; + __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc"); + return(result); + } + + __IAR_FT void __set_BASEPRI_MAX(uint32_t value) + { + __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); + } + + + #define __enable_fault_irq __enable_fiq + #define __disable_fault_irq __disable_fiq + + + #endif /* (__CORTEX_M >= 0x03) */ + + __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) + { + return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); + } + + #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + __IAR_FT uint32_t __get_MSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,MSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_MSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR MSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __get_PSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_PSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) + { + __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PSP_NS(uint32_t value) + { + __asm volatile("MSR PSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_MSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSP_NS(uint32_t value) + { + __asm volatile("MSR MSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_SP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,SP_NS" : "=r" (res)); + return res; + } + __IAR_FT void __TZ_set_SP_NS(uint32_t value) + { + __asm volatile("MSR SP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) + { + __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) + { + __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) + { + __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) + { + __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); + } + + #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + +#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) + +#if __IAR_M0_FAMILY + __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) + { + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; + } + + __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) + { + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; + } +#endif + +#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + + __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) + { + uint32_t res; + __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) + { + uint32_t res; + __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) + { + uint32_t res; + __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return res; + } + + __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) + { + __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) + { + __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) + { + __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); + } + +#endif /* (__CORTEX_M >= 0x03) */ + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + + __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) + { + __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) + { + __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) + { + __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + +#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#undef __IAR_FT +#undef __IAR_M0_FAMILY +#undef __ICCARM_V8 + +#pragma diag_default=Pe940 +#pragma diag_default=Pe177 + +#endif /* __CMSIS_ICCARM_H__ */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_version.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_version.h new file mode 100644 index 0000000000..660f612aa3 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/cmsis_version.h @@ -0,0 +1,39 @@ +/**************************************************************************//** + * @file cmsis_version.h + * @brief CMSIS Core(M) Version definitions + * @version V5.0.2 + * @date 19. April 2017 + ******************************************************************************/ +/* + * Copyright (c) 2009-2017 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CMSIS_VERSION_H +#define __CMSIS_VERSION_H + +/* CMSIS Version definitions */ +#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ +#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ +#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ + __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mbl.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mbl.h new file mode 100644 index 0000000000..251e4ede3a --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mbl.h @@ -0,0 +1,1918 @@ +/**************************************************************************//** + * @file core_armv8mbl.h + * @brief CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File + * @version V5.0.7 + * @date 22. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_ARMV8MBL_H_GENERIC +#define __CORE_ARMV8MBL_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_ARMv8MBL + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS definitions */ +#define __ARMv8MBL_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __ARMv8MBL_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __ARMv8MBL_CMSIS_VERSION ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \ + __ARMv8MBL_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M ( 2U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MBL_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_ARMV8MBL_H_DEPENDANT +#define __CORE_ARMV8MBL_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __ARMv8MBL_REV + #define __ARMv8MBL_REV 0x0000U + #warning "__ARMv8MBL_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif + + #ifndef __ETM_PRESENT + #define __ETM_PRESENT 0U + #warning "__ETM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MTB_PRESENT + #define __MTB_PRESENT 0U + #warning "__MTB_PRESENT not defined in device header file; using default!" + #endif + +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group ARMv8MBL */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + uint32_t RESERVED0[6U]; + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[809U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ + uint32_t RESERVED4[4U]; + __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ +#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI Periodic Synchronization Control Register Definitions */ +#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ +#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ + +/* TPI Software Lock Status Register Definitions */ +#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ +#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ + +#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ +#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ + +#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ +#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + uint32_t RESERVED0[7U]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#endif +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */ +#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MBL_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mml.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mml.h new file mode 100644 index 0000000000..3a3148ea31 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_armv8mml.h @@ -0,0 +1,2927 @@ +/**************************************************************************//** + * @file core_armv8mml.h + * @brief CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File + * @version V5.0.7 + * @date 06. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_ARMV8MML_H_GENERIC +#define __CORE_ARMV8MML_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_ARMv8MML + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS Armv8MML definitions */ +#define __ARMv8MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __ARMv8MML_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __ARMv8MML_CMSIS_VERSION ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \ + __ARMv8MML_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (81U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined(__ARM_FEATURE_DSP) + #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MML_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_ARMV8MML_H_DEPENDANT +#define __CORE_ARMV8MML_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __ARMv8MML_REV + #define __ARMv8MML_REV 0x0000U + #warning "__ARMv8MML_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group ARMv8MML */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Sizes Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[809U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) Software Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) Software Lock Status Register */ + uint32_t RESERVED4[4U]; + __IM uint32_t TYPE; /*!< Offset: 0xFC8 (R/ ) Device Identifier Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_SWOSCALER_Pos 0U /*!< TPI ACPR: SWOSCALER Position */ +#define TPI_ACPR_SWOSCALER_Msk (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/) /*!< TPI ACPR: SWOSCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI Periodic Synchronization Control Register Definitions */ +#define TPI_PSCR_PSCount_Pos 0U /*!< TPI PSCR: PSCount Position */ +#define TPI_PSCR_PSCount_Msk (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/) /*!< TPI PSCR: TPSCount Mask */ + +/* TPI Software Lock Status Register Definitions */ +#define TPI_LSR_nTT_Pos 1U /*!< TPI LSR: Not thirty-two bit. Position */ +#define TPI_LSR_nTT_Msk (0x1UL << TPI_LSR_nTT_Pos) /*!< TPI LSR: Not thirty-two bit. Mask */ + +#define TPI_LSR_SLK_Pos 1U /*!< TPI LSR: Software Lock status Position */ +#define TPI_LSR_SLK_Msk (0x1UL << TPI_LSR_SLK_Pos) /*!< TPI LSR: Software Lock status Mask */ + +#define TPI_LSR_SLI_Pos 0U /*!< TPI LSR: Software Lock implemented Position */ +#define TPI_LSR_SLI_Msk (0x1UL /*<< TPI_LSR_SLI_Pos*/) /*!< TPI LSR: Software Lock implemented Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFO depth Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFO depth Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_ARMV8MML_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0.h new file mode 100644 index 0000000000..f929bba07b --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0.h @@ -0,0 +1,949 @@ +/**************************************************************************//** + * @file core_cm0.h + * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File + * @version V5.0.5 + * @date 28. May 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0_H_GENERIC +#define __CORE_CM0_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M0 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM0 definitions */ +#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ + __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (0U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0_H_DEPENDANT +#define __CORE_CM0_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0_REV + #define __CM0_REV 0x0000U + #warning "__CM0_REV not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M0 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + uint32_t RESERVED0; + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + Address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)0x0U; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)0x0U; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0plus.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0plus.h new file mode 100644 index 0000000000..424011ac36 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm0plus.h @@ -0,0 +1,1083 @@ +/**************************************************************************//** + * @file core_cm0plus.h + * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File + * @version V5.0.6 + * @date 28. May 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM0PLUS_H_GENERIC +#define __CORE_CM0PLUS_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex-M0+ + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM0+ definitions */ +#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ + __CM0PLUS_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (0U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM0PLUS_H_DEPENDANT +#define __CORE_CM0PLUS_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM0PLUS_REV + #define __CM0PLUS_REV 0x0000U + #warning "__CM0PLUS_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex-M0+ */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M0+ header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0+ */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; + +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM0PLUS_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm1.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm1.h new file mode 100644 index 0000000000..0ed678e3b8 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm1.h @@ -0,0 +1,976 @@ +/**************************************************************************//** + * @file core_cm1.h + * @brief CMSIS Cortex-M1 Core Peripheral Access Layer Header File + * @version V1.0.0 + * @date 23. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM1_H_GENERIC +#define __CORE_CM1_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M1 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM1 definitions */ +#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \ + __CM1_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (1U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM1_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM1_H_DEPENDANT +#define __CORE_CM1_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM1_REV + #define __CM1_REV 0x0100U + #warning "__CM1_REV not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M1 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + uint32_t RESERVED0; + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_ITCMUAEN_Pos 4U /*!< ACTLR: Instruction TCM Upper Alias Enable Position */ +#define SCnSCB_ACTLR_ITCMUAEN_Msk (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos) /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */ + +#define SCnSCB_ACTLR_ITCMLAEN_Pos 3U /*!< ACTLR: Instruction TCM Lower Alias Enable Position */ +#define SCnSCB_ACTLR_ITCMLAEN_Msk (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos) /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the Cortex-M1 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M1 */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + Address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)0x0U; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)0x0U; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM1_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm23.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm23.h new file mode 100644 index 0000000000..acbc5dfea2 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm23.h @@ -0,0 +1,1993 @@ +/**************************************************************************//** + * @file core_cm23.h + * @brief CMSIS Cortex-M23 Core Peripheral Access Layer Header File + * @version V5.0.7 + * @date 22. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM23_H_GENERIC +#define __CORE_CM23_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M23 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS definitions */ +#define __CM23_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM23_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM23_CMSIS_VERSION ((__CM23_CMSIS_VERSION_MAIN << 16U) | \ + __CM23_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (23U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM23_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM23_H_DEPENDANT +#define __CORE_CM23_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM23_REV + #define __CM23_REV 0x0000U + #warning "__CM23_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 0U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif + + #ifndef __ETM_PRESENT + #define __ETM_PRESENT 0U + #warning "__ETM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MTB_PRESENT + #define __MTB_PRESENT 0U + #warning "__MTB_PRESENT not defined in device header file; using default!" + #endif + +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M23 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint32_t IPR[124U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ +#else + uint32_t RESERVED0; +#endif + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHPR[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + uint32_t RESERVED0[6U]; + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x3UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ + __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ + __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration Test FIFO Test Data 0 Register Definitions */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ +#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ +#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ +#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ + +/* TPI Integration Test ATB Control Register 2 Register Definitions */ +#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ +#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ + +#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ +#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ + +#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ +#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ + +#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ +#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ + +/* TPI Integration Test FIFO Test Data 1 Register Definitions */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ +#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ +#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ +#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ + +/* TPI Integration Test ATB Control Register 0 Definitions */ +#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ +#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ + +#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ +#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ + +#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ +#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ + +#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ +#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + uint32_t RESERVED0[7U]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 1U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: EN Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: EN Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#endif +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_DWTENA_Pos 24U /*!< CoreDebug DEMCR: DWTENA Position */ +#define CoreDebug_DEMCR_DWTENA_Msk (1UL << CoreDebug_DEMCR_DWTENA_Pos) /*!< CoreDebug DEMCR: DWTENA Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else +/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M23 */ +/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M23 */ + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + +#define __NVIC_SetPriorityGrouping(X) (void)(X) +#define __NVIC_GetPriorityGrouping() (0U) + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + If VTOR is not present address 0 must be mapped to SRAM. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + uint32_t *vectors = (uint32_t *)SCB->VTOR; +#else + uint32_t *vectors = (uint32_t *)0x0U; +#endif + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM23_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm3.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm3.h new file mode 100644 index 0000000000..74bff64be4 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm3.h @@ -0,0 +1,1941 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 04. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM3_H_GENERIC +#define __CORE_CM3_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M3 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM3 definitions */ +#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ + __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (3U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM3_H_DEPENDANT +#define __CORE_CM3_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM3_REV + #define __CM3_REV 0x0200U + #warning "__CM3_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M3 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#else +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +#else + uint32_t RESERVED1[1U]; +#endif +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm33.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm33.h new file mode 100644 index 0000000000..6cd2db77fe --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm33.h @@ -0,0 +1,3002 @@ +/**************************************************************************//** + * @file core_cm33.h + * @brief CMSIS Cortex-M33 Core Peripheral Access Layer Header File + * @version V5.0.9 + * @date 06. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM33_H_GENERIC +#define __CORE_CM33_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M33 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM33 definitions */ +#define __CM33_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM33_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM33_CMSIS_VERSION ((__CM33_CMSIS_VERSION_MAIN << 16U) | \ + __CM33_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (33U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined (__TARGET_FPU_VFP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined (__ARM_PCS_VFP) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined (__ARMVFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + + #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U) + #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U) + #define __DSP_USED 1U + #else + #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)" + #define __DSP_USED 0U + #endif + #else + #define __DSP_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined (__TI_VFP_SUPPORT__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined (__FPU_VFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM33_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM33_H_DEPENDANT +#define __CORE_CM33_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM33_REV + #define __CM33_REV 0x0000U + #warning "__CM33_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __SAUREGION_PRESENT + #define __SAUREGION_PRESENT 0U + #warning "__SAUREGION_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DSP_PRESENT + #define __DSP_PRESENT 0U + #warning "__DSP_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M33 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core SAU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:7; /*!< bit: 9..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t IT:2; /*!< bit: 25..26 saved IT state (read 0) */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_IT_Pos 25U /*!< xPSR: IT Position */ +#define xPSR_IT_Msk (3UL << xPSR_IT_Pos) /*!< xPSR: IT Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack-pointer select */ + uint32_t FPCA:1; /*!< bit: 2 Floating-point context active */ + uint32_t SFPA:1; /*!< bit: 3 Secure floating-point active */ + uint32_t _reserved1:28; /*!< bit: 4..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SFPA_Pos 3U /*!< CONTROL: SFPA Position */ +#define CONTROL_SFPA_Msk (1UL << CONTROL_SFPA_Pos) /*!< CONTROL: SFPA Mask */ + +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[16U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[16U]; + __IOM uint32_t ICER[16U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[16U]; + __IOM uint32_t ISPR[16U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[16U]; + __IOM uint32_t ICPR[16U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[16U]; + __IOM uint32_t IABR[16U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[16U]; + __IOM uint32_t ITNS[16U]; /*!< Offset: 0x280 (R/W) Interrupt Non-Secure State Register */ + uint32_t RESERVED5[16U]; + __IOM uint8_t IPR[496U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED6[580U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[6U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + __IOM uint32_t NSACR; /*!< Offset: 0x08C (R/W) Non-Secure Access Control Register */ + uint32_t RESERVED3[92U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_PENDNMISET_Pos 31U /*!< SCB ICSR: PENDNMISET Position */ +#define SCB_ICSR_PENDNMISET_Msk (1UL << SCB_ICSR_PENDNMISET_Pos) /*!< SCB ICSR: PENDNMISET Mask */ + +#define SCB_ICSR_NMIPENDSET_Pos SCB_ICSR_PENDNMISET_Pos /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */ +#define SCB_ICSR_NMIPENDSET_Msk SCB_ICSR_PENDNMISET_Msk /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */ + +#define SCB_ICSR_PENDNMICLR_Pos 30U /*!< SCB ICSR: PENDNMICLR Position */ +#define SCB_ICSR_PENDNMICLR_Msk (1UL << SCB_ICSR_PENDNMICLR_Pos) /*!< SCB ICSR: PENDNMICLR Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_STTNS_Pos 24U /*!< SCB ICSR: STTNS Position (Security Extension) */ +#define SCB_ICSR_STTNS_Msk (1UL << SCB_ICSR_STTNS_Pos) /*!< SCB ICSR: STTNS Mask (Security Extension) */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIS_Pos 14U /*!< SCB AIRCR: PRIS Position */ +#define SCB_AIRCR_PRIS_Msk (1UL << SCB_AIRCR_PRIS_Pos) /*!< SCB AIRCR: PRIS Mask */ + +#define SCB_AIRCR_BFHFNMINS_Pos 13U /*!< SCB AIRCR: BFHFNMINS Position */ +#define SCB_AIRCR_BFHFNMINS_Msk (1UL << SCB_AIRCR_BFHFNMINS_Pos) /*!< SCB AIRCR: BFHFNMINS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQS_Pos 3U /*!< SCB AIRCR: SYSRESETREQS Position */ +#define SCB_AIRCR_SYSRESETREQS_Msk (1UL << SCB_AIRCR_SYSRESETREQS_Pos) /*!< SCB AIRCR: SYSRESETREQS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEPS_Pos 3U /*!< SCB SCR: SLEEPDEEPS Position */ +#define SCB_SCR_SLEEPDEEPS_Msk (1UL << SCB_SCR_SLEEPDEEPS_Pos) /*!< SCB SCR: SLEEPDEEPS Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: BP Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: BP Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: IC Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: IC Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: DC Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: DC Mask */ + +#define SCB_CCR_STKOFHFNMIGN_Pos 10U /*!< SCB CCR: STKOFHFNMIGN Position */ +#define SCB_CCR_STKOFHFNMIGN_Msk (1UL << SCB_CCR_STKOFHFNMIGN_Pos) /*!< SCB CCR: STKOFHFNMIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_HARDFAULTPENDED_Pos 21U /*!< SCB SHCSR: HARDFAULTPENDED Position */ +#define SCB_SHCSR_HARDFAULTPENDED_Msk (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos) /*!< SCB SHCSR: HARDFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTPENDED_Pos 20U /*!< SCB SHCSR: SECUREFAULTPENDED Position */ +#define SCB_SHCSR_SECUREFAULTPENDED_Msk (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos) /*!< SCB SHCSR: SECUREFAULTPENDED Mask */ + +#define SCB_SHCSR_SECUREFAULTENA_Pos 19U /*!< SCB SHCSR: SECUREFAULTENA Position */ +#define SCB_SHCSR_SECUREFAULTENA_Msk (1UL << SCB_SHCSR_SECUREFAULTENA_Pos) /*!< SCB SHCSR: SECUREFAULTENA Mask */ + +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_NMIACT_Pos 5U /*!< SCB SHCSR: NMIACT Position */ +#define SCB_SHCSR_NMIACT_Msk (1UL << SCB_SHCSR_NMIACT_Pos) /*!< SCB SHCSR: NMIACT Mask */ + +#define SCB_SHCSR_SECUREFAULTACT_Pos 4U /*!< SCB SHCSR: SECUREFAULTACT Position */ +#define SCB_SHCSR_SECUREFAULTACT_Msk (1UL << SCB_SHCSR_SECUREFAULTACT_Pos) /*!< SCB SHCSR: SECUREFAULTACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_HARDFAULTACT_Pos 2U /*!< SCB SHCSR: HARDFAULTACT Position */ +#define SCB_SHCSR_HARDFAULTACT_Msk (1UL << SCB_SHCSR_HARDFAULTACT_Pos) /*!< SCB SHCSR: HARDFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_STKOF_Pos (SCB_CFSR_USGFAULTSR_Pos + 4U) /*!< SCB CFSR (UFSR): STKOF Position */ +#define SCB_CFSR_STKOF_Msk (1UL << SCB_CFSR_STKOF_Pos) /*!< SCB CFSR (UFSR): STKOF Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Non-Secure Access Control Register Definitions */ +#define SCB_NSACR_CP11_Pos 11U /*!< SCB NSACR: CP11 Position */ +#define SCB_NSACR_CP11_Msk (1UL << SCB_NSACR_CP11_Pos) /*!< SCB NSACR: CP11 Mask */ + +#define SCB_NSACR_CP10_Pos 10U /*!< SCB NSACR: CP10 Position */ +#define SCB_NSACR_CP10_Msk (1UL << SCB_NSACR_CP10_Pos) /*!< SCB NSACR: CP10 Mask */ + +#define SCB_NSACR_CPn_Pos 0U /*!< SCB NSACR: CPn Position */ +#define SCB_NSACR_CPn_Msk (1UL /*<< SCB_NSACR_CPn_Pos*/) /*!< SCB NSACR: CPn Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ + __IOM uint32_t CPPWR; /*!< Offset: 0x00C (R/W) Coprocessor Power Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) ITM Device Architecture Register */ + uint32_t RESERVED6[4U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Stimulus Port Register Definitions */ +#define ITM_STIM_DISABLED_Pos 1U /*!< ITM STIM: DISABLED Position */ +#define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM STIM: DISABLED Mask */ + +#define ITM_STIM_FIFOREADY_Pos 0U /*!< ITM STIM: FIFOREADY Position */ +#define ITM_STIM_FIFOREADY_Msk (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/) /*!< ITM STIM: FIFOREADY Mask */ + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TRACEBUSID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TRACEBUSID_Msk (0x7FUL << ITM_TCR_TRACEBUSID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPRESCALE_Pos 8U /*!< ITM TCR: TSPRESCALE Position */ +#define ITM_TCR_TSPRESCALE_Msk (3UL << ITM_TCR_TSPRESCALE_Pos) /*!< ITM TCR: TSPRESCALE Mask */ + +#define ITM_TCR_STALLENA_Pos 5U /*!< ITM TCR: STALLENA Position */ +#define ITM_TCR_STALLENA_Msk (1UL << ITM_TCR_STALLENA_Pos) /*!< ITM TCR: STALLENA Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + uint32_t RESERVED3[1U]; + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED4[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + uint32_t RESERVED5[1U]; + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED6[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + uint32_t RESERVED7[1U]; + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED8[1U]; + __IOM uint32_t COMP4; /*!< Offset: 0x060 (R/W) Comparator Register 4 */ + uint32_t RESERVED9[1U]; + __IOM uint32_t FUNCTION4; /*!< Offset: 0x068 (R/W) Function Register 4 */ + uint32_t RESERVED10[1U]; + __IOM uint32_t COMP5; /*!< Offset: 0x070 (R/W) Comparator Register 5 */ + uint32_t RESERVED11[1U]; + __IOM uint32_t FUNCTION5; /*!< Offset: 0x078 (R/W) Function Register 5 */ + uint32_t RESERVED12[1U]; + __IOM uint32_t COMP6; /*!< Offset: 0x080 (R/W) Comparator Register 6 */ + uint32_t RESERVED13[1U]; + __IOM uint32_t FUNCTION6; /*!< Offset: 0x088 (R/W) Function Register 6 */ + uint32_t RESERVED14[1U]; + __IOM uint32_t COMP7; /*!< Offset: 0x090 (R/W) Comparator Register 7 */ + uint32_t RESERVED15[1U]; + __IOM uint32_t FUNCTION7; /*!< Offset: 0x098 (R/W) Function Register 7 */ + uint32_t RESERVED16[1U]; + __IOM uint32_t COMP8; /*!< Offset: 0x0A0 (R/W) Comparator Register 8 */ + uint32_t RESERVED17[1U]; + __IOM uint32_t FUNCTION8; /*!< Offset: 0x0A8 (R/W) Function Register 8 */ + uint32_t RESERVED18[1U]; + __IOM uint32_t COMP9; /*!< Offset: 0x0B0 (R/W) Comparator Register 9 */ + uint32_t RESERVED19[1U]; + __IOM uint32_t FUNCTION9; /*!< Offset: 0x0B8 (R/W) Function Register 9 */ + uint32_t RESERVED20[1U]; + __IOM uint32_t COMP10; /*!< Offset: 0x0C0 (R/W) Comparator Register 10 */ + uint32_t RESERVED21[1U]; + __IOM uint32_t FUNCTION10; /*!< Offset: 0x0C8 (R/W) Function Register 10 */ + uint32_t RESERVED22[1U]; + __IOM uint32_t COMP11; /*!< Offset: 0x0D0 (R/W) Comparator Register 11 */ + uint32_t RESERVED23[1U]; + __IOM uint32_t FUNCTION11; /*!< Offset: 0x0D8 (R/W) Function Register 11 */ + uint32_t RESERVED24[1U]; + __IOM uint32_t COMP12; /*!< Offset: 0x0E0 (R/W) Comparator Register 12 */ + uint32_t RESERVED25[1U]; + __IOM uint32_t FUNCTION12; /*!< Offset: 0x0E8 (R/W) Function Register 12 */ + uint32_t RESERVED26[1U]; + __IOM uint32_t COMP13; /*!< Offset: 0x0F0 (R/W) Comparator Register 13 */ + uint32_t RESERVED27[1U]; + __IOM uint32_t FUNCTION13; /*!< Offset: 0x0F8 (R/W) Function Register 13 */ + uint32_t RESERVED28[1U]; + __IOM uint32_t COMP14; /*!< Offset: 0x100 (R/W) Comparator Register 14 */ + uint32_t RESERVED29[1U]; + __IOM uint32_t FUNCTION14; /*!< Offset: 0x108 (R/W) Function Register 14 */ + uint32_t RESERVED30[1U]; + __IOM uint32_t COMP15; /*!< Offset: 0x110 (R/W) Comparator Register 15 */ + uint32_t RESERVED31[1U]; + __IOM uint32_t FUNCTION15; /*!< Offset: 0x118 (R/W) Function Register 15 */ + uint32_t RESERVED32[934U]; + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ + uint32_t RESERVED33[1U]; + __IM uint32_t DEVARCH; /*!< Offset: 0xFBC (R/ ) Device Architecture Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCDISS_Pos 23U /*!< DWT CTRL: CYCDISS Position */ +#define DWT_CTRL_CYCDISS_Msk (0x1UL << DWT_CTRL_CYCDISS_Pos) /*!< DWT CTRL: CYCDISS Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_ID_Pos 27U /*!< DWT FUNCTION: ID Position */ +#define DWT_FUNCTION_ID_Msk (0x1FUL << DWT_FUNCTION_ID_Pos) /*!< DWT FUNCTION: ID Mask */ + +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_ACTION_Pos 4U /*!< DWT FUNCTION: ACTION Position */ +#define DWT_FUNCTION_ACTION_Msk (0x1UL << DWT_FUNCTION_ACTION_Pos) /*!< DWT FUNCTION: ACTION Mask */ + +#define DWT_FUNCTION_MATCH_Pos 0U /*!< DWT FUNCTION: MATCH Position */ +#define DWT_FUNCTION_MATCH_Msk (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/) /*!< DWT FUNCTION: MATCH Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IOM uint32_t PSCR; /*!< Offset: 0x308 (R/W) Periodic Synchronization Control Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t ITFTTD0; /*!< Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register */ + __IOM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0 */ + __IM uint32_t ITFTTD1; /*!< Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) Device Configuration Register */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) Device Type Identifier Register */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_FOnMan_Pos 6U /*!< TPI FFCR: FOnMan Position */ +#define TPI_FFCR_FOnMan_Msk (0x1UL << TPI_FFCR_FOnMan_Pos) /*!< TPI FFCR: FOnMan Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration Test FIFO Test Data 0 Register Definitions */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */ +#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data2_Pos 16U /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */ +#define TPI_ITFTTD0_ATB_IF1_data2_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data1_Pos 8U /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */ +#define TPI_ITFTTD0_ATB_IF1_data1_Msk (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos) /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */ + +#define TPI_ITFTTD0_ATB_IF1_data0_Pos 0U /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */ +#define TPI_ITFTTD0_ATB_IF1_data0_Msk (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */ + +/* TPI Integration Test ATB Control Register 2 Register Definitions */ +#define TPI_ITATBCTR2_AFVALID2S_Pos 1U /*!< TPI ITATBCTR2: AFVALID2S Position */ +#define TPI_ITATBCTR2_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos) /*!< TPI ITATBCTR2: AFVALID2SS Mask */ + +#define TPI_ITATBCTR2_AFVALID1S_Pos 1U /*!< TPI ITATBCTR2: AFVALID1S Position */ +#define TPI_ITATBCTR2_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos) /*!< TPI ITATBCTR2: AFVALID1SS Mask */ + +#define TPI_ITATBCTR2_ATREADY2S_Pos 0U /*!< TPI ITATBCTR2: ATREADY2S Position */ +#define TPI_ITATBCTR2_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/) /*!< TPI ITATBCTR2: ATREADY2S Mask */ + +#define TPI_ITATBCTR2_ATREADY1S_Pos 0U /*!< TPI ITATBCTR2: ATREADY1S Position */ +#define TPI_ITATBCTR2_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/) /*!< TPI ITATBCTR2: ATREADY1S Mask */ + +/* TPI Integration Test FIFO Test Data 1 Register Definitions */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos 29U /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos 27U /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */ +#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */ + +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos 26U /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */ +#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos) /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */ + +#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos 24U /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */ +#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data2_Pos 16U /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */ +#define TPI_ITFTTD1_ATB_IF2_data2_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data1_Pos 8U /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */ +#define TPI_ITFTTD1_ATB_IF2_data1_Msk (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos) /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */ + +#define TPI_ITFTTD1_ATB_IF2_data0_Pos 0U /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */ +#define TPI_ITFTTD1_ATB_IF2_data0_Msk (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */ + +/* TPI Integration Test ATB Control Register 0 Definitions */ +#define TPI_ITATBCTR0_AFVALID2S_Pos 1U /*!< TPI ITATBCTR0: AFVALID2S Position */ +#define TPI_ITATBCTR0_AFVALID2S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos) /*!< TPI ITATBCTR0: AFVALID2SS Mask */ + +#define TPI_ITATBCTR0_AFVALID1S_Pos 1U /*!< TPI ITATBCTR0: AFVALID1S Position */ +#define TPI_ITATBCTR0_AFVALID1S_Msk (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos) /*!< TPI ITATBCTR0: AFVALID1SS Mask */ + +#define TPI_ITATBCTR0_ATREADY2S_Pos 0U /*!< TPI ITATBCTR0: ATREADY2S Position */ +#define TPI_ITATBCTR0_ATREADY2S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/) /*!< TPI ITATBCTR0: ATREADY2S Mask */ + +#define TPI_ITATBCTR0_ATREADY1S_Pos 0U /*!< TPI ITATBCTR0: ATREADY1S Position */ +#define TPI_ITATBCTR0_ATREADY1S_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/) /*!< TPI ITATBCTR0: ATREADY1S Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_FIFOSZ_Pos 6U /*!< TPI DEVID: FIFOSZ Position */ +#define TPI_DEVID_FIFOSZ_Msk (0x7UL << TPI_DEVID_FIFOSZ_Pos) /*!< TPI DEVID: FIFOSZ Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) MPU Region Limit Address Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Region Base Address Register Alias 1 */ + __IOM uint32_t RLAR_A1; /*!< Offset: 0x018 (R/W) MPU Region Limit Address Register Alias 1 */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Region Base Address Register Alias 2 */ + __IOM uint32_t RLAR_A2; /*!< Offset: 0x020 (R/W) MPU Region Limit Address Register Alias 2 */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Region Base Address Register Alias 3 */ + __IOM uint32_t RLAR_A3; /*!< Offset: 0x028 (R/W) MPU Region Limit Address Register Alias 3 */ + uint32_t RESERVED0[1]; + union { + __IOM uint32_t MAIR[2]; + struct { + __IOM uint32_t MAIR0; /*!< Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0 */ + __IOM uint32_t MAIR1; /*!< Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1 */ + }; + }; +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_BASE_Pos 5U /*!< MPU RBAR: BASE Position */ +#define MPU_RBAR_BASE_Msk (0x7FFFFFFUL << MPU_RBAR_BASE_Pos) /*!< MPU RBAR: BASE Mask */ + +#define MPU_RBAR_SH_Pos 3U /*!< MPU RBAR: SH Position */ +#define MPU_RBAR_SH_Msk (0x3UL << MPU_RBAR_SH_Pos) /*!< MPU RBAR: SH Mask */ + +#define MPU_RBAR_AP_Pos 1U /*!< MPU RBAR: AP Position */ +#define MPU_RBAR_AP_Msk (0x3UL << MPU_RBAR_AP_Pos) /*!< MPU RBAR: AP Mask */ + +#define MPU_RBAR_XN_Pos 0U /*!< MPU RBAR: XN Position */ +#define MPU_RBAR_XN_Msk (01UL /*<< MPU_RBAR_XN_Pos*/) /*!< MPU RBAR: XN Mask */ + +/* MPU Region Limit Address Register Definitions */ +#define MPU_RLAR_LIMIT_Pos 5U /*!< MPU RLAR: LIMIT Position */ +#define MPU_RLAR_LIMIT_Msk (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos) /*!< MPU RLAR: LIMIT Mask */ + +#define MPU_RLAR_AttrIndx_Pos 1U /*!< MPU RLAR: AttrIndx Position */ +#define MPU_RLAR_AttrIndx_Msk (0x7UL << MPU_RLAR_AttrIndx_Pos) /*!< MPU RLAR: AttrIndx Mask */ + +#define MPU_RLAR_EN_Pos 0U /*!< MPU RLAR: Region enable bit Position */ +#define MPU_RLAR_EN_Msk (1UL /*<< MPU_RLAR_EN_Pos*/) /*!< MPU RLAR: Region enable bit Disable Mask */ + +/* MPU Memory Attribute Indirection Register 0 Definitions */ +#define MPU_MAIR0_Attr3_Pos 24U /*!< MPU MAIR0: Attr3 Position */ +#define MPU_MAIR0_Attr3_Msk (0xFFUL << MPU_MAIR0_Attr3_Pos) /*!< MPU MAIR0: Attr3 Mask */ + +#define MPU_MAIR0_Attr2_Pos 16U /*!< MPU MAIR0: Attr2 Position */ +#define MPU_MAIR0_Attr2_Msk (0xFFUL << MPU_MAIR0_Attr2_Pos) /*!< MPU MAIR0: Attr2 Mask */ + +#define MPU_MAIR0_Attr1_Pos 8U /*!< MPU MAIR0: Attr1 Position */ +#define MPU_MAIR0_Attr1_Msk (0xFFUL << MPU_MAIR0_Attr1_Pos) /*!< MPU MAIR0: Attr1 Mask */ + +#define MPU_MAIR0_Attr0_Pos 0U /*!< MPU MAIR0: Attr0 Position */ +#define MPU_MAIR0_Attr0_Msk (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/) /*!< MPU MAIR0: Attr0 Mask */ + +/* MPU Memory Attribute Indirection Register 1 Definitions */ +#define MPU_MAIR1_Attr7_Pos 24U /*!< MPU MAIR1: Attr7 Position */ +#define MPU_MAIR1_Attr7_Msk (0xFFUL << MPU_MAIR1_Attr7_Pos) /*!< MPU MAIR1: Attr7 Mask */ + +#define MPU_MAIR1_Attr6_Pos 16U /*!< MPU MAIR1: Attr6 Position */ +#define MPU_MAIR1_Attr6_Msk (0xFFUL << MPU_MAIR1_Attr6_Pos) /*!< MPU MAIR1: Attr6 Mask */ + +#define MPU_MAIR1_Attr5_Pos 8U /*!< MPU MAIR1: Attr5 Position */ +#define MPU_MAIR1_Attr5_Msk (0xFFUL << MPU_MAIR1_Attr5_Pos) /*!< MPU MAIR1: Attr5 Mask */ + +#define MPU_MAIR1_Attr4_Pos 0U /*!< MPU MAIR1: Attr4 Position */ +#define MPU_MAIR1_Attr4_Msk (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/) /*!< MPU MAIR1: Attr4 Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SAU Security Attribution Unit (SAU) + \brief Type definitions for the Security Attribution Unit (SAU) + @{ + */ + +/** + \brief Structure type to access the Security Attribution Unit (SAU). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ + __IM uint32_t TYPE; /*!< Offset: 0x004 (R/ ) SAU Type Register */ +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) SAU Region Number Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) SAU Region Base Address Register */ + __IOM uint32_t RLAR; /*!< Offset: 0x010 (R/W) SAU Region Limit Address Register */ +#else + uint32_t RESERVED0[3]; +#endif + __IOM uint32_t SFSR; /*!< Offset: 0x014 (R/W) Secure Fault Status Register */ + __IOM uint32_t SFAR; /*!< Offset: 0x018 (R/W) Secure Fault Address Register */ +} SAU_Type; + +/* SAU Control Register Definitions */ +#define SAU_CTRL_ALLNS_Pos 1U /*!< SAU CTRL: ALLNS Position */ +#define SAU_CTRL_ALLNS_Msk (1UL << SAU_CTRL_ALLNS_Pos) /*!< SAU CTRL: ALLNS Mask */ + +#define SAU_CTRL_ENABLE_Pos 0U /*!< SAU CTRL: ENABLE Position */ +#define SAU_CTRL_ENABLE_Msk (1UL /*<< SAU_CTRL_ENABLE_Pos*/) /*!< SAU CTRL: ENABLE Mask */ + +/* SAU Type Register Definitions */ +#define SAU_TYPE_SREGION_Pos 0U /*!< SAU TYPE: SREGION Position */ +#define SAU_TYPE_SREGION_Msk (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/) /*!< SAU TYPE: SREGION Mask */ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) +/* SAU Region Number Register Definitions */ +#define SAU_RNR_REGION_Pos 0U /*!< SAU RNR: REGION Position */ +#define SAU_RNR_REGION_Msk (0xFFUL /*<< SAU_RNR_REGION_Pos*/) /*!< SAU RNR: REGION Mask */ + +/* SAU Region Base Address Register Definitions */ +#define SAU_RBAR_BADDR_Pos 5U /*!< SAU RBAR: BADDR Position */ +#define SAU_RBAR_BADDR_Msk (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos) /*!< SAU RBAR: BADDR Mask */ + +/* SAU Region Limit Address Register Definitions */ +#define SAU_RLAR_LADDR_Pos 5U /*!< SAU RLAR: LADDR Position */ +#define SAU_RLAR_LADDR_Msk (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos) /*!< SAU RLAR: LADDR Mask */ + +#define SAU_RLAR_NSC_Pos 1U /*!< SAU RLAR: NSC Position */ +#define SAU_RLAR_NSC_Msk (1UL << SAU_RLAR_NSC_Pos) /*!< SAU RLAR: NSC Mask */ + +#define SAU_RLAR_ENABLE_Pos 0U /*!< SAU RLAR: ENABLE Position */ +#define SAU_RLAR_ENABLE_Msk (1UL /*<< SAU_RLAR_ENABLE_Pos*/) /*!< SAU RLAR: ENABLE Mask */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + +/* Secure Fault Status Register Definitions */ +#define SAU_SFSR_LSERR_Pos 7U /*!< SAU SFSR: LSERR Position */ +#define SAU_SFSR_LSERR_Msk (1UL << SAU_SFSR_LSERR_Pos) /*!< SAU SFSR: LSERR Mask */ + +#define SAU_SFSR_SFARVALID_Pos 6U /*!< SAU SFSR: SFARVALID Position */ +#define SAU_SFSR_SFARVALID_Msk (1UL << SAU_SFSR_SFARVALID_Pos) /*!< SAU SFSR: SFARVALID Mask */ + +#define SAU_SFSR_LSPERR_Pos 5U /*!< SAU SFSR: LSPERR Position */ +#define SAU_SFSR_LSPERR_Msk (1UL << SAU_SFSR_LSPERR_Pos) /*!< SAU SFSR: LSPERR Mask */ + +#define SAU_SFSR_INVTRAN_Pos 4U /*!< SAU SFSR: INVTRAN Position */ +#define SAU_SFSR_INVTRAN_Msk (1UL << SAU_SFSR_INVTRAN_Pos) /*!< SAU SFSR: INVTRAN Mask */ + +#define SAU_SFSR_AUVIOL_Pos 3U /*!< SAU SFSR: AUVIOL Position */ +#define SAU_SFSR_AUVIOL_Msk (1UL << SAU_SFSR_AUVIOL_Pos) /*!< SAU SFSR: AUVIOL Mask */ + +#define SAU_SFSR_INVER_Pos 2U /*!< SAU SFSR: INVER Position */ +#define SAU_SFSR_INVER_Msk (1UL << SAU_SFSR_INVER_Pos) /*!< SAU SFSR: INVER Mask */ + +#define SAU_SFSR_INVIS_Pos 1U /*!< SAU SFSR: INVIS Position */ +#define SAU_SFSR_INVIS_Msk (1UL << SAU_SFSR_INVIS_Pos) /*!< SAU SFSR: INVIS Mask */ + +#define SAU_SFSR_INVEP_Pos 0U /*!< SAU SFSR: INVEP Position */ +#define SAU_SFSR_INVEP_Msk (1UL /*<< SAU_SFSR_INVEP_Pos*/) /*!< SAU SFSR: INVEP Mask */ + +/*@} end of group CMSIS_SAU */ +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_LSPENS_Pos 29U /*!< FPCCR: LSPENS Position */ +#define FPU_FPCCR_LSPENS_Msk (1UL << FPU_FPCCR_LSPENS_Pos) /*!< FPCCR: LSPENS bit Mask */ + +#define FPU_FPCCR_CLRONRET_Pos 28U /*!< FPCCR: CLRONRET Position */ +#define FPU_FPCCR_CLRONRET_Msk (1UL << FPU_FPCCR_CLRONRET_Pos) /*!< FPCCR: CLRONRET bit Mask */ + +#define FPU_FPCCR_CLRONRETS_Pos 27U /*!< FPCCR: CLRONRETS Position */ +#define FPU_FPCCR_CLRONRETS_Msk (1UL << FPU_FPCCR_CLRONRETS_Pos) /*!< FPCCR: CLRONRETS bit Mask */ + +#define FPU_FPCCR_TS_Pos 26U /*!< FPCCR: TS Position */ +#define FPU_FPCCR_TS_Msk (1UL << FPU_FPCCR_TS_Pos) /*!< FPCCR: TS bit Mask */ + +#define FPU_FPCCR_UFRDY_Pos 10U /*!< FPCCR: UFRDY Position */ +#define FPU_FPCCR_UFRDY_Msk (1UL << FPU_FPCCR_UFRDY_Pos) /*!< FPCCR: UFRDY bit Mask */ + +#define FPU_FPCCR_SPLIMVIOL_Pos 9U /*!< FPCCR: SPLIMVIOL Position */ +#define FPU_FPCCR_SPLIMVIOL_Msk (1UL << FPU_FPCCR_SPLIMVIOL_Pos) /*!< FPCCR: SPLIMVIOL bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_SFRDY_Pos 7U /*!< FPCCR: SFRDY Position */ +#define FPU_FPCCR_SFRDY_Msk (1UL << FPU_FPCCR_SFRDY_Pos) /*!< FPCCR: SFRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_S_Pos 2U /*!< FPCCR: Security status of the FP context bit Position */ +#define FPU_FPCCR_S_Msk (1UL << FPU_FPCCR_S_Pos) /*!< FPCCR: Security status of the FP context bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ + uint32_t RESERVED4[1U]; + __IOM uint32_t DAUTHCTRL; /*!< Offset: 0x014 (R/W) Debug Authentication Control Register */ + __IOM uint32_t DSCSR; /*!< Offset: 0x018 (R/W) Debug Security Control and Status Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESTART_ST_Pos 26U /*!< CoreDebug DHCSR: S_RESTART_ST Position */ +#define CoreDebug_DHCSR_S_RESTART_ST_Msk (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos) /*!< CoreDebug DHCSR: S_RESTART_ST Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/* Debug Authentication Control Register Definitions */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos 3U /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */ +#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */ + +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos 2U /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos) /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */ + +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos 1U /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */ +#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos) /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */ + +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos 0U /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */ +#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */ + +/* Debug Security Control and Status Register Definitions */ +#define CoreDebug_DSCSR_CDS_Pos 16U /*!< CoreDebug DSCSR: CDS Position */ +#define CoreDebug_DSCSR_CDS_Msk (1UL << CoreDebug_DSCSR_CDS_Pos) /*!< CoreDebug DSCSR: CDS Mask */ + +#define CoreDebug_DSCSR_SBRSEL_Pos 1U /*!< CoreDebug DSCSR: SBRSEL Position */ +#define CoreDebug_DSCSR_SBRSEL_Msk (1UL << CoreDebug_DSCSR_SBRSEL_Pos) /*!< CoreDebug DSCSR: SBRSEL Mask */ + +#define CoreDebug_DSCSR_SBRSELEN_Pos 0U /*!< CoreDebug DSCSR: SBRSELEN Position */ +#define CoreDebug_DSCSR_SBRSELEN_Msk (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/) /*!< CoreDebug DSCSR: SBRSELEN Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ + #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ + #define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ + #define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ + #define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ + #define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ + #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + + #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ + #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ + #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ + #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + #define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ + #define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ + #define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ + #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) /*!< Core Debug configuration struct */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ + #endif + + #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SAU_BASE (SCS_BASE + 0x0DD0UL) /*!< Security Attribution Unit */ + #define SAU ((SAU_Type *) SAU_BASE ) /*!< Security Attribution Unit */ + #endif + + #define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ + #define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #define SCS_BASE_NS (0xE002E000UL) /*!< System Control Space Base Address (non-secure address space) */ + #define CoreDebug_BASE_NS (0xE002EDF0UL) /*!< Core Debug Base Address (non-secure address space) */ + #define SysTick_BASE_NS (SCS_BASE_NS + 0x0010UL) /*!< SysTick Base Address (non-secure address space) */ + #define NVIC_BASE_NS (SCS_BASE_NS + 0x0100UL) /*!< NVIC Base Address (non-secure address space) */ + #define SCB_BASE_NS (SCS_BASE_NS + 0x0D00UL) /*!< System Control Block Base Address (non-secure address space) */ + + #define SCnSCB_NS ((SCnSCB_Type *) SCS_BASE_NS ) /*!< System control Register not in SCB(non-secure address space) */ + #define SCB_NS ((SCB_Type *) SCB_BASE_NS ) /*!< SCB configuration struct (non-secure address space) */ + #define SysTick_NS ((SysTick_Type *) SysTick_BASE_NS ) /*!< SysTick configuration struct (non-secure address space) */ + #define NVIC_NS ((NVIC_Type *) NVIC_BASE_NS ) /*!< NVIC configuration struct (non-secure address space) */ + #define CoreDebug_NS ((CoreDebug_Type *) CoreDebug_BASE_NS) /*!< Core Debug configuration struct (non-secure address space) */ + + #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE_NS (SCS_BASE_NS + 0x0D90UL) /*!< Memory Protection Unit (non-secure address space) */ + #define MPU_NS ((MPU_Type *) MPU_BASE_NS ) /*!< Memory Protection Unit (non-secure address space) */ + #endif + + #define FPU_BASE_NS (SCS_BASE_NS + 0x0F30UL) /*!< Floating Point Unit (non-secure address space) */ + #define FPU_NS ((FPU_Type *) FPU_BASE_NS ) /*!< Floating Point Unit (non-secure address space) */ + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* Special LR values for Secure/Non-Secure call handling and exception handling */ + +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ + +/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ +#define EXC_RETURN_PREFIX (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */ +#define EXC_RETURN_S (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */ +#define EXC_RETURN_DCRS (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */ +#define EXC_RETURN_FTYPE (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */ +#define EXC_RETURN_MODE (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */ +#define EXC_RETURN_SPSEL (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */ +#define EXC_RETURN_ES (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */ + +/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */ +#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */ +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */ +#else +#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */ +#endif + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Get Interrupt Target State + \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + \return 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Target State + \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |= ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Clear Interrupt Target State + \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 if interrupt is assigned to Secure + 1 if interrupt is assigned to Non Secure + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL))); + return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief Set Priority Grouping (non-secure) + \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB_NS->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB_NS->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping (non-secure) + \details Reads the priority grouping field from the non-secure NVIC when in secure state. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void) +{ + return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt (non-secure) + \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status (non-secure) + \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt (non-secure) + \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Pending Interrupt (non-secure) + \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt (non-secure) + \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt (non-secure) + \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt (non-secure) + \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority (non-secure) + \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every non-secure processor exception. + */ +__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC_NS->IPR[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority (non-secure) + \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} +#endif /* defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv8.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## SAU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SAUFunctions SAU Functions + \brief Functions that configure the SAU. + @{ + */ + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + +/** + \brief Enable SAU + \details Enables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Enable(void) +{ + SAU->CTRL |= (SAU_CTRL_ENABLE_Msk); +} + + + +/** + \brief Disable SAU + \details Disables the Security Attribution Unit (SAU). + */ +__STATIC_INLINE void TZ_SAU_Disable(void) +{ + SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk); +} + +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +/*@} end of CMSIS_Core_SAUFunctions */ + + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/** + \brief System Tick Configuration (non-secure) + \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function TZ_SysTick_Config_NS is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + + */ +__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick_NS->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick_NS->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick_NS->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} +#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */ + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM33_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm4.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm4.h new file mode 100644 index 0000000000..7d56873532 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm4.h @@ -0,0 +1,2129 @@ +/**************************************************************************//** + * @file core_cm4.h + * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 04. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM4_H_GENERIC +#define __CORE_CM4_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M4 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM4 definitions */ +#define __CM4_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM4_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM4_CMSIS_VERSION ((__CM4_CMSIS_VERSION_MAIN << 16U) | \ + __CM4_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (4U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM4_H_DEPENDANT +#define __CORE_CM4_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM4_REV + #define __CM4_REV 0x0000U + #warning "__CM4_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M4 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ +#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = FPU->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM4_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm7.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm7.h new file mode 100644 index 0000000000..a14dc623b7 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_cm7.h @@ -0,0 +1,2671 @@ +/**************************************************************************//** + * @file core_cm7.h + * @brief CMSIS Cortex-M7 Core Peripheral Access Layer Header File + * @version V5.0.8 + * @date 04. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM7_H_GENERIC +#define __CORE_CM7_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M7 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM7 definitions */ +#define __CM7_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM7_CMSIS_VERSION_SUB ( __CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM7_CMSIS_VERSION ((__CM7_CMSIS_VERSION_MAIN << 16U) | \ + __CM7_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (7U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions. +*/ +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) + #define __FPU_USED 1U + #else + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #define __FPU_USED 0U + #endif + #else + #define __FPU_USED 0U + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM7_H_DEPENDANT +#define __CORE_CM7_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM7_REV + #define __CM7_REV 0x0000U + #warning "__CM7_REV not defined in device header file; using default!" + #endif + + #ifndef __FPU_PRESENT + #define __FPU_PRESENT 0U + #warning "__FPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __ICACHE_PRESENT + #define __ICACHE_PRESENT 0U + #warning "__ICACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DCACHE_PRESENT + #define __DCACHE_PRESENT 0U + #warning "__DCACHE_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __DTCM_PRESENT + #define __DTCM_PRESENT 0U + #warning "__DTCM_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M7 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + - Core FPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:7; /*!< bit: 20..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + +#define APSR_GE_Pos 16U /*!< APSR: GE Position */ +#define APSR_GE_Msk (0xFUL << APSR_GE_Pos) /*!< APSR: GE Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */ + uint32_t _reserved1:4; /*!< bit: 20..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_GE_Pos 16U /*!< xPSR: GE Position */ +#define xPSR_GE_Msk (0xFUL << xPSR_GE_Pos) /*!< xPSR: GE Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t FPCA:1; /*!< bit: 2 FP extension active flag */ + uint32_t _reserved0:29; /*!< bit: 3..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_FPCA_Pos 2U /*!< CONTROL: FPCA Position */ +#define CONTROL_FPCA_Msk (1UL << CONTROL_FPCA_Pos) /*!< CONTROL: FPCA Mask */ + +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHPR[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t ID_PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t ID_DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ID_AFR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t ID_MFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ID_ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[1U]; + __IM uint32_t CLIDR; /*!< Offset: 0x078 (R/ ) Cache Level ID register */ + __IM uint32_t CTR; /*!< Offset: 0x07C (R/ ) Cache Type register */ + __IM uint32_t CCSIDR; /*!< Offset: 0x080 (R/ ) Cache Size ID Register */ + __IOM uint32_t CSSELR; /*!< Offset: 0x084 (R/W) Cache Size Selection Register */ + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED3[93U]; + __OM uint32_t STIR; /*!< Offset: 0x200 ( /W) Software Triggered Interrupt Register */ + uint32_t RESERVED4[15U]; + __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 */ + uint32_t RESERVED5[1U]; + __OM uint32_t ICIALLU; /*!< Offset: 0x250 ( /W) I-Cache Invalidate All to PoU */ + uint32_t RESERVED6[1U]; + __OM uint32_t ICIMVAU; /*!< Offset: 0x258 ( /W) I-Cache Invalidate by MVA to PoU */ + __OM uint32_t DCIMVAC; /*!< Offset: 0x25C ( /W) D-Cache Invalidate by MVA to PoC */ + __OM uint32_t DCISW; /*!< Offset: 0x260 ( /W) D-Cache Invalidate by Set-way */ + __OM uint32_t DCCMVAU; /*!< Offset: 0x264 ( /W) D-Cache Clean by MVA to PoU */ + __OM uint32_t DCCMVAC; /*!< Offset: 0x268 ( /W) D-Cache Clean by MVA to PoC */ + __OM uint32_t DCCSW; /*!< Offset: 0x26C ( /W) D-Cache Clean by Set-way */ + __OM uint32_t DCCIMVAC; /*!< Offset: 0x270 ( /W) D-Cache Clean and Invalidate by MVA to PoC */ + __OM uint32_t DCCISW; /*!< Offset: 0x274 ( /W) D-Cache Clean and Invalidate by Set-way */ + uint32_t RESERVED7[6U]; + __IOM uint32_t ITCMCR; /*!< Offset: 0x290 (R/W) Instruction Tightly-Coupled Memory Control Register */ + __IOM uint32_t DTCMCR; /*!< Offset: 0x294 (R/W) Data Tightly-Coupled Memory Control Registers */ + __IOM uint32_t AHBPCR; /*!< Offset: 0x298 (R/W) AHBP Control Register */ + __IOM uint32_t CACR; /*!< Offset: 0x29C (R/W) L1 Cache Control Register */ + __IOM uint32_t AHBSCR; /*!< Offset: 0x2A0 (R/W) AHB Slave Control Register */ + uint32_t RESERVED8[1U]; + __IOM uint32_t ABFSR; /*!< Offset: 0x2A8 (R/W) Auxiliary Bus Fault Status Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_BP_Pos 18U /*!< SCB CCR: Branch prediction enable bit Position */ +#define SCB_CCR_BP_Msk (1UL << SCB_CCR_BP_Pos) /*!< SCB CCR: Branch prediction enable bit Mask */ + +#define SCB_CCR_IC_Pos 17U /*!< SCB CCR: Instruction cache enable bit Position */ +#define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB CCR: Instruction cache enable bit Mask */ + +#define SCB_CCR_DC_Pos 16U /*!< SCB CCR: Cache enable bit Position */ +#define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB CCR: Cache enable bit Mask */ + +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MLSPERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 5U) /*!< SCB CFSR (MMFSR): MLSPERR Position */ +#define SCB_CFSR_MLSPERR_Msk (1UL << SCB_CFSR_MLSPERR_Pos) /*!< SCB CFSR (MMFSR): MLSPERR Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_LSPERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 5U) /*!< SCB CFSR (BFSR): LSPERR Position */ +#define SCB_CFSR_LSPERR_Msk (1UL << SCB_CFSR_LSPERR_Pos) /*!< SCB CFSR (BFSR): LSPERR Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/* SCB Cache Level ID Register Definitions */ +#define SCB_CLIDR_LOUU_Pos 27U /*!< SCB CLIDR: LoUU Position */ +#define SCB_CLIDR_LOUU_Msk (7UL << SCB_CLIDR_LOUU_Pos) /*!< SCB CLIDR: LoUU Mask */ + +#define SCB_CLIDR_LOC_Pos 24U /*!< SCB CLIDR: LoC Position */ +#define SCB_CLIDR_LOC_Msk (7UL << SCB_CLIDR_LOC_Pos) /*!< SCB CLIDR: LoC Mask */ + +/* SCB Cache Type Register Definitions */ +#define SCB_CTR_FORMAT_Pos 29U /*!< SCB CTR: Format Position */ +#define SCB_CTR_FORMAT_Msk (7UL << SCB_CTR_FORMAT_Pos) /*!< SCB CTR: Format Mask */ + +#define SCB_CTR_CWG_Pos 24U /*!< SCB CTR: CWG Position */ +#define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB CTR: CWG Mask */ + +#define SCB_CTR_ERG_Pos 20U /*!< SCB CTR: ERG Position */ +#define SCB_CTR_ERG_Msk (0xFUL << SCB_CTR_ERG_Pos) /*!< SCB CTR: ERG Mask */ + +#define SCB_CTR_DMINLINE_Pos 16U /*!< SCB CTR: DminLine Position */ +#define SCB_CTR_DMINLINE_Msk (0xFUL << SCB_CTR_DMINLINE_Pos) /*!< SCB CTR: DminLine Mask */ + +#define SCB_CTR_IMINLINE_Pos 0U /*!< SCB CTR: ImInLine Position */ +#define SCB_CTR_IMINLINE_Msk (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/) /*!< SCB CTR: ImInLine Mask */ + +/* SCB Cache Size ID Register Definitions */ +#define SCB_CCSIDR_WT_Pos 31U /*!< SCB CCSIDR: WT Position */ +#define SCB_CCSIDR_WT_Msk (1UL << SCB_CCSIDR_WT_Pos) /*!< SCB CCSIDR: WT Mask */ + +#define SCB_CCSIDR_WB_Pos 30U /*!< SCB CCSIDR: WB Position */ +#define SCB_CCSIDR_WB_Msk (1UL << SCB_CCSIDR_WB_Pos) /*!< SCB CCSIDR: WB Mask */ + +#define SCB_CCSIDR_RA_Pos 29U /*!< SCB CCSIDR: RA Position */ +#define SCB_CCSIDR_RA_Msk (1UL << SCB_CCSIDR_RA_Pos) /*!< SCB CCSIDR: RA Mask */ + +#define SCB_CCSIDR_WA_Pos 28U /*!< SCB CCSIDR: WA Position */ +#define SCB_CCSIDR_WA_Msk (1UL << SCB_CCSIDR_WA_Pos) /*!< SCB CCSIDR: WA Mask */ + +#define SCB_CCSIDR_NUMSETS_Pos 13U /*!< SCB CCSIDR: NumSets Position */ +#define SCB_CCSIDR_NUMSETS_Msk (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos) /*!< SCB CCSIDR: NumSets Mask */ + +#define SCB_CCSIDR_ASSOCIATIVITY_Pos 3U /*!< SCB CCSIDR: Associativity Position */ +#define SCB_CCSIDR_ASSOCIATIVITY_Msk (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos) /*!< SCB CCSIDR: Associativity Mask */ + +#define SCB_CCSIDR_LINESIZE_Pos 0U /*!< SCB CCSIDR: LineSize Position */ +#define SCB_CCSIDR_LINESIZE_Msk (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/) /*!< SCB CCSIDR: LineSize Mask */ + +/* SCB Cache Size Selection Register Definitions */ +#define SCB_CSSELR_LEVEL_Pos 1U /*!< SCB CSSELR: Level Position */ +#define SCB_CSSELR_LEVEL_Msk (7UL << SCB_CSSELR_LEVEL_Pos) /*!< SCB CSSELR: Level Mask */ + +#define SCB_CSSELR_IND_Pos 0U /*!< SCB CSSELR: InD Position */ +#define SCB_CSSELR_IND_Msk (1UL /*<< SCB_CSSELR_IND_Pos*/) /*!< SCB CSSELR: InD Mask */ + +/* SCB Software Triggered Interrupt Register Definitions */ +#define SCB_STIR_INTID_Pos 0U /*!< SCB STIR: INTID Position */ +#define SCB_STIR_INTID_Msk (0x1FFUL /*<< SCB_STIR_INTID_Pos*/) /*!< SCB STIR: INTID Mask */ + +/* SCB D-Cache Invalidate by Set-way Register Definitions */ +#define SCB_DCISW_WAY_Pos 30U /*!< SCB DCISW: Way Position */ +#define SCB_DCISW_WAY_Msk (3UL << SCB_DCISW_WAY_Pos) /*!< SCB DCISW: Way Mask */ + +#define SCB_DCISW_SET_Pos 5U /*!< SCB DCISW: Set Position */ +#define SCB_DCISW_SET_Msk (0x1FFUL << SCB_DCISW_SET_Pos) /*!< SCB DCISW: Set Mask */ + +/* SCB D-Cache Clean by Set-way Register Definitions */ +#define SCB_DCCSW_WAY_Pos 30U /*!< SCB DCCSW: Way Position */ +#define SCB_DCCSW_WAY_Msk (3UL << SCB_DCCSW_WAY_Pos) /*!< SCB DCCSW: Way Mask */ + +#define SCB_DCCSW_SET_Pos 5U /*!< SCB DCCSW: Set Position */ +#define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB DCCSW: Set Mask */ + +/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ +#define SCB_DCCISW_WAY_Pos 30U /*!< SCB DCCISW: Way Position */ +#define SCB_DCCISW_WAY_Msk (3UL << SCB_DCCISW_WAY_Pos) /*!< SCB DCCISW: Way Mask */ + +#define SCB_DCCISW_SET_Pos 5U /*!< SCB DCCISW: Set Position */ +#define SCB_DCCISW_SET_Msk (0x1FFUL << SCB_DCCISW_SET_Pos) /*!< SCB DCCISW: Set Mask */ + +/* Instruction Tightly-Coupled Memory Control Register Definitions */ +#define SCB_ITCMCR_SZ_Pos 3U /*!< SCB ITCMCR: SZ Position */ +#define SCB_ITCMCR_SZ_Msk (0xFUL << SCB_ITCMCR_SZ_Pos) /*!< SCB ITCMCR: SZ Mask */ + +#define SCB_ITCMCR_RETEN_Pos 2U /*!< SCB ITCMCR: RETEN Position */ +#define SCB_ITCMCR_RETEN_Msk (1UL << SCB_ITCMCR_RETEN_Pos) /*!< SCB ITCMCR: RETEN Mask */ + +#define SCB_ITCMCR_RMW_Pos 1U /*!< SCB ITCMCR: RMW Position */ +#define SCB_ITCMCR_RMW_Msk (1UL << SCB_ITCMCR_RMW_Pos) /*!< SCB ITCMCR: RMW Mask */ + +#define SCB_ITCMCR_EN_Pos 0U /*!< SCB ITCMCR: EN Position */ +#define SCB_ITCMCR_EN_Msk (1UL /*<< SCB_ITCMCR_EN_Pos*/) /*!< SCB ITCMCR: EN Mask */ + +/* Data Tightly-Coupled Memory Control Register Definitions */ +#define SCB_DTCMCR_SZ_Pos 3U /*!< SCB DTCMCR: SZ Position */ +#define SCB_DTCMCR_SZ_Msk (0xFUL << SCB_DTCMCR_SZ_Pos) /*!< SCB DTCMCR: SZ Mask */ + +#define SCB_DTCMCR_RETEN_Pos 2U /*!< SCB DTCMCR: RETEN Position */ +#define SCB_DTCMCR_RETEN_Msk (1UL << SCB_DTCMCR_RETEN_Pos) /*!< SCB DTCMCR: RETEN Mask */ + +#define SCB_DTCMCR_RMW_Pos 1U /*!< SCB DTCMCR: RMW Position */ +#define SCB_DTCMCR_RMW_Msk (1UL << SCB_DTCMCR_RMW_Pos) /*!< SCB DTCMCR: RMW Mask */ + +#define SCB_DTCMCR_EN_Pos 0U /*!< SCB DTCMCR: EN Position */ +#define SCB_DTCMCR_EN_Msk (1UL /*<< SCB_DTCMCR_EN_Pos*/) /*!< SCB DTCMCR: EN Mask */ + +/* AHBP Control Register Definitions */ +#define SCB_AHBPCR_SZ_Pos 1U /*!< SCB AHBPCR: SZ Position */ +#define SCB_AHBPCR_SZ_Msk (7UL << SCB_AHBPCR_SZ_Pos) /*!< SCB AHBPCR: SZ Mask */ + +#define SCB_AHBPCR_EN_Pos 0U /*!< SCB AHBPCR: EN Position */ +#define SCB_AHBPCR_EN_Msk (1UL /*<< SCB_AHBPCR_EN_Pos*/) /*!< SCB AHBPCR: EN Mask */ + +/* L1 Cache Control Register Definitions */ +#define SCB_CACR_FORCEWT_Pos 2U /*!< SCB CACR: FORCEWT Position */ +#define SCB_CACR_FORCEWT_Msk (1UL << SCB_CACR_FORCEWT_Pos) /*!< SCB CACR: FORCEWT Mask */ + +#define SCB_CACR_ECCEN_Pos 1U /*!< SCB CACR: ECCEN Position */ +#define SCB_CACR_ECCEN_Msk (1UL << SCB_CACR_ECCEN_Pos) /*!< SCB CACR: ECCEN Mask */ + +#define SCB_CACR_SIWT_Pos 0U /*!< SCB CACR: SIWT Position */ +#define SCB_CACR_SIWT_Msk (1UL /*<< SCB_CACR_SIWT_Pos*/) /*!< SCB CACR: SIWT Mask */ + +/* AHBS Control Register Definitions */ +#define SCB_AHBSCR_INITCOUNT_Pos 11U /*!< SCB AHBSCR: INITCOUNT Position */ +#define SCB_AHBSCR_INITCOUNT_Msk (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos) /*!< SCB AHBSCR: INITCOUNT Mask */ + +#define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB AHBSCR: TPRI Position */ +#define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB AHBSCR: TPRI Mask */ + +#define SCB_AHBSCR_CTL_Pos 0U /*!< SCB AHBSCR: CTL Position*/ +#define SCB_AHBSCR_CTL_Msk (3UL /*<< SCB_AHBPCR_CTL_Pos*/) /*!< SCB AHBSCR: CTL Mask */ + +/* Auxiliary Bus Fault Status Register Definitions */ +#define SCB_ABFSR_AXIMTYPE_Pos 8U /*!< SCB ABFSR: AXIMTYPE Position*/ +#define SCB_ABFSR_AXIMTYPE_Msk (3UL << SCB_ABFSR_AXIMTYPE_Pos) /*!< SCB ABFSR: AXIMTYPE Mask */ + +#define SCB_ABFSR_EPPB_Pos 4U /*!< SCB ABFSR: EPPB Position*/ +#define SCB_ABFSR_EPPB_Msk (1UL << SCB_ABFSR_EPPB_Pos) /*!< SCB ABFSR: EPPB Mask */ + +#define SCB_ABFSR_AXIM_Pos 3U /*!< SCB ABFSR: AXIM Position*/ +#define SCB_ABFSR_AXIM_Msk (1UL << SCB_ABFSR_AXIM_Pos) /*!< SCB ABFSR: AXIM Mask */ + +#define SCB_ABFSR_AHBP_Pos 2U /*!< SCB ABFSR: AHBP Position*/ +#define SCB_ABFSR_AHBP_Msk (1UL << SCB_ABFSR_AHBP_Pos) /*!< SCB ABFSR: AHBP Mask */ + +#define SCB_ABFSR_DTCM_Pos 1U /*!< SCB ABFSR: DTCM Position*/ +#define SCB_ABFSR_DTCM_Msk (1UL << SCB_ABFSR_DTCM_Pos) /*!< SCB ABFSR: DTCM Mask */ + +#define SCB_ABFSR_ITCM_Pos 0U /*!< SCB ABFSR: ITCM Position*/ +#define SCB_ABFSR_ITCM_Msk (1UL /*<< SCB_ABFSR_ITCM_Pos*/) /*!< SCB ABFSR: ITCM Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos 12U /*!< ACTLR: DISITMATBFLUSH Position */ +#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos) /*!< ACTLR: DISITMATBFLUSH Mask */ + +#define SCnSCB_ACTLR_DISRAMODE_Pos 11U /*!< ACTLR: DISRAMODE Position */ +#define SCnSCB_ACTLR_DISRAMODE_Msk (1UL << SCnSCB_ACTLR_DISRAMODE_Pos) /*!< ACTLR: DISRAMODE Mask */ + +#define SCnSCB_ACTLR_FPEXCODIS_Pos 10U /*!< ACTLR: FPEXCODIS Position */ +#define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: FPEXCODIS Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ + uint32_t RESERVED3[981U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( W) Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R ) Lock Status Register */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_FPU Floating Point Unit (FPU) + \brief Type definitions for the Floating Point Unit (FPU) + @{ + */ + +/** + \brief Structure type to access the Floating Point Unit (FPU). + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IOM uint32_t FPCCR; /*!< Offset: 0x004 (R/W) Floating-Point Context Control Register */ + __IOM uint32_t FPCAR; /*!< Offset: 0x008 (R/W) Floating-Point Context Address Register */ + __IOM uint32_t FPDSCR; /*!< Offset: 0x00C (R/W) Floating-Point Default Status Control Register */ + __IM uint32_t MVFR0; /*!< Offset: 0x010 (R/ ) Media and FP Feature Register 0 */ + __IM uint32_t MVFR1; /*!< Offset: 0x014 (R/ ) Media and FP Feature Register 1 */ + __IM uint32_t MVFR2; /*!< Offset: 0x018 (R/ ) Media and FP Feature Register 2 */ +} FPU_Type; + +/* Floating-Point Context Control Register Definitions */ +#define FPU_FPCCR_ASPEN_Pos 31U /*!< FPCCR: ASPEN bit Position */ +#define FPU_FPCCR_ASPEN_Msk (1UL << FPU_FPCCR_ASPEN_Pos) /*!< FPCCR: ASPEN bit Mask */ + +#define FPU_FPCCR_LSPEN_Pos 30U /*!< FPCCR: LSPEN Position */ +#define FPU_FPCCR_LSPEN_Msk (1UL << FPU_FPCCR_LSPEN_Pos) /*!< FPCCR: LSPEN bit Mask */ + +#define FPU_FPCCR_MONRDY_Pos 8U /*!< FPCCR: MONRDY Position */ +#define FPU_FPCCR_MONRDY_Msk (1UL << FPU_FPCCR_MONRDY_Pos) /*!< FPCCR: MONRDY bit Mask */ + +#define FPU_FPCCR_BFRDY_Pos 6U /*!< FPCCR: BFRDY Position */ +#define FPU_FPCCR_BFRDY_Msk (1UL << FPU_FPCCR_BFRDY_Pos) /*!< FPCCR: BFRDY bit Mask */ + +#define FPU_FPCCR_MMRDY_Pos 5U /*!< FPCCR: MMRDY Position */ +#define FPU_FPCCR_MMRDY_Msk (1UL << FPU_FPCCR_MMRDY_Pos) /*!< FPCCR: MMRDY bit Mask */ + +#define FPU_FPCCR_HFRDY_Pos 4U /*!< FPCCR: HFRDY Position */ +#define FPU_FPCCR_HFRDY_Msk (1UL << FPU_FPCCR_HFRDY_Pos) /*!< FPCCR: HFRDY bit Mask */ + +#define FPU_FPCCR_THREAD_Pos 3U /*!< FPCCR: processor mode bit Position */ +#define FPU_FPCCR_THREAD_Msk (1UL << FPU_FPCCR_THREAD_Pos) /*!< FPCCR: processor mode active bit Mask */ + +#define FPU_FPCCR_USER_Pos 1U /*!< FPCCR: privilege level bit Position */ +#define FPU_FPCCR_USER_Msk (1UL << FPU_FPCCR_USER_Pos) /*!< FPCCR: privilege level bit Mask */ + +#define FPU_FPCCR_LSPACT_Pos 0U /*!< FPCCR: Lazy state preservation active bit Position */ +#define FPU_FPCCR_LSPACT_Msk (1UL /*<< FPU_FPCCR_LSPACT_Pos*/) /*!< FPCCR: Lazy state preservation active bit Mask */ + +/* Floating-Point Context Address Register Definitions */ +#define FPU_FPCAR_ADDRESS_Pos 3U /*!< FPCAR: ADDRESS bit Position */ +#define FPU_FPCAR_ADDRESS_Msk (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos) /*!< FPCAR: ADDRESS bit Mask */ + +/* Floating-Point Default Status Control Register Definitions */ +#define FPU_FPDSCR_AHP_Pos 26U /*!< FPDSCR: AHP bit Position */ +#define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDSCR: AHP bit Mask */ + +#define FPU_FPDSCR_DN_Pos 25U /*!< FPDSCR: DN bit Position */ +#define FPU_FPDSCR_DN_Msk (1UL << FPU_FPDSCR_DN_Pos) /*!< FPDSCR: DN bit Mask */ + +#define FPU_FPDSCR_FZ_Pos 24U /*!< FPDSCR: FZ bit Position */ +#define FPU_FPDSCR_FZ_Msk (1UL << FPU_FPDSCR_FZ_Pos) /*!< FPDSCR: FZ bit Mask */ + +#define FPU_FPDSCR_RMode_Pos 22U /*!< FPDSCR: RMode bit Position */ +#define FPU_FPDSCR_RMode_Msk (3UL << FPU_FPDSCR_RMode_Pos) /*!< FPDSCR: RMode bit Mask */ + +/* Media and FP Feature Register 0 Definitions */ +#define FPU_MVFR0_FP_rounding_modes_Pos 28U /*!< MVFR0: FP rounding modes bits Position */ +#define FPU_MVFR0_FP_rounding_modes_Msk (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos) /*!< MVFR0: FP rounding modes bits Mask */ + +#define FPU_MVFR0_Short_vectors_Pos 24U /*!< MVFR0: Short vectors bits Position */ +#define FPU_MVFR0_Short_vectors_Msk (0xFUL << FPU_MVFR0_Short_vectors_Pos) /*!< MVFR0: Short vectors bits Mask */ + +#define FPU_MVFR0_Square_root_Pos 20U /*!< MVFR0: Square root bits Position */ +#define FPU_MVFR0_Square_root_Msk (0xFUL << FPU_MVFR0_Square_root_Pos) /*!< MVFR0: Square root bits Mask */ + +#define FPU_MVFR0_Divide_Pos 16U /*!< MVFR0: Divide bits Position */ +#define FPU_MVFR0_Divide_Msk (0xFUL << FPU_MVFR0_Divide_Pos) /*!< MVFR0: Divide bits Mask */ + +#define FPU_MVFR0_FP_excep_trapping_Pos 12U /*!< MVFR0: FP exception trapping bits Position */ +#define FPU_MVFR0_FP_excep_trapping_Msk (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos) /*!< MVFR0: FP exception trapping bits Mask */ + +#define FPU_MVFR0_Double_precision_Pos 8U /*!< MVFR0: Double-precision bits Position */ +#define FPU_MVFR0_Double_precision_Msk (0xFUL << FPU_MVFR0_Double_precision_Pos) /*!< MVFR0: Double-precision bits Mask */ + +#define FPU_MVFR0_Single_precision_Pos 4U /*!< MVFR0: Single-precision bits Position */ +#define FPU_MVFR0_Single_precision_Msk (0xFUL << FPU_MVFR0_Single_precision_Pos) /*!< MVFR0: Single-precision bits Mask */ + +#define FPU_MVFR0_A_SIMD_registers_Pos 0U /*!< MVFR0: A_SIMD registers bits Position */ +#define FPU_MVFR0_A_SIMD_registers_Msk (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/) /*!< MVFR0: A_SIMD registers bits Mask */ + +/* Media and FP Feature Register 1 Definitions */ +#define FPU_MVFR1_FP_fused_MAC_Pos 28U /*!< MVFR1: FP fused MAC bits Position */ +#define FPU_MVFR1_FP_fused_MAC_Msk (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos) /*!< MVFR1: FP fused MAC bits Mask */ + +#define FPU_MVFR1_FP_HPFP_Pos 24U /*!< MVFR1: FP HPFP bits Position */ +#define FPU_MVFR1_FP_HPFP_Msk (0xFUL << FPU_MVFR1_FP_HPFP_Pos) /*!< MVFR1: FP HPFP bits Mask */ + +#define FPU_MVFR1_D_NaN_mode_Pos 4U /*!< MVFR1: D_NaN mode bits Position */ +#define FPU_MVFR1_D_NaN_mode_Msk (0xFUL << FPU_MVFR1_D_NaN_mode_Pos) /*!< MVFR1: D_NaN mode bits Mask */ + +#define FPU_MVFR1_FtZ_mode_Pos 0U /*!< MVFR1: FtZ mode bits Position */ +#define FPU_MVFR1_FtZ_mode_Msk (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/) /*!< MVFR1: FtZ mode bits Mask */ + +/* Media and FP Feature Register 2 Definitions */ + +/*@} end of group CMSIS_FPU */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +#define FPU_BASE (SCS_BASE + 0x0F30UL) /*!< Floating Point Unit */ +#define FPU ((FPU_Type *) FPU_BASE ) /*!< Floating Point Unit */ + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ +#define EXC_RETURN_HANDLER_FPU (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */ +#define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + uint32_t mvfr0; + + mvfr0 = SCB->MVFR0; + if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U) + { + return 2U; /* Double + Single precision FPU */ + } + else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U) + { + return 1U; /* Single precision FPU */ + } + else + { + return 0U; /* No FPU */ + } +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ########################## Cache functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_CacheFunctions Cache Functions + \brief Functions that configure Instruction and Data cache. + @{ + */ + +/* Cache Size ID Register Macros */ +#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos) +#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos ) + + +/** + \brief Enable I-Cache + \details Turns on I-Cache + */ +__STATIC_INLINE void SCB_EnableICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + __DSB(); + __ISB(); + SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable I-Cache + \details Turns off I-Cache + */ +__STATIC_INLINE void SCB_DisableICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ + SCB->ICIALLU = 0UL; /* invalidate I-Cache */ + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate I-Cache + \details Invalidates I-Cache + */ +__STATIC_INLINE void SCB_InvalidateICache (void) +{ + #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) + __DSB(); + __ISB(); + SCB->ICIALLU = 0UL; + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Enable D-Cache + \details Turns on D-Cache + */ +__STATIC_INLINE void SCB_EnableDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + __DSB(); + + SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Disable D-Cache + \details Turns off D-Cache + */ +__STATIC_INLINE void SCB_DisableDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ + __DSB(); + + SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Invalidate D-Cache + \details Invalidates D-Cache + */ +__STATIC_INLINE void SCB_InvalidateDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | + ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean D-Cache + \details Cleans D-Cache + */ +__STATIC_INLINE void SCB_CleanDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) | + ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief Clean & Invalidate D-Cache + \details Cleans and Invalidates D-Cache + */ +__STATIC_INLINE void SCB_CleanInvalidateDCache (void) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + uint32_t ccsidr; + uint32_t sets; + uint32_t ways; + + SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ + __DSB(); + + ccsidr = SCB->CCSIDR; + + /* clean & invalidate D-Cache */ + sets = (uint32_t)(CCSIDR_SETS(ccsidr)); + do { + ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); + do { + SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) | + ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) ); + #if defined ( __CC_ARM ) + __schedule_barrier(); + #endif + } while (ways-- != 0U); + } while(sets-- != 0U); + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Invalidate by address + \details Invalidates D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t)addr; + int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCIMVAC = op_addr; + op_addr += (uint32_t)linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Clean by address + \details Cleans D-Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t) addr; + int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCCMVAC = op_addr; + op_addr += (uint32_t)linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/** + \brief D-Cache Clean and Invalidate by address + \details Cleans and invalidates D_Cache for the given address + \param[in] addr address (aligned to 32-byte boundary) + \param[in] dsize size of memory block (in number of bytes) +*/ +__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) +{ + #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) + int32_t op_size = dsize; + uint32_t op_addr = (uint32_t) addr; + int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (32 bytes) */ + + __DSB(); + + while (op_size > 0) { + SCB->DCCIMVAC = op_addr; + op_addr += (uint32_t)linesize; + op_size -= linesize; + } + + __DSB(); + __ISB(); + #endif +} + + +/*@} end of CMSIS_Core_CacheFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM7_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc000.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc000.h new file mode 100644 index 0000000000..9b67c92f3b --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc000.h @@ -0,0 +1,1022 @@ +/**************************************************************************//** + * @file core_sc000.h + * @brief CMSIS SC000 Core Peripheral Access Layer Header File + * @version V5.0.5 + * @date 28. May 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC000_H_GENERIC +#define __CORE_SC000_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC000 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS SC000 definitions */ +#define __SC000_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __SC000_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \ + __SC000_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_SC (000U) /*!< Cortex secure core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC000_H_DEPENDANT +#define __CORE_SC000_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC000_REV + #define __SC000_REV 0x0000U + #warning "__SC000_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 2U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC000 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ +} NVIC_Type; + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED0[1U]; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + uint32_t RESERVED1[154U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +} SCnSCB_Type; + +/* Auxiliary Control Register Definitions */ +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 8U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. + Therefore they are not covered by the SC000 header file. + @{ + */ +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else +/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for SC000 */ +/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for SC000 */ + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ +/*#define NVIC_GetActive __NVIC_GetActive not available for SC000 */ + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/* Interrupt Priorities are WORD accessible only under Armv6-M */ +/* The following MACROS handle generation of the register offset and byte masks */ +#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) +#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) +#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + SCB_AIRCR_SYSRESETREQ_Msk); + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC000_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc300.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc300.h new file mode 100644 index 0000000000..3e8a47109a --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/core_sc300.h @@ -0,0 +1,1915 @@ +/**************************************************************************//** + * @file core_sc300.h + * @brief CMSIS SC300 Core Peripheral Access Layer Header File + * @version V5.0.6 + * @date 04. June 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_SC300_H_GENERIC +#define __CORE_SC300_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup SC3000 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS SC300 definitions */ +#define __SC300_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __SC300_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \ + __SC300_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_SC (300U) /*!< Cortex secure core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_PCS_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_SC300_H_DEPENDANT +#define __CORE_SC300_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __SC300_REV + #define __SC300_REV 0x0000U + #warning "__SC300_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group SC300 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ + uint32_t RESERVED1[129U]; + __IOM uint32_t SFCR; /*!< Offset: 0x290 (R/W) Security Features Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ + uint32_t RESERVED1[1U]; +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[29U]; + __OM uint32_t IWR; /*!< Offset: 0xEF8 ( /W) ITM Integration Write Register */ + __IM uint32_t IRR; /*!< Offset: 0xEFC (R/ ) ITM Integration Read Register */ + __IOM uint32_t IMCR; /*!< Offset: 0xF00 (R/W) ITM Integration Mode Control Register */ + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0U /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0U /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0U /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_SC300_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv7.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv7.h new file mode 100644 index 0000000000..01422033d0 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv7.h @@ -0,0 +1,270 @@ +/****************************************************************************** + * @file mpu_armv7.h + * @brief CMSIS MPU API for Armv7-M MPU + * @version V5.0.4 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2017-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef ARM_MPU_ARMV7_H +#define ARM_MPU_ARMV7_H + +#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes +#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes +#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes +#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes +#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes +#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte +#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes +#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes +#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes +#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes +#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes +#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes +#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes +#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes +#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes +#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte +#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes +#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes +#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes +#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes +#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes +#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes +#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes +#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes +#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes +#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte +#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes +#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes + +#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access +#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only +#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only +#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access +#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only +#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access + +/** MPU Region Base Address Register Value +* +* \param Region The region to be configured, number 0 to 15. +* \param BaseAddress The base address for the region. +*/ +#define ARM_MPU_RBAR(Region, BaseAddress) \ + (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ + ((Region) & MPU_RBAR_REGION_Msk) | \ + (MPU_RBAR_VALID_Msk)) + +/** +* MPU Memory Access Attributes +* +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +*/ +#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ + ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ + (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ + (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ + (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ + ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ + (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ + (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ + ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) + +/** +* MPU Memory Access Attribute for strongly ordered memory. +* - TEX: 000b +* - Shareable +* - Non-cacheable +* - Non-bufferable +*/ +#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) + +/** +* MPU Memory Access Attribute for device memory. +* - TEX: 000b (if non-shareable) or 010b (if shareable) +* - Shareable or non-shareable +* - Non-cacheable +* - Bufferable (if shareable) or non-bufferable (if non-shareable) +* +* \param IsShareable Configures the device memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) + +/** +* MPU Memory Access Attribute for normal memory. +* - TEX: 1BBb (reflecting outer cacheability rules) +* - Shareable or non-shareable +* - Cacheable or non-cacheable (reflecting inner cacheability rules) +* - Bufferable or non-bufferable (reflecting inner cacheability rules) +* +* \param OuterCp Configures the outer cache policy. +* \param InnerCp Configures the inner cache policy. +* \param IsShareable Configures the memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U)) + +/** +* MPU Memory Access Attribute non-cacheable policy. +*/ +#define ARM_MPU_CACHEP_NOCACHE 0U + +/** +* MPU Memory Access Attribute write-back, write and read allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_WRA 1U + +/** +* MPU Memory Access Attribute write-through, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WT_NWA 2U + +/** +* MPU Memory Access Attribute write-back, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_NWA 3U + + +/** +* Struct for a single MPU Region +*/ +typedef struct { + uint32_t RBAR; //!< The region base address register value (RBAR) + uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR +} ARM_MPU_Region_t; + +/** Enable the MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) +{ + __DSB(); + __ISB(); + MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif +} + +/** Disable the MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable(void) +{ + __DSB(); + __ISB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; +} + +/** Clear and disable the given MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) +{ + MPU->RNR = rnr; + MPU->RASR = 0U; +} + +/** Configure an MPU region. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) +{ + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Configure the given MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) +{ + MPU->RNR = rnr; + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Memcopy with strictly ordered memory access, e.g. for register targets. +* \param dst Destination data is copied to. +* \param src Source data is copied from. +* \param len Amount of data words to be copied. +*/ +__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) +{ + uint32_t i; + for (i = 0U; i < len; ++i) + { + dst[i] = src[i]; + } +} + +/** Load the given number of MPU regions from a table. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) +{ + const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; + while (cnt > MPU_TYPE_RALIASES) { + orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); + table += MPU_TYPE_RALIASES; + cnt -= MPU_TYPE_RALIASES; + } + orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); +} + +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv8.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv8.h new file mode 100644 index 0000000000..62571da5b8 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/mpu_armv8.h @@ -0,0 +1,333 @@ +/****************************************************************************** + * @file mpu_armv8.h + * @brief CMSIS MPU API for Armv8-M MPU + * @version V5.0.4 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2017-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef ARM_MPU_ARMV8_H +#define ARM_MPU_ARMV8_H + +/** \brief Attribute for device memory (outer only) */ +#define ARM_MPU_ATTR_DEVICE ( 0U ) + +/** \brief Attribute for non-cacheable, normal memory */ +#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U ) + +/** \brief Attribute for normal memory (outer and inner) +* \param NT Non-Transient: Set to 1 for non-transient data. +* \param WB Write-Back: Set to 1 to use write-back update policy. +* \param RA Read Allocation: Set to 1 to use cache allocation on read miss. +* \param WA Write Allocation: Set to 1 to use cache allocation on write miss. +*/ +#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \ + (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U)) + +/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U) + +/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGnRE (1U) + +/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_nGRE (2U) + +/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */ +#define ARM_MPU_ATTR_DEVICE_GRE (3U) + +/** \brief Memory Attribute +* \param O Outer memory attributes +* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes +*/ +#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U))) + +/** \brief Normal memory non-shareable */ +#define ARM_MPU_SH_NON (0U) + +/** \brief Normal memory outer shareable */ +#define ARM_MPU_SH_OUTER (2U) + +/** \brief Normal memory inner shareable */ +#define ARM_MPU_SH_INNER (3U) + +/** \brief Memory access permissions +* \param RO Read-Only: Set to 1 for read-only memory. +* \param NP Non-Privileged: Set to 1 for non-privileged memory. +*/ +#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U)) + +/** \brief Region Base Address Register value +* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. +* \param SH Defines the Shareability domain for this memory region. +* \param RO Read-Only: Set to 1 for a read-only memory region. +* \param NP Non-Privileged: Set to 1 for a non-privileged memory region. +* \oaram XN eXecute Never: Set to 1 for a non-executable memory region. +*/ +#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \ + ((BASE & MPU_RBAR_BASE_Msk) | \ + ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \ + ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \ + ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk)) + +/** \brief Region Limit Address Register value +* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. +* \param IDX The attribute index to be associated with this memory region. +*/ +#define ARM_MPU_RLAR(LIMIT, IDX) \ + ((LIMIT & MPU_RLAR_LIMIT_Msk) | \ + ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ + (MPU_RLAR_EN_Msk)) + +/** +* Struct for a single MPU Region +*/ +typedef struct { + uint32_t RBAR; /*!< Region Base Address Register value */ + uint32_t RLAR; /*!< Region Limit Address Register value */ +} ARM_MPU_Region_t; + +/** Enable the MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) +{ + __DSB(); + __ISB(); + MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif +} + +/** Disable the MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable(void) +{ + __DSB(); + __ISB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; +} + +#ifdef MPU_NS +/** Enable the Non-secure MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control) +{ + __DSB(); + __ISB(); + MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif +} + +/** Disable the Non-secure MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable_NS(void) +{ + __DSB(); + __ISB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk; +} +#endif + +/** Set the memory attribute encoding to the given MPU. +* \param mpu Pointer to the MPU to be configured. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr) +{ + const uint8_t reg = idx / 4U; + const uint32_t pos = ((idx % 4U) * 8U); + const uint32_t mask = 0xFFU << pos; + + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { + return; // invalid index + } + + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); +} + +/** Set the memory attribute encoding. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr) +{ + ARM_MPU_SetMemAttrEx(MPU, idx, attr); +} + +#ifdef MPU_NS +/** Set the memory attribute encoding to the Non-secure MPU. +* \param idx The attribute index to be set [0-7] +* \param attr The attribute value to be set. +*/ +__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr) +{ + ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr); +} +#endif + +/** Clear and disable the given MPU region of the given MPU. +* \param mpu Pointer to MPU to be used. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr) +{ + mpu->RNR = rnr; + mpu->RLAR = 0U; +} + +/** Clear and disable the given MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) +{ + ARM_MPU_ClrRegionEx(MPU, rnr); +} + +#ifdef MPU_NS +/** Clear and disable the given Non-secure MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) +{ + ARM_MPU_ClrRegionEx(MPU_NS, rnr); +} +#endif + +/** Configure the given MPU region of the given MPU. +* \param mpu Pointer to MPU to be used. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + mpu->RNR = rnr; + mpu->RBAR = rbar; + mpu->RLAR = rlar; +} + +/** Configure the given MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); +} + +#ifdef MPU_NS +/** Configure the given Non-secure MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rlar Value for RLAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) +{ + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); +} +#endif + +/** Memcopy with strictly ordered memory access, e.g. for register targets. +* \param dst Destination data is copied to. +* \param src Source data is copied from. +* \param len Amount of data words to be copied. +*/ +__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) +{ + uint32_t i; + for (i = 0U; i < len; ++i) + { + dst[i] = src[i]; + } +} + +/** Load the given number of MPU regions from a table to the given MPU. +* \param mpu Pointer to the MPU registers to be used. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; + if (cnt == 1U) { + mpu->RNR = rnr; + orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize); + } else { + uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); + uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; + + mpu->RNR = rnrBase; + while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { + uint32_t c = MPU_TYPE_RALIASES - rnrOffset; + orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize); + table += c; + cnt -= c; + rnrOffset = 0U; + rnrBase += MPU_TYPE_RALIASES; + mpu->RNR = rnrBase; + } + + orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); + } +} + +/** Load the given number of MPU regions from a table. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + ARM_MPU_LoadEx(MPU, rnr, table, cnt); +} + +#ifdef MPU_NS +/** Load the given number of MPU regions from a table to the Non-secure MPU. +* \param rnr First region number to be configured. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +{ + ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); +} +#endif + +#endif + diff --git a/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/tz_context.h b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/tz_context.h new file mode 100644 index 0000000000..0d09749f3a --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/CMSIS/Include/tz_context.h @@ -0,0 +1,70 @@ +/****************************************************************************** + * @file tz_context.h + * @brief Context Management for Armv8-M TrustZone + * @version V1.0.1 + * @date 10. January 2018 + ******************************************************************************/ +/* + * Copyright (c) 2017-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef TZ_CONTEXT_H +#define TZ_CONTEXT_H + +#include + +#ifndef TZ_MODULEID_T +#define TZ_MODULEID_T +/// \details Data type that identifies secure software modules called by a process. +typedef uint32_t TZ_ModuleId_t; +#endif + +/// \details TZ Memory ID identifies an allocated memory slot. +typedef uint32_t TZ_MemoryId_t; + +/// Initialize secure context memory system +/// \return execution status (1: success, 0: error) +uint32_t TZ_InitContextSystem_S (void); + +/// Allocate context memory for calling secure software modules in TrustZone +/// \param[in] module identifies software modules called from non-secure mode +/// \return value != 0 id TrustZone memory slot identifier +/// \return value 0 no memory available or internal error +TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); + +/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); + +/// Load secure context (called on RTOS thread context switch) +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); + +/// Store secure context (called on RTOS thread context switch) +/// \param[in] id TrustZone memory slot identifier +/// \return execution status (1: success, 0: error) +uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); + +#endif // TZ_CONTEXT_H diff --git a/bsp/yichip/yc3122-pos/Libraries/SConscript b/bsp/yichip/yc3122-pos/Libraries/SConscript new file mode 100644 index 0000000000..54b59ccbb3 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/SConscript @@ -0,0 +1,29 @@ +from building import * +import rtconfig +import os +cwd = GetCurrentDir() +path_sdk = os.path.join(cwd,'sdk') +path_core = os.path.join(cwd,'core') +path_cmin = os.path.join(cwd,'CMSIS','Include') +path_cmde = os.path.join(cwd,'CMSIS','Device','YICHIP','YC3122') +src = Glob('sdk/*.c') +CPPPATH = [path_sdk,path_core,path_cmin,os.path.join(path_cmde,'Include'),cwd] + +src += Glob(path_cmde + '/Source/Templates/*.c') +src += ['core/system.c'] + +if rtconfig.PLATFORM in ['gcc']: + src += ['sdk/libyc_qspi.a'] +elif rtconfig.PLATFORM in ['armcc', 'armclang']: + src += ['sdk/yc_qspi.lib'] + + +if rtconfig.PLATFORM in ['gcc']: + src += [path_cmde + '/Source/Templates/gcc/startup_yc3122.S'] +elif rtconfig.PLATFORM in ['armcc', 'armclang']: + src += [path_cmde + '/Source/Templates/arm/startup_yc3122.s'] +elif rtconfig.PLATFORM in ['iccarm']: + src += [path_cmde + '/Source/Templates/iar/startup_yc3122.s'] +group = DefineGroup('Libraries', src, depend = [''],CPPPATH = CPPPATH, CPPDEFINES = ['__USE_YC_M0__']) + +Return('group') diff --git a/bsp/yichip/yc3122-pos/Libraries/core/board_config.h b/bsp/yichip/yc3122-pos/Libraries/core/board_config.h new file mode 100644 index 0000000000..fd83a0e236 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/board_config.h @@ -0,0 +1,1979 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_board_config.h + * @brief source file for setting board_config + * + * Change Logs: + * Date Author Version Notes + * 2020-11-05 wushengyan V1.0.0 the first version + */ + +#ifndef __BOARD_CONFIG_H__ +#define __BOARD_CONFIG_H__ + +#include "yc3122.h" +#include "yc_gpio.h" + +/*鏉垮瓙绫诲瀷*/ +#define FPGA_BOARD (1) +#define EVB_BOARD (2) +#define APP_BOARD (3) +#define APP_88PIN_BOARD (4) + +#define APP_YC3158AB_BOARD (6) +#define APP_YC3163AB_BOARD (7) +#define APP_YC3164AB_BOARD (8) +#define APP_YC3165AB_BOARD (9) +#define APP_YC3154AB_BOARD (10) + +#define APP_194_YC3173AB_DOORLOCK_V1_0_BOARD (80) + +#ifndef BOARD_TYPE +#define BOARD_TYPE APP_YC3165AB_BOARD +#endif + +/*General function define*/ +#define GPIO_Group_To_GroupIn(Group) ((((uint32_t)Group - GPIO_BASEADDR)/8) + (uint32_t)GPIO_IN_BASE)//((uint32_t*)GPIO_EN_BASE + (uint32_t *)(((uint32_t*)Group - (uint32_t*)GPIO_BASEADDR) & 0xff)/8) +#define GPIO_Pin_To_PinIn(Pin) (1 << Pin) + +#if (BOARD_TYPE == FPGA_BOARD) + +/*function define*/ +#define FPGA_reg_write(addr,wdata) {*((volatile uint8_t*)(0xf856d)) = addr;\ + *((volatile uint8_t*)(0xf856e)) = wdata;\ + *((volatile uint8_t*)(0xf856c)) = 0x00;\ + *((volatile uint8_t*)(0xf856c)) = 0x02;\ + *((volatile uint8_t*)(0xf856c)) = 0x00;} + +#define FPGA_reg_read(addr) {*((volatile uint8_t*)(0xf856d)) = addr;\ + *((volatile uint8_t*)(0xf856c)) = 0x00;\ + *((volatile uint8_t*)(0xf856c)) = 0x01;\ + *((volatile uint8_t*)(0xf856c)) = 0x00;\ + (*((volatile uint8_t*)(0xf856f)));} + +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (115200) +#define PRINTRX_PORT GPIOB +#define PRINTRX_IO_PIN GPIO_Pin_0 +#define PRINTTX_PORT GPIOB +#define PRINTTX_IO_PIN GPIO_Pin_1 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1PORT MUART1 +#define UART1_BAUD (115200) +#define UART1RX_PORT GPIOB +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOB +#define UART1TX_IO_PIN GPIO_Pin_1 +#define UART1RTS_PORT GPIOB +#define UART1RTS_IO_PIN GPIO_Pin_2 +#define UART1CTS_PORT GPIOB +#define UART1CTS_IO_PIN GPIO_Pin_3 + +//uart2 +#define UART2PORT MUART2 +#define UART2_BAUD (115200) +#define UART2RX_PORT GPIOC +#define UART2RX_IO_PIN GPIO_Pin_6 +#define UART2TX_PORT GPIOC +#define UART2TX_IO_PIN GPIO_Pin_5 +#define UART2RTS_PORT GPIOD +#define UART2RTS_IO_PIN GPIO_Pin_0 +#define UART2CTS_PORT GPIOD +#define UART2CTS_IO_PIN GPIO_Pin_1 + +//uart3 +#define UART3PORT MUART3 +#define UART3_BAUD (115200) +#define UART3RX_PORT GPIOC +#define UART3RX_IO_PIN GPIO_Pin_14 +#define UART3TX_PORT GPIOC +#define UART3TX_IO_PIN GPIO_Pin_13 +#define UART3RTS_PORT GPIOC +#define UART3RTS_IO_PIN GPIO_Pin_15 +#define UART3CTS_PORT GPIOC +#define UART3CTS_IO_PIN GPIO_Pin_12 + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOD +#define SPI0NCS_IO_PIN GPIO_Pin_12 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOA +#define SPI0SCK_IO_PIN GPIO_Pin_11 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_12 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_13 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOC +#define SPI1NCS_IO_PIN GPIO_Pin_8 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOC +#define SPI1SCK_IO_PIN GPIO_Pin_9 +#define SPI1MOSI_PORT GPIOC +#define SPI1MOSI_IO_PIN GPIO_Pin_10 +#define SPI1MISO_PORT GPIOC +#define SPI1MISO_IO_PIN GPIO_Pin_6 + +//tft +#define ST7789CS_PORT GPIOD +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOE +#define ST7789RST_IO_PIN GPIO_Pin_1 +#define ST7789A0_PORT GPIOE +#define ST7789A0_IO_PIN GPIO_Pin_2 +#define ST7789BL_PORT GPIOE +#define ST7789BL_IO_PIN GPIO_Pin_9 +#define ST7789SCK_PORT GPIOA +#define ST7789SCK_IO_PIN GPIO_Pin_11 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_12 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_13 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//16Mflash +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_13 +#define FLASH16M_SCK_PORT GPIOC +#define FLASH16M_SCK_IO_PIN GPIO_Pin_6 +#define FLASH16M_MOSI_PORT GPIOC +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_7 +#define FLASH16M_MISO_PORT GPIOC +#define FLASH16M_MISO_IO_PIN GPIO_Pin_8 + +#define FLASH4M_NCS_PORT GPIOD +#define FLASH4M_NCS_IO_PIN GPIO_Pin_12 +#define FLASH4M_SCK_PORT GPIOC +#define FLASH4M_SCK_IO_PIN GPIO_Pin_6 +#define FLASH4M_MOSI_PORT GPIOC +#define FLASH4M_MOSI_IO_PIN GPIO_Pin_7 +#define FLASH4M_MISO_PORT GPIOC +#define FLASH4M_MISO_IO_PIN GPIO_Pin_8 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//chgr_event // j6(0308 camera) +#define CHGR_VBAT_OV_FLAG_PORT GPIOE //D2 +#define CHGR_VBAT_OV_FLAG_IO_PIN GPIO_Pin_8 +#define CHGR_IN_DET_AON_PORT GPIOE //D1 +#define CHGR_IN_DET_AON_IO_PIN GPIO_Pin_7 +#define CHGR_CC_OV_CV_PORT GPIOE //D3 +#define CHGR_CC_OV_CV_IO_PIN GPIO_Pin_9 +#define CHGR_DPPM_OV_CC_PORT GPIOE //D0 +#define CHGR_DPPM_OV_CC_IO_PIN GPIO_Pin_6 +#define CHGR_DPPM_OV_CV_PORT GPIOE //D4 +#define CHGR_DPPM_OV_CV_IO_PIN GPIO_Pin_10 +#define CHGR_PGOOD_PORT GPIOE //pclk +#define CHGR_PGOOD_IO_PIN GPIO_Pin_0 +#define CHGR_UVLO_OK_AON_PORT GPIOE //D5 +#define CHGR_UVLO_OK_AON_IO_PIN GPIO_Pin_11 +#define CHGR_RESET_PORT GPIOE //D6 +#define CHGR_RESET_IO_PIN GPIO_Pin_12 +#define CHGR_STSTE_ICHG_PORT GPIOE //mclk +#define CHGR_STSTE_ICHG_IO_PIN GPIO_Pin_4 +#define CHGR_STATE_IND_PORT GPIOE //D7 +#define CHGR_STATE_IND_IO_PIN GPIO_Pin_13 +#define CHGR_STSTE_RCH_EN_PORT GPIOE //hsync +#define CHGR_STSTE_RCH_EN_IO_PIN GPIO_Pin_2 +#define CHGR_STSTE_VBAT_LV_PORT GPIOE //stb +#define CHGR_STSTE_VBAT_LV_IO_PIN GPIO_Pin_3 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_13 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_15 +#define SCI7816_VCARD_PORT GPIOA +#define SCI7816_VCARD_IO_PIN GPIO_Pin_1 +#define SCI7816_DETECT_PORT GPIOE +#define SCI7816_DETECT_IO_PIN GPIO_Pin_12 + +//dcmi +#define DCMI_LCD_RST_PIN (65) +#define DCMI_LCD_CS_PIN (63) +#define DCMI_LCD_CLK_PIN (11) +#define DCMI_LCD_MOSI_PIN (12) +#define DCMI_LCD_MISO_PIN (13) +#define DCMI_LCD_A0_PIN (66) +#define DCMI_LCD_BL_PIN (73) + +#define DCMI_CAMERA_SDA_PIN (19) +#define DCMI_CAMERA_SCL_PIN (18) +#define DCMI_CAMERA_RST_PIN (31) +#define DCMI_CAMERA_PWDN_PIN (36) +#define DCMI_CAMERA_MCLK_PIN (30) +#define DCMI_CAMERA_PCLK_PIN (32) +#define DCMI_CAMERA_VSYNC_PIN (34) +#define DCMI_CAMERA_HSYNC_PIN (33) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//fpc1020 +#define FPC1020_SPI0_PORT GPIOA +#define FPC1020_SPI0_CS_PIN GPIO_Pin_5 +#define FPC1020_SPI0_SCLK_PIN GPIO_Pin_6 +#define FPC1020_SPI0_MOSI_PIN GPIO_Pin_7 +#define FPC1020_SPI0_MISO_PIN GPIO_Pin_8 +#define FPC1020_RST_PIN GPIO_Pin_9 +#define FPC1020_IRQ_PIN GPIO_Pin_10 + +#elif (BOARD_TYPE == APP_BOARD) +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (115200) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1PORT MUART1 +#define UART1_BAUD (115200) +#define UART1RX_PORT GPIOB +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOB +#define UART1TX_IO_PIN GPIO_Pin_1 +#define UART1RTS_PORT GPIOB +#define UART1RTS_IO_PIN GPIO_Pin_2 +#define UART1CTS_PORT GPIOB +#define UART1CTS_IO_PIN GPIO_Pin_3 +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +//spi2 +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//lcd +#define ST7539CS_PORT GPIOD +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOE +#define ST7539RST_IO_PIN GPIO_Pin_1 +#define ST7539A0_PORT GPIOE +#define ST7539A0_IO_PIN GPIO_Pin_2 +#define ST7539BL_PORT GPIOE +#define ST7539BL_IO_PIN GPIO_Pin_9 +#define ST7539SCK_PORT GPIOA +#define ST7539SCK_IO_PIN GPIO_Pin_11 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_12 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_13 +//tft +#define ST7789CS_PORT GPIOB +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOB +#define ST7789RST_IO_PIN GPIO_Pin_2 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_0 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_2 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_1 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//dcmi +#define DCMI_LCD_RST_PIN (18) +#define DCMI_LCD_CS_PIN (31) +#define DCMI_LCD_CLK_PIN (17) +#define DCMI_LCD_MOSI_PIN (15) +#define DCMI_LCD_MISO_PIN (14) +#define DCMI_LCD_A0_PIN (16) +#define DCMI_LCD_BL_PIN (34) + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (31) +#define DCMI_CAMERA_PWDN_PIN (49) +#define DCMI_CAMERA_MCLK_PIN (35) +#define DCMI_CAMERA_PCLK_PIN (36) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//fpc1020 +#define FPC1020_SPI0_PORT GPIOC +#define FPC1020_SPI0_CS_PIN GPIO_Pin_6 +#define FPC1020_SPI0_SCLK_PIN GPIO_Pin_1 +#define FPC1020_SPI0_MOSI_PIN GPIO_Pin_2 +#define FPC1020_SPI0_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +#elif (BOARD_TYPE == APP_88PIN_BOARD) +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOB +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOB +#define ST7789RST_IO_PIN GPIO_Pin_2 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_0 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_2 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_1 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (18) +#define DCMI_LCD_CS_PIN (31) +#define DCMI_LCD_CLK_PIN (17) +#define DCMI_LCD_MOSI_PIN (15) +#define DCMI_LCD_MISO_PIN (14) +#define DCMI_LCD_A0_PIN (16) +#define DCMI_LCD_BL_PIN (34) + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (32) +#define DCMI_CAMERA_PWDN_PIN (49) +#define DCMI_CAMERA_MCLK_PIN (35) +#define DCMI_CAMERA_PCLK_PIN (36) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//psram +#define PSRAM_NCS_PIN (29) +#define PSRAM_SCK_PIN (30) +#define PSRAM_DATA0_PIN (28) +#define PSRAM_DATA1_PIN (25) +#define PSRAM_DATA2_PIN (26) +#define PSRAM_DATA3_PIN (27) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_13 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_15 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 + +#elif (BOARD_TYPE == APP_YC3158AB_BOARD) +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOB +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOB +#define ST7789RST_IO_PIN GPIO_Pin_2 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_0 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_2 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_1 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (18) +#define DCMI_LCD_CS_PIN (33)//(31) +#define DCMI_LCD_CLK_PIN (17) +#define DCMI_LCD_MOSI_PIN (15) +#define DCMI_LCD_MISO_PIN (14) +#define DCMI_LCD_A0_PIN (16) +#define DCMI_LCD_BL_PIN (34) + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (32) +#define DCMI_CAMERA_PWDN_PIN (7)//(49) +#define DCMI_CAMERA_MCLK_PIN (35) +#define DCMI_CAMERA_PCLK_PIN (36) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (31)//(45) +#define DCMI_CAMERA_DATA4_PIN (58)//(44) +#define DCMI_CAMERA_DATA5_PIN (57)//(43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//psram +#define PSRAM_NCS_PIN (45) +#define PSRAM_SCK_PIN (44) +#define PSRAM_DATA0_PIN (52) +#define PSRAM_DATA1_PIN (49) +#define PSRAM_DATA2_PIN (50) +#define PSRAM_DATA3_PIN (43) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_13 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_15 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 +#elif (BOARD_TYPE == APP_YC3163AB_BOARD) +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOB +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOB +#define ST7789RST_IO_PIN GPIO_Pin_2 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_0 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_2 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_1 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (18) +#define DCMI_LCD_CS_PIN (31) +#define DCMI_LCD_CLK_PIN (17) +#define DCMI_LCD_MOSI_PIN (15) +#define DCMI_LCD_MISO_PIN (14) +#define DCMI_LCD_A0_PIN (16) +#define DCMI_LCD_BL_PIN (34) + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (32) +#define DCMI_CAMERA_PWDN_PIN (49) +#define DCMI_CAMERA_MCLK_PIN (35) +#define DCMI_CAMERA_PCLK_PIN (36) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//psram +#define PSRAM_NCS_PIN (29) +#define PSRAM_SCK_PIN (30) +#define PSRAM_DATA0_PIN (28) +#define PSRAM_DATA1_PIN (25) +#define PSRAM_DATA2_PIN (26) +#define PSRAM_DATA3_PIN (27) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_13 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_15 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 + +#elif (BOARD_TYPE == APP_YC3164AB_BOARD) +/*Print Port*/ + +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOB +#define ST7789CS_IO_PIN GPIO_Pin_15 +#define ST7789RST_PORT GPIOB +#define ST7789RST_IO_PIN GPIO_Pin_2 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_0 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_2 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_1 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 + +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (13) +#define DCMI_LCD_CS_PIN (32) +#define DCMI_LCD_CLK_PIN (12) +#define DCMI_LCD_MOSI_PIN (10) +#define DCMI_LCD_MISO_PIN (9) +#define DCMI_LCD_A0_PIN (11) +#define DCMI_LCD_BL_PIN (34) + + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (32) +#define DCMI_CAMERA_PWDN_PIN (49) +#define DCMI_CAMERA_MCLK_PIN (35) +#define DCMI_CAMERA_PCLK_PIN (36) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//psram +#define PSRAM_NCS_PIN (45) +#define PSRAM_SCK_PIN (44) +#define PSRAM_DATA0_PIN (52) +#define PSRAM_DATA1_PIN (49) +#define PSRAM_DATA2_PIN (50) +#define PSRAM_DATA3_PIN (43) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_15 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_13 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 + +#define UART2BTBAUD 115200 +#define UART2BT_TX_PORT GPIOE +#define UART2BT_TX_PIN GPIO_Pin_0 +#define UART2BT_RX_PORT GPIOD +#define UART2BT_RX_PIN GPIO_Pin_13 +#define UART2BT_UARTx MUART2 +#define UART2BT_Tx_FUNC UART2_TXD +#define UART2BT_Rx_FUNC UART2_RXD +#define UART2BT_IRQN 10 +#define UART2BT_RTS_SOFT_PORT GPIOD //鐢ㄤ簬m0鏍镐笌bt鏍歌蒋浠舵祦鎺� +#define UART2BT_RTS_SOFT_PIN GPIO_Pin_11 + +#elif (BOARD_TYPE == APP_YC3165AB_BOARD) +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOC +#define ST7789CS_IO_PIN GPIO_Pin_7 +#define ST7789RST_PORT GPIOC +#define ST7789RST_IO_PIN GPIO_Pin_5 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_1 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_8 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_0 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (37) +#define DCMI_LCD_CS_PIN (39) +#define DCMI_LCD_CLK_PIN (16) +#define DCMI_LCD_MOSI_PIN (14) +#define DCMI_LCD_MISO_PIN (15) +#define DCMI_LCD_A0_PIN (17) +#define DCMI_LCD_BL_PIN (40) + + +#define DCMI_CAMERA_SDA_PIN (51) +#define DCMI_CAMERA_SCL_PIN (48) +#define DCMI_CAMERA_RST_PIN (0xff) +#define DCMI_CAMERA_PWDN_PIN (63) +#define DCMI_CAMERA_MCLK_PIN (41) +#define DCMI_CAMERA_PCLK_PIN (42) +#define DCMI_CAMERA_VSYNC_PIN (47) +#define DCMI_CAMERA_HSYNC_PIN (46) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (62) +#define DCMI_CAMERA_DATA1_PIN (61) +#define DCMI_CAMERA_DATA2_PIN (60) +#define DCMI_CAMERA_DATA3_PIN (59) +#define DCMI_CAMERA_DATA4_PIN (58) +#define DCMI_CAMERA_DATA5_PIN (57) +#define DCMI_CAMERA_DATA6_PIN (56) +#define DCMI_CAMERA_DATA7_PIN (55) + +//psram +#define PSRAM_NCS_PIN (45) +#define PSRAM_SCK_PIN (44) +#define PSRAM_DATA0_PIN (52) +#define PSRAM_DATA1_PIN (49) +#define PSRAM_DATA2_PIN (50) +#define PSRAM_DATA3_PIN (43) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_15 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_13 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 + +#define UART2BTBAUD 115200 +#define UART2BT_TX_PORT GPIOE +#define UART2BT_TX_PIN GPIO_Pin_0 +#define UART2BT_RX_PORT GPIOD +#define UART2BT_RX_PIN GPIO_Pin_13 +#define UART2BT_UARTx MUART2 +#define UART2BT_Tx_FUNC UART2_TXD +#define UART2BT_Rx_FUNC UART2_RXD +#define UART2BT_IRQN 10 +#define UART2BT_RTS_SOFT_PORT GPIOD //鐢ㄤ簬m0鏍镐笌bt鏍歌蒋浠舵祦鎺� +#define UART2BT_RTS_SOFT_PIN GPIO_Pin_11 + + + +#elif (BOARD_TYPE == APP_YC3154AB_BOARD) +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//spi0 +#define SPI0PORT MSPI0 +#define SPI0NCS_PORT GPIOB +#define SPI0NCS_IO_PIN GPIO_Pin_15 +#define SPI04MNCS_PORT GPIOD +#define SPI04MNCS_IO_PIN GPIO_Pin_12 +#define SPI016MNCS_PORT GPIOD +#define SPI016MNCS_IO_PIN GPIO_Pin_13 +#define SPI0SCK_PORT GPIOB +#define SPI0SCK_IO_PIN GPIO_Pin_1 +#define SPI0MOSI_PORT GPIOA +#define SPI0MOSI_IO_PIN GPIO_Pin_15 +#define SPI0MISO_PORT GPIOA +#define SPI0MISO_IO_PIN GPIO_Pin_14 + +//spi1 +#define SPI1PORT MSPI1 +#define SPI1NCS_PORT GPIOB +#define SPI1NCS_IO_PIN GPIO_Pin_15 +#define SPI14MNCS_PORT GPIOC +#define SPI14MNCS_IO_PIN GPIO_Pin_8 +#define SPI116MNCS_PORT GPIOC +#define SPI116MNCS_IO_PIN GPIO_Pin_8 +#define SPI1SCK_PORT GPIOB +#define SPI1SCK_IO_PIN GPIO_Pin_1 +#define SPI1MOSI_PORT GPIOA +#define SPI1MOSI_IO_PIN GPIO_Pin_15 +#define SPI1MISO_PORT GPIOA +#define SPI1MISO_IO_PIN GPIO_Pin_14 + +#define SPI2PORT HSPI +#define SPI2NCS_PORT GPIOB +#define SPI2NCS_IO_PIN GPIO_Pin_15 +#define SPI2SCK_PORT GPIOB +#define SPI2SCK_IO_PIN GPIO_Pin_1 +#define SPI2MOSI_PORT GPIOA +#define SPI2MOSI_IO_PIN GPIO_Pin_15 +#define SPI2MISO_PORT GPIOA +#define SPI2MISO_IO_PIN GPIO_Pin_14 + +//spi0_slaver +#define SPI0NCS_PORT_S GPIOB +#define SPI0NCS_IO_PIN_S GPIO_Pin_12 +#define SPI0SCK_PORT_S GPIOB +#define SPI0SCK_IO_PIN_S GPIO_Pin_13 +#define SPI0MOSI_PORT_S GPIOB +#define SPI0MOSI_IO_PIN_S GPIO_Pin_14 +#define SPI0MISO_PORT_S GPIOB +#define SPI0MISO_IO_PIN_S GPIO_Pin_15 + +//spi1_master +#define SPI1NCS_PORT_M GPIOC +#define SPI1NCS_IO_PIN_M GPIO_Pin_1 +#define SPI1SCK_PORT_M GPIOC +#define SPI1SCK_IO_PIN_M GPIO_Pin_2 +#define SPI1MOSI_PORT_M GPIOC +#define SPI1MOSI_IO_PIN_M GPIO_Pin_3 +#define SPI1MISO_PORT_M GPIOC +#define SPI1MISO_IO_PIN_M GPIO_Pin_4 + +//lcd +#define ST7539CS_PORT GPIOB +#define ST7539CS_IO_PIN GPIO_Pin_15 +#define ST7539RST_PORT GPIOB +#define ST7539RST_IO_PIN GPIO_Pin_2 +#define ST7539A0_PORT GPIOB +#define ST7539A0_IO_PIN GPIO_Pin_0 +#define ST7539BL_PORT GPIOC +#define ST7539BL_IO_PIN GPIO_Pin_2 +#define ST7539SCK_PORT GPIOB +#define ST7539SCK_IO_PIN GPIO_Pin_1 +#define ST7539MOSI_PORT GPIOA +#define ST7539MOSI_IO_PIN GPIO_Pin_15 +#define ST7539MISO_PORT GPIOA +#define ST7539MISO_IO_PIN GPIO_Pin_14 + +//tft +#define ST7789CS_PORT GPIOC +#define ST7789CS_IO_PIN GPIO_Pin_7 +#define ST7789RST_PORT GPIOC +#define ST7789RST_IO_PIN GPIO_Pin_5 +#define ST7789A0_PORT GPIOB +#define ST7789A0_IO_PIN GPIO_Pin_1 +#define ST7789BL_PORT GPIOC +#define ST7789BL_IO_PIN GPIO_Pin_8 +#define ST7789SCK_PORT GPIOB +#define ST7789SCK_IO_PIN GPIO_Pin_0 +#define ST7789MOSI_PORT GPIOA +#define ST7789MOSI_IO_PIN GPIO_Pin_15 +#define ST7789MISO_PORT GPIOA +#define ST7789MISO_IO_PIN GPIO_Pin_14 +//pwm +#define PWM0_PORT GPIOB +#define PWM0_IO_PIN GPIO_Pin_8 +#define PWM1_PORT GPIOB +#define PWM1_IO_PIN GPIO_Pin_9 +#define PWM2_PORT GPIOB +#define PWM2_IO_PIN GPIO_Pin_10 +#define PWM3_PORT GPIOB +#define PWM3_IO_PIN GPIO_Pin_11 +#define PWM4_PORT GPIOB +#define PWM4_IO_PIN GPIO_Pin_12 +#define PWM5_PORT GPIOB +#define PWM5_IO_PIN GPIO_Pin_13 +#define PWM6_PORT GPIOB +#define PWM6_IO_PIN GPIO_Pin_14 +#define PWM7_PORT GPIOB +#define PWM7_IO_PIN GPIO_Pin_15 +#define PWM8_PORT GPIOD +#define PWM8_IO_PIN GPIO_Pin_2 + +//16MFLASH +#define FLASH16M_NCS_PORT GPIOD +#define FLASH16M_NCS_IO_PIN GPIO_Pin_7 +#define FLASH16M_SCK_PORT GPIOD +#define FLASH16M_SCK_IO_PIN GPIO_Pin_11 +#define FLASH16M_MOSI_PORT GPIOD +#define FLASH16M_MOSI_IO_PIN GPIO_Pin_12 +#define FLASH16M_MISO_PORT GPIOD +#define FLASH16M_MISO_IO_PIN GPIO_Pin_13 + +//dcmi +#define DCMI_LCD_RST_PIN (74) +#define DCMI_LCD_CS_PIN (31) +#define DCMI_LCD_CLK_PIN (17) +#define DCMI_LCD_MOSI_PIN (15) +#define DCMI_LCD_MISO_PIN (14) +#define DCMI_LCD_A0_PIN (16) +#define DCMI_LCD_BL_PIN (62) + + +#define DCMI_CAMERA_SDA_PIN (40) +#define DCMI_CAMERA_SCL_PIN (39) +#define DCMI_CAMERA_RST_PIN (0xff) +#define DCMI_CAMERA_PWDN_PIN (49) +#define DCMI_CAMERA_MCLK_PIN (32) +#define DCMI_CAMERA_PCLK_PIN (34) +#define DCMI_CAMERA_VSYNC_PIN (38) +#define DCMI_CAMERA_HSYNC_PIN (37) +#define DCMI_CAMERA_DATA_WIDTH (8) +#define DCMI_CAMERA_DATA0_PIN (48) +#define DCMI_CAMERA_DATA1_PIN (47) +#define DCMI_CAMERA_DATA2_PIN (46) +#define DCMI_CAMERA_DATA3_PIN (45) +#define DCMI_CAMERA_DATA4_PIN (44) +#define DCMI_CAMERA_DATA5_PIN (43) +#define DCMI_CAMERA_DATA6_PIN (42) +#define DCMI_CAMERA_DATA7_PIN (41) + +//psram +#define PSRAM_NCS_PIN (45) +#define PSRAM_SCK_PIN (44) +#define PSRAM_DATA0_PIN (52) +#define PSRAM_DATA1_PIN (49) +#define PSRAM_DATA2_PIN (50) +#define PSRAM_DATA3_PIN (43) + +//i2c0 +#define I2C0PORT MI2C0 +#define I2C0SCL_PORT GPIOB +#define I2C0SCL_IO_PIN GPIO_Pin_2 +#define I2C0SDA_PORT GPIOB +#define I2C0SDA_IO_PIN GPIO_Pin_3 + +//i2c1 +#define I2C1PORT MI2C1 +#define I2C1SCL_PORT GPIOB +#define I2C1SCL_IO_PIN GPIO_Pin_4 +#define I2C1SDA_PORT GPIOB +#define I2C1SDA_IO_PIN GPIO_Pin_5 + +//sci7816 +#define SCI7816_RESET_PORT GPIOE +#define SCI7816_RESET_IO_PIN GPIO_Pin_14 +#define SCI7816_CLK_PORT GPIOE +#define SCI7816_CLK_IO_PIN GPIO_Pin_15 +#define SCI7816_DATA_PORT GPIOE +#define SCI7816_DATA_IO_PIN GPIO_Pin_13 + +#define SCI7816_VCARD_PORT GPIOE +#define SCI7816_VCARD_IO_PIN GPIO_Pin_12 +#define SCI7816_DETECT_PORT GPIOC +#define SCI7816_DETECT_IO_PIN GPIO_Pin_1 + +//sci17816 +#define SCI17816_RESET_PORT GPIOE +#define SCI17816_RESET_IO_PIN GPIO_Pin_10 +#define SCI17816_CLK_PORT GPIOA +#define SCI17816_CLK_IO_PIN GPIO_Pin_7 +#define SCI17816_DATA_PORT GPIOA +#define SCI17816_DATA_IO_PIN GPIO_Pin_6 +#define SCI17816_CARD1_EN_PORT GPIOE +#define SCI17816_CARD1_EN_IO_PIN GPIO_Pin_11 + +//fpc1020 +#define FPC1020_PORT GPIOC +#define FPC1020_CS_PIN GPIO_Pin_6 +#define FPC1020_SCLK_PIN GPIO_Pin_1 +#define FPC1020_MOSI_PIN GPIO_Pin_2 +#define FPC1020_MISO_PIN GPIO_Pin_3 +#define FPC1020_RST_PIN GPIO_Pin_4 +#define FPC1020_IRQ_PIN GPIO_Pin_5 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOD +#define NFC_RESET_PIN GPIO_Pin_10 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_2 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_4 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_11 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_12 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_13 + +#define UART2BTBAUD 115200 +#define UART2BT_TX_PORT GPIOE +#define UART2BT_TX_PIN GPIO_Pin_0 +#define UART2BT_RX_PORT GPIOD +#define UART2BT_RX_PIN GPIO_Pin_13 +#define UART2BT_UARTx MUART2 +#define UART2BT_Tx_FUNC UART2_TXD +#define UART2BT_Rx_FUNC UART2_RXD +#define UART2BT_IRQN 10 +#define UART2BT_RTS_SOFT_PORT GPIOD //鐢ㄤ簬m0鏍镐笌bt鏍歌蒋浠舵祦鎺� +#define UART2BT_RTS_SOFT_PIN GPIO_Pin_11 + +#elif(BOARD_TYPE == APP_194_YC3173AB_DOORLOCK_V1_0_BOARD) +//uart0 +#define PRINTPORT MUART0 +#define PRINT_BAUD (921600) +#define PRINTRX_PORT GPIOD +#define PRINTRX_IO_PIN GPIO_Pin_6 +#define PRINTTX_PORT GPIOD +#define PRINTTX_IO_PIN GPIO_Pin_5 +#define PRINTRTS_PORT GPIOB +#define PRINTRTS_IO_PIN GPIO_Pin_2 +#define PRINTCTS_PORT GPIOB +#define PRINTCTS_IO_PIN GPIO_Pin_3 + +//uart1 +#define UART1_BAUD (921600) +#define UART1RX_PORT GPIOA +#define UART1RX_IO_PIN GPIO_Pin_0 +#define UART1TX_PORT GPIOA +#define UART1TX_IO_PIN GPIO_Pin_1 + +//nfc +#define NFC_TEMER TIM0 +#define NFC_SPI MSPI0 +#define NFC_RESET_PORT GPIOE +#define NFC_RESET_PIN GPIO_Pin_0 //IO64 +#define NFC_12MCLK_PORT GPIOD +#define NFC_12MCLK_PIN GPIO_Pin_7 //IO55 +#define NFC_SPI_CS_PORT GPIOD +#define NFC_SPI_CS_PIN GPIO_Pin_11 //IO59 +#define NFC_SPI_SCK_PORT GPIOD +#define NFC_SPI_SCK_PIN GPIO_Pin_13 //IO61 +#define NFC_SPI_MOSI_PORT GPIOD +#define NFC_SPI_MOSI_PIN GPIO_Pin_14 //IO62 +#define NFC_SPI_MISO_PORT GPIOD +#define NFC_SPI_MISO_PIN GPIO_Pin_15 //IO63 + + +//BT +#define UART2BTBAUD 115200 +#define UART2BT_TX_PORT GPIOB +#define UART2BT_TX_PIN GPIO_Pin_8 +#define UART2BT_RX_PORT GPIOB +#define UART2BT_RX_PIN GPIO_Pin_7 +#define UART2BT_UARTx MUART2 +#define UART2BT_Tx_FUNC UART2_TXD +#define UART2BT_Rx_FUNC UART2_RXD +#define UART2BT_IRQN 10 +#define UART2BT_RTS_SOFT_PORT GPIOD //鐢ㄤ簬m0鏍镐笌bt鏍歌蒋浠舵祦鎺� +#define UART2BT_RTS_SOFT_PIN GPIO_Pin_11 + +#endif + +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/core/core_rv_31xx.h b/bsp/yichip/yc3122-pos/Libraries/core/core_rv_31xx.h new file mode 100644 index 0000000000..05a164b58d --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/core_rv_31xx.h @@ -0,0 +1,423 @@ +/* + * Copyright (c) 2006-2021, YICHIP Development Team + * @file yc_rom_api.h + * @brief source file for setting rom_api + * + * Change Logs: + * Date Author Version Notes + * 2021-06-23 wushengyan V1.0.0 the first version + */ +#ifndef __RV_31XX_H__ +#define __RV_31XX_H__ + +#ifdef __USE_YC_RISC_V__ + +#include "type.h" + +#ifdef __cplusplus + extern "C" { +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ +/*end IO definitions*/ + + +#define __STATIC_INLINE static __inline +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC PLIC + - Core SysTick Register + ******************************************************************************/ + +/******************** RISC-V REG START **************************************/ +typedef struct +{ + __IO uint32_t RV_PAUSE_EN : 1; + __IO uint32_t RV_PAUSE_START : 1; + __IO uint32_t RV_DCLK_EN : 1; + __IO uint32_t RV_QSORTCLK_EN : 1; + __IO uint32_t RV_BINCLK_EN : 1; + __IO uint32_t DBG_STEP_EN : 1; + __IO uint32_t FPU_STEP_DIS : 1; + __IO uint32_t LONGP_STEP_EN : 1; + __IO uint32_t RV_CORECLK_EN : 8; + __I uint32_t RV_CTRL_RSVD : 16; + __IO uint32_t RV_WKUP_SRC_EN : 32; + __IO uint32_t RV_PC_RTVEC : 32; + __IO uint32_t RV_STACK_ADDR : 32; +} RVCtrl_TypeDef; + +typedef struct +{ + __IO uint32_t ICE_CTRL : 16; + __IO uint32_t ICE_CMD : 4; + __I uint32_t ICE_CTRL_RSVD : 12; + __IO uint32_t ICE_BREAK0 : 25; + __I uint32_t ICE_BREAK0_RSVD : 7; + __IO uint32_t ICE_BREAK1 : 25; + __I uint32_t ICE_BREAK1_RSVD : 7; + __IO uint32_t ICE_REG_WDATA : 32; + __I uint32_t ICE_REG_RDATA : 32; + __IO uint32_t TRACE_ADDR : 25; + __I uint32_t TRACE_ADDR_RSVD : 7; + __I uint32_t TRACE_FIFO_RDATA : 25; + __I uint32_t TRACE_FIFO_RDATA_RSVD : 7; + __I uint32_t EXE_ADDR : 32; + __I uint32_t ICE_STATUS : 8; + __I uint32_t ICE_STATUS_RSVD : 24; //RV_CTRL +} RVIce_TypeDef; + +typedef struct +{ + __IO uint32_t BIN_CTRL_BLOCK_ENABLE : 1; + __IO uint32_t BIN_CTRL_GRID_MODE : 1; + __IO uint32_t BIN_CTRL_CUT_ENABLE : 1; + __IO uint32_t BIN_CTRL_SCALER_ENABLE : 1; + __IO uint32_t BIN_CTRL_INV_BIT_ENABLE : 1; + __I uint32_t BIN_CTRL_RSVD : 3; + __IO uint32_t RANGE : 8; + __IO uint32_t SUB_HEIGHT : 8; + __IO uint32_t SUB_WIDTH : 8; + + __IO uint32_t RAW_BIN_BASEADDR : 24; + __I uint32_t RAW_BIN_BASEADDR_RSVD : 8; + __IO uint32_t RGB_BASEADDR : 24; + __I uint32_t RGB_BASEADDR_RSVD : 8; + __IO uint32_t AVG_BASEADDR : 24; + __I uint32_t AVG_BASEADDR_RSVD : 8; + __IO uint32_t SCA_BIN_BASEADDR : 24; + __I uint32_t SCA_BIN_BASEADDR_RSVD : 8; + + __I uint32_t BIN_STATUS : 32; + __I uint32_t RAW_DOUT_ADDR_LOCK : 24; + __I uint32_t RAW_DOUT_ADDR_LOCK_RSVD : 8; + __I uint32_t SCA_DOUT_ADDR_LOCK : 24; + __I uint32_t SCA_DOUT_ADDR_LOCK_RSVD : 8; + __IO uint32_t QSORT_CTRL : 32; + __IO uint32_t QSORT_BASEADDR : 24; + __I uint32_t QSORT_BASEADDR_RSVD : 8; + __I uint32_t QSORT_DONE : 1; + __I uint32_t QSORT_DONE_RSVD : 31; + + __IO uint32_t ONE_RGB_BASEADDR : 24; + __I uint32_t ONE_RGB_BASEADDR_RSVD : 8; + __IO uint32_t FAST_BIN_BASEADDR : 24; + __I uint32_t FAST_BIN_BASEADDR_RSVD : 8; + __IO uint32_t CANNY_BIN_BASEADDR : 24; + __I uint32_t CANNY_BIN_BASEADDR_RSVD : 8; + __IO uint32_t ONE_BIN_CTRL : 13; + __I uint32_t ONE_BIN_CTRL_RSVD : 19; + __IO uint32_t FAST_BIN_CTRL : 24; + __I uint32_t FAST_BIN_CTRL_RSVD : 8; + __IO uint32_t CANNY_BIN_CTRL : 23; + __I uint32_t CANNY_BIN_CTRL_RSVD : 9; + __IO uint32_t CANNY_BIN_CTRL1 : 12; + __I uint32_t CANNY_BIN_CTRL1_RSVD : 20; + __IO uint32_t ONE_BIN_STATUS : 21; + __I uint32_t ONE_BIN_STATUS_RSVD : 11; + __IO uint32_t FAST_BIN_BASEADDR_USED : 24; + __I uint32_t FAST_BIN_BASEADDR_USED_RSVD : 8; + __IO uint32_t CANNY_BIN_BASEADDR_USED : 24; + __I uint32_t CANNY_BIN_BASEADDR_USED_RSVD : 8; +} RVBin_TypeDef; + +typedef struct +{ + __IO uint32_t JTAG_SW_SEL :1; + __I uint32_t JTAG_SW_SEL_RSVD :3; + __IO uint32_t DAP_REG_BASE_ADDR :4; + __I uint32_t DAP_CTRL_RSVD :24; + __IO uint32_t RV_TM_EN :1; + __IO uint32_t RV_TM_EN_RSVD :31; + __IO uint32_t RV_TM_CNT :32; + __IO uint32_t M0_TO_RV_IE :1; + __I uint32_t M0_TO_RV_IE_RSVD :7; + __IO uint32_t M0_TO_RV_IRQ :1; + __I uint32_t M0_TO_RV_IRQ_RSVD :7; + __IO uint32_t RV_TO_M0_IRQ_TRIG :1; + __I uint32_t RV_TO_M0_IRQ_TRIG_RSVD :15; + __IO uint32_t IRQ_SW_EN :1; + __IO uint32_t IRQ_SW_PEND :1; + __I uint32_t IRQ_SW_RSVD :6; + __IO uint32_t IRQ_SW_CODE :8; + __I uint32_t RV_SW_IRQ_RSVD :16; +}RVIrq_TypeDef; + +#define MPU_REGION_NUM 4 +typedef struct +{ + __IO uint8_t Protect_region[MPU_REGION_NUM]; + +} RVMPUREGION_TypeDef; + +typedef struct +{ + __IO uint32_t BaseAndLimit[MPU_REGION_NUM]; + +} RVMPUBASE_TypeDef; + +#define BASE_LIMIT_REGION_NUM 4 +typedef struct +{ + __IO uint32_t MPU_ENABLE_CODE : 4; + __IO RVMPUREGION_TypeDef ICB_PROTECT; + __IO RVMPUREGION_TypeDef DTCM_PROTECT; + __IO RVMPUREGION_TypeDef ITCM_PROTECT; + __IO uint32_t USER_START : 24; + __IO uint32_t MPU_STS_CLR; + __I uint32_t FAULT_STATUS; + __I uint32_t FAULT_ADDR_ICB; + __I uint32_t FAULT_ADDR_DTCM; + __I uint32_t FAULT_ADDR_ITCM; + __IO RVMPUBASE_TypeDef ICB_BASE; + __IO RVMPUBASE_TypeDef DTCM_BASE; + __IO RVMPUBASE_TypeDef ITCM_BASE; + __IO RVMPUBASE_TypeDef ICB_LIMIT; + __IO RVMPUBASE_TypeDef DTCM_LIMIT; + __IO RVMPUBASE_TypeDef ITCM_LIMIT; +} RVMPU_TypeDef; + +typedef struct +{ + __IO uint32_t WDT_EN : 1; + __IO uint32_t WDT_EN_LOCK : 1; + __IO uint32_t WDT_ACT : 1; + __I uint32_t WDT_CTRL_RSVD1 : 5; + __IO uint32_t WDT_DIV : 4; + __I uint32_t WDT_CTRL_RSVD2 : 20; + __IO uint32_t WDT_KEY : 16; + __I uint32_t WDT_KEY_RSVD : 16; + __IO uint32_t WDT_RELOAD_VALUE : 32; + __I uint32_t WDT_CNT : 32; + __IO uint32_t WDT_IRQ_EN : 1; + __I uint32_t WDT_IRQ_EN_RSVD : 31; + __IO uint32_t WDT_IRQ : 1; + __I uint32_t WDT_IRQ_RSVD : 31; +} RVWdt_TypeDef; + +#define YC3122_RV_BASE (0x000E0000UL) /* RV Base Address */ + +#define RV_CTRL_BASEADDR (YC3122_RV_BASE + 0x00000) //0xe0000 +#define RV_ICE_BASEADDR (YC3122_RV_BASE + 0x00004) //0xe0004 +#define RV_BIN_BASEADDR (YC3122_RV_BASE + 0x00034) //0xe0034 +#define RV_IRQ_BASEADDR (YC3122_RV_BASE + 0x000D0) //0xe00d0 +#define RV_SYSTICK_BASEADDR (YC3122_RV_BASE + 0x000D0) //0xe00d4 +#define RV_MPU_BASEADDR (YC3122_RV_BASE + 0x00100) //0xe0100 +#define RV_IRQ_PRIO_BASEADDR (YC3122_RV_BASE + 0x01000) //0xe1000 +#define RV_IRQ_PEND_BASEADDR (YC3122_RV_BASE + 0x02000) //0xe2000 +#define RV_IRQ_ENAB_BASEADDR (YC3122_RV_BASE + 0x03000) //0xe3000 +#define RV_IRQ_THRD_BASEADDR (YC3122_RV_BASE + 0x04000) //0xe4000 +#define RV_IRQ_CLAM_BASEADDR (YC3122_RV_BASE + 0x04004) //0xe4004 +#define RV_WDT_BASEADDR (0xfb700) //0xfb700 + +#define RV_CTRL1 ((RVCtrl_TypeDef *)RV_CTRL_BASEADDR) +#define RV_ICE ((RVIce_TypeDef *)RV_ICE_BASEADDR) +#define RV_BIN ((RVBin_TypeDef *)RV_BIN_BASEADDR) +#define RISC_IRQ ((RVIrq_TypeDef *)RV_IRQ_BASEADDR) + +/*risc-v mpu map start*/ +#define RV_MPU_ICB_PROTECT_BASE (RV_MPU_BASEADDR + 0x0004) +#define RV_MPU_DTCM_PROTECT_BASE (RV_MPU_ICB_PROTECT_BASE + 0x0004) +#define RV_MPU_ITCM_PROTECT_BASE (RV_MPU_DTCM_PROTECT_BASE + 0x0004) + +#define RV_MPU_ICB_BASE_BASE (RV_MPU_BASEADDR + 0x0040) +#define RV_MPU_DTCM_BASE_BASE (RV_MPU_ICB_BASE_BASE + 0x0010) +#define RV_MPU_ITCM_BASE_BASE (RV_MPU_DTCM_BASE_BASE + 0x0010) + +#define RV_MPU_ICB_LIMIT_BASE (RV_MPU_BASEADDR + 0x0080) +#define RV_MPU_DTCM_LIMIT_BASE (RV_MPU_ICB_LIMIT_BASE + 0x0010) +#define RV_MPU_ITCM_LIMIT_BASE (RV_MPU_DTCM_LIMIT_BASE + 0x0010) + +/*risc-v mpu reg start*/ +#define RVMPU ((RVMPU_TypeDef *)RV_MPU_BASEADDR) +#define ICB_PROTECTION ((RVMPUREGION_TypeDef *)RV_MPU_ICB_PROTECT_BASE) +#define DTCM_PROTECTION ((RVMPUREGION_TypeDef *)RV_MPU_DTCM_PROTECT_BASE) +#define ITCM_PROTECTION ((RVMPUREGION_TypeDef *)RV_MPU_ITCM_PROTECT_BASE) + +#define ICB_BASE ((RVMPUBASE_TypeDef *)RV_MPU_ICB_BASE_BASE) +#define DTCM_BASE ((RVMPUBASE_TypeDef *)RV_MPU_DTCM_BASE_BASE) +#define ITCM_BASE ((RVMPUBASE_TypeDef *)RV_MPU_ITCM_BASE_BASE) + +#define ICB_LIMIT ((RVMPUBASE_TypeDef *)RV_MPU_ICB_LIMIT_BASE) +#define DTCM_LIMIT ((RVMPUBASE_TypeDef *)RV_MPU_DTCM_LIMIT_BASE) +#define ITCM_LIMIT ((RVMPUBASE_TypeDef *)RV_MPU_ITCM_LIMIT_BASE) + + +#define RV_WDT ((RVWdt_TypeDef *)RV_WDT_BASEADDR) + +#define RV_IRQ_PRIO(x) *(volatile uint8_t*)(RV_IRQ_PRIO_BASEADDR + ((uint8_t)((uint8_t)(x)/2))) +#define RV_IRQ_PEND(x) *(volatile uint8_t*)(RV_IRQ_PEND_BASEADDR + ((uint8_t)((uint8_t)(x)/8))) +#define RV_IRQ_ENAB(x) *(volatile uint8_t*)(RV_IRQ_ENAB_BASEADDR + ((uint8_t)((uint8_t)(x)/8))) +#define RV_IRQ_THOD *(volatile int*)(RV_IRQ_THRD_BASEADDR) +#define RV_IRQ_CLAM *(volatile int*)(RV_IRQ_CLAM_BASEADDR) +/******************** RISC-V REG END **************************************/ + + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + uint32_t TM_EN; /*!< Offset: 0x000 (R/W) SysTick Enable */ + uint32_t TM_CNT; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ +} SysTick_Type; + + + +#define SysTick ((SysTick_Type *) RV_SYSTICK_BASEADDR ) /*!< SysTick configuration struct */ +/******************************************************************************/ + + +/** + * @method RV EnableIRQ + * @brief Enable IRQ + * @param IRQn : USB_IRQn... + * @retval NULL + */ +__STATIC_INLINE void RV_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + RV_IRQ_ENAB(IRQn) |= (uint32_t)(1UL << (uint8_t)((uint8_t)(IRQn)%8)); + } +} + +/** + * @method RV DisableIRQ + * @brief Disable IRQ + * @param IRQn : USB_IRQn... + * @retval NULL + */ +__STATIC_INLINE void RV_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + RV_IRQ_ENAB(IRQn) &= ~(uint32_t)(1UL << (uint8_t)((uint8_t)(IRQn)%8)); + } +} + +/** + * @method RV SetPriority + * @brief SetPriority IRQ + * @param IRQn : USB_IRQn... + * @param priority : 0~15 + * @retval NULL + */ +__STATIC_INLINE void RV_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0 && priority > 0 && priority < 16) + { + RV_IRQ_PRIO(IRQn) |= (priority << (uint8_t)((uint8_t)(IRQn)%2)*4); + } +} + +/** + * @method RV Get Pending Interrupt + * @brief Reads The PLIC pending register returns the pending bit + * @param IRQn : USB_IRQn... + * @retval 0: Interrupt status is not pending. + * 1: Interrupt status is pending + */ +__STATIC_INLINE uint32_t RV_GetPendingIRQ(IRQn_Type IRQn) +{ + +} + +/** + * @method RV Get Interrupt Priority + * @brief Reads the priority of a device specific interrupt + * @param IRQn : USB_IRQn... + * @retval Interrupt Priority. + */ +__STATIC_INLINE uint32_t RV_GetPriority(IRQn_Type IRQn) +{ + +} + +/** + * @method NVIC_Configuration + * @brief NVIC initialization function for risc-v. + * @param IRQn: Interrupt vector numbers could be 0~31. + * @param priority: Interrupt priority numbers could be 1~15. + * @param newstate: enable or disable + * @retval None + */ +__STATIC_INLINE void NVIC_Configuration(IRQn_Type IRQn, uint32_t priority,FunctionalState newstate) +{ + if(newstate == ENABLE ) + { + RV_EnableIRQ(IRQn); + RV_SetPriority(IRQn, priority); + } + else + { + RV_DisableIRQ(IRQn); + RV_SetPriority(IRQn, priority); + } +} + +/** + * @method SysTick_Config + * @brief Initializes the System Timer and its interrupt (priority default 1) + * @param ticks: Number of ticks between two interrupts. (0~0xffffffff) + * @retval 0: FuncTion succeeded. + * 1: Function failed. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + SysTick->TM_CNT = ticks; + RV_EnableIRQ(34); /*set systick priority*/ + RV_SetPriority(34,15); + SysTick->TM_EN = 1; + + return (0UL); +} + +/** + * @method __enable_irq + * @brief Enable IRQ Interrupts + * @retval NONE. + */ +__STATIC_INLINE void __enable_irq(void) +{ + __asm("csrs mstatus,0x00000008"); +} + +/** + * @method __disable_irq + * @brief Disable IRQ Interrupts + * @retval NONE. + */ +__STATIC_INLINE void __disable_irq(void) +{ + __asm("csrc mstatus,0x00000008"); +} + +/*make M0 and RV IRQ equ*/ +#define NVIC_EnableIRQ RV_EnableIRQ +#define NVIC_DisableIRQ RV_DisableIRQ +#define NVIC_SetPriority RV_SetPriority +#define NVIC_GetPendingIRQ RV_GetPendingIRQ +/*end*/ + + +#ifdef __cplusplus +} +#endif + +#endif +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/core/rom_api.h b/bsp/yichip/yc3122-pos/Libraries/core/rom_api.h new file mode 100644 index 0000000000..5f8b7fcea4 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/rom_api.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_rom_api.h + * @brief source file for setting rom_api + * + * Change Logs: + * Date Author Version Notes + * 2020-11-05 wushengyan V1.0.0 the first version + */ +#ifndef __ROM_API_H__ +#define __ROM_API_H__ + +#define YC3122_AA (0) +#define YC3122_AB (1) +#define IC_DEVICE YC3122_AB +#if (IC_DEVICE == YC3122_AA) +/* TIMER */ +#define FUNC_DELAY_US_ADDR (0x5030 + 1) +#define FUNC_DELAY_MS_ADDR (0x5068 + 1) + +/* OTP */ +#define FUNC_INIT_OTP_ADDR (0x5468 + 1) +#define FUNC_DEINIT_OTP_ADDR (0x54c8 + 1) +#define FUNC_READ_OTP_ADDR (0x5510 + 1) +#define FUNC_WRITE_OTP_ADDR (0x5648 + 1) +#define FUNC_READ_CHIPID_ADDR (0x56ac + 1) +#define FUNC_READ_CHIPLF_ADDR (0x56ba + 1) + +/* LPM */ +#define FUNC_LIGHT_SLEEP_ADDR (0x5338 + 1) +#define FUNC_DEEP_SLEEP_ADDR (0x535c + 1) + +/* QSPI */ +#define FUNC_ENC_WRITE_FLASH_ADDR (0x67c0 + 1) +#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x59a8 + 1) +#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x59b4 + 1) +#define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR (0x59c0 + 1) +#define FUNC_QSPI_FLASH_WRITE_ADDR (0x58e8 + 1) +#define FUNC_QSPI_FLASH_READ_ADDR (0x59ea + 1) +#define FUNC_FLASH_BLANK_CHECK (0x670c + 1) +#define FUNC_PREFETCH (0x5398 + 1) +#define FUNC_READ_FLASH_ID (0x5a54 + 1) + +#elif (IC_DEVICE == YC3122_AB) + +/* TIMER */ +#define FUNC_DELAY_US_ADDR (0x5020 + 1) +#define FUNC_DELAY_MS_ADDR (0x5058 + 1) + +/* OTP */ +#define FUNC_INIT_OTP_ADDR (0x5458 + 1) +#define FUNC_DEINIT_OTP_ADDR (0x54b8 + 1) +#define FUNC_READ_OTP_ADDR (0x5500 + 1) +#define FUNC_WRITE_OTP_ADDR (0x5638 + 1) +#define FUNC_READ_CHIPID_ADDR (0x569c + 1) +#define FUNC_READ_CHIPLF_ADDR (0x56aa + 1) + +/* LPM */ +#define FUNC_LIGHT_SLEEP_ADDR (0x5328 + 1) +#define FUNC_DEEP_SLEEP_ADDR (0x534c + 1) + +/* QSPI */ +#define FUNC_ENC_WRITE_FLASH_ADDR (0x6798 + 1) +#define FUNC_QSPI_FLASH_SECTORERASE_ADDR (0x5998 + 1) +#define FUNC_QSPI_FLASH_BLOCKERASE_ADDR (0x59a4 + 1) +#define FUNC_QSPI_FLASH_BLOCK64ERASE_ADDR (0x59b0 + 1) +#define FUNC_QSPI_FLASH_WRITE_ADDR (0x58d8 + 1) +#define FUNC_QSPI_FLASH_READ_ADDR (0x59da + 1) +#define FUNC_FLASH_BLANK_CHECK (0x66e4 + 1) +#define FUNC_PREFETCH (0x5388 + 1) +#define FUNC_READ_FLASH_ID (0x5a44 + 1) +#define FUNC_QSPI_FLASH_CMD (0x57ec + 1) + +#endif + + +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/core/system.c b/bsp/yichip/yc3122-pos/Libraries/core/system.c new file mode 100644 index 0000000000..12ac0f9a5b --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/system.c @@ -0,0 +1,391 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_system.c + * @brief source file for setting system + * + * Change Logs: + * Date Author Version Notes + * 2020-11-05 wushengyan V1.0.0 the first version + */ + +#include +#include "system.h" + + +//***************************************************************************** +// +//! A simple MyPrintf function supporting \%c, \%d, \%p, \%s, \%u,\%x, and \%X. +//! +//! \param format is the format string. +//! \param ... are the optional arguments, which depend on the contents of the +//! \return None. +// +//***************************************************************************** + +typedef struct _PrintPort_TypeDef_ +{ + UART_TypeDef *PrintUart; + GPIO_TypeDef PrintRX_Port; + GPIO_Pin_TypeDef PrintRX_Pin; + GPIO_TypeDef PrintTX_Port; + GPIO_Pin_TypeDef PrintTX_Pin; +} PrintPort_TypeDef; + +static PrintPort_TypeDef PrintPort_Struct = +{ + .PrintUart = PRINTPORT, + .PrintRX_Port = PRINTRX_PORT, + .PrintRX_Pin = PRINTRX_IO_PIN, + .PrintTX_Port = PRINTTX_PORT, + .PrintTX_Pin = PRINTTX_IO_PIN, +}; + + +//#define SIM_PLATFORM + +void print_char(int data) +{ + + volatile int *ptr; + ptr = (volatile int *)0xE0300; + *ptr = data; +} + +void printfsend(uint8_t *buf, int len) +{ + uint8_t printbuf[256]; + for (int i = 0; i < len; i++) + { + printbuf[i] = buf[i]; +#ifdef SIM_PLATFORM + print_char(buf[i]); +#endif + } +#ifndef SIM_PLATFORM + //UART_SendBuf(PrintPort_Struct.PrintUart, printbuf, len); + UART_SendBuf(PRINTPORT, printbuf, len); +#endif +} + +void MyPrintf(char *format, ...) +{ + static const int8_t *const g_pcHex1 = "0123456789abcdef"; + static const int8_t *const g_pcHex2 = "0123456789ABCDEF"; + + uint32_t ulIdx = 0, ulValue = 0, ulPos = 0, ulCount = 0, ulBase = 0, ulNeg = 0; + int8_t *pcStr = NULL, pcBuf[16] = {0}, cFill = 0; + char HexFormat; + va_list vaArgP; + + va_start(vaArgP, format); + + while (*format) + { + /* Find the first non-% character, or the end of the string. */ + for (ulIdx = 0; (format[ulIdx] != '%') && (format[ulIdx] != '\0'); ulIdx++) + {} + + /* Write this portion of the string. */ + if (ulIdx > 0) + { + printfsend((uint8_t *)format, ulIdx); + } + + format += ulIdx; + + if (*format == '%') + { + format++; + + /* Set the digit count to zero, and the fill character to space */ + /* (i.e. to the defaults) */ + ulCount = 0; + cFill = ' '; + +again: + switch (*format++) + { + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + { + if ((format[-1] == '0') && (ulCount == 0)) + { + cFill = '0'; + } + + ulCount *= 10; + ulCount += format[-1] - '0'; + + goto again; + } + + case 'c': + { + ulValue = va_arg(vaArgP, unsigned long); + printfsend((uint8_t *)&ulValue, 1); + break; + } + + case 'd': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + + if ((long)ulValue < 0) + { + ulValue = -(long)ulValue; + ulNeg = 1; + } + else + { + ulNeg = 0; + } + + ulBase = 10; + goto convert; + } + + case 's': + { + pcStr = (int8_t *)va_arg(vaArgP, char *); + + for (ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) + {} + + printfsend((uint8_t *)pcStr, ulIdx); + + if (ulCount > ulIdx) + { + ulCount -= ulIdx; + while (ulCount--) + { + printfsend((uint8_t *)" ", 1); + } + } + break; + } + + case 'u': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 10; + ulNeg = 0; + goto convert; + } + + case 'X': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'X'; + goto convert; + } + + case 'x': + + case 'p': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'x'; + +convert: + for (ulIdx = 1; + (((ulIdx * ulBase) <= ulValue) && + (((ulIdx * ulBase) / ulBase) == ulIdx)); + ulIdx *= ulBase, ulCount--) + { + } + + if (ulNeg) + { + ulCount--; + } + + if (ulNeg && (cFill == '0')) + { + pcBuf[ulPos++] = '-'; + ulNeg = 0; + } + + if ((ulCount > 1) && (ulCount < 16)) + { + for (ulCount--; ulCount; ulCount--) + { + pcBuf[ulPos++] = cFill; + } + } + + if (ulNeg) + { + pcBuf[ulPos++] = '-'; + } + + for (; ulIdx; ulIdx /= ulBase) + { + if (HexFormat == 'x') + pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase];//x + else + pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase];//X + } + + printfsend((uint8_t *)pcBuf, ulPos); + break; + } + + case '%': + { + printfsend((uint8_t *)format - 1, 1); + break; + } + + default: + { + printfsend((uint8_t *)"ERROR", 5); + break; + } + }/* switch */ + }/* if */ + }/* while */ + va_end(vaArgP); +} + +void printv(uint8_t *buf, uint32_t len, char *s) +{ + uint32_t i = 0; + uint32_t n = 0; + MyPrintf("\r\n%s:", s); + for (i = 0; i < len; i++) + { + if (i % 16 == 0) + { + MyPrintf("\r\n%08x:", n); + n += 16; + } + MyPrintf("%02x ", buf[i]); + + } + MyPrintf("\r\n"); +} + + + + +static void PrintPort_Init(void) +{ + UART_InitTypeDef UART_InitStruct; + UART_InitStruct.BaudRate = PRINT_BAUD; //Configure serial port baud rate, the baud rate defaults to 128000. + UART_InitStruct.DataBits = DATABITS_8B; + UART_InitStruct.StopBits = STOPBITS_1; + UART_InitStruct.Parity = YC_PARITY_NONE; + UART_InitStruct.FlowCtrl = FLOWCTRL_NONE; + UART_InitStruct.RxMode = MODE_RX_ENABLE; + UART_InitStruct.SmartCard = SMARTCARD_DISABLE; + UART_InitStruct.CommMode = MODE_DUPLEX; + + if (PrintPort_Struct.PrintUart == MUART0) + { + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART0_RXD); + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART0_TXD); + } + else if (PrintPort_Struct.PrintUart == MUART1) + { + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART1_RXD); + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART1_TXD); + } + else if (PrintPort_Struct.PrintUart == MUART2) + { + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART2_RXD); + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART2_TXD); + } + else if (PrintPort_Struct.PrintUart == MUART3) + { + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART3_RXD); + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART3_TXD); + } + + UART_Init(PrintPort_Struct.PrintUart, &UART_InitStruct); + uint8_t print_irq = (PrintPort_Struct.PrintUart - MUART0) / (MUART1 - MUART0); + NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + print_irq)); + NVIC_SetPriority((IRQn_Type)(UART0_IRQn + print_irq),1); +} + +void PrintPort_Set(UART_TypeDef *UARTx) +{ + PrintPort_Struct.PrintUart = UARTx; + +// if(UARTx == MUART1) +// { +// PrintPort_Struct.PrintRX_Port = UART1RX_PORT; +// PrintPort_Struct.PrintRX_Pin = UART1RX_IO_PIN; +// PrintPort_Struct.PrintTX_Port = UART1TX_PORT; +// PrintPort_Struct.PrintTX_Pin = UART1TX_IO_PIN; +// } +} + +void Board_Init(void) +{ + /*fpga io func sel*/ +#if (BOARD_TYPE == FPGA_BOARD) + + uint8_t fpga_io_func_sel_list[][2] = + { +#ifdef __SPI0_FLASH_FPGA__ + {0x02,0x01}, + {0x08,0x01}, + {0x21,0x40}, +#endif + + {0x00,0x00}, + +#ifdef __SPI1_FLASH_FPGA__ + {0x05,0x01}, + {0x08,0x01}, + {0x21,0x80}, +#endif +#ifdef __SCANNER_BF3007_BCTC_FPGA__ + {0x01,0x01}, //func_sel1: ALT1 psram + {0x08,0x01}, //func_sel8: ALT1 tft + {0x09,0x01}, //func_sel9: ALT1 tft led + {0x02,0x01}, //func_sel9: ALT1 spia + {0x21,0x04}, //spi_sel:tft_spi_sel: SPIy + {0x20,0x02}, //iic_sel:iic0_sel: fingerprint i2c + {0x04,0x01}, //sel iica + {0x06,0x02}, //func_sel6: ALT2 fingerprint DCMI + {0x07,0x01}, //alt1 buzzer +#endif + }; + for(uint8_t i = 0; i < (sizeof(fpga_io_func_sel_list)/2); i ++) + { + FPGA_reg_write(fpga_io_func_sel_list[i][0],fpga_io_func_sel_list[i][1]); + } + +#endif + + /*print init*/ + PrintPort_Init(); +} + +void _assert_handler(const char *file, int line, const char *func) +{ +#if defined (SDK_DEBUG) + if(PRINTPORT->CTRL.bit.RX_EN == MODE_RX_ENABLE) /*check printuart is init*/ + { + MyPrintf("Assert trigger at file: %s line:%d func: %s\n ", file, line, func); + } +#endif + while (1); +} diff --git a/bsp/yichip/yc3122-pos/Libraries/core/system.h b/bsp/yichip/yc3122-pos/Libraries/core/system.h new file mode 100644 index 0000000000..0e7ecd686c --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/system.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_system.h + * @brief source file for setting system + * + * Change Logs: + * Date Author Version Notes + * 2020-11-05 wushengyan V1.0.0 the first version + */ +#ifndef __SYSTEM_H__ +#define __SYSTEM_H__ + +#define SDK_DEBUG //Debug switch + +#include +#include "yc_uart.h" +#include "rom_api.h" +#include "board_config.h" + +#define BIT_SET(a,b) ((a) |= (1<<(b))) +#define BIT_CLEAR(a,b) ((a) &= ~(1<<(b))) +#define BIT_FLIP(a,b) ((a) ^= (1<<(b))) //bit Negation +#define BIT_GET(a,b) (((a) & (1<<(b)))>>(b)) + +/** + * @brief Print format string to serial port 0.You need to initialize the serial port 0 before you use MyPrintf. + * + * @param format : format string + * @param ...: format parameter + */ +void MyPrintf(char *format, ...); + +void printv(uint8_t *buf, uint32_t len, char *s); + +void PrintPort_Set(UART_TypeDef *UARTx); + +void Board_Init(void); + +void _assert_handler(const char *file, int line, const char *func); + +#ifdef SDK_DEBUG +#define _ASSERT(x) \ +if (!(x)) \ +{ \ + _assert_handler(__FILE__,__LINE__,__FUNCTION__);\ +} +#else +#define _ASSERT(x) +#endif + +#define YC_DEBUG_LOG(type, message) \ +do \ +{ \ + if (type) \ + MyPrintf message; \ +} \ +while (0) + +#endif /*__SYSTEM_H__*/ diff --git a/bsp/yichip/yc3122-pos/Libraries/core/type.h b/bsp/yichip/yc3122-pos/Libraries/core/type.h new file mode 100644 index 0000000000..de0f26c237 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/core/type.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_type.h + * @brief source file for setting type + * + * Change Logs: + * Date Author Version Notes + * 2020-11-05 wushengyan V1.0.0 the first version + */ + +#ifndef __TYPE_H__ +#define __TYPE_H__ + +#if defined (__CC_ARM) || defined ( __ICCARM__ ) +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned int uint32_t; +typedef unsigned long long uint64_t; +typedef unsigned char byte; +typedef unsigned short word; + +typedef signed char int8_t; +typedef signed short int16_t; +typedef signed int int32_t; +typedef signed long long int64_t; +#else +#include "stdio.h" +typedef unsigned char byte; +typedef unsigned short word; +#endif + +/** + * @brief __NOINLINE definition + */ +#if defined ( __CC_ARM ) || defined ( __GNUC__ ) +/* ARM & GNUCompiler + ---------------- +*/ +#define __NOINLINE noinline + +#elif defined ( __ICCARM__ ) +/* ICCARM Compiler + --------------- +*/ +#define __NOINLINE _Pragma("optimize = no_inline") + +#endif + +#ifndef Boolean +typedef enum {FALSE = 0, TRUE =1} Boolean; +#define IS_BOOLEAN(bool) ((bool == FALSE) || (bool == TRUE)) +#endif + +#ifndef FunctionalState +typedef enum {DISABLE = 0, ENABLE =1} FunctionalState; +#define IS_FUNCTIONAL_STATE(state) ((state== DISABLE) || (state == ENABLE)) +#endif + +#ifndef FunctionalState +typedef enum {ERROR = 0, SUCCESS = 1} ErrorStatus; +#define IS_ERROR_STATE(status) ((status== ERROR) || (status == SUCCESS)) +#endif + +#ifndef FlagStatus +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; +#endif + +#ifndef YC_NULL +#define YC_NULL (0) +#endif + +#ifndef NULL +#define NULL (0) +#endif + +#endif /*__TYPE_H__*/ + diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/libyc_qspi.a b/bsp/yichip/yc3122-pos/Libraries/sdk/libyc_qspi.a new file mode 100644 index 0000000000000000000000000000000000000000..514417c6ffb0f988fc6b6d55d98fbff98975a200 GIT binary patch literal 6302 zcmdT|eQaA-6+h3<&WDpUPSPxPou)T-+ImgnIv-66D^(MxNxG!f#JaK3b&2D=Hd#LG z+3puY)M)Jp(j>xCq<#U_s!6LTBLosLM5O#N{@{;^m=&pCjB4sItPKll)gf)nob%qh z_VZ0U5Q0BA(tGEgbAI=n`*H4l_ucBPfk<$0n{^Y*ruybBO^x*po9mkx^Qk7|o3W;b zX1zk66#z;Bq`&?*o)@Fxq2B!?f#_gwIB-BwB7vv^24z$U#zK*0>i&^Xa9GtgHVhl_ z8AEeZmf>(@D3;|pq67v&i`+jF7#r>l4l2Q6P{xA2DpqS1gd@s+B^Df14OBqCVIw5^XKi!AX8~=R#i&31 z5dG^9(f?G{m+3LA-~ibWWxnI;GZg3H_Ul+bJY$9;^6+wGHWzE>b_E=4yISft1Gd>q zZDtUjo9}pb55Ub-O8Q_wz*|`Uc*X*S@CeoZR%Et>V!NvWCX0Kd#s(ap^POgpJb8)2 zu8R)O_CmC`SM^mLZ@o2b#j>!nHX<|XVX$!DRKJW8i5Q%iFzyMhjwbO764hBok& zBur->bG~bbGq1JfCXP7{IX46I!d12w&ix_jIm{u1^W0)U>C-J(FCwG!+I59a{b4;Cc?3>!+TlS?Su)8?6V8bPK9;EP0QI(Vc zL{8Lzsm7FJjl1WI`uy>lz0$mWz-;yh&E<)T?jJiA?Gx_B0;g%8U+X)*&8xBOH2ul` zW?SLaOKm0ZO6*#aN4%^@d{5UjVSXkTev`Jpt=r#ErjF6tnV2#Ib3yfB2lcbKi{6sQ zgmYq>vduBqP=~b(PHNhF3FgYXn4@DBRY|MoZ+oV7e)@wXlR#RUSqoWnSEU$l)~opzZb*%61E8dp*t7YIzc~-Ms-< zn|HUV(R_LfOmzmwUE_NlXQzX4=QM1<5v=XF2DPqh6V-9|KMMYA$v4dxb@^!wX`JkS z`3yr}i*gQ*!uo|O$|B6fz_xHMnjP(YpHAS)o-bLv7zo@cpwl{9%U`wMsGbMt*^PE zfq5dzh=SklN7>%iFYnr<=sxON>iQ#rvEU$!D2ImVo5UKL>%ZV@*$1sYY*Ii8^bdiw z4vQ9lC=yeS)a~*?PGRn@e5usDQYx1!WV_^$R!LQ6LpONQ_&qYi-%?ypT+aGhk&K&@ zfn?MeNd_|%7!@e5K-r$wWw$^Ei-5PN_?2nAC0(L|3^@WmN5JO@_*?;>E8uele4c>M zQ}LB)R9?D71sU=Me7=Cs7w}dAZ&mRd(V767puX47gNX5UB zc3G4zQ9;K2BpY8Ww7*!u+XTD~N)SOgbP696ZpJj<$MMlfJK%6hMs#+(5*7ah2dLiC z0=BPAz?Z4`rZl81U7~^vZ9U zm#82^rGT$g@wnaTR0&Kk(MpnF4d8CB5|?#RWinI={;E`enN?V2gk$_Qg3JWD8ffgP zyR;@saeeR9Wm@Be#@ghv8FrT1_zeiZ`X zfATAP{9WG0&FNCJ@#pOS>kn^K8I3C1Po3dE>wo^Ehhc-G;s5M^uLI}F+5_+n;=2Lb zbh(T8T7c(}n~>AWvF-q%ydaK85wK$Am@ZR(Qhof*2PX1Xz0X4dWvmZ>Qtbnx;!1TP+jv>M`VLbfH7R=TSPT`FjfgoT#v zC;M_iy>s|H0QNGgfe*Zg$cAV)BH1?*4?-C3CbV{^uTL`QOs{*@OAEu;8m=z9kr3sA zH?yU9gQ3w;Wek%9Pnh07EEXB+KNwS@m{$KT(H9H1G(3rE)TDFH_zAHZ6@=p_L=i_e zqV@RD-uSO@v`)mhm8j#yziFMQFyiQJkvV_j|Eykt_Gcq*@FBRD1YG{?eJ1_jgS2=fgyN&^W&!_`6}~FP%cUzgGl*Bj|4& z?VNb~#sz=34DF*+D);vj!QVafho6l!aeqG&{C$f4Jcy$H(kYhvO9=kD&_HJwPTb!+ zg1?#-nen4jF86mw@Hb!qyx+?Z_m>iIVZ;q&V5&b7KM~??HN>U$&f}KjydyNd4_!uo zl)s#K+*%!nOr;x$<2F)|527#WIG-lMO~l3ZGBLu@(}6ggf-vcb`fwwx*NWIRQ_STATUS.reg[EXTI_Line] |= EXTI_PinSource; +} + +/** + * @brief Deinitializes the EXTI registers to default reset values. + * @param none + * @retval none + */ +void EXTI_DeInit() +{ + uint32_t i; + + for (i = 0; i < EXIT_Num; i++) + { + MGPIO->INTR.reg[i] = 0; + MGPIO->IRQ_LEVEL.reg[i] = 0; + MGPIO->IRQ_RISE.reg[i] = 0; + MGPIO->IRQ_FALL.reg[i] = 0; + } +} + +/** + * @brief get interrupt status + * @param EXTI_Line:EXTI_Line_0...EXTI_Line_4 + * @retval none + */ +uint16_t EXTI_GetITLineStatus(EXTI_LineTypeDef EXTI_Line) +{ + _ASSERT(IS_EXTI_LINE(EXTI_Line)); + + return MGPIO->INTR.reg[EXTI_Line]; +} + +/** + * @brief get interrupt pinsource status + * @param EXTI_Line:EXTI_Line_0...EXTI_Line_4 + * @param EXTI_PinSource:EXTI_PinSource0...EXTI_PinSource15 + * @retval none + */ +uint16_t EXTI_GetITEXTI_PinSourceStatus(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource) +{ + _ASSERT(IS_EXTI_LINE(EXTI_Line)); + _ASSERT(IS_EXTI_PIN_SOURCE(EXTI_PinSource)); + + if(MGPIO->INTR.reg[EXTI_Line] & EXTI_PinSource) + { + return ENABLE; + } + else + { + return DISABLE; + } + +} + +/** + * @brief EXTI LineConfig + * @param EXTI_Line:EXTI_Line_0...EXTI_Line_4 + * @param EXTI_PinSource:EXTI_PinSource0...EXTI_PinSource15 + * @param EXTI_Trigger:EXTI Trigger mode + * @retval none + */ +void EXTI_LineConfig(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource, EXTI_TriggerTypeDef EXTI_Trigger) +{ + _ASSERT(IS_EXTI_LINE(EXTI_Line)); + _ASSERT(IS_EXTI_PIN_SOURCE(EXTI_PinSource)); + _ASSERT(IS_TRIG_TYPEDEF(EXTI_Trigger)); + + uint16_t val_intr_lts,val_intr_rts,val_intr_fts,val_intr_en; + switch (EXTI_Trigger) + { + case EXTI_Trigger_Off: + val_intr_en = ~EXTI_PinSource; + val_intr_lts = ~EXTI_PinSource; + val_intr_rts = ~EXTI_PinSource; + val_intr_fts = ~EXTI_PinSource; + break; + case EXTI_Trigger_HighLev: + val_intr_en = EXTI_PinSource; + val_intr_lts = ~EXTI_PinSource; + val_intr_rts = ~EXTI_PinSource; + val_intr_fts = ~EXTI_PinSource; + break; + case EXTI_Trigger_LowLev: + val_intr_en = EXTI_PinSource; + val_intr_lts = EXTI_PinSource; + val_intr_rts = ~EXTI_PinSource; + val_intr_fts = ~EXTI_PinSource; + break; + case EXTI_Trigger_Rising: + val_intr_en = EXTI_PinSource; + val_intr_lts = ~EXTI_PinSource; + val_intr_rts = EXTI_PinSource; + val_intr_fts = ~EXTI_PinSource; + break; + case EXTI_Trigger_Falling: + val_intr_en = EXTI_PinSource; + val_intr_lts = ~EXTI_PinSource; + val_intr_rts = ~EXTI_PinSource; + val_intr_fts = EXTI_PinSource; + break; + case EXTI_Trigger_Rising_Falling: + val_intr_en = EXTI_PinSource; + val_intr_lts = ~EXTI_PinSource; + val_intr_rts = EXTI_PinSource; + val_intr_fts = EXTI_PinSource; + break; + default: + break; + } + if (EXTI_Trigger == EXTI_Trigger_Off) + { + MGPIO->INTR.reg[EXTI_Line] &= val_intr_en; + MGPIO->IRQ_LEVEL.reg[EXTI_Line] &= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] &= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] &= val_intr_fts; + } + else if (EXTI_Trigger == EXTI_Trigger_HighLev ) + { + MGPIO->IRQ_LEVEL.reg[EXTI_Line] &= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] &= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] &= val_intr_fts; + MGPIO->INTR.reg[EXTI_Line] |= val_intr_en; + } + else if (EXTI_Trigger == EXTI_Trigger_LowLev ) + { + MGPIO->IRQ_LEVEL.reg[EXTI_Line] |= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] &= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] &= val_intr_fts; + MGPIO->INTR.reg[EXTI_Line] |= val_intr_en; + } + else if (EXTI_Trigger == EXTI_Trigger_Rising ) + { + MGPIO->IRQ_LEVEL.reg[EXTI_Line] &= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] |= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] &= val_intr_fts; + MGPIO->INTR.reg[EXTI_Line] |= val_intr_en; + } + else if (EXTI_Trigger == EXTI_Trigger_Falling ) + { + MGPIO->IRQ_LEVEL.reg[EXTI_Line] &= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] &= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] |= val_intr_fts; + MGPIO->INTR.reg[EXTI_Line] |= val_intr_en; + } + else if (EXTI_Trigger == EXTI_Trigger_Rising_Falling ) + { + MGPIO->IRQ_LEVEL.reg[EXTI_Line] &= val_intr_lts; + MGPIO->IRQ_RISE.reg[EXTI_Line] |= val_intr_rts; + MGPIO->IRQ_FALL.reg[EXTI_Line] |= val_intr_fts; + MGPIO->INTR.reg[EXTI_Line] |= val_intr_en; + } +} + +//extern void VBAT_IRQHandler(void); +//extern void EXTI0_IRQHandler(void); +//extern void EXTI1_IRQHandler(void); +//extern void EXTI2_IRQHandler(void); +//extern void EXTI3_IRQHandler(void); +//extern void EXTI4_IRQHandler(void); + +//void GPIO_IRQHandler() +//{ +// uint8_t Exti_irq_index; + +// NVIC_DisableIRQ(GPIO_IRQn); + +// if (MSYSCTRL->CHGR_EVENT_IRQ.bit.VBAT_OV & MSYSCTRL->CHGR_EVENT_ICTRL.bit.VBAT_OV_IE) +// { +// //VBAT_IRQHandler(); +// } + +// Exti_irq_index = MGPIO->IRQ_NUM.reg; +// if(MGPIO->INTR.reg[Exti_irq_index/EXIT_Pin_Num] &(1 << (Exti_irq_index%EXIT_Pin_Num))) +// { +// switch (Exti_irq_index/EXIT_Pin_Num) +// { +// case EXTI_Line_0: +// EXTI0_IRQHandler(); +// break; +// case EXTI_Line_1: +// EXTI1_IRQHandler(); +// break; +// case EXTI_Line_2: +// EXTI2_IRQHandler(); +// break; +// case EXTI_Line_3: +// EXTI3_IRQHandler(); +// break; + +// case EXTI_Line_4: +// EXTI4_IRQHandler(); +// break; +// default: +// break; +// } +// EXTI_ClearITPendingBit((EXTI_LineTypeDef)(Exti_irq_index/EXIT_Pin_Num),(EXTI_PIN_TypeDef)(BIT(Exti_irq_index%EXIT_Pin_Num))); +// } +// NVIC_EnableIRQ(GPIO_IRQn); +//} + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.h b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.h new file mode 100644 index 0000000000..4785f6bfdb --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_exti.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_exit.h + * @brief source file for setting exit + * + * Change Logs: + * Date Author Version Notes + * 2021-12-24 yangzhengfeng V1.0.0 Modify the register module configuration + * 2021-01-03 wangjingfan V1.0.1 Compile error correction + */ + +#ifndef __YC_EXTI_H__ +#define __YC_EXTI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "yc3122.h" +#include "yc_gpio.h" + +/** + * @brief EXTI Trigger enumeration + */ +typedef enum +{ + EXTI_Trigger_Off = 0, + EXTI_Trigger_HighLev = 1, + EXTI_Trigger_LowLev = 2, + EXTI_Trigger_Rising = 3, + EXTI_Trigger_Falling = 4, + EXTI_Trigger_Rising_Falling = 5, + EXTI_Trigger_DEFAULT_VAL = 0xff +} EXTI_TriggerTypeDef; + +#define IS_TRIG_TYPEDEF(TRIGTYPE) ((TRIGTYPE) == EXTI_Trigger_Off || \ + (TRIGTYPE) == EXTI_Trigger_HighLev || \ + (TRIGTYPE) == EXTI_Trigger_LowLev || \ + (TRIGTYPE) == EXTI_Trigger_Rising || \ + (TRIGTYPE) == EXTI_Trigger_Falling || \ + (TRIGTYPE) == EXTI_Trigger_Rising_Falling) + +/** + * @brief EXTI Trigger source + */ +typedef enum +{ + EXTI_Line_0 = 0, + EXTI_Line_1 = 1, + EXTI_Line_2 = 2, + EXTI_Line_3 = 3, + EXTI_Line_4 = 4, + EXTI_Line_DEFAULT_VAL = 0xff +} EXTI_LineTypeDef; + +#define IS_EXTI_LINE(LINE) (((LINE) == EXTI_Line_0) || \ + ((LINE) == EXTI_Line_1) || \ + ((LINE) == EXTI_Line_2) || \ + ((LINE) == EXTI_Line_3) || \ + ((LINE) == EXTI_Line_4)) + +#define IS_EXTI_PIN_SOURCE(PIN) (((((PIN) & ~(uint16_t)0xFFFF)) == 0x00) && ((PIN) != (uint16_t)0x00)) + +#define EXTI_MODE_TypeDef GPIO_MODULE_TypeDef +#define EXTI_PIN_TypeDef GPIO_Pin_TypeDef +#define EXIT_Num GPIO_PORT_NUM +#define EXIT_Pin_Num GPIO_PIN_NUM + +void EXTI_ClearITPendingBit(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource); +void EXTI_DeInit(void); +uint16_t EXTI_GetITLineStatus(EXTI_LineTypeDef EXTI_Line); +uint16_t EXTI_GetITEXTI_PinSourceStatus(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource); +void EXTI_LineConfig(EXTI_LineTypeDef EXTI_Line, EXTI_PIN_TypeDef EXTI_PinSource, EXTI_TriggerTypeDef EXTI_Trigger); + +#ifdef __cplusplus +} +#endif + +#endif /* __YC_EXTI_H__ */ + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.c b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.c new file mode 100644 index 0000000000..0c54bf094c --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.c @@ -0,0 +1,298 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_gpio.c + * @brief source file for setting gpio + * + * Change Logs: + * Date Author Version Notes + * 2021-01-20 yangzhengfeng V1.0.2 Update library function + * 2021-07-29 xubo V1.0.3 Update library function + */ + +#include "yc_gpio.h" + +uint8_t const UnMapTb[256] = { + 0u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x00 to 0x0F */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x10 to 0x1F */ + 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x20 to 0x2F */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x30 to 0x3F */ + 6u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x40 to 0x4F */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x50 to 0x5F */ + 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x60 to 0x6F */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x70 to 0x7F */ + 7u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x80 to 0x8F */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0x90 to 0x9F */ + 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xA0 to 0xAF */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xB0 to 0xBF */ + 6u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xC0 to 0xCF */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xD0 to 0xDF */ + 5u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, /* 0xE0 to 0xEF */ + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u /* 0xF0 to 0xFF */ +}; + +uint8_t UnMap(uint16_t x) +{ + uint8_t lx = x; + uint8_t hx = x >> 8; + if(lx) + { + return UnMapTb[lx]; + } + else + { + return UnMapTb[hx] + 8; + } +} + +/** + * @method GPIO_Config + * @brief config gpio function(Only one can be configured at a time) + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15)(Only one can be configured at a time) + * @param function:gpio function + * @retval none + */ +void GPIO_Config(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_FUN_TYPEDEF function) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + _ASSERT(IS_GPIO_FUN(function)); + + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = function; +} + +/** + * @method GPIO_Init + * @brief gpio mode Init + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_InitStruct:GPIO_InitStruct + * @retval none + */ +void GPIO_Init(GPIO_TypeDef GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); + _ASSERT(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); + + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_InitStruct->GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<GPIO_Mode << 6; + } + } +} + +/** + * @method GPIO_PullUpCmd + * @brief gpio pull up + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_7) + * @param NewState: new state of the port pin Pull Up.(ENABLE or DISABLE) + * @retval none + */ +void GPIO_PullUpCmd(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + _ASSERT(IS_FUNCTIONAL_STATE(NewState)); + uint8_t i = 0; + + if (ENABLE == NewState) + { + for(i = 0; iCTRL.bit[GPIO_GetNum(GPIOx,(GPIO_Pin_TypeDef)(BIT0 << i))].MODE = GPIO_Mode_IPU; + } + } + else if (DISABLE == NewState) + { + for(i = 0; iCTRL.bit[GPIO_GetNum(GPIOx, (GPIO_Pin_TypeDef)(BIT0 << i))].MODE = GPIO_Mode_IN_FLOATING; + } + } +} + +/** + * @method GPIO_ReadInputData + * @brief Reads the GPIO input data for 2byte. + * @param GPIOx_IN: where x can be (GPIOA_IN...GPIOF_IN) to select the GPIO group. + * @retval GPIO input data. + */ +uint16_t GPIO_ReadInputData(GPIO_TypeDef GPIOx) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + + return MGPIO->IN_LEVEL.reg[GPIOx]; +} + +/** + * @method GPIO_ReadInputDataBit + * @brief Reads the GPIO input data(status) for bit. + * @param GPIOx_IN: where x can be (GPIOA_IN...GPIOF_IN) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval The input bit + */ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + + if (((MGPIO->IN_LEVEL.reg[GPIOx]) & GPIO_Pin) != (uint32_t)Bit_RESET) + { + return (uint8_t)Bit_SET; + } + return (uint8_t)Bit_RESET; +} + +/** + * @method GPIO_ReadOutputData + * @brief Reads the GPIO output data(status) for byte. + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @retval GPIO output data(status). + */ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef GPIOx) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + + return MGPIO->IN_LEVEL.reg[GPIOx]; +} + +/** + * @method GPIO_ReadOutputDataBit + * @brief Reads the GPIO output data(status) for bit. + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval The output status + */ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + + if (((MGPIO->IN_LEVEL.reg[GPIOx]) & GPIO_Pin) != (uint32_t)Bit_RESET) + { + return (uint8_t)Bit_SET; + } + return (uint8_t)Bit_RESET; +} + +/** + * @method GPIO_ResetBit + * @brief Reset the GPIO bit data(status) for bit. + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to reset.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_ResetBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = OUTPUT_LOW; +} +/** + * @method GPIO_ResetBits + * @brief Reset the GPIO bit data(status) for bit. + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to reset.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_ResetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = OUTPUT_HIGH; +} + +/** + * @method GPIO_SetBits + * @brief Set the GPIO bit data(status) for bit. + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_SetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + _ASSERT(IS_GPIO_PORT(GPIOx)); + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<OD_CTRL.reg) |= (GPIO_OD_Set << GPIOx_OD); +} +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.h b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.h new file mode 100644 index 0000000000..0c543f393d --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_gpio.h @@ -0,0 +1,243 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_gpio.h + * @brief source file for setting gpio + * + * Change Logs: + * Date Author Version Notes + * 2020-12-23 yangzhengfeng V1.1.0 Modify the register module configuration + */ + +#ifndef __YC_GPIO_H__ +#define __YC_GPIO_H__ + +#include "yc3122.h" +#include "system.h" + +#ifdef __cplusplus +extern "C" { +#endif + +uint8_t UnMap(uint16_t x); +#define GPIO_CONFIG(x) *((volatile uint8_t*)(MGPIO_BASE + x)) +#define GPIO_GetNum(port, pin) ((port * GPIO_PIN_NUM) + UnMap(pin)) +#define GPIO_OD_TypeDef uint8_t +#define GPIO_FUN_TYPEDEF uint8_t +#define GPIO_PORT_NUM 5 +#define GPIO_PIN_NUM 16 + +#define GPIO_OD_PORTA_10 ((GPIO_OD_TypeDef)0x00) /*!< Pin 10 selected */ +#define GPIO_OD_PORTB_06 ((GPIO_OD_TypeDef)0x01) /*!< Pin 20 selected */ +#define GPIO_OD_PORTC_01 ((GPIO_OD_TypeDef)0x02) /*!< Pin 33 selected */ +#define GPIO_OD_PORTC_08 ((GPIO_OD_TypeDef)0x03) /*!< Pin 40 selected */ +#define GPIO_OD_PORTD_00 ((GPIO_OD_TypeDef)0x04) /*!< Pin 48 selected */ +#define GPIO_OD_PORTD_12 ((GPIO_OD_TypeDef)0x05) /*!< Pin 60 selected */ +#define GPIO_OD_PORTE_06 ((GPIO_OD_TypeDef)0x06) /*!< Pin 76 selected */ +#define GPIO_OD_PORTE_12 ((GPIO_OD_TypeDef)0x07) /*!< Pin 70 selected */ + +#define IS_GPIO_OD(port_od) ((port_od == GPIO_OD_PORTA_10) || \ + (port_od == GPIO_OD_PORTB_06) || \ + (port_od == GPIO_OD_PORTC_01) || \ + (port_od == GPIO_OD_PORTC_08) || \ + (port_od == GPIO_OD_PORTD_00) || \ + (port_od == GPIO_OD_PORTD_12) || \ + (port_od == GPIO_OD_PORTE_06) || \ + (port_od == GPIO_OD_PORTE_12)) +typedef enum +{ + GPIO_Pin_0 = BIT0, + GPIO_Pin_1 = BIT1, + GPIO_Pin_2 = BIT2, + GPIO_Pin_3 = BIT3, + GPIO_Pin_4 = BIT4, + GPIO_Pin_5 = BIT5, + GPIO_Pin_6 = BIT6, + GPIO_Pin_7 = BIT7, + GPIO_Pin_8 = BIT8, + GPIO_Pin_9 = BIT9, + GPIO_Pin_10 = BIT10, + GPIO_Pin_11 = BIT11, + GPIO_Pin_12 = BIT12, + GPIO_Pin_13 = BIT13, + GPIO_Pin_14 = BIT14, + GPIO_Pin_15 = BIT15 +} GPIO_Pin_TypeDef; + +#define IS_GPIO_PIN(PIN) (((((PIN) & ~(uint16_t)0xFFFF)) == 0x00) && ((PIN) != (uint16_t)0x00)) +#define IS_GPIO_PIN_SINGLE(PIN) ((PIN == GPIO_Pin_0) || \ + (PIN == GPIO_Pin_1) || \ + (PIN == GPIO_Pin_2) || \ + (PIN == GPIO_Pin_3) || \ + (PIN == GPIO_Pin_4) || \ + (PIN == GPIO_Pin_5) || \ + (PIN == GPIO_Pin_6) || \ + (PIN == GPIO_Pin_7) || \ + (PIN == GPIO_Pin_8) || \ + (PIN == GPIO_Pin_9) || \ + (PIN == GPIO_Pin_10) || \ + (PIN == GPIO_Pin_11) || \ + (PIN == GPIO_Pin_12) || \ + (PIN == GPIO_Pin_13) || \ + (PIN == GPIO_Pin_14) || \ + (PIN == GPIO_Pin_15)) + +typedef enum +{ + GPIOA = 0, + GPIOB, + GPIOC, + GPIOD, + GPIOE +} GPIO_TypeDef; + +#define IS_GPIO_PORT(port) (port <= GPIOE) + +/******************* Bit definition for gpio funaction **********************/ +#define INPUT ((GPIO_FUN_TYPEDEF) 0) +#define QSPI_NCS ((GPIO_FUN_TYPEDEF) 2) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define QSPI_SCK ((GPIO_FUN_TYPEDEF) 3) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define QSPI_IO0 ((GPIO_FUN_TYPEDEF) 4) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define QSPI_IO1 ((GPIO_FUN_TYPEDEF) 5) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define QSPI_IO2 ((GPIO_FUN_TYPEDEF) 6) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define QSPI_IO3 ((GPIO_FUN_TYPEDEF) 7) /*Mapping the scope GPIO[32:0] and GPIO[76:56]*/ +#define UART0_TXD ((GPIO_FUN_TYPEDEF) 8) +#define UART0_RXD ((GPIO_FUN_TYPEDEF) 9) +#define UART0_RTS ((GPIO_FUN_TYPEDEF)10) +#define UART0_CTS ((GPIO_FUN_TYPEDEF)11) +#define UART1_TXD ((GPIO_FUN_TYPEDEF)12) /*Mapping the scope GPIO[47:0]*/ +#define UART1_RXD ((GPIO_FUN_TYPEDEF)13) /*Mapping the scope GPIO[47:0]*/ +#define UART1_RTS ((GPIO_FUN_TYPEDEF)14) /*Mapping the scope GPIO[47:0]*/ +#define UART1_CTS ((GPIO_FUN_TYPEDEF)15) /*Mapping the scope GPIO[47:0]*/ +#define UART2_TXD ((GPIO_FUN_TYPEDEF)36) /*Mapping the scope GPIO[79:40]*/ +#define UART2_RXD ((GPIO_FUN_TYPEDEF)37) /*Mapping the scope GPIO[79:40]*/ +#define UART2_RTS ((GPIO_FUN_TYPEDEF)38) /*Mapping the scope GPIO[79:40]*/ +#define UART2_CTS ((GPIO_FUN_TYPEDEF)39) /*Mapping the scope GPIO[79:40]*/ +#define UART3_TXD ((GPIO_FUN_TYPEDEF)53) /*Each group of 4 GPIOs is mapped to CTS/TXD/RXD/RTS,mapping the scope GPIO[60:20]*/ +#define UART3_RXD ((GPIO_FUN_TYPEDEF)53) /*Each group of 4 GPIOs is mapped to CTS/TXD/RXD/RTS,mapping the scope GPIO[60:20]*/ +#define UART3_RTS ((GPIO_FUN_TYPEDEF)53) /*Each group of 4 GPIOs is mapped to CTS/TXD/RXD/RTS,mapping the scope GPIO[60:20]*/ +#define UART3_CTS ((GPIO_FUN_TYPEDEF)53) /*Each group of 4 GPIOs is mapped to CTS/TXD/RXD/RTS,mapping the scope GPIO[60:20]*/ +#define PWM_OUT ((GPIO_FUN_TYPEDEF)16) /*Each group of 8 GPIOs is mapped to PWM0~7*/ +#define PWM_OUT8 ((GPIO_FUN_TYPEDEF)17) /*Mapping the scope GPIO[79:48]*/ +#define PWM_OUT01 ((GPIO_FUN_TYPEDEF)40) /*GPIO_INDEX%8 is not a 0 and 1 pin, each two is a group, respectively mapped to PWM0/PWM1*/ +#define PWM_OUT23 ((GPIO_FUN_TYPEDEF)41) /*GPIO_INDEX%8 is not a 2 and 3 pin, each two is a group, respectively mapped to PWM2/PWM3*/ +#define DCMI_PCLK ((GPIO_FUN_TYPEDEF)18) +#define DCMI_VSYNC ((GPIO_FUN_TYPEDEF)19) +#define DCMI_HSYNC ((GPIO_FUN_TYPEDEF)20) +#define DCMI_D0 ((GPIO_FUN_TYPEDEF)21) +#define DCMI_D1 ((GPIO_FUN_TYPEDEF)22) +#define DCMI_D0_D13 ((GPIO_FUN_TYPEDEF)23) /*GPIO[7] to GPIO[76] is a group of 14, which are mapped to D13 to D0 respectively*/ +#define SPID_SDIO ((GPIO_FUN_TYPEDEF)27) /*Every 3 GPIOs are a group, which are respectively mapped to SPI0_SDIO/SPI1_SDIO/SPI2_SDIO*/ +#define SPID0_NCS ((GPIO_FUN_TYPEDEF)24) /*Mapping the scope GPIO[79:0]*/ +#define SPID0_SCK ((GPIO_FUN_TYPEDEF)25) /*Mapping the scope GPIO[79:0]*/ +#define SPID0_MOSI ((GPIO_FUN_TYPEDEF)26) /*Mapping the scope GPIO[79:0]*/ +#define SPID0_MISO ((GPIO_FUN_TYPEDEF)28) /*Mapping the scope GPIO[79:0]*/ +#define SPID1_NCS ((GPIO_FUN_TYPEDEF)48) /*Mapping the scope GPIO[79:0]*/ +#define SPID1_SCK ((GPIO_FUN_TYPEDEF)49) /*Mapping the scope GPIO[79:0]*/ +#define SPID1_MOSI ((GPIO_FUN_TYPEDEF)50) /*Mapping the scope GPIO[79:0]*/ +#define SPID1_MISO ((GPIO_FUN_TYPEDEF)52) /*Mapping the scope GPIO[79:0]*/ +#define SPID_SLV_IN ((GPIO_FUN_TYPEDEF)29) /*Each of 6 GPIOs is a group, which are mapped to MSPI0~2 NCS_IN/SCK_IN respectively*/ +#define XTAL32K ((GPIO_FUN_TYPEDEF)30) /*Mapping the scope GPIO[15:0] and [74:48]*/ +#define HSPI_NCS ((GPIO_FUN_TYPEDEF)31) /*Map to all pins*/ +#define HSPI_SCK ((GPIO_FUN_TYPEDEF)32) /*Map to all pins*/ +#define HSPI_MOSI ((GPIO_FUN_TYPEDEF)33) /*Map to all pins*/ +#define HSPI_MISO ((GPIO_FUN_TYPEDEF)34) /*Map to all pins*/ +#define DAC_OUT ((GPIO_FUN_TYPEDEF)35) /*Each group of 2 GPIOs is mapped to Out P/Out N respectively*/ +#define SDIO ((GPIO_FUN_TYPEDEF)42) /*Each of 6 GPIOs is a group mapped to SDIO_CLK/SDIO_CMD/DAT0/DAT1/DAT2/DAT3*/ +#define PSRAM_NCS ((GPIO_FUN_TYPEDEF)43) +#define PSRAM_SCK ((GPIO_FUN_TYPEDEF)44) +#define PSRAM_DATA_0 ((GPIO_FUN_TYPEDEF)45) /*Each group of 4 GPIOs is mapped to D0/D1/D2/D3 respectively*/ +#define PSRAM_DATA_1 ((GPIO_FUN_TYPEDEF)45) /*Each group of 4 GPIOs is mapped to D0/D1/D2/D3 respectively*/ +#define PSRAM_DATA_2 ((GPIO_FUN_TYPEDEF)45) /*Each group of 4 GPIOs is mapped to D0/D1/D2/D3 respectively*/ +#define PSRAM_DATA_3 ((GPIO_FUN_TYPEDEF)45) /*Each group of 4 GPIOs is mapped to D0/D1/D2/D3 respectively*/ +#define JTAG_RV_TCK ((GPIO_FUN_TYPEDEF)46) /*Each group of 4 GPIOs is mapped to TCK/TMS/TDI/TDO*/ +#define JTAG_RV_TMS ((GPIO_FUN_TYPEDEF)46) /*Each group of 4 GPIOs is mapped to TCK/TMS/TDI/TDO*/ +#define JTAG_RV_TDI ((GPIO_FUN_TYPEDEF)46) /*Each group of 4 GPIOs is mapped to TCK/TMS/TDI/TDO*/ +#define JTAG_RV_TDO ((GPIO_FUN_TYPEDEF)46) /*Each group of 4 GPIOs is mapped to TCK/TMS/TDI/TDO*/ +#define I2C0_SCL ((GPIO_FUN_TYPEDEF)58) +#define I2C0_SDA ((GPIO_FUN_TYPEDEF)59) +#define I2C1_SCL ((GPIO_FUN_TYPEDEF)47) +#define I2C1_SDA ((GPIO_FUN_TYPEDEF)47) +#define SCI7816_IO ((GPIO_FUN_TYPEDEF)56) +#define SCI7816_IO2 ((GPIO_FUN_TYPEDEF)51) +#define NFC_CLK_OUT ((GPIO_FUN_TYPEDEF)55) +#define ICE ((GPIO_FUN_TYPEDEF)57) +#define JTAG_SWCLK ((GPIO_FUN_TYPEDEF)60) /*The first 16 pins are mapped to SWCLK, and the latter pins are mapped to SWCLK/SWDIO for a group of 2 GPIOs*/ +#define JTAG_SWDIO ((GPIO_FUN_TYPEDEF)61) /*The first 16 pins are mapped to SWDIO*/ +#define OUTPUT_LOW ((GPIO_FUN_TYPEDEF)62) +#define OUTPUT_HIGH ((GPIO_FUN_TYPEDEF)63) +#define PULL_PU ((GPIO_FUN_TYPEDEF)64) +#define PULL_PD ((GPIO_FUN_TYPEDEF)128) +#define ANALOG ((GPIO_FUN_TYPEDEF)192) +#define IS_GPIO_FUN(fun) (fun <= 0xff) + +#define IS_GPIO_MODE(mode) (((mode) == GPIO_Mode_IN_FLOATING) || \ + ((mode) == GPIO_Mode_IPU) || \ + ((mode) == GPIO_Mode_IPD) || \ + ((mode) == GPIO_Mode_AIN) || \ + ((mode) == GPIO_Mode_Out_PP)) + +/** + * @brief Bit_SET and Bit_RESET enumeration + */ +typedef enum +{ + Bit_RESET = 0, + Bit_SET = 1 +} BitAction; + +/** + * @brief Configuration Mode enumeration + */ +typedef enum +{ + GPIO_Mode_IN_FLOATING = 0x00, + GPIO_Mode_IPU = 0x01, + GPIO_Mode_IPD = 0x02, + GPIO_Mode_AIN = 0x03, + GPIO_Mode_Out_PP = 0x3E /*!< analog signal mode */ +} GPIO_ModeTypeDef; + +/** + * @brief Configuration GPIO OD enumeration + */ +typedef enum +{ + GPIO_Mode_OD_RESET = 0x0, + GPIO_Mode_OD_SET = 0x1 +} GPIO_ODTypeDef; + +#define IS_GPIO_MODE_OUT(mode) (((mode) == GPIO_Mode_OD_RESET) || \ + ((mode) == GPIO_Mode_OD_SET)) + +/** + * @brief GPIO Init structure definition + */ +typedef struct +{ + GPIO_Pin_TypeDef GPIO_Pin; + GPIO_ModeTypeDef GPIO_Mode; +} GPIO_InitTypeDef; + +uint32_t GPIO_GetGPIONum(GPIO_TypeDef GPIOx); +void GPIO_Config(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_FUN_TYPEDEF function); +void GPIO_Init(GPIO_TypeDef GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); +void GPIO_PullUpCmd(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState); +uint16_t GPIO_ReadInputData(GPIO_TypeDef GPIOx); +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +uint16_t GPIO_ReadOutputData(GPIO_TypeDef GPIOx); +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +void GPIO_ResetBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +void GPIO_ResetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); +void GPIO_SetBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +void GPIO_SetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin); +void GPIO_Write(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +void GPIO_WriteBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction BitVal); +void GPIO_ODSet(uint8_t GPIOx_OD, GPIO_ODTypeDef GPIO_OD_Set); + +#ifdef __cplusplus +} +#endif + +#endif /* __YC_GPIO_H__ */ + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.h b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.h new file mode 100644 index 0000000000..56b5eb9d0e --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.h @@ -0,0 +1,194 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_qspi.h + * @brief This file contains all the functions prototypes for the IFlash library. + * + * Change Logs: + * Date Author Version Notes + * 2021-08-14 wushengyan V1.0.0 the first version + */ + +#ifndef __YC_QSPI_H__ +#define __YC_QSPI_H__ +#include "yc3122.h" + +#define BOOT_UART_DOWNLOAD_FLAG 0x5a5aa5a5 +#define BOOT_USB_DOWNLOAD_FLAG 0xaa5555aa +#define BOOT_AUTO_SELECT_FLAG 0xffffffff + +#define ENC_BULK_BUF_SIZE 0x9000 + +typedef enum { + YC_QFLASH_SIZE_UNKNOW = 0, + YC_QFLASH_SIZE_512KB = 1, + YC_QFLASH_SIZE_1MB = 2, + YC_QFLASH_SIZE_4MB = 3, +} yc_qspi_flash_size_enum; + +typedef struct +{ + uint16_t is_end; + uint16_t enc_index; + uint8_t enc_buf[ENC_BULK_BUF_SIZE]; +} ENC_BulkTypeDef; + + +/** + * @method qspi_flash_pageerase + * @brief page erase (256byte) + * @param flash_addr + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_pageerase(uint32_t flash_addr); +/** + * @method qspi_flash_sectorerase + * @brief sector erase (4K) + * @param flash_addr:flash addr (4k Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_sectorerase(uint32_t flash_addr); + +/** + * @method qspi_flash_blockerase32k + * @brief block erase (32K) + * @param flash_addr:flash addr (32k Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_blockerase32k(uint32_t flash_addr); + +/** + * @method qspi_flash_blockerase64k + * @brief block erase (64K) + * @param flash_addr:flash addr (64k Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_blockerase64k(uint32_t flash_addr); + +/** + * @method qspi_flash_write + * @brief write flash + * @param flash_addr:flash addr (when flash_addr%256!=0,256-(flash_addr%256)+len must less than 256) + * @param buf + * @param len + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_write(uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method qspi_flash_read + * @brief read flash + * @param flash_addr:flash addr + * @param buf + * @param len + * @retval ERROR,SUCCESS + */ +uint8_t qspi_flash_read(uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method flash_blank_check + * @brief check logical addr data is blank + * @param startaddr:cpu addr + * @param len + * @retval TRUE: blank + * FALSE: not blank + */ +Boolean flash_blank_check(uint32_t startaddr, uint32_t len); + +/** + * @method enc_write_flash + * @brief write data to flash with enc + * @param flash_addr:cpu addr (must 32 Bytes align) + * @param buf + * @param len:(must 32 Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t enc_write_flash(uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method enc_read_flash + * @brief read flash data with enc + * @param flash_addr:cpu addr + * @param buf + * @param len + * @retval ERROR,SUCCESS + */ +uint8_t enc_read_flash(uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method enc_read_flash_fast + * @brief enc read flash fast(You must sure that the read area is written by enc) + * @param flash_addr:cpu addr + * @param buf + * @param len + * @return SUCCESS or ERROR + */ +uint8_t enc_read_flash_fast(uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method enc_erase_flash_32byte + * @brief erase 32 Bytes + * @param flash_addr : cpu addr (must 32 Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t enc_erase_flash_32byte(uint32_t flash_addr); + +/** + * @method enc_erase_flash_32k + * @brief enc erase 32K Bytes + * @param flash_addr : cpu addr (must 32K Bytes align) + * @retval ERROR,SUCCESS + */ +uint8_t enc_erase_flash_32k(uint32_t flash_addr); + +/** + * @brief enc erase flash app area + * @param addr:align at 32k for CPU addr + * @param len:erase len + * @return ERROR,SUCCESS + */ +uint8_t enc_earse_flash_app_area(uint32_t addr,uint32_t len); + +/** + * @brief enc write download flag + * @param addr:BOOT_UART_DOWNLOAD_FLAG,BOOT_USB_DOWNLOAD_FLAG or BOOT_AUTO_SELECT_FLAG + * @return ERROR,SUCCESS + */ +uint8_t enc_write_download_flag(uint32_t flag); + +/** + * @method enc_write_flash_bulk + * @brief write bulk data to flash with enc +* @param EncBulkStruct:enc buf struct + * @param flash_addr:cpu addr(start addr must 32k Bytes align) + * @param buf + * @param len: Integer multiple of 32 bytes + * @retval ERROR,SUCCESS + */ +uint8_t enc_write_flash_bulk(ENC_BulkTypeDef *EncBulkStruct,uint32_t flash_addr, uint8_t *buf, uint32_t len); + +/** + * @method prefetch + * @brief fetch code to cache + * @param start_addr: code start addr + * @param end_addr : code end addr + * @retval NULL + */ +void prefetch(void *start_addr, void *end_addr); + +/** + * @method read_flash_size + * @brief read the chip flash size + * @param NULL + * @retval yc_qspi_flash_size_enum + */ +yc_qspi_flash_size_enum read_flash_size(void); + +/** + * @method qspi_GetVersion + * @brief get qspi lib version + * @param NULL + * @retval version + */ +uint32_t qspi_GetVersion(void); + +#endif diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.lib b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_qspi.lib new file mode 100644 index 0000000000000000000000000000000000000000..6d5daf6e99b1ec4efc343f433c230ce0f12607ca GIT binary patch literal 130222 zcmeFa349yH`8U3+m1H}oBio6c!;z8zwh7=Xi354l$g*UM_z;rpI5e$r9EX@3c5Mfe zmLoubq+AJSC`X|j1xj0P%GGj}qvc3|maFA%DQzjVg#v|^|Mz)jc6WBAaP-fw<^A=Q zKeBe7=b2}odFGj!XU+{R=o#u=wQ$saLFcDh35sX+e=s?u{ZOz;lch)Z>DBNZ+(6Bytx2plF_c3x!R|oO0{Tx>v}VNJwwBNnU!mL zhF4{J1_v`eLw!90G1Oxr>S~v79O=seUd=E>Ss_@sf|->)!y^nkVyJ(lFSBCch;?fQ z1o5E?oRfElGt1YnS*;1lmapkqw>s0is;_soHaOI`vTvk!mBzVm?i=aq8yfB(SSP|J z{Xp;PKFUE|?dsf!x%CdjV9%j_96_a~jH%(_zTT06p)4}aoMvkwGu;36K24U-z5~*P zYUVc7*Uqn-Q#(HxRBfiFx_a*1xxrvf?ff|n^<-X$j5;RT8q;+h1|&YZR-xG;z<$ml zUp=EMw0-rx^+mT0Hs6KsdpBv7`|R|10;3Kp)jS0=?iw2~^t}?1FB$ih6}RM<-ZeTA zxxcKz@J9R*-;2T6NALdgBfX+{*Q;fRc;DS+Lq_kK9n*t%8GDr8)cE!@c^0LwCHDVYSzxyW)`+hj_Frb$F6Ml#m2N8 zQoX5J-^aUCo2~6yese|a$UF5N+HLx_ycRunZ4FDYgZ^u?{|x+*cP>q9+IfeH{14u= z$Wsu~#uXSXk%G9sXH#iGaIT?2Hm6*JcV1R@4a+rnr&g%x@7|Ob+kCAa)V96nziV7D zG%=>l8aw%>M(vrB7^L0g**0|Zq?S$1!51eTxUsAuR=8;5f%^7s&00m#PT!7?W@u%V zte+KS8h9K&MgMki--0KCd*r{k|1#fsi>8k1Tru^^#`m81^J{Zr+P=Tq<>g#@cA&VB z2W>~*wQq4gUi|1I{WmK$t?;JNlawX(JDMBp9$Ai->C;bcrB=F`g=E(#Ky$@ zlZOoS=X_Ro@cb+Sm=q$V+_h;E+h<18@*i%>f0+JXI-0T=Ke_g z%H~71+*P*e`a?E_wrG{cEu1ysy}}DTVOfIUA)7oe3Tqf6tzp!TlV3CS z^-Q;>4c;^^=A}|OVd&;O98rXC?h^}Gh%SvD!lXZrDSW_@artN9y1Ocy7|~3Y+c6bWn2;4=crg2taIpQ z)jprI;yTkh?-SxtUK?)GX07797R9x*SW?d0s+hLn1X%1>E5`1e_~NSAq78>s1a_^8 zZQ4*&QLwWZ--#8YcI7iBSn-#g-WT;*o)j`+WP1ow2wg zriZ>{%&IOhE^OM;s6VZP&NIt1d;HE>!TYZd##WTSdc9V$&rUs5y7;hIfzc4#0V|)f z%Xkqjgt2JKA72Z^8)A*~w*Xp*()}oOSj_X{-le6-N`1j}ZJ@zq1FRqMA|;O)3guY{OBXn7v+5?ips!O)4ck=`z~A7+P{3L zXQ;n#c-gYy6|0vmGy92NEi$lna9~~Ex{>{Z;bdEog8ggyhJthUt)3fPKe(c2q%Sx( zSh0M4|C$xSd2^~OgXw{RHTws9hStI<2!6SKMctgf-mhp)`!73UU}!Zs*VWY4rdF&* zlFO*KTsAVae%=k?FTksykC*>1!+%3-!hdv9{;~LPc2@2zM%q&G z)Usvqb-ioWujpHbh`nov`-kCYtnKaHcNOdxA0L`NFx+YAlRX|kxcx8D8GJ1I{7>ra z1xshuNa-Vd3|8&lnttTCz*sF$%hU5bc}BiB-$8;WR8s)_qM3&bU*GII!F!@{5=o(bCL0NY-u!IFL%3*z&8x9! z;?RO`y}HRfy@O`6&D z#nj5Dt1p31RbOs*)|Xbd_B1W=Mb#fU0`yt9)1xm_^(W>BZM~UW?w80!=*j+T$F{#8Y%1jOfyuhYjo`dU?| zJT?2DQ|Y5ll@4U9R9o~#wNrBF>9g=2kA8H4Ibm*3uH5L4tH=O<@L{6cXrSkQ@l3_!(6VQHVvN&? zT?~@g+gvSa>=wjVe^6Dt7}2G_sCqZM)`h?D=znqRT`Wg_=1$|wP=c-e7KE~t|LOYS zC!L+f+p1ng>#^aBs#ltzppVz<>t8pbEqu?TAL}U`>Kk0s)7zIhB7?c<9xOSSBPo-- zA4b0>V|N_SfCUz*&3=H$V*sHw!1Aj?cRzseW7aC5D*-aT=MjUikEUx&hsaS1OxKO= zzsnpv(!aKESfqb8#a-FIW(^CKS+{vLc#COpqYuYxV>DL06Xe%hlpEX}p-BWu? zpM`(&=y!X#edZ--xoR&L=WVk#>9g9DuYie5`yqhzrOtB9aBr`u9=diGqi6dXhnM*! za9QdY3~RABoPGO49(Ug!{G#fc{2BTz{EkO|J(s@KF_1}|rR+X%$f;}?q^u|h53bs% zsF}2AHq}WI;0rvjLX&y)S$L~Q-(m=x%(aumwn{Tbzug*8KV~6M%m`#-hl;LzCE~l3MIDoF zZ1V7om7b?9Wu{GX%S{YX8>zv3M>DoxdyH|VO-GJN7TGi%&H+iO{pgFTN1C*ykJ%^P zV(2fc>XaiJ+C^mR(u~v}UDw+PR0>O?y_nP61I+62oyF=CQQ1;$Cu}0nwzWrTi-N{hw6)?97Xx0w8UXsMQZ2+vzZ38~t zDEI4LkIyh3*Ngl`Ufox0Tz9k|k3PR~4E`7Ui+w)-WIUDNtCx6mlJjD4FtmTGoU^5z z_gQlO1agv;rjW&okpCGO50En6WXbsG$IJL1DDR(XQphVTA%FcbLi*V*c>wY6E$?4J zP8cMa=2>`N;2PV$^eb_J`0EkYNBi1wT~%eI-7<7%c$X1bH}yR*V0iqOEeaM^^LWGk)x) zVm5g`{qNVuIl5(M&uaeZQXf~^`tVcE3;YK_9Y>N5M7YG~GmhTFS5V>`>)*@gn*^ni zmJ0a4&p#EWcKg=mQX&28rGoHt*Qe;P}O)_%iuU!i{@GEwSBSsI5!%pzlytY>?R zTIM&pr3sKJlps%(yCUCMW3+!Bo@P^x1CV~o$bx(mj3K5dgTd^9aJf+klOJOo#+GD& z1b@Pa%7hV7kwYi{f%fk&c6oDKf-bMf@Iz?7aWs^H{KE7Rq|)Q=j@p#BJ_lRZjblB2 z9cEKdM4E&0VN6gdbc2+sG}c2o#%MyVFY;9ily4uDwz0tQiVlou)+A}^rK;&-fnedNHK|!xc3g zc^1CfzqOCQ8w!FHuuX3Fzkdv*L;3iPXEd&OqKr@jAuIlB@fDShGe|ipMxMrzUPnM6 za_T4Ipd>X*75O{sb1Bo;MVaOm6_dME?4RP>&p!$2A4%DmgaCf2M2E_t=0Zq8n%~Q( z17&O=8WJ`SwM8_nkn66`MXoIdY|S$XDO026F$ySY_;R{2lY$wNiOifH{j-7Ei_jB& z25D$ds>i+p64rnjlG)?~w6_e?uUBMZFUmw75qgjdFh%!(JRJGCfDx4Q&I}4HbOQOGRoN4 zNKa#s0fJ@|4;Pq z>6&@{d?jIm!8{oDtA)hSguMF{PT&9F;uk#w1DLE zPea)3*-##^CCe9hmCO6zs_$RGaqxwpV$oKdOZnyD%TrJmHx&3OrXrx+(bs1LKtq4N zQAU7&ryA>Q4FX1%9g+>@SbtS<2{AD8EW7@Ee4cOmAi7oGp*r%QG@o{qcFsBH&?Aku zJ=#(E_~B0>{?lTpu8{!zq4Bf;nR9jw=G8u%ieN6@#SF4}Q;Yz23gimD3@K+ z#2%!jLgEkEHPP$Z5&;nZ1@9#N?8#V1UZ_@~#ONo;j}B>N<+3?Da!T?*0G5jw;5kUY z$BE}^`rRy^i}AysW%z#>zDnf_B6u{u9&LL!e)vNbonVUQNudJd5K&|xNk0PX5K&+` zdoqa?AhbThniKRRB0Drk`TIQVR8)bal`0-Y!UxgMZmUsN*_*m1<>0xPeo4o$-yK0! z*`)L{Oay-ULmmntp!se1A-qxuWK2U&Pz8cb4C-pd4@J^7OS?e}WEBV1{&h^%xy8a- z)<)$gcsP_C;0RfHwdy2sM`kT6uSa;Uh?B$*p_OdRwy>SVk|-1`LQ>tkPmlN`y+Wd; z4{4zaU$Cjg51|!~MCPjH1R_eEWy6E`c=4k|Bp}(B(gzMQ$j<2sgjeE=Sfo`#D-0-A zp=?qCf2f-7i7)Ci{Rpg8U_?R`uJ(BxgA#-_KTf+R!J&{b^m`z_D4Cu7Kt@3b`la}c zz%PGV@ShNnxE())SA<7MRspViF~(Z?AS}sX*?^w`M-|iWLVpYHcM-l|NXsjfpu#%< z%>MWy#v#OMgM20tB&S30XniO%=sxLZ5kD?5(?BL6Wk_($(z9ZN-JnvfpQNLVDfu+*0QOCsC`Jxb2NNK~N5|4vQ#c*XWP&r= zdNu}Y<^^l3YwKnpUM7={w=troX8)Ro{p%Y9G?i|OfV_rDIM5YMrs5s#1e`yAesxW& zjcVygrK3$w@_4EvQ&T;+9@iWovFf?i^O!!`)NIkwv&|J(B3Klu_`%UkdTD|LTfc6& z|Il@PD}uC>g#@N(iFC3l9*dbYCaSr;lccU^Iu5Yt@%GkuJMj|PVMJTJy(0;bNR&Z| za5~b`8tsa<0$$BLZ1HB)?>jG8fwY5%_VxzX4y@>_6q<^(gp)OMO-U?ihgS^@33-X2 zt~QInl({n%O=eodjYu_-jK<>KNSxEAc$v=jRJ^%eQSOr5;E&bVZnPy>xz%h7z9inB z&Jx>31KSqvHVM`YtUEMF|5)};C(_c2lZqA(2UcdF30Y(kz*M3TC1h}9NRr^FZ6sov zO>hnw)*Mk*>2R_+n$AQLota2SG9B&Cv{lOzm#7#}sg78>E0*{qL|Z(P>}ZWQO1jRj zI2*sThv1yr2IO;Tgih>cHkd@IXl7{ysalo>N$F^?FgqOdw4W>zDOxxgY01n@WlUlf zOe`E(Wa4y7XIo>ij@9j;o?D-TI!tluYNY^@K9TH*#apB9L}Sr#x-%Kgw1it@OFEKG z&PXO!q%X22`I)FD2$mBO?M_Ew&}c=H(dIZBjUZ4kse13@j&_M6!z|i;-39 z*DhC|E!B;nR+)9WBY}1-jsi#}!jY&X7eF*6PAUMnx+u_0sx92wnhB>+8Pkr~V98BF zu$DDV<`YXWLqpTi6z_#5mikKcPUtQ!!EerEOGL0YzJhd7HmUQ}29eX6w;-qen=a1c zkOGm-_&73JsV5?BmPOShnaTYY%2h2ym(9(+!I-E*_zKZz3nYm~RQ9$2qG3-+5OwDy z68k%elD1z9%0Y!P$F4ad-qRwc{@+a7NxYf}6@8mULsI6vLWju7$rMtwD2#LM^&x7z z-0uMOm4LVuB`(Av(i!*)#%4jKJ@st@`K;HVdvmbDLR(E@n)I8m9;vIY)C^U575QC`0uS zElGx2=ecN$izOrz$)q}CqMKT?M$;!|GKny1a&5(i*&8c^8-g=u1~+Q@BncK!g(kSM zQqxNmYi1?`PXUZGP0>heDyVt($Ye-0?I}&4Z9YP2!=P!%z?+5)s7*u&8j`khRVE44WDi!qykh$ zZ?mzM5`^v}6}k0&CTq;nfvNVh6tGkIXDgUoMR1OSw`BOFf;gY$j#=fP+8@g40t+q6 z!-c=l!sjlPi!A)7ER;*E2+|Z4WB!hXlZsIb;8F{jqjWB_kd|UTzHq)PbSd@XHufuR ztdzu27p}6=xytEk8*NGRNyT(MWdMFVHx_sl+Sc@2EjVP9@Nl=L-^FQg1R#jJkVMn( zrx>WDve~hkTBT_++nqIQU;z(V^kAek%{h#k=^y5lIRR&cTrI(Rj`9oL9Fb5{sO0XK zHo}>`XLSsNGU0Rw{PJ8a>vIk~;;NSN5|HrusG(96<9SUN10cwtd46XGNSS{!1CS1m z_nT%A3}n0bSDgn(IokNQCB`Mg2c*>o(P^RM()14r0Au2Aj3NIZ2ujU{{F5Ls8QIm@ z0W{Vg%8JF1`#f+xmcce#6Mh`SZRRHYc!t|aSY}Bgp6EdmRIu)@mOFVa$&)z#ZfUr< zJ=f#HB9>kA+<-^3{}me>Y5KyDGgYqrhq%^YcwprbxZ`lyV%&j*G1oFUEcA^;mNoXT zTZRpa{qm+FO%tAtyrW3$7b?WYPr3KA@Ut+pSpBP4JZ0U`fK2kotNZ0_M(?VgAq}gp zVmvK3MdQ{VdxY%O^R02Sq|UPdW;7c@^9kO3J8Uyb0M(Eg(E?{^dP9&xFc1VU(e(Ko zgk2zbwWjaSL6`%A*J=6z!Nhtq?vFKnp$Lk|k7@dsL|DXrNz)gJu!#O=O%F4-%$h!2 zD`}?RtiUWOS`?rqOI!h35*;X#P89P*{C22yWMfYE_pio7p4H7H? z>#|{%m`iM!C1tlv#Nr3#d|81Bh5#;8fR>0~QGk|&U*%*l4I)dbPY_7}SgmA&wLKeT z*&P<*vXcOm#_AATAdMf6#rHUTkH?qB1!(4ZGp{)g$h5%Ig-aZ1bHUrf?vZYy`T7(Bwb6q6aJB-@Acmmcetuf?&Un;xFq*7ek z#$&k%mmEq4Z6v-lrPL-SKjr|IYJ+xh^&DCOYLID86oCG9Yx>vqp|aBuD4a(BDp5GX zGt%FyP%N}4Vjamy)J?W>V5qmx?5ybPT{Aq`*ITg;7qX75A6f?s z!Gtm9KAT9Uk&z)B+`yHynTm?_!+k4gq=$LpCDHI=H~NUap4EgtkcNtp#o6%(dvKR5 zb3oPw2{M-KjHJOzAcMo=7>SOF97)mHj#(+2VEsC}qE=5q#P)Ejn1L0(1C2T>s>qTh zFKQvF?gpzWfg{nn+_6yKmn7rqXayZnnSFTA8nDRXL5%|OAR4d<{-0n4QG(yn9Q=~e zaFZZqX?h3N4UZ_|%Qjx&hsMUu22y{rSZ3C;#lmqKw{lS6pCp!xpQbN|WeN?GYF)Fl23HIOzd=ykTfAcZn!e2Po*~@(I8;%20HFQD%PXok z#P~TE#Zkc{R^hZ!u%en8zwd)-(BoI?J8ee)&$QA9{87i$2pZ)>`$jOg-JZrO0@l3gz)p{SlA6!& zpjr?09U2)}H!?J^Mv&+UZNU{D{WO|Y8&(;Jb8e{ROq)CA0WW#~p z@A&kWO>vluB90YHierVdGWA2h{&$m0A{lQBr*Pea;Dp25ZFG~FnIjRh^!kinf5szi zFqTL~c4rCNg1`Iq-+QF7NlKBz%E95@Ax%5rt~`CScRm`0#yA$6IR!z$Ekc$}FEj57 zAPZlHll=6n9dK&C{-O^~M=BL2E;MmJi~oa*%+herh{}yf^wLxEm%)M60%N_)*7mQX zUrn395f6AeUw_{R!8!#?O6L<;a-}PMO0w)`Rs?IfxBw%5sV+;=EV+@p&L*V#O@$+i zJTJc$zu(07WPBaIS)`*afrYjtxo5^ykJp%Cc#-}NraKk?A;zcoXFtnO);x*VD{m(j z?W#4v#j=F+q#gtj=K?>IZ>(_t&osM2|D?&&@I4)0b6nGbh0F++WLq-L(e@}@2b91J zl)#q^uii+$bG2)@PS!BEcBoueT)i5L!%e{3#u zORodl7HEZ=o$BgN%^3E2^<$XIR6$cT5p8b@W5E@Uj}FHtc=*5?c=>Q#*n`yc%K+`L zpqhR;QK^6{3D9OynDMTncs5wmujYs<MU=atI(w{LQS#g*Mah?+t5sp(kA8~$VLbBp85#l^AD7r+P2E=*6gk;5G zBE)%1r#=+UW0GT$aDTQz9IbjoO)Q3NfqILFI!874TTO_Xf=z@tCkqNC_otYUtT<-w zPZJbM?oT%%S#iwVZx<9w?$0nGS#iwVpCu^LLSyyF{MjZXD-IJOKj#VxRbxAB5Jyuq zcC|FX6o^X@ zhPhiVNaME(i>`1ojw&YjlU2Ny18MRWHgB_5B7^PgN=zEgV+{kWO<%hiHGZ<1*halXERq{C9IL)O0e0vm>`9dogBiEbi6Cd!c(0%B`4Ow9z0HGs&G6RNn*A( zl3pBL${a9zs_ENuASHtsK6YD^6(5|>$c{|&fj0LucSG>WDVTha%GnAN(r~yvno5Z@ z$mq_=iRKiPYAwWfL16aEW=;io-fr-@xw|-k|M^OMQaub_DMIR* zF4!$a?liKvAeC=34~*GplB%Pf%#d?Ht?|V^+Ofg;Dvlc=4Wt+I)F2B>j@;GRC^t`cJTSb*iY4bO zGwGyI05wP7&xy^&))gC^ujRO@7V4!^T@h>{r1HXUU22hP$e^#=9fdoA+)R+hLq=-j zaJs*DbtaNdwu=3dvDUC?^|;#qY-Q@Inh>j zs1GvB+8G@geaRI!wK%#&aHcNk(xnl!qY0_dK+DeO>g45y+Pa&L%MS69=wvlXawy{6U$+9KRLSiPaTx<*j#@V0khg)J8e zUM$Fr&O;iFIVqYX#rZ@5oe*7m<6s|Fd3bQbTp`K@rYJ-sO~Im*VUzYk76^namq}#{ z33fjbGN<}RFz+>hH$!f09vWCb*pL1GSazZ8IFy@If*f7r#$hG_bI7Pka$CPc23L`gymsOdiyq?BC? zYNqS}V%L=*jbQV`P&Tm(j7xiM&QixJUkO5AV9V+vQ*^26Ka<=x4v+M$P4*4<(bAwO zDI28ePgsd|@tZO&B6>+Dy*g9VpR^Kmk{~&gDOn~7(!vKutFI7-alVr^}ARji^LIXirye?=vpFw0<)DyCpoRIG0D!X)OL zX{WlOU5NkxlXK2k<ivtuiUn1EKMkgYlBZ8&cCY1aMh)c!NG&s87l-Vj}r z+&6T1-->Fn>fxEGd8c|qU3Li9pG1_9Cv>n9(nIY^NYhfMd%V+^Yk@1Z=|>2Jmf)#T zYNNHlhj4myqv{clH-tg59kXCkPC+Jt;fsP{NVggC1g2ovrt5Ej;RnX2V>muPl(tjV z^Xyb>Y%qBJ%h^B8%h?}Nq~*C$A?*jceuBrS`i(cY-u3Aro-?#X(aUp6SPs3sCsGP} zY`vJ%h$68*kN#aGc52?me&c*!;8X(!T8^_uN$jZepqP#8ePSi3Tq~zhXR<5WRILTR z3!K+@*oqLL2={u7nVWRuRV9XqP@@H&0dBKy{L_k&N+8BN6vJbj3;dXJTAXCk!g7q< z#AC4)%d(|XEpWM^zlfsyM?TnN z^d$Ie<>cOrXKy*2L-Ckj&hECz#TYH2x=vc4#jD?M7z=JG(BJf8!IaftyBb(~{2tcQ zs6WAS=i3GPCLb0QnF!6XLdQZX#67M}0osCZjndEbnJFlaiZh9)N9k9nN!UJywMuIV zl%2-0qxD;@G@PD`Bbf!)jMg8t2;E+bll0}$`m+`(@ie^_mCRbcWeo$bBJX5wO0#wS%^Z0-9RC+$2_)qA7yD%)~I8 z^x8quv;gej)Yv~F7rmD$+-#_}VAFX03jahFx~b18v?-f#vMo^+pIe(1I5BU~m8JkH z$!VXLurpX$69Sv^7Cbm!|FPe+N|dhj{<6#VaN#*F6Tib6B5MbnR;WMXS1N=V`;*Gp z!DYeKh5FO}8Ky&|c(SmgrwaA={gbKUqrPDklv^lKMp@>6z_tncj=afc{l*TQmHmfW z)rMOUOt%bY*#LYdvCh05zh~fkCcd=Jyk7?Ae)%YH3wB#-`q#vIFYT+Mu^)zQnm#1u z#s-59a!^z74so0;lj*`xVqhpEr4ho=B8jm9tJFssUgI*|>oqRdeO~=49TBU^<0Yo} z@J`#S30k8-YiSGG_Xt|6K+Q8832-;vlX@m>D*AsNU1;yn61igWvHFoCe1^7k=+qr8H;F}n1We=R0 z$;}M5@(0!ozJtqeA^NURxr8-vX}5^DzE&R{c>#G1i(Fxbo` zv1ag{1g@32WY!G+F@t3;nKgrd!eE(8X3gNc7%X$itQmYagGDX{YX;xLV3A9~n!)!n zSmaW$X7GIs7P%Cx8T?ZQb1o%o2H($M&ZT6{;0Fj?$GMcO8T=rFIhT?(gMUWg3L2)# zDSkY|ARg1(u$iH$EsOzVGaVUkjkePr0MG0t>l!9OQ!UnH3}#sP!-KbHO`23P+-8$h zSBqk!VdrxuNdlWf5(=N{>P9Xt9-Ep(v1}^L#-L1z>enU}r$%Ru$hbL+z&>wcJJJbN z6kFOCR0=aXNs8EKRMarP>o85OF7Q2Xh|jF4h#x`Fy~Y( zX-X@In8*R5y4%|Bs5rOztMIBAH5K>y9JhoO#UgqKZ@$v#e1kF2eD?UD2GN zmX_w~q#W~vfEQPgQK<--rArubkW+iH28sO+V}W!is$srhdZ~$ZD61hXu$M8m6Km_v z$gniZd)Fd&#lF{=TYMi`L_=LTRv2D?|h%`>2 zE98pNS2H>uk2vI>kGe*Yzh`0{tmngY342Y2Ta)u^B82!pAsh@FB<2T%aWHELi#R{5 zAniHw*C;U8GRDbHqON0H7G1C?MD@jiN$IvVQC1rlD#_+vW#!5NT!_#S-iIsqBW&92eGik z-63#}+Cxnr715m);r4K*wW$L;yB(r5%EJ9I6Erp^aBGHAl^Sblq8oF@jBdjko&#CO z$h#`SxLgPcw01N*@o**(`EHJ!#KOKK@?1vV!^lWWvy1gS#@@@U)o8Mc-B*DNiFQ{B zc5x$1E@M;Q${;nk>^|y`S2RW1;v67^6~NS~Xk^VO+~UdrCQZ4WHF4DDTBu)etJyZd z2MkOKYDnoB>rmW8ns90^1^g+ig*0(yiz)C=n~kK2mTjiMK4UhMCRVnZ0{bjiViQG8 zqkuoh)z^emRTl7HarNK;DTS-0!2H_Mu^G$Mxxhb9Rl$l#HA%o<;EG_zp-Lg(FLFIF z;Z!FC{3WgiCY-8-fWOSOz=Ttc5b#&nWK3f=@v4Cfx>uP_*tAMzL$H*^G-TK+g&D?1 zFx9p#65HHGO0O{&vT%z8)y)iR`tKOeMy?WA0PGCobSxwi5S;%&ri|%s(}=M&WI7P= zCjLlH17YDh5Itd~7Xj=WY}7zo<_tVPQ-uP-pUAL*H%%I7)1v_PP4*&C$KX^7he9S{ zITs*$iyeyGM52`h(VwZ7fQeZ#kdEnW0Q(nmFn}dDL#AMQ9KimSst~Yd&3(^2o5O-E2}P(k;BNe5@#oh0b2g7}b;?6+hS z+U^WE{==fo!ICH~p8vEcF|ctbPL!fk2G5TyN{n@KQHnkql$$C^S=78|6IzWv=#FJN z_I9!fZ6^qn$1x>2KG}qpI|RDpO}ZQ@gU-tJ=1Ng`_-`65J<5u80%0j7C)z5n6A4c# zIPn(ulPXDZz|)V(pPyv{TbO`Sa8p=mY-JKk#7$x)^Gzn9Vsn#NWp*-?PkZQHOywyA)vQQA&13CAt(~&5i|FdX(5R2@6jvi@@~0!2c{kgW;izNh@v{ zlYGvugmVM}a*<>^L5~u9PNnQpL7{f8ki`s2%5y7~4vzRK{+!8I0m)c9I2Lz!GLGH( zAq`?80FwSZrbqWDsm+d1(o#@Tev9%YojxMA0%|V7-}DKguJf5WdPT|H>>nj_3QFb| zFeP=5lGN%cB`t>~@m-bFnecd1Y!nJ&{sGr~+-<|LVG;F6-1`P3?y|ebMz(b{MJWm{ zguB;WirJY${Xs+$<J4sG8GXyUJYl9amyf-chG1T7@x?r}G=Gu+Cu)DiZH99Wj7 zk+8pTVGrsIH*ws#g#Bd>EXR!!_Ng3LoFMuuy&ASzLq1Z+Gn3W6qVx5x4PCW^@Lmjt{m+};_( zmQ~zwW)sY(oV+Xu4vgaVGbc6%?5maJV?<)jnQq#MAFSc)8esmvu@H!7Az=EywGk-c z4A&Trg=+Sig`*M_xLV=}-0v)0TjSC+u5lzd5_;VU=YzEZiNtXeY~CE~-XB<+O6h zDiS2_M+O^64n+d^wN5T|jX_hfO_rLDbaUn^VsY9X>%TZz&$U_GT6VJ*HRuyr|JBL5 z(PphmZRSK2+>w}bn_CSfurh5mAv0XomY(2}JK0BV_NwHciakYevWEoqS;g>Yg$#s5pYwM&l8jRJJRi7m z5i|-(+4FqpK=MX-!k|k0!-2tm3}RQ9qBZq8;xv z7cXIu^0=yWxDC_e77X?Ec*Jf`p}{oiP)#>iVM|uDwaJ1(oD){6bs3=X%_bte)EiM}bJtqh|KR#UdnZDIe@uXxSwas0=!?kAqPZR$I`zqfDM z(l|BL%f!ONGV7I>ju&J)?~Ktt+acYJy|jENwoCQe+nKPXV3^lAGb({~dKY`6=n9N= zhaw{FlcM*A-Eq#x?wR`73|Wc%XSPuVzUSi&6nY8oS)|fir+uxYePA6OcIPdexVn^~ zLnSReLn~rE>(@xYa0&L`_uwt^jQ&Om?T1KpiO|s{=29;sk16R);b<6d)hMCChIrQL zxkfyDN~paN&qfIzC5@M!C5^9yr$(5Mzl3TFKjxLtz(>;Ob3jHY;6SY)8^wV-5g1(} z#-7YzObO4I@bg%DmeI$RkY~u?@g+QUz|Vyx>9%CEOm6}QWQ0ITstGF~OjT5pNXbgF zPAe`+rosYVQj%(`7mpK5(&SMy`J@t>*Wt&~5}x+t=du!V+xc;F2~|jboC0=TO)}A` zCBkuG%(N1^E_q29D>NJ~FGbw5@kX-Fcg`1kNA80S^ zBGSBNc@8lA<1Xyq5x6|f#G!RGqj;4l3|69ey?NLtB=&*G#3&*Qf*DOMaEAvclZ~of zqc`gznjWLM1+jZbq=?;RDp<09%14q;H>Ii0B$r4pT}bNnddj7wH92roC9XCHZnDJH z<-nC%vcPpsE3$aKrJ9MW&cwoOH4(Kg#AFju=R#QN*SioC%@}iB zh+-2l*M$g}h+^5I_Za&8WaWhHlW7IbM<`yGdz*Wk3dv<3>}|@y@8VT3{ovi$Y{XTnHIqrBC^= zt4=2~bz&@m7!6A`_qFZvB}|!U{LYpdH}tn*sb`J#hFa4pI-v!VGb;wnR01tXc?kC+ zsU*`v8iXdp)u)D1uM}>TI#B?-s!mO zhCtJo_v3QGzxuSQJ0LZ0z7w@7h^?5r+;ms@wW>46dqWZO%`wYsNsB5NZL>mb&sJz! zh*tgEJEGlD3x?{|m4W^&z!U<6BM}@wv|y-bSqYV~y(ByA#7eouR9=%T7339$qDfq8 z-)c2oFo@KZ<6YU`g>2o9Y`L<((@l3}o>uiP=x~+>S~oRXJSNoX0E~g^PAPPyu@iB> zJprn76smWsC9Ag-%?h^an{2(sHmWcbODU${9YbMq=1gLJv_)*7%}!y%Jd>@A1sz-KlUd1fAV%NkD?$p*>XS*!&fD?nRR4!v+wf}O^< zgECl7=gowfyo>NGjG`TP=>0)|IvRX;H4Ox0SH{HFU`)4-YnG;><{sDAXO!SDVw&!T5-BU>2|3Ps7Q+H4Fh<0hu z(V|@{8m(15IWenZzV7B42Hl6*blWGnQtt=dWs|b_-Rh>>4!Vc4>0WZv-3q$5v+1^$ zy3&0KbQhFnrF)&5u3(H-bze5!Gj6&X(ETx+?$|O{x=TTKR#{fMSGnnq1>GIlbi3Si zSAp);Y`XW|bh|)z%H*tcFPZF;?|snSm`(SPn=Uj~tNK+o-JjibanNm^l9ldxQ(WnO z4RqIJ)7|Z+I}dbEX4Adyrn?(-yQXi_xjDfhB`t6wYPKd@mmlESYi*(zO)_@3)A8XL zZO#8B@MB~+jPO4ZE-WYi5!0L)-fMx`s3__-{J>M=Ju@ek^C2&^Pf2tdX^@l}?@pyg zCf{yk;P9*)N1OAdi$s&|Xrhh;^&%C9#^^G@np7C#J`7lk3d4zow*hNaVf9*I>KM<= zgbJIZ1)2a$tFXCRU=3j1Dr}w>I18|4Cae{&jltAL;0^!}aR4FVs{pQW03qU-v7VW$ z96-oe58xUH5JD~kaL@sSl$!w@aR4FaH2`jK03qj-03HedkD98Hz^?J^|B>&f1zsPk zpXKva9XG?(yK&hl9XF1>2oUC+tR8EcfLYlF>D^$G4#Ep_e;SMB@bc&+MaB?VtD^e0+OdBZPTbY(R zZx5GPo&b95y}ax>V-CQ~6ox42?pSL^1(Eh)Iw}b2?~b)NK=9|?R8vB!j)NRTlP%Nn zNT*#%dXh*QFO9OKnJAK0K_wz-6;v#eRzXFavNf&ai6$OnKDJzh1B4GtGR-~&y zsA@nj3S=~=ssKi5sWU5Fnm-SkzoNp?LluwFQn$P5ii)+WN3-c(anl_Dy1!-9om}Zk zw-4tbWo4G&m4``Q#5GIU zH^nLzqZB&NMN(vw6cQKQxzz>}5u*7V!yYhjVht^I*4{3Gj1sNtmD%;OYxYc_ZkifL zE${}Oz2z&`_MlS;(8)OVy8l^3oij}efW4dr+q0NDXo5i?32O(e*rdbWcr9=^Af+Z1 zLoNbjs!1c}9qtDxXc7s~p8%R=+&!CmavZR;2O13%X|$lU#wnp7<0U(OD(> z9eKX0XZL}|dGT9OH7%%_L4C41z$?pY_)9`KH*OIZQ^+~qEYebM?&DJJ`iWZAar^%N(Q-(3Ev1LE+ zbQ*>c-%i-b>`BuX<6aXj&;>RZ?nh&9EXr89LW0*LhGQaR3n+iHA5JHBw8v;T`z%xr zH;yvonMCHH1y0-*Hi99u{$?vcx zP0{G%RDPzt6Vn<3?LiBV3)ZkT!pb+Q2!WIaW|CTn6GM&74s1y%vcv%>=3-V{4`TwR zG8`nBFTs?uk^~0wPt~}T^fxH!tXf!@Fh$!{LHFSXq5DW>(zqqu%$Pn6^G~%dj!%`M zwW~8Zs#9hn4cipULkVmJiL}@=AJb%_cC4uqV#gB7RAWtMZFSgUp$3IH<@E!bi4 z(@wgvsC{p^>7t<9G{?cuKUqtiJ;#;qTG0I%bd+7JRhTlD<})OvSZJP>dcqz1Y{dSp zGZm8h12^3hpgW;~^wNa+7&8$#7_@7{N)-Mui-Fcx){1GNMv}`0pfH^*rU0O_fJ4ki zr})Ta(g0e+7GKmIrt0XjtpYAb7HncD)sl{M+ICUmDoVH;j-oB%9K>4fxvu~yR5eb( z{8NLg5I%r*=l!{V+ay<)UeTls2z1s3OmY5)sxRHilUc1 z1}Lfe1wcvF#}GADFF~BC8WLo;6&?{ykpnL@KWCAv^t#Kns;f|XO2c28ucdzMrkfbV zq*6BBZ{2hYLHB+(-DzQ0x+_8VVT7$Fj;ntxUD2QqJ`);csXQKVV`oSc4R<9By)1^i z3IOdgMxdlKNr845{x>dIYo^N_BychTX$hu@7B(ah&9eZilO zP4*nv{iwz z_>^pM08j|dAruy&Fh8RXxx844dEL!_EBHUxvP~}+V~l%B$!oR;E~F8!9B~zwk^5}A z=#L_VwG&uP99@3?WQ?nf+hb6n?y(tQ=C5`pkFIzErW#a1i+in5_^fg`&|07yxQcQ# zRJiB>kF(3sR%n4A8MLkHag!gKu*zdBMO}omJ^UO^q-9ORUIGqh6ej^XU7V& zA*aF8)$tZ%TO1x1`dTsEIcb)0Nj$K276Etxc*iWQ>iITrD6yoiT4^e$GXS%CCObH6 zMABwA$I}>q!KOtrl^`_=mnjTTxnQOWBnp=@2B=(02~w+YnZy8<%S47KTuKFz8!bN9*$_1wN*EUy6b2SXA2AX6W`}@w}XLWvsMPt2!}-sU#(8c?e4wirLVN!}%#! z#N~*1JtER}3}ttWcdC|pz)gETXir{((Fi$qa-2FnL|YQAAl7x1@#nMF!9jRoak&zSaI`cH&Mh6`^`;a7KM+t3*p451wiR^(aj_lz`*9A`UYD( zkCwW4iOUEcK*8SD?Y17AW5vM{i_tW`SpY9n(v+%SvhQoJ$=bZ?$GL^05E` zK#QdfT1ukmqLvBO<8?%-$GTnOUc5JUUmffXgY0rIR>p3fg+jLj;06(jsAU^OQRM0XjOmB;O>fYEYInh16?b1 z+a69i1a3eAe_!rya}}%1ZoINvM|6$uMvDM;G0-UW^j=re#Wh;h11n~i zw{WM=dm-8?$-hb1fD-}mmXo#s!*ULSwAdpy;-0)WjaEs)jNE@V@6(AUYecwc9~z{> z7sN~BDRSSwv;c^3oe2MRKU)4HW>!gDR83>qj#LCaPKNHg)B+y?G>fUY!~c2>MzmVO zygxw;oL-}UXFT?r918caF^pre)^-h=UB^3y71J#b#mR$}-T5@sf zon5URnU2MoFzq>#kuX$i?od{$%0f*ETnW;FJ&Sh2C=U~8_xY1TxG=>@HxVvP+QGg= zWTM07MME~b_jN4)Dw{gThoW7$&A(dB?KlCeQDI}T{&=X%4!Uc#s-LX3)TizhH8sdE zY2U0wl}PAOC6TIBi5%KgX{AC{T2-eisj60$-qx&2Z7EkJwe+h}vWitIhnA&PVcN$s z0!+8DVKGdqWgOX-N;Hl@>!^vNM&oz_u#vh=nvV<$N2CGcUH3 zd6vPc)PB?ER8pU5b}A(e{1&TJ*gx>(YM1exTc=gMM#e+;)QUPnL$eRvbWhIFs!m^% zMR(a67rzfdcS|Om$dt}As-=bbjv%+#3qr9B2F6m4y6;lS=5GlwoX*;(8Fsq!*QvzNEprV}Y zPy)s^U{cz+aD?Vi40{d*LKg2&bJT-Jtj-LN^o;arfd-H+Du=R#em+9533I;6ElG$p zU%zC6uj>B8VL&+AXBFY}&=D&}tPmzAmN>lt+k~cux|;ARzeom?=d#C#Nf5vqu#!PI zDbQabmJ+2D&1olgPgp!)4+OB8VlQ7x!DCfDrC=R9E%`8|GH9VAJI@{NGNTpy<2cQR ztZb`uEB_Z{8|QB}xH9(T18_Wl6$wsrOr|tZXk^q~efX!ba!Rs4PAJQ#0 z2{zyCJkq7^m!R$|jzZ6j8zddw09{z50PIozxI#fp&AZg|ctH37umu^1{ijE{l1ePZ zVlk3ZxY8arIy!7O9?o>2Ywk15bg=$;w2SNQ;CkXQaEhGvhJ{FJCU#eb<8Y>cm@(rB zj(H#KO=n<>I+DlmS29xC51LCm{}`7f6TXBU(8pjj#>2peQ9HD9`LguD0Si%ajC+ou zM%u9f^VToXXpm1@LkU-atdN%pKg3gUxx8aRa6A#DrD(40OX#$~`Crn%U*xO0d6TY( zVx6?7!{ zh~=nwJ5EAKEY_mp?G08CD^cv62V5*t^d7RdT%SV^y{q- zEj`g>ya~wT5lc(IX~MGP$^X4ty66;W>G)F|T6#ZfoDIl(O_r8M$8h-Z6!Zm{M~QZu zV{yD=EA=x#orB|Y(B6OAf3HU0It?2A#c2+WE^ann1LVM%rO~f6YgMnG4vi+l)bYs4 z2lPvg=)+_P-BJXdkPM+yil7IRA#_RfrYIRghtx#UN;2CaF;eITP8#ABP%Q0Cfe680(`=ZSrMPDcyKB9Onua>e^l(Ny6H^3EzUKY_jABRS(-OwToT9hTMo*1vM7HJ z%1h1yPizRpsh^BBO;}h+`yQPj*v&1Vb*A+WIGlD4IJ9UJ95q`Hi4Fd54admtomooWHs$PJ;pLy}(KZ-(d6t0N!#gxDL#yh7RO4As#r4 zTTGKrW*wN15N4imSW^r1;<>nd3Ga|S70(z9@F6ljFMR1@{rM7K)w}0GL|PBR;+3g2 zW11Wc$RelHz{=K=DF`ZugXtsd-?oOaS5~mhn;?$5It!-| zyF^G3h%Qs+J+_X+zxucwCw#}k*6@N)WX_6-1B0i2%dP3Dt(dU^R1Ue`ZH1OGK#~_Q zYk{$C`e_q=RgazzyP-X}_Uthl@NhCtCxT^Dj46H0{qbv?ESL|*)&XoVMq7HVw!Njvkt9SQz2ZXKPMZp*_9~i2`v-T0+p;bZ6ReicTJ$ zmSB65xqy!2Vhsg{G?m81KDlW(hxyp^egl$q*2gO#%um0qo9_pFw2kT_afEVE1GT_= zfM9nlm&<~7&rDA_Ejf2!vXPsfl>m9IiCb#-Jv05pK+NuM0~#ZElr6m#5`F+FroaNA z)1(NatQtM71NB==SeIwxZG;{Aag%&i=Uohi;qE1?b;q0;f>z^+Ig3;}WzBzLk54My zVokzQLHrOLoOyq$18y_(?NDN35m04>DJ+!{_70(;Qd?O}9DVZ=H|zZpTGiE;=vc}| zvxRJzB}lInK$b@k@Z$P6^9>MzZzlAsk;fbGsWg5I5$aXX6d%qvhDh>+<{;|^bX1wG%8t3;h{qw$*h z4yEVz*cBA}r7R|(5+0P03sY_u3UFIvz9Jg|r$OCj7f>-)1}E51bZxb2d1GV7Rmh1m zf9Q3p9=OW3w(btv4*?}{UL(zzSyb$fF76ZhlXN(;s-O+aECo8A?zB%J`f&4u8n?L( zea6y6n64d@rGq;LR0>?*jnlyGxQfN1uPRXG#EX1o>Vo^}|xTv++p3S8ln_S05LW&63W&LZEj~a#gh>gL92_X<;QZ1cnx;dK{tYs-!h3KT9DQK%4td_+| z(-;rirRi9@R1?LH21_0~=Ay_GZ$~wYw%bjZV}FE$5-FoZEz_VIQxrzAjwH6!DH~;Q z<|rFYv+Bx@8yrE(rm;lT3#=AON8_(hM(k$HYqedhnIzw;)(b|i|7C^!GW>7Mo(E{CCEjfHj)iCiewan-U4p)! zNFA3%=okw;mqoiDX#dQ#Ve}WK2t<3*58Wbs8MNO5R5>kA3u@P95uOCXKM=2X69N`eEC@E4AA7Ake)7#g95@#foqlxzB z!0|XeNlWG!BBwi(?TW#`x1fD1bVY-F)qp7!xf$nxsk4;#MpCy>Qc4ZSx}DN2;kf!E zS<%ixw0AffZ@ehA5Mj=xrlx8_3lI;LF~WXfJFZr_N?Lh#~a-W7`+sCN8a>b zqkvOyb}L}a!Kkr-hOiq#-6g8*N%p`uffYNj_D=dySj!~;QMs4|Yngy3c8sOWlWuXR zJod|4)s7!g$_k}jvv8&j!w1WJ9j;QsYTd9slCCS2Hf~FW&Ctq<=p;mYU!Tc-HDkm`M zz})*;l#hY(%zHq|dr0X$8D`5#^j87nPkRuaLDsvOJ<6dR#7=0S)IK@2}ssHdk{Vd)1-Mu=x1gNVVFAKqu z&mNwxA_wkPlnPx4N>@+6f@d7*rpKZlKF!?<|GEi}rvS>=INyW7HmpyWZ$i@oPxt8O zPVrSec^`7AEKg7a|9ilk5-nP;RXzCA-RMKSB*auGx;ycP5DS1C2l@3N7GNq)Gt#?3 zEC96dJh(g4JPc`GeLvDv&WbqivraoVkXZv4x@i*gd5Rg)9>2T5%bCLSNZ~_Hfo|K% zu!=wKQrNUT3sxf8iK;0WcAK76y$f2gfroNS7=q={Mr9_!WSb6XTsk_!WaEqCXDyZ z;FTDr^F-6B;+-`Pux`)t;cj>N1{){Ec&9StZnSZ#G9(OVLvBRsPMLyzXjvXMWkU06 z85|W$#v0~evWx+>76n$&hypFGjDqz(0-y($fH4Aq&QJod?T;wXcS(RK{0w>`34qh} zG^BCLcq3%I{1M2gUg@V)3CL#qq?n0LsAp4YxY()q%;b#T4rb0Ix>w?gp~sMfd9+=~ z181FXMO#8%u7pg*khL}K06Dy4eh-G?aN-^ZdNYP9Iy~hB?sv`5#i%AwQ2 zm=vH~D8lw&-aHtQAu1v>B`zN;K;@ssFmDx(^X~#f-eg^qQ72ewFC}fguEU?Lb+T5h z?Whp!=e-_0oT}*t=YJ4qQvfVlH+5QV5oQ`4ONk!G$wMk6J4qj=n9h9Moxt@-;G`#z zfVmOZT1{};FXzF=VJ9$U%9`jw55gN}t!Xi1tR=FJYKFb$X&YC7>-UhRGpj}YTGjba zLJ~NJYBfhtt>g%*RUARJf+MI_Zv@rKji6e!5p-1S>yWxrrVAm{Z%C%BT4$CAy%@n& z0WqKSK^CW)!*Fxv)B1z(FQA9?a`H<=SN0&Dz2%~^P|ei>RlPJ25)ji@I1;ci#sj}# zr`52XRxNPnVYJAtbU0k*mxDg&fQr<10zONHQGT51jl z{tRHN0OG8Lxs>0y3OjO)2cF{mkFxWR!oPDh-D@s;CrbQ+RqX0Xh)Dk*fWhUHFy2kC z1y1TG=g+wCY34e{<_a4sTEpI;?9zzsl*4F8O}T^!wtaxzM_2z~QA_yn-#ASFu-sSm z!PBrB#Z4p+e)}_S`#N+DIu1ZpN}7wkJ&STXC|@8-q-3_HnCg>Vt!Vmn%=EpJ74vq) zJnz|0j`>5-IIaI3#C(WiVjFoP8C7yaa}O_M(eJkw^B_d;qTKqNn{x(~zkW_HEhoKx zV+~aX(jYsomm}z9>w5uDeCw}e1!Zed3s5uIF^MBk$g9m-U>MKEI8K4luPBDCYxRew z`>L+^6~v)Lq=uleC2Hpj=Q~9`ezZwhc)`^19f;>t#-AYa8NVhqHe=trV};lDEAc)S zX6NWk9WE02q)MY)fYsqE!PS}8f^|?NrRBP-Q{IlL_@d?L>~ZV0V^09?oKTJzVSKms zd3OR=B7r9X{hSi`eO3Ym1DHE|0SWL*hpB$&{nCzW%&??sHmL>%5XzK0P8Qqchxx>( zz}Bg*!;sh?DKYiLAl=D&+>36~r$BlRpu$8&Z%>rhWKntsv9p6HX~&8q7h@fw(lUw* zkB;`kEPk`WZ`(^|%EBCJ>EQ~%oY^@Nl()GkNyeR7lvjZARTm}k{CgJVPEcO_GE!G` zIX%=KZO$AVP1-&l8jzbo<&@{|h|dcxeRu;)6euhjmb-9G~Xukpgm+=42*47EV# z*SPj#Mdq)dK@TNQD5eKcRgLYhxMQH>ISElp)tlAs25nGY2mVJq&yu$qO&nCaEZP0c zE@!)630$@DXTe{Y@^PT<0$qtzl>0YVG4roOu%ZEa_$sYOx6-WCB(Ry zE>mz4;-*P{Q=>|Vizexo1t%fyQ=)M(PY;-F0yf0a`U1|L+O-@P0W-*zIL<6G*v%G) z7i%&ol}NZf5^Yr(VF)NOtr5qFC_wqh8D)ZnaYeyv3F>l3!RrYm#uWvQFVxx+#%=}2 zSt$&cNR2rV7=S`;IS_tgg&ic+(z^@Ar{dho!3ef?cM%O0=Z@$hQFfCe_Q%;ccSQIG zAHeLKjmV#1jJN#(#+YuwO{Vd7`bO)uVNnXrH?L>4Z({HTT zs($guTujG1uDR_@@cu;RXpbfEnm7e+4=VBy&b-?Xm2J-s{2;mfMCq#Sy4TzRn z+8*IXR<%EDD#ZXB$NrYY>7FSZHW1kykHcXWyfK;%n+UJtE}}#CV)NI!oCXv*uyQl zR0{xmz$KH#yuB=9$an*!aq4mW5n9z>{=f3R1U!!7TDN*68{-9Al5GqaGdKcdV~j?d zC9nZ)wuNO|Sn>iWX-3l67S@IqFYG%69QGXo224VNb3+o6a1#@jkewtXadyZ`*2_&o zfSZjZ??0!ix~poshru`Rk?(u`Sw4Nv`RmlFwX18Ys>#RwuQyl!!8Q6Z7`^kAD5G}0 z3Cn_g4>KCO^nzkyRhU;ao1;sXRbj57cx+Xee@Od>;gFs73ERc|C;s^FRENF=Z)_hw z3?F~`>c3MR`V+jdeQe($=6~X~sN&AM?|BZvZKHpJ(HCEjGWs^wp;zIM?Plw_m^b{> zzf&E$9p2bJz6u{7`t!e29r`r9v3{&wbsu+v0o_IbED1a2d&ETgIbf_{5G5yK{ zbfZdu`9wmX^Hc(?PX9)hxl1p=FC}m6r@37SXczJ~VD9_b<|ZPm$eF;qi5S>f-c7`5 zmcP$3m%I>PUHm(|qn865U7Pi8@Boyy2ZIRmWUe6J&I879 z)K4CzV3KGp)+x}JkUs?lW^$AQV<_mh7NcOlZsqehT4&IjHb%1U2Wrc zysTxF&ygU1<){`1WSa6|2u~L*XlR&qScSFVvy;=3juWq%ZGKCGv2YaSp!-j3Gti*c6||zgaRpA}rS}gy^+fuL zlF)FhqKkqXw(Vbjqrli{5WLbKfS-JBxXMlL^OuVGAAwZIg%H@tgq~Gbp(Pm|Y3a`~>!Vl5LmtrP~w^NwfAmfn7a7?EJ z*`-WE-nO*KI87NJ3Zr^Sr-Wev47(GAnqlZr^kKnKya5WIf(a}rR7G`7u=K(!$=1_8 zn;?8~w%$CdxhP8=gq)^TTy(tSOV*|F*rRaCwQhlb0VVgyPF-@C0(tWaOVdq8y5FqA zI&iaOta*6OFb9k@SQYkZcxt!LORm6Y$_@WH)oz9Tb5^kWEAjjA4PmllD=bE7=Dwut z3R|ITNOXk_)n>v~g~j+SM}?)|tfML{%Ofi+Yho%a>#Tx{s<0+1s=}K3s0wT9BPy(+ zb}K9%>(tjc751YjBfG%2qvT$^MVFl4fj!7Z&Z2+idc<@l**?$AK@LtTI)qzhPC|`ew|nnjR)p=Ymf_;f&ZdO&B$pfmQdy z+NPF{

nPpx?y&vJ&*8*|X$`t5* z3J18+1Kt?;mz#gWkG@f+iU2aC?h-4Mz4!jEvfZoUX{edQA+R#6tetA5fp}c+HE^xz zn)1`ilg}Cg-+0v-Lpbkw>GFL9n<|4*pT;( z@x5}$v^c|J6N2${Ev@Q2+s!&F$+6`i(=yF&L0{xlq{QfsnaL(#Ah-x!5bOJXWW%(} zU6v%3UH9ULsUdCdMg5B3?-KNfU9L8182caU+K)GxTXRRoV6%IpZqGL?t;A^2QdGHR zdnub~?-CA@tdzPnM>}0BqL+jEH59Ef9iK#cI(#H9Gs>KQnm4!^Vh^Kz&WOkc&COrolS@KT8Yh; zO9=8{mE~$aaK8*bQwbJCORGArwtgzPh-6;7u=DNWorprRz7n0$6h_t%oY&xzS_fS$ zhB!jIl`OAcOs*f@BO$`*%&{Gu(mtu60Lvg-x6=kV}=gT=|7=n4VOD5fEXA>OcppMtHey%&#{2d+RR#5l%N{%JSs;3 zM$vLM`20Lf#&CzJ@+b}=;sk~%-AsC;4`bEv7CzndFVg<*aT(>5!Kc^4)1qy+lTo-v#!wp zd%S#Wm$_*(!n;Vs%V#4cnyAd0Z?OPXJxZyeO|n7ie!tC$f6M4r{wF@pre3?QT!Q=9 zK+y(w5~|hk+DtmP9cQccheCf|Q}QfXi`AsU206x%*GR`+O2@mIz(O%`qXu9<-2$Cv zhyK8aSF+x3;#E5@0OXKn>2mtmthy9jj1**aWpuS_o8$sLffpguguwenO?0nrjy*5uEj>36ofz6psG-pi7Xz3h*$ z`**kGrD{RtYM#>rX*RLPEsDwyq$rhYhCM(U>s=W{(m|WfM62tx<{5eCR8j<_mFG-> zA`-Nd5cK7f`k8!D#0k>sK`iLCUn_ktB;dn^UgggKe$&%`1wU7dFR~w@U$2o=A*FFE z^nE`FqpG%gEjVs`F|p11}!ymAd{c;OmUJ)Z^+=3Sj`y|J+|er>ltNr#8DtNPg) zEri`#{im`O6M{X${m(OE`}z4djT&Zmrk)eD{EZkO-nUx+>adH(tNwqhe>oi@R^+)~H?vtcE;aBZxy-Y3sClEM|Y#};75$v$MFq``ATe(iQX&2a5 zTlL3=nYnYjff5ET;?Y`5$K4#l2^_3?{vUj`IT*b5gg~Naj4TaC5$$R zYIK+JKKL8}`WL-w)KVrN!*=GzBrU{14*Knj9~P9XIyrej^`q{z*&{0obR^1aR^zj_O`aD*`i!Q_Upqd(s+M^fDYX=2U4`?vtpRx z52mB! zArYuH^Fjb7Eh8E52@yBsgImZB#3G1$@fE{nkA_QjnLdT;)C6lj-nENYdq3=wEiu$G zm-Du|y)rnG=)4YHD01>Qn?U23-*Z}3z*jl<&48w&ojRVkVLHGb{R7B&%)5ZwtD5BT^hoTXLhExym5I&3M*}mLBC8^M zeR_~rKHLpwUH8_Ntd%>~=Jw3M{gLIHmRXE&To&IikvRBh@y;Ko>T2~z3mdetk>!X+ zMYOjig*1`v4U>{CQ5&%miK;f{MEE%7G%ALGvBx>q3v-tA+;Og=L|vo{ybJ`VBi&(Cz;d?7Jf|$Rk(_gFpwwvO!>rh10n%qsJH@ z@A+48dCk}u2+<2t@ktiD4gUmOd1SBQuN*&itE1#y${1M9E&8T;K%Zh)Chg}!6_&tmR#4^ra4qv}I*{GyAtc&Wfe%@t$@=#Ucx(fv$M+3s^gY z#HgPpKBIlZBM&^@P$RN{!bVa?#=FEz4nD5K1@N){UR+YCqn%hHJLjF4E*=BZpd!Tf z&tzqTok^?IEyZ2R9*xour#A@|-K3&-+RT!R)e@+^%Hw^Q?-BvB*KMz9uWZx&*P@u7 z->wYCc(<`||uf$527jo2a}J`3tUNDmCntgXBQ7Gy#W`8k*ac_pxVtA+=M*?GW6e z?a;<8$`C)H$Q95o%EzDQ!i-Qs@?daHQDQHklUm}0TrPJnNW)UeZ>`s5*eA0l03PwL zvG`G_;pOBz+_Az69FVG)a-S?QjN1`@s#srtcR`_0&gnY^8}~3g7=gy_LKD zmOgW$STz`y7{~~(Nw9|r6bMXxjl34utlv5u&-jV1U;M>~JQ#N#eW|Lb`-R-Gr&iT3 zQCxP^KL1-LZRMwB)#@?+eGXWf<{bx2Cso}w0KZbGGkzGKdp*5n7om0O;p?^nI9)m_ zI~^TmIX(KrqUNV{{Bq;`$5wv#xkp|fpj0YUO6>-NE@0b2Ty+1b_}N)lie$JV%OhQ9 z$o5tdc(At9gbl!GB>O+ox5kQY^0;3x!L@mmKr~ENI```;w|@HJs)`jpF-g#ck<# zlkvfRPuAl$Zw~;y6iG`7-9W+aPQh!khlU&Y5M2vqNxUS1_-Kc15F6WfsM7+J;z^k0No3Zn%Hh=Q7kO#(66Hh@p3FK#S zzn*np#GWkA&8aNU<#-s+c2yY9{tyOYQWHDtBAxMSaElSyyTy3LtDXq^NGciZN<`tX=`%{iAVlr7#XBwhN>%hOiSEO(`!lRfp@^{Sla)c<# z626XYv14&(HCuR>Jw1ETdo>u(Nbn)+-}p2mP%%ugSXA$E3`5sWsEMD?7soue#Yf_LG90( z3a_17BIj#p3Y$7nDIe1ZzSB=ypyosoK#LPxw4e?D6u-$<3Y6;yCw1h@lOUkZaLB*V zrr+@rcVz6dGp-PVBC+g01;_+p+`*Nie-Vy0;E1&5 zjhWpcmt#B|XAV+elC+CIpXYq7&bXD!I9N#DZ;$W)W5zz?O!(d-uh+cIaDbl@f%L~* zG#Z~AkIwpKW1{ zxV;MHS_5bus7-kvE42=+D#WZ5pj)iY3&v6cZ`O>8hAiVZMIUDaWA!X)yacbiCX7v&#Tihw4mz!IJau=d+nvs6k*Fs>F>f zkZ(rVQNK#96*(-9qErbIC>5dG_P&4mO-eH3+_>0V#;`*vWeo&;9mfqWHXR&-J+VVI z&Z-OK;|IGKIhrZ9=8)XS6X~7TZUR$|lf@4+?Ia4Dg7dC7aix4{6gPA9@vV1u6RkFr zoH=#1M^o_sxaM6^)wsLivPi1Zq4 zn{av&uy= z-T7AQNnZq)$}U>Ug4^`6=n-;luigYXBXX;hQ zS#ED2_uNYQ9UwQR;?l&sm}OJoGDxHofzD=hP=8|$+E=U&@_}3Rd8dI`2i$5Gcn?EW zR;l8Gkh>TPId02~z1zeuDz+s%+e}+3o9LUQ(BSco>r}sId;HQ~Av8D+^kl|z_m-A+ zB3uZ26{Ny<%4kNRG=5gdANGZ!A!MZH9$_}qs~3M;Bio1Y?$)Vetqk(8B|A~L9INiM zfo)LOSGCzbA*n~gwnoT+!Rg!`&-8NQ1Cif~VT$x_&$~&Cx5c+%L->lx6k?Et!sy{z zvmnc5vs7cR-G; zw*^+_^Y8=*?NSMW6n-SsM&7e?!DjkWp^TO9*mNbVC*=>~Bv?BSd-b0@%sBUl3troz z(}5vZJ$r`tK|Uadbxt30cFdCC9hP0F`wPvWgY7$A-=1-nZjfE;6RY37ZJknZmJll!oE?nQesxIyEIA9j{_5as5Y3V~3NR@8&~faku2uY>%`vj#$n`gFtd8w{yXgukn`cN zP<|}mKXH=Xl>kX->tkR}&{cD3VChj&?TH9>*@}OQgAW{Nw{{^0?V|L_v4NLMZBFES z1ATT(?K0DXmj<0f?k`z3NEgbSeI76ssuk3DldA?3n|ohj9a(bnyzC6>*m zt7pUcRwH&xUJXhEO#Ayjd5ofv;xgrs!I5i?W6}QA3jI!kb0%+68Gn4zM)pht_Ww%;L+sdfi?$OyznBVBh zu*J>2G{?a)$6xaglYp!)k)?#fLI#D%Gb|9d;W)nf#yhKx8g`SS9KMlDn|x@Afu|q& zY&nRFbWy3X?yboQb;LFx$@%m`1)EsifV_wB1M3h8)!jWrz8`N>sB{VC;E{@0a_GHw-;7Q-okoz^n`NAo%y&tYbU&|s1Ou>dAi8+!Ywx4Ra~LXf;<;TE>#Cpp2_T>!4xM_=t>OdO+kWs9@?ZFw_{;%31EYB zh_O|_E+Vv!)9AT|xnRpy_pO=;m#ZIDRe?7aIsa&n;)6oqq%Z|wZme6V-s4ngg2M8# z&W&7>g6Gi&#Sv&KB^#KLZ!w~3cqQM97dXR@oj^oVxJJv0=1MQRA4P*xaQOlF7J3;z@v8>2S zI}M-oSrib8S2Q8KeWveWEj45yoX7oZC-e9&aK$80&8P|4hTcPKwFm{x)78Lo%jyf2WgJ_!N20xD1hv0bN9WjR!C>zVXb;1%XYN^40lopY*FiH9GcI#a_dEI-N$%GCk=C;{&uv3jt3)O zR12F!O*SBsqpF{ub=F8}cYK(d;@7Px5~zVuttG?EMXA5B%o70KeVr{3U)wp0CKn|d zqaaeXBT}{@8r~vOiQD)j0wQW-61vPMpK97{v#Nf4O1%~>JKM*uPamB~(jdDUzPgrx z^6oFw+(#xfJAH{LH`Wwdx`@T7&;2 zR(*bJZVU8K`x0{k1oM1RXf#pu1)9@7F82rRI&2YswWO%lK*CV{JXPwz@YVZ!H}Sgj z*RQ^7FAXj!e6#6s<7(_d)CmqZ*>ITrV0}9$(DD1Lib3`0Ayv?Pq+>-8?J;NVC}cc~ zx-`=%y_tL%`DJv6idisrj;Ud;q^ju;Nu{Q($oq0W2+gqM`W^nL7kG8yNIP&o(cyCi zb+}`{8Tdg0F{%RfV^Una4gvT`+Mm8azM}3AKoDMGvFtlPk3r`bH@q?0>!w z>Pt60rpzJK>wA2Snc_g74qtAUz#VUs%WJi!qY0-k3+RI8v%w01{gRL-+_{GvJ(Ihw zv8LOYY(%SK#lX##X(Zo?IDOf&Kb?Aede!&we{$%#{|P;rwN-EWs5QuP6SZALWSz?> z?+|nOY@(EdrarLARw?UX+%OQ~InI{}XT;Vbi~`1Wd8Gt-w}2&A}E$dUU2-8`ar zS-#bBR~t#g>FRT@UP|Avx;ctcy)#u`ekqpQM%^G~p|1_&Mfr%?a67b$c}w_dXm>(B z1!Q>clK4=p=2kEBh*`ujHg=a{yT;&P17l;bfuU*y3pClZ9r%J$j@0Fg1le@eWP%dT zPO9R8Dyrh1?5e`nd{eLryCa+1)$I$3v1@}J3tS8R3SF4+8p9k8YJz00}#V&6*+$3BT_R9~Ix`VO% z#Rp*b3#6Y5_Qh`J?`zV%FF6Q%{qA5>zsDs98v9P??QPQCE|Pt6*@4*g(*2E?-|Nal zu;&#AoAQnq?u~t~Ieb+6U3-Ml{?{Ejs=cp}F5)YN%x+G6Yf4k#(A2t zv3%+S=i>B-&Nua^JaCptPkr!gV`qBWgXiJ2hop|}?>nOu`~EXmu+w(RgXiL;`_IM+ z5|inv67#f&&o}AG51b?U3r5SQJ|v%6_9<;nkvJ!dPLlpk`NM@c^^uEk^6xJ&I^&O* z;_N?NZp1uw))SZE+$XQZc~4!1^Z#-+E_(JlT=}A06CS$)mp^zZhTreS{5QKXGQWWN zeObIU(uXDerR9DX4VPZjS%T%{M`Ti6qqE9wSgukq{zG87g7Vd{e6^_6u>7a4mB4cT zdbfCfm${(u0>$;p6_#@u7R~}!0A6VZxh<_z5r(S>#hqY$Ww5-rv$V`gCH+uXu8`a; zxl(?4iAtAYaf9RpRV$Nu!6#>V^Cc;yGU;433x($(O}ak47ZnCp^dZ0ZF@8*4^JZ7PvKi7DP*Gz{1ThOJLdHT zisq$D^3Z6@&E}NZ4`m>zqRkDK+v8HHUBRL4%d+k3CiS=5+0wYS&Gy%Qp|abotp7l~ z2~C~Ns4K_=f2tP2SPepvYV#t_M63>-^1#bAu(_^ww|@?b!CAAsDl!MT zAYTSrE2=YTE?6h3MOM;mNXnslq~v@`d8?3>2lt{J!@R!+d2bC0l6L#6Mf1?(b5FZG zBHvteOM9kveNUju)o!Pq9dl9i%&w4%e6oPCtxw>js_=RF}4>&%+tQb(9%wnO`7 zKT@xL?3WOYfXx7G5dpX66}*ilGfUip{A|Oq6HF59v0m-mHWOdAmGL8Tjwa*v$Yop6 z(mDgPt6oL2kU(6%TVmZkNRKRnuh@@3_W}gF7QmYyK}U87-s~_u$pLhPb4aJNXqhz? zx1D|zt~q{p+;-hjc;S!dVcKoSV*Uf?BfY~qNbSBUUOjC;O#RdCxc{NMap!{%qk7gn z4CD()W#X7D?e{6N(Y z#%u8Ky*J{4TQ9+Bhwp$>58MLh%Y*UtC+~{KuQ(RJzxZ%marDmk(@mG4X~tyCn>8DA zsv6N2NWmM)ptZFfVUL^}9o1-=`6AluUPo*Fv{AJ+Oh-r4On91S8DPnMMv$t@T(GP* zmg%ehZX&#Fshc_~yC3bVrE$9PYb=k2W!5oe8^TYHg)@o?Mmf8fAl1w=F8ftVIR>_8 z%J%G!@Kqsfi>Rq#no*nhaV_~)@uNKLb4|Hf;xx$E)W_Q~4}SS<_&inUXq#h1Kc;M> z^%V0e)@eOKEI$W~$9A?K#kTa(GW()v56I`!fLyuWN96mT@Hi;fd5U?yAeXUq?SH~x zmi2SU&mKS9+&@0KPDSF)20piY=b85Ll-xHYS`kgOprLUZ{PG>ozF2Q!i`^sFebzCi zj*)$7nd3{!_c&9&NG&b*N8H!BjMvoDkK%QM5Z+urq&>g;Io8_h$)>Lq|7|Dzh2&m= zz?op$7j1x_v#j|tWhuwvavvk(9T-fR{Xu{|z<*vyU9K2FChs!=x#;Z^hn`bno^;Jx6o`hE#U&5q@zZ$(<|04cc`#fH#eio0v z{wV%9<&jZo`H@#2#=|c^fP0_2%jlkG@5G&dxed4d`DUZrpS%UPKXofE`~4L-|Ne_{ z@xzzl(mz~*^X|LIlrMbnQk;GF`DMU)k^!4XU3HuRo240jO5# zul8FXzurgkd##UO?YW*wf3x=nMlAng_jT~gJ=Vp~cUv3(z3W;l=)ZRUEq=D+8d!Iq z4KZQwjj-t+6S3)@8)4)9*23Bcu803TYzu6=`v!P%r*+Y{#jo-8W@`cK{}Nc^e`9dd zU*Yb9H^V+hZHe{vUKi^ev=P=nbQ7$1$i^n!;IN4%UHiZd@!S2@!eVDFy=%(20 zq#d#0(OY5dLpH-Yhi!@p$82Y8o1U-}HaUJfYttJ8MHwrB2!?ata0 z+n>D$b~tBmiN6=NK7BXQE~6>^wmNO+(RBN>_cH!Ww>xWh)1K+JXYOI*u^*0azAup1F_U;o2vS z|Gl+;!b2^8!DAgS;*pN$aDV-ixTES3+&S+t+*MPmzo+hT+&b&`xN7npxcsHtaK$UP z;gaWX!dZX594G$%d>s4mIXL>hGjP~Fr{eItPBH0G_nwX;?>_^_K5&+)KjGnXaoq1k z51x&q9yk-n+M1e)%gm;fhyp z#Fdk8!PQf!+i=xuH=8o;*Svl^uAhDfuA6qJ*yww+*lsm;=Gp#tFW-PmU%KApX{Ya1 zugSG_(v7%w>K&u`Oa6MD5&apTzD(I4eVDR;9S8flappa^WzN00z3L&{Ht&AiJo`S} zH0y53KZv_(|A5oI8_0+pWGKSY>Owu3ID<$@o zQ|`bOua|V?w7YP*q?f#U3oe~}E3TM&rxEiPzaraM_EG!QGw#8)v+l!l-#K`iV(hEU{3RpVSjb($q7A)^KOR?CnoJ*+KORXpfS13-c43-nPuZHETH6E>o z}Y~Dwe77z;eol<$MG9Xx;+kl!9=Dz;@Xw1IxqWBXRh~elD#N3{+#0 zJQRL9>CcGoxCy@AcujmNH_BZX9F678Q<3)Y@48-j=&eQ~TqS)pm1c;CnoDchikNr8 zas}l!Fdq*rH_%HSY8AH8W`kkEavPYhx>oFu5Au}4J|~RUet#@E`=Cw7K&=22%Qk0w zXFI!%`e~i*6Oiq1Nj0KL9)R1@qIfOZW3})lYT=Dmn;GZPcn#u4Rfr_25KL9Uo2h~) zE6UU$m}o{g-ewdmDtx>9C+iN@5m#ciSfuQ zpG&Hey*<`$)FGc)TgDcXeV1sIeOGG~ipl zbijk=NDDg3f8kDf3Ern8<#`=#;VEc|%``wO=V`@oLl7fP0c5=Lxh+FwLTUr5C9j`1 z&Zy+(++nZRt8xx>j-4ra71Od=@F}HnGZa4Cvx`MFzqV z(21SE%>X`M2_zDz5hAv=mtY{v1by@~vol2;4}m;optp!H+W>Bn<`vSajIA8Q7RSah zupb4M3K|tQGBxArn2n~EDe`%c^ETUtSTTsK+=y2NeAxbwBk`-PcEP&4ABqk3J{BA9 zeInM|;{>d`>v33Tm*cVK_D5r_E%(I^yYGu#x7h@@oOLMfI&VKbdh2m`?B*j8e(_pV zoxdkq_gxPi2W^Ur*ZmJ1ztcvTxYcI(PplXYGx!*4BGr z!`+X^Z+AWsYwUV9wmkBBtg+*1SZn*^@XL*N!_U{;7@JPq7^fX~F#d4cMR@vw%W(F= zo8!!VHo(hwo{2wSc?2fiej4UHdNnRTZeQ#v+9$SxJBzCqlpjNJ9 zOxcd-H{mLeF;ljqpPjaL%t340Y_zn?{%@Ow#@3mrZ=P<{&@uzfVsE9djHjmIbz`Gy z8>bp+xvpv2XdA|0EVgZ7d}-e%<5e*h#XRfi)8v_hy7rlTNPOF#P1MnAS~_H#z)+=^-o)r_iDzO!2bG6uGigF)Qez_Ud z*~_(o!=|t7Kos#VziFTDQiz0HK*a!t4_i3mmY`XE;$w_{O)+1c-aXif52(`W8aha!JfzOf!&VT6}ud@ zvq@Rr`{cc`_v!m#uQT?;o~Q4N-A~=SG!yjLow3bPJ7CMhx5Z|MY=zAa-P)v^9Jo0) z*k@y`v&RNlYq#~V#%}9k%{|t|Z}j!8vSDDHH?0~({J$KJO0|} zXFL3ARCb+hXPI`!{Pk{YjmFWqtoyI+e`)%n=)=Bs96AQZ(RRPw<+mnJ-?inMv+hBg z;MWIjg#S8VJ^b>}30ULEP4SCEHZu9&95E69eUNPDFKXKa?wCS0<8h`q+o-tIc zXI#eT7_=XX+k6Q95Dg^b<`&K+0n8+$H?{_w>f@&;#Q_^ z%@emavDQ6S#(u1f=lE@~!SUOhblqdN!P-Y}VeIQ1BindX$#0_*cf`i0?1%{`?Szev z-xeDlvo$t3YHMtH=yurhu&prhs0mo_#Le;Z({{m*M{R@0w*L)=c3KyI-)dc8yYUxN z#aX*z;u$+(30X1{3fUGXzH0xICXnD7ToV!n{=a7wlmt` zq;1SGqTkl%?~NTU*-zRZgdH#4-y9#t-Qt`*u;sbCi}u7;=k0-QFWlF}FZHvJl=sGV z7wv6qEHh=9v39(a+FyM4H)Gr7a_S)LdPS)Z*3-V*l?P+5YmdO**HK4e&ub3DKGz?G zeQ!7l``vg9_P^;E9B}h-IOx{naqw*?icVM|rTw5=PcZ3$w@}C7*ayxwAo%F}N`Uvc z2hTCUm*pexISq&0eiDwj`&6kr%Yb2~^k=){A36tz-*u|-qd(i7@bGy!=?~}Q3UrJD!1b%T=dEfxKQ$!NdDs2ZpNh|O=GYqGu4-=(jz&s!wUZMbr}>|@!c zOJ%>XAI800_67UX^nBR|7s>vm-^H>YFZk=#vW-`p@>MfReQ6lzJS{-`{2Bn zuQPpL`ueRB>sFJ}{}Rz?I~gZ+p^WdmSGbR5|H#;wp7qyjaqgrW6TLv8uDS$2mM&ItUNihzlfzny;$7ei-kj_rC3IW`$lJ%bNOGh z-na$BZ6NNn+jVZReCeWL@#)7mUww(MKKsRVu>7a4aW2EcU-HbadAvwb zTuVwWVk?8?_DesVz})mP*lpG+=Q1n`#VO|P8RtI+EO!EPYGtroZIx!1y8-g?ip#JN zmdE2Ah;yb?gtNt}u_)e*Pp3YO#GYH@t4-F%hnua10eP5P+B9VpmUFol!g9{eCiEsG z=gZ&p1#qC4mQjb_v{Kp}}HUsC_kHqBc zG(s=h3GWQZ6B&>vvVHaM(?3Mq78T37-P|@eX}#TE+p*pTla%_o#U%*j%f7PyM&#s} zaDCU#SUU#NKJx;qE-7>7bwQN(*CHF>x}LRi+-nhz)|&mC3bY{O>p;rifn=ZqiC_m} zE{X@*5%aehA3|Nz#w+{N%(ShQ`r4JI=4E3d^J1}3J@_)Qh_?!yp&Oi2EMD1zj{nXy|VwC z<(M_JVx-Z7Vq+`X+UwzqG$ZAyL44{9SUBTlENz&E-b5ARxf=N5^#-s9gMRsZ2IaH* z?Y}piu$O!?X4tWAFQID^xC7L#pe zrYL89(#DyoW`?U=ixieJrk6_)Na~YwmJpU@rYzG=>5N#4{ZY1!5Y_-$N4-K?13`l| z@W^$CGfoNW_yZDQ9i@3fJxXo#^UJY_rt8q+pNTr}Of<@Vs*CuLShx@q4?GeZ?0+2A z-uGmzf6%$u@ZgKF{(+Zbg9Cnt_4mIN>+XFC*4gzW>~-`>c;KO1ar1=-;)T0T#-xYO zK+V&a2cF#HKQZUTE%CyMyW_6Y5670f?uegny*<`gdm>(+G8>EEd>eDy zJotaDxiNmb<6+qPm}{`!!PnxycDo!u+v6Inx&Mt=XYb!(-JMRv#O)8nQAZtvJFdGJ zPu+VtUVP{h+;HaZICRVZH=eucSiE@S(Rf`R+$Y_27A`nu7aX?V&iMJ7YfJ2naO@Sg zpdmkq)Plw6h=&o7bCfR_?uf|t%lA&Jh-q824sEe|@o7Luq7fcZJM;WuC@G)UR5QFH z+Ue&N8|_+V`{r;BnnTrS60x1OXFdD*|FQR$VRBs8`tQULlUT#d%*@QpqycF(l4eHC zOt#P%B?!c}y^7%a}pPgf$;M2n&sXjZh8C#BijNNCqWAFK$*mG_N zcAVO(V*j0|KgZ|CWj|zGf0=&N<^%7mK0f$?isg^?zlRUy+WCQK+nLYt>B&!3ThDC8 zmeX7C$%#+!@$rxG*{RR)-of|q&i;2)EPr_9Llw(!?|U0>?s-%7#_l&%KiT;cyuRag zyte%{yt?gGJoC{reR}GHr|`r(PhkC<>#^>Qb!u0?yc#QCT!|GgtiXfMJ&2`GFU6vb zi!gt~d|g~?`r7H3x_T-mubhmD4^2eZvM!8UJPuZg4u)+vuTcQ{8nS!|dC+#{Va(r+kS!yRECI0E-N--SW$_rgZbf1fxH z*bKJ82;U*F3m6Wk5IeQ(N8d>A!Egz-!voHDW0?0K)%|Ywz$w%o_qhES!-IyyF3b*2 zG0t#_bA^N0krDQIAZRG=@wp$4;SR8s`9{e0hxiW0@PJ_$;y(mK0*7jU`)DWF#W-O^ zj3b6d*<(ng9R^2PG$h(yBY;gL@B`7ZA0q3BV8;w^*rvE^oo$Q=re7n8lVx0r8-}I1 zV|cm;Mr3%ZSRb0|hQY}$>K~cOXk}lOUAB*kWrtipjb3)h^|?v(F~XUV&c^4M=c{tc z_ft6+_^VtPT`bnx?^-19QE3P~%R;rz@g`#0jA38aIj8kDtlLeUK$r6wc~^uZur3zC zElF^w3B$0eAlTK1!>KtMBWpvo?AR2A5j7#|qnt;@3@DeDSQX2rujx;}dwT-h+T#2A zP_C_U@EDy4@3ATHpO68+@#*j#m!@?ipUzbEQKrm(f!$fEfUZpVPDqD;PnOEBTk2gI zDwd5uY8LKl+$LHBXw3;UpZ%S zohp4^B~oU~e$179SX7JLCH2T!Sflm4r44;z-^>No$dKzCE&C?TERpdQIwo&veQzI2 zJ8j{E%_v#fg7P(^QL%P3%2v0dbXBYPDEiwqa+qaC64SC?wz>@^tD3d1Mi)z+(Z!Vy zk3rR=qf!0nSdB2IWwbHpX5_K49LM?C&i+-8bZ9@0x9&&FdAT1N)hydF+rO3NeibZl zMBcJmea+ks=i&UEhx^Mqw`=^|zD7hp)~Qj^#+LE*t(4a(uiM%(;<{u-6B-_$fW{5u z)z&;ZM*9~()QF-70|zp$6nHYe3P8MmgS1$XQY???bKD>(-A)-Q%6QzcEwf zyp(e~b76(O!BgbRyC=@*+V;_^(zfRug^|G&`^2a++v0<#L@`+Bh^s!Izqw+qn z?*=(WPe{KfWt(ElpBSUIYEvhwo|JJLSw)XgS>Z7j74p)8fETL&vv2h*>1I?o|5-U zw$;389Gah*fX{UM48-QQNd}Jer>FLd(t&$T8wJ>f{*d z{7;TU{l;&oyqeQLG6KqTQ*&Z~DjIDdJ6Sb7=i+SDEJO(1##;1E!bsOdUl=Gr~QkC$lwng1n|ud%X>Vh7Q3!&$2Y&euCV;uuPZZr@i?+;*aDZ=XgTQn657iuB^B~1EK#{Jt*HsVBfG=A^xfPeCJz?U;y@ztj< z;n+@ssU6t6>m7yVjOsR^eDBVWR0fz6MjBAwAC?IRpLZH$H1nZvIkkWcJA%Z|nX1!Q(%G%y^@l;C8RCe}A^| zSZMUEh-K5y`aCe>O@HQ9zPMuxE^pt0liQ?i>jyaW`G+{M{Ue-``svR;zy*1~&+YmY zXLo;!GrdxG)oYj){)$v*^fPIkqhC*@D9|&v8aU@BLink$&4hk^Woy z<{HQz*+Vf`wY(pDnY;QkwWj^>Zh4K&72Vs9?Pfgl(^`-3Zx8dFlzrVN`?qi3wgK${ zIoA&y*e1tshv++dcwetQuv6RFf3Lijz4F@3xPu3`_sz3^|8~*meU^T1TR#tcU-+5e zd&VD;_`b>KQqQMe|3H?n;modWxU^$CzSzD4XSRNZ&lw4Q_!FGl{1cp7y%fh=M&W03 zX5yRIAIH^Qujyip2M!S`euhsOmA=OU#I411!<=&iooCkP8lg5pI6pJy2PA6|h?}$x z?8|=oxsf)0o(Q?WPmC}g2v)2Afb0|V@E-b9qmUJr@87JjTmd{Dzz`U$ok-i$4B zoOc}mOxyRI-lnqdv;F919KW~?pC5Wx{rfH)!iR_V;>h3pE!;9nFfyqewrNeU&mIS- z+$mzG!Xaxq9J6P^K7BguliT2%k&mvK9hf>k153uo;~jZm9G~TY+Tgn|J=+m;Gw;WS zIv<>RbPC>IGY-_F##A7vay~rDmczby6-MN( z!jGb+;+}}H7#UFyugC&aSJh+LtS+pc*^DO^G-COLY}6zS#j^HTJUSs6PfX6jgPrME zHG33Bw^bo9F#-4ahr=_!24f%Dgl9kBfsc+I!e%*V7_Ix}_Mhm2V6Sd{1uuX0k}d|u zg}|QQ{G95s*B|ZE`k$`DhBqI_<8Q3Tx}Q9TM_zpx%b#ARTK3dZEZMjii=SMCg&P)N z!Q=B)lOCLi$q!9ZvD~w)8xt0f$GC-^3VR89>t{8iZe|l|rZ=E+O0BATT0LrKG@@W! z2@1!TBEPd3*`xDSxgCXS(?(?>sUhvA$X@1tWxiKN_(qn;YOYtKkfMk_G4hvkP4|Ig zswW(iJ>Zn)1?N;R*d@8aF2NNJDIT~lWEk!bAEA(SXp94f$2ekGY%h3?w#WUU!*O4j zNc!CqG8Fd&4Z&T3gK($c{rHjJefV+UVD($~yEk;0TGlxa(=o7}{(FOm;>W>5aCg8U z+~I#e28EB*_FGxk9Dg`w`M^Fy_B-7Z_GzB5OZAX*(_LQ&UzdHN#d>7=!7Doeu4&#H z;p`%>)lFVMMIYOk`}2iV2CXgjUu(#;NnM~XKhOJm@g z=mEDRPc+SLLD!0jnET`cgcnC)P~cGbWcc^>Wk1hUA9yBvAs{Od&ao~S93;oue=yuq zy!5@Zm-oP3w(p%E4Bx^~co&7jt1twfMIms_3s8`4<8hb1_cI=!gO3aLFZ94uorwCEAyAW_pOq2zXRS!MQRVZZ%OVr;4z?x_fOjT&ko`U5wUUt0Qj` z`#O|`z@Z`(j+J3>stSj5b;O^E?X+%n(eP-9g=b@&%DXuMzAZ^&S-x35qvBP*EeU;f zzt%+fwJpgkGE9cc&|o33S!Gyb44soF-d%s!?}OQ;(*E>kVrC{t!1 zvt6BkTn2)Avf(u@RRJh6sXJnwX5y7;9(iH0)Yv%ACpVl{q^Rdo8 zoQv?95ZfAXQ`YlQ1l)m>a#SpbOwCsr@ZBfVU;1(GFqu1iMiC-s7VCCGWsHJzu{t03 zLFNdRG2v2=lyanui;yzwv=Q`)SPz%}VItGcI>&}h$w$P*JS2=OL_(*`(lJ!`XOe{Da33{JY(~faeI@h;YK3@(`3x%|o{IOPF1Xc-hbRStUqhS!~jr zGNdl3Ldv`fBuY7XZaGrsSE`MZzU;?#w#CjaQD5AgQY1_N2h@D=b^>mp#i!gUtJ#v@V zX*qjY6*3oBA$?Jq+S~_gq`elIODd#)1u_k~i}P9U2Q9&S$tszj+gVYs;Je_#T2Vdnm)G1>FMO!Z@`Hl( z=eWXE4JcXDqOXtJ<9=~}c^tW2?w>ghe4S|v<^AP*Anm$++3$i?a*Q6TLF$r9ksN2) zX7&m>MzW2Zl`>xLXA0KJ_|;9~lYLs#Eae7d%06*Sj%+hm=Ffk46bc?`QL&u2wpsnw zqOb7LRunzfrk4E(x~)a%Z7qUyQ)YYdI*xCV@uO5ZYvp}=SoZ5tc~2f|Lg6}jy^pt` zWJ4=TpOF4izLiSWx1joo(H6=473*73E_0SX+KkeN<-LBm5f!p6`q^IdYQk~Ca0AH+ z#|gF>jm~~;&ra03H4HcV!Fg$0pYPHAAxy8|Fh(sQy4ep}!tc6`>S8L!n0eypP zmtek8M9aDYeMICHq#}9t4=}r1{@cSXTg0)*|uk@Aq z_U-!&dkC2ieyFhg%HEIguWxL^#nN>A-p3LD=wpv>7k1*t$1f@DG_d^0{@y6pUPwNW z3?L^wx0dl+L%M;){j`R3tltFhdSN+ptsAjU5dN3IazZ=8az?7snkZQM3Cn3I0zS5x zc7i|307Y~B&3+l5c^_^i_SN^IpG^C${1mrmj*X_P=oRax-TK@x^Kp#s`Y6Nh(xtU9#IVvP>&vb?7U_q->1SH*nT)Si94X+%Uj z_r0U3Md;hP`z<+UZ{yH`4{&6!yjMHk(p=OEi1(R)A>3>k`D{5~%#SU-0C}(FN0@!G zUzQ(dEawybW;}tjX}^_abUGvD8L56m&KqNo$}waVy|Kr4e2`Db&Y;FzzCCh$4w<^0UBF9Esvyd6Kf4X4lS z(Y(GVPVds(zQ>r)_xLs(KK8ll{3ZF$?A5u82XN;6KAbxH-5C0r(&5a7{W#6Gb9-@; z?V=OX$JDvl9T&Z0zF=A{pONp?D+h4w@_tS2aOnJQ96Y-d2Smp1Ik8oNIMYk)JG~wI zMSG=8KOy*TMjW5pt`WjpPJV`uk8Z~Ma(v&}`!?R%{iZ_TpKN~}Z|-^nZ|wZ3g5g)T zysTjOwJk5=={MHm$yZn7x%ZyJbDLkq!#{lm>puJxVYOr7UeW>k-0^TIoDPTL`LHWk z0NcF9urF9H{-v_Ji+!S8rXpO%fs7Zo7O!v?j%HkeW9jhgT~u&mP$k57um(Z?p^ z<$2xsv4;!na|#iXR)WEH-YBS*htI}#*w_ZZ#wQ1^h4bN1vKqD(n{Z#=ItxN&`EW09#_*hS+#Mc`y92#3BG?&rA@;D1bigoz-w0bgK%g5u6!!)V!99V4@#BC& zxZD2$70dLqonrk?-}^8)eB@0U6gJ`}5w0?-mnkO*U1{kX8fj+%zR`9V9PfysiO#Aa z2~KJmwQHN^p&;16;E}2B>T}5SR?B__#4J;6ACcl_iTF)&QL(Q9$!s@sXn*lB%6E9C zB_h~1#}f5BEW^VR5uEL<(ZQ_SW_fF!{vl~@ef^#C1K?B`2$#YjI2Q$}bu0*gW1c_k z^ZYcznB&=hL>8lkyssy}cN%}kH_-Q0{SYtAhI`j2d`j%K0fg{Kcs*F)k&qd&#-u)^b z`FImHeEvM1-2Nhbio8XIuY%v|eLmo9(hsR$|1oS4Xl&Lo*VZQPuQ& zj!9BKqo!#o`q;;aQPzx@X5=&>cJRa;^&1~8`&jp5yNSv++q90>4xd_p(8+l^7w0td znD(%Vx$y5yL(qgw1b1b@XG}7DJ5mrhK10hP-PwI&JNvQC$a{2B-xyl2c6t3GmN~C! zH+}rZ%0Bjr?Nq?Hbe)&m2<^$aX0ql^AR;IPu{=mzWt!({)ULcWuF3MTtJT;KdA>#?%n6-CSGh`mA)6X%XQ*+c$UvPISBBo>@c4j`}X2~&|k%#E%*=l2F=8CTX33CdN zG_M57^NW!z3kn}@R+T)~iqds$eLil3s@`acGS`UmCm5|hMx(>ao@__Orgl_5H5%m`3CEjJ zw7v-?8%Alp?8#OY%M|+>RmqszjiXWb^C3?JNQ*ZS6ljAMmyw|eby591X_@3?*+o`to>2YXzW*pj{ z8L!(P{ahDDztD}27kV(}#hyMp=J{^*6RI=vz2n8nXn&Cq-V!0-{v07b;XOh6caiFZ z?jz-@*Ei0}m&q9g33Z05nMe(-(g%nbr_dUAH>B|2XNu!ezmMy%e0+8u@C2t?^RGvOE7-+*d9wn z`B4ibKYhdk%1<8Jp`e^mx|$DsuLUL^>jmaq_>S<3mQYk7q*&(QRWLe$WmN8&{o56O zYD$75ALH}AmPH5u`KQm~YIPBQ<>!oF_}bwYiznfW&9CCbPD|A6?p=hQT!inPzI?_8 z*0M|=byE~-Z@a1YhrG9vNe{s>y6=2l3VsRDdn3wsOP}5Esa06M_d`pn73rf;{1%q| zn1Y62ko~!h-Mikk0B5GAk?m=E7w#)zyzCF#EwAyN-u>C!3#2VTTj%6^aIp71koJM? zCylOHXaE5J^hrcPRDDsoCgRq>M~Yyvzt8xM2<%O23j-!O7yB82X`KA9wu}UmX1qXJj9bosjR7Gut&E@S*d2aq!$896YmIwddsL3WxWf zmhYakI}}tCOmmUBlUEN~AhNd0J{g!SW0=pFIfhM{=`)xLL(^dFc^8}I`{To%Z{fXd zKgB!SUc*~kU&Bv7eG#v1egUt1_zYfp{~5ga-X=Wy{3<;5!b+@ragExCpIw2K8y92Q z`UP10=xoeiGgCAj^H$Hm+*MOW(=lh|6wF>RRWun3AD*rLX-j)BVNN^Rr!=8)LM3X) zmZP$xRC5EDjFX4H_5x&$%0^mU8j@;~kyx3C_{s!C7DghnI0`W(F^DaXLtI%LqDx~C zRTPDYqDXkA`)c&7wcIm&`yyr;5z8o8<8w~&)QD9^#X812!z0lJ-YHyIP1=%0so`+U zNQP}j9)_e_uXiU|7~73{UTZYjy=@u3L({B7emC+n_e) z#~7112$S-hv3yJ8f#fcyc=)@bZ9-e>i-Tis2NL1h>cp#Fo~>A*K*R zqpRVXKLl<^e( z^l5HjMh};Ss5CclMFd<*L%)kG7C&`SR7T3Mr##c#$l`Z#QK27=nt`o=SwnUTtU^R}kI zyD?sTF}i(PZdaq5WnThECF@xKrbLCmz76p@*1IlN=Q9z?lvk6?Qx^@F8hIVP`|ep2 zjo?u!@Trc5M`;+U7q=@^KKiQ**!9b!D4*M;aGWqdpgtaf4GG%UlnI`5rc~moJ+ET# z-=DztZx3S6FOMk*=X>a17Kw<)WO$dz@yri|hs@QrVJ4p5`x=63<54`b4hR4F3}RZ+ zwU1wUBmydd=Bh=EH}EF2o5F|sZK z!|TE^yfG5CqheH!?eaR?6XDPn566}`t=qT8VMJ3Dyt*>sJSGVvo1-zTAwqrZN1sba zGF(TCm9Z|Z32)KK7+pW*=kO?jh2Cz4LjG5x%NbQopiaPUfVY9y1l@$%gw>|rU+ixbFg6W=oieY;Uyg~F952t7 zc(uNA3~7DZ<@}d6>wfgHpLd%DtaJN><`lPUz&p2LEcc7;+-L18+m4u!jquJ)gm$Fs zc@@;2q6!(4roQN|T!f9yP(@A1QPEE^%}S8GPXy$I&ji*1u4NY#48lpOViPR!IY zK{d+?s-+w;EgykXb2LJo5I(w_(dTjurlw)U>;goLPsfscFC0yB!LI}C@gF1a#{U_1 z7p{gmVL@XI(#9tvq(hGPSb3jhyW9rhIOnFKr{}Bar%avTo;H4VF`{P{B4$>Ritw8d zT%kVqSNc(e?iAaseH=>|PADEb-2%tsXBH?lPng9vi&Z#2yGXW|kGL5YsLnb;HsN;4 z!Xkyr@pE$3NBB&rO+R5ZA#{H@O;~Q=Ga)Xcwh5`Dr)42Rj$iDI93;-m*XU|OUxmyM zRav6gIe#zw=6Ln@!f{#y<7o+@4cw-+hUpwfzryEUKcmH2*C_W@wU(%O*^Wkk%Y58^ zpIuts2f?*}uO%$EhUNt;Yc*=z8k*CxP6%GUt_39zkLrW=27+_{${uZ1*iGoI5!4$x zP_(u|``2#l(DAIZoe-RUV+q%J9Qb-zuY9~sQqo0)bUEQS;W(q$3CCGxdK5zQ{5A60q-;d6PO*hS3Vc8HG)F zUMJgCFuq}oLUBfj)3Q!Kp)nzK8zZ~LHi*Ag=4lc?p*3MPVR?nTKA-kb__l?kbWI(` zzBt*^XHyp%H*}(YeTQ1sHLp0~`Njzt{p=*I)31R1iE%2n(bxL)1O?>Aaz6;l+n?cx>$`om;It;8~d1kl%|*I(*!vVjGmvQ zx!q|A$qB>>&uP==mmyKU6POx^KIVF-zwOz{nEKXYRIM0=hUKja%fJ53b)3F*Kw-H_ z!*Vk$x1?hEK3HxYsQH(|a&j(fSpNIp{RV{PzxmZ~tw8y0SpL_p+pzqvT)+SA@9@Xp z{{g@K&9C}k`4?YY>;>Kgy_BRGD1H?CbdfoqqJRYr;qm8YbT}8@%^}Xd><~z*gi>}p#0p?eG0};AKI<< z?2)||aDH$XP8{5h6Z?1I*#6IPeBXAB`lbKW;hi{f;B%Zfv<)W@ZnJ=MM&9nWL;@e$ z^NF?}-M>ZCQxJ+WJ%y>C-0=y%+VwdubCJKjpWyQ&pW?l}Z_1dD@Y}cE!8diy_?J*` zT=pD+e_FW+fAi@_IP}qnIDTjkcJF-`yY{>Z<}Tm2!y@L6)_l=>EP0`sLz<$W>fh(c zzRiE;r|;OxS;RAc6&mMyFcX3F{T#WPp z_fw>i(9(zfId1Af3&~Yqg-_C5F>3r)@?9~p4PN;zP;Pu!Om@O;MieCZd-sk z=dpltd2I(jkv2wm%WIKsX>ND%vmfhhKXUj}93YSv9X#}j+WiNZBbn(Ym|yu_96v#* z`+kk7;U zeF|Zj>zH|pnah~qmQla^PkfHUXLjlWa++pCUMtgT96I(n00%+%zK)#Ot`Wur#0Sss z!2a`}s}5e=j>DICst#P(hW%${o?aa|_c;z-*p6dYcH_*K2XXOd$8h*Zl^M8E&BWynL5k5Nk2{xbl6d#`W81EhZ z5N{uP4{sfOSM7`2UQxa9`OA3rvlsBx$Is%44>n=lI~(xG+Z*uU>+A5)+fQKe>yKj2 zt1B`8?T4`Z#aY<2suhQ3RO4rn-uSKaF#Ma(F#Iai34b5phAUBi*j|!==Ua2}(6nlF z&Zt7=)C%N_Eu7Pg!dat`JE<0_o$>(LS%CO)IY{ovL}qISa_iHPS(ApSx)cQ0B_XmQ z8Ig7I2&;}ka782n%fb;*8m5-=EeeKrK_EPG{ot1EqjJyjg;#!nE-dDl;R)9~AGqZD zs`X%GY8E4Uy%10t4$q<>@%h8OAOLRp?Bl2X`mD_5#&I&Ar}X2Tw5+>Jf8UZ&_>=@G z1fyl$uPg*U#UYlyr6F)H35IJSqj7!VnCqi?a=psr!J;Y>{?$=x3B$a~!_?1Qyxvl# zFQ6tGz66)zV?D4oM#ZvQQ6QZ2<#jWMuWW;2+0;1)BUl4#;t*694ZoTQU3AU4I1+AU z8StvALO|^VIOL3nZTb{AWzU0s);u`oEPzw)eAuUT!6T~~VY$V~C`d+Gekev4dSiY= z5H?Lq#hWY2@$8~p{8S$Nw!F9$Q#xvK$Kav3!zln^Sxs;Z&%?;5R5+*RBcgH)+%uct zmD7zu(PJ?pWj^jpT!cHK7vTQnMHm`CSyQour<9_$wi=V#%Q3An6)VQ&Bg4%G6N^3Y z*pzHMGA$3!ts097E&1^A_rOTsP}s-hA);;)h9s5Bv95wgX#rddj3L(d$zu?e$UckYh$5%V=K$T!pw& zCln^^CEO+KCG;h{RfsI_IW5N!G&`1uYRU@&UIJii5h(kOl5ID}Ydb|>U|Xt!W}l`6 z72DaLkeOmcF=00QSohUPV-fqCc?p?yo>7TvS?65t^%j85G#a!_qrox$Z7FKaIQCPx zEtdPH;99orT5Cz?K|d|$;cL~@90cmpK7w@_>sS+mp^Ol(h(JJFI&8UMU{w@G%ID9a zEDR3(ywqCYJfq2nui2hJgH@6K> zZhjVvpIV05kIhAKM=6eddjbwIuDXb2sGLVkXX95C2A2#Ugw-Zs#k=e9+<~9s@vYCH zacPI<{SGLJKzwsLBCF+n$nr;Odlo$9GoLj+4{scM8}FU^0GrQ$qUG3@WY}f7!@kf5 zjurAbu9kDA*0PA8UxS=~T==mh0Ksx>yPueby?=iMZ(sTtC3EX>cg#?@%6APxJI_y- zsxUZK%W)Va&3c#TSDbouvLmySd@k4b>jXbZ$9I4893izM%b$|jne zQV`w?#tE>!I#U#Ka~z}4U1T1IM%lNzPz)~jhjXiZW@Q{LbBUYznftpBPLGOH>nr<2 z5KYTA|Ix_`tpmo$IWMABa4n+slzsP-*FbrXm3@9naD{?Bs03Ps~DGPbNYpWy6J$*%MMRwTllf>hZOY1ewQSFqd1#qN zMYkufnfpt>Mul5#hoGG4U37eJ`WKV##iV&L{Y<)<{FQ{%1lI%GoRtlIb*4`-=~P%} zniaMiOTQ%txomgsD23P7HPc6QY+r+OFW7 zVvcf(;|R*BqDMw)6uF5gw-$YjBL6-qJb%3PmR9Fk-(s1w*H4hH0A4I3)GMB_ComU3Q?OW4G}WWx(b1^ujXI~Fi>GoCQ!emXzpx3P zpZ^Ru{^0_ye{~8suAIcruV2u}axU;mF#g50i<*LkBA;Tu^8Pu?2ZG_>es$#s#4#5X zmJ`JP@ejYVurNlJ|MvIz4wU}^zx}>Hn;`#;I*0~e-O7!LVlM2o+pFe^xZ=Auo z^9OO_x(RQW!fJi1G?NA0O&^zFfkBfCXAas2Qu96Q8( z;&*z*o{ z?tWYC9uqMumO!2PktwElF*?XdTt?&``xJz{1iMBAr39wiw!ft!2xi?tR6<_^mnpM7 zGcV^nesU{LocbImnIqV0zu1S{J$hVTyR@G=vt83y9ApHr*xk}+7t@Gv|3y1x+!5(} z=%^e|nVVu?*3FomOfMqZwO?NEf%mcZ(1+M}SYGcD>3{TNt?xPbfwozTzFmhtz&6>= z=ThD-V|K`xoic`Enc61fw@Uv{_r9b0Ot!T}wnZPc@6=Z8Iq{il@5wFL%|+*W=d$)w zENg`D#oah|X%7ya+ksP;_u<6FJverL7ml9WsXB6Y2M)=xJ0QoAWwsr^Am^d)uUghm-`Ho-_5C<` zeV_V|T-k+#7j|Obg&o*=dJDG8eB0%9GS$V-GuzZ|mG_T};wfN0_CDS{`kvZ%4!(__ z?)eGc*!>f{d*E$6`_WT)`h$&l`rRk6@vZgP@Y6@}_-ha2v6ok4?JKLW;-!bM?8W6+ z`oc0Ser^dCKC=jOH_pS1^)oT~;VI}@JrNUDbfIJEShUP z7m=>`lk)@k56}An?_q%BF#L;$1CA&7;l+Ybv=sUwu{;1iCH}B44TNn~B74F48J+a_sbU&Od9ZDZL){n47J zKaKVqn~8`q=?EV!{l!LiW~o>YX-(F0?D!nScjX~&Lax?1CT3hV;>PDAX;K*ydWsO& zoui;4eqsg^m_xR^5((qm5Z*jN&W%nuXHJD%_FOn-%!5 z!k}n5e{$>Kl2Q$ytg#pwJ4WW7iJ^(}Fg$YwMr5zR@T6H75z~f%q$(7YR-(PB3=^Aj zFs~&SdH(ldUUNLw&n(C6_GHZLEI@f-B76e_VDBFXm$-67R8PT(dpYOq;9VjF$d{Y~BEel{|7MoLqr56cA2CKoheG(omP>)tv+ zHlelYOR>!PIF5Z7mCbS1xumVEDFK>DQ*~?>I%R5c#Vu_w7hM$ z9|G%>V4oWRkIHC_%=O0uOxYseZ3N%GRk3&=-Wi_qUE-MNiCvfX;<4A);qlkkWA>U^ z_(ZNrd1Fi9TO!A}Fa*Q1eRaD-GreIGJ{6wdh4-I> zW4M$4vm>@nK4-N_@XVI;E!kajjE7dn!bSEivNjO~6Du@-x<^g`ymN!#l@qAB#r@?q zMb^Z?#?uB7<>AO^OGoL%5){hk@!qfp;9BS_-&Ou_tO|r^F9=h;`zU9aLm6wR)NZ*@3ai~Z$%mhW!9ZO+*pFpL`932ER~SyP-YDPCG7n)o>k7+7rk!P1 z`JN+azm+)Nv0c9FM>Cq;B7$y4eS5aa=T5}PX^PR&tebQ#1l||u8)dUAnx4@%V`P8{d!@!Pj8#G=%d)q{ZarvmeJ_4kDc;8 zAu@H3j)VbyeHtCFz&fBa1^#1`;nyMCB|H~P(P#YDb@uU+;7eZ`HJz|oyPs&78Pa2}SQ{}p30qky5<+?R45!1_puw6c5zxNvs*vmbHt1YfY zxMK=o`S?VHk4-?3>}RO#CqcLZ@JR&n*?n;QRw6(rs3$1bNO!RWCnja!5A;?<*c z|M>$5^Rjc_${uc0NM5|QMXdqm{~cJaF#CI?@cVmYJ)iL@DDPEYu5_z@6c_c>g+13> z76BzJw}5iXB9|6eZdv$})<9$-~Ybf#giNQuBDHie&@MnNz=NU5Azl)irnd)3WX7r()boGtszW zG#VB(VcWT_3d?VNd8QARe|`DfpTqJS7ye7I{8rHXJHG{%f71_^|Ni$k!}8zugXO>e z!>?2WF}2(J|EF%l^1pKZ5G>~xmj#$xQn4r~@6B0$0n8`YA16Jby@GyP1P!)rCViEB5sH12`rAlV|sd_N!(6)VcjQ zcyzmH8x9=VhW&@PiawVzwN3rZTg=7gbU`|?x=`J|kFb0HW-ZgFi`Ge**19iKa-7=r z0ZxeBdh|1Ve11FLJNFUxpZN^G-10HLoH_;9{T*;M!WDnN>0x}me>?Wfl(%M{Doj(mX4d)~mud*8$-``*HqgYT-3?S!fO&TNtLC)j=R zGweORRqCJLr2S{*H8S#7EZg^-+S1q0)VCe`Q1rn~+J5}QKJ7cV>iD;Z)E@at z-m@EfG|G7Il^rc-jCff_pa-^v0KLM{c<1niQigVE^Niti=W@5 z&o6Dm4n{G{7((I?PJF1K_^12dz^l7oQ@yt5b+ylb{sLay{t}+s`aCv${1i5P@C4Sq zyB@25vIa|DScU~JF2($pmSWzEOEBm8MVRsQJWSm<8&jT~rJA&1MxQ1=J{?_;O~JT_ zC!%9@7ur^iN8|E#G%RaF-I5m6ENVve!X{MCZ%|dtt5+Xw*__(Gy6MY$`uH4Vbmt+f zrx4i_i;&q}fTVHRh-ptp_^4z=wx%MuDFOUTKL5@iJthkgqch>(kfhO}nj)Y%9{!DS z@F7Gh3&zMiZ`d`Ir5G%1F2r_`^l!?%R%tk;jaT4XlgRsAad}AobI-ZhX!~0ScE1 zlf7ypRfH=F3PlDyn?8Jfe4PPJ@d#{|V)T7zq+#=H?g3v9yvbyrZ)CxJ6|VXOMmgT z8*t9DsT;7aa9xgF$f^*JvxaQ8Y zg5`7Jkk$jgf=LL>Z9#l~4Qd)|F>h)c)-M^2O-mc``20$&nNy99h7?4Fd*FegLvWv+ z7XlK>;g{S18;3a9xJJOnD;l;jg>ZCaF*J29T+=5Z zEN=`7sz#x$wF%S5HDPjd3DN^cVnS6CmQSw6wsa|OgH1NKVA$;amUC^AKVo&QoaWg z;G7o(hYVkgNb|y=1Q*;LHUcggez+%OIKpa^FgVT`gOXe^G|dzKwFz)74nu(0$i_7M zICvP68Zxl=>V9l^Z9PU$9)*buCg7u^A0wb30za0y9C8EXJr9RRT^xqV_w5MTwrz?h z!ph<>ZS72WC3wRv(iOG=BQeBlFdU;?5L{~c;c;lJo&KZ6RldU;7PaEypRVKGvvQyD zvxC_8%Ofb5R0jW&P`JoL~knYhMf0H=g zu12n3Vi}!IIL^p=*4ggb9Md<>__z&|y2Jo`%52}X8~spZx$*UHGxDF1rXsjD(cqMc z4mb0d?U*?jmF_CX&bqIO7&rAFiY%u%pVrlK3iF!NGS!N8$`w9iUWN3<)yP;<)u;5ul_~;sBjcm2`x2D* zhvfv;1mp=b@{v5d=q4zBEA@xt{na0i_t$?FmYeOe&OY1*A$fmLZeTbU=%frVH*LmG zSpIz~TrFcoMQcXgBx}DZn>rykK{#bShW?U=Es(rVYg-kDGHO_JR6o+L0G)GL!*T=4 zjSMU&D8Cgfrv?J#*0KiU1If(O-)~?!7Z9aP-N-<4jWE}!@>|1lg~ppK3vn8d%rXJ9 zMqi7yhRy~|vyV0S9!UK``S*eEf%HRT3?RRi`a^UB%*|^h{BGRT-3QGLB&UyUJTF*g zG`WdFr?>!U=ZiD?VEOj*pDQf?;wuYt`q{Pf|0}TE_$^@kJ5Wv^+it`1+xkm&8o0-j7GQoxWfu7S@)AM$d0fBr-GZIgu-trsS;O-Fz}y;^6P`0iIRQCAxq;=3{62s7 zpaSm;7Z2m&r6V|VcE9S-DarTR&YR`y0a`}L0pW4Hh_KNoRS^AG%JtR7SqgM`!==-ie?ZFGXap>YM z(H=`Q?%5sKOPG9SyOg)#)E7r^;`)K!Iri$9!BfaKq2jgYnCk*5k&Reb|3`FLqr!fbH^dxa(`##y5Mh_sc!l z^Tloz%hc{0yRh@xj+^}ZzS@iZU+=?#Z}#Khw+B=^ukBLsyZy=zE${hauR>yiW5QsH z?F7UG$Df_wqWa|Qr`UY@BYbe`eY}72J-mDT9lU+?Exd8)r})W%*YVoESMloJSMc1n zXI0N^eHu@Fwh2#c-hg%QKZdn$t-;DSS7F&tS76B-E3ojDrI`BkZ1k+3f^m;c#Mm_x z(6XWf;~(ik$HQG1vuYgLSC2!->hTz}c7nE#UNau`OIj5E)-GyB)q+M;%&kMotZEcZ zuR#9PGUQGwRtTKkQ;3YNd}K_>L%PV=__5ilxQ;Buj>$yK=nO=)$%BhLz(=&CAfzz? zVa-WeCOi&pO4K_0a18q=j?2|K*w>#qVjJT7%CsEE{uKLj9Lt2RnlrN}7m<_l)dr8x z)V!Rud}yN2h;`G>zeMvPI&2~rY!Y8L7w-D*VUBhBgC}P7wb9Qy|K>}p?Y)apg-_*z zO@%6!xuBQ7Jm3XQ%7L#u?0Jn#hp+g;rWYe*MlpQ4b2Vpc(BypW!^OXt$CSBEb&)c8 zsOCew10$7d!}~ymdt)>_n&ct9ITl_`v3)Swwk$w;bc@5 z$@w4P2^UWv_(W#HKD-#-Ipg75It?Q;$G{=K8O}u&a4g7xQ(+>U3u53>7zMYI2wf1; zz;gcRr8&M!B1O?~DUBCjES$=vUJ(X|a(|U;tp#LTgKh(k>8B;sCMYK~W*b2>`>}5N z7|2e5Zp1oe<}-Z^7-yt5VKu=wWx%!BHn*cGRpfhv?S$B--SjbaYuIl68q7GBjgRx1 z?HXuq{hBGxVP3=FJa62c=B&V+$HBbL5ruLLi$maD6A$~`KzNo%!#+Czb6;PB7Z1H7 z*R(M>@DFDYQImwXPJWDiKR=GJig=VvuEpg)evK`cccXb`D|TMmgUx5QV*Tc4aQL6k zBdN0xyZ`YtDi@E2O~Cz{g2lfu0{+<{c;%Cq6_h{z>>7Ny^Brt_?;=sCn#^1Z88lDBg9*{53!mOg%R8aXsg-@ zj|rbG3tskz9cl{J*Nd6qZ}p+1L06iXt~4+{hY~TlZxf%Y@>$vO1pNdUY@G?zR2>)^&yD zYb{Wmk--Yd#VRQ8^=tIFsCxZa1?1XK#0W(l=Qa^t_d|DIi$@fepFX=E=Pw_@jjzw*`p;!Mzq)~|zrKd6|8^BuesvYs ze|;Ta{^2Wp`=@X5v;X)OU;ge(-1yyfT>H&+X}^q1|9Tl0|K$QM{PRW8d7S^3OE~|p z7t~((H}Oe3t??iH<_Hdcdr0kpZw}(X*N3tH>jT*L}RVfSzY&qUWiZ=-N14 z)xBwkYQmG#F#d_D=zM%K#;%`)(T~anbB$cU9~zCCr7fsf*od#Ey{8DNT?I&yhgVwGGbfd((kB%nsXIrMrAqF}R;5hLQKe4G?em*D z#WMZzUD*oV;-?iNaas}LrWUA8ol}mCxs_^JPna&6TBtUeU~fh-;-?ho-&yI4onEM8 zW2P0Tjh|VJ4!oyl!*gmTJmi6kV%ck2milSg z$9HC~TGlDn1LhP+-wdf|YMbAzJowMfhwq$x_{=VV_pE$)&CG+_v~0LcVYE{Y+~vW^ zZDu}Prscy~9u|GXddfqY>x5Jl%Rcg&yv4dp-Af)4y}M-_UFjFS)=O7d_(-1C(!PhC=hm zQ5gsxl?IPV+}AWzRYl;@^k94$7KT5#x#QQq4)~+bNKL~6Z+rY*tP4KPaL2ULK$Nw{ zBSZFyP&v9&&fyOEY>lo!_Si}!wdW&tT%Mdmvi%vk2$c6Ee1?2h2)%pc93=2&q;;2x z6wlEzBeoMJ7HFE2sBu|{9-pm#(~rK$&P+tfF(4=>_>PogLdyqsmI=)xfh zhB3dZ9B+c<2zg(^<^2nj_mP(MD0v^F_`?3g_Zw&~O0nAQ!qVUvOk5;Euo)7JJDugcjcO?W-WqS;X-)jPJ(+v9sFYDdnC08Nht-$NY6z_M<>RQ??P%? z2JBqDG0ZIt-tkqijjo4Z@hllT6C<*_FfzLZ4h3~^$jgI$ZZaHlV&Rk@1(%`-xRr!k zBFf7G;lz|7g@JHp9_x~5I2Oggp(qk|#i5#KoN0QPuE$RLTBlhtsa6bhHqe-TOe8qP zGGV!C<2XiL(?`oX{Ty#Vwdrf-W}RS~Fq`n&8fqJO%{=4;=KaAo=iq*@55@TmEH`7> zm-BL*8DrY%Gl1S~+j>9PZuW&^xUUq;ecNKr@j_9ayw02e_>@QEM?pg{`^5)w@sD3& z+QtQ#{qz#NviB{NbXTEyPCGt3w;g-GIE2im9L#-e9;Pno#{OTUna;%DjbrDadO_{lV4xazyd3<#ABYb$|L#%majV_oQ(hv{30$<#pV2`-A zbU3AZAa`6L&iwN^ynp-yIL0|4q)5(#Bv*|r=Nbt1Io=qY;c8hUAj=DO(IYWtK?}w& z9RvRiFWl+*Bit46VvGLF!k0G&VbsN}t3ggGP1X}K6EVL7A8nS$kqU^!E* z5PYl83Y1#|^IM7I8Ch=MF7?szmc=?n1lS6+EnWy^s#IW)M+W^Ea&#j0;8HQeT-#+Q0oOmtrrqC?M9kv<-ZBbnVy9} z+|5d^V`W<+7x^BhJSWI&7@w?S*}GfrA4FbVa&I9%O||mhgyl@dLLkn$IH&JKxt@!B zdeT)a`%TKcN&a%rV-z6wL_xhGI5!~O8mb73>2E;e#@A)@9Ksg0ObAp0o&d)rLA=@UJ-SfRNA=dp83RB`i4 z5kJ37mAFvuyBEoQj3{|=6;hT|t5TQNC@{|uKgH;9f^ki!(hIv4h>OqKPir8#!fyIy zEc+2Y6Oa>DQ~zIr<+lRpCYszjs(c`^%{l_Te>>+N$nqEvte32^fOlh!zm%}t%1^7% zTU4^91!W=v@Nz=(UP~BW(F@C&i<;wjEVy4BLmvV8e-)PZ2igB`!15nT!=j+P7l0cP ziW?E4(-M4B)_n-e=`(#AGoPQ2?hR8h_K|LkUpEPzkM^KrZI4DKx2_n6Q4fwq^YRW=$&4C}L@u3OC#pf& zoO-pUUNWmz+l?)rS%ab(l_;EEg@S42s>10NDn>HrOe)rt7ACEQrLU!peOWiYyy;~~ zo|=cWIVA}1%2qJQg?^H|vQXAlglUBlI1%N9qv5t#R-cBN$(2Z(Sb;bhn=m^c2{W>h zO5i)Q6iL&I6(qBqI!or2GJUy=>X5Ur7TF7GkU6gkX|v0 zsk17iPoxEM^*qAJA8&2F63LuTabg9jf%_@Kduqi7iyA@kBk%UJfKjg&drKT`bR zQVx}U2u!@W z;66E1K|H3CMF*0rO?df+G0ND}c}3e0a~vgV*fbKDkcIfXB>ic+Sd!`;06& zPf1hJ$1&b>*e~a%F_gDFta;9n{g__@pZUe`lKpd)hb01YN7)DG>G=xH{pI~99QWu- zQ&{dlHCK+SymmQ8gyk;sK&+C7XS0|Y#RqeW3zYecPwSJZGlESYQ1-9(mC zEJs=abAoRJ%B^8JfipD_EN8#|u-rtL8yIe2xwYtHKa<;>{}Lb+w}#}_@SL#RM3VDg z2$TWlv`j1HSD%Q0#zX|R#49WhYKultYXSmBz$H8buHka-#ALuLRz6z^rLc=Agl$+U{L;oC zAY&Yc`IN!tff(4_A1(^T9k%j%QaTWrI|<&oGcYu95{72Z!#!#9ac9aL+?O^NBl8x( zqi_xail!pId>ZnaW+5WI4xS+yaPWzNceosfg&U@zAqrek5c5ZmHF z*q8ZRa@+UISxyjaV6%|{+6E%CPFa_&ML)&YA%#Q-s-E zjFY*`*`LxyJbMAUb&hgt(Z@C_K+YA;!7&E7Q!JY~t>@*oOqqV}2j^j#+hpAw6E1`r zJ4U{vbAu2wDigug2^bXPh{%RiocrAkZ206kL{}%{>hHgTOM)kU>~SC3=Z?X)GuvS^ z#0Eam9+m1xL}|Wq`93lWaT*YAe&i)2H)0!MIe|Fq1mykOt))@r zat$<#i_+>fQm${byiS|z9j#lZ<(fy!>!V8gd>E0(0lF z7Fcflw5)q}r>f(iJ>2gojAEXnK zD@+$Z+l)2$vjpZry}(@WQ>Dzh{}e{4%V&R*T*qV^F-*fE*I6#`8PSu9@s&Y%Kg$>Y z62O0@Sz!5vSTBX;NfVP1)|IT0Z7pl?O|fo#CX$?W_NC9j za`sgqZ3VLjk^$WP{RW1c_FKt%jPY5+as$C{rSApheBGP6`(&Mpg;1Qb2I;h{Ga8++ zeC!L;QU74uO|bl{Z_f9@@-Hu*`CrRfZrb|yxed#2>o3)9SpHY8AA;pyT|cAx`o?+H zxAFx=eREa5*sfjrFD>v%8BlH@In%Fb3YOmbm5V2&{iH&3Mwx$g%X(XvLAJlKq~6)mV()rP7yqfxz9F5oNMP`N@b><_k} zbeY^VES8&yg>v&EDqK{r{)&fMq+dI#S5Y!fEbAOwwp?x)mN#p^@&{R#8;hkf$KnPV zUnjO6#Y-C0XYq61@BBG)#;Hy+Y;uL-_%CY$B1Y~NHf}*Vx5uFNeik~X-n$m#XBsZC}|Yt-p+?SZ3rk#Yk-W*vCV*>n_`;-&r1lxL6bG6r;5{pUx={ zAVKnw5i&I&!BgZRO2l&Lv;r*$O_ql%DI1wKDr|ZoLS_`|gPT6Q$paU~G9T(Fubwmn zOv_REPtDecKYbvSa^Q4A?E3$f(K3IxWgBc~oze2#FFqiUdfEb z^Pw*INt8WK#=GI)y&M3C!T7DuAY6^K!-om}SX>f~%<%~boRW(8aXCmEU5Lzf`7C$J z`8Z9^lbJ>Gkeg>&jEm>QWI3<9Me<-xh)fVYkPM_Y;F{6i)}oKVoB!@091mzqumJFJ z=?IqhD@5Ke%J|raVwq9p?8Aq9iV&QOWXAUp$`jV-sEpsV(Q@0&y{>?Ibdt`+c_Sxe zs^#{K%s#LWEw{-r+*kkB_`c|IlUjwK+&U$T$=`1Bm$Pi@%vm1ZZn05gWt^NF5uJ$& z{6j|6L zQ0`QC<=VbqEx7{^_!Yt-yc{C~ z3t$&q1lOoa*oKzFE~*LcnNwhwJ_BJbPhe#JLO7Hxz|gGmuq)_*Lw>#Ne?A=Z(&1W| zq`AvI%A(+25z&{c->sYr$Ht1{Me_NnjDu@c4BTp>`WAXMu$++GL`<7BBSx$nh)!Ae zH9l*&-oKv#)TZ6Qa5K)pYisyz>TI{(7W;B6VKwV!|EynwwM>6n_BXGMZJfhI%l9A0 zzLaU_{2a%~dFF6u^t?lH5S;P@a8I-?ob#lf?F+j!Z`>I?6rX>65Ies)3>ya<{3Ct^ zpNt^bJYa*B&#lJM8%J@!%Y8`7kHzb6Y{J?{7h=)M8F=C+>kyO|ihX}~0-YOXz{b@E zKDBZ@%EEAO#0U%vw?)V7c1)VriA77NVB_;^@&2LrHFEr}kRfsogut^Z3f^_Ga4ZUf zPh}JwGrZ9-uN4oyybASG>M?e4C!YP}Ib^rV^{QOngEHwiDjq{J-C&>Xh2gRG$ZXBh zMV%)v@4}iF9>U{qK8DinGK9;y!#<4sCaC7Zz)Yc1-Cc^s8)jqLiZ0AvI~glqSc;Oa zA`FWg3AYk|xK;+irCN@8RUlj{0^v~+1h*nTxMq0Z)lXl-6R$psX{)B=)3aN#`)`iI zzb+1Ur@JVy9$XcSVRD|@HpqKjFYjM7He%2`i)W1&#mh%T+ic#Z?_%^WIU%n?Prd-p1VafNP z{*$WrpHPJ31nGV0T6!bVtwFo-(VBTx@*Qd-%QaUzVLh*t`~jKJT-x}GTuw(q&2ecOJJ_)ROCBXQ>*l*SRp89+7;(9vcH7r1m(Sv z=BB?%&q5&XFZ)I5Vxb~a=i;5lH;@R-8ClNlGD_V*Z;dh+5uBUIbJmStL3%$i)e5bq zUYXdNf`!mr{Ir^OMds5qEWMW7vXtc-CS#-I-h$Wv2)Smt_QCQHyer=e{}?bFaC|^v z`NbG7Osxq=T30f{C&)E#O3qDr%9$%XZdQ@z5I6bB2NK6H*SJZ`LTlhRErGfL;kOj~ zi2CO%=k_V)D7Vg2Zp1nl`XnUJT2O&(Df8JUN1jgz#B&!~z&Psz`STW4_W|?%>I30R zEfMP9Cj-_0yZRwmPCv^APWOl9{UNxKf#oIz3*or6=+jgz1mX|fTBR$SRb{K>+0{zM zU$I7>jaRq)Sv!3L$+{0=I-}5;hK1=^7(Gm2u4!4UKsm)lJq;+=#XhZIxdG*rfz_ry z5Fodf>31tx190Orpq%=lG%U4GcB%-w2a*Bb1|qXg8Guf|>1*nyT_JQY^uCn_0^io{ z)-e2sG!QKRpDyr8@NLvT9gBhE29~qT_LgTSD=hDLep(+a-*I6ZzWV3OeX#u7tLOe# zVENC#xpq_P70Lq1uk^OvhUK^Qm+3Yv|0~yD0?WU?aTee33q|y^8<$kyUXw4MYnSAU z>^mrKfH-w4NNzy6f#jFZoltRsPv$Vcc=0$cT{>Zb=Az4|4&uV`eYkS&kmf7D{N*WJ z`@2i{>5ey0G^yNjLm(HunoZ+S`_y>3&~?fMag1CXJ5crHI8;484wdUWQL%0;${v-A z>%(%<6qT-}9V0g#%_xuyfAMPm8ZH;mwQ>;`%X*>Q92kGe8u9h|*+2iGCgjStxvG1{ z68=T74q3~%AdJQ4E|(jj6-_#h^Kd))a&uC&in-h@^{kckh+R>Ew8xu~ut;tu7s?IS z(prr)PhVJ#i4(H1HOdx;Qrt0XOr`?<)FsV`UQms=B}IssmnGxM5WlcOBd%!^7gr%! zZW5E^rqPsB>oCT4^0*rYtoKrs*!PN@EU88@Aypk$+rC_$nhR0 z@B8R9gm%jKvGP#ZmZUkr!^BSojY&n|=oA(GeyxnWWE5t+Milb_o{{8)(u_KH0E0n% zzUtuLuM;&AU4i&mOEfy`23`}E6IyE&xJdo-@U0L0B9={^@L_OOAVxNXYu!YHYm}Vy zG0}1g(Fwz4Zq~VNjjro$qjWpHVn6oR2k0^J@*tc6k4fpU?McD#$>|nYUYLmaMH!f# zAC2*G4w#c_kInhM_;siU;4~cn={Xqx7UGBt5&n2NBLY<|Q3&sfN8Gp!q>L>@YG*NG zddf824WrEXo+QZmkRay);Wl&J^Sp?XbB6$$e&!EPo>HhbQQD1Tw?UaG^k-aHkC2q|OwpsIFn>G_85+=eqwFg0kv*4OE zRuxh>10LyH!;%JMrk&=dtzcgRrr;!PYB#uyOPASo7+mxFGjFTaRx= z`!u<)sL8>E?opV~)rc`Y4Hz@C6}FKM_yWI__tjm2_wZaF*n|y+XHf|J3qtYmD{C=# z#Wc)a*n^&#qw&JW&#T`q$qhcG;czMp)Liu=xZtw9*NjM?^zbySdt)6|zq}gr9-oJ( zl4uWc5vH|0!$vxYsLLB<)C|*DEK5T;S*B?rTmCNg|36t;tNXtKv znz*nhqx!?)RuiGAT0EQNx-g1BS+>WB@>)xzIRUx#0-uEBc6E^|1?G$j7ZH{ddJ~k} z*2{K!VL9`W)7m#i-%@r>(QsWW8%PHPF zF_jGGBH-pd6z8X(fScR*llu)_4@T~lbYV~FXYQv=lzQNJ%bGAjaz8^q7xkpoML*>} zjBCsA8Xi805#Sc9_i0ls5#iCYt$691I!>v6WMSEdZ zbp$deq##PR9W8TF5i&lqCkyd%pPnH1?fj=&tlVExESr8&vM=mM={VUBmT9%0+!xYD z@}5KHiJe}cbN07!@=TCCs{|?X+`xahrpj|cx;z)8%d)PgEx%kxam;#%a2 zvKKL8yc${J&tF{ACjxLILUGE}t@|-JisG|U;c^RfR`4v(I0ld#n9cI{$@IIGtfRCC z(tj0}n=uBKGldDE_pM~zPC#xTxoPVU$NS3~d=rctIBvjqr99J8)_&8EvWDaR#R&Ae z$2&Fk3IRX&jgjSq=H-u#)-){t6|9q4I<*LV}F0vj&Rmi?k zKLpE7#JPdwtegDi#%C4>C2ThEob3wFH;(^a{SYj-PT4Y$%ou7QSl;%+!Zd~Db<10C3Cq8@aQc4?%YX6hb%o;nVL5$l zyA8{4>o3)9SpHY8Km6|Z_|qT$h~NG8*L|>@Ur2=8H*`_Y@6xcCoaH7B3t>5PmJ@~( zm^1YX#j*k9*3g`F>&S9Tj`Gtg`k1@?;^h;#aOpTMUpS5{BEs^kXAa{k^Oj#ZhVwU$ z-vOd?~-&jq>Nmp=48ss{ARrV2cVKZAJbgaxs5+6mr)#BX_k} zD`m(T11ACmHtYNS0_hb*}f$XPQA`DLeJPq^58L1G`SG*ljPx~w;nSw zA2G~FEp_^t7Kf=Q2%ot~WpGEDNNi^+LdU1e!xA5Ua^*pX4@mi%zddAJnu>jBO~0s# zd~nJ|xIENR^qYPbrK^}roHlG+wrne-FRg)ps~p?WTvRh1{>|~aKU_pJpfw2zlZ$je zS!UV{=9*^CY1SFd=TH^|cd=gbz)lcP7)^*xFiwa~P_0m#kXq`--``SqW{;3KzjzLj<2Ri~TVnm{T5t z!uBX6$-L1$If(2oM1Z{i_Hw>*v9B;WXA-(|kU1_FS>1dX=Axg)n!lgWnxL7`nPLud z!fXSzjo6Q3yMfb8tzr$tO+V}T*iM;z<|Z8rW#%z`t@~S#A^0}1o8#zby8+_{fSagw zMvpUcoDt-K?TK2arO&S=PNi+l7BTe##YJHK8e&zx^)c{bx{K6W#mi;hWf+;e2*a}%U{K0TxEC#hYsPGZ6)whz zz$Vz-83~)a!eMhqFl=ms5tTn3UYS$io2Dj?1&_>`a88?vVbYgT@GhmR zv)yc)WsYY`7JhH~weknUWGyo-3v+|}HparECIYUEbQZakhrz2l8u6V4D4913Zh0Z# zx&@0~Sc#1vJ%=B=J%F6X0-XBlG-9(N;p#aY4o(jsQOZ8CUhvHfLeaE3+#O?&VL86A zEeHg2(K}}cpl)s(W;{F#*)^GH?`nW=ggcf!xfDTp;joQ$g->w=yhcPb5$?fAnt-3Oy4R$;@-YY>&;kKjZvBou@pwMMQL zDXwtN@PwnB6C*O*kuW}6K8N0jZAsQeMDs`IA+tn|Yls_y6a3LWYYaZWx(|-B-y`z; zVP6rB5tShbmFwqy#oo9#-$NlWf5hd#A_&VJ=QpI>YPJh#EOZo1ztDGq<`ABf|;5 z8|C~IOA)3MRP*0l?593yHvrtgZ~}CeDKnNb{Rr7Le|x=rN6Kr|>v2m0eA{@wCh3p9 z{DGTRfAAiYqJF}Arnzyf4n=_MKS42JxO+>C0%`(t)(NZ$#0^9rNdCNj6QsAq!mBL~ z{-b4kY$KqT`Aj{qLq0dsH(-qHQ*S*`uGPB0xg0x!Z|(=TX`np!B}VR339fZpz58nV z($AD>k(0TYW)8v#jOE^lzHqKf(!0H2nVk1%aCt9y55*s^ zdGEz*xZZ2=n%5&fUJvDd%&fJ;c5aJ-65MXATmzHj9x0ysBuF%6`VlwK7unAzJ2&;dW&I;$&ZqlDW>0C{ebZAo~?B z+qPE5oN}bjWJWQ-dx*d6)9G52d3F)$rMj3KHLYq0G6q&Qi zkUh)tPui@RQWl#(uNnmlYf-qMRxRuLFWX*7t`Xym9v2x%Zov3JeJDnpXUr=@hCKIZ zsup<$Vq`hX{MW9vpU~O>Y6G$fw@nHc)6c+m)7SK)-#Sv=Y=?d5XPK5joDi91rk7!v zeatu`wsQ^xz^$Xnt<$nFUpsTPn{+Lv%>D%CB@D>=9xgWfyxBT z-zNjb3AU{x#SPT92IKvqH)VXck~KIVXf6{?ek&PBZeEw!ZlL={6gBlx~%%< z#wClaz_@|s)&PAVzo}cs(RUtSe|1e^{Ga~#dkYKu!=GS4`E6K!Thwh>{#P!-@>@lg z6P8;*`M|K8Ut%U_xkT30{^l!8UOxvF%jIJF>;zQ)q#M<*Pekd9jZgf1nM-aSW9OEtSZ1n}m^meVVm)dW za}pLIa%Q1I`Gf_sj|;1{95bg(+DcT>j5H@qmxlx{Mj0`KV>sT@&b;BFv+@x9>7TRUK>0!5B`MZlhWZkg=s;uwVxlOyt`9m?p%$o;onk&374fFKAkxfxy?K< zx`&ZG)}qh!kC;)Q{TLC=c{DoOs?O+X>pG))Oh0ZbP#!V@`M@O)20`-hp(#ar>jCl* z!$mpu^^4VGArA`H_EzKR=XhHBxkw}}>x8hhd{E-TmEq&FR1p*8^@vQJ(b!iJDPnx8lp9VoH_2f&-8IW`GC!`KKM%?KAh99 ze=U~>N`hyqKeVO@t-ntucdMp!k=MY8J4VJa<%=%ZDVBa(UC2`&E{&zE7yjfNMy&Vu zn=yTLncpl@#yqP|T}iN=BoF`cT5{{tQB;?P==MZ;@1hYuHWZ!p0oao4jlU0Y0X#+m z&LaSK4}2Bqi`UWvFr_jaIUVtuztmsOQ!hD3z2!5?e=hL6=YqI-@-Us&BHNc^$_PK7 zRymHNVpTrPG4O7RhF4=0JnAD0=w^*$}C)$fY_2Ba3}tTjJZ7gW9PwNG@|{Y#7Kg#LBm_<+ zesC)Ffn%8$983M-P!bFKqHOrqb;2%x0_<{T!!dukSW(_Xa4KFQ^E`x+MH^sW^0dtV zIEH3EgdwR5Fg$xPZ1a|3Snd)G%~^`!dCM^^Xe_akxab8yI< z1^1kJ2r7RFt{HRTCEN2YU5mS-r@*CREnI6K!`)f4VOOyfgR-Z{KJ~yhyA!rqjkqf! z4o~j>3=^JQfsvUZ2xv^{%~c)*Z-U{PSa?>)^`>HphkK2b>tf(uE9VfSa~op&AhUta zCii#$GT||0?Ke=`z-R-wO+RbsY#=p3GodqotTT|BZARQDBkO*gk7FtJqu7P00#uc1<3hh0|%Eu2#)iEN3=WaqFgX2(jLQ8z2H+73-{7U zd7pjZkmd`!I5(u!%J*ix4~DrsfaYJ3GrTW7&I|#N39`G%RL}ZP8#}`E* zqA&)2DgGGlJq#YZ^;1dRIhaNP-grGXv2xcPv&tu>^MR4`8J0eW;eXnt%LDaWfSMBy-@^N-Ul-%}p)J=i~Ixe;@gTQBhWXF124d()`M_ilesP8lHH z-*5Wc%J(rN-iOzPYN{~DQPFsy)E8XDQzONDK{mlP&kF)-Z$^Um!f{4|YjinZle8HK zPHDUN*v2}`Cc2!Kbk{5t%yM0$b$TFS540-Uo)BA&Ns9e*T>WhGzKjac@>pz_cw&h-c`=dYH%Jw6B`*1(_1FuPG#&tRLhvIIz z_Y{9fdy>wnY0zX_{8yF!SS*&?j-AH!M~aX>r4U)&`Eq^FNAlP__)RWAob2Z$IX6El z2*$rgILkf5aKO_ESHrz9N3L5ra{Z5!xuaw|gxE2%PZYtsDM!fuSu0ZZ(ezizeo;|l zW#7fda{njr-&ssq#`I)qTIRinY2%Ofth0Xt>!L)dC--mx|9pKd8B>dpDX%S7`taX! z*6nHX+Ncz28h_m9kM;bAnatZO){WnklcyITb*3Dv*(J!FTc+t-;^baFZkmjpo`=Ml z1xS`>lGM2+3aSaq6K3SA*iM-``%1~v}UZCldw2tPI2GdESqho zF-Xa3PSegdBQEMng-?|8wO6c1PR>$sJt(7C*+!JiMSnE+N%k#B?ma`~9yDycoVQ)_ z-pYL<*S+F#iI?Xarn%7{6hxZtrWcUYvW-xj0DK^^&9oDg6Ot30oAfP&<%FIcFV9p+ z&b;LWq=cb_ zdG+ktTf*|MFI~{J@xHu%Nh80%{PL3OHY~rb|F?A;mjAWuH@{V2{+nO_TOTavmk|N? zm)Fl}3KmP=a;f*i@~^I(!&jHNxTk!vUH%S;8&GZy$gRr*!SXN9pH^MFXo2PDuAIQx z%g6ho%NbQ}VEL7+$8q+{6S)4HFVX$@Y?M6IhT509QSs9*l)p9s1<#L0&Qop3+1P@N z_033GTZha?M_EJ&zNQ%&t8Nyf!!uVl_KDHu#>Yr;YcVpMN?l&7(g^b9tk-Fp6O;PH zq(w22-n2}!LK&YfTsf~85sQluv$z;(bE}Xus}|XFDs{ol_<6Oc@5#eUB|dny&=YMP z8AzTcbIzzi^sGw6%+C|a4c%NWs8fQNS;dH!8%b-?$Atlzio?_?*6FvT;-F=nd65eg z>Js=;EHm<#P%xm&0(c39O*=(cZCN0QP+5F(qsFupn!~Y+u#*s!5xw%zB$m+6vTDC< zhj3gTUP8MwHCl(3Q9V&p@+?t2Vl~QVV)jkyiw2VRpx%cbM)+_J0%1lR5em~X>PP36 z*I@jNhEh1J?XnLdF0RTv(8e0SwbfK9^1u)*3XunZAW9x40_A~#(bueNG&alPXKrpr zWzkyqXYNsxht%ZqR=6tb%>Y|#Kg9=S{X2ArJWTgW|Ek@o34M+CbV{HmIrUK(KAc*2LZxv=0r8o-zL{7EkQSbOyK#|Uxe8Tz6rSpXg4CT z=CM$KEyq}oP46+)V=V1_FBE)RS^AkXo#K0|DQ)CE)jqv`O8d&Z)^+PX+^(i@k@Jbs zZamHo6O-ZEor0M5bi}u3XwFmDo)Ov?2o9z8Su=W0r!H17@9r{Bk~quSl&Vm z$(aw^f+ZN7IUmDwmWY1^?oM7L+gyu?)(r@#dI(UD4~ zUjy5+6|hN~h>?|x@j%{W+?O#9Lq(4HqhS*mfu@I+qGR213{MZ1*PE=l$_dN)-CQ_A&EY!*bRMvCVc(KeibeA1(La8t|LfLa}VbI_EWj z-fV|+ILbHzO9DrSny_9)U}Ob<#0tj9q9C|eM8i2h1ir5U_9e;-57^!bcVBxr``N-d&;dcIfe6kChmFTQ z@W~HHK!JS6M7d#v%oPys4j1ncaP=7p?+|B<^c(`OSeYjyNTc3uyzfJFZ3>baGH|#1 zy|~Zge)vRrA~eDm4vxc+o|}w_lrRjFZG{xbdzBT0!HKR&>MDeN5zo^|49S=8$ud8^ zC*T6-!{z(Zz;Q;CYeac(ouJ%7#t@XdHpjtPmuu>ulAR@`L6~_|AA9$`4LHbkSrJzM48p*aeS7$*>?k9Fq;`TX;T0qINYBCnS}$npnTx2h2R zk=CxrN3K_%@}0`-m7jcn1*)Hx^^pZ$7@F@P-@EQ=-5MfbUlR=5Drv8lb4Bck3V*fS z4)=xI8eZ;)Atl}zROE@l#a`OiYn1GlT>E&9^OfVl{owrEzJ0NrSLFe4sbIc*d0q0^ z)E}P3a*StfxEvSx9+UlYmG{f7B3R3`+P5-9QwO=02WdO&^n2CFHMKrc^Y!yu%O5Tn zxDYDuO>9#Fl4|5Uu1|rp+*<|7d)*@6!B2({!gD=bfw>vW=As|c-Q zdCgdiTHA@1hsUYLZ=8w=o2H@bsp;r`dIlyw zI}4MZn~llO&%vY@=AiqfSs4G~OpJSB20EXg{%4x<(}kG)lLeUc`h4`fIv3rq$e3Oc zwoQ9`38ucY1XJE#takc)%P{N1hcNGx)mZS^TCCc)2`lzIi3fLWz_K0dv2^=7wX8q1 z`w6T&@&X<^{5&2x_$(ei@C?@Oe;RA{J=Ld8r(eg$Q?KF4ldr0M`s`2f%(*vIPo4P* zo<1-3+)uIT>`&CP{_MrK@ciX>@Z#0?@XC!3`}EqEoALTrAFE#d;v>9#{R4dbuLrRC zU-qk5{^Z{d;?rLp!e_rej4i)8f_?wze4lpz`x)%`<4J7)!wI!J|8xq+aZPm$R|nK# zT*47t?i1_OQC#U8$Fg-B%k-Hx>-kLIgSdbLvQONHLsDNM$C**^nezP0Jmw8gb))vl z@&993-XD}34dgdt{wuJ&e;OA0IG2ei9|)FPL*s!!xoM*Y8gomVf#6xdCDM zjjI=MO?3VGdCh##AC?;cZgd-#-`4-OZo~4wa{cz#ztOzq{b4zwH@`%_`N9D6a~2Vl zi@v;c9@j6O>s#RShcpl@zkcBqzCQOIEWdF16wY2ffiqW*Yjinb`L(l0aQzgc%Mal? z+rB!1%fI~sof~GMa7CLX^~%d*QTW0bWIr`ZK{=JRew4!Uw6%>$U(?VR5uX0g&B}PN z!ICm%i6!+)=0lB|awUDaB?SxXOwE$EtWNteT?#Gh?8A22)TQ+r;hnUorZ>vFQX{(= zfz2pyOZ2uSirW(XO=w<%$a(pQnOlgI=@m$uQi%D3lxK$E*CXq1+4g z9qEXhSc0f-Mk7f3^h|`!OhfpzY(!4UyGc<~^ASCbxv!b`I$I-bjGy8nftou}9@4`3 z_sS^+;xAOI`LRW;Gj}$9M*aJ6ECHk?nuie5fLy}Wc#SYJc`Yq@HZ8d>Y1xnc_2H^H zTBDq4`QX54Xo^v@gx}WbL0BgECLE_2<--UgM(I$D4${;lB9_^v5kq5TtcZS7rk@ed zjM%0uX-(4l>TF}AG^Kw_Zv8IjHY1}=)U=UxyO%s<8?ml`XBL?@&GRY`O3w1Y#=NBz z7m1`y-7NZL*A%G_)y%zZFAtrRZDWKbDy<-eR;;aEsJAv@laZ}aqd3gE$@f$!y z;|~=4!GYEqmTS9+e*Ta_prAi^jFmA~(g=I@ld^Rm`nVm>&J4}v&NMUx<__J7aO_F4 z{5@Uzx=u`o{Umw#?TJHVM+BN00`Nq>FRq1o0A8;6PmdA!PcJ+C$-^DTBK$Bz9;%bZ z$#I{O1fS^{2$kc&h^z$uD}+BB)kGt(Bn*K~Nr;-5hvXS0`ZwydS*1vyUDhYo>8DuF zoLhmcd6lY+IpuxrCiMzawpiyRHz{09Y88`ig(+N&%vkFbFO+p3lZM5lTQRbL@@(l} zDDyKNiv^k+IBsNoY^NnqCs?Q0#=PVd^OiF=ImO)Np>6W{7nxk;w^C%g%s)CE5%S&{ zSk7p{(9y*RYHLJD%VfBeOod~?LO2zzhHd^z*cYybbLm>xiM20&5_Ux!;aIc|&IM~U zr@4L364>W1g?+(t49i{&r;=3~Y3`K26eE(SAf#jw?894Na~EN`7i@myF7icW(F}Ox z%!XUxV$DrHJa;jMWzEOn^f|E0U4Ri;b9GL;f)%(YZ82Ob9)ZoUEZDdf!^W-vHV$R5 zac_dn5UD%X!K>n7*cQn)OP9bVaU6z}&c;1i-MBwISdX(QZA2#b7dqP%R^yX?5{wWu-HV08yHSYkZcXf z`>Q{2X5I9spJ`JF#0keuKhxL1YxXx#nn2tDZ31Z{!gjW?ueCow&J$XKY({|_pv^gq z40Jd18d%QlaX!{fnft*u&OyH!%cye7%xA`Pp-BQoM!pWO2*ltLUkoh^gdKkftC#(f z&-lo^K)4iyBB&w}2@TosObo=R$?dTDu??Jj91$8Dgu4gd0ncC$443Z`o1r$i+ifuH zB0Vs6*%VYvYDVqUHVpB%m-E5~!#qdAInV`n4EhoL!+qfD?*g0qZ7|4nC}N9}F=5FR zEZVpNg{|e<_pV`g!8gOlFgaNF zYlPcS#HB^zei=K`X)v6WQ^3&w= zWP=|Ky#pT{_!wXO?i>6Z|Aehy9l(T*voR>$Mb6n^d5>fCA5{E-eQ4>Q!*U}o@JSh1 zPDsw{9mR6r0-n8K+!~r&!*XL?_nPMMW&T(Ik8y?8>=xevH42F}; z&wqFEUtU~0#81RjYK#^)Vx0-pgyoQbE z-oi7N-owjZe1bQAz8x=K-;CG3-hy}jb~oPthkf|z&$eOH`M2@N(U(BB2FLvR>U+%#t|8M|X|K*74^M5^xoxeGWeSbWML;rCJNB++h9RAPCTBgq6 zOUP3a8$=KU7`=UAFA^3kNbZjJ+I@6ZvSf;|4pA*m!~w< zX_?Jh^3;WsxP}wBisSNHj{W;3oRIxIMdMH)*rzl_`0^9HcI`vFbm?6@fBr2zd-e?l*96ngTzFF< zHG#D?w5HY`dCdd4Ju8<+t^}rQ5LluU!9MfaMf@gypBNoxmwZkYBc>V)^3yu|8OS{N@HmZybueKiq6dwIVki znQ}4De5hHK^`J%B%fz>&4jGH<)#g4p3VG5_f5zfkq%cpo-1H~TsX&4}6woHkEmuDm zqdmnH*Oo<0{q0&yt&zndPElM9t*QO94_Q zl_Pm#IbtW4AbesG!n#V4)0T!MjR9C(=Z(^iR78z0MA+C81a;=ZuO|h56BED%8X0*? zG54W~yf#v3H!ig=0^5jn`U&(jB6@tL1t<~(ijQ?h-Lh42r%wL|3pON8={-gNU zXhvt5K1OC7+xoW~AH{lKR2SRDM;NXPe6`7gww36k9NXj6j%<#E9izde?lf8+w55;j zs3=i{_#>rHl=z}=5`8Wm@o*j^5AW^V2FJ&!&trVD=6HARh=r5L^!u)_1=cgA2tl}6 zu#B*P(A>2p2~JJ&dfJk7VKM^q5p|((k@t`}@O|VQW5hKV#AJ?fF5bxnJDtZRs~n}w z*U}%BQ>+t&6P6noek-v*BhfjAk?8c9v@DE1Cm`oPBTU`2v%hY4j78>r<~eIEO%>DI zZhR~&lxJjpM;83YWGO87mDl9ZBk!qvE`8-SGLql5ClgLR8E_k)gn*7{B#sV6S4|+c zB>CZQLfrAM{)6zJ-h(v4{BQg`@l2LK+8V-;FhP#vlyt<(amehEhnC4X@R!encWng1 zTT_tKQ;f7}@|`qA9%iPdwEjQ_SmX#C)jCrD|Y#f0-z9im;rJJXGFiDoox- z>qv1f=4lPjsez)&trgsqgplS$1k3pw+!~D_`HV1P-oH5)K8@7~ZJp8w%N+|>VPx(q z*b<7DJgl(XHvbWf$bJ|OxvSw>v>IMTE8t$R7~Unz5m>VZUX`m5*zg#9DpzZr`NgAa zmcb!n6m0Geg3X=IB1eVh5hXL=kv9jfMawiFI-|&kq|U{Vlo@cyo(tOy=1pG&$D)UD zf94{%SFOR_kuuMaIM_JkVsKa+Y&`05r%wyqvlqd?b`6GP&wzc^V%Vg0;@5 z+}bw~EH{46Yx0t_Oh4NRnhB!`pt((o?Pe}B58*ZI1k`3;1F^Y1mQ6p-*&qC~ziI0) z1HDbeyXj}(yEPm)@SNM?{AN4$uHZcPDAnF6RWX#-=~@8 z$u-Y)gzVE@x~+yutyuZoBS@~u)cON<_ru-GQT8hwu5J!UN|x)akDGjkY;+p|F@Bi1 zs0R}toPra7e-7Kf+K(Sc57%gD$I2j$Fy;>w_VPVzoq~l6e7ZF;jfq_6nl0+fTiy%I zDV8;=T<#APddq!=eQTUthhtSNQ}nZLEB6}xML%IVe*m|Wec`{v7+HR2h7*ccjmDeb z?!dNRoy2GVd=wx2av$FQb|>EX#csU&H+%4QuipE+{n-B7)A;{MX={M8Q?X0Jc_y29$UhhN0%ea~Xm z?x$62_dSQl4!wlOkG_iaM_$3Y!!Kjm=Nqtm+Y@+j`;%&yZhag}wyamXblV0j*t!lg zKU$56Z!N|6*B7Ae`5CBtq8rugxyalE6s~MR`6C@@dTKJpyfhoF&rL_wx^e2ym;3y> z^%Kyvp$CnR%b179qHJXw3VH7@_v%c;k}CJ=iPMVoy2W4&UbFbGgtXb^$X-yRKdeUf z{!_{!mwP7OH|1%WqCag; z2~uYlBY9?_DrHuYif!!6c?h1Fvz$4|OgC*SK>o@`t>>+1(7fpMvtQP-8f`CHGs-f5?>P3O zKj%S9-gM4u#+i8))IZ#+pq>DqApP-Eui~i-Z|eRM+_O*VBWh2>n}^ENEMt^Y6SHZ1>Z z*Z(jL%a>BO2I7>d_fN_4L$LhZl~Xu%?F3F*!SXLJ9LJ55hj9JWL40xj6wZ8e3g>=v z9iui(N8XxtRKG9*Rj-am`HP(>+(bw|3I!Wlkhh+B$O*_Tk>Z)l8<4S#K)gYfC1292 zg>|aT1-%PwE|MDx5$hTAYY;!J7;#gJ5Id!?PxNtty`-6Ca??}+MuJCn=gZAouG*-c z0z`D>$xU6h)}tpDB4(1@aEmqmkj^YiYL2nYznG%w03t`{BXC?U{5tax*inSkresX0 z_r!!+S7fv%AY^ndf?D(8*P03UvGH&nCpV`Z2@0HbF(NB4ZeTe5Mr=1yP%bjCkWjFH z{!7+P{!3H$CNyqmIu46G88t^ZU?ut}k4CvkZj<>%zOBjdmWKiQDE6a|i&;6z4LoyR zQjUZMQm19z5|w_ltQU={w#@`>B z8j#9%^W#B((a*7_ul^Vz4`7Vk_LYYwiqY7VsS`K{P0mFifApA`t(J8z%4+;fWn;uV z?k2~(B@K?815#(3=4of{c9BVe6DSW5K3yp)UwO#zlLrfq@sS4+v!Ep(;+c|#(13qU z{|+kf+_1clj~ z{|T1pZVuu-FNMXH~Um5vZ`%)?svaC^~ZWPo_$W7IC0K!mnNKRl*DGX<1xiz{xQ_ewDh8(w4 z-mI)+P9D1DSS(nqK)yU=6J})1bs&9a3|Z5gi0s-zXxn*&cie-ZmU|2=kM4cg*sz4O z-H*VA>xgK+j+CDJkkNY`iLGam)NvkJLpP8%a2;ubcO$XqDhehZLT2w}lnh@*aNZbf z`;tYWqF~te+mY9E9QM{Ti0QfxzxqoEYGyS0U5M|vCSzYiMEyxbHlH&Shx*i?lkK{U z;;FmfmE8whXbl3gr;yol9=Sc&kuH7gofqKOu!ZQ63)t6m1YR9$*i$=?pw6QRYdZ$t zs%ac7sz+#DEe<_=1Kwq+@TpEjNK1+V<@9`y=*kpjBcfBz&z*S)>&ih`ceW@~ly0Ce zp)z5$0&T5R;H-5Dv9+BdP*xErYo3sq(x_~O&s<(%Hl_Wo%cuyi38o3Jb!=L)u*^1& z$$o4j(6)+wtp4LHD+H(5#<6s}+`)2=%RY=?XUej!kD_0BNOy_>SNsE);vcDu`sH|> z>@%P`0sAro@yjoK3BUQR-+|444-N(%fKQ;8fy1@+RmjLqhi$J7^^G;~3-E@Q&q3_n zZ-b}Te&pq6!M4X{o_isGL_*O$mZ@P&>S26nBk5TKb@g^eO zvnkd{qtn@@QS8k7wk5!`HP%?09Bhup{>Di7bjY%8c9ZvLi81Xgvz~ua&<-VJAl=xY z&_0EhDBkUHrXTwR_NEvc6{c*Xm5N%ta5;{l{W-4MuCR@L^iL<=_o*ce^K4Vm4ug_@*6$T}qc4P&L>=B>WkD)roEANA5Es3v%(KR97DMKH~J z!f2MwB$QWVnQM-TJ2_#ePO_kHc_3QR=435Py6_yi*Gs2s7OetNz zPB5yIhAMQnMvXH<+bXRmxYmh43AI@!_$KUD8PF{cA*8?-AtYfgO0G!d|j6%Qm`%f5P&d7B}!qdB)ZG(?5qW{rDM!k>Ste(dm zvI1~-as}b8^;T({6_#63~^>6+dEZ@zB z#T9_x48m`=Xt@K+@8~Dd9a#QRpWFn? zU;MkbG5Pp$1Iq_Kxq`vZETjLqC3Mn)<&g2b$uvV??V2O zR-?j|b`-C5qG+|ll$o-fVtv7K+fLttUu2_H!6@OH^P~6GtWtjjQ_Vq*>VF;yA@ioXqhR? zv|^zp3!~mCM#0l&h1M#$8!ZNSstt=;vak>PGBTbjmxs2xvm>ZKGlsg;vR_Zh{&i9A zQVUY1s}Va~jQFuKWF2Zm>83pB9qUJl?8A!lgD8<3T6(xs%&X@+^SLM5jB>VHjkKI6 zH^Q8twDe5Rjt{$fvr}58H@iyP*`Ldmo$WPV?S&_}JU!oK8$?=WTh5lOcNfvqohc{( zr0Dr>mDZ^zJX14asB;;XxxdxcM(u92%r-*gtW{1*stdm z4|I~UY^~Rbem)HGp-GP!eK=IR5w({|o-9YgSP9~X3XPIR<$+SZ&y4YMBo5>uWmq2g zdooS*9=)RpE^`mnBJZ$_FDa$gHhgF|&wkedKOp|=%wyGyw&qu&Yk z8Od&zl{zj?;+7i_ zD!<3jjS|GI79&^oZNYps;_2yrq!~GfT9GCD99?BplYbi)X^FzaMtC4?8>Cvz`6!`${^CB1OMF&&89GzZ~Cz+s{Ei z@6yajabf6xfg2o&-_C{1J+&xVq@O__f2cH2dAH&U=o2&MGD__pxE1G}%5aK+(^gbJ z4r0<~^A`XZ+?Z3tHfcO@OZb-nEBsSQ>LeoSOgN1{nhQ0U=h2)MsKM$Q-6t3Wgpn*n z94Xsc=I{m~w=f)mN{xL@0}k_C%6(P#JgJd;2v3PpKWH6K=7_T}4sQo!;DR{9Q@BcE zZQp3M6u3V=bg{bhZD%x%%Ddn%@Lro1Qsmu)H}5yRSk1^9x9>aDeG%MKio52-VWM*? z`R$PqsBYJjI*FsJ1+Z1MtLb+Uvi*i1X5=6mcs0(=NDPjSf8t#9A=aj#!w5JQX9Ybr z89RtY?VpgMq@wca%ZkISfqVwyCJ-2i>3kGbB%cEOEargysJsd1ojP z760%SX||N6j(f&~a3=I)Dr8vFd&#TuaF+pqUyD=kT9t8gY8S3I&3{jB>=Y%Lsn}WOS)N|5}F|W@Y<3ujnmB5O~v!bGP@KxaZIXc_z&7 zyv@aKYLz$2y0c9W-Tv_c(#!AeU9-T?PuziccMpS-Rw{!0;3`v!K)So8#h7Y%W?zw4 z9o|$zV6lOA6&GII>vVm~!(S}KK=ce^SciWe)-m}-8wX2hb2GyqX2|C0amX7Ejzy_H z+|9i>DjXF$8DJqlHzukb?@mc^VZk2^)SJb40!!Jtwb-)_DxkD9)n{hK0qkA`N*u%m zM8s#jf2R(q5jdE#GCpsAFpntte%EWb!jbp}BJ*j-=@siInu7z?x-23*E<#2^nf~e77pog58Y9F% z`AJ6jmWGiY303%p_A}j^0@2Rj9BJE}T(jb@vEvqHx3Z2k&9-Xqo_=D}P}5@MJ*TK_ z-k*wabV=PGB|ZJD#9t>rUtGXLoLC0}V?G=OfL`v)YgR?|EvW9XKf|?+LY34`5mTMRIThnO&5KyV##oX3++Sw4iSVi z$!}WbqYvZY(9WZWqIsrUq%SRM9qbMwCFf4k>&2~@;Xgj<6~gP-5Wl@*Z}E1LIE)_^ z#dngpTU^EEBx{IMJFgf%oE*=K`t-$p)rP*A4M0wvYs>Z}%HMdHr(%E=6H@M}){fT~ zUY0r+%4DOKn(3bO>`;W= zioa{xpj;%2+ZNpYk#HI9EJ6TTeQ!_s_zS`lz5;oeoU&bV=(ix#!OPsh@{`$XQFN#0 zPMIhVq_E|FUig6r-mUpz>WEl0$pRC|-;fhBfl;I+?cPH6{0kWftCK^wtEUmqaSl{H zIzJO22vUgHHy4#J0-=7=;_Q9Oiv(yu@$C@(H>6Su=OJNWYxgN(t^~y-{wMfHP>V3DHTKl{k zhARygLO{oH@;shsIU%MR^8P5GjytIBvOwEKnBR2P?KN5T&^O5n?B2VH^KzDrcZoFT z8%G%$agxfFHrJH%+hLE(*3>XnfcKEVtv&|+gndoFQ%>RMiwPp#w9c@dj8*u+F#9TE z1m4w0xOpRifGiu?`N z0%5OdQ8iC_uLrWR|4|v2c|wwQy%+A#mm4K`dbghOJ*opF;*eY*L%lgyFZ6joL z=j&k*fmHIco_^_SHoOBA;jG_d8{EIRpG`vrjXWXGAUywX>=$`jpMUt;VqD+G6mA-T zt-=2IcDG~s_v{9fgHtZj(~v}iWYXW5+g7Q`KfqLc+G#r_TmL=_a;OxhOg@d`W=@PK z#qDSh-rPiOTP1Z?*a+~MEH71GPJhmvh%U7E9s+vv=92KhN@h%di*Z{0BUQ%E@G7}x z2vu74k+DzQp_%eiwI2ZL@0Cn}{7B|LFu-I$WIUxMQ*ITM0Md^{P*#bRVT#$j3}DhM zH_yvnnitm9FIl>0YMXJK{F~lvW3g6@}(_YRUuk~ zdF_PPdXAX*@Ttbybe;KFMLj3E^;iP23({of&1?P+@ACU)2$Lt8)lc8zzugzTbJ(A= z$@%^)o^azXy>SGWS?DnG%?0oFU%@{=AdG~coyk~04H-tz!^gnioOZB%4e)OQ1>=pT=Nh>Xnzd*kzp~;hgBS zRm1U+5mY7Puq>k(X!GqPxtAqLXr^0f{u+114<^Jcmq1guTSG0e1?_Z)MGIbvQ)XJA9=rpYNExmMAum;m=|=7^o>lMd7} zTYyyVZ)@G4dB{&rHA$yRzI?qAlw@aL<#$`9gxvoA* z#lbZ`RsF#DuqsUw($ruWJ|g52#!b)q>0gKHO$Zrn)L8g(yr~Ho4UzV~Wj#CK^*ed+ zYp&;;@N?weK02kpD@)oQE!-1|H`<*Vp^FLM39fhZz4iUt(n9ej52z z?9ZahRV}-0OI2Brn@q`vp%>=F?L}KL1n?}UIap7W5+cpgI9*Ed(dL>l3AR{e9TKfQ z>{`iN^t}^xWQ{I2bMIWv>I7r-a&Lzyr&{{FKqr}XF5*wIAzR&t<#++^*xp~4;iT=s zLnm!mWH>)MFsUmS@TNTZBv(!(^(KD8u^SZcM=Y}|s7>LB2=|~-lzq_HI`cjC;x`l{ zNIG!2n`b9(J!ZO=6rSN1I7T~%Fmn5tF?8{it5(yjFK)Xag7&8)U??=I2Dz#Gy%-WS znrX4H)#;NBij)2a^XCt^P2Mla!Cp1c%0!MOC?`fxJ- znCI&-ToEslKysTiYrSCiF>2Gktpv@e^(4zrPH7ciVte9uZIPNwdNjz4=x;Es6o6W? z^o4C0ie{c)ok^ZDlkjG9BhPYK5rfge=z-Q5_=^b`uT5rmO?16&OcZ{Va71A;*JPP- zS9_2*(${yVIe*%GG0nWmhO&Bq--CBCCLL-BFn7u4B|(Lo0aYp6W(Kb7W0@WonR^wx zeCHDACps&jdt|27_3IiGks>LZi@Jmey7KYEhj%4apNX1i?$C$Bo>zqyO2 z3NRjW9-5Iq{_rlKywMCZ@ehgCJi^qi`e2Kk_+DN&mCv@8muwV0&{77??=(ehVCyC^ z5Js5NAC7?|3AB3i?_W7C01&dX1KinzQ7uAom^f?0vENB5e*J{sSGZxb67@9uIoRuw zO6MO}Qc}!x5+FV=13k{y8;^`2ApE!E-NPdlFFVS4gcBOZm9$nq<;9FzJfqz@>J62c zP#>`HR7{SMA|QQVE*R;qcVYpcI%SL!943uYP*I1r$ytCFg)O0Df&W&@2agDz{+I3I zLADyTIP~f7QV}lxd#epE3k_!cE%Oe}1eDBr2jKVL2p8wy*7scB)JC`=A>A264M){_EX^}KwJj17Zq-3byLlV!e80s<$rdK;#`wxSb-&EZ?vDrHMS3F7 zzr!_F_&WAks_J-IxgX*Y-9EmV8 zN{W@gxr}YhbR+B$Tya;sIe%ZAV=Mi@wAWFoH-n+Mv+k^P!l2whv+V&8+~F3b9^5L2 zIo%bkq59|H2kw0V)CwoZ{QzU{+Rjoxrvno6;+@RFw!|};yF+)#r9$!UGA9`y%|#>x zjJ;l%z$)vh-fH*4N4oHJ5^_%gem&vx&3K=a(!T2KOnx*7PG#m8_I-s($ohj-_;8;J zg;|E2(bam->MlDsodhV`7AJ~M*5yb+>#OzLYXNwvt}xTv>m*I(Maf5 zA8WTf&im&X!PCA&RCVa?=3gRsEv7GF{h2SP(0J6<=D z0lwpQq#mGQ^bzv-b&Ohdj57Bb6%5E)%z^S++-TP$ZpZ!(;yBm(! z%sX?BW__K4ZrTYLw{tMicAi|UdslB%HXC#c&1ONJ{(an5Q~s)q7kMZzSHMp#@M}ZQ zJOsw9yk$*);RDO^nAtJxF0bwgNL%+nsBUM!KNXI1H+(3mHSv6%bJ(an?F{F8Jt2=4 zX$?dH8}EC$5wodG6dfP*?LREyH3$nv{VC73a(*-Bu0s5E-76&%_^1xXbNq9hNox)i zpoQ?Xw#OJfT@(*<*XgYgxhmsTH5(*nkw{*#sKNhbu`J0{4`M9Iw`)gXhblN(jMvLa zv5c-Iu}(00mDF-!dcNGk$RZI&vH73VMQekxG-?U?633@;uP)!mrqGA*e3wnF97wigKpy;WQ1 z%%@wq`z%&2Gc|Hx`V(1>ulhk_N&mvD%58*P%- z;L(N|QYU(2IwI$u6scgg5*b^!YCW>*UST@xRqGQveQc0amunq(q_$kR<1l2I+*DX} zL9CP|#p=v@qgH#gJW<<;)9**d?a(oH0A4^fJsPF+6*ltJ>`3N)asGbDo4`36fqx!}|&~;*tV}z-MC=7Bm=)%0O&5>7_Q`d$u)|uw5{oyd|QrO|#ORKUzM}Mb=+>7a< zeqz{O2#OgQO?tJnq8T&JwY)6Zlo8)w&u(&G_R)8WmtQ#sJG8W(9>v_~ z{(A3!c6|wdD=E$C_VkGbugf4M{J2Srt{J&kG$}SSgrtGZbqJh~X>LP~g8c!qNX-3& z_y@uDLTD41tA3%&xMnL6^MsN)4gt&fHCy}#iQp$|LL36(vmLX(t|;y^LDM>S4Z&-) zUFHJr{OZnspucY#;7Qd-gAdb{*vZ4STGWH)A!IDDC@gwIra@1h!v$SccAV!`3dHGO zdacvJ`1k9Wu==yO;HM>pM&8tlibHT8OX=Hu;M^PpxbVDmuhU$=Jr{Y z2z6`l-Bjs@uK!5D5AR!bV51%obm|*!+s+I_jpx3O-kG2QU(*TWuNYynO3J;U)wNDg z`TxVC!x9a+%O#aNZVjqgwO(wWHon9T9AhBh)#Vy_tfJMN$NTPzP@7Wvs}ma`WP1?+ zeYX-w^Ve*m+ae7*zkzk9?m$y=NM?)BScA;d{ht2t(jkbg0h2dQ&?B|(ndI95oP>H- zMQV1SExv^RaANz4Ko|&EnDE$z5Lqu`W#OB57FBwwwTMP6;Q^IeO-zHBs5XVhkc&Vz z4m9tJzG8N*zoJMz$$0q>OKE92Mdd+h(A^$|Acnj>EZg2*pU6{N&vnV$sJ z@McqDaUZI0&1p@j78)Lh)7uToDx)(T8~9eT5AQ4y4#DpT**%xNtdc>09XkcwEd`5a znO=sw#Ypd(uo<)z)1U~i=|-PDZ5^tzRieJS76V9CvZWqJ0?1@}pXL|*Q3=@y(J*kt z)y>gqq~79g_~J^32>h;Mk~K*rXDUNKyAVb*q~rjGhEji|##={i$Hl{sjDO>g^zcCR zJ0~I6_SK#F=bez06c8@A+_s2I`XMNM9~W`% z_5>O>Bqv+Uzv*TLq`Dz*pr%`$@Q6nZb)1GLp#o^4MMe-NM25z{@TIauGc)Lk?Kdto zSnmCzVHbUCycx*II2!67-(0JEj&=6g?Nju(TbwHiE#Rl8Cm6SMXg-w~rdwMyhe9$Z z;CO16o8&P4;w{o3^462-hqIX17q-Q3x701{B%5sLcSo3A!L_82-~7{oeCNSSHuNpF?fGB83k5Et};H=C9NcqPF7&5`naGsqkX!+Okslt>U=dE+E%MIVLGb}vi zkmY%FY5bw)ToQ568rtht!s={*tGr7tnrKtiMbW5wcLgy7LaznD^SdWNKWAlJb=K-~ zt|qCE^cNX4R`dH-kyM%D8JhUYalR7sPQPs#l=QZ)Qx}H0fMWzC;$ytM zKMYpBN7w9jAVNjCom(CK()ywa-1WZP%U+KIq3wRvLae*9p)m{Jm#c^mdBF1^Z~jx+ zkvb{)FXls9X*T-`zlJYcGio&))}wb;;(P$?Hc}^+I}{mq!*yed>a6uKTdSgfMqN=p z4f!U8I~bZ%q(V0(BlHe!5_}7>v>8_7>*j+0svoq?nFLW1p^rCzzKr7)YO+>pGEefq zfr!MYoy_-pm1vV<$+X(TlQf5026xsS+Yk?ASK=kCd|Sx{3ZKSM8mjp=FSG;%^?fO=w1%$-1-Qs+`p~&vwMOEr|J9R_AK(xDuRrQUrVLBk{Ia zxiMBVGl$N(K@(0*gW~5jfMS}7cZsRlsoo|_vi!oP|LI5CB)~RYY*IV_a*XFYSD9-&lO_7EjU=F z%B;pIx*kB&IZbtw*G+dXv8w=Z+O=7}J63KS;%WvA8bM>d2V>ItwiU8m_1u{r4#S&a;n$2Q(Zjs4|X^24Rf5ZIs!(Q_lUia*1 znz|?CQhT)Av78iX=cB;P`hC|Fz>m|Cg3`24ce8~F%KysD?drYK4neJJ^R=rHMm`&y zVQ$@b0Bp?nKaMhBIs2eprjUIN@6@&8_(ZM9?Tuyoa#K5=q7KD5xlczH{ z%CPY1c^GR{v^fNX1 z!)J%-qz~S$koEAF{=I02oiGF)GRUE{32}I$Sby#*_qbg9a5hg0{d)`bM5b(ifv8 z41J|N>An#91_$NbUA}0&oV0O}blmb5^@~Lly`Bhx>O60i5Qo-!KsWWhAY_<^*2@4X z$Hv?OvBXO|oRn-=w0a3jHthZ~ZGSa=S@QDi;7bnmg^|WCxV*pzKCwD@&{p~W!w!a^ zSZ9z0c!NiT|0lgy?OOV0RT!J*&hGY~Rbjn^EX2}^$?UVN$;@xKt!l_Wek7ZQx-wA#D)T0xZqH$hQiRvW(lEtb z+>YDaJ~-X@c`C@~qlkIQbo+c2-t<3Y6}jsCToaL=_8^}iUzQC%fA%54eSnI;2Vuvi za~iBi3V8M<&ttd#J!$m9XSEySA5YskCK*OQ-y|z!rG-%)Ob8z~#<<$jYL)B{D&MIr z+EONkY1~IA&kgE7FDre{;!cb)l4c+(x=L{*T;WI8zWYici3-A<&58&(aY5ZkNbZEY zqpi{YDN7q^jwn&U(Rn4vvWkf862%Dmg%##xo+(hAfcu-3D2|xrIz~qgY*Xom^7e!8 zE_w)!wa_OF(Sr&z&t75hwoWY|ou7&sLrfv^uMK$W&Nheqd5x1%DETLec8MDpIpvGpKzVk4 zW=)pEFI+iGt}VyUP)74YwBhX#Iig|i1AB#RM0xgRCY7_pXl*81dD-@eu7SiI;kW}(Y=otM8ik`7OhHD?qq?{)jj1=A-+fR0$* zY0^=*Fe6Ym;-URU@9Vi>B&Nkgmtw$M^+FD`yB*o{B|1>Up{lyAh`{H_@O+oydrMVy zjPmv$2kq~3=IKyMAnb@XoGC}r(Sl)%#WH@$b$OQIok-|xEkityhgk2Wh0#hLT2@#W zBQCG5Ac+ixl+LXwT3Ks!aH8F!Fw0kNUu>ro(;?<;8C|IQ;@d1-s3+d}+6S||Jelt^ z#KE)K0sim>T-~m3-Bs#l#riLfaCmxdTf(Qi0H1X>Bwk8c$4mM`!RDR%7}^@Y_Yx^m zXG+!G4>72mZYQj^!*G@nZ#^br(U9~o9K}IFTJDQrZ)P3da&q8V6WQM@7;PN~YL9-| zfU<>)HBYZ#qj9ZH?bj0F-LG37WeK}U^ds*Sn|9So?lcr&u^w2Pi;7@_ z<-)HG;>I~uy4R*F-Ogu<$XlfXnqjnm(oHh<#6+62?s@27l$`{XdR)6d;@cSa*vs|= z1=uGZWsqRX=_J%$DLYa;7K#QqR@;(~nM3vhO{11 zI_%xeXC!8_4dY|8n{vC?NA=js-$Ov`{Ml#btNIfDB^lZphouc>3J=HTdh?wBp~pMG zl-Qrc!;A8h>OLyWc`{8zlu2g(G^B<9{^)!Pt~rw}6u~Yl8y;dG36(8oh+Xr4%keZ9 zb;ful6{;tz23vf(PxD8dc)Hm;TM~Pb-ig)Nbbo!kOmFv}dkXA16x-WfM1WylkdONl z@r*}^6rn>rD~8-hg?spo1y&e$u~_q79BC#U1sJ%^wGXlM^4Q@Tljt|MRY{jGkglNh zHj5ZnjJ-Dzptr8d;bZ930!sLjYB zPrut+=Uwy>_#Bjb=oSLAV8;dL;>S9JP8Vs_EkF*;_R@Z+ARJux;^j9kK`sWb_in`f zU=6f*=U7O`A}1JU<&VU2>l2FRNPG+9Uf?gT;$e?yY`*vQbrd%$hI>32w{M?JpZesk zifQZg6E%NTUEqMi&;||;ayq^<-SRaKt!%h<>NGXKtu0p%PqUNPN_rFqYi{sl<;AF8 zUcFHuOQlze%?US_3R(sYYbN>b{n}tnu_cQOo)3?T;D0_7%G%Oe_9?xNZ$ae^ z2JnZ-yCmjH`HD5R-7NrN?&_K)=6P#F!p+M{Gjh$tibLwZohfLI=xu8ec4TqS4Y8j3 zsDqZ2A=}HvMBr(8ZdOz%M%_ z*fyo<&J|u!L|k<%@{R@=aTR`p-|G%AyC-aG1iYvk3;e2CeRHW|N1`Qqd$5g?4R8b` z#);I&o|js8)KTa8&jg$sFX3ny*{2Yut3^vPc!*tP0O;%5UoVhkI21Q-p-)`v&ru8K z%PZAD5=gM6&BXg&s1s!%|RedBYWg+_`#S8osyj+*YcBX4u+j} zz19^YZDiM6N^yWF<&QT_Gxc!f?V6k6O>u}Y0%$Vr{tBmlO63`SWuB%?RWdFULny;p?@LD73M@M6hU5HHstOcxeh^b*c zHbuv`lWkRfPG1{aNFH`GY>81-E*Cv zzA}csa9rV*xM~^5;?FC(lw*QgwqnC3iHizLN;uf%sBc(~eVlZ>FV9UQj&nHi`8q*L zpkz#EkW1~vIi`4r_ZzEjvzWuL{wIlie_`Bo0F~1UI)t|Ef;?YuI$U(g{rR50PRzJu zw4Iq;G}nfr7cRz2W*Bh-YT1hmY=Qy8Z2-#lwK;IFt>#801TXxM>qu5NWpvDvCV6g7PCD1{twsF~C6z1V$I9|27oO2I ziee4%*An5v#Q6gK2IR?;(OdB34zyH+2++A0NK4+j{*AzYJo)K=Yz=gW{ye)W4?pah z=)TAwFh#S~lLbD$7iOl%oBb4)|Ihf&T-|v0i11zZ;y~_^#~t6$eLl+&_1 zm?1$1GvQdKEy2;oFn=HAAy=zEvjLhVWO=4jfHjXCoE?DyqqZk(B0S3Flt9KMsFTRW z%063fE`edT-!6&Cm!z}7Y9GR!q8zk{caj=z%P(7&WKELVg zT<3Q*qU`OJ#3drKV%5RN--^ZoH%~~=(f8BLQ-p5dQX;mXw~4f4lbjtNz)Zi%q;gAU zCz+!JAB7m!U=1H^hR0%l4iKVaB{0U@43DWNjaPyYbcu5yP76#~%D4p~Y%F;WqXYp` z!({GAh2HmqbUK4WQK_i~NF)jjQ2u;Ku`qTs)=Q20{4CObE0>jru!{tPYm!K`lwX~h zKZ+nQS#u7Jr(UKc-!9prU0rkMHUIv0BCYVP#>W*4`f`|N^kwZQnn2o89k$6yAXc{L z35w`_N?zZ~6K;k7mT>5)fuxacq<~D&{NriZM=HrcC-i$Z@&g?3g|8A)Q=H`ShF!JQ3mY_Ih6`R=)0j0KhQLn`Aiw z>6i$T!sulR+0>a3E`n!I(3b2co!}l4#FM^Zr@>wLeX%AE*51>L$RNs1>Lg`beFri9 zVE(A_)<9*+s6h!bfVS=3+cJz=~eP)S&UOb7K zED0XPqum$ZWuiFFE7`y|5WkvU5DTuQK@Zp_s~04B^f$!Bta^bYKf8f_rIk6)vK;+j za5$KUBWN0 z`FOZ=h~kn6{=hXSNxp30joFYsjiLJ^^>#az3vF^ zih{Q$ok`PQuS)Q!1);d<-u9T>d8>|h$zt`pXA~cl1Um+K5?9ITy420?pDf7|U>zR@ z-?6^_Z1$r(eVxnlIQ8ZrW%zm8d7Wr1aoREPW>k|b$-DDWaNYNmht^z~SySr-JGyP= zzeAr={Xf#mw|EHjkXDX`d3{1UEhAtIF9T{~`r0fB()_ACaj{_d`rg3vnAGEXu6nyN ztt+tE@FBDqnt0KCR@k7{{1bKz>aq6!_eqB$Lw2nLVAX0ly{YbJN2XrtHR)ks-vA^T zt2ELLbUTn~3tY&qNn(QZ+f<^Mr8x{M6%@06sQN5KzoYk~MSeNYj^NSS@Il0qZ8m)v z>tLzEgq-?=Z&nOn13)qhEr(cUFeUT1vWz!ZwRz0Hojx8~q5I4#o(nZ|yS=|Ef}2U| z6*KZhixa>|!L%9q!WLGBFcX7?U%vb(E9kg)XDU_&0l~OGCx2G=1LB+YGkBRQg^5CP zI~I+EjnGZe?1`_BW=L>OQ(JPvEn^bhkh_sSqfE=?x+1j)cVPIS*AZIOE4GX!n_uFRQXhPe|fO zibxGdY7Nvl8Z?)(;&DfZv3jVCr=!l8ke{JkqlkirhxDIR61Vk@Js%X30{5!Kb)<=o zF{&$RR_Wg@_yt4ZVtZQL1wWlqRTwMj{)XNF2BdPOyH255evnru^@(i{+yW2me0*Nk0=Wms|fv!J5Pq?n<7`(r-_%2Rd;|MM^f4S2@hq6!c>Damperb>D*_p;CWcws_o3^EoyXw47%#MP_gHTJC^|Kpk61N9CeMT_d3m!nqvMM<1n?cp{(R5GfogaX1u6IXmO9SS#*x{R(A)Q zLmTOO%1Vv-yPo&zIJ)VKe-N7j=#S(xBzO0d!VkR{?_yTA!i+Ji274O(7N5$EFOxb8 z5NpgGs9F#GcCesvEs5Gk=tIF{EZqnYoE;OB%RO9GXRHWv9O|}nE@6{4^Lth@MeA;g zQxha<*Wm|}gjH`sgI{05t;K$BWERQow*s1ZO*vtm|Ge#O z+a;3BY{r{y2poznI;+Z+(1I8T&&TwLRlhf7m@wU#MJHoa479Z4deZr}v9NoFd20g# zrlBraQvK#!dm1-I!5q7vY5z5yYD+VTrL}jjF;1#sr5s+Rx{EPi>D!PyPoLZv$3FPo zxV_xNe$O*`k2&`zSbsN8xNJu3Gn2@k?!;X3e;x|v<3T4y|J`3=5@2ojuIM?2h4FPV z#13LM<==1u)IM3Snpj(z_zj0E$}AxD3+3fK%Fe^b1#NVR54y0i{@vBJjUc zg66QKK>QliFchK`4T7!PmkqwNe#7Ut^aEj|W_guE= zFsDI9&)#R(~8N;cf$gZMv3Qkh!KUBrJWO`I@2f_bor8+V6mQp>AO_H zw=}GlW&*S$rr4TP%2nC}3Znp(J!=#4(zK+LHgXPu&C)Kq~c6D(I!! z70>@kXxENQHf56&S+^G#jr*BB$9uWLia*sG%loN8M1J*;)D=izn%6#-UQ?^8JKI&! zIgXcfiZsW(YrfkeT3F2iFFBRI7(Y&Y{@Gq-_6sa-kAMk&EnZ z{<2*os%}hwHNNcuFFXs`f$!S`I?^ZP6(%_>teVz2z0NFDrB)D0ym&wWAT%xa2Q-3$ zfodV#8Eze#=J}I7sn>I7zl@d6@|odN(_6b3M);dKX4VX^gdEd{%m?qx54n&-*0`$b zs-VnG+Rf6xR(?+ll0$y4g^a&k*ocBUR1VH(ek@)rsS;2hRQa9902^wS%d`&j#zpg*0vtBOFVzZw5noYBHH~n*~$@bM-`M&JOvWA`dTFlETIJIXF zLhXL#sp|!~Pd?4p_z+&^>GZEMq+zidde~!yiFVin!$q$vW_=@5*<;Q5Q4rcqZBbbn z-chCsYSykdhYLdemSl2MbnYVd4}FMu$+vkIwIS$U z>t{(L)oa^pw~O8ZH!an@b*P*%N9$6@=sS>Bpi<_n=8D&Qa1<%4CzKh!*pOya7FXV= z{F;5X+Nc!R_}0E$DTp1y`_}&d##)`hmsZxn1x^=oj1hqnmUhdG`0VOJ?m|7VpC`CuMd;olaLvk}Em9nKA}41Iea& zD%p3i5w?eU6fX`W2V|QVtZ?rv&Y+7C2C0oYQ%)7Z$9{&Aqc0iHZs9oDvCo6gMH)Pc zU@>B2*&!7iO-XutmP2BF1J6R}8#+lIO)dC{uZ&;L%Zjw?v#6|X3``TIgCH^nf@M;n z*r}%|^_AV3p7XkoHMw82;X+9uxYsp>y$GVcU}p!fm04rf(dXFTVh5fD*c9o^uLWezfB7@=K&@*3S}RYM%Hv$=lRqcVjX^ewa_2j(Gp$$ z@g2^yN$aF_(RVFe|Ao6rp;0;ieOXf>F|77S+AlqLzeMy%`*I_8Ct`^(V7kXS(QPhbY z1heM6K(<0m33%zoj58&TpuLg*CbMKYFRpf5?4J;Zc!3+VUT?|-=%6Wmov`~E1<(w; zw}}s*H;)RH^_IQ&ZeW6@;Q`}YE2XqDga_$Y9DEXptl9DdGTc(-B*1R`cB0|l=}as{ zNKuwDsTRd|S28@MJ-j(LLQee!<5Td8xN|QkZ@CD~PM{W`eWJz<&wVzBpVNJOr6g*5 z)ka4b$YhMleVvi~rahn<(eZA0a(w*!J7B{OO|gL5h4!urS0@61X0Re~QaQcSXjR-u z^4~fuVmx{}7O?4!Wz4jNVXCLdMx#_9w_2*Jp1y{8Kx24K_8!xV_J}inbC~}Q9_Wy= zuo<6PfVwGgMfnS>!ipzFaZBa=kef`(;0@%uS+lC(`97R7@sRN_8*;#pl6)!1%tSk` zJ!nV!bx&9FNzKX7H`!Bns7nO-yy(K$eaO#FVX*W+r#I7=05%^EzfG2|(2;QxxDy;V ziwMgh4-pOPvJZ?ocvhw&7ST_uMz52d3+zv_$L1t;tJ zV!YX@1}JPRRLQ264F>#R`KU#IX|a-HqtSU2U~yu;h+P+?dHsW8*ZH*5!i$(Mfe7JW z!ujxaqc5-%U8nrBx1GSHqBppH=TUis=Sk%Qu^|C#Vnb>d6ey{s=EWv)(b9&_l1|=| z@FG1vKZ-n$6DC^;PEs*_r3=-!@h-eD5?r=h&YMR1zg2U6o$T;VE39z+6g%yY ztnR?D|K{~Wi`}}_(~9B7S@aPelWdcFw;EwzwdrFE?NXo9y4Ya0w~sPF$Tju)>R|(o zx5Nnm2jbjK4fcx2wH7B8Df;=9-noq8{# zx5?$im~OpSKzZI36d$JzXl{vYXn)yw?+!J0SI`ph?M9C}{zLP_h|J!X(jP8{tSJ7+q*)+dnX`)6GnXfCMt>9e7-%1c?18=NAHT&h6)^rJ)RSe4!H|GH<;!K7VK5-u-9eZuz$%DiRdX; zBWmNf7KT7yE;Y~Ry`j9ktXHi5uQ6F75UB4d7UIY$oa%q@m;Ar@6UfU7U#=2%kYE@P z{a^XnUdN3NTQJSML6&MCEQii3;dQTbPx&q;n8TJ(b*GUFi`M$zp^HK6f{@o>G5Qb9 zmh+R3XVl;G4!Nh2kzm;yQT1-sZ?u<_gU( zguBFnn)UB3zjU`d>wW64C0Z=pU%oo^7t0K#g+!oW`yDoP_F#_yRC~t@u@ev6DEaIHFRe; z(3ahu4UnBq((@h8_+u#mx%y~n@c5}3koG6fGo>QwtSM-Ps%-bbT)AaTn2m+8saEW8 z#H=|&H-{=A4-3|fW^x!;knfL z(g@TEnriKVDi4-O{l}$aftpf5fiNVPBKj1O_V}>n4E93$Q2mv<=;-<8_W{DPYYbxn ziTh()Edn^=qs8)0(`rnRWpdt4X0x`!047NPSR2P~sz3i{rI7^*s#GNk(>Sl+t8%CE zZhD&{Ma;jH8Le3lc;iigOO6J-dn-S6=Oyv3Nk(nTv5@SZfi#{9=ji+y7JkeK977kl zQT8M1P)Zq=;*$UeP7RVd!mp!A17E+}2*&VQuOr{JSL`Riz=-Hr;&VC^6k&#(v6FeP zH02@ZddGp6RD8V2_TGT8X^+DntwX{ zD-h=Wq%c)~#uU6@AmuaoQ?5!BvuoCPG4bEKPbwp%QqHG@i^9wai@wAMeG7Qs+t9nF z%^iCu_e;3xTZLP02zoQwY1*&3e9D{g_#6>CUE!$JZMklO%Nj5>teH$g{2EP|YoylW z7BRi;6y=7n#7G59j{5Hi-fmpC+RVA+ks9{dk~UwI(C?ZF&FYKuq70TVN zU@IqS@Uo$kcCQ=q%7g41gpLUI(+O!SZ<0h5%mn_gMgd@7Du2sq74``y>ppxg#yx3y z>oNS)hH2g(^%I$;hV;NApxL#z#QBhJd=B>QDPfc8i>4U+<(_dS^VE&S&6X)wx{C+zmN zZ&<6?M5(5|=#T^LDqhxL*i}(;6hW$5@CJ#zGMri|%#P1C$-Tyy6QE$Yi_R_5S9yuW zf>;_n6vC-=xDg?*_Ofm~1Z3LRi{{KdwdcY~!vG`N1?IA^?`YuKSJpQ%-D!}%S6I=W z;2LykG?;R7eP>_@wzFt6dwe(P?v)}7slyAtpSBNp(94JrS4r`OJpN1$5!|tTN99zD z$cZ@?u4|iMo`uW)$OOER53b<*Cns-^SHc~$-t6y)p`lqFaSi-ezSWC(=!2Q@HFMEgV7I@c8Z`cmh~#^glPx^KnS@}dFzZ6sFJ5PyfqjqOr#mHZ zY&E2#zpJM{+uSSlgWViymrDpN__j=UZb++|i>hNojwe+n^4v#)`K9!!=-vw|KaM2KWZ{R0R!ILc(u1F>tN=KUXL;|&%Nk9=m*i*gkB=(H z?ntV3E$28gb z-f|bk$m8Ih)@=4Z!E&sqAR9^B1^CXBWz%*u)vjIz;cAr0I^D^sd3rb%iEVp5V`_kk z7}G#V9o~^@tv@fWD&?>4tKJL84Ox0DQoFxd`Logka*tpA5ASw`TUxD2CGNYLEx|$o z_9<=V6?MIi?i;JiC!%%P?^(adgyrfsbzcyU`sw}4uE{?0c>zpore@HyeozvjeUuQT zHNM+V!d3xk!WXT8?8)phnH0*0Rrv~^mr*5vPv`YdP5a!9%dxccHNFF#Gr{#=*)>mV zLcFZ*SFZv8iSiyI=`5gLEU^In)pW z0!lYScMaVgGDAp6cRc6!U+cN|zF;l%4KAE>zP0yfqyK5?0&}tjY-xEXKOw4GZys&W zhcO(^EdT^47{g({U&AYZS{GFi`d1*Y)xQNRcHoZbLEY^f*lP-10z74~e*Hu^AmWO8 zNC%TU%;QMa$Gf4bm8QY8zM}P9xV%z{a>x4WWtu&sxjai6^r;lR)Cl#gPQ&>^${JBp zTIO69^-Qm@Gs`?<1E`E>4I(&mHvc*!rETH7UzV`jqshHS7477$D(liESnm<14O6CQ zvZ6z*Y4oPWBZYaV51(^V#u?U0G$HjBx8FK~ws6PUx3#o&E9judnO?HCzW}*oU?7)_L%c2^HB)dz#Ycv(W*1hsLuBL z7!G;^8i)!{VhQLQ2@pUEq0LO{&dTsF1X0Dlc|xCo$~J+9Ho$a z(uiY6THd2pm9ZVT477(*j-Iw4X~DF^a)k!H($wrkiDPURDr3nT2OkNz_lLw;26AGo z=Xl(TMr~_9jkqx7c63W$*`P7uU!6)8QRQ2ygTQHD6FYRHTYH4$Vd02$y%O0=-=7+D zhJ9~R`Lv?yBFziqUS|mU)${_+QR<*35{N*iFIFb}6e`H?RrBgs!R#PeYV(PNWt=sG zniR#}ygxb(d>`kXTbnF87h~W+$6>X7I?K z$KUAJbxf4HW742DyFZ(Zr)7$r?Nc^XB~b#0{;Rgf|2~9foaKr4JaY&g3Ryw#PZ3{m zAfXreQMZ)OJHG4O{U!KoYPUn`9OYeVBC0?mnhdLE<(wQ^!EAuxPdeZYlFU(Cw!aXx zpTx>*{gq)O9G74%!|W}rjgvC*a4+IuALWOC z|FXEa2#N!>7F*>=P~$%u^iWRxsWgnI^Kvxp~eHS zXx52^PcL}Z{l0L;krNzPuuxeEg6Ki>3eHl3Qh_;%?#k3OsmR(FRabb&;gakx^?t$> zxjyzK`ZOF51U$Z2080`Gq+sN3>soTnFtm!#Q!Qh0xTQn6vP%1 zLj*w{gh`s`uZyu^Kq??Y;+3?Cl?0q5kSI=bq&BV{5rUwwt+*im;k{7U6AjJF$U*uR zjFk%G=K7xi%gf?XYDPHDKy2j=l=0^qJTnl9kX98DUxmh&wzK0X=SG996L-O(wjF7= zOHm^#vdDN0Fa>Jho!%5yMzTo%iQr)6vX(3u^(wa{7Ly#i(WXNK)sRvkR@S3q_P8xa z+!;K6;=@{LxP|Cdk6yge{%U4YA=jO0=p=#=Q*LVe6dJ-96S9-LaX+2a!1uDcj2C(n z(g%jMuTwx2DnB!vcnT!NH`1GF9cgMCARg6^1{%XOYMHJgd)x+(xMkMfVsMZyYcwo| ze%l)ulAczrOW!?L#-m~-m>+cc>z;#rKR}6WW`_@62;IrOu2E}X*s^(1GxuAaZaIw= zPD}HqKbQFD9|d4S&;XO=@Wgcy{^Cq}NbWh|B1Bf0-n&<=kfZ>Eu6_lZARx1vt37fj z@|{Xsq2|@G0j7?Mx4wzyE{s5t<_O&ax&z!%qr2Ujrw-n(okPUS1Op`SWfi(vk#}FvdAhh0XS%H! z{{Ew`rz0>*x0x4KLD}DDK^E1xvTV*i{Gtumt{S`n<)kNfiNaoK6(yT^Lx-M_ZTtF>aPD#MIqStno@ zPq2#Hzqx)RRxwX=Z5; z*vuG`{3z^AYxwr!mt%@Ueg3U3>(|B>4UbmJ5TwfTgN+nl;P&)88<0TE+!?s%oe`CY zvjK`Qy$F4i>^F?PrHW5Yj@iUB`s1y^E)X{^jNKST>y+kh7o{K=DwtEQak%+;keH@U zUIm;(eI7aEqYKzJL*|unnn3KVK~2G~5Id{&U&MvA_?mMS_wwY?;|_C>b4gRFdGrKaYM{a)b*{CZFtB!MpRMW{|JZ5J(U6SxP!VDv3XGi9df5 z7b1H~A`Yar4Bae6o_N;rk;gi?L^!IwUDJIbrmDjDq*xoYjs&ljig9*?PJ<0|6D-Ee zWB+h891f!P12lpjc8g^Oj=ajIh$?X>*yERSVY0V5JvJ_j@t{-KY1|C?bvDm{?U8a{ z9QLml*d}E%W1q@VcBpy)KXK6M$l|Gi(&1;~z*_rqO?AgPo{JbM9Ty|p8i!xgvx>Bp z@3%ckYFJzo`Envten|9Q%oKQDKK~;=MwkD{#D7=W#p6Uk^DB0NRx>sbA?&$Gxsko{ zJt0bk312GaIL;?Q;+9F4l83J1&M~CH_?_H(!STKqu5md&z5lUGin2rm;*Z9HeOHy& z4VmuI>)8k~*~=hS!Z}ZBV_Uqc&|!bt_5Q~gmIEBNcS=DsKydMw1AnEpbD1AeyW3gBuI_vF!}J)VFxT8$ zt~iNXI(yqhQQc&KU;oXb&s+k&pS)p29sa;vyu;ju2pg zZb(EBz4j=i;Bk%R1|D6)B`#O;ZkIj@VDE_ZzIRKX5*N~VItHGH z2r)Anjs>`U$M{mCmSgcQ96XB1K}VoG=wYS{e9a(I>{o`6>CyF!R{jym9u2M5@ z@QGmBATV%APEP1c_m`{Qfq;i%-a7uEszSxW?c%PUtH8+C3MVcZJ0E6_(lY{*t@x%8 z-jEP4Mn-`}xfI&-h3~zEHt6Wy-8`n!@&hf-_q~KvlKy1ORvG;?p&MT7L2WOusmWrl zd(qKyY>WSFTJ)gB8+JS0U%qxen!;4#sM(-&Cit;wrl_jI2RufHb>PSbaTX+^Fx#4k zs^@P%YM6Wr0qGtV?GsvmKC>hzxkj}aOOhnN*z?N}>=60u;hL@{?*}e!V^D0_3bDoL zE27t7g)^dP^F+y8F|*Ot;fYAH(Y3YdsFNFdE{Cy#qUzzm^Ue*r-eM-Yj^EfrBzw9| z4N*_m#Q_n1KT!ZlZ$UTjqRhQEdpL8gPpYFVZ_!QPN* zR37bHm*8=1jfEISA)0Lg=7`k8{84fg5dhbyb@UdrU(W;A)*Z7GD%T~`a->$cI~8+m z9o6|A8!txhRmimkyvhp!TzB%ktbFPjK8nBxiE`3Sh1PaDcF1#Z$92f+2jlOB=Z~F|9%1&s-jvfhe~%#k6U6 zWPoxR6g$~uY~MCPQag*EY{uou{x5eOQc+z(|0sLZnz>-X%kx%n`|Hcx4nFRa z1Uq*-$tMe_y&bE$O#-?CR9CIlzDHmmNc4sqfFXJ0c!_lb0Dd(N&fYjvTlXRYw(z5XG*bO> ztmUP;YQJT@K5)lC|EtY=r20Qm+voq^hS!Dll9Mz?UCMKwP|I=SIx8uvZiFZ;_!~rT zoQQOvIG>X#;33tCoDecydtX1FlSZ^9@`88=Cn*P5B(FoH0Mg0sKmV;#Oi0Jsn#b{9 zlh&}VJ5r4RBS*TUZ1+b4FRJ?2m=n(a&zQkm2Cl7mvj)_=Vmuc0c98t6`%vx879f{*)i`Ok7!zaT_8e| z4!Bmt8w5}rVy3>`cSU6$^EzEGY5QO3GBCX&>?acy+;}F{vWP>5?`@VU$Tb5yCw3W&Y*0U#UI^fa8`$1T)i#>iZ{;WaZzkN^)H!BzZ(TJch z7fJCgfEoJB&-nW$^E{k^u9!@#+$(hQNKUl;t-+z@wrNwFIehe9)nk1rbU$gHNhC`o%{6KuHo1o=|TvFZ-0?b8moh@Hg z`qS3UkUzXX^UM^OH(-7^v@J1lnVEMS?77fpohnjNXB)tl@d~})X74^d-Wb2Gh;7d3^&=LR8B_(pBAyfJaI@#&i$ zDNs+fP4UWP`X?~+_gT%(xaHhoGdIKk^7dc7YT@aIh~Wa-cweyf3%SPk!wo-Gx=2Mr zspRQ_Cu?dWvu<9m60@T2_1y&G@;27q6^5Rq``nE(OYbj-97!;%CM&t*^QH z8c5=C74LS$P52JG1~D@K!@Z3Xu9n^X(iW zuYaze;%J0|s~v{^634`v-uDf4{E)CaIw?M?U$!_AQ7?s(z2)UF8Ms!~<+2+abjWq3 z_+}a5T4JVdo&@Gw=E|0^_{xqTfHMDs@DUTDHuBBFvW7%qjwK*Dfa=if$4h zU1-Hbsjd=D5{gW#$my=l^`?4r2wqc;llyER5lO738Z9!%aZbWoXiePg)an0uo@5J= z@xrjppJvpd9%xbAdB_*pBRCymQ4jnuwl4n*=)wIWLoc zpb?`Vct(FS5-!YTZ!HH}CpNuVXAlUB`LL_R2{}$QlzXw$txXlk^AHbgPsTtNuaJfc z($4xByh_WRZr2EF5o!T62 zf3>BTMV73hf3I1OdD^}taHEGavLG6TjZInTcKjUcR(2MWBu$h5EpFH2`yj|(@Tj~y zQb(&{`J2GDuF_w#HGUM5`juSmvM1BfRm6_4k=v>`4a7K#GX#|86$&j!j2&EfZNqY6 z_3D@V-5YJ0J#T#ZfBF#Ddlb<8a04~*kW(kAWe?4r%nX-XzHi&K9Iz%x*Hfhh$5IrN zfhx=;9dy%QB}_v?f!oN=Vx8&Y?{~MEhF1vhET7+4pyfA;Mx}3yeB1L6Sw58VN$SP$ zq!n&BeJVJ?x81~qRK}1!+cbFvQ>)v3a9+nrdAAP*!-L=i1pBN&+_M z0`1RCue^17tp?t%H`*_^*cDxwW4WO@x*HY{y(kr#aEZ51vnRT%jW4wZ&E8$tX*^k| z!XmNfYZ}b_jxG`befq2_ z?L&OAgEir6ONLZfj?n>RqLguN1rH+x-rU2Z{md{v5Rb^a5X9J^i@cXXpN+G3qQKv* zoImHJJj(~XQV8W)J43(W`dBH1b}pFYZnC)56lPm24L|3xHo3smKD4Z(nSl^!PI-Dry(nI5nlnn>tfMHmU#eY?-%3E7%lxu zI4o*Qo#I#d1aNb?oCTC3cVJ55CEgkhMp}|T1o!GAEpz+)&Hf&_$zY>OJMpWaBP_IB zruuHMJev59R#!Z&BXTk=d+Z*fqr-mdJ@Wh z$x5hOiH@=Y6%%Z87g~H9i8CpS?eoEyyq0l9_fL8CQttg057DdRGp&q;gK>q2Pt2#P zf?0z#%8T;BF5bZcQ(0Be4X8F(nNF%b{9TnI>*h?P6iyq?KzSl^geXQQdsmoF!l$}l zF4&Hidq8;WBhXijHKu}%Idgu=4q0N^L^jP2QuM zbQL(2L@OSp@@@HSrbx;wp3tM|FKtc6-t(L0G+cQNPH%fq4 zQp8>YZUs8DG)Q0kDqoS2|F^tp%brkIsN`DC5=F ztRcxA&X|8q)mrqQ(_CM}8(%RFl532y0mk-P6BYYt(e&Z*j!>&$Uiak)Cj3=I%NdwHHOuuQiC(oz#SnL2QS#ecdf3o)$X&TWyx zV}+i}cr~Q}Hr&^oG0LAoGA)LjqnEDypKfAWtttI&$nQ9MOz|3qKcrx$<5XkBEUMT@l)h=EJd%w9G!a`E}va0X6AlxE{Be(Kc}wh&&ZnihRiea ze?Gq(Zh2iC^v2F!CUgvp!(v0WWrT@iPvRHFwqRp0UE&nr!-vxkh^&oNk4O0Lc-3@s z+O(o$E+{Mqg;FPxE82IyQlHY4G(2m__f9hgkUo#uQJ?Qap}9{|l2j&~cLb2vlc=Mp z!{rPFjq)k4bN)8rq}RsJg8LSJi<-gYlUkI5y!vjWJ{#|fv~S@Kkpu#td&-KJU0?fT zt1C_@4mIW7^P1#SHNX5(EiOBp^G+24->>KA5v1>}2aI z=v$3RsLsGS@4tPAHk~7&SSCp*T?juk3@G)*qR?A&x1d@DP-nBN7rUc*E7V*%Z-ILT zM|oqngM6YL69|dhP7-E-0*iYG)Y{rsJhrC*N-p3ZURu@(osyap+a_n0y1^ko)8xOb z{YaMd&sy%1$Ztrb!(@Hp^o>J12UmdwDRO`PDKnC*_ywNX&7G4k z*1FH#EHz-uv=2q5koc}EJzx4DYOVdhj> zum3aD!BYSy{dQ4qon~1r0061%cr0J;KAkuAF&hXAt%3@3Y3r_?bV3ae5VE(suQ*h{ zW=Y#>h$77;=@?Z39{oEGa_|~78 z$=g&F?=F8VQCBNhzj0kVSz_NW_se)?b5=j2EH6(32}k>&*AVO&3RGsRZ=h7K(OGs* z(Rn^6h=k(E44v2SVYxG=82I<8bO|O1fLG*semU3HQ&$#5#k?2t`!7q9yt2SenMq_aVMc zs(nM>Q=&BTCVNhKC42q)KKyGkR>%RIODn3tvg~WdffJ z&(y=67e~bRj_;`+xp-)vsHjmx!qM1muk+aO$7ihb9JsN_SveEhxOXV^UIR$*BLq`U z%;h#BN92Zq04RbnD{1H0@m?ANO6% zV*C>~{tXl=pc!{(2rAMiH8?(bIu?Aydc<41?ux!%x(f)Y^t*~rTult^PJERzrd{Aw zi>C*^{{nYW1{OitqEKt!ew=pD2iARZLe-}7XHW*yVq$**edxnXDb!C-+m;CySHKWB zF7eqa@AHzJ5bkS=|MJCRWGoe4C50Ox1*qREJuwS-ebFDcS_no^X^O{&)Yxw68Lu>; z{wowlCmv(8IF>^HoD(uyOtNX3IJ-}WM;#?@?{fQ#O|Gqc4|CT-ocyTFG0#SY;sdy8?4w+t zIqOL`e)nQrbiB;~R_I~O&I@Lf-Q%5u;P__I5RXCriy`b%l~6TR^!EGh`3d3G?}%VQ zx#C_rHi^zoME^D}k zhDDxbJHcCl~oV?{%cY#-*NW z!Bn&fc7~XLijYfO9S>og+`O89GT6I!}mbbdVyJ61`k zR+z<*#%F_9&Ilj@NGFrtiMDXFw5@a^-?ib||H=q&g=y9=pYXHVJFZi$i#4?-sDC01mV)cc}R0|NOI{%W^0_ z1SY9*!7i}z4auSdR#k$WCT)jK&wK6iAmn6e4L9K?jFYSJHc4~N+oK8^u)70yi#--M zIP&3`Yv%KHLGjsY1Ej6brRjF8S$X3ZzTca*|N0!tbn|E%AC$=dZP zEbMiMb^dC2o_~3(itU&x3kC|KVOLWySUwS;yW#W+B^ln;7`nMUtJev0ih9+k6a@Mq zy4j?KJDgP+zxFDnaYg9wvp*2`!=8q@{g>h?218<9#p1To7^@uRIthN_dTD0H`#7CW z%==_Opq@^Is&mC80(U+`r=((HSqpc_gD6O(t8u#?&{UXbk+j-T?!U0yu}=6GSarY4 zV<^1-;omy}OvT!OyLXz6fFy08eE$bvfCvTxoc`1Hr%`TE?;*;e4JkL_4*^rNhEWob-IK4aX^yazFmquYDVI_H8YRx^9B9y7lvR^8lH z%N@9U&27H7r*dvWt*}+iU6)HOx6{Y>%_!sTlOJAsQp28gyxE^2Au8`nQ5IU0{@tE% z6|u7!3YHvQVZxmdB!!+TV8ep658M=o`?4&Cg{o062O&-F)^twROxlAQ*Y1D}jeBXJ zzPDdJ8uW*~H-iDv`Tulk+UlzRbIm#ZA9POZ88ssoTfpQSE**Bd#$lmTXs6)?fcIM= zg>*dLHl9=zh9K7i4h^I+;mb$Kc-IeLln!eOW(5Ncj|TkrcCi55dNK}e-kR?*&@kdi zI(Q78%;Igx+Af&5!Z|9gu@-^|LB>34>lO6s%_+KG0)?2XG0N2FhuB?JSs?TfcQxbF zVze8}CnzBzh6ONz#xl*j+X=$NZB2l27JxOpZRBwMfkJ+Exr^t>OZzyE77} zeeabI^LD9mJ#L5B@dl=Vp~OxOkVqAb;0&W-2@ncHuv%uq9qJj}YpI#Tk@w&da`r4C z@DW=V!UmJ(cl8$X9{pa$UX*|krI&Rhpr~jI-WQoptMYbJpA>hlG{!@;pzX!8;ww?J zCIKOLj!%{B`=ILL5A#&chFzk7Dg>h@7kii_lPIP3O+fux#Kk!cPhz#L&nKpiwB~o< zqwKPNldbWS`o_m+0r$gBTR)}!Xr3-|rQZ&0YNy1dWDcGsEqC|5T$YuqNu2ZScvnoI*)kx)&XRhWbJ9Z3;pzJQWnPQbBC(!^K9 zAc)(7A8%5U?~B2oJIX}XvN+3xREX&Q@oT5cZdA4f5feSmI+dqu{vf{uaV;n zzxHwO;f#Gx#phZ6r3X$)T@5@`4QR$yUf~Q< zK4hs6aYK?8-n8;>C&la|SF8F`hsfR^$2bO#mQr;wf5dhY4LX?gA>wuyl~rDTUl_j@j`mZ5V8-*gh7s$gPUG``nO>gSDvVW*%D1lp%aOn# zw(VG$nhKR~=>c|G>^pTUiTjV{RU(Y&KCZHxn%Opwg7vfV40$4>3st;R`sKRBnE>}R zP>&u~>e&w5TS;{7GQgn-!>~_esuRlBD$7LjF9o!0DgvQab9R(JP1m#}Xg{HEx4v}t z8O>7v^!TgsiP3+5yu-}&My>61|N7@udkoLR24%$GakqOJI`~Pv@)[?OuT}z~A z8sGKe4Q%&L71*WNt$l=-*;_bS{o|2UcS!P0v#sj$*#e*$xME-K5)!gv1`FA)F}*1B zRwh2jHN@%HdCX-*fK|82U(<#TmZ+l*qoMi{Q2mKNjxZhaVH9V@Kzny+<5(`M@u3K1 zDr9am(X77~P)NIT0a1#+V7A-vEaxk<;_4>;usmLTw06n1HuX>1Q6=d%dprZO2|U3) z_pv;na-*<;=IU1Aa27o^#isaQ#eN^nqo`@t?lx$5tyvB%S7mr8|0FZSIKWSm_u1GW z53dkF65>Zr+!tKZyRh*qF$pASYytp80w1 z&1!D{w8>*(B-fQgY^dMwiTe+mi-}>KC?MhfXph!@AzY}s50;I%Ch)jBgseBd0%#w0 z0Ttf~_cv=KiQgz)?>s$5soy`Ev;_jlJY+gNVPB%F;lLUXnEfCFW2BUx0FW(4pnh0? zz#n&TwqOMpzBrEypQX(95`bVp41!?Q7KDV5fnmvKPXu|X$}^u6?<;C2UHmW`q6ijb z?H4G$CkX4`oPNX+Y~Ofad!d+mm&K$PmM3neQpZ03$KnDrQ-PZO-AEL)Q3TQ4a=R61 z_(K#~;Xlygt1^ZBYM}z*o_E8HC*~6Vv2`8-9Y?MxQ$n5*mYd%@V6(@(g{_>OzF~8u zG;1MAX^Apj;l4{ZPXR)g8YYuMFFCzfnL6H#qYQ{8)GvN%V7+nXt3kR#pmqwk?r8E> zCXd=GVvk&$6alG(VNah)zq`R28M$~Cz`7N>fMcmisQ{4l9inehsHnP7mRCVdp}*>5 zH=qP_2FC%oU6Ya617!7KcT(_7Fso+x1Y)g`(E!ki=S ztenSlR^<*)6ztf*!d$<`rVw^%k>h4>*KR!%A%&!1uGq+$(A#VvDXdiuszW_B_<$mO zHh1!TBJIEGzQAM57hrro=uQYwhNT(ce|vLOFC>JmX0A%!;r6*v10#H}LuuU_kZ)ym zxFZ&Jx%eW*fc~Zf6Jk(LiSFUBUJg|Fd&jC3+}`p$Lo=9A5R+9LCqU3$wqIZd?*=p?%iz ze~t$l-Sci17^5-M)uh_KGK`eBBOlZT+Yz_YFu=fvRiR>bJc9kWy9$Ib(6)k;fr%bA zTMK-8jOec&8HjaETgqqk7#9`2*3@0BxibrJIao+gT7VAM~7}50+Y|M3xRdJ%+=;rOVGu* zUru75tTK%3sa4P*&s$c45T_d-2oGLu@Ka>|B1sph4|Wb+UFvV26UJEo?~FeO=t=aJ zwJIi{Zkg6?ZqKJpXmCj)TD~Kp6UkO~;+nzWtuAq}9rHNBwLrJ=W&O%M0aO!rngo{+ zVF1W`hj1dXM{(TAjD{ZII;kK&b_alEg#)+k>;7!!H439gR80EIT|TH`!*LoiUa3=x zw%z`?65XG54<#^2)5vo;9H@zMqe@%bX&!N`kp)wyT{OP|nkzigQe6c*Qd#g)C4nPB zN_hNER>OJ0n}`&w#}XukC0xaJ@rQOwxm(_K#7ds3WnQr`amS~en15fGHgc29gLbhk z22NL3JSA4F2Rgqoe1&j6zaBH$_R1sG3%?#nmpHE!BqKAX$KR||Hai!Y<}YT26@{#a ztf2$AL#Wkn*|Acf*2{>-ZTeWxdS|9=KgC{Fi{ zua8BpQU0>pse?2k^H2DR-siFo2$_LcpQ%s{%Gi4}e-L0*iut5~tKOt;vE+(qnjey_ zMJ!m$iLnwgb2Xwm%enx^isrOa=pH7-E?}wMd8#8N<5S_WN=7x{C-}+eCh_6}<4we& zo$T;2sce=iL(vwuWvmpof$j_Qudmft0!Uqcx{BIVhQDd0z!H#86!E1sr%>(LHi*Bk zIJ3$2!}c;tQwQC-kYDM^;Y+c1q_!lATt4eQ3o~7&M9B(|FKmxc-jnhAFZZBL=XNDp zl3idSP54>v*S$2u*yA$)>%NOl2ybA*l7-@7M^qd6R@M8)F4F0^@4tGc=Hk(8lOxJj z<-bjn199Opmxy-@CN)f3W%P9yB|*r?7t#Ou1>PRAUH(il-``}dx*U90^;4eG>9n(1 z?pkMQQ-?J2V{RKhzW)ii#7S0e&v@H4bKy%JhA$Ilc*xbnCcyZ*1w75@Nd01~(A|)+ zkR6sOL(9iJ$`QA~e{0GG)CAmK9-W5E>^kc0S=bZh1lbR$c+w2RPv<@sRNEoP&6HiL$`C1`w^o|`jYHD+@c3v(N z3;l+Yk`z$S#X}R9LuM~~P0ydtY-OmeMPC%u0?5u_weHiX-%8ilH)8q2J>P+R9nU&- z+kd}B692TJl}ALq;6KhvM6&PU9OIqKI@=`Zg|+Yc;4dVkzY68KUvU-nI6()WPH!Mv z#$$Sh-nyO&JWsefm!exHbLf;{y*3o(5ATZweHMW*ypbf_G~+imC8(+8PtZw-?bHpB zIEhx<+A?`ep?We~Fd(-y1$89n$$*Sm;Dk~DOJRtC@jojX#BPm4=ejLx1;yPcj%F7f zdCpb*9_OFOOYP9C!P7^|vs0fB0Eq+;&W?kZGLO}CqN<=1S354o*R;kWsdeGRo%{TQ)ZeUKPY!ce5CXn0d-k-WdMm!Hoa8`^Cp!a2Lj-6 z{rJ=GUU01^*x4{wottZ(%ugG1};1Un8|`qr~|;(Yd}s>=td*z&WOR? zZ$tY35I%#zws;9}zQ541iZM`Z8**X=@OJ8|?AL25xb^Iu=S9Tc>q<*%jQF4tu5Q%Or873q=p?$};&vM%yTJicGyb(59QUy-~4U(oDm#bc{W!zWtT zqHp`$1>d;m9Xhi%r`_^aiG{$X!+EQOgI}^YzPT#++CZK00Irn$^!+cAyDpoicZH~Q z;d;b&M7k|*6YDka1`1`M2-6f}d-X#H!lnPP-{c@0aC~XH0B;f7xx`;`y z$GSJhy3f8_t6B$m_>W#i)iO0*W7OnUBkK15l>?q9GQwxWLTglye?1-R{Q%15;geIn z89m@M0bbeHzIUrmTdB0|QI9?^e_SrHWjZPcR$d61P`=xXd?{#5#lKO!ZHeD}l-Yg# zPGJJ<(u>lSO^Ea=RT(s~lV|pG|5@?3=^gG6&KS-BP7Cm#W7Z5=ls|Sj{P=84OvkpZ z8+_>Wtc57BCD=I?aBTigfCkZJc_**-323`P?J)4{ireL-~c+O8}wI|7-;VU^e}V>zbJn?`qW2ws8zaF7Mxb=&9uZG8N>;n#5stu@w%j~`ZwSzd`Xqx0sf?v00Fpx&qMLqJ zNr!6O_jW2Jn;@0AUtx>hzDFN(yVtkEuh&dE%;dx&fyyS9?pBO#(ywR1G0gZ#z&=1f z0A5l=nHq?C{>c3+0}u9njj=ewZ?A@ z*=}=Kl}QgePp>z93uB7t?YPI~vRUJYVUL4G*tSxkyK$6*WPW4~2xF?j-FLpLVt-2G zI!X1=4D1wPU~I((BHhmv2qU2hywxZSdXIJ2Hu$ z_~T{SK&>#eVZ|hp8)!X8EOE9SJK(Ln?1cuuBH`(7`AX6?nsr<*X>JO0T9uH^DyovM zf3865^~w%k65GJM>4XKpBr-feFDB^yvYJuv>B9h_AvCaPR%YSguDVfh<*jA>mzJCF zDvU!U5q66t`J7y=T*8-JW7u}UXs8a=X4VJPR6@7F+c4M}B9sZ8!Um@{lrl$=v>N<$ zS^F(4VZXrt z9$*?6G@l40KyLiIO1MzK1Wx65w9R4L4PV*s$UDbQc4dwZJqUuj;*i+Ae)k}~U)06p z4rZ3EDZ|xRGUMD2k53_ku#dld(DH@dGs2_I=mWtPes!$S^QUk^fXNAW|}eX#tL7 z;N^0uu~4qfIZ{dtsqJXk_v9!SNjy?bA0LvicnPssp2 zDecxb^IKc|YYi*wQ2XAz7211!BZ@~saohmzo#3a>G|?)s+){{Lg*T){)|q6VxTr_On2?h&}cfoj1y2mtCFT2dF%9>|z0G!THdZ~q&)T?>hQOEQV$zqgKQ zR&@sztGEmG{>4TOKTf6sgOJ4mhez2sQoxZD=uGAdYM}2|<5ejxr2fn}n1YZLB&tCC zu(s$CZr^H`3&xT7#wzNNkqoG-$qvvz8Ok&aQ=`uVvskK~^kJ!&N0nhg|9@r$z{&|4 z+WD~)cXXX*cXK=tXNLGgmHE0^U0^b#>q3J{swE_{-etyZmafHcY$z4R=Ex+^RJkR^s zJ_39G3+pk9%@el~V-wySfUxw#`o;sKwzj`c+IIa6I%ooHVB^~_bN&Fe8xU~>dc^&^ILw(GS!QEJw`^? zAyGa_6CEey4>}^`MGTiU?NWpDlwd4@jx9p8OB7%YP3;0&Jwh=eeIj3?OisE+h*0H} z7{;Em8+rM>aOj3MJFm{}VTCFR!1dL<;I(dRAa`;NPQ@8AKmhKIx7l7%4>94epg&XG zQIu&|M&4s;1aacT;v8EB!~(K!jblpa>#bbm)TdsBRmq!q-JBSs^$OPf_i>mYflQYI zOB|DrxUwy^9;N_Trvtze<^lDdpI&I6IIK1n!qpt(9c@Qx6}l=$V`Y>k?(!V1kJ-t{ zzj%BqTmzZO%2X_g$9g)VYbQt;c+O@GB=#a{koya76cfWA50LyfZIB-}?Jr5D%h_nZ z$}5?Wyi|S7;LMGejR*295vN{X7q(=v9Ndgay0BQDS5D(foyZRu!6u|xhd z9L)_TF|xz01Lsq>+m2uZt;QxKav|V5_8@<9I=Z4nlHm@xsgSOB&^iG!tQ@64!gSN-D84UbsfA!oHl>yg}amsH+xN|r? z4rgI z00{x5o1wdgFzBvf6r{WV=l#~d!OpD31~Jdv_jR4;aj;i!F}Sd5#e6qb99>tYxUdie z*6kA9!Ptq<2yB309gk&1=t?Ot{rxWK!g+P(E)h9j-9Mje945pBGzPx!}N zJ=`G6L~2p*ZYq4#{&=2CBh}4496{Z6mM15FS__Nc>LVf9b^PM@#vbSO>#bC)l&Iwn zf`LW$y3j|XYuW?t zF?roD+4AWhq&WJ>e|m(xjhN~vQu-(3B%-$ln-`IIGg|<~bGIU9SAlx=>GmCL*1NoT zfjF#Zp#;FS!1uETDtX}$1?-E8fkKvfje{neA9F;kXsQ_TFIN{+^>!n9_0CTE2tnKr?V`R& zW$>yP(4rv{Wd9w86^zZ8}kpm(>{aIW&_h(7P^(ruD;KujDH?FW|&zt?C;RHqD}B0KFx;VH}8` zhgztdR<?cDBn_`W{rIXlz?9yl>d@hB;-htdFOKX=O@BLfKDUe*yHxp*@1^uQmGW~a z1pr9SgPZcD?d`NBwD2$0a$ZhB_Ic%2qBpC2L|XLnq?t1i_W@hitg0^nPz(n{=H4AH z+)?&s>x+5uFc2tkrK_si2a!X|+(&Pc$Aa4{<7;8f&!b)!=rEsdK@L5>lisV29rJ1% zKlG0a-l;_~nx#{gBbis1m`%R}HE~o9(BmKKU&bAVyW)*!lciNy!GS&Z6hs~ETI=Vg zHn+AF5OOy)mSA2|%{6r?>p*J3YVUF2DAOyk)L6jpxQ}pkflInrU&jipI&@L1K%Kh}hIicX z5tK=L7vIc*MeK^{AyEc!@t1M}@WH-MhgN3xu@M%9Vo0J0XJBhK_W#RxfEToHY#t8Y zqcH)%1em~lXPkKTv$BE}EuD(l522YTpkXlJIJo(QOLWz-9}PYm=yxC*8s@1Ti-Go( zG%GK1H=omMoS?|Rn%e)Q!-N~PF{Hmj6KLJ5l%*q6XA81)8tlWB|7)V1DBaY7fk4TI zlJQzeM6*vZ^cMzZ9Zfu*5Q_Aoq?kK^S>PI=v5`B*ECBW(1|k2$)fW9n2ar9%EFcQT zL3H0H!8%_2y4xoPQr}}hcz553BCY#jtRN-f!Ic_VhfzQ@fg6-4ew4&l8s{Nk3#X2iqoXvx|Zkh2GYZKv;{ zd??*V2>*R&7Y3g6d%zbWa`V4|GpOQ4QBX_y33JQ)ZwjlV@Kh?K0HRF^u2F9>83PGO zca8)XPc>;*87J`Jqls(?7m5@%ZR7UR8UU?GtgVa-{c<;G>Qi+ic{czHi0(BP0-(Kt z@ln)TS6)FTjJNK)BNJPh++sfdCT1A%3tHq=e|GX0Q|>| z;Q{w>=T3C5($bJOyLmm*Zp&!nw8{rzz#QCny5Zkvg2rDNCQ}Z$72Js@_Uhc)xs(S} zivFLUku(5FfKqbkZA)nm?qlE52~gQ`x2r!Es*#eieMnKyc#2~Fh)n1JY*z1|N*=N; zekBR<6xLC6hEn?Qj=T*KH)isEb@35|s8@8eSOvBKzy5gp_ADo$Ft-m_z*R;x_ro!g zO_r=2j?5~BWuslAW+2tne_Ro(ec9OC-bQ_^CYa3M@TGo-ZC9~rCX{Sm#*rOOeT$V3 z;&^!WkL7`95#ump!NbT|tTfA1Ptu69d+Yr+Xe1HpbRDOEgY1Pq`+t4N>?u=atGW0f}rf8=}9U~)U^g3nR2T-_HY zu^l&+-3{9klc{#lu}nKr_wQtbr{0_s+1#0J!rLQhx50h|L5x zfz(q=p(%feB?osI7QX%%osG8jWULY{;`du5gP>)?n`-?@uI%3?G0fU3&;*NiK4Jmj zs+Vd(O}ZFBXft6%Vi-!$TpKWNYif;O^HJ57-bF7l#$7hH@u1?>d)be{$H7NQt_n(~ z0!5y~U%St=@)cbU?{VJ2BgP8@NzMFm#F8=RiLUy0Xp^p%SxaULRP2|$OSGgh%$8Fs ziw)jjn<=s0rAb*!8RHb(`44zoD$1|m&exaLan<1;Q{v>QxU^ zbtlBqun&eF(%5lQ_v8Oa#C}AcN*D{p_YC#FqMc7c;(yq!OWqhr2f)3|=u<_;|E7qe zjBF&(VTZbt*P=w&8|XO&q4ltM07m{n4oDZqmrp=Kw^3SN}G zB2(g+2w+&bCx-`eoNfjrVJBe^APj^_Qp%xmFZh-u-^@Y2JtjT!fHVL0N|m*9#vj1u zr-ZhW<(!HfF^tL);f!@Ir6sK3O-((>{2gNY)U$l`9dSVpCI9Z(joDO|BUJRslTb~jcTU%Yz+JVu-VJe6I;fFttLLoM|f$4WgT!$eTVA1QNuWCq~IeJzeA=ncXdXv3$bEJO%~ zUrr{8XmIIi!wPBtO=O-Wy&)y@^KYVd@>$9;Iz|s5q#NH-Nswc%_K#8Fn&Im7i2Bv%RVZVCgwj!MR8upQWqyL4Au!^Y zIW@Siwc?T%{Opqc*U%pKTJ5HH8q+?O>e7UF>fB4y#;B>WW)R|j;wRmJn;{$I-^^Dm%+T5Bl8)~gU4^l;Y^IKC4E~&a98S~*4%NbiGBY~dfh8HBgk=EZ0SW2EG)lgMe_*$>~hcy zLL8!aaI53Pdg<5x4YBw=Em%MKZeOLuP5g__fqvJIjHDKP+aqdP8$ZkHTUB5y-Y?gb zx1I|e8USU`Io?>jHbP`LyE?CssMGtBTJv!6uil1E)z>RZOVk(oS5;woJP1Il z!=npGdH_rCxn$=UVGm~sP@}92rr@F_o*=`88e+Pa9kAwJ#ML@x4gwoqfU=t$EG+MkdKBm=7r zWS^)GA*1BNop$nDch=%#^@PIqaftb}rwv7P{(R2>dwmU)WaNUQxI>^JL&5o9$^~B{ zYasZyFy&@Zo?>nR zY)zq$_n|VN$J@|5dUjvw{iKIS{r^S~05T)=uB>~|EC{Kr{mQ-boNUz}^$cTdtvGtR zz2+uw&I3y8*xly!{8RpuWNVY}^g-<<-6uvqxYzXDN$IZ#3mbQ_LmN&!NBOfKJKySZm29EoEt8|q71m6uFs@|t(St7ns-<$Md$poqAz!f zZl=EgP^D)}MM!O1FmbXg@|z zarh}iOP~9M*%EG>K~NP;U5<_TsOSZFSTKO!M!U-_HB{$$-zQH^S?4BFIQ>aV$1iJW zVX#^f!ye|(cN#M|^kYgV@?GE>dn-Dn?Q5#Y{BJ6win7(>_UpM(*;iQ^94yZ%9(gD6 z<;HRQ#S!&KuU-;KmU^a!Hj*K8iE2*H>`tBpt20?9Hx>aF;f0fRSjaE5;R>T1!s+VN zQ{8Ns)bkR7sbH7iYI0y3Zv90QO2E4J=-cn%{~2m0;9km5q2s=#v34&Uf?8Qqaq=Kh zj6?tVp_O!h&!YTuwaV{QpNynA8iz}YBA0Tq?$cfOt=!NXX{JZG>IaswPaPMaX~uUV zdgqv%{^>Js*$U6X*-9=EgjX>^p)2rm^Y=cEqdd})RQrv*MBD`B*X%gZZ@1*|bX!%4(>XT6VZ+#Qshr)h<2(z|(I+XA*|8~; znkCwVBi`%JgLY?0R)UEY>G}J2<|6;>8f-VZeku3FFdM3q(Hq{Rm##yVBjikQl-zi9*UR2&Du!sune|JqN7anZDWgYJlscMel(u=IcGVGOd z#7p%aCNcCy*K^GR$P2{M6-lh+*8~xCEgL3q%(a|nm@@)wUjr$dKf6?}wK7*+T12}m z;B{zht{d4ztA=o+BkYa`YC`FVLyyz1#+e_4LvEbAlPIn&BXZJ6ma{RtFZ?3UN~OZ! z`qD=P@S(7}jLOhuWzr`;0g_?4U_!er z8j}zbtKdWbY2p_wtV>D3mSTSXhsyF{(XpVZF|C&YhQfVziW~HsAA4ftuT-)7MCR%L zLMCHgB`A8?zKAG}SleS_F{?U(D`Xf^M}8O$*%%2?-YYcNvV@Yu5j!#M=o87l~wdOO>fP{?Mr&=SnK&L zW3*#?nRMvi=TvO)EHUveDKVe-$m?u@S7&)H?H#V)O2G-(7lPRCNEoQ&#y3GCZcdsp zE;TN`<;#E=IKGo`uS z;tr_E%6;FYLV8NhY5WxvsR_3IsQ#@PpGg>2Myd#z+>vkX!dtf4K?A+*p ze(rs0D`+bw&2T#h^lrImxt%e!nGhaooW2KgH3azw6gs+$iuxHG@F4@#cqt<;Fil$O z48YI#>Cdsn$Ug%j;U%0Ik(OMou~AV21`RG^hx}j@cPOcc3uD2U%xugZU>_t+(dhP~ z6+o6OW4I$^dfz5W>yO;GEVG|8e;d}90bd2Y13f&KL9c;w+1hoPL#q@f_5OOAAMiFK zWgjD@pGpi0BNw3pmrtg(vsvz^Cu;LZQO_LP^?bVK!aT?=v~@$&^ZhxhQXn(_iYFnX zzJ({|E#cdk>xMMi?;7DMKz$)k-V}*fB^NiHWv(E)Au{}$W>V~&ZBCk1AgikTSMp-T zy;Fx!LMgyF-mBMQ%X^XTuV`~&BZbDl@q+938>h-Je{qwI8gJSiLS5)dm3?ASb5gP0 zyA?M`;*ihWq}YzPCP1_K+qP0w(378!yu9nxpMO9)?<6O<^#xn()PcQZ+3fz)1bav5 zxb;_68h$oi0%~0;X1$`F!%vya=EK+SlPBq0tAGduMa#}GPPSav`vK{_#%{DN%t^K# zli_C4W)pdF#H{3m*{xHyD_)Q9Z;lq#*L`k#5{oKUA58N#<*M?Ls)7$5CWj66i3KDw zEfIC7*}9`^a?ZuTzkiG819mVajii3QFiE~nG;wjMS>L|4lL)-#(6(A08jT;;3fLJ_ z1GwQT?dHQGC%-4or9iUg2VC1stUP4-81`U)RIhH2m2=mB%X^{&;eGe}4iODY207knM}H~4;!Qfobz&mJFq9b`gpiH3mM#x8GhIsCb}7V-F)mPG-njsIj0 z22|XFMy#h}W0^(rFh}viHZdG|rp&=DAoDX;os_G#*cG3vzrud{S_SBi))>2sU!Tkn zWmGrQXI3`G;*2@K00~*mvB7KjPjglmNDoADh#@|@MbYy@+!P}3X{39AH*T?K@fBgZ z(KeGdh=(w7-`@&DGLPkX$Gbhva-`4NlFWvj=wdBr0LU+7wfA#p`&O0sJ>f;8y#>`J zFB9iZ%7k|PxHCO#AQKVia1$?9{N*2&eMk7dGG3ttv&`GfT!ky7%ZxMkvvym09^M`q1}nD@bg+u)l^P1lQ7|3%-vH zg-)tJC9^y3Cc8f-Rzth8c~2J7&P}MQBCH2DjY*q$f2uo$JWcW~wE2e7gm4{^{uwu| zPb6@XGed=e!2L-ZtHtaINRGy174yhHLVoF%y6|R1dt)Gyy^FOcqmlUDPAQ(N(@0wL zkewH4>g*&I6bWag_AmHf(CMzW&Bos#-7<8fLRt(Gr56DUaY)_K8FTtl(&I!jVF5;lrQ!Cd`v=nZa~>S?O5 zo>S2PfS$^H)~yi%>`iD-avk1hMtC=jJMo z)5kfKw0YvAxo1)PEP=NBWUSD2nt(}Jc}nQ2lz^qyi}3GDVirK-;PRkVPS^RVD9Nsz zzCH50hY5e%)852Lq*1C&Kmi8y>307P>C;?CX}tE?l;wJ?z*~PMU-JmZUNV;pH@|0I zeF)2^j{}^M_LuC<*W3}n399TCjloIcX#q^{s;rr<>Oc_hcCyE^JGOj?yuRCQM9fO{ z&73zw`Mjd_?{}DD1!2DDWat2EZm}_;vCH6Jo#R&iR1gzaK@ev1wxA!yA}L?@R!W=w z{IB~T!CvSlE0pzoT{s|(NWS09XoR>D#`H;7$LLqS9NDLz00{4f1i&@7cb3a{=Z+eL z&8PhW?44N+|CUm1Pbik&fSd=wh2qLjs^x($03yfK251r8lH1;TmFz!(M4aj>dg$p| zC4F5>G7tG?~QzoOGAtg2t+R^;4sy!#NZMeZ4{Wc)$n1hvFtOq z_hG3Yz;j&Wzx@WL(i}m*T|~cvz@#qH&Wq$c1T~kdZR%Mx_Y44-BcYb#qWh zjz`Yi-V@VUo%YOI7pGhaG7wxS$-iMiFaEgBxE+--&hci(h^0&r|F-jjRYLtn8M|L# zda8u=C+iXM@kjR1vx=r07D1uIsabb zM9fQ+lQ^wnNs0sb?E})=-+@{b=9(`zG1meR9hcY1CkXjHV@ut*{K>0|?PX14 zw=np!9F29CLiMd9342YV!6-Yp z#`iWEKB>!lH^gt*m8(5qS>2{=Pv%D46ERz6>ngn?|In#T`iwo<^=FZwY*4rv*LTlU zJc!x`L}ccJIBw`4N>{x{&5$=z2H_=q4sYdNmpR(Nr2IeO1 z64KNeZTqwrlEgaA`QyU4_RXZS139$860L<2qK`Miqv%~)i3$P~O6Su-wbH)r%f(ZD zCyg@RuOwM6TW{4JE=^Kn>I;Qf&v)T+N@z?ludgMx!*C!&BG)En?IvXfVq<9na z@WUlo{SLx8w;5gX)6pT9A@C%PT!Tta<`l=zAFEV2b)2d69(u(v#%XDFDyV=*&2}dB zPoJpNjr-RJ@^uLg>bk2zwwUKx#B|ox-vEGvaZL^}R3EROGD3hO;_&(;a+ATz+aoJm zXYcd-0r5TDG2Cw4Ufhvvu5nHd$L#gi8>gC4a*~F;by%>3O5v4ay-J7((l5>*>$hVX zuhM@TFsuroM$V~ z4rf+QOb-hb=kmxob8?wB2_V@WL1c;SqBJ>w`UZ!IHtOwEKb&1fwVs{yx2~t%&j;F5 z`&iXtNGbomEfo}oV>7arNnKnnEZ7PFO&vOMO{OznSDZU6bTrul6%>mkIv`1KIwP+GaiOq zJzoW%vxO)+eiXNQm`5+bTzucJNTh6{&-Slqkp;r{x;wd1fR;rdlfGq+Qhr4%}P?AGS4d+YF}%CVC;WMoj<2nUH9d?{KQTW9kzqHH>q&$ZMrt<4D&q z7cdu@oT|mR4QXVb);c0w8kzwWIL##3t5@exR&o+=2sH!Z)&bBt#mac&*W@0VlrUat zuCt3Ien$%bfiL7}d4Ee~0!^8cl)ph9Se1ZXSeCPyQvu_{{wPG6;)``|2de(@EFcjY zeLKI>*u|sVA`P-K&r5Q|`+baWB>W&MgZ@ZH9=0|-ylLP_SM6SBXAPnUOU0)^bdv%f zL_TPce{UZ9SP3hGYzJjE=}g+aw&EvVM?wz1oNP;oJ?ubM*+IU)hhg}kaRi_O8Ri}L zD$!t#mN7?xwU0%y?;Acl+GNpRjBzNTKH2(jlG%$b>IuII@8}YyAf98XX{YeFc*gxV zb1segsgV|uF#gxj073M$AW}<`#70AENE_1Fyh`oN)QVo*op%;O|{BH zc~EH{KZlonv332T@yL%rm^|zWjO9O95F`7jCzrEkzO9Unr0AS`2}P0zIJt@^+}VOj z_|xwc*$fw|YfVNT)l=o$pTT!Tm|`w3Q5U(*TgW%4=-GoLWf%A zOqOatii7-*BQA1bN4tzT6)W*6Lmy+Dx@iz&jwI9Ew`;ZdU76%K-*c5d><4f(xuyh9 z^!yBD>e=Dt|H#M3@bDEAi701SMP6sq=l0ft1M2g`G+dHL&*0ot5uyKIO_CqB>cn`jY@@2 z{h++$)of+qvlWU#1Wp(6cs=T+Kf{g5S{WYFK5?ng%xjkC=jX*;Wf+r3O^$e?pMHHn zY|#JXCGJyT3S*+)LEB98A@nJ%EJPO?6~aj%Qc()RBx^{k8}Y4+z1z9N+*a^l(eh9mnB(jC~!TuCC_XIIbr=``1TfU%0N~lHG?7EJKgRN^S(&eKg_$X)CU}> z2Ld?CkkGpnjTgTzBIUb9;M|pwCw#~5j@h8gq1hq%p>YkOmlG8rdjT0+T{iu zlFdKX#&K}8j9wQ{#70{^;7ead>-*iHBqUBwaWl@^0i}#Vm7Bn|8{FGuKgK(HmRBYv@Tk z7h-7BFF(APQ~H8pa2ehWks{k}d$(hJNlMUy?y*DLJF!=(=oR7NYz5?S#pgL;hVNDs z>yrv}9QSl2+$h6aTZ-mTzytY%c9?eUc)+Ys9MHo_feFHzxiP!7;j=&}6mxrVQu>w~ z#Kpli&AHCW;ur}u+4g|+C%ur7Y$Y z6cnS1Ii3GV?N#;j&M)MHm2y9@#UGDro5n$DV}DMDw)(M?MABe?g8=@-4;hksc4Jv) z!4@d$cTn(ifnBA-4oj7P)QCNYGdSfJv+#f!2N~=TfG`g{Jj-ZIv;o4912BIN#_7%G zI+IP8&;~>f{^|I@c&cj-QBm) zxLiwW7X)CGX$OLgxudqXwJE^q09Bmg5~`9>5RF8g5ARBYs5fpm7t)U{&dBd<8upSF!;YPx9=Tpx)hb z2pW-8;|JwyNxI1j%33iF3+k)`f3Ru?3z`fEUU^@aZwePXyI`m4br_2oT1!jilNCCl zgO%Z)4*~!c%3^N^W83hn&YN-NbbSynsEiW7uw@Ky!eIBKThw1otw(R*ZwlmOU&}Lz zun`wfy}J(rV%g+yS$Z`$tW~_xDt~v~NjPBQnB@VX_BL#bgMuUVA_2`bESqWU@YMLn~>l23x@?tql(_B(7B}?UWrX@mNwFVW1JW^Hj}LWrafSlS+*&@ zPth0YC>YW1m+UgA|2VWYue<4w zWx%g84h0MSx`K3Q-)VmU)bRhU8S}Y4#h2+%Q$+F!hmA|??9@#3qjvA5eg+)#9aZFs z>20K*tFBws(l*yZDqrzry?Cm@rd}&qg|C+xm@@4HX4@s|r&`4}`#|dw9%W3XpJ?#c z{Br~IXs1zM*ADhJffZlPJCf#SJhgm@(XJjK^&29V!ngEkOZ+N9r-QYF7c5=xpY}0) z#LgGAM3KG=Ht?dwwll zOxK|MV%Di+tQ&F?-HMXZVJniwmqmKS?0Q=(yJnzmCL}cTZ+`=9q|1KkKw>RML-OgE zfA3!Fo%0&yaB*g&~_%rCK-E{2X+k_<46Ipa-RHQ9a*9pPnEc+&J74HA}yrX>i%B^Ti%8`B3 zA=Jd3ZR_i53+reH(}TY77a^?h^HF0%irCLk7mgPIZp7?U%fqn+!6X4fsF8t^&*1~r zf}V*Lfv+0TiMr7Pja{sQ>pS$@{QtY!MaOcJ+&3!Bw2>7}*Uy@T(-v|VNeIAs5T$6{=4ufeD-GJC2 za<&}OB=s{2j7nGWGV2v%1*3^NV68kd<`AbfRNj6~MZOa;IPE)$)Pn5iMQt=%+9>(= z+Q3&CT|@=V6>hSDQmCi`z}C*@qA-f5no;Zl&;^}^t$h&pm}=WR&z9x(!%8v8zxVPx z`2i(N+^RcW!f+x)10MApbkCz=*@`)9Z^g=xW1}UT$ym0tkmMlPU}S;)@;q=GY&&Zh z_4<}FQDV*~Y9~X{tBX3JvFs~BAsEdc7(t{9_rc=*pb&+r{*xe4=i%2q%JOi*Klz*u z^6&3j=|}024@ljmVQX;l2&%zG&*=aS#q1wF^>iG!ZA$q)ysz<(Jo#%bd=ep!%aedhqrY`ektwMB zU^dJP;|!a7(LzV-=c1nfuqlt z2^0xGHY=??A7XUMb5Y!qf5zW_!@}R@B}c@(5RdWHcXPeaf>XySP$wU;p)870%Z^Jc{JtBI|?1#RonIi9gN+n!Uyc8R-J&IW88U z^+$@Tw0m=H=B~D4Cf6rbbMHq4_0*eU?!Jy7wYeUh`+6VccwAU=*!36}j>O>NBm~t+ zN=BAC&lTUX@t-Y3$Mwr#Ln|Bs&`G1Yn5{L~hE#d&suoAav z;i`hQw9sv^+n%7~2`~5a?9CG~ zEJq3DC7I*)#M&~|sVkt&*lYC+M>3STYI-x}Y1n|#zzXmP&j`0fbfa2e50{EsEO2nQ zuD<7X&i0Rh1SFCdiO4atwCuXn!dT1)UwLGrd!gI${~5Z=wuX<<=Llf_Y+A)@nc}$6 z*VV53N7zptft&^0@u(uit+`49P>lrcT71S72_j>#qp@9+No84o(A6|&ZwtpLfH?k6 zfH~{H(kOasR}1SZI(v4{A$Zwy3`{gkYrH{wMFoZ?!}-83`l#xIxr2ObqyHRG$^(wb zks?|P#-B!57iI0~!zQuDjdcWpI!XlO;@KNVS^FNe?r=@=Ya@`ifs~o%8~?G$pc)7I zBp&}5Mm{0EW#wFi9(cFsl@Xhpi{{YY0VaTAA|PQ(dQ4|XPKWcfHt=J)((jL~7)1*E zAED55qLvo*YF{!zT0B{8z>fQFV)&Vqf+sPSjYb*U1bK-X8JsJDXxC@@C!WoIM zb8Y*Yrv9c?tYKp`vOwOH7PV@jC4u3Sdfe<&MGVA8jpjZovv}k?2jf(80yAAEHkdPs zQ9E&Vrx9D{B_`x1nZ49c21fXMqBajxI%vyO*0yS_^kw5jhn$@;7xfV2>BN%nw{bc1&@8Ur# zak2hV;=`?0?bk?_T46?Bbz733X;^E&B+PHJ>3?=P5@_s`)_%oe`yx#%#HdZK$27Yi zzLM~X$W5&vJvPa$g}q2*31m+@pYi@z$}E9CvvxaqlFb`<%n=OVO4uR$OP+O}H{N2? zgI$^=)(+=Q2Lj`l3FjNGgjpYqxmy{OB*x@d%^t>S&fET1Cl{crk&sVbBp;+m=GAK_ z{QrF8zum~JXI@H7RBwk};v5Hh5}ctrU{;q1(n`f!18hB-5cT=R%sEk(F2ZFUYHZTi%O?->y8mhV1nT-qQbJ?^6CmSzK@I_GTKPfXu?MtjX8Eo z*d$mPDvHrbvoa&An}VJGIg8#03_bnP5;Bruw;x-Y+&L2N7ac_Xx^IL0FYmAyW!q4j zkOVmLQ*rb$B@Fn8wcb8h+5L@2ay*aHH$ZiM7cPgR)6VsZ6rs z?i6^jPSONja>@1OO-V<5Nt1}2D`jnJc_MdruhtPCD*r3Y{N*hKDO)xMY94d8`@W1C zKzIWP@kU!*=FC0R4H<{qccs2EuAwks_7*##dz&ky&s8++%l~BFh+;0dUBf_3wqR720quuDWRSPIK$bc z?iKkTk=au3wHOhN)~qaCILRx<)?*1NZ%Y~%8@NGp(r7}%wR!6~y174c@jnVbljj0) z{Qw>k6Hmt%vRqA@o5}yjf%XS3T)wfbr6WPLF#L!)#Qp9wh}&&|GFymqa<6mL=sahE z!v+@S7DVm<|%@4~(#Z3!kg;i32DcIJDpnELAh* zHrT#vvnAYVuzDxKiTY&11Ck>bluNHnMZRxP6gV;Wzo#{ebFebgqNg6W&%M0E>#NdR z!)wItH{pEY$UOV*4S1t&Hc!oPWFq5(sRB5>KH?~<P6S<>zDM_d2&3K1@FF~{6c{e_o)j)^ zpRd&Yd~$kVCT@N9KufSzk7XzB)_aAd|Jhn?SUttqdN5nuda|qW;qFSg_3YP671d;> zp=W7iu)}4MsQYLi+oj2g`A&E2J@Fb*{4k>A%l_1?*!k@b7~@;Q?1J7-=M!zW|&z0W|Q%E%|2?V>hhr z(^wV@K-X5~$f$5Vnl7+8J<1$v8?M8Dpw@Y@gD-JE8_#?Sk~{C#wz=BnD{p<{meAUR zI;Yq3@Q`~hKr25J75u@qM*K&vCDMF7y$4pi%ug&ADNiAT(70&Mel-a;mTjNs8ipSH zO}QZ2qW#=mOsm{p(ou#8JL$`Vh=70NUCzF3&~;qh!KQF=gPn?qJE+C`Hqr-D0Vwif z2rijt=~uT>+({nd4#V22dh}C~*rS~LY{yVVmst<(Dt(FSFf#-S9kCF7!AoaQz5j2@ zpCW_&EkGZ%U7$mgW#%rcv|cuw6`}y_cW&EQ!=1{4+ON7&2=NtK$M7Z%00?PVbt(!# zghy>Byb@vBZs-Bba8*>G=S{YHJ^O@h2Eco739mD|?8pt<6MHU4d4XT&b?6M<9JC*K9y(GB9XN4t)A;^RN4}A(4PcC~~W-Y82<7E*H`Tdr70Ft*b3R8G?xd6u)OV z=9p&-scghc;C7@r2MVnv$d|@o5~pSS9XLtMkj=e(Tqy?S0st^h^dzB4-zM#Y;1XEf z&7O5rf-L-Gp#|Atj_PD}j)II;x#r~y=5dM(kIRfzMLroizC~W87?U!Pm%PNich_FM zNs`-$uAiRC&A$?#>76h&9YnUD zJ`rvcc&WKJh*P;5J>G>#RlM5Yi*QxT8A$?wI;lTBXkWMMuoPX`&KF_Vf;<`7;#*kY zE_kGqdh~8v_Of_xNTFh* zrcFb&^s-Kxi_V6U_DDdZFD}igvOGye$(M?)odKA?Mglkw5=WW)mSE(mu|*cnBX+jF zEOpc$hGKt350PY8sAh1PqovAi{fbhthLxhHTlAM@mm0qQvkm|F+U$CjFQ*;KepRV| zZju#tOjJ{tex$KpGhhrGiI?UC+1HreNC1AHQ^UHXAIncX7oNJQqP8wxsOSH3txLWT z`4ZB+`p>F{t0+J9D(I1I@!yGs2aBPSF_V5~l6&_lhV)I^U>S6c;-K2+L&OSdg*XYs!ttJb_$Em)3C5u0 zqy98q<^hScjq-8T5*ajJwtLbPnxvxyiS+6OJb5S6gwg1)!))AOvY$yx1Cr#aX$48Z zF=qNZ4l{>jI!OkJOOKz|+l26~yJ6ZEjU$Ui(~a;O+MjQQCN+KO`pEl9=$Ip7GH`w; ze~^1UR38daXj@PL6?Tl1=g`^g#AnD#yARk8_}M2b2dHs=zuD6jHBK(Ulad{%`LJgM z?6(}AeRph2S+$B}xej?cTRL(JODsQNfM|o4?CRADn%ksn+`6tieKq@Hm0U|Y!qf612&#&to8sC4H zb=yb_-*M+lzs3VZI>ke{1174ZCHjk5`#|M8@|3ul)~^ZxZV5Z)yN(NBj(@whhF>)N z_t9OkV|~pJ52XfQyy)v{LHqmkc}i0a!{Abd60CuA1}Nc{Ad+g{Jlj01w>y5XK=yXq z6C?w=d~Dxdl*S*RjHnol1LT03_|UtTd@ApMzlL}a<0X5s9qQ)lZD27n)tm%Ryp`kq zs}W)|W&Q@dZ`4}rIPo=dx*tF)haf4~$IPl3L{nh8%kNth{a<>j7x$qsc2I0s>ypIb zV3|>%teyqCPI4aBlv$$uPTp9-4DJ=*kWi+X6z&Bgt4oi0;m1FnUKID#1hoG_?+SuY zSayiphtaG=Ld1eJLe%)QgAn0=@4F`rdK8&E41K&6={wOcvwTr|x1wJ&-V5=x4Y(!j z2s}AY4nL0CCPavm<<*)~U!5g^=CEYfBzWvNz7isy)~Iz~+E=f2x?20s{1kl~u9FDj z5(GSne`;Ez2jybP&XL0kOd>Z|ZI$4n-vQ7D5L4K0G~ehKrxb-bmN?iA z3*)y}^_VG$4;Gx0zjvlT1vD4Gd@{W)8H?8~h8vjK$KLh#g<_MelR!^zC;oV-%#f#$ zD}E!42gXn_BK6BPAS_nV1-4sYC?NSFW0FK- zk2_nHV*bsT^yTzm1|oBXt-!!y*Z}YMyKY5prrE=u-DZkwbI*+;htUg_Ya)tCs67ImZ2guuy_72;43Zu_?JXGoE^ z1f%%0!)8>3*Bz@6LkwPD_cN7sMqhMUgRF#=mA_7whl;B{D#N44-JOI6W|F#fO&BJD zrm0;uq}6#%BWsrNeeZxVbe;9W>=U4r3~euUPUSzWuvm3|Zf05GsnGqGSN^UK$7jR}16Cw%#Mi+bZIQqpsUq*s7yMBT8~e%$O) z3a)i~>$Mf<#=ROJ>wRI`t}%n~7ILUXR4nnuyCRuTs7hv+YEn(&uk0`Xszp%gFlGq6 zX&r9Oic&lK^oSpuz8_{Y&c6?RVrYi(0UJIN(dU;0<|x8aUuT$33g8SfIk4uim9;j>j|puiH+JJ)wnuB-E;IS!TWi9(*eA)9}8jJ)P*QX*v?i%d1 z11A~MjoN?c7C%e!VzbLb$QA~A1ON!Fwe)FO+^#ocRl@D6KPKR}gz4VUGp$Ti zx;E&*BI zi*&l{&-O##O=TD!zsa z<0v?vQ+aryIzkw_r74tr9OT3XQ@t4U@g%%S?bQ04O~%n@gLjmTX##JlzQ_h=zp6m+%4OWis%fY+pE1!Q4!7n;U~Rt_S0myk+Ky}{s&Sh(SBnCJaY z&<}*)9-e@%J_}y3oC8eu)cHAYpg;jo7$w(=?wlS4L=q49_|p8qugKV6!kgjE>T`1B zGD1Y$6pL+UK;Pvz0%d^IFv>52LPm`va&@Nc0fr&kGUdy&MD?3#|2Fsu6h^>{cwcUz zKFs~wyt0bN2;fc_nnCM}qy#}orLrkPfQmIXfU`MF2|H#$iRXL$b1L=%wUE)1scN)W z3X}j;6QMWH_{oFBxh4!USf{af>N83AKDVaX7%`mCKW%{m=|Ko7 zp(!;bU<3l`km9do=|LT~S}E9V*PbR3$`Ue8ev0#{Bk*NA!GO%<^+ zB^P@uWB#nAzO>dn|1?-y2*6gzq6&SqZFX{<>6&iWDg!)eV5Cd`Oa}YI+haZxeq~7L zqj!6=9}#AX-~WjA-l5*P-FHdTgMx-7GuQr7X0HAa6cKAWy6BM!Iw43jhY)0%1(0Qe zA!HhfJ3Uovv{n$5%oU#edVJ@Ll+xOapb=*e z)+SeD*B#KsA|eH?$_Nua-+#Vj=csLaDQ)iz(rG)+gX2NY zR=554pFU#1>uLOoC<)9;sc*-|9nWNGJNYANh<$RpAUHeW^0u;>7%FeN zJj)}UR{J(zvd5E>=-sSdbvd?yyxeQqi9~?`BiDV^Et)N9!x;D&WZmWaVaT!eX)i1y z&Ywb6{D*?$50 z+W|x~S-fn#zDAZKa*1P_nzN|K<0;GY$0)+l^Bgz$*#mpi<+RFxHe4lo_F+vRjed3P ziv6R(H>C05fozDP=~?7I2C0>7K9>I3*I;BPq+Van<=KFe09S(_%>TIu@I@B68o-q! zY@>gzlLWa+0VbGn_)qv3a4QP1^-j=-vPkZnspg@i#CZf$lwU`Hx3cB9^A4x1vGFgI zGPV1~S`dbRe~>p61DLJb6 zhVZfH&?_sh!6c3%pHwY_;$uX3`FNS^f6HJ%rXMV2w&N=IJ|Z`+W~mQRp(1A0 zAY1V!Wxsq46oAHjLS&Q8K{;WY`x@3LLe)udbaJX$beU3gcl}zmD4M-;O9qz794;Kl zWM$w_ZXWm`h+Cd)$_?lBZYF!d?i;TEz!6`j9#u95JPO$UR#g=6UwvxO#Z;2DngOd} zCLoTf;LSUiPkT*dfZ)s#lhgwT z-#pVOzB4{v6x@`3xUVF;PwqY137MjV)Uby7fPw3ic`rVkzS)EbTGxZ3NKP)lZPGg zn7G4u48*j{xzx^fQ5^N^{%M&O!Bfq5>7m25@ADPobgc z#zc6{DEllUrsF`HNX_KyBb4=xmCcD?KV&+L#>zc?ozu{_b{uc1@d0+TL%vFKyPVX| zr_NXT6AZmHEjUuaj7~vPLNV!8Z${ftUEHExaUV0Ye$!O;Pxxf4ciEbLF7C|iQWn-q zl;2uwCwOIRL9lu0=VbM&N@xmS$)N)T+exxmJ8#^n+Q!t)#FuNUKF7Neq=+9**0pQ7 zWV+BLGR@s-0I$Ule+Jt_b2jVbUL&?}Ftui4smF2vhop*rXeeSgODf%KHqO7)7gS&Iugq)MpL3rVR|Lj*#UHoOba8`+M6 z|0*vv5MGQRpxtolJ>*ohq4Vgw7gU{Sh}w`+RiCJiHuc|tQD>0f5{h(*D>>VQm+7OZ z>(%0s+F8(%zJADtqSrjBuBt4S%-3Jw&nq#nnM@}B+%R9yUXZ2^b$ z9REi7u6-EBiIeXhM`+2^3g|W(hvPTvv7bxgUwIq=s@mNY`A1sFTBU)~b;0dXS*1q3 zm}5?a^hS^HK_4|4V3w$tFp|(S3oRFBvQhpRs^nfq{rJ8r1*j}5_hNeGu1x(wlnWO< zWV&g<@AO^&gU;FUziYrNQlZE&rzs$i za5hm5m{VsSxV?}i-K-ZmabO;mqs$m-Ik~Usgp`|V_I^-%lM|JT+1_7@8P1zc%IYJv zxkz;2oJv}3qjto!(tq9il-~3re!i7D2c2j=oRICltWTTo22)P!4qjJOcPAU8YttBd|9P8th(zwIT20(s3v#(z{V|3RKnmq2G0LMX>WI zb^knqS8M&JgA$WA{8)XOG3|G)6F)zM7TS;Et_EJ}Yv(RNk2kO`vcK%-wz(MDYVVA? z_hs0>U6%xmeWOeM`koZ~t^Am@iWTR-zqbpF++(-5a*qDcDhJ{#-w!z4>~!gScngNF z5)DYMf)y3*-ebFlW?4~04Mp)_MfZ0REPgloqzoqNMpyhf` z5K^%6q7NH2{9^OO^x_~V&7*C7lS7cNSnKWO0Il*0U>L*znN%ROaVpz#f0X2Q)w93$ zTV8yx!L|M-U}t5^!ATw3eP-|=VZX47%0*vxMI!`y&}a?ms>vEXo(z1FOaW+siA z=L4J^@GgRvYn&_?2aWpx1X;$Y$X!-@DK#`+O8K`<%SXaSdV{_BxAtWQAI?b&E+1x@ ziYVc3J6i1vhIlkmQD)VFd9JaX>IhBPt;^(L1 zrvvdHR~3gaw@z1AKEQHJ{;zS?fT)|WiMl|)Y~qibD`4ORI^d}bC_j}Flv95Y{K+!} zVDIy^XDxcbnN+yR?{xhJ0dQNKReK8BQH3;uo-B%&+s~gAj((D^^aIbn0}`qc zYXVB1j!yvN@-_Jn!DXd1Alm^d29odDc0hh~-H>hMx9Pv;oV1Csh}T}dL|-HqKxGI1 zFF~k%h3(9@s`S^?CbeXrCSdQ?3|bClruvU6-{BWD&3jbNW5Y1dPATL3{T^VibpCTU zcM&#Aylb3>;eRsi@eYe!einsA0Z%%W%R2`@ib)PLAxJ%zbYs_vbyKkU@s8w^y!Vr^ z*Q+OdNzB7Qt_#2@!#OmQ=m#YD3kPS=?VQ6Qp6Yqc^^%|Y0$J=uY_#8skRBYhIc4k< z7jD?*L3l7&z6DrY`ox+uJRbYs(~otsBt!SrA+i`wFEWtQpfh&w=chQl1~2kcH>5I@(4W~ zctNQ7;*~o11Jn3?7GH_r^TY{~22Mt#EXn$GP4eeY;nUG{-96o$+>*>yZ_KHgLN0dR z+R#=hNImFkp0c?KE00EKN^Y8&RM}SW!#v7cEDFk23Xl-L;M|nJ?`{YHR{K*yEfKew z2?aipu=!4qg`MH{Umbf%p>Eq;AiGz>x${Q<{IXp1c_7nA+fW4MaFtg zhwaA}UqO-5596x=1*|$+cGWX!#5seI;9N|GfxPWv>v%BUtCv%BOGhD1?l=agoitg| zrK~}8*RJg(_0e`9Lptnii3jyzdeacKnS2nOGQwcb_X60)+XX#@(fD$V(q@L+s2Trf z2Kha5AK5*`Hy8s>ue>Vx9#39R@pYOEH z8;P3{av`^9){ckvW(eDFS(JQn=01h;^=T`T!ApLId|bkeffx z&~V${-0S^laYuz{x&EMVgwZ&hMzi+Ww_kGQ-mMrNT<$9-xVD~|-C#FHqePl&vl`VfBB z?^XZgztOuqeLUDi4IIs*;-&sYq8iRmd$Ar+`=0%V=YogrU(KZbkDu^e!>4=9Ub!s> zh?;DSp925&CT=^BBKkvAPdLrlhiQ_RPrRjSsnL?r`82E)z5tG&Kvv9zxJ=dL1j?HC z$n62DcH#=yWTWka;xW_n`8H3Y|Ine%7ch04{~j0h*N|Ys*|^5!2D;)B*$b?*X!WxGRjmq; z_CB*)d6eLAF$ecm*o^JkNC`;aDb?tBMtW1<3E7bR49;%^Xu`O0F;eYc7KEY))8h&# zl0DpYXRFe|(+R0vX1xvb@&&+A%pW*N&ks~yfOM*~o+7q1Uazwz37ppkikr*}2+Huz ze*=J`PH#}uVV(((fsRXWTtKuTLX|%@?Kn_*!`GTjCGHrEI~G0=-aS;qnlH8unv#Rf zSgh1^esDCt7UkM*k;{cnRSgT|WRBmW#g1e4?GpktbZ#b{WiC#rzc<$|UA*>Svhq2u ztFDk9+^&rNhhINcT$XZZPhf7@y9Nj((q;*ieIlL1=$xOs(%=YAeD9UiuIv94>}@ZLXJ6!Ylew*oE9F=9N{PHCH-u5YnojvE(UIA>HmjDh^kh^1~<6 zW5~Jnd@B#)d3n=Op!!fMVq8vm6u+-d`I@|lcJI9yRK=rSLf4<>><|w_)K&iT#;Fom z?5eHEKC7pW7Ugo))Nv=txXL%ZevOx2k%7>L8Wc~SX1`JTdb$?r#J{tlm$k#BU0UCKP2V6;FCq4pQ zjPzC`S6?&6db_}dBU?-D)p8v_kCy+I$%0sBw!|yp?Vs7+>dbJFme))P3h0I-@eKi7 zZsRU7l3uutOo&&D_lae0V6A9hO~Qf7Ch&;&5cW$Bf;oo>1qj5%iygI1=bJdvMCE=v z(<~D0jY_4g60WIvEMjoha4_JXX@p zic1_z16$TyTByycI;z8LjMsp_%hGR4U^TaqiQa^ZWR4aSFt2%o7hoa#8GtIJzZ%m2 zo=pm`*kjer{<(NB-nd>1H|fZ3#`oFz@V_r)m$W1~9JBFZn<(ry$5$CKzz7wKwZhQ} z*?gODD3HYHJpe6YiRp6r&AO$L7=X5E-l0Q&pnTczgrm8g%FYo3pW^9rMPhFuy=`U1 z^*&`sQ5dmQQ@%-NppGi)rz_&(;t&&Kse0kAS;@;TFUpwcB!9$2LbbV3*e`rLu@fB^ zuciv(;=r78@qA_DvvHJ9$M9fGbm z_D=%lUx0G*aF#l`E~t8}42*>g4Z7*|bjk(d($Flf>!v9olNmAU&%7LtX2r=C;St~K znYuk2H>ei&R8?QqJH$B+s({j%SBSHC65gjD$9x^~PE6W&<3tG3#+X5Q681;Z_H7UY zrW4aT($=a%eJ@zgY<`?-&4>nq5|QjkofH3pMSVPllmkLV2x12^AVa^@wd?z4YC=wZ zqBfs{e$*XTbH~2bsiu#6&TH_3X@;cS9xiVF_uY0Kljzc1(Td7ic8D> z**Fs3As%kTlij1Zpm@aWEErNK$@(mjZ~me?=YsL3_0RsnxTtyGTzeqx{_S1y#rDML z3hn(RBmAn5^k7wVsr$tXi_76TncGq2p1J$&z?RGN{beKZz1!eB`rP1qwVR!#;F$CK z1L^U7UYXPDyp`7AThoAx_TU7cdyMPB)cqA%`%mRhN87>oEQ>b__~J(vhes8q?rRfiYeTy;&!GZyiGcNh5JPAZGGoM6h+ewcst5OD^?^)2tYoMf+wX0V!?>vch^ z869FB0T4+8o8)OZ#Nx&n>`MB%rD^w*UQPpti4oDU>$4p5z)4S30FuE= zpb%n|%kj7LGntiI1EOK-caF*cXEV|+qfWU;PQ|4e?5Z%f3<*s0jyPDHoAll-^l-3v z=oNc;`2cB<7qV6Za4&Ec|0(`in<{x)<-g`0IByk_ukO5>{uhq4;j0(pj^}wS9q8lx zpvlHQE)+9!y{;6bOC4*w*Rp%6sr)-MZ0my)V}B>5cF6@&kYyCpYlC6{AP) zzy_^wU=$BU%$7$D42(g>R!HM{{qAT;?9Z0fPL{W3T2J??tj401@ zQu~QupnHr8X;Ps_G&l_Ajof&OjP=6Vz}YfRd5Gz8ovXoPS!YOSookysdi#UKpejVaQ$0>sN>RR9gLq#P2vCDkp3>hkvz zFvNtj)$-w?Bn-Po>BCkfGd{^xF=r}!K13@7VI!bNJVW3H{H&v79ZU22a^_mMmCoEm zdZ?v*R6itvsUggLqfUFf%-IlRUaM~&Rm5O5@^o$CdsW5R z8Yt)a8~}OIfj)9!Uncb#A38N?_mpuQp=Mi)ot^vtpWms`92%n+@^P zys#fAx0LU>`&Sm1vSH}J_|?4pWSE<(SQ$Fg#)6H?iEqsQ@Z`~iaA~ZVoeDsW0$eQ+ zSJ22I5h{(BuuOSeqYabG=N2&qEYI>AO-kPze|-vf-svLn{N@BieSGteMT=@WATYwA z8FdTewr}tp?Qellk1(v2@Fl?KqdfJ;N~dHu*5AG+M!{l?&h@8Us9cXytp)HwLJwfK zI@vI^1m_$aw!d4u^HJefANd`s>a*hOq!!}S-YYKqSF#j7)C17&7|D+@jin-3!D+cT zs(sjmuP^KjpWOX;!h){UvfrO#Kqg03nOaa#K(1k28%Om#^|aC zIE9^Pt2==ob{24?WbCWEsmRdamOr&~?zQP>S?Wy|th;lIClg&vc zR8B2uGRZ`C-<6Vq{ri36>`%=j(l@&J{0_tBp}oUs zj`n*3@Nib(DG9A$6w(y+P`f4!FF4(&AhfME9#KajF zvb~=POMf?etY;jy_)A8nC z{p(n*LGkNtnKbXA5zdmVQo*Ho?d^>1==fLrY1`pNLfNwK=7zzoxIB5k)=D_(Hkq_$ z5T`r#y@T7U;1_`rm86;M&firBA;McW%|qM{sqx%w_MfM-m5oNz?XJxGypZI&bRs5v z3C^QZAqvRMp9>M6>V>d->K0GP$x}6+6tSD0ar=KESh0)Ibal_Sd^$qz3?b%wrDjsz zvSdeJsV1a0xABkvjdK5m>tlm8c>O`k7P=iikA2!NTP?tdyKoffl79Y0{E>r@4=lf| zfnje$g)(8}_ar!8YoIUl9mivN2KEt|3p;hTe)5mqM?y2X%vi>+541_Ue!N94xepwg zZawx2GEN~7)Cw04q7H+P;jKr#(_ok3WO~&JV@I-4v)8^NGzqsGE9I)|ps8a*=|8l5 zRBvVXF8YOW1DD}!pcBDxOr)^elnXb6-U%yp9L60GV;}IHuS26(C_>m97uJ1YZM^eA zC>9)pIlRja0w1IYQW{#R>3naoNYypA3Nondr*^sPW{EK(Q`Ib0vJM)Izj zNH6r7_Zw0@Z2v~(!MrY+iQW!Bwc}}0umvS1jVW+xPtpNCM)w3Eqo+WUM8VTpBy37% z_>`+<)XEY$Ph4m|QZI4WqptD`$%P@i4LsyvOsC)PZgBk*Qc9^TNsn@SlRhF`Gj0Gtr z81S;vRnIcz9CqkQ-G}`gpA_4Uxq{GlJ;-1@X&za~)UDA|Tg|l3*$<&R?IFz8UoP2%O zTME>sr>F)pXJ1My9G#C|&^7;H3B6pAvURR_Tjy!0jm|Xn0Y6TXqbf@cZeRwU?Y&*hi##Lde6`0MRWThhe7>VTTDSJ6-QWy571pB)Lj@h7 z@xw6_q&w2N7{D!aHL!WGx0M-hkEDieKg|0JwCTcsnc4w8cfbpD@_PT({lD$i$ZKHO z$U_2ilWs28ub^i-AQnNI+<=RkOrJ$R;^L)~GL-z}wFPD3bQe zjkw;h2%tI#r5tdIi;Ysg7})kbKi_BgM+O;0;f?Xp0!_0K7;ti8B`{8euZLrreij3+ zRalMdz@j1N)Yxb4U>cYNN4hyit$EJU!XmNv5LI-ghzmT!^7EB z?r>R}wF7M)jHerL|3X3N62JYBZ0~j!+jm_)Dc@uC3-p0^;)F{600=||lW#x`Zy5t< z(?+`oXv3sTBy8r}BY*LVU7}(B+4@RgPx%l?>EJ9)RU4QD1J7rYJMJ71O@m_ZU9Rt% z>c{{9)p|i+i~dON*MCQfE?)b2pt?TCpHCzD!QwjXO%Hb>Z0qz75z;9uFz*DK;wJ^* z!ol)DP@h^i0g4bv04Lz^vNfnTQN~lInilp@hX8F(frBN{L1=jGNbR|t_FL%CQ^cVV zFCFiWVLL=UO=1=hE4_f%o{;F`LW~`CRc{TvQlU|fGGBWJXx$0_1zy%~9lT5iWX%3y zKDRJuT=e1>@G}{GXB&WMW_T@bXS_Y5v1zVJ)Jt1!IVLrWAp0!wIf)$eb_f(2!%}=2 zE3)_^j=Ii<{jt5OEbU!Uh3xhp{SiO)+=*F!e-)N$UPlFQN&T;yc>>RRwZz8l*PGj0 ziN=ofSliVS7ZU3FEsUZ%y$t$O0^?>mm%0|9dBdgcs=Fd^aMToxWMY zNCEn}=80d`O0)))27I|?&&Rl&-zrqj*VQbpy;c$ghAK!;8_C<9^y7l~B$t=ZW{MPU zNZ0e-zfn7iFln6j8vfSyWau~iWfJ)(UdC2NV%hCoS8j@flfgJeYBEJ;NcgAsT-?2! zik$Qg1>r>?F5m%@CEqG>=+_#3YVuMpl_E7IH9dA{NGLo)g8`JAlMQe$-wP3$B(6?D zYU6#Z)F2O58N`!+<=TZnA({B_;?t&-#Z1RH4?Q|P9(wQ=_G`S<$|cL$T#F}{MVFPU zURA=ou3lR07ZbmFB!1mQhMr2G<}RLkRW z*0#1gB$=LBdk}oh_4N$Z*eb4EXUgS)M7Hi8l(cA`9TLE(n7YRc zutCP&bV}3(5OpMLi0+oi1x=oMrR01mh3JDVQ9Cbb}<0F#x7BFdlqTF4yQ))xAiPr%`Qb;u` zxV>P1vz+mO78T6l1sWT``;Fd50WB&1}pO^Y~d;&_I8uKfmL{K92VQCe| z*r>krqkM-23OMC%NwJY{w|Eh3F2!u^svle7^w@IFz(MPGmuxJ!=w3No$gI3JddE7}C4VW+%F#S*DEp49)S=g-9fuZkAd ziqut)#@Z=KZ~;QOA20hmxws4mH^Ir_8!;|V;v4cI-&w3i=(u3t7!O=C_bp$xGOZPy zOa*ZIo3f`0RFnUWR?`ZK4ZY4vK=$uuToX8;-U~j}X=g&WLduf*1AFvJF4ZjeR6kxy zK8s|!Ux5s-)wy~-rwI5Nyey??=)f1wdAG9(vr_NWBAk4v#Vq@?(U61O?7&2_$D|dM4yI zvlrfH;97Wmc=cS68VK^Zce<6bBBeF+NIyx)%`*@q-moD;W}6d!nSQ-(x&8xRaWwPz z32w-c;zUn4PwJ5&euC}F^&bO!55N)ABMy)hfb=f^3b4u<#X8xQ1mH9&zp0Li8VD0- zbgrpXydwS>@&!qOMyi0SO(nSLvu3OV`BLrf=0MZJlhUX_4P1zKdZAvg`|j7GM{>hg z9H#1!gZCZ`i#|Q8$QvB3fk4{@>Q1wdK?D6u~AhJ24dQss8r3ihdquN{CMwuQEr=RR$L zQ@3nF6-wiFP9SfEAaaI8lEIpqd3@cC>>$Mk?cB*owFd3?I@>f4A*X`qqpTvp{<{^H zhXaf!)RCpUmsv%XfW5ht>VrPcs$m>;#Ja%lCUNg5mtUF(i^>tpRn4oH(^}-SlrVj` z&v1FR7-V~$Nr<)4`J?gMw92O4zheI_G!mvY?5N(>8`@-6A779J9E!GwxCWg&`rZs^ zxScCD&{^Ki^s#i8OM~qKP)TMGESHu&B1+>n_X(5#;!mxeP$nnNe>5yp=iB=OpZTfb zsh=h0zq7#>Xn10E)9XMv;Bw|qldk`pY}6A>8VQw;A{;6I%*v&6zyp)6ix?^Wp0m-dm}M*=%8@c)Ujb*=$j| zf6=7&^T8TmQaRS$2YwVeF!u5!AT~;3)EoJ8H2yKCKRt>@Jr-yHO9dWms2@-vJ<$NS zga?*a-V}a6N&+A_?qgb%a!F-ss@md)cK95v?2m%BLJw#cPJ5aUko&rE;OH`hT1o-ZC zBLdDfiId+UVF1x~oF8}HsfTBTklxQETdS(A^Yinc}h#K<%(< zpw4w{mee(7mn|IgjE4~p@F&PLgdJY0(v76M!IOanW9zlaS8`1F<|DPt>?yD249Yhw&%u(O2fWdxGIG(2U9^)^S*gzyQ>O0GG;2p~c! zl5ep5`vxLtgl4}1^9i0e%9pw8?WT2>O>0nMCnVx=s_b_{p_@`$-dA1kot*Yu(OFmy|A|C960H>u$QJ-MJbbU_M?=VI?z=H zn}M_>b8`Jzj{7@x`C@70LCio?B?|$0z z1DFD6$uK)y7+dGbKpXXd{hP)T5?uWwHeu2YS$Ryr<1UMmfH$>v`9ID*+3J=eT1mmt zqpgRuzJKtOR#R957_MF9L-vCX&>(+bPNHjp|E3|oH`tr!6T-`Er_E+GHDfhQOg>|+ zoCqc*#XYlDVS1CgmXb{OvHv?+(Kl`mZb>YD{ukB~sXjNN|38IZeW;wi{{qw|YhU*$O z23BQNuEu7mmg`2J|GchR7bfD-<$_{fgs#pVXt zWhVI-UUq!huQrw6RWW-yqd($&qYy0&;UCS~QVZ{S}zg?vu5s}EbfB&tY=*9*Dv7fI*)_PN}6 zGX^f?fk>(acF}b=1UpWRqf^6R{3)$V@*%{rBA5o_=+3Tss|F%d|ElDa+?1sJ{RE z!7NX+mab zEm&P)=%(Ve+FkULx%4SM=+rguoNHH1*j&076TtsKwiBHURBQ0UUK&xIn7=xprwPMo4CTlT_^nD}?n;{fAVLy0NyYxTk# zCjUQpHtf&iKH2NsJy4WaCo@mSG18T#Sg+$nZRSnszqdqQ)`e6(NIh?pCY8jGTEF{F zKj8R^Y#tW+mHPEN_Nl?ZR=%Z)1cSOmo=&)w-HoK>yf0zFdM>+-DfW21v~K|l!%%?c z*`PPm;X`l;@lKl)z$VNi425ncDfYFUa6^5u_6x0DX$!7AfbwL{0sV$a4u@|H?%C@# zynLC5Ei@&{$f~zh7il%XEv;eNNKMxrnCzVd4-BUj^QJR@Wf!o@Zd#ge%d&104$N5S zce;Lqn}#-wl#B=JJw~)`3^~>!fxe0J$hG5`M?oSuDCn?(sJmdl;lXf=ifaTW9X5j) z7XxHqtY$BliILkG{Uoia{r9J;nfpIN9gVnSzbd*KQBsKfc^v2D!r-x*4}06P9ou(& zIq(U#?=;{7C7C{TpQFZIHPl1^0QHHAmIKXV@<0^5nJ#D~eGC(UKL8?tvwfpo$~@n24o z6(sh*pA2~v4navO!HRT(dx!wvBK1gNToo3~%uyc^%OCERBzU6YZ+sd3AJL3<|AW{Ucyd5Kt`Z?C?z~nrw^}^| zrTsO2G$Y&S;YROs?0&|INMWcfM;u)b750)ZD^m+Zx$S0W!gtj)@9@D4fy^H(fJV%d6HUU$UsZw(go`Ue4#zX!>R2>h{gDN^oI!7Vky9dP>bOV{*-q zw~FV>eCh2v(QSfu!e)Sh1|W2f0rFY+?4u6g(Q-D`#97pmO-i&M6!(&1q!GNhtLP_c z0zP^vtA^Q9-;a>}_a4Ch#P8dOW)*T6qn^kq194k2L2Z^vIq1ocf8Y|%@|xM&%AB=N z=PX@ssTcO8QoK%pD2x5eQTH&&9Zt?8z45+`M*-tq@b*|s#zK^H5BY(pt{EAOQc1$v zBydo&bG|U?xg#!#K&Q*gj>aidDce?%aWzE~a#FE?Im4LLk2&p~Q z59zQrdpCu`Hc0t7bW(d6c0|cx2qHowcjwFxRPs^Orx(Kr{El(*mZB2YcGMkR9qSG5x(mktLH*PnJwd$^M1qP>jRe%aq1KssRaVJ~N}}5)pZpAKIPr z2!b0^2pid2($cqxwX6az_MY|1q8}(XgA^K>*MB#E!e>%WgP$%FDXYcN>S>qw9H>9}~wVSVh1+>1r-gk#a#K<3nhVq9V(ITaQ= zeIbL5Dzq+0NluODqwiCD)|JY!%(#^_K1Jl|y3@1z2^0N8OZ*EU+r63s+om*rfiT;2J>9wSn=Na-^^3jm z-_Ac*3;2ZuJ_Ct4@JwW_u;8c8H#5aOdkLUbhOY7X*B2Sis+JK>HMVrmCOHX8Sv5de zExF5l;K1v08ORzTc1Pidi7EwUsvznr0>q1F)}~l*<}lzz^O&780o%F^&eB4rvpovi z(*fi+Nu$Mc1?bXo%5US4^gWKEv;OND!OfGlHxu8+l?KdeU-Lf+9KJB-uE(&KD6$SP zi|g96ziE!u%5v~aVzOU=jAT}y*(uk%vyAj1k;E>7ZNlj2N`)qV{1jq{%a75|`XJ|T zp%@-WAWftMH&ZbvF=H(<1YYtoRQ5U?U5xq^FRLc)!St*-P^V)u29g-x^LPAxTI6po zb}beGV^%%#sEa8loOD&r#wRpZU)>x3)<`esRw#!AN}GphVA={CTB!5-jFYwxekFGCp*Q_le?LEqLrD>lEs3>2waR}169|c{lhg-QK!hu=`>!rk2zPvQAmm%lOTM@iJVDYx_$H_{#yg=!Xu09eC#70Sk zk%K>lL=Sq}o>8$kiJ<}v+m2YS4ZFK41jvJqWT(*{hbMlNvbj}l4`Wgh-{YV8YQQdW z*>|;PS<%W6>{tH`QMV$`Ygao1`xn&xyfj1x3XcL=oFu*g_4c$ELfNN$0N7KWX2YRNV@kU*W6@C)JNHW}*3K~) zRvy@jl5=6_$FVm*j{)4X+MCshV?pVmi#63}HjGx#tN>jWrQ7sSjI+_p+Ze02th=W| zzoEyGKtH`3YndB(*9cT!FU%D&MO1A-)JTY`TL5-A!lqx3OKK}dP;zIS?~CcScAdW# z=)tRj##HM19U79DmyJ{Vl^pW4DmiKg*5-Nf>1$}osl9nfu6hlM< zw_XIS3}`&NKU&jBvg}J7rn8U^Kg~v4drlAxV(#RhD30G;mD^S0KgUPsztd-wBl*vI zdjVf8sE_1i@v&8#M4*qeI0t|=Y1S^obc z=`6#dYP&X!0!oK;KY)@$cT1xnC^>YO^dK>$Al*5Lq=bMpNDLiPGlYbM49$RacYWLU z`{7THLuJRk*SfCrjBb-bP)!5?N!V;jfF6JOc01VbSWn^=V4bN8yiT8t>7#=MUrvg} z5#n1yx0E5hUVWuU|E7Lk11fKMyna}IjmNk{;10vP*uMhT0zf5GN%j_ zpVE#ljmK?cwwKN?ITaubX75Ndsj!zW(;Z+>yQvnTL`y+v8fi}AhKs-zUg^WD*2Cq^ z{T`V-IK_o*P}ZYOF&Xc|S{wM4y3g0mL!;T5H0r;~I6z71POH(fw$U;7Wllb@HkwxR z2w&C57!@qstn^AVss-g5qp0Gb)iAb|8WO1!5 zn#5#tN-Tb(Ltkle@FpX%)UCycj?th1hzjHsLR z)|#E~F20v^#H&9Q4GMl#KNIPVKYWGv(%nxuREKq?bnsI-h}cn6Dn&>;=}Ycoe|_5B z%(6kXH!t;#o3L6ESRj)^+-gP2o}^8BhmWt9$?#(KIKmY;G|TdUNw$bRQjm8u<4C)xis$9^7in>o zljPQ_x6jwm%|p~Ys?NdKR*`>5X2+w8e=mSdUV}SEl`{CeTzXz_`dw1GhSyqf%7M0c zL7Yp8FRBQ^8}#A9-71%98pzr@y2go5HF{<^#&e7yp4qVcl(Q%f>W@6a#Emb8YAQ$j zW5WExHsk+O>YvkoT001*i9PYLc-KwDZxxtq+-O)sBYU+|J3JC~<^|RT1;zk|M~(d_ zprNHGTkN{KHUSzrj+=?d-^GPE-|556IjMLVRFry+!qOY9-nk3AHt%Tec5Z8fV$9=z z$AQMoTz2ItTNN$TkHdK+aMX2JYgl;jxP@41S%e;Q*B57#CG;h{1r6Z}8Eq2`2pV9) zT8p(@rv`pXHr6KUAveeIwwhk|zmlgKseN_noX z)3CedRThsBNn;#FMcPrE<^^YzNZEeu+<-Kc;n*(_udt>?{7HxMxHfxrH$w~>Zpk(# z`d&}IXdDrckUYcdGNql-CdOh^3K}C!Zh7lSoZ7LXB2RII1IoDLixsglL*5q)L^&ap zJ_ORj>~4C;C}J?182dBKuV}yVEhTU>wb81&c2GCTK-pC;;?_p_7GqUA&#>5dbGxV4 zTHmByWaQr9Ns4`7DdxZ?4%lL*Z{5UVeAwUA5cbQLAwTLHa&MyiPgj<2w9nyyPwvL{ zcDeFkt$Zw)f<5>mH)JV}qhtYBW)z8DWa|)Sm>jrR-l-0LDl1TfFj%`KapC zp|hgjWIT+f8PNv87qVv8Bb)(eX9ug1a{d(a)lxPVP;UcVlTUgz7nF41TvU#Iz?P8e zdWY4U%n-Et>%#SpvTo3#E7c1EDhoqs8og?Woxt>$PndRj# zH(6~!GevQr&4B(f)Z-x$;2RG0(S2)75KTCuhu2Nv>a>VgL-F4D=DV~$2UCVhkP~_H zIday_dRsi>+pc{&MU+n1CMejZm1Sn025zUGdDp(u+yo4m0m{@m7CP4 znRs0kzD}oC011NIVWusia1WOiS${4JEN5F)eUf$G)`Xxu8gAwBQKR*}quEL@)x~pacAPP}DF|@<%7g4bEkwlI_@_m4b>?FhtG2{D zbQk1jLjkc%Byy;r7hgVXvJG;Wf6)OY{XtIb`*?$5ZDKC;5+kMPJ!mk0J0{ zDz&MDcqarT*_C%Fdd@_zI_d!2+)m~*7*Jbcbz}uGwK!rvQN9zaRvfF``4xO&_hFH_ z`efhnbWqxKM$=;bn_~qWBDCGqSopn@Nav=+{i0;QN5}jIh?2myRwna0m=XiGWu-qn zFo*}ZQ%zSg_5V^MR$-4A7x@!jQAe*NLAKsefaC8f9$HuHr(x1gHjvkW+dJc`JP_>> zx6nEnaF6OprUGrQ=1MVjSP;SF9_oSU$Wmu`>OmVnA1K(MsOENRD=}1nBGgzOu9Bl; zR6Wu0q$INjgvoc5JN`bf?b{`m(9k;wuGG+9H5?;41zV%!K$pZyfj9?>a+0!0ZTwKI*s?bj1m;b#W%YcgIHK7MJkT>yeg@&|&Kj7mt}k3Ai%Torc%cAnWMTPFB(HNL$bZk!w?V9}2OVau84 zY|vbXBOx{5fPKLNvIo|Do1a$SHz}wXFQnWS$loJ4%%aG$x ziYPkzx-ry^o5Ub#Bub{yi2;zu4>aVC2khGCe6md+ZO8`!Jj8B=s45n6;8SBI?9n!= zzakLdMUPrUlUkF6QQ&V_uZ3nKl|T!abgAK?`m4FG;{{qJzU$@v&z>_ywf0BN~B4H!PZ)M)b@~eX0-_XS~sGI3M zdT;#xoeA?i2b41H zPyO2fDcDP&I7(*qgiQhoCYvgc-da&As5Q2G)ySuuPMjoYL2I!~Af0yqH7V*3cHZ|O zASC*80@ZNHgNj2}HGuV+aT~K=VGiMrWa#borL+-(O{GI#jFMiaxnfruI726E(sxPs zx~v>8hD<-zv@ycJ>Gn{j5zbHe&fd~Txu3Cg1U%#3Qv~l*55%;MfK&M9-CaJ8z!}v~ zX4Ds`DO)2fkPO`^DTH977ShH5sFq3ZH`jNIrMpNH${~~3g?6y1WY|Z9WEA@CRSkLh#FhuqP9EcQv!ZRgyYDNg2+1qe?PgDn+jWg;uC zb#VT`2QN0OZ2;+Mp=y&ue{)J(J*1@65b#hgL}Hd66K0nY{aEw;i1O>!()wS%YV$Yf zKLX$<{%&QDzGTY0V8a6=4Fe(0XBl6P${3)Ydyae9YObkcwS~VC;@j}L8dvchL)pEW<5Q&IV=0Yrn}?iZNl4tP zv1ih+4PnGKcSL(N292O9q@;w23L_E7qLwf-c<>NCZ`}M0fA)v|n{1uzn?HiZ=Aw^d ztV#8g!cU3;PKPTSo@H)xmX4U!z%`gR7s9Ob6LNxtz|;jX@(IJ^ex zIQYPX#9uZz@!vDCspRm?;9&yvk;eFQ6d+DI{u5gx*iAJf2Vo65W9sbbSo5zv3+1^) znFkW(J*;G`iyOs|_<(NfS%(YYr!2(CSRf?w#O&^7vZfD8dDQZdIq<8k>}l+3An?Wu z??QncjYIXY-yM3W`c^;{q#1Y4X`fDT36890ZylTBda2Ttr+-EW11@EYSaYimrdVwQ zYl?>)KVTcaa0mmqj<57!6^(;7zRa; z?w-1}lUMBv*30Z8-$Ts})>Xea9NQ`<<;w;}wZ{@}PRYlT9mtsf&FC60&_Rwd3HU;On+D>Qskv+jADR0K9x8f==9~%)%bTQu zY$RD471I_l!_7qlST}N*|1yAkkp|MTa0P+y*|w&aCmJC zI;=Ll?-UCDitE!mb}Pb@hK3<00jsF65xh_eX-`J%)m{6_8A({?HaKU}X!;)iRnym- zmG;2ONxyV2<7v@_Z#|Gm`pB`{Nzd8yS<)#JloJN;{A|;e(W^1w9~%_5W>TTkRD782 z@-Ij{iq%r~?_*bQTTzqG-Sp?AWYehQo>PNvrWURIXd6WgH^Gc#CE#8SkegX(>b)gX z*wk?!J^wmi!XGf7#tCFE(ufCdW&s@Cho!njaE-93Sj?i7ZSekF#CiF&<;VyyIlqvt zkZ2**D~`xzF;LX%}1Rjy&k9YBv^;kV)_|R{13~9sXs} zXkCQrtE&tCIm-PJZAq&DwAU4Nal1BqQilBH;Y?udv-@(>Yo~Uj!-cxpsa$RGK&tWc zMf{Bx9c+Ynw>Lp`BNENjHjqE$`3cPxzDE113b-<&JYn$+Ky7*Dju`M0ok)uP@8rY6 z!Op*lyJ~)ambb2S%C_kLz|*E^UU~s=$N|s{T(zFPcy17|5&EqjKUvo}3;PDhdH?N= z;+a;~v&P2eYT7QQxy7N!wq%By+%PJ0=(H~^@BWDRDCD0g2XFCyVV=4TLWba@eR*c9 z__sOenTTp6AxCvv4RO`p8HdzVctoMoTmP@9&(VJp5}ExyiyxuMSA5ZrB(4q)lzuOI zr|mfkP4g%pljt^=Q(VojZ+N^$7^CgH+K6I>K9T5siRpV+{)>MqbknA@^LU|pdB{yJ z9yukqe`9-QJMnN>MX zbEXkI;oTtoTb|DcNgbnR-}%P3!#m!> zDJZUTbj+W6hjx{(++kX@Jfi&B<7nUvb&n2P_+k9jT;l6@t-u0OW(j7=N0OFT6UU!{ zwzE+db{^maC8Er#rAht$5;Q{dr$nrDm`c%#-d)z{yk=LzU{bd zWXnopMAOPwX#?u!n0ZzlW}JM}_`uiwgS~!V+6-vOl-&>QS8g|ZC{?=1R)N8VA>)r1 zBa0y76Ckh2w4=)z>aF{qe*yiCQOwcRs&m^~R1cGOU`QDH(n}K~*CDEp7s~LP73!{` z%j}~tDnv&Yp9t46Q|-w$dOq~Yvm558>z4oi9os;_N{1vgKf~J2l<3)vU95>3BZRfQ z31hV58M$+X;*~D9i4!7e-aKOW3DxbhI}&=PsKKB7&r3Yy$DS)Gg|o=MAmWs8#EDM) z8FPp+8$e}U_5f*)HH}h_SGG~WDo8Cz`kWq@|Cxl9cYBL&CGtfGvQ|&%ywRz(~bY!c)H8T&SmFj9*NO^x^f>9SYhOhFiv>1 z>COyUr*=QQBN51x`Mk5Wl(!SDY0kab{8f8ab=_YW9C-+PPwxChLCu92wk~WLU60Rw ztXeA^jOubTUi8!Y&{P!bIb&tGXk;DI)8>fGbFmk0_9sW8?hcVIk$Hubjm^@t`Y*a0 zS!f!gST5}wS!X4pekaI-khEO|yYe9KcngpF&%-N^Rzx>H7TpQv6+u7MP^g)%)TpxY zofY(j2ZGHe5`R;dknxdKamSPH)ryyy+<4tDaHFc;3`|t~SK%IE zK@&JGq)+F75d3;yKoC6p%)pOjY9YC%*xi+>o)3Tv+xg35*B+*OKc1tY3BehSRm?Xw zQ~XRAWcU>)X{K3w!z7n;X@EKl%A<~&XzC)98J&5?aS{$2+@Zjx>g%cI|D#lJlYubl z6AWf7+*PdYp?Lq1_ffOCC4oK~;cuAv_@RIrlp)PJfr)rVGK{UFzG`!iGdX$@A<7mc zaV)8Q>po9)(ET*{k`vZ0NYE*V{H!|7u`Vge9Fdp<_*>A)=WqE&|2#+>EDT78KeJ|l#?fnK1)j! zDFieAP#0@p@h?Rw#bmfRM6{NWN4mCR$=xJ&rUzbO2ZeVE-LD1I@KS$QSkonjJVA~( z`;#Pu2x2x*zK6UOn*g=nQ*_>6EUo6fxNCj5WnhGE;9`kekML1n62ty5K-|R4)^Nqa z2DlgQxVg}^tjp2)rEUZBn4rRstgmZD9aA*)p*XM>C2c+ek{SGip%ed^H5M-p;_fkrC{qL{;usw#<|W=nOA zQ#5j(W~^6Zj%M|^6FQ;>tVa9ntLwB1tuQrsBR?TihEo&D__>Duf13M&J*wz09Ge%V z(N<)RjNIsSuUcPHrk-j6(v?6WrT7gf%NY6(4d=|r=QqVsnU^>%baEfy5gc(P%CXU4 zD#zTiMqkX*rS1jgL1#(Dso0jXXiq@315hhCx;ls797p=9eqx-{y2uc zZ_328UdEpdjTdF-2U3~Y=urH1_$oiuS(+s5h4}}|r>}Vdj7^cVbzbNv9u8TQYreQ% zP|@T|h)R+W1OSyVVpamCMrfaqCC_bqW zvPVe2TQ(rbc^9?=bgNrWxn}kRmtMujN;OiK8v9t0RL&&Q{5E60fhaQ>;q+FsqZkyC z4aXp88=Y50r+%(PwehD7rzhhFp&REX+oa@sjz7udZY00Sdf|)=%uvshOiya|ok+@%qVbhs zWOkEW;V?E0$Hd+-<-4E1_roN0o?iy*O~W@P1FS3RfJkc5BHGj4c$=DHG!4UqSz_K{ z%PRe`XZrNTar@`=(Q?}jik6-G;N3HnQfUWGZvg>bR^d#|>uCcd@P z8$LSY#U}GW#^94~&b9~2%yBv(Q#`dL=6<|qpux|+axo^Gc7CyRJ$bs4b$M9Aezfn; zew3Qm;UrFtsS2!mhW{N10r25J4&Xrqn#<)R0!^-!aL{(X1|K{IW)tIGknQvt^v|pQ z#G^&^u{HLTj)xT|@w>zlfq*kgT{A(O|A4`*JTNKcHB*&4_LG3lmV<@ZtrqbMB)F$o-qk! zYCERyI9>P`xt7XnCiIbmwuYdw&^`gzY^dYEgx~H*OAdP8Xf1`5=eA%Q9)C2bfsgxI z2|{wZjCgc~@l3vop8;LDc$JGMXpqj_u|>&$Ci0@i{3yCK|6WL_s~hx_=eLTc(ds~o zIBs_X$Gf=?y#MB*6fol*oHpRUWC(Y(VK^;lQe*7-nIQXYqk=Ow%JNPVbC@Efegtoj zBGf6@Ww$yh$GRer1AD`n^>X^J2ll!?b(QUbpDap~%}#|wxPsg9l>e$yj) zboIRj3loWp5LpElbLxn{y;5?ZnZe`375bB!kw{mSj;&9PA_ccv$s&(|1s?|xdo~V% zD?k9`DE->(cvM^&Ef7^G;2HXe>xxvW@$6J){PottLaI{=z;$z!7)Z#AvyS2p(kN?k z{%7DAi0FUz+%4@2-TvxDR8l}_o53qOJVI*wIj(c{dENJa1RK+OIwYuubdF`_&A1O7 z$y!wC+}qj-mblgX4zihF-m={K{}F7{r4E(aUKJ2sRzOF*CwEIZ8M1>WEgIoRN|%zs zN)VrXhBnxy+?-YJlw`PyD=mTm@_6(351y7XRUbe^l+cV zlz7=^rR8TMOpTqjF^6wVpM*)R`@3Pli^z9OAaQWCI3j(mtKl1#gyM_Al!F@UW^xJO zgeb(dSsr3#Q(2~P?w;Bvx3g@nAFVuB3^tvzWoddNd=UV7<}k)(|BH11!+GwGaZaiR zRQ{-ARI*~QG?WMQv@xCYxWmR88bGL!(+HQ|7~~R1-};XS+5t^9R5A(l-4;X~-Y; zUv>JqpvM`}PhH!dC5rfBNS?=KW1;WH*@4BoQ#|Rzbgh;8C4W5Ppu0)&`(-Zx9$3A6 zxG>-`CdSlTAACb=cGs%&?Jn6()|F*6_&l#ueg`JI#@QjsO8yS}mEDnP=tWHh5XU-b zxSTr(PEa(U|M{KT{DYf0rg1*u(QiX=+U}94R{GcsCF@dnn>gzJcjQswQd_wB8nN#g z(^7B8Jg><3TCC13sTtSO?=-!QJZd1kcG#rM(_gp#dp2N5I7NLjiG7KzW9(Eb5%fwh z2;Jx_v46(&AE`QtImbywO{RI=l$S_X<8Z`q3jK4+x#aQZGh)!-W;JK`z%M8%5hVN@ zZRRKJ(j3=*`_3Dh-G8WxMIRd1D?|>pjA-gX9vYp2!3a z7Z$fwNa8^<@H;o2!&O@2Z1DpTtm|z|@-?6t9F+n(5?LqoGi4{L2Ct(Dh5TC}r33V; zdx86ubf;p|E8A<4f8H2t1#21WSJ?Rbyn^I)tO*UyX>JXBsgQJt_Mb00uzv`#aA9Z=e z8DmKZi+Rt^|0jDIeZV|;9 zz#SGrWDAOdX5zp84W$$|Yk!g>rbW#^EX^$N$YUWoh@2_epZS%P8?EY0<=Wq7D37EY zjp7X<>k}ARslTFQdBs~}%Z3KCogV>>er|?MUZPvs`qZ-KazF|z)97Z*<>t${91YC# zt6mTA7tDT``qgKE+yC&u0CQ4mHcZmlu+HQJ{FD82D$6e68~V$Ywg882^k_OrGGla8 z=4qc~Vv7cGf+yh7oSUfB#JRiEw3oAI-FaA`BbX1 zUk>EDwjJ+eY+78ErONdW8RYhkEe7HrbjSytN^0i$tyu$z+n-B;7x6;x&0f0x{zuZ= zEIs+>S9qAL$-bJb*9UC_mW!Z&+qxZXM*1pyicZ%H0_@qfr(yXPkthyh7DT1??3=g1 zHGybH0wxV@j(tJ|MS;}%%DWJWl_m-Y9s9?C@5${PxEVquPNsv>U}WfSZ64zamnUJ> zJktLhAPA#iHn8TeGIwdaFw*5K&%HwE+LlCnLgP(jibKU zc`Zi5YVT7oy(>!Vph?=nUyzs_NC+{Drs4irDT;T$K=Y*0lh-xYv)mMavtb`|9-JpJ zf^)0A#eR@j6vt@)THuScV}Xt4pWF_;1Vx$*PU0C{ohvm!BgB@t_lA(;b7{||J2PYT zP?tYk;BvD_?{dtB=~j}PAXtwive1QyATguR`TL`D212!k(b5(!8?71Ym%4RuY>F(S zca06WeUoP#^8;seh?PY%md(D`X$P(^`_9?YT;D5<7iE8Hoa$yC;J)jeY{@QNoDExA z$#ehv=68h&X5!GgT5C*&ZG zI#E@zWV7;IO=5AWg+~uod|=^cCD_u_L>)~9{#}%GX8F|1y%xXlIwl};5=doA_k~M3 zHl;`;IXN5Zf}BhnA8opd&#XgPMpa+0(DN!!TX61TD%TJX-AIBz7V%Q;_M!)A(hu&g zAB9cpT4%OWH~x5r+2&#hJWy8@nWAk~!lY)pU_!g3J99IdZ+Q{BVLT0#<#lu<%g()Z zY40%+F6xsO_;w$l?6>uPwSx7=RdS{^wjYqqva{KOVwTch;pI%RO0f%q)yY!=e^7mG zrz7uE14+?8tf7{Cj}cEvOaw4G3y3O4%RY_-i)f;tGS?*oma%5>dgl&U6vcqHksP+s z-&3t|uG}G|zVHs5!$ds4Yn9wsqul@9`qh`TR0B(8ZxZKM+$2d%=;;5n%tG?D9etiy zCx5zM=>T#*wX+lid8-Z;Trq%Osa)OKQr#rf7HWx8_8R7aM9UaDvNXA527$Re->KI< zj-%FdWr4qFAf15RyyAYrgweS=hjT_yrk(`V4j|RbeQdm|-F7#|v}|0`nV5V>chs}g z5fZwOH%vbty(t&)D8xI{siEy#5xTz|1#26|^s2v;nO8eY4m4TGOr3w73SkReP_9+i z_|VD|4=~v4%u(8}iroY+ki_ci?S|WUA|GdAJO|+p(P@t6b%TsywsT)6d_)53dTn=K z7yXuqe-X{|ffOFn4%~awU&?7cW1U7DNhkwS*270w*!k%_ql5_-aM;;=hl{BD| zDLW7gH=d7$h1AH2#~xdsW|raR9j=rkZCkMytFtApFSpb%t+)j>Z2W5in4ZxxY~(Rt z^`>($!aV&U`SYaSedqPn=<|#9LU)}Ulq#IWlp*m= zhQ?}DiL2^fi=C#X+Isn`YaWybd({9uqM?FV+ni8pa~5zh{uxPZG+=Tx*r5cl zU^IFFfw`T?h0$$+%}yF7y0{KbLS0; zY)zS}3vr4-`++LHD;TZ;J)o%*{jEAArN?1ZF4vM$~E{eC_YjJl_RfW$7H~;vTYB znR+t%r(DeXz&gWnwIlE^JgD%|de~~%ik-(;c|X7R1rg?0yQRdAm>h&8^D*DyQ zyt>ws8PGp3s@oAt^&DSlb;L|okJlMY7=kr{d={kcIdIejpob@bAr$C;pGd0y|12dh z6wMV10dz<<5-wmIKv8{rOaCuu^k}2{0f$}rpzW}t7QoW&1H8L~C55GwQ+rEz(mFRb5maC$<4+)tw=HK{t-l_wfUVhZ*}~_yMw) z;jQu1hCx}<;KkEHuV(a7mdA+o%o>buDc;nFLEfqfpQ5#8Sdl7(HAGCl`Sqjbp8czU zA-zT0f6J=c|HliRgGS3Fq2})ig)b8L*?*Yfq&YERuM7iWB9ZSXypi_ezz;+W>L08A zyVE$1SWTmV=>W|wqx!=~MwSw+tw8WDPFOArrvVtl5EzJS=2yDl{nW!+j8m`<&Qa89 zoc#0Rjcndk|M%H%(_D+d;iVhCQRxM6p-dUsiEqQuxK4PR(n!Zz1+b=gZtd5J%k&%3 z=Ya$;A+0gMLJeSlp_cHcB*E)CRaTiDOH%`R&g6x;O>)6fm9MyvCJPvwK zNaRV_KqWVSSN2B~*W=@~H(`5>wVIaD{`2=gHKt>mmM%6e*(V`2kbWv2;2| zzeB;d3ZsS(nbe^VYD5E(hP9W@4Gd3j@W*Rjoja*w12SqBOXKj6U5cIUcf!n@MU|Bs zsI=C~MUb$*unzNP#+&WmpU%GqDcy(Op`*$l6V8!QkwdVzs_(&gN$exUp9A0%^Ka;&HRy~?BmyM2; zy}-!5ytY3aq+;ry$-Uu{JxkYGn;Z*xlJ~GU>HF6yuLslIpWNrRFR=M6_F^TsT86+t z71#NlXqW*zwOW-0YE69~04)DPF)!`xTJoN5JwiL%BP2`ciNnwmz3_fmpM;4sORUgM zY_h;x4umQs5pxUE)g}=EEz=s+`4m4$v!`m}MCXjlJ3H~kQvD!gL>7Ozo+2t%&`-t| zkaHiRrs&>kdUeCJ6N_oi4o4ir-SoMgN&9Me0B`l{jfAR*U=^_dA^#c{oekibY1cG7 z0JUv1?U(YaogI%s0B*F(B91XHW*(iKH-4Up!G-#eB6Go zi=~)GV372MIv8VJ;AeLbx5md28r+BPAO2Y*OT}qC(la@B%ar8(IoXKZRNnc} zta587a|EVrqov>GM)6A!^V0?csF=`gZPJOPgkSvxVPf-dro6R%7_E#MaLQiE`vyv~ z&o*w6x$p=Ait{YFkiaN}OWeLiM$QY>FhBer{dKmr!PE zkF6yeUv;ChETUb;T(*Q_*8NC7jX=N9=LW|NpyxK9=5oi|{<2;QqK_`-d~!+|Kf_$c zJp(?lA%Oko1eQHXFd<_Yn^7rl6o2#6->Mae5&C? zG<5Xm#SGru(xpDlyr~69`I!xoN(Q^nFFw;zo-?9M)hZ+dgec?0aqDePt>LTh2*L4< z=yY$TjAG{3M*4zN#Y68{_QzmD5esH`pk5TO zM*q6)8i2Bm!Xv)nOvq|B<6W(G$Jf@YHQ1@3-M~Rp00atT;Gz}F_$`RQ< z3MR=o8J-gF|z&HxqQ#g2sF-ppR(^aQ*Kc}2*P;eErRIl z&@!57WBr{h-M5m}x{N4mC$b~4OYET2$xZjkO}B_(*Qo5LChpFqFH!k)4H;De_(Fi= z5#>}h2O;iS##rRDb*l)|ir-bWj0#x{c~fQ=GM19VFi4$ovKD26^!ECUE$adYpgck? z(mGYq!$LjMZ2%i>#3&A}j<|-b4+hfC2;rum;1v!!c0Xg?^h40WBIDOHOCf8Dyfc*d zpMsQK;%Y5%_Yg`gDD|VfdOOlz(Nzh3f`~x-jc)W z^AH~)G;}gsq+j7;;_T!zZ4?Fdx!xealsyRN0T{tMm0yUz_yZYH(l~BV$pAp-GG=W0 ziovXCxIy#HLQ5#dW;E2aVNm*4!W5><;G#id+ua*G=6%E-&)<}>qXI^$T)ya@CUvVC zkJ6vgg(NWlPmpwl51}4pFEq>3S@+oVr~x3qK4`Hfn?;%p#QvPGJ%2&X5uO7hC=bi8HqjqU>ez}>G^(){+QrA=@YMM^&@z?`} zVfSfp6VTqVPX%6K)9}BX09|C!&iTFUGuGp>(H$8hoVVq2mjS?=z|Hqgjwk#N{;RJd z-JfP2Q^o=K2ifyXH=^mxz*aBrCsj*fNAr!=+Z~@~ zJsy}fmf*x$uAjRj${Q{2j&S2l1QW)QGuFs>Dfh#1b&sRXs-AsSKA3>iFaJF(QJH39 zuZ(l+Ll_S=+`3;Wl`MuVUkIq{WLqsL0P&n-Pky^_1Q05*R=TtOMQR76cA7u zg5Il7M*mX~K(`p-P}G7I<;`=B5+951eNk32(^k`K*Byn6a5@5zdFD`fDQxAwgt6bp z{7$yxFe7hZ4S4S)N(VAA`fW1?Y{y>EjMv|e4!HJLCN6{-=e1FYNqYz}UXGRsK(5%< znua24>F>jQu36QpUINhD$8JtJfK47abtnK{$*W8Y2{eNxz~;s4X?SBBzPvk@<`uRa zHaF}9l?6s-U85ef60ZLu@pNhB1^A!sf+hXgRV4UJwK9;Yw{_ zp!4R?x!`{Ezkio>x!hF%%ky`ny5+#_N!%^U+Lf8e!1r@|R2aA;VkvrD8-c7())Z}s zCVxl8i%0U9b5C-~z6;UjLf>}`LidHtGkSbNpZc{#Rt{yx&ay^XY#(`F3@ROs#Mm~H zvHa9P9ku zS!}teR{Yof>)HwQtVJA5=0Apx@Ep?`C&TN1w{-+aoX3i$b-`tcw|WiLTwf`em=+km z6|%1&cmW}*L)O}49OxDYumd=z|Eib?8&Y|q$~6>Cpm>iNR@69Ng=lGGz?7<$N@Zxd zt?o#Y$Zc5E3I%%s>S*+ltr;bpK)nEF$piDT&pdQdcHlG%^2v9)~u_oQ;@`snn0XonKLcDeDCiK1KW-l5_94KrKq~Hu!rRXx?8P2QHT6o#>jD z8vhFK^xH9!C~4OF0hN!`kv|#si>0L;KQUG^clXPx{?4l$K`{A#1Z<`k_5&P!3>qtI zu(WNao_kkcN0uqw%-CApjxiIota5u48~nWh7MQ~vuvR%>Szevyvk#v}~geH#|pA}1z5uwiM)VXoX# zGN4|}GeqV=qZbBEB0X~aUZ}3#WWHeyd*EIf8g;nK24~(fA(yvezX!@HZX}xdK69N@p&4`pRxNed z)7>O^^V}b}>iODSGAWC45Cd0mA|*Uup>dxt#2g&)|yvml|P=&QUL zKcg&NguqAw0{WoDEv*yyway?K={2Iuej~4gE2*hj9_0aaoT}2060D|GpRhKuHcY81 zmA&)GxQ%%r2O_0P#3wbV;PgR}b_W*?XlfRkF~l9!k$%|X2s|0l*;aE?AFU*a>(?|x z-4=sEPTYNBhg`=I3)}bMGdQfECTAzzMi9bVS&4s?1LD%Fz_FjUgMWhaD;}s>8EFVD z;UGmg#2$N^xqZlEy_WpBLsmH@44M&CaOYu=&}4#GZ+;z~v@l7en;$>Rc#PH+1ZiOd z`Q`>;4gv zBp)HRzIK=edP)0^uvK(g%XtSbv+M?}D>yfM<`rF7onS`RqF1ax2QEL>Sg5C3^Kl(m zcF7v|*+(FY~JCpyuTnr{L!$2*uX+%3QeK$;s*y5!9Y0chO>)Gr3La^^8 zhaFQ3#tAXKE<@|HFtQGz0ux0~1&EAB1X@bY_t`v?WGMUsQD;&|8hqTtwD!9*kdd$R zp4=?>%(3klMHYiSUJryUPC@Ly*s=;fMCO!Xz~6B`g8#z>Lvsp&AQ z8V%tfy`JW|A%>35sB+)s0_T*(;LT{|vE!M%Yqmw0$3pk!pBqe$@hH+R zEv}|*ErpZ9P*Vz)?6lcUB#Vof*F?lGuUOg+O!%6((kBuX?hhtu_r8N?l9N&jLJIem zvHE%cr1@T+Z*b?Koc4qHaszLqE~hd8mSAt^MNq(BA>tL*Jpay6^bae`&D^=Jwffy4-57yynN5Y;=(do$~6ZI0qNVC8FTk#Vvq<&;UWTEVe9)$hz6O^Eh zOmW0FYeaqa$86G#-R0C|G)gSKM!LQAu>__oHjs7U^n+EuZ|cN^ZGP}02f4{g*5V*( z408_wkW;O6+{EkfMlP(?(^lIl@e*qw zUo^k=A?|s}8}&t9l3U$eq{2&0oGNCC$&fpl_c9_Jo0408lps*@JlH3{j^hm#uo;0 zVTzY)8zd%?bjvcc2_50C1g=2nWs&r9z4Ky7g5S>pteoBC>Y_L@t%4<{+b!`ow6ayZ z`*@p&A&Tcm{<~4uH^;$3kLM-Ve#!Dn8=P^1o}L zjdCX2v3DkVy8a>0Rc=^_ow!jkf!c+T8)oR!H-S&h^zDk6H0U)$Z7Nn z`L9}v=86jNP45X7ks6q&g}>tO@QG>nQWALtE5oRSQs;wi@86@`<% zPOQ*3qR9M-IKPp>=qxVHC6T(A|*3c z{HCes|9JY!u%`aUZ9y7oP&$>6(K%8YQA)a7(2=9NL1_?1NC-%GcPllzCY__Zo9BH0 zzw3Hlz$>^e*v`(mKX+0%8P^mk%#{Xv*HU(U$C&=?QAaHV9U`5YHQhV!nb^@#-%AQs zZ?t-}4VT#Vt!Y|W0rfJ%P%|@-5qBV zEJZ~gHB%pXZpbfOe)o=Bg@7X=?2W^x;@b9~V8h#!$_rRZ#( zt2@)jx%X+D zTtIir6<^x`cE^tR2e1zs#9(SGT?!VY?TJ zgjwC^6mM282pKoi=0W|{nYZu`H0(o=wO`HB)RDCSuWwDq2A_u?E4SvGHZ`lxrUfAP zS880mbAy1-n4De%p@##Q<_qUqqsnBOT#wTX!aQw~XE*)V0v7xNR}XKQ0RU?pAP*?$r zgmjuU2}vqtok>}dfjO_xl1n33PVhzB84+zXR0h*J0N+X(!4eGJwG{-3vzP=H8}$b^ZJ#;PDh$Gn zyVni;X_Tm}qIze3&FaF^Rmv;QUnv6FoANsqn-TspoyKVG$t=aOq-g-6*-+Td(b(%KU(1+=;FeDY7M8FQFo5iPzAMW-VL~CbP2Y+FA_~!73yQ-5* zqm;HtCD}h`A8;?8KFpI$;7f_30Jg~jq%emLYYYi&&&D}o9c`Zy=HM}^ZQJTYYjSPEpJxNitm%ZVha#OTF z<`$EaIH|h6ZsPMI_F;($2QYSU%~ksBt1Mi6Z_(V!)RDNQ zwe>ziL7sfjrA_+D)7`th^!T^`Brm}8Eq(dfC>mVgwMobtTR_v><%~F@6e`gNF%m#B zbcn)1Fy7A~OC8X5Nhd`{h0F8i$5(s+$k!M{i}->EuOo|8uQg==u^cmV7o0bGmx!qi zJTD`P;Ch2sPk{$q(DVj9w(_x%f5Qy$)IQ!#r+zV|EefV#*LHiEhTHn05@F**j=txQ1Q2 zlsFwy?f>C}{0m*+;gW{#qhDS1F!g=R+dsme1?tMh)X^BJtB2n75yM#vs7XFL-(b&R z53!-T(qv?QHBj@SoM9Lv*pIug_x?;9&;8YpFezMqrP&lM`?-wG+-!I~&7w`> zfo4N4x)ZovvoEE3nJ^CF@W#~k-NPk*?f#yIW9s-OEx6t$oN(?R*0Ku?NSt=aq@9HB zez(tYwBV@kAa*e@)_=#n@^jy7%08;&BFU%MOIJ--tJh^Ljy>TH(qWRAa;`5mT|CY9 zE*L5XA{I8Gq^@AI!>cZdmr{P#Z*b=9jz3P+h=p~&kZQ6GX45N}{oJUnpjF%GD;#iN z58bHKPb%QqyDcCY-$Vi9lY5SMb){mEX{ng1l!R{^GBMWFRpavrv!L4i8^<1{1mk0_ zZ_i0aVs=~>=)Sb=I(^5bjdoZ0RxIFrn~=9SES`c&O52CDsjehmgD+-(mnZ471YD1c zgEyeoCaVy$MA}G^z@3RjBw$}H%g~zAY!J`f%8KN)yNxx5fI(;?e8`6D^lNy$iBQ;3 zF^c71jHK#yrv4&YITfFeY@*ETImjhW1RB`p*YMOij5trD)qRi^!W1&`|o{g7> zS2@03&*16kx)fENf-}!Fe8Ifl_pDSEp=_T*2D?&rb*uSp<(0ij8A#A;`ogYy3zsFb|C`khX9_ndX#g$-G+ZEB^A{c-6dS)Ov%sg_n= zzk_4W?}6a^6q+{zWH`t9VCd8`5P67DqG2;`Ak?1X0^0*fJ69yRf4(@(ns( zUCdZo%qHWOJCxkM9h0PJLF!#5r`%KM5~05J*RK3;p^N+kUqq(ehI{{Q12}H+Qy_A> z8ZQXUO7nstL;Zwz1gfPoQ({h^Bf|LbL#RDw%kPr1{r1*mjUe-hSK6X(&^mK`RW901 z_*UBSy^;K+gZC&(YiNi3XgSYx;1=TPmO||E+B)$7$IQKHpAO!0v)y4zd=sr*Ykw%0 z20{$nasEwSzQ^4N!R2oCrdGWluGwB-ykebHE;L$>n6ZPlQ^zt$AY!mg)Rbp(t?DtC zpRPKjV@jSWR7if0y&q?(yj)?nR2W>LDbvXK&6}1*)2Tf=2zKcts43kdIAQYe_PKu8 z>IkTK+IU~u@tMkyZ(4D$wi|xNlRL0wnZ+P%Y@@by9FXp<*L#QR$M$!Rw&S(o(r0yq zi1G5rz@&bv)3;nu`K;uq@D0BroyC@MztDj6op0$>*y9w@Bly)1^P=Ove?b@(^FiH3 zg}eJd5Ga{fuKeJ@CRF54DzoIh9MqMc9?BJ3f}pvY^eavPm{4;q&IKgc;YC&&%7sU2 zDr8|0+9$>cZpHa+CSvS{Am5^jvlWX`!1hi%{hC->f4QH8a#XDD%9W$QsJiN7cv%Ro zX}cOQkOLRz=cT!mUd?jce$C<$U$lC^SQ^TlTB?<=0w6>L*esGy*;9n#4P*C3E1~x< zD`RFwF(WF|X?!Tjz>HU?1#yu15UX*gT@8o6^XXT)D>t6PgTSx1H&*u+zPpJ9yDc-x)+ z%<#E0zQBtuVH7W3Rv~%VBxPvlPhM0fCT;}s!vI#N#&Y5JB6(a zDjpYjYG6&+5L%S{4sXV0qxuIV3tYIO=Dq5fy{YGED{%NP$O2#&R8UuCrL0T158Dy3 z++q-DvzdpAcrpn>qRm8sSU@bcfcn(`*=sdBI1~@A{7EMsG#pF)C;#rsY<*F5%5gROp_p$1kKnND+_y#ZA@%A& zebTnkAq#aK$o2o1#J*m5z~pwS8G2IDgS|1msRyvt=B{!|$5+0`<5bDcE58#FW1oxn z=qB;~x4Msm@MRQnxCzTM|Ghjp-Av+u4l2NavgH~hLIC%NUr6G?O}rk9 zE(xwO%8O>mbF{01w|wDxwPnLzK0c9rB&WR#CRhp1@>SHU5V_P64t-OXKKzPxwlNNY&|?C|B8PBRf(+(F8eaYyVrp+wZ9@Y| z(m!o=k^6Y>{a)18-JmA_Hyhb>LDSgKKv{utaINZ%vNF^+%4l^RnXj}kx7Rh4_Dp}P zM7?7ypx;eTMbD%pU6s1!ZgqJ)a?Vb?aDF02Kh=6Ykd}XdSFpcYXwYxGS!R%2kF(G2 zBL6f0pl7c7%zz+Gm_ohY!K1{rC7o^DLmm_q^+EES*6^ZhFMel0dR~)V;$k{>9aq(t z*1KXZ5<=UG5$+%sw4jDU`!J|Ln24z(nH$OiA+xcb67v1i#^>s&I{m9~G`QQI1!_=+ z6QKbZU6CQH=c?}gVoX$&>Jr;BZW^h?fJRMNT$5=5DlFCWfqY%f`l{wP(JpYFR4(%_ zCVr)vytskCvq}Ha0nGK9amAv5bD_0rqS_exRo%-$N!c$qrq1ar$_ezU+%{xI;^^!Y!U|}aoe4|Q1^Q!a ze^nOa?JVho-238*Y~RT@60!RT^kWIITZPTXk$q99uT@3L`sG!JG5j--H!VL3t;@zN zk1-RT!!Rqe3t@9cS21+w>2)s;FB%KEe@QoyM$^B4%HY6_su4|rKg$f44!zE(@W-D` zn*HZ%gUi`=&RuV35U!DI6p(o$XuHrrOQi~;FBr+O)rKmdvZjCUnbP^5lq-QgG>N26 znB9|p3{ahB0F55F42ngNnzFF6{H~Acf8t?+zhsxy^MCfH?Ni5Sh3vZ#MQ3@6$-VT9 zFy3VzN`?0=RIo$(Ziv3xtOoiI5adf42@=nk|6?tKgl?>(4k>b4P*Zb$)$XFp*aX|( z0Zr>i^ll0It+}YBiK8;2RUR*RW9;!DKvBB(0yG?mvL`fENSO@mY$6 zuFO44by2n$Zyb{H;(gzg($JQg|8ax7!I{q(WLaW9;PvV#?Zf=RLc{F;asmR^)bw}D zU3dzCPFI=>zwMJ1@PX{bPks*e&o_Rg!i344sqrCV=vIzS!YlmARPWC{TceJcSo?mk zB}OORSNsGiI)Hixo6Yk|F>2dUy{3HGUNai}bkvH+M+lre_4Y?H^ z$dsg)rV*p*^sVfltg&2EQ8!(%&Y19rOL`o9@EAQ>EE2iiZ*|16npAh?*aByAkz;4x zpeA|(hoIrYIU)M>gI)cG;>oZi8szTd(A1~=cf!D&eedk(3l3ew8t8tV9&v`(;60e$)A;p1OzP_X^=! zvcg?%*V}QoN^Zxdm@4*BYY-zhpQajO(apIrsBWgZN(`s8(_#@zU#h}!nHAaw-*?>xzD_Z*+bZzGAUE`_`{l*EY2&KLC$ho2SQE#UuXqS zV_nLw9KQJFr+-NV-kQICfO1WR7E!sGo&~d1p7<*8cp_+{ltksP(?M?dN;bA3Bcx|8 zec6-|dtZb{#9$N!@896njmmjZuAjD1RpEK1KsQ z18aeBfRCYJ0xh3xW23_h%F}zg1q@CwRi7mMuHg+Y&2HR*ny6*(19Tr?Y~>vlEZO*8 z(Aet++^WQRu^H)c7ac+dpLgi+k%_Y&a&@kDbl=F@G1z$z<4?CU(xp7St%;|Egvm~hf6;BEnHU_IKhvWqGwCoUgs1F*5%q~E&MyA zlC^!J-;IsRJq&V}PlPCzPdf%K{8LKhiJfo+-m`a$Si`QCH=h`X^7;7-_*Z~s_dHos z<$q-y8VP2?48mtF5_yxo)p@^BTI(Ig&sJ*_t3R#sDrUwo7Krh3i1tr>i8x-sLL_Zu zUwmXFL~v)&FWSsX2PioXhnq_~;bYfC$FEX;tyySGiXX6xbk)nx{rltZPSIKstCF?( z+t`cQ6PAaewt1wP$?vv-=tsaitsjDdwgD(J!sUB}DaoUn>_jP$(bIYojmQiSVtSzS zaNHejd)%lECxwsL!Rn{7>wXav9M|jl@u>SRzVHx1(+pOoEs!nN2?@3T!E)lx7Qe35oZ*TBi+J_#!RXWu#9M@Oa+H z(-KSA+>r%2Ns}EaFn|TuFfmAd7+!BZ_W8DaHK9X=mhx1mKTGG9RY)L-b6mh00Z*wT zLAd?rhWJ4aBdQ!%F>Xm)%WQj`UkAeye`LLKG!9rK6XS0zK&uS`%LV+#oVX$m_{1koMsOrAMIscUKC)-MV{M^y|~ zUBvM_Oa^!A4H_c~qTYnbR^JCM%SHMt%)Q2IbE(PxOHxx3SsmZZQcsMWqq z)wCz#K&@vQQIbU_jg|4uIF;ktl15644Q)vnxiBW-_11d%XAVB3s%bB(f=bP$W&c# z>`8gYZ2qkr^3Ee4{{olhtz>1s$as9gR9Pw{DO-&EgJ_^Y9oEMgrbc;~Z$5g}h26K| zx=ywyciqd_elJfC+N+$ezHJ{hVl#a;Jg!ImO<)N8AB)d5@(7s2C3&XS%YP-d_-ol~ zhU$bdwj?Htnw^Hc=2(A;iL-XWos`HVQca1BKCN6D4^C3y(r)(Y#|g7aQ~G@u+>h1I zk8}f_T~`j##Ca-tlTFmmqG%M6e96S(ec+ka4pYcyuVWM?lut8&^%a*^w$fep>jw`sH6N${WsU_*- zTnG+*pyFxf4zf!=l6Nc9bKTT?J3mDVM+My6vRF+}+R4gR-AA3dvWs`tU6mtf(DDAumVHszW1{;(4}GK5ARzfKq(w$g|0L&Bpz+`yGJ#g21+o0; z3iq0astJI$7H7C84rU!^nw_qTWg7Q-{;Tt}?;W$H``E<1fre`a%`d@na8nwz`V@~G z_t_AfpB71N)lIrl%6;nK+ujXDjmH~sop$OnG_k&k-cI%^nEeie23h29I&e@=-;yfs^!rn4ZD&@2L`Z9O%A;*J3TR@+f zi>es6s(K(Oos+^L&Wa?@UDH(W2Sw@uneMc$mTS#VyM9QKTIEl_qp$x~->Fn+e9tiY z>Y^rDVa#!e_ zz9AbmZ&BicIJD`Bd(#TAMF|xqHxD)#M1iMY)my5zHN`VF`8|Y!Y>} zAxwn?6$h)LI<^xceM4hFqjV>%{;r!pg%CjE3GY-$i#_(NI#f19SR5Yd`7lSW17jC~ zE|9-hVIAS$BQ2}=bU|)cp4}WnsS_a}N1^d{&O`UT$HW;PxM=t*)>ba9YFsiw`r zxc}U5+gc<1QX<7}X+t ziRicmaw(M^x7xCZ@fyRO+6SCAc#{9kmz`!B9Th?$EDbjCMo4YQ-hHwM%@ zlW4EQeDS+#41@@yAsnkjgN*`4!c8?liF`O(`~`?b4m!w>1!-J;sRd?Ylh(xZLYzIR zzYFxz5z5Xs5)vVOOZUF}cl~TGM)mS~k%WmA?cyg1rrVp*yd3i?HrJaMe;EvVEwlhBVkdUN{?oB2MOw~jnb|-R%4FFgEr|G*ZKg6~VblS^o zb(g$$Jh`g@X0QEr4i^Vj6RgV1vg=BLP_k-E80=dpL@eLO1R)(-Z+P3Ef`v$^_miJq z_xJ-W(&!$||9uB!#JtH$!>rm*fzTi)@$$(5V1OLN)o~pXgzW71Xdnm4r{AX_ z|Gin3lU)syo>+fI0(t)@#+eTHvO?$z5BuBZ*JDp zv%~A{gTbu(crL$ZS=VsY^>{8{tXFMEIJT`&QIX3SMv>*Pv$$9w?DBR{Z_Jwq^RPTe#cLmz6s+o^?Y$lsCS zjoiE&vVr1tQShiZEnp1-|I9%A+Q7sw!^kfYR@kPGBZ?0A6f`5*FVBGVzoNaLAv`OoZ01W6{ zC8>Kjz`kL_pZ^rmqG&T9p})?^MC!{Q4+9<@70A2ty=~ys(@qrQY*;{{T(}BG5uQZb z9AbKBO#`>ZJ1vmGNvu(p_6mZ+PMm#F$=V&ik7e4J(BbG{s&VgX^?kb~w(#$`UAF1? z#PAdyeYYEy)CJu#dF^gAc5x+aVJ@zU=Puw_GRMWO)f8Q{1`ee^W z9fe06SByyChc5=v-KJkJ!st2Eqq1GSU%U$empZ0w@GjE$B%KQ#(k7t6W@e=>TOQ{oQFXFkxQJvCe6mx1m zk1%^H#3cE$`=rHQ?x|i`_;?92UhRhir?G7yg{Qy#?U{El$h*;tsz~7ddYN%Dsn~5& zY$8T$7Y1YKJCaHJG5%-5zW1%=fWLk9%KgTeG7|IyiRq$( zqWTwl;>M)-VO6a&Ijz;AFEOgzM)mnGX4W?6D|*ot+)Zum=pq(x8gCyVE8E8m4cXK{ z<`4a^&N;ZsXDlygutxs5;$G5aI4aIJ5}%)MKjK936)%tuebNRYEwuV=>)1yfi*;dv z<4dX0fYpan9;y4$_4Yj#sl3!#49{q62G4Z9S3W)~=VW-LWq`kv~VIc=>cgfREx(d02E$KwlG1;u?j3Yfu zbU}5Jg^chvjf-y;KlYF|W%r|StL6B!uO{S~L}2{BucoSJVuJuHFxUT87yNY8G*k&)6G*||9lgdZBQAbRk=b5(jouhbDQ>5;}$IyQf;5Y${s3RJgXLdem^%AG+&?I4Xu9d zZ2Rol)A@T@DNP0W*RLo}Q27tHLlpwAjq3m^T5R-8&SthWU1noJrY2Y8VrEi+W+6f@rtmu!4371a(SN4V5r$i}93&?Niq(&cs^Xn{!9r`TUfV zOF5JhEYiOCHAluPu)#uUdsNktB%k>w?X&v>KpB&a4WrHiaW}FLN1yYW|8A#}{&Y z8@KK1mrb6t1TViziN3rP?QW*zC*j^>wZltiv!Lh`c!qG)4?fcb#(w$9Ro_@(W{ET# zdM8430Sho*U-bXo^V?lXn_}LwkjG|`8-pw)tV(-)@Onn`H7mt@O6eZgWv~V+AA{^Y zm*Tu5m~sn6L?W)$Jtc%^!dC`}G$ZG(8df@Ou}pS2`(DkB0=+4KaRFR@1{g>6(Khz~ zX+-`4N?C!qo!2b%z0ewCW4n~KhZMbJSuHY|Y+F1o52dIG{ix=d<5{dcz*OnT(gS7sHFNw^ zhC@8M${1=u8OD{jal;aMqu=by^xr5%q3O+IAE!2rICIbGssTBTB#WIBtuqervbAr< zD0g7MqgQVIQDIbjyJGSmAQW&7HnI>wrJmiqKO&SqRDZ>c^39smMV5stG;_!ziTa%> zX#z*KFI}%5ae^SMDrypt03_)oWllwl`}~&-<95Ln8pHUq||X@CwR z>>)CK$=(qO0T7*3@HhJAi*F0(G+80;`4}0P@;vSjoSJrtn8ER^?Z@3&D>bS<_*tI! zHP;(Ley@(6eh?JfoaSB`M@_%7*Sx?QENQrSEr!8Gu0@ytG-2KYo2YDRDi6zm5?gJk zkW7_3sL^#|NrBQ5wj!@vzUp!6BJyNAabTmHY1@-yr*myObn@r9-^C85x92}i`V}4C zAn03)7?#NRje$5r_W0z0b$L;;Zo3%Bu`lxpiZ~goHC3YhJnM{3rP*^691z}MT~t8& zSTMn{zI8CN)(|l3psjqM?S|qT#8ybjCqI`nk|K2r(+u(Si#6$j!rpkpNK&Y*LY726 z0iJHV_b#a_5EBOuqj2?^kW*4AVL9${iMHe$k_bmb1ps*xe&d^qqeY^z+Q!C*uj1Zn zfl*pc>ldfLQ-URMbui<`AqpeENV4q?wuPH8q`D7Xon{NtRu{92CP(Wp-Ibpp-Y| z|M72XSIN^Gu_|0zh)AJk>1vBU2H2Nqg5&Cgl2>6w|HMKPg4-OaZF{dbx$Vi_*NQ}_ z9{)nn_ucM)!oP2sONfop_4fNbOA-xs+%MLkZ+Ato&eccf_}x7-7ez9djNtj4NcDF< z)qc^yY~E@f0}&itRF?}l4;SYS#epo;F2^gW8?>P5;g(r3{p||#u=+Bi#_O&RPG?68 zAqUC!y?0N?3{z!A3Rjzc)Xhk8&gQF6fP6+OB6!7CaoTT5BPK)Snt2iPcjafHgk7?< znsG%=L@rx zz$qCM`XTo1u!#?O%`2mT10AEnQz0X$?EB==43UtFSG1jB8m~`<+8s%ZfiV^pRc-Wd$qc~ zh*+6=F0|HtXP;>2!N=*p;%4Y}bkMjR^V4x{hRP9nci5>+=ZPgGc}aixFcj{HlxbKw z92JXDc)b2`z5l~M%He(mT+0<@ZuR>G+~V_Z0c~?R8SoGjPs-O1tFR{z0h~2XhpKMPAF&JL^t>2irdyd!55|`6 zBAN=BQD5^HF`4pp2E}aZi08(NOI68TRZ>3uGUm|_MV>I0M!jNp9PZza5~-=iUTwWE zDM>OBY^z^FAACVSsY^}atTgH}fiAqw<`9q-EPY?+=X==uK^IRft z!5;GzIDAHhYPq-##DVsHnbbRzZm!ZtShZ}ri>ixI2N+#ixk>0TZ$UHpY-;{GV=*;l z@VYqIhB*6*FYL*FDsP8<3aHhS!{yUYouNjn3dx1t=ua0hiPw=3{e?cndw~j4M$Jxc zi)CGEzdcBhehjVrT1ia7#F-*A=$3HCJ)a}YB_8c;KoU_91m)tR--`HrF%d%JFVDQ; z!#qE+F)CwRg1Z`haJuX}Z5l_b6UHlGzp}Hc9F7p%ZCXDt~P_;2iX7~oRKEu_s z`?)AJLp@l3^=VqS)$0&#I1@tMkLEXHhn3jtbytPHX;1O82IAQVPT7t7OwpCFqHIMy zlUmwTwfKu@Ooi!s!D+HW=v)H(j z8yW$Zr+Vpj{Qke2ziS60yiD{O#6-RHelH#tg2Z`ZN{u00Am^|Lw0SaIl%{$kC-^N1 z%(>r%mleU=4GlU?z=PTj#65}U!U2xF54#?_3A@J?Gc{y|G74zdnhcX`$YyA)QqD+L z0v=vCDL~y8+D4HnICl)YwTar$9@P=>p017OK0jietXyEtMJm0`z=L6OQcE5G3D{kz z(cArlA5H&ul&*^D)0JZE+t>_hslBe3`&qcF9~P0pyw8CemT$bk%R=6g5^;|n3BEl3_J@*@QJG2yxq0wIfvU#|e$L}2*75VvSDez|U3&(AWGbKk|>3bl0HCImFhdqo9Z}49cb`ytE z?*UdVyyW544_uGfOV{Da$Gz@ZJ$n@r(R8gRsO@*VXa7Zs9x8wpZa-rHD9r|szdcJZpHe?yNJS9;NYUlVEZXg<`5$GuGT&5XtPs1x44S2}8qW<%7 zBLTC}jL6#0HDS45WsDuFGEPS2d1ukj3}qbgx{HWCJM-~y=grexqtEnk68XASBtXPz>mK}C4Z!3D86le?LTDm+dlsjJ z^A+!!4s8=%vEdYp${o-ki*}FiM|(1Np^&K)U4|#Qu3rYeyGP4QWdRs%clTq2F-t)y~U9yi=m*~h{ zO$sHCMaKU^GacFjf2aAXZD%KKX^ku0g8a9}(;^qM7cG7~?AlXb@d|mT|2vvhu zhjP+&c?I>;XQB0FyU+JyYy`^}`1`4s*JDA8eLH0(y<066Sy2 zG>l6C**X=wpUq?J2Mt^ zgS^-DkYdZHa2Yqof0fxZ(Nv;SwN(Om-&6&P`NhZDf{Bvo^o%0MWT~|#1-=bWy=^pZ zsW;kOe6y?G*_}sy|=L-$-LK|Pmr;vFeU~LxUHg%vIibtCV& z9=K;`o2+=0yt^x-|HLn81}0q~`@gElo~JFOvKBY6H#(kVB(F8!Rs1!I1+2mnu5@#P zF7R{qasK7pU-fpcBL>;P{$)kl0j-Y0g*iX9&^${C+0ErxnZ;mFY2#}E4ek#Pys7qx zkD#^=&!i^)__LK_P~#`jVlCHzLv^nH{Vx?Rd+d)x6^+0x??!|ae>L57-#!Ey~J_$eAUrE)Z*KmlordDYTbb^)kTW-8m-Ur zChYwh4CFk4u(M`gUea?jGO%h1DJKN!K`ki1+EPRMZx}#}7na$dWmuq=^GWc>k6DgZ zeZ(UQsryH;_FoYoYs@Sky-qjWT@LOBuo{>&s0k6dpiNb+Us~N}J2>;YpoCcNxiKlh zZJg?;d%P=u>HXc#lhK%Zkxvhy`^vfH5)UnzYX>$F&mLAqL zm3GQS4}SGA;HAoJbsHAY6@b6i7UX5tUZ-dD3JZv6nw0N_^v|c6!MxGry+v&tn6G4_ z_}%ScchMYnHe!O=wpunay=P7;9k>)3Ze-_#tMG9=JR8w=`8LJR1zFm&^~&LW$o3Mt zzZTUd{G>%^0%oEWqn;$$AzI0XI=0a0s($ErSf1^Nwjd^FF48FO zbVSW`rXs%F!vbb~0mcCKNY~gF%_wH=$@^OMrIbjvaPB}brsdB;*D%joYle?39|a=< ze*XH|X`m3TK^gX+Sy8uq?@IR4R9Xqgg36?oASk1=7} zSNOf9zUZ4P>KP2)hg=vBsb>ewHLK4f<2Re_i*Hz-A6vc|O$J)Kq9*Jp&A{St$=eya zm6bkDxuYb$|H3mhXQQ&B*lH4fnDa{^Rr8;dY`Ua%C7kv)|Bi?kJ=yE}2~x}}bGQvoU3yPN{z)dq}J;2_`C2qa|6@Z9ZQWl$t)0RCzj8mso>6$YeU z`_}l6$jW;-moK)%<2oGhsVw_H{QWOO^oZC7x>x`MmH$a()+#X3^a{$D@S}eoI+5^W z#K7TX<3|9}q3tmPfI_usKt_G|iM`TrzVd!0)cRz`IhI}bak!!5dlh`^B~Y~nxN-`x zfX*Il_~=W$C3>O!i$3D9*2ixP!VyuG>5dIYr+BAo{N+9)R0Mczl1t6cA8h^!1>~2t z+01kH42u_0@1Zc+l>5WXnD?zAe=AMJf17moZP--waD1GdEJnt)SMZk zix>lhxn6;1LZ~hleoAiu76gF5lQIifZ31X4$D9UKCL!z1h99;Hf;Q&NLzTj|5=U}J z&<5Fppc2=UGU@SyA6X=dR1<+;0^+gfc5mo)XeMbBE!M|UPJ17Yf{^2Qi20b%!-U6KUfL z&kWRsdi)@xQduk8<1Q7G?Gr~#|Hz4E*WX^Bo>+54X9$k;qvQwhju-=Fev%lMBu-26-{`s??a{= z|KX9$y2Oox8y-`=#j|mm2SzYKKUB7n1IbY0?~G@^6T7k(?RRgq@LV?iU4P_}Ao|Ie z<_pnRYvgmYQJ21L+jBf2F`+264!a6>Gk*L7&C>%nMA@^MOdfci3eJi_9 zLI{SfPEJ?a(w`9E^Ah-7_})U@1%4XRXI^}`ZQQ-2J*6^ZrnWiW+DI}7*q5DjQoGYjn#zUMJY%HJ@;+YX^PNnLuISj z#wm;`sLB2O`|g9L!ObVwUQK5r`@vR4KrTZF@@1;^Bd_p$_k=ub3LacG9DDv27iZo_ zm#pD!$0@Svlcj(*eZg$D$d4iW+Ahs1X{p_yTWAXO<6GjNV+)$?hBqJiszut{m1n;b z!jcI>1qxOhXVyp(4aJ$d(a4Fe zU#OR4)km6TcIuTrdaSB9`FyCE8L^u)NlYA?fQkZddH&S^2#=4rGIbP5cb)Ew%)a_} zQUu}?Jsz?v?<`K^wG_}*|7WT(*3dWr`^H_MJZLF!DzYI-IR5mL2uTK6W2Jg88&8s` z6Qy8AlW2!9E)vPAIls}&bS}n7H6k0N4RK?A1Ig((p^-gIp_79!u0-mz2O#SPnzJcG zAu_Cs{e`Qn5r}a0Y6etzYoc8Oq}z5H_yDKQn5T{R0{K>jDCcyOJ;Gk%M3VH$w;^N6 z>U(I@r3#LAFwc!)IYO}+rkgs}415MoMA1qZbDiqgq(t*rwAMLf>jMlU@^<14;}*dW zAsP-`@xtv3dhxW#b6p8aq@nd;@>9E@N!!9C*W^u3q6zW1eI$3*%F-JIq4egrg~=qi zK)b1aj6)Lw3;sY>R^t)icg#l*eDz z32+M}u^zcC9T63>n;QQJUyzDzrma4hz!Rtz-=J(SLvPwERug`uL*r9?P*a6b(p(CZ zD+q#o-ox$mcuj&Ci+b=S%I2}ZS$UJ>d`Jxg%#P_0kIeLn+~GR14{zVuCt|GM&jpx} zv%cd*IQY4CLcmNl*f4?Ds_1n^K-8np^)=v}&G_6@6>UibV>k5^sa_yADmMcIu@_fk zUJwEf2-n=@Ov6ck2eX&lW#bDXKte!7K?wsXZ%QjRhj}%?aIM;3^Cz3OmO2r_BKnYg z7j?T1J#vMrb)8lguBt^EX31QeA61xoBC4K5KowTM!Av8m5(ir49J>6V0BN%oBk@ zvztl3M5R#0NB0zCvaxgq*)D4=?CKac{v))e059 z_~%OA9CR#BB(CD|@mHB>=hQ^NjbUC_EyhgA(L%8)_)MfCRr=WUCnYdx&{ePfw$PXP z&8U#)ZQkj0t9-LKK}9+(SzH?BQE=NRLP4UG@{saT(`|!AEDhtb5c^&nCyj&_PGd9`bm=WOR?Dkc$t$IUIQD`xuDY4 zp4W%>fT6qIohKsRLVl0Tg1?FAHw0j4?24)rM?Uv-hkpflpmMV&j8)1Qt~X5Ag7vw1 zXaBKcR1BWHtSqD~iq@J{OKR@lvZqTzz2p%xZDf;N^y-E<2erm4l+R`qq&bnhvw zOjzbk23hB8_ggds21U9UzSJwQYPU0oDW$@`%*!SziRSr^+LDOvS!Jap2&PJs$#+#! zSXq!&Mq{W;fSy+0C7q@+Q?t`tW#`NnX$o%ymW+N+#b95e;`pm`e{&sQ^6W{UxhKNh zr?r^$ZueAuUjN&vJ)i9&Cwh6tu)VN;I_rT;PGMhQf&^wMuSS(632(%0W&39&9Ff)RVR{W!0R%*>+6;EQ_ykEFBy zi>mFqxRjKXO1DVP5F*`;f|PWFfPnPSEsZn^Lr5bHLk|ocl0(A!4@427%4>

qB=6GUc_xC-fK>D;zPKWY|sy{KR|MzRjw?tjS|A(-}NZel@B8)e4IFY!pKJsyi`0 z8E&6Cw9AtWQz{0l6rA5%y-R_hUxDG2Y_c9zAK;0y1j_rZJjvFK!^Yr!<8abAnK{Cm ziqct$$UXya*y<06p|`I=1G@AOr#7MO0};Kt@sGdm*2 z{F%6+-q6gCs|I1XuG-@Tg?SB}&jgcU4K zK1`L`;uccMw}^r7WEm9erB|Ho8r0-1$p_nvX0+lKZMZlLjZZu7w1%Sz?o zpv=bzF3<-ZgpAE zzgHaUotjDRYiX!A)iQ^8&6I`6^21G7S(Ag6t9`StZ1JJ~uxuZS;$!4AXu%mo5S&vT z;w7ZGd22`zhwIPe<}4-KfQ*X2s*s32NnU@=X~MQJNpzlLDj&6942jYKAF%zH0b>~x z{+do^Q+NE#T5ilG)LXWi=&EGi4t9+Pw`U-|>G~<47m?&xcCXmTpJm%Tlw4|m`b=Icu zt~Y}jrPEr zzRAlQ(CExP*49Pi7(rk1*A>#1vxQ3~z)zICt zsk}|keP)C^AU$3ctni~Yf2!t`C-~<=vN8UeFr&||7U?GlcV8PA57qM$%nfx&2&96R zk>l3ZzuV^uRK(6+3@G?%N$m&&{BI2o8Ymp`GpC!wBR{zo_?>3v6`%F+zX{z3BZD9wC&QE zgfmDx0eb_<_+$_QA;bmNyf@`#Dc@vi^NujI@Fm;jP z8mg_g{y?l{L_D^t^+E(0t8t^pU^tV1hz)tYP+-+d_%+$EH-2=>X)z#i_C^T69T z0XOIEU4j43S5~bh1719ys!5`qXqGSV;WaGM&!%%|EE)vG3LbP7HWP8pSAo$tCRfvP zQh5w9whAmm$9l!Y#UqA(HhC7IZ!e(+MBXhoT^$;S&H`RMM@{Zg#Jh(4$qeX;={9Rh z3EU}N_F+xJ@8D4K_nMj!6kI--M{!C4Fs0&+r+xIAHj)3dD*#Z_8aKl`; zC9TVpj~r4CS{zRtlSm}?ZQatX%70{3{ujMS5))sTdXiz5vEP~nlr3Uz=G9*v>ZBud zx3Yh2I9Ot?E5G+VD)|oyzpLMN{?Mm|oxRVUX&ky)*>)52NBRQ%xNOIr@!wp~t^jNq zoDc!0(WWgJ(Dr}5NCxosHwB=}ru(eHB;`jU8Wf0HXnks}?L4b>Ke=gnW_mmF;`+!{ zZOwu5-%ej82Q^vO*-@Ewvh_{Bis87&Db+NBRoma@Nd>uz*-q0&3!D z)@|lR%N@;b60}-9rM4K|)npX`dk4pxyo?+p&!l2T1W6>YfZ26X_y(+-D)fPj2q&|Q z#20qG5p1PFn|2vnWiqB!)dI_$wwIWwn}N-eCyg4tJ~13cF;)jpG^CGX+xKRHXo%ek zq(Tb_0Jm$tR|Mc@x!$iPGImYp@@&*c7$>QM&({nUf7syw)cdA54IrDnLG^u~7aqu> z4(s8SaosxCysw!g1D7rfcR&KdM^xu=khYz94thHE3)*rwfdwII1Oxm}tkVJSv8f$k z=zo`WpbeW8smYL)p+Tn&hIF0mU}1duS4xmZFM74%hkLF4@=sGLU@U(+_2yNdno0YM z!gQnZFYG-vP3TsMRi(q>LyqJVA{>d+>k4yw6j2IY9IZ9OaikRjmTtm{3&)zDXrUEf zD&N_+cgk)1TFEk6J*e|0?3BlARD75u%lo84u=tkXWOUG_woSia7vJG0^iqFcZqtWe zX7Un86|VH4qxU)8EW1L%xs8l}oun>KC*P`$vV!Syhl;@BIDtI-5VBfHP5Tvvj+yDz zyc~bk(8x2Vi}n~PCKvZK+2K8)XU%Vze8DCgGypwJtz3;`;OE{F{nv(I> zx|ulpiw?=EyC$bidgAU(J<}}h@6|17OkaS7RVj;V$++tMGTu~8tFk|@b>ZXO__X>P z3+ddF&}8lu&vf`!eP*#f=V7d1Zh-q+D$6XD7Zo-}OLHnX(onfPZcx9I!L{;L%BV#f*(4x6ksc4=w3ztN2^!nBil^m)x|wqG%sb#ged zpD__y-j?$uf9{&6kx^ZI`a=|(nLw44U^Mca&-%?-t3WvicPJ;>Zw@;&JU@@rA$>g) zuDi-w_4;gDP=q$n1!$5da>^HWR$bZ~JOO($v0l($DqvwHM8ZGZe|Di)9gI4NnV3IT zRFI{Fh!$k3Vne5)Y@p-|pW0w#OfSpS=f1Sib%b_7@xev+;)Xi6+}Zl)ss6`N!neE9 zCKALSXTSg@V{k8Yh81(;0#6Vzk)Ub(bmbjQ0VmCx7ll!$IK+d4{V86?r^WF ziS!^oWx|>vZ=MQ1#v&eaW~;Eq$2QUNh3UxsN(6CA#_Ttc+M$A-?-Oj;Z1kB9*qf_y5Ti+@lgWY-yaY*vy~&;-s@;sfZx==-|&UP z+6PidQCEK&&MWJQ`1@&-mnt_JVzg3gRM}MAhUDRCCw>Ye(sr_67Hb&sK)Hy>_401s zwqINPjW)3v%^QBd&sjS8M%!l)2K*a0N$W9|))#!0nJo%$4G_+T&-C$Y=$)Q*Hdh+g z_oRFu#@-09Yonc8y1?U>wXq|@+sx?i_je7H^6$}|KawiRFjb8EF!1J6S4}AmIDR`< zAEri`xyi#%&OQoRQp9T4d&T3}Alrtj2d>h#U_kq`Q z|7FS*IX-Y_BOYOh+$8wM1_2^)J3#^lm|OSgHuBMwln$G~vSdAjIMaj6&qW%jyl_f6 z{FJiK#MEos4cvPUWvQV~YZU+i022t}03v?AisPRe|O5TU`Ju1caa}wkqSvBF=BXvJk#G;JgUv@VmwC0N2b-xL`7d z$C|bf7l|;slMKM+5d58>p&9c9(bxaoZpT#YO8fpi@IF%vLoz>a;PD|lFy`?-C3|(d z{TfYYGi~hk6(^nWRVwbU{GuW_!nXrL`dyX>-J7( zM~9^v0o2)t-9Gm&Jzm!?XgC}53LsbnBHdZ^{w*E1{gM*C{7XGr6uNo) zD;YeKKZ1ue^`_!(y#O2rl@jMdCO~Qy4=Q;#@z!fA+4^(>$-CsLwpwAGtyOj3C+SVA z7V!8!##p%03@*uVM#)u&_~SXo8?`f#pXiff0i-<@#m(N6)hFqMu6_pq zHFdLV`UEMfa3EFr1t^gC4hIRK%1-B7A9f@pVs9V1IrbuRGHAue7t%=H$42x`Cu9Q_ z$IPmX?2YGg&p7~nM`3o@PaIIJq!DpKf-@=wwVeW0PHyh;w&WqwICw)&XtZp`666Qn2=t!@I)8|})A;R4)Y&RcSA!B@s6!YA(H0t0 zZ+gwXMj{x#AO1R0#8lbiB7X{_C(4^9B{kFO}@be-oos` z-PymDPh<^6R>8j|BaE+olBvmO7RHx8MKmMBqOzWRX)Yx$x#}=5eyXg3+Y;;XTjaj@ z=o!Nl7xFo~big9It1K3Wp}2Fsk9k>{lz9#gWpWzFZ3|fISzt5K91P4}%Wji(hzx2M z{rV{l%HiZz`tCGX9T%^=px@b&31#@zFOVb(otX_cxs#^8i>x*`&tOYi^IMbwwn5?i zD%2a=19s*^XubBcoyyyAJk71?#L}%L|0{wGY4Ntnu<7mGCp33H=h4wB56v7OB-pH) znYVg4z%y9*(o$S}j;xc=vkJ(Cehzdv^!%Y^hNAl!}h1`o;#OaW0cw2wWB^c z>j!y|#`3D7V-C${{VZ^$e&^BIEr98Q%t;i?dLD+&dOqO(W;Ha2dFB@n!VZj~X|)>9 z-EunYLI5gA9xcHau@#F>#r6yR#fx0ug#EYO%VaY8io}IxLFgMj4rh|cCWCpu!EQf< zDD{J=?mEx`MI7PSOdOZRFmzB}(?*jv-NW{!Oda|^K(ul$sEkh9^pfObaQ|A#ub7#BOo{-8`l3V zxl1eYskNti>$~a(-?fBIWZX+o;2A>G(B%*Gg`TG~Rp$uthZ~m5Ke_$-G1_6f?~p2* ziJQBWNSB>4NBgYoUU5(3_^TyPjCm^b#@nX+)Mb9G9}Z#Z+k@|d(AVl7bHZZS)8kLv zUN}D9%X*!F=%p8+Xuq^c+53&B7&lGk+V8s9N;!2+6)+X;tePu=YXxH}fy$A^ixS_} zM2niF#BF|^r22m0;_28HgXq24$qA0T&k^Lw!-PhD$5z)nD2bqD+HSoqq)y^N8o$-v zCZ?&x7_`u61Pu{O_Dh$Xy*Xc*4)N62Ni4LfgeCPS$n3`^$G-Dmjqrxwfku_MlX^Jh z-w4%ThCtq!u6mLUm52mHZ~OtjNzw-_4K8n}JA^Qski%uMNg}EyjaZ5G0m6mbCGtY& z26H=fBWx1w<%gTefj&0p{3riwfLPKyCRVN)fTSfnj zV{UFKeCSBgS_#0!tBgXNx5%9$*}1*r?6M)oy{EvZe#`Y;CBy*;%9()g&_r+f&@Bm4 zNc)#ruE-2GOq6@sfqNXzcH`4A%;gN&A3kuypw9#{BVgl8`lQ1zsxNn>x52}#6 zCSq1LQ#`1sRhn=hDSLp_k>Fp?(mM1%-?z@RvrJS8(~c8G>dbOglurN%!*^B?>1z}o zO``wbJd$fJDw)eS-X=oeEA3~Y!h9KDH~X5j^>_YAYtcJ&LWke@<@SZF9G{ro*}rXy ziw8NKzwLx{IVnWHh@mcE>bLFr6vKwfX}OGgUuTSXszM$QL}P)H_vOu|d^Lp>JN2w* zNPZqQ0NV!4IvK!W1OyJ#MuDw$U#wNg@lqoj!2s@W+%C%ZupU03N<^YjY-nAmNcdtG zw2^uw*W*mF+{q!d(Z)EL6_ow&Ze>-n!+NbRh&@G zCS$_U*TySsTlE=!K-vY7`(^bbe$e|Cys-wzXa#FBH2xF^Sksjd1?L&Ke* z)~7%}uMYSTz@b_gXBI82^HLx+2XG2C-ve2aU;EWBM%ZDsk?XyFGrrgxTTSn>s+T|V zs&?09Ri@J~w0Xt{uW#caOZX?2o5MC=<_`iVGi$ctk!WOEnIMpIt!z6ZZMmG(J()Kg zx|pXHJDIbY>~eI2D9Lc3Cv&m(?{7;JbyLxi+ zxmy=ai72M;w=sm=RD`8`=jXoS9N8xQ2!FcdLamoKC%eS}GBG~XoVHTt=8Ha|hIzYM z@*K+_=aH%I+BV!H_Zl^%P=%pQ&-2$ilqpsw3o)}ZXnY6RQse44aqJ~;bz)cLFq#_T za(#Z$@jtv-^nIMZo>eJ2S(V~9vFBZPqD7t_|9yTxLEnW6)-WO`urO;RPs)W`xlA-ENR;qF9o++?v&M^SHD_Fi!Z)+ z3cUVJ?%ZeL*{Ngr&CHV`4Q78W8p0N`{fcViAO}RIqW#h2vf`vR#bzY7V!dm_p3ApTaIDIe|E-eIG`6H(~pL%f}J zN_C5&GAtNi9>lGwvHzfy|2mk&M)Nd5(6AD<$M(@b(ucYoG< zzg1-X8d3W>Yh=unSs3UAsRJF>N%EmuF)>zHT zY_ZV%^1)I#z3J<;_0Mz5-ZjH`R)({dkN6fVR=zHyeMh~wA=C-m>Tch9JM~|Q?1q1$Bz#YE=#hy`2cVRo(|EoD=$vs4N%ee2-+2BI7{TF$7Nqg zsNpxCCErVc&xZxi;V238m|0k7)K23?lB;@=;uKNXIxbMio;G5W?w74*Rfc&x=*`up z3ic$nzlq7a;dnW45fiCnYUBXjUzf>Sf8Ul0ULe-pwzq19++w}0M6?i=?ce+rn0{Yu zrA#}xWqbHBe`H-6p=h?9kxad}+4f7fbL)bT`a^wKq|;%zgS(#m_Y{I_b^e8K-;bUQ zUib8etIkHO@8N$NVxiviAT*cH*Y{^9UYsZ}`Bxg3y4hCn5!O>@wN~FdK=^ihKM7lu zsbxA^f54jV4z|jBC(tm^I-StOMGQSpSFcCBC`+$kgB}_-TVu9)BLu2f(z}1~#P?OT z%mojoJ(YuBMcr;G7h;j4hZXS4!Y_JcUy`o7f?gHR@OIhKG7s~0)>YG49XS6$eZi_G zxD;~4T*2c~PM_SpwO%Sv6M(B!o~}3-=Qh0Y$*@It@i-cAiMp)QE9?=$ z%R=&Uq>fl6^NH5{r8zM8&}`EUk@}0TZ;A>)kSFp-LYN*$s>c z{=Q8n9DmvE-lEod&f=|Lle~=)d_Mcl#EYn&5%Te9G``-pd7@1pU z(spqEnO_3tfP4CrOfw@z=)TB@7XabOjwI@B6p#R(^eI>$WS>S9jlA9RG~xF*u+zd6 z>N$-A>08TuTjxxPE8!(*!tJ5tA90b<20RW-NOp_Y!at&G z@%E8slx`Lmd;0bPJH>U?Cw5ioN>YC?`B1xBRo*3#%$YF*)U?D-?~QF^#lpC|yT5p4 z!LMyZ(#L7@tn>(bWVl7h^)*pju^He?osPzz8!0_@wmU z%KA@!-7rVH*Sr1fg#fW3-{g{JtDh^in)+4tUMmtq5^k%syY5%V8oT_SnU1oBhJnW> z`f=jC0P|;86cLlRV71&Z;Io3j|IuLI(c`r$#b`Y=dV&-3u}hpg1z z?Dl`wUblx%rGyeIKI;qDYd^XF#FA(CEO6JFwrrmQ_}WfoZpnxg(;GPYmQ(xbtF|kh zJSTC01Ux22%7%JkEbFd)?2z_v_;|IV!L-M&vfYa+=}{}_%=G?GwhLgRNtpra3JqZ^ zm{8CIxfufJ5CAg3_{X7}E6_7*Q!lE@{(;kiqV}L;@jFhxs~gtSUc-qIZj|U@YX1Ag>xe1|oagFjKl-Km6hLr+q&F zU$eB}+9fc;mM|cm{^_-WNQjjYHh^`rqe(_p=<6JsfOx7{XVXop^I{2pD~*bETO_en^FC z9BK$Fumf-u)o}B)D8{xjq8O^mB}Sq~*9rh}DT`b-54CJDzskA&{u*9E4I`-G9`2VA zV7fzTaUM+8JAXj_W3d&Vy7763pM1tYjTd0Z^686BW(7A)lvh0r(;)G3IV4 zZ|E*_{@P?WLya%ZM?pMIZHdx`OUAOfxEM0gj7gRLqmwRP1175;JrYoO#c;H?6^Q4p zU{q1|{quhtP|a%_G4hpoQuGl>$6kkIW9bRI6LG%z&nWcKvzH7LbUkIDg2H5umj#{A=#gPUYl!;-Zp6LYQ4*D}k^4+b)>UNQqePuF=JCjP= zNa>PqcQoV@ILz$M_TN`-d}Q)u?8}Jr8vwZu_&l{|D*-19SUoK12<1DL_Z!Du{L!BE zcf*!=ByW$PK5BZ(3`2h@ibv|zfK|@sLY~hHzN>3^sgq4Pl8WKIDcra}E_zzR9e}Qa z5qmQ2rS$+&h`Iw;`5fX1$Z2S4M7>gE=a3VojRAJ&aePD}!{#pz^V+^5~;FXm%!lin@HYxS=Q;7&}kc$--S~AdC0z*~rDG&kIy;YHsfr zEOye4w7EHgIT`EX2I_-&+DAg>C4^T70!OXVmLwylf3ottx;yU59gb}1c~c+ooM4!r zf^J_vt^Uc4d|E%JUYN~dw1cR1wJp-Xei=?Dxa32?QW*Y5SUhhpE`}(lT5}{3bM6hk zQupT=NBX`a<*QFC)7Z{?Gs@0A{<`c)T69OXTB0lgdMbsV3G{4QQq3+cxVkI;?6Ai5 zm#~)ek7D<`*e<9DptAlQ{?i!(3ri0gZQALRshbzv%6>hKYe845a7Cvs6(ZCB#C-yZ z3q-^?AKSLEb(Tl~Kt)+AE)8Yn>We%GjNlRu6{SPa#`_<2U!QE#^<;}bSS>oQ)SqbS z=K0o;R>v_k6&k3Mfn|b36=o&`(n; zcT`8jjPLStBwW3vH$I900@Ekg_?nUFU8*XM3R{~sis*VHDE4zNfpxN^`20qw1~qtl zU?;uommFnKNDf#f4XKj(Baiwu-Tw%)KDI_OWK7Unmf4;AwFd9SWa(H<5RNW|9@lx| z9v|swY_*t{%#Vj%2-Mbe;0+0Im_mNoQR0c*N7^6A`m|yI9Z`J8Mg*umh185)0P&k2 zaK``AEue!WE=^)HhV~jJbw38qUX-d}j5#@agQ7 zf9Rs7^Uv(K-!sJNuaXMg+QL^9oGaGqHHHjZ6pr7|e&M~#d;oh z_LtNb)0}iKZ7Z(Vi8Z^OSv68?A2PbPPrTZ`+gtmhRVS=IZ>t!xXy<69b$}h8|5%6_ z!$L9h)lga1%3_`knpt857)hzV?$^OA05;pdb|6>tR;~N&HXq|U^EePKLc*Kb2AN;( zbivo)(6xG4NKY}trtWUcaGL51k^jtr7b zn(QBIT^QKY34No>L?)4~$C5C!o2f9n)60goaO?J~&?s==dcE}tM%O`Y$Jue)&3E+W z|HXvWfF#c&C#pGU6W1(Y{&N@^`1m=L7317BY?E8!GR5m|mlYtL{B)9x5Dd6s>8+fL zfg(3QAMWXs>PuW?4O29Fyb$3wEb5?SLPk_B#4Lk0J}UzYS?NX+=!-bJ2Nr-H-vbDr z3EuXyDCKYf6?R<_)Ij2A=M0+!($KbgBR;)N0Pn*LdvEM=GKm)oc=FI$7;_f*r2vRO+TEf7ww^wkqF4&9y znz=`kkg6!#Pk+*(m0Xc`Sla|jT-uiF%pnhB3V0chIh9~*z>pLdrq0VnMNoQsFPF_t z=Z1JQ>@WmR8)cjvxvU|o{PF0@L3nQYa%-A|zfP4!WT2oUrdiv3ZxV1+gD#A4HdTxXZjKXGQjn0dH(k+ zX;?C%*f!q$QNDS63e=}P_AD?~F$kjYq}D{f%BZlKN$WV#<*ku9$b)VCwZ9ztTis4pU~JxrFj0x|6=)SRb%33UR`5@ zHQ#IKvgXd}a^sLvLjKw_V25xc$vR)`lQ#Fes8)F#zU#!}A=xZ(@*7fNA+KFWBgi`L z;`!Qw^QJ>eo|ugaxS@Zqp&N9*`gh8ESoTr~vKdftwH!#mB1pi5Y{5eu5bMlLQou%Qb<&k|1|n*qK_BLPmQr7SqF=3v;qf0fdFpya5W7r^IgXa?Xrz_KGPL z;SRW8AV|`iiTWQRBNH!^!nYKF>tP*mzrJA}4RoVew&-@wrjR?aL5B*SGXG1Y!;E)l z(=+i+T+Git=tw$B z4EQJeGJK7iQ4%sV#!G1UP|qOoF}6brCy}3jM}jYE&d?Jy+gEJRWl50mgRzzboQ?Y# z7$s7SR&WN~vor=S>tm1*mfhluf}~Q1ElP7?2R*`od&n46u^aMb<8PR2@McLKl7E&t zL;Q!^!-|%V#CH0lqdWZXD2pTc3~ImhTu3bC64=xkG-Y%cc0)J``f!Kb0k`ND_4a^^ zLtmaWf-IghY6cX;vmITcaz(E`zG+A&RtI=byLnx|h|@j(6Fglc`j1p*>b?8k?`nD* zsMKk{AM`wl+5nIjf3B7~{^OJe-Tb%8+Aakm!3{>hA^w<5C{cnk^;Tskgy zwx3i~t`9r;zi<-2Y6JkT|B!~MjgFvsSQ2%S-8LzhzQs|x^Xv#Dkn^`6M}%7+;LtX3 zb)Ajx3xM7!6EAx}0GulU5_f=~4OJxu{Q7|A-gbT*>t9}Oo(+4%3BZ(~N*M%fc}f6n zWd)cm3K$Wpt_FlZ@+X9+a)1X=&Wn15=dntp{*FoE>p*WQAi*R79&_NaH6g1ZK^ZsW zkqA8|9<}hTft&dNc_hwYJx&Qf4ax)TS6qMt1l=j6Z$B!*`ryJu1nsd_CBOD5twJ{k z62$Z|SE-8aD1(Iiewceto({5cP8!D>YdJ@ z{Lx+WW_hT4uD1U47{^zWql1&!%q!kua)NTjc0&sZ(a=d*51Ky6j3zDGG5tr`wxk?x zF;Se)%_O$b=lM=t+XIX}uF`YG^cC2>NuF-|Fb%gOx(I7`3i5uLJ+Sl%JEWw>e|A?boiafTB;8og|iF@Kq*l9eWS5u1z+XlJ@5+ z?w2?SnqpfVhUG2UyLU7WvMxeQ0$8=ixk^}FA=46ABZnrSD2_7?tt=w7p>KK?a`KWW zc(1nBTcmB8#u1l7RWGjTFLVJlTqOqtTa{(ki_!#v!(!VgHmRfdCX&+AZrbut)<1Fu zeQ{0jFH`kej76_$x1wbDxdVSk+ZbcERgtfy^DLr~-)je0Zd#Y#t1JlSl``T?;{B*O zj1(N;tw*t4tEwLniW1x6bnkJ5^f>gMq@zuF&UF3(%jZ@+Nei=e9=O-f9^Z$3#bzcY zdugc5Z2Z)-KkQp<*;*NdDK=p9-Ed!N@H5gkE0V&Y=)NR6n_P-%_f8%SShNp^ zHO3qXi78>h6EawXx>lbVDt|qhCg3l&g-MrlmBLMPg~=0}7@|0owSN1;3ZC4+Wi~Hc zYounX2SYw7zR4Tb*wBNR{Y}+=8Q@@D?;~8JG!y#=nMmr*Qt$6K?O0DghR3p!!Li*jFGz>GyGxy#TbKh3pwqL*+>Eo-hVqBTyqfu}W_%Q<6!5HM) z_@>-M%<^SH_eYIzUOSR|GFaz#?D}HO5%y$Y|{L}@cHAW+^UTRrd zXeZ)=@Kpf%kXu?fa)j+4=}nndlH?d!k8(EM!}_Bte55q3OA)iU%`*xuFnO1%+MvJ6 z6+BRb7kKd}`_I-&Gd=Rt4cm_AtH9r32jX(VSE+{_#A0rt zy@V0vyRk$qGAjN7)gD&p&Dm)}*$%_~xImG9+ zUQD^GgIz7NOek0AmYCoqI>O$LC0^px=O!&@&Seftz^2(YA@(vvI# z(nDpE*YWDoRPcN&Bw$(aSKd$x|A55urj)&Pd+=$YURDwkVK~wk6h=68L@hnH$1&#G zYV$hu1WpH-_Bgy8O9wSjklT`TW=>Ibetzhx{Jq>INtc}%rvX^hK%=Qu|J&-~E0o-A zsVgO7iLXPIIoSR`fjpxsebuJ~LI6*jSv4$jZyw5bqXwgFjbWWa1?QK3HU%>Hbmub# z$p^AoU?vHs0$)RcrpC?n<{2}!zTb?bVR$~gVAlQ$KCg7KWwR3BH**0Bf!Z9 zuw00z8_M!YfFQ15rm6>H>fV?N0w!u zn>o)82w*xn?7cA)(;;}lr;SUvtuGen1-6zn7_kr>HqiVk(XH!>IQ z!)?a}oHW~fy-ie5>Rf<^uJA;4tYWQU64=hSCac zJ{(pW;EkbhcMRR4inIgvf*X5iR~L<3lVcg{{|O4VQmVE>jsW?^pqfX-ND+Vl0UzrmQF!BK{H&rb_Koy{@ zBXM1DgD0CoT1js?^>BXRBB=>uiq#gPn}gZ*a7y|i!O>qEf<4 z!>XR;g`(S*NkaLp!m;6hfO$kXSIAr_-Wy2rWOfbY*ymGi3L^VmX{Bvq#41I`;;*qn zYSj4H_DNAjKlV~n_WNxdyIg#N4ST!#_dP+C1`6Rt?sMZ1-nD_FW$@kpU)AX#8fnqK zU5EX-S9gu}fPrn;2XoP<7^$B?D({C+D>LyFBsPw~&j#^{>2Qqz0VHWWk z!lM!(zL?}7$nxm@Q<3iaHep2_*U%JGN5c<>pMC$A{B-&_;04A)_#1>T&E$DEg+oav zVFRscjLvEifye!nd6%S*E>I*)dgY}wZZi-jx+Bj<5z@LCq=@5`}i_>tAo)B%*xQ9ox~*0it*WwQs&JZ zcRpJAph51}FRs?&Vgb~=XHcff*Z4X`SP1z!4vywUbLnD{)UQ>f1#F48iSt#1g1XS$ z96q9;RQfQh8@=ROyty0iDiIFia=iDgIM5>QkR=OQAub0Y7!8K1=45zLuB&IPua0qV zQmiUIew|KYMuN_*e*0OC1wFf==iT);p_f+Ghi`0`?reV_{B-%K)BmVrGyLOHNmD9i zL8H@GpQVkbO1NV0am(ZN?C6i1t@onHi4QdoI(ff!%AfFdI{#t>Fiu&_^!11C{S9Qr zhal!H^bOL_Ig2_`2QAvg#dU0=^Zxf=ox=5EM#;9@v?f#{g5#GAg zL!v)5#JEwZDlMM{*bLzrCUe=AR31-;&r9?RIWsGCJU}sy9`-4A`8Fi0QL{m>JB386 z_?#T1c5O+WV4Ac#WW&1o_PK-yRo`XdMIxn1H@s&?rsPBW8~0$8_p-8_hkHp}%4GB4 zw6}0$^^3V-F03KW2a?|c9-wz7V|xk@&;TKYbsleC^%?qivs&(2ugVs_?Jb4u8SVY> zB{8A4L3DY)Nnb?dYs)v+o?AB<<$GnW)qgX~ydr2JUuz{Y^|~b&sj3+czn5+gUM;kV z`-lqLH&2TJ38{`k&gDK#gD8KvR!`wO94d6aBQBg5OPwF8iCxgBttA3cE1jl1-tvNL zGH-E&E-YV0vLnV*`C__Zad)B3RhAHo=CgJ^F66l&C`2h=Tyh!~-)geRK_&tq-H zGfBSN?E=zjtvu9jr!@&0ykXD_A9;#gD$4HxtdZh``Vs3*w1xaUg8wzDFQy8hyTBAT|`@n5lMMf!3taloh@XnEXnOig1y-D>YwpK}FR^g%z_9lmv~>#dD*Z zG-{W#Zrx9JwAj^`@Q2h^bL^SH+VzV|!>WHXw0fR>9v>EY;}fYjZ_WzcDOw$D^;ExR zK5J*UK!lGbg)jErQhB)=$-0QsUYdq&Zod-e=G-dr?uWky2VT^VnxP`NkOJvO|DxR|9aiP-;uKY!?DYu9EEH#>K~pOX&BfQ_9~Qc3cR)Y9>DvD%F?wwzz7S z?gmW4W0ZilkaL_N_VuP6UU7nR;NLx$%X+9sp#hwAb62_1T9!9c$*w?P=3%|)Z?ge^D&SZEV!I8?-(O7H{y)w9-(Nd! z_5$>c0Rz0$_Orpa)?u3mtD3$5J2njHZ27BJ3DR5kUlQ|yB}U)GE{yqn!E+#2%U_?U zFBTPvii@^RvIe+qliWX_v^;e2<0XMeGP0j;0WyzG09RFptp(zZq;L%Y*%|_B7nMUC zIY{MDJQ=UR+v*t3GA5<`Udc%k6!6E)d@|uBwicNSm+w9)_?7$j)#CCsNEE7d zt^y@VqCV&2L3w}xPIckH@!NQp{GEnOlY z(#_J1u&{I^y)3%Y-S6}L%{#*%&cKYbG0(mC+;cw%8P)09@)tMxwJ1&pr3h%SYH3ho z$>&9&716LTKwMp+gS)g)k$~Pa-hYoL+91St-_sxYR3j2VSOkVK#_2?0hIO(-holQn zsl8bm3zUp1_l`BSn^GHO{Spm+<)xLhA>ma zkjfL#86H}UtG?TvFSKJkuEsLw3lkf;Uf#l<=Dvs_TB(k$4B&&*4Lt*G`BoQdhB{cx zJ!qVY?Z0_w+OmWuRFLv)E_V2~Cm08I$Xa@QyfD;RgA3H?gl_Yw>Q z4n-q0i_V^RJfpve^z#(sTJ_ZXhCtAwy-R;;ymp3*5H3f5sns&q`UV1*rPv$wYuB6d zcIbq=~IjrtCt(_8lO-SO|Nk%qQ74#aHJ>zX8Zd7^= zkM^?@sl9)Wi?+{Xd>VlFW$3#Uw7SkH`IEPWyIhm_&sB+n(P*BS2GP=MyFc8v^!{r^ z7rG{XeHTAGlS@wq2S>i{tfk%+na<3998zY796fwtM&yD3>3puUfuD>F%Bh>PNtzQZ zv4p`C2cS(X&?hyAwQHn^>B|(LTtG0t8rJ>!7t;Bp&Qm^2dMJ5YHBXIdTDJZ&%^T9U z1?lk7oy$<3AIf0rU?Y%Qy`3i|cR4Vl_{r+uEEjj@kg$XU)uWL8h~G744>i~7OZgt0 z*K})J>HpC);+_t9!;iX4c`ZqET9V58gjC{TG_hs<;3+qctfGGNP_dZ#6Ef~5lpA&Y zpr1;EQvN?tyF$GEU+s1YK|C4_#d@bHiR+R=Qv+*1>VDQ~G#I(5QK4rZr@_;wkWbq| zhH!W7)m&_*(btlOOr@F0-J1M{Lj5**qa4H|^ZAA{3r#rd;_o7H79I|yTwx=__(Gn4 zdgo2#;tG&F!uRC9mW;rWz*ID$`=s7H(w6y$CS!7QPaS)WrRPsRoNZ){)sf*>z2u5^ z$Gpnh#*pL3Ojkqf)kEw9tBwq(2~{=xRuSGPdGZVT^i~+jO4oDNstz0nzO9A%1bUK>rW%zLnniHI?sp|elztp9RE;HpGOF=4qx0)v|u|}$eWSf z(s+$RKZ~(v9}A@IgaJWKew#V+DM$iiKVQAyaU|+U1aV^zYqisvA3CSb-jhunkrqegfj*SOk^>J zKrVbqUVc^oI6?Q8z7Y97=*w%9H#?hwBm-cSOGC4JZbfPFi$R4<6U>fk)2?2oOI2fJO@p2Vi~J{DqGgLO0lA%v+dBD{}`f7k#X^ z;EZX_PV`%Q;16zOOnRpjf{ktiLa<34Gxy|N? z1;mUngTE8qm4YMOugAOUnxu z3vpr)rb(T?-f4Nh5RXW*dMBm-%uKriQWTJ zXTslyzaD60`Gglvl~&$dy8)x}&u!!;eqL*^CY z1!#7B3)lwq1F{2S3aSn`m|+=XBV?zVg@XX;-9PI@=(Xs5s98~{h*cABL87c*jbYRd zEdYE!k$f*@23#2t0lnfZc_4th*mlF+WRS_6Bdw>hG-xmSR%q!b@N5<>PG|PUjg_hx zNE*||2HuDAn0atIRk=|uTGJMbHsmUojf%urGs%KwCT9Tu0dU=1Ec8MYc&Tn3HB=x2 ztr3ZUuhSUQV^FagVfh;&ki$SuU$&L-R8{NA9FPyEanHS*;39WZ*8kPdtXv1mWRIk~ z*zEU3A2#W}V&6i!^ayhQ<$fTK9FL0F{P#MJKTB(?&i()@lN`j(ab@L5UC@BWNw;`X z7TeXp8@IaUZC9(^QX29qaS5zbng^EZx|o+L7&Lf4KL!IdiAH+6n%^yz8Buz-#Jmsk zr3y$@W(Sfr{Kr-0c?ghAAX5U~0%LDl$UKqb_N=;ZWq!v3zQh706SpKlqg!{3t%~59@gkrai($CWtxsLrCZOXK<7L?E2b( zOyp?Wg`Vw9>htCb93V3{PD~=@%D~ z;2|4v?tmw*r;l~tnm^nAXjXJ`kzdQ_Cr;Py6GCQL@Ix zl6%E%a$BshpkQh_SsA(fd#*E(@5RNef>Okhk&*lUrk=kJpHQQLTCajLv7RVdFKH?r zGFA*vrN$rBbDQ`|*P?oz|&l z7`etWWuP_p zmPFF$oebM2zFSJpF0R#-28E3;2Ud3pHL6*8*e0-5}KsMi>qBAI#?~#6u z&FnW<-v=pwO9_MDQIryuLUt|OE3wD7+TTxE0}Azwkh;x7Yh>VQWYXJMG7$~h!x5vO zwG-AZ?f$Yosp5gOU3|}IO740~HP%=|jwSfh?QU!eIb0jM+Kek6u*z=6;cIbWUe%f| zK163|zrZxOBJgcV{Pi4qY^YIdSLYI~7r8RsE_bIvt@}t(ula)6p3MRU5rMUTbETY8ZKOSUp`r!BuqTeB4LsKaZNi@A3r{cgIVJVrcW(zpbUTws=a|3*T2 z;Wvk4#p|A#V1y##34i>r6VCQ}YA_=y6)7Io*DV#b_G4Y9wLnh3*@x}J=)=buf(vbd z`TD3HHHcf{RgP5P0Vl?$1eu!s1dE+YmF1QgN?@NITot+K7zi8c9~N8zovBIvgle8; zmF=kt3p8^B*)er9>js8)loYmgh6yW1M3}#6Spy+?=Jxw|<)=LCFJ`NjxRCn1elfph z|GQ{qWniz8HX+CzbmH0ib7|b_&e#4AE`;UEC7-sS1K@>pyLY>=Zi{R=y;U!~zcS1Y;0{iR+F$^BRJ~ko1Up^mYamZTdlZ*xb$H z4@^WYuTODlG(L_E+e|g87vD!sX`{tMN(6qlyR++MLlbgtRh8W{0R`lCUnRG9=8QRr z0OX+C@)2EU4ZtVsET4mNn_x$YRat&?r?)GKIjQ*F#^N&5LVJq+r%lp|+d;h6^ktQe z38;;)e*WOp32o%Jl!wXKx*XJ;z5qxjl@v(x%I)xw5m~A?kv(E0WA2M1Amuca4jLB^ z#42e3;4JU`i^FJ*RUkSwb~Y#ElCdg_e~}P5m_Cef07wl{ zi*q2i@vmqkx-$5R==!`5vwuUK+s$1m6-j+}@UpDkoA`2tTU5xvO?O-=$Y3=8?57dl zFcC645TuCRcmBokNqUS;#A?a+g7Mgi zysR8F&}Ss0MBy&nPk|m$OyeUuaCMZ{6IfBaRrhfF@?QijI^4_fa=nVQ_oz!pcr76?4nFM8m)1L3xGA~(;2@&&S&#YCkrb?xEJ&8nqOkNfz_XKXcee|FjxL;t9C(-n;Q| z**jZWn1t61{#dY&*pvlVaBYUTc388TPCV_?IGuL5GRdGKXW=kdZXuqSsfY-A)aIf0 zLJ}vs?19V)=8``b+e4_T$om&kL^KSRl10>r&2e3=iBL#%E`qLdlXXy${>eaOw|>+s zh&4dwZw&g&6nI3S!76DSHE?(8XL@t6X!Q`Yek5~_FMYf-`n;_g_heB*FXCdg=v~Z6 z9IL5A7u_tEq#5RZVBvWq1Lf^xZv24Dkk?Q`eE&mY(-dj>=$mcAX;x$+sX;VxC|$>w zW45LjA6}5Fb#4jZ-8x2fN#0k3Lk)GPb*fq?v?^HM)7B$@nO7ETD;x^Mk0n|P(Cl|% zVB9pOrn(>UWbUb?)1s6K%HRT`;rwtv^A3V>LwOv-+Cm0}K6~FF z96URfkw7m^UYO}anwB=w`XItt+8tF*^|$UksdhClj}tx5WHg8;Ird?~CoEAYGxr-{KlO$Di?Z=G^-_UqCC z>07ek9eB{`rgASUQzg&hOA*{2Z`Giv{OkK_V}kZat9MF-s8l9XvToxr2r2DFF8dvQ z-yM84^UgzYhAU;@q*(YN^8E2jb4tCuEWXEcPrC%H_G_N7rK5g+@a_Ba!?W98&dnWr zJS^cji zKhaz%cHdnC^PgYgTD+LEyBkS{Rs9N1OU-?Gr^m@<%ZyebDju%XKV69#PT|UhHSJ+x znD#gOqjnpIo=Y3h(wi@NxiI}Qfs#}*+~vBS{NKcl4oyRqag4iyOC3#8O?NM6U@68L za(-c_o+$=FDO#>03Xub4-zJ=h-*|YpN374{qe+RCcV3>?7T-Q%z6_7IM(~jAR*?Jq z#M`Wxu~+RjXaCwROLmbhH>F?P^q&LGCg9uAt{dt^e~dK0W(|CEmb}lg zm0vgmrOm4;_nm<+|E1SMc+<<2Zi>t|g%?)oKIhwE_{$*eg7d0Xq>DnFAB~p3OUc>!6DwKSVd8d1zCmjS($|kaSy=IS)N;^v z{DO>#0E<^gRAq9FKcnHYv%ZD!xO?O>22YANZHar8E`E*RobzEz_Rk}GOp$%Ehx>hr zQ_zxWWpAAH2!wH!7{9;){2X@i6amkI!)i_U?0#5*D_a)06vEv}T279Q#WgG{iF&~0 zao@I@yo_i53%J-QE5He?Ashmd6@o>aEOQ?E)-DmY)W=k1>T?YWG|2w(-<=fUS(web zP>}^NhCpC+)sj~o*>Vp=roMx0B;dStEPkvyc#bb6AQpK^0bYn~w$a8kEddE!U30fg zs=unoe47~Si~av|?0*H)x&8Vngw4b&CUhaaVuc0$lnEOhe}@HA2=j=_hz5vIu&7+z z(Tzqo^N0!1EX6uqjLX}Klt)9HQj9?AR6Q9O`PlO+TNn`#szVOI=vSe`J~al~BJwjXbyE-cL<0!`L-PUPx$ z{^`FUaJC^K&|Zte?Eo-5Z<-MUVmI9qZ{em>Vqxf>wg5_$maP^9)N_5;BsVW99oap> z&#>dV{y$BDciBKE1qdFolhrvnqR2lEC~?)wHV+_!A_7e%ieUabuFbxO| zJLSgRVsIV>{yz7-YXb<}x;{xHbexpLJHWZGKUQTzeh%<~Y#q!&4oI zAoRDrFhi3u@382uCV47(=7&}+3xYyYxZpM7=~~lxPZo>hf6#P8AV5n+*L&iYjz~CMW49nhp--Ri4}|9_l8sCu+QFw%mt8f zyh9x>b@;Gjc5`Q7xy;>}U%+zy)bT%M!j+EEgBX&XFy`owx-p)%V@1mR7}PiF&Z2 zjaYG6u~}NFU0k&Ozz1N*f>mz~rpD*ZHqZpDfr|Q9q78#EgnB5r+|XaWO#jYcp^Co- zXlix`|5@9DrP`pcO;BeFh+I~QkczAnzM!8;rBwcua7qq(1_$X$(Bvm)qhbRvlJGN8 zyaaFdh#GDqg7%oJSO&~~X1Do#lxIz>lHEM~+G3+#=>uho*M_i^Z}oL79X4I zPG`x>cnzz*3cd3YkDKS+(4B{$q`mJj2cHRK;wQTN>xN+C4dn#knFO9)^t`X_W@7VI z@9lk2IB<1&`nEaLkm9zeo-Sm8x&JSO`Y~E>zj=t_NFK(ba3jsrxWecRpIQ<1%)r8b-6+{-`=KP$3%FHxp8r$#cVSdjEx6+g)Sv%9L{Q-a)r8^F*9X?X=*3HxdVOoE}>yG=%9Jc*K5#?v!O2tT83c6LYaXe#2hj# zYp4Y4;*J7=g(P|0)phK|DE^;-k#1s=j`l|Y0=N>FaER!LXovPhYM|S0^GLx_54`NEbo%!S2 zP*()Y@&o3Evn~sRs&ZSdFvl_q*e>Km(<5e@mFldEdbNH_NzDxvB8B|yW|AaMyY0h# z!z+C{uhET8xJyAW9q-WeY~0;SO20e{|MDbue?)|}ri5UJfQ>3~K=ib;J%J!UccIw=jkMMwt+zc2edVZBfaUuxROH@xYtC_NY;rBZu?ewrf0O z?wSwt)wktT-kZ&lrfVOMH+?b3H=TKM&@hinq1m0kuTM}SAPeeAA{ko03d#_se?SnY zv!eG=&d)P71m+-TFn~D(-23@e3o3W!v&e5jrx>#uqV_+JOg}%?C5x;+Ja4@Zy|blr zlTaehNV&tvzv7CLqv?1r2y7-9QQyCUUyMFo*Kj`E0cJd^dPf7B?qyYFTV^iuv~Qb#_+6Gu){{OUULE~g+4O-^9fJ{;pg(ophX=@+{Jle?US6iCJ?Htm5$JZ4 z^W!!H)qFJU(CD_Av#eG1{ekka>GRy!3I?S;EadCbYLhH9nhl6IU&sR^jYJ?vY$Jl$ zCyEJzKbL5oq=SjscR>t#?lnIk7~EX^zHIB96ca{DWOmh3uOv5A&Wkr4MSzX8ef_)F zjnf?&q_NaMJL%)vli~BP@0T0>tGiv+v{tBS(Q-Q(_ewMIq|Z)Y?~X*(+V3cS*ws_j z4m&~byZ%?MA$!u1TM;`KtMis;+zFw(g}RQJfnK?|Q~$yRMAzH|z*P=44) zz2IF`&qF)fRl2nw8Wl{SB;);LYq`dO0$#hj&_ebDkGTGHH|q)VGT_vzrv;(~#JxvU zu{~(QhjBXiJqPEzKL;;zy>R#~w>oEJ{?@hU61c2liaPSmS~N5Y4nj88T))r1bV!_r z&G?*#aDuT5X=(9@P{^qrhJd%1?ee_i&CE)`W6aG~ebf1*C^n)J6SPj3bv<=5caoFz z@K@#CM&o)v-^yq1+g1H~EAZv5N);O3=G=2QI~qi+ad+$`c`()Hdnt4?wAXV~%%o*_ z`%fo+BfU7cQ%6JPB8hDMfSpOR;yY*%XP_j|GC0Gs?VfzdE`nWGL*|MwCrFxLJvZR? zeOx#vKRZ1%>=0UY-O-HdI)wU91I|c%!(H6G98^Q>69EA(RB>$Aj+APYT8TIeuH6Aa4W6hsAOSr4)l(=08 zzG3y38fEf-HzV%vpQ=DCvp)c->3y)+Uh}UDsr(sBTK&0b!Hmp?7uOw_K)e_bMz}MT zBVx0)$am+!zn=Ov_h$5;P6g;Ew?DGBZ=%8uf5F{PILTahU$-&v$%02s^#2014-3Ux zG8Ra-@F1+;?!3x07s3$1355Dl<4Twcl*=SgJ00gbmIyT(X!5Fb)4IDXE;j2l1RZZb zd_S0q{kY>c=Y936^;7QpZLZAc#@kz|^WS^HOco)xExs57=`Rzv_)YAO&&!qCKgF+{ z(ds_B8mrf+$Sz?kgWpY3dPsi!3n$OedBPozO}>hX z>3&nG@Ooxdmex9jQFyZe*<_iFw;vQFT*K9P=%W8-)D?x$z>*|^D8(5wEbRfKT4 zAz@_DvVY`2j(Fq00>bu7aXjQ_U&FSaM1P2C-&o1*D#pIYBx)w+rB-EH)*4<8-2Png z1AWu_g_{J;6yXcE6EjfaC333dbik_bZ;wDJ$aJf+NvA>nc}3x*0f;1K#d}n zh0oml+f$IR-fmwizTL}0Po$Su*|cJWK1jOql#`s0Baerhd)$UKxuT3q??BQkhS1t% zapIx(9|{e6dO6e6@Dl`2e7H)EO_(|3?2jyJ1Y47>)Na&&Ui z3_J8yzMRk`2>BJ|Y<%ibxqG-V9u*^C7A-!I}e`!!@#u7dI-H08)yHX3nXR_AidA; zdX9QHd~(7S|8Q6KIjUBiZP7SO74BbhkI!uaHNo`m9qk)Lk)JtLS|gj5sa`~75Z2{< zDm9qC;v@Qp^GT;3wtJxcB;b6mF@(9|1F^!6dsAYe=iuGNp*n3x`#riS>vM@~+|WAe zsJOk}OA^Ya!=Fc97b%$h@7}Y?&cr`HA?m`nD#dh$kLyGmLqG#%f$yX_%B7G2%AAF*;)xS})$1Xh)Q|QqliKPbo z&~DES)qPz?O_>Oggk#|Z0eTS)xNZ2|B%3w7srVx#xF%ELvqZs&?9VXOCAfcml_ayX zV7aD0AO^=yw z)zTr!dkNtB|2W+?7;TD~m~ge(DsQ1$Me$o_y*@J|pn_KhMj!vFxS89(-IzOXKl+Z6 zjclv++3lnozy3W@EFofjc^Ye2dk;yJtA<~8XYq>#neF5tf2BS4`;a7zuTXBFN0KM? z6=SnKkM#Ne9v8^shK+Vq0>W?BnB-*w9lf2!MIJqOZ_k2-JOM8X00nakbtq?TW-{uL zWEc6YzR*a2yNPF{=K5HBqb|9uqPG1cyk=uKHPp*w4u8pq5ir%5GJQs622xbFsdFagCDFc{p_wD`~1t0gMa)VZG`yb3*TuMDeYTVrv z`2L$ZJD4iDdLK4Qo$LQ-R8rCYm?J0nuNU5eMvnj6P%!v$xCmh5b892#C=Tcb8wRUa z>S8P}z-`usIS;nLhPT%`kekpVtNH^WEp z$`+W+M~{VeLS(Uf3YjLJC7Av4I|;JCkqHPgiP!)ZH2gA@&x*7B@P`pXz$pVXoiBVF zcT3%HHyNFoHI7!NaUWkrLDURbBP$r7z^6J)0Ri1R34Fi& zsWdvD6bm%sI}AqHBz1U=|Uwr9LnI!B<9EdA1_^Z z!8O_CV^Rf0T4@K56(Z2eJM1C*_h-FTfzj>IA|oFPrnecMVRrbh%b1WxvlmB~zbO77 zZ_R~VJyHUCA4&V)Iqdh3F2%BXw9sr|DtkNvH_obVNHF>DpMCf!Tu!HVyXFDdkOG{? z>Rs+hNi_4r0tvAi!+EXkqz9JxZ8>5U>J94>ZARDMM;_Gau0~c7$H(}r)nsVbB|l|- zOqeJ9SXP`yzO_VaN1yPS({ovghsI_6&W+yz;3p9!Ua!NW}bIi=(^Or-G zh&RD_E7N*~p9bXqvSuqQ+DU~uz9>uBir9*YV2&$9-VBF|6S@$uI1i;0wo zrisjHKdU#X|4<%N9vk+L>9&`WbBY!7Ho*Eu(%n4lzDRtY^7f~apV2$8B+MKH<(b{~ zkE4#4%6#_&F!No#9AlfaZ^1?2yAnYWsOlLNT5 zu$2l5K`BM0^v>0-a{a0m2_H-;kw3p^qRZuidgCoYpXk8BA(P#`WhW2@2(MUNV19S- z(M#ggn9gGMjzyh9KL(9}lksf?qL$w7c&Go& zqN4dEKEZbh+fU0!ZT8Rst9C-i6|%{ve)|o4ZPe5qXLQFqjD5uCd*>((=GT}wS%#*K z7q^Qm!Ak5k$7SyZYrh+XQ1oAcLqgv?GjD8D%NMht5m0-!T*XHaJ}nrClg7;;&2pwD z=UUQ}TA0O))Z##->;XU&hyC{xAaZ!g#Z0^)!?NS;$52 zO%ENLXhw2X*bWPr24+oMi(YbO64$@dAJrrnX872h}blJ zyjw$>%Z)#izLn^=^l_BA8+NAdx4f6=P?S8W+?&_**$oU#Sxl*rZinziz+x#j0t=rq zHJ0LalPJX|qp1^Xb0~u)QgZhIUgG4JmwsNnkgS108%#Ci-D~%K0Qp19=+Ny&Pgx;Y zsW7CSs_~p{BT33bx1E02dUe6?y=e=6iHia2O*3sInlT2{;ry`NK;xSVTx#~0!zot3 z;0ji|jnHrB77HBAwq|lOFmx9I4R2h|m77qdNpy+Xja{dFfcyo@_J=cV$P6+Hos5 z@z4C(XF8w+B5hHx{YF_{7`)CRfZr7Wuiafh%)RD1P%NiXZlL$S(#?QyH~+7E*}E@( zt{3pe2Tt+j4As*~kfo7m{L0isN_^m5DVKwU*+h24H4uF{LLT+`H{`4oo$$%5On|uG zFTw4Ng8fUpjFnZUVW;D9(?o+#^>Ri`vw&*R|1ocg1zA#lwttQqfcr4?^-GZb!Of*# z_9oA?%TC(dZN&rv*9jrVT#@LOo@>nRPUt^$o=M{D zWS$|HGUdb3$DHh-Vy58pD_?auP&NOE4n8=qI3n&oL@bhS%jX{RS=_;U9=a1X5g|uv zmuR(iBew97Jfjo%gFHdN`{oqB!S>*fN+{&PDt;4DJ4uA#3ek9W-qJHaY0#(!{XGY! z+3Aq$Uuj=}U2!WphiD~4C3oawq#b@EPj@3Z$U<2?1me)5uTL0@ zwjT&O!}A@udI%H)rvFvHb|rBnjUDjCz(*opoU`$Z8md1-38mt$;jTw?nu_wH1RQk1 z*veL`Vt+Vg8YKe_NR<9*IJ)nRY~<#0N_mGZ@bTq5SUyDWcQ2(5Drlnkrm5Ap-doG% zH{lR`!4B8H1*iuz->`?m85*76q*tykHS3?3!(0P+Bv@t%q>vh_%FIQ_b}Ei0?B5`! zS%kIdF^&Z?WU4W(;9Z8$(udBM(A4u_sHR0S1y_o_&{{%{tUd8 zo41&}U-s-#)wXyyPWQcVDs{1(TzkeD;j~U6*(geQZOo2<8$~E6p0Pl~pIxzHg>a<^ z)SYRP@EiQ8A7MYGQJAp6HG2&=&;G$zUBJ9|hw|9iSh*8g3YV@MZM5=qAoKSTu`!HG z9q&rFF>R9mOlZ!qGA|33`tAz-M8TOt?&`4| zwA)lsjgpBnFiP%uBs#|1y9EigoH5}%v7r-Izam~}{IR1_CCeJbss{AV!qav?%DLY> z(_{^*(0x5WmrTi;%fJ^Svg8_u$ZdP|<9Ch~@E17q?akT+)i7hNmyrZr012?5dIAsqh(W<5#w94BRAyR5N*Bt zPThxJlrJGy`~u=1;!yT@)zaXzoJ)xOHIb_nRZ~o2i`H1brn*F+O)tOa9#c7dml;@M8Fav~o%qgF zWKP&v-8ofvTd;YS`Bga07wk*wM#-~%=o#?dI1#l7&khj5)+>2HZddkShMPqPz9QF% z+-yF4KE3qmh;J^+hW&JP-%mozXoOm58j=-QGWp{qqh-=F1+ky65kixDiY(BZ|$PIp=?l{_~-fv!MCc#!Ld{nv{o%~ek6k3XS z)Og#KeV)X8Cp@I|;IcarTCLyR`AFT!>LXh6#p*4X_t9o1iupf-^PE>wcsRp5bUhx*87n?6l(DNx_ z+%INVO(mL1Rl6mUrl~sz+gLBJ*BNL6+s8^JSEkjN zsND~|w7}C6qomH7R~?d+qTSO*72_vvN}Criz6=TiE@rOm{aRPuoNAqSK~4va=L8^^ zl0@m2>8CLXN7s5f#tUpOJj8x&q+y8TPYA#AW`vF=?Ue31sMhOC z-QeK%vSCEFtmn{bQwq4RMnN-pP%h&9J_klH!>L`K-%y>y9hk8Uf&a|tIX2L$^F!D! z_h#)~J$B4%B*@mMMX#;IZr@T>(1i2a2q*b2cZ6K}a>ltVVeW4$y1xR5_wq;Hn>z{0mx zHCEbntiV$B7{K1IwkOSXwNTLMab%{%@3mp?>WdBj7qo|$)?vdZ(rzQu(2DtLTs^#0 zOpx z1a^VsZuK}jh+=YXI2v>83?qf-PI8B#`6RFASU?8ou0w>`unU+Ve~NS?lwWeQ2J==0U)^t@S22=V;eX?xvfsA-G>*V%-U5d`{lQrhv>-8 zYt>+Mkp(rVc;|}~r=k13rPW4CZ<8EKI6W@#S&7*#Zq2?TbRUXZV`B%6@&yQ2Wm#qd z%b%)6xWh#HYj6r#KWF$Fey`h&K`0u(F}rhtXgC{245%tu7x-NyG4vn@qn*I@fP}-r}H&r4S+aEJiWov7Zm$eRG{*#YIItqAKVcagQYb-3c7* z7a$R~$4mu-u=}c290 zex?b(Cxlcjvt`WR_sQR_nooO7a=s?H3&_Cz#g5pO>)qn&zhhikt!NH=vI_ahA7p|p zg)3^Yj${sF)AjeuW7X!?D!PgTO!iGf9^NfH>ArLP*)15PWxC;GWfx1_#>AX~%@nGU z9NSc~5&B>YW$1eQ;5y%b*uy+Jy0VE}(4|;&qkKYg#_P(3LPco`o25@vpQ9WZkZooZ zxG%aKyK*_DG}a-9GSUg})=)%0E}QrmHoje_W+lY8!>O+pyJ5q8cMl~|&D>YW`(nZ> zvITbvckr*>?@l6W+Cj6z@qsAPz5bTvD-i~)a;Vw6?7|=sk=$FP>e%D&tI~1UfGxH>jmpUO2 z#-7RibgSBN6#s7XrjyQ*#qp$+S>)=S;dOO<2+hjXZKLOPuU72l?haNS#H3CC->HF1 z_+nuC>%5y-k6^}-gH(&2x!z}7T&bly_*NkHR9jrZf;rl*ELC=@3MfPS$!thy z?;p{D)ufIiFUhNk$)@9<(OSCgsso%{n2Z4nOzC*@(nr20zGb*8xmVYF8%T=_RtD)B zf|rRJr3o1e+F<+c0H%QYtR9H2{u54+h6Bs_KTI%v$i7l;@3y?CRPSK#>u z`VCAi8^}L?Je^ph-Nqz+I!LyzVsZ24(WAz0>ar>5$ZdqR>=Xgo*l3$RK0GMorhImz zH00E-6??Ncg>4-&%Rk9@{QM>b$3kG7H;NBJvx9;{&m>lUV$eB09eO+3b3Vr3_azT6 z(b44XzbuczvUlgl_oPq$#II`H9jf^L9x?bf1E@9&0`iGgHyz{Bc+Q)~i3eo*1>f9h z@dv~Y=J{?!+K=lsHn>ABX?16tzYgJQajGoT2)(5L`Y$G*S36oG_@Z$?CF(BIxZ=gu zBER=I!|i2=%(pM@PD+Y7Jb|He{{&^wk^Ky+fzF>d8 zj7@OQD5agw+ES45E=K&Wx0<4@SWr2WPX#e-TBU3u50R3yL;<=Igksi6QFHhmi(sni z-?oXidZWFo>zL|5L)4uurG4c*jzI%ey^WTy!OK^$KO%s)JkK8V@wTTlVVVCKx}I>P zAwOtOIXOOpViEia*2t)M)>r$mgEb1Dd}*<;f&0Mb@LFbyb@V~lwRxR|NWqO|hgdFd zt_4X;3mPo-f%hV7pqkS@0ud8`|HvIdUE$F`*5`7J=>6d(?c+Df2GSVuS&upo5Gso) z@LRmcrTFIUF1_6BOP8-;a3ocH{EoR;0pHU{aPC0!4~zIsBoR8QlpiRwYP0TTuEL$% zkpQ+PqN9N)luwp_Hr?T(?9H~z4&Q$%h(km*YU;1eehklKcS?lN!_gRY^aaY%3$vLW z*SF0;nk zaV^n{@|yDDr%oxUFzjU@orD8hUC70;ceAaz9TRK-~MY` z>4TDmkc~>7kuzNm_B=!?xx>kfJ>X;ldtwz|C7Iz+YYpQn8qi)cA3g3y)+%&!h=k6_ zy=n<4^J9P;190-6yLD!X(}NmeM;xL??=Q5gmO2|`53aYp!q?UBxeI8j8~NQf=>K;O zih>~>GWY?#Ts_U*FBu0KOe^%(-8#dTd(kKQ-=t!tg@#E-(R2iKTf_FH}Z=E zcrfjFG~G1&#HT|>$Z+N&l`?-~aT zY*QD|Ex9hX)ROG(@DTpPnwKRd@cmUIxFY|(!hYvrb15@;1fOGf+hLYHdwJyP@%7c* zLhOqFYW)5#UmF?b_j{T%nJcxxb?BbKhXzOw;ibgHTRi%)iJ6!7u(c9JT)rJlT4@g??RSU}Y_~{HbLb#-4MvCV2jfU8bxv z{+>WWY!`Cd>|N??ayRp-<1tJDMlr;dy2jUWQ7m?H%<3$trDYaIg}ri_Hp!rvk5Mn8 z$sYc+EOq6xx^e&w+>P!iSZzU>6pc61rO*>Q+w!KoRT5&!y7KGEtQZKnV;)`WVQwK1 zK6&XWs>_Az;dsa;Bub&K->g!oj%R+o=x`8O8T=GEWSYTtZGWTd@~8yfF$uO$X#X!O7WuJA8zHJsf=Z!i8q8$iAhnO&1(> zVv0H1-pad*7RxnoZTi_`UK2NO#zV+{KL_3%oFN^QN9^5@gQDGleGrTb9qP6|mYLJZbt!+wMKhcf+z;7V-`q z^)ah%xC3GjC{5a!)&!0hT8a5roTx4jmfHlxyox%QT-&tYUURVM=BwT;wG}s!Au{Kp z^;X@eE@_qmj#f$|bYh_>vJD7B#rGbWb?h~lMTM-AtMaV2K9jW#kBO|6cWat2H!dQb zh3bONh@Ba#3|XHzAxHb)z>&mcDF>a?746SvTOTF8c5+>JZ|rQMvuM@XXVWO!@`dP| zb5HU`+z`iY*qPV21-w6-9F(va=nSP@U9;V~qSxy9+-3^KDs!naY}m1&Cg|vEi!uIo zHUwJU8;o98G&CJFBKPiIM?W~F#E3UG@WAM^S(L}U5p8R1y36#7t~r|l7PW7f-xSMz z^~B4eSR8M&BSQgwAEUhjKlPG$yC7%9y>4{c#EN2|HYaT(N$D+5Ji~XQw2iVhoX;Fz zZoTV*B$Uq5>}WFSHdkw`(}D1Dj*q5yoVCF0FRb(`*Lxodb^PEF?>^g+OD_+ivY<(6 zJ41NBRvT!qY|Ad2zcN7A%)Xm@H8El5GxPSn-TM6-2zdK<#t$UqCuO1;+@B-(cSIP! z-zWm#=C7`D=>+KufI?{YaiNlp;?($J-<7!^&(?h4A?~x7+X#;=Ah$tthcS|=#y(Dpaf99?CGG$fL=Yd*r|CR9k zEzdx&?RFRTrgFWKlV$|VjiJ4>GS(>R49+hKHhwOpw$Gfw;WU@2V(x>aDxW zg-5$9m-@a}EQOi48u*2;x-#&swxBQCiHAkjD|mi!y+e;S-n_#z=|;yzv^0=Dt0k0I ztC4m{e309*=3^Ua6EFp4*`zPDMs{yAOj7Y+f}I66)!S6S-T>TW9*8(iq8gfCQa}e< z8DIo#k^D0P23Irv*R)tJJ7JL|j2O@#n0o1VQpBo^= z%2x0Sp#L5a0`kBp+7RIDf6i=sGOfJF)B!%gCx9g=jto3rOF?fBEXZ(whWEG(NEUs7 zUoWW8aTaUE4}5>V-Fz+|8}z_#=^&4`twJ@}p$k%s z&*Un3s3p`{AmPBuuVd&VYDR%JnC_0&m%cw$fd#|lZ2Z>v+`a^s2Z&O80Td`v5Y?dk@Aen`euFRAe@pvXI~48wf}1u}L?b5r4TkK@Br+?=p9kO(*;% zclpVOnynsKZ|W~#y0&E02q(!bvG zmbyCxe3ng&)^EhL0p)*y#1MK}*3@n)e3%t%1ew||k^lG4f3ng^9*e(0Wr^@<1UU(=u%-^;4u%t+^iNyjslaL7cq6PzZ7u|Toj{d%=l zwa?LO_s|KlA6C-pq9~SfxZu7{6=9jd{OcuOBm1E$sbfK7uS@i}oe=zROFAYzRbH9e z5i{NrahnHu-D(^;a>?7k^`Rcibp`o-=_G{pcO-2f{hnztc0gh_)AdQ2TU9<;wUw4}k9@T34?+)~g|@bAG`I#Vc2L%7z-z(keVKg?U7qUSi%1Rbs0;ai zclux3Tyk*}6}4`*m(f;&^> z+2vAU{T2){7R=BdEFcs;3l0_54zvUZXP9JY8KNug%Bs74iaq?adxQ9cT=INlb#Y(q z<8H&{1Uq#nutCnMX%=UeKUVE0k zw_l>dGD|nhlY&9;L-wNKct<|BQ4p;?Gv2vrY|XW#PXx>|7826_YYm&6S}sjr@3aPd zI~)9^kvia<5O1a^59`qLnjnxfsJOMqe9(=n)rTmMFgTjmSy5za2+QQ(!Ct7xLu>WyBgshm49)Ec<@=W77DnGx; zv~${4+d`D-?^diXK{;vZ3@I-O@>nx$x}uv2h>Dop z>*9KYCZVew^`qtcJp4{>kok5U5zojAk<#%ss6fku8?)iPsn1>JxkkxjiV9`b3%D~rcLi|d_N8J(+HziZK2?|R2w zov<|2xCEnwyjNVoO`1v5Nb+?0giYg0=)auV4q93I+QJ!`&QZ|r5aKd%^pb5gV|4~? z(Y4O%hLP2E#`Tj#BO6kpMh&P0^1QcoFWpDo8L?rvS!CB3_2WAO7ecPWQ%-(;hw%57y{wa|0movUOr*JiTNWUY!61{UFM*>~M5Z7(L#^-B! zZ!0@j^0rVB!CTfPF+K_2LOtGd9*>u7j&Yh-k0=$w!%-NoA6OlAK8D2!-|){nSUL~83>Qy=GT6ldhm^${JdIG>Gg<%{{As! zIl1v+4On&ny5R-t`>lIuHy_FX1p#dk9@rL0dv1nQcq5 zpf;Zhc~;ENs9MjEd!tk9nLTSA z9g(MBFoCx^;*zc(6?<_%?*lXjXKkz{o*4G0IMz4CuTi`%J4bV~7sEd~evll#=r7#~ zfEi$ci%D2}xy>Wp@XN|%JQetb_R}gW1_L>rYc~rHjqi{1x$i67s4}RnJL@b-n>KuE z>KI}z|H~@*5E!Ie;8s~W7@X)&;#6ub_he3!+FW%a^H6B}wy;cwmr6QcG{2HB1M6## zJn5%F1NmCnN}EwM#Zqe7(Vw`Hg$yUk^^CE$QGso%!#2$J8;Z(o13RbV3Ep##=GY!+ zRakA93?;2_%YpHUlxcIz7w!RTRjH;}ru^3NcSkC$Lbnr4^-%|R^^Wf3lIstBO*#kVf2B30zYM}o||7v8`7OQ+ki|ZZ99(w(;Rl@T)r)) z;wM-ozZXfj{UU#Ks=gB!-;4IbnJi)7)yL<}-IZNmoei?Em}TPZH`G-&h0x2f>r3sc zIIE}`ZmVsr^^RDZxfXAdNyqLtog+!OUR)g}SqRa3))Kaf{dePUx}s1h{vg*Fp}qsg zt&akl61x;hyHP=He;o#%Fu*Om()%$9o2`e36@7ZgjpY1oH=m>@3@>z|e|v|0zxRm5 zRlLYzG>il?a+}wG!4Ksg37+3g3RmNR7OMPF535RzSisu2&lJs(#BLPt3y@}(r5&q2 z#k;T!GFfV19U`!MmUuc1qqrxQ ztaSu#=q1c=e=<)U*~&aTDtmLm`rTI2Zgh;#f8yBV%;ef~ms4-|1U_%jWr%&|ua#l2EDUdJkBZOa(8@%vn3SmUkV_rvON!Z*#*A7{_MffzWXbuvYhJ?c-nZtn zrzTTx93;v9g*g!1hF)Fno}R+R#3!eQdTYh+O*K#5==NqNg+e57N}N|BI_V|_vD3n^ zm8yry#2V2aK;KnA&@DP^?u8#d!e;mRyo^U4>=my?;Esu6N5(H4#mpFnnIMRYq=peN zbMO{<_o+z`&jSq81=Ag~9w%nfbMf5}rZ;;k^bj)OBu42fhL|4#rb>}e<*;!FP5oLZB#cJmKDt&yL zXf|cmrO3;tU4;KK7N$k()%eSRBlD&rx#xtTdIuqmNcvpj>plv=aR<>WbV7Yzw+?$& z47ev;wb~wjr5A*szXu7JQD@&=Q`GIn#dvMh0ekP1-;23Zu&cThHz;F_Ta^t;4q>426E<}RG-ZGL^34D0M1cf7H*4ZeGiD;5$u^Gg7<;C0 z`^D(hCZWEn^A&#sG4-;%#5O`{6vBAx`h1<>dsc(lIO%nK?0mpK)UaEuomWRU!~p! z7%(tq;On!KFZloZf68R~@*{Ov1DH|l6)M6C1M?vl1M`O2F2JQrU|+8-0bYPTEgpY% z_i6s}7m&j=<)nBOBMin$PIg`6=a>uw(&i{|qTIpVyH(#F%ZH2St%H~Y0z~34e#kA==%P&2z|Qx z{!aY<`FFde$N_#>XhuCv=eBF+-zgi<%3Jn3=Xpo?n}`-$Le14W(h|U`@Xc|qr;!fz z5~OIf&9&^AMxJG@((|7Uv%vP-CEK83XcfAl>sI_bkhM=YC(Ii{`}PAuqDkeN{mSo^ zU)S&e8%qRi6<9%(1;np10WG<_0E`T@Mw_&}Z*RSr ziHohq0A-(szKFVGVkcz#|W=tB&O?KH9+SQigo&EoHD zcy1j$=ROAg_h}*y>Idep?tSdjRaXJGWqhMTx)fIE*adk30hmt^t%_M>AMdB7oS`!4+HW7LH08S9!qcem?@lSPR)PC% z2BKle+xREUqxiA*?|eVzMtn*e?Ac{G4Woz3iT4yn`dbfd$ybM$0dT8~k%_S7EaP}X zv)n@;a~Ha7ImK_<%Ipe`Y+R&{a+cKFzmRP>o9fmQ)h4hqjnX>CX~Z^|6YU#?>=%N% z{>xLTK*9I)7Lv9zu-1?LHc~MXDH`GPmD-{x)c2U8AbC16+H3PRbK*BHuJ7EnFWcqn zR_6nwOb83X@shG5Psbu>f?h`h6-GLBsC4MPTs6MLy-{}3*3LARYKD<*;ArHQl%Qp(gCKx}luv0`g&Y2leU1!eI2t z^9aUg+hUfY@V&!j&WD9IM`{zohcMGFrV{2a?^l;nz9bJj7@_iYR?8~$tD9Vibe^M~ z<2th#nQaO0JK@yOPG)?x2xdjNuBcbIu%8=%+nq_$>dJdg{`yJkOWt3WM;wK662B|z z)&J&QDSN25aHsbz?L)G*XffbVV^s36bMf*v)!IbYe~C`fqz_t9+h=^w%@Z-w$p@U; zudQq+b`GuOz8rof8yK>|OmV+2aw4p=P3ybGDd7^Dsc>OE=R`D|QdZhfu>O43mdjb< zovO>v;XRZirr&(RolPyK+F1YMgTJm@p6`9IpZJX5uxGu|!w62YHtQ&gAfANmAkSBW z+l^QsM;%?Y91`|Cjhrd6pzbhCGdNW-d?80_FgQ%;8l#SRKgenR1f9<}!*rD9i^f@@uf#6F$l#UwR zH$i1qCEVl2ch316XxnATsQa<@q<72XmBu@$%|~8}k4lxVQp6g4^t>97^(+1rVi%UA z$W_#lps;#`8!5K!9lFu9-2B3`34aL&em3B!aAfy~j&;kB`O0VfD^;WG%d4v$1)1&r zC6cOd-aq%}&qs26`y(~OG|H0c5*c=DCS-1a()h3ULZB`>6o zx{}P8yAy-uw_U8}m<2AsKk;cQt?#0mVo^OVm2w^O4Gt{_Zv&H?yeK|tqP|YHlYwPB zJS-8f&K6wF*3=AxiBCzzhe-zjyHDrvK_2O=&U7NOGU9!EIkbOFF{r&c9YLtx1y9PqUZdHOTYP!;)X(Jh_~yUcPv)@y zgd4YzDWg_TZ5&Ppt+J!6(S2J%8~Ku|aLs(qUQ>&kn+vxQ0@5ubf#)AUL-c-(Yxxbf z_Gt=+75ZkP98!n@Gv)!|_*aRfFSf1Q@hK5ahdgdhACZ9VVI{U`+&0aFuPiX~=e>&U zN2o=Y6QQvX-9TBX#sumHyVeL3kzM0gT~XMLLdXd0`|os2r*;nXK7c=~_Hl)Iu^!A7 z=uffb?zH@d861zYjs2DSVQAM1$kBD35zmft>Xzb%sWrAJX}hz6Zk9?_(l&&U%t(6h zC)5?R-hUbW?ooP4$9VYbu(VfhY9zF_7H0D$v4p8S1gT<+L2II<%4?&Kr@{@S(VLT> zy{NAqGUZO!kG%*0=&AkV%;DU{h)HsbX?2~%oQSIyu1My8%7q56c^y}*7Mae9?Nd<^bP_vv)Yn8&PutE|Fu}wFY~$MySDNtwH9^3;5bP<0 zR2$FV9|g{NU9HQ&yNy_A#px>EsgGae=)djq))8-vmNZe753X~tP4X4Fsq#i3PUkQN$#q8ZF5+((^NFL{5x-?) zCp~(Yw{2RGF>Uhm3i6Ns;iO3|hEZN?Uk*Hw#=&r3_gl`B>s7I^K4ovPC~P3m(BsxY z1Uc93wl^R*6$0Ni%TVFV8;4^{B%^M=I{5u0V55;N=6!4Ya^13e!*Ba$9Ikt*kDDz1 z)TQS3>9T?5&534bsv>+ zwSj`iZlxXrCI?3uIY_%42u(`|@*qUn*JB^{op*=mh{Ormj$5rYpEt@x68i99rCW5_ zgP7`D%CYmOab?-H>7T^0*<82DDGRVVAwMhiktB>$Ic$SVZyRJ%Db@h%h3hbA^VhU< zzRmJp8r#$CbD-*>^Zn~0z+uR{!0v#6D8X1jouRC43~}F9ZS&%+=Yj1vPO@Nb1iw^YJ7|Cdp>-rsJLnl4;b2p>LvJ5!%R&jUZhPR$nxN00U52Jt(;YbpUt z2xjwNnLZe&s_rSWzH$v44q!lu5xb3B8m`dc_!k!pFkPMR0J$)PCyGDB5&O^k{ z=|R_wMEu$#KSUZw3T5(v91L`A=?sGhqfz8eh*;=EMtZZ28mL;vKdF+>q6F@Ui2N*s znk{g89nFjP*omExqkbnO6X2sYnF!d5qCKZE3@4`8qO9T1ZL7i^|47toGO?OSbSoS; zH?h_Y@_K!5GAr;nK=DG?#I2#3z%|ccr^1nTx1?`DQTRLeu(`6_nApT~tzm9A6CWq1 zS`&D&!>clCsSwp^2b#SHQw)BM+-6XerUfg}h=iT4FaE31^2`aQ{YE7otQ_(O#jM5Y zgr1*|xb(Yn)F&MVYN=_j9J8pZ9SM^&sQMP1)!yVOzx}T{?$IANcyI~5lZTcki4~-2 z^xc+$(QNBUc=7k^ksuiA7V1t=eo!ImQp8+d&%j{H>qs{N$|PYRV7Bq$>{vp?`Rj#)&m2mKz(N!nho@`SHp2 z)>>=!7ZYlMlH8~{Klif5dE`~V3}1xw_vUkb{(j{Oy8xG{%@g^GHm98bSGjLF-72u`kEx#raJhsT`rFy3KKyp!pz(~L@gKMR~W{c}96kP89X zZ`N`JvN69*KwAuoSMqmtY>8qTp2ce{4%s7G;eQ5H6)RG@P6lb|s~oPSxD5enUv%;B zDs6yFW@8$c!ZcHs`8PzVYSv=Qz!27+0$@D7zE*^Eig^jXHfluD?kU`7^t;AUWQN@nNQ8~6On+LAK7G7m4~ z%m{;L&N$9Yd85AZ`rU1B)ZI%eJto;SOR4|Pp*2SH@@EZcq5A5V|A?TejU+aw80dn# ztkZ#S1y=5+qm6X5s8U_db1c0{Ow%R`7sj!Uk6ef=l|^T+@o39KVQm zk{5|MO_Kbw`?de+NUNm}pJ?(d=p@xI^_l+he_uxa3lpq(G1-!I>SM}zbMPp;>wWmv zSE3s{Du45OMJw+ydx_I|qOXsa6I@#H*02r~bAimu7SRhp&$FxYT@jw=tcw-kEzA;N zzS^tOkeDh>yqo;P6~td(T>HaJ1I;^hrlY->ocO``oJu?L@2yV*cfv^oXw3H;+H~&g zsS0JfR?n9q71|YiJh$Z13y}&mLYxKdw|*@1QNiSg;8)gu+1=faKf+dxxv=O|0^q&iz5s))K7{8y+h{kh}dLQRX8kus2z7&X29a^nRt#yxPffGguc3X=P{ z19vaK`0qz-nN118(l~X3XJGk6K5D24qFLc`{WADD`*GX%NNfJ^mHiobsm||~r`rqQ zg;}07D#TwZwYrbsvhRk;z=&nj@$~CSx+{{71^G+0j7GwMkrTuO+HrZ|__O2AT8I#U zLmf*FqHmGBw0#$2N+bY}z$$>Q{Tq}`Y^ur{>ks0NL(?je876aHi0Ai5j=m9gkC}I; zAn^yZEj_lC^XcZw?HQZ7vpSTyyA?uR@KyV>)O4d;tyl@Ga*C|&rcMihiv)Rb>1BRo z9sM<}j&o3_?w2*i{wUDAL#rRwYCVfSu;WD#5l@vS@e7?U5J=uw0?cN0)_r&83 zoWJ3F0^O;EJRV|N~)b+K`x4qb%Q zWl2`v|4_SX9|{Qum=FxT~`v!GO6F6akeuXlLr6xOx&WLlh z*}716!+eGPfA+Swqt5_F1=4>Knqpfq9fx?rJQDYu*Uq>%uB}Wu}wyZVDru|tbPK>a`%@@BVqJlhyl}D!h zd7rihFv@m5AiQy={hgf9H*;$2JR5WQ&+cff-vPvSoXdX$I1<&+%B5D0k{IYE+vcpT z6l@%`;npz&js`2~B`_D|4qmsaV`>>O^m zpdwLOEf)=5TyO;FIt^lb4s>Zhq?Q|e~uu@Xw>^grrS3ah{z_3L7 zu?hncD31oyv3)zZHklLk$}bjV2aPu4rJZxh2NCHJgtLTBKFWHs*FefF{K&QXg5&{I0GXHT^rJ(la z%W(D`YH9^w#c^6avp3FVt zvq|skZ-_{*k!rU(3QXiY&%A`W5FK&{RN>879b3-)kee6F{Ym~heOG=zE|CqoRr9+^ zJ33UgGa@b@2Z!A_CnZc)xZ1F!ru&dwP^tM>)gD2lPkx@#lRYPz%z=W9!OO3w_>#tg z+v=#1ogSi(3#kzMuK#S44u{Ma%S721NNlX;e3c^xg`iAR23nZy6}bPv5wJOjd);cx znr|EZzfH`o5|Cp%lR~9nM7eZi^9#5}4|aUq;G-U)N9mGQi(o$D=UU?Xr1xnb>s#_) z5my;h3Htwn#y_r$6;ULeVlZ8sigN4%rS-=hu3!e^h1}q4TtxX?0oiv z278EQ3d<@~GrjUL(>!lexrA22%U_Nn^OI{1OC}2KBJqz)qy(#if_4;xpnZs9>^JQS;-kz9t30uXF?XEt zufe;tjU=AvLR^9$LZ+)roL*=sFANUoGv`l7$=q#CVty^yX5`|yaKDENB%1tn$kmQE zfjLLff2>x8yNrTWfmZ>TKTlHatxYYs}q_mW|VZM(Uy5C3wCJGP+%% zO$I+~kvnaZRKY2Rg&_mQMrk(rTW z#V=W;S-*_fe1#_>7RH~0_-pA+d$3nFJ&IBmx4lFZbh;aEhMzFnU`WnW5uvp8m+akH zsp;RwNans!lY~b3x<(`Q+*84jpsi+~O^87OJ4Ws>&dIivZQz=+PRc-?1F!*G3P37& zleO@XDftaE`12aq`dbICqSfP+w-fwnmE?{YaSmLI(C2s13)}(vWQmOT`L&;D|3vVy z1tIS5yZ7V!M*D$5f2l4)c~mAz*dNF{tP4mq`9roZT5S#28_Qe`g~QADx8_@)4WR?h za{Czte<9;)i&~i$#-LydCIXB@e$%Z+`uu*4h9j z+pep!Tg$1a9QKQCEjpAj<*-B4NwngmFMv-}H+%*(OcqChM=`;G@}NGu_KKr?@7~Ef zHt=24aOFuz;!qv=Ru8;PuB{vR-XA_T3;Un0@zNi!d&VzH{CIm)~4@<8g{|Tx58f zkB68}r(GIvyWD&{i84uUa0cbC*0=&}!*(CmnHKo7eB0$b7F1ZD-CT|ebRTssg3)Z{ z(|n>cMxTx*Mk3F$>kU+y1W1@;4gu(+|KydqGAp4#OQy*^mFMA!pUstpCQewQ5&k+( zSVn;y2txMaSW<`-0Ox2<7Z8A`Kg0>)S)EDx(iZun^ShcD>S*ZlcjvDbw#U{yp4I?A zY*r`qf_cVt^XKM&I3jm}9x7}jK zmu%MRfN}1TE9NaB> zKpXaCcE?ac{N>KYCCAG^lCBb{b8_5(voEl`w=rRu!;8v_IXdMEw~*OVSQhf{tNgrU zsibnb@6i#fiPSIQKd2tU?2=4Y$D%@TY{Cu>)J8A1k(x!Br7{T=Wc*K#0gjS3@q|ul zrB;`Epd|C}iKhsq#SHl*&nwb5AC?~YP(8#_Bi?|x`ak8b7 zMCfzo9AXBCE~guqW69uuHXB=6ESh<(l)y1GOR~ubCT?3@4L0L;xHsVoF;6yF6RlaDs@2AFQ6gC% zUarD444EmwkgOG>Eu3O_271PDPyd$Tl@|W$j)u5pmsuC&C{t{wRKf4a24Dy9S-q-; z8G$k5?_{^0*cYDp#(&NhM`|Z6;tN!RQ4bD4pf&mf#u$dJX!(@-Hrc)(3NIYf)vK8O znijBLt~V)(6vlfH)FG4S#Hk7I4w19j{%`g6&`}K4H4@D!){R6LQsc2;78dcJWY;d# ztwaGf1SG)2cJ$Ah0*d6Qrm_%k3TU zu*?qyLE868L96=p4AV=oGWqQ6h|iB&aJLk>k0Z{qiG&2z-Y>p)dC3mfyAF7pbuOm2 zzssr+21~0jB(y&}urA3jf0MFZQ`}mOV<37MzWF;#e_$U zhm0n3$xhB}!S(OMb)~Ygp00I8!#}%h03tw*VMDY|DsbdVK$>0W9~9|^^Kb$n)tX#@ zrFo=FB#2}#ug;M0kThID!8COj-x5;;ne$8}Ek1s1*Uf(g?g8JI$(pB8`r0w*8<_6I zAewyh$;%bl7hEDt-~+=UObkJIrbL~(^%iva%$JUW&QA$vUg6*-R;0g<%G)Y z=Q*0knI&d&T7K@YKF9%PYWk)0k1D+p9h##3c>s#H<{>PDa-8?M_}%hV(}hO{u#6=U ztsY6szn?l}8C(S^`8;RHv^s$X!)(QoruYj?lY2v^XXMD@`JS5R*7;?RU$`rWZ*Mll z*s7q;Dc{BRff}1nN@;|``JeU(7cCR$y_vi2!ngAV!bCM- zmE&8pHkmlJ2u3aWHhj|+hv7XLqYS$~$?-Jk3b3YN+}5<@g`;leP@6O7jvzpp4_>SH zN9KK7+0DfaWr&c1Olt)g+VW{2RfQ~MvVk(Zo#idos_9*|gWCN6yb12|jo8accbGe$Fm_lCAK;rlSR)?P;cZRecl?sc$xr z(Zyzhplh#7hqGKc;zYvlgg|$r0Qlq2ux`mJPR0eRKzIKgus#L=e+Y;U%)b2BHvp=G zm_UmH5&wCm83UFno`3|>sE=Fmcx|r|#qaLBuREiU02<(=-F&FCD^<^+-d4BPb8WGQ zkYy|wV%1~E6rd15RiHqI)ld1YtqRm)hDQLH*7doYpg_HFD`@q5^VfJU?qNu|o^+!O zw3-_ESPjsGn1HNkx&;U3;Pg-U2jISdU(cr4Hv12T8%`VPXVui=RvpAQ;Q zbQHE4l~z&a@3lNO>Rcwv!#a|?*8Dg@z0x3XXmq4j@moR;+%nTAhV+u^O zfPuA4R@-0Rs4Dxloi!Z-oS_ZsQ6^yVB46&m?ZnWINO1m5FjV2^vu;cnxs39OqC#Ah zf|=tCYje}u@&wD~KidD@gkU6FG|id-P7eHjN#Ttl>p{C&n@;vq2gCk*uO8Xom$(+F zg6nQhR(LtWw_`O*y+&5E8`2r)?hNK;yn>wqz>D($y;E=!bwQCZl|sH?s90v7O*)n{ z;Or$czUwoHnb-JN`Df)-P7#?Tt!(g}>TXGhIEi1uKIO`FZ4jLflcrELP>TwAmRpUovt#Wq zce#(``P6{+TDHC*bqpUbhw<&9+`WBh3sX6J!fC0bvlKh`@^Bb$A8+Qx*D}m0v}L9u zRw)5;SpjOvgoE6cD%6V!+xUZOW`e0U`=&HQ-|)sj~*${M=JxxJW>khr8_$V?uM2-S2kAGtK8?It~ z{oe01Ti3G0YMSvfQTe%l*~|1NnTD)ILmJK@O2sQ-~sT>BCz@Nlvl) zI&YbM6S|Ow*Srcn0=noRqEj%U#=2yVt9((!5jdyl<%6+1Ig6367@?5B1wNMsd9g;s`R6gjvs zA{wv%$r_|NTCQH682v$!?^LPe2X+&>B)A~&osW#kjdbJW&?+x#s zvqwt&ig;;1U9cK7uLmf?TsTjce62}Sw!YiH{UlX716^?{y{_8_jxR;nVkzgk2kgKHgr`&N<&;6t>t*$+j`@A?2Qb45pa@08t z`Mh<{eSQ#iaHP3TD>}Dzrpq zWY?T*Qp>idN~}T_!GBCKKC1O^v`y(7e5|C2l-qI}L2&wz)ru5X3iT%e^EeL7j9NCi z4>vmZYT{x?R1jOMg5szs=#jv3=PxC7H{R>jx!_AtZd^UjKer3%w=gCxyL7QWO?}42 zf$I6{Mw~pWNsK{6xBy5x0TCD7?h$83m^%m<*~p*m%5gqpj?J43wPE@KAv-b?id{EkKfcnd-Z%M~$KxK|?e@>zlx;A7zghuxSMHb4 z4W*NpMOK7fZP(p>r)#UCLACVcSR5Qh?Eo zIf#=(8UR<+Lv4KSAZZ`Y{STXmKm&f`C$mapF0u@~9-J^es{F>9!(>J_-!h;XSN)%e z&ZtpyCj`NVHkZCA^xTmaID$;G=Fb36nFB}Nak0%sn7$=#BWyMn%ZyF> z%tvrwCSasvBx*;$`^Ckjq&?ZttWbtljL6y3pq?N9(LdudH7q^$?n&<)q13PaFh6?K zqu2iUydh-CTudZ_q)|+h3M%=uXBa6Dr~g%?NPxnM##IHOJhgrUD+za==t%X$j(tPQ zr_p$lw}N{wl|x~^*YTN$-0P2Mgi;E35xD4aCPBk_N73n>K1EQ)Or-U@2*rqaHIiID z&CuQvdhWwRbK6}%&M800LPgNNDxniATZMV4)Q@(oHYbc)Rhm@Y&9Iukv4<8C^i<=8 zx?M7oQnD)(SV5}8=N`8Ewmne~!c!x3ldSc^ogdYbuRWRh!1uQE@swg1b;N zf~J5}uiW*29sgDSm!)hp($X6Po}~S+q~1w>?}Nu{#Sr{Y{ZF5=l(W4O+GQntig|K@ z*~yG%)8;?+0<8}=A24Ka$OxSXI|v#ez6R-K=2pX5b@`GS28J)%3rI|5I9}ETRRCaM z#cl3*rL5LmokgZtmt|*-;o?-?+=2 zF(!004GfCj>gSeF?3x~H+Cvrlh!X1u9NtI6mq@c6{+owTaYhmMMIgkNGbSAJyfML) zV=KV`zL$6@oP`zUoGF(1`8HNvdxc}xNTfIH_RaMk+#}9mgUlW(fa^7$b)tXfjvEqs zOPtCdj3SuKv3PpB)|exp+#2#^mgL>$@x~Oc~RZV zIExd7K691{tav?N_ZxHMhTAVunvT_De04e?+h2J%Ji@9{Qxq=xA7{?Pe+>Z)ZmS5f zpU3yZflPx_S!Q=+hJT;_n$bKEdhPp)1vM2hJ>EWvg*3OFzE-b@VtS82jX5eCE?j}m zcoMP;l696TG?H?SwwFlRXg7>_{?e%+!#4{O0-wJ&1YngJ3G?1cx#Ofcy@!o!L`Xo6 zdfVvlywFgIBP&bTMG^pqj#c?sVK11bh}se1=;>}DXWux%s(YtFvpb3;RGymIUn?=o z?O$(LHS-pWa8HJWIJj?9Wy(EhQ<{27JcPA=FDGFq%Sc+9$2|A~fVfq8PHScKuN-7D4_=`Qm^u7QG7FACf>a`FI+w3|y z6?CGB8#M~mGCmtDD>O)#J~hYRMWG8jqVBl95GG0_9W_&FZ$`IpSNR&1**pWUAK3}0 zx;8dU<&M_P6*?tj(35+hfR4Hw1Xrw%$O4{Yii+6Qu+91G{&W#n|7;i&)?8uOYTh1) zvW2=JsC{(K>MD7r_0L%R^*PIfF@*~DMP&)IJ{=Np%rjuIxH05fSB>Zvi+Cbv6Q=vI`vBP50#&;F0BvkHsyd&9LNA_F2REeJ?SO8$lh z1%no(VL-ZJ=x&vk8U%)xP`bNSgrSihnqh!p=o)f={P#ZFr+T1xd3|fG_kEuG?)Q2# z=heZe(_ui)n~@TQa-B~L;<&Otz0Ho}uj45FpL5*=33e562T6tj)odJevd=l%GU5*K zHXdK-T`RReE@M{i15-z=g|CTuB8SfH0|1uJmf&z_<9H1mNQ-e7f;tXEnzRgeWeO|( z=Ohc}f&RYXNzfieo5`crUDoZEm$QvNvhDjv5I&%f?y)6nc0O|tb##n zmVnGnyh|KV8pEtzE`f|y(Ny057OjC#DlZ*6kvRa3=5oKcqk`!}_{!xbi5WP*pU&7R z;dWK9boe^RjfnK-icQZ86BvQA>iJj+*ja#Rx-ZNvba-RD$9rH9Zr;WClWY zMwmblF|N?xWoNqtJNMLwh1MxR2$hOPktmwpvEq%b-|_M9#I@f)6oWP(0UYR`h%Mvt^b+Yw$RL(kgtMgLpwtrAr&AQO-9rwB^!A z=n;m3UyeT|0FHD@`NXbg_tx#$EARZ}4qGLdNVBrA_V#33HP|HxY@a|XkNL^q~IWSqdwpt#E_a~nx{9K|oMQ`5c6w-0wAk#U=z_^V7JB9nP9 z=wD6Ak#gv$=X2BPPGi*1s!Cny{1Z?cWgg3MDi7nuJ@EGLK27*VZ0w30rTnGm0ycPg zyr# z#-GTdr%K^{ZTW=F9V0qeY+bkd_d6LdQaznwV|3DPoEurvsx*M?jtZ^o2dbRgA5Yg8 zbrCldvoLDxEz**(Bu24}P=#|oHD|G0euW?DK+y-QRm-DCJgaTj?cdBb);1}<0*Q!i zxc*9dF(34dLdngIpsZ|g@1phR)=wgDX%8-LlepRR=U7?ntINC02D9lN8QxM+a-9{O z&CLKiw-FTW6H`|=LDWzu{kBL86fwV99LlV1? ztM9;|1fnANGyP85NZKA;K=mi4AgGV5dy_UD)hgbnmr8l$XQzoNAD3~-K0ZF4t@var zcQX3a96ln0GWE%f``l8lG!-V~=>bKO2tBHg`TNbo%Oj_)OcCR2;h_I#Ki9k6JHX}g zhlW=Ek!(J?u&zz9Vy1cvpzG;whytvgssq#=EW~EH8{%nUKw)?I@fvMpAcOU=x#|(Y zLRb$vBu3`r9vfq~WQRpKf0o5h367O`vQtSyur47>*)&;HW z^J8@!-`KhPTtp<wmwn&jC28$_Xu`)>BDc|FE*Z7>CKEL zKa&_VW@v(W3?nz1)s6+x-?QO+N!g0N{27W-N#6Z6Y}^;i2#s#&Px(0TUzzt~&Y|}0 zuL}8;UDRa(VwU+)l&Zw%KL_&6K)!l;?&cidNR>bHC@EpR4F28MkXgsL!Gfa0H_AL?5IUJQyjBI{*i^OBGr8ch?%{s^fgZ_Lx&%w8>>P zK~2CQ_WXX3@21%hhzm3XEWKPLSsEx4(WyXw$Oq?f>=wcc%AvynRN5SX92SUz+rZqQ zl`$@}{h&(VLhd5Kes32SJU?4i&&6Y%$i}z%eZ;`8nX1LkH!Dgb0QVL~*m;IzwlZc> z!4JkL2zlOoslvK3^k5xkl}4#SGd8o-h|-_6m@~L404yIx-^7n$Po~ex*}gS8^5`s9 z8Fn2O`o(cEavo*+VEFH^07l&|r16CyCnm{jySwl-JHGCe@w~1R8a7E#&@?0k17oOf zm!+^OKI^QSfGA6XP5@&2Qh%WY;KDvu4zvLC=>7%LPr)WJYie3abaA4JQ`+^57W8cGV%|QKO==jnzt?&VG6v6@3S@>%B z`rK}x>a9Bsm<1m#%0_W!HS4k=CTyRQ!m=e)O|QR1Nktm( z1#bdD@wNeyoQza3Vz6AX;X<7dL6WTH0E|!_7gZV<`|hfQq43l2*Ta$cD{9l3r2Ql@ zl%YcL5Q(zDk2g8}GXw~_5GT!zNhKMFp(%i3r1Kf0HZpKd?dlYqer&?c>jgu2rDr48IExKdDNvDf%32y214v19GurGJIsF$mY0AZ zQ*96IjZzBtfxmWx6q3M%->b6W#rNY30p!yPhkN$Onb97$b}!3`MYO!wam1y?RtZKlL2ERo;m<=KIWqjDI!1edoaQ}<#h4e?aNyR z7TY9cyhry|!jTfTXuLg+HID6ik0?y|67mlRt0hD9F=_w)la)FaEK`!e%xkEngBIHm zP*>#)W|Lz1ZYuH&@M#$^lI1YyK@|!WJDw}$5!u0xDma2k#tG(8vA`~H#?<2JB z@gq;3&FZ?Fp^(Yl#!9uYW`sscd6>9yY={-Jr}y){Ue(OA3vF4lM=Ox@p0gouPX4`Q zGvjCB>vCi!4a~<~m1^s>ag%J+UTkxWa)#;v9pst6>JhE8k|4ceKt6M9m7pEH)K9r; z(DCTg?wQ7N&RHR%movsL|^#80H@6k^LEd#wReEHaXIF>6XCgh^w*U! z*2Xpuo2XB9GQZ#WI=#N5(m8bgK{UkxVpjQG|4%*bj{(mn+0c<4lcq@vX~y9?McUz$ zq(N@SaqOwh69rd1mu`OrZ3V5J5}7wQw#@I?RfGG_!?A-;_?p%0yG~|a!7+GLM%k zzZsH&_K5|M1d51?a(^u({0CC`J??}6xa7P4u@wnJ0|b3D zZIvo1VZsOS4h~b}LOP$pxAG;=hI`)1^#mUG$6F^!#2p6$o`wf~pn;j!g&+i?q=d|Y zh(~YOYFwf|<_j8eSHU?t4o&=^5C;u0Ul>cAprMh;)*Zf&af|s+hEW|zCy{D9wr%q; zj-;~r`)ILDebOEBaJA$%XqnU8ET6m~QOhzgs$xv5Pd?vpOLJ5&NtJFp+ms&$Iq;Pw zO&nOhf0=n+N(qba_eg==XsH<(?xfsI{IT=S2zwJ-*Mss{KJBb|hcJ$CM(Zti!>-YeP>W2=|U$)pn%v1dSkg?__ct6)Oz^Z)tfA z1Sy`s0Aj-Vo6P|Y42)MTx1c&=-&@QYwIIbcoTcggU(@D7U@c>MFpu%4k=aKB#&ryJ z`7avt6u*>hb}of*|0^TRH?yP&xX{UUeNL>KN0mFHQ`&4H>|ZljoTL+!6Zu~ zSe>aki@%OPLQoIt4|w3GQN@?9d~Y&*q7>l~hO|zkOsommiJmhsSt>K$MQy4luC6*Jr#P{FUeSV#J@!Rgnm z7xSNgbDriT`G_ZSU2k)Q|+B3qvFrbY>&xz81 z-4Axtk-jwEDPTEAyC+8I&oOhNlfBYhXH57>(#(fN?z;M|Y+4Y(%zwNEm;2^S4d#m^ zcG+*msByMTMKfiBjsdPth$Ef|RIT~4uMF=Z(5!Z7@@xSTM>sE1fo|wQP7$-;oncwr zG{O}3W1O_(A#B_(;tqV0r`FUg-3cFm*=iJeOLDDvdCO$!8(hv_Ti+W#n~}XyZ$0Wk z@0B7gOnf)FBTxeEZ(Oeb3q0#i5{Tvvy3G!UIxjR5{(hV%d-}b9$w%gy_=~H5TBOVS zoV!}X2k0z+LF)$SbFZ5G`_XuZy*oXdpWEY8nVLz5We)-_uhg@r{vO0SOYkz|q3+FK z56C(W1+AQAb8`H*3mu6N4=S>H&l{d-YN$!VX68;pDHmPw)VrNCkVzwRtcVF6#j#pT zvn=04W#c5kE;9g7*WsA(H7)TSqi~d1Rnd3_vQr`;^^m1e-T}|{-uM*_V&CXFbExH8 z(=wCg>NPQ=the|JM)XJP^+ZiHvpKXZL$%lp+esF(VJ3QgUUW5Xueg7U@+*U&c%>s5 z(m|VdxSu30Lod~mpeN1Bk6?26S+}KvRku}*axUCu?oLCQWLG0#ab3}g_nG`u<5wxdy3wTgZyz&)D_T2xUx%@H^x$|0o>J5?B#5c!VDQEf36GO3HzE z0;%=m!CQKkah0YSu6i_B$$Gp3o@4_ol@lBl*G1~U+rV8?}y`8i14*y;Qkq!^G${OWAmKtpRpngF2vovtS;3q#8 zunfQ+odz8kLk1mb+Z~v$&=r%}KR=8AeKF9$QfIG$)!mx>KJolh(l_XUZCfJwsIoNw z6m<}hx<3AYA>tuo;{?NL>tnCTKCXyqW7n;YjOvx{-p-9avie<+FN)^`tltorbpRbH zH4}Q|VrmTpEcP%HKhAXdn-TMC!f})obK>D9S;*HAC?!U7KdjnlF(#$gdJkoN&2W9x zB-^{xPVRroDcgCD5L^Ct6F^_0UM}xzOq}Ot>wnd|*o}pFbM_NR3t8niV{?!+c$6>x z{VJJoVjs^|ER`(NobNj+oqg}Z`gXRc(R_kX3}%*7PBrE8^32L!U?ibi_M&9(w9N6$ z*Pio)DkU$!S^+E9AL^8R|EDH%#miQ3u!JMid`9^GUg0#SosJmah~GO1T#OVb|`QZslPow}}r zclovc?Kfq^N3-_DqOXk$P9jYfYZaHHAIz2trt4ii^*K^2>hRH21sSCvMBk^&Y(&EF z^U{h9e*Y4FQO98>iG09Twdpz(`2wdLyk2f~9LOnU)xp}wffc_{hIksJ6!XRWZJh(z zaqomtzo?C0_AzA&Qk64gP%G@~W1rz4hljuC%ukl6jW=67Tj|PMp=;YUSbyJX@*Wlq z<22>8A^n6$v<5oD7T^c`+LRp%td18;V~>wmRoOrL*4sYawB)lKp1SQ^z&o!hkFO;p zvl)K0U&7`i>rs4&Z%&U(wsf-Mi4Y_r39eouiQd044=2u%{QR@lJ(Ogu1rCl(tZ? zh2g_}7@<(+TlX@X*UIWjhi$nM#yS(J`LnvY$KBjuCucgm1Yh^RH%cY7%*tZjQ)}{$ zln^`7r`4I<4+ijs9!Fqj z_*r~c_K18wk^Yd@MO?d5k>1yo`1d9Ea4N^_`90ly;{CczTGL;+C_y9-E3IshiS(jz z0*VXk*tu2WnFr9_7SP;2e>N(%h9EyWzS_09*M+*up7J3EEQR;}(kjNsZz_)su#b=R zYPuVX6b(=E`;?10?fe?>kleot3ZgG>B+kUgVLuRc>KfO52$EOKX^*0Ga2xs>PW*&s zVDnY(yLF zkQoOK{gyJB>{a|Of({(7b$Z8tBaj%rHHN2XF5 z>2lefQb2)uS>&#my!e#uaJK~T#`b6&@^|W~Zv>v&Z3f^j2^O&88?`Fcb*)+S{f$BM zx))|5fat|1MQcF(#h@dXf^)a4wLAE(1n}ts!fE`u;1DoYueinsMrtImsO9ucmw{UC zpzrU&zF|GD-S&EHv?hS^1~_EiYI}p1!hN9L%wrM@205=uw@~+cYaKt~OLGVC%6a`j zCGu+u{KYzf2c5ezIht!~gYAc?k4zZwG7yIn)Kc3sDhA~04K-2;DciO;(45ib~T6k`19Q?be~T_m=5sV3l;GpeXB?o4Ran7EnrZ3i*b= zQ0UKP0!Y)Q{5D?~?O#T#FGbK~{}~^asv-nza6u1?LqtxNeLFB+(05041La*HS$V3XTwx4D6GIbNjU*Ea8;v8PO?g)@G z!}W{r_y86;{Onb6XTXQ1YXoGhycqd`KdrUt85!rE7%f0_$KMt$f&UG?f`{CYiK1Q*bVA zH+-dj$Uj=B0sBzfP?{5<5UsoZK>27O=@fwpyI~;9Fw`322&wN-0Qi1G{?=(VkLsv+ zIT@|B(}T2Hl;RJgCD{TFdGZ%o{m6y0R0Jc&N?!}1OTlmcXi~(BOe-DZo z4Nvln*67*(o)zeK{KuSPE-6*4k&8*xCu0R{Z&|`b8JaF-oSZb${d9^$z!w*k-v{bT z5^8THxZu}|?V@zst5DgUWi zCerwcntbE@M<5kKO+w#?{Ny6wWy*Zvv>}>Ys)^c$2aZrjBiyz9K5JmOdd&E zMQZAC?~SS`UZj;2Gq$sZAzyFz$IE9L5nJJgZC>*JZzn4CeLY7Y68{ThJ z6fZtrI{epSlHI1By^Du)CZ_%u`5Td+sX$Qf819lBh}|aTTy;-r(b(dLgrDJ`h3DWG zBbn#K7abi9&tFz`0ND`!Rp9Zjq@{&l;=xjJUMo<-7gEyv=I&4RlliAtOW{TBHZO;W zjsFC@e48WlO`S~6D}KMFeDhxj*99V##K>7C!edPPB*kQpz)t!5jYCKCXqls5-g|y! z=TiC8&6M*xsR!?i^y2jI2Bs-POe+JTu9j&>gXVeW3JrwqL|=}o{rOP+@bQrZjbfr^ zY&EG8y=YVhCU*3zQsB5mQ6uXqMfZp8_t~z#!<2sy4W4##{Ne=2w3M$>wUvWlE$;7i z%LIBqXzNB)6Ogu!@rU@B3w@G%_R#rWnOZCKQNIPVq8Z`3Rj)>XQL_GbvsgR)`((z$JPua0 zyf)oQ&NPJmh6bwYqr4pFOEw_JI?Him?@0bkg7Uok`3(EiM~-6ZH|5WpPN=tF6RDd* z3*=MP+J20qrACX91ZP@MCxafF?MT*X0aTb~W8UMle+>X4&TlJ&%hAo;`{p6j4PAB-XeY$SPnfjRu8^2Zo zemS35i&RIFZ*KE}Gs*YXdu(Kbh&HbdRHngSW`8_;{z>7l6C~tcq0IgDuD*vHal>pP zGcna_%#%j#lpZh1wSj>_sqB~iXt6vy*3g5huh$Y^vmxgd@XyZHMKU)wihpSGe?)UU zhWDzMYh#kuA`V)?>T!PR6*48$q@fp^7%yPu;aA|BuMTN@Qa(xaPnENB{n&5R)qx^% zKI{PO94lr0sWv_nJ(vS1Va~nc@~ln%xYKD2K^-7TIVrdz-_=QbYCGV3V@vC^?`nX z@_;IZw?qH+Xfntwp|LNp_XTbvBZFkY<`U- zd?kiiO^}0Ukcm!y}(Yx6gp!Dj>(B#Cl+q5h0y1lAvzQZRJ*RVS&;oyAL z@(6gLhaTMWHzGjpAfHUr3y11vwKL^!2><#Fh%BT&2ot6iv2~NEr=CpO#dqTX-Rbzc zjp}+2J&6dY$9@wd%aTk2DJ_do~zVsCT4l1|fQ|JTr(q`vr>Cd&_h zINO(SSZ05u;xP;zZ7I-t^eijDWVSz=R~D!Tb3<<5|C!`Kby)W1GT(c@srLiHuZd8U ztx`s|ul}>95Z8Vun`Gf;I5n>oplu1<`WGN^QPp*z10;o|Z&@>cvLu$lqZ?lL5Iw-tY;%e;O(ieR|OB3;N-O%P~mbprB} zb-Jfs3hs8~-vs2&b?+fEKbizy1Ec&Hu2X=mx&aMa*Q!`71ESxnpgRnd%3#zztk$STR?!I1jVO}i75RdS~-DdC)o>?t&ec_(Oa8b z6heQF?cWn3ycG+W$$bkDO>A<&1T%lsP#`Vg1)c7fJkynF0gKTDg216?-3Ns@Uj9b3 z(B(w@4L#}AVSeL9{Entx;O2ZP5AW_g$JD9zM{-!lRs3Q>Wh*+E@pOo3^CI|?IX>5K zifo0_)_aa&$<{WwLo~Dy#x*-D{MTw_Pt^DEG@qA1Sjkw#dAg+@TA*jQ;bK3jor=uy z&v5#ztMj5@c`mzB6Y+ut*vN^-Xd;iEX6y3th6+1bsTUhEQ}Ly`66gLAC*Iy~292p_ z7sVALC&m+qN~GZ@z1I|Xe^9;=Wles>Ht^_Kd1C zgj;Mf-rXjz((}`uzC6&F*T{zn{l*_pfihMbw{1^7InC!-QLJRg3*rcG{-&PFe*La- zE2>VQoQMYI^G%-ebF=I!rwI(+A`#V%>Av@lfacFkKom{R!wl0t_``Ci{6% z-APzLSv*dY?q`n>9gQv)`r&O3QJpKZ-N$1t5*>Sp6bL7)e7~+@BGyCCg!3wO-}0u3 zX&~GqMoKfADNLMh#B-*1izB}Nr62}MW3C@S_m19POz2g`*sG~eJvH#?!dD6Dx= zh+800=J5mq$K#eOW>A5J#`Ir(CwUl=c2fCrX>X!`0lNORvm zZ6z*3`?#udy9h*5y+itdYGKOTK4_E~o3#Dq$iO z&AfFv-2n%iS*61-;+uLMAAXVzfnb}uZa?zfp zM!1Mh0ZO^B=}%6z*c9|P2Q4AS5s)Mfj;e^=pvjV`de7;$9w777{LQXQH?;fX?8t~+ z%qZ#-PBFU>=HVI_&BfKBD|#Jw+wONxe&DHD!DT)0n>z?KH7R?sr$3@B3P^vnq5mm z27jIkf=nkNzUY;@hw=|Rq=lo5gt9RM*1$wC|DXP!lOr4l2IgGPH?X>v#ci7{H_LId zCXpIG9zMBF=@bl9fu}&fnuZEO9P7=O;6Avo8P)Zrk1&$Ir3@-H2!0c%R5=s0aVtQh zxxD&KeV3bSU07amdUIM>UorA>(psluV7(%Te9cHxpLXk}$Q-yBZw#vd{;f9)0knK_ z8sra!BjRtIVaw2sdVi}85zhqnx%dM^wUlbY=d=1c zZ`3p#pKCjF&z#hET)uI$4su{Xw^Q@!elL$3RxofhS-X5_TtmGZwAbLe*OO{?9xDl5 zJ@r@rppSW+S z(T!ET|6tJ9l6&SlHSyS-yGkuL&@J<7^#u@FoD4FwmJVAAUo9*!#pRi>@h)Efxi^hF zmj+hAUFg-KpkQ=%fSwsxe*{RqtNmy4X1MLCqtpdqR=`ejz4{|7Fiy7?5~7%JdD3Q4jgOXFRrVKtN4Qx*w? zemt($<^|af)gfUENRq@~cvydGOwD_!nc%JCe9qZ>R$g^xIssZmwa1~uxQ{@{+d9Bd zXxIX)hnsQGdzdI-IovG<|JYJbx}}mM1&PS<3DlS2Mbo&~K&ns!s(ur8mP=zk$AVrY z7mxGCVG*P2(Utz4MOgqh><8W3Zs|0|;l4Ur!0pEB@8iOI8j%5sYFeYQ2!)2y`X=d? zDfiPp{5fUM5S00J%;q4%4Ux)jOryfqTEnnY$1Q>dqH<8|zHjXA=4WRa;zb97`PXaF zYcjZl)*qB-}mpAJ^>J5!&>|kLrimX2Tc37Ad`Zx;eZLIKYEI(diMkyG$=$B@w}=vm!giY z18*l$Bc&el_=i?8R;~X;m5B<6pc0{Up%6Sg^WRiT{`^z4qqOQB=0muBrIa4Kxi)Vv z?^S|j+EE?Xab7=?n7DhJB2@|S zfVIfX=8!Lh@5bzvgPPr*W*u{Ndld3m7-n_ok)dLb^>%*1u2TEOEV;}qg6g(gn(+}l z-(}=|CZGYf8cfGIuZB(!Y@YNB9~bxc|5wy1M35-3s*%2DmyYvrj4gh1!9HAudc0|L z)gMD@+2@;#@aV>*tPZ-Ok6+$_aG+x~;8<;|wHu`qtszef{by6PJetwfusc%Hn%7| zzw2*G4u`3H0C$8)9)z&%HA_Gd!Aa5EDpV2zov!G%$kXR7)-zWKALbg5u(kT{jX{S3 z=x6!GW-jmxSZT(s-k4rrlEy2E!vT0&U>CC}_uF zPB>7XV}FDHTsK@(`rr4_wGuU_aAzqJ-CC+SCkbYRremI zB#9Z-(yi8nO&TI)mtV-cK6-~}Mq+SMef`$Ycd~~!aNdRb9t~VUtT0j_lkxweAUB(o;FIIsVyC89R*x&OxUPd*|ZDp9BIf;@2cf z6g>U1{j=zGZalBw1q;yA>SyVDPtp!}&VHfYvr5Mi4BtAlNZ?vVUh6YrlQO?O)*}jH z5>N!?sw$K&3^|^7PDO+hnUzS^v8Grcx&`#I>g$0{zdjQxd~2YH@Rut78qQ_@4}y+Q zO&=eiF%^V>A+KVT84l9C?|zX4qS1Ysoxo(44e`Kfy3(fWW8Qt@GQEKoBrC$U>tiSI zG;^8-V2%;W_tpj)B4sl_2Da-h$^nM~Wml6H3__Si^Iir&sP6f{LM_bBbPHGPD^9Aw z&;AgR$9GWSYspvzT)Y z^@U~<%(!2ODw;kLdZ?%S#qFk0_9xLg&|Ppe^C z2BL-lO#@(Gnzs=SLVzP4aI;SbjLSrz;%~5F-ba1A%QHoEB5A~M|NSFM?~@99|9a{5>BlPu(vL^5%x`V0Io$^n z&NCI1{^huz|6vhAJhU|xa6ATT?#Yz{JGP9M*&@}yL#ud&It3?*Tau z;dn{d*DSTun7J@U_3JqZiY#507vBWMB*a7PPqx~$V^aC(dVRV7zppdEg& zOm#?-H7C<((O%bc{AWIZ5W5KpUsge*Q3%kKW6*X23ZXXrSgmaehJoGS(|x{6vih=mGld-p7~_AaDg4 zN#6UM3zwlPOI_JW;XGtZ!3XTyg97q(=ne>x-{R}RI{bHt=?b#Z;X>^ShMjxRi8$EE zTTKz+Pu2a@1#`-}RUo#S=o;z1;G z1{)hh<1nizo6|-O2G<|DLLs(wi_s1oA^%^cH<$Svr{X3H0w&k5R|HVP~ zJf+gO9?zCv`qCz0&-`qTY0H1`dlTj7md*1AdXL{}F?lyD5I%gijD3_}$j4V6PgPURc@|qNTLN_|5{_eFxa%;x7>x@hy+mu@1;+;BIjy2TO#_5qGUqI3BUM*Z9LxW%9ogu7*b3NUO{y%W6M$e z)ru=kADFGO%qHn@mV0$(E}7wTI=mATXY9wxj* z?XU*?=t?D%8g6Yjf|4ZHB5-Tq<$c67b>CSkLR5!yDlQ3TB`+-luv$av-X`VT5B5n{I}hNN|k_Yn&tG%y@OKlbVX;{ zSEH*wRMrz|{?p=@0d_qKHUOWY(jer7yh)b7)3v`J^aGn^>61KRH~^{CVR>quf!`Fq zJYY^2A{E5_pMQ^49VxIoW&=c0`inV|y9uqj)y5YQaVKVXkF;iQA~tOKaVjeo@XaJj z`ujso!e@vd_2wl@nS*&wLXlnhZbSpd&}^b%&yRb1^xnPWHs2gxPL+f3bqcFm>vRGJ zr;KYJcu;EIUw@f8j6rB#hei#P#3}AXaNQNX8#FYWDPZ#Qz$Z8<*^>wtnM7 zQNSjjx$U-*=TU4l6W;01qhr*lW7cHfSwg;D`--8>>4BBgG|$aFeuoZkNtvU$-R@6( zB`#;7*t1LV>pPm@o68if5=J&h`7>UQPN#O$f+HSl-5#_Mi`X(BV52~bnKdegF! z4*GT1hunw;$A@_}3jlb7Zj(P5*SoLc9gR5_(pP5DeE5C=^iFmI}n zw(mXZZ6@eH1bmmjr0OjzvwRCGkq3HHTUr2TI(a-UVh?zcUrkl?E@8xfs{63$0s7yr zDa7g54DmJqdh*d7SAmBhiK~f=+yrDP8ZP~WjsOTp0>OoF3kAY=OP>848%BTv-KT){ zX*Oi!yaC(O`o?U}_!e~8k#2LK09Dw$9mjeQ1I`n*8JWyGaOg>|#oXFd0nqUp0Drot zJGA1JbwlyUf8)JMn^{Y!0nD{pJ1zxi0|WVRhJ}=SsANhceRu)<>#2%Rj%qOig*5au zQz-Y!GVC_7@122B(o3G&UU*DaIl{((CiIMjhCes>!r)D5{?*d;D_Cy<%54+*M}M&? z0Ql)z3rw4w4(ZKsI}MCoSsAB1yg}Q}Or31%{<@rJB6`=|+|~JvyZ|ct_SCn0S3w4I zt5z@i-$`8u5K4wOV}RnA7%y-k$uUCEm^O_U{@#+12A1!~ORT({ROs)Iih#?=s)N=! zPz_*~@t4gC*l5|(2cCru$Uqfo1bV^qjiQDcF)XEFTkb~mkO;B)K}}EQqA-96A;}NF zWY=>dU!ztW;&Q`tkCyNXb-lNN{PT(n07=WN0pahOfnQQlDELv5$>LFy#rMW8+j7bL z!L&m7oy^MFSHS@sU06+Zjgr z(~SXP9l%*?l~rdx=W6TG_-yUb_O^cbsu6)#U#eT*>R2#1RjuveH-TUPo#Lh7jEPSH zBhu7295tjmb^settywNJI2C`z2v>0;S?;I{Io@~JQ2xN6V&qeVvQnxWRNaK3)>L0?1+dxF@Vs*!5U*#g zEdYwA)qbCs4U-gq|0J|Szn={X-Agvg2x+^bf2$UBP+N<51DJ14?D2hzZdZEWfWHgD zFHm19h2sZbHIx0-R*l+Rv67eeXp#0woQ788fow_%5izqvP{=K6H>FL#Uy_M37W#)8oj@ z`HkhO{zlD6tnn8Ir=F?n>$%2@3Yk#L9;R1bo-9>Gx(9{{$!_w0siw!nVDm3&k)of5 zK%2T_`N7lD$*(5#2rOTMv>$P3EYK+aj>7L2<|BNhZQfo)l)V$X`a4eK`UiJ#cJ1%| z&sS#KUz)yRe<(WY-tp+;I5T&xb+7Bn+|RXo{&1@J0lTz}w)>gJ%=nkt5J5ZLSDF)x zU(&k>rPyBJ>xg2iU8SOz^oUX%17oxJlqq#4bDT7`-0<3$|J&kxPmj|VW|W`Tc$nq7 z=?r;u&Ny~bn&rnEw-v%cRp&P%n5f`duXES7?H`NWdUdn#m*xef@ZOB&)cQ+ks}aR} zv3IgYqeR{Xu~2aRiWn)Z!Q1`q9m848`1C;VLe(?>d~Wa0=1>Q6ZFli6p~XA)|JX5p z1bM}qpuBqVhZWmXvb=M=+X8}#!3~hOit&nI?cOTGxS}!>`PLTU907u#h8WEm-V2Ar z-13*RyLoyLP#p>3C;b^Rwixs4-OL zI|RS}15}04tKnbO)qeBSSI*nfENoNnECj>$I++HG4eg_nTcv zUoSsV-Kth7zsoNT<<}d+L>|`}{YgNFCCrDNJk%6N@*3LBOIG4K5(V%ld9ML zt>d5SPp8&a>vhk2d#a6>fb;w=hPXNLXHXD^X4ZdLBF(y_xZc3s5a>D=;2m(_AQg+_ zAwT(S+dd0IGc&etCl~70D$DHh@$#$9sc+cqTAa&16vvbdQR~Z?%gD~t`W3oO&jLZpD zeTq$PLL-e*NfK*^Ps)0f%4cJCmuw?eu%C7EuuK0~Qr?_rA`1r0Uw#0+boFZK|2y4c863wgmqtpudBN#|?Hd&1Y8r=Kq- zK__{V8n9eB!gG}xMh%z#ON0J}eD5=Sbew!Rimu+uG@87-eK9NhB+Uh`?@CmDr;TXc zj|+%q;7Iw}AVh&ad-tu00s9|33cKj+eXZ@5BNUYcGCZ4kbB`(yz zKYl0XNo$5wwUlcT%jE^B6b;tW-9~suN-4m^`t5WEX&3h-T85kRj##kDjOS3m<3xGq zdutU0$y$@~1r`Y_%8?$m%*diIn20|^2fT}Mqhm(mf@Y@1<<^afmD9Z z;9zIz3)NU&z<18{iuwo>jvAJ|`3|_)hG#0_<2)0$02V-|VV$v*bO#CQQ&ll!O2y?! zdFA`*nc+6a!`Ds)x(_(B{Wauo=`^=EGfrs)2*G^W@|g;z-mcFyd&Cno$8sNKF7DW~ z5o<_u`@2PeLfz4M_H&x}HozdI^h!S_nh5$$AAvGz@V|$yclrvKS=Y(_c=Vs5pwmj|bz1eN=#GY;7N~hKYg$2)15sC5sn>zB={E z4=pJD4cx&~eDC3qK<+|Sm6}JEBN-k|B1_u?!lq6@%24(8j`C4LHvZ%6feE!4zvJzO zgcN-ZObfQid;z)0A~1DwMT^07|Nid~|Lk?tpSpVm4g?U= z0r=0halQ=+na_`P9moCxzIjY4Dng()M(xPS`2+C6FZO~+6xH+Kqt^9@?8B$z9GqqG z4Cge38K&$Lr(`S4m6XJsoQ841h(^)fB+T*Bf35a4v%R?`;>s=d)-C zoHZ2&Dj_{JI$GAfkG}#}MxGkPA-o;lAZ~sbtzK-T@=uM_d-`t{E&iEb#NoqK&mLD7 zJ(Fdd!YebPl{RQ;QSJ5EUJ@y+|Jy|C{BnHj5q`r_{zonGca!zq!gCRyeyHJdw2+xB zMvsZAzKNMy_6R#ZTbH8@%yQ_wc_+Sfab?!(C=#>3PnJ0D_~q1{^_vRY#MF<`s@!>O z@dAYw58>|5XGqGoXNAIhgY})lnM!4AFRI7ce0F|NKb(#`|W}L{zOtYk%semRl683n=U6yS^*OMN<9zlV405n`6bwAE36GcxByD zqWeb^OpUvlz98LbEUTGgW-6gMS-?;|`pkH;;I~U9srd8M?(GiD&ns&6XknF#Q;m_+ zlX0$U9NyRu)od_YT~i$%oZD%;xY@S$w((YY7j?K^?i?_>GAq^Db=M{M?xSF4rtN(0 z-X>|Q7Mo+aPG*yYyuiPsqMrA+S=d2D)8_UCkE(C-dES$2!o&5_l!BSwZ0vw~`?m?h zQN88`4=F9&B;*5Ce15j;ec@HsF=a4#*O(DHQvD1+G8B>I-lpmC=$EJ^YqQD8<0)hN z*Kl}`KZwF`^_BJqdRXI2@~;dL8aU~f#4GO7UEy8e7eu?dR^cpM!g$0VM_xx z(<{_wP1006a2ER5_5r5wlpz;h6{~;e6ocqSK4hVoK==aUyS34GeZUx|4M%pTqZ(i^zy!J0E z^AjYSXmKknH*lQMIX+U3?4zKrVT3jxpedfCPTjp~k{%#rPoI!(y$CHGdm7YLW@ zTGfF8Jn*Ndv8*~lzmy^{PwLA>+vVd}R1$>+rBQ0b!WY=f8dH$Hs{_ds}$zNI%2U}wdLZ|bPyt4-JTNxcK_dr|aI=H>o2d-tm5MmQ} z8-Pv`ZW~xmpiUX!&3P#1nKE1!=i_w3VKdKMN)qu!x&hh*+?0XS9FCZj>*5+Ye&jeb z<%|sQW;p_HmLY66;GB5`+9oR8h*I`}0fBj7!qsO^_v$s~`yMOpG)_iKO z!g2!Cy6XoOmUrK|_8qXibh-G)qVTwSxXkHxV$ro@Rq=s(3itZ`5SWH zv5#(@a~`V<{N=C#)Fz*>*jjc@5jKnbA-J^@&ojxab3V-l$gSdbvYe?8x8FLy$+L=i z29_Jh&h0f3nHG@k*MS6|kzsYZ#&~e7vOPW<8b+6A zZ<2=u*=7Q8BaWLq1IZZ?P9V+)Nscq62+t`_qgdVy&nGJYpGySdOj(A|+g}DUbJz;R zjZD6opJ3a7Y7YAYaDOOn1?B$J_<(HIX$9tH*=Ah^bX&ok`_p7&{hr@R_-;R*%&)cJNskg@Dpj1eK;CsKSom8VB6dwaDAirZAbEn=yKi55|NQ z{KTK2Bx^?#GPcwqdX-mxpHc1*p*N7_MjSU{2Xh4I1pa&(MPTk8FGcG`s}xk#Y-`6ye*Ae%-?j~7 zH*CPBJ1<0dQySuBeHHE>znQlpm#9Q4ookW;a3_>euw|@N;7(YcRG$H7doEHM<@joJ%kpCoQIX;U)ulkTVTKv-cs5~>O380nsbko;Kfz;U@J z42ztBI-XeLRA5d>&U%NHCFpXas$?CNGLNitrL3C@sYpbm)P;bYbqFd;)Oy6#IaN{e zTXLCPc4Sc!V&ptumJx~t$;+|KK}(u2EKUnhfBWS!z94BC(resEsdT~?Wz%tm}WGOBS|~b3{CU-*gJ}|5bH@sSbD6c>4lj{ zEpQ>i5wF%N3G}G<%D&4?(oRt6X&;#$<@4Jwa3Zfk+Q`gUEK3bQjI7t*>_uWjrULUg zIX**V-|#o2c>M9jO?0D6#bePrPNj6^!Zlcen5GOY$PU&0#NQ@3Pu4BJ6JKy7H+zsM z=LTP<=>C=EQjrZZF2_K4qilPF15u3`NN&l2v$F_kO*sn2qs#3`Yt4hbUD~jEkAAs8 z08d!XFBTH&-H5NtK#UvEzvRgOchCA8d#YLK?3QI^x;#*&;seCy=>`1TtQ zD=c5xorbin@83?XmUFKyTfjg&joYVNl5r?@vzBJ@A*q(8@Tqa>Nmq}P2-0PHU zN7g$aJInCeqF?9CSjJEs=8FJY%b0wH=2Di!>|~jpEr-Z*1AAR+)5U9jY@f8Hqh%=E z)QSu8BM?}TjOKkKSY9OUM$$s0_Y|Xex)lj>%*U2HP&w72mMpf^CHhjYdEYRC>g2qW z>lp8MQdXDf7e#y#;NDs*+wOarKr1f3(6tqZDlF%<_fs!?2Ma4=q%AI&d#*<9ha+9C zFTCGcR2d6feh~6EH)4U5S=O4a*W2nHUC8N^eJ|%~NILr|uwnd?NmOj|SpY8UN`r1;1>$n8PLXS}Tkgdb;&1T1 z0N{EFsGU3NVBc2b+uj*ap1!LN&b^Ir?{Ap})$doOHOVD5`BCp2$W z`<2}Na&IQ7@hVsQm8<$x{vCUAoTB{-fw_q=r}YZ$SeQ2#JU1}hKy!akZpv^P0k$b` z<}tED^nXNWgXL!uqmNBgxdG+697avg0CNM$4JcQ@Y=Pw_Z$6o2QC8qQSJ}B_ooBXQ z1l1z?hR-#RRc5_};nv7>v%Isxa4j(9|2zv>A33mOVt`!2$r-_em*K!2z1i9lM+cpbzIc%V@fy9&n#RdX1 z&wyu&Wtq>&bTiL;9Na+-}z0jB_5d9oBrSSZ}la*8O0G zrO6PonB7xly}zR3pptb~U4pe&#a0^%}XrUpn0Q)5q2}`yl}5C z`rN>9tIZ0BnNL|EIYofZaZ`qHoE>>mgvJEsb(cw9E+5jorh}t8ZlcebvIEeDD~8c> za17q*DwJ<&LG%6rbX+Poa2Lr<<%NB-w!n6742w80e!5ctbL*kIhz<6->Ad%|701f znCD(24-~TPwDZW2VSf6o(Y|~zl=&R8Ear2Z!xYO>W}MSZg!p_SC^xX1)+-dDw}}|1 z3|wZ)a-5IzaGdiqHPGBz&VcMQiDivUo&nefUYlhaK+a(^jbPi%Z^k)|X;^or=AElJ zj{)UIaYI~R5kk8>8l}i>tdZlDpuBi@D-wtEu&6plJ;N(5?A70_djBdoC#$fyBu*iD zPRRrkl&myP-L9&o8IbFva}BbCn=k%W~0<1SLf-2J1q$^<-u1Y@Z^D? z+r&u6xRE@4`N8AKy!fCGd_Yqg7FNb$MMDY}*Cp!y=L?e1zAUwfVbuHL)?|eb%X{qz z9?H~D(wFw8D;$X1Sc>JVWP7((B5G}+Mtd^yJL|$0T+ke+pY+qBh0w=HZ4V~om?MCi zC_vgoA-o%F5Yb^*8$mgBsJ2-0el)L^ZPe zicm0If&9rDqz@J%w$r2D@bRr~#1Qn=Br8Y^WF&G^He6-Nn95DS&vV@Pt0M*f9v_HT zbE5E(%1Cr&Ek}kc63Y_85t-#gbb$kzjRe7Q@;f>Z-Ia~Bwk+6XS?M)SB-J|+)?^1G zCwWZrB|~DJ11aUnh;oM`)DeJ)yhzwm7b2xGL%}d1@6D#u(!3Y@Lk+F4$BQJhQIyoj11cn z7D)Z$V2iQA*(kq%wH;B_>4>aK)8!L58*!Y9BlH$AkI~&M8z$SbQr63;WM^xRM&F0z z#vr0F0kO1S$&b@vXR}w+)H*jDvY!__=(oODqq_sMWgjFjLRdizl4bkjWnEDv30mg_ zsZ&CYjLUW{&60W27Gi;G83Oae5mv$%0aC6y8NtP|K7Z@B93VV#g_IH(qP+=7%uhu|RVG}OZlsqwREhbrzq8|zQk16C zm@<#koD~^JE0N<-#yM|#kqa569yp6VNb<_Q%9Q-<6j7QCCn7E1h15Jdl5=Dp$xp~i z)p8t9$(Mcak?qJzlsYCO!JC5k>}14A9b+=%5bch|qS$2!wud7wPtLWXbj0K(A>12} zC`n_BQ#4XPYDSTzDQbm7yBducm;K9OPNOvr?Sew(w^-x~R=;_*=P8n7BIW{w7bIxp zI`g7rIr=3)rCsOIuLR_{=2sCx#Zs;)UcJUwH!od!aNAu)*BFCAespE1@mAVl0^Tn!rdxJ()j|vomD2 z)46-v5YXjNTa)MkX*1-S!Oox~2eLpLEzVC5^0bXrSj4tt+4S;|oDX;qz-E z+M}>@Y5ih|?Z1@awIgwy*Wi4;?j^3um+M&#%C>iCR5zo=bEj%>L2d|anJbXilaHD$ zeTb}dA+aS7&fan)$ob0X^ObTQ60R>Sjz(yUOTW^}W`7&2%MdHq0j`gr*R`z?p>l0q z+LER=a!pr^;bVusiO@E?e!<6=Ahavv^^|>7@P+cqh6F4rk3jL(Mzty9msS?gmtTL z-zmSz`Z6SJqWuT~wOqSpI?HD6kb6A24<;Nopx8v5TV&IwKfTKvkhMqd!4I^^a%EhG z3omX%-u`A3T-1tUMw4IOrGT7i@x}7oa#0&fFO}yQQQ2i(+R10d6@=k$`xeafaCc@_-jBhElrHAi2~x=eBhhv zxLwMKOj#o{zcpWnrL39O_TKqrh3!V|?~~=cU+N(uRIa~a6>|4AXf*cNr*>$)Sx=_A zd|8iy)D(x!x~&j1Mz(yT#wE>rqOYy zY^SLE&S@E!?Y4CA*>lI_oM6}rqpfh(Dg$s$Wb}M8%i}QTG0Wom2$N0Te6p_d-NL3}j%s@H#7inO%+yRbWy~}}cy=86^66uezKDPS zk3Zv2fBJ)Zms4{wv-A4b)OlF`FRr;@`N>nXUh%W{I5)8T)fb+eh2=fhuTdM8s_RD3aLZ~`Up<8S z>&H-aSwHf3x1iyQRSL=5t{qok-g(1nxa5ILK{p}y{tgr!@I{mxYZWUHH&EO}m~)si zFrAU<>U+Mo6SbEPDjX*iZ@p#$!|&gQ)gRf5@el68!0nsRebZX0$0VAsk{g(-$I*VB z+_>E^jqV%P;PcOa8xOwqbA0c$$MEr=e;FV7$rtd=<3GSXCx58ppLqN$xZ~kZ;mWVw zf?c1u43~WAdffS=&)}{XzN_Va_{Puip@%<A< z8_>FM0C|&g^DYlu1#4@y^TPb~a`V5gMx%Tg)x=11ri9{!+vTQxOS6Jh*OWZmZKN$s z<17%TIBXqfIl^@V%c;3wIft2Nh300Q)BNGMzs>~9nNOJrZl)~9d02*dTn6*aGE6xG z(G38fPX=^b%Mx}Qaak1WW0lEgd5#;XZ z)+4qx11Wt4aE+9!M{j&zo<{vGsg9Qi{#X?Bl;3u>Jh;p8?Ap?xpWhQ05MC%W*jT9%htcvN%!o4mTz@oMAMj~;5<8ZoKDx2& z7;~yr?Ol@Dq3Mjx3nSQR#X~S2(Vq?1rh2SsO-E3-Tcg>7domFw`!h<)1oyk)+1a4L zi4l*4=7a-WH{k$b0pS22(8J|{KUAhOdXkZtjIt!KryniHP3L!UBRT3#oHCY=sBV{f zn78cjgWP7~zGDx-)t-ss;ZhXKZ&-!>IJ+VXMSV?3tIJ38SRI@Vc7^n5Bc&)@RgUuBGF0}Ip=?zpa^yH;dyu!I1!at! zoT^9bL<4HOOHkU9i_%pkaJFQkX=4Z4w)CNI&nRlwwxM}zFG{Bxkv&+3+Ra@kn{GnR zPz4IdYmwbof&y7~=}0YHEjcI}sDP&}2U+d8s2Ht5#Y7$2w)LWBO*1-o4xm})Z`jbT z${#4zvi4dRvYNButac*5vjEl8EvQ=awyM{*qGnwiYS*`;Zi8H7WVr>yRjSg7dQ?m` zX*o_~T^rYTs;b82ycw!S?doPUtm{C-nl?=D*@X7Zy(k~6M`mlTj<;>z3<5 zZ7xbW%TUo>A>$RO9jHZRU$y*>m1r1gLU~s?3R;U$(q4kvRrTnc>O|Mt9`vs3MgN9= zjBTF~t;VWNqv)QNdaoJK@%0BbWAmlkWqrfwUq6K2wS%+b_~6D73~e66$PT&Q?wrtc zWY;9dcCE(v-f2wkU4zMeYq93Q25dgK1AA`RkG(fvgk9HNh;7&G#*SQaxkl5Qzw|y_^XZ$h>$U^9 z?XC}~Snhq__%J?n-=}fg*FT6mzWs50;5(ndwO_m)2S0l=uKV(Pal>8jpG|N1#s_ih z-5n{dZq^3=h8fI3E4Ylla;1p2aWz zcnH7z%V9i+lQ@FcvHdfb!scBn?U5UygKk7l%C%rB&j-b&Ju!Ar8ksFJ;M?CC%GgD5 znA6qfM8wEs{UT;cu4RlQpOkCqj0nmNEKeHp!E#zdv3<(k)+lXOF7oA`ET}I7OWINt zY%@}rFFEVvYdf&CfF0*9(l2mI<=o;+9yB6cw!yul8R=UZ z^;#4^UabAC)Lk-!PaXcYepSWoOPel3_>k{KMfT1{c(>Ifvdf8}`go-DXQ5zIgVu{* z7gq1>Mvh!p`Nd)R?oNcY+O<u`{n+BYm0u(*eLhg{Mw9PvJu#4?QhkW&~aPj-f?d|TnBs+ z_S^=-amwE&g<@nlQU6jyumJW4B`LSL&}L;2xe80k{F(ObskI`39U@ zLAe!-`;Svr*lo?9OV+Y;=^usVjDTk950T9@Yo0Zt+6smZEVjb(S$I4LAh&8RSk8O{ z%o}bTLewYr(mcK>GzSdb--hBOt zM%%LtVR_dF*1RiNZUwpq@>#%b!SU#8NRZd`TELu2DSWXd^vnS%?$7gy!evutJ(4OV(4n7Ia=~+%# z{>t-D;H}@Bz%##o7JWCalN*iIsJUSbO}9;>_Sz9N+%S&n%LmkkrSZxkh2(_gRM(AD zaLWxoVRsp=SPpce_@XWa-`1#dBa=^9uJg=Tw3xDtDkm)GC$5Bp#)^dg-3FQyjx&m! z5$49v{2kifqLJH-B(K@osouwV)72Qec@w7Jy8})8`ZZdpc9*Psb2BoAk#rJuhRqt~oOT89VDo*a0`%HSNxN6zX>6mMui;l>8!uCG;# z7=`5)|8#J)O=%0l&Xas$hYcXT0js8oG-BkD30mb1e;!t$IA zP5J^Uo)BX^Pr)?-GXcwzwj^Y1ZB#%_SWdX?mefS?Evrq`2=cU5g&IwsGhM5oJWcAC z*e%=8=0Rew3=b4&G&1dD=m(pzrCQ;&`P|vW2x9H7AP-~iR`}uM~>P2|5veS;(v3vzQjNoHLq}FGw02#6k z`|iF;+Zh5Me%{YWdO{UOAJQ6z-tR0&|994tR!g~4Rk-`;{dg0<$Dx0J38(Qoj^h;^ z!>{lX-oi=z7KbF4I)Q(K+@|80|8pEa{^K)v><>@lr+;|{PyE*lc>2Fz!Y}^gFdqM3 z&*B%doS*&W6n^>#DJM6(hhBORuRibzoV;WbZx-9}hqMSBjSt1+Rk^^4$MMHMpTG-$ zIgVfa=_P#kh5PZEtoQN%Itpp^aq_=T93!{!>|4fhyEgUdGiT8cKT=d#T!qm4cL)CAH|EJhfn_$KX~OQvwHB= zpW=tF{R|Ji{&PJ1#^VYuIn4aWe*GjKed`I_|MFw_{;5at*qgt^Bd`1n_rCB0+<)|8 z*@wTxPeea@_2+o(wZ}DmRP^A<$MCaXJ*m_0d+|a1;KZZ&k<9mvr|-o*hrWlqe)%nY z`SH6IqJI1N@8P>IJ%Ia;`~crO{zE+a=Fjoat3Sqrryteyp;sTp4_;9EcWHoo}4U6S612cCWe4?Xu|{P56Yxc{k#@$H{|U+QoVzVq|@ zb=ZjG_x>tKKbLj@PP+Er7yof|HR$+$YWo`9gln-?|bO8c+U?%iQDe~ z7;e7r!?^CAJ8ztHRt2LiR8{0d6g~T?v_VOVtsf|N$OPbo#u|Es8rHnYYRYYjp z&**KwC}qSs!8_MM7;db;2*tJkiAmPi2g{QuWt&7?FKyn~eiAU#3a?^U2W**35G2>B z{_EDj=2;0_MkqomTxi}shDF{OMAo>GIarNQb^@HR5YbI;)a_lR{dFf=bRU-2C8%W=>rD8czrP)h%~cw$Uv^;!3bxi` zQE4caRmPx(AU`(%L5(RW*wUodWy!1ZP$u=|3us$OnD+Z&I&zQdb}K~Z_R;>#wVAds zz84d|uc|5$DZgWs{Ju%sY7n=n!WUsK*Ktly-Rz4(=Sv6!$qcprD4e0T#tO& zU#U|6?0v0B*ev&R+vGYw1Izg`+zQ5xMGAp9MSxCN&b+x`xfO&nOnYe1?8FhWV!nqHKLr+Y zFiiPFV*|+F0m>;qI6jvQBsXFnVL4^$M(YwTm(k^1f7kn`-%%%PU8wo;|EFcvW8F_? z-}1L8-QT9LeA`zpN7Hq~>I2U*?*^7rRuJqDdHu`G1$_Nw;I99&%=`ub&nGkAyOni) zbBR!#u$=OT|8iPvcpB z^yneYr)RkpmiOPZUT!j`QG4S!nr~l&y6Z;Kc;f_Wt{7B{m8OHkFj3`*tvZdJvt=HCQl(%Y)3{TZ+G-&0P zb~NoBK-tC?p@Z2iq z8E|f3Ic2q2q5R>wRVLpbjL)UHU^&HU%qJiwm}Y9G86eH+23VV6PBXClZ1RWYR+(j) zVH0i6Vdim~HTs;xgx;J^S)uoQIvXqx@Ae|HHy6Pj?%Bw4exglS?v;mV*P1eU*bYWm zyF+bvvKTqOqYKG{#aLdEgwSdiR+c4Wc}b#rM(1wyb$Uw>K~Gxx%4#(BM4m>L6O=nP z)hR4bk>A|2sR1$lSx6o(L~x58MVniY(Bp+;NFLOCau8CJ49`TRMwYLvPDW&h2hmbz zDoc(xTCb$7<0tg8f5vikodo9uF9ackC4|n5Dra;#?O1%Be#-H-&UdV4tgeK6N*;cB z49l^cwOJl;MT9aL>uc4EpI+?*4z5W#_T;xHSl_7iBhY6jZ0@mgI7dt28YxA_csa5r ztB^HSjm+^1?SM2{_OW}SLZ_z;Oih+UmhHC45khj!7*8ij_cNF zWFyZDMnLkV6xW|Ln2$9d+~Zr99D|%r@WZG?lM*cP++l~k_OVj+RA-d_hCBA)=5ODL zOFnZo_I>CwT=L1QvHhc$W5WjyVEe}}!_<3rV)C}_*!}5)*!$Uo*#CuVRC_*iC3b!C z66_Rh|JVU+{_us^_R)P(?h35BaVL7O*ofgvR%6q_aqPOR3kS!%xThcvFJ~kHSza7T zO~uDcT-er`i^0uJD3<-)AZ2PrL?NNmnPVxtQQO|IFL%ZRPF>oPeW%T6RqO^=1lmIo=8AwV#D>7MP$cK2V{zO{*n(_WoDhJ3v`8ctIS`x?j_BMtMCGs(%^1WL zBqAm+UWXHkk`bFP>y&8`+0nBK&6GO1LJ{Byk$I(juIx{*v?cCX1Ue!SV2@C7nE6y> zcH-q3Qj zA`zYy^^ST{OOlsMJ%bTnn1qzFbY#?dbeJ|Qw%7#-&5OlCM}TTsR+xI1+oEmi8^6FE zq~7-{@}jULI}8glgEddnnc)!GUttAFSmFwk`4)h7D~s5Xq%%;LL))H}#ZvFe6!kq{ zUL1|!>Lf%rJ2j<0KCM_*RK%;;rYw`+cu}eRb_Kx*s82#{Ulsyek`+!fvRuDH8OcHn zzh;qk*@!PR4GcHHoPb;-$Y-L;4NNx>-GFif%L&+7p0M0lLZuR_(h5t~&o6ofP$V%a|xd%9rDS*g+F{Nj&xdF*3`FSz-l+g2K`*N>tdavvz$l02LbTcI4E z?RI@ZTfDE!cg>XFLaoTQR3mw7jask}mTP4BX8Lv0|GP%ZB&>VemwYZ@PEgKq1INvD zGkz|xoPOc7Tw#PcBgz?Bp0TG<$8E)dYQy4@`_&-1cd!+Q!@&-&P3DVOp&amRs{E zW4}TEx$$iOdtmvht5;*yfl)mD=F=Kke)6>!G_u^d z51csq{NKRxmrsa}KP!69$C6IG^bQDaVEO5nkIh1HPUARbh2?MCupEEehUL${v)Hhl zhvnzx(|K6_FRuAu`RlKrz$>pvqjMHmZnayP3zqu>at<32mLECx42~Xs>K(BB`0>LE z$_dP^u$&!y{_5Aq)rN(U<&8H@q3$NRIKOADTCg82*QMvGOf6G1sY?d5}N z_J&$88lKz6mjHYLK!``kNa#pVP8iP5VL6_=x#_I1+}N*JK{@mOA&2=DqveSwrdRW=*#O&b=1mF1nO3d#wt)7HxaCyy05#t6OXc~4kgxT#rf zSe(Np2(C?0zwF3nClb58i0R10;)+=9e2vGQMh8w7B5CH+f759k0lh{MPWd2+dYDg3 z*{O102W~P@1ltw$X{`MhBwm*co67LMxLHEc<~SD27xeA*d`Kw(KD7Ofj@t_EUZY7Uzd!d0`aX zgT>hTf&Ex@v9a9qgbAKMB5CM;;2g z^5O24b#`YXtuF`ZJzk_Yy5Me>Iu*uZiE9Ox7KY1yU5R4ZXPJG4>Ur+$p&bXROpb#%?q69Jr^iYCXkWv+ zGB0~j>enIrv0Lg!KwoQzvny9SS!H^GV>v?Pw>Vmd_a|L0n}z5-ROjkg^Q+TDL;s z#RMPSE_f%cLN(NcK}fl9Y=_kT+KSy92X1PXeNfQ#GFo&WZaQF`wl^W!Xj{QkP&^ zUtmr&0=zyC@i190^Ma%_6j7lRNzxik%> zgH%SpHD}4b&A}y~ycT&Qay^q{I9-kt<~evg_sKQ2U)r_q0{Q*(;goYGb5$8! zJtc^&uwx}V2rW%Uctt8!7R&ywPLt!dP&>QT&Oqgyq&GP`yA5f!Bck1j;HGr#95=Gn zjqo;K=f`Xt`GpH3tO<-6p`Eq00U_NEg!g42pgmRlc!(LM&$sUdBcZr~;U>D=SgjC# zGmlnJ;X@wHXP${VH^T<1`-{tFo6IkM*gns8?l~dT*|)-4X+y^(oh(L3yB(n|>A2#X zw}Ccrbz9qU)m=B^vM=9&2zHj)lm?evkJHAAa6v^RK5_V)`qj&0|MmoiuU(7py!NNYMmrHv}s)uzkli&I_`7(LFYbEfgD<(j@muH!SnoX}onwPTr-Ysg5x z-tRAF^gRi$a05!;f9 zn!N+CWd-O9=akV>xt|!m`V1<59K0SK52uwc0>&zId&iy6Dl(`!`5+ng==S` zGhm$2{b+lOFfy# zaRbZeg64$fu3fUO-ES*nw-1!lf`!rLgyghc$+=L5ch_lDxl!d+eJDK8s{Z7J$p4vH{k1U{y<@Q z+fCyNcsY&R#O*s*Sndyt4cN7U*>|J=Ux(!;qTIUe^X-#&BkMMpb((QbGXUJkfbnzn zEcXZH{=ocPVENERV`{^~$Z{(z_W|>{VfpD3hkU-~WJxnHoGC%Mf#i$5%9WI18^Q@?r|-PcW{?)r&$z;Y8=Zna^dcR7dI!KXhgrwGC+D=;^*j&qpu zhwF?UC-^21=K~etI8#P9F`r@?6ID*Y%yAQG&IcNTXxf`FHC8A5oR%GFGD?WU^awB6 z(Wc_KXH6B-M~f6J=B}$(Xr4V?qtJ^Htkt`EV;8@sj_Ufdr_}) z`5jdpriZya%rl*m2l3VNfIefjk}T^>94bOwM>gVGG7;6_M0lMY5%ms)H#!v{GhI=U zi1@ZF*~CcRu(zBsY5ykROYf8oR)h#?+-N$Rs$8tW4IF(+N;r z-FXUDIsHRF{0vUwO&tEqaqN2k#n^n?UL2EgLbj#(QOFvVy7m?zl69+1*E;4;%DFgF z3GYw^Vwy4(^gBn(75WqGyQk!Ql2j$Xu1*Q8`_ZEl7)zxbmUJr zz%x;ey1o4<+uE)X?*$v1P$cKIN6sDEMDZnE_L>S5Y^p;c+b}urv)4$Tv=7N+LT0Dj!I+OGj)4t<3l^2#C8u7THJ8b|GqaLwzNga94La#y;9+IT2~H| z+p~P-+Az~l4buXV2`(*w zW)~%4QQ|Trm!_k?fP$`bAPlu*!?x>WYf zV%bj@_=cI!@uWq*JeFs<7!l`Z8Yk0IR$!qs1PdI&Qg)e?m3b0mxg4evWm!hdH;R|# zC(8WEGMp;q(w6&Djwi7mGM(#;o)L$cm#|RMg;$#i>$1DMu}L1Zld|6|9}a+JdD_Mxeg%N@$d0BuvU@hsio5KV9nUT8RbOp;(w3 z4qIlR9f_7p`zGy4KzWk1rTpSVem6OmX*U%o$1iQ0qI$CQ>mPP{ zOAsE>n~7NYjaeq5(~Zz}7lJxnSkdml()LvCK$sm}vM&aW1v#BdgZ`&|mmInK76(+Sb7^BCxEK)L#v%QU_yHOnF(=QV*ZH#rKK`L_YlFT_~3J z?tv2zW9J9<;gL6gu8{o&yy~-_l4}bC6ZqnmeM=Ao6Nb~4g+N$6(Pe*729%pfb6z(% zPoA_>YAH69tM@(pYKLDM@#{KUL8x3CvXMPni%2De3O+7(%)QgrU2n z`JVTG@Evf#0c#dBv!469uf6wg)7y_9TM5o7JX)?b=YL`*V?j4o<2<4d@bt}rBv@CJ zPucEm_G1n$+Oi6xFq!P=M73pIypoVG=Xq(cMZvT@aD>3Jx@)&Sw3B-9T0E)qThuOP z+i0$~*?8}vFvbcb(2B6}SuFTZVO420J_*%c`WBC*9*nyv2E=UG4GX1b@Fc^{z(}2?fO2^JqP0t^4L(b zd=@#Ut@KmD(NeDUFya$yOa3PgU7L2PcO`94A*P9jQ@L?lC|d&wFdqMvuJc=WE6U_f zwD|k)(7>bS?dp*ir?*?3BKs%7h@kPOTT~fJf2V<{GPMPv<7{W4{YxN79)90@zP)Vm ziFf)Vue85Q{l`xhR_=K`P*r{o$%aoKL4N8GWL{PruJ~Mx1PWa z_$!<~^XsZioU<5xdnvaj6lq?R-HXNbV8&eX0HzX$lF7voq{8bG4%dz|s|@v~sH$KR z53@QdHc#GFFd^q&sL@WzMb(3`pBm(l98+x#}i{sab zELjyDiVx+97G@bC&Ub^wW?GVujibB!o{zG60PRKGJzwwq&vV1^LjSAII28Orpo)T6 zQlG=7D-u*n8*(iK<^k_2dXPZF+n^2RDMQnnuf-5dy>|HjK9L*48daSq91zQ{)&7?C zEU!uWG$1~OS>EE?hhY2yk0N;Z)V_(4+bEMuI0gT;dQ8+SA{UreY9ECPj*6(%_MFz* zass3<8ev_*V1!rYg$C14?x_6Li~N%PK?&I|#4T{Z8n%Om%(; znuUCs#ssqdNY4nz&`EaBw?WI^gHjPB7Y(0ntj=IhEP2VeTbX{a4D^Z*6(Ib$O#FE& zKDdD?2tjZ}?p1NByTx*|Zz*iv8?Vqx>Pu3gj!1l%J9rygtxn@L50|cn=_G27v-!Tv zes2^KhKr~1?VPVAUEzSkzrB+z8p%`sggxH&RnCrsw<1aWvfJrVUd(zPp5H61Ovx}# z<w%_WwT?7S_QO{!KS{_Jf}a+CoMSQC{v<5$`hO(!H7eI`vX~@Zy?lr|%YIi~?PPyq z;t#rdNk21(IVx4UYf3CY^Y@hC- zrwaFyil`0N6hGd=!)?FN7sK;nGpR|fW0HHeb@TZ-`0rmwo&SqgT;^pRwD%K(m4?T% z4bpZFm>Ma_HE>OdSkj+s4_DJVOMA6GY*VMnC%T0`%Jsp|(tb0?x46P?%QEbLsYO>h z1kExr=D$U%E?3Ey=>}0C zrWlwjvb{}Z28-z<{w4YlFUME(e#j)(Pey!R``CWWD7@zNUhJ}EhOUjLU^*H#ZILO(CrZ3)6Qa&dDyE3apxdD;Vj4LIXZ{86 zRxUsq-&U|`_HU;1Y+h&e=oNf{-*Oa7k26_kAAWz*STJa}bKQ(bSbJ<2Q>%8DKocXi z^Bmepf~BER@!s2(!w;ZA9$4tL$O>-9%}{okzq&}NEL1Atca!$z={|OIvXjep7H&s-4;h=zU zZ=`Ng6d;8DMSQhPyP1^giza+Z{w0f==a-kis=Q`|=AkyqpBlGX%_A;pKVs1ht6GtX zBn&5X0e(_zsRnUwtU4ft6Ea1m+B*|(_4}eD7SC8X^i$I<0h&z&NIx4?60QENl(yqc zlWNfR(gDD!Kl_ryHImnZ#YJMCR=*GJn;UQ}cc;9XdXgKe?l_3{xfxMC?ipY9*bFeo z+lz>rKNA)`A^S1j5aFTSrb7?1e%}m9tmL?mghCPxEKHhj-~PBbz3bk+OqHzkGSS44 zZnl%OhDS(Drdx?>J4O@h?qUSzmA)wDG+;j(!CXKr6el?9B@#wk%D%%Kjo@!kSY!%2 z8k^;U0rJR9bT(lqCiiW3d(&0*gw010VGzPuc{!nvgE-8H;S0OI|OZ;=;>!F)3?FBqBj;z(XDmT=ahuN&siHN%IdO zaZ=rixbIfj^bcgl~0Z@bj}TPpLs&EAQH; zvtbwD>-Vf6)itJn-SO7Jn<#&YHky9W0c-e?MY$J$@-4lMwxOy@yN&_tkyI=o0Z$^p zkJEy*JvtyR1$-W zotHxZP-jfgw3%Sgwoz&g>g7$@q^w9XmoT}_9KV9u0UTXvZGOpR%XSvm9DZ0!RRAal z&+H(DYZ_NaEe#_v$xdWJGoIZt+KU)vK*uU*l5osQ?g7u>8 zuCSD4yLXN<)zSh(2*0M)N{cZzdQqAG%3Iz?>Wg=XnkFSqgDt@HfdUV$NYkJs@k%C4 zru9Qqc_n8IodfYF+YiRzTUZYiX9R|{hMLUFgb%!ly+n*-Y`nfS$=UO3dH&<<9O7P-M03pz0h$bx{}ID$tD4oWfdf(Spo0r_18vz%=k4AyXHd0 zzke_LyAXZ=)=PUgnvB&5q=?^XW-`qL<+@P**@K;SlpUf$jFB`738SiVJz8(UOuEcl zZ}gIt<A7#knUN`|%PzwkDyy2Fja}v6+u#>TI@^22;Axt zju3P>|1Yj&9f+uKuM0et{X+S|afHVb94H}W&pTQ}#cZ>~Bk0QvjGXLSv9_p@np9R< z)#mR!2MYTW0r3EwFi!kmJu!1PQKAb-zK>=LKQCw-It=92GC-(edFPWaCScbun`(1DqGSL)>;s@)k=xe$Qa)iv)d{6#pc<&Y8pDxm_l}}cJMWGIJ zmfe5ik#*!~RzAHN+8qte-r@V`N3p7J!RjtwQ z)M$=dzI0Q`YmfXC&2*PTm`qw}>p#{^1jMd_(|*((R)u`7f69HO_AvqZ>?kb^sDiHM zBgCo=ygWdgrv z3Pi?G+zOxG7{(DO%S{G)yFWBav7t zKIX4zu+i#g<@CZ-44CQ#Mv|f6no-t_>)M>nJuFwrjv2Wnz9VcN)or%eGb%luhAo7G z=P`S08N2x_?U{UrI1;tet%Z{@$sj7O>fYP1M0;14Y_#0c8hl=L{~RqE&{4yIVBV-X zg3Q8zmM<~1DwirKdW*qKV_=?$QD$kCTYXnP8R8{3)OLw8VQ3tnrWXRJ&c))~^XRVR zh3|R1A%&pjPmG^JUL|U7nAhO&RvDVMCz=W?6Rhx-!2bM=4C>furR}a zxkpcR|A-ZK9kg-v{D?Vc)PWjMb8;IWLE;)2@6=+0uljIJ{@M9Z=23F)aKL%R_fq1d=lN!JrRX7ix-@ zA9Pz+^MktZm44PsOAoOTTo}B;W8{P~GHA}hRxuqxmaz8T2RyY5o%}LsS2h$gSBXQ> z_-}7ss-dpm1urGf@;U6`iC%YcUuKaBDw=ftwm}?i^JFbJgXS*C!-ArHE|wDzMPE?QAaSfF7frixY~$Qt+}SJ z+clQHgiqepK{vcG(y^|G+|3-pR0ejl*)VrHD%B;8s6=Y$(I2DIURV1qqb+P;5VYov zxqA9$3O>@d={L&(N(~3Whf9lLUl$9P*axnRD*paNY8Nj{dem!c)a-0S-~XI*9~%=>hk$F4Kv8#LNZzjF4*`|51+;!Hqy4SL8}sJCDb$H-47``>$5P3aA(V z?+DBiFcdGdYcsXr4}<}09AGE#YS|6A&^qPtTL!PX4eNVwj%i(=0MJ4ng8(jo{Y&c4 zkH0jOC~%Q#nTE*30u=#15P|?fVTz-6x6FzRxTTEeSp6fgxj_v#IOrC!-va7M=N`?* z=Dk*gI461?_w_muiYY&z_9g39=mux8A5J>lj=;T8cJ9U=BV>&%p*_xwW@!025~pE zY?ZRTFWBB22?d3JmtN|&o_3rTQ}dk#EDBtUTzD_gT8LvQb^mPa=wKP_$xBW2D#08 zc$&z+mGi+n?|?>#c*+QzXkITEcV;p>%BHs<6KkV>%_)5Xenw4?3nOo4?-L!&5{E8Z z7356EKR5=(DZA#9TTpUMN7|zL7kXA0$tIqyJ1`{ig&kV}zTTotohtVWXg5yot{JVB zatqJ=mOgYIJC6OS;|GYPPAP+RW(ewmK4AXcx3r+uEB2jU9zW=CJ%Jx2nPiJzq9{Ea z%_%D8>5xC}f1o6`P|4Z#cTUD)#C2l#{G(@+`)TR|9bQO=etoZ+fd@B(KF@mAFDVnp z5~+)%*-OcPx7)lF(XlZ8mwE;W$rS3i^0-i2Pgd(oq1?8!0cB&xgH;gT)ut?_+gNo@ zj<=SW)DlnZz|a-vo!JiC8=P|0Y1|95Wm{y%`{G$rKHAk-jBj7wbv#`DJI%fC{MCT9 zam$AO^9zq?e8g*fUHnkXKk}fl=&tY;n=3k_EW+T^8lt{ALH8vyRWe|S&VR1}`W(96 zC098x{Cv;s^f*F|IT9gf=Zg6pa)T=1kcGckS&V5$LIN>&{Xj(`KjPEzOHe!1@sAp< z{Kr?F9E&j}RKrD6q}|&1Y@R$+)(MUlGrk37jOhIaO9az#!NL7;cV>ac*{4kUiBwo9 z+uQxrj+z<+=LC~SGo+zOQz6?UPvr}Ihm3loK!P6`g51 zKH3hR9K}g!pg)aKM>!J@by_s)0Zkh_ak=&R%kv1VCrdYkCv z7-&yNDy<`L&{0n43XS9#!%@$6=~=jruy|4j(+t4tcr60YiNJG<1hmF?1(8H_Nju8f z599I9v~Pc_#Jg$3uUk{>1_y%>(N8af;3pHmjF+C(9!diECF)!@-o^9ja~|Mc=r#2% z0q%w3M^XG}_M78jZEh7C6@qZWt?4hKO+u2A&EN9LTpc;bc0RxSj7xavIiOHo^U?R9 zhufko-mQk2AnvL-ed5Z+H`!dF>NqpeJZqV6H|c03*gTa^Oto-lSE$*c$2#r5&4@q7mj7Mci{Q1^mBJJqlk~HS7)LologzV_QBxngv-ZgF8$j?BFxzu>`YJ zc=k{`;V!^4=3JUa+{0pv{j> zRMJZ%Us?&~vZH<@O}^#o38^6v+y1^zkkE`y4TqenC42FQHni4Dn*~ZsUCDbmv=!)& zY?<`?A6nZo+6q*+3FE+*;;)#@du(vc(8pQ4V`1ul4;Q9^Yf(3UKohwYWrh02G}JL& z{W1*3&dbFH9+yAg{b6{uFupMBA8Q)(QsL#SKTWF<-a@stiCntAO+WS-1=G%tI$|w@ zWta8Ml+F1YoIe-+24}k)Xs#E7mHk*idXg`1b|{`d&G%l!FEB&nj7VkujZru4*|*P* z`+bjGBL2o5S8tAQjzbAFUguH2xL8q0atoa2^8G<1o{l%TO%c51y_lm7O3-+|f;z@s z59n5(mcEgKLUi30sw<|fBN*n1A?cdlu8PZ5B}bV{B-3w8eV$o=F5pR7alf5!%(dKk z!B9GduS*oVEWOQLF95oBRY_b>;Xi|4{QNdI$BNyjtP9cI@!NPnD}o z;&(M~hGbkcF<=Y4Fr;t7{!d3K4ggY<2=u8voh;Di3UeuX4@Mswa7L>;Me!7oU5$&W z-303&kMn>0#Gn7~{jKowl~~ff|FQ%n$sbyL==8r#xamjFI}gbCy~wbh&Rkq?(BC;z zUSlH7Rs;?%HUIj80%x?rHw?+m0+x8$*2#nyZr@!8)sg&@f=AT0Vb7LCSh%nME zwQ2^y(ZstiqW+@Xbxi)kT#Y>s9Ogo5R3}ZVXbm_PzH&1c*jrX!6=t5nT_mgyKstEe z$N5|G1VB#4m=Qjqq7+58RQ{RU?%IBr>ngva_dIlWUXt;M*O4xp(;PyDdnv^Wl^&7RQcD)xbb=1d?XcW9WM?mRHAND^1C_WI%rYK zBHwv`5g*W-=q~o$qQAp?_0IkFo5iOJq`#=K2DxBa?(vz=H^Up%F%I4Ps)t>>_ZHbk z?G$+_Dt}KqsRxGFI)Vr*#VWH9`ywt|vH4u%FOGTzp$}l3DiPO9J($pSV}406ZIbc4K7(z)N=2XZVQ~WG)G5o>>IS(8Ya5!4a89JS2 zy`5VIAhgH2oD&4H%i#H=(5TV#F(GU+0DD6lZ;&^_1}G{?p_b#$!HBcc8dG*GtzCKD zVeZj@5K=P<0+%y|dcLuHZRsS`w5CaVj-~1rz8Fq46@=8&+oI1Kg zV?h|}EKeZ2+uWH->f;aUy{l$)xT=g{64v##h{aV(v5$gX1S#9tV)~#fgbcc{sFy>q zsgzfGc#5mNzFoQYgYo$m)7Ry2aN&95`@(0q5!KULrOD~KS6{eC&el(geNDeOXA0)}l~xmt0T#Dd0~guhPp5>|tojV;&xef`3niZHOS@!# zIzmq8qWI3ij=nhUj(J6PHiD}i(NJ$|jM2YrFzGv%-+tF7?=fIrR*3gqPC0AEBE=$%()IeuZ@P^;A`I(^yLq(aqth+l^ zAs%k-T@OjVGi%_#DgOMUl!m_w;0}-Bcf9*r*`F(62H^8=mgR4yTx_u!N)zgOm8F*N zKCNQrtZo+6Hn1-OO-#{~+7k3>RINeM!%&*4+9?NHVf1-Naz(Y4T)ioTU9%MHxXt;D zZ<@74vbgSxf4a>*YWETWOVx&S_YpLE4KuQ=2Fqb(lNwQUMYEXn{N+aIx_X?-T2H?>ap>JR>m`%yhEP;8N5t+A5S;%}!DZ2qMw6y?uSU6I@?|jM zhp1B@a338gXXvs{Ya%Ivq}FauM*IE+nvvC{$_oZ_c;F31?fDT17-4e@}IWQV?b2G8>-@aQ7nxT=Y{o~7a zPmg{wq^9`h&M6drOFGBt8LvMmjcCMhbYmz}9{)gYJ<>)8wwBg63^VcMl-3w0Wb0M` zwCEMh8x^<4T^O1pq@#ItcO2(+_2CJ-siE*)`(hZ0E6iv^eHAJeE*LXh^xBH9>7|R) zzesF+)!0oAUx|_5DzbgMrr`%B_mnJy%88)w>Ogw|WcVEc^EA0K4X<|CdH@LJs+B-6 zwb(`EYv1=S^~qRDB;=YCG&hM8dn1-){sMm=-ah3acd7ASfJ=8e;)9v@{X44R5~}@9 zx~6QHe$tP=*$z{}GoYiT3-IVYRjs^mV}umfCRqA>VB17FLfMWKWDc|V4EAXN8#g&1 z!&~MqvZN}q8S7FBhR+lglNPMdP`Su^@nXb+qIAl72NdVmfk1jcTE_zoNI^gB_k;Y= zjeuVX1wd>kswkcAz()OoOION4IgU!o%=sy5;auj8fY8j+5U_dfn)av$@YZWPL?s;{O83-DM3eO-!)=`u`m(;~fu|~UqdAn2rN0pY${$o)& zx4h3VIZ7P!{1;z$&E`e}~-Zj@bareSo_BcWOn@7j34n>t+Aa3OIz;5c6z-k z;?q`baNA+PjktO1_}@E?8U{RgRjMOjdJx1Au(K8cPt_{evNyBtc*-%&V#80YR#P~h z)DeQwMo_S1{_$70gHK#n%KOFEj99us%RB96{*kNTD%cfZCnVb8$N%L9lUVr*)HU&D zZ(0c&iD;$(Ch?~g^=uQ{=A|UZfH-Kg0YXqz@E=WFSCM13QT$wyH?z zCQEk0rCuBKu-Q}irVda_jJ`>ldalYMv$h*LVLOvaUmV&0_P(&IH!JS6(-j@YfRiha z|N4(u2k0tJfE`4;5{lf7LuUQwnF#3KE>r?)Dt4G_mc!y;kf4vuQyD-=8D&`sJbvzm z1TDq>#s7P$>wINQ8FLh4pqYj<0&aQ9$;bm%@v{kc=Z^aTE2R6hFPUZuR9Pfdo8_Vp zQ70g(R1?QMUfOjv1|X>Zp>0`FFpiVkjwgEB4f7zE;#4(+zv!k-HsI6A>MZm30{AnD zx7xoPbNFOa9f4Yd^kIREQ5MZ;p2;m#f6b?995MkH?+P2}Na7DVK?=|et{A|%0lX>6 za@RxBUtD8-TgEp1ffseMQ_qMgu*3kWTy<&mH-CryuK6T-NBlAmaHUagxQB?C5H^4u zqID=q#MTRcU(5NzBl+Bi)~49trIWkXJ?D|tZ-Wt8vwU{lJt;yWI<%}(h+sR*|4m~(&}f%c@vvwp*P9abRc0Q*~eM=@(GBQ4#7Dp`^FLb z_fk>X=s81T4t<4zeFEbn86{bvza>=izg%r8j9~ee=N4Ia^+)m*aNzThKk`q=^qQh! zvX&;~v3y=&u{0R`+Lpv%T8HA=D;q}r_YBCXs8#DPg?oVRIrOC|ybg`NPSjDsfdIR`0*t06u5E z1*MJkj0N@sw5>d{N9=ZQVxG3MK7hxW!{fwYX!l=p9|mZ&rqrUTT5oHPjNZUqG%Dqy zD;aKmuuR=JAjcMbyRuA z%QQ-lvjo~fzOhURv<>D-WNfM{7pD)JCYy@wnCn;9lfxBlHKlBfgQ{9&f^}bs$XT?= zEg?Z7rmccK*kR%gvlVc28Ba4m)W0oFY;T41|DDdWr7k+1bJrf)odPz@G4 zg6(o&Yp0iSxjGcX3A9uF{mbNMlr zrQwO%9l1mdds58p!34zfm6tNLL&K>J-s+ORv()Qx>amq_>T!ymc-708?_`Qh0|YM^ z>cllUB&F_F(2s^CT%1FC_@mLjfC=6>nr=xX>xXh%>N&9!GY-y{Z3*NUzo+L8%>$Vg zeTNtdj-y&o~-yJxAdYCQ!V36lpAKp2@RO`;mUP5D=nYeC9o_%>VK7 z)q2n|%3oMY6^x(_1wmEFp*V+Yt1}PWu-PV8IR&@w@K<7g-A51NEN^t3>-Np&=eRoZ zGPG^zX0;IIl1nzx&4t7ss(o!i=sH`7qhj1mMfg5$^uKfAYu>Ph4}?d)c!fY(q#q&& zN!gVeIEMAu#p8d>_~oI5GzML%DE}z#@)V7-S*QPjEWy4G+djXwjux|bUYpLcenq-$ z!(Fc8mdAmbCDQT*vhfhX`wOOxK#?_4QrYP%^hACbHPXcjoV?aE9 zYXbdiI9Hf0c`sLqc0;~d^P%}4zol@gI$otEyXsBNxs)yuNHnE^X;_b^2h9X&z9E;- zSOP-eClglr=uKb%7wK;H@d8^XBHAn8seE$CrN=qY>ZKK7uCm~GCC2!xWCNroATmH4 zL7eO+Gzf6wiaPJo-)Y5*7>z_~#UN4|5Pz6*btmHU-Zs9}xdDY97}& z0UwMDk&`)rbW)xD!KUEHk+gJHH{|YeGa5;N@&%=`PV_vpbe4vO_g=CTDOjdbd%lh( z44<|OF6sD5s+ICDM`OFZsZOzow*|o3cCnd{nFVj6rcs{b^XE1_`)=&F#1qAvRx{jKhomFj^ruzRBjSC^h|BkvliRP_|uJd^nYE3}z zH@LulUnJJSI+qYws?10|T2JVWv|-pPRK{}DW$mHuflB@N&7eabNP7la6h>s?{)65nvm(R) zi;_$WI{fTROW%6}C@X2K&OP?*3(Q^o>Ig%UP>eqEPvcipJMlCrmz>trR(azbHJlU1 zz#8FD2ODIqpsTX$C`0Ge1*QiBNuZxAx^?)#-Md zArk1kZ9v~d9Hhw{bIxTwmZ1uWO2F^Fwb&_}cq35{8$$iAnw>5XLtG+OkU$oqJ_WD4 zwOQNL^P@AW15->Y2}bLXF)BX)dKCdl5m*4UP++H5rY1hA`pEz@MdTx4 z1DUSV+U~b5Wn-Pt%QL$zhpqDxQ}!^3g(5RmFG5!@vn&olKjx8L`Ap&|_=yE?$XtRv#}CRcHRK|$Zm^u)>_4+3 z<-2jCWlc&oS^8NFp9~MldWlW%G<%t&VM6TH`DO!ux1lV&bY$Hxk%CqeD#jz@$5Tgi z!ECCgdjX6GCN;Q&ftQLjzp{_v8=bb5976*LN3!{y?tf)D*DsF3#!1|e93=Ts5Hi1< zKPxFyXp_jN#RGpl966grfi$tkZk6<4bl9c3Pb;=QyF0zB)f~2e79iepdebceCfWK* z#WjbkM988T_hv`KMzyfVEsK|(Vrt9KNoqD2*>3Xn^dV%n!KsWjVis4+R#Y+@ah`cZ z5iI{pO4q2P5jpLEUA?AASys-#Y;9*g&ZKX&MoM*&i z?x(pM+cl2Y>Fv^I*pSlT$;#eWA#q~kUrK}9r~)K#G1fFziM?PP`4#=hUs0YeM9585v$`+_`BOmnGfQ4r%+T!&*cpb1>r zaW(Rn3TBeemqg%W^kIz7y-+H)`viiApgvRzUaqp$+-Z!y$9`KP;dj_4X-Jbt9#^Ee z2g#n_Rw>9S7fj`<5;s0aXF!9xkjlj-g~E3lq%LvOQd~ZTU<{FWI}WhDI%a@`X*!&s zcOiShN`N}8vfY}}QB zsK@#TauXGD*757*Ep^l!cGeWP6at_D_fnRHDuyh@hwBQPI{s18K1E9p-AQqlRBx|l z?65CoP&kGuJoB8Sy!?BqFq*5@@V@A=(-~dCTjD?ChKX?ZpEhMu<*EA~pMOFXOZ5qo z;GPBpzT{hEmAV}NsHUt09G&D=2S_-U-A&LRbyR-tj9`2`KKz{`#5M&vrRe|V5$JXl z>9vH`bsL|O={bc3+Z+{$+oG~25-{#bmv_^jTGUC|uU1(uDI0zZ_Cq#3fy=@FNL~#B z43D71Ifq0Qf#P;;uP;a=h?X9%6o*NE3wg@E6nCrw(dE1D2$wxl=NT@wui_9BRV<>w z&D1L>UQP4Mv~TIL)lu^w!JJ!UCNd(X{P(*i)OrHG>avu{bYQs!&$pGik(|bA6!eaM zc$oRh1x#4?^tsQ%k0a!+^EYsjfCSefdB$N ztZET+jBQ&zXa+Ue0Elyp?tDkg82WB&0~1v)g)3BC``fIbLw~MUIs2da?}eq7Z44TW z#~AR%MZu%>uUtKMmamhYF9LkL;@R6$S_lH&V3z0u7$ab%ciA~Go(nR3z-U*k^Uf?E zeBpLoPxr;IG`TU^^`tD$H96NYVukDEm-b{}FbzVMbl7bG$ukXiBB>9rp0Kbz0d3nt#!e*(By?hJ?g4eV6> zJk#K8ciPmwIoDbz%|CuVpux3ViSbv+aLP*R^rQ9ZuJZAS8ypkD@Q*se45%6|8s)*Z(bg5=70E6;C@4E9d|>Q*{P*3R+O7QA zp=zbYiLn-Y+<64J>xNvUwYV7_)9TN2>%)L#DQy;S%x@S18lc<&VOkn zR`OrIafL$f7!Mwk{nbbmPHy74f8$nLWeAR^Wo;ah$($$x{FiOxTK^j%2toe>ptOKQ z@&te}#90M^Vr;3& zASslIN#7h7?QA=PMih?61&MsB4)-j?9wfi|5ZfOuGLe7i4&4Nqg=Q5p{vNe$rq3?X zAhXU9U>xAHGer7YpP29&a?IwLlM0&NWsIKQ?y}*Ocd}p@850a>t~NC-IrXLiM#N@v ze#B_gq@h3T&kV2{nLryGYvP;mhlay9-{Vr6s1Up*wBW; z2;r+`{nbH0J)tE-eG!; z;A@h_oUWiZ>DR`orG)&R`YJP1@XN13pYYO?PbxYGrXGc|9vKu#Haa;Z|CD_AnbQ;? zC!9%Ts;sS|EIuod7wks}mTA7o--$~!T~=!^BIO_CDNA&3pe7sm8R)WAR-w)QI>VYA zGryc|b+MxJ+hnwrD9ug3%HAK3h51Bz%H`m0N}y>uyDmFp!L!O?BDT!=J)Wl~VhFfJ zE@nYy94ouKK4Nh0pZ*n=<)pe=I`h)T&Kimsbbn==>NL_nrIvB%2G-^$?*5iTkhWY9 zrEd@jE9QwR8&9~7R*$PYGP$&xO=k`wku!f7h#E?`fJrRU53({&UhvO%vmK~Vj>(O< zRJ;@l{Eudofsud#zhK^Kxx-8lx9-9M$h1BBdn()IkZ>Nqysf9UEH zm013y(5xyG#0J;UE`DIS0Lq(oYMP^!Y|#Xx2)2%Yy!@)IDJyjN)A?4dB6)&>O~d$V zU)eFNxY|5`_k|u5M3~4`hqf75C-G*k>33Z*nj)+leS8BB!?zf@jJ&2Q8^x8jD@B7} z^j6hzQ!NrATohLsT48p%1ar1Jf@S_qgGa~%k*`lazeUHhZM0XgO>7FAj?&E{SV8(U z6;fAZUI60CUoOB;H}RI0YkB!ug+d%nK14YR147P4CV<}tk z?o`&RFGJ@bGqL{j#0q-|%FaiV#)m>)v&>Yx&&`SNZb5@0bH+%|qYYJ>-C@2lfzYgM zX0uF<-{TvSwxsAQvWKw=+U!K3fTO-jOV18ZiXbcmTfSY^l!U@fI5Zcpfay--mmf4$g54R@Z z$3ZrIr)rQRr%m^3zO+zzk7G7V^l9m(>Dbm{64i%)5npLoTq&GKp6AanePg6~uHnyK z7%ZpByE-@h+1b7CivQL6`4GfBFKd3?dxrHT_<7RAJl>@UDIdQ%JA4LnUUa@{KIp4` zX2NT)X&Zb#1sUC(Y<_+CqPj`i=?6)^DkdCW zp!d=q_siwa9%*hl)ZlL!^_92{XCl#o_p3r>1nUP|Vm48*(i)tCZ^G48Z}mI3*WG85 zNyB6j>Nf4(GACHA3RtGRQo~y$eSh16{-ERxo?P zO0g>cJ@5nem1_Tu_}qzk(xmQnB^V(9pBo-j${CU{Pje{O%UAk7a6T;aGsQCT+mjyV z=EnGg@jJ7v6Z?=eW}q+!DAbl%dEp402SE1kS3{3o_@*0@Q|airphITLIhSzCsMq#) z1hd@|Z6YQ43z6)nMc`)rLa5S8;>x>b&XTh_vR;geWtW*%fI3K{aK#YLZCSPnn()~W zkI{<(7{1gGj6i4-F8&gZ^Q->lUw~CL1^_j&*-!b>Z*Dw-0g+^*ia0R?I@jV#(O&}; zL9=Mi>7yM$%WHsc9izyB>t!Uz*Pz0P;_Om9JCDFZPiAa8@+Z|1xA`2$_&np~p1 z)@a#v7M`EBeJ*aT&zz@pUnh%S99Z+!wC(Q`%&fj4-T7B03+K@M)#?Wm#1O$8CYm7L1YFIqgp5$O$GX*KmJW&I;z3yJ7i9Z$KL-Z>~sY zKhGJMNKT^w$~D;!u18uH-z9R|<4OQnR^YoSs3PGc0UpF*ZS+c^#CHl&R`@!OD@Lw9 z?wZ`#<7CGvD5jGI2#=o3Yh4a6zo^u1tD~B@rMnyXxr*^tA}v$#-#(oJ-OKR+L?3B2 zu{bnsT!fu2`-=Gl4v}$A4(}zp=-u5B?wYvqnbzI8W0$is_1yo8#Q6&y2zmON#@1Hr zm5c1^Il*z{Ogx4DgJ{ay#zVdnCSPo1WF|}s!>YV}DM>uJKXDu^E`YJ%dCP4sF*^3v zz9M4C8B>>(C!hEf81IhOK-HF=tnTRJ6n5=hoXcWUOhb4j4K`Bh^< z={z?8Q_ZGYh%HHe_aifnm4a*F+etGHfUl-@X!gO9!s@B|U5!rem}axO5S`s|$9w6p z*Wa@sD?h3%A!P+BY^)rRj(L8O-FnX}Kc@P-BBP6-#K4=Y!Y{iyYtWa!B%G%s?Wp*-=K}4sl>pu<1gFlC_9PMq9 zMJ^T9n=lY{{C`8Z8g9q~vD+R`UKvxALlunaa zG_{!84T3XtyK=Hjvh$Hodxm+V@Wh8qVC|k>!{XMI z$M{AD_b-16gGGHEH8hLjR5WEf5W#Hh124#O-Q;EXn$0Ow#_Cn?&@00k=tUKl;)vs* zpmCo!e`?_UP(AUtM)lK=N7`1DR&h^ogU_K^S&I`#NJR?TUd9&vLkNzp+r3AQJR+fv z!QJwI6~WB{xyo3KXDQnKX0qn-cpbF60pIM~A+@y$A75IOUWEs2Q?dAOHxcJ+T2TN5 zq5os*EE}R~+qR8#BPHD+4GJiYbV|2$OT*AD0wUdmz|h^D(#;GZ-OYe>clfO9e!sjw z0QfM&I*)Z8`@U^zz`6WlE+!!;^R+4qZg7ymFkk$6@wDm4N~24x(M*35LciCBCD?wu zHd(>Vw?OATS0x)0>UC-x?}u({Vr7z!4w@UeOCbCO*pt9f3Q}BG9y{d3m_Pxbi9eup*zNq&&TYL!2elqiE2Cl*$zL-_L8bzJTQm}rx@8>bBB5VF`y-WB& zfN22x)i#=9GiQHbQv{3|Yr}0vZYlcUSDSzw4d?_K4ER1uo%4=7;aaCz2Yz=C(gO}o zpvc*~@_DZ&2rb(pwKA(dWWs`5G-_K8cl&Sc9x*uE`(DOMqgYj}y5{LBq7Mq*y?C1) zwi$RI^k3Vvefea@}>lL=7 zPr9vjSikvv!@B{V7*Zd`5P&5oiNNINACJV(ykyPZFzlCCl00lhXw^ndf1$>suw$VP0aGH3aVlh{2s470JadxgVG zOuq-%TTqZXT~yL$PLsO+#e)*R_OKc6rDsddyt>{~%EAM?`C-6pdnEO;-tB1XWr-PA zG>NR?D6_22hD48$bFf6qitDEXKy~o64ba)V5ZK#04u#vCY}8Yy+3)x-EJQSHvMqoZ zh`@et?eS;6&RfiPg93>q*VTWEd@Y8CfDXVs(v>$*DbDXhfsBI!@9);2cL z!^Vb$gkvYPi6weyqb3-s0I)mi7Mj1 zhV!TfH8`#(ECqXS>4XH4F>LYW2?RwVhFM&?HNg=_Ja{~jM)DI1GI`9eCifH2718@q zfSQn8IN+Z9xxWFGCaSjAq6l6oW#eGOl`ErEav&tP;gTA%|iDB)XP23+=yM|S!S3t!Q-e(yoU*Ac-c56ku!$HWI48J^NYjj z_z=nA^!ajy_|tD*19?5Zs{QRK%N*G!-%RNXu9pE_`>GW>EN=cM==;T1F8TF1-guORmMwi^I*+Lv zr*^gXml5fPq8_?O-WE=oT+Yf5)|_%2=I)J4aqfg_ywHq|CA6W^?xrh!ijj_YuB?5rfGDA>q*{E5{MNrS#C0OxsTRQ(XNf2i{yk;+g#^k;uLVs~mx`2Vosz!B#yU+S}1wC!?UMs$dIqM48b6PqqeC%gDgr1RKLyzn7 z9S#jFyU{3uU?2wO!}0iQ%ZG;f^6dx@AybTvFzum*FwJBNlcO_clmB1(_J~hgv8VpX zO2@F*x&(2*18+WDnegRt>)xfH+?pMIX{~ao7O!c@-n0-~PHB}^dILO3#RY}`6o}EsTggvlum2mE!W+-#rnaB>ZN?=RZpnlP^EtR2$Mr!bL1>T9mN*Y8gLi6%Wh| z^Aw0G*^a1jj$(EfnzT_*Y$nStG2aYd*Dx8GkWV>9nvA_S{TBag12X51O}(KjfSS&W znb}9~sPe0`^GnB)8@Gc*`%&tOQTtx`bRa?5E!4xMapDV8(MW{$yu&w6i^7>tl(wrV zCF_C+22gWbxAu}Hj@$hFlp2{Om$6i*o@=kwSSz1g5U0DHC}hf*@Ex<`+5NZj>yhLY zx#81pl05vnQ^KzUb%k$K@XZ9PgBmR8X7-fIFFK6$G&mjGkJx>amVwell(I_k0A}?( z{IRX@#HS^P(NIFDi+=ON_k=s-V}+@z>BKM-$66JC4A@V5Kzf!pgfSSi#`&KJSEU%6 z1E4O1!c|(|S~)le%bnCaqDTy{uLhUFegJ`Y4Q4ODdReevi*teh%gc?v9(7lh{3d@c ze{L%fO?xZCOtc5UCHWI}iNXa}?~;JGK5YOGKn{D?2Dt|U@$=_oMR-=a?)i69xWpaM zG@HEth!5q&Uku-swLjERC!5R!M@9vJImkW4rYDPuLkZ&voA_4+gt$3wZBK?lkv>;^ zHe^U87!{RP6|?|YNZct#CA)mZ5IFv`@sfGhX?|oYL!7IuGSvfJR!l;-X8i9_#kvge z?KCNy=9a$qFF6|nOrd6vaO%$k-z7}7MHx%hr`h8#CHpunz%3yZzL%J`=fJaUlk%_b zv)G|E{Z>p|tA6Z1k+=VCCB8Y8SJY(m*$}`otSI!G2gF^29*KdA_<9H{Y%+16`=a(1 z_R;~O>?4WW{!@)NMy4NlRJdntc0V%BegA8Qb#i16SQ`Mx;x`b~JL&&lM?A0A81~!= z_JWegzd9Aftc;NC9&JnmRZLo(oy|VgjeacE&8z9I{_2Ita|-UQk>)IkX<~+wc26Rl z=HY>RQTs{vX-2y$a>)VsGfUf_J^nS{j)@;(c{o`4nm`XCSWx>fS}zVZGde$*12q=l zcWtd!mMn1dS6{?Sm;xpZ34vEMG$p`vUtib#UjtPZY>+>KF~o{!-)k>6tk)y(Jfdt@ zkm=*J!;`@Wckcxuy30bQg&}wmSA2VYbetM@-NUw_maT^e*FCKEP!ff#`Z=`y%Q@J^ zyjzxA2;902h#E}eTv?+P(LKXUsIWvQ9c{5({~dlB)Lw5ldM;m#$P36rp9}yb zObU`NsZ_b5Dq%l*p1DFRK;_}@9r4i1{*sKE`BD(N;QLQ%3RrpIYsg$t-#S&OmlO1E zJ{WbBEH5%VetJE5K>_-OP_DHUU9jeWJj-nBCw0g!Nz!DYPf@P!l0!A(SDw(&VYpQK zX2uDOcH4-9+3I!!ySPoJ^U~#v^y15Rw_rYCCVwZS_1!>-=lpXZZfFi8ACqAZEs!mbl#;czyc;${uT|oFm&$VWg`~Gb?8nOBH^}8-3aeST ze5a=&_6-P=j-ERerQ&l3JeDd%3?AL(H4x)M#7!9h(OJ96i)p^#HzO&&$DV9cD6KfjN6N6(@_FqmJn_ZV`n5w?pm z^<&n_S*EkWpcZEYog-E}qM&oUAMFcaq@t%M|hsGR=bMxr^Uh@9@>50epF3 z)m<{<%7I75(CUH*6Pcp+DR4XkV8fw~-zYV+vJi=Iwap}!6p^jv=sJ4JGp7lX3A4D} zk!kZq@nYX_Berk;ELV}T_7ZyoJCElz#{DAs2Qz%~ULCZ8zra(MhQQyjyeF&z>?R*m z>BX5{KIYtirsu#r@i>U0S&DqUOAty}2lDsvi~J6fmDU{PpO$*${cw?Cx+3m^G*F4K zx`UskS;Vo)e`uPwVawe2_sg^d^MD8;-GrIvl0q%zo|Uv<*HVpdV!biugw?-4zE(QC zbL_b*&h(y3`$)T#w=x-;cGL7QT6erdk5W<@YR>!69j)l-ddIns9qfb>F}8Orn||*C z4si<_t@2Duh)jH+?C*NFO$G+CJIL9g^w%7x)4v5<6{(0lBiIDhN&~uXccX zAB;>L5J_0Yt!$+AZb+a$XOgx%|Lq}dYvi{s3QTz9-dq%ONKq0PrvEwT|<=ZZw z@U+p!cx;(w^4Qli{+`Rh+Ba{<5*zBe_ViG zdOu55x&Q0JI5uJLv(KlYYP62!19e{oJP620aZ8Ny+%6ti_IWanw3^fxQ;d<^C_UCm zoAgf}M1t9yMrjLR_p>#cMXiW4eIm{Un6Uaj*ZbnCq1o&%nMVxtQpKr9zNMamiX=ax zRxl4d3e(el?5nM;BH=E99wFi-zpF#l6ba0KQPSjEq!n!z-DeSZsSH`(ud2J9@w16x z%7`cjLyhK8)KzEt{AYtQ<&d}D{}hzK4Yl;g9LZp78o4c?6mKp3@) z{6{C==>kW3{sN?&jRn>O(ul}A$Z!C>*t(ZwA5by#dw1iP>;%bCf*(;S?}TF~$DZeT z7{cR}i({4SIn!!e;O&WQKrMvsG4@Y}3&g_$N`g?qd&_<}CW17qJOhZH%m4>SA@_;b z@bmD;PHEGffW~N8$Jw|Lex>bBr#rc^F&+2c3liyqp>BJpFWSlB- zKxvQ=tZPg^-^2d+Au%-`_$O0?*mYPTQZ=jQ-WRh-eKYG!Hulb^@n9|CSLJzZpWi4cT|DNnRcO@te1}6FvN3blusQ zcYPY#cxn_9eET`yWE>;1ZzQ$8^56OmYx+kT>(`LHFD1pVx zZ}(3l055l$|Ke44c*}>Ns+lh)MRN}|Rfcg@QIGDj98x%ICz|V=8YiOmJN$`ti7J6# zvE~B(nRU8?cptc_dd@oWMILu~1zzT&1WL2uz#MZ<;&L(UCSY!QUz+M)^Tc;gU?!Lk zo4|#c2nIYw1Mu&O|KTbAMIBZLJs)y#*huxD_H_fAG!r6)e8!95i)LV%y zIb;Hvg-zv@SPUk+eF^R^B$$IhMQ|B8F$iZC%t$P>Lw2t-;WW8(3eUqf^lfB|mGS;jcm?&-%3>8{enb`{=DTzaZ)>cRJvVPY zde6=0`a8!-?yYdv87p9sfBDVdZG14Rl>%qicNpbXdD*kKYgAdtPUY*ISSr%i(`%FQeAVQBoY$2VZYs(H`d>6=KU6wV4wRu~b2<*H9{}Hfv%b!buW3&mz8Qe&4 z&?O#~llD^jw75AXn;}}2`dvs1@_ZZ)*>P{=kfN?CFg|*haIHwgKHo-IH8c`J+v9bi z)hbIVi@nR@pqkL0JbUp+(ICX=_$T%FybAI55Ip!xAl`T?eV5fyK{V`?VqshMs|k1} z7uW20vF-Cx%WG>wcfvc~n8S(5@r5nvGz~A$g<+4P5h08%j17$5*3}i}(8HsO*h^`T zdInK$fbggs9@~?d_VZvuW=gMAgwZ#FZb(`@$q1YsH{40tk3(!%CT<7~yS8Mg5tY&e z0zbci;r$J&e~+4vYuER04nEzCIknm{!*y7VeKn9V&}V1+)BxQ`pjC@rp(3MZg$Yh! zGL><}WV^xn+sD>XfA5mr5R5l5iy8K&iE*SafY-3j@S%*rVHtzb8v^TW&0!>{(siNj2pSm3^Rko zjcWQ)w!k8@S>30>l-T$PA-eXX?K?{D9i}^`ZSD2Da#Xu8#=z&L& znN91&13tX25f^DhWtX4$_L04UOFvh;36fz88s$4WPF)vJxHUNrmPkI{2fKC1#iH0! z+8?hc7?J%XM=d{HP*zbo0zL>$CpJOj-MJ z0q^tksPo=*P&g#6LP_1!h{aKT_C|+jL{R)4Fqh@2Eul11q8*_pcP@YC{Siep*mz7K zDKEog*W^Xl%4+~~>-+_F&x{NF``Hcd&6?D7^gTMouCH!JY64{IWfgEgB`b(}>Cq}U z)$~WK(A%h^2xV&bJ#?9FPrtB1rt~$B5V7JD_u$24F;lCp?4UnPeex`*z zo@tqpsVb%$pV#xLtV8s1a?K4=p)j$pBK=5k5lsSnw#qUC~|c^Nt!o#z|l z&7vcFNwbjy>CWwawo&FWU-;`}qYW5_SP4Z{-nWTX43)l1-^ljh*(Q>xUdoiGE|w`J zjzrt!MaVd&uhezF7ZsZT6*buAR=3LjibC(i=vmZf88FNGEn-8~Gj_>ut~c&zN6aw8 zYcp^u^5Y{{otSLeG!lf$esDx2n)Ypt&F`8^`}w~eD4ePy_UvaJ>(AIEfyY9&r_kDh zkFs5|lQ*Uzlr)+s=+vWsK7Kd%+r)$7kT&DGwbfc|y3DlbK1Q2Lw>~7R?vyROEzfSE zqzNrQ`jf)F0^m5*1(@bjmiUg}@yE_9u%@!?8FC1-I=a&5_QdX>lH|eL3y!FaLz4#% zbqN60o?zAVYi&qq|ABkK%wmFCO6ceu2V*jG&vI7yR1ao9F*8Hu90rhrVhE4{=KkKS z3B!nDS44J-?F2rq`DNDDA-$p0TToDKr{YQ6LbYNm?w-?bsta-Y(0R12Ex*htY>oC- zDRF`Y6nMU!U=Oh0NzxoCW z4yv>-%Aq{3ESkMVVnv5G(j-Qhk6@|B!Mav5b5Cn%X>|u(JTV#ynpV67moxbJM94_NYJs%>8>jCoAg3 zv|0D(_E8=b`-Bs=tt1}Zzq^zHmyz8yEl@-ezPMVfY@k2=CPMNPc&J!xZha&&q@Tb~ zgm=*kt22ue=i}-#rYso^_|H)c-3Xwh=Pe z96cuK2*oD!&Q<`>>9kATw$Poia)Sb=<_h1`Qir4g0xK?jZ{EgUhy2!yCo7Z=w^9$F zQu?w4G;<%G`u!O+=V*KlWW-1P>p!y#{FAdZDlSE{%Cx>1ZTZKu7Sn<=XXSc7);v<% z`%L$kY9i==b*8(sVAr>UqHIuGV=X)-ss?u=@n?R}OBBX_B^BeJN7TH~I0%)FrpO z-|0zYG#`_z`a>TK7s!O`W!*#8TvH&ay4X3|Gaz`*N;7W0<}UoHLheyQaF?k|d4{de z+7||Y{z{N`uUDlE9@wXvkN$i0pyaC-q@D`qy*9f)c%~{zXsXy1XHMrjp1s${9jGa4!1~5@8$I0xy{r4L{PuUzXy{4jCucoOMuB1K(H-75xaAj7qJW@Y3rU zT5N}gZ z=9d#NUB6+*=3ZLNHHG|1aQUEgfeu#m^rEwIOOo|0pPTtQl(jhh0doQ)X`1O%REs~oNG;H}DG;im#vD1EWCQCaiZ`*5uOPEL)&8xBGKBM6M`S0fv6(E+J z<_2*Q@iF=^Wfc@U5&|fNYz){53JkAII}tC55)eW7&A~Y$j>(hoqxg5KQ1Dkp78SkY zg!OJZSahO@>`$~?%LC@e{luYtX}S>EhroZIn80 zOroE1csnB^PJ*bBTA>@G(<~se*u+hAR+5>qR79SYr2HBPZKhaPmB)vYPWRWX!sObR zF!ny6P#6~nadea??0da_AUm#C_|QTC4sQ_R`x3pe+Nm5{J9c4kQX;+e1F^t? zEAyF1Sm^*vw}%#&2AD<6ed{;Vlh^%PNYx$5*dFytJ85}_zVzw^i@oMPRg&wqOn~5B zV;)Rr)FrIzeD8grN0vpVrS&GG?+uAhq%7_hp%cWc#n}9*8YAm&SQ1-YFw~Qf5Z&JE zkep0H%di}A_DfCrt#oe!Ts%<}1@>LXRDFXdv|pB%hxJXaLV_L<3A(`!z4Y!|hWt_l z+v~-j<)F>Zq)&r>G}PR2Cu~g<{lD>FGs(gUXXXTQGRB#%zXXi z`Byhbkpcv3Kr7dHn z(gp>FL!A#2E}2xv{|)P;dY*jo+ApERn%X@+l;{b@-8o6P5sytF(0}thg4H}j>t%y; zfyX!Etc`n{MZR-fCL8uNmkAoLq^RhX>F~Jw979rVjk=+lh454{6?Qud?;~u*u3eL! zIXVfi6p?Har4mgY4he2x;{4qfFQ)%JN84$p%Z32of~=-+`Stvf`1T2Ps5UcwofvVW zu#h?}9HW#pA)R#yfk6iYiZwrL+aNHs&uUoLr2ibs-rQi1{2|xNp`41HeaFin1?l&Z z^Mp5kJ7`=--mi6-upj}BWfV-l303)&ze74(O(d&C)N2z1YhB7NK2$jz*C{8NFr{00 zzONAkNOd{mu^fgQ#*vT&b0S3pT|Vt#O39}{Zc0&&IAA3G%*=8dz0*z!c8UAM{h z&lY#@>izuOM3~~Lmq^3$SdUf9xli7aO@FMO*dT||0cyujocQ_Qh6Knx0*{<-02X?Q zJ|fWHa&jk$#m8zl2VbhMRZ0yYwd1H+r=BM{0R6gkk>;ukhkcJZuDP|i_9h5 zFr&u1{c56zyb^ z5nz5QAe|j6@h^%VwV`IXBoiGMktN}cgXL&rc3o|PMn(K1tP$@2vxdhRWrqK<6|}K# zhuXf9nS2vUy>z4$+_{(l>R?Si?1kMiT)?yF%f??78%iw%TU9`8u11<};q>)#U?a-# z88+dYl}^0uryiTy{XwIjY|66cF@%doGAswxp$1DMSD0u#cA3NWFbO-`L^1cE{TJ@7 zXOm8(a~}+r6Yx!^AlgZ+VJMh+Bahn%trgY}Ekf?chMn?mNu)pF9#zb79lz~qR=9^_ z3m-AQ-g|dk{A;2bggz7_5OaA(YNAIRk%EKqu+=C(K0?qMRGwf@!f*iF$@&oh*pLfy zF1NIK+KFIT`SD$C7~`F6$RtH{jNB+R_a}R`x6f#1ShYQC#^1KCL7d0j{V4ESUnBUn z{%J@-rjGrun5j7jHi?HK0M#wKSWFSw$c-2I=4%79QaaltcU8Lqd`1%w?ivCUrmVmUONfSS8!7vi=N3h7oVp{Q-vTQjVAew zrgGd|3wk8gYe zPU@1?BC)&rrE*@xw?6gc@W)ua-s!+07uifILc@vqCyaJ4Gxt_whT@&u)!9(3R#YKR zXh4x6nypMfi3svW=w>^!>0W+S=C!;Yv*YcWHOlr|CO#WWq41avOgg~gZZRB<27@T=*7LMxHIyo6rr+!dNwi{ZTY4$Waesn!XG2se;0Pw zUvDy4ob`+;=JS{RZcAyspCm32%S6lumqhY#e~F?tlDB`84o4 z(EoWRKAhEGyDn_~ajviB@#^-xaz5yr-@3p2 zP}gI5xa+!eU?|Pg3A6X#iMWZ~pwszJz0X~b@2MZQC(iS`#DcS*hNkcKgFZ#cy*y!Y z-kxQzvF?6)C^p$h`1C}1+jY$#@^U({u@@9T9`~~8DsnSqveDB_JrMWr*mcEc0_}aP zAGVyyr)UQ5Px-j0a#=x$#l|Ah(?ce`u;SRw9oUe|7My{t7bHad8mvj~&dLM05@QW| z1c%6!0kQS}P`<4I9p@j({3k%>1eN_6lZ)kR7x#dJU@+moCG|w$HRDoMw&d|x`J{Kf;kWhQ)MNb6u!o}Ak~Yxm zBbSlxi*bXwuS>4e$q&@J##2#k?7FtlpP)!UL`dQHW~s4V%5NEHK0E3>&47VWNgzCQ zdC)G5m4-{e0YQkyiPTEvwaU-&uddrtRc9IdVA*3vD983ci&O6IZGpO*0PoSJUuhrA zV`RzS^YZ4SfI0LN)950$-wC>QZ-#O3cEIA{tCsxODh@-jefrkk=lA1ovW1ynj~TgN zg65k$-Kn&_JUqNSl)XIWSBtYPMu99Gw3NarHJGrYAHdt0j`R6-N&qC>k@yYa6*JUzpn}^NQk3ey!g4(hn|U-6U4rYG zllE5&8;Dk8Y+`iokEuAj`ZitGzi6lMEF}6%`ax^evcilvDs*3qP7Eo*XAMb3Rhz@G`Rs37|y&IPN zUf&u}`hL?Xn3y6r+6cT7>=;@8`~2(Sjot~j z$NMa}p~^c|=jRKl4i|@VO$MSmqQ?a7-9gQe#w&h;`&LyY|F~-iwlb zN_LSlnDZEoET_l@Pg?&(J^kMq`hC8n@i!_Z1|UH zKa=!VV=aeYpXKP-#1QEcB+!%YkMbPC;IR3sP`_{d{(XoaaFQ>|B}Iv&E23{CrOgQF zm6Gtavm&{>&H^a^&7qko7=~~Bu$=vZXQ!loAAa`2!Q6ew^x5rzfv_6|PwmqJ#`u1K zVw44KQ?1A~N8EaRTz`y=Jouw()}}6r3aNAiiLa{0kchp7;1*mYI`Q&t106mv^ne3KUI*qEpr(XOn`lAa`H*@?MmP>8pr9kNg> zdzCpgKbD&NWjtyvLBrvQv#)WM?9SDiHZYqoj8I*|yP*jAl4;~j*|0F{d!Q&;jWnl} zzOGnXvsa$%c-K=$4BG(V`(F_&KKrl&69e#OX^wCyGlj&gD|)%AbYB+rtU%EyQjg$= z1%2?l4CCFAF{^34^k!V>gZs|a8$cob zqcOr59U2ke$~&7p!0y=wWXF>B-d*6AcZOwb1WZ(1^j;5 znkX`s6U;G;;g~Qrm4cWa(aI>8KsEK>V-@G4X5Lm&8^o3sXuMPcF>j&(V^G1nsyjg93$SaT9g<{m5*bhJJuf_iWWnhUc{5*$4j78UeEg46Ss1pKfBl4{ z2|;?Q6KXq&f{8)Sha>ac0W5I?8*Q#0r8PQ?Jxb$aEh~EMdv3SeusDAd;i_ev>|_LQ zrhB^KH)Y(@hy;lE;5V430(i*7_w8(!fJ^fGypdFAM)Dq;G-qYVft1BH!X+B+W^n!1has( z-Bj!+yWrTj*dNC?3Si~%&W_yIg}OL&^5d(cNRDmXo&IpKzoI7sf69C+f*z`TD}^^( zUhRzLxAuY#;-~vo{-z2Sv%=^n_8;wLd2Z)8KEp0wUdSzJN@Px6`3x=@G2Axz5>b7X zJnz|+Vecr=?if>6bU8Tybca6so1WKaZx`MQ@PB(;?FE5zU8$<<=e)+ca-M0rK^B-z zsokLT1eDfz&amwu8@bFJAX=^~ucGGAU6WQ!#^TsrJHo5BC|~`g+HE)Q$hk^=I|46? z9@%Rc@#6ev@}8PPvp(p=t(Gb_wuJG|knw$F@5N1qRYgFh=EILEuHzx*e{!a+lY>S4 zf|@CG3GETW{M$HBlmO7|JrJ4z8mJL&=BnFPkim>QjI2IhfhZez)g^~YsVJw9>Xwg4 zk*DHO!_qd-bIAgs(DU~d=JDYxGLa{miH#xis{Oc^XWOT{^{igJmum(8!&|(~<)A?6 zo^z?X@a!$*Ko(f%ZK~Y)*e8)_U>huVm%b1-#r^ywe8*giRhTVuYvupr-J{L=;NH5w zTJRmS@k1n{6PKd-#QF#QW#r{fTWP=1);*D*l+aqSxz^U=dJ%j#@l>TY>>3~+tWh4v; zyK>t12QjoL_vLO*-fGd1sa0RJmH!|Sg&CRoEaq}0QyxjLomlUjI09Aw!M_12@=hY7 ztX-0(DyJZ5?T$m0%uTxp!i12SKu6EL>3HxDU$9aq>Ua9r>l&xYhPmOb9Q^RVJr>_!OMqu5-~Y9?Jt8We|w z!bf$NTXIaq464`Wk*h*SZuW(kiA+pTm%pM!@;B3YeK`Le7Xy zMDJQ7pSm~k0oHUFFKQImzW6rm=(FGi51$IjXfv(7;*v|7&LPPp6VlN*cGxE6Fg_-s zz%+Y?T5L8R#q;IH9A8Q{9RkzS+iqrr35cT_!l`P^YN?&{)h-L)$0Ch)JZgJF$PdW7 zYKo{AQ;+kpg+W4EYW`6p|f92u?lPm-qn*I^g`o+%;K***~G1Jzp=9 zWjyf|4G3cmgQWS280-rq&3xv5kl)QQ)7kh%;ob`=qig(`a-i>+us>Ev;XknXs9C>Ict*mj>IIZf7vl?+}88im5_XLv|o9K~eQr=oQaHGeNU#G+xjeQoPGh*4ECqm+?Y< zP27M3m{sadNHe%CM0AN+|0s)XM5Ch~i5-L(&##Gh%TpRmGvkURg31uB?u9roy; zpEl@#Mp+;5{h{gc+FmnGNiw6=^-Z>^;FirZ#KLYLvW*%;@*!-*gk4(s&Bzvo3y4aP zp(kIw#YR=6Rn}7xBvx8sv%Gr4!eNu6+6$UUd}pL;)_x_JY^{)d_^yzfBo^fqgbL+| z|7fuxVMm&(M571QBbcgImkev$*_UeNF+oSAVPg4@Y{mj~(%%Dqd5Pc^?!-sRvWP6k z`MbIu4|ER9@ciP}n@qKOZ#q!%Wn4=#>?FihLJz>Cmbc z1a~Butx``5JIAMW9`Zu%g&{Ih6}|D9ZV(qg?6W?(=pX%{dOWA38c1n^Wv(G=OgA9# znrB7&M)1piLv`^)xCf-GrecxBepaMDof!|YBI}P&KSAESqO`Fq5NM&1yq>vN4BKBB zya#IcTYHy`CYUfJ)WXg_jR_R8H-y}D-aoJ1{?=-u_T|6TIlV4E!zzG1^A`vyRK-am z>o7wb>E{jeuM8IP&!W%2>D~!hrY_dl&NHHZyveC3BxOg`F?akcRB@KlIo06zq$wa%(=3U}RbYx0@zLH9coOYIR?>{*_Lz=qGqWX65Tf$6t(fbxY(U$2Z=p}K;AncMp z`vb-%>qKI6BlU;{%5ZA(1;?Rc$fiD7?2|H1O~FHV7az*pgG0f`-R--*weXH+G>1`5)2bSO&0t^G>A%O-uLNwM zS18IeC0E=R6?WOFd+!%<;fgw78Hs)IHD~mpfb@!u)Z}D- z1yc6p$HrzwbgL8FnE>g}JM?}*QFi|2{c$Vh_un&IgzfSnQCvBY%l2%-s(S2AzL@FI zW7K3f!7i;FG~s#W9HI<|IIGq!?AG~$F`b^og+N=ww2^riKd{4k;pO>%9(8CJBY_gZ^zR zZ8cC`V0W7C3&UG|bp?4mVf8OgJ~!*yF%Y8dN+f7)Gw@_RukR<7soOfaE19Ne7^ z+C3k7ycXe9=>*;sdQJ#;VHNvD3C;4gEs8ZRi|Zp*Elb~%p&AG;*|nF!=Y_H*jvE3J z9FF@>L9^JDULSN3UQ}vUMt>t(S&TlOrU$Q~{^VY58u2m;A8h}Jp*Oz0d!80>=B?~k z^UTtBF*4s3yN`Dwb*QYd`#?7<4E!{gsbFr~_iLt_mA{FEU`@2lhb1Ym2_Pm;*03tg z++sEwc{I{KYTQM%v z1?LeOy4Ng`^xxsC`aQ`{O zR`B)%$Iu024>T8bPyBd?^7XeS{cf2=ib|=_Ol^zFT)t#hKI`O^i}YvkJe8+n^Nis^ z@{iJv3WLLen+@0cmldx0?emmVXCuQn0=^I7LbEMZ2?e=^SWHGNXqt`1GH|^EJkPxA zi@=rhjSlZ!uZg^%Dl}$eU&QL?3lyu*HY#Glx+Ve98__uEYcdrXiNppQv%~M{7(r|>yGj5CF?3peI$!x@fwgzUPb&?D7+ z+HBto&MbH+TzNh^|Ki7cEn^1$kPK#SbQn9=;jFDMc$)BMA{**=k`sG3#p+=k%gKEI z>gnGr$!0$3=Pb+|#qO^pS}n#)xmDCuxaE99c}WR+yw`S7Q?w=#G7~4@qs1rQdDwcS zT9KwAHeZ~6Qj~A}0-+uk5MjY6RzbMtU&$>sqjMmpqJAMOe9Y`KQY+ogsPFoftg*@`nmax}O(iS@MPFr=e(;)y~+}VuU z%U?BCFUu+8@#ohG>CZMzl75m;@lDuzrOIom;U#N^DaN@ZA|0FiwkkC$8z%;Y)eFYH`KRt@Vz zpyQVy@?b&HK2Q_ieytBbBTF)Hx95*;@>;DeY-3*Bi2N0>o%6Uegq z$a{U{5Daz>hM%O=UeE%att$>@4&AYfMa4TjD>gvRs}tV8h&ju_%*QVqL5>8YI%MC} zCVGCOrxN!L*HqAScW?13%fj>nZt}f0LdSql;NN-Fkb88;=APp5vOS_|tj@2SSR|bd z8}pd{WDRCPF zqgX3C`&toqDtb`GS#4OaC@1<**M*qjbFD>9f7Rg93N5nM5JLqM3ce8;=IC=qWm$sK zsW)QlpTOb@Y^E=F`fcYN%y;UV;xGJ4D|$KEXUp(lkwC+xuWiUEM|({lN_M$KN69Fs z6ZcCc#O!ab%9t&ubIm%a+sn<>xsj5;AA^*g%jM47u_X(t%i~|F4Ic!>+IjW#r?_fE zJmfnYRDuP2#M4Cl=f}14Oae3Vp9}9A7^sJ#gAD}tJlzlvV#DF&FHa)|rL zv2N9e#4o4)Xi^fk>ShRuz2_oQY09(IL8WnvIT+}GZkBh8NL4ALqB1sAfdj)>Q;YGS z@3{;3l+q~_t<%jSO!EI^e9NHC6oT(F_zb6ftf`#P)f>-A12}?YeE{#rg9R*>@(ltW z5+9yQm6oS5S1>{ws<~oUE-gbb?&Wq9s@Dq76gtG*DXe6@l|&d1Ab>F6Se5DiF1ICn zKR59aQk=d8zf@+Ev8b)mQaxYEHTSkb=^=2EaF;=}E6yNJuKwvIXIZLw*=pH%K)(o~8?VlE3oT{5s2 z77T~c3kA-H)Dsil{66WF4Yrlu)zUs&rnW*1Jo><0gdD}8KVR)8TW*RVVWl7P6sYbp zF){98aav&C?TMSuZcx`?yh4HpW6hJQGdv{3s19Xb{$P3~mygO#eZWsRbl z%v)r$!fF(h*~MYjRKKq!XqarEO_q^fwsmcE<%n;p8nk&)gf6o~PJ`P)qD%p{9Oi9D z51{yo&{_&iEtsfJli_kCHxYVI+C(az;hcGN!^M>TX}z}2&aY@(&w*w@Uc zW3r0^3#fhAcnyaCA5~u&*5u=ct8_Oi-O?aAMyDXDATV+uB@IJ*Gzfw;j4mkwDd{dH zHcA?4>F%!c{{GkbaLzYA?P9y$J-eU#xdWR;`=IS^Cladq&hVAF;m*%@e_@fP>zZ#X zIz8(#%#$qQt=?%vRpUnIaxP6(hrsnHx5F4~9&Vyve@k)Phs}_kGofprc9y5(2oC62 z{D@NoI@#NXsf7C5On3B_%l8$)e0D3RnP#fCB3S*bU-cl;I-xivG|^pPs?o&rs3mn< z5gQjR&EkVn1*9gjAW3|e@7g%KN;f;BL3g`3DBmER%)HX^*Z#jJBl&FqIFiJq&^tY9^_<{)$7S4gps!V2 z1Q4K7f}J+neyiO{)_=+>yzl@ht`7jCi~3sq_32D+YM&JkYWp#!jhqK$eX(hH`G{+g zk-ECcYZ^gCnbne=cGJ55|Br0qw61bSZy4B)J&^BGJ zJmRjf)#yaB4?CzwHvM^dJ}rwNQ1u>9#romUp}7-qUsbdZ`YINpO+Od-U@>f#7SiB2 z@o9OAQ==(UPP8Oo5w_3xw}7ybZbK--dOCX8EOWjc*T;5)ignx}Cx~A}b|YbZo^QA7 zrdIX7$!{uFPRJl;*PcXkHkPw53DwkY?>#JJb>HZB5W6d|G?6$b)CczJJNxGkk(q`U zNwyEuK(r15jOz#X1#&l2CwfY*HBHX)jBMU3_%Cmf$q+f>yeKW{Y8({wamXOqTp)d&QlI$S z_7>J8w{xpG?Rv`PeU^>)Y8_0W(VOK(RUGx&>nLE=GXvOi^=(qiL9e6?v)tD;#%;(3 zZGCuG4ZO&(tp~UHbYmw@h93o*{O;NwI0~1u3$yM0EXYc@$>R6}f+F*gc=_xa7$yP-tXkbX|W|g~DWolYwcOVGnMS zYP=PX!gsYmO^(4N>S2KV;=!}h!AZqMo`OU>rI~N{`9C}6Dh6pEe@gTTJ|5q0E%Bjn zv;zV;VfA_1tR9<8Hu8T%;!F@iu{R?z)m%x#b>AS!VqyeiU584_^C4j-ohf2_bvbwn z`qZK^=IEKA{vk}D4;}(cS-f$bj1aZ%kB`*cWQFhxFE&_jDGo;7Dk<@8$|$1m^)=OF zFRPcHB1=2}^DiNo5Pf>wj?aq8BnGAwUjq>ojnltM9dM*3nxw5>f26N-#rdci!nT0^ zg@uh8=W7SM73A(Oj?+)dVDik{QMcB#T=vuQ@3&lYCfl%+JO|R}e)Y{7 z9OAR?;5^1pYHSV`L2&}bCkIT9y3Gyx=H3%xQe7xgux@aw1|>C+TMNUwvaI5jKgIa_ z@>;4_&C=ID!r>>AZ>_3%lLf$di53eFsZ)L1HsA}{+!~;TSiK#V6M)Je!B?iqLsuO- z0*frOD*i4N=VpqppWVf#?8XR!^FqKXnF&w9R%BbYGnu7^V@(UcIrcc@w4Ips8jVP3 zU-r?He{P(?QG6ZteGSiCBS}QPOGBk`ye0E`f{z%NSoZDr9Av{N4rvGZm>Q20~J z8Loarzlb-uS_vF9-V?f^akdXKvc^&+pXv>5ztgOIQ%4AU&=OmRWClsEi>D#n{C&%P zGRV_YpksyiMq`j5wA1u^lfTLaKTs1jS=sB-$<^sQB4SC!g6PS&5^rl-2-mgiA%C0S z-c;NT=>n(V*C)fOtovnh-CcI9dzJDxi*}ZWB}xzVc<(hS%uR2CGf+ZDc0ODWlhje{ zAEb^r!IkWw4aOgAw1^~kjy--Qxe!83*nOR&^XtheYq8h6@u1nyJNpZGokHtAMFu~( zDSUK_=gAt>-Q!BkP3y`v*bHzcqJ{BOo@pMxH36{M=T5 z9q##YzZF}2MKga2`N$9N8ruzrCGZ8YRY}LwiPZkVl40hu@;-?=qRa^KF*xpc{E24* zH{NdvtM*-I7vP@~Db448a_PFpe)e&XlJBA|tQ$kW%zR@temtH#`o*BdRK=`$AY>b{S6kxg-FVlYRH|AqG40jf zZY+GlrLMEq4w!6$ovBX^viGyw%dt3($|%x-oIs}%ZMAeaG%D7kKWbpp2T&x4-4 zr{DSfdnK&u^QW0xF483D-+wUz=Fh_}SC;ovdbrtuTw(CXMUjXdx;BVDZCG95pZ?^B zo`jY17<{;GjtDe*!rR*^Eq*gCI;<336ZaWy#?n<@~Nc8 z>SL83$F&0S?M#Wh-xpbkrkB=H+ebIHi0l-b8eW();@YJIw2SnXchjVKOAmq;U1Mw* zTW@S{I}RMj-FiQxoud(e9rAgLmb`mYSCLV44*uL{^Tw3#oNJshXWPi`osV}%yKoii zMW8#&)k~hudfaV7N%mLlJPn7=Q-Y!E0JpUX>xNCTFO5h1SUAb-c!I(ws>@$a(5w5` zx=sQ9La+~z+Xc`o2?s^r&N@s}N;#;SezF@))>M>TP8oKV%dvH*YC`TJu879q++t3ijzcToU}Y6!uI{3 z)#~n0yG9D_0PuZK6o5=Xjj8E(8}?WfcOVnq>3HMuX#IgY-f8!qWSFB0(#J)nh#qhL znrtPtHr65M+^)@4v0<9S53|9dzRw%;QCYc8axNy&sO>CvWD6f>Dsc|f*SCLqHFNs0}C2nGn zf;&Tx%YI&G&tvnQ>uD|p1k$flkDOgfOI-!?K#;&Bk>Gd5k?kPy zss`+|)sX(gl_DoOpXvc^njUYK~++u#M9xsS8Vt=7_VBGGausme1+Qo868A;yuU zonv#6yDm=@x0FAsQ&IW^=*S1VWc2P^qC9XsVOBI4jTkK$!<^`t5q6r&e`WKCutG}9 z@!S%8U|m{SO{T}zJ^|Auo8Y$ZxC4pdY9zCWFJDQi7(Ldx7`3+g-=!u<@wjjE$!hx& z{hOnWu&XV(m12Z-Kxw1CxmX(&@Nqi4Y4HPeDCw6t; z?%(55G}fTrTL|OGaeD3LE;uC?Ows!C6YxLIC|g!>@1vHpcWf8=&sj*EQSy(J;~W`| zy2KTfRQ`C&85acK+&d&+AY~_cVjbgGc_K#ZzkJskUsbgolK*JSlVD{q>3~n$Q@GV? zNg?F97xa6h#Ap006d32zl7;#l>+&2Le%Biz3MzYpuP;7gQhS_>%LU&#-D%(+sx=@3 zYuSz3X0DZFW&OT&FPAekqg_fq*nVAVH;`N5iGDDzm$YwNjt(qp1B7uEa*G@I!9t1HZboN1@4rL+PE%_#edJs+Q zWx=DE%v@9ZY^=6|P-2nm>z`q!BT1%t?};n3y6GJ8#q0xGSvxF230>m>W9(zp&*R#D<&@S_j%whF)3<*pBtCW!LQ1EMos#? zN|HlTHi!@%j@AFk%a^q0YAgsoIdyQ8^LPlwLtt)A#Ny}Zrr%;XpOnDp_T(b20| z=6UJ??SZtdKY-Azq=ro;Ex*{3O0Z#)(cYeLOjMvqzRu^XjbrIVZVthFn=jRjU!Z;} zGV8k3CHHz}ZMqf34r_zcxgHG!6Ag8_mZfB2W4)LerEv}AL?51!xIKCDc=kq7?tQ&u zvdV%<^slx_l^K@%Zqsel_XXt0h>hAiZoj$3b{L$KlPo|b27PSxNaY)Gj0c+q+@6zm z+`FovQt^#4A9YJq^~;Ii&}QLUhBSn@M^C~w`@LE6L>W$DMxhM#AU1kZFG@t#?BLyt zV0e=g$AJ8IO|Pucv@Z!7=diX)Soeub)CDI&|2Ev)Aad;~xTARt7y~5+?aY&>yicW1 zUzSqFkt20_3mq!nHPAt*&@b;8XRz=|4DG|h?>xe2>?g)E12bOFWQnrgC*C=I`6-jG z>)+RyO`xHJgT!{L`>KJoe*5ir>LB^(a}7NUlOh>r`-HcGrsyL-WFhjI^y_S6#L91= zyE){Ml(;G+@J*fd=DoDW|EBbSAS$&?E0ZZ?A8s#x`wk;J@W~7qe8uqbuw#6vj$j| zJ|~X1FAip{C-+Bb(mSV;K!zKkt@9O5Ze8|w@-Uvv4icW&507*FBUB-x=P!#f3Fk-| zPj3Wswf@?TGIh8Kw%YwW+pXR_YBtUoQ_cL!E`jX5 zSj{AR`#~fD&IPQ!-Ag0nq!|ySn@tmBh|OzNDKzy2DsFkR95Y%Fl_rynR39-l!oC zu~h9y7ci-ad4^#1^cLlMz0^*qt%Warlclv9d0V026H;rW$*TSL)MZuwApCbT7QI!q zOUiAz#ZMypH85AHlo}lu&dK(IM(jaqH2&XZK{~!m;n>yRB;U7H;a}F4XG!qWRA^>&$1>X7Nd8bB5*K=841NZsOWIgThYjXj8np5%IU= zDW_fuvs1T5=a8v-lsnh7&UK;R$>3rs|92jxhZEYB5~$bPzD(!hR)4cU{xkbHsgGtkLGx))+;TbpMKce2SMYdIpU#OHA8ik*d^yV;C7Gps#qV) z>kG{)AlxxHz}PIeJLBVTt$kC61g=rs;E8WA?q1Y9#)I$%9x|FVPDecKC_R1s(Eu{+ z9$kE;?F_3~!2kP5%Hw&?1zfOGx(^?JkYdoxz@=aLw@cQX;J!ZXLtsHb%?S3HrCb!&!%hh6;qib}Ivu%t7Yw(={le6g9P)jzWD zDwQ~LK6vpyWx=YYVh%L7>M;XoR&e*9U-a#}+~SQr*PgQ3zMu?MTO9LA+pjXgKFrn) zte`&T>uWo^O4S;9$n)KJ<@5OLYa7s9I>ci*vQN;><1Cc3 zrGQ2$JaZfvL!2neKc|^T@ad&mWKF|FDHUY6(=&8*Vz@kMJCav0m+_3A>vflUn-4Yl zD_8J}$NH3qFx?BqXRtcZ~g!wtf!ZWh@|p9Vkr4_L@Cs`JIBz?E9hcBFO|D)*KoOv z;9m+qY`^B9zggF5G(x0&oo1>NA|}jeaoIwj{^p>79{F;o>h=J2RIbm^Tby%;Cw>vl zST6OvETc3Ho!iooEn?5)boBnooIRr7t zzE?ssERf2%oqq26cqzlYzZhC3?H9Fo3rcOa!sgk|rpAcomoN47STX8=WALvu{JbM> zTn%RkV?#0I!KBOizP$DG*s0eE4l|Q%>|4QD<1NY62X}!(!b(1ShYR(yqlap5gr%?3 zno&bERce3mkW}xU#y8X`$$4*V6e&Rt^k^|h{%rw|V0#CE_#2aAz4&8R#q)eY<`LrB=hOP9Kot!8)k{U8^NI0 zl_!}^Sd&S`*^-6uEra0{iuq?E|F-3xGxcS%TAi%jy#R|v${M|r%$FpgWr)}~!1D5{ zRFchY@Ja6b^_iRY^4K$^_)+`{!~1&*_;l-9WdY_Rqg^8@%mpcgz=Qorl1VTRWuZSV zAZ2lxWISc9Q$ba5t4{GorQ6Pb9c0y*12|P-T@oTMrUTYqROAsvRbmR9m#7>Lg&UdX zV%4y|iruXRvk8iilTIb(y$UhCsP1XH`M{DM2%pKbJ-eaBT*KH9_DL%qN@jLr?~1AI zQ^ytboL~xYuDSC_F166CN)$0F9IgGNEM#|a+4;dO@j`XHQtzq|)8ZxMXB+9Cte7!J zjqgh=A?MdvNgDe3km18_@21!Fy1V{k9=a@6`jig7rSX2UH-Dt+s>r1WlPqK_4sY#i zjy|diKkzaWJZ8R#;eV#QEZaaSatc<-;O*QAo#e1BVpXG>Pk_gR#{+jz%I9qF;rc~8 zrR1OVoopVBemoV$9o*jE*QKrhZlkH9L3f;a4Er%~q3|0n!BbuKR#fZWZBt*m2}WqC zg(&?Kl3}`3-zB-Gr5E^A-|aK1>gCY$S%pHCgJIp+3+in(+&NrS&DKhGGtn0l11>jt zMw7Za%EB7L=C7}$42Gxoa5tsN)*4u78?-2TMD-#f>Mb!uelcnLL+!%J5p&8>6#vF| zv$A)S(wQQli7Qbve<>_4C_4Gs-(S?>eL3Iepyg7Qb$TJ`;BS{UR?H^)ZhW4c$e=eR zc|udm2wK3ebT!7($ctNzZUECP?5+`2t;iqLzjeoLICX!D+KcS z^|Hp1#uH7*&UjiaBzqJ9`MX!{#UH^yQfln0lwEA1nF#`6P;RE_sxYA2*5(ge&wR;4 zOplDa<_V46{7wMS7L@J8NN+{k?@ya9k336izWI2@&RYajOsjviV*aq>Ks_i{B&>1M zwC;ir3u&3=3Vo9^Yitsf8Yj#8OYuAQ^I6UVZ8Yhe*}X@cQW#` zLh|FYUv|W&&_qU^EN||9nY7nuWEEFjuOK@eb2+~Ut+dz#pgp#7K#YExF>osNdT}Pa zJ~hwan%oWKTopZX2X!Z+>yhB!;aC z=?XX$8+lRBV%7R~x*R-_52Z#7)mbQ|%lxz7tJ3>>w9Rmz2=u4+QV>sfk^xBRg4Wx# zEa71q+a9l*bbMpfcTH89@n86CMg6Rrw^|@V5EE z#7@PiFMpS7Ded#84f5;Xo`@{&^8OBj=+c)0UwU3R6DnzO^I3TKa36tX{{3IVh^=b1 zfDi8u-TZ@kD>DT>g~idM#%fFt=87~i*0KKeIahqz;O&H`2W=QXL-K#y;GR(T-!lfc zu4mRI-LN=AC19R)flu>z*@CKurp5BSd#N>W|I`$;;TPVg=!fpqLEP7?vNP_wqi?p( zUb3?mD}#r;>dBMFYZkmx$%|;Ho*~rc42sEkfSd(RIqwHKDiCc#^{*~#%l#6$;Rhd} zZTD628J;hmJlFTS9PZQ+$$J(A@ZZC4}DI%WvR?;RczkTxqYu&?BSM;9-3~>4L5F zh2|a)(|4scq(1JnwOK-~7d!VKV_YT58ze&9>ldn5cyIIhz*dm<CkllN!Jc%^V^Blt`Rx9^Z)2=i&Z?|!8_3Aa|Zky*&?&C1k+59#}-)o75f*;Sj zT+19{pR`MOjrcku}ySDXxt5l7inoq@3h?gW{AAGIrXj5u3cOSwJmLj`u z>s5?K-bgqYVr=^Lfd<5D@CL8ZERKf3m>UXxHUeJZJS~pY`tW1xu=ON!@MV;a*R>7% z@eOzJ(G80IcrRb3i`xdb1^O1^e^ICdD7@y=$nlU+>3iWtuXCl=8>9i|Qs@d6f<}UY zgWVYP{|WEc`2*fThGT;0e%n`eu+sIvX+4Sj^wuWFTN$GHLX$(&fYP5#VYT(?T5lAf z?E@}$aX=N}+JN$LcTMcSy_#5FBv4{3fZ*5Ewvd)*%KR3;4eC;S}+bKAOnr%C2ati}FK0xZ*jINwAK>#Crb z6p##iG%zY*vFGCsOM_6*?)ol>LGH7l)(K<$%>8odN*?A7c1%sX+ zbHmS*8A=6ZLu>0d1V!uL{mx_?ATLkb~_rjd5b7<{CzTmgw4A8y9YWQTo=KF4uZ zRa!Al^r%JA+!J}Z~FiJ$-1Y0(itUx~ca3gGW3 zacFQ=&LN1IuR6YQ6nm(;Y*~&TnbjG8={I3R){eQ zfmft-y>+HH^dMfD=xB>9lkvg7So8xA_lu8DJ1Td*rOduZMa_8kv1#i|*cHviEh54R z^##yw4~2PY%6sx!_!2Fyz(h#bl*-E9ngHo&wIxr=&oS!TYJuF+zUo#+I559m^7r~i z?x^A{ep%^@{!N#Em+bL|HVSkQ**vUL&Ym0=Xb^WT9K<#@zh|wp zGT+#sGYoI7R{cavop`!U%#rH!D>9Su7qNE7+)8abZD{1Rr%iW@6kT?CNvV#ei>4MV z+0<4=4>D|vMH5ZKJN6`p_KZB0oa|3cX11Xc!GVZQ)SXEd&H*g&skHuPcvn6LUbdA$ zsX=x_xyF?JXZL2b6`Dv(+1b#oG#KGg(>Ko7<{<3RGs!605#?WAOxmDnCdAX{`-?cG zs`9;NRA@*t^TdgkvB)1yuc-*gcaVV|7041g?hxy4QDj1BLjjA`cbo$@($a+ykM*XS zW>yD*IIea3@1$CggFj}!Pkz4gn(oW{*i0>PFdvQEWq|qli#|M@#1SgEjL^zq*{DR&HOsZw<7TOQtT3b7r#`k7!h}9cBi5C^k5A5Mv-hp{qAS-&ANO4+`Fh?sc4SHk>~Ma4F^9${FFt; z3W$EYSmj9hrmmWs=#b$@1F#Rmr)V4oDooDD~X<(H!s=9j}Nycj=l zs9DI>GEgNqPjX*<%hdf{uXip8ORqKpS(4)IVj+oEnol~Fn)@W19`Iug z;68fCzS$p2xj`K#8@v-V#E<hE6|*)6c1)sH1U*c{OCOvErdT#;j75w%%(r@Ab8%qVJ5i(=YFb zYBkRj2YGAs*68p?{Y2eU!mXEaqE;H<3Jav5$a+)eXu9d*%85iXvM^OP)40zoo*Yh| z-a^k%jN3m{J78mgK1#?6qTk5el*V1>c&=~=3kLfbjOWjLGWFZ^SD}+yX!5%N!lDk` z_UIz9Q)8(iz_A6UE>7DNcYM-v%m|1=$FY8lLtanEOLxh-6ovl7$|jHOQ-8+s3OMMw zZMaGMD75ndd{I!-u?i@AD=E{Q=7{_G1#uGds=l`1uSqx1cOLrq$&!fj0a-ImTArue z)kx?~pYGU_Quw#FLi#+p_J|m~5MCBclpchH>=^+R>WqPP#Uw3AX1c4#&2xF`rr-lG ztgi7p-i!0^v7Pyeudck9UNRZBO|8f9NBo&?KyU!X9k6y@8d*zc`i)om_J&NtCWI<<%;}oe)Xg6g6ls z!DE}tc-vY|IxCb+yv^9mowo`-M+h`*K6V_w0!Qb%<`Nndu66c%vyB+U$_^sK};xfU}woAClUum^$5R&L}_cW|< z1{xbJE9Dz5IgV-@OxO<+^WMm<(fGTOu4DozDUqeG`fbLhxCn(+rQ9?nh-#S?4onEd zRkxq}B)Lg%#(fpy+f5KqZuu%D7V{BNtxWUN6Xo2de4q@|VjC=~5YyR-NTIV;Sl7)G zwB8;+gLg>~zG8o2gOsG+#O>!Ck~gbBRl4pZlE(;%RL!k*kUz1>=CqJ)*%g0z1o%;t zP6-}n;is>Fq%x;Hg;kCFsMk2AzFD+=btbS(DQA0;=>h+x-eK&{l=P=NSh>@t{Cz$> zxjWWwi*=ctYO6mzgI6}u`zx$FtIGr)_v`Cw_X7F`rHwaDPK__kcg>sY5^Uss3}q z0?B3XK8HEJ895nwJdxn)d*`bwW9XE$o-k5B?e3Ivzxev_6QE-NnjhpM{0DKTP0-syKB`NCF?LOQfQT&a-S*Kr%`25kSV>4lz-H1^(<;&I=ZQR{dZ5?I zLpAj)_>$ZGBck~eeaeY;g#w~(Q9M#K9T6}7#T_YFlxgEH;b@+{>$;dUeg6k%`7ra7 zPlZ}L=c8uHY&(EYKW#sx@s*E^-PF??Rqkf^z}l~$wf}H&iap4!Cm!^G z1Pq^g4d-a)Z63@j?M^+%&KUK}e6nbJCdw{WEKHOKmKws2QS-hoce+0C^Saa5`mf=V zU*?OO^V^WSU%>8)4$s#590oWxjiY~TI}QTvR3iZE70P4O%rgz(Ya(*M&`e z_X&ox5@UAh%)l#Ra!qCI*Vls>=f-#_;3H~>pKxwJ$(iiTncyiVi2B0=5X8F`FXRR$ z6@WjewoW6TVy^#AIa-v&^{*lDe7vNu_ zg{w#GPTe(+u0;3x>MLC!`d%ANe+4!bkB-BL`ICU~%JvJEU+&f=L`@by4Xw0sqH*gu zSG1d(Fb@OHgz)AbxA#0rmJ;&j2)Ux)Ij<2*opGKs{>XIb{L;}1fF&=wAMUnS|4x?_ z7Z60OwN|C!zS_|2?vt$;^@+U#NjYh4AH1VZmYl@Ay~@e5n=dli-F{0CufB07R^Qj7 zi=8u6a*0)@J9YJR_&qzk?&_Ot5pU>F-$$3ZVwJu~9IOlZeP%$<8XiJ8#(f=bx6j(-`0bl4qlGFnkF)`sR;I~r)tyZe52FWpg$MLm~^uX zwn*Lr3v;dehheur3Mf)2TDZ)StPTD~a5sE78GS8z9%ZwVOdr@-`u^?=H1gr`wo)(a z?E5nbW=j|KfwULkhk`$XlOHQHZFK@Wu5U~t%GG~^wEP)};g{qbdu5&a*|$V{yxuq9 zPp{o7e0b1KdvNs;S1n(RVFvs%M%R%Xz>iV^$bW%k)PZlHE{aL5is4j(kt`3>dHofMx=r z+yzbYve!8UQ=`-QbVg2ed0oZDJbl7bxOjZ;xh(FhDPv<8Ef}uOUV+N}-lBFS&JlIli&mzbng>)1^{L9-Xh@qX+U* zLI;lZ9GrgXn_h_@+-}^)O=l5TDl&x5cE@EVMxZKMC>}ot$a%egb%)-%yu0~y>4_)& zM2Ml6*#D04CR{w;$V}N-9wR~9B0hmWc1@UD+wn`)=FI5S0vd4uF=PrtLi#+c&eREV zaDX9?5J8!{LZ3!W!+t~^%PD$DYM0SQ^hbyIev_$4Jlz?)G!9wregQ$_#VL=_ceF!; zpv~&e0_ZvVH!}DM<~oM9t3uPxin4}*|Am&6kq;eND*N&H#W@kiMZtF`F!qV95t0(3 z!xd(_XfRhsi6|b?=inKceOC#cc*RK9rFC7QN2s!AK!%lbqB3!i-*7Fy=IE%%k!NM_ z;-rY{m5U{T(h1Ec`kj;u$G1nuDz+)SlciR}I1gcS+XIUcztAW9XH0@_w#khDriCm2 z96R1@gxrbny%@2?w$LiUF7j0CkkSu%zwOKOMh>zYA%B}}QB}aJ3S3Fq0tKSyK+;D6v=gdGT?({FQZ5`lGrk7(mqG#r)w|kkX7Vn zq9O|zY`}o2DF~kYHm^Z!r7>t-c(~7Fj$|o0DCxn0^^;Wz9KWr9yTtU>yK;VjkY|n? zO30u1JBH}?=0ZVi6-1vYpj2-a z3JEW{9$9X@_??t1St~)f(pIn3xsTUD$){$Q+nDANwq6l8|HEDq1=cWlR{8lw*r2dJ ziBoGGZY$wkI|+|xmNgP^V*Igv8S7&F^t$^3cbw9T-wQEL@CrnKmMOXjgYNOeE4M27wCS@#c)5@JjmiOy_&ST z8HJ~6b*v-+9g}%*wmIVlb#!xJq!^Ow*n~r!czBrXm+7~obr;J>N%lg5;n?#FdQ5C0 zPfNB>jIO~dg&Xm;^#e(nsCh{}2c`(+`WQp-ll-+fyzU4EU)%7w7@IEc` zn_}h>p}zE6LHF9KV>kZ-`O?@+a7Cfq-64sWcYb`to3j5VfEq%_ds#!$MEtu``9^5t zR$mn?py^BT<}qSm*`m#J^F7@7)j)F`nA)56l6I`fe|u$JKkGezGjcFeW94muDmW@wJlyjPjNiP-%#i1TnGOCqZVwFP#X>~>OmV= znJt<$*OaUAnzNLu6(qev>ymN}12)YQ1Qf;pc`)MUliV;jqCo>ccdclqFYktQjEe|4 zfV`azy#8p;_Z_D7x1!da7h&o_muMJ3@vc`P|G6}1eevgkL?>)|eNza{61_cIU_{oo zh7LU^1>rgLSeZH-K8x5DXaqurT|^LWyr&)>?e4Swv#@gb#U^p-8J0O%s$%wFN5CI` zLT3)x-vAG1td#}Ens71}Sh}2kJ?TjvEl#;!Mc6`4J8iL*u%y?0DA0`sSr|5|GHVfVkMzye*aT9p zRfOo09Xvkt9aXcp7lc$DwgLxXudVSNZz;b|?EYuF#iS-FpX1A{kJ}mi$V|Og#7?U7 zy-spQO4r`p4@<*OeoY^@ElGyW)bkK7uBHA^IzNzJbGDPexq%fB|Ea0MThEv~-p`Tw z%%6EvZ|9bx1^Tcf?j!L?JqL1Y%@P8S@NU-v_yUa9H1 zPbv8_tVN(at%^9gMDIFf1WtU$1VkP%{0OWY{+yrFMoxTx_vUI{sZ)si1>u~}Xl*|6 z3T)oC9Nc&k0{XWm(-C?peMNd@iOekp)6~%z9q&I6_!_g19#NvA=X_X7sFB*_k>S(Y z;IuvYv#>|7pSnbTy5gzi`KHc`W*Ce7Zo+%6m)|CfMl*q3dqB95BfY_0ZQnnpGW)6s zZ9Nvg-*d(5A5yMdzx?@fDMBbfI((ofJ$?k~wc*89(2l+3X`hVKkfK{Fy3E{}z}K$H)sQ9+{~8ANs^ z1_$E_KcFP)NU-aPC%b^>Z`umKr8=*FL+r~b2eGw(KT&u*FPXj>Om;g`KbCXyWIFMQ zJUV6wpk9)=WI1OZ+Too#-Cb68?o6L2QS`Jb8zivO)zk0e;<(&SxF7Jh?Jb*c;8a2n zx=~r+_}wk(gXpW^e?I~<<-YrM=V;!f7N}KuG6RUS{sW6xm+JG{QT@?^SEf19B93~+ zn%@bssg@Jv>Y3Ts8d58jzuxseYvB*JACD7wn^!e2ZH#$%f>EG3%3@p($_!uIhLsyN zJA}*evHTr-2CZnM4Btg1hng23NVOqnr$X0CXpp)IRwh;ya2j%}K>kg%y20J@8ThW~ z;9?bK3E?)*&;R)pvsdU-7s1i?&h1!b^Lih1N9qo^%?+%(_U5r@n=L_jQMCO7BX1$u zi1@&-KP(}MA1EsNUcS!HtJ6e>12>@_3zn7V%yWb%?mj7%wPJZqElTFz#^!i?=hqQ@ zs=>;tj1||*?~HH%SnL>N|1k<&{t3ZIdR^KFQ_+z8C*kPAO`xc*RU{vPhQAwUJVJv6 zBzNh}Nu8rwXMLxX2pxYmI4eG`poVOAV+l^$99LX*SciLt@hQpjsU&h}hgFIg;JJ+1ZeD5!ErTn^7hZC$V_?Qev^Iy4WZX`KM<^$ovlb2ht0; z%bkjBi~hrrKBzoEm>4npmRQZ2vD@y0*)FOR>EK)to05C`_YI+#>fy=H{qm2}9QXHT z?ZLLH(-`j+71rN<blFA-#_XB|cEYf!6?SLZ28p-S{k zU+I?oWDgwuqql(;e4SuRs6oza9L+;l)k2a~AvRg|eo>$w69_{X z5Yujl;p(<=h6v9^C_kzj0-wRzGubT9AqpA@0t#-H zdu4O-OuY_Mq`wvi+y<)}3HV0_7<_G?P(2us&zx5#D}0P})JT31(c8?=NIZWanM^9U zK88J3A*GVmwSDMR68(dr;jCvurs_mw*gxYZHb<{5w_|5xEn|SJ5%a;P$#2um;OS^X z{Bgdv`v>&fAOw?YHZg9$%=wYbN;C1oS0C>ONE%09HYtI#_i)La1X^r@SSZNS)@8LS zo#5>^wvq-CwmI=-{t@*Djgp8Y|H3O-;_lZ4OF1P^RzLq5)+@aLv1y|9xvg+_I4*yD z*3FSoBaK~RWH*7HNxhNulF6Y+7$}|RWdmwnCrha}YES%3N)rJC>Yby;jeL4gzjx)( z!dPf`);=}EuY{j?Q-p;l@P#iw=y+8Y-$z5Xm8l>TTyrsrw_?zwK9xtL4JLKUI2lNH zKq%#b~#l(a2#aiY-TCz*@?*itUIcs5a=+Mg`DeRgcA9d{9J zy@qMt)c!*^*#e6ej|rZ|*f5Ts@lN*7P6zL`4N)g03%t`7)i1@83Te=e%|?i!QaR_X zdB^JY>hQP;qZnMmq z;?0>D_0xz|gL(Q>UI1HP^C3sWcye||L?7(5<3-+< z_ED!YgtfQjU(J(4ll|_W>BE@G2d`Bsk1b->|Jt?DPC2i+@|`QfYSDfx_oJ~MtLde!>^GX z#ic1}_=Rsy7b?I9x20nC3*Gd=uhR}GHsw2`JG_9-fdD_MZ2}%cbET<|Y}(jcg{Hy3 zx|j(ssK(Qx>-PbAbknW>kWWcdnN-xIj#9?wnsm+M*=k`xfWrP4XtwM-C}#J`hgUu> zc>Irj8D3kHeO3O47{hnlN_Wd)47sfxwA0cqbnPc+(<{3;ukRgb>X+O}CTNQ{h0y&z zd;Xn#Q8iI4@Xmea6dQFkwAm3oa<_JRHKCC6TMF9DfQX>%cN$Tc{Kz|ecM3j-5W9pj z=80ooOgX@J*mHV%oFyZdgHe^0GJ(;~-Q6(cfPhGsbeEts!XVux z-QCU5-94mq_jjK6`@_#!EY@PqK6~Hyb)lq1961%vwtMO3K9=>e$BfN%3TRj*OrZ{~ zFlKX(8+b#?IM$EdNm|S@?d1#t27d9<^5oMniV#wqt={kZy2~R4QX>+~=jMLu=wCxz z6}FCzAx6d-)8bD{O8e^sQoKOth)uHqdf^8NGWs-H<-nFD7+y2pAbZ6E*>5By980Kh zFYov(s}jtYYh=zHOa$J5l7`XXEN3DJw{E*d$8clET^lCAgDLGZeNsGuJ=HNMl+qjvzBgy_Wj`|*B}q*>qO3yTu7T%`Z_P$E zTxHIAbPCfOm4!({=il9}6)pee2=pwtM|0B0GPj*S`=TIa1FgDS; zP%U@MAHts^y~tYz+L*$cZzK0@xx!Zdgmx9r(pcCh2JUZmde6hXfzFH6BA5-hrFXMw z6}imcr%Qxc)-w=)^;bc;Fl#0lI8ly1zs=`#AG*_*yrpQCNBqd43RKeRyJNbYZ6wRa zNGwCK=oq`ztBMGVZG}nar)W525v^v2>pL0eV(9Gn7<0$a8Ka>`%o+;>2MK_B5RCKM zIX_-qj?4+=pCZLjfT3>&X5e36fw$ZI)mXb96r%cBY&-AsIe0H(45AG^?z`e3yR;u$i_0qP7X{57fAq2ivGs(7h>yZWI>~a52tp*8&-fV z?7#d6fZTCV65#@l@R4m2nhx$&xHNa~pNUUA{;5;(U$cPy%K;!47`5a8stQ}KBW(md z3Mrm)54eAtf!F=t#9-wWryMQiKekld2z(a?bYO#k|2}BUFoe@ry0xz##>3I9y6@UIQZtlA`kp-q={^KyB_`q9GC1C@+Zz?ak%c#3xyO1cdg(< z0756M6$^$Q(fQ;=d!|k;83>JCJgpm%zJ6Kc1;@=9zsQuyhus zOnh6M4A-g?Eg3~VlYBYe9#{4^DG&_kdC>O!b9|+ z7v{`_*hr~BslMhLXYdk2H6OXYyev(9=cmi=7DiL%9ncCm$7*&_=8t$Ro43mzb_1!lDEcD z@`ZWBnnjX|!wt*P+}a)dbYpLFsvv_3sb$mfVU0$vB$XA-NZLV#lv1(2S?PGg$?`)z z8|&ECVx^1lYd7mxh6-&sr1tav!Tan9?xqIsC?xLd_!FR6b1l7XganC~S${eeoLjhN zWj4yReMWUk-7FCwTpQO0z5gzs5dYzlI+l4)`HuWxdb+Y0k57P%D~t)|XrSiUAajzS zyF?O{qj!?T%oBAOz8mPHL=V7@CsCC4`IJ?Sd>aV3bX+Xu_l~TBH_K+fKaFSqLm&B; zKxS;$(izzpXs2`AT9b;fhZ5Wj&1)0~czc$FdQ)nM!+Az59m}GQT@D;4$uidb{Fz@{ zI#|sVKHR9&RG9N^g^YUSqtviovGDW>vUq(0AEVceS)fof?>MfO*ms;yvP-Y_xZL^m zLXR^p1W|sw36I+jO%A)Vn0ewqQDmI zkGgM&7(GL$xPy_iRQ*teV01NcgKI0WvbdPOI!PB_B3CXyqmTm-4q##03q&_ta4@{} zMkVXvxc$v)*-o;>tD3{Ai&BfB3Cz^Cm{xMC0_Koyg(L4P$I>@9CQvr62d=}jd9>C@ zw>x$4=;cwQIWR6NT#cp8y7bqO!gV4n_^!71pW63ypVwE=VW9wz@3Ge69W+DeD1OCf zfBUBt*f%aJfu-WnTn-}OB_3(B?;W!|4|Ii!|2G}3EJ}f&aqM0U!FI+C{~eG=N1R51 zget(w>vlR`=5W8r`|U0vQqC8^VUga;kRzvFpsCl@aUO?Aeu56ws80e811i@G@|uQ|K?e$60D%xIM4vQvG9ifa`JbcrORY={ zk7m~DeDw1%-}{CW^xT@SrrlZ>yrCI6j%^soG+K<-=U3GtF{vV%zHRt}M|=bC>3j1{ zy-rJcD8+iA*pE|{ zCe7R{f~=ECEcf$ri}9vXmDav$FNJqdzw5#Bu712<|DM&a((7*sto;=Z;9p$`|Na{c z^*v?q{+BiOp>{AJqE7H}dsoHeWhIfOj$P`)b;TDo`eldj@`OwSoIXbr)E3}maItEg zE99H!qG&TBX`|5h#aOdH7&8?GBbG<4G~gMmUgzaTi2{B z;TeO3?KcPAd-Ds?GlS`2p!#ed8OrqMDTepH>!bjLBZw<5V?`tE#_xv4eOpK6!)KA# zd8RJzTD}`aDXtyu)JD;)cA2j*k4Xg7cH&L;2Q~krHx8A$^AvQH^ARAF?*G*V)`BRH zx%FP)3`FGSCF3-DRbyo;NwD(inOlXRz$=8>!SIS@g{a@1yi?pWMWKH@Yi<9kf=9&~ z^(`j#jT?t5Z0Myn4VbAz(M=qYsA^X8D+CKUN%(TGz)*sc3PGdMkXkOb3Lpl0DorwO zPcLn(5GdX*HF91hi}fQ#(CF7YK3DPc;RXH#Bgf)jKm1JNeDi=f;r6q4@GPCN7BtaU zo6@1I_p}r-s(mB z=$q8c_1E~(xh%8l`B{{GfkU&5ybAkRA6uqCTYbK&`uJ?CvRC>)*w5f`v@NNG(L7y& zj?}CKp-UR7!l@C{rM>hGHHZlsT!0xsOU27`rhMRL&fml3!3%F8J&LK_0n^c`G{N3Z zTh@qc4YS_HkG6I}jbrV#!lV4%icXGA6AAR4iX>M7(?HqcMA>Ra=T#;8@IGA0KaFPh z9q>vA)B-6~aYHsMt;W(MY0DW*Psxug zhv731oVL7Vy7+frLS)I;b)>M(qTW#{j5?=W5@{FdtQe%ANE*ei2dsC2=k+ddQz=8? z6UXR7`WDT2+hHBQ_FPcM5}j)~@wE4&@8D6bG(^50CJt@`m2LvYN6_a28mzjXU$FM% zcmZAEi_Ci0BF-?Cil|z z_lg?24}4jCLM3Q0!#wb#=hOx(AO_(BsEgb{m!TeQh+$Bi^#TLInL`ED?mUu$uijkr z4qz{%>~nUcil$B}qILOrsT2OU(*(*g7JP^>30iY2qfQ>OPIM4H(BKd( z^P_{5vh*$JS?oAW8C6Q%ij&$j5Fm;pwTrSgc$EEU&LC^ajgA~s?)&wb=lxSp+HEIU zbobk@V#W!VCt7T$rBULl5-qQfJMMXdxnYf}MB%5}cZOD`-xrBto;uR>s21|X6wBYF z!cq%NnB^FydiU3NkkYV!UqnE8CJ(Ukk;{3RN7JaD%@nUA2)s~NATNlKnxn63irUp`1?eG+8zcEapTbkcJoQp zWRCh-Qx~n^!1Lfr@dgF5+ab2O_x~j7E_X?sa0XVF3n31rpafs(bZcISTW{gxvy**Q zGmI-X3e?C7|7R1TG%J_*(CVXrSXIaM!O}Ej$K1}&fn`ZE2bT0vMTc7Fm|XGBKpc$> zMVfVaE@YAB5Z+YPss28*Qxd384icg8jsQ}eCG3UgbVB5v-t%F*%2MgWtKal1a|}MI zhUqWoYJTphSUQ+|0Syso$z@~`{Syr2Jkv&OVRb1VXVmgFkG;OvZGf|Nhg271A^Cr4 zMr&yb`6olqVNGgIvgy$~LuyQ0aoLE>=wW+LO65-ZNXrQ_W(H0!Jjr&%4%;Q>$mFq=#7cMD!zdE^(k`scaHXVf0}oIC6t??udp-nfWn8GK}gfE|M`m?;IMXF zQaCi-0rHE7#&s8V!!{O`X}RQBpii%Cn|viVuKiG;8iBn)__<;U_%Z9%FCDV|Uz837 zdU8K)BKV1B;n`aH9rR|6JCAfZxE-m>&`l}xWE2Z{9o<6O+1e8jW-;$Mh8`_*WL326 zmbH`6>3uU)kJ{m1@#z1Pd{~tS{My9PXGbMh^Ph?TU5fX)dJ5?4Q6?t=dgSg}%-u!` zjoLND$>(STVhrN^=RX33E_^)qJu$9-}l#Be@ykbZF2J0Oaz~10`ByEm@WT!7(AB$_+ zS@j0oKqC8}y-8=UZ7>a5(M)-4C2nFFYTg?}?+aX;oX@j_EDVx2-tKKddOl^`qj$mZ zr#blA>xnn+)EdsZc{VO^{3x^#6Wq^KEZAy%aNFdBZzmclx1cI(QN|>ywg2MYJd8LE zV}4)Ai2l(U^jBXQH)9o2LONe?%D?D}{VlCX#`k89vZK4*9lf&F5`8cO8z_Cw8QLWuAgRonfe8!j^!QTa~jA_xseYpKGa-4z5VAtGmxubbJG0z>+R*(HVCkCaNdh z+e}$DO@M^AhPbzydETLyu;r4~o~m^g!ApWA{o#mY`6Ul0^GgNxC%+eJQl6S_COH(d zJMHZ{0@Is`AoQv7mk#Dz=I5|z-(CFM&IQVBmwYUJ`}qLKx*PrbGEqgPs)PBp)4b+& z9fqKz#bDrkJLa_Zkpx_yXDvEar0?pVe6@DhoAZ~65q+O$q zGoY(^HB?@+u&$Mns}4H8il@IN1Nb)VT+e8s(8M>b$k5&6Z#w(H5gBkzB=-IN+F1YI zv@;5uyzt_}3LyK68U@4O4+G`?$A1D&aZR~g%3whEaVq@)#16@=dxla!-@@z@8T)IR z7^Pch*>|^zi;5SM!+JV_>`LA@+<6yx>_Bp<{`9A4ih-H^%sS57Y28|z=kMg|_vaf% zxabE8`f>Y?pe4%@QB_BzDgg|&dHtxSjgQ}zFR5Co5Pk8U4>pJi$bPKjQikxx#s-9i zq57vhpkLYK>hQI~II5@Az;WTh)9%4ip;Y{AdU;@ga)V1u5wZTq;ffI_JUURt%pV{6 z2Grlw^9t*GA~-Q*JR9j>^9}m@hx7jcgZ|@;OxlY+T5bZ3Ja3@i-LAa1EuMnQj`K`_ zjR)e%5IvUrP-aHFk_n~MkyG2PY${08n1V+)lfT$|YgP ztBSy_Fs(7~;!BJRf_qDkP6~?{)1^N4_+vY%m1jH6K`u%1lXpc#txe1xzLPSuMZ-Vx z#&uv?XtFFk~9?mnP{uz_yUq_)IbPnP;nC9+U{y7&<+sa^*=94#6E<~N|=5MU2 z|8r+%e|t0U?cl(UaaX+`HXjppEF^J%)&ENog2hgx@OkT09ISvo#NMqvJ%3mkiZjU!JIsoB9Sg0xDvQMkI0RUzon5iop4os0QZAjmrk z_!9%VGkU6<*o!!y1evq8i>?(fXgR#$7Xe~8Eq5%L1^DLroUM0DUn5oLQf&x9oz zg;aGc32d{79V%x|N)npJ3Y=XU{ish~xv096CwK!IlY=5W;tw8Iw>A=ho9eLa zbVO~TTulv1jS?@3at>|fA_B_P=x-XCt@0mqq&~EXV5qf{gdJBiy%(Vb zeZs{_6zmexq2a`_S5ZS9V83MH;fI&?2_p6beL@XHSYreLsHk}K?ns>km7Rk)M>Xo` z8m34Jr-(l^p0VtK0_a&4#PvXIu~B6x z1~(q4gaM$!DdO$l(yG8JFwl{v{mV9ZS$}hVCOva}!9CqMi3!9bO>YOq^T%)C80&Br zcj6d}?^t%vbWR6QD5;-;s*`&Xey~PH>YZYeJ*_ULpoOq`+PANiB^-yv{h%Y*8e=Xq zK{0wD0aWCy++y7jH=i}-8=e+J#q404jfn$>n~XyZWuQ2mANxY$>sR(kTeQiOAA55` zhb^;Iw9ETq>FKHdJ;B61A46#PIJ6NSs<;Rf9Dd4$O;$PXpP@!z{b*&^ulIvlob=U0 zUKq5^@Atzw+carvlvCn;9mlg6f=Dik#ZdOQTMY9T5}nc^v!7iNw`M9J#q)C;!->9; zcbEr*#u=Q<&8>I~7hHw>^O4C4p0y%7FxVq`Bq?qBSlr!`UTTM+2eW#!^I4-sTU63v zy{T3l50uX1gHn1sd;j6OZaS)h_UCN=bG1sJS5R6%GpxDnZ`sHQ=icyiqOwW}^jwka z!n&>kHr@Ltr};WA>Yo83JWwj9zp@dXTyzP-B4129zkF88=d=pZ_$Ad^^JzQ%LqEjV zk`k0;2i74kI%CjI4C$&DHY#wg=cci1ctz*cw9e{NE_E!C`f0jMSg-_AJQ3K$&Kda+ zHrqh2h&DmuouZm{5wRt{H|msi-tuV2R>89WSsv`$%-naDEvm=uR?GDZEWnI) z>HT@RmL>nOnQP9J`@fS?yot%FG=Lek4Ou%;|6$Gm;sJ0y4@5OXp@q>SElUMviff@l z8GM2GyphkvKiC|$cv0-q#7`V`eaATYqoNtckJ_!@1_i_GHR`<;>tq}Re~b#ywZhOs z62*-XBMd)q6c~uh9W=$M%s=%jl(jUP?f00AVPeWrlHl(q z3Z9V;r+gxSg;m98j|@zoZfkXFfO-+M`+aT#4Rgr5U6Jx(^~wETqDmnq48uOPgGuBQ zkLOoBXokSkvJ?q4{Q4yVSpU7OUn?UBuc1Nle>5+ue?CsOKgR?plOjGl3^O2+hvhBa zoA-!5?CZN6ydPlc(5Q>M-zuAz&e0n)yXinMQN;H`jnjbZ*ZJXW&Ux|&PV$vZcF;7_ z?x)`#4|-}&6&gZPj4X#*(YQIfK!6z+Ko5!nK9p33Rt0&0qU7eW-{z|M{+~KYSiS;^ zR?6c6&Kjn5B$nJ&68-yEh>a)|k$T`!cGlkP0$QX4CixMJFZ;jap=iIki`pqu<+9elpXt_78&Zu33xIxtUX z?N6Q4`O#=yw~>?~5=oi%DEv3HxRPZMf8nW@v>`q~c3*eYICrr1OWJ}u-A;G z*v5|=gYb-}rNf4ct^TvAM2gN*%2uo!zq3~N4HedGUsER6WzSbCFZ;+55U$YiA<3&$ zmA%m*pB8x&zS`E`UKka-w{UmF_AafHMlpojMn7M2GS(D8Ab4`7@^p&Pa2$}r=GDt> zHocqac39z=ebNel8v+kKZom}r*<#~V;`5+fNy`IJwYGEL_YW8v@Z0~_*w2@G{ zUsj)!J*qGD39AM>--b*-xOqlo_&&m9ZH6RO%>xgr`f&*Vx-tk2`k0@}fhp!sFt7Jn z9}3=Km^At+Bx6dase{tljc=?KqK353(W$U60 zK07c)%Pjt|DlzWp8AP8UtA$ae12yYI1>D)>HdNRV2bb)7CN-Sz6c}$#tY_(Swb`g-s{Qhi)1eHm-=eQYr>-ddGi9@28_uXqtL%UbmaGso=L89^0bw zsNfp_95@inb#q|yK*^V)i~2zknY}NZi`SkmPcd%R(&3A5c6&a*`u&V+Ng<}hb_JrY zzIEQ%Kgq1iYQTtlU*tJE>Ul?Qt;%i~avo_ukirzt&xcz{gILEWAdT|Ap@16S9y}Fr z%h{5e;lC8#GF~D4+T$TyO>iM>Xy0ht-o~G;1OvQY_URS&;2c zL?RQtO2Ttg+(&2+S6G>xXeStXb{_GvNsbZ}NM~MZP(1N%c@5ZE>%mEKkY(eYGdhL# z4efsFW|5v-PkL{_Q745Nsu(GXZH?$N%4GCZuz!6lj;+s95Ar&%&z9i}it2MSw;ESd z);JN$`h>qv!zW7~zg7epeaNygQ+G2Q)o*?*TR;pMAY<(Qg~WrkKA73<2)8_yMHiLy z&2C%YB4UI3o1?;_#Q&xW^a{bj6t&vNZwSIzl*Y@|*z+I-nwUb%jVc+*^t6#XojKg% z2)q#fGbXGpHi~f@trIZvCiBnm)vEAWdRT8@a>;2~^aK&j<+~f(D4i|N3)F73-lTpH zV9py=qG;7z8+}Z{-{aa+XOlTOS=F8A<|7v_O4PE=?k>-NGLDxD4Fv(AuMv% z@1myKreZRQ}mm=0HsoHVE2$DJ0>4b)w(facs$3WNH zsmmPjf<)mbd)4%rDoMN(Tq;3tGISZ9G4(?5B%`?m9-f(kU#b1@^Z*WaGqiv$8jji# z$6s-&i;5g&O3R=qp_D zS&zAa9($wrJS88clV=eF&k^DD1`<@0OaE`7679t2g#1quxs+^Sx$j{2^X%9d)`plb z>ZwamLA>Es{rf}j#GJeW3drrf#o0p2JartK`B7=MR&9O@&;SvwSVD315(ddSCE5pOxZ$;ow`JGc^}E%4PWCc}b*N zw39-9=rW{g8d1K+`jv!B*i%!KUf_+{4o8=QZXUMwYlv*%gRd564SyA^UV#r2g~Vn z$I7)wV+IK6tx{64__=pNmy$kq?R@H?N=(F>|6kA@G*0sIGfl7&-*%r|B=`K^O~EV8OTaw1RT${b>Y9^Z=2IKp=v9<9m%R7`{8< z27iTON7|cdlXEi4aJeRM!2|a74wA3HT;|Tt?*L@c=66D5?=WvD+&nYMa=v4@j5gaj zAEc#N>TukFU{}DcdrsfVmIsGf?}547io9Q%aHQ6zpoa3u8>ZwF(YRAhA;^-yGq0I0 zeQuDL!p_-dM%#ABa%uyvi|$N3%f$qLhMY`LB7xGM@A&?&I0a)RDAW!m7@HPeC9oN>GlM8%O;uh?N&lFHgIm|X&@ce zw^(*BLtdKMa72;&_?`BbHyIr>l$Byo$)R&sIXws_Rpn>Bz4^yJ~Is zJQp)l(6yp0xFX23Qz-`)2t1n9O%m7b%_>2^^0AVIG*`dXqI`aW zVs08GHfglM3;cvbG#ON0Jzci9gz?b6H2V3Vt^Hoha~}H)ka15(u=+{(7MVmm-#OPG z&usY;wD%7B`ANZ|4TK}RaSRGva@+0?)i;UaD7;SyP|M{c%`}oJFzBGzGJ-sJlBi;<0ob@E=1uPyRs8ryH4PfZWdR9Y=i&bO!* z%Bd;Z*hMko>%b{wfi0c#sgF8kS2774jn_H-ng>*E{N%vE##EKIra=A@=FIN09mJDu zmP-f`Jfoskz@KpzYGlC3@V>-Aze7Z)9&czR`>$0lcy+>>eKd}mt!ImBsVJsu%1&KG zvkJ|R5&ZfYCo7EveQbp(ht1WSDF1i`C%l_z!_OV@})??h4jwaL4}9!*rivE zzk_*xB@gj3>`Yuzk&qEoAftZ^rdVElJKY_LsC)G}gHbE3b)jui_r1ru*5tIf=E1X?O5_PCeYQRF{`-W}Vw3-m*clNeY$KTUX zq78rVziID6r5zF#G|hcwg5{(fFU6>sN9YH5SexoFi++^ZYre9%BLODat*+SAx5Y;A z4sV2p*sb?j_>-N8xDeiQCY{xTc zRD$LyDnLH#06H2Z_+T}#4!i_eQ2yc5$y3ep)?pgrp3Sn=!TD8iz`1APUZBJUPfQH? zmI)5`NjnfAI=0eA0|n+rjLgU;9OaEcb0iP670n?BoONA&9}UC z_itU|2-+2}JKf;(bvGe7p8SUGoQ@G(AM(m^M-s6+ zzS{%^zW`55f%{+Ub{HLt-$iCvAqmGtkf7X~odfPYH9InTb=3^oIU0yV1!ZP|7s?^c zF6gi*`5-5xDnpT0wmA=0o5<2`9k*Rjvq0da9|$5vq;6#+v->Fwwz!%pH+TzUkI{p7 z{H1s68Q}Y^Z7O4xX7JmDsn!OpmYS-;R14XJ5z6a_aMQ|X$iGU*jQ;gmwLG3yeT#A-AwFhAzpE~I+hdi?iVAMU@Nsz^DoCUcn-zr5YAC& zKA75U=L}$ZB^s&bCpDT5fllYhLz#&$TC7bsXy%TZHIi;n)Vm$G- z`o?1m|Y}EkJM$!UHl(_1DP5cXq^U28$C55O)m)-?G`0Ev9 zRb)$4+k{BcN3=hEF5tO)4Z7J^oX8B~3^YH9l0@DKUR9jqmNzudKpOW&y1M*!qAVqw zfn|c|8jSOm8o(Jvu5R^h32K*-0PNnCkt?)u-9CS3<*5jZ#>Fs={1B?t!?%B`F@wk_ z_0t?uEr-nl@av+#3S5|HlvFeI@MH=XT71|mssW&mXfURFw>=*<6Aw91V7Muse%g-# zK==`dh)28|J^=P>Xw;3_mF@f_a&IJfw;kGSGZnmNxnyme#w@j0sNocP%I6wX15-ra>_?BSERruT>X
5*8Yc*txK10t0+<-YpBig#;-94(h>>Xh{FR8lynd<7`M#Ds(;2g+A^ zz}RKqb!0Ma$P=7wog1Zt|3ib(Tr$x){Vv~NEAnvS`&1!79UUuC;kYp9V;_;}A9uRo zU5v5?*UajFq*bZ=;PS1_5w}zZ?S7V3Z)t=kdCueTk6wS}ME!RCGVS3C)&AAtOtSrL z3W?HpQ>1bF@;Db)X~*DgZ_CR>zG6HKOFh`{KG4^?Q~QYQX~ zK4b~xxAK(lo~p`kY&6FX(gjd|rezx5FkBcqc?;S%=RNV-?pS_JhoMHGMWr3`i*bm3 zkNyWE(3^_TsV}Zw{$ku%^Al*mb(=Q=BEs-P=a*o33p5qbo*moBSm>XFr!~Ay{6J&( z6?TYjD%OS%$A6|xr(NSbD2jF4z+X*#_g0m{?`qn-pt)}L>auO$>IdyVN=G}HPJ=!P zS^#nJ>s*<;fioolbdFx{y~QGUx!6to=dcq)#0$Ip~ShMVAST2>1 z$#v8+7`{82+R;dquB~x=$-RT#H)i1%1TT0-fxVo6A_DvR+PO|Vp8+g!0OaF}>i4*H zayHlgth@8#KWF46#UDd-x>&sXJX_TA{cX9d4BV=`ZLeky;(@>ls9O+tHh5aQ7;=E@ zywVB|4Tte((0L%!TqaU|}`dlUI+%GZutSd!(= zufJa*#cAg0(PlWLQHZ0|I2%uUb|W48Zf?1wvu?ikMIQR*eLc;i#y*8=?M29Pw|C{f z&H72}M~-(HvSX?1@uPAkWAjhCOM z`i=_)_L6tnB)BzsA6#;AqxKmW?22s4F?Bg+4rX%2@E)AZAm;Q-69J1)PxQ;n5$`XMb&PP!F&Ap{5)Q6kcV@aGH35ok=~*llthkRz%_JDV=uO6~vi9?8|Jb%88J_DogavdK z7o4U(inFd`UD{d9<+0PR60m_&C^0FqvzOR$XYA%Un`ksT`Av9QTRlpU zZjIm*sD)AeP1&DIpjY1TKaCM^UZo=&s~Yw^7QQ8@YT|!QHOye3b*ZfJtGAs+3^B7( z2_Q`3$|l9D2lRsGsg3@5i^!0A*x2rde$ri@J!!N6mqS z)!cLk_=9I|lqEQp>~%(*yZgJ|j%q<=mvIcBXK${M7I^MJQt~#U-v*>fwKZ!sqmmO@ z@9_t-XDc6u$D@@WAi%8K7Iriw<)rdK{I5E&;=@$*Hi5EWYb&ILr_JL9&(ZAdCE__r`nd;?WTURiB@8az4FdK)-z zN5;-GPzy|*8`iVNd?j42?sQ1h{6g3tCOT#1qk?Fd47p&fEpx`D4^Fg0Rblg=XFlR! zVu(6O#%QSUuo1F3#-5%#h60t;FK@H)-cb}ffvmmfOiDAz#7pri+)I0!zKLKBHL!Of zb|%Gwt*-*>nQe|-LkcY3c4G~nAQCpgvb^U)4PeR>5#PQCrCCqE zO0e??0RP@9cVfPqv_EZdFV)yhqYBHI!-w|RF^X-rfKr%c`V@cG=oAGyJ=lckE#|ZD z@5*Zyr>?Fi>Hm$T+YOeuA5Sf<9Y_?8?`UyoQx5Wg4)e(CY0xJ`d>GHQi35X;O`E+<|Ea?3w z8n4g3Hi@k25d0cE=6x5nTNrA5Y|J2EaDd0Un@8t^6{r7xzy_wK;(hRzC|ZYcT;=_U z4j+l<{L<`hj`V#PT#V4Ca)7E2s*3TYSc41q-06@%L0#S+He2o(m-3I^2=X6m=j!xh zixJ)lcDW)S>!NeT^2dI@nM@yLur2zgK-Hx=wT86?b{CmC?todJF$d1OfeS7mAH>dCLYl@!hHo{ zzz4##a75A){*m}Y$0QsL-98tk^^RJC4X{4p4;T0bdan=a5EG3HS!b1D{&Cf?(vSnm z7{g8_=5A|oPNjC41$3iMSHDxS{4S_6ypkMcce3n##52qconn*Rdg+|r&ms0W3R1pwZBKo8ZUmiI3s28=} zX9=I^123WpfZP96M-105yip>*tOx)le0StR!O#21p9kr>=XjSIiZvvNXs^x^Vzkaq zDb~?ybc`IQPTdu6GIS@qADtszg-7$mFBE3FeIG`_D!SZoIfoyD?uaH&6N)zLtVzW0 zq3djJuHZR2;bgR3&sV*?7vpz?RQ^!eLRf{F-y|nVGyY=33rCEgO`3LF>4FNVi@z zpaDoNERnUEitPj8h>{C2C0XCN18a$#(;B8jkY7!EU&h|*a`YC&gHqUI^YA_{aSSku zx3DhawSUlgXbLWRL~dmK^vXiGz2|4jkVdAm?%xRVTG>^DU%8F!^L2RcbJW&4r6u}d z!6cSEax~H$T-=h|#H~k1VGA)ihXwX7uW#b-)Gd}#QJB-?p1&y|p4ZnOz|NwDugw3o zoj7^)#abjDzXpHNHnBDOb7|`<`;SR%=33aD2-awhBk{}N0_&m`Omj0(n9Lb(XVdo! z(+|x4xUHuWWU7HE2yg5y*S$Ate3Lt-MdQ+@*S@D-l%SLsmgt2L{mH58gO7dLG8sA^ zSJIn9o1bm8KUb-I!Y-3s8w&~sgo58PrMq~`5rn+{{8C7dt@9&pk6auhaK*;91)^O6 zU>`besQ=mfMqBCO;YEGR}7$ zVmp6k6aLOdYm)p_owSP!e@7jEWtvN_^`y*sK$r%M|gO0LzhE zDy|RsMlMX`tgZAuJL@R_inzrZU-~#X(bvL2sO8gYvqrg`bL%-%(uP+(^EJ6*=*e1u z@V-Wqd6Ud6c|1Jm#$G1+62W%TqGD~mc7?_V@=|KE%XjpK-+nDj+mcfLj1vZ=P}+0a za2w5E|8`SIfe1w`wRs9q`0n@5SC}HPKA*?SSEl+7?u&XrqY_!u)yJG_tK*INiXOv2 z`+14!&dC_JzDdd{U&>p&zfNFs7BDl*2*}i39boJRz`s+`;Xj0jlh}Q28DaHIeW6+S zUomSp1bEqC={Rq9VZ5YpTV$x6%XMa(3f@Nv#Q(#=mA1Il>E!wg^VDN!__zDrCBOs# zYFh`>8t&3N8G=vop3pYXLRHkaq@sN z%9?sv|&hDpz8ms$U!FDra*FN2WGrlM$rK3Z<)r*lZ7H+ zX%r+Jx;6@#E(;$@mQ#4bll_0Demqr*-!gmRJ(Z(iR-0E&!bqkV>$A$Wk1>rgg|m10 zVaL!*h&v2hdg^LeCwp!K?0fWPw7Pu+-S+A?8GLtG-ZzQS8{w?JL?Vwz8oZG_Tt{s- z?-_(V28cn@oqhaRr++^G370G)E4UNy;07j>Khg71m@{bkI{QkHRt%YTSDv!Re8T&_^Q!eM;Wvub3&c8o|E^VLuyhe@rR?14kaEX|y> z?dvWs+5E@!^XAi*pC`ky7Zt?jrb?&snBtQ1HA6+WZ@nKpsXl&`MD)xTh})n%&Pm?> zF!2E$pt>UldgI{{{Q5JGiZt|HHLN|*+4Ijs$bDz`8X{mt4^xclWMAW|xGi~C-SLS5 z+`0QJ45$M)V?P|Xy`%KKokH(^QlOr`SSS}n3D81AEme{F_8Y76=-i7ZzpH@uJwWj} zm@sH9#d?OT{q0vaHWHl64DvF%K*JyH_&YIq96RMSGAa)d#Th92k}FFw^*yP;kw2;F zicI0Vuql4+CX*IFT{J6UUOOoMA|T!4Ok$yMc`9m?8Eas};+7kyr*=V=f9cgpHtKhX zFoHr;Xd9=sK$RE-33{|I6`zW~zf_$E85JLOM?053jA?2^wyZV``@<-4-#|XX{M=B> z{i<9*{A{=8^W!|;kCfugapAatz=gN*rK}R2s&rN?ihlpO;c*rK3XO++#nMeE+p;8aGfCXx*~~v=cdU-X0H??K}G#8jo8rV z>#iYQ9;|Qwl6Im`)r;}J>CRcTgf5?vhU`d@kr8MTvJv4?)9#ZI!yaDF@#id@~B4#2Tj(lS<>SNg29uB3XTjTbOO_W^whtvD!8<-9aX z?UZ66?(a>b{{fgw*(>3Psjb>)Z6c&E=3@Q^8L^B<>oPGc`Ba8=0LxJ{ZCdG`cI_Aa zQ(z!NyG0@D0p~!hEBt4dF3(r%!*SSnOaeuFyY%D&;iw0%^aPv76v8 ze%KUEa`GP1ra|b9Y8!DTkHE-4XG!eV28QCb*z?FB`tSlPz|rqmYGuPVVnz%1UncJ4 zYwg{48TE~bV=lp=V?`bNKLAHTxW0`U=@?^6fq5{s)BEH%7Bgwk0yJmfO~P`@q!5r3 z+$uaLC?`m#cDaGx0}K=@_mVz(i)UznQbKR7gUl1^6Nuyu9%9ok$WzqVD+{1r-9`4y8aLa6!SDr5-LQz*+fucgWCYD>I zpAEy>FgK)B*>L?QZ^vg&d_x0iQi_fD=-6Qg5;o)^MebAa z_u*VvH{~O4MxIlqDz6@epPW~gY zWm&pYKU_7!StetZ2G}IPBStyu4(C>HZ4ba8Kz}>+x072=JRVX&QpSt^D05PpZo2S zu}X*LmCN!nrn_2E%xy4ux9qcYhpa34Wjmz~Qn%u5jf>@S=4)W5#F;#kl+DRlOrFme zTcmJP4JvoFq4lZ}4Bs(}$@gwY2fe^==tIMGPEg)= zJ}|r#mUEe_SGMaq^tvV-r{sv)20=N^fcF2F%^cT%#VC8j0G|eyx85Y@{mo0_ggyyRh%`NAR?a412F$kHMR#Fm(I0 zdQ1=AH3e#u57D#y_VwsLHjL@_Z^5Py?NH#{EX%qd*n-aY&VdplBlpO%4;;XjPh5sw zpS}v)KYavSKXw?iA32B}pS%K_KYl4Tf8ZqL0w@X{xD#w2Nq(bpl zDN9oze#eyN(Fn>FmM_411M}PDSX%FtcD+lsBSr|{dYe=GoG%)N@7aX*8%8j8_q^0? zKQ@0*j`2g6VAm(Ez=6+Qhl8KL0hj#KP1yI@>(ma(^d(0SEr+MqK)pTd?~x z*I@sbZo;KszZD0+dJA@a?pn-${Bq1oJ8b#H5zIWW9~91^&*Id%XYj(A z=M;_`SWbBU;@Q8!a(bYvod<@y0`c=LH_OzSld$}?Qwy;Cta_9?VL92@UvWWL{^#F0 z&4s01wEzFMi?IA3+};V6zxv8qwbvKz1+_O`cBb?)CoEqI#EqGJ*JZA-{Omcx^{1Q~ zRHvR+Sbp;4lX&{nQ+VRklN#Xj#nVqIEdRN5jxYb>l*+JFUfQn#J`F6dx>6o2uNzfZ z&QD&c5lQcI8ew_87-2c#w<|0!zodIH=%?{Cr{_7#aGt60E@!^+N+&o>7|TbV3=Zs* z z7TK>XBQ&?qa34hq!nqx@AHsM-MnZH#dhRECzCpn`p)DaV%X6M}AsCPD%~r@uPk4I4 z6OI#{6PPoPWiqB@+mgp}EKd-eF;RiY78%eD7O54@Nd0ar^+X0R** za)NRL%boK%2$r@Ek%4khXO=>9UukQCa++^ThJtffSnko7ggE)#IhdvgG6$p7&Rt#| zssTTF&ZkdR>PwxV##9+32g9o<7H$Pma4Vq%K@xKIcELJdiO>!C2p!K^gysBv-@x+d znezV>EcY&qmBCaK+=?TSIU@sKDa&=-Tddj+l(J#H)>cI7dCPN_#@~am+#v%o$_~-f zIH7}57x~UF6e?n1llE)aFLjo-qNNYY@6la|?CvsHf>y&nI#9jG1N^-Z8se`2XPw6i zgv12GC(IiW@e!&^9u^&n(5MiFU z{)7bAqTJox-QC@b@`6$dcZ(1L!QBZE2niAoNgxmc#1rD~(w&y+?&9t zz4NQkocV@ldGuh88nw&$am>JYX>&@DGq)T*)!`T;?-$><1o;r=v6U>HqMnlz(mhae zM<=ouOL^Rrj<_XKmJG%rvMUuSQ{|(*sR;g+au21<@M{l4aFGT23aoK4-U+`9a=|Zr zJa94EAG0fik<}cIU?~q61T(q200{#{W?&v}fy%yWxQ07ogx44(waKw{=O9eVo!EwW zq)XWs-4c)JHaX|=Xp9fFL11B|24KF$Yn%oxW?Tj4`{abcGdl>Dk&bXp_fw!AS)GKD zz7sX*W`V~8WX;(ZX7 z6Ao)xH#j#0mf^M-8)ShXd8b|T0`ys@ce_(zppJx@nBt;ktCidXj#RKq_te0oZn=JN zly_rNygjUvo#9>(pc?0d=ai(e&fs$=%Tt{db`weyQZrQ#%R)be(@br$J=GX2brMI{ z$a6R$QJ())7u}Cx^k(OJH%Cv#$V6F3-dzT$Wry;ZBzufYw8!`)2YrUQtwXMlj-cRv z`D`)eesn(G*1Z2L50z6QICm^pH2a+egcCb^;K(6Xert-SA%5d@1ud5@<3zFY~;wfp&VQ)3cl&=9GRh0*W$7 zs1YcXuv}$XB&Ciyr)iv?Q0lAY8$Hc6Sf&`KX#~@R+GcNV$*T)iDHh77PzHr^D#koh z)gT`tw=y)PSGiLQrCOv8YmSD~lxR3iVPMcmSx&uk>XuW+MV1X&kKW~6=G0&Y?(7)g zF%jYu<{N<>d0lMSX(HuU=FBR*`p+L@e6#~5%Ddy96$Hl=Ka35ufyw%2jI|$wQ4?-a zee&vxLiI3ra<)|otkDxjX*p{r^Db_V+8OEZ=LL6XCsDMow_v>87??(y;1KSN?N1y~skq@0)(B{nc8|0_{G~i(*%lq$j0 zjuc^aZ-Q?on=o>KR@H%DP|xeq*AqE*M5%R>e- zH0}ep4W%rLl%t{2uB6vBrN!tx@Zcxsu|Udxc6d#Sb4K3mIt|=;bGWpH5?oZ4C9paf zdDCk#BFGvRv2JjXx-xZIv0PV2xJWq?J|zPaligqnvw&xf97|ms#$|iRv*@L;JE%7s zF4B$(o}Qy#??KZUHzXe3J<_)9l6%}93BMWAUh7X$k8R5Du+Cs73Af`u2=_T+U}S>5 zO31LD9VzcFJ=l{M*I-P6H^OE~S>BfoPbu5oq+R9JF7=5lr%W10+OZwwCv{RF>l>+8 zXq;vTF6C^Pa`XdJo2o$BJ|4ZtmTN2`#=>Cx#I-XPo_)#i=uOfza7HEq2BmG=PgxnM zTW04XVs8Fb37s^=UX8!Od&&Edv`E_j3(7Ud2HQQ6bBbjBB277;vZPu)-81ETBU8>R zV?h-vS9PFy;{XQsE<%#jx9k{Z%oFE)Kb3a#sR&1ObBfAvg-E+2ur@{|x){U4NEzG0 zSK5rB(v}Hqlssv(1vEq=0+bY8pGlX-Qq#8bCU>HBIW(G>zNAYr}xoadK>7_0le{mh+SI4yub)c{HxW zQB(|=P3Hv$F!z!&!%xmXaaI8;UtNu&b+zhEPS0{$(FXbE`w>_^beSQ) zLNnGK3chay%L&7oXTas5%Z>HvJxkA70%Y!o9@R8X8{7SF+4TVXdb`m!L+wV}3^fD% z-^eJ#5<4dk$A9*;>Qa}iYem_HR=uv2z~MT74J@a=xB<%zU~YhNLtEQ`<@74A-qMP^ zJ1eo^5o(ryirSUUXxPw&#;w!LuzXjS>XJ9?lId-2Xy4m|dO6l6xleufFF?b-UR3Oy ziaAf*g~6lC(7k&O>g1iynpdV$eaZ5^7s@w#<;oUmx7MRj-hIyJ$ag~4>{9u*FV-}3 zuGsuCY4;W*b#@VQ7gp*vZCm@$vwsezAD)kaBMZ>Fr%&Zi^gMP@en+0S&5bDBIt4{? zUg|x*$t-I`Sk8I%9G5&AK{@l88p{--ZgJ_YI)?;2aFz zw+MsxE<)?(e*Mmg>0-IScRg9lgkWh8)2YU%Qp!_#|2R!aM>_Sfe4t|jI|k{9=2;u5 zJi}MMnK*Kk9fb88yV1OD0A0Igp<~AkG;Qob_4+QeX8Fz@l*x52+}5tJT;CIUCtD@I z_Ra=uduj__{QNRn2OIF|FF(M?KYJG+e)$eQ{QPZv{KATlp`9DaZ_Vuqn#-(px)?huq~BJDoK;g4mQy~$&?^7WU^yW<=b0K_ zWU;h4Wr&+zpuoKNc6yk!AZ%&| zqI z3V4G$Q#J4srwMck%?ZSr(g@5AD9n6r$2{(jppnqm@E|viiPKCCxJy9J^$qaL^$EQR z$O(1{#Rn1027+if~BF&_0{`a8tkF+Q4u2zZJ$bMNH-)%BVLYM^3n$6 zno2`Ex;;}G?MZMi3Dp3C^hA%6MmF;)+Yl_3eh77lr4hhsKlzyOX^7D@P>!44{sbqk zB|)kgOhChizgKyfHV8cABZYyg2)=pU2*?S`nbPx~UgZWfHJLJ{vhxieVaV!Z?dD z@b~kCwbewpy4qrr*5F4iM^cQ4w!|%w7V=(XBV({cVdJnU3wX%$!A?DD&ib?`=}>%sDGS}G_1c@R zV2DN-PN@|dy~vrTAn7VdH`Wq>d1 zq&^00ov0lx1xuUN`^|S+Bz&euAh7eQXLgyCS2>aTUIb2!LwtWETH1qgAjb!9gn8hf zJ^b)(U=X%u`k*G?70D$bC>kh(e?hQHFlDc5Q|^nLvI1c8 z8lyozow`NJbDU?uAiWZPzXC}f|U z;;f$QoTuLYMA?=>YKMnU!p)%*aC6wiYXF|lDvf}hMhHGZ_HUEnuKVFMkB1#cHmR<# zCis{2X#9PyLts8S###Y8Aw7?Y$H@IsT88pumf3PF1pV1&&vSxwLVtRx)8n16-k7$N z@`UT^HuQ|AxBFEOc6zyU-BGe%N>Z5OtTkqWdZ8CGsHxn`Bq<+_K%=Gp3d^aDJh{}z z96(f3dSf%#CxN*_bD7rpa(@Np20%AVy|=5)-rm-Aq1OU(QZhp!_>>4uRexNT5u__b zziv6_xsFw>u^-MepUba;@+na|Z{#uMdX_c8*N#y=-0A6FA;+cXC+At>r}8T_N{La% zZCrvgQu|Bs${#+!m~b1653_?)s;|QG@xgXd2AVM1b`)+NZGx+t9crtJF=^5$IJ?-v z%ijZICylu_f`?_Svx_}E+?`=F*+PMNTvWJvl{?v6AuQNW%V|#^XN46VmH9R)Q#;u1k@kel`?kfaL<>h1 z`gY1PDGv$2=`g`jIPQ&+X4o#}A-&bPzKdK}23Tgf8PT7mqjDJY!QA1PqisxjZ2L(& zENe-hXZ-*?R9s=6b+K+M2P_){UdgS&XHQtVmy2qmpMFRT0{ki)d-* zI!jwASlXnjmoDe%FDbY6Z*Y2N1o;eFxLw+$G08Egq2zq+L5Z2OiTB)H~jfTI|zh|NZF*8jyDL ztX%En2%Vm(7ECW^24|gLig-HCEUiM6d<(D>gMm)DjO)bADw4V|RoWN%XxP|~lG~aU zG&!WY!8uXxhm_|b(soF1$wqu_B9a@W{*?Ln+GNC3#UZ*f9iFHkCXZ+ zy)y?XZRyCInukJZ?-mS{B1784X&uu3=*dUE+{gU>BF!%tDAttg6%CfFWlhURZf_Ba zrdOh3ZY`?kH=$~NJxXR&>$>%eTT#EH8FhrRL!bGr97`S za~e=TzY#f|1t{t*LEXG2OueHU19#6v|C;HTwz3cHE2gS7FYiR_Z9S-4-mc)?lfk;B zEuOxh4AmPuQG9n3^6siJdzjxX-*c-g)$%E8q1xrtHUB;={|hKSB;Nq(w7&+HGc}eE z%`?`|kYl59+K^zm5t#npup0sHp?0HfhT72czmeT&8^d`0VrJ)FgXLz~pf0WXZFc+L^8SDIHlF(4B$Y6Xe^C#!jLz`SysE@3ho`JQOUdK*#n0 zOxrsHt-JbBu}-e(>RR>uF5lj&TI~#&OAt;_PJMo3o?x7Lgyo$7Ay{6zQ?B{$4wUa` zQ&|=>C?CYM1G6w~_e_+ns6*m3Dd*(dH(b6EVy2`ZwkcW9ljp|wxKQfl+@2C-cNZY1 zyI9MUg6Z;(&#FY}>{{gUTYPH1${A+$NqID*9C?Ek$ddAiF@Vyf9527M5pA3L(7St% zf^!D(q?rs!q@3;obsmb25s|U4rHDdeOZFu3cOK6#1{}-_QqmSP;1M|PZvwWx- zVEjgTKf&^!?7w0^!ScUz`|rYX%CHcUfAh^JvaKu^^ZyK%57jIuEdNRhNlLlA zFU#L$WMoMx!@>Zcgyr-szx=aTGaP#Yq~1Dv{Cf_e&VgJbIB6?h*hK1~X+o0WjftSa+tb&;1Z8 za$o#i&Kq9l1muLf%;Pao5`;sS32+H|xeZ}BAvpEU4H*{dphtAeN77Z0PWVfB&gER+ z@HnRqIzLz=I?O;kq(wf$rsg1MO0t4;YM%Sm#;V?Qe0Lr~ThkPjGoQ%+AAiu%ikz<)6A1HDkD6c^;bM}UN$?>ztoDwaZ=6bwNW-ohsfXC~#Boya7AvyQW z>t}eK^Lm>lY^1SOPPrCdUvtL?uOaUnuM@qodIxM`dwWF{P^3=560-0WQ*qu%B8DyLbO5t5r>`S&eC+m)vJ+mIunmeaK+82AeabTElHhl~k;pXsXl&2CK?DlBt8n|y)p+dOTPFQ}^ zsGD%h#E}?nH4eijkAi9ZO)y#BtgzfN$X30}$NF1fVEt_DyKn?1SCaxu!g9)HxD&;ScKKGV5)hi~< zp*#sKuq){r6el3(Ji(3u&W*gGUg*>=CnTaYi@&7FbBYnwoq^1`WpWIu>h()WD(ZII z<@%y*c?(RT6EQx;1+fG92$+_Lpgyx#XQ-41*|q6t9H>R}8uO6Oz@8Xnw?|-hX&@em z@x^xzUiiI}7cRtkV^e7`)~@VE@9kZvohfCve88|HCx2cox_TOroDzn#);uJ1Wa~%z zs{MDMxgAZL<=w7|)u6+6Np1)%j!-XkYMjS5rXsx~59wX``tgz6mW`BFsT-yiXiCp- zu18oNQW=Hp-h4FQ+NRKCe24{{lHCxH7X*{@&6pS{_s??-LUThASC)XVya-J6wSZNS z4aRzohi#}WQfpITvNORw*-HZ;$J8Zj90*uGEt%0$e{5UA0f}57-2cR%|ohV48odPS475 zaklbX?yyL3&~yT0L0t7%=R7?y{VU|%lQNz|??W1-3@8mzPjkX{%E2%O1&!-+KLq34 z){ZhnNzSlLaMYCZ<6~?Tz;pjRCLRxEhfDj=uLFUu$qr%NQ59ru)M^OUkoEADC>1t7o}M%33F9 zYm^jbVf^^v@b+2p!Im&N4wv$x5P37|aC4{)OnwvPnGZzzU?oP!I>NUuQQB2GI+ABtv<=2(cpzm? z6-`9fnI$1{*u(LHl zu7|g@C!=N*VM4AKOj6G<5GR2=V~225Bz4%?!B21U0J(0|W)JMkf%mj@^){!sx~r7? z^jxPdx^J)4F$0+@{X&4wd8VPWa^=~KLhy`ic@E=re*Tl|b)G;xbbkIdPk4Hh)7#u` zN|}vy)mx3q9|Gd1;YmXHbD9HVBDC`zPtWf9_Pd6$@kH$G-R%>RUpV^ zgy%N`%>UCi^!RUNH`->X-DsPkcB5?!``?1)G-_^N56c^NGC*Y;YPYrD5SG_&?nJpP zuh`kCdf-*N&0glUavW86HDK@_dH+t_hAb(6?eg3ZBi|8)J;kUVs6^A8CN$4$(zJ1Q zy*!sK=vdr_w7N88HDw@A+L8Hf@?J<<(4L3VY4UvcSE8i93Kg>&Q7h|L&y{CupaN;_ zxeBBsNI`W=`cD z?ONJ}&ZX1Pv9wdup4)rTCuL60%6>F2>d=m{B>7g2lkz>GGYz>ji_y5U4V{|@(6+r_ zpNX2?Jt&cPg0Q@JTL+5eJ~r>_LG_v@Y&*9dmp{FD4VD`+EPo3uzXraqv!7u3Pxe1; zKf&_9bNlaVmMbtH0?G|oKGehfKZE5Te*DJwVENZlKyulKvi|#DN&))myZG|ccNCWY z;>-6`v;3uBUeVw`^ekt9&#YBVNLXBsv|DR6HDG!Es%A|I%k#tt%NexOfaL_>h6g$G zGnUs}gXM(bhJHEq5h+)|c^bE&5gsPbFGtF}a)svnpdxf7aOFo8;dt7DO3lx|wMilD z-52-E$5olaS3+9CQ+ksVMjNo2fSjO@^UPNdhNK)bk_+G~{KpLqHlqgyuBw##rr`pm%M6%yS4CQ?EL+gbQK0u`REi;XTfj^M>RK z0RTH9XuOZSx4h=`XeKOYM*{B&KN5NW2*$bWMzEaoG)~9#D~ z>_1^KM`z?9Y-aBFJj?ma^O&hw?pP9v(Fx9A@J$1jkIVD<3s}xzl9c6)FD~08;9eL_mPFSwz+?A{W`3Pm4D#G-7Q9qcSHO4zakWSCfy?C#Bt&WSdLr7U1B8n5R>(l}K3I7ZmdXC#p z#?8Y_7(U#DmtVVtH$Hd`vFR}gjtW+f$B9-G6qr-9+|I#TC0MMi&GQWMNw4#XHWSrT z-8A-Qn8pm#0H4F{$Kz&)F}THXENns@;F0J9mn1I?Zk&rPr}x0*Y*HXdZ(zG@SymVV zr-EQiN|);{=V6uWqk+eq%7S#5Bu7=yo1AeGvgXNsl;?-C5yN68>nIAA1KJ5xAE}`H zhhRBV&eO}BP~4a|)?pr(F#ssFU!$cgOpvlNQ0{9;R|;|#RUx6@+)-unAE_fkIBLWu z+Z*XK%3ul@1Ba3Tq%0_tvbRj$5BXg=_TtVwtlYH>Gj=V+{NpRpcVsCR-@636cP+xR z^QYoh32FGPlP5k4amULQ33ztP5^UVE0Gsc-3wIv56LVy}HTT|)!$-Ga*~+=-kcR!i z*B?gxiY_$HZ${%lwKV#tV%E{+sNURz`n$W4H@5~e_b*qQbzlYhb}mFpUlCf?4q)-I z)o5Ke9o4sWpm0GwdUq_q^gT;-z0M6YQMqUey4TLYz^1uqy`x)!c>U5g%-g*TYff!O z|He6Jzq1z|tNJjwWj^{g%+}?V^Bd8yycIp02C?$w-MIDWO7yIk50~}RF|ct4+HRBM zT__*$UHPb)RgXLNuf+C;cHq`Mx1n}+6B=euLFbBTSg>_5s%F%pZ}lL0@0RUu@5YKl ztFU123N+l>iGi*2F|d6By4DV&W_g=>?=f%Xi4EBD^ghg%bM0K+i_W|Iu|UpgnOwtJ zat(R?mmFD%RS#{%?I+e^!NFTGefL7l+Ort54=h9P7WweIy#vdS-G!B>)@wTN(5>j) zIH=aTwh!%cKHXbqW9sIaXj|8hrn{!0?v4(%##K|%a(A!Bkl=P)uS?eJ-?adc& zO4CS*L7i6LMx(Aah13%9l;i-(7rc6>3&?Xu#a;ITgB`0G-kV zNqzY!S=y+}nWoJuMb?s9RIHtf^u^W4W}D<{eXnVEmg=zE6#2oiJXqgTH>rnMm#EcA z+0_tfmQ$$=Qm=89Sh*TFlSU{#)R;%OO|X4UI;AD*duE2QR-d% zpBX#V81$3!P1L)lahiD^49Zv;s^(G^rsqfFv;oT58Saqpj|qt`$eUe@Pw@*K$w57S z!g9MrZ@8rRt7kbqzzNG894(QV77t6yvGDSCRaib|;%FVg!x1|4EGI0tv9^Glt0Tsb z8>O(^&Djp4N8AKIZx?uZIl;nml)`e;C=*85-hxM7ehhE_I9Y?~awG~n@>oXk z{zglk8Y%T(2uFWO9>F!gzC|= zi%`6}L*I9{Grh~h6iVN=ZV5K*UW0{q%*MciZZuAk%O`*7gIZX7(Z7l$6)r~BJ>Xd|}Wvk_YlZou|~ zo3Q=xChR!0S@Je$y8YlrY}vma>v!FS)m!h7V_B}pbLXZNa@_N9`}(E0d;6W(wD)do zJs|bY{&iThZKWLl65PJ^HuNr)GI~}EdT*bOzPo3mTI#(hc4$i((zv-#u6GBDR!>3E z-AxJ;3CQ!;HK>He^^p8}GXVMZd4DY|H=wwYPf%{aaswuZ&(B84oD9vY-qWLbTt@?3 z4uQ-68#eU#Z)7*xW~dGILcfs>m0h{s{wHKu)WcfLkYF*4@+*c>zJ&5Cjk~6PAC^CK zD?Y^Ms9)KJhIO5&lVd2~)`{{xQ&F1YIcGA}-{93AVr5G~(!2~(0#D)oPQ zYdQvRleWcObFqBwA}n4rAA?JJ(b!vyqWWB9l&7GysQ_gyMW}2oL1lX>s@lXl%23-` zftqPmC~hxDUQ01@rWB&2s~mMRo6t13McZTq@f;-*JtYAd{dwrz+K(AW7NdDP9YLDq zT)I@_o#2~L{6;b?#xjC(rp&(Y8d@NZtAM@{+g?YEm)cn~i1~Is- z53SRsojJP|Q|EM`P2SO_fkv?gw9jr+nBFh##;W->NRn^YNclcbX-h--!WuNMpNh8K z3>ey{9Y_S`MRKeRXxg;92UTmQVC#jQ3dPN z;8*P@SpJj!Pufqg{O{cUyPD+$<}7pw$cIAmzs0lslTY5z0H5D{{LVF4{(-Fb-WO7M zQl91W_f&@E+fU!Z7r*!bSAO>{a&Moan&la*qycl6S$-vJWg}9SS4+b-PXl{WhJ~;^ z?@nn5t!zTLG>8pY&Xlm6@S8F#oTq0w^9ahh4yW^FTS9c^5sovT`yo76Puq@Uc(=qO zav)bdg_tseKOs6jccKUL!ASm&)uD)=U5s@v9K`L<>;Q*!GM|7oc2GWeI;C;g6py$W z#VWBvuxfac8`I1;;45LZIWI?HF^wNTgyV$bObL3KZ-(*&@fiy8Y5bt46w6Q`&s4pb z`LQU!V*qkOM|zRd8=A&x<|(Yd3U&#?3B(C|3CpibL9C-^2MYO8}%%||FwtJvwU2%waR8Nz$XJU5|&$L z`NAU08xylVwd0K=R_sdy<=siqAY{YitrbSc^yX*)T$=(P4bVuC!x0!ScT@A5Q=D@89CPU%rcf_~Tdj`M-aM zukc&k^Y&vJP;OMbJ-l-L;hX0V=X`IBO*VTA(|eeD*YtvCfJjQ&(CFPp=?>-(kD9D0 zb+9Sr#9);wJ(BFK9@vxP9pEYN5U0J1f?<>Ff-&KfF)7v#<07pvF~(N&=nZX^=%hw( zX~$eISf)DSmXI+R9XSym1-|es^n+uXD?D?2;3@amJI5cBBW*AyZ~`nMtl^UvEO~({ zx8j=agE7Gq;VZxCQy2u3&q$04ouqpFqa!9`Sm0Ro_U1gLRO~Z6;E?I59^1FbHQ}>0 zGHjBjTxOr`rE)3UhSDa63<~p9dt9b1uFf;=1HHPrF6Sw$G9q%a8l_KoEe%N%dT;X? zplpjFlVWI@8*(m`5#oA=Bnx%Rhh3FxVE|kGEjdnlzVjS!2^@zpS7leYAKn|=951*O z2bwiDt0S&yq4Pdd?u8!Z^f0Fk7d1Pn#m;4VY%x}P45pybFolj+2^QwF^XaC@Nf;h$ zrTe2C3-?LAbIPi?G)7=lwiBFdL#3={*^{K6r|gtvN7cAACzT>0prkG}HO{T%nPWgu z2I;mc4lrw;=lf_nS@JEe&T|>%Oe~7!8IbpxW>prX!7~}`(+K=Y2^4y&QyZPe=^rwc zOS!roz1}IC@u8Y>At_$75o+J;sIFn_>AF6NX#ff?FgdERTr{Qq6J)M|s`@ zy)e#VtOodGpk#WMJ2=|F!QL9KZjP8RaSVb2ePmvqkI}avMArBBcb9T_0_+?oVT8p^ z7-f449)95wT>9b#m@G^f6(nVGz&Mx!#%jl%NuH&f?mta~P|9+7{!HPr zEJ&sUW!*4Yhx77ma@jC>{utEwCV7T$k$1u*&;Mw7&X~`Xy57U(dFL|PhJzW?$uxJxo@m2Kl@x*a~so zWk{J`g_|SoaZ|W0M#MNFZDy4$AB8cAE+}5srgf*ue=J7C+9PLvJ;tZFN&VreZKvQq zX|r`oJFF)K-n}VsWu4uh4!gD(I894}eP=w}`qJRkl>nD6Y1ec~o2NBay{>(_GgM|J zxF=gBUPj1!OJ@d-9HLQ9D|VnzJNKQWo^ou7gZDr-yk_RYiI99S3qAws*M65VPF%XA zP1BvE-t9p%v#+%yCe{RK8oR7QM^H>Xd8_OzRXyR|y5*Srk`plDYleqlS89e{$IlT1RdA#`gvv@();rdTM^9UY!@&P<5?GmO>Jar0> z$^M@@`!G&F^Pr~O&zWIf}<%U#?;f4O!!g3>TC@iNpIp+zR354lIp1!JD=c!#zfN6l{p0RkaZ%##7PZ0+0=*G7D%pEuDx39t-YnEW?%6YhT)k568Xd9=?Ac_8;AWJ%_hr$AOJ<&a1HSjydR_-G#RPCUg$A zVe0%&EZ8&${i}P?w6Fn%-TBCDO-F7|9;%krVamp7n6jrI4D3l@UdZQReIpw8^r$4w z){DDv`SVK(%Rm41NBHa)AK=q(KfuRdn!U>ZR?l(+hF=fK4f_d}|78Ci`w5o+o!gJW z@^8QST{GSxzBZ@V2lyNc#jh1?*X0j|8(WnA13K zEF%;&fV!W27;rrTb#6ZtmaBZryfOq&OGn(SA|%Wyfp1%)LhzIY6`B&>7TnRS5S{DM zn{4Vmixi}LPKi};N;pl~6#`VkRRTc5YvvnT=JZl#9+w;7m7tbDmr$5q;$}~Avy=#@ z3B$RJ^9C$uK0!IXqX>o#0MFkrBtHnv70^mb=tv_ZHH`CIrf|JE>6*7VQ+oCq^E3i; zf?vb?oXZK=35Dr7O|Nr;b#B9XO0{r1uE%|IT`nW=G_=s&YNB+X98OGd?cNv-ujV*~ z<$mo+I&GXYJ;CWUPIIgb(evgul%g@b`?;>}N7f}AH@wFU<9gI7=Q@;pF+9;J$HMDI zD9d}sX?A!}ubjpX1$Jr>pfhFXgP}Fg`_600P6B$C6ZWcyxdD46Wv2nx;r-^v=1|RY zP7|6Fj8le%u$lVhlwzTFIbpe*TysM5KL_^={9bU+>t$GmYL@%;q^owQ0n6Q+qxHGx zGskC=n&k}eX=s*@N^r$!>cP({(IMN0X8C^?mQ%BwnygW++4`YR&2n}OcyuIUbgr9r zI5-pssaL*zQ6S<6q#O%_aK$#s`%>r+kNg0I zoRkO{9cYQMK9(5mI3D(%4j4Cal)`fAmUDQ2d{QLFS&fEgum=LdyzlX<$vZTVCxJLqdYcagMAE zDCKNQUm9i~num-TML6~D(|G^)U*i?2BVPLWHGJ{*Mg01n&G@XQ0N=@d`Oec3FD1qU zk3E1lUp|TF-+vVEy#55V2ccS>0+Wmdsm9V+pZ*)Q*(lrt&4 zImlgDrSc2BMhsBO*b>oFZZlwT!t^`^p7Bz4Ge1Mh`f&N+;`(87jpL*o4XTerRJ**d zb+JevEYx@i;Vn`J$aBTuYccXpC&))q{M2k+j{($@<0kKk0g0)%%XN6%)VpWOm=5&j^OR?bsdrU`f@kW_GtiTCZKkq)R?@_h6gR5MaJo1rwvE=xL1Zx?w2Y-QA5!Nrz*IbR!@k-OWHyQbHKr-Mr7|_kI6?9XpQg*zV`Puk*Yx zPaFh{dIei-z_axswg_69sN$hjCL^~J(kBi_DzW;tDOOX0 z_IE=F2nUbhrFnvdzjAc^%Yn<5;@XZP)P@8#o2Z!YZS9C9bN!E9&O?NUE8o2iAFYKH zY45KfGxt`fEEvW%KV5w6J$oO_+Aa8Qw4a^gW=oNso54ba)`~STJn`_2f2(S%3KOpY^bD?i($w&zaB%v9b*e5Q22kA2y zJ!iH%8j!D*#!fruk2V~9StW`*T}^e?d6K96x~SdCf=B0g^q!0ffu{7s;|-0{_wO*# zNDr@mnkcN9dWu;lJBvIyizMO=!J4tV*ob0>16;eueiw&D4&ME`P`jXn!;kJ9`IL26 zAK`rFE1hK6qeAE^>xLxBuay6C7J8?rg!m$1+s*Z{{ACck)#(1fj*(%0TA5ZKpu$?! zfNFuA9sRL<<-t77L8WrBw{#*%)jNZUXl9+3D-Fe+QBxcFIBTR_kY? z52^OPkW@%2hioip? zx6|mOOUXo$@zoQK6uG?xh}ubUqJm;4GVbf@-j)K4#u(N_x!utc-+lVS6sWbrWAbs| zO_iR-F8gjGU9{9$$^U4Y+2#CwC0TX@oo+`lh0oI6537XNadXEVG)hNH@e}V2t*%$p z9k1#CM$xtX*@z&)@VJgE0dBziNSh?dNvrie0RYsx#HB1 zfek6kCFe}c-#OOfX?tx?-S=*KKtW!hi zhRSm2wx#n*6Zv@-{B=+m%{$x1Z$6>W#6yS%2{y@RuU!5-!rcAmu$KdZq^7IGu8k8~ zG=ZUFf*ZNZ!~S#|+ho8&Siw)M&^oVGD5}m_YCjAuQ>eQX{WjgFCd-0jRal{8bl*4k z$7t!nu7Q@uF%X0#%l2~wtqcs6b@*Uc%r$-s?s!<)G9VqjyNy0+YvbRT)zPblMGD^@ zsb+b$*L2b19Or(VxUL$61tCH*u3kz0#HU@1=sQcG&#=q#tp&FotXXVl2~7Cd8;6yG zhu$~U_LUsceD@eqTy8zmz@7Y(l*{pZxOQCLNEd4_&{2P@%qIoR@Mwd{j<0C%(iqr# zeFRNh{Bg*hv9Ca=QD_HfB7mY@vG(Cau-sY2p{_{vyabv4QlNHQ2LX?y?N<*Iv0ud+ zpPbYb?^E$JVglDLh-kr0x+@(ME!Qh~{wMtw;IlPtaPZ!T#m8%g?vEsK7aa)6(d&$3 zKFKzJDbfnnpVw2q2lLHXG)>im)s^IhVUxnbYL&0Y4$yH|7NUyZZ(FVWq_WR3O#TK# zAq5DK-Cxv=hxD?Se|Rr%<|flF6U$bY3L~VOO&6={+FcZxJ8$BWPjC5T`t4-y3G;(5 z>7{QkLI9i;A%?Q~b46e1%>I7?SF8Wa2{3buVPndjyLH}Tn}yzjLaz?9Ztg1KHDuh+ zIk@rb>e8eMGq?m^eX+c{_D=(CH=7O3r@N(Y6?V74G}PDd(3iZTLzU^a5=PQ>cZV8$ z|3&k619-cMwW!KbZn}i`H@BU;CUr67A9*HIfJe+|?Nl4olN+78^ho^2C|-!C+{u38 z7~TgBagA`-xAj_|BJTwn$K>y=?a$@1%u&1 z(Z6Vasw8{LY4=q^zh<1HLq%mlFDrp(0wqSZ@UdjxUiV&e)K4@4u~Y$yQ<}M_G+=zx zDVminv_e}(O}NkPhj#2~2jFc`2q&Hdv2Si+q^>Kt`e)D(&YwV8XNAolw2<5$VoxO> zTD|`Z)(!gzHi{9YuVA|F+*KpU^B|~p7BFZFzenCJi&EHei^hh0YGC%h=K)*t# zg1s{tSjo{G!r=m~D`&626bo`IhHJ)S%VekWtpBC2g-gLd4ykLYPMn>dx@Kn|e8h5C zq0B%;e5O*k6PQRg51p-ugZS0s-!fp2;Z1lN-o9na-WK@6#MaZGGT979Pg>}~tkoPU zR|==i-%$jPt{)^uAKx{>3%RJ*E7HhlZKrGGmfo`2d-$UAUB!9M;qi}}Y< z^)D&H1#UPkYW|22r54er&x?>ZqAWcP{A!opSYvMA8Bj6!l>GhMx<{tbn?%Xo-LrAI zmar(@q|npyxPdD8QXTFZQ{EG-3q=i6R?Ce-b0@pVJE!Lm3)Ce9sg4%z?w%A4x&%Sd>*H)`ezW}3liXOsq)yefNTsWt`fK3~ea)+;{TRp4!R^(~NWRTlmq(=F zePY62Ebzm2&wlP|#eWYfMU%XWR|h(q@LJi?DmlDYXiBpiecH%CH3)@ib)FZF(fmcqp_alvdnlTA-xmDdYoI~E`j(( zKr7Ckbr^ziM>F-h#y%#vo6qe{O1ko_WeKh(w7u3s$8}1_8t4To7=JSv>GAd;yOU z;1mB9d5mAID<1iwFcxCBxw2T6w^%jSS{v?KE`!K^C{+gWTz~X@MGdVp8?EIa(vh}R z{!55aJIIcQuM!@X2A;#k9!2`C5fg#UllMv9;tK`R>Yg~7-jK=yNiB!u31#@a>Zl!c z^J(=b1NZ&+B!zTR(5p;`!JCtm`n44(GobNa{`!h-{;T{SMi-4_BtDq0C$Rx)x@M zeYrx%&pnR5)iI3w> zH3~f*dQn>*5b^v*DmnYUBx)-0$^Xk*qFpVD>JB) zqaXd?z~Vk8ZKbo@LRSp9@E2=UeALJy+81v(J>}NjObR9-bZY?W;SW%z(k^emdW^AHOpf=e`h8%n6_=(6@kIy!gv3Ftob=rSBq^Iv zvTs}Iz4fBFzV%^Z0fq-{BAl6ANo7QJT~~xSb^j*2Jz6F#oN^&YXU>H(w_AAp)idjS~G-p|y7W%C*J8bK(O1wCfL?_KW zzcXOiQL3pDJKVG!muRJ>YQWZ`FA59<`O^OlH;L=NsvhX+TdKS6HaJ-5I?O$6i<1qe zz+Y*@h)X`2xq$VxeScolF!H;<{!@Io{DbU^Xl>u1y3_a28ES3_7$f8Im*SY_Yef&v z(f2B!=d$DLkFZI-vlu(IJKKsij+Z1bberL_kAGY@s~uX<2fdCebj?jWta2T*Nj}l! zBGCE8)+8(fCNk;0kMiR_NiOLN^45zI`FK&Eo)pKq!<9MG=;!0_k5}VJhVa*32Cy-J zLeY}*C1Pg?q{7+grITio^ZJ3L#}M;bk_>p$WUFoBY_}5wzk;sajp2%RIie%Z*K#hx zrNwFj`(k{zzcGL(JJgB7wrZ#M@IATtNmKbw#}AU2j)1qjld`vYcol^!EpA9Zf&vj8 zPIAAKG+L9ZA?Fv0#t#=D@A2Ho+R*!Q0J4ci%+#(9QJ95RUESI-tT$-N=s{|(7J_U` z$M{xtA+AWL$FEN+eGA)<7YrHJxdxZ+b8eeEZ?C)_p02xeS+DMag2HtCqW?zYap(Uf zXaSf9;Pu)85S;V*W~Ny$*2X?ull%j)x6^_=sdCVE-NtF2+_|m3ZVDbI&eU!GTnE0c zvHdYiCbDM)YpKHp`3VD$o_4K7YhLW!V!-Q+7gDWk#g>9BK#8A$n@PIqx^NF@E;%#V zUCtv^YX%d@>bj28bVC^y(fLcM1i8_wqX#bN#V)$Bs<0kfmcusyk^u_?)4djBBbF-s zAui#5-Hk{Mm^z_s37tgaTf)dqa=!AsMVD|>#GtU$fYhEPsi`T!FQC2Tfyc^BtbV_s z)x#wFOdM0zAI~2B)vKMaS)hm(`baZY!L-x=PKahp^Iw*_e#C_E` zc`l)==Mr-)U?Rb5?UC_qiFPxz@C7Cu1P@ZNvco+7zHU=PZ_88vs9!6R@h!!v!W7|| z=pW_}OE)XfPGU)iM^Sc60E=r5@@tM$&H+pG?b8Y)S2HpoTGqt$uOh3}sCM~;yO|wZ z*X{f}aA|v8#=K1oDt&7qj7WH*{%_$epnOEhv4jEC02}5O02x+|WN!2uT9eHu3K)X- z@FVsX)-BKuqfLccTW>FJ{o-X6FCMd;Ge7U(i=Io4y5W;ZH!tj9Nga{-{8|II}_5Qtl_s0}Zix&Uyj; zbh0EX1u4-ahrVM zUI=mr?#_5%38q;T-WcFpn-n$TR1}DdJ^~`lq=ED28)-BM#T}z=W3i~Oh?OhKAY1H> z6KAA*<^AAknqvV{imt zR|tMq7dWajPiS3-{6kTM9X^^Yi_OYQG|G_8}p66v5UpNS{+C;8-6geExyVI6$?H|=MgP64l^ z232$9YpnAuF(ymLL4C~|VLA(b!D;dlp?IHkWT_8Wl}4~~=Xv9E;W3cLIjEioZz=`* zLb}9GmXkMZvf7-S3Mc?I{)_;A)4 zrwYrcf7PFX(7o4_8->k+VM_%nD|w6V)sp4gwBkG_HZtNr<5vFdxtNlF`^AOU_~0`1 z59#uuG)Wjx(EhFFP%IFYvPBINT>C>?*$pdf^Ebt9965tA$3h)@8#}-1QR_bON;Z@; zxPHou#wzZVNF8VuF?h`s%M5bYbj9s=nq1j3`I+V?R zYvB|*VkNHlX0a^xdg5i8#Ti{3mc^fJT4s3H`076~{JtnwOEqy8J7)pTWn!yWh^sz1 zw(^|FK`XT?Iz>f@MKm`96^P1;$)5V@AZLZIyN_I@NU&%~z6^FmEL5aT5&I z9t0zM>3?aqqBK`RWvh8T$xY`Y#ydv0u_+NaCg4Ge-_bXuB*|FWC3iWhUc+pj#|5vL z&A7TcO_;ek#fzI4uk2(sRlc*M<);;XhL(@bibF)v`#O1avJ|*^6@jAUg}C;vs9%$L zFAq%@2qxZV&fr2O5$X0=`G(<0pg$J~k+OwfT!+Ju^7umc)ifoba?drU7wunkFOpLt488XqXod)CxJT;Q$AQ7c+3Z^4`W;;|I z{!q|0ls+`-g4-?a-L;&#e}01(v^l+jy%>w)%75J)UnRTJm%5uKD}r zyVsB{_d75}l-K>#;_9by&T@i%gk&{~VU%NY)v?mwJJa;qW4U#}$0E$E$?exix=Dm- z_F_%OS_XX#%R4?c+zK_^3kI8(@3~2IX3y?SF(DX>d&=zHe7R2@AolJ!&UxqOGg;fT zbX@Le?y%3=&sYp8^@1+ru1y6N@jJvuc74!K;PjZOtNJByYx!x&JYb=TTmKvVT=tFqY5hJd2pp4Y;H5a3dxAn0Ivp9oe^cLD48Y1ZW5SY8K%&%)) z=6`rq7QO%OddNARD;3UB{iDp4TggJ5{uA|?_Ai6TKQ9i4?I+~DU5Iltee9u`f25-3 zWW}Whapu&u#Wf(47XWopTG^~2KXZlbeV7;DtKjqYm`C<+udQ>78!Ej7-|>d-^+pc{ z!A6R1+-Y{YQgZ&+zj16D^nJT&L#O@a8~%G(9GVbvlaRQ$OjQD@J0yDX0KOzTndqRT zBYlX*QV87FdGR~GUyWH(j%umJU8?UmWHI9RQkMC^9jGPbp2?dx>z>y~dHtKjX7fp^`6h3+4{T!)vjFU*Ia(KdbsKkcA%x-?_~Cis{R6eq z-I-LwqnO2QmSr?zE(rKQ!Whz@(Z-%v{>zy9xjrw|8RIm)3}60iUNBv`JjLBb#QnTh zNpRW|=k_mN^VRcTuA8HHzti8f(!G_>C*<`8!ezEVQ-W`X1xHI8UO;8>nW;g{hlSe@ z`DWkh!26=N>{KXYcy69@UcK&pQOn_5gWxO=6YA|&yaLdVF}w|MvEhz_(wc0DXJEeq z{_qf~)cCzuXO_~}*M&n+fe8X$bhVR{)v?#s91YOjwW-q4Gg&>E*E)p zH^Z+GA%8ez4m!t$xX60)iX||_qtDwo`saG(xg&+LO@rwuhQZ zbQ^riL~S7UU^de@r#X!p$!i5oPk4zx8c<9G^xly`Nd!rfXdZ^{6KqkA3VsQb)E5vq91R^c4V$v~D?e(y> z@Hu>{)3{}Lh|>ZP#X)=V(LWS>Bi9z3CJ^Q(zxC8=8Gi66=f#%8bSKT6d&8CP!*Qy6 ztepST9!=yGa|H+L=~)lCNjh3HBLP}8&|2^ptI2?5ea9ZlP)u^Z6~e*q=k6CC*9F)D zQ1Z&M-J@eMdd8OUUKSvqr0YcmFTOKx|Ly;qoxw_q{>oH?a$A^c<8L)tX0k_fH_v3D zIh8fe{#&K-)mA;JF(tI5v}8pYaqGa!(t`IMl*XUr^ik||ezKJvYPO;QY3bCnfGwd) zoi}Gy4e~=wtE$Bmm}(@56$Ecp#E4t8qi>vss_v93AwA1=R_?|u6Ps`seS#Umq{F1o zYs>>>*^313XhHK_$OSjYHT&4FyoxEHl|or$eAfat{{@wA6b+$szeH1z2WnA(6&~y= zP%=nik)-lW{ir6;)=fP7@7^-awTuX*TRr_>3TB$={+p} zW>{@STl;;WHzJut5Eg(xb3`Q@+?DQfc0|GJB0KqwIz}(L@!(COnck;t1szj3+;BL* z{VS$+RL)zd;nx`~uk(~vwb94h7zs^PBS`RsINZiKzwfgHmSBE;3#o(Z!pJ)&ANd+n zoTL0fM7ipyH=PFCsI*R&9;5tTK>~|@_D?tZqx&0=aq&jIS^`uP*u#l3-kV(`@}!Jp zmw^qLAXCXd^%P?Ndb@(d|CpQ$%UYMsIuRL4dNyRueY1TO9uHmfg^&flbW_G#Y=(FD zrd6&n!UOybIj@Xc8D_5FLz}?_)%lpEMxw+&`GP!!pf;gjs)VHH=+xh1c-(BT&9>DZ zO!^)K-M`kWInvoB2+R_iXDK$~Zjka0UGH=HesjUvBCJqoZ$d$wrElfwLpYdqYZ?48 zxqX|6GSjjYak`b2Y<_a$+2~Bw|0gT?+w%${Fge)9XuOI^Tud<{f{#MF6WI^8RBR*3 z5{=&;isF>N_>pJ(+G$D~eXqz*xMPpw<*!aZdI@~)XnlpRC_(6`tS7AC)$^ymMP;ey z9uZF6!EUI}`%){p2nt1;)-^y1?bJ0!#P@zx>LXQhO^-O}>5G@inqo*;fMykSpT#P5 zF*3Rfb=2AlQDSzhXDvc{o-9C>YU2}sfEbmqzvnk0Ft!{KC&S3(LPVX~X|!(5f!Qc1 zzgX1KvH0s&BM>xKTz6h5f%Lr<0`bSum<*8Hdf61~AoeqQCs@al)Ni|Bcf?sglsY zjr6AP2fu7ji<0umb;7OjR&%J$+LxLWM<|ZE9W?A(}xeQ)JbNYfsDY?h01_Ps8tVg(C zd&KP8rum9$)WgbbfM1c?{L&)c6THv+yUx{$SXpJ+vMoQCy2a+nj$S8ycuUaZ5BF%f zUbsIwn9I^XUa19>emB`Y$@rNICsk5K8$BOL!FN`jny*>=fbr*CxT(~8b46bXBX=4! zg74jgM=2k>@0okZ)kG)mlCUX6OVh%T6wb)43DqwXpt%_bU;PFNkF_Z-aH3QGZu**@ z!z^gb&-qtjQEuTKK`vOaTUvGW{Kykc)V6PP!XKG88_MaU??5YPH!CkSj>^5JOO(6` zBTo2KZ)m>aJ%{9qU9Yv{noq-cm`sa@Bq7=-AIhbtTh04^vZEU17e-E-Yqc(=z8L3uwBlKVww2U8>(9-K5~)qn91Di4Lte4)ek=u71LVu4fyRk-qUI(BD+uHPox#FX2 zpSKs&rvyfN@>=MWu&Ml=uCtQeGYH^AEXbUWdt`8G9j;;=>ra@eP(q7djf}|WR+!!b z&G*}17FT8;OSB1~T6ckru9WAvNYbP_1QU|iRSPiC^E}?+KSb&2a&f8q`oA>)tJWFu zu=S5lOH=Giz3I1uqJt8~wrWC%t3l}&HJ0}^FdTKC2?Q-eaDSD_x2aBPi|f3Q@M=pUgiJfS~Ana`i8_8$!o?^ZijFb8s|yM`QGOV2&&c8x;! zDB$+)%8r>7Rjyi)nz^i{M@;VLV}D@uG3&W6YpKS{a9Y&IF0rslk@5I z24)=3B*uj{JISkqNj3)Bzr+L{9%W3dRKEy z#mbAlhcE2gttuMzx4CXuk;J-NkVkSf-Og!xJWG6*0;hiX;Zqk$Wr{V>V(IFLU_PYr z$;2v6YJJ-!r4QIK1&8jLf<4aIHS&KFXoCH_7I!g|T72KPTo3F7*n;Pm|Zq=&){*b=GKX*B>zin(sFj-G+p%7-wd z%&?~c3>o&mGx+mE?ahBV(AY;{!kjz|qsd&wOx3lGQG`5M334BYouErU-|z(APVV2_ zZXd6WnT38Z41Hu3%$nokhMO!^)IkFgw@&XwrtId&jr%9Kp6I#ZtsSq6bz^}ZW#E1f z36 zkzRvG|FmS9&~TGyfx+aaf&lqLIBeS%ZZBt~L6S*B{};M-?0y%hHR%x3W4K;}{4+-o z&hMBygFEk174+yUKM}qwAMx|$Upb@-`dyxppS%{Jm)J7iz$WnANrS)7GjzC#&E#B^ zP4*T0wR3@iS7hXAfg)tmMUV5VkiJZ8j%E%{gJM8?q!)^EuUDaNL^yO2K}*-Y-?u*) zG=$i?x2C7-z8}7KSk`s?BFIRdICDXXXgzEHE!6c|TBSD9b1z+}jtv26FL~AdW0Jd7 zuGW*`wvLtk*{cqYcFA3Of!#5>YXK}1cQdeVBe2I@Mwtc5`SrHh$l|(xGT|b3v|>^Z z|7Z1n5P=~K96A9}Z8VC^n~6$5C3Y!)&B@(djRQFH`K2i6JE+`uRQ}VNrdd!?ImRnv z(eD|#rtK4Skq3wd)&HLHvizRh>sdScHd?f_jExxqVRz`;AKJDeMWElE{g(d>bB#uj zQ_*9(W$Z&Jq9_A2gQ=Nn9k_z#h94_6!u?FqoaIf3GU(%nTipGFT6+hkwcRFs`9GVch)f_?cU>^P?7$t-P+hMfF+|zUho1;ngs|o7(ZVao8*9p-}#Ka!LD@z z)1U2yMbQ!@;S`E=4>80$X}uij;19r?`x>kLi;$ki4)7kLq0O@Nit-Vb)Qz~O+)ILn z>j`~cNmOn{Y5v_g2ym}oYSX~@Fas*z- znb}=P8|jt;kr6sg16@M+O*SiM#)^#XhDSKaL$hcZwiauej=3b6B!fy9woGr10_4JY zu_=C+1rOG_<6Nd+lqLKz&q_Hv$_A_L{FTP(WLfv$OWQu3%pVE5B{~+GJwihYmZ2T!NsHCrQg+%+W$8eUQbdUv$;I;vP zaF?s}OchGHDhqteBx7<^Mz-AAVn<>-U_;V0(esoCa5G%38rE|x9F}Cl5an{Jbohj> z){&%$sU-eR09+RGF@E#frei+f7JI(cb?YA|+KA){we(=`hTrIOK698Wnd$vZ(ELe1 zFZAgEC6m@DhU*#52DzNahdvw_Sx;6fZ1o0`F0WuG8*ps=)LrWiD$@aR%wPO_eGqgm zUgfzgaDE~f{OZ2_B91HD@4$EYw4aqb#2pX6>z;7buqj&!KC7_PkovtyF=+#b^zU@! z*z;3FpjrM?T-KDAxqwE94}S9VKf$EX3pDztt4L{ivgW2Wng{Z}J~oH1<9yb41^H5O zus&6R@?ng)E>L`-j11p#2Zr(c4RbRZ^kY$u$~K+TO(0wTOG#{PN|Ios_t`ok*mEA-?+9;6tUD)Y?10HkH43{2*u#7?WX zJTB%w;IjGuVEb31C&?XPOM@SJDNO&g!G#HcH%6mewMTmMY9FIRDvg_K{MB4BBMp;h zIdrYGTU%8}xBSI3Zmpc#MFfkMKe|oK+6A;czX`}vveNq?GAKw`IG&8(9HaY5Y!FRt zkjHd`pJN>V&-5ffu~Uf!BoFX}lJJ9vDGxj%UGCy)aI83d8Vh+w2Po|tJ-YmOsUo>k5zLS$ zHm^-Cqq~??4~_T?f7*L-aR@6#%FhF#Ax_V^))rDC*K>HYjVZ(HlDH3rMOyLVOnfm@ z11r`{Qn=wUG-^GfltjDH-9NpHt_-=jo8MkVdWB-j(ai9J21uBhoVDBQjLxJsI}`gi zg*9JYkU4el5b4CBs{|!RbTV&e_Erl~!F0?38A#y(dzYN~(JafH4I>`D%V}Lra`3$=x;TCEzHZ_i`lQao2gRQ)xr1kqZz?Mtn@uVOe zdOj;8wgvp7{qWmuaxi6O{Cv^zv`S}bJVOz$@ z^gC#~!d;*ROcZ=V|1sa(5HDtEo$Qi-D z$WB_R-VC(+;X;4r>$lV)#*za@Mti{1!p4qpmz5;Or(3Abg|}U~>KvZo(H!?ayb$8I zGL>0GfA`rSC${lU&Dw{|-uP2VTaZ?RE2qkBh~KsT#MuwL;SyZTmsfa2hOvuU5Z9e7 z;A*MZt&u^NBJ8A2Culeq$`{7Y|NPSa$x4(|^qI%^(ap?F?5-M+M1?%@42GQe)pU^q ztC=Mk&8PJj!bb;6BR>r`SM_U&xdRhz?tye;Y;3@;?MRp7c&RPuP)Ta+6uIKaS>ZNU zbky?7?hPrZINu&jFmnnt!6Ti4I{C3%ieXpEXI|25yYM?~D@_WEJwYuT*Pr}D2 z-RWQY$>lWIKy8hQOt@4{H$b*b_C01}X1cxB*SI z)b#x65$7`q0$5iqNv|{h{ZgVh?H|B69gk5u>EFFSO-~oHV~|O*gNetS>->R+-3fq$ zwmiW1xT}Y3?oaKlx(UZZ8>Dq=zx=LeEq*)MB5*#3Hk>2gAOz=h@B&!u*gY>CU^@-MBe( z(8jfPB*N?o@!SJI_-sN4|J#-}TeOn<>xhRkpW~j~B9xBTHj-EWAmzJ--6j3E><&A< za=OW>dLH1DzWHx-eNRp5*Zj@iBrY&(rUCjn83wFrp9KJ9>N8-wG8WZKjq&7)Rcb}Q zFou*Y=?umwzNMFZyMTx8xjAJ#T9%!7KDRw{Zoea;Xs$`kB8fSHm#xCC96n(aT^(I1 zjN0y*vwkW}3Uuk3w;~UP&5wsa1VUWZNUl5=F26zpu%{6l^WiJ#Yb;Z&Wv^bbJ%})h zx$N8tRiPW&jLmzZv z2lxT&_nYpwg?2UH@y-Jhcc=y(s7qV%=88Lcq{i^9y0uX=8<-;oo%+Elk%YqMq30{q zbIE~#KvoPT`ZSQr^rqclutUJw5LZh>(~J7D4Nul}xQ;*h>vAl8KG1YI0{raMo)y#u zdwvJOzrESw>LX$wQgl<>-lC){I0XtA1b-|2H~wjGUl>9r37nSx>^K4TR|^k&+@Wks z0=oLc-}x`LkG$voSbIBEVWpjFQm(oe*8X$-ea(XSldT0G97lUk%$@K~a`=B}*+9x< zCeAN%GO^=zWNt+J`{XC%sXI4xjW6C2e-)zS&L2uC*9hzgkP?}PSTV7dv^p?~sVEVy z1qv%vc%zDBbl9|-g%Cr9qTJ)}-?YR8^!*-s;d+#WiFNVXzolywO$`dBZko)@ww6>z z_4~CkJ-R|nZ(74i(%tQKh5x6Haq9c`@ai-?ZaQv(Nl)l#otkH3KV_V9%YrYrt1l&L z+Han^WcS$j?G$Rhte4!YSF_UD#_F8q-QjLMcpoLaVS?Nm0~U(`{7iqy@fDshKX1oJ zU{zxWUr-@-$Q-B7pnA67c(5Ei-PBB3@l4;|;-c5nrmcUN&cVm-4WPs9)lUwtX!lEf zdcjD+3^84z{k@}hUVw`Kk=MRVP8!C&)m#|-WAq~bFR#b@ZaXXP~p z#rbuHk{OzYqC9(^S_B(^iA#>^II($)WICE4uT;UT(q{R2B`YD}Hs&no_U`?ykZKC^ zvFYdoQ$KI!SzrJ%vBBE_Nf`o%_;?~oE}ZiCPoF!B(3H>5Q+~7?&!or1gjtN>V0#<= z1DD%vZ8Ex=)@ZPC56{`C0Z-FN#bC6d8ITCw@b}!2k%8%{^lk4Z0B?OUH@&W z;2OyTE*E}vFUIp76*R5mR3tR!F2-dCA`;#jy zcK&7uooTep#S}grm5V?8;eeD#GOLUx=Ptc-U(e#Rbcdrjhxju18n2e~rBGJJDo_AG@=xeO zQMZK&TDEUD5HcO{R>v|)^^)&?$9oSf9QxmBx^&r0I&ch;l-avwI&*R5u;)m z@lR{0pc&Yq*Xc6D>Z~>~cdb#F`nc~9^QwuC`o*1OoBPFRl>bS`4CEz)RYUWnl7{X z_gimhcGHWe5rjJNW)Qbu zPTosnMMim9#o&&1x79>O%L&hKc zNZdZ|xvR(V&UKet8pq`xpzY&QsydVsO=nhQ9YaXb#%SHj*&fWlY{z{ZasBVvnNles z**DtBmyk9!#DZo&V%n92zsI4y*HbbGXMRboA13wQ{VHb$;7;pbR_B%@p$qpa!5ld&?EHrD2ted4R&mz3O+_OgpQI`o2gFy6za*8-WzGesu9so9S6 z+325dy~<2~*Bm2RExJcjM7hSod0wx{@>Y#StwZQ5F0+*!(A18s%=5^jdjk&L$3J#Y zyu{DWUPDbgeibcj&E%$0sHWLH;rXyqlq5N#5@|8x3fG zHO6ZaNKC;u3@ED6U|9~6W~sY4sn@+WkpVf<&+M>(Eej}xq~8&dIvi&6c}jQgV5C%Y zuT|>qMnLKrgQ3%Kee*Q!dTkyRIHJ$fF9&&3;M1=pN!^QDE+vV~w*-)F@lp4$J(xD) z3v+O5rfiFzFdjz z^DBQCwbEQkj>2eOpHJzi_#Lv=jSn@aMMf`|@~K5%lnOYjLvI87I(MO$i2Pz!x>}p+ zXmh`*n@{;G0Y_?T^R1p)%L%%6{lnN549lr83gXJ-&W~E;$N*Ng1|JK4mS65c*-Ra;oBJ>x=KL;I&zZlqxjG(-V=T330jEC)$jrdBSJ-NT&un{J8rD@45i z$v9E_#U2&dYYWXZ^ZHSQL#C$vhP$TyjCRHUkl3`1>1q(i|8n%)f4`c-12L-5&T4}^ z_9Byrf=`CShCp(JlKz4kTKr-yfUAwCGM#nH2;$ss*|_Zxe_jVQ zs?`qJb=?s%gxpVxz&%y!a5F4kM&11%v@iDmqX5l7;So9H>9Evo{rq?ZI7?HJ1DDqS z$Zh}%Lcb9f9&;mIOAG(PxQuxMA_a_91R_>aB^ONFS3vM$Yj><7d@7Ch^UTK52|C+_NKly2Jfl=M!p|Buh*(yP@QV+gHx>ze zLDR$QFxYNk9JfT6Ns=oxY^>$=EthC`5@~1Fsbm|pel23ZlKb@+cdRd{hp7kGMjulZ zvmelCZ&B4j2lvM(30AD|3q;*iCoa5S)VF6vug|_^)!O=j=xF4?(%bN{lCI_Im~sHh z14(S;cF5G#_4;Vc4lCFKqbXS+VCs!ErX>NyiEX3@b2l4{5v>#R?}G{^b0g}iI_NtD z8sb8*6oAaA$d^7*{^rexkS3hI2;I{rmtfYEYQCj^6ah~AmQd3F%%`t!4s^u*Si9>v zXqzU8?ugVN8fE-7v#J)Yc4n-`o2W~zlKL`ryCWJ%uAja~YgPvf8?tq?@ZnDD)_bUa zCZk*vDsCnv(fLcXob%#-&ppH7>ouo{E!HQ@P}ZWKOjSH|lQsp|q~a(Mecb`$7k~0U zBMS0(qW6sR<&SrzcIF8ye&JkLU#23S5;^L|FvCYeUpYVKSsdG9D6!Gp1hz6UcB3}= zrjcd}QPLsbSl^G-HGaXRQF0P*ljxr4qry)TrH*zLmSU`Ct*`^lF&i`REdftGg4|Xn zJo>Q+);4X*eGwv!Y1ca3=An92KlAHWc}fxqtVxjc9*1N8M*P>iS88uP2h@rFV2=&5 zNK{~ynbe4ZE1B1ZCR5*eO=(8zp=5c0T(QS=w=ycXTRGf|I>m5LcBctH5;-(s9*=3c zfl!!HJSKIUmytGstv%xD@cRcq6}2oY@vqcw*hfRr-cPXiex|5>T(2-Lpu5rfjq0s3 zfNQiKTg+@m`5XLKdH3=SEG+H#E!wEmI1PKm$fND@?T!J^UApmK9b~1JLsj*&IG<8S zKb3ofz3B_={!|Kzm#)gv|FSlj0vx1?$u~I}*_HwEv#~)*cMv-_+ZzT)`G|nQf5b(6 zoQjKbBl%|Gn*q0T3FpdQ=by#d3`-Mza+FlFl0QH}Hg69z&)yvEf1G0&Smwd`?mdUy zep%^f!Ep2;te@et2n$6k-N4PoYFNoHvWSdR|J`H;%cqn!Z{hv|P5QpRRg><%RhZ!v zKwliM>-rDh9~jc2UDLV+$G8cEjBz^$2XlqSnr(D)u@SwrIs5L%(3kOigQm0+@CH?S zP$lP4Bos$?3Ie^oJ6U)Jox8VcLSEeIQ2oh=c^aXseg&|Xk+u> z2Sax=k|+OUx^Q&6F)tY2mB9X`;k2*okj0MQW}H-fe6wgSuyS*)$uB*K-b0qc4%3cM z?eeFx>uil~KBZC|g!EK1>7jnsSwTFwnd*zfyW_Sy+dtf!f|FFuOb2(ll9@ZjvGX5} zLV_>u2~O7YrF-MM0`W3bbImi3N?=FpGwjTnC5YQ-Zn1HYFNXAB?JO6phdQlzd@GQd z*txM`q?{Y`syL#BV+Gr7B;#M%_a*po@3b2%g2R&gfQG5j+51>6+D9HUxTLhZewv|% zPWxo{(+vL0F=sJW2f7v(`U|mp%a;Tp>@MP1T!L(_lN%Q;GBwOpKV(b!w3%?hyp@i*C8n~36q#wsM6-z+UQ7ZdM% z>u071CWu^*G~9jbW3rmLoawj;DK}&Ga)~#$O22-EjMgKuwY-q%UV#%|75HY;+Qx)r zC9TZ|C9iEkaKsJJm5nF}+V*7U=U#l-M=EciEc?A%0aAHHEK|S85^W_v6mUOGi21T? zbzT0;lo0r$UFs>}LYE3Hj7Y+M|R7woHK|P;grdMyEPsa;7IdrM(h4vj727 zPY{^9b@93;z^f-&!MLx~BLw11hr)8MZ&;X=qh38pdM|ig!>)RR6PEi*O3!k7lpE42 z0SofrKR;Jtx#ys?YiDPx#0rhmMnKSjSy?(yX_weVC3>$S#TZ|LP|jQG%8=S<>_531 zk3Duw?U6^0;;E-j;_0VP;q>X_3X_>W`Q!=Bzi`QN{hu2>| zulDMT&wS5}WmjH#7H_Xk(WAT7jvU#A{rfj7EZ@FsJr*vXiNQs^Xqn!Kl&VxD*QX(^ zD+gX>!I-k42Xz~!Y4An@#Qb%XNNGUs#zy3AGDGjb#)g7&nvqWkPN-~vXU@~B-0&

coO4@4>UXhH_J6lk@s|PhZyRUhd(~Rk%5Z#!kQPaF* z|18w6Y(q{@zIF<{{p%~Z_|_Smd*KmWdFujRfAtx>|K??U@YeHq|Lqs?{yVSWo%deB zm3LplYwx~{*WP{sZ^^Q^uUyh{;EmVKcICAT3eVZuMmuxnL7X~u2=^b~uXf-4dvWAG zIsf~1V&9>)*tl&OZeKM6v*t8o9rQ!m#Y@loAW(0@(EiBL<%S3O zji5O}uaRfu6C4-;F$sGKbosm2!*cGQP}hLsh8fVD%eXF~x8YGv7|wYby~yd^%K(gC z4RN{-;W$&~xyy%!ZbJ|8Ci(p-vTd`hBOmdht!WB9Y0RS+6@zav<$5&EdsaoMR;_nc zgrLte@b%xhC!MJ*pPl;9e0YgrOFop6fLyhYZ2rwlaCnPtn zGdnw&^8Ohe2)rINUK@Io^Zs!;J3IhT9a#p*RMItUEu8JbQT`{q9BJHMz zj1HZV^P{kQbhH!3#JON>vWIGxhsZPU(v=8{hEPnb34n8ZjLNXMw8)2bnYVhXxlT(} zSnk%Bp|Cu#KkIw2+^f#A^+qrv$&B;28q&?pw(4N0)g zBrG2RYkz0B2YSHO%>j1Slf)*##%6*7b2lF+*t^-Qxp+FOZn=Y#tpam;mRnj)R8Vf` zV68BnUgZQn6CEZiFdyq^VTR>bWmu?LKF)g*e6oTtZ^shsyKn>(qpVe;g!-Kf?&nn= zg@o=x42!f;Z%wOo4~$Q+$Ea9qxX8yPgE}&B;@C_V1Wip-s6{CNi$ZUGUOD1|;F7?c z@*k8(8J1*u&HLN6K1}t=InUJaDj#a}Hm3#2eU0u-Lu{{X+mkHMcD&@pA*3f!y~>08 zQxQHR8$o?(3eDA1U4AoCelu<`58+b&WcC*zt0xbm{Kp}mm+6g2{IQ*nZB%8tPmLsa*;VF8_9E}P8b5qGnSSr1Sd47x47X= zJ`|K2u$(|V|JEwxF0Vk=l2W8CkYxnrb7eb8Q|A|`ahl6A3Ck(jGACCpL+X*7LD{Z7 z9~(|?!#ltG5G!`xhMpze_}M>yi-x{>y#38vC~Pjo@9`(JEt-Zc5A8*8Njxt7@@*V_ z^9f8ybC&CwA@@E2ksb2R%Dd6CX*zz6U%)rt58EH#hT9L_hT9IT!1>S4;cI+_q~>JQ zEU3kaD-XgcQ{JJ92=(p`u8EQRQH1yZ<8#;~yI}L_ojCmB{Rk=z$DVWdVE38*$ex;y zGoPHtoNWu>pA&#@{_QKol}4j-paS=tI|MH&7e2was!87>$8q{sFJM^AWQF8WQZG!9 zXO%Gf3w(#L%4jq%X~m3nGx1COS_3bBDMubs8>?`fy4Va(`PTpW7%3fD*!=hotUta1 zul@X04##ZU*>G?9RpK_?31JF!*fI;(B;X+3H*#jEn#JE}Aw^$Lb4vG55jM7?b5<_K@#P zQ5g>B<|ugeCm&KX@&Ew;^hrcPRAGFr7d*P9{H+Vr;IET1oZyt_4flLsm>f*#T-l4> zHM4ND_c(;hG5Z(AAfPNBk&T&1npT9+1}Xc+SjJIq$}-&>6H-0kTpFPrcL6QwaIBCr zsybTAe)9++PpKCvwdEo8pkZE8rZEU4gCMh<3}78PEf-Fekr+kjpZZrsXuR76RgW9S3{3;O0k$Gn_!desiRy> zzBg+*>slQNo1y?%$+Ivr&Ou@MbH96A^~*;^+9@peEslX>q7O#7j)#MvJtkOM4h&5I9Z=g;R4FoLj=- z+!g_scDcV|o>I2ZJf_7-y(RVS)EG7Au4pxn-UQ9JtnA7}1?y-7ZmY{Wqv6&a z2k&0FHv`G=?N8PYmcSX(wwalMh?zNHkYB&HIM|l>;QXJiNSh=Ob`=5YolZy{G`9eD zZ84Z!ABy0CJRMy&Iok_%IsQoLuE69ZKa2==kUCS^K-KARD~Q3wcu(9CVh2-zl;&g%3e^hlh=pBCq{4D~yt7`nlV{15P`y6`c2nh^P0upd@lrk!x^wiK$$umY<^6Y* za^4g+UPpZ}aAx3ib__^ciKCUKNgJ*|9llbpaG9UfADlMkg9fv%89O2Tq^=<>r)dCB zDW`+x=4t>>|5;fI%RQ#2szTUfkMYOu!@08$;u(5cpMC%rFFdCCoIn4} zL%4AM5nOuiaa_Jg5AM@=@zRrcf!^a{FJ3r}m!5kPFJF90jnl^bE0>aFP>F<^Of^zZ@v1g8mHfQ`5dmi^o$xo8dGk|l9 zFI|-5eNK*3?1c+*4(A`m#b+MIMMiQc61l+ zzi&4lIJO6e4{pWw9jmc>|3)mlbr$*;cB5&a0Vy?UNNLJIYG*b)N&*#@*KWKKEU*8o zVYvaw4R7EL}|DS;6M&3~HJQP4Hg#H^~_Rw|zD|VxOUT<8_ zICf(@otJAFIU@^iN^M@bu@e=WI@|1|+V3ClSOuH?=Z zG;Zrh!gx1JDd29NZXR&m>o`>{c)JLr1n^|B)@&cW@)N z?_P~f+wR1=O}An7y5$PXDKA7=K4n@n>be?HJ8cS@2fI+*R)g4@EF{kC zOL#}#^S9o4K|%S;@4kQ+-oA_%-?*q?d}w*V>DT%GvrLflX8OYAC-t2^^`M;h1AFnn z@qKFd9ovaL_pHI*gKMzr?m3v&Q;9q8nuWX8&BKPhE3oZ>yHU5O8hNv%jX%E#ZM*u> zxqrIC^6GWX3d=8l`j?vJlwqM>`A3XjcNLZsiYpj5I1)km{{SriDZuAX_Sf1^u>9}b z{;ROuFb;|NFf zxT6`C6S&3?7At(zAeP>9<=P5_wEBkRP4uMNyfP8rQ!nG(+@*)vX%l$;D9(8DQk^)4#0$*6= zcxp8hER6k=IF_ooaL^0gzOw@PQXs6&g(=k^x$df8pxHBJM=cUEe$Xa*B3K9 z{OLh%$g!})gV&LuoL=GV2%&MBruSR6<2G)D{dKV_C&JDJm#PRjl!d6-ms3xb9`Df# z#tAp*QBJLL0&@<@rZ+i3xs#kPK{=&Y?5iW;Ap5ng48P`4KDn6QeC6ZWr7Kyz%IRV5PMMGEWLSKv{w%{XHqsHc z>HY|xk^#q}5P9a35G>E3TXQTX6?o~h;$0SjXnLH>F;V-S9WlK2^zgqa)>=V1C2r{L zNQg5s!CoOd1Gv#s+N&c@huzb=oYyw6ITdaN5xCi75^k~?36CIm_y>5w&TbOy?JeNp zWe*oG2RL}xs@J&_gM9kB!`Z_Lme!MCV`r%_$J)jMPLk3SlJWs#CyjxPvkjblT;Sm4 z1P5Oin5;%&oTnx1!(8B*Fk|Bah26KR77?sAxxf?pw3tY=ph8>Vw7Zw9?VgX^#Ivl zyp*Fc133uplvi)UmTYT=}hWB!k(Nh_Of(5zA zxwTr$_7o|nQ)U$+VM!5^R}><1eh$(G(~&eMTOoPe>}-YM1m}e020$kiHvsuiP)?vu z?{EW(Gd0Wr<2lRZcV(XNoa+#jGfkkz?#wKt&n!f0M=sJ^a`DB#eT(1W_xLq_g_>zq z*mM6*{PJIZj@!51h9#Sp;b;H;3w(`V;K3_TBd{nI-{GHd<)1$_dxQ67Aw$ZioOxyP z?u6ptYxm=Ge2b~;`_Q_wL$>=F-uu@NFmvl{+;w~np8oVKj=ppZiLEKfno%s*sY-+0 zQdXd6+ZX^2+0Q?xSbbv%GdeBi{Ju5AfV?Uc;&_-`M;BHI!x1o;rZ6qKKMS@w9&pL^MYz;kCTkOVR?ozWd+vhC#)L6JRv6)L0o!CRn7qcQ z7x^t=*0?#`T7x#S12RzRQ199Vh1z~oq&}5;)1CE0i#c$!gOqQca_^iQr0$hEn4O30 z$5Og_U@K7^wkOjag%$~~lZIVD-f zB{-vKVH2MJhTk+&YkEpb+`De;G6T__ytLtuB+6r4APsaLt-QEuNHuIAVpslgL@>}A?>W-k2a z6~SGeG3uX(OFNmt&`l8*h@G0F?ZQcUp4#~oC*@a|)H{^7F@QKd$|<+Pl)uSqXkI4u zmMjmRk)@vdyq5mc)Aiajz-Q7OHHg2p5^g<-W=WN~W_@ycm%H^Rs}Y>5ZuuF@ax^z%)rb@xt#g0(+mCb zQ<~58#b+N^DE=lr&tE)?*Djl(`xU}NLNl3H5HBgg{0rwF!*g+1V z4W54D0X%s803JGV4^BO>UqShaV|#J(_iKl-HqLQH(>tq8R(tcg@(R5q}HY* zwN>imX?gN(5RCeDQ&F{{1Ep(Qk$-n1a__E#S%#$+dF$)U0Q)KgzmfeIEH{JeDJnNY zpi2;(yUy?`uTu^4?7M5P&6|OF!&L~*X+mUkK+qed+@G-?_sf*?gwR7lIc+GMHq5-A z|GEv`*Nx2h%^x!3xD4oT&S)Z~qqhga;hNWz4hhE!?o!7(iDSrXWOExuK zv+H%sX$CB>-Em`B{*tr`a#z%%e)BYxuW3Qc_UQ`CbLBfEcWN#MZ|%XmpS^;MmrpD7 zep%k5%g>#`a~I_uc4F% zgRIU{gicLWNtMQZ1IS%nufUu-<=QbM&$}VPG8C3`o`8MYJ#&%XlY^X&Y^*+fCoX^T z9Ikx&JYIbBEH1w!@98UYj<3r5P9QF2#G7wFk2l_X5wE`g0$zUqdA$10WxV_L3tEP- z95BiVn$cRR?4$YN0oVnXx-U|j=h6&uewmax(Pck@5f7DzJRH7Tk*|5evVJS zdtYJs`=7pv4?mLj-Un|fC?_!g>{EJ~i+yJ1Lj>jOUH;#J0mfHLMkr5pN|3U&0`UvJFS|lByv7N`3CRsla)NWh zavD9(xek{n&o4*(>|&MYU?5MGVVOnkaoNWV*~dVh2KiL&a!EPQz@7xygxAz>C1?-r zNY!EMpX0aq5WmtM^UQ_S8n};8FLGL@!mTJ-pCCTAkJ{FMmSOoJGk`gbz>I)ge^=%S z(CNKQGo(>y{179&H-c(%-q0U6yu+Cv*OQOxrR_NW)@f{fbPv3X!VzATgoyeSl+A9$ z#?yPR9M`2U(uzytx28v2&jld+v@2EsYz0;)|~!I#7xOR z{$LHt7fiv!@0`WlUCR+wn~Kb7#aMo5jeJ)A4xi%Zc;R<%;L%UcqHsfC!kAh3|#AC;Z|>kBkm0RNzeV3 zWQF8T1SPVJ5XH7C5>|2^H0z3RSeD5Luh`_$5LlE@o7`-ir;RTT#JHjWjLP%DEm`jH zkmn}NuywzGz_K*CfI~Jz$(}dJ{duaf7^ z@U4h~OJNY~<+^*(!&IIdYO}jlM!@7hO67b^A>%PI!(C;H#-+NzRqj8HL-tM4mQv0X zs`kHafj>+^V-V7wg6N)Xm?Fk0%p^GHC<_0!1O!i$vZ6D|95k{g4WVKLdi*6}*?l9ZJ}t?>#S zB6?&!SwE~Z4L3zuB7c4(!YY&TK0V{sWWmy{z*>Jv^=6Fq4zz0M0& zlRR-wKGGISeIxnVtd}H@%Q?;Kk=|X1ys0I~Z!bb#b3W25QjuDgjG)v&L={9Msw^J< z`BJ9UB%)wet$HE*R>Y!qc^A_9O68e$M(*M&)n*T!nu55Qd2(Mektg*dJ1TrzWA&Z| zbtJ;R*ava)4u?uPmNC5mK}|7wzry7`kLu5c&lGvbTNBW^b0#9C-f%AUhhIZ93YOJk zQkDw>+u4BQ;8@$Od*chR8kS2p;F!aHK7%k!xK6?~Wwgd1)W+ zy0jl_#BP0RE5^!kC(8$In7o5w@|y)qYLPgY2m3OA%sPG>R$ttM9d91P9T#>=eOoN| zstgtd?yxNI#FS0FD8F4kv{y7DTIw>->M(iEQdL%n0UHS(<7XGbr7rBM26Y0w+TwH+ z2~$4PJP*R}_Iu_dYh?pM2Bm%+$bi3;TO4U(QyUDs#!y7ceRS)H#e{Mnn365j^ObOv zvJnKN4joeFwuCFRV~1k$>{9K}@{>9&vN}oL-(hH8+=ba27r`aP7s)NTFnNx~_$VoZ zY7=3T;S2ZDNCY(`Ye({=bWeFc69gzEjL;IjZC(ODaJxOgIT`Q zTb_Yf8IW~cnJ=vC!!WMWAETsv9Lc;=DeJ3(U{^1{SHq6kAXwykY5Rno@1rs(7c&ME za@@6Jl5#L^g~2*1W^9BlmL0tt4}E-I%W>=60F0H?IXf8kjMFgQgi$slVPQKSF0QsH zF37|rDIe|ZE#V*HE9K@*8XJN^lzsd>WgQ3D+gWK!{qm5|0Hh?xsZ>@%tki#2<6tLc zv%RY&M%xUR_bCX6&fSMc-Z_KuF;dP-8R}Up*Qp{{rMTRi<^1J*8NAcCGZB82KauB! zK|EdMIWanqnYy=2ozp4LfRuaAtC=|$T9;%KP1r9Hz@c^py3Hbc}v0sOn9eIRW#f6Cf*=Sck~<*2j|qNe4+ zI^738B~gfK$&z|79HXV~;ApR`8MW{%jloU9R+yOV36q}%0va-qx1d#?0Xvx7N6CB| z61q#^lot%IvSC&RfgRONprXL=)NVFM;hePaq5jlw(H6lw=hlU&My067;AIY%Ek zKT4+r&7iJ%B0}cM`_hvFcc~j}+ojDS(`*a4wk0BbW)YI5O*+aPn+d$>8SXce@-EU=ogwW~nGWic-;j5Y;M~wKrz}gzY-yv4 z1OUh(1BZr4xgI4)<&9hs%d<$K_mKz0nEbul_#MD?_}~d7Sh* z*Ymgv&FO9a%u^@v|G*~IE}y%20P~g&qQ1LY zJyO6 zQM`5viZ@9rrkxL4Xy$V--r9r`nJ(Q*7;ZL#ae9H*mrOC<^m)5Dwqo$DB|oSx;~2j?Mgpa?}%3$f$D zZFu>Mm+;a@FW|!KXL08FC-K%tui+(mk6*oV39rBTJl=TcdA#}V3wZtA%Xszei+KGF zdCw*P{Wtz>@4hbY{3{pm#!GTN*g5ySltq`G))6e1FFb+sPoBafrw-%zy}R`tK5%p^ zwjWr7eMdH8U{({R_Ell+_N7?0V-Yr=SdFgL9mth7aQeIgbnTxh_oq+pQ#YEo^ZvPXoe5hUDqxYY~ z@(=LIr)Jp|%C8u({L@d~{|gzGuikwP-+dwJuRg%*zkNdkcBZUpM4D92xm!Asv!M+c zYnqULXFcK;mm+adDe~`^|5rkh4%{k3HE~9at z`Gn11nB(8_#qn#%Q?-DTEcRIbS@tX$qgeAH;nU!&Nv|@ zp?Oqq9#ZC1=y2LM|A`8)f5eCX`V}sG`7+X4^O4z6gx7!bKHmNV2g3gj@BQg>@BCKvbc4zx;9U@i$hvrx&#T3U|MnRkcx2C}os^VWM~R~3TbK7Kq& z!(Bd(sA)~$Kp4c}W(4N+5GS0ag+Vl#fXCZ;P*<&zTJ;!N|l1ETZv#*JUO=X0FasqM# zn$rlzhr)8&#L{4eG@`r;)A%3JdBBRL~M6~K8t+r9ZLfdT$cc^(r`q!XQ&n` z0RxA7JJdv|7rZHKBI4v)CifO%T)YFqn^Q6T|7Gtj;_F1y` ze~mq6y1OdOY1NZGUW~HUwW`PslJlhv6~Qe(5P`+fxbTik@$dLI%yXIvC)auK@OFTQ zpA%|3Dp1o^2}fUh*tyJuz0+Jcy3B{Wmm@rVTosfPn)?TN!_C84tymnK>|twfgSqqP zVCL)@m_Bow+5}KVUesBtUgZ|=nefR7f zMR;c#+^WLV6WF#`j!kk@_+Sa00sEprwJ!>5PltC+3<7AyQxUFqKf!IO3d*Kux+`F( zFErn-pyxl^6I#>If{37e5{zaeYBW!k-AF#t#)>qOhVyiqEo~wpdCGFBH_N2Vtz>&x2Cv!}bjibVc27BWy}cKo{rOA0 za(EBk`TQ-s|NB!o^`{d!_UEJ6{Lof}bW6RGHY$qHc3C1W><++3Nly5O5N8}q4Z*E- z>FAV)iLCS5QM{%DC2QJ|FYR~UhDzjaC`I1-QdN-?j2CZdngZj5<#`)wb(sJ?M{e{D z95?%L9k+3wQ?BQEcpSq3cmv+KAK|+J^8CEiMMav#b?5GT@!0E+78bwPR^=+HRE%HEnUN6ELQ&GOM1r_U>bwHwUeS`EXWztX8 zs$!K2*>w3Vs$;{X4$=;XHaI!brvgfgK5x`}CwD zvNsK$4H41?NxOF@nW0@{DBQZ^6ddyH8un4%jj=kw$bn+|TJy~h*X9@nwr=h5=-Igj zn_s>O6OUhls!RGc(Q;5%vXrAjI9CNp`!<C!IceJDe19efs~=#)V#2iiM?NxQ@O z@WuJMKUKe8gDG&M4aXVPu=h|Z+!rLmb0Asgow}rrYzc#<+!H>-@|m*E?B^l-aGr@9 z3F27?Jxb}torQ#^ELc3JqiVDfTkpIK_VFID_|8CdQ#w2fgW**gj+hQ<-=)3dn^t@a zi-|j#$e8t+17Cc@$PztQ2WT1gmBE^KgME`n8VD8P1VjZu3Pmkw#?+hXA=Q?*u+ z?Y#c<8>c@x>o$|7&dKpm#r@n|&q;VbQlP4N0(0i9ATX!W+*!`)&=L*1rbsw6N5Qo% zPC+?8pRk;EW=x{WV`-^Dn;J`&3ua|{z_TI(GvgdEFU|>`*+IDQp{ud~PbW1&v5WK- z&L#4BrLk(mLT~r^p7XRlr8>NBA#!x9rrQc1G zHjnp34Bi*%J(ILg%=N$|$sCkr|HQs8LGI<^7MCb6j*@cA;6QrPL?sfXJ>z!n$9;GX z+F+UcK;BQ7TsG#-Lt6HgZRkMp>Nd?kF4HO}BiL^iK+U5SR2`S^%dM}VH z_XnwRpTH@D>hH?6otT^Afsp!Sx~v8fZ8_41*l7Q3lM{llwmjr6 zZ^N7{=`+G?;a(mq?P3RPv;E;w7KQYY%1K}zJPS?*!N^`x2gedAk1_L*x3*b-Cx18Z ziTE}G>k_@jeWjhD`kP5V3C;ba%?Vvr3}0y@A}7iaFq{j2DIZj*N6R&)Vx5CQY}1&; zc7B!@O4qk*5@4R2-sGXn3K1lI1MN~mCh`%yl#2aqL@dcg%ymPo%O{l^ck8=2Vxz^3vm~x+g4u?)eAt z#FKa9;YV)A0}t-Nz4sYdej_$)TA}Ll&e1mHw&r7C+bGiei*yjQ^SVWC`evDtc{_HUOoxQL59tOahWrhLsRFG$^E&nkrm+Nm}xehSg)T=>IelA$vB>PY~ zZVk)TmSxAF!t(Yz7NX_WN&j*t{p`JU;Up}-q5~VAxd4a%?^~$9xCPxe%D&ePp?CW@ z);@Y6GDnM1Fj$VO?!6kPKRX`C%-v~{qO9Ijn|&TOV2-oCmy*I_uao8x8HvwZoKPC+M2mp$luV6oV5*q0m}))4J0@7 zCJZ>&WRc6{!RO2?;<+noRb5Fd1*-J8Oo-0ygyRO7bIPEyoWX~@p9($%8kIS%S@=-Q z^#-OBfHTepW zLH>ere1kt>(d8>pI#P=d{_P7~`PhxR&u9PdJM4V@A;dPOWA|tK#1t?oshwM)IF7@dsUsQ)p_iV%AKc7&aL%#Z6JXVRE z1%(*7Y_WXy@6oq)NE6U~gYU8W=JhBatHvk)@fn7m(h+a|zZ$g}gaE0YQ1F8Bj?KPC~i?EzFEbfJo z>g~%{`P0X$^i2rDawg+T>djXhmUOvZHbnty(ZXb>^lhhlpU@^-u4}fG37bqWqz)Eq zLOe|vD|IWZB_415!(lw}$%_ihXT&?gyC@v_J!QD;uB-9RXYar=!=e@}PEK>+ALxcp zzmPWT+YgXal8(suPy~i}Ymzx#yMatq%TkF;uX5V5&|8m z^47Jh#ZVT##n+dja9yb;-!!nCVc@s{-Kckq3(QEd$6ItwhhI zi|{%AfKQ|)Ozz3S#z!x~g}bgp=0t_`L6y=cRU&j@w$w8MV!6H(a{brUz_}@0w^Maq zu(}qJ-Ko;fWy-@^lJq6g?hna-%%sLrA7Z3ki|$NC8dc&_Ckj{9A)qBr{~r#Z@J$2y zJ+oYJfY-AkOxsN7@?dQf2?S~V!-3+2#U%=NecKaZNpry5LLXK060UnUMZ>EuLd%N} z-#n4FCShqY+}onz-Vux7;YZ}Lg9!u2qzo@B(jdg6-!j*Qo`HH?4j9QqFxRmh%6d)-|2UvW0O--1sNp5&ogH>ob+9h)yc5<&PLCMAuPIN0&}9AUi;)J{NXb{_w9&R8=`WsO|Ct;Z`0A&zfi*^kSPvYc5NwgIZRw|M6^&Rh6%OZJ2^^ z#}?VQDN?5d+q6h=l<@`P_@*fhCb3mD&GpEE4vva*Q`LJhE2GWK8Sh8I)Ezd&- z2Q2B1uw**x`kDEjn4ayXs(t=%mLyvVJDHb#7>Tl+V56Sh7C#GSrMkjK`Xnmx-@%vK zep|w4>vT@0r}T@?I_S&((UL0j$#M>ctY-pPTKUXP^V9*C)S+_e(=sqK*e+Tz8@ zy_A#Gal5i$wSg<$+6xcnfRVO+%b$eh z6Vl(TEeGva2)`MG;xQ}aepS8)!8w z@#>alWNemuv-2B~$~+dAbZGL>x~m7#ee)6>0M1&FhXG-sST1EH;h>r};k^1u|dHen#RH8eM{oZGoSVYdkb z%gy|!A0F2*>v$ZE<#-}%ExlQI|Do`jBT$Iy7q zAgZpCXSk~-tx&81HzBiuJvwSR!(*5Lc>ZD;Ru_BOMQ z#}dL5Qk(C?c>|<5&);A`_AiAwhxNIBP5j(3*6`fKkG5a80O@PWAf-iNdBe5+sF&|t ze`EiTV0q2WeN(WUpxhdkH{ZBGVY%@tHwixtEN{DgL}5AYSg0=VyKNLL*U4vG-i~!o zZNb}k7Y&!RqVsw={_1{JEw6m=eB>{cd#u57%>nby=g0BZ+iyrcd<`d$>{npE=Y^;6 z_VN8VdUPL-Ntu32>fH%Kaw*f+!EH=(dHC=vI3VSlNqL!|SL2Nr@cfI9;MwON!edX| zjl1u?8Mobb4Q{>lYTSJD<+$#Ki?Q{>^=NLZMoU*67A)>T-=c0TSlWlyp%#?N^9=3cbz)Br9&mtw!TDoHUR6JLGho1hf@hz; z9}hfqD|X(06L#Eljl%L3Yx^;_v>lgTzZRF@x(U}memMp&?L(Q|@6v*>cgJG%+%k^t z?TgWQ!y?>r@E*0&8$WLZfB4sL@#**PrfJ|_zzEBa;6ax$pze)pvY73GFU z84fkYug;3EeuL$|#jlLtVENy8{2VN&XZc?=Fz0~freQKL+%!&Xw0;SefBM;b_)Ow# zSpKmzh#!7E3DfCWPG$M;r6D!Sas$f?uIfeE4MQlsrvEQsIbWGPTUlOwK^yWnHKF9f z4po;MQ2tZE+!~r2K+Z@%1I?+VBPdtPl{286^Cq~RQ=>2-sVIE)wd6eg>KwP;TJ3 zv1&0eov#TqNhiVGMGs$ttga%I4A&?WUv=X~j9oT?Q~&fa2DdFnY;7vu`1&XwIQRqt z3L?%q+sgk6! znl>y1i5k6`sw`Je@vd}zh@|z0f#L+_v|Hh8)C9QPMo7+W+=t%SJSJyVv)ZrtwaESp z@>MZLP|hT60rYSmEJT<*lo?oVl;!lI_3zG{QkHY-*_Qev6*;H0Wg#p#>kTM(sEwJj zU?D7@R~4?XoSvxGu-v&Z0<%kf6wXjNm$0Nt)#dh8QJ9q*puVVt<#RIw;aZy@b*B?y zi;EFHUZS3+zXZ#fNOTI8r#d5~O|J79Se`Lhh3V1Gsw^*B+63pq5LLRdT*eI-z_l_I zsr^Oj=bb7K+XPEg_eV;dqK_}t{Y>UbSe`Xnp~~{ih2^l#^V4Liu>-j%UQvVRzkCJT z58Mqu+LMILm525j5_6DPoQkNFNX(gQ(bxNDS}bsOn2R^wcnMED{Q!a@e2|fygoNZM z(559UGC%=2RpnHe6PQy4X<#{_j-#`KD$5DXXUvz+ah|E5C@>=gV_TOXwJ{s^F>cuL z(%sm6*Cms_#$odj-If9S9AAYfksTQd!96M?)r!TBZxK|4BeX-VVdPv*UdjOhn_OR= zr?Q;;Gx@0|)RppN39uk%X{~x*TjFh0sU9@ zXDCx)xUpR^L4`T@ArL1VCkQ8OkCbDmAdeX@K=5EX5+{lgL0H)*^;V7vkp~AV{+qWB zBeA^z54`atKKT33@zLLZhWCE|F5damDXh3*6@qHQP%7vM(N$k6*G&W9!%UN2%&T_m;q;}be^LCBcCUQ?Gk7_;RImKAM9`Ds$4wnc|9jil&ih>x z5;L3iK|ZPr5S2Z@p&xSmLN6TWij=}(by&=xc%$UvA@_wkg{#8+^$=bj!^Ev9ndv^jpJ&k@5EL z2t_XcvC+~Wq zDz`S_kHI?{zJt9A9t^(uTvW$ni=EDy=*f;3_`T%INXV?5EjQ&5;$u*$erW1eS@+ae zAvt&S!8WAM+DcMR?orC0on+1NatX80wI$98D+mS4M<#h-H_Ym`OC-_%k>laFvF|bG zJ4TMp87=4L#|sLaEF8I16b-n`Kbr24aFr#I`!!kcI2tK$S+&3h)l>RBirM&+^C%wl zP1wagN_+a%G?G{CpWQb(MX}r_+TaF^={4On?p=uWLJe_RB>pFjHtJsgXP#^mMb^#x zIV_gEGNDJ3Z36+mg?wW9>Ofr8Sm6$2%+=|emXJg+G;~T)rahNG0ke4f^Kd0ju$SLP zfrv*;tWlLW9J6afiXc_epC`-TndlP-)Y7TBk^L1L=w_5~Qp5otWOKd+7&U<9%ir&|kx*j-Zh5ej_lURQN#4 zmEyTXBB(8uAZ8T1tNzlat9D)gd12>Lhp=G6=% zA$2Nsa-Y5k@qoqGrtLwGnB@Qul~h>C1UeC@Y89cBV1$xztgIkez>nMOsV;{D40PU` zVsz5C8}Sy1lFdrBUWtA)y)}nU(M<vaB5BRqV8%Six zt=o+Ywy12B@Gl`eYa~?V$Z92G3ndIf`Os3_WuYWNGPItwYmOF;Pq$_2wVx(f^QYYao)9 z)8_R*JH-$?S9`F!$|w_)4RM68vP4w%h&{< zDufT}%)&J@b83d6LtCA*!LL9r`Ai0<+m7yH(LyI?PyqeNd(qVI%f_zFC1Ck&oJV=-D40mnNr3@yFl zxswn%YJJil2v|sDB)>jz+-z*^_23Syik-2mXN!WaQbWyNr8N6TSKUuNjeT1v7JL^- zCv(>dl+=XTq$>K)fL+^Ryi%%rui*@Yl(sEb7>c7YaZf_>~4)Iva zv)5mbUKHM3Q07zIK{#@zAWgSVm_a8i)e8BDQs$+*?EvqqP=lgmco>|$3y1_t-*SJR ztnrEkt_+-%9)^TIW(IFWXi+m*6TsBc0^a*y(SlGsf!6oWV5q(x8VKs3<6f{Gb!=>_ z%TDS)5e+}=gQJ|m747inHhz#G&Vv7srF7noWt7@UDuM@QS!L)GT=?8yi$~9bc3?EV9-pYD}As}h9qcC^qjCbD0o>hV1Th%9YhvyyK;!9LahydN@mp=+)SX70N4;#E>$6yjk?` zmruW)>$x1Tc8MO*Id|;0{h4MWH?sy6axUrEs5qY3XbOzJlobtt)#?w1&gH$j5-RRq zawt9rWI&aA{rH3OD>;&f1Z1TIs-HCo^CF@X+L{dk#|9X?KlTB)`10k=$zX_=@|`YK zhnsy_ig^fJ7@%G)5QpbEFTtZ>sh5U@v!a$_L4KFNCAav>m1Y(wnuORtILTJA-_(ua z_WXG*<1-hV)I13Un4sxFF4og#uzq~U3;ft4N2N$hkxg>fsow2ohIeO23qA&lufDwG zhG1hgsX&=QHXoXXd)?ZmtYjGD3WHT>6R@s_KC@m^a)OGl-kqPn&7Q5o6e|UBs1)aA z01MDLLQEPr)|PSIkRc|g`LlO&L}$4u#!4?q8pEgJh9{m+d8<6CWj{yBph+$f?;qia zv>>AJ&qBZd@p8)|LNRHCg&|+^kMXFa4k(y>NJev4rZiSN9V`HN2@H6~!hqPW?ZL!UVQ6!P00uAAcdH1 zCP%fD5OuWWF!)3tXeh*_l)RZu=csWo5SI#pzA6(0dz~bfnA5EwF;S zze8P16`RR<`n-}x00dTPEx%u!qSc2h;%hozicotBi`x*b7}ILHy?}5|Q|Xl3j%O>Fwu}Y>pULmp|p+$`0IlH@#EXx zbckY|{fE&dqF*N+R2m(~=M5eHSPbIVWDJ1^Z%rQVd8)=vJ5LIh9b3Gy0Y&E;E%jR# zw$lXRe0T_^=sgif_4Rv&DaSh!1&_VY4RT!U%9p8b8~=WN?F`rM*H7*) zR9Kh|K&>TD&bHR}<+?dd={Zfl_rGi;*JL=yib5jy znO-DGFQj0WhNKU<5pF!!_xr-GUfNdPDJ%=MQl@(?VB_`tkcMRoc`mViV60uInahUf z=>B@%+T-@4_NW5wF!$M{=SoG^V7d-@!v(k$=3{2mI)1LW?(f%Hx_D$Kr#C(7vDCL! zd`OxJ+iFps@040JPl1cHyI?U$ok?!9Hg&W2P_DphoV8v{3d&nlr(DnUQ#6dauODzY zIwpu@6b96LrA0zLYsn!JzM|c|lhism(2IXVJ$Laay@crNNh3MIM@r6XENB!bzVX%@axVY*9!(ujc=e9zR_MK) zJK?}YL!a3ljq)D13ET)etg-=M{^%ENsO1L!YLr6F>bf)R|%g4v86r7#Pa`9Z) zXNBhC)v`e3nivdylJrnOV*aW7Zw8{8HB&B_)%LEj9HhzTxp1jmHso_9ib!gwxNz=Z z@y+BUJk5JgW`ll>!}_Il9h!Shz#8*|<;pp`DA|w)!B5P}XsYD*b@tifg8$?zq>#iS z3XPP%8xh0aUQOf*ol1A7-HKQH!N*yQ(TCyFzU3JOtA!zLzB<{!x&>7-LK(h(j4LvTKHb)v>w}GC zgBPBuySD|evEz?_qB?b4Yka!KJ`5dp{ghqXb4Nw`>DSX+Nutn;do$g%Nn=x~Y3r=< z3@#x3N-+1OtXK-%&pg106kYmZH~>fh!Nk*pd#!jpBon|Ecwqm;r!HB5**Ice7Ke&*b<|!0!9sEcs^FHm18j3RNwEP`Y4bG;P|5&w(Q< zg@1McT#;7w*t&3lB!_goEZ0Yl;1xT7{{ZAL5KBx8UTF$=o-FvAf&*0S3`M&TOt?Q} z0@);L*n``T(=S}#9kbi<+9~c3uzYTFBF1wvj!^WfRNlmt8ldM@%$8&fypQy9eZS9O ziKrGa@2N(wT~WVWb3T65bP;z@WrZYfI=lPsI;}@(G5?p?_wLs?+rKH}@5j}iG3E5K0UdRG z6QdAECq3{e|5xD7z5!Tb_j%u;2dopLaKOp;L&_**#Zg}L{J|I(7T?P4>X1FPx#@k< zRL2bj1%{GdvT*RHHo&L4-g+Qfv{P4Q{+Mk$cep?4FI3xLdKy$qNHK7-W6`y~S-C#K zQn~BFB)TKy4X?L3{VND`zpb`kyfg8Ec;5Z3{W+r%c1K2kdEpvt?2z zQsug;F__}QD0YLq(RbAU*us88mugk=K2Q5?(NcV8rX|71SOhR?aF>{+jaNU06=cd_ z4pXz26lX&h=y7IEI@M%E0(|u+y~lSeCGm5$hr1+-Dpl9((@72+FL|UzUAn zkj7w;6!Iqy4Kybi5|GWAjVEOZeeWXb zG`RbGcvS8oeiSuuACG)X`j?17WK>;OsE)~F@VW8B8?p6UzIi}?GM35&%4Q)# zS!(nCu>@8H!Dva3@vr(I-4sfP{SXa5aR=4z>DncBDJns2{~`zQu7>!YaaJW$G_Jsy zFycM;*m=$wnqEeD%$D7`E;>wpv6grtLmCri(+e#jP+iFr53nc>i9;9p!_7<1tilKi z_Aaj@Vr1@)KHN;6O44XHI6(UQifg< zml48X`wzt12+_`!5eBUvxu>3<3Q8s*wB==f=bxDB*B8VzO5{*(zz9f8LLZiVDOzC7 z&MeMrlH@lL*V{j)vrfnZ#vY(n=Z&iwrO$erRV6ywi9aUhg6|%#+{)*#jc#%FGx%ui zNLOh8(#7~nl-(i^SEzy8IHe2{C5AijU}rV`E2A^xG!j?As0zH{FzpuJk-e6I)V5|| z>CiFviO(pj?AYN&_>8%+w@(&C$s1xb4y0*AXn~N|6!&xzZduLID9Dj+B594F7^mL0 z<-;ECKPYb+!<^|i+$Efq5)~qI{`A+4XL-zjzih9Ck6mwS+)`#d?r2n9L)3nL&+%7d zF{+@GoBAyLu3& z2@zptKY6_9nVEcVN1=DZ!jG7oA_>2CScye0KGE(#;})BSOM>^8`Yr^p2S+5ILJ@T6 z^XYTvy`*E@AQ?oLEXep@{2DQ(f})?*{LoXNBrKC^wVA3UmKy9ojr+I$Q;vtKOnbk~ zdhAJDp2}m#_IIQ!es*U$vxy!YLu&s-Dy^t0vH{I3({-YFdJugZ&3h^`|7zlCjH7vQ z@}o)X{Z*hO@{u8Yla47di?J|Y2v?No{!vtT*$d|rhv<6BNxa3LBkel#Y@&5k`;EW* zdRJq1H}@*tR|898>7<647D;>$+7_1+35~8Y_UBr3uamF&6cz@4kA5k4J{c_b9t^xB zFPG^c-SjH&mpYO92AvqK!vAN!T+3}1+;n15x{#sSM$gag*t4e8{gXvS%Y>v zAj}05)3Amfd`(7>_u}@85f~fhEjH1$wra8{jLH@^4VJx8#Zk9?y8e&4(rnkCo849| zh24?$JrUioX4-M%8|hTo_nP$u+R8;+4f$2LPkI(EjI@xi4r5pmp2uD%Se8W1vL*?(_=@y`4;%OJU6(sDv`mE689!yzvEB>{0|geZaP&pK*?e^q4(&5SYz zcVW6}5h^H`($;Aj#eLH0Rg8seM*)|_)lP*>|DJxGeOjsh^o$?vTccM$_Dj@SL{z67 z^t5ZoSQ4!BM$>wAuT^Cx1#COyu9`#K%9!YOcAo#4eC+M~Qo8)mGI`}UdHh#;M8^`* zx5)Q*lf!Jh(JR9(bj^tA$j)*qxn@ah{H>)JssEj~_{-BcjVL*bG#Tw$ZDKldd;>np zxp#{P+s6f+l1w0M>D;H-(fD#-r@RPtwPV$}DH(%Anr;VP5783ls*9e&wIp2>hJ0eA zJ{3Xt-f%HDxZ5W5EjbWfx$Q84LN6HHOtJfco)miBb-^DmNi&+K6}xK%lu(SRKTiie z++qym@#Wys!EYDR-zSIG{+JkZ<klYYg4UuCCGFT{s`)kHUzPG=IJlW8Gg!RX;{) zv#?#bHSS0{XPt|2>cS1!ZCT4xHq~qvp|}!tIHvF@4rMggDZ4rTp?%Vwy2bKt-|e>a zMc7+4oS6qbG}=;?@=C_FPHpoj}A;j%#{ z)yp2k3#5$ww@;EI-_OUOfgJ{IxITEiTO%zaI~#eB*(L z2Z2|72~M)+M97O*e_nEkR4qMmm9s5vDp?YKvix_Re-T^^F6$j>mxREUuIH7VZPNm% zC1(zu$+m2IJOV|~+$;Xm<^%c1@_uB=#vI5x{S-m700aSvy`*3hRLGp@p% zjnXp?J7@O{C{u7CFXyAq!5CrfD)brvqrSAW=?BWRkhND1(8=OHKoe zKph#oMwoLV|9{i|&hzb~hf<2h2zZ}wxDMBFEZcW2$ju>@?4-~#VBI@|I*NWH(yTAn zOY-wv5)BEKVCQdjXKSux(EFZP1dpBbvLjjvM17qak=pMHIK4_eokwz<^{r64-rus4 z3A?22?>DZ@SDxM;O=7ujYz2n*0Gj}Wl!BColwvXvUT=`4Z=9IwB@2yn)OS+hu z;qHqL?|MLb^2(2meE%V$6+S`k;e8e=^>gduC_er-+I_x`GI?^)7j|j?@16HKr7!{@ znoS0A%$y=27l)Ld zWrx5sibIxY5`L}K^liM_DtFTSY}Q;IfSY(hzH%=Vi`z#4(lCCpL&Z019npQ^{?*MM z;M=Ko#E)SCmqL~}qrhCB07k%X1GvQ}u9O_rH34qA5zdoxP@6-=c#pL4K3-l{IT=ti z3BXn2Gmd5n@~4%jtSH_crIq_OrotiC-MF$$e*aqI3i&I61%&=T5rMp=iBet z$$~5lyAsp+sNZpVv=9x{s)34~n)2q5KHdE>_GkxEjtoEfbK+S1bgSSe~7eC6nfn z#*kvWr|Tqb38s0{T%FmqbSs$Er^XBrjN5%Ix6{@Wll^bHolF|nA|&X;@i4#<$^;yq zI0p#G{sXvf_VyG979nGZ=^wxVXL4qm8x&6ii&WENDx&n|Ov~Niw>2bi6RGRT7o&DR z57jkv`bCmAw z<$$9mE^Axs=kqM^#^N`@a_?#-T_}q_6fK)zU}1HyPLj%+F}O4~Dn@k><>hy;Z68Oi z@ta?Pc3yJ{V+fp)VB-*tvu0oNdEI=`vN+y5$}I(WfR^T#0bh~1K~H5FO7ON3S=tyu zmHeAeRIS>fRd>G7b^lAHIS$`$!wSccsd9v^St&n|P4yvrv-0$X^_vQL*(YcP_=>8A z=jGpZsMPhKYVC{}@8th;8&|!*8x*Hi%z6F_9TRpiExx%U3ES)WqYnZG6;d!O${`P$ zA9o@k>yO^rQWe#jkE)1DD@sZx^&!HpCiX|Vk=c*gmxFQp?_`VW-p)^`D+=Yr~Zc*5_E zDyiy4EgL+D9o!|>8|EV~Ol+P&pKgDmP1(mE)lpMd$*L~(-*<14Y2+Y+4^<-lbnD=o z=d{9`kd}%!Hs<6si_u>YP!R_C#Tp6|#BF`)YTJ^=Bl_7gNCq zO4K^>^ZxG%O@9=4oPIBiwdE)tseVW$4?VRxlmDd^G>@#p?-N%n&DSuN@ocp8OGxKbmSO zed3k~{~$*YI_c5BkZ@vd2g9dwsoN~xZ?k-~bAaCQXdu&+c%k{B=0=G0e z`PMC`wz7FPv>*LF zk&Sm%+nTqv?wQEMj>jxXTO=;BGrwsk!`#u$)**O5pcXE6BJ{aS;p!E@{tL)a$#h6+ z1__RhT+mE6ReLj&6^n?=HY$?#nzoh^i%+_IsiocC`rG9?J6s4j!pkdX zK@jO_*@rl(8B9?2AK08xeXqynPvb7NX(`xm3zkzlI$BEq+6-qF4Y~S4A{Cyou=75j z7u(|m4Jq1sh`qvfU!&Z|g1yHxk)pHQ5!Jxrm(NEhNui0mH9?I2JN7=iENj|1CEY(6 zd73@gxFdQhGoS5}>bzZ9c25ABp*a`ikQ(mNq~~ z{JsY$Y`zRI=!UQ zyVO2QqhwOLiO@CU=kbYbJT61H-K`iJVY+NA(Ap>My;}Qi=KT5`j$cW)ZM?0r6yQEm zRRvAmWiJ`h-QsCjZc;8^5Tye3zN?ExVn)+jT4h|s%p^6f3Rq=eEZZP57DvmeXl?K7 z;@>ASi<@->9@>o?g@+?bj|;wGs^$VLJ#Wji-SnrKoCDCGLsHbYEx{}g$Ox{m%ESxa z%sQwm%!B)K)*GepRT* zA~h`7IN+5}0P8(+d!G{Rj1MZVxgV6eDYHSWv$Sxu4aFaKl~qcWP=Gk%I_@a5;B{sK z|LO5uLtOJ$gx@U8Wf2?w;wN4b$A2x7b8liv0E05d3mzb#GuZ*2RNtv;8B0_OC_aO&25H>kA1mmCO=s58x*p6f2g zuJZ_Ec3H7dKu1_FIt^D7xzXryW4{9Q{e#jt!!1t6zmXoRul`iE?v?UpbR4|OD5&wb zZ;{))rllygOW!{aZ>)TC)%+zI{ zs-tI?xJ66HY84K4bt{70AbkLjC|XAIvnbK*|kUx zG50-t_Qy;rA~;vS?s_W6z5uiByTo`$9#Q$GJ`CFv|Qd|7U$V!5eMtX{hK^ls7bA4}@`?yR!wWoW2f<@vGk1TfAIi;q`()+J^M z^-a!Z=gbbuC@iCcroE&C*l@Nv$9>#_g)?M7{`8}v7DN&wEwKO zVwcSjZRC~BtVQ_oc3Vp{S{&9elYw~T_I!kPTRcoUoDbCUafe}zo@*szo>n(|sk(;h zU?&Ga%~8UI+M2up9vQtTpZ^$YLHzp}NByNi@nK=~!98z_`;m_Sk4w*-Cx|l$U_m!W zvjA}DbrS~eJIH3!Dg@?`hTVfR6a>`vX@_Vm)cIe8{|Q22w4*kX7pgLDBa?nN*Aey3 zUfb)gw7TFzCL`F~bu#6`5U6c;(x z_x#YTPNYdf2GM8#wN1(5B}lVwd!ytOpr948%z>Wq6n9Gol-xg_y<5(z{`0K2%y?`4 zLZJ1o_i6aXdWtJ26{q}Qw_PjBIeTLxvZ8w}-0GI)5es5g`;Pp3e8&|?`f=5KFR=RR zCGJpCi`x$o?O+y^H%+RHtCSM2c{F!ctE{Z}5!P={2b1aCwR=DI+vJOno^UJJGUcY= zJt6J!3hqgsg)YchQ-WdvI~i0ex7f!Zc0M+DcCHR;2_$dt$sX_UpfX(c@m6WSF-Cdg zeskPA1z{_=sNu`ek|xY$7gt(La%WW*U7(oxi7Z1je7@%Y%t$a{?g;@Y5RS96*}oGT z<);Ack=E}UtAo`$+<@3?4qXwh%S&sIsKZp0Rg(hw_WSL0Xbp+%vSBHch%|iVxtYyZ z0J(;3`w^Tl zYQlO6VQ$xo8%uumgN%SL$l2SsscWnU{i$@;s}nRVW!hUHVxV{VsaZR3DQIl?t&)1+ zvk#;%){o&aP+`IKtq(Hk3A~*KTGUB7o+Yk z7e@5%n8KJEY<)8MYrk{==4`7!$8*2)1QE0Fkd*qLIW^wK5*r4p$fk0_x0L!!R;rjo zIIwh(R{(mnf!>Ef7vAG?wN9^p%(qq_pDY}q4_G0gu)DwP@du3lm3E1PbadO2zpz3*gdGcTOrJkcr&gqI{RmfG|6k`h89S@!efW!caZ@0v_@wZmU77>tee7)S?FoH$zPlj>b1HR*1t`t%Va_Lj@cYPc(0}j zGvDaKhKduJ-8)a$P=N+_-K_Ps=PCBX!pUNc6I+2gt8+i3Q?4>dcrW&}vq>R?55-G@ zzKt9`iQCcl^^R_<`XE$szESlSpQFMTzc^obq<(RZlSk#k>Rj<%*Eb5$b#?4Yjnsx} zgVoZX40~ZseGXgiP!fU*Z?OWo*o_2~hf1{4DucG(fz#6JUaRnof`xsed~@5$)-8XXtl) z7UNEzI)WIfUQ$m%>@a4J^W%Owc9xD@J(~I^LYACuvC+X&xpBL0;PMg0d&LD%w-*>& zb(ZVN5KxPkR5Vc3p<;<3)mQ=4{Uux-*8SwTFb@4#%fWq;*H@|?^ZH-IQ+c(($Fsz- z*Y-+UK`D}(gSDpfK0~!9xZ)*U2f_GPlOMGz>n6n5XPMAct?Hw+ebFAnJYoS zzo05J0i?Unxrq!BOzZ*5-;vbOPY3h4SRC_+@kq1p;y)O^v3z|5j*2+y!5tY9b~jlj zKp#l(RROQK^(06-!-QH|>4jzo-EY*;Ket-%W&ns5@>Ub@pBFc0l%Bf-p!c=_t<4^p z(0#sL)>7?pL+*{m2>65`2RI2FQq}z@rtw91K>8FDQ8|pp^{y;`&TrQz{4d6OWk);S zCAZB7SmUZM{meIz8eO5rO>nA9!dv^jUOu=F>VR)I8Q`oZ@Zzn;DmbcldiziBf%=$# zktdzyjV9lCjP*Z!(IUE2GSXVriW?2*p)!;R%O&XfP4!1XPL1nbpMBMB`xS0C0aJ15 zy~83o*RU8HCs4*#mC+7Y%~}en!CU;%#E%tAyC{S;xKA|15$q)@Z-P!lMR!q`(Mr) zVU@?fN_En=PnSmpN*Ekt(3FeUZMi?4>ayK{cxKZ z#Sx$vzqB=9n|)91kP5?NY@?ZN_vQ}N5Op8H#oX4&^3{q*(5 z`J|0{$kM_1R>RT~d}|soFW$)u2=+6MB1lR>UYt>1o$Vv0V6p*VcF@iNs!o^*bn`hD zsIjRl)qYBu0%t(CjWXsXg1R}G$*4vralzC=#{R6+%oW`3mTg>W0Cl5~WKu{+=k-U? z6ijBtM-3nnOfMcdN%?u?OScN9fjyL(f1!Qg0-zo#@?5Bk!}1lDIG7LT_3qO#*>7_{ za9QK0yULlKQPARToKKPvQ-^F#v3~qm(A7UHPdfZh-m7Q?|BBtqtzPzXn2cmV#yaJ0 z_@AZM^&fEX&%!f%{KF;MAEj}Jc1E-FA)q?T++LVNs?YwcL_h3Vh1N>ckVdD23~ffx zV&RHhhiB<|m{Go;Sb|iCorT25ATOhi3O3-M$iR>A3t_V@JHdd?s2i*r%YcZ@w zx}h!9_jDQCw&&ucirh3;G{f&*^G9o)ZaG_bWUVaR zP293q6Oufppg{DA>D#F*^FtO+9D68CH%&(?>y>_#LWzVP_d#L%rx%ric=2s#Pt^TA zh$B~)Lq%lfzjwhR62?;rSMOB9ZVH)mxN)p*oFL^M?a*mm-|Icfc;sG3%}sApeXFVVgP$Izb0m}`Zlpm z`NArIdt%lr*TucXsGvYS`Ms>WI!+6$p@C~kI48qp$w*dxTD17nFR@YI%rg#=ubD_q z>(K#It?>JQ+M*oIFDgLK+P5C;5|VhH=03>Y(viK(+2qGww70R%U0p+EnX^kFq0&dfr1N2E$tpfQcY*N_--(lOE!(9&4!Q;VS-qYp z$Sw-1VRLJ4m+kZHhD0Ao+nz`y5=$mLovjcJi`^;V`EKs@e1g)TyDjD$Hwy{J(ah3k zn?0njX4@aNQ7fVr2O0XyUrBo<&VGMAcX}FsMjLUc6{uK4*%tHe)W%2dCae>yRIVX?Y!s=<}4%uSA-J`+s+5cmjnd%e#WoWy0WTcmt1?%jbAK4R{;YU5|=!>OQ_JsrYLsR6pO2dIzR zM_oLtWk06LICVTIEulJ1IZHs@CM{xi#&Gz_x2WHm{Lq~xM6JcY=qTTfT)OF_kQKb@5@&UmUYfs^VxSr3lQ+A!M7u<@1X-XuIIThmJ{2$ikW7}?-`I`L%6*s@xK0-7xgU|lP^ryGGHPM4kU|- z@ilBmY1Bs{V*e_zE8oe^=P8NWJnJlGeTTGIuo_Xn>bz8-graC8?d$Jn&l!s~rc@s| zMkTWBA zS)K*i{yK~U%{Jq`DS*8r^QGNYPifXlAx)rNB!32Qmj_KFhdoS^03v$lVN~Ig^Fxdg zAlZ0rDkA^Zr<6*LiFe?#T<0U|%rWMd?R7TyrN3Am`!9A|(uE3Fj4VPEt?oVN1K!y}uXn@VXvT)S#)IZ;h_%) zWLm4~2tHrL(=*Hx)F$+TG9I<~q;tVwd?!kX6jR(GoMBjnoeuFxSSH-Si<@<4>UY1G z^P6)Gtaabiteu?@&0k-CF>Lk~X8`~G$vMi7s&j-Xq2U^fqo85s(Hti$(qhpBuVT|D z7S)ta10D^)$KPq+HcI#S)W+bq$&|>B>#FPP0;J7F6dE=Ntw=`M-9@jmB3D7#Z-o$X zfdolwNja@>$WzQU8i|P4G0H$7liayP|9G{#?tg|fai^ac+i>Fp*S(d4(+bIDA%_Fm z3q5pP7^QR-#fS*LrOS>R{z@x`;<=fv*AYan#9$QJeX;+8>xk{*j_yun|A<4`_3+kSv^hvbT9osaR zI4D$h-K018Flk*@?d>ST-Vg%>`_5V&TzgQ7b{OotR2WsghB@zd*vmZ)x*%ZLU23PA zru4A7xk2g~O4s;44Mg#+u9bBlF|vbhNTl!Y$)xXh>&|n>WLN}$ZYe&4Og7$M@U8aP zm=hPFI|Tu9JEF_G)x$%@=w zgZdRW;Onkx-R~nwHl3`j%7`Wg>N+7hTIwER=Gg@&mg^7*W0zY#yGX(kxSGmh)aSUz z8i?)?E*-{cx9#fY2MFOAe5;ObKnz~It;Rq>-R37 zW7W>Awo>&SoQaYI_SYPmJCf^sq5K)dCVCC|GMppO_h5#VUjcnAz7rAQL?NYrZ>c{P<=DGjX6LESzY-R|HGdB^`ORkd+`s8ugEekOk{zU z30_>qL2xX4YnkC{9H-Bz8ZAh{gp&M^A}3(09w=fhxPgTxzUS6|ofqiXVpOgfoK>Ck zM2P!m!n}D@--r}dvy<3)sxC_n3jy_a7@WEMjip%9q$1ydKBG;klgFuSkxpkThbbV7 z-NFDO%mjbG*m-3sW+{G?i?K0oog;g*0NMliDUO3!uG?WF{|b?IlA>CD$d@~gW~ z;m%fnO5>!W<)>5q19N3w=}(ma0c{78f<30PzK@AUbJj>s-68_jq0i|+obugUOiN*Z z@yYdN$g@?*7ttNXu8or?JJ>-Oy|58SGl)@Xm~w9x~BB1CxgS0<5Wa%?+Eq9;m(KVhxclSw$;CM)36G|x&(&l zXC=RoHpsYhfZE*!_=c$45$jRTLm{T6loOQ6pTRF2Nmi2cI#%nMu#eetqxMGiE3FoW zhDUA`RSY87u|K+LEYdO7J6b-}V2r%su{^6WdavrLVBsEOrh}SMaOC@adU5hT%nPeL zFz=(7UP>$pI(4ak42{a{R>u2oDoJ6SVRWp?b(lg_=9%_N63Jw0ZuEKBHtR>Pk9nRs zWX0{0VW~GV5tN>*-*?P|u!&lIWK5!4NfxrAI^!@ft_s$Qyci-n=(5}Mv`OhnlRsAe zQR?#bNn4o;J5-AuXnHf$rRb=#q8p#AHZkg0Dt8@$s|)x|!WDjkM0oi69ED0m)1L6)vG=E=&YKSisTk^%+3h+Y9uL2N_Qr8T^!ARrN5?nzbzq$cz4usafBO%f~bcuj8NY|G}kdPQah6V}g9y%n4lI|Wx8iwxk_SLy*T|K%^qs9tuEg8DEyobMItUj90m(8-B z^CYA>z|iVfM_*TSof)v)ojbm;S30m9`Z5W(HyrzX`le|DH`TbckdH@cY|m(yYk~07 zFWQ8v6v@ki1Hd{b)YGB8SU34hG$HI(bDRVD-NTnD-ldD^73?+!w`F6M1~<)XH{mv! znBk(k{WZxA7d4yHcg{^BEhX`9H+H6L2?V~0^%_?Z@0_3Qd>Xo`ZC?kG;3@6GLaE`m z%1idAIT%lo%=oO%g)8_@p!qeD6w>r5f^XTIU{%|P;OAmVme_TFU2?^;m8Bmj3V%t9 zTJkUo@feoy+iH3O2RZp)wBGwb8lp?5__>a_z$}(gZ19(2Wfd?pwcf%24~HH#6&)$x zl_Xe>u))GIV_nPvH0GM(ury;nogeiZ4FVHiVs z*5k&434xM&%OD{?zAJZw^i@9x3XEO;LnNi7v8>ii8k zNc8oF5XJ0738vaugd8d^8(bo9BN^C=I?82fkL$cI1Ue#rm#Xe z?Jhnso_S=%O<@Qu)Xs-(oFa_fRzxePxm+@250w*fp58GT@WrqMqUCWeqU1YY0dGWg z$A`6kMuy_rHksoa>hBFTvZ-+0RD`pG!jA7nNoO1VMcVl;gKNvV{dn6guphM^Fz=?m z%h9n@Uqfywna?sX+fGygcE`mklU^J!HM(%v8QPSIODK#LSo*{y>@Nrw` zs-$e088AxVTHfFbo5p)0cnm;eXgRuILPu&n(2*YLV{G*@)wX-K<~)1ZXiH8!VBIan zYtm2g$Ofiks(>eho`4rY<_-)_x#s|*>!=u*K+Z%ZBKPr_ZCz=vHXe6c(~m7Gi$$|7 zXaBsDa`Q!rUk_}sEbYjr#;?r^g6qwFdEx}AKO4&}gIF>^Lw0o2Jw9BB7MPByae-r; z@S7diE^uI(yh&%KvaK^HUsk0m^;yH~aF30?R>EH7`qaN%LEd{`oi%L^M%}snJ>Q@A zzqg?gW1MOq=fINkJn-b01DcY0t2X}TrMYbavgNnqKI15}?##O)lg`VwlzoJ&-7)Tb z=auil(nCtwka_aOxYQFCo$rD3^3(d^yxV|a^Lo++sJV@>;^E?@$)Bhra#K5+H2;A| zl8?h@AM)yloDh6nCvmV~V(?iLq zUnhLFqJagi<6)PFd0RgA(TfWDp0$U8E1hcK>%MoefNrSb_2$0}?goflz;@W>)Zzb5 zvt#{V_eb}6Ai{BEAyE6Sa_WXsMOE|QoA=b6#~q2+2k!#zO5cX-XTz5tSLW!|x{)rA zM@+zKx>mw~YIAZQQ_!wg+wbD}w(0!OvbR8sHrICK2Cz}F1RCRuxh!#A!tHx|m~+wA z6ghy{H{RHkU&K`1)$9LE(+psj4fs@Oi2h#4>ms_Q=i9UEfB_r<&93^ZE&4u|0wb+r z?ldIJvXOM1N+lICb5YV!P1r81VX=$)!eT|oAlKc2&>hYgGXc?*vd%X`X$v_HhvT6R z;ft`nWaCDNarz3R0fzBheB3;-CY_rdb5i`{B%*5rd4@(FHS$%r!`=6PN91=bzL&KZ z{7CksZBls4`uWvp`m8S6Oy8?Yaa?p2hqpto^3*^cB+oxvCr%{Cr91{)?8Z53Ol>8% z)Df>Fg-&-!kbN8W2A{E9!e5zP;yZnqzWFH1nlGr3z$TF(AuxX2yLF}r`!1~?5`Kw? zHiVjO?3O5pd`p0F{)vlSgN{R+-oVdLN!yTDwvUHVv{=zl-Ib(+K`C_;Z3AudoJcUn z9fOfyZyRsSBQpe!hUh?MQtBpUGBD45%;r%}erC{-Q%r+kM0limfKbl>OKmYL)&Mli zb$KzU?*MQhh`sH%W+jE_MY3~i80l5yLaKb1X3%<*5M}>pu>mjD&1a%T`?_&pD>3=6 zrPbm`@utyo7WS9^;kT+GU)!)?8O-Bd$Z&G_=L8v$dNc6hLNUwnMGuNLWti&_)JX+I ze_(+9^(^z_rb+lP7rFM8^CPRmi1ld zdsI>+iHQFqlOU7X1|9(SV=Z>6boq~s#?;aB*e>j*(L+~D-9o*}{WfhX(kA}Uv4k8r z=eTiq{KdNjmr3brf|@tJ8@nxec=v7!;-2N3yyogbF@xr%lW%?dJr>Z6h~oU>K6DY~ zVD?`R5^8@Go#?m8;R(<=!D!;6d=|>?6KFZA67ShR>{F?9y`8Q+l-cRg2IV6dK*J=Y z7=eGtBSurF2>y&ulqrBuvZf<%~gr}Xmy6OC|BX2yCp^hZhM zX86Ovxdht#zD#2+=0l!9O4yjolyDdpY)V+!zpV&+VgJYXnmpo~7rG3m_u46yygHz< z%O5yrH5(EKnzT(V~!XfAVtS79@wnRUusmbM>L!BI4oh$H~ zBDYLjo{8%1eXA!g5`+8EIgDA34Xi1QyQ$=&b9rS)eWi5(rmNv5hG*E?h=*TH7GHlb z+NA9LalE*g>1M-Tq*UY7IV-mC?Lm_0)UA3~yYBgVKqu?Kf3Q&(xVODX4cD}$XvATwpe02)AA(=M(& z1IH_yXkTRAZ}ksMS*$vV6FA-xv5#fL#QNgOF!DU%=S#g=e{WXhVB)VMXFn`BPBcX{ zBE)!%(sifRA2oX1F)JOu{W+%B*1rJ?haT+NN1ko+Mj7w*EbfSFT+l!g~TN0DLx9tmG;9ca6;&ki7h-V%r~))g&MJKrgT0vpm7wzpE{19$S(Y*xvuy2BCe{_wHux!}ZDtDp{F`y2^W z0p*^;_SI*nQX?+63BjOzG8W?{ct;CHkkhGq!bbRFtlvyzbeOKqlHW8{luM`EME7;_ zFYS9g8ev(HG5KsXc)is|O0I<7qM150i-K!t-)6-K>SAvGYaByil222&7lA6JLX@I& zq3*Nl1JCWqOXj}9rJPKYx!a5ENWBg0y-OUT*e!*qqqApTv<%pV{R(`Be>>+@be4R=!YTXGS zKz?)8dU-i zw1afKVO90Y07fb9Feao~H-%ac8qz6E+ldE@qlIboL7!clliCKep+eOl?GIJ>4l^QQ z7RxgK%nJKJqzv);1hPNs`IAQ-8S_dHhyWw~7W)6q#dB-ihzE3#GuajzJWiM=(W%}( zBOG4;F(VWqJoHH7-vF`QF#V9<&n8NBJmCNR&oa^&1*6mhKLp@F=wq&~|JH3@CdjJ3vpScMG zEO9nfV%6r`hO)&fPn01Orvdo>)I>bdH0s8;!zh+Z|Uw=*= z#wI3mIzia89_@ADLfO%n>8rU9jeVCN^Q_cx^Tj7;Sc}{%OuTRKa$;O1r6v1)O#o~Y zU0OpSNe!<1x&NPp3?b5c?jTmCKv0meH(2i6@kV_CnYnexdR1Kerksh~-nuCIU~J-8 z4n#MTRwS$GTyAJ5Eh8ceQlEf*%*God4W;%`w{T`?sj=IrRX*QcN#fqu4nl+Bvlp{L zL*TYy?$&))PQ6wYoPgS-&ppe(^321z?pG`jAT`cV=OfS@2Xdy?y+9MGs0~sRa#$#n zNz69K<)J3vINbYMoR6q7LJN4`)VxvLQx@-`c+ngDzA{!~1XySfyDwIYOh<5TpV5y2 z4D{m-)j*c4OJ3cDB??SVz*G}!YmYaH$q6hBimTh~?2`d1M4zBobZ-dmomH?Ncq%4* z&#lMn_V-j3L>43^4kM*3;Lg+o>V|A??rG?mRSdUtF=vX-cYd--KE1ddV8a9VwCd80 znc7-aRxv%d3L}0=9BqM}Bf}@+yU@G3M7O%JdO~;sIC-f;RDaALX7$%cJ92j8Wt}pl0pJd zkL|Au96e(XQpoq$3{R!g*nVKlw|z|h3KeDstP6PiIe54H9=U+8ZP$QKQk6Y}!$wl? z@VQ+($?G2ltMliX`do2&+-j-@)#W68Tay@#MR~r;v`2xL6p;ICPsrnmXWP|<K5ksY(~HrlMrgorYDL@~~Y)6*Gx zPX4Q~YQv)Ir{eGUo!yIyl#ado0p7mG0lr@Har3C9wKk1CW2 zk3n%MzBew|T~pg0lDElkIap`XrQYqH93)@b%hq<7T5z~eJzzD{iWO`$iBOwaQ=XXr zz`a`qfy&w~muT^q#@L(B**;rIW+#Mk-v@o4q`SUk>HQ_FMGj|FLB5s1Od?Oxu~bj* zFZ9=4nM4l!oTTR!%&X?O3~~C(x3lfvl_Ww44u@7Vk4CZdyb;B(W>>u`Ntg&!5o%dWtS(S<-gltp$5eY>kz={71R zF&f?n;%5{IF^<{ftuG0c573a=23zY;JbN1ZsKzeZIze6c#$>~o6kUU$yilYhLBg^{ z=Ut(k6Y2`6)m9 z(48g>cCJy}vaBTq>vH#puBzkz`OLVb&)LZoAjKQ}Nt{mf=J^f_)Y>_Q?bGkpE*7qr zjWu-XaB=!NQ~O_UFzK@6ODfra*V|K!G-X6|@dsa{-+iWb+!CQTlR7#fJc$%8W<+s4 zb${omjrXdc7noY3wo^oW{Kb1`dg%z9&-i;Sse0b@o?LI(o_2jN=I5KyX`k-hUhOI1 z2||kDy*Er1ik*unb0^?`X(Jjo?6w#KiqcA^_7p9~87PwSQE44y`0wgKW9n=Q{Ou&2 z7+MHoQoQ}3W+G~oE2N-wBDgGGC=s{gu#nG!*DdN~Qc^;YB&MMtiYaYJN-C|Dhi%JL zSOL%FyR&&wM>5-*atzbyGvE|EQgGPs&`tXJB0%i&uEB1fz^sW42 zTF*DS-f-i1)Js{}*xBR} zLP5?wRM2BHQy?$q>z-rIK90s&wy<32QaTyRqI4UEx9d$+`BG+z1y{z#_p`AW-I6Dv zdZ)ik`|uULPY@1Z`JIZ4h;iSq#(+x$bnKs^8Y0fKPc;0};?1ixDleVMc0RRVxM6(D z9Dlt8^nSkxQbHY$%ZF6o|IL$>4h5DO($wIoP3m)Ffej`+z^Zl?_R2_T29)et?d2_@ zT3~@8+o|{s^M4zb|5;S~3zkcUca6tvtmmv!;HfW!Hp}K*`iGwGUW@Tj$`0t^{%N=cw=hGZh^V1)3*IrWt>mdc$xkuwlAh9AJrNVBH`*s3Z?&&?j zx8+8>tfu&Un*pr7!sTi+p_O_~((1|Ky*@s(K3o?`;nelyZ1{2T;~3dLr*rOov4!ZC zW8=pjs^}*Z03sV4YfjzSjqE(VJ_fp1%c}FgbMwU0F!9g!((jL|g9z6gj0FrfA2H3Z)Cs+3w{p&Yq4Ru*f7Z7m)1DKE@d`-5u z#ZkUPvjq4nwt=KLW69Pmc+3c{N4x@FVSOG5N%)y%B*XGEWDf3;3cEAyjt@qNFuijr zLBTj5y(4z3Dp4ZPCNVZ;6>+@pGX~Orjow9y zadvSp0UmbYWGGbxg!7<&VoA!+8A%Mn*yrZ(lxM3Yzp;N~uR^7z(QJKM5nVMI)y4NHW9$KcFO{ zA_CZ4S&?tMJ^Ksp9TlJ|#v~9UlJ$8SLLiAhjGr3<$78(#R^B&lWzn4{+_s?_TZU4t z)0kiyTfOqv#J1l|_Ee)I{L15P;>)^G)W1IpwE5Xg3F&JZZop{2DN}7uJyI>9T%7^b|{I zKf;DNY0g+sG zC7%F9^RstofEcA)3X9-W_MTDNCw0xfMM_^+6mM zK|AMMY}`4v0tNskYqWSAf&qJr`*ZyJE;sHcv9U;-Ms$LXu`*t7f{Wh~;=BVk-sYIG zbB^s9Pn@NMH=px&awVY!14zJME|6;-8UYSf%v9p|g#jSlj!% zl!hifV>2JDgq^iet?Z@qic zV1DPh;BSuYND3_yP5M-Um-^}_#wD_XO z^z4sOU+n9&iylsR2}6oa>INTG)wr|TORe!-grOQ=#C+0c|vRSMOBM=PlT_}8YG zdqzqyc8|N99VaUjymQEe)24$*b}T2>_-ZZU5vF)@KESsL9rwx$^1$4@oh*#ovUtzh zv)d<;SYACC3|cIBWG>7xPsshleT`qlVDm0cb?W>Kt4-3Mgs4V$aSeawghn;wsw4&5 zH<6Y7$`BH<4%hwuNhK@IW5~CZEFqm;yGxw~YHZ65@P~dq-~Or>5tdxypWgVax?7S?A35~07!Ykh7Z?LREQ#IfM|EFkw z1+eN4&@uz0=gH97)4fZv=Yk;onb=Z+VoCMci-;SGpcd*-c&j+s4HrL~ZgE3u?6l;- zPxgk<)4$-LkVX!tn$MzgG6%gMb9i1?r?sf}i7a_9LN)tfUjKnr0hnnuAAZVX$8+#s z!yg}0f)3HrRHK#sUmnl;T&S?63-7s$-#E6myuVrfj-(C~e7y}HKkgzuJ`8b+Bs{3S z_dNM;*d`W%2U@o6nKfQiDi;0Rt8HK!3iaTLj>mqd*=&Mp&n9^-{2*n-8STmrqTbZJ!F#Dfh#>T72X$ zKkgqhoZG%Jcrx3KvRSQ=G@Dthw__~)=^`39U_U3PLN4dISVm+*YUDx7W6~V&x+Gui zD6A~&8^qc9FTIsA{mzJkIOR+YCDeRX7$7}t(gsw`3H#Mwf6M7uHpWx)OFByjLD#0N zIsOCbdtoHOyhR1piD&uXIb8u-8LM?}6A{=I9s~P{f=1{n^Cmv2N_jqpq@jCBMaStp zFy#^>VXUisk&)=L9tg8EsLhtKu9HfSt7y5um5aYg?Mi7SQfl|?T_GQV%ovF09<~Md zYw2NK!OTjFcUZ_`d*C{Y*mkzlR}o%Coe+xblCa`<_zmx{bHnHX4|_WzYVIR5EME1(GMS_{=XuWto(x-Z5%Zo{4Zzs!X-Bfhq}-Z6Qv|HO3eXK6BtQOKmovn<3ORaxYB z-w?sUD9Un9zGL?Fs%Xn4eJ4I=@pskJuGI#65B`Ia;n6$--e>SOZ$DeX?@&bZwd(*H zz*C$>oNRYIA60XE5NO({SnG_sdb-D6^|^ZHrEGjL`Q5avTpHQUNE2ip^yH7}dU8(f zvsHNixW%`XTF_d9IN?1IyKd`0bCC#RGxxKXcZ+nmL9mSNsMrepH2?qP_kZhZs{qc9+qT$7a>uPvCLqk&#=z&fAZi|4Izv@M9ZlAwW3&1ZW!ipX~?Q7CamZM>v8wd5`op z%{*>GImX=;;Wq6!Blu*(G45l=zeYt_7ywq&9cc<_tp_dOh2+Is9U)Ek$ZD8`=m2G; zF%Zj?9i8>NZ)LzPGpFLM@Lk3s+Ikt9@p)L3C`t=+VCh6x&s0N-Yu);xD9c*m$_L*Hy38EV7zv)n^vZpIB2^9e=uu z8`5FjEOrJd`MyNBSZYg4m5?r}XUN?|Z<;{M#@r50NlG zjnw}=Z2OyF@ZC>H)DTRYfd{`~2|eth0ogzo7RM(A63fp$3aLv2t>I+r>;VUUCM$e`;N$i}S+G4gbF*2B-V zM5yk&fdg}Lms|gn$nEJcSqG_>kdL368+rln{befE$!PLV71!M$24fN;O6GV|ucqEC zlYub>3%h=CQ&5KK;lOSZfezykcsp8x22gZx*VT z^Z1EMt>IY5>Pp(dLP>Yqegu$-i0G2!(8?$AKN%vZhckjJG=coEs5_?OZ^CNR@X<8O&%M~$UjDbj==-)@LplYHy_CzV^O&O$>l5U@ea?r+HuocBA~ymSmjDdPFrmMfJ9IAs(N*#AHQ^ zF@mUxoZH8`zR>l0cw_?yY@tVxXDY#%_Mu5T6jklTd9I}nn;0MXQFXCn^Xx~Fi@oB4 z!U|3#&bZ5z?9$}f68YGq(Kj!_b54zvvp)lwxnE_meqX5G4*_%`1%dt;A`|*J+B>h! zA1_>fzjKlN#W{;$#+JAO80sWBAPeZ>mZSSL3Fp|j=Ng;RNY=`3M3YkEc1E(z1}S@+r9 zwS0`C-FjUwd43d@pR?`y{?$49lbM^{qYFVcP1M@>g=BU_SSUA5{r-WiQuJi3U&eXg zeEN!3b=^;0jj~bxLwl;wV9{&2nVl(*m5mvqCQc4@RC5=3PB4B)fueS9 z0=-t8fnomZ57IJsG4|NJSoR-MZyg8|hV8-|ZMs@{DW;}O8tA5Q`jf1x8rf?K+#eK? zGfEK6Od%_?zV387m*OrHz@pc9`x7rjl(AW(s-8A*GGXw7LFDQnFH~Bg7;PD?RX5MW zyzvxmu-@8Anr1m0PbCzeMgg^IcV(bPCpSCrQ=-f_gCUzZYe*-b}uh(13ot_A51Wo#I3NX4aL$yUKuNU*j{1o-t?{0x%!& zuc$v>eTj>)MNLIpe_k8|HVv5$@3kqMQTqWo%}0Rq?MgH}_n__dI6Lz-6$N}e z8g`Yrkduc<6txpykWmGgI#Sck9&>NIMO*LDK@w(PVMP+4jqNNkj6GcX#--Cb@3}{T z3>)|H!fSxx*n=EDl~k-W{`yk|;}10OYf#hAR>eQA2>w0i!!+xtKfwqQMK9joiMTDh zh1sY!1tfP{HIABtpWBeB!TJ&6s2|2=rjLHPp+T^9;cY&!s^edCd=9J=_X>Ot8U{|T zR|f<|o(8!R*1J~-Hy=%}wi*YHf1|e2b<=9BevO;UN~k#-cpcDfbq*1Z9zMk=Jl`pB z_7J8xG>PiFa*@A_FDhwiq}LP1%Rik}aIXlW0|QsPN`uMPZKj{r7yB&Ly9wWcS8q+F z%jfbQZruVE$3g5)+nVTm2A3AF!?evI;hcfY9J=1GRqA%jSCgpC-dCv2h@v~eBfnF# z<(nSK<}D~N&enN+(nd4nJJWKdne!x2cufS8zZ0SdC#W@1IPz}_7yW}m6 z)n2w7ZBcdok8sVCi-F{>`%FT?v7HaI43JH=eYi*8|0{w&@p3m|Y~f9n)G%&7&Mv8* zynOB!PZxA~b9ZgBNp1hK^Fe--8}xX}R;*|Ec!=r3#r=dNJl?v_(a1$6nMG{>uMxoA zFO8HNFbvONkp{Tahq_tU^{lrUj+v+s_OhY_AsUl$n*s^M8y-*)0nncyj4{&!Lbzrh>l^TgS<~FC;)9PFp;SN= z@8I;Y2A0~45b4sN%pWat`d~?;BXB*7|Qqso^!%}*KG4*86niqyA=ZVoRDZR#gUwAA?KEjICh24ie zK{>k)*{7^Gw{*=4_TJGYO1dKfbpCz6+Vzj%LK8^UkaF> zvzJ6{LNy{)9Nz5cM|L*~$&ot%CQgengWghJjb!Al%D?9yuF%yz7I>;ZM2Ne?6uDxQ z-;I_7q>1#w)F3G)7^;@!jWqI~F8xlQsBHENfZ(6?sR%{8bs$}zs9UajV-z@q|F5DB z74TOkwKh{V8m{UHaRW`^(hmA_)|)@Eb@_fNxGIQfi`OPjCq{-|TA9>rY2VY|Qy)0} zWExze3^7w5{1Dq`ljhWuI_Iol6)08Nye|gTYJYJG->tp|s&H7I zNkNGR_jtq9+Ss^PrxKS_6K+l`-$-Kvc637L585+ajMSv_e^{f12z1M|PxlN-Fb42k zBH*eiD#ot}Fm7fCx+S|pUy$bkOTnQ8c{2Q^$gwfr!F}GT$ zzB62i1Tj$8-{!VJq!xm3wcm=;>hAk28rSB{F)lwuquEOi~ax-d(X+ zjUI8W{~?Y0EyyysG*XzJItb`XT@to&63_T+kUu_eS5+x2wBUT@B&%W?`71NsNbuXq zNnv4;YPy0~VQ5i~tbz+tZ*7K5K!cYfz_eZOBsmW-FWH(uo z%#yl$h$s7lhi*!xq{X}0t}N3%UW!vVZv_GGru1wMgiSEno5c7w!3H~MA-#fjC1v>Q zsU*jBeR903NLQc6zLKOxwVmYt*u?hQ52@EQ&xEQal*h6d5I^OXy4=ecb>NGA-?rc1 z8H6XLHi%ic_0`Q;&Drv8lul__j5=|hY`1DyOufrYWM5%clpd$PCBp5FM# zT)`Wn5nLX6Rw$@|MW?JV%o%zc5Kd6cR4q+;l=TOv9cvb~|IKu=$QNI_0HvvQVKBjQ z-bYhf}dvc&2VqWZVZ)Z(xexaZ;k^sFJnQpZn|8f8V; zgQe`n#lX~X&YNJWl{XO(q!wM4QTmc_?|le>3#Q@!B!#N-TXkgU`=#NndXL9(KgjNg z;D`B&{(O^_w%@7!Hg!%W>myADxe0~q_*V6-Uu;NXqKF(D{sfO740J21i~gtKDOIJBtNKn{=fck| zJB)~?Jnm>%F2Dt4GIDsj=`k>%$|BR|8(4xH*D}kHDvve;%TYPP+?phSnxx^r)HB}1 zqYC`e=dD7iSfE#46PR2j@~kjUGp3Gp3zB+N8a5if170_D9mGv~YNF`yq)g8~z&(!n zNcOFXsa$IhR4#t-CUiQ9rKaE|Ialk)tY7C>c}VlyJPX5Qf=2)#mgiWHO}CJzgYAf` z{}y&N+O;f4FP|{{F!uo}oZ1)dRAmVY7o0g~R0ql`hHT9NUF^OK;%VEmK>MCGO zd*N&S5B1#sDob)DS>7E1RY4s7lL>m|4oY8)DLxfLcb}ne_%zlJKu9719HUW{rmQm< zpPdba=mTTD* zu3VMk<1*ej_~&Tbsf$zexW@@}-Oq2Vl<^m%#|rWT@JY5pp~U5K;gdVZX0>%E8E6Ba z=-ktE(5F^G?k2Mx@AWIIwm`>YGIqq(<}|1V;?(QT3;3dth-_%^a1}t|16F;WH=e>K zF-4?IFAWy~jK|skqVSC}N0h-4w!TB;wCwFk`z>FL0(@IB5cqGOb{UACd_h1?tr%@d zH_4c56ncpH_rV+&wHOeooh_i0Sl6ZeF{e2=*|9ou&KT0;0g)F7cgZV(wSil4(D7Zt zvH!~Rf9jb_r!V8@$^+Tta+hXhsVxH_$ISCD<59pVEbChN2)Dhgi-a3=*3i;#IB>Ul zMF65`weGMt3wKqk2iAo+=0vRr8f_Dw{MBW|-?mRL&vDFsU}A3_Y2|bsC?*$?TC3)9 zvo=|Ojb@@6;ih(==}MIwdi_wFP)SIkmz=%ui#Z0 zM~vbziE}(x0g}j(m28%WmAdAQiFVN0Zx*{XsrZ;*cUrz%3}uY~_=6Ri{iFt3<(y-` z3w781VEPy8Uz%ODw}!^EueVYg*gk{y+LAd5lv;sP0sMVT&p24&TgjRI$8~% z<+|1K_T@8jp;UN?XPh23LQ_7_J6S!bc51y_m?&To)hRz74_sw27lpMu-$@^V$%MMe2y^h z_GbiprV7)5F z_(`2AO8Va;36Q)g;AA7)@j{)zhKbsMP`@}3dW;$KSsliORYHuv}pzDx|0T-b=J#=rD$gExuUM$v|baztVabInv2D< z_#v8EgufxhYPbo-lUalV;rI1{*q>DMu zJs&71IpzS-Nt%2s*Hd#XkLfY-o!19yhwW|AvuZ4NC9Hd25nkQmv`WzMar`*%a87u) zxA?BMRE2oP-EKG*f z7w)QfMW)>DZtAd^*jla*Job7?dTUv_9VD1m@S!T({a$*w5F{$mTxRS7C7luYX3fiF zA{Mb0OhE1J+%uAxQSD>2PInx?oy1(e+(whJfbHrD3Hu#wF;WAXm@>j$H+Q`|oMU1h zq5k8R_g?j@{y6faM5e*4#xwobl%Yp)H(wVuUB}Un36I86nvryIQUS#1BuDD*zjf=; z`W9M(rVAQtWNA_WEbhg|4@~DsCAnum?-s1QqEWd+giiRP^&>>df0Z8Iq|<#4qqICD zo=FddD)VBwC@Tcyq%>taHtQ?B`Xswrc;yD6-6`^CP@t1T<;vfH993Y;^-?8&Z%Ubf znxbF^W|n@m$(k$-3Nzd@tpsx;&HuDQ8o6p{&vgBSpR|5t16P8;b^ zx7!augEQe_zDZ$4Rj7e2O%nJ8lb0Jx&)sAqkEci>BSua8?)#T;YOFsX4s#&t19pF_&b zlV4kXiYIi80Xzjsq1^Vy!{fh{M)hxKb~TW*Gw-v~0fz_YK=N){tB8iBZ~u=E50w~g zfDrJ(C%f_IhjzD{R*?x!#s`dtUW84{E8oIr9=H-4X7qUs-)2P`;g5rcJP1R>IG-C0 z?X)xw?&8fK9j&@)q+o%+eJX@!zp*(Di)d-N!h=o8aJKL7p1z=IbY9V9``l?s1l-G- z+>DS%Cyrw|#LA95JLCTSi{AdPE9bH}6EQ#JTTiU<`XXgWb7};ZVS41CoBdYgBpG1d z^7k5eW$DRbB33Z{x!ZvsdjkfSP6cQe0P}#trrSaGxmAr?;EP2_W{Yp<^u5PMM z9MG-s1Ok_h--u%^mT(j1N&A6O16qMn8bgv#!;MxKZdbc%ipwM%8etie9SRJ7+~$ju z%zCN*^?k22e}?}BUsHa@w;Z}k6dEu^5lLMMPxg4z{+ee&Z!u2-O{l1g#3@#!RKTMy zfM_WTGpbDnzsJeXEQ)s|#MHWkfcMRn?BlRvgLsUis*;Q$H+T1$R(n2b!>^WUukh7v z2|n_}`atEsT;UGHlI@7@3K6`=+7%Le)T>&4wPA;}<0^gr%1J44z3{;+Pdyci%gm0^ z)6ehvAq*ij=iCIpzrD4kmB&kb97+24%f%G^qOepUN-N_|`GJMIm<9I%W-7)S*lJI? zsriB+Et384-NO<*xHLikugajf_>yTS=G|Gwn{fy+O+7(kN3>JlLUjN@t~eNe_k{?k z0z`C*0RiE(eE#{5*FCbg1jWqe4VIRz!UN90UNTXJ4-Lbw4AWQJ@A=Qs#x9jvbS1Ri zXN6VaQN_5=!ybspHWQ}n<>wd1v_NClk}C(q-4Z0L1l8U-VY~4Z2T$7!&TD}QJ%0W- z(xpjF@?)ts8HytzeM&!H3n6ocbQe`vzck2?WdAv zkUbGmNdak|QEZPoNq#mM?U}oTWip}yCNO3CWmvwNTSZmma}K=N4H+C5vcPeKlVw_H zLIe?DEPv;Q1^Lih$U|trMZcKk%HLP>2F;5c#kCAu$CZxZNuc7(^_tcVJ?9n4XJH*` z!c3E07<~DhZ=AX+d2RbYQOcmfOgkm{sA-nY1#OA~t;SkvEgs+WtiPpQ0Y=|q>+ucQ z&HsE|7&1%G+$(SiPF1b%VNtnlYvVsRuce_wpY-k%>&oK??W6Gch(!0abl;QEOyJUv zPNOu;lPkFAB>oC>wX~+hq8pv)uEVl7PCplrY3wVnl0V;bm!JHgu;lldKi(wVJW_})LgI-g{tJZeiJI)h#5?M8EbokX^>V(D8pZjJAkKfwBqT=sQx zZupkIjrF^%-NiLP0vAyy&#Sjn+kQcH%ap*NcO&#+zh)SC_NnRn9J6d337b` zN_g`DVHlsgSVJ`AMi(+4tK)K<8NPYkmM62w-RZrDC!col$#COxS9wOXm_93rl)lsd z{U*PZ@3GofCNVftso2I`^eD{xQsdCJeWlAy9bX24Ad03&hYGR-1=u>T%F>fJr1`=J#kRaWQY&{Ir_sHaE8KilCjdLLAOn3|zw8dgESf zMP~B$UB@uu#a-pvl%SwHMf_cQ8(qIDajhFw;C-k4)y)(aF$b86O~dpfBU|G6OO<~fbuIM-PNa5Lq4YgleTJ=a;UH^=BX zuI)pb^!F$53A%4xj7E7LZ+4bmeWgn5|;P<1S}s!`)#uSj-O8O$#sloxfZQ* zPKLtri<@xG{#$V5UrwR_s&TYlK7_%$*68;nEU&pke*f)q%pJq1xwaD>+ea{T$8vPt zxEKp=nZW2>=b`_`m1sGC0A))XRBRI0nxWI&;c^s=%6-{Lg+}36HAhkB_Jj9f=#~{|zit!_R}Y}!hDpEovg>+L zD&?q7eurNBvmm%xCM-8o#@RM3wQ`=KiyP2;_hP+XrI)u&mJ9mFp8@70_ie$#yEdWq zvPH;|@0Pxx1m)w6XjmcjXK_6$Ry3n@Wi!fGw&*jGnU=}=k`;2_Jzk6AiAIzxmwV&I z)yNtt*ZfahCM55_VL8U`SdWogSE1!H`M)phM$5JG-`zZ>Zyq$?z6iCqNV$_>xoO|N zNb2;Y4a>{lypFve?8Vr+Vf^7=zr~k-`UIc-?n8X^#c6dEAjCGzi18y>PKEh5pWqwD z8Mb5qxB=yV9W4Ls2Uz~^|7r!x&&|z#i@&}24VM3n$G=O1KuG?d|M745*MIqE{Qmpj zNh9(V{_y*6@!jt@{YJs}R0DLztDKFLHe6>KGHV!a8aCr+Znjy6X{f&Vn#mkK#J8V) zpuqgAPpLMa1m#qgfBMDy`23So`2MqZ@y%y%(<;n%1~dGp%ME?nLYudeojZJWM>l5N$76W z-h|>*xX~(w!Fj5_X`}K>LFL#v*U9%G0H?y7=QQgXYP&L!r_h|La?W#KuD3p)`F@1{ z1oKqdaY~rLpu&s~cLW;@E)(jjO07Rj)#c&+`3PH(kHDTB_;+Q&wfzXJVWOh9vx|#;M21u1s=`GaBED|aBWDK3a)o=O49W%_3?13jn#0hiBX#t z`jy+%$6!uPIA&D^BVl!|Dh-*KlR#;HT`;DXcp-?Mz{7b6@5@8>ibl+mhj_cZ5IAOs z!ZtHV=bh!8>8qO%x~ND!T$y0Yz;b$)(|eQ;w85hV@E(!}cq*5dmLhVz6n^qMEy>PE z=`V$URlF)Q6Fc+ef!T#mm^I6S$PhndB*Y@r&jT6BvAF1hb?9uXSC|tQACA67Wnc<<|l7S4l z$@i&>MPys1Ttj;}7X-sOF9rJwOXxgIll?tPqER%_hSF7?i0v!XL~VpJ ze0wCIBN-umX^0)oNAyT8f_rI|l8MNLSqSKs-#x&js8XgEWXSdAKv0J4m!ohtd1(nk z2h$KSlBwW0X=%PfsGjkJ?DW;9dVT2bwQ_!`d*k^i+0rU)=OiGf z)k^949LQ{uHng zTf4IHa&<1gjfufW;i0%CI|x^;tw-6ov`_LITQ&_Kqo)XS67A($&WCSyAc9L0;aHf8 z*=bT=VnZ=M%o%abQK(&Ch5GYb(QuLUEsLeiT2!FlHEVUXD!$VRWR^*rwR%zspSDWc zdZ}CdE!naU74k_dN)W%I7#Ztokg}p&?NxZqJsab65H4Y~9MiJBbl}IOHcAsb7Hw)f zW8qbzfIoaVL(WsC%10*mBq)!OK9Gvav<-EdGay#}kJ#Z{ZO3A})A8g7yYS@cXYt^% zN3i{sTX4^j`{7?3hP3fQ1a`&4tu;bDH51pCBVvM9DcKr?;Pe;{U6iG;D?fgly$v|$P9Nk!aXj`RIZGIm z&y;q_vnv5}>w@6XnWzeGCO)L6c7Z$$N494vP~^Ipu3SyXIW55%i3_C7k%wr4Ov3G0 zZj<(iAdm?@=^IU0&RhsK+1?0~`sH5~1&f;nmE+CmIB!t%4cMi6!4f=2737wHX`0N_ z;!9XNAJb#(;8h%|35%!2+QU=oU`%Hg{OjTr+J?7DdtVU&T2MrEO5e~B2mkI=IMzqN zzB*I~(P!m&NPVB9ecJ3yH&_zwwEqn5OjU335b1a5$xS;J+NQX*$EqUVt2F4}hFCDyOvQzqf+crjEdQ|{Cmuq;{uG?|vktY+(>Eh;y;1GWW=03qb2nhE_XcXV@@rJG49Br3r;o|M>2zM`g zxcJ*+uGbtK{QNL(fB8O5Zd|jj6WL>x$X{Hek+-N8xnord6u6%L-dUs4Z!DI3yu~s< zR;^ZFRA%QatwsJs6AD*0$#NCarGH6XDEAQ(oaef%aoJyjeNQ^K4ad;Cv$6oewYDNV~2CPhgc+bvcrvCk@ns}Ils0z&2mcq3=Qf;0%pccGT z)~}TNu#HuSkhYOYIR8KP-a5{X>&o{%l3LBoe3}_fGcz+YbGM+yXvqw+Wm&Q;GsH>k z#EzLsX13#)L#EgcO=fb3?&Qu~`n~mAr>lL`ZbLFNZ$9ruf2`hByRhq2?OpY)U;S3r zZfip4jKvy63}zyt&!Qp+w)cFwl_kGb)&4=G%6)RgWHA!t9y@MJH4=9=AV$g{X+z?q z@8LFSxx%)YUzYM^W$s@2o%TzA!Pq0e+g|yN56Zp#*`3IiZI_+dfr_OZ7A+SJq4S~< zWX=>LZ?FI_{={mpLLmP9Gxy=yr|!}6rRN{StIt1#AHVdd#_KOWvK()`{FpVl=j%@@ zEPwMSC-LTr@+Uuj5R?8m&f0E^C`UdCpCU7{~r^U8o?I>w3y-l$^Y?{XCA=Sq4nMd!ylaJhvlMmm9 z2k*Wacieh4Zn^0gZockP+;G()Tz&a@IC|u4oOjV)Ebf`b@LVstCt6T9P=(Rm!zdmr zLu6YLM(FK)jQOYrP;ps5Dvu7J`e+|&F6%?xF)OrQ4T2kCD6kEcv;m5Zu+|ZbuU=Z` zBiLTO;s5+{MB(t)g>^gDFzO5dPOxeWGge#1_V`)% z-DZ8q##HzqPv+>qasjPJMnT`~x=VZ27NqT}Q3d5KQg&Q3ZjB{-6@qd?^480T(SQA{ zmRY+ikg}yvp5a@UA-P(wTs@`HbA>E>*^rhs=e6U=%U9#4_!asun!?c0c??{&0X^5w zqWeaAmdpBYoI&3WQy9E{2E($Ak?ZF%cH<_De`hO3zqbS9-`k1NYd2!zy3LrnVT+a{ zS1n-RxGZ;U3cW`sF?3>1V^|@tH8?(a#jMUZcFksmze6V$FnaX{Ox$4g>gIa;uAD{B zi5Yauaqc)Vfp!V1?)kEVFG&~#$}5A%l`kR~9HxSwVbn1=&S{1}JeB+$Z#`~ZXX9mK zsJ&!JZC^&evlFwo?#Jx+_o)@krdtnS{=0iIe(hGwNjdYqyD1H-v=g^ekV3 z<)5ws%YXWr6_$Ve!8`cfNAKbDkKV**|LvD}_SY|pUn#q2Ksx4GR9`%-pEy-s zFrbPNdJOXIYTY5ZS^0Osaw^Jg!vN-lt0ZYaTx z@s+U}0RMBsfZSA$6Mh>Y``f~DTTsq%maHRaGvN3amMsL~R=94|6O!A4a#f4lg7WDK zh2sV+XChI8at77k-xRb{S*?z+oJl_oIBvjjV|xZXS2ei}EVl*boX* zb*k|QV+qg+&I!nwaFuE=0&{xGn)~GeZV8r04j02L55mhaT!e^`;$>KFfO1=4PFT)q z!96($>izntB0hC3gm5W!I~_2=*|m)dwvw0bHfyt`^x%?_V&sHaHXop`582UJ8cjAyOI>Z zq|5moyCBo&B{o*e18fbFHr1*HjVa3)ITN*rZpuJha~86ODpY;wT@{P+9o-0MNkq}M z7FecB6|x4@Mj>seQ0+ws%k7GTPBvR2+50tYl1hj+Y7PA?0_|q zP6#fHLjG{2Cj1PoPSl_;V?bpbs37F$l78j#f7Yd_4M9S4CWu0Whtaho+(j?o-irr_(TB=yB30P zCjVrzNP_W{nS43sOulH1l<7Qc@P)~6wt8w4v_}kB^hTZuMKk0)A}lYKc9yW2Uj-Qn zn)7!xA#-;f!WU&-`)W|Rrv>%fThXw+9gTZ>HK#$5w3*2R*$D55gL}O{Vw!_7*q4UO z8?*67N(O$Nnu*sc(s8sQ9&>wJQG2ilQ8lRu$c{jKeJV0qGm%wmL1b<`f=hA{U0;E) z{0zjFq{1P}gs@T{v`C-OeP{wT`#RMkrc(M0ez`F=uHn|+PxS+oWc6&d6`e@2+TQ;0nRy{ z^@QZH8|43yb#dKPlXLwF%DL_(P|jgO@(4M17zFJ6LczB$87{3+aO;dk#@=RF_B1K% zjhAyXXH$)W^2DA@gw@6%wj~*Ho$0Vp9Zg?-nJ05c1AK?lv8Fmi^B+*{?M!Q;I49&x z)mrUPQas?CAA+ojYE}Pcj!B;&u_nz6o<(M)_RDdQc9oFaqcaZS!&!)u^EhX|P8GxP zZ8-=ni&uM*nweG%oiPoctWbTamD-Vq!qG~UPS&DeqypvB^+;*YMn+Eo0?VQhR35E1 z1WerPQ!3jYDbp8%rZ@-WOiEi?MJ2ku_P0#nNo6<_P*N36-)&9I8EKO9zY!sg30A9_ zfgF7)%|wu~Q^jy=k5`2`;W#0A@K6Q%cG@T&df?iNT@Fy9OT&fIb)5qt^Sc-a5uZ+XaDd^oOtLuwXIs4?yg_fm=dI2 zPIR?KlI#b|1Q&gIp^+@}B};u0r%R;Bc)BM{nLb#P?FV|@I_vfe@!x;ISOzF3nNpnV*@#Gm`)+wyxk!bQ$KDzqI+!(mr0QDN4wFAIl5Nti0m z9STF>P!@{yrBarM!J$f~S91PPI95mKi;95uRD{X3z%Q)$l|trNIb8FC z16^{itcPQ6Fsirr!XoD-{m8vaqEIl?h?w>q*jfA(j+>G^^oxnw#cp`!%YI}A=zg}G zF{)~HUNa5*ht+DxWbuGUO*9(M9f5Ca0)o1%FLwBqM~<|8mPKpw;ZWK!Z7oIkbf&`c zr0tbR+*SeeLcUr!C2p(ITn74rP3|YC@aC5|A#z@tay`_-rfJWx9II%#f2>8k+~1`w zvTtZZirjlANV`g4?lYVYul^J{=d<;hpz7>iZKE|O#(`E8pDFkC2itU*Wyv|6C_leP z!FlCbU8p^$2NnC<(0zD9Z3Zk;g~*nBub19@TovQ5z3{NY zU#jQ-!vBx|=ZjA-{og0=wu17O zglmqUk1H-eALk!F1Dp5GVRWt+U1LqC?J395_I?x(N&DKIpb(N^u>6u9lpg6t*=0Q_ zyR;jXhr3WM<5o)+s=QYZ!^3=~C5r)pZR=JGW4^BnD>VP=u)=a{7I-DV*jiP^VLAPj?3@DYv?U}itfv2(0q6p?NU!m5UR&puay7o z%0aYTE%i&va)NTI$2+f_MAubQ3eRb`QhRZ?Jhzu3b!(Bra{8F}Ut{$u*O2)M$-6Ee z)nUT&OI|pEckm&4FC0hTWis!Tv%1di>!#5v+oGzx^QsYa%YO8nka2pTUo~mXQ<&h-hZR4 zTk80~8vid}9<&@EJ|$RZ1>RqVp(W*zUiavB3SZu;67zIn?jG4!29t>=2Uj=rlF(0#?Ms^(jdO``3JX|$i1 z(X!=oCV`#Q@y^Sqb-rFXPpCX^I)4E7eDo+D`pKi%dgf;Q@qhjee(~$~@WJOl#Ydn2 z48Q#FZEFHg8~CjN+=d+~Kl&E1+&0Lq40x`v{Ij3o^WRw4_4%(qRz^rwHt zSHki?{i8K(Sla3M|96~*<$vYzO|aZhl^dU}*uIt1#^+nY^5sVE<6o#JIpd>`rThk1 z{^2Lm7=HLJe*f|N`1Qwc;q$-$0MGsAMbuw7g4*L#C_cXzO~oPeCu3^;Cpa$}s+`2bJw zvm7&4RryMFxdF_LAgpGr1mP>=-wVr)X|}<7&O>-lkj{B&>%uyEs}qb80X$hrMTR$3BXMJmCO0K4&z-D8OmimUTe6WoTnYb5>nG=B+q>Y`6n_dV53Gwu zx*W5R#w2-ot;CuFf8_0GLz0|Rw7N-@-^w9BP?ddzl|giKreU)dBfh-5svQ8aP{+qo4*%4gM6{h-5yT9t_sUd9(Gvg z=Y)X75V%HqMwC2M;MwT}_z&_3$F6n*>%)JW2 z5mJ?ah^BPJwli^{hkoKu$VXMVDcTWs3GT?~li#MR2&Onsn3BBVnr}w+);=Wm$$8kB z4VTg|{nVdH{8FanIF0ASJYZ3fojNZMvqR~K8I|*SEKh^et$BTOgF3O~V~kxp=E2 z7r)Gl!(DkHIQNV;6wVdHF4+@dB?(BWNk?!-09-;$h_J|SoNY#6dIj{-M_5ub!ve^_2O5-aw-Ud-hmcbNhkATu>1j}`h(4GU|vPg^{Swz8X4Jx;_N&8fyfH-$iwk5}l>P^C6&mOsE z&hJNsJe1J4J6pENml~<^J0?jxRJc%s@4k5lF1YUq4&HtNS`YLgtRqRsEJ7-M(zjL0@`b8m51z=ewli}jU}8^x(3SIlH6dQGeqqD|(O9R)w&fFIw2|F#iA*=0QyfYMo+V9EhNf6wMD2*qaXD&SbS+ zF;wNYu-vCV1>SwhT6%URAZ#=nJ{<{&k?WIRGq~59v9`b)K`rrW17k|CgIi66CR_B7 zcHXYutm*IkhnLwCcFywu zB}O7II~7Su(x>=)A~MblpFnT8`?(`FDMk}~hJ^05~E!FrkmdQ3*>ag4cF!82QGASpg=WS_5E`td-B{-h9RqhYB zwW46Vv}HTxo>AJW>H`D1FQ4Hb5z&^eFMs*6H)XzBlWy~ca`NUnq)Y#4VNRHh)}Y;3 zyxcb>NT0{)v{7T3MmxVGv5q(jFzwOCP;i?z?u%|F?z7I4cmnu?T5<>kvMlhtxf_ z%gS=Tl#7;Yma1^Va#~OE#SN42R&4K%ScPRqeoMv*+4gR~9{UV8H+UVZs-y!70|c=qZ0HM!+8Pu-{9-7h@%kk-HW{KI(Vg-7wq zOON5Tm#EBsTuWNB5I!q3fAx!!V44;!3bJ2$T+4UgASizp@4soaY0>F2&G0^_f}GQS z_U3bHyTX#=tXCVBx1Pt(-hN&c=-@$%#&lzt!Fg?$CotzQ z=VP>8F^SHrW)zfjoFM({qWhY;Q-XEI^6e+4(0+7MgRs2g3f9jm9492Fx}9Gq5}Z?U z-gSIt8J0I+Fo=6Uehd%%_+cy_*oeRV*Wcl1pS^=$e)c{-{OqUr#RqTU<6ph6Alx=q z!t&+%RbV;8faDzJJS)}ar(yZ&__lExmj9K2@MyGo&w9O4#~~UrDLeN zaBvxxQ&~<`dDEp6tHN^Lbgu@)R|Y-HjU=B8TRRp*QEr5xC|?Q7jq$u~4H_I*fWB4g zm%@PN1}taLa)n{QZQ8Ne!gE{j{TIa&=q4CvaNHK4bNtTvb{<<$ zPIa0A$>~+jFg(T$NN$7yvkAVxDZUPt8@4W7mu(P=8z9_voFxG|mmwfG06T{nRK|0k zsWzvNJ1tuHe=upOk^GC`oIzloFj4*`U~UV`36Tv@z6{2ffH}kPIOjYDFt?4>V7YC$ zEdg`K#yHs3N9qG+!lo*PNnw+@ux|*5T}=p*<||ZLZkek?*{&Wq6okULC|qq=2+N%d zBUD*lesBosI~vumoXT?AurT=^J%oe$(vTwOY&5--XUkPt9<@+`*trS>^~l4u#S7Wv zHEO|PD9e4yVi44rf{L9z>e)*V{G5d<L zf`obtOu=hmpX3RLWG|%k79qOH0>`WXWR6rIrY#H3IY9`libs5F7E-$lG%@Jf1P|0~ z?m~2t)!7qnOWd8EK9cbFuqp;G?;(>LEa-6+Q@JKPCf5?Kv zqZRl;WisAQ3B=n)Q8+P}gY;}y1QZ4%t|J%z$$`j{<9x}r`=uXx3LkuO64(FmJoF#v zS8I*R{wgGuC&Q~S5DCLMXgaGO1=|~BKcu~vePpN&%U8g1&dXsVsVM!&OXd11-_(T4 zg+|@ihM88l#d*Rp(giLt?x-BCK}1Cy@`p+^%IE4)EayFeWy8S%^)hFozpQQbC_JMB z0fXt%7uG8rrjnD2af@8X+*U+)DvrN!6As>Wkw(i|0|@U)g=Iqp;^#|L1x`h0*g_$K zXQkbl$x~P!y|F~q;j~^MELVlNj1!dG!tiDFIOmmmLve0QGhlhd205peB4U%Qe{-=F zpwG)TXLArTm4(O!LV3BSH*oo4BrZzZx~)=!KtE_SQ@zM(HIucW3a0qAa;;c@ZXA-67%I$Z<5RZ1L;c1RJMs`%8mrqc9j{02e7g>tqMcOP zOy6viS@x6aj8k50Rd`1x|IuQ$V? zE(+m;x$tXBL~uhQ)}(mivWKt7_g=kQ+8GxFRVQj&6HpR|s7mRV68zyF>W1|$YvAkW z26q=bczMaOS|iu5w4sr45o);-5)rIKjKotQBa!$|3p8$_S-jc?UUbCwSJuRH+-qUUrYfAG*`C=y$q>nJg zyTZ3TR=vp!rW@3b#U(dHUvl_MJ2Y_qf_|}NinK#mV=B7OnMP1;qS_dBUofLKMJ68; z0^}Z}=3u`9bLZ-Cxlittc1G^^HFweUW4SF zwKA4YDvwZ6nD=@b$ z3C7=f&6*VS-PfN|`N+bhzI_-Kqm_tnPs8L@TU3==b7TmWNBdB9tRK}!dr^C&2TZW}A7jJv)nPmD zYC(8x%xl18+i_!CY1`z+MX#NUN{^foBqMrYY9@8Vk3d>)?FHnEM z0O~L5M;F&A`_+EssKWBrYevv^?I^mgn?&ceUnK4%DDS;?b{U@cTr;K0?TK5qXgP50 z%rY$39PUm*PEXFZ&NoV&K>;2Ckmhb@tvci+0&o?~OC)zhMdk zvh4v`e?P(aHPZ^XsVrv@V$(03mN480mWD+P$BkjzU>%ns)aSbRKd4Gv{%-FtxdFpD{B=PnZW{#T zT!*n;f^vfJ_T$rPze4L30&_!IPH@g~f^zzp_g^umHY{z2M)1I=C%+b!Q&~>sxDg7* zKmLW4A$=m{5-hg`<+gB~VTd|c!gAJ=W1WWOr{mkkX;}VO9{<^}oXZ%?e+ig>3uXB? z!SeD$gVHh0C@f#;S>D9YeJ+)b<;diJ8Z0LWCm?66v|ur&8LDyvlyjJ{T!Hy^s*J4A z+yLb(VYvae4exSWmH8>)`!9)kD=fDr>-++ae_L2?z;6S96N($4T$STCbu2lbv7AmL zB%il}awC}FlYrSa)RM*4rez6guLR?(#W%rn1BlxOAvoc<0p@KL=DJ;}=duiAe%9r0 zsMAEE+(#xA<-XHih9#|82+M6f%=wTCt-vyL2)AtaBd6} zmK%WFP?fKQ$?H6st-6S;6{j>7udP$bTk zTYZw}>lK!-%?^Mm!xug!@oK~3RA7czVa}$u-8OP6sYqS>GW~v;SjLy5-tSbDBnKDH7Thuy* zKHV1iEqT2rPZp`FH*O?%DRNXbPHPngfjJfCsd7G87D|!1QLa7uRxiPFLUO9h3Cu5f z{yJ5!6PVk=a@wyL%5qK8ysrh-XYz$*Ez0&apzO>x*ZtH`3SabF?Qhozm8b|hcUeYT(Gp&TU4mLQkbG>6BKy0sd?Llz`&C_&_C zHmap>?3O-p=N;!LjG!vM_sERe=OoE*L#q>7pb(A|mIuvA`!biW-r`KiNzhGDu3-bi z4Is|xMi`27PUAR1IaQ(r>9ks*qC9j%F2Xm;e4Aw*i?UrQ!{>7lGLwn0xopI4DMrH9 zQrV|m1dgX6Xd+#08_d&kj%}$>@Etauqrf^%+7wfq{MP;wgyn&9oo2ctVK~?NvWKu- z<_#FOAX3i9tWDC_O5bNnbJhN+YF{5rNsd^bAE3!`X{$mDi|AfCPo*7U4g}ANNW}K$ zBDg(8EvD$B&XUUh(w&{~p|ZS7+Ucq!-H)o-Ry1#s^#-qnQ>u@C*V)M~m(zAdV<=t2XHfczfmDQyXRErL z)-0+(?@!lc&Gd~9?~(n8w?k-aGJ-o(Wq6Gy`ApkVhqdJ)2%~3qV-iB@6R|eQ1IHe@ z0k^(-&oV3zs)$EmX*?n;Qm{72L6zmviDr2FxL}>hgzW4TBqhhfp5WYHrX@v7yXpf^ zZ#M*o_`}Q76;94}@br@FdyNT^5g~{O^G8yA1pIxR5g#9hn50mo6(u1kJs3}Z@H}pM z@iw>?1S6;=QC}=D=_#$o!pG$No09WX&LNiJaxL(GXYP%#Y56Uut!4NO6VJ*yI#;4W zC>=H}=lN{uGN?9SHOC388Ikkl+Sjq+TT=(koi&s%f5w6A56&ZFKsOI zgyih$K-fq=Oj+)5u8l&|dE;vFWJ>cwL`ODCq|N77NUnw9NE?=Rod8{atKiyXwQEV~ zFM*@<$LpmJam@=wOj|a3&zXf+aik{U4yj8)-OfIQH>WFvui4#?aOpp2$zqr9EB6f@ znv~XLanXBM+8EL{$~-Ckg|rKNImdQ~U$K~)<+s}^efaJ=By6kFonvdFZho!CtMba1W1tRBXPKT1SyOFiG2`SsE zk$s1z$>qu)X?FV=w1FK-g@Opy!|o(_)~c26^YlL z#=EaRt>sUDYz5aGx1Ij}>r{JE0c)s_}i`E35 zOY?J{_g=TgPk;QpmhVfv``WX3PvV_dpV9HRUwIlodEp7X{@i2uu>{N4pM4asJo^Zq zfA%5$U!Q*Z0X+58{dn@p`|$YVcjKXlZpZ!i{{Rm#!ROuI!!5U5gX^z9iW4UeDI~x2 z(z9{+@Hx2P&{^2NYY`LEBN!N#XSS|dOl%)V-PX_khvoWsU+g7KB}8?c;pgxa=XnItD@A$03^7e~I@!)4q!hq#} z_iw+)&p&@xZCI8)%Rl?ss<2!cl8v(5faL}#H-dGxE(iudC$}QQ`rYq7IStEC$G48t zu>7w){EuO|jC3#Q@&~;8=M zvplFb6%nI3$dL1#YPZnoQibK;WW&PG!To9z6qeIkfUvx9u^vU6>)>4Ar*;%nE*5NR zf=g9|J}}2oMLJ)jHY`+@6P7c1o8ei$z9>jxIg^$qZ>`pcX8QQ*ON_x{r1zD;KQ9Vv zf}9X;i9u{;0s^9g5StzcKeI1#2U_&OYw&3lD;Km>=9jyx|q;kLa94c*g`HDmxBw`AN9^2UlbJMSI~8>VoLP z1h~cdXp&EY@(4NRo|Yhm@(sY*m(d7LgE)slg%@hZ)L&!mDbg@FiaibLX1uAJxm zx}sPCBrS({UK@~{i9QLBZf{YDvooysAx5Dytf}_4PRjOxf zsK5nJU5V(CY_(#kJkTX=Xsg0!g7VTctTrc9ZYwO`TaSu8H7MOL*WJNJq#dY7^1eFt zw(Y%O0*TeJ@S!g;RlV^h#80K8;#_HicNU|iI|6sf`Tb^wKR!u_z-@6sC@&9&S6Lvs zN1CPIc>_;AcMI-*@DLum{{TMy`FHX3v&V7nu`Mw9J0ZQR4#9OvFn6V3@Ul4tfwU7hJ$Vz3{qP9VisCUb-;240AzXCv z8Q3Qe6g&3Mqp;S3q=G0s_tPhk)0T~Q|K*o>=J#))en%g!f9*$j1D~MotU*oW=--_T z&yG0kJ9!M%7xp7)C>2rDxiF8)w)WKH&fh(TC;t1Z`qCqNvs?!YW$INr^9_Xx$-^YR3YHU;$1KvrT;`j} zLilX9LUXeW2aj10FqR?fmTk=xYVts;yXmQ|%5oq6=4%nsl7QkJ&2l~!AyC>Ov;2=# zP0qJ1h%Fie`6z@isf1wEKt?CU7o)tOeCld=}Ob& zsX@aQwVF!bB-hLKcC~Fu?3VwbHbsGb#dI?|ca6Y4#YZiCA{)|>*qJTYWHu~AC8{3J zkamYJ^jOCPjC=`0IPQ?`r*M}qM5r)#F9}2Xs9Y~h`kCsc{Z3$GJWQGH2y9PQ&vO3u zanmL6?n*}7Tp3KI0WcN$!oM>`lR-L{hr+WuLX#ykfhS)W(td?OP|g<#eiFViOx3=r z!cP_EROj;LDbK4|zRZ#~GpvIN9bMFh#j8d3Bi94Y^^u4e&WCSvqUMtbllGhK(iIPV z0n6FeFlfUPQ=N`Af%XVZ3PDXKaHOThz>=GQ#N1efWQ5|rHy^=?CvJjk zk^G+0X2pybB6uWIp*X*yqQ}2k&LzTVg7FYJZ;c3=kv?`dUn69$;ERwpElm14M(|8A z0_3gBJCg{e(02JTjmLzvxaV8 z_J{k+AZ+&~XqWW`%@!*t50o-srbvN#oU}7B(&hw?0@RQ#zQ~E{6 zf>2HBoHHx;fRnZGD2dd3BphavPiN^%)}{L@FwYvTQiXXyrL05x3BJ%CI&VR3TI{7A z3W?8kl=Bq_6jYMeZr+U!JzDMs1(ccGSxC zov*OmZ`6YP^Lr4nsRXI}8dY7+_9uCV+&}JV)cgfz`Hd3gnrk{TrwV`mPqdr~>&t*= zeY7T5FWudS^8KCqB8yg3sf$%8zn~xaXLlm!V4IZf%fOsv;aTk{I$QdfrKr1b0M+O8 zpiZ6_n$GS;|KUlroY9R8>E~+a>+r_UUsm`{XiPZ%(hH9&Jbw1+2Xy>J3BvN1Uwlk~ z`KvEKp`e`QYcD;4H(x%9w_ZAFh2;{2;RNH1_g;GjKYQbO1>>yed<+h=jw*0MZ-w7) zEgwN&nqZr5R4l^SkB<^JFh&AH(xxdz?|{M^N%YufAyJ1 z@Z1Vee)8nKc`@+i%2ozk4OFyY4bvef8mGV1CIZXXEVi4q#EP z+lk2$436}oxw`=qTSigRTdsLzCQocZr##2eMy2YqUTa+1Ezf%L+g#d%|7sf+se&5dE!+fL*DG65+;`PTt)BM8oU zTxe0l;4ovQ65I%m8^P%Y2sgr5#&%iTc{y&ta-*Jg2IyuzVK~*}Ul*Lu7L+q=w?zm} zU{1gC=F7&>aD@BG{jsXbm%;gx0=-+VW!kW`UNrnAW%){2{^{pG{}L=GJ5r9M2|gv3 z)Zzv#CkSU4z}#R}Mm@t&m7j*?r{m9w)3E%nJpQv2d>U}v0OYpuZD9E~CHSm4GA13? z2DM;mxNKtChQ&zm*?LquPKm!1mfI%xG(fp+f=^pmZYarDgXIL}Mq*En8?d}&m#l9` z>nX6@7L40kv)G0K&{qZEe?}Mza)NP&0n3d#TOht#a9#s`uLS0dm3168#tDjTVYvay zHKxjzgTUFaV`1p<61-js$5+O`7nXDU>w<|!bv>iSx=zCL+<7?`vX4}jQwg6n$N#rn z6MgaljtX-IAK3Lc$o?eBIuc|Z^h)KY#p;zR`xG%C5AhO_gLw)d80H}Y^jwXwpO89rD!>=n1zMZL>aLqOd&*d^TN9IBUN_Tdv4U1c8Bs>bD6_zu>r;n_Qu$&1#BWIZWj|us#usonU zS@ty(maR<+%gyqen>SQ_V}ein%m8>+M5|}HuRLtihQ;tK_o)n5SWepmLM`{&Xk=_| zK;oSICL8JyGhCpa<%H!$v-Jv{Qb$W+R~TruVHqz#;7A7iM$!>BD#v*+8l&EjLlF`gfQYzIghj~y`8cZ;3%$#OLj7di748yL zL^`-Tz~0RsuHNoy!?NDpNj=N$J)B`rn*n?J45^Z`T4BR5CbDoqtF{+CM<+E!>Ex1ek)7+_r5xH9z)RuLE>w(n$sZ;5Sz8++&bq!k{_cI zZlCU*%8~A+d_TMIA{5qrM!Z@@xR|WO*eOmw9hp-x40$?Tj!4gKL+lQKNq_h5?OIOq zi{|vYAC>>@Ee(fP%@&fD1#6YT*V*&56XCa6iME~ov%X#X0j*Y}@V!InuGiMH?U}zi z+kf9~7~^uD(b03eU^bo}LeA}y?Y!jL`8{8>Eyln90FO)WIodROjNkD7j4P8v5$U6- zyIA}%wx(X_{z=mqUgaB&Z9S@*0mN+GFgO7&xZhW4h^TS=NDXlF%=m-&Mq@YIScQNm z5_q9jw3W&XUMP*d2KoT+-dLSsNY+);XLbu3SDp{Qvn(GC>BLLs%yOp1uS?B+K~<6&{E6Jr{o`|AFldx4vPb|NQm6{>GGKSV9xAnVbSj%Lf>v z^0AfKcN*c*;?6DHic^yDfZX{5UA#u__ z_rh=Rs45tEi}{b6!IXY-*Pi6!G7XwqHGRIS6CZV_&ePw1X&z$S)p)jf4E49mtqiC= zbcYw$9?G}u?IA(gDxs*11x<9#XW)Ck}8d%23?>hN-!Jg;v&*uw1&;Vy?YfI_@ z+oa-dISEt$&x$a|TUdMODgio@lJI7(WhAw|uR`Pj+f*r<_%_A}`uYzMvQI}R;eC`Q zuyBvmVk_ztL>T8ceT%U!p8K)s7pE%5LHzRwakK8y^x>4$tf*KIYM!T!OU?&9%uOnJ zTCqMZz>_yHN6k#%aNULRv*1PrJ=h`xi{a)qSr0KIY3q;_c5->h^^_CXKM{1Uz!U-5 zBi4qLL~9-@0scV6t8pABpWDblqseVCE4=RXW`r1Qawp_t<|K$Xmmt1sfRt4X?&v`pslgzo$(=oBHLuq)@1Ivfk^g?B zKV=9Ue*J3NaGz%?fzn_BJ_7AOtL{$oP}c}jD1+8(68-bN&Jcg>8(d3iN+!dx>3w+& zcH0|6&mftDlA6>~cAHs=J~I`oR45IdZ^g>~n~q=vp}jxCQSB&JI_p%#*P)dYHTJE8 zJX(e~#jCl1&Keo+e)tfpxm(MwW~X$c$)?>ZIOG+*P;rzZXGi(%v}h{$F;=hS;jEvADpm*mG!8lbwA}V592at19K|t z5mvcf6e>dQfO&Y2F64G;EaY-2Qq3!`tdsD19pbt5Gvd4mEPxsceY z>%L7tuk0mCk$2CGtn|0c^C)mV^W0gW=jNOAhVPy|{Ny-UXnd&9f9TZxoHCNdE*zDM z8Ce^-R7M$~|JYAYVHih{lkm3n+vj|q#$&5K!ar1oyn_s5uF!D1|0y8w>GVP5wCzRu z`Fzpt`x8d(=r3NfQ7wA(t^4{b?l^LO1cIDi0xNJmnnA16$o(WCe7N^-E?G-2;Srwr zg1Smg95NN7c08lel7;YKBw?ceqGo1QS6Kt@qV{(IA7M=#{NazarxbK;`z|}Ko_@QI zC#;)rlaq-Z;|7v zKl7S%t2&}g_9CZ|h^?G6((itg3u~{&X#bRrxvG8fE6GhWk;D!DA5RHR_^N)DuNL9v z8e!{Sd^3Jl?E@V^lBrHvi%8==5!7{^aPqe>oAReZ@49a(c}`6FC|*aM(j9bTU~|J8 z4Dq1h!M<{V4~JG1+l|wrk4Y84VQA!j!aKabj`06aj$LlNoiD(pBZws@O8hYz)zoZZI zig6OcJ8!qKEdEs?2t)W4RoC6^_W->0ddmiU8cy75xLI#Oo^LvyH_$=_d|1CpK$Lv~ zP66!ee{NI%Q*$J@%;97Z+w-UC|K+y+%JcPb^5w!T^DFZKeO)V?J`lXt-Z+kBrYuAi zNV$N#tAGMPu$6(Xvg#`ZFy%QE>qb-u?iUc5A=&{?BYy1&uNp)&+E*7|l4=wGi07b( z_>24ZzIFa%#@zH;CTx?q8Gk%N5Pv+9!s3PH`{Y3E6t05sOKwC6n&}jX+jJ`Fi)s%s z%Rb*=r__$zPK9mk{ zwCzckp+(E+u{^KN?mix9p`@M5t+1tlw}JSIRRg%S2|#bfuW16;G4G1-Yv`CjcOo|( zM(>SHq+?y*tVxC3h@rwHgTB4SYDf~9LnOt-mm^&mapE1-=4K_WG(5ph%;lUP!A4|t z=N*4$tB_U>copjayfs4lGbJqs0sA1xdsbbJh%={HUXg;S^a&Yn9sw%dziXkc)t>u@ zVyoV)!kHG=idyCUWz0Vd-G-!1f`fc*7T~~I2kZ#J?j3`d`kSVTDnM2$I?X0g@^K+P zfxK%WU7PrOg{yiyJMWT51^B|+`lmLqWO{wzdR#W{zNomgGO#x@)^T-Gm$QA?D!y=5 zx{}fN=~>~E)TX7b;6ysc5l)x^M_oSPFBg0E<62@op^D;8bK3+9*KQ+9@|F~OR*?5R zY&k1lNRMmMfM;LKez<7`YIWC>jc0pRDAM2OU2;1$5PNB)X5vmaQ)0d@U?HY{J<}#d zJUfzw+q?E%VrSg#DltOI2b@ZxD-hYQi3cHxx61*`v&*4zp~@BC4&71>zp33EFN5Pc zXiFn*8o}u<0blIcnr7IwQmUY+_5Panap`qu zmKx)}!+wzeb*^Ac4GQ$jMS;HsS(VIM4>B%A)t5Vax*FoCVILc{`_33#AyvZobq<`7 z(aMWQdiJf`)tUjEJL8B|$MuMGa={;W&KX@CLx}bH?{ICI*VREF5{}uA-^Dg5u9s&bt zT(Q90v$0khy%S@q9T$OIbm&S`u574@6)7-%+H>tj7Wp&LCE#m0-2zQs^qP7&;ve1* zX(UJ@c%hJ2?2I||AbA%FR=^DC0~uI5!uGer%=~iE=H~z6wH*G>^1mO8gQO2);I`DI z9TRvQ1<3p*E)WUjG~K-VoCRiEmu!M3%D&s6AaH#~vV2{Hhui(wsgE@knpXY&+%|TB zC-TbMjlQB_IiRoL#Hi(Z!5+ifK;7?~sN#djipVJXZeP!g$<#jfNyy^f(?BVecIo$Q zFA({xbTIPO?gOVyt^ly3ULq`W!l-y@uwegB^63;S1AFa;_pMKb?M7a8-WgZLX(r80PM_>PA2PqJ+ti!?*V{+4?Q1+(Mx z=Q^oylG=)6F&$fGO%hmM%kWx4L|W)80y@UG;osoth?K+HnaGd7{&l{Q;N5P~sj36x zb8D_g=+F)daw)FzmcEm*p*d001jkObcsI2!71s1%W7Th+pQnB$Ac`rwmkpH(rKJ7* zZp-XTWE^rxZM>lEM6{ZAM)W|HreZuACG|YQY0mK$*#WAFji{f-^ToE)df(I;_`_0z zb8}w4gUXn7TFYBYKRYwx6j2l0me(|a6lz7*FA`{mO$tLG2C4P!!HT!RfE8Rhj0A*U0Zs@aFDXK&TIVskLKRm4@ zG)SG|dCXHu1tULZ{DM}n?Z1)t77`OZWns03jdo&2tyW^S>&9g`XvwDD@>n@Vuc+|L z`hY*)5#R~x*Ym7OxPa$5VH($x8)F&xW`YJ>yc2x15iV&FCmN@$XOqqWV@dH+4YJHX?Z}e8M8W!<|cED#1>^J>ViqJjH3k7h&Z-FMg zjfQymQQWP4=Q@4+5s`bPeIdcI~%zbCMCxmM43k zXTD$V{^B~o?eLuIvmsw(nt}|_RD_&~>ni7h^y`{TcuNL}mlT=uO5jjfHTc#&2CJAl z@kA&nesA?3e@oYbHd*A~AOocUXyJi~NJ-sufff6kGzmW4{l6ad+vB0-h6eB|pr1I# z>06za>j*2{;YYcH_Gdq@a_rG4(x1~|zA@=KR`RtrTYbXa4_9A%x6B-33Z5(b$1`Hb zPBdewYjvN2W9qUNcmz&&YtsKj*_v3CeD%q@Cffvl%LETR$`eDI3pwr*kGo6dJUN1M zHR3OI2Iql`tI<%tv?p#R|NcInu~sP(;$!0Xj^ysw&fVLkUDsP>>v^=whTw4HGp?#K z!)y5hdPW}D*@s)J9Sag;n|esPbof6xm-fFR0D{?r=*!N=j>_yij@NsS06-M(d0_V@ zh9A$ptzVZ6Yqc~{%mckKa^~=7%M$#GdQrz zI$*WI!|R6srA(+&M~gmmr-ca=H&?l)ngV!O{bqor;tc*m=m?vCzchmUg!eT=73>df zvi|fu3EXR7<_{l!)lKTKK4q;=HDbrrq7FE&*1>JW)PC5iqIoV+2LrOs-FOiPo-5`d z#w+$l!%WE&+)+fyYp+mt0LiJQ$fm-$zdYwN%#*)5@39X>+of#d#ep$8JU>&EP*n+!YeYSSs3)AR z=78kyn?B}Z8^_8ySHuPRS;CfyTbWm_2|LKHsuxDVETtjzwXer$dTkcrDI7I{lUD_< zsj`5v2L}9_hi}W42!plUcz9Oml?`BE2}ZMYt`P`;RbVCWf(rv|Q>vI1$=4s8RRE*a z1^Zw5GkF5SYY8f?$L@d7oBGWXO|7&i?%_i30QO6sMFwCuM&VBh9h`FU>dMw!O5oZ_ zwe6sI79P{}k|nUL#bn7Uv>^RMrq=b{Wm4^&EwM#pWVCa zUpkf^7GR>SJ<8AsxPj3*q)gKdXmyE1Sz zb!N?``@dKitW3lp{pWW;os^?}m64X$t9oe`Q0ePx{(SCN*eo8L{USp|ao>2g(z*Jr z#EfCzBU2~NWFToQdwW{KQgtv9+UOU~c$94#j)+#I%&&s{f-U;RCmZz+t%do)N z2@OQsaHp{9Dc$(~YEAgp;zRMTT9LvJ&?o)G-cEFzRp^QVi}>)V_vBRSR?87?R}SHi z-e%hEo@KEj_$=oQmD7F{cHti~r;j2zZFlg#kEdTf-yQ_(zUSi@+vK0KL}?UT$QrzV zL|3T{Q*6GbX^Ns^DOK-OZAouXTWK0*ItiF1n79d`)>KJ8F1%lJA97+#cp%1_Ck{Ez z?Im)Xn~hs6*&h0pZt7fs7KP70jqP_abLC+^3YP^H`m_~wMmT*X zWyRrQPalr%Fr;!J=*Ku3n)V$8R={XE4vFy+uc>4muKSnLVrznj%}YS-Eo2aHbFT`o z?pf_v9y;wzjP0>NZT~ef_;LoYQxTAm%UN{tL`>d$XW?99B>>?CWYB=ihZr0YVz*FV zvt)kc8U7leRca_{KPIs|;)@2@K<>;0sD~^Ji%gLp#asHbD`6bIN+qpyi`=aSbvzIm2cv^T$BA=sSr=q+ z1ND0C@WCu~)t;GmZ=76;-;!^2{8^FmWW07QsGfI;FOTHD1UC(@YX(iHeKkt#Z9=kB zYbeK>8vX+Et5xeGR5(WGrwhkZ7&62Hx`$f}xdoes@e8_X`Yq@8zfH2d7|JwDkvD`A zihB-9gjAZpMjcEi@(d{7vSMG%ws;mJYznHZ|2WRQ7Xc@AW9g;C_a<2naa)Y{2v!>X z0*EK)NS9)IULu(!yF%CBzxaQ_H^(lV_aFYFu)=BLagXo_j1#J)LaEd{I+hEYC=qO; z>KP`KC9D+4p1ZSw@zPMQgC#*EsNDU*+cUfb!PKC}3cEkv<~nY%ANCjSr+4oU5Th`O z&`DCSB6uX`7SqL1cb+XnRmQv23BJT%9b!w$n-sicD%HgWX3j~BqF{2S)sFM=PZ5l0 zzFdK!I%G|iOw0Q5`)^PsPtDM=Zk4beQ`AzWNrr0kDojyd77{G%-whjTgMSt+iW(Pb z3omA6H29|+Tu8Q(r831*umouwf+o{H8$?<7A4)&*wTqUoapkca3;?0t-T+u-sjbX- zTAMOW7y(v2LOq;Wr&g;$rALhT0>l&tdzr&dy z#hvt3xx|CLPz9S5pgjiX6=T}YP< zT^MWHE)&uSjC|h-dQ5%wA4L3Sh46`sH!>=U95v3hz@hAe(u+gcv8|Yqif~6s=kMlx z0)F9-pc**y(-PqdIu+wO;#alEAK(MDmV;rF@3uFKs9%X*4*3JhSJt}e`)unvrQV;fLbX1s$TsBAKWzhThmc(~1*--g}a zVovs!2WN4T)Q}@X|B`%h}r$ zsX#69muaoSgI@i#^b^c37oR3mn^XY<%l3MQuV9Wf1~jR5hdM{@cR)nVL2I|=Nqrfr`n`dha&ro7`C*YV?A*4&Mizs@SdC;O-yDf1}< zu!MH3(EYA(gZLQs!ONA#j*FpyeYhES6cQ? z{EA{gZOu*gP`#5tO$YXY}^&$P51aS)w9U1|pQ@(b!5@I15-xR0M0CKs5*$rc#{vM4`YxcKLR(sxeZLF}Z z)nBVZ4@TOQ)7`#jhn};v`=RM!-1&I@`RLYlAs*O&F|>aW#L@0L@zgBfGr6 zTF!sp{Eg~e$;#RqJ;pEfStlJULWe zd>N{wCA*?tEdQxu9;xd7!M_5W-eeZ_M-ycQ2zlnP9N*f?g-e(LzejhkXb+LncdCCZ zhM%VgRz6<798S6KI+msF7{H(X;3z`JFN?3WtWd}C{l>;)8>|AD$6Y`z>*JFh129?X zV)P}@J5weeudkC;x!>N@g9+=Y#J`Cg=wcg83j)07>1DM!Yup5{rZDYQ6WG4VVFPeMmxPEb% zoNm-D&vtG17&duSpOLIyWDM-s`jY*Of%K<#;~@#GM024 zy;>>k^iB=u&-rn5gr(2Ng8hcX`bz9_0|iXp#E?A{nFP9}4lhmr)mRX@J(Ct5J+K1< zu^ARu9j5iU{_kUep|k=#2$Z4BMhCtts~A?PcH$05zZYF3vAxcVLWNb*!xV4`+u3Ra z3dKo*YfccD~NnCbGXW8=P|vGQ5G;PQ{7{EB_Y zf3PslY9y7c<)l90_`$2}Qpu(%7zRU+E5#ET9g-#F5_+x~m)G*@zm;y;3a^q;*xFwH;zv!knktEXjQJriM$8#6^bHrOzlA)N8 z&#n(@o>sp8)l8Xd2!EH&{?U`v3-!=oN(fhxX#(*`PUgTgjR~T}INM{{W@i9NckrLx zYoqhpL115tIwpT3SIj@g)WnY%3wJGY#~T!8MWoB+c1Cj#%5Fqz_c|OKPk9wv>1n%{ zy@z}18=fN~e_Ice(P(ugn_uI_hD;(B)cp`z?V%UA1p9Qf2s zXH*j_YPy}I^k^RZAWj_t!sKGwpTxu|{AL%tO2|(^y~`&V3#Ihee_TvdWCrIR(sLCBFgBVg8J%Wqx+(Htie(a#&_{`EC1GLz-EMCq0aRQkd~_ z#x}btKT?`DBwCnF!%ADVyf?o-r-R#TA}@$leH9P+!KkQbT(-Os@gwAe_xdGNYyIb6 z*%WsHGlS-ev7HtjD#ywumFSPilgUM~yiSQ5ejcpB-$03ed3bIS(z`ufQZ5{AOQBTi zQ;@wzge_HK%Dd5pGLc3CJgb|61a{@=W1Us$;ET&EpR{fuie}}UF>!erLS|ihF1_+Q zap&rw-4ymh*oGmis?X!B2i@cEl@Z*y$HtQ|-00ofogdr;u+*ECh9L|RBrlwJI())a z6qU+&nfLSjH{N-1(0I2URC?C;f&Q%TMdbw%L)4F#-2W74W=#s~zujNm?bH*T4UQ8~ z4B@at8rVf+l52$`=}o+4w_$`X)?PfdON3wNg*|tpD7MP?$@`KUl;cFN20mb8Y}x3I z&P|J!T?xNk7Gh%@-|tN8FFo-s{rb+B>w94))bFNXGwSVSH4T6r-_d+u112z zd0jh4NZ<-;6EtvcNA3vlDC#gD0BFxYrBB$p8wV>ptef2y&qqre8AYp?*VdJ@o8b^;k} zfWBs8{U4Dy+S_1uUmBol4M@J;hZm=d)eYacjh9=l=c8nd9;`IG?AX!=c~3y%>b$=K z66H37=6#nYZ-Ws>dQ-5uXgX7DfMOjiWDxAdumrF>n_`{suSRHa%6fGLk|9O?B0}hp zG~1NyKg9`M`i?1Xo^J%ky8zKiHT6GmG7A2Ov|9Kvn_BZwhZkEj6o?-27cu2c2Ozkf z2kA%^dp17P|m?!I40;3jUdAB-REVvlVWqC5=W}*MUSkXa+lU8uH`9%nsA~ zTTB|IPZuixWt}(!aBB@dPCfUvTpn<}Au?H6TpH#)H-<|i*%a}pP#;`|S72I-wY(Rt z!H10w2d%5NuPX0DJ`C=Fb6@B7!L}mOlg{Kx4|yWmd4s=cuqE1&*~@&30$4|p;P^xr z0`__ol>&z)oy>%PM*f?YvDV>v&eXuI+qX}4nGS?rS=QB}s{um7M8Dp`$zJ@=sd3df zTIfy^TC~;orjf~Wd{$MT_MJKquIb=aAs2_i+0^K~oDk3(LMu9lv=?`hag9{Fap_jhPi5C}Yi`2idK` zi5sv&Uzz-^=(nNIB!azUPe+623XP(#GWMvBau_l#&&qm4YRhg@5l*Y4!o}h&4%PMlEbGc%ge0~Sr1EZ<8j}osc`Yjet$+s># zaF^3I(gn{H*KDN)*Bv@N@yz7CiNSucYb#{ivj{!_? zI%N%)Q9$9?HO~=M}4Y8oP{CD{Q)VGNUDaFsiAho#@>6kfWcdcsZ z(OgtgK~S%*9{>2NtGJdSfa$~pp^Rnn511(x{fmy8iG~}fTM7TX)FXDBxAV!Ir z&bFIJ@l-kN>}c@>E`v(;5_9h&KT;-jDKA|IQhEF%tVJ;GQc?Epaa?M{$vt=G5MP_< zhk6{)zv2MIqlBIL#ES7GB_hYjq_?k1i5UMN9})rk+Rz1dTgW|hH%I~>4PX}x;G`U* zMC9PY-W2yYiy-eM8uHgLo?ENTtYIjg+e}<)GLZcR!`D`cWf&^)eSdRnd-%E9XOY`8 ztai@CK~v94VNBFe%lQ|=@>Xl;5(+Js`|a$}Dg%-S`{(b_omBVsgrdsG>QX*`=)$6O zsL1N12@dg9Gp5_u)y(J_o0L}&a}E?781&oPZdOi(ehRC39+0?CMMf?f2)siZ#@k51Tp z7;%w9*#hkx{$VMho}kr0jZ8Z%4t@H>_1)W9gzUejG5)zI zUp=dm>(nN^Z5@=K2DZ?gT70i)H-;1+F?bWtGQuw_O;xcVmA2&~_AV3;j{<9xR)5Bp zE(}hUqnPVa(3?ajuYbRGS2fBX6s7ZIkw6FEBi)bsQ<)R+sY(F3v7M<%Dn zq(NZDb_&wkMfNnqtHIqayL1;HWPi(xx@pu|pP)MU=#{4PVczO4-Nmyb84J5`a4y@d zj^enmA>5*#FQ#r*nq60Lw zB7r`}9XK8$euAf-r#wREv)!JX%|74XqVEpwg{S|P&*{Bw9^Y*xE|CLZ3?*Ky3mTnTw05|LrC}*fAZ@0*W2}tokR~W z%^>K!ybe4VfW%TthO)33ZUv;JNNe~iiL6BZk^Fy{l%oO6KB5~I9iQ}%BxyM$Wr5@i zu({VP0NS@&$9nM6!L%K#vL7@euiAs15rD_Si@VRfbw8mClqpbpnm8!i^ZEAcV7iDZ zVO&1^SXFM!R%URVv_hG1IDS*toeCWfg?jY*=Ki}H!DbStQiUXf zHht+746XclZ$bEc^qEDJY=h^2dmEH2rB(nX4H&09p8h$1rL#et#{TpZ(8<0Z%5o=V ztKcVrL-mo|s~eDC+Y7gPa1!w%>3tZDKVNe)mK>CtO*G_==qSXQh540dOuRi24X@^J zyun!4bxVB+j#Df+Osdx~_4@Vjq2jiZuTkdfM?zj8kFLmT3c!f*GFKTUh~Qy?DGU>W z77lRnC*>I>hN&$eu=oz33X_<<1AQeQN#DHxF@wMwwGha^15oxR1U}@D1R8d?rVrFv ze6rUogD-jCEVh_S4`Hip9EIRU;>4Ar?gG&V)e{O3J@dREe?Y-|{=#BgltjiG_U_LXmVGe*I!zI*Bw|6GC%;)S8Rd_%Ie0; zSrq$WaJ;d%jh`N?+qM=~RoiC}HOk2TiIb|X>xb)X_#-8A6*{}>MpK%oRPp{yASDQz zF7oTRirA2{@O)QLAc2WR)`dD*Xg-LALlHDHW(u42!K@@KdLAwuVer@JhhsxBO}(1p z2w}w?=-4D*tWP+=W)W99NaihUP{QDz+iW}n5DBpWU91el`&k{aF!C`YPX#; zsFy01K!+pWv{0qpEDjX%5czWvNpZqmxW~;ospb{yffVfJNX#C?SR~1~+BA@Ke6N%s zXX*7%x8}Xuqt9GNC_am}7@I?C=nB}rHkHSy#39wr+6V84`+R{o`MSKNaWq{Si}ZQF zEi74?_?mJ%;KAp~*Q}QOA)c2P9QVZ{vWla2bP}BPNH@P45nm%djoB!n+kDx!Cr#SO zryN1)ulJ7x;w$Rv?|o6WwQLU452HgX7&ILm#jgH*U|2C%I+YV7st|=>xC3%7+J9J5 zcB&^r?muW3)0J9~aa$z}ksvdsKw``@S5f!+mtij)PAFJ0&5l>ErZfhtJ-lPr+fiA1 zL>CKGGLgWg5q^G4yQ}c@>$b*1gX;&cyeQSlr+EHq2>|i?YeO^I{4n|+JGkO5G|Eso zXS^|NHl3Ts`!fzdN~*Q62cmGgawV_tL4p(vcQPrq>Zg242i*bQu`{`|ZzMpyJ|q-c z@p(hF0k%UWwhv3+(}Izdw`&58-36TlpFoXkMBw8*I*kfUdq8fJM#$lcyXuw#T+>fg z!x4VcwcMIK;7F*d19NXtvl7n1Z^>bTIf*xZd$qZmUNDnxn$<#c1ms$FMbn}V&}L=E z&LnlG2&~bi{39vGq_@P;NUwYo7#%((uhc*;LOmQpn;_aGsNStt0Wn}URl#IZ8&NWO zam*zh#8&D?!w|=^<=Lz*#8QI6(P3gapN`hA|{F5=%~*lWr;Tq7gvMk+2}U`hauITLx2SaZI_&lp(j zFJ-{)=a!4Kn+kGC%58CRq^fatZPn1tNyLxeGYqr zKh_>OdoD=IXWV=YR3}-H?LJddRuZ|vioW(?oxa8o| z4jn9?McuE6gmOS1CO+NP!$+Vz*OzdJDa3VZUychQObr|_f@Gv(nl|vx%M(SY#?gkeR@Hiz8K2sWgS`3;ajYTcKitKf zv*CuXK=EBO=%rxQ48Y1)O${wuWYM%g)vR?%{-ccJ=bppOctvmKS3&{LW|-j9Y3}zE zS2Z>8pWGorQSB$_z1-?@Ejy`tvC}5ReO-n_M|_}#iPj$49kO<2pY+uIcOi0>>f{;U zhG5z@)hmO5%H%|Y(_{X4sjw-7v$$GE%j;nsU9VRV#IukG?fRto&tM{;zE=uwcVYjg z;3!xmCFgI{HrFa1c*#hJb{dro@t>SzQjYQMVxYznpadwIQ%z^;Vf0eybiT^5IRP|AgSyW zBuS18ub|4O$>KIFkh73o3ZT%#6=)}1y^RB~E}t&dc-5jyetK(S=oCnj4@ zdk_34?f|~5fvO|z?dK64@ypbD?Ek75bmB&6{;T0Iy})GUP`A8qFsm0tTt=^&)@+t33ds(Py&~R|7(8Nz*+$jl`i)mDdx6wwi_ zi#G2~tFXYaky<*3FMK8Xxw0fB3jygj{Y_*y}{wJl!$0ouRz(u zakV;SOdv4N2a{CeQMQSz>-f$-d`qtea}_>i^}UPolZzSu0#vhW)e(|mvh>Nvmhh>6 zv&(R5nF26}d+cdZAs6`_zD4i8hqNR2BaM~w(5vpdE;iEYmKLNZWM4Jzdb*n67kG1V z6J@nClWkq*$=sNmYW%2}5VG6(k2hhdKiS8L!QH2aXmwt8s?UGR^= zU5{EZ`)Hvew+SbD4Bum}XDr$$o%%)uHaxS;%|`nOL#r%XyflKT1?oCBaxW6%O+AWA zpfU?7XDRI!+*1Ez&fGA{w3)FJzt%3G<$PHzHdzLCYP4K_D!lrBDx9A0T7qAa;HFE` zL{8^{^Pc*pezD&o?90)9(KL7Dn%fIbxiFftQ8gVaSpcWD@*2_WVE< zHvD1m@3hg$hXWl)fIz~-a{M>jbbqfbkb&bPw#c~Ixe{Vn^dFg2XiRi%j|EYh;GcoZ zBTZPm(Y{&+WVM?^+j?=`^@er?x`01RnHG{fMg3HN38;%wT}|t~?Im~m zukXdD(!y|q+y9Gh3FES%V6{^37} zqH9{yo>Ymw?jg_1bG4D#Wc@vkFrvvMtT^+~Q6{+XBZBx`_EF@Xd`f(N#W z!qhF;7X#%KYy`h1UVy8iplm#9e@+}5l-XMcmZh5^)O|{&DWx9L0xi7c;yuSSJ1Y)_ zYCG)FE2zLfvDY+j4n2+&@q6|Eg2W0RGN*{ehHH4*_gKpW8!<#jA{y-J#08QQ8_V^p zoqj-di{tU~j=QkH-Yo^LLF~PCwBaYY%7HG5Zn69ZN zlk|Tda1H)mG4?Zt%UW|K*M`|bWmUV7eU=cm%AVf3A5&DrzPT*Hg<5{2E?Z$nj-LYrEj8|Y>Hs>^fef!=GE zsZUlTa0p-K%hF%rb+$FJF2$^K3%tXGHGJ)WWdT5cl8=HJe>(LueaK62S# zy)uGb_Nq*i9D--K|A-(u$^}XI=dCn_wiZ{`dbKrW{X14F=;GpM-PdtwIVxFJNO5>3L{e$PK z>L1Dh<(%75y&C&-p0W;#sP9vqbm>?n4O~XnC}t!XZY2}EAB9y}yBx^AKfMwi=%B?2 zT`ZP;N?|$i#UkDAHUn{)b;pxEOLQkD5m!!J2EM~+HoHK()UE}6NSh1)s7Ng^665)k zotukj+~(r^_IpTaDUG?gcw&aNw5xp`6U2{NC_z6bcw;C2;IAmtNgkle2k|lxS|@s1 zN-3*^$*3I05$%-{Wz~xV5@O~qV@#~-*|(Mq6zhJmw{7qG$|i^i=pPX^NpKC6?R5RK zYT%J0`PkpX?PM1XVB=&qoc&o-IaC8PPsr|xL?kS}CUMKap6Tt9$FzuPTMC@*dy3LI zY&NZlDvb+AT>Csk|6*8QkDL8##IU|lJ^^AH*Vuh!(|R<3$MFV{t>qe?j^elTrb1b` zW_!k3W=m{UTN(-Uu42!tqI58>V#@VH)zHY#Vw&pZwKC>y9VHiCWp zLDO@zFOs}#Kd8;*uTt&kH1}dh#^^I>>!KwQAHA#gcInoA8+e8JMYyl;f19`%UT3ztwZV9xBUMxb(TR4yzLL-AH{ByfFSdjKfB;a5v1 zF{!UZWv&QYv^E2uJ(5$i*CP`z4Y<6Z`NyU?<5o?E`oyM)Q2X28ZXKrh&6kT(&hyUV zuSTFX>Pw)-N&#TrtiY2!2#^odRtxxFGG=FLKT~tnh;$(CXLo8ZLDlC%i}t4#)5CHf z#W5kI|7dx@)zW@|Ad&Qf5*4Z!24fl-0c|ar1;%kbd&_bUL}AT=LZQSC)SY^ILexOYG|r~UL0Q^O0>*? z6OixoJtKhDwU=yTXIoIWglw?}wDEeZGXN8txStjPc;WwFle80t<0kO|AQvm`e<%aq z?8n~i?xmuNeH)k_BV7ipBY{AytTK5hqrB(I81^4k9?OO3eBsYfuPk#3Sjr)IVsaP# z-w$q|=egD#S`(8p1_t7h@J??NNiQpdx0*LrN)0h0{Vd0!PZj>)SkepES^&~4(N+a~ z14DIJ&qR@N(wsM!m*AyxtjJ4-EVHb!i>-7LywL%(J`4JKd8K%IOfuqUaMBv9z$%VD z&v;mTmbn4u$nRzmEG!}-4Zu&fJsNaxU^TnU0u`#K4z{OJ|6LUM@btE054nAt%3scgAP-!8zII_0ETMlFhB}wDyD1~; zDj&rwIFa}`X8z^lb0O}IB)tj6$ku}k79%E)w_wZ>rxZvJ!hprT!m%(EVA6(KEf15r zPqhQp^XuD#RD|GwsY3?``D_}b1CbwjtG#-kga%x{r9c!dRG4k=EP+QY&B4zZSv^3I zZ;c6a^po6p3bna(Q$Kh=(Mbroe1}?#;=FxVfRagz_3ghUY^$Dpu8k>X`K??2cU#&g zi%#oqHSvnc?1~Uu*TSU{I|KsrOJA9Mtx2U`R@T3{Ir42$t zlfXQ$T~TNfyNEpx2ZoNZqAn6qojK zTlFzAKl_S_?2e4Md&O3gzcL5_zSbQ6@sy>Uk+KTBH`$ia6yrjLMA0}Ts|C*vJX@dh zmgmX`C2s&{n`*!jwsA^+?Me$5&Rzzd4&=kA)%EueD%dySW$HnG-*}Dc;S+?Z7xtan z%Au&gqxLgq8&-6R@Atw6ruD*e4+V9Y_f!|CjH?-6%ZUJEJdJH7glu1O`|Th{ovYWypYy5Qk%Iws(?cnbK4qW zp)m-4522@zJffT*^GH=k7?Oueip`f*)SJa($CAySx$BjH{2|a9a;V>3LcI8xVZOK= zekEG})A+h{X+C_6{i(c|3^i&HWyv@{p|c1N5lk^Z(xk)9_}JM5&n?WV9h26qQ*C^M zk>vTOzUzIM!KVwaY#AGL4mFs(OZ11WBp+-L9{au-j#PVt2FJc#$+6)o$6}l+A6ho> z(sSo6|Eb8N(<-Wna-gcKFyT#n>{ois08oc8TGBf}p@+}M$c3xR#ucuLF0$oW9Ld*= zzx7JlaqNli5b;c@u$r~#DH)E6C&9;{?5Cb4n=;8cy2)=+uwMxx!LD@5hMz)BH{)7w z8yLC$Ryjht_{)!dzfEu=vqg+D`-CEC>d~iC@uf8NYWO?4b@Vd_~qZ%aDSdNK97>%gGpPP`c3=+0y8^PHg`sM0zqU zu!_Qie9)veZ)>9^HA$)Cl3iqFt63DyohNt-9B!b7qfos#w}aG+>CTO4Gq|MnW^FDc zmr8a(R#amEwDOzBK#9V*)C!DuUD@fCf0F-JM|@nwJkN;wTbpZEOpd0mFX;i0$BQj<0`k5RPB zaaI0KzgQ_4+9mh~B{btXyMe{nWc$6+*Egd)8!R#rSJX{d>wl9i`i8Pe?|PPxCv73z zvIxm1t(xgkEsvc`IvIunRo%3XRQUosTf%v$r*eppx#xpI2)s*4C)Pg_OnU_ioaqc}%E4L>J-5zSE zaPB(PHd=5ZNL%sUH57yU?m>#Lm$yy%oBh~}oXB17)?x*iZs5)+0vj$T3xZX7hAHqS zR{3PUN3n4>M&%7F!mf6D!}#*5|4>xel*d%OLH&1Q{)j%-y{R9g$<;}wu=8Du-(vd1 zu>{FuT{uVguzItGt9LwIpi_O2X?KIpepURds`LX-_nn14!z8w4N2Y7%om=W$un zM=q72w0ep2u|a;GbCPIKn8YI6q0v~7jXM%@i9F>ymF86;khK~YD_!sauPwQ?$*l9s zos2|&fqwg-!;V0DSist6-4e)|c?Thd#atxdW={EiH`!Yb-(=-C-}n;V1}ocR~j}(JjT1PpVa|e z?j26#GQ*`2d79yZZSYAqx83cRCXgpvwCnkuj_LF(y@o>vd7!>;+r{{+_am^VK^z2x z7T@~%>2k;%dc4q2^b87)%F7&6He5EAh?~sw>azd{Vg1uML)P`5K@UR8y!}9K9ms8V znkER46I`tc24&k0rTDmhfj<*N+>Hb-f!YHwy+K;YDW|yn+ss>F_EbUx1jzy; zj$@a%NBsm@H3Y#sp@>o3;>v+`Z~aNlmj9JFxL4gWPQJg*Cmm=upT!OQ-#!i4sRe@N z2HJc)9^z^?I^xy?*^vb{&t6V$fhAgMkC!?%f6DHw2`Rxq!;^9>in8nf%iM*r1LaZm ze%Pe=V+v5a;Cf{MRlD-*vaxOg2*FFow@|@I zX+%AO{*8mbvy?OZ_xHHL4ZMdK|0G@*3J%dV(K>K#szegr^h_-w2d2o-m~X*bK)|la zh#N44O<1I8k8_(_u1JXCc-3RCJ4kA4)w7g?bWE<>&l`?2?l|!3?CfP+2);iesrPGnf(bnUm?S!aZ6tz1b~oon z%UKvVILRu5eG(ZHcmBxo6|-`wQ?ls*6$?mF_il9JU!~n|y~x0OauC+WfmjS;tW>=X z&M`_=eMB}_a-FFmxk8+jiC97!jN7GkE=OT*C?ZjLP_z_c2UcD6*g|OmYXuEln4sD6 zBBLcE;LHlS?29f3uun_1g^EA2Ym3n8mUpriIZmb~ypl(S4C+8(D~Lk3doZk4AwAk} z4C>WTZ@f4HsvqrGeZr9&JsoeRT)vH@k0!iIFO@g*@{WBJP$Sr!c;M~)L==`9iR0v| z$ZOESu0RA$x-3V-*pL24?3z7E;P(qM+9$1;vlaQ#z~@}@L#xmrq_st+uYp|-D9xrZ zjx|YW0HId^F$op9*Qr5*#U)$b~&Z9hmpX?RY~xnhvl~ z9-XQgCHl`y#t)@mjU9Kao3Dg*q4?eY;Rk91?BYF?>pr&*t#}XH*>UPyAD%=DQ)U0| zG1yan`sSA>u-3Wps+y*5a0&ujW0D;EH1$rWng6|`hP&dMMqjf~qxcqGE+-EwK zV$b(CXtTohSOt#w;=CusAYxfzShu|KZ)p9@<aw0H8tORNG0Ac#u09yFu*pB>_Fj$5_Ki%WsZY`wsn60`oc~k&mmU8KGy z)qtO7bw|_PgCf*`QO;3{l*h{>1t5@ zDC7&cs`UU`*amIx6`BTOA zt_d-e&~4A5b84Ow2OT!F?KNrgM+u6&CL%0QmAvgg=w51U2aUkiLvexiv20)MY@l%u{ocb$%%F14)z8HN=16yQ7dCArc=$z zPtU1rI4F$Zt+$mWV*ZP4#?VD%(aBlW`(1E!mu07QbMgymF-)J=RD|JmIbJS_EGhI| zn57{M-PHokK2UQ8PYLU}6R75t*Ed_M2r zD9)|0%{0c7k_bFV|nf-jf0wz`M+KYj0e(*Xi%1P7_>aZR}jHE@tnDG_!gVDu|Uy*Eq$fI z1S10G8h5@?sw{cYh17M;oy0nPZqyABe*7gOzG!^+*=pcWi-I)|%d`c5; z#9prX6CL(xU-Nt% z77#V~)&vobYhjS4j+Pu1=Sf>foR54W%(4=NSW9=KlKVMCT~KEQAe2wMnM3-sCpbW) zHz?TGDss%DUDa*zPWnI<)BLSBDYP1WLb^1Y6Vs_(Y=RX^`ex-1p%e_ybAy3yGAV2? zD}?0dkR{4U3?Ur)K*!HVX(qLhXFb{e#P*ey^nlVABhg`&i37>gc`v%(DgA96WNY@$ zx|a6@p1Ba0B5!rddHm2)*f^hnQPPk5g<>jQic?f*!PiLa4ywn_0=4IWZzUTG>7^6{ z-f04Mp#HC8+LjX^Uz;0&*yATFv1zX;z&{?6+fIk)U>BgJ7|#OxCLqb@Az_cl($YxN z$V@DB>FQL?YrEA*cW(@=8}H6^Nn)4CR}ULhK@RDq{yxsNzOiZ`3en^$tVRn%K$SM5 zDWVgXm|%eS9YWp2_O?3U)alkGD6{1qFu0#zxrdmh36OOjV-qN=8@bC21yc!*o2JBs z(6<2|^MHaVawCzS8-MrVa?B{NSxvWV-vhcdrz^0I>pxm>C-X1jYVK~QD43)Mm}ne= z(qt~Qf3V2a2C@f{4H(t&|H8g-B?wMs?ClXG(c~*DXS-FnPV%V^VD5)oYs(9-RG0mp zgvjh8oAFfV{e={#9kv0Xtej{2`y6sUju|xCiS&X$^`O`!?;IZ396iN@xJLnA@i+$W zv|ramgfOez&;Z-G;)1BUwlO2C>es?Z~6aXjTY5- z>*cksk}i(ZNkrwB1$4J0EQu%}E@wec9wKSjq2ymeh(tOtuYY*W!g3XsZlV{Zb|zB` zysRpuUdKbww2!Srn4zjmzgZAm=?4m^N#N{Jo!H(5GXsfI+RZsUjD0jA_ws>F{Zq_a z97=@Q5b9DPlB1~I6&6hY93z)v5%)B-t__as;L`vAURznRivH|^TMUbDYlD~VAjPl8 z?fsz7B5tcr%Gr;6$DaKdM!9{8Nja!9>4%vlPw2cpte(HWf|~4LCsSwifiE-DY4Pna zx4Rv-521?LF-&#Zan>5vpOy|p{d3amtK?{1f3SbrZJi;Y2HGGv{19lZk*#5o&%THu z$du#SQX%pAvnYPv72PeRLWsLMjmXFCjcJmi&Bc^AEf9qJ*R9PZqIaoCWi=&)jl`$d z*g)eVP&yqyUKkIlPmJ@8n-Cl*2LLy(R$oPN+ytp>MVJ4SmPgsEvT=ro_5L*qc4U+6 z)qejZ_W`f4LiHW4ckFI?`-+I(o3lP3;WOqkR{cwFX%Sv<&#RB-S+=Zk@;!lj;my~I zXMgF~)b7H9dJ&@u{gB;yjF&jn270FT^{PkGm1MLWG!`iNf4*k$F+ala`B{?fl>z~1 zl=rfhg&%_*{}oPu1DPGMYB=@1)yDNYv#ER3ypRrzMEkT9D} zYtEzd1XqUJ-F}WaRnw1F@A0WSxixE!Xuh3w9_E`XL2PxG*53%3^hxV`VM-_yn}m7A z77NqlPX_k7=}&AG?sJ5tw0)Z&Fc% zEA|b_-bwnZ5+o|&TnIl&+Jn5ue%t5`{mA(qNa125$y8mK|Y=0gK5A4MhZ#r2I{5G(l9qok#S@O%k(`?;i}S# zQBe99<>#W4=mekWHH~T?PE!kc#dShHX8Xbw$8$spp0nFR_Hc6c08?8Q zppU0n-(`sZk45L$_C>OE&sO1(6T;st9UzqFF=6y!>p|IUtngVEfo;2Kv14+dbXOiks2|k0|{Fn5T(yQX>i5rCWv*anKn_k{2Ow)qGI?%G`$>GQ0Rl2{A z{D4qU>C)W$$!W7>sE@q!v>ZDxy<>l+O#KNx} zWJ8U{9@H3wsj#rQ{mvV#q^p>UU0U2g2yi<7m@b$1KEQP@B&f8@LZO7URqSI(C~d(5 zqTO{KoPIYY{=RG8)v+7<5htfZckavX>z$t;Ae;y`9At^l2au2m=}<2N zeehbS^3eCri}ThO({W;*A9m=j!wkEvaRo2n``7At&p374Q7^Tc1pC^ZtB39SXf{1p z3(!!QrAY;{yQsaqbrrafk}vF0!>v?0Ww+7PoM;S|0kt-zhAKSi4S-oingjRdl#V{$ zz4~xZ6lTv`hE0J(o=n0%T6$pZ5;g~!>^=+pHZ-LgIY0Ezx?!5PZu@M<%wVzNzdFAT zDZ(!{Jkn#ePqh{0j=iZUo^mU?(yQ-jO8qqDuJr2q*&v4kMj)y~#sIi(q!379wzj?lEysj6`N7 zS_J}GMK4c4zah~9f?NBFUhq%f?=S!<*pBS*tN8g{NiPgj{ILw)t{+@JDt^CXW%_Hl zrxskOUUm4d_t6}`l2-hm53?`*MVm@PKTQ36^7Z))aL|cwtNT6RcH=-ehs#7xzCXPR z{I3-P`gizLv%Ej^yA?Vxbm%>^OljriDB)GfsdfNTf6foe>;g{8xmh!<6YDRhTB;lO zb-aN&zIQX6eXtzguh+bpRz5DNma~)? z1OO=hADNoox`c-u#Imc@fB(cP7Wn)PW&p9SSUr2MYd}bScdvlO$G^JBkUq%_MmT`J z)hRr)F^uj1Sw(^0VlAUIP)#cqGvS4Xy)wZX_WKM(ikhz9FybJk9*zK zdct@i$k`IOqkS=Xc_Dda+Fb_@I2)#gPiHW*N6fpf+2;KEA=fa%5J)! z2ex;21F09o>pek!_m8F@cnjG0jT)DlE{XCkUL?_m^xREccTevt)Nf`g+VV+KjvK)?XI?fjfS z1n=ozStsKxvM42wc{yrFL)?DkhB-Y*_GzrAFH>5TW(DQ29i=LRvg6X>Tc2=JPHk%l zFJsS)R0@Nr>T!WVJ23I?SMSU+M)!+}4f)2-sddvA=ayjuJzKS23N}HxQ zd9}i>@up-W9@2s39!YYMn|h=rHZBj(1e3GW-OS|0MDl5$$rJvAM0{>rQ!YM=XIyA? z3FXXU6AQP6O6>0O>lFXclVOQwK*&dSDt|IjkyEaKoI_-qkn2@a%T3SQ7}XDyGb-(` zN8)YyzH}rnA89LQtDK$1?1q~%N%008SffcX?%wLNX+9>Z=p#@1JX8+37Ju3LL$h|b zEiB%qYA=x zKlGgKvsv*au>tui_x{7ATCv}_!xWuJn0`(;w=c(%Y1MvCKsYR`vFm zPyi~-fZ-AxQkZekS_Qp{WVd}QpX^T@HJC7uWUZAgTj$c&>~zFs-IcYvM0lgBm`}RR z>gFPL*uf~<-FF!(8#;2|s;S%(ey5|4nMb{U; zwwC2ME)L1H;v;SXieaBJf@_o` z5pN8i2ugAqLzUC`Qf^SE(KpWNOg1J3l>c#kKdDaSBFb8qAns+eH6d;)tISWyXWm#& z>~3;ddeB%_YMYXsTTixQIau8wt+~O(T&$c* zT{SW!C-Z{{+408iVR)0Rij$jujT>vV7zfv|q95(Rl=IiL0x2xAEye+J(6(8>*Ed#j zk@~ar- z*|hs2s8QLCrJUbaQf%)jn!Xh>&3E)TmWNT4{Knz&qekq1gB+6+E{hDNi$iAytSm%7 z5i%_Axc#M`BxJAIc*~V;ow$;eK78rw6;8HIrO$8CO=SKQDFfN==Dz!sv0Q}zzU#iA z$S2yk@;{!>d7xB`oFt$4T~O!*7tB>8@?4+BTleNmJ1D?wO!vO3Nc|@1aTndvDgINun_3DSVSA)I;}d0I+ie3o0^=jems5>5OH564@}s z#T;Itl4<^$Yg30iRh4doyJvzGn%!W9wU)-Q01{k!A5Cplk2G;VT|9bk(9&YsY>LQG zX4y0Gcyj21ywj>c>RCH*Xxa^mZeI~gSd}vJ;cK8{?$=KQ$CB)e2e?C!Od@V54=1yve}XT z^IGHr7OVLuiITh~{{=-h2y1xywgg(Tu29U{^Jp?DSFo(26_UQk{42O$(OpYvx&QqD z7JP;gR(LAnRqS2>%Tm++xg2s+u>H}*#TWCC<5;@u7;}I72|dtN$`uKq+Zd)zn5{0z z&d^K4?09Loi;pV1a!p%C6PJ00%1ZZr|BL+U>FaPiQp#e4fhgRUrh_e9tmG~|3h2m3 z@7s)?i;!v|udm_wR3uml&`++atnn=O7(~G@NN@J*v%)yhK{!a@$4V=5Wrw(#ZjOKQ z-M;ml-n4-g!dL+F?5gXe;;*`4*J~>z_Gvn31#PGeJ)rF=ZrGwjdAmZtq7waW{4&zQ zz&E3{bH07w+U(^oQp=9r|f7azGD7xB>$@D>gJPEm;KHC_H^d--v`I`P-{QRIQrYSLAX@Z3h;EB zs0gSCfe0vl#z<+BZxyMshv!=se7po?OOP2HVciSv#_8g^dUMsruH}=9KlJ8mP7Q9m zzmj?H;E3GxOcva9zHcml^kcZQ>#@T#UQo%qug6wK=#Hokv0oVjdQC0Wpa z$dZLj)=OO67ZwciUCnP~PM@!!jKv(Om+V0qv_+-dyV-f7y{<`TP5EPowh5Yyn~V+{ z$#Nt_{R*OH&phmm%#CS@W~BR zN)R;(s;slIKrfr5V3Xc+YVyz@!bqmcrG5MIb1_`=QAvL;JU*6_1>we(H{WoHJscBfJ^ik6g1Jv_Pu^j1`kWJe)SacG8z!7!R>NT@ zn$D(jd+$8c7=F)_UJ|;4u=NeMh{o6f;lOLL{!|%7tyYxK0XJEht|P;$4PsJbE(C3@ zJgQTvnVCLn6R)~*^xwT&E#l>3WD{V?36 zO0VQ&8V$O2Q2Dim&Pi96X*rpw@T+lOp>T0pPyiu$IM<^c&OufZo;W?4!-0vEWA{qY zK3FeZ-$xuUUZLV0oaD_T^Ef9zyrz#-S?iGV%+~3bv?=b0;dboW+a+&fpKYBY+_~%H zYz)39j1u*?uPpID-blm3OWo-sJBVsk_>lN{;9p#g^l>m;4Lz(O^+VQI5!dHHA8evy zWKK%=)^?%(#X%GQHox3BnY0g!i~&MbI%J(c&37%siX?9m(`JO0$Q_(b&XvwX9P`E9 zDA%Kc7EGveS9ZFw7$!qNU)>}u^x?^pIyWKM;Rj3Ff8^SGh1TBT<6@Xuv^i!IQ|nxC zg|G$4OLAqoyxq_zVZfArvMoSVn%PcEC{yig-TqzPF!A z_)m#fzFE8O&0lRiJ5N$ePy8o?q+ji$>L)q*t~mA~C{TeFXN}I%4|9Ubl;42*Ak&9W z=~K|?udyZxapAj*;h=QHOAC_EsrxkMJec}ql*pG@>xq%B!vcApK8&A_w47!*9i{io z#QF_^=Omn%*3IuSm<&|Kj7W-FHqi#AZ%z4z+GZFeVM<@9DLuvWC^gSUIPn_>s(|(qD86!X^&x!LU zl=*7_Nz!FJ|IfIUn3QlbMQQY|KGK1Nf}y&!2|BuKt6b^pRcUwflrJ!?N0dtRVGQ-v zKzVULf)@aNV5^3GL@tJfS{@~z@L=zIwe;)(yXDODwtq(kd!qNWc+jRNgGym90e9LV z!3YnxvRJG%<=P_?LJZEi$-Dm&U?(c^zv8y6R+HGWkMP!&ob992@YlJ_eZ&es=PPDD zFx|bkin3JR3Z+4KKipq6h5F%WgsJ%48u7Q&p`DsTzgt_~ZTVWowR#@4Yom>zPR zohrx=G(R&7L5!M9J2a1}oc_L}{k2zkg?x(GT!A@S-p-dUu{<%i+HA_}6bpj?*xU4h zfJ5|<=m+j*#nPJ-&%1fJb(P#-)m9>;0R`y|Xe3aaI-~jD;aC~@oMMu^gPs?ol!{?B zhb4IX-;n7b5;ob_@Lz8Tx#C0fjZZvq9Qy&?9|hN?B*N{Ha2fBl0BXDdA{qT zGzg`(a7$x?Wo~#Mw1bP%#ZbPfNIpY+TlYggO9lst{Kv8SCqP!;#yhe}{vpyp@fW)% zhjwP=+EknrUolpxVUb5K!+`wS_j03|PzhHxfijm^KUEQ%=3ClQG1Pe*pMh9OPqQvA z#il6_&V&mR< z0PoNjF9gX)mL@c87|p5vKs0a4MKD0K!nN4<{Ond zNSv~D|7pc_==#a`o+^-Lqxh;mbj{@&|BtAap7O%faw>)P`t^cB(C|!zQ=&%V^wc5b z;1CXOD7w4YHByt{zz#d$Y6aXi?n>bA>xB(EVgiq$K%2gkzgwBF?RY$Eo_d_Q_CUWp z(OTI4*tP2YIruv)gGS`awC9sgzRnU5n{~LWE!c%=@|y6AyoH9Ty@kpHxI^4zm+bhg zsa?E2&%bL($36!r6vOXIR~I6hqe7?h9&8tOw-37A3{G;W+%5RQUDrx-jfQ4I^boe- zzproDa^8)z*RCWUgT*weppCq<^SMS8d*h8&GZFSNTb&L`Loh!A2x&koHbiU4wInHY z*L7Hq?Q?ekbjZ@+$6uz%IS*=xhWs2i8F7~CxqgE?62$N9Q^4+--vx)-^9{n9;60Ct z@I@fqEgjo}=2pXWbcE*aY=t@p_Ha5RUz#+IGPGok!hyrV8>!L14Hon{sHY-IWj!Zk-4x8Uu!Ao_=rvNRD{3MYDYcWn_O|7#B2A7!&>Z zvxN}5nDwUQiZeiU|)niMo0;U-MBkrQ2{k)jF{IcXIngg3Ih_8KLGBBV=bl9bkV4LFcZ(Ex21o;Q4eLeYTkkPQ_l4=}QSh3bhno9(%+&RD{HuUCZ zpDWr?*(0Q!^zi~&@;9|CbOmntL1gAJSrbOzYfgG!wuLW#x!k_FBkFm)BYt{`O1&rn zaPk2AhDg1~8`H$+7Q6F&FUaG0hx7cXrxX^K-9K_;k_N9Dt}(3HQt|Gz>Fd4e*4!(V z=2ij0GCsMeLo(8ifob(43sVken%0n4*5P&VUoZWIIVee^?Vsw~VN3ERwRQ7;XN*B0 zmkgD2sxE*slRHyXIfQR}P0yWWhop6@C~D|5w8&FrbG2vj;{@-vk!E}~_uLe!f`^{K z0yp$X-ci!mz(4`JuKVgEwtK;x?^QRqFjUMY7H)q_A2#T8pi^iHTpqrjYrVcT7pgK| zvH4ufw2I4IfPc;rC1)pJ-3zk}W;q|^q|Loj!N$+loq|1*RUJP9 zJS<4J&+JH|NUGmId{rc|&D^ARWOy>Z1Z^Ik!2>~q)<^ECtPT(Y0>ZtLMO$V^QZM+2JZS_^ zi*qBv8Q3e0v(Xe@SY00U_%RYwh!%QMV6?lbsR1G0%R(V*yPz?8+&(g=+(KdXvt>iA zg)qV5w}>Lx+;wnBA-$F$8#jq54SW?iWh@P%fIkqGh|^d*rGOvi;dkLPr(qFJZ!@>B z=Mz|byBcZ3zbORBhvs;&E;Do#nAMZaAG+sadYgU8r<1v^j1E?XwESrR)?r`FqeUS@ z!nA&sIC*oYFuX;wX6nl53=Z^oWnAqM8o(Lr`eWkW%-qa5coaV;`q{6mU6 zY;a=FTV?;fm+O|xKZ7;F>o&|1DfcWLqzryO%LD%Befsn+X!Ule-N@|`r{i0ybenp< zf7|DdQB3>OLgp^|Lx7|E8t1O)ae%)cZb96e7Hv*&H~A=J1;0q)=a{sa6HTPFeT26o6WVUQDGM)wMdQjp%_2^yY2T`n<^nlJXr9Xuov~_W9RIoZh z)$8kW1)*VXuO;~tVe5}?&1Zz*p$+r8%2z_qPvp}+bMD<(1<3RHK959pTHd>oMui51 z(~wyIVvD=^;nBCak=;9u26^-Z__K-8!J9NXoSJr^yU;LG=}wVfk$?4`S%-Al5KSL|589e^?`P9_xHI+^(JN7W!b-cmb+y+x z`4lsdjWGp#6FvNJV&xYeB;JnjuD{Zpd^>RCNr6t+qL;cC-`7S31NAyAuH%CU`H4n) zPSh|(E2g^mJ(JXLIFMbJhD4iQE@S7DD4;{7uU%PIwm;erEj_^ce#N(`{(327;(6xz z#|zZQI*S+~G!;IEE^A;+qP8W?dvc5mI-SO*jR2U-i@JX}0L?7hK2M)up3va0T7*4> zWold%Yg@Q^xbj%Qa%5twPt)#FX!O=)!nRh8yN*pfZ2imT1i#2bPmS5PvKkSy_hb_i z=ZzorI3|O7NRGVq4E9j_*{60OOwJf%e7p-#IZ*Y&HxS3soG;2)*Vkf%y=W2442^wD zSNpWwYVnh?@mk$4X1mQM5gbE%Yo(FXbm9y+BqK zb<|UcgSG}5jqUnBgN)cT585PA9F?T6+uy_OGjQTcWqz6yYA08GmIY57tOzjMXV`z0 z%*TC*t8VtVl;@BdxTg)z;gEd@B`I_$mz-Uqk*Q{tSSkJ_Q>n9{m53$>z&q(4P0tjMuN(<^i@o@Xk^;k&o0O zjJ3tBKe6MFzy-Xm^Op~o*Zd{R6HHy06hXa?O;t!ccyXGqenTf${0M8wNPBWvYJcm2 z(=!QpGGrCldn?O4q~>OQP7mE`@0K|(_emzxSYJn%5&y~iUF0VUBRhoQZ9{D$guaop zPA0++wN#xEBR6Jx**e$f<2P&3mho0j2zSP6YpfQ8_=x0o(9*ZtS-2qjQRJsJs}$(v z+)q3RJeR#l!OO;2`l8nhhTF9fUkV(w9;iPGcz6D;GraxT_(1UM1z;{XyPpR)^>8#p_zwE|+m(Tz&8s#6&T7b4HYx}kDunX) z!1kzf4U~_~?>467;(~I0(70xm_McR^(fnJtH_2|;?5GUJ zP@@So+oTrZNJSppY`DvPHg+l^@ur~M9tet@(zo|3i;levlHWJW{Fn5)VzFxD>RQO z3)eW}k!OkL21SprNg?cJVy9uFxRhghza=c_5T=xmv;Uk)LwRN&)Z9cwSol*I8^+p4*P-(5Lxv_BB zCF-;=c9U)uG{Wk!gJ&h^yM7qebn*tjh(~(io zb1|x?`bVvB;1{V)$D0G$p6dF|#gqXa{KKS`a7AN2o{{Rv25V^r|a0#WG z!3?dcT-yK=5?<;9`ygm(OJjC{rGWwOq}U%rt2nVx~99E z(@ghFGu_Q;#+c@GcRStFvBQ||{@wTY-~Dxu$31vFKJU*fp09fvP9_X=L~t)R8_7#U zCkr6LIe?#HM`SzeAY^P*M*eDav_iEr4n^i#}i{ zR#a8ne}M(6D?Cm-C`1!jj-tcj-X-8JVKC=5u+k_MIYggd zBR#eRzwrF4+b4D>#oqG9;xks4L3jS34}6s0M}LRfT|aj}MDR_wdc5IH`c`_vA^z3p z&5&**9sLS&LibndfV-_Yn?qI!yRXK) zr!YbjtfB**cIYcqUN4wO01de@|Ug!;WE;X1brQakBoAZ#Cn`L|bnUS4B%9WyKU>n@(1HvfL#=9Gx zQ2_EO>76n7D>dn1hfVfz*g^bP0b)Gx95jDXxtL=YO~WM$?8#7LGJz(NjkF&k)2c6W^& zsbE$3RZw-~2V=6x(&p-CF@%Gw&>XVEUjx#@q0YfQf(qTWEZ(zqg#O z#rtQ-U$aTR;f%=n)RWL38(*bj|BUua$b`868(*J(lWiWDp+TYE(WvYX&dotz4yc48 zCRI%0$2S&StUlb9^fdAq2=6-DOK#2JqFOI(_|1DrN3JxN2rgal*W3+GwEQXAOg`@u zm>{lZ35aBo??qfHhFn634GFP%zW4|UnYPr!Q%kQHR6bi&Qc~e^eU^Q0y41u-p${~A zajgh1hkVfhafeh=(#+9=1E;>zmkUzkz*7dGjzx24J7F+w=Qim{bZWWQ0+ZEdD4~nqiv>3xZi@sjXMSYIPqd$i12S>KF9+lpl%3G622q-=y;LX-bipGb3ojMl zp`Lx|$PoZ-6}#b)0gGMbbC~L9=69SAL0Ezo~HT{+S2Rh~`9t zG?^he#xOHB_e3w1GAS@qrS4Mns(oT(6&B0U*nCELwPDj@45i}w3so(G&Ds*(()V#m zwXOo(v~uP4G}Hn=dvt{+-onhTHD3d@mU@I@-)uF{Qu4-#c6B$W6pgp#9Cxh1l217M zT2uBdl?Y8JYakQVS2rGIqnhfF`8&8d)nGP*dqi+_=nbyND)GsCT$p{_;x%FF#O^d< zza;Tq3*CF#^s1~>RJAjTScQxO`u3xbfJC33O>m)CKA0Ume~7;G*N=N#rm2&ayXPA3 z`CwuRsFGAS!|$~3PlC3b0>t3CKB?6jn~AVVgCRi^UFYi9AHGfkK|=eg%_g0~&DG%t zz-(tBBj+x+pBa@O{Uu4M`q4{u97B&AkM96BLK5U)Fx&780|fLdJq|!$V$s(?a@LbK4l7rqz(n#tEcn`%%;}SNzD-12GhdfnIYFV4z zcehRwfTytdxp{$bkF#}LJmzx9$EQaKf65Kc+FnS7gA~O&LSDUKPV>}MxbWZ&cPPw? z_$ta-;O8i*tAySp^QGID3bAezIBvB+tvtq3!c8V)E*|#v2MB7@+UMPcqTou|{GUQb zJ`Vp$sZ(#Eac8S7lYjvhc5=+ivL=NZx-#CRL((BR?i5- zO(rIZPaDfeXy~@2zvLsyiJylk(|DjBs073yFS0rDv9U$mig8{%+kO}MQchsy|gguFr$WWj6Bs+pvg5)LUOsm+P3 zRFMIN2Fr(c~@W-x8bq4}&!HZZnP_@>KC8s=?{3wpV%r?H{$yqor zgJt1m-Zeb#&)Bz%Uy|*1P#78{?&`a3nLH5DFQj7|b`+kGDmPFh-Osc_%}#Ryh{Q-f zfcK*D!Q6Fg!&CTFdF+Ve>kIQUzp<)~*%8M&7Xosg*WeYb!G8=%uo#KstxQ~`W_ptr zrpI3PS!6?w)wt|{0CJ@~^sU_L2ap9(r3Gj(V317=<3xZ40E`J!t|X_x?@$vp#!lHZ z_p(B*5G7&4_1PHw^4Bv4FW2myVQleVCp>McxpYjvYa_1ctQ!C?sWG$RQm~cn;VUNS zz44wcywsz+D){ALM6!H7h*ln@?fr&&a)8V?OSxH5AJb-s)AZ6SAlhpo zqF7y;Vm=c}DBk%f|qwOrF$esP}4?igCVfgYxYTp?0IQ-G=GynD$wyZY1>1 zd<(LE`ataSp>I#InWmme)ilsc6+xn{4rhZb;x3+~==Rt9E+)c)a>(qv9Orv;S-+U^2QbZP_y~@q-`+a~$qx1rmZSO9SEF8%pRm=l)SbGf5(mB3!uobRM=C;_iX|s6~?kx z4obtoF7m3Sh97XqK89aA=G^Ada8F|uNozHF_6aED1u8i0Ux~bWVjS_ovr1;P8iT^m z5*thGD~9jOu0+NTING|^NIUVf%S&K&Cz=bT+`~IyzVd~Fh4}~)`*=cS&# zGSsoQQOwRCM!c~R>)czi$awm-rb2YF`8x}9oF*|8Aa

scyp|n=k~jz_Az^ zG6BPb=rHUz0^{W#c=?atN8ht+1V=I(28=1Tz{ef|ucUDJWvT>V?w6&8PnultiJKZ7 z7-^uxuY3%gGb%C4>?;6sHsZ-zFiM{7njJtG=kciU`Kc0j_aVi7}W>Xt-AHO34270bK=$kKg<;V0|TVyLF23NTtb zClfJqGKA=6rz3J=f{0^Iat5>|z?%(xGN8@iHiO+P3~WnroR@)ciLYD&&LypN4s$$* zIWGg^oR{lmV4gM8IV=I{Lerf5%}2{TnweMqh&HEL&swbxrv4_L!{A17Y#7wrYbXpVe`L^F6E$HNg4~88BycoFkCY)hRR@jt zC?v^!>G~8OGzxx!BVndKGDUhp?K2uaW9V=mFbck*qv1jKl@J?>s!R()M$4e^906s( zSj4D(gjPD!&Ui(PL9pH%ISmekSOSpSm4gwg(TJya?u5(`gg3>*y<83dT0H`4VuX=! z*3MRLO7(lf_k@f(*u#puLfxM!&lUQPE#@8O_oGeRm&kSRvMRG$Q0jTJ); zt}wKvVt68ziyep9-VEBGIG|`vf`6F~_PHejME9pT#gr|D%Nqsg9769~=d@B3&#yy8 zUo+;tyaLO9un~E)Dly~P#hCugA~de)LHD+q=-e_LU0Y{h-7j`x-OqMl%@4O=>33IS z##8e!@A*DVdtwec)=$K;*Vf?aKfQ=`KiPtfKi`h${`v}5|8S#_Sx+y(`k!va_Fq4R z?)6hKXV+q^{r+Zb`{gcd`pFI~eVOXpF%P{PrlDXgHT%p%4rQQ z=qW})XE8D=vk^*T>KW_>AKJ$=#Y!OUIT;*R(*BU?Rf2+jMVNWZ!{i}Cf+7QHEv4}a z4-kew0|LDV!T-+e2s&eP^ms#~FTH1`_Wi803c<1~|)UNA5 z?fQ1qZ|p?FrYUbJkRh}P|sP`080Rcl&Mx1mGiVV9+Gb2nPIO-B8OiD=n6 z4IMkE-*?VJ%a$2v+B`+L?K@_oefw+?-}S^ibUisoxEwF#>)o~RQGD;y^D*g}#pu~Z zc`4le)Lb-dn1Z(LGtjwnt|-^GZI-Byuh+V5Iy!gEBB6AWj_uRGRir#!J7)^%eqxr8 z_HEN1rL}FHDn!aBm3zDl`$d_Z)2N*+Q_%h7RP;PGjqYc<5cach{N!h6Ve0d9Fy*<~ zLZ-hs?~%-VZ3$++yx^bGILt1GXS_6Dh?JlGoIdN7g%4#hg%?r$!big4*{}9t&UcoG zFuQZVyHvzae{q3uCI7USsIJ$R3Yqi0Fg9M&=lZ35BA(jVOMTG$D#epKmG9}L0pU8C z4|>ke)?>~uHlptjPh!@O*JHttH{z9#e}=yAuEi8uE4CFf!E-sdI}l@AVZJXYoP-?WN0U{fcUggJ*>jO)t+x`IB^x z+tDug%k#Ij3O;z|b!VWQHMSWX&)7-({2k4LPK3eaw9Wqvaz8E%q%%-Hn2v>Aj?doS z^o>9|`=xkE)BM}yn?P|XPBQQ*+Dkk3&Zsud0M;RmCH)oI&!zV0pZ-*-!;VkNuHmIfLc=HFnnKW&u{4s2?rc7;GK@ z%9*pAMFPy(m3YkmH<3W_!SeqkST1R-OJ!Idg{htYiiX9pisr}~njh;KY#$`+>i#Xx zawF~E+13zqlrvX31Lu;FPhKB*-}3I!_XSuk(XjlVfaOPy9uT1TV8ERH5;cny9t@T< zIQ}?T&IUeNyZk=}KK~=%CbBDc4+59>&Aa2l;HMfALBmm;^wuxf}{M*{eGOI`(d!0fpXR=zk2%|&VGFiXYZcIy=xC} zk8X`^XQH1v=!;+D@2LU!GAvUSvkLfNH`UpX z``6{V+BD=Bx+)zE4oJ@E;lv z_#cNGr-AqXfWJBn_*4^&ejfYp{0ew)Kkzx#_nRN%LPZ8Xix0!zLJPIyDLgoG4E?8R zERKDEs|Vl1fx~BT;KF?zJl&7e=Z@ndEqM2T^(^-3gK=1?#GQ>lq_$kam6K=1zlGu)chWkoN#w$DYujwwR3oWb&(%}oL&wWC)O4*Pe;!76;VLX~JbuHl`r5)&@g&4m7Rlh^k8xVR^k> zq_G=WlK>S-bd3dyG9$v68@AK{ePa?V?dgc`NJnI`9*PPR)Rl3j&r;a&?q19+5?6il=hqDoZU; zmRYHs8KHTxkQc`xqR>S7^$5z=AtZ;&v5?;{M+46yjnHmO$TFkUro)bcbhMkI5Rs*Y zYjG^Xa}qzq}*_(RG7zRCH|(0t#Z_ny-O9)(wZ_f&hgVPKW#8-9Rt=T^)hH zDZ+3eYU{7o$K8sf31FaSx#p>}7T{!*`8-cg=D!gD;pgJWS z`qU6aCq+S(qC-TQ5h2b51k(Nc6vV?TH&)PDgd~L_DaH#=rRvbDaD|T}6eDPi{WA=R zNY*3DsfS-yG~Dt{aC4|(utmZd_$LRI9|FohKsQu}|ZM590&zhYST)*?qAi-WSJW71(Ep!CZ?5 z3HBJo)f6DErxeAjYEa5lJuAv!omK#4RSx8-39y-?(WMT+ALw4b()r=b6a#)-pMuII zHstim@%`i=9Hq78nn8&Z%5Z$7QQ%#Zmc~(!PvfI-B-RfHEunZT!-khDoNyT3VaSa{ z+0qt7#`|Fr-RCbIQP>@)zz2mXs40qvwlfu$6|}*fPi<>RM~F?1ylF)UEl>!Wg6!-l zd@pt!cE|hUPpL+{m}SKjlQ)*uC!xC_5%FdvoKtGxnh_0qQx@duN<=y}ur|?JP!tDk zejJQB7NnG<3(fCPMJPg}sL#WK5fK#*ZHxxtks*Ro#lzo2Xo&|fSVQ^zL;M6F&c-}F zyj&3+;x9PMIX{E$tXUo+4?$o=pfK(^!QUMt{l-J)H40;*JmISJ6`JKELdL;O?ISqL zmp;D^GEW)C$M`@NIuc23*%)v3$56e8SU1L61I7BlTII5^;YgiWBmi@!VqvXvnQENS zGFDY4K&ErUFoTz%fN-Vfhq=qsW>r9@9D(2pBU+xG1J67aG;P$!Q}YFo7t@)J*zQc> zYTMI<=sFxC%)*??416ow6QOENfTE4oLvlH+X5M3RH62MpdraGD7cPfY9X8>zXgiYy zn67L|fTlYIn%)$_b?Z~3gK1u#&@5-;x~gf(10eZKYQsZOOrq<|bReWR;SsTIZY=Rb&&I=b?FKL{}sV!>Qv;e)JB|BYAQG{Ao=enjQ$vEGPVW z6A?N+6~Pm22ycsnx`y6QMbS`O{W0EEhH-Q#jr5fvN#hH(?+_S*#-J!sj-+TGC@9|B zMTXEo88pfXh&TGe80`sl@CYbO9WowzrH2616`>=L6c>nijW^O_Lg6Zt(KAEhEfd=3_Si7kY3&FkzZ+{W)8RRs zo{PGo6eNUrLhdpI0n{$mTo3Udfm-ShTa*use&Y})_l8#P0Z*#SZd1S>9RzEbm(U=W zQyct)M!|*YUQ_|7NsouYXB;$MBN6Tx;1%bTNhUlJT#LdV78#8mK_oY{^O7POlB1eJ^?LPI7A3t0i3f8VXkz#mtjg5$O8G#I1+zKiyDie3R-ihZ#bQe zjmoHxMVMXA$90S+p)nL10 zafUYVE(&TZ$N3Kvd53vYAJH6i@tpvrK?S8&4%twOA4z%09XV z7>pP@3`55Z!SHdzFl_V?Oz<2JKiYG+d%0j3&6T+L7^tE{g?2g5ow0tSgwjpZyjIA9 zsI7c``3T6u={~}!9W)Nj?SDNh*1DXDzKsE27|#h+1ZM0u#rUC0pagaOTa z{xas-;u5%%GJVxlpVI=j9Bpe=2ea6CHQ3%a?1&xV%gh(68efZGNc|@4|l;VbHMq!w4 zjELv-QPl4&QoZbQc(ic>#+Y2G?Q|U-)kDH<8L6i8eQR%;3K}!5MxhiW8d}!Zho}7WYT~h>iebsYQ1;=^ii!+e0v>elawGM4B&4p`Ls5tX%{r%Gj zr@d$GiWW3KJq_}93zGVZQT6mhI5*TIc6OEk%vrmfjiX8cGy}Vi?M*_Gw>5yl-hTy_ zvj#Z>^Z`_mm*uzCvCY?+5mPxRrnpFD*>{r%^-eCrr)-9Lk~7xv=B$;<@qbLWp^&irX`^PzV%ogw`r{lt4AHqii0oEGt^Ruokhp{TqN6}9DX=42tOGz+P% zPGLuiztGNFH=rSH+ccmt9Z$lPE7mpD0wlMttb~Px!E)9tXASf?{u6-uQgRtgPFPcg z)U~z3VD;M%z7$}&V^P@v?7#L?6419lEnZfdZ0+xT1 zflvNIGMVC8i(CTA1s%(Ja!I}kARjD#o$;7ZuSLYPRG5~PAhxfN<_-G2rAC++_{!E4Oiv(cfFUarPG*@P1+_-Zezy@^^kG__MEFy@Z>0$#aL1 z^{cphz8|>3Mlh-H`SZXZU&R}7t~eSq68rW3_;YSO)qM+h@0`?TQcyGAqjs{nDCXY0G~%Y@kUZ9aCAS;^`8)wE7xhl zvq8;s_b=e)jegv_){omaF5&8(v$%BsI4<5jh1)mp;5KuNpT7rOq(*%9C;Zx>#2+mR zeA3=dan!7{)V5QUe)c+rZ{YqFYX8?~aQW(K+&oEX%sGDXx4`MwaI38f{f1PW3e)3Q zOd{S%O2@AflJEz!4R0km@aL2yykUvQ7uHO?5t|Bp_!afXB`Ql5ojZXydphvfOefwm zr{H6ABK8%eunWJUDj&*Dqhd{jYDM|MVfjU4G|# zPvKLW7KhaeydPq~Zc`riIP&mmf)$72b$H(#iHqx|0+;vT&}jKkzoL9{&i3 z&Yi>Or!V2)>9aUTi_YakAL071U&UW7(Rj;X!1?Xp1HL$qJEzXzV2>`BNZ2yv$5D4*t>T> z*vQtCZ@z%qzIL>2n~g%+Y~?&Z3Awwvh1P-X$p&QXs7K4%I?P{Cjit4jSUy(AV@(jm8)HhTFmP0B<3)IwON7Qs9*PiU9NP02&bLVBsqDn`u2 z97K0zLerfEZI2Tg@<+F&3Qcl-OA_MRQ-!v1%9LDW%_~FJ>=N<0p|a9Q2WJann{0?_ zw!zSx1XD*U%xx(mjz7INuvU139ojlNc-JIAQ=2IKy80yO8pc*$|A?(ZQ(K1wxq;43E4p1QbLdxLA&$GPN*%Xs7if%aRBa zwM$bF0Hebl*=AQPj*r4iv2y&$7>SP!a(ot}#V0x=K8&^CgSbR|U{AnL#HFNTyF z;F6?*Pn;ZKsTx6z;Fe2q_DEeiS1=+;y%I>BH@`$V_{byEIu6miAu0>KF{PZ zSg1dLnkvT!X)$;{%Z?&-5VR&QL^uKwnh`;VqA-k4^QCc%gnv>Lg0f=aPGjkn6$Yzz zD4xiX<6UbAJ~0I0H}+`!E?JK+O|dwvRpEdx2w%{8{H`?&zsOKy1|9I$r_1pM<@tpp z9(gfANG!G?v!fEZvl>ycybk3{N>Mns2=>NwM5kC0oe&R8ay;_mBC#yqAFm_?;df38 zelWQhIg1i#{u{6)*$aP5h``~PD0;p_anu@z5A|C7Emn>9Eoyvb3dViWYWSPO@q>4M zDQH++bUu&;Gng|DE~WsO>mBe*R|#$6=t`TQG+_Sngw7l~ppQWE#6rPU&RXTEG#(6~ zut7mfyAz}1{NR}uh2%*^aIu9TFh`5z>BV#irbBdEC^BiSW36&!6LTbIAhgO11^MMo z36MA11RaF3%`U(@cIC7_uqKM4gZi*zz?HYsv(g-g(0U_+>SBc()?`Lxb37tjEy9gx zAwRiMEfx~W-x!DBIwL|G%tBK)bww2dn@s|A*36`Fo|FXj^c3jlW(t>qbL}h#qGzNE z(3&~RS^Jx{#u@Bp&2I*~SvbtXK=@!Vd@vv`rAa_Ir?JcY=M08RTI6AqXiX+JY8tKG zbS?IC9uBjHI|JsGFHVPbSs7%85irfmhfA>%imnvMte!%fnE#v|lNts&t>sEu(|u`8 z4l9mFc!>qxPA!6q%uv^*BC?Fu_(~dwhIDAF>7L7J-LJGmU*`}YyOzYzO83%~22*fT=12_*IkBSl4Pw9 z%%Ni;pCCgtQ?O8+JY+Z`Lx&?gY&fFGZ;ADRHO3neJ~D*3$q?p2d4pt#2_FKBb^;8F z(eQVXK^Zs<{^MoHv?`H6>q(YP31!e|xQ&!S6*2ZlAF;oT@YST!{=fxB*bbt=0uA3zHbImMb{_5 zH&2Nnaqfb0g$+`=T)e|vo+Z^=0xKe0_ zuX=3*CT*G_{Ii}|AksGcXdC7{wFq-}EyjXpmtylzcVf+VH(=GP>#*{b_2_$UIeOR6 zK-1C=OxrvM>%O}Yy{o69psNt8Us#Ku{QV~=>?%Rc%vxl(>1hLKp#!)~m!j$dsT*xH1?4!CpvlP@nm^AzBlO zC`BOTs$kT$R3O%-!Le&cF=xX()Xi;1{i1fXubqOrB^_v3(uJla-Dq7o2_0*uqGiQI z)Gh8n)AC;QY@CIPdCjQn>qPVF$>`WH1DzXZqG!t-Oy02o)1O{~sk;_n;*;|*apxTL zum<;*sc73c2`%e;(YU?`wW~W&zm~4Et`k+OS_F@K&fGF&ljO~>K;wofs9D{E%4MDO zuI)hWs$SHun}mk7lTo*JA`0g>qF_M-iWW4XcyTkmi`!APvI})IUJYv}p?XC(mF+;y z${rEs^5sj~M14}Yehu9d<>!1{zIw$#`MTA;Xjt8i>Sb*xU)+SMrL7{|ylx`uS9OVS z*&^Bl^fe2A&GL33l}lPg{?dgFs9Q1@`} zer7JUh3;p47hRLaf6F8^ZRke#&gp2~JW<3;bAY98O*^%j+Pa431ocZb^;0eNO+EEV z!&;g*)c-6^>nCB_vy0KOb%sc*qrPLQp+0A~dBbFybF-*@y`qm(|j(vTT@$nvD~Y-B*uFx`+G~ZK&Nk4P7+fOZr-9ACiU%7TROb zxvBT*+3<9Ri$Bi0zrO^|jm^m0-igf3Ehu=hN6ISB#zN?7RJH2H~{@S(lD zrpbyKKUx7N4#JabbWa_PJ%f#rh%^MPfs6TU${2&T24sSbOlPDDjb zHR_w2keZQ>%;IcVD^gG}zZ&KAOtbAK`|3IYj)dO7S!pP^E z3ITXaZXENNQyvD0mAxr=>+3J^oddr{)>69X#ias7m%ws1@R>m4Fc=tT09pde2ZQ3@ zCW8TQ3B>05S(qwC0=fTh!Sa7a!y=5KZf->KdYZp$>coEj7Z={f>qmbN2Fp{H)A+BX z>(YHQ{fY#ZGc60tHv!~>g*D6Nw1;QS^2{A=B93WT*w03^( zb^0)l9o#E8%a45vSbpL$8Wsk@87!9oa|sY%I{r9h(!~LuMBv%9ES8@H= z9z39hnyFTpZicnUS-4*Qw^PWiv$*^91@vD!%4Frh<;%E#hT4DgI`H{F@MLuXwmTho zZ}l47{h02p{~qO`v~!f_GXK%gkFRf>!M*F}@POm5P(NMUPyO^Mu#e=u_wbH03m>JX z;O*oT{3#&`e==F|2WsmtEeZIs&4xc$RpZ+8)GtR4P+5A(T%&%b#bn>kop?Pp10Tev z;B&1RADZIucWXR;9UqH7WG17(uMc?hE#SoQfpMgMyg~PK`7Zwfa1vMU9icYv27dls zoT)0uAJqoDXLaCj)@1xdrN)N^xxlmA=|112>-_^4Pkc^`)E78&>SLTf`3a7n+=o-g z58&*+FLC=Q-P4J^*!$yG@IrMlo-ZxJ=g+(Ze6(cS1j_9dzkz6*T%Ca%q#fxY%L{8bT+e^@Md!*0fR_2Kw^mI()Dw*!CpIq>1TxV`%`96S68 zPT&x>{e2gTpKgWo#SWyu(hb`S9Y}bg6G<=k!2V(?+JW57UC7_qg<^6`H?tw6Zee_=az`&JC{F=x`uNkUj7`nR z+TIT5);8hK-qMEBCwhei@CwSqhJV=D4jXbRqRk>3b}HV~A`AwxQJo4(D_BnlpSAVK z=glJc>24 zvweLtlGe7sxoW^z=)lH_Hk^F;phMiOX%(2>oQ299Fcm3PIY`d8qsXpDTZ#!&oT=zYwW7eFK$Sff?U^RDW*IP}#fhHQEY#OK zP}G!xj7hmLcV{5BH3bP1X|vSjguNpV&L(Pab1@w4IY{lGd~NB-YjmKdG97KD4ooVt zV^%>j=H;hhenAH2=VxJdu@g(=~ z@>{x!5Z{@PgsuYEy9?0Rn1N?=by$@dfw=ZW_)N({6!n3nF%QX&P8chbpzX*+c!dFl z&55YbjKmga45nDaklCJzkS06y^)|%SCcs!{LoE4Y>l0wFGNU42gW4Poa&mM?E;Jyn z+z5S@5i!+f=xXAitsM|$S*-Y4A)>|zRdp=lOV!BClT+V^qtX$Mnqoc5ay6((jYL&a zC~8tdP)UcB{GoJQn!lq1ZnM%UcQkc}FGFa-lN5eNzi z6ox;Qsz{7?8I7P|KLL^lMFxotePCFCFzD$Q;0=Eg2FpXkg9J5;f!1ZFYjO2)g>1|a z$i@xBaG$Y|1&)Tk$cp?)Rd99{qhfZW2ygh&Q<%GJ1%^bpATlc!L!u@?7B&{+je)Q< zWWmK0gbDE>;_DISBS=LWFW9YFF^5#W(&gUP#e*ffS@KbJS#QusnbK=ZAVap5z!M< zq3TK!e&)qi(;_@_BidhZ;gfmdi+TjeIvsOBb1hg}7&UqLpXSx>##|LYbM@~&eK&J(PT~>9U`(-8;1E(?M?tq7((s#-IwjR{aYqA<)u23L|$KN-vs<6#OJN8$pD${W!tS17d; z5Uv^pxoR8~VIvVm`D|Km#6*rljAk?xkun%mV}vGobm$O7Qo1f;q|j71M7cv9G!AB^ z4~Z9a;bRcxKS0~UuAD>{IU354Aqb}O>d0|IBV6u34iR3X5HxNG{8@9{Yc%}aM!;jV z3=w{=2=y2Pk1;a%QoAF<#z7u79=>iexX>Xx%y%R_#>?PO*Y~7!Kkt!nqjIXy35X0D zitr#Af+~V&}e$r!$;xe4}K1h)F}Ao z$3Whk3SU~ked;Z6tK}GM9Fnad{WXUN#9NKFBQq716HbzSGkp1ckTKmaW6zK(x zRYaZ!VR<^C8P9*>2jnQ>pP_)VP!A8Yzu*X8_v(6lbml|El~^%O?SgSycZ`y|z%|?x z-r>GNvphl_4p%Q11O)pCpge@uSDlvLIr6XpR~aq<^B9v>82Z#2RY*uPBQe#C3GO4| z7w85rpK-M2`XDAI3jP%K@t=TEu0wGfH_<%31w;Hs!Zq3#p0Pm~qw;~bF$|viFu3bN z1|*ik#t3+sB8BUpsD`^S924{*@Q#-wAV~v%TQqzVRPawyA;_VFZ;BG$wkY@{MIsm;4*@7`P z&VN8lnce|o<9spR5(pP-0Obh~@#C!i)CNDe(0*WoJ@Aomc)ZOYo(}4dLE@1X`cLAT zOz)wGW!UeYN^K-@qdf-4@mGtSPpY5&UbHviJdetxhln^gM=-ou86bDy>pA~C1;UGC z;FU%FPkA|=>yzRY)h77Ro{GzJeI6O12+XCvFHng&$mOJZIL!5OIs>*L1sa4FYDIfE zjlT-zFxSubDcV7P7T+uyTe^-U9OgBF%dxnphf&)?seUEGX+IWKX?i3f#X9i?U{Ilk z+7(UL=Ju#WUM?F_prdtNE56j^uL}LMsGXS#_@vV{NjNSjCt65oz7Ekf`H{$0EGWgz!c) zSS#@Y(lmgJ*oTMM~`$fENb?^DuP)0XOH5S$H>Ca$kS7PT{JOAQj~>}jVu zlQ%Q<2?L&Gbatu|U_S%aiJJyM?!m&Kv;e88eS<}cmqgMwm%wZZ(0)Aq+k}B~JKbOM zMh4*-EayKY%7t(m)39(p2c12W=y59JpWZ!^A~}XnbNK$`@Bao)Unr+2z== zYXLTGo(ksdJ#_G|c;k;R;je#v9ea2G315Ex2mIp4Phr#A+30Mogd^Dmn0qt|s`U=Ett`^iS-vok7B7x=%rpK>kkp7>=!qj_~FSvB4b$<(pT3G z{6X+Aza&x}i~+ES^oQ5uFl&ypF;6z+Dfy*%reoo}@pB81F}VoupZG}pnSJ8IVH`fZ z8z&C$$EiaHaPr`OoH%kAM~@!Hkz)r1V1D$(K^!}I2q#V)7?6|ytV#a3NE+oVQXB*1 zgXKS9`G4f!5!r?N$AC-6@B@1>u=^zXuOG*8oX6d(r-2LSKr;z6LkEn19wGmg>%bj0 za(M%{FZbihwSHW`a|3s7UctSKoPLqgu29*tz@9H?t)y~ijspkwQT#RFJmtA_8&|2` zdz|OeNvfCfv0OMp{@=pXGXwnP19JDy zbzI^<0a)Gs{#{%@b`1AVoe}+TbMHamIJcMjQURC?|Zu#fuX%|8R*`#$jMYrt=*Egw)He)%cBKJYm%AO8|3&g{mavwLvl z%w7SMpFOq@7mw_tHXXs01AB4r_)*-UMeY2@AK}6$ALI7EeYn17H?Hm7BhoJ&-Y2M7 zPM@F!@YH@BIkgY{hpC-k(0%^(P2gugr)$3oeCK7l54xXs-k|HhkEPrlo3mG^Aot}d!jgI`ZO|5MY{$fgM9iI< zjn;LgDBDzqnl;s^rA=Gj_HNp&bihIW^o=dFd1^$~ng(H2JC|JMV9VLifYPUWk+*|3 zXH;L#_IBiKZb8<%24t^eAiE72E2@#Tsv6n!f_1L0dF1BMONN1I)`Cr5TrAv_z7jZ= zlu?;VkuQ4IjqY|5Vx!t=?g27HmeM2^XU4^Xw$m15r*l7 z2(4$@k{AT!#zI+=0AqDJ66&)NQWS;9o)2q-htrk_Ys!_Cv#(W8tVdI*8G-iwI;biTvMRmwpL}N=E zFm|PICe@j-pi+c;W|rXjQX{s}p(1BN0itQ{nCH+2a%LThN!ZeN()=nU&dNvS^bE}E zNWv4v2COQLL&5A~n3vMHETwDqRSU^mQu9BA4SurZEUtPaQvU2E)V3v+LYzyfAC^%& zm)9V7MJ@7H(mjzBP@6c8Ka=DNO3u1;_;hh}MzP4mF9qyh;miV?Fo3kkCwsGj0P zRbvujQ-e@EJC`=Iv~lgrN7fuVXiT9oomVREg+ahbI>;5$7=@(DQ8Bk3{;83|U>*M{ z5>;o0w#|mjMWslemyhHr83@f&!qHO*HO((|Z4xxCHl)nWMeH1!Ps@^_Y>h^XB@`R- z?WnIxK%mVFsdO-7ASk&p3(@%|#MC80S#2HAzHZ8dyEz2rk`x5QM&YlYy^CG1K98|( z;~^U{1d;LxL`H;Q?3fV<3-U*JSP;Aeyx9G9xjRNjd!W9r6YZ;~AUH*daXN2&@BLq6^40}{GQcA)6fq?>43)cL zn8E`?qTG0FDt9EBqA+e^tVt-}2 zdA#Bq(=jIA7oLs?XdCR1>0Jd7t81eJa$P*kQ?e1(V1|mL{|1F%~zuti8$qx9{#UhyUCoQYM zlDBtZOi3i-78ePc6$Z;0q!yGZ^D>~CLveG`pq`&0KyelZz!@ZGVZRj5U^A~x`uPH8EKp2G$|*|=x{wU_B( zY$Bckbv|UOW-<7lC)Qm3!h9GP7Qi?=2XS-qV3?H+TOY0K%d4R7wj+xAJ$-f&iWXL( zd=VY!d$Q27p$m=~`A{}nL>}hVWUZaBsVNAZm?R`>^1$`@x*?O21Xv!>ZADl&jbEb) zidqxQjfs#uA_pjbNPIkGhz=NnxX`gkR{OwV3W3Swi)gb4#{0;i)w{u>^MGCB3A@$< zHk}*f@*xNalEJ7R4YOhloQVOjM!P^4Ivl~SGFa6fqMlSkknk)0Wr*~aiM&kPl@#NS zB!eds4Ia=bM?o7g2AZ(3h>i3>yuug82yYm|d=TO`g6i~vCd3;tQ2_!x5B42}h~Tk^ zre{YNhvEAJ(UX&7>zLhQ3wkdkH}zGXrjCj7ZU_qY>?1u=eEQtU0~CAPAvF;}{=GlkaZ z45ZA=N9wEsVQeqHH(hWECr!%{aV#10O5j{r4*T?6Vd$0Lr)jfGsH~IHi^Z1-aXp#B zZU##_y<^!H3;#K7rFD~CVT+|9L97!Nnv)6Lbgk}8n0vDjH#uAU@e|YS5cXO4tGT$w zWcb-bu;zOk@RvhxA|xdOfvMrpRmMYCWQH!qfB*%pqd{JX(nP|;djcl7kA<7-SYce& z$J-4N;X$w`Szxgm5hV{5n&-@G&RXS_jV164bB8@O4!YO@3Ks^;BP0C<6$@*cdj+`R z4sN4sZZC%Ujlp=D6W+1m@G(Zh+d$Wh34@z91TNZOxW3f^%v z7m{P>-4qMo1T`kahGDdh*7O7g+$>Qf5#*18uU!GZWVx^{;ZAEa(_ru)xx6PynwAU8 z6t+9!K+@bi#7}byn!sT&DnOP+KS+vh!;W0{{Q7FbKcasbZ!1akkS&l3}2HZf$C+k zQ+zU|vr$M3Uz^HtdJ2_em&2SVtB>|pTsMVT*w1-VX`V}Y)8!P%o#mJmbdp&w@ zaNTyAODS{dy)vJkbrSZo?SoW$_ETveZ>Bw&d0vjN6T)B1*!#+mvXt6Jd&vyiH?qxy z6xt7F(jL(=t$^;oS%BtYRTixJ-P6$1I_H@fDwGa(z4N*-?5gQVLD|k;F!RSmzXQQ%R z6A{0V#)ZyT$!n`%SW=yF84SgsE60ku=vI&-3lVfO-{@H&r5K^MK0$IRoVknzNs2SU7JQjU9vI ziL0vwXwH7V-}t^lajtdJ`PM>v7F}jIM$?|+&u_hgkKX?gmM(6@@+HlfJEt0r4Jk-V zjY3Lt1lno;y>8_cwASaNp*D})LKHX?5EbHv0D8x3=v{B5_klW!_P4aB4hir@K>>|> zb}q8>Y3)eQLS_;5c}W(XAq&v9X*Sa5)7a5@hQacfl@+jVZ9p82CxhV@z85-IGsOx6 z(adFTUdvQ0m6WFnIyzG`SZ?BbqVs(6ss<=~((x`E_}uqf@w}wa^OC;4QGmrpt+{Yk>BeU@r5U{r7R@@?F8ca_=5+n&M9}`wFv@TpuuMiJKI-K|&J>mv0P| zWqke8O`JP(4Ohue)!@Rld$@gxu78g*+`lWh!msvU!yQVyMMch0zB44JNlx7za5>C! zj%mRu(>;p6d6k;hPi?(Hkq;;l*KzmuS@d5%NcEm4;cHN)>#W^P1uj#ADf;VkUsKcr zT%w!2c>8|}$KRl~oW5`sSDBBUirwzNhwEn;93QwRwyP=n<-#poK6?%Q{kL(AvR)N^ z@&IS<-hU+L?|zL-R39s#_uqLS`WO8dDdU-eKP8y&{Upf=iaT|QZj$8A9m;zfr|;gT zCO-h%7iBtkVbhb`2e&TMn4G}XOULQqzDP}^W5I*FxP1E-&R)AN?&0!H8Z(lsbTc=v z-N)^#_i^V6`LEx?#T(~v{r*MVyK@n@&Yi%GBL{Kk=uz>fz?mb5aO~7c>_2xJyU(A+ zSLeefku>JbN0S(>;H6p2A1>;@s&YxNz_*9C-Jy*#FL7aDLxsICX3tC^f->*zlJS;`62Rl%|gygGg0)yRFphDQD}nKZ0i+T;Z+;j(Ym@B zbCx!uuQeB|XI7w>Hd9r*no&)goa(2iqV$>B$a!iSvYwudtX;jrNN6@|KWu47(WZ8k zZ0~rf!t1 zX+z1n_DA8$jom2Q&?)lqM!Rrz6V=^>;`Oa4+0cs8jqNC->z8fnc;r@48!EPRQ5w~? zp-otu=Xfqtu%<;w;o4Rdt!op)ekne0RntF7KJ|+v+3Q-6L3L+tY)1LYdQ6&Gj*aC` zZ11T+5pDQVch(?lJ#9**{j-6x40cm3#lLa8d0#M22~qdk-MUrUaYinUsEkM zqX~UQ2yeH-qeu=_eLSK{W1uXKMNoPag3=;{>z5V|e@6t|5(1$rF(IKfLuj%k(Sbal z4l9Yh4iqh?joBbBHbQK*qRum(Bc>&UCgPYQq zgVaTIAY0@_64k-3qmK@Ti?c;IaejtKZ<&#aCyF%KR2qvy+E|!qTr7*IujV$OcoFq| zUjrQ!Xmdatj+~k4m_rBTRmCw_)#^aT96HQy>qHzKyb_kuW@8y`I!J8GX#+x%w1PG| zB!lAy$FtaJ%xs*8;#t^lr%hhU8fpWLZ92`B44O~u=lJB+jkNJ;7Gcg~Th)xjRb8;J z=t1U^9^@?PM()yXWUlOieSJ4=^17j&TMh5BM0i-$f~(wEkPUTy7JPHl;FF(>;A{&b zvP}rc&?0+IEgcMN1*oK@16cf`T=6GDMsFIza>C)D0|jeiDAts~xU2-GxwP4xS4)S$ zHbj)zAumiq?v!SDThu6=)(ZcWSa_$!BB8emQMGJjG8dT(Ti}>W_c^5mp#=swrc@!i zDplAS(6pz~xEI4PHyvS1QV>z6K(i$hYxC1kTVq3@-4AI~^WdMYLSjQEl(|O8i_Oqf zC%}Uad|8vq5Spriqah!G|J*dy)p~x{o7CHu_HQsQE4S==L30G>jce(<)TD#Cr zbhC%S*yI57>zbR=!3IEw#dx4?!!*dkN5b14f#$W7Aq$WRK*!dd1DVbR0eKo^(_upv zCWA|QxX>(Dx7p!ep%?ZY*bs17n-z+Qly9|~yK+gFju-v?~1h$ox!a#8xJtxMQ*$A&QB98jIdU+#i z7S^Jb4x1mH{s+G7{}g{a^Nuh)XPT6b*qLmAlmY)tL@`y(v@{{gX$}FF2lphxwP>LT%b+|z5KNf25v6vu}LG3$^;=N&s_J=ZH z3}O^?c=o2bJYEKi+#d>$QBe7ehuX)L@_HhYo>g6t2Q-1>ks2EYtI8iXWe9wS$zY4} zf+27u3gbeNZ;3z(Jzo*N!vx2=1eQk|gArv3M-V+Ltlb+}Zh)$X=Fr3x@ihhi8Kmh> zLhMur)Kl$(4k(8D-MOq9zIk#4=c)(5@-TYV-DUXG(f1*XVE*NC!aj<+GZUUwMg%m| zbJCrP5jpf8EY?8Zor%y=1Kg8Cg+{rih@N*U&qlBUa?}`^6aeFtT&Q|8pqZJ6ur69N z+Xf8dG6g~`y))ScKt%n3rYMIwo(=D6I_yxjCW>@+IS<~WwsWBmr z@{qX3M`C<@1jey3UUJz0@7VZI@>99QD0n3+1VxscEmVBj!&>2CrFsE$7O$cA?aW*x z&MkmrSvl=1ijcgpL`cdarWY$k>f(VvoLQ?cb2%$v)WNy3R)kqNoWHI~xD00G^Pk}> z=)Jq7QV55O*S8>dWu15za$5HC8X@fGuOB!Mr*k-K1zl%ll~DK)${uSdKMDIK;V^%R z$jTqmSB#H;$;e+WO2T=#4A&`zCE>7CwrF#Upm1QN6#mLlQtDtoOV(PtFN)(l`J3rF zTUtb3R`lR}?B_Jj%l^Dg)Q*Sw{x{(~xf>gWR6W^)Qrh=R_rPu9aQTi-A<{i^JcGQC z3ty9^a4YTIcXpy=M+b_wwF!UqGm}I-hb1ZAPW%3cBJytLFGdHXn9d$7C0prSK~hTl zL;kvzh5ZE^X-~PH`=0KD{c9T^o(($1S%K#TOUY(x|28@=P#MmjyP+9*oPTqx(AF;4 z+K$3)9VpyEWp>j3eMcj*w>HALh2{mh1v^?$@&wiSR5yxubiuj4QGnm&PfSGDcl+oJ zH5L9$)GvFB7x>v|MFnFqe_{ob|ywX&qW>Q>#Vx>eN|s`fp1ANvzbo|hwMM>Py<3u!%61tYB) zm?+mSDG=9=dSSl!z4i30&t6}Js@DdD)w_LnGfdk6y+A_0+1k5WkkQ#Yx$Y{OTbCo7 z>bLH45!MnxKAa?%@INKXC8GTQEm_WSVQo$@QoFV5%7sNcTOKo^%JUUQCiR~!>hsy+ zoYplt^PM>O`KQ=->2El8;jj4qTRZTbH#Y(g4&oxsTMpB`{~XO@9^5|y;3RHe+lR9! z|4!Q%fX~hW_s`(-d#7>l`cXW*brQIHhVmSv{e!r5;|%WJx`dZsc?JWs`%zg}1xE?p zJM%2iI8Df`wV`Fp99WmoZ@9h%I=as=S+1h7SJ7|EWVnX<#gIs5)-qRbt`=J5>TT6f ztS^IVOZ6kNoYz)S^gR31gdPk>x+U#G2(l6VIdn30XdzFn^pZXHr~h2k$e` z^(T?#%DJ?jn^FA#IaxkD{y0(o6~@smtmKcG0_I?IY*yNz2{ShM>ME}uAu z%O@|=P4GUhQTbbx_w3b&R5x&yaQn^!+_-)Xmo8t$#cMY(c=vN$r(5LZhrsch4+KFj z;oM!|;vE-Beua*6ojGedFmvH-_IDPvHE)HJB zjY~K2@WOqn>~nFSzI*+1K_oMnR2~jaWB&cttK$CaN)h@86~BMwJ_b(@;_B&Z zxPIw2jmKxWOZ)gmz}5So!9GmC1N)7>NH}ws>Y~BBaN{nH-o8YSp6fVIzZpG( zaPYx39Jq5Ghv>IEevihF+Io@Nb(O~JCXE*>=6puug)5&6=cY$-1OKE4)xNvuaS6Am z&MVlv|5JRje;-a?xr_rB&SUSz3xrG9f9@jPtS;mHkxLjna0OQmU7`ozWgI-3f z!{Otn1aW@wz)_q$aTaIKTogq2Q6|byp2ogYr|{{S)A*QfN=%l2aP>U?F?a_5xOyBP zUpRsTXQ}Mz1K5B1AU+{{eEKLpK5-I2>Nx-^hnAdc`u&Py% zz}YnEv}|aEZ9PrQ);7{2f))m=Y2vu5R*>CA>zh!trU}KAR=$cg6&q2#q8ZhzXac>A zCethUn5`&S-VEnrn)olG@(XDZu(%#I8+uX2`hXj!i?C`PO+Z(*p>QcpVwW@^X8|n+ z7Sdvb@;aB%q?_vE{Uxj0QA%yB+|VP+aaggw`wJ*v*G2hgQoW`VrK`LDQ^@-Ym$##6 zB~8Rv(nOx~4(%^n(}Q9vUqE#ivv%al7R;Snj~7~N@MKR7N>`K%M>=_1+h|hWiM-9d zG#346U)7JU<-KTL-ifM}wCJD-gpDRm)-^Pd*hmwK4Hd{(QGn#x*@*Af!rkVN(85S0 zRiq#ySB@x0G~$Y4p>EW|HZxCHOR8H9aL@9Cs+D!x)2N*l$ew41ah?^L*(O0`m+YVg z(WVNRR~OUdn-*c)8(~^oCam&p8_SThi6*qez-f%!jpfLriK}xxf$|rvaiN4Jwj$hC zi$a=I6;W6~lg9$Cn0DRNdP>_=iJ8>S7b?@St2`Ygi^^#d z)Ct`ZI=2?kqL9uD`^qM0=zKEJBEdS>ikS-?*w~=My6#+IHLBg-0o|HL7*|qXRy84e zb+dqZO^bkKZL5HFUE3qr*0=u)8#}14og%cXZxgU?U`IFfdu{EZ#nE(u+%4UY^4T}@ z;-^c*%^SL5+%yCBZS!ccwEz_x=fSzM7y1QFNSsxU7@Eig)SBR#t3rrTg=Bj+QteiR zn{@EA84y{Tix_(r=b17R3W<7iljD&IEHC9 zO?tZ=@UzCjI-?p%HD)BX*pSq2g?UjaGUnS6v)GKN$`~}Oqp`8jg8JHQ1Q~*bg`H1c zJkp!;5W&t>i_?)*sX-it=~YI=SW}SOT#N+jZ{MN;OqezWoZ0YpI-K1o=Z>l$-iPW2)tV{)25l56ys zW{eOHfKwZ@A&Z}i*s=@+=O&6z^NqcQBF)nf0qe{%$U;YBw89g{E~of3pDoMNTCy=A zGXNu%o=ESuW31K>W9fQiOSB|fFes+m5ZQC92`b;xU9y#D-$ra zC=vm6DS`xNFsUe!<4m42B%)lhKu;R5!L2k#5b-P_!j3T$2CN9_qBVY#}a@-%N;0q&So1lC?R93`vSb$}b4@1^)t*<4lq>Vb0r98k6G;X`f_u z&IEeWB6cRqc{yL6Aj_G==54kzXVP3l3pchlXJVZRZ6?W?G>=04V z_307bZ$Q)xlL&+8-Yb#iLA{xfPpAFO>4>aOMM|w2a#Oe<%clj7MQHF?#0AKpjTi|{ zhz#*`ekFvBM10hEM23z)e5ee`elkQ&k|BlmX`{zN9y|)+ls7$=^83n=#6)<=SZL*w zkr6Qt>ESZOaXpl7Oc*cH(t^eyiSlMdj1v2z>G*OF8I*KxGm*~qD1s=R(!wUl5IjbP z7`IV~@fd}OsWSMDlfi>Y(106e#j~40aQBx5>d4j!1B9vuV!s)tJh9Ed403K<+n3f%m zH2$)sLyw6?a`94!Uk*jLWgw9a`}0JY&_~xrmmXm))Mm=d z`8b^s)0-_mH&2*hL)ttiBD)Moo$EjlUGKad*Jq(?GZO&~DiJ2qy<9On57B%MHl#z| zl8KlOdKOULpf)W6>DmtG_H-K&NzZd8)7i(#l5cLnpRa$25h+szc^p=mCL|~1nemw9 zI|cEnaqtY7hVhd|BiCWYKi~a}m}nOkQ2(OC5lHt_)-I1vh(c^aB)t5mAt2NbL6MY} z5(%>{6Evg6&D$3-&1(V_iYO#0A~A8wXaq+E;12zjcUD8@J%;YN6EQiCep_W2-9v*h zF4-TW;=M64&I=|IxcgW(VL6+o$(UdkmJp{58 zKgblm7?JFYF-m_-$e??f@Y~hNI&qrhqvR|SHpapNHec37x}bH=pI7% zC(Yt~5%QOboX%e)8djHxFA}rYmBX~URHWZ_Un!-oq4s9M7h0 z^Hx`%gv#M6Bkzd@*r*P!$G)px zgnV2+zRujHtbB}|z7WW8+jjyeI}E_l8b`Oh@LzPlclokL?o5dEQJ z6g`o+YuEmJ@-c-`RqcCL`SGUddmlOn+?|0?QJ` zOFAa)YoD7TzQC=Zbs7`j8H*ffdTkD>pPDXYq}WQnVOKxA^P-^YHe=u$E8$fTDPA16 zy*wL@FAaddpeLTRtZlXD4q0kC{984;+tO}F7EVCkolH7_*a>YfW+qN|g z5#~&+yU233`ew4+u(cFfo9Ue1Qi}Yi8pLnP*9%{hMq2OGJUd-{G0ZQVIFw%cWUi#^ zk$wjra~^v>|M=V#I_O-7IKNB8I5R0N^usCtmqC(WkuY3hh4Js?S00rgw*NnaEq$r& z+pC1dJBJ(>X|#{Wf_37v=w2jQk~2x3LF+x$vLdJ!IgvQs0C{Z+8aFoMw}*d*@BjKm zY~3{rYiVu0=e-}`(+}Uqk^R5GnUjCQ=~I8kp@YB1o{xTt10Vkqr;hvy`#$~!_I~Y-RyiB#%GD*Xm&H0CP0p3?~|ZK9$+vD^wvut;Qi3a#sy z_)gzY12z4gY>X7yZWNZ~ukHV-uq-z$rTgRm(z2Yv5-g9)ut;eVDL$NtW=QE@MvxDO zL{|ShNTl|cfsZ3umhy>|{S^gFNH;{dP{SOjmU%N%+ z?%=__`@$0XGnW4tq%yazyR639diu_7Jh)2f4}mLZui)Oz2Y7hr0qwto&+c8r!+SUJ zkhb|my-M|79=wj5ckki)?R&U+>mF{?$$9t2Jv{08AJwdeLtYU5Q5Ub~3Fo0na3F88P(gj>`umUX!`Op@j9UE2Tf zDz4wXgqwrsaQotEJUmCoV9oO@m&EZurv<|;n&@A7a2*$JUBzW~ta_b}eS^mJ4&gqv zh5LKw5^mqPfV=kwsmueyXSl_3H@9712;9DT3wH?*uJcQbTVl-a(s*6MbzEWXcET;H zWANN@4ARZ$7M&A!E?*SZJ*Vh~!Z>^K1g;!Cftv@9^>a6cnBX~JcxIXe}uh< zKg8M7`*8l`Cpfh4UF_Za4;(p0c@H1Jxg$q$ao-V~J8%GlgXi(`+b;>L?uzGn;e2y8 z3cofBO}l2GX?+jM*0!T)RU=B5R-=7p36_*tu&~06f*uP}2P{aS#a?nhO|*N;k=0R# z^ae9BnoU9{l&zaHn$1XS)FY{u9cj|yvQ|qA*mU9Sjx~JQ%8WyQTJZT6Bq61q>aDXu zS!+XbwHb-@;EpNLA+DGfq7;VMQiKD>(415R+fxx{PeVvtKZErc-&g*iJ#9nL+Iv3WF?Mw=12)U@IS!%chHR;kjzaZFCGn z3KFx^kfx1;BRw9Al<8Dg||NZF24K0 zx3T+I&*4Xhe<4V74}&k9OG=>b%0vxKVwK&QFtOEU3yob}BEp+#%o=HYT3w6&@YYO( zHf15K*?>?&SPNUX84=QA5D0E&g20Gyg1ni~NQ-zvbOZfH^{z0QCi#(se-}p7(So1C z_%;h-TFs(-M1x*@PH(T&;`t&CHe|=bR7+_+1xRShLrOyqRINEkq%zU{4#>OAP&TKd zpdu0Lscc_SD$*OXAn&mwtvwGJEiPzU^98hRjz`GqEPMog7cEMMVCbd=EP=^lwyrky zRlv|o3q^u)I!(;`D@A%{XVD{Mb<<*(@>yom!fzHW(q~sg)k6#L8AY(qD1)8rt<6SK zp_0y(7z9}42)D%{!JZ6ljtWLgI<#4-NXb+n!JGy~z77etOvo*2c+&Z6S=55U#k9DZ zT?y?#G0aOV#i!!NZo1~|@u(RnN6CCze9mydIj;S3tuSd8g7C!ngYPTH;wQ3qG0~||e0yme&s8a_&Q!uO@#ZZ)(ps2})qTYy{*|ZRu zorlzUR>T)Yqg5S;jYYYrqw6!s7z!h`%QHU#sVxqKIn$9vy z7ePsKO!AouPk(PDq$DCVJOmMu;YdkMghs2vgo$GW3C>#O0pS6H3}>ko)+i4S4G?Dj`IeRw-tk-7+Q)+(Rm49EDq5J8qR5iXJBk3+I3=RATi?=ir;I!QQFVl8x; z-a}|`Gr6l;T8Pvo`9g{%ygy4g(qy7sSeGv_3mKNjiE@bqXJR~Mxl`zsGhxnQ8ZBZu zl%!aMp7{_lE)n9=wq!Xj5#(%b&W=MF9Opc2aW0YN95Nx!7ULXe(wx&cWRjf8aSmCs zh4V3?&O~{@ECc-eX&fk>$A+!SpZM8RICK99F5WtXyZ2Aw!lh4f?)rZGYR^yc^JBk8 z+155B&a)$BMUjwT3GT}h5(#|P(0a_$}ss&^+Zvfi5#c&Sjv}4)!s0w+>`0_gzNASqWCe^s0v$I>HeTdUc9$W| zm+GTF8K^(elomf~ER<7Z$d4Wk4fQFJ$^VeC@SZ3`kk<&vgC-y*+6#&4VS+55ru0K* zPagbAk`Y+1LS&C#XzGX3II;vwLa+W2S+1C65o9^b2(SjRvPutG*m&_m;twbO30crs zSf-aj7BLo6j1frd$wySH3BFZnkay6th8E_b^tChsokM3WD(9TQ*w`&mA#g^+?LMuOVI@M3< zF*D4FpGD^$<%{mmrqE33SqNy!5SHqGP3ch3B9^xkX6M4cSxt4*Gmx%(1{2|&KcdHo z*glIO#Y5XN;ZOI00J^RN=$O8A>|naKnTQW>$iTGRNc6qB6u-Gf9bh zO6E4Aa%DG4mbKG!s|5v%no+p46(uV=P`0W|Aa`LSoRn6)x(ns(By(dwDmL_?WKB1m z%iB=8wuk1MosWzX%GP$Fk_{x*b&I)ZYP$sV-l1@Y8M|zY9EK(UQXk< zaeIXb^;^rp*2dX8t6<*2#A2n08@83h`eZG#ww1Z+*iQ2<%ENI!J|CC!a5~q)>3m#n z2OopM*2V(cs|8`nmd8w5GGWV>zUiyEj!NV{)dbt_24rn2qcL#OIG4b(lZo$PWrrZ- zG^l+H{q{;^QmEZpE})}0L!@n^aUkdkhV3+O+(GT9ecVST&e`(Wy1fR@r(5WpDsYj% z8!Mrq=V;~2eQ5mJ9P!0UU{M05zp_L~GfgrE(i~WaWk24Az|sUknm0c`8#Pb&A%9b& zur#;P`OjaWHoh{K()(#`MQf0DJ$heTjG*FpD7&&T@WwI(l*A#tIvJg>%|pYBGofDW z5M;S+M?F2e^Wc2GQ;@!rrSuo9s<*hvV~JqqkkceEq0absWV!g=_&1~9OSLMG&gWu5 zZWle%A#~JZ>3+(-D@ryup`QAbzlO@tb6rEvd-cLxP2^(4R^19gsbQO zhEqp>i-Y@qh6DS5iNl9}BM9@u``!`wxtxTq+b|mi#YPmA*^pakMqUNo5A(E0aAu%><4okOZlSSlqHDblDeJ4Cps`nM zC`ZZ$YVZ0|C>iU@hfqOj<$^5NP+xglBFi(@(%21=<^O?0c$M16K4e(4JbPokuuK;O zJYB2*9a;Wg5#_vJvUHcoaS2lTe}~7(@y9Wo9Df{4ma}E~|0%MZ3Gv}^={QW5bDZ15 zR^_%Q+eA9cu;k4y#|P&=5@h+wi$?@me)0%&K8JDk=;8lkWcim7xY!#`WvhaZ@dH>+<4M9@h zxqb!r1_@U$=gA5g&e78@V_d?GE9Y?G@)=yaa~0Pg-lX5-y3la{ z{N_;q&tIfx$R&J!{tWJ(IVA{gCig#Q(w^$LM%%3I{x1yDSl+-b3b`KEYd<@923PJ~ zr1Zj;!K1i-_z;fn|0kt? zf-|QGCqKsJv-@%W_{TU&>F1B`5jb~j56&LngVQJW;KWJ7>5p;Z%qKW{ZZGzq-j5@v z>Be~S04~yv^5Wr-smv#IlcfC=9zC=drw$#!nSJ|kmcnZ{&*1qVK8xy&w6J-h3#M=O z!}|4^!qa;F#x4}EZ$;s{MwG6sL)+{!tf_ZkMSU(x`fX6pwF#@JwEhCxpWHp$PS)UDctpSSaOvIL@3(enz8d?n3W+A4Q7L2tTp)1OA5A66Rx;_h0MOwra zW+A>vFT!XCEn4$60x`}^k^VRmON>Y=H6ghy8>wX$q?DSGTx>#8kr4?6v`8hyJLxzS z@_ydO;CzabY>_XqklIPxQFb~WYrW-Yz5ppb%&bC$RV~t@b7`@hM~hg3*tXF`!>ESV zl8MaBWK?CPV_Qx>I#ZL7V2yznO?JHslHln`!BnRb9!!?!sRdyloR@-t+yvoZh(D`l zM@F$t8lg#9u(p8~kxeLGT7&itop|M!FJQsu8CbP*4(8EfvVCq9ikmHn)dgd0@CYcV zo*%vY7Ap8lfaezDTYvo~eo7OR_1|8P?|=Ljat55jFs3NH0Php@_E%JsqXz}k*Av9l&PzocQ8Uppnk%6#$ zO3zCtD8)+weyI^`SBg0A4|k+f9<|8Fq23seUFKBGi}yuBMmW5z$p|neA;g%7Kuav# zv*qwCQeuKR0&-d~CnZnDsxmFglD!aZh=f~qG`#gu@Y6*J>tPQ4SobtD@=+M1k42y% z7Qu!%1R3K*7;K8CW5iRKh;VBPLik0CNr3f##q0}7#B80kd{GOIl}ZYm>A;$&y)bX z_5RPX>b1>~g^Y!{-HFibIJ#z2ge-%y(ja7HCMbM_v`R=$0#d5=LYF+Lg0AZ#6{c!~ z5lQD>m_q?sq8kj;3lW^3Bpk&REo;VPZ4kz#`@z^>EcDKO=z8a`Vq}q{;gc7O)Gixj zbiPi_2}fe537WZuLh>P?S|MIkv9)SoeVQP?ndD`XJdpLrr<;)2Zx+Nj%diY5$R(0o z+U9hxszk)~WeX{marvQ0o?{nUryey4LQgbpspAV|ITPg)SuU*07rOMvC2*X{aVE-{ z9OpD9&{>j&)0jk;EYFpziXM^W!!67ilJv@OvRneEFFh0|Tu@M%mDBzg2ao3Jita-7NXupXTt%UQpiNpg1X$ucagF+W_h zT*$Dv%P=*-9YMivi13u5!RC#fvkllWkc~O?ywik@N5n)KG6H0HX0{ER+7;L_(*SL_ z4Biu%V3wh~JRHkfld!7QhUxiQD5lDgG)0EW%t=_^mx^U=u~<--07J+aq`1jo2%e0M zJx)A9zuj&c$HLTbXad}jOm$5!kHGFFbeujD2I!hrdW;cdxq{lcc~%~_)0nQBZbo|8 z7J!Vt_)weKvOGM9`YZQ9yfOrGbr@Z9(TFUgXI&*d1DZ7mZPy4Vs{Dc| zsm~~+SE8oV^M6)0QfB3dFVfgL($^Y=#9}pMfun^_g16rNIYvjhV^Xpo(wpq!WtQ;s zP)X0_79%`L5-}<}2&pskA#cfoS8*bYORC^gln7ax8v;ud$eLLw(;V` zG+R|W9)aTw#lmbTm(tvIMK02p+XXnDIFH7DMh2A2bD&y5X+xoQtrLb#CD5%e6!G+x zxgwOdGgjvdl3cxto{^L$$nNzn5;|?Q9jPk`t8yNNOfqXX6^c-^(M3XMY;Y0d916mD zGwow?n)XZin50&&q2p0Lshm^~hf+O)Xs7*x_+CqM^EG+2?IOZe>+%sWJr#+|%!1(7 z(s2|k>HfTw=FO{fp`m&Nkxu2ADCf9#bFs+B;qbU1sJ9e93Z-;zpN`^8j+%B>2!fnR zWAm6A{wo(^4PW{QGy0vtCEgefk=^Cn&_wyKW|HTUdaeUVc0SQdfGbx|@M1!!* zuX=5UAkU*_W(ghg>ZkjWJ~Izt)k-Y>!B)ttlynV^hpIChtAD%$aSe2@Y}cdf)dfNx z#q7H43-13Rx)i3_Dt$oh1l!MT-vI&(B3rNemL{{$9ALLCEr$ z)|aE;`A+2QZU*apf0<_Ya11BXA7Q5}zgcLUHwvqH)-`vLWwJbVKFx3Fna5wMMbqRjbA>G4clj;j^++MG#}Xe-di~M z(T{{>`RNnC$Jw)g#<8Qn!@iGyhP@yC1P4F;IS%drDL(!9`}q4`zlIOq`vxwY`8{r4 z`v)$a`y*}t5hsuR7Dtc#4iE1i$J+G+$S=r*-H`PBI*+rKB z`SXK#W$%xL&VSb85|}nn|2I^*>fBoS-;(8$+{)u=Li%Kzi+E@JJF}0R6K`cGnS+ksFSoDjFVcS?QetSWL4+F;;Uq;GvoF!LSYDL<| zan>(q;+!qZIi5N@7x{B4@ZtGAICbmf|0iVmaFYCSqWtW+lOpXavivLjPawn9i@@27 zc-dS99J+#=gBNfb*Kzv66`cL-8ct#mCu#fQ?JKzT@D}dkGlA<5ZsY9WHC%h}nUDa# zbpHX)QiUgPT*GN5Veh(d>egjk`s@~N(vt7ootqf^jLJUzTu6r>yLg%9zHu23aqht# zoVkA&7e0T8E0lKrvj;eS>xPhlxp?m$E)%ZaxraeIfnAo;6yCmtv)3=-!oBNM?>%bM zeO#mT>w|Z2?>04xWnnJe77{Y7rGAf+Zc{rh-@An~x2_0jmU9p37(+NagfpN03zu;p z$M0Sd;O#-`JLfri^CFHBcq|6*-x6{vgP&8Is4rJ3_00W2oVa}%XCGXrzTCv+&u`;0 zjo&3|E9bp(he94hYUFXsfAaoKoW4bQuhYJpG)~mdYxnQr!u>lq|B%Lo`giH!JzTj< z7w2s{DqH2>qb^=yOL^M3_qlihapxAb@jCVS&V3=L&SQ5$)Z?n_U*R1w4!7xdyLtTv z?hmp~%UwLUKG_j5c=j|7o;!|D zP9MPOJLhrY`e__EcMu289KfE#AK??ixoec?9RnH-PJXEIxh=v<8m z8BCT-c_gx2BGj2cSClZBZl*lhl*c5%+nmPxm>7?9aDHk7rAy#=ywiY4YdX^Mv!Ku? zqQI!awz3kmq{KmKiA7jZf{=8GF4iEtgcjD+c5XjA8%!+K(lIh%C^JJt<=N6W&YFtM z3Nwm&t57%4fQIR{SiNZx_I&s!?B2W_AOFWYIDha1TsZVTe*5+tXs^!4?|<=qY+ADb zuf4DX3+8m8ti+1?A163M5&Qk!VpM(VC2S+K#s*AZqI@ZoC)J#SG)oH7Eon%ncB{;(P}06M z6YVo4A;my-8WJ9bJU*Px`BYSn^W`Wb@sd3gOOwK&OOHXcS&4W<8sd$~h_NIh#2hQg zcqX;e?McW?_QI|z3tHm?k(m)KteC^|6bQ;sMsQv-0`rm(Xir2yE+HoY{`Lff^%6E#36A; zKD_GH@N8DYt2qs63-Xb%h_2zqR>YS?p;{k{#T7PG)MX<;A0$4D_jV*8y~82SYi*qw zcG|Wy*5cS`!aHc_91=(TTC}4+%hqR*i^=Fd@S-Vx$byJf{k|mC(o#ghq!# z9vgwU+uR*pKIFf z(D;vme3T5<@Dcd_+ETo}#DtgVx^kpWhA)%l?lKJ2MdFEhIy^J42J=g;h>*z;La4|X zh3A*+@zf#>HukE8<##k)H)&I4*huFlm)Sj^uDzHbgj4>Au`(=ci^tbCI+B90_@M7UI}?yD=3pJvxN6sSrKGKnp)R^4HeGD>qUQ*~z6E$igPj z^*RCnaq>gRCdq`P5)?Aa9=n+nQ<0>;CZ^#f*DGZiQ@vBP{*5*uNhqN%cPxtV)OaV^g ze5@G@TwL~wHkf(UGhE>N$8Z$&buTEpONk3`24v+(tg-o^xt55mh*Fey7&IB#alK$c-) zy>h=$x>x#7LyD4~fBs(Zrh6@u#Lr($SBWXU@ z?SQT~U)&1~{RPnV6+%n#?Ahfo%_$XMUnx6n1UvKtMPO%gwk37Qo?8LqKq<2Ni|E-> z0`mYn*DQsJo-_JBC#GeGBC1LS^Za7r*pi((>gf7qU2@heXD98()kQ)gki)DMPUzS_ z3OyS+jY&7&W~c7L0X%^nz~^nP5zYqf+gQS*O30t+R#CeNLK=m_^d)wejEErX$^~)9 z1f7r+p)$OWB}J^;Du-lA%7^4Z%7pZYg&h$Jt5}yT3Wq}8WE1soC={|H6b{d4*x-_8 zVbY)D`t>gP6i%1wXGs<&_Jy>{h9N6>ifdV-Wh3RKa!mNg&ov5ipNU%2mNJn)ljaU= z9nbq&+JavW=vn$@bE(M3&Kae2wgzU0jhsF_6mlb!PwKbSUm-uTvqpqGE-VAX@!?_a zu390#lDE5F$ZK#rxcx$hnh9K%@ZfQv<8$1~mfAzdla9~rV~BKub-T-o`|;5EG|i`I z%yjhobH4oDEh0UG&WWT2W?}uyggTR+g5;&&Hj{o2jtdKO`pr3=ol7#2o<+ykar>wa zLCo){5o9=nEy+bl`$RhlOb}H?3BbM%A?#4i*HfLe_^Yh{Fh!%u-({r;>{v=BRvR-%-oVztBWy3?~6p5*Dd_!YRIcn5YwEF>EB+4=C9AEv7mErdp-2qYGK~l_=qTfL?lau zI9(r)w7_@J{vjB4QGSUq-%S18ME&3LMY5b<92j?2BL9UpXz09U$rr=M3fOm0yLYvV zxeE8?TgQHiuOIjU>YnTrK6$irbD*Z@d*yST(9>_k*PKg=h|Wzu&o;6|QIW7P7i9S+ z9%GmF_9JU?f<$OPu4Vp+Bp-s5&iLOE@f;M7M@qn-ZC9ey|E4(Hus~C*3dILa`FD3-o&Yczr_AMZ{x#% zejD%oL&A53M9aQCKf>Ss@)|z<_SO3BR|LSLqEl#y>H|6@po|f!e4Oi z>|en;=NmT7LS;=3YE&E-)34=l^Sj3^&Y zmP_RL<0QD0KHQr7%kX6c`EU#;u^$H?huhC>Vasyb*f+e0Wokyti-P6!ITeuU-~1DO~tIYj9t@hC8<(;=x1aTJPb? zotwCNpUQuB8&@9O6a@0M2e)wb?hRbMMYus}*KfPZ+~+b6aN*iDTpGNIn-4$7jR&9M z9Myl}2A#BYi)2TYgLLw;oCqJ&B`0zN_inhtyPw^`O*)RSM!$0#cW*zy{aX)(BhK4b z9)OLt?+iW=4nSGX<@(*bxO{sMm+udPE(ct^e`5%@M0kPPdf|a9WCH#C!`p)JzWDiF z5kGe0GEU#ShO2l;i&slqWHr*A{@MPLs-e*x__I- z@wV%Nymecoou%gOfu|BZ)qf!@B0tCz3f z&XqynHVxnn8pmsQai8$uCiR&v;;UC~xW<_3W73_+(1lwf&g048@w|KWri*O9b`PJO z8^oPs7jWy?d0abw4(Cps5)M8O4-w{{UOa)lgnj3a3!?ncS;CpaICJeRj-EM!gU9yc z+{IIL13HGohxXz;-H47K*^gsK58%Y{LpX8Lb)(}O-m#O11R>52Ku_*Hjtie2#r1>7 zasALyoY}V*hYs$=;gd)43EedJ(hc*#k)z^xr*REie)9@!Pqf4KwH{=>+6v3dEi`Fs zME+`;1k;4YzR&^3fEAT3S}dy4VOC8B9DNzk&Cf#S91}A7%uuyuL)DaxlzJVK>oO5n zr$JPm7SRoQ#ILe(uRyaZ4*Hw~C`wY0RG5mm0wp4yDufrPATLrOvNRp?iZsNOst|2aK#`+H z3e}fdY=Evl56-?S)XZ%`^PFbPUo{Jdj(mVM%VyyZKmRWN^6R&;=kM>}cR%|k`a3J} z^!7D){)r9v`48X3`qlHXZuJ}-Ir=^h9DWzS`rX^Oe*YpiJh2w~d>RkE60zD;q*(OO zI&%@1MaMOzBh{Sdf<+01Rf!~Pnm_{eCn-mX1VXZ11qF>yYOWee8k2N;2GqG4s5vC0 zQy(O#Z0V1{@ieM8B|8;Ls|p%g+-vhQMY=5`9#7=zF+Vv1`t*1tWmEn7R6(pK*b*VP zBp{aRj>}de%a#U9YA|+|TF@02gd9Z-GEM9~UV)h01Vq~tY0?)5xit6ykvpMoFqiqlZDlBOkN6NS%*76RfHU8`HrL_Mh0!CBc6W8c&AdN zCsJCJGlR|rIzOpj3cD7mHZ9VuY9yQ0;sr>UE)n6T6hW3p<)l-aQW0uW2%Yj+mI|^( z(HKV~JtGv2-9;#8t$(^U*$aL2N~dsy6Sdd^S$P1Gmgm5*rU05HHYk=^5Isi^^@0La zZ0*BjeW=jfw)dCA-x!OEWgWs<8Wa1OGfNOvPv>r{QRryv=h32swSEg@gv<-;;zqQn z5!RFj!+g82Jhv^%g{CA1)rJ@>sI;J>UJrl0KlC&6;q8bMFU9yp(DT1~4SzZP54`rv zH!wPI9Hz>r!Bg&o=+rn&3-UsUJQR^}Q5ZXRH2nO0uxdkIfsVLb&qt*!)6!|w~)#&E1))75YnX;i%`SD zA~@(gFI`Z9hQ)Q5w{sSL_VG{f(XEg1r)%#*(P@BkZk}+m8a^b$!VW!|ESL8ggo95e z%tI(WphpY8PBr{nlnA16j&ICBW;^xO8s#F(Cr?ITh%bU@yHqy@n|l>_dY%cJyPdE^ zxFKe=3>G?XcC;(7u090IYa&pp_7Jiy{*z=_+M&Qx3$w6$Rs|MSP+up=pqL^8nUszI}satl&H&0Ma!EZTftXP;L{b}`T9k){P0`r3I2Y=m5eSlvg||$G`Be$nF`&TKJ_UO7!US2)pBXWwi)oa-CKR~Z3xzgE_mFfra6 zGOv;N?Sa2RZc0YHJzac7BF{-d&8jZQd}Z*?jf1K`AK?vJ1lFh!(_=wcyB-mpMuc}5 zgw=Ucj}5YvDNwdsp{UIg*L27F>2$pZz|R>A)j+;*=FR?A@(HEeyHUEe6XxaBD5vd; zUDHwb)J(L#ybxWlEkX6}8K{1u54~?JN8_`z#lG3!Ugyg5{5&*2KUc(8|LSQh`^iqM z{mrx3^!pdF@|U|Y_q!X=|BY3c_q~l+{?lD(+&zGqUtfi}-`|MdH&>$P8!IvMd+Ra% z>nl*Vt6%tdY1-J0SO5Gb{(AX67(4A~+1v}q!YVjsSHRI+g20$y1cdw3eKZQ85rKj% zpE_l{AjyLQeGnEJ0A-p>f+Zp9SAq-ni|`v$v8I!rdmX4;*MZs%-KbgLh4K|G zC|XiW+a1D>j(vV9>b7;GmVS?#oju4|Q7Ig@J2%v!XmdSEw=|+~QyubX4x6*8OvpNL zyoeoZuA{M9TZMv+)D8-*D@x#8SB>f?J5aKt8P(5pqwcw06w|hST_x=6*~dyF%GrQq zD?8P!M**Rb(l|foE8fnIBH0mVHF7pmzbLeCs)2*}V4E3wOHe;&>6&SG0?rW45B?$u^Yiq&Ye5XDeHdb3WeBZQ?i|+qR)f)a}^es*^)5 zQ~ETG<+I%=d!`dDug^ivOMRj(&Yevnz2UV1R6W;&+^u!4Hc~mM9&zla+QqS03WN8v z*0mIt?rullwD)=baMdJ#IQubiGoZ7F!FOT_bbwIP@K$wYMt zje%ol8=*ynY$?t}aKRI8qFy#Y;$sv))d|C@3X#T+Iyq0nt8-!7+(7lyb@ObWurSxo zabT(~1T$Y-ij*cDe5_%}nOlry-`xnW+z13$B%|YN3x$Kx;-|WWh4R!&x>j3MXn1*! zaOmlo9|80HBJ{ts0AAJ*WcB5slkQPL74h&cji#~d79@S{?lxGTU-&F*j^_tpT~q|!TszFmieOq%ETmYROvrEGmqjH4;$_o%_7lJ_ zv}rLp+;sDhT-r`t?z+)VRo zLKd}&A;@y7i;40~>JR%LGOn%^n)Pf^E+q759vF}lfgoKVmOU{CKX~UQ%$-|}GN%F^ zwFd0_=UX^;_}4h}>5uX82j9aU!bk6aAMgMD+xX{Szlrz$_AUJ5FJHs^|9lgF{{0L1 z%O777MESXsEW`2(Tsi+oTs-?HoIUkteD?4dmM!fI8SuT`jTDo0UGAu@|hh#n%# zi#B#4b7dXU=^m-1-;~L6mSJHlaMdu&a+e&6OBzMFx)hp?{Iv#;LoG7tew?|k7N)fg zi0;hBUvOB+uoxH77%eGx+0K!9wQ~AM+9MJw!xHao#ta zp#CyQWc9zpa1#4*aQ&=VuBZE^iSEaIuSn`O;b((?#kWrWQaF(Q@5pi{VQ_v4mxpkPL3MF>nd`hjbu%b_mC9VDx|jfFkCyC^lW~o2ZxX1#{PY{dGrtlj~>L;V+V2N=ssK{+&Hoyw+`>e9lELA z+W#qTAJ~g~2lwN_p#uUB5774By?FS^r?~gg9^BvavB2GrKgPXJKEb`cluo!s^IJgg|Kl}h!KK=v`PSSaK`z*fpU0S5A zsY3m(1~fd~L<@&vIF>k2vZMe-^Yc(OHy3RKHcW5TVqtL-W|hYyw>1hWZDCL~MskVk&fq zD$!6}i9o8~*OmZ3D8X?b(fo(=1)GZdc8zSIt zqVaaBY2uxRprR~$@pd2`FW6zAvDQOjOv9Rr9Q5fDp;pHu z+K?hh^+aQWAi5*0aR|}IQ(6WRm2z0p!m!My#$tmKj-)7ZCA36%Ku79CVr} z+Q*=}H8IH2MvIWkWGJaFZ8A(5${=nE-XReoKpB@_#rtr3AHmSkZ6cS!$7UD?u;~18(OVUl&8bcX+`p#1rAu+du2UF$R`Ri+%q#60hTEEWy=w0 zjYL>p0>&yl5Mqmmrrr#hd_1P62Z)freDR`dnzhUms&$x{5g_h43|X?fAjA3Pgoim2 z_IWj!ni+~o+F!Ms(@mU7HN|>Ug1x z$wYb7OeTO0f}|D_Ec0Ae<*ZrG{+sOIECHQfRaOE8L;*Wkw|evMT>+9oW^!y8qQchVTLK6$_X zk%Q03ej_4g(78Q5OUSRVgHI;SBl`>pYf_2NrXOjRyUQ@i-yfdd?uhV~K_i!;#WD`_ zE5gvE4~NEgG*YI>kmV~wZK@12tmCnuG#F(W)8IdG48pv|!;~OHccCX{I8)JX)_j?QaBL}Z^}e;w;9pB7KG9L z%ePStd6x;{Em=tHple()RXF_A)SHAHlf9=96Vh1%WFlmdBOyx|FC1vf;>KbOUAO!~ zTNXcF5bd%=%0v5Q2@@#q2*~L7;cI$isvFfy`;#WS;&cp7<4~k0QXgW*P+urN)ip80 zN7Ow!)g5kGff$|QhVd#-j7oFI_)K5AU$|4bNtmeh#R#sGek*UKFP1&C6#qQ?uF!Dz zqTip>$3;y-xH1Y8eI_GT5hKWQwi;)`d<6YgY+0^Ijzd&rDAH0Bg;hCQm)r9#$jC}Z zTyhMYC3M{>6U7UkaT7;j64XSn56Q;1R9$$sZ%j3mB*RJKZ$;)bT>>iuyas424P&f2d3)%G0hZ&$vWx_ z#YZdML^y`VbPR2Cd@OB`&+x<)%ES3bDCw9~*Qj)NjMhw}-@secJJl43spcTa(x}a9 zcZ}6|Vr(YO*(l`vvJ^UQGL405D#jcAM4pM+0b(B$o})78IhaoUOq~R8XB0f`;TWOu z5Os4t-ak@H=K&paOqMq$=zTF(Pv?e~&V@`*5uaoZ#AH(d#u;cI9ecEn#$qVl-5LV7 zoKSJ>NtPg2owQ%nN%e7F)_Ldn7^;`^ama0u(m5a3;hq}~FGnOjpQ1!ty$hn@TNnes z;yC!wHmCD`k35<~+QTq~`ZvWIjLCFdu6Kfo?t#?509p&M1jsbX=V1#KA(OoSRmkkw2%>zSHVDmM!`n;HdS&m_K*o{Rj_pm;|sDtELawn2#iXEfIT{0U4k z`Xi-XkN!87!oM<6%r&ZC8h~zXCGwu?6xP+1Uz-ITJHuUH0k*2vtS?9I)9nys@wQq) zoHIGD-&rrf+d7WZK7O&lGAvoEi@}aV+0vdRZ!))(35|CRf3>i+LRk8nHdZ5RMLF#2 z8d39PKmLiM*n?wu>Th4e^j8+5Y-tS0M4n6gC9>Se8trUJ&ldGt`D=%2L6mcw8T!>_$lcli6Ro#(OG{{7S0&~pJn!R| z_TKtHc&B)vdr1R+_|D7NwR0|>-Z2}i=GWp^Z$F7o|M4CC^$#!O-M_w$cmMtd{`lJ$ zY5VKg^Uv?#_wPK1zy9epfxrCz6}uo*9b7u|2b?&RAC=oO^0k(Z2b`Nba-a&z~K@8;5=Y?VJMo-Rq%VRsyyx zX9*UzEN8M=vKE&Jaw*Oh+fvAo$a6lvM3@hE)+tG^FeJ-zCba)647VcxG7Kljr8J4a zX3|^5=LfYddt0M;A;K~&zrOPxzJBzlu&t(Zft}aVxy<=ZJDLOx+ZsfDOn!gav4)fN zJg#h2&UtwsYnC(kOG>sZxAYYX&GKV|M{)G*0USTRAE%EU5)M8upFW8*CywLf$>TV2 z>L`w%Ifj#GjtXPUGiQznoH}_FCutw!%Lww}_=+t53jc2)!@Z06?9eB`FMfw#w$B6( zp8!7D=OT3X9t54Cz%jz%A@KG|!WqJ8j-LXKQki3f;{-afar!9jr|>L=XDOr;9H%Kf zML02(kMnccBUFb3j`KbST_gfbkp3rdI@d?rrw_a8=i{BBa-v=52e&Et5|72o?Y z@aZ1lAe{qyDg5{YIv)rhzfbrl=qU$$^bf*&L!f;heMtDog%5}D0j0f9c$e}p{z>H} zyhml;Cvd*KpWwkhI_4fq|B&ka;BQpVU+~!{f5XF1DZY>Ld`jSBy!Uq+xA*bRYwNLe zNfBl(c3{)aPAptmgIUX}FmF{I<}a{d{ zd_y;sR7N+q1kTmXaIUO}V?`bEmenA4X*F^dSHiNO4CeWz(9LuR>sQ0p=aC!x@=W_W{ zs;5MR=6U5JUEPz5^yzufQhPNsoOHYb5o)IAi}b8HWytJzB5zh9ifS{luC);J^Hk`q z(WAY^jEZs%Y8!2+YRN@Ow*$&L4b+`kNNG{QIKzb0IwjQ2nXt^xg`z1PA*GS9F3d;C z%2MRb&Vjlj5vASP`0<}!!Jj|;4u1ZJmvHp_pRo7jukjn2K)wBw-B`M^39X$L?ufhWC|bp|B+c!5;62oH$<*GIA6Ak)ISO!0EPFA6R3&MaXdm$IVgR zC`gGAC{jegsR&15ayT5xVJJun6Cua*lS1K02oWKtb3U=3(rj`%ZWJ9aIskUs&I|WN zp*%n!PfqQM4}yW(k&zk*b(%jkDgH1jTx~3l_eN`~J2tBP@Vm5R{D)D8=c>(^-)Tli ze-7GbxN`7RsYa_CmfX2D6%-FeV3J zK_{KR>7mHh$x&BpfYllcN1*}@jRus^g0ZYP2?d65%%R`6+mMW&f(*1cQ|Y|bp`%=l zzJ@GxIFm8go`yBebUs$75T5Nv=eimG<*`t78^!0sUfKY}=O!auAB{v?3Q}w;WaQ}( zpPmHIU~kCdXz?B3gGo~+3bH&hDh%?-P@zZ8GAuEP(Fl(XN4z2qnMN%PCOVf=5=1^G z%;gkDQpgtQEWzR(o2)n;^{N zsxpNmPno|Ab({KxKJOH52okEY;6vj(HH$65s)Xh)lj)h$3oywL44K+X+)HF>?(m~) z)Vh=wOtg@QYtsoi7PhKoqMS9$c`?f*I9rV~fyn6+Vb0( zd>l_%MEBGA`9lAb(^!8zbiU;gXZkS)>hlN#@2N1vKt85-=9 z(2_R=^;R#~V?7Z+c_dQZ$Du?Wh#3{3m{k*pQo7ErPT+O+0pQqO+>_m$xzCvu9}Hx zEE|Q^vH)a;1PX_tnh-koZA`GcqqCImFDfrgn=C_g=wyV4PDE&g8v3U2l3P(^&8lrmjNbI-3M)QveS%E_KD85)LbjoFZWAWCz zzl3bs2paEE&{WZR=}=>Qf;YnGzLVB$!N_zkL6Rl+=3rWB5<*&ah?zm#HL1eFoF!Re z_~l*&e^oLPsyYL5x(hHd(F3_Ni{YR-Kn2ZLTDJ9}d)F*ft!YIm%^jMy^rB{UE9y3M zqIJu3^gp){OWs(E1+TBhif?YjQ@?o`YreY`o8Nu{PyFI}Jp0>M@!}ufz-xc~7QXS` zTlmgLKfpR8RRj+MBKtxis%`F07*bji_AFgz6Q|0`;p}(YU4^ zmCNf+1P`IwOxb` zk>0qjQ#h}0rg>+}#_4F?)Ju8$(YCb@t=lL+{qD_M`q8+#2lX3zM4M~Y64te&Zhg1# z<-_R>n`oOtj&pkLItuAnZ98Y7fcnoC@zzP6n3rx&1# z+QnA*GhbYW#w~r1P*3gRybR9EaZcxLuCJ2%$z^$)!P|VydO9~5)if52y3JJ2rXFFb zU$e0r4b;!3?K9B0tzV>b9u7Iqd8D{hj>~Y!b#fjFTn|G!9;4%lIijCUTl>+xZH8zw zx050Dfy3e8vytw%FNd5ze_+$em8a9FUU5k<>dXsywP?3rb-&aMzIwe9n&kvqRulqp!!guU<%+;^&OQnxE~2Ur`KV>HgdM#uCU3o`~+zqwBjX1WB)9X}^tCa6a7u>&_;WywoQw z&UqeC_S#HAI!jU}Uq+T^tu2RrD{Gh63X+%!W0qZEnLxHGx9qNmc73VHm%F72rsY-0 zU)?0uS4+RQ4ZD8#B3`3)&AOjGL2JNjq|kgQYf%w$H`EKlT(_cF5a!xdB~a3wLrHTE zCdqTR)A(i?cB=XP`ZxqbXH#IUSXXwGZqImF9)o=dPn zQ-m%U11meQfX>(YIwOplKx8UB@Xil*;>wvn;OPFJ;Mk#`;rP*C;NadL;?$8};qs|J z;`lyFJNOPRo&Ae&1bTG;&v5_d2e@|OKXCT=uW@AGPjTkh?B9HFBxtlwMgH9cdD}UXpqW)yC+zj=JUluTF%fxiX`YNc` zRlvBVURdbsHdKp!hE0ty5wuGxpySHDH@i8F>h}|)~a$L!y=L8IcsWQSx?sm zU1y@~P#Mv_p}M6yr8r|aSuPRfUq+U*X1RT!RFLI|E+53flb_<)v3)pm{4h=(*pJhP z590LkV>of*7>=Jjf@7zT;>77A!m|AI>B9nFk>y|E{}yCNAMC;BI0f7}g`=-Ohn)^9 zp3Tp}nuK`#pu7SvWt;H|;dO%rd|M@RW}RL%vi zSE}1pzaBgCbppJ-+it|uwrtVH7tGd2c+O&_bTjSG#*REAwmJ0J;?!Y#KDEVaraoF9 z;T4k$uMUL_Y2S;F)ya6)%60#H@O}wWnc;1F(agtpfwvhiSh5A4vu4v+Wz!f?zX&{j zPYn+_o%+Rn;E?++@(tzL&H0ALPLz=_lt+wLffc*x0rXt49nTi!V23RWJ1tr~L*umD zs>4h9)Hd3FG1q{X?FPJ(W5BEQ8@^8Ezm{vl%XwBjpKrm7c^14t=LO@XT#LY~xmLWK zWBvkOv0EPDxqKV8&^ffFfPR~NYD1m@FXkKYoHGkg78>wGkpbItGAZ3eW0i%c^h*4s zs|?T9Wno2a64teAv7^C?RfRe%EY)LKO*U4RWnqU?i#N?m{9F-*Pol%IFFq81)P~|6 zLj?Yk6^B2X75Hvm8nzXwv9vuO?Opkpxx7U-BT3l&vofgsHD7dIn^ zCaAeI$t{0&4iacWRQSS7beHu+>1ZMF5cWKz}xm!H6p!mV>2ptbfIcj56ZW9 zqGU@OiZ;;%n&4dDjDk&Vl-7abt)1fYX%5S_b)jrWkBAr1z9Py~xVin&e$LNvuCI7o zyQs^tktWY{EOwYvwv84vJG;cOO19I4mX2TX1T8e4=oKNy`E%|3%^fJAW3j{3j`^k7 z&{c?SHCAkG$is7eHF#x4GhUnCf@kV0@%4dj?Ch?`v-4WHF#oP1)g8s zj0MdG)aA)Bt3iY1on|bo)nIL%9&5_g_~W)&_}k7oc(b<<&(MTwbzUNNRcP^anHF1Y ziFl>njNdM61OEPf;IH4o-QRu^z~Gtr?~`6tMjp@%=VwKwmb*xD(u)u``1_IK8kOs z$`fe}-d})H(|-D1O>at%67aai1%i?W7HMCXMfYo-;x#ZicB)(B1h z96CRei_?XJ&)oJx#F>&|D6>MI5`)RUZoz_Zuoaa}-BQpp|bPdQ0QxM{aM_jcUN%b0J(DkM3u_3lZi3zDb2+vDKa-|Nk=t-EW z4#X5qknpSEmKlOEY2Hw^SizDjEXl&Uyt2q~$evMx3F!gis}@6VklqwUTwlU5-52a*Ow~ReAcVVv$FZ zY2kDx&)Gs;BEp9g=S-5bQ%~OJG|t1|xRj zEu=nkdlpf9mX(OH&Y16jl3!5t=v~D441*xbc{^%`=?i2zYnBI3*9o$m9egqg!DP9x zEccQ@HgPQ6Jtre7K!&s+8M32gC`g?EYvMF0Lna~Ka|E=ZqfweV7RAXj6s3%YF?Iq1 zJ;o!{e-gCuGUR29Lr$^}ED51V5AZ-rz!-uImNXe`sWKQ6MnD-b7SU5jBiVC246*KT zW{ihZI~BT^Aoz@wAJfZ_e z!gJJEOkyHEcnb7Mo=`?jLS|ezJY`-8nH&H)9p9Wa9*I#hWF%7m-2LGtn}qZ*H8;62?Y(!q{8@Z;k6^ zMW|B&)2tH6LS#_&(Rt8qgXMGHVaAR z8A8^D<&|WiBO#Ns#WY(^Q{0EsMhM9k0bc^Ab3Xpvxtx5gcyT5RB}7u$2=<3S+kONt zLv0!zH&GDuY!NPAu27zlG2<~&;f^3`;*5wO!c0ExRhALCq-l8l(E9H+{fD; zlP8VEG>^%`*{7%1RCxQiWAr!~MvWhVN$wLcZo+6Ghb0>!!`N{nF=gs_L`H=|9vuu% ze>Y6<7>yWZ6wW<3hn%K-SKr*ZZ`7w)Di<~aqv(8=QJ=&ZaLD7pW5O2ak)x?^lpZ%8 zBa^2HEBYx~KTOT^7nn@jY~{^q6V;v=mogQj6DLxg;{+zBx??=0O;maaXVt!zFnDGM zV{)bs<)?e8HVAG?Dxc~rLN_JVnc{^>3U5mD#?&-Fk?xUB&kc0|AxMNAcUSpgvXbG0 zDJp*g)k7i2C#Cs{7pY!4I$mZlJT$>VwueKGduN5iM;{^bbDnA15D{l7FZPGwYmmd= z6oqlgo+6FGWjWtOdfxDhSwCZ>$jc#@mFkqXxn60%6qmqtxpBP|@>ftkbUbe^OQ9bf z*O$sj>Hbs)%ZdeA|*mgxV7Yc$?EXWZxZ9$l(29xk&>2ykvxO9{vK5 z@`Y2nJYRt*XR2`gom#C&BF#;BJC5cEEP*DZ&nOfqQVECJ@ueAvqdWMnwzrx11P`q92)E;3s3;GA0v z%k(m8qXs!MDuujcc7HiCIvhxCvLU@K4@q^|!k>$R;>Lk8WYSzAzRmzGg{kc}BsW{o z|LQ8t`PL?yPfQd9GRw7aSoi!)SXWh{ZufL#&dP^3tp(=3xe5ui9++qdKv;PS7JP3L ze2e0d(rZQCvole&s|`7uYlM6aOa4^t?iS8GyI-4+SehFIS0kCo&LZ7h6E_kW~T6!ikiCpwTuXv_EB94d1a$%wU7+G%IP=UN14ai}g z^C7aFWmnW2X#94tj7gP9x3N^q8k#2zIAEpq4*P=1rFndaJqFpmxiGQu6wSw+%WIIk zq8eFq3xs7ZmvL-sLg`aI!h+niwgMV@o@<)6mN1+s7bO3( zLP7eQS5*q<#H?ejnVkoDg9?EKG2*M^*lalh;@wc*U_#&YBE0kCXHb$8i*LNR6raBL zZT!dYU%(%J^DKV<+h_64&vxNgKYap!{KeDw)!V!9-LG%Nci!BHm!4UG=XcM>p^txn z3nzYq(}#b7!+U>%v&a63{d;}^e0~7~Gg^?7V}R3{kGgtVYgbkx&8!i=vK+H&QM#@Z z*{d3b=D2cQ6_QpJ2{Jfi^N@AD`1+uV=5ZBJuPzt0vOI^bMV4XV z^24p&rFy>XIE>+hITPg)Y0gqDOqR11zjAKAkYQm5p9e1P$AJ@{2+Q)bCywCc{(U%c zVBeR@u$(w~_>m0DS7iBD_`e0&K^(#9`}=X}=)1s8w#YsXT%>USe&EO<(3wg&3LG5* zZ?on2`5~NQ>vO^h!b!rZ1GJxTW(a48z}uY8`6Y1vMf^-;p%AsiY8DNV|AbO^@?!utLH z0k|BOXUUtx)Q-d44hlJbltRX_Vc@Zmz+)}I>6HHwhVq@@F&rAlM;J;QURI0;|HgY= zV{(#y^S%EBK4y#V_kleWzV{d4pM-b+1pH$d-u<&Ho%g^0AGFPBe{_Mj-=nnmxh&_C z!1;#Zy}wdje{hxIP~bPTkMRDl2^9YQw-i#ocPanxe@5;5GxmOSGhSFzh3yLp@N`cp zw$?eZwxs|Yy34S!)q!VgZTM-v9v`X{xEB!vght>-TqrKZhu}s`7%s)hu}2w$w@gV` zRgr~R{l#eL&WE)@4>L`C3Rlq0ypJXciyKk8x)()DTA}YL7FHVZZDyL}IFYuZ45>81 z(XXt4X;~Svmsg01V(z+nLLEJ5Xkxmul2C>G4Gn_OF5cEg+l?Zhd4+4Ajq=&n*TcTC z5jm94vbGi`+Ha(?3~Af2qC$Y<+5CAFg&a52WQ;$JGtp#*!P}h1mH#3H)>o^sxkQO4%QCRl9*^y`D0!9^5l=Z%up>7S zyJ=za94%0Go1*cwITqV#@%^oO1Drh*hKa0thZuYofV7o zRoGNzz`Ej8tS?buZK(@u$`n{Ngq7w0!m5fCtftBOx(do)nT8D&X(HtK8UpW=%JDX* zF*et0Xbdv2u~v-@HR%HDsc-A5l$c+ify&lQWcOI1nMD)ZMYUp5mANnv$;+%l=D|P< z6n!5}YUj|oF~1aLeY8lRNp;Qi5-OXIz7_}OH05A+V-99DSP3=}a(s594FlBQ8MF|Z zPK&3$Y9no%Da|sJkM`GE{!1+BC=^)MRg4vMt*n|}j+MP-BEFOsV9VIbyGf6EEe0&1 zb}j44#o`t-me8VT6sp;yU17%hG85Jo>*%-2!h!-iPpCi6 zpt0ytMPO^G6@^}7@nnqy<)LnVdD8jQ75n-kUJb|_6r=#wmm8K%BAQ3^17(`bq5m*!ppM1G+oW)N5SZ;;oSC|-QLO~E+aZ})JiiCZ3 zrAQB<@iEYXcRUj>hHyj`t1w9uC>GZvlDvczlYLG#)iVwrM!9f!Crfe@P6*jTO_t&g z&zvanHH<9P9no|>nCN_F?ed_8H2Bvlgp*IzynJC%&SbbGyTT!p<&uTDM68RD(iu#e zvmA?RQ32-sd@IHjgd%x$t}Fpr;UhGMQ=khIZEj1QO)Hq&KI z&RXTsGqXj=mgY>Bd$+3)(5(?bqs<%#=vb1?Vmao<7Dn|ALWh7V<}F@2LlA0-K}@X{ zv7OlnYu6#LJwsTRhf6JE2O7w>;WFlwj#da-QMzi(r@+Og9G`|YP3#!F-;k-)mlCg-&rk1N=?V|Iz z!GP?3CrXz$K+|qPTAdC#Jr3k`()p|kz~b%m@cTXQAXFIubFB$!&QuubnU>`=BADi8 zV)l(c&wf zxcDe2QWB7%NkdG0IQ&Aq5Tl4dVrBwP-8+M(CGF7BvsK?t?QO9jzDfgilTqlXXLZ;F zvU~GIsBALOz0nK_vk>)W|ccBIv0A*F`eP^m>yr3T3rgeomktEmmOS%MH|64%m8 z_pTcH4Z8~vTTJ%|N{=c?Lu`=>8k!Gk2~7AhdCX*Q8s+7D>|~nBVJ4WFAm+G~PY}pM zL^2c3OeQB+WD0^=+RtTTN{5K%3Th+m-t)1dO9+%-it~O^Hz}?imm{geAmneB|71H7>3koR;VB67C2wtkFU@6GhNf(1 zJL;aFF0}B=o@f&iCdE5iDXm|GY{48{n}XIC=L!iId7TRLzrO(B_~2fBQNPeEb9K zdH-AZ@cnP%qxV>+{B^whr&sXa?_Z&%J>gGp;CJu5gs;D{0?$1;69@Oah4aUMg|kP0 zN#UxJfyF`}rGnajZyoZx`@*m%X zd2t1D*47EKoJnuiD_79@F`O)yi16WL`EZT$$H{UgsU-qhBB2?>$#W^~-$5d){~d-C z*izbXvYajBxgBg-E|KN$+ z_|m61a`i9{pWcU)ClBJ>$)h-P=pfDlnO!4R>x_!^3OWfUDQ=IfZvAe)q;zJQ%!+hl7{# z;JORi#q7jgF{ObjBqDYj`twoAFo~9*_IirLp**gWJ!c z7*DR3_29*EC=|z`Q0SZw!|=9zp|7rb1VleC({Ff@aNdP0LtuS(q4&;p4XckGyq-Ht z=@+OSXEAu>0InR|>k9XOio3^-;Lg#*0=Mbr#Tw=}j~~Vj!XVwWF4IlwB8BHq9KyNd zbfY8i_IXOXaQZ0S_zpk9g~xF5#9^F2NXI#F5V!a3!~K19y!{{J`u>k_{?HzrI=lzR z_wB)%eV^d^;X}B0hR)0Tm+J!`1s>qfG2JSdEkzp2d)Kr;z*1?ewh`GmE{>|q(x5Cydvb!$c3icjAV+Z z_c>vjU4h(zYS_C?HT1BT;=|Jz|2eHlOtN(Jpyy8+ z^{Yxn$lx@#V8~eFMEW9{)X{{JLymJ9{-i91j;*E#VggSv*O#Gaz=C#qh?TTzP}^%k zX{!NkeFd1_Rfq+1YEeafuWQXlcY_hLX~EcClY-`oShUwCW1vrulHxE7%rv5_O@$e4 zYRqg%$Hp0X_~mo+={);0e*W|vBu$c`I@1T=+0=>afBy!4Pifzw@%h=VUL5$@4!r+^ zwfOMI8*$(dPh)OV8v5%~&_n2|OGS6H7EQG(R2C zMrU_6I=W0~Z#STo_O~`?igL}hYBbiSqoZZ098GM$4Aqq>sHsX7;B7`#g+hcywP`T6 z)8et$1m%oEq|c^_)T~^j&N3o;u>lFoX(2qT9GbpLnrv4>v#1D0nh56%nBbUK0^6)Y z#ifO4 zp6$f^u6#UC3(db80&qTYGCm9Tz^yPp>`}_`&AcScZ&9PVPlwXk7Fc`q2rzn~c!2|U z>W`iJWtnA04z;0jNe!I+#R$#_5jw$@UFAsD$D_Kl0%6KfL>ppZYs-U@79>o{G_7nw z+3ZqS>D&v|`@`I2KzMNk{Hr42-xLSsQX4WBSdiJBiD0uoOtesGTwM?AtbCz^nbDJj z5Jw_REjdtE8U$&OR;L%FKytALG1e3~+RET2_d~KS4ITmB@C){bJSswvGJgJEhzJix zTx_I}V`0m3CcruL3G_xlkS{{Rg9K4N+_F3(CR~u}tXV$VZ5+mXPJ)Nr7n7pBg*=e0 zldjiBI(N#m5Nb=rlkdEWmEYMR^l+J!2`@{5e?bf)X|WhunT#;H?$|nB*=iP6wMvULuW&54Ji_Z!jah*$OvZ1fol|@Xn6K)XZ?` zdkQfw-5;LWQP6fdFhv&vH+>j#=hr}%G7VDWP7#E*JuPGJV zyq^hmCd!#O=TD+pZiPv3_3APKCdyfhoVWFxY9A5koW_K>1TLdkm=E<5x^FC|F{F6R zl03+lPmRyYKKp18z;pl&VVW?Kar&KB#eMIJ-&g&hc^F*}>;yNuRw*pYBaC4f$=1gcWSBTv27f{r%aORtkQg`uQK1tM95@!C!Q&C? zD}y3rB;q|~NT4$5F;fs0Itf00qYxG>Lu|xI#Dq>ng#Sduhj}3~aIz>9<}X7;pbSA? zG6Z{#K~$g{VnW;yM&$y%We6ZdhfhV2|9C`&({X}i2n~?IeWDCLOp1?{!E@pm_`8pT zmzxY@M#(U0qzvQ6%P?v3SWKKS4r67MZ~Q1sn>Y@BZqqPYHi<9+`p9U*=rg#CpO<6NBFz0H8o$ zzk6T2nDEYshM}bZtXV!X&I|ULRf0TYOXrB96r^|N2(9ecX1#Fw$qqjw=-I}hZ$%15 z(!Ex{r~*ly7KBx&)3E}DM!J_hT40JP6dqQ&_zGlProV8~J37M${>}vWIpQ%jJ4}S) z1wdUUBCFKUcIQCTWfRc#<|2Eb5cc`yaMFFbXn8$KS2ZDbK?TxUjEE{vLwrpJk{fhT zcUX`+uUtrzu)Isz>SlT#(Oid~Yw{{3+_FR9p%0>aupAMlNIdn{ZoGf~Jz?P za(Oty`94eeS+2!D$P*cQB?6*+k!noAWn4u`e!v5#ThfA(*~TG0Z`hgOTQZMw-*u=T?aH#F|X;tjX%h7wNoT+f8$onZ+>l7l?9t znlp3ULeFQ*KnYAUi$r?Xbce{FJy0xUUaWJ<9_=^JqL9F4%#_aiIL>*EguEfAs_bMn zk2Q&hLg$h?IBD*myP!(!FIZYH;!?=6Cv5b>`SLk0ft|GSekqi|j$BJuG`q?yq4JcM zWoh_WEEB_$DlE&w(kbPuT3s?K6mp!URZ52>RVpYS%dS*y>=tFp`72eHW}!IC$TaVo zC8Sw6pOBH+F%vbL`%txcI_2p_&DMU@Z<~p_?K4H3EoFIs>r?a5@$^E}?-&sK+n!#4 z&Sw^(ao22gJ--AU&n^;aExYHT^~rf?+dUs$Pc20E)0Ah+49xr5I#jRg#@e@cWAWEF zq4%jpnElc!wC|WBtj>F%T8#OxZp6R~D>3)gby)Dm2J}6@3@tlmqiAI-`d?m--WQf& z`pe5O`_0v8eR?*gyG=FWb(6w%VeIfETHV9{)!Bq;ONx%39 zTangj#(1qid~>2P?~S!cY}C>`CK=UFwxQz5c39|{$xdY10jipwk!&^2jzr_9o8Va- zgZ7u_3%^pKCCOOy&Gm?&Ik;a%f^dAw&QMuSg{|E6>nen`IqQ1=cVszRmgj6`sfkMH zHkKoMd$l0R)$3?YwXqbrPc#W@aOFS_x?Y%vBe;nDpPj@d+`u*5#PQoF@$rREu=nbI z?7eXa|Gc;dA6(yyPaYn{ySMh@4_80Hl5cOM^P&TeWz{HO--5g)mDu*%=dllGu;>RH z@x3$eV8^?!LPhiWqTL;+e{-Igrxd^1FD&8NGMd}UGAzz#yTnTXcD%{f5xB8 zh_md7l=e7L?$R)?fS&4>i1IHZ%dP7vKh06t*`sqkjpxE5MAMqizc?15MRABPNP=gw z8>WVjLB~KTe)yAT@#1rf@&4bw1>msIAU}8NH@J4?&$v1GSKPV&cig%9SKPh$SKPn+ z58S@|F0JYJ;j>#G;?$v^;MV2;z=?xz6dxovRd8c|+W zgy!Z}lvGrrpt=|tP92QR4lMcBR&>3-3bilKL;h2}D150OC9ljx>C647e0c_{XuJB= z*)F^?M})aMTg6ui#m`Mg(X+iMex@I#PZM@hd}9axfn!+r>*oboZdq0Rh%8s{tbIh5 z4=2GTNQC+SKak~;X1Q@~l_1N1M!(Zbd%rJ?0IeJ9{*!}G(JpQ;VR-#t2B{5_6pKWb zGkKm)Yu~)t<$^3fe*KuxESF?h*um%Hn&m9R!kXo$DEvyZ{44z5hU~)q`#5*w7OoB6 z#+}QA<5vLo`FQUE4&J?igSabj^5I=vxOW>jZr-I6>Nc+3x{E7!ZsYQuyM)`gbocJR zaOWN_+;!pny?^2C{kucBEy6Pb4{)0C;GT%P_T9vJf$MZk#!YeT3skqO-UqmF=QB`q z>7@P)H?Mz2;R9;ZJ<%S{%jLNqsjf?RZ{y1CyBMUC{3hkSGf3qql=5@CxgVV8+HF@q zZ%{vnhl97i*l(_r+jO3fckhegze^w9f6g;V^||V%<8s|}e9;El=CqqP?&8+dpp-@Qp~ypC&ku3_-@b=DmXDK{;Olap>Tu*mLAlymxdj_Fp=O_YNPxhoA1p!BceOymtv(fBZc1Hnk&v zR~PD@nu(GPZ7AH>iu^6jFs&~|(UM#&oSu#EI+eH{8x8mbfL7-KEy@t?1H=U2c6ucC z6=-nmd)rZ8uR(pE9Z&ywJAQWR*Vy&v*YMO|zlFLDeVDm(3BL7*xA66!e;v=g^*rTy z9yXfzTjmuDs{!>uJ~HMMK}(B74%24jBc(4_gzDLaA}x~^ky#7N1vno=w}8ECmqR(f z0O^Y<-;z>fETsoOh3X|m&@3&3c6li>msg08;mLczcgKX*k)LfnIDC+sx-888!>%u9y(^{z*sDYZ@dio&1tCX zGohwahrEJV6wo3wDoBQ=ay3@Yt3qW#GUoOdW82ye{QaHhv1(Qk3QfT%$_d4s=~k>? zQ;kInohUAghQa2K+D;9ebt%vnML|;#2~A-P?9E!(nlvcv%RxbZ4hm=3Q818;!dZDJ zoRg2Dxefu|7T|Qs!}*=PRupzy1d68HP)PBD9t#{@*~sfK!rrDw4lQJDEjn16GeyX0 zQaXdTE!6jnZXJ|;*+{2zBE8oMO*bt{`?QEzph3c73)Iu;_n%&g#M#A&otp#2>@27T zGNGPng__zWBqkP^g`|W8jGeZV%CoRi;l+ISRu?tKhj9Zv3h(sxj zUu1@28C$v2aVbn)NeklDg;1?=B5kD;Da&2f772^;5V+T*Q`YT z937o&cEry$Vyx90`V}QeT3dwpO+|=Vork1V1yC-jKrt->St1~ySPkb=T6`t>qH+5| z$Wr{_W=}?Zj}zXN8bo&Gz_PX#x+T>@mSC*O52yxVxl#xhAc0;7Emioq7YO;eJzVYNKKL;%stEzP&Al?oI`w7CPpfz!7Dowapf9}NOZ?&g{RBH zd}g`$bbU&C01TZDjEI{mK2eV<%E0IpU-8+tr!g8H`Uvqk_vkbq;V4)`<27FGFQg@S znwxJVG;?AVhDb0*M3o6{djv@k&~NwlyfI)l^V`^`dr zC8$XyEX(;`xbE*S3$i?Qkwa*fvx8686ldM?;beIvomaf591bSLnFyCib50AJktGm5 zQ!m2Mew`r9nJniznH*;_oGrRI&X(o5yW241mz!KxUhB$59^S{>smqw~&PUbjvjuU@ zR^k#V&X(q^QO@KyTb4`d5=qXaxkQ|^l{s5FaTvca7f}mxAYWiZtq!&dh?}fF2QZsgJYGf+**<#0p&Mc&{SX)JOZ%pX zGLey!sU9yx6XFuQ5fMq}WYBoHQ9C@{#=_sn1Jm3l3ONohuZfsEbp*ywmSOU=v6$jL zQOIz(O&)`3Q^vt_>O=(6_37_L*PgGRut*LMr)w{88iE5n5a8_rFSkkX^%#SQz)47m z@IV5!IZi$W@{sW^vOL;@u2VNeDTCmhcZ{gV+KcezfmDFgn^Bvd}3Aqx*}lwLp;PBNM%Z zGv45wSRsp&R7>~EKBurSXASd|o*a5s&^@Wm0GV7Stj*Kd!EQ?yBHQVFr;y3?#9o__ zZ;7YpnV5gf$U}Um83{dfezzK+nNRZss)zH&wws`wMdu+s%XwQt&%H#dE4on&b{r_2 z2{vU4aN5+Ia0HYlA-qO~I67V$AB*yHoE;Jd79~L0L)R#k3#nBhw$muU^(s2DAum=y z7Bdc;zqbQF-unwdma7`{h_6f+av{NKa-mrs9vdb!%YFQ(!8d@;E&A;l{(hc_2oFMX zQY_RNsfbUAqVpvJDs37PQxl+4E9oBVk7?7~1^BCcuN31qRkXj`( zs}P-^jKqozB-dpjrc#ZlDisnMG7(!#zhj*SiWa&r(0nkcI8lHJKJFj)C7RNitc$Fr z^PnOHo&_<8X{WLsI>dEmA+b}B#EvXMCJ9H5v_GyP1FD-liS8HeGusREG=G|qKt2(4C#yo`{lWU-I)@$-$37g?u-yq4~% ztaCpM!R3hvsi0>?l|q1Dv<8(W2(rt!Fq-nDA*wzdp80aBD?>P{C>&@~UMasX&EtZ2oG6{0ak8E@Z?mIJ z;iQwwu~W{+F^$?PVd{{BPfthWqjFN&;dMz6&OV2M`^J4|aNpT!C$}@an#P{`$c{kS z;VC;3mGbfn5_TjiIS=Kw^Rf7tK9XZm3b}pkOqAOvrE@zcbDdNlmmO;gz<6^ICg+5~ zJwFoDob(KKL}6-f1SYZ*)V%*6dv5_A$#rcD_wZ;&%q+E}Zn4y@7PP3#LO|>E(#7Nx|?f(}G_;lci3XKO5XzuA6M;&u?Lz5w-O#Qo5`Z%6dJDTGMKvV;1iJ@JXD)ml)kOiS*iR2G~*cjCkMeuFcoev4Db zpTS2bp2MfdpTkE7p2jDKp2gw!AH~Td&*1DQuj1sPNASssr?BrYcj3r~58&AT-{A1R zM{tbl0Vgmu*$$&#gUX6x)YjIbtfCwlg=QE^O=w!xi{F0y7GD1LLp=V?+j!vI8@TV{ z@9@wMZ{g7&-^7zNefp=j@yyTf;#vHK?5|?_#P@%~3wRH&;2>VY0h&L67qK5Nvwi;o z-oh~~e`Kcs%k>m{Ygbd;&7k-0S^<_P(0%+@V7XMzQwGOp*5l>>Kgh5o(euDyxqe&y zWw88-FMo&Y|N4NC+>yX?2D$lsW`gAme*Y`b{L15VU7j*fZrs&$nOSZgEXH3xc~2zx zWM=uHLx02ZL;D1?d?r|a;?z<6lHl_f`~T8pUr{%7@bfdch#&FYxeEd)#~0`E)!DD{ z`Og<=a5#@MKcB~!-=D`f7taD;pC>zupU$1fk7VDUzliTHT%_r@f46hrU$*bgTkM+) z-{a!NZ*hU`n~OO2&9^xF?YH>yyYKPE_iQx({Y8BB-Fck*_AJ$*MoY*0?!sBxCm-iq z{CM_zvLEo%*FTW~-_z-Qa}IPNz`2V*;p{ix)Be827eAaQJ4^QUB|9tj%g4KLkDcEl9ourf-(9dwdHEuhGoZ}pcb4k$^x~y@QvH9n9Z$L5 z%IS~WD6+C&6>@bd>I3RSVSbypeZGVtDxZ}t8lba84{K)$_eC&OEKpp2_P9G2; z`#T3e#DODpjITbU*7zN+e(F}_tf9_(O*IPl4v^ik+O;(T)YD8F(b%7Y>kFcB zQtkuTI08;KfTt~f^s~d)0rvPb$`kLUN8st9O7xY+VWc|;SKm5~r~dK?s#nzGjyHde z=TH0*L)#|=SpL^f-pBL%UctuS>_*yXA>>VQg4vxgR)nO{l7Fz2F>*Y{D`8wtg9I%n zFDVsex@8r@cpaN=k_M2eN~El;K=O1YlBUa$Fj0#53ED3+(5Fg~G(`>@1L?HPQ%*d> z^>~^vSxj{cXj&kc=801lMmn?2xjc>>**Ip7Pp}n;DKEz^%SFss4m3;hpdV++m^P^C zSPbeUP3OS8p7ygM6Y*dzhwoM>>R>%k6ndl|N12EeeO0q`O2@b@9-b-hd(}z*Is@UPdDcs{Yyhy-%> z6Uli@>7;wvmIG6(4yoN*L@kMjYK$D`)+`u$st`*1^y||haw*v;1?F9eLU)*d6Mo?# z8M928ZOSh@w9`e1S(YOb0IJ5a#8fj*znxSznkm>QamzBvvc)u>*{b7N)LwGQvZ?)0 z+gP3p?IhiwsXU>Ln7Xo10M{ui=vvq0BW*(gw3`c|-azNFt`MBL-^3b-_begVrRS66$tB|q08dgc3kQbGS{>9mk%*{@Ll6c1tQ{OpzejRgI)d{kn9qxVZmb;Y zo*dZaL_pJB2+y2Y#8#N$XN-cfG#>uNYItWyz|>m|_hbcp}&dF44nAa zsNq=|4!=4EYl0BokSdaKru7#gsxA$_dC^!9=MF_l91)3`Q(d2yc)>1b z&GL{TBUF>wBEhG`EDxsuk^yrD%L7JIFDLb!36M*ya+YA>G6u|fJ(ux1o|m-Dy*lFs zP|j>|)HLx^l%7>K2FF9_`DHMiw`Zvp4${>F>4+Pl^>pt7dsE@iq=MI&0ghujxQ)|q zw=5k&^h`2P&K5FkNi515=B!oDdgjb5XRw?Te9FtC1X#`qJ{SAVfwTWYczG{Epxa_7 zovab+ZjWFe2l&YC;plG#d9*tmJmw%MS4J;TK1?aPzc+tH(lk``IEO*a>ca3u!;r@Q_=> z&6n5P(S8=f+Gc@x*<@?C2=UW`%`xE^h7%VaEWv6+NF$a}h*+ zkV5GSe>or57QTKCWH$8N+Cv$%7=B)};pZ_+u--kLm=(VW!2#9?^rd?cU;}p_D+I-O z!7;)K{+VG=R3#v3ycE7Ii3sSWwlQEp48P!@d(B`ux9{*iBbZs9v$hF~^!@@YSC*#G zbK(SRjX&P`=A_W==6M<2yP$$3WR27b{cP5RE}g80cSbN|%7t*xPzr|atXL<=E8_%< zoL{W_)YETRpMdzuQaDwr==eDZ8_tG5OT=^;;nA1`*9NUv_UokIpZe&qkvs%+nGiah zi=dti_)`C=?8}65AWJMO`!k^EN<(lDJsW){g!QK*d>{i6gJwhyWg=>r+A@_zk7SEF z{;f#}>_|mGdy1G3p?=n{p7Rvw;nffa_r^H5kzeG@FT%K96FvJCYGf|2#GBuKfM-s> zj>Spt0>GP-=t5(v89~Y6uy(hFqlW{WsjaYPxh6guwl)ieZn?jor}&z{m-Q?AS|?+gE*}k{z`8+`PvJx{NtZLMdNfkbS-9N zFR2jh`B=KQoDe;GWj%7~x64`6h&=KoGgsEZw7g2l>Zp4%p&cf_h7wXIsrOH=cfN?{qBD}?bpmuJ)Z?9G+P+C*g=%7pQJ?pE@Pch;kL zccYlk+g5}8?X@V_Q74R-bGFd_H&&tis!kMaZ=&FrJr|i}$vRI{7=BQM9K`Eb~;F=Q;(uTK+?0 zxsQgMhfs5UpOC_k&beea?Sq!3dA?6o*Y=?Lx?WM2r)+#I>74jlc%RaF@VV99GK8ud z`cQFQkC?KRU)wE==ks>9qHqsg*EKyTzmC?Cm0jC=*)lfK??rWr_I4tFSDUC?aeY6k zZyG}74Fke>o07dVEvVbujjr35pp@>9EN%f( zXq;-ip$CgH+z?M=4&M`5{6cE87It?5{cc5c&BpaLXue}yXq3;RXMWi|8=&var@oMU z6!Ia4Z=ZmM^J|ocp!v38k@&LgmR@9C(-tgEQaQQK&|V;Lg4_3$r=#)=0vBbZ`4 zMR62*?wrKJOiw7=wW6(XTVh!l{rU=I?{5CLU^&aMnCKZvBtKZQDo3!aS%!rHbK}lx z7-?UeBScC4+;8?jgDns2K}xwEDq{?a>I#sZXF#-CN&Qv;5>nMrr$o`1=?lLYKZNS3 zze)^3U|I;|X~Brfi$N0kTkRWqvG?)o@${h=aMN4&z@tbBznUoVe3`e_39y`jZsXO> zh}%?#)ZO)nUQ+2>FcEj>BmD z<1vuGCQ~-1P^^0rOMkTm<`vZxt5i@sDYpRMd+HEHZG^#c2>_RpcS_3=V9xa=uw1Gm zm0t;dUkRFDx&BI%KAaly`11vVwSTE3u8&YB>4Qr{<}?f?80ZbfS+*UvorYq;suK|$LC+-TW&Bv zUBKtxe~mA``x@sjevKc_eGPm?_9fZZU*jjTAJ3k{k6&N7Y(IVV%|FzkrKmd;(`LeuJ;6QJ$q^vz@g7s#Y@m}y+b>)51v(s^EKeBLvczoU9=(tg-@AAI~TzB@i|4<=x8mOM^gCMSYxquF3$H(a>AqRavfuOHd}T43=j#&JDelcT`0|_Y$i5fz z-~9M3t*3fF&^dhfC60V@90$)(r}Xi096rGy_fecaegtQZQD<}1(s`ZaH+^KMP9DX_ zM-SlBqxVJOn5I#F`5Fa1k50+#(ePkbXe*19h@P{}-cJj~%I8Jur;QKgy z=tCT&x(ALQz+tMxZxs(6`YR3|c@H0)_y8ZA+>c{loWTcljKA%FAN!7eh*K9&&-!YzZniC!SHH|McNb%4lJ=TSR{1LwSy%>dLw?g6q+G&X2=oMlNrXVkv>Vz z*%SpMWE^N|CyJ3YSuOza1-(!tR=4~{Rd-^oB?!RC)Ht)U&Be_DBw<|z&vwRBT`pa3Ej4oHAP5WTL|@v zEJX6XWSh=G@+xu+#`4f{|1|D8^eEQfy$XLk^dgR3*pD|3{~m`g9>(T7w_x+#+c30c z7|V7}AidHA-*68sw4Vhrh#rjO!#Wz$X3eOR6e-P$}PuFFI8R5~=wW}$M!L>^Mec{DB0fnj+T(k9c9y(A6wbZtxO zwAfV;k7tuZa3RPZ@LmYWt?_e!Bfj%>$Gee%*i@)SMVF4QAqx?M>F`SNLkT%Xs%7~I z7|%usosalBVk8F{6Q!_A^?9LFYYrl`Xbv>ku_Bg1K$st z_n>X6x(bk%9}i7&oM0>JhWPXGJY;m{AtX&-Fl9~$; zR+J1*co|Y24{d9PNZRF<5{&G&QUqwjvGLmN@D7&4h8eDIPOx{h!6NGgPzDDGZQR8) zZ|h_OD|;*0I9dzv#@*9J)U&o>z;7X(T9E| zsG1EzUtHUr3q^%iB=DT4aTUP1X{Z!3r4{BzIEdtE#-2ivT#Xa1MVB+6XDdK*mW{Aa z2}Ddo2AuW52rkt^U2nu33W9ucqXZbw^SodF^qtw}Rw-UWmvo-d1CE7CB#%>@rS_?4 z(ITiN5ushF2=7S~Y;p$5S<9T+ECK1PVa~ea43zUem{HEman=Q8aGZ6_nYqR5IN0XIVUmV9Gtc>RXa>R=6c1TK zK^9FJ2xm4qgW(LM^Lhr+835<0kYBk3o->=A0dm12pUM^bn!HXmo+Dm_sfRMe^UVPa zv-UaRDKo`Am+0Xzk|Gj;N?>`=2;T>j0Lxj5MFPv+JL2Ki8Vmn+Ew!0MMAj!jT@j0b zRA0<@mBBw~F+v0E5bfs(mA4brKCXzCyCPWW48LGU_ypTwkt2haHVE>ufrsO4_<38w z(|ikvu9u!B7u;Oe>vHg>Zxf00bE!<}6g zh`I~yWw3UZ!OBJkJI4iZcBAcSyZQ8-SlcbcqQ&#EaM1$V&I$``7Gs{Rm3YxK$5w^~ zwC!9g8RjpP!Jf8vpk+temo-i8o#(*C%}TJ{JzZwQpBeCeGWdANpzxoAxCnY)A{+%{ zo*CwH&jsSToZaRkFxmt5VRi_}4ihpg+!uQ^#S5^UnfviHPKFQaq3BK$FM3p?S)!lL z-_VN1207$~8U*IYK^9;GxhVz@|K(*k$15Q7oQL_5?vQ!SgQhVHoV-uwP5psl5zGUn z@XidUXLXTy(IsS$d}T-(EP$duNwC|4XHfs?)mE4+GZ}VuD)`ZJ z?#C|}8nkf84#N6puEy2Bze^zL%s|+g{NO-Smb8&YFCw#sEYXSj)^KPB zvk};sh%mapk-h2Sm-e_oDgq} z#&s%7B3~?(e6m#XrBYUsZ?c+vl+}fZohBb(ipK2Kc}QAI{@R*+Vae+Xk+6!!{Y&LZ z>$xmnOp|ELW=mN^<2(6i+9^60>JJiVtWH{)4c(eT7&a6kX+^GBpS+UluFgfus{FrC z$&#sm4Q!7?`daeu$X{6T+)gZebOY``{uJ&z_9U+R>%GX?NaH8@E-cBAy}g0_L-K1k zlnIbgx2^q~{Pj04MCa2clfCnyw#0`L;IH?dn0wkR=&s_Nr<$?(GwjLV0VeQM0!T#akNDddm>X z_=UudMl|0#B&ODRo=Bo`FmHVooO9(cttb)gM5bMYG-^vlS9j5Mw;+STwhgsty=@sn znrJ-A3qjYlV~C?z%gq!3WrYfD*AF6;`U=m=NL1ZCgtSdHFkjV%{G0j&$i@;GOeCqh zaR^BRnQ%?_!-{*>LQx!vu;xSz|7MN&x?^#U4>-wa?ahNCPg4$^XZq$kx<|ES^+Lzo zw5`E%pSRVE`^dmP>zzAPDqvd?L_SA`kZ<8_7$}b(;8?&YWSQ=L`!S@|nW0P$gT34V zv#n>royIm}nieT3u~1MSrizb1yg`HT#4rSFL*NXZTc-)yF8xSf6S^P;g=+=r1rmx;y#Mw zbgRp$J=a(Ob7~{WbiNYXR{}*jfh8L!w&Z@7jR9dzRpd zM|T51etNsHj|MOR$A62tSS+fw7Qb|#Yz!JM)jES z9zMpBUu{O#nmUmuENLy>Pii*;EZ;=i(DU~nf#qD6ncHj9>>Y zN@PW`t{m;tTW^T{NmtGWHX_oV~*x&EnKc2s|{_pmW`?nn9@7FJk zulv%q^ET(seT{Fwy@+!c&f?UWlQ@3z7|xurbRZ{=9~E}$*kNHOI8*UuJA^aG5B>*s zSlHpYx zDjKksk)u9Zj*KNGNMBk6J+p`>&4^r>yxKSC?G4N;}#=+S^odBj;CQXAO^H1LQa9O0AHDHK1Jt5 z&RFbJ4m8WNp_*iH#{%$hAjpBAnu2crw6u6_JzhNd3jTKfJ^cBzcd-AP1NhUKxA4TD z9>YVw`xRQp>haq@K8D_9%~-Q>6tBGgD27Ix&_7g9%fr}l%}U&M-)^klFo@s&_6`gV zlwf$c91lHuHP&qC$KIP(?h+SZ_HNYG7Df%zYSfR1gtZt&Y(G87Y9MCsTeb80oUTm3E?R( zb9urN3YO`2PocJuNNs`Z^OS#64ni1&W8j{XGo~&p6v>Df#O7@hms4OqnFRv{5hbJP z=;=$xD!QiK<;i$b7m4!f9$7)iT~Y>{SQq5e^W&T*r?L*Ti zrq&>ml0}urLtT-8U@A+gOGiLz81h<65t*ieY=I1%jMF2~3(mf-P(&!;;O+qbU_XSa zLg1_LfjmS`Q(ySgePF2-PUgw%at73yS=x19}{^K8ru zcZNJu1^akE*l0ZAVF<>(e|{WO_in}Fcz2-{98eZ5K7HlS?>)=HMbay;@(3uZ;}BdC z3kSVFd<&zYZlShHZ8Wqd3G?Dz>H6al- zLeoHPvRVh*BtPhS3NeeyIO%8JWP?Z+YMttj)PZ8SXGegw%k{%$n5}UUax6)GwEu{O z0=Um!St~y4S9O_$)IexQDz)QG_%$)JJOzOrN$_cjL)35vf;y8C+@1oz`dE0=burV# zIzLdn%yX`epnfPHkz*M`x13qu43-CvStN#7k|>O(DrR;MS=iJ{svEvC9}(+{5w@n# zk{EL=T`;#9oEEI_QQi;Lqd-cvqCl|3Ra3d5uj6B|COI!N2+!^^!3_&!*i_CK7jrFV7O-JtryU z7X!h=dcmp>8!;keh<;CI)zf`opkKa358n|TeE5aI(scMQF$xe}KA2{?4}%s9>Q94f zqgqI~Fw;N0Et!5(cf?l2!7a)`FvFGp3!zmyBEjDt8aFFM*v~~~q(4+X*3iev;paIY zZmzQs7U~R7kGVpsBqYokieLu>g*YHWMdn7~#!qa9h0(>12z)~yW-f(nX2ruVF zhzRh2kK1BcEs|k@tqh*NcCce6xXo;M``BUDEGnNPgQM*{Sk0&4o0jbztYB?D7xSsy zYOYLZkh4xXf8k;I%EQ_+Pvvv1$!ME}wCwCM57thzMEPPndVc8{)A-m*Hl>y?l>$q-j>LP}>YWb(O)YBWI8OYNgSOEAG1xOZ-( zXQn$%0Oam%sc>&if(QM+z8%yq+Ed}xk_5MgSSY%UA~~sdQ-T1t13PsH>7(aozzAi( z0rIXC@e&}gkJ=JV{kmu$bgj~L`E(@0y*XBxRL*7I?OOQL^UGg?xHoFx(x8S@Qw-eN z;^EPu70FOJX|H#+N=R2E_L{Nmo;C2w4}p805_XyXa4{?4mf#ONxdXgHz2V?ti^bFi z3JWvw)Kd=u_!c+cc0KG}Y~k$T1cO;mZBHR&trS820zjWl?IR;A4K1y;`2PE|c=gri zFqhg(F!j+2r7yhXE>OhC@ddtwvB@l6fCTfG6%{Ix>^7t(4)W3{TGqfoegyYn{9n^X~Scc^FR7U;vOye@%FRxErOZBNt9EVJ*BdwRp zrDZnVCi0^%8Sjgy#%&BX*9qf!X&u+sZ(+c?N=&(&%NRK1GOjyw9UHHcwn^Vnd)Z9e zYlQJOl1XL%kr{SaruyxcZ8+(oINnyvF?d<*YgZjIcQ?Siw-M%D_2QW3UA53}r5IsL z2~0aGXg`*18JuU(GjCTjiuZIv7PA1c17@_|xD>YO{>YxL7I~LiZWu)j^#}Gja^Xvc zv?RjH>@9pqPS#mU+ve?P65uJb<(WO7PWx@RV-&J98aK!{Zral)^!iPcC4#}uNk3T< zlciX4ceDs*eEyDB)ZH+Q%yqRwK5zWt&4};IB7Y(jJ_RZ){na*jlxwg!SBd(&CXunL z9XZ!_!?cr*O~=pM-Gb^Hdr^N~4?-JMfsGSVknaOw9eZn;9e3+=bwb`d!|rz zbsws(?L)yf%drb~wxeiw2U(|J=@;##xN%R1SeLP(R>WAWNu9H)5rx~Sd~>V#(j<#w zOO~qP#Hd$4aSN(P8sSP~o1LE{X4}q%IyMr~sxU;ygoE=a#3ZVrN+L_uKx2xBe@qZk ziuF*Wgdx(bfgAb8<-@gTUD=KN{&Li>Z$-%}x}UqdMBbpZNq#0NKA~qaXJ?B5Fc};# zpmS%U0q4o$uPgP-icqkjk>cE{OE29hw%OH+_%&q+Vv-A8S2A5!%6e)$v@ZsEIe}#| zx7q93kg%s3@jESmIqSM-?rjlY)9E+YB7?sU+1P;e@e(+tcw^0-8<0-Eaau_Vti2Xu z!_{k$-;j&cf@EkjV&Uv(huJiqvz*$%Kn2#VYQ>Jt-FW4<*J1azHvIAR8}Y@*FXFQ^ z&*Sv5XDoJ@f%2zu;?OfVarkK*KlB8S9eflg4nB$oQj#W z$WOAI4YTyw=aWEP?Ru)Sr4cD>YY|TI{X6&wlaK9!eyT#m)yeBDV7PX7En>G*H|muB!MLOP`y0NQcIx;63oy=L`Uwj&osGeEep4vfi6gvx2*-|6Cwb%$b(Dv3 zl}md=eRsFT(^xIow)wNoAK)YH*n{R_X&XZ_CMZ-RMz{f)50)OhPZ)T!ER0+C=wtO zvosUCDbN`xCWn&-*X1;jO;m`_cXc#47$&JM4b*Xy=>jxmz&mN20)WfL%e0SW1;QBU zWx!X*Nj=B&pCbV^zqOGeKFTeV0435^JvNj#&yconJ`=h=y58Z>Mc;w+dsIN&z zXGa$9y>}~CtnNTTSrUeqx1f7j18%r~4}SB?{n-E2KK$|c8~D}l9>k-6egw~b_$=;! z``1E(C2lwuX%nR|PEyb`O7lzepj$>kWxoN5OX*%Ou`sPum*gRRBp;c5ImqqF#dwV# ze@Ip01C2ZGH+f-Gz8p(R!_Zi%LT+^&lIju=)s!S;J=DDx-BM1J#bCL*&4j4NH0b;2 z_ir^Kyk0BxNTVt6NMIKDP$ptK^hoJ2!qkz0@WOD|#Mxt>)((zz9PNrcp+(GW_=F{; z)K<8?6w`c(u=pjkZj{>q1(V}+|0j6LKsp2JmNt_@*UQIZ@H>fq|0_)b$eAI)$yyBL z?9DVIIYX?6ucrV;zk&iYYR@^-6p&3*;5S`~^!4QQa8`M03kC|d3r5n>(yhmmrc|t} zOu~c4XnYdr54gGj-nRHDz!sl{I^ne>e{3q(qO~grS>3cPJrDj#eyErvhm#yr0VodV zA&s65{dAc)*8mqm=)T29Pk2zEl)J0~Hu0_kEN51^o!%dDz1eUpj1c(&l1J&c9m^Mi zy<4Unxsz3hZqPy7oh=yF`Kua{)Srixks={uz%nHq@FaAY1$eIO&P70eG!mMO2q{!S zTbqg~o|Yver!^np#wf&^*+SnD%s$z;Aw{C%ox;le_a^o#+i&ur)l5AxLe_fpx4We9aM1*BKxSvO-)_2ErNt$~x7@Eg|CHaSS7 zAd&-0W^D_wa~Xrv`2r-DG|0JKGN>&{vPfmDm(HL#1Lq8g^La2^Nm};nO@h2XMS%Id zEpNlXHXF~gSzbJ{Jd34VG6u^906v&1rV?N-$;(7cW(gKN8#CisI)>{BshJ5gl(e38 z&RM%$F=|5aXu7yQP6o;>bDs{2#&%S{QRo``JqL$*aPhZ;GTIxS&I=Jn<2nQAZd5kUo~B;b z@UfeVGJPDb&(z7zxu(DOz2HEd9iz}{piXg+{JQ|k9K*Ehl56ojC{Sjdf$LdVrpEyupE zjzYFbhSH%rcIbT+A8gVH-FAQ zp6jk80j4up?pqrp^q$+V8ba?4OJSep1&0hjq5EvD^MbD~7*_tau%X||+RX})QA)J8 z*Q2wu5$4P^c>1`CmzFGb6&@2V5+!rrs#ZlHEHntA;r=k^q##}!iLtR>^mVr&NbU(; za;#vNyYtJNXkVQE@eGoxQsAcZgR9w}&cPQBS-x19Ho)nQBonPFAj~WD#Aej0X?jJ1DOWD*W(#6XM?vI#!z`j{L^>qnjW+YGM zB9)%&1lo@MzPRNX!qk)0cP%IXWd-?f)5W3>i=84rYYq8S7Is|&^WoV0?O;xyJ%T{fQQG9GWuTdIZeJcH@HUcZif%2h?k-&%*P z)#NXeuMpLsMekK3I7L1-dFNPu{WLzo*Qi?Agrb$TFfK2Fac!0G4O6yNi@Yg`8!TWq zgW5Aq0=;L>^ORo#ut|V7Z?9cXf#-}p4Wd4ma~)pC+erHmAob2#0cP_ylJPQ^^FDa~%Jsb6f7Yb! zuiS@Z(s}dwNarrqWyuiZ_Hr1u(Qmn}g!WfP<>bfh_&Z>pwY>@YwUux!3m0F1WlUFL zZjw8iuNp<&o&i+s?GbW-ZWZCEziAj9cTZw|h9@FuyePk>7unmIz#8PWw~UB+)(@|} zZ4?E2JJ5d5ax6@9gMK6rEmsY|CfytHgJv|{Jc`){SHbSCzF`n$SN8~@nn^xA53YiF zV;y7>v#|8xO-Sm^7sOQbRB8S%AjNayE{kZf??lCksAYdiVYw9-D4>3s)B2XClaQI{-BtZq_uN&u>UX!}_CG&} zJulphWp}N`DnPw?(9M;#Xvm|u0_$VUIetHB5zAO(x+>XIGT^r?VTvv(JlaZ zk#}WX0Wz*@LHe#n}~_}%ZH!O0WvVrsG#H(fW4()>sk_{F0Sti_@Ce}ykU zdI87wKa73v{mP<4e(*^FlAk#AoB+&^AAFk19><9TkBbDKT=&?%M{#8T<5d1z{QT`< z+lf8Gq))qL1xF+B7|bE2&>t ze+dNN^?wg6{|7*O#`=F|R|4bGwmkoz0m~D~Qg$>zx1|ng>#Bq={^EDHqbCju z$==hfT0r&-SpJLsciAss`Tua636}Hp)QOWgcH}5dojfi8Yo1z+%Vrv{BbWNbfq%5) zhyKB&`piT>e(aFgCo|ObgM(iw3!hLxO zcqw0tcd|9upRB~kAs+bF+ZJ%23&*v3(gfh`$UwYXTa0(EUXRry_2`{$$GSVV zVC9~b=vzC8Ex*26$Q&g0<&yJNCLFG~k!-QY3mEkVp`a`>lD{jloYg21b)7D99M6;D;PcJq^+lLze2v2tz>k#( z#<00JM}Uo{<_we#mm{w&2OFNi)$0ea1ze^TUmKF#W90vqx6UBlZ zE?&%BD&r})GoG5J%S8ae#ya%IwbjVn)PT&@wa8gfgW@$UC|cbtK0D0W+KlYot;pKd zBy>*8)|H`UA|Io}xmZi>{NY+Njw$8z3^7=4gYN=ta4OspFX-f0O+i3acP6rzR6*00 z2_Jm`N>^2jHWo3J4b2#}zoq;e(e+SJV6FEQpT-x^y|7L2K;g1Fk(kmh)t>^FEcleF zg*1+;!-y~n>SO8tdu1z-*kwjQv08w{%p&LKQdzB~c3_5Ixki9YnUmGf&~L^Gt&%&k z;GY|bxCT8Gd67^TY7k@yM3^xQFdWI$lF0+F#1(5BLFtO`f8IzoWnjxM&s z7A%^B(5PU+CU^93gu9QM0LwYKr<;c}eEmG(FZUJ_EW!f3;ivQy<`&=y8+Uu5SuXRm zg3Nz0T;lv;9pMHil_%We{IKWI8&Esl2IqJ$M3%)NoUSdbDi#rS@q!h}pt+(tMu6l= zon|C-P_WmTArjPa!n)*ve8I4fptid}>xsx(Dz8e$Je3P%N^2xFWg@XT6TyXXm=ooM z!pTO+{N_SY9FN$h48bgqs7l3bl`}jt!v$bIKh_;{8v!QN)B0Lk55tYK$2kDf0_xVqcG-hMu<_kgS1 z9&@Z|-`W6bc)-y2y|okht4U%A8xU(&^D(DnITT#8Q8}!MN-6+we&-&?F95B39wu~z>+L_ zWUOs~L%IUNCDgt%RFKhq@{L#GskdJcn&q>67olufBLZ{PA_u^%XeY=boe)-$23=Q? z1uze?LEDy5I4AfCusyEchxd+Qp2}>4WxnF0R0L)n~ zg{4y%Sofm<*u7p2kA@h?JCYFGNA0+ep2Z%PR3YnSZCBm@0+us??oZDtGs&4%&db3= zEb~M6ae&$%%`;f;P0up}=Ymn*l_UUj2Gu!fFTW_`#E83Jx(PSEc`v+jlnAU;i=>bI zV$EGE$9$i~@Co-uSX?k7A{B^<2}4kjH=LTux}Q>B2Rqr$LqM9=NTwx05OL85f$}SJk?SkBmw0KbbdU|VhJf`j#7Wc z>)6uB7uByRK|J*rCA*qoCLhU6{?dIPK8ln090ze6`)~vg?|TN>ajA^wnT)|E0p=3;J<}wxoGpGW`J|W1{&&D~2BaBmp1F>J z=Jeh5BB3LfNg%oeN=x;mvYEzZyw91S^-S=ajq6Bu<@W!P&D>5h-XE`%&WY!xV{l?d z!?rRQxAV0XA$D~(-LHIFUm;lMEIm_todxh_t@7II21R08|B4t?Zs|tFwl0+K>83W2 zBfxEzFe%>EE*RPKGra|qnc3Hz*(uH#zHJp!yYfVC8ull8Z(ohjb_1MC z!cj@}b9c1~NtgURtth^>-J+$vxdP?awL>#v!UDY;);xU`0;}V&*x-ZVd)FdwT_eKD zACK-d!mBh2-eu7ucY=SF27$HYH(g3%%(5^MEjolXQJ>zB0%cti`Hs}jmBo{fu7-CO zjeq7S@ih?l#d{yT5h+FK@Qwu%|sh)p^68Q^+QYOET`)v0*$gJ)4TUWX6px&08Qgq@_l zAIGQk6!Ui?Ut;;4tC30ZQrYH4R59y+dn599^NWa1l-)RpyuF=ZiBBftq)%3f+zv@q zdYs2Oyz-~#@$HXafRoyN{^dzL{oKQNr!DpwQ!{?`ei_brL315El3O+jVJdPfC;@^Vh45~|D`8{{;68=SI zmJw-bX)u~IEMR%Q2_dFf6iv1uV?_f@TUwB?f$q!BdI6ZT_B+4aW50?S0vK70^|sf@w$V@D5Q|Izoc@6-o4`O_Kfdi**RF#B~K4LG|S5Jv-HE_Li>YwD3d zQ7){I2DhToT(k}3qQ6y-iN+M{BnRp)a*CcRjKQ1QARG(!1OnUucWa#UTnvhuan#ug zABK40jr?S6)Q4fHF$0-pNhoY7K=A+#9PI^AHK(I=b0^fjCc&hLA50gT(TPJWw~-BV zZ#MFK@{r$`PtHj(n9&`%mIB=k<%nEgj(7@8j7uyDB~8m&V#Q**DRPD{1Lw>fE=KB9 zu>g8`DuLw;lC!al27}%VfHM#-f#UzHi~({9BT0Z9+lQeg^|=1#4S4>Q2XW{9JF)HRNpuXAW9_zK?AkMlty@Pi&|ii6#%y#C zRAGEoFE;F1fgLw*L5xWSb6qAH$6Ju!U4)V$`dx?1P&h))`%ocbhbUkriyg{COm7w< z+x18o%(1XZR#u1%=1Fwl_?lVrL%*Z|y1p!=b!K2maWW2sDgY;Uz|{jkd3obpfG>`P z1mcazP~4pujgbr$3X0nb7Z2Ym6+)}x5nY!oBv{m)CgFUCHzp#k zH4TRDOa!MZ(L7#@Bj-NAzR%yqlkYx^2i|@FPN{B?sTM;PWeZu1BV=*TkZD~ZOCY1^ ztRy$gO7);+Do=L9yfhEY)q9HR95SBHr)9Q?ca;xpF;X`WbM@PJEx z2n8_Y+?(aF&GLs+t`aVV!Eh}Ig;Tx)3p2d2DAN~<)4X7l;t6L%0PJ+Wm`BH)pYDVC z`Eo2M3c%uGKRD!i!Q0@1&}1iQwa(}YvBN$J41V^ZXUN9}=j4lUDBJ;08vL=0f|A^B z6AIR~LD8g#i&2iObRWoqlO!-WF)X9m#16nDY=E?8DAG_^SyrK>>!hqOS! z@(HNY(!JF~)sc>%s#t{A#KSvBDL`Td%lQRHFx5#LDHZ@ZGt0x9)5N@aqDsi;I2z;v zESKj+K~twgU{)wr-?9elZ&{6;rfj%{xgtR2hwy|@C?gf{@O1-gle@Y&z|YrH05s82 zp=fVw6hKX6REP+Y0>c8K(Z;}>n}IY#3L>M!5EiaPL}UnpLxY423u~4$tK28Z2d;7t zEOw>e-F_})4zn=N-v(asfv^j6gHK{0;;3Cd`~Hhqanm|13b%(Mi;h9(%6gIhc_D&P z@13WFdsYBk)BWL@sf3$3i0+>P?m5Bm$PE#IHJhs0gn9AqVBK;~_?gs_1>1OU!EW_2 zg+W!NLqL8E-4ivUYtpbl}3=nhugt7Plbf`Yyp-tt2}SI2@AAd zaL))4GCQoV%r7K37l6!JhG=U4$;0$pcc+W5GS~@c_IN<6R!Fh1T!Fkzi|}qeVyF)d z>q?^lIaGWJv+<9&!nZk2B(e?aOA%l>%aSlC9W+9}+b}IJGa`CA8)^YmS(0i-EYC#@ z1KF${xvtETgMs=l?J|}+G7Dp1fD;@?jIrE_L4e*2S~Kv)Od|%r1&BSJC%|#L+Awik z2ErLU=Q3XAsRW9%F__N4I~(sy+8>wCG>K_0vCSp+c#@_E_XN2Uf20Fo({=kD2TA9D7n74@Vhv#!&e9&qJ)j9tlBC2ywT9 zkMlfuIL$#^d=TP|5pa)o!NTyxP?o8n>MggqCR$niB_^=X@x2QF!&hn{c4}=n&-znTrhd>wDp04uvet7IV}z4n(*hz9~y2 z+g%Vz{lC%qO%MO zGs~Gt&R{tkGt8NV&iMyehGl-LE5`3#i`UNm8CEoI_!Nf=wz+pfIKp#d1#sjX;Dq3q zAcTem2*6vZ^cBo-)-aFIgu~s>U3|e4854m(>Q58mV~}Y!psukDrfeFI6`rCU1qOK| zDmqw5umptoA}Cr8wNZtyaE|;z8grV`5Z#=N*#30!crY13D5!61ad)E&b+6h~T^kgX9NLKfzLJQPfXGFU^5^B3FEg$4R?2)W1a2 zGssD|wUap(pnRDL(PQK%OlBZvn);aKX2dPe7GIgM#d1GD#`B5ni%rpXWD+Q@S!TW@ zvtp4|VMaNFfOJMlF0?WCcwEo|L<5Zo4IePOxgzs*KHOLZ((DWq4@cUI6n$wTmx6of4^(0P^$xfTmxUX7-^ z$KhBSio)$})V|FEI3B!vHOy00DBaa5w7~5P>DlW_Mb^eTi|+SL!*D7KMF{m9H8&3n zpxm^fM)VszmXzPnFA|V)GSTX5`rurk5HgMJw=N|=)Qj3ukzjqx5^Q0dDn-k!V<_C# zB4U|}t9wv!ZJ&77oQ(e1{ODD}FPj~054WrktbA;z0JL4mA85I484PPGMFLcomC4!J zgu1(y2u=HfJ*~obWLcS(>z2Zo`fJOrM8!oREIL$3^sxm*1i_#BuYia^DAd8Qrr1)YQ^QbbgvJny#GE83;+0tBZH?F8 ze+`GfJV<@hXBb>RfSQpSEZsAK+NoxdbEj+P2%0wbVC6j)2fyLRCHFW$%6+t#6a zst(0;UpRql_NppW?(RbVR*J25w4rcU2MV^eQ&}&X_l%%-=y<);omjwAaY#mOU2 zkv(IPVEH#-xkaMoc>$I`aPL*HvzY~RrU3>6jkj5uNJ}SQKbyujQ!H|p)CsWMu&GHf z#I@UMpk7}J74;#0)L$>G2onBW6!~4uDCe&OS?isd&0Dc(=r~NRn z{?GP%xy}q`d72;{Rtw?^Gs}1W;dW$D%+L7-^z`ftFnr73Z6+Wt&Hpp7oTXQ!b%`6e z-?f0{Jg-@jhx*m+_?+7C;ZOGqu$&WovLeCJ10M=if|DnY-6L5P@G+s#z#hKtBT=e!NbHvXIG73~ba+BdqfCJu)^1+SzNQ{)FAid5A(^w7S zTC<@WC_~~%p^z9z8_Yy%ze#9RM^Qkf8c2hdf-qxG2Fw(2*s&LBX9f$w?1+`x|cO!{mx~mB}dbo9gCX!EWs{UggIe)O)rjq^bTHr z^HEHYGs-}EV{N>%U=6lFG$m%880wCj;4Xk->7|n-i zFc(W}_4sp`QUK*}cLlu3eBA)K2fhgM$L}peS+cSjzxv{?x%3=-T8x07`4#P`_UdFz!-owz^ez=FaV!qRCp@FOn z4S=_g8{C}i5#;X!Z#QSyTFr+^mjwL$Jzjt5w{Ui{6^!$s@F2t|$04sc7p4q7BBCgG zQp$x43v2B92lxo)xf_Faa!&!4+j%--uCoY9E3K=zkG6UrEKczj#=7Mk zfHITSD&7MzHE9BTTO8vCn^+I{Wk$l(Ta5W?S15|;J~o)JINnRJ%UP1eTI++f-Xho} z`w7rIXS_~Gv&`1G3c!4>n$Afl7aIPvRZeiuP#~p0AF>z+_*cY=mw~~}$?&OB3wC*Q ze>#G@bV3JO*_kTJ!n@K0!`!7bOq8>ps9#IG(9>tB3ucwG3=4zU%qmxmrilcftXs|r zoS5Co$ue1nC1!Q80LnQL7Rw>99xH39@>fS06acAu3F-N zv&R`M=P569Ag5VfDC#h%&LBFo(AhYdX%HQoC0GK6>AJ``0p(1f+ukZa_6xFyS0J@b&v}r| zkztXI48aO&SDsezRJcGM;R|0+2L$`Oqqr;^p>e@*2y{YFOdu2r+J8h4e0-b`85e?( zq%hbAIMTLukjvc=tx>?k&jE@^Ut!Lk)H}Zr#qhOXfGk}MdU!S^!?PuY zED2t%$(M~2clvZBTiE9<34%e+vMMaQB0%o;1o(C)UIxUk1j;32P@Ijy@R`Q4E3S<( z0xb7w(~5mEqnyEV*H+6qmVEKAkHuo67wWfl;iWI%q-&GGKHXQy+wfN~N^>-v!#yC6 z_J<$+)&Vq@Ff%+fR1T+02|uIbqYx4uBAA=%comE$9jdF!pi9-Frl|}$MMkLN!w{bs zMW#Za(#K-q{)o_qL7S_^XZRY0Hp6IhQoalE+hS-*w-3)j~ zkC_lg&urAV32|%4hg-+K7K7ngREM?3Er2>3FSD`sI2$M8WWYUksToOA>FNNfs`XSmhE}E&=6| zT?v+R*-W5Zsv`l}GXd=@!E$Lo63{IfFVC!d<#tk;R9^zLB`}+1SlA@sdM3a<(0`5gZ7SiFxi7&_Bci9wR7U+OR4;-43eIcgg$y>BfN$hUXSQ=o8LtN1F7 zzsPNUa2n~mnuTme2Axap##U&$GvSgIiiuxsMM6)m_&UTomHd@xJIso96jNCQS=eI8 zLdb#_3TZ1&rp!`UvLIR}-)2^X1C`PE<2zrx)Z{)}=1o4D^E}L^F=x+xH=($>5^h00 zaQ5>MiQoB)m*A*i;RCWspgHHXiA;z>Oo|#oQGrk=tDwu#Au=%>@ieYw6q~So!#Mu< z&TF{#=G{=J0^rMIU8oxZ5`y3vLt_GsPbuYTn7(!e^@Ath7EB9HLWhcW| zKcB%_e1RK&eLdQyIuKuyf)CCg#s}XV#cj{ukN3XXk3SrJ8&ACTH1&U9VE3=DLf7^I zbnYEO&rQqFNxwhm{VLtuj@qjS(Qw@eO1E{37Y&Wu2GO>mAIj8F%(f+ez}E=|Ln6Y% z0|iNh6L7nGIYS=g1t-_Vm_J{JlHxR6d-V!z-Png`AHNDeTzD6E(Q)2?`(B*=^ksZ> z>?r}3A3yYz0LV`rVW9j!2Fp(!eO7?wpxE!>U*7<$1u_Aa8;wR}W>X(%)FC-D6%pz2 z$Qr6b_NrzWH&7q7sTLaYodmm_o|*U!6n~Q+#S%28oee^MhFRq-$HKW6Sg)MHWeF^g zr?`k;M*j(?|0P%+v$g!c3@rawfcgJzuw1*XmZtSWhK0d$mSK7Rn?DQ9awePopMvGu z^>n@)>E3Rj`>~GuQj2Ce&#Q*B(X_4$U*anq`Ru@Du>2(Fu-pHEknWXaSXhEZl3`(t z=@%K6U+llzegVt>huf84`IRy({~54cVw6id=FB)heTq6KGKpEv`{4aumSH(g9TmSd zq|Wg0k^O>Ie&Faq9Au#U*ijrgas-DD(mrXK8R-X)e2Bvz9l|Fx=ptj;>a|UG%)ir>zPlG zlYa>;|3@nl>~aQulO_rTyPQn|&AIGKApA;Wu$xM4M(eEV^1 zxqTyk{o=i-Xv@b7zkd{uJ$(nBeC96fKlBFHZyv#py;JBSho-bX9ouhMh3?TBJo4mi zc<+N(@bYU9;h7g6!0>nnMwWM>s6H1fcTMBjKRttoe*X}frkip1@9xDPzW5U!JMc6f z+V>c4fA2w&OiMLJ0q1hoo{`uef;&4KVjLf5oGt}A# zhVg0`$0=~4c9pT5+AU2P%uZQC*F3b3S6kC);@aaQRA_&ea7|6=Tqal^v}q3G>OMdENe>}oV{Y@&Na z&kD;UvEDR;e43^C(DA39bPU!?XKiwyoJf?6Hwv)4cu51C5(D673PU{I!_Zni{L12y z%`eGDDTr=Ohi`5ejDtl8g~6nQTB{bim09_j&>K^s)l+SEj&G7f6AmJrX-}>3GqQML9x0P$Jmn^E7Vs zJD3H#d{Kg@ka=PDzEgUTg<&2zn|^~xAy1ULtXQzi89WQ^)Crb315U9OaB8G` z-Jc>rb7mw345W(f1&B}kkfc^5wmAdnGl6m5mt?$7*kqPqjx#vUQ(l&gmnE>ALQ-xr)aE$YQrlj?aSFS4tVd9=H&U{a5SSE#xV$7Z zbX3!r{vO6x3?U*`f#}o-xG9{GSz^R}58sZx*Kft#MKX~|7ODP_G@J{IBqQH9Qe!-sb4)Ml3o7ouZY{Io$)(9CG5AVfv3|q`| zkfFV;5Vu~p9*%Z01S*|SP-#S5W;Eu?=ZRbfQT2&P7^L5!$AGYY21+epIfLe5bdMwH zUUTAA@iKz$wR&j|^0u_X+UO7ed=-@0YRr;b3r6`{XWkP@JLfCykWb^EOtA=7vF^xT zT20SyJY?RpElEBD79nS-61uir0oGWBJE3s28g?2F$dn5a+sHXHj5I%Ayfh4~OGH2$ zokNEK{+(%-#GW(2a^KDr0hD`nSeW4qa!biN{koE%7+`ss|5dA;0dxsO=PB2b>hUs5 zu<$a2=>F}A@ater_Y`<{Ckw#by*)w5u&`!1za(SHmC-v^;KeWg2wC)Ep$l%Hahm0# z{L(_;6y}bolt}tbqu@(@ql=3T?Cci6!Eq6M<(?u(gjaxx*CJ)Zi8h(UUO`}7DKG>Sy743evtW{TfDa*W2V<=H~JJcgc8742|~OPHqTeMJ^h*08QP zYmqYxJV(q6uzQl`SCLP+g8aVaxniE#-~{7q(#uPYV)-IYMO zMb|tZnsFm?ch^F4FrR7v3@Dd?^qFA#zq5a}4_?Q|l|Xyxm^@|8@)Y_l3_HuI zE;H0iXV#G~%N24mPuKD= zVOg6S(02EvV01f{hl;!)%q}mvwnyldGf>VkLcz7&$lBeC)b*9u?FZtY+n|jc`cPWZj zwxE5_7^*jPqh`Iu8aDKzX;VL1w+^9m$0)jYjiG1967=pIL)VTmv~3wi)7pMiPj#St zX)8)bn-G~z{)Z+A&SAdTd+$vsZ>xukzbEWHoFSVl6EE->9Op#uYyqJG;!DGj=wR`Z zFEt|xDs3bJ!u+64j6#Tt#GlIWgiTfvYJ1o&{l8nC1@ul4yAG7mH;oL^SFUT9*t( zX}s_e-C}(ap^L%?$KS)c_0#C;YJ!dR0xXz63)VIZFpI9A8Rl&B=E>maV~duiTuhAB zV9(Y8y!g!3*s`V`zkl&Moc-igod4`~eDU$C`0UKfICJcIoIL#OzXi*gfiA%E?~mfC z$8X16Iu?WFCX-2k<$7ZplFTWHGHa3ESB9L`EikO-Tm*Gctt%1C@@VQqVyMqa-b~Lg zOP^5x$YcnS*pr?Q?FM>IE&<9c-@MeESY|ym6ZV%hM_LGtj*h zpg4^SlJT-+{~55Hrwouw%yOQO8q7p9J(pkM>&syIp+kQYV7bIBXBn0wC)o}QJATT7 zF`YSn@D~}DU+lltegVt>huciB{C_9G=W*(=*iLX};!{Wd*G}ooDV(N#v2llV>eMNm zJW2Z|J8@~>$Bti;UZMRSIdL3EPoAJo(gNC_K7K*~>PL=JXZq=J>R8X?dKxsVr`k}l znH;AbP2{MRBYV06h0Ds3+gFIZfl}lytr7tx1Jv;oMV3!wDUeAW%R**Y=TS5{a8)2Qox* zNyA8)NbZ@~myg(f3Y12&MBvOix(wuU!b$T;p^yzJ7^y(UXay3NmLpR#OS*e$4N$;0mJ*J1mf6}aX0ZTRTZ_c1iqh^F>J0hSk5>(Mnspoz{mK#%WNMbBi@GtxNr>)= zfvQu5rm_h9K1q#>@<70cS>=oIgJKST3YtaB^YM|w3D<_&qdvt8;S^vqpy!tt4)2UW zxM%spH%|dSb1=g4G>EHCLrirFg0dpukt#=6t_tS1EabFhqpYt44RpP)?0X)s9()mo zT5?LwA#hLjp?yTdIXhfv-P)U#aL=Xf3!~vd$8pLIMqou80;*V_ny0Y{pdf-ZCs~Sw zlPLO^#=x&cBLamh&8J8WMO7k#Ym&(cPDNO~PM9_9YMNND zHV$@82?!X;6|{RvX)hf7ZXl;Ir1iIggg!>_hi7lXl)Dhqa}ht?_HvzYfnVR zcqQW6(&5Ui=gw@QSsq)ThTyzNMCYp!U!;Lw0tGYaDrn7d(C4PY#nTB+u69V!YT)7S z3{O`lq$b8g6&?&9PZzj5*+H!e7qS2>t>PEt3uQP3O@VYBKJH-6ayDj`Gg!{+xgJZg zxcIvZuzZ%&0?4c=*l?Q*rzkJX^0tDt!X64kI3D@q;~2kcTF9k1YFuHfafVHtlVFw4 zQCnj{f&=DgY_Kri5wb`t*rd2)5wpy-PFR%UMuD+C>`Zs1f~-VDEOu!@Gmp|3IpcVF?&Yfs&qO*39)CO0y)lTxJ%axdph)CP%*< z#S}DEuWyF2FAEX$%tY5~MZb{0rAg$uU}O;j_Wd5&f81iI4?_D=KmBRCzF762E`cwXNeWoCFf<9USVT!oTpsIjB>8W zb!IZlL+E%)+8@6p;A>~SayHg3XAN^Xod@3^2GlvBDFeRzRZ=iLm)gDzM6{*|hHp%5 zGH!q6ZoGB!k9hg7&*NJPVD{d+71|6nUU>5v{OXx|anB>S;oJ|O;icD}fL!i^n{VHX z9k=bmmYa6qyC2U1w3TasD<*fY!sBoKmV)@-;D?_t;Ny>vp`on?wY?2^btMu2VBI1kKKig5(6Ip!;|>^!9U>TKfi$Q_~Y{Pr{N)Y#J$hni?@!wjXxj%GfsYe z6c>N|0xQ=q!}a%Gg9Be2z)SDGh5%~Ec{_xT>7@ruXbNmW_{P0cO^_x2>$UaY} zbrvyEfq3oB=dl0t4{+`MyYVwV$M@fz!k(+w;NfTPBERAjym9>Z2rY<)elTCKFF6rh zSg!>vXYiCYz8N%U8G_JZgOCSe-FtpX5k)>h_QobGGWx+UUxmPIm0&1_nq%;X(|>_y zf*dmch4g&Qg_-;lS*Q(clYLRKt_#XCtpLYu6MbPD>jibC4(T2FRDS`2%#kQvRu7qc z0jxFd$Q`W`GB3=OOzNk8u_GNy&JWOKfM16WUM)#*Z(`J&mtR>!| z73R~OeEGZu+x!Z!oPlr##Tfu+#yC%Toy01a%2{fK!E*mji$n{9<&q2wYnXE)QQO=A zSev}D{DBR4Rsg(8!o?Rbi8S8N^|FGkw+%vLl|p*O!@~hKHuK<0ePmdq z5_Yb(aPf8#fVq>qBW!G~;N)nFh;Su*gWO^3VFec-dpLXBVS&vY1cv&-l%0l9O$b7h z!VsIU#las>k{?!#um-w6<byL@pU$@EvoB(M-mcBCp&fqr#-!nn* zD}ivHGLX)oIWIGi&g*#_UMC0=EAwF7RD$3kEz&j>BV%WcV7^DwxiOfOz{lEDDF7ud zV~{^(1MQ2>FJVm%v}@_ut2qJbKL^VtZSpJ2q;dw#CGdMDST2F#{|YSUdeZuT2bRwS zz9r*j33TT5yp6Q4ncGO<5qUdXk+roER(bxgFAWwTdEV|e!7wklri;d;ECIyT+_Oxu z&3o=&0h>%;#P^smbjK7HC%YhTszLzfGR;^2Xc7kh8T31$69&z1=8WQ%!y1 zEVS+FL)E$_$O2?=O7p_-t;?Ys%7tIK8Wp=(zGaZwbUmu>oJ7)Ux`z{0sNOn&!Q0j% zyeEDeNB9NH6ihm#g>tuTbzWbf<#18KcOzt zQH+-XePbaqTgwnvXoN$kw*ah{ZCZu2+)Q`}lMm(Ni8)pakf2XSbfTL28jD^ze*wc5 zrHMdnVhp0=!ePuvL7bNS*yI=_rBZC8RzjN;4V5YcRb|B(9~nVMOEYqFv(eO2kK&3# zWEEzjx|L$Y_z)QKQZPK#i^`^aEMGH(v579Uc9bGLHxV%=H455GQ9s^}x~WcdY+M3k zdol6{>M0f`|GI_RXk89kSM_0F*Ep8kv>L5fEfEPkIl*i5jzOVKuBWjiXS^1b>$}jt zYYBRHEJera0X+25!+7!czs0YAb02nW-5|d7K6myD{Pgp8G=_eU-~aJdyzuhV`0>ZD z@ZC2bVcV85JoVUhD98+>G5H`Kxqm$lzyFW`%TFGB0teoISS0OaaQr{REWZqv|8NYy zedZp_ne~rgc}8YBQZsc>nG=OXYR<}L>LVG%ZGf6dU(BA~T8YHX6-e4d&lmM)!h}wF ztpLs?85VBGLhF1JZL_KhN@~Mz;ncqb%hmM!{a1kH{|+$!kBmWY2Ee85Bru%k|KEb; ztXVFB<;*NM(6jn~3YIfa&SlIjXVY(Qq<*SR%tsGp{Zp`gSpMBN-wLq&%&F6Y_5Bfp+zf70XJxUOdgW{u&2k3G z{|=P@y^~`5=;MXc<*9Q!e)5<_n~IKmoI0(Or_SKS2|9<9 zXK?)JG4VOhsn1SP82ue?e&TL4tmqajftqcdD5W5^a%~gJCdgUrqyV5JPXwff!BWI_ z=R)0+166-6G{bp_9U!N_(*$js0U0eOa!9h!nHz`e3@W^l5{VO`p12rjj|)C?fj}#K zPl4RI5I4N93BY}6p_r)GqOdsunu;i-cAKGUG9$8qf~5Lv#I|H1u7~w;3lK3%f%b4V z;+N#ZFj|Dd;R=-SXJSL-0FRa-YI!9hS5_i=w7_y+Bl(D<`S>LiFo>j;6l5&3Oyfp# zs61DI<_whcXR(~Yohj)4f!NI>W29`IYurdu1G42SC zbV5{uHx$vX$g5663EkJu$vPBvW}NDv|rPRk-Pg)vW)_~%?0GV zSE2r3n}Xn(ABDh*1O!#aBcME1fZ@W*RPZf{f_G7bFu&4h$SHvEDu@3-%+lk+xMAY^D5EN5mp z%djMNWeH7m2FqEqJh3HRB+d-T2!=9)uB9Xq2}MZ=P6~#(G840{=fKs+1z!H1f+^0j zDt5Mugl4(BnRNULx?xzZoL{$3)Xryotdyxrj8kr9TuDi@@WRKQUmBmi?= zPodbCb%K{*$ufZFVp5`Dih}aMIq)rvhNgq|ALm5vB|ymS6n-Tk<^|f zu$(o_x!=klM?Yt>4E{Mv%nqJ+>62<1-18Jjq&|>=_?YGSLSvji&1C?a!Epw`nQ_F& zlB8LDy0wB`&fpOP;Jl7Obq2t>Tw<0paL&>zypGGb?!RM}GecYg$fabS%qVC5a%MvD zJOk;>Cg*i*JkJ)wiA-r<;@TOIW3YTQLomxjmSjLdWxURNNGB4328tH|W^m%v@SZfp z4%2a|Z}+K<6}cApMW9!T9QmCE*nQUyWK@A78`EPd@@HD;Yg=4lvfFBQBrD z``fqS(DAom%8eJtX?oTGf>XQU}I)EgXOGQzR2K-;oGM0Ax=Q%E`w7h zT?dV^oZvGwI|hpb?BN>Z0`FiCcvGJn7)X66O&KhAaJCWsu&=@w3+)!d&D#}`)Caq{ zQXlN+fq)QiEOwobn50NV#fQS))tdZ?5Ts?MAUq*l$o^>Z67c@FM_?GphoUwCj>Ssx zd-`=+81S5&Q<9e9>*jg>dcdzU5zciHaBorxz&n!q7nW0DketDC2F)29XT~|pv@l@K zKsmF~xjrZCw$`PE5L?7%>diZz3OZ74>!$S*Gn}VfkGE$4n%7DD z;%&HW=6Y#63E<{s3E1X&$+*tUdJ?Gp9~ra9uLRa-uAg~Ldpk*TB4^0aZ5-AZ{7?T1FQkhr-g8vSfRafRn#iWw1PNYZHog zwqZ`X2jndYf=!;er2!S!_akD^1n24q!7fi*SBcDBEhxQX1QFDxv>PgrcXcPl8Aa&7 zcLi)Sd_-=5@%z@mD$xnC9eS*MatCCp1<2l1FPQ6jJDSKEXt^3KHxDC!T@7SW^DuGm zDzt3tf-G!4BFZ)BzIp`l?Iz*(*6bZZ-3?>N-rA0?`_`lTw$;d;Zo71$!B3AfJV*r7A?|l{34X{X7NvdEu&1ghwev zqG2u7$;;0`Ol&A3BLiVJr$9sNQxg)P(2d#}atSO<1rwHBon87QgFMC(u^CbljY<1ml8>U0%j`N2&?=aU$Y;53RA z66wB>UoB6MKv-pxAmQ*Ah)fz$S0y8{*j5+|g;|ZD)G$nMT|p7|Mf~vn z1>Akd&A9W{o3MG)I;>hfg*)%Q4ZnTyY219cYcGr zZW_mXZ{3S8&%A_BPy7}ipL{_u%Rf5)f&j?>vzq1j@i<<3{(*l0%UQELCnpPrEIrg2 ziAZhALFQBgbgSrDqIS&rYZx$3;OCiqDVDn9mw@c=F`Jxa?yi(!iCs(a%KGZdn&nr5 zv$?{FM;7ay>egD_A|lqgsrqa&9i1XGs{`CoMl+H zzJ4>(rb_>h!E#=frfkeA&%COG`r2yYd;Tl1{P>~$0xUmv?1&&yvIGk=%a5J3C>k)c zob4B|{1^N0vR}aR|KY}9`MIypUY22DW;uh?60@AAk_?L^t8)Ap>yC3rMP-*dsN*#M z;lB59@td;%exQ9b)9j}iX8HU1XIlHiPx$dinh}4N^}O``&p*+?%v)1EGVw<qFJ?|tUrN97`%SK8rVs0)6duEGl=HMsklF>JbhEvE0g8q4p$2@^N(#pv$! zn7m;t*8ci>j6ARtmDi1LP{%&|F$dL47&2b$Vn_u%2A0LrO&|lFM{3H)e|@ zoHe~wxbE)VIDF?P|icuWZBe2L~~B ze>e8Lxe;TJ_G9@A%dz^^wdlXUA0zjVVC0S=Og}h{ol@fW{U-B-r5_ZwAZf0v=ZQIXD0>#VFBV z8;7FF9F$KM!@QJ!i;elnzNQ7cpS~XVzwjV__403U--{38&ma92hrd68``&mM?kWDT zPw*5P*_sw3;^?I2HCc(AscICgsz=e9Mij25U}Hrsa#u7W1QOdbkBaFARIX}5Des%6 zVt<>uP_?xWWgEJYJ5i6;MlLjt06Dd ziWgDF(Fz!cN(D=r0dr=Uhu0(tsS!t0p!k}^MD3I{+C2&*5!sX`z;c#hVRp3ymg~E7 zp=2<(CRxZgImLOx*pdU+Xiwxc7s5M24!0mrICwe1-pyWs;X$E+2vqt(K><+^1w`&X zt^x#S#-nebj{wV+A%PYqxxW`YyusYhsIGEB=##S54D32qc9X%SYQfO)jvIpOw*t)q6yI?4VE zFgL;x^6Y2C*B%*541j9V0!9>4{Qs|lIF0F+u#0IuWe#oC_ zfXr{UVAkpfiUq^mBPUGA;>f}mL0P9oD)o6WJsAjYOcGx;aFS$ZmV45*aFWl8Yx}X| z-Fw8R-`o!|&=fjqv?SA;WQ}jVNbngrs)N^n7M^{{BFQBK!BNxsh#t>D_<&L5Cde8u zflM(=0ISSYlR1#77ePmTAG6OB*OXn>5a%g_;|!FuNgy~g#3fyG2FV!^XRw<=aVeQ6 zm-BjFCzbIsv(2Ub{{x$x=A~mw0QgK97M@C=IJ3*8WoDI2bp^}(5?Idc@{pxwp;OL! z+RQ9xuv}=EFVBYmvUGTjqzTZR%NR^&X)4ud7Q)7I5JE5JOJKdUikR@X$-6yf}d7_ zn8IYJvg6_8Ws7&;`vY#i|3=sZIU=L01kTK|UM$1prV0G@@Y`?*u!B#k0)B=Nc&fax zWc48a^zJLjDNh%_8GpH>t1*fBJ=bi+lI6Xa>pdSH34ZXSea)kDyyK2*Fut@0){gTr z*M7DID%g z;oTgE&_08hXC`ti-7C$~9KkMUSs?qmaQO8n3$UEo$>xpqn497OpMofQcH-%ong?&4 z5)Zxm3}iMkxFyPwJ6H}`=wk8w83qb5FUAEj-&tthHUt-a5M*vLI4ApKAw7$_mMkRF zvpFkp5gasLC?9WvJ1A;^R5y{Dw zJsjZW?JWA+@R%^zx!OS)sYG-v^>^V)czd}aMiYtHq$r_X@8;)-7;S_A${8?MLqw8Qzch`m} z_;*piI!e#-vP=P%voT1`NjNzfCxhn+(+oW43q5lNvg5cfqWWRn2hcOhxnNk{jxB-u z7fT}be8jINUtlHG8%ss#QXP^v6o92QSkIhw!P(R+X!|vJNZQEx7>dAoKN!4baF>tE zfVhPzPJSZwDV+RMVwy83&gukX0Io$%|+7sd?arwqGOjLX>$qU)|Y^# z3u4#NxvVEYl!5B?mR06!&W`f)dMoZgD;53&@`{KHpS2YQ6nvM0uSwmdf zmjqg~%>=xqeekiRa%ml#bSyTh>|dF5o->#KUd9^cYz&f1M(bIUg^cHux0J%Ps|MM7 zn}ptc)lI#K7|>x+o-b;y??djEM)C59+2w{+f+?vO}@h7$6ekTN?sllNJE$RDUc=_JwtlugI_BKz@p2YJkWOVI50;T&%Y+M=~e! zuiO&+;Yog1kRcrM)L^*B$>F5(h70*)o(T$g#wp<(?T-c2uee6|L$+u(_TF(L3aZPo z$jKhw0Rgaaa)3Nc0j((+F)6Vkv1h0%R3!ampqyn@ICsK)8f#2cCqF+!IJF9fG$Vo)Ay6unP^;Al4G$3soz2y!9Lg zMp_Y{5(RmvH?F(uIt0ZA<2=5{r#OeMi9!7B)B)6WHQ>z;-o&@`pI&Yfl2p!g53Dt= z@G*yAewZzMjY>q6k>5z;No<_~hOT^Mc9tN$J_kzL=bjsOV$bev2%}iY!^IJc7tM#g zgSC)fnN4FXOJL0*OG}Ny12m@Y+&Y3^-?Nz__9J-iv7PwS>$l;;=WpPnqtD^fQx*x9 z(??&xsUy$h;}b8_{BH$Ve*DlAf_;AS&|^5d?;#xe+i!66z!UiB#H+aQ<=^n;8&6;! z9Y;fBfYE4#G2MjB%nax=bV$ffg{CY`#3tz*ny81O z6i1%^@r?Lt@aRVe#8-%CP9DLhr%&MXk53ErfupC`j))|mCr(>PnjfD$EbPo_3jjV7 z1ZR?_WW3DlW`gDtaQ+Ke{)_#;v0uRQ|Kaw33YIfSzW>1c`235HMF+&6XWjq6-MIbs zTXD}lcj4-*_hRqf-PpZ*H+JsaiS65WV%xSIV#>=mUVj6wzy4ZWbKSMrb*8y3Lqgz6ujd#<6^23hOqk$N1W5G!Av3u(KLPT~#P*%tK9QIcf&Up&P70 zS#LF}dTLPBRg2R0YMASaps&eCR#Pd=WMu=*C>m-;Sh*1j3h33@iO`kmk;TriwVN&2zR7-Erhe1Eo8P_s~E% zP;e)6T?CoJk(|01+<)p#j6Z%If*aBh(m+9VolYbojB3*(q$wF;9q9;c(m}z=2>U1) zAI?K`f0nR#0h}{9&LFu3EWZ*oXE0m>#069Q5+KfH60=+a&LzNHT4r`RvoP5NlYBJ= z88l5?L3O7~z+igJpc%<@eB*E-3YJwOtEUhRQ!R8qvk;jPiK?L*3~d@gc3l?Q##%78 zW&nnq1ekKPC@eMNR}bBU&Ynv6D;(gXu!TM+2J81uVtms8w%xD_ja|8dS!m}j!@BJQ z`16O)pmm@CDxDXi^q%NhU5@LXSdXm_Ph$DKJy`kZAO`NKN7r37Sn_BmmOnp6(?Mje z)FZYv0#&ODkUyG^_}XY>^rgYPBm*@&tFijIRTy}%3nLGAV)&sJj6Bpx?XDJYl^gKq zgfKjm7l8W>);N&37+=X{mfxLzN4UD-RDeHjObbDGX%w<+RETbjhEGQn0y^R>iGUcG zStx_8pAF=(a^!auW8LjrMG{2^a^zX=B(lQJ~AT=8M+039!6= z*Dz}6-tw|!7Vx`6BuL8N+=}AOZ7AE+hKlvAs9M*G+I4NH-_U`k&E2ToKmink?rYjn zwyGTklZ_%7U43mjcE`(cFkT4+c;aU-M;wXu$4y3mX{rEG!Ng9n|zq9qZ^wq*Fybwv-Ek+ro63v>O%r{2uw4D3%4 zfVl-+X1NjyE|(b*Fp>%{TF2~ZmKzD1$VT|GEWt=;8J66YRhS(`eKCXNY;=8AdUs^4 zr{IA4y4Yz83tVD-^Zpqymo&>6)aH3T1vOF`PbJWtx0^YYqzfe0Id9MVlmK&yRW1SL zYz&S|0J#K~&$Ry?usmW3tsk|3<-AT#^?a5XgfZJZY-y&*^AI(b4c{Rn{D;kmU0wM*=i(Y zX(=2(j}JdT2-g^IWOq|=TAl_cUwfSW_7hyh1t@f(&{P{yv7!z3;qK_0?!|W$*k{o5 zHb2r)u(7>jeQ69C!iDcX!G|aQ0+}@h;T^dM(1(aV_GhYp@u$z>66KE2+!*NVGGHsW z!RKEe$Im~XwLDi=GR&iMW0t$om<0TI4lCD=(XtGwwI*bB7r;iokoNQmo_*sH*alc3 zrj*(_^#%OpnR{)_Wkz*KzX72=dcnkx>Zdk1#Oz_Sc!|P^SozC}kI5pe5#5=N5b`Oa`Z5vJp~vEq z5CrxaU|*|(dwU{$dsE@llOiNo7z}2h+^53=h${!_T4=0fU|gDKu$z||L}!yg^D9l> zkt7m)vg`_j@vK?S#$Y>x<(`#M@GK4!%<_Bw_6QseKH`O5NTU|6S=6_yJz?c<3(pV_ zk>E2h$Q%Ct?r?UthL5i+99?Xwf2BT@{3`B$`Gq8dV!!0H9X-?zM5O8hmc|U;D=){aRR|AjQ|0abWJRyKFGf( zJx3!JNh3~r&dJZUtBS-tgXC&@24{li(v*SgXj;dBxdfK;7cu`2dv6^b$$6~*&+@LA z83)8L8j@y4Ga4~7GfS%#tyn8qW?nO_neEuI<0NLscI?F0j-B}0v13{$Gp^T^Jin?} z+Z$!C1NWEjx#!$-{YRbdejBEz;q9tVS3jkrK0_*?&M*Jil4gs<*LWSs|BtnNH`Db++Z25jOS5dEzL54cb$5k;>l)62pQl+a0dUqQ zXFYPZe+J7LeoH`nzDe!8FY`0Vd79@-ZPK^|$hl3L$I}u_pFdxkmcTg=C3r2hN$vBu zAwg?yXZx@4dJbqy+xmNL(mK+5|Hv-h_Wbqcw#)m@S>$tO*-QI2&p5kW0CZZ1zicSG zstYTBGA)Y1F3$2o-i`*Cr-~s<@j%yYQ%KuTg{&=gs6RL)WKvjuC8$*|U^#>E+Uti9 zO!vBD8Tn9~Dp7E4FVu7`!XM;9pYre!^7)iPf`z4}tX6|4TI^^?&!iLs zbO{kqsR9ub9SI*FKSV{vkniXZjZTXo>f1d0J>VDWivWc`lG3P;QhLKP&_B@Ei9F8J3erp2GKEy@O|;z7Nih3q&oU?Cfj- z%nR~!k)D%^q&zDU$}A|~vJ#nFT11^C&Z7Qju$+s0a@IL#mK(NIip+BBu4VztLpm(~ zHY{f#%|of};(7Do^#zDcZ4B=JCt$gGUlXkRTadQ5h3?%3M0H#7^mngf{|h&ZM7h+> z)bDJY%Mxc;&Su%&D5eEK-}TpV37oS@(+tI>b_tfJ?{5?1nvs0u4V2;7*T)4cKYaQv zoIZURr;Z=Ond3)9flr3zLUG{K5n(LDa_Zy}0m@m1<%eMTd|>`V^Vp>JA7S~A_OIHH zu>AkH{kyRIlTSauTkpJqPd@t)$4(r^5$fRFJ>B5!>I4TTd-(eM!P}RDK@Tsux_Q9O z-BXNvczVOb%M+fSo^bPUg_D~r>|LF)%*7c?ot?1U!5Mb;F7WdXf{(i|nKyiWX&4j$ zPq{xlBSR1vuRu_kKRGVc9_9;Al@B>9fudMSNU%Tst_MP5!{8UELU@uI@m3?!3vyw~ zOvTbbatfRmW3i{b$UqZ8Ha+lHER`XSY^|#UUQ`C*>tHVY=mG>S6I$j7^Tt=PD*S;Q znyb9LkRp>IiuTjrg@Ru@24M>!^R~xAxi=O^1YqL2z3ALOi;yxSG(CA_xfIx@LES;Y zNmCMHI@1u=o{ET03cmU%C?SjL&J<8pvzmghehSV8a|ASJV9v(ik+aIx1DT?LB}=PF z+2U+G&TTwTg6IssMJD-qSkB`=1j~~*kV8Pmu$&8v=5205(dHKPUbP1Izwszu_}~xt z&yW9zd!D`-GR@)eh06<`2?occi@*#T#x?oYJ_WCpiK`zY`Q0| zeP}bTd}1SpZ)n202Yb_JLmU0Z;Q;p4+7vrWjBW|cmz`#Hl+Up!~ccwGmRXfpn z_5j=*0lH2RqQr+0QMg|phK{l*q;w@9v0VdAO#-|k-JysNg;%IMq7x&b)F=>XjmFfK z8$_0_TShoS8cYakNrrc05|pbl5wkiMfz3uZ6@(+I#Rh$M9@Om_LQ=&cB?NYsAS^Zd zK&EyUfN`PT151paSZ4Od3X3o7Q~cqS76jMKP%&SoBh$NMVUiaXn|y>VGJ0b{B3hSmXS}Trz+DB=sO>O{BDBft8lV}g zfNpgjOd~nS*;t0m*%CxlYlW_LLT@HA*VPKR?VT9`V@EDLlH~}=QA0~ky}msc(T!;c zB!a##3GcgUCBbo zRLutJOU&YPN;!>3cUpu_xO!ze68q`8D~*L~dWbj{oMpZ=&I7WbC5WpqBe^XX3nQGd zDB4v3b2A-#F7C{*1X|ioL0#$ev$gf&jXl(JAjU zUx4LY;FE!Qy<2C`>XXtmPb1wjM36Qfai)MY1m?y#V`Jh~a~aOI&-&)9Gs{H@W9ayX(sJ%SCWH-TQGZ_w+fXSMMA+j!e1vz;9YS7P z0punM`l~abPFLgpC-24Er(Vb7&-@$v}5wIJyJZIJ=6zZU@vmm-qBbIsV_#XsF_g1=#-)FGSFEM-j+wlGO zp9}dG&hD0HM8jBbL!jOtAO7VOUOV<8oE3KPvjjukmI5xU9l9z-WM7L+;~tB+E@M~O z=($Ye{dCPt6(C_fn&%4S%k~FkB&Ig50eks9xVDGXD7faW@5Hd7LL2HufN~E=^>VD{?hx z+|&nI7(E-p9g)xU?1oRO}+td<0P_1$`DkQ z0AD&L49g>i=cHx$fAI?fmZXthlJNQDdqmPIXQ>s|A!jJg+2m{t$2H^Wh#j&*J)Qe~v*FUy67?l(3et2dU11o}PgM2-OHwk`Dh z+Egw;IA>|Il!%l~p0JVni}kc$oRPk%0LBe-8Re41%EjRPpTTl2D9ZZi89S?xxvLts ztrY^~vlct|znME5k-{058%jmSeC$LT;?|^!;-0Kq&N3{L+=?W*G9QZnGgvOcZ_XCy zOmepQnd9@b%Xug*CoLlZbqRtqDCg;mVfy^}(li6{`M_F&Da`v>KIiGa!&jQ?~iWJVVlD0UgR zX9Hwu9#9ThPynsV^hJ8hW=^cP-MnH zl^q9VRvbMWVxY)~hcZ)*AWJlS^a?meP;9A|ldoonTOPa%yTTJ4xK)h;$8I0!A5r|6ea35Vze?2f`25cwVTIQceDddyF}rUa zuDItKn9I}g+NVeH>L*7~H{Olko&FO>ch2Ia6R*(|^J`3AwifA~g=pJ3h=J>7(SFHl z@wM>4l@r)-?`}-rxdW58Y{AI2>rpyVhp@C5ge8XK)wf^9$Y>u*N^)RJF~Mlk!D2Jc zWt4O5yl^hF+?k%Qoo&UK9IeNJodbCLkH5gx`v>v(&-dfY4}U9QIm@pcefuE+%Go%> zoC|$k49i)H<;b5N!0BU;v;5zM<&sHl7tgyGU<-)-KM2c{cGI!i zLw)>t85Y(of9l)+#J>NyNx*VRhD8AHo%JHCoQpNLoIUhH*(o z7|bcKSkqxjw8D~<0+ZehZGw)L(;?2NM~o#Aab^mbb@7N-M?8Tm;k%z*Gf-QR=S1fc~hGq5+aPs!TQeRK3Sg`U{)p;?_Pz^W@;6be3)Q{i1 z^IQD%x%=_tD^K9koA=?eoA%+AxBdgafBjkP-oFl)UAYx+y!`@x_RuXTZ^%ZRNr|z| z{iy3J!_I5gWB*m_@hwi_i?5I3-UqM7bN_Ka&VF|o4?KD;3hE3dFijf1%Cp;@fC zy%XKnmZSTo3atOt0QS91PU1^Du`czPV_qbjD&i5)VTH0U z3m$cPtjJfvqa;qeK#6X&A)r_-ihFV~PV+#qkQ3noiCnCbWks^5DHtKknyM0(J6ntV z4UNd8wzR2Aq)w2nsX*3D9kSNW!DpT>-PS3J`4ntyK@K^QIcpn)36*V>wL=m*k~I!)JWzYUHle$aJiA$Lo&0O?7q^Wl>l z30-T3$Yypkg@`QX@M;T`wPtt~$BSZ4w#iDkJC1)pGV3T*u0=w>hE0bHpM@$~Z$Acw)YkDn(zJYC@G z<|tq}XPR?nIWH%^LaT^}Z) zQSVzCh0uD9faHGlY6LfFA#c`;wxF7L1UG1??=Xo1T`Xy$pm7EDGYJEk2&_&(Sd)>? zf1N0nB};Ibldoybg3Ny*Jk4?#o3oJ8Ss>u!f=Fk?RG8)peFiQRLu*eFWb$RuHfJEI zBUfmc^A`q-Vm*aqOYu~*Sk{Mv((?7~kVQI(pf!7}Mr4?C5mr7=E~%kVRBA-+i11b; z?YEZtI0`6-bKzDViMXLGB#h>Wmv@?}yg3-jGAmP@LCt#IT--7hp+m_+r&~Q!C?Gj! zO*1r?ueKp^9e+hrjP%(Gq>L9KuFWil4A2<_7}nA`9<*J^0%y1_L2wCfGxTQQ%>foq z^K!gAFUO#J{(3ylZM+U=9kcN`ulJ8k${?43`FvQe-BA34u$-rP7(PMw3N0^y`8-(8 zkc)viPjfrV)Uc^&y$F_u7|#~-S-)IMfm<*Qm4kGA2U!ZL3`=8O@Q06I!|^|#KvIbb zp+*JLYcmj@9EttZzrX$7pYZUn9~AwowKEUKmUOs;x#HNDhj9G6lcMisz3sArN-XnO zh__F?fDg$Jy6^JO( zZ+JkkefJlau!^uEg{;AxSI3_qE|PQ1{n zUDt(>oH)Aw?BQdJK<;1-Jzs)EtpP)OmUtN`Q!Er;>9D`x-=s(QKn4Q4%YRybKFV)vyc;ugfwltc~u{7!S{;1lk8J z+=|15X8FDEJd7O=Uj|v69efJH;8~y&u$*;+mj_cnsqlc4FZHJ`%Y|IQ)mIDg4*~vO0+5$g<-p!)5geQsBiW)yRIF0Sv3LZz!#TtS zi6v$n$A`$DtQMK&T)dEBdD!X{QP5K|Ri6!tRrHMRO+gr)d;UseJ}hVB0-tQGSsu08 zDhh|shvm^DskBZ8T_bdV(@pNq&T@(;=4X0u?~#L%03KkAnlkpC5g&$azySY8C% z=2E0=WFL^`P3FQlo`>W$g(5SUi$5Ahaz*AbzkE#FS`F*g3UCH|;%0``e=ETv$*@Qg zEIQieKZE5Ap(O}D-=ucdcbBGl$e^6tB#6!?!Ey<7OE8?L=Yw%J9+##WR{s?`*Zi0H z45g*t;Wl1Il2qYw$#}W>@LO7rv!>@SCoOyN^8d_uy}t*`S+|_cvU|>w_sp5;yyacn zj;QH$ByKH6?iDRCZz+M9&R_Y#Zgk%>3Eg-OT#A)wJUE2J@q8>!_Ys=noLQc-z7lP> ztr1z}jwMP_bi3l}J``TkiN>495Y%oE_etU9-ALcnh`dWWkg>Z-)B`EKqDRCQ8C&Ww z{J>UtS45E?9D?DWY(g+gGnGYRO2tW?3RDHhc?tw!$NX5{W^LhV((sJWyE8T9Oy zDP-93#FZ!{zjj5E7c|W_c%;gOzqUBR4bEu_IHre+p$qw_Zkg1#WQD;yCrW&2$Td_v zGnDY6As2*qv4p@mIZzDUETN*tV-*q1-R3jyq`YBBqYCEgZKG=$!iY#Q5 zq`}G00k+ZeBJ((cj^PFOQ&fvJ-c{^cc3?c_p5sXYb3OyoHQa zrF8t#L>(d*^6%|4gONjVLu{Rq{LDace7OjIEX5#PGox+&O01k-iOX&{fE~Lx;J%;U zfzLjB51@$cd$Px#dIZ0E`f;Hn{qoDtQu`N}7;VMxU-&s1DvkK^A zxs{FwgKpz?UXQo;R~Rk%|QHv4^Io@@gHIN zkM`fSA7T0bar<{+Id?v%-#aA=bTTOa=#vkHK4^$M6v{9a;uF-+CmN7sGz&8)+mM=; z1zTz+jay-{SYS#vLYI_?Sc4W(IxV902E^-|3dT4cv=MP|a&w21 zk2f5AJm5@Dk4Int{DS2O2qfpp+Z*ogE1;mDzs6|+t_pC&pCXm`JUmnsg8VAL1@Ljj zcYZ$jOs&O3p>j;P*&)|;Ayhs~;Oe&m_C8K<^mE6=`gItdnZ_bo-YtWSKKSkL%4v)XH?ktjeSSI8%Uf$rzq9G?!#pB*_&v zDVtmZ=Tas)o7B$Z48--56kw4PU?b;(v&lKDlZUAr>yWjvK?HF*Gvt^6VnLn0_ZDL2 z#?83-sXOuH>rdhKM{dKwhJO6!?dS1}7al@!TQMryN-?=<7^ZX$x(AxDdbAT)AKZm! zpMMAkuGk1a1sxOLMVQ$&id8cm*mlJ_%x+nY4V#B>!_5cqz|U{OrI)YA%=#WwHKZXh zVmUm*WawI7j=NsC91pyG5WAmTgVlF7qIj=`oNpOCGM3`j7q7tWzrGw(`&Qzb+qU8E zpI(J6JI944?WMQuz~+N9*mwUHOkCfCnLB&1>1Tb|`{XdLd}yC)=u>pi zBqzX}X+lDpM(F+dSi|994TXJ9I0YNA@TfDuht9o2K_p!BA`#wbK}>5pf-4O0D^Vk? zAsM<=c`)=9AfY=G@pK)q_BI!*Oc|q~mdrXzfi79flnZ4L5fs*yd;y6P3k9Irz2>JrSB#^I6FFnp~F0)l+-jy43h6~v%% zRSK+h9cdZ(&o&`-wi>ycYv5a<#L^Tuq^_ZBY`Rha($sb2h)$GJpraH;C{5jYB9QUR zi57a40h}@3V1kwYuXUmVE;$OglB4fr^G8T=ES#-D@E|8YqSlDOl6VxZZx*mTqA6Lx z^8B@pNEs*+fk0AwCL+r9NNh=)gXPUusGCgUGgJnD?%DukwiF^r7mlc8HI};DQ9t1# zf}n`la3Kre1VMKt_t z;t;^Vyg?1`sz`X0Q-D|-EsAofRwhH)ZAM6Yq5$Sxs4%RaBzoWU@|a+YHW8BRs~ zY$0OCvPHnopOq(5KUliALx2F*G-nBx*foEJ;tafbC}n&z{N|#a@&Sv;7UyvZlJjzs zEQ^$ZF2Qex>kP_y$Y7n9{YS=`$qc?3ic4AM(s=wV{nk{Dm_HwsOYl5wJRORuY$&Jy z3d=boR!FRj)BX=2HoBgzjlmXExFXix6m4pmC%Dr$2ocm)~&!GSw3C1xRvD3M!lO zMF#orUVR#l2D-;`B9PWoAhyfxY+gD)xTORkYq(fsVL$f<1>T>(jmceOP$q|AVCM*O zoAYqs@@;tL*{O4N~PylGMt#0>1S zKsiLu;l5NPj^-nItUyQzuoMe}aV~%uOxGcQ<-nTM{BkCLZ<~PSzNImuFIo`i4FB{9 z{Pgw5APaX8mf2Sfy975ZigAE*k{8S!8Cag+iomQes~8 zknTr&l+SiT*N`D(SUi)%QBC(9!yV2_=i_SaFQngCf|SWh1T^aDS)&DOmj|z$E6B+J zoIyFi08p$nL$!+f1nMiK%yJ2wGcac$E*1Y|llRWav9R$p&zCaGd7Hd0%dmK~YT??X z7R5gUnsq|6e4)_|51o1jyC1s}j>$goD~f=7o&rJiO!PI%g$#?g$_ozOE8yqvj?vLR z{NWGJ<1aXe-hpn|xvmg;<>7JR;tL%)^{4XCK(YYxG5wL7Z$)Kw0Y3fwG~RmaKgBkJ zlz!rw?5^~HsoaVabgmheE9wmhX*CGlc}1^T91A)1l?v`Nd+3~#ak19u)pTA*=^h$&5KzKAM79>YGFsHqEzgsz4&c@?q+W=vl}0 zU-CEBqlkQ~!gUSkxnhm@(!$)8hl&jyC|=tnq{NJa`Qo{ry0!wzYsrtJzD7^|0n45w zZzF$YD}!np-&i6bInSRD%NdUUE3iCub15veT{Hc+%(dmH*wu=r{j1QpdnKy2w4!Eb zCrY+8BX?sh(l?TyxTQ+StLQgV|Fgf z!llgd`4TA-440PUAy5A+uv~)J7tiN*X((liv++1D&%eRr62zVlz`2d*NhZN=>Gvd) z+W(%-2jkN8{I(y08PR>?1bj;(VCc_8+YMu|%MF5e zO)NTZpGNjp@=N*RF)ImV63pjOb(c-+Tqs7A?F&s1FPE6SZtYqZJ~nJT@_2m^x7n zqm6u*EGtZ@Mkr%K5uFe&zIHJf)krkO!TzKCIn9v-723xmO|hu)+WkUicI2U~WE z&?}Ej2oo`dEsv(n6icV-(K*zKhLsJ-Z!CnS%q(imusmYj&ebT{*bUzz9V)i=BWYDB zQU~Z->8Ds>xCUvXv8Ur7jfd9hc7_#(?_4ii9=6bDDWxl&@V-SPX^_}X#D6q zzZ5boUw-@=UZOZt$}DGC&e`QfIXTG9%Rq8&3gQcrP_nj-;+JM2!(u$2ojo6x3t&DE zmJ8{;E#*kr(+Huvzm=hH9r>L#h^9FE--YG#r!O|1CqePQ2h4v6e*brE{x&a$<*ZrG z1wO4i8~!GYjuz7m}L z?i5acc^q#afBgb1fB)n$A;a>o!t%cd%zuRCKidB*`w^D^AGd!OmLEFuE>4{}iFXdY zjX%>Pm0>x{u*9k7vdY6FBcRqKK&MZf1Kn!Q22T>kndN4)8D@(K<`gTEQmqu=*vKhJ zMyx&wv1&cEY9kD46AbZ*(8lR$8+vGxl4uzdG-PS!G+2%FptM*JZB0g;Aqi@=28nT6 z=(RdTBvQ~8ABnJpSj5D{z#OB6S`md6&dylw?SU0O?y&ds#8TR4+45yrxO4^V+}*G= z#9L&3x-6F=({(9!`TOF@uuvRIP~h8yU?9vL2ynp1&dczHCK4|iqcGvI09u(0Ar#d6 zdD+9xc?BBV+c7jfBQn;5EeY_>jzu5^Y#dCw)yF~JVMADZ8X~(g1vF;~79qp3k^y>- zfaNU7!mykHxg^J87%iMD{5cPnOEy27T!QC3Ey45o06lT4SUeEZw$Q_jf~BNs3Zz)K zaC4)8IQlT7^g6ehP=bJAs!@{vJR1)jimH~G;$l&2&2aP5S z1B0!|%1%U*ISle>7sOiwarr%)@%TIU;O1^fCllTwyAS zLf1$o+Pg}zb@K!c?AeSWOW*^syP-^ZGu#h6nMB zWBah}v6V25#~`9h0n@M^D|@ZD&JvE-3{g0v4Z>$CM<98?O-1oW~7)IY=6q3!+);nF}Ra$0;ZtFM?^b zfCBM6VLZ-ll36E9kUm=}0&j-ryi8aN-9NqQsNAzsWTdA}QZP70PSG@fX;1>gG+k3O z{8=~s#%u}F)|Hc!P21p1gEeKe%{eO{%EyL|Wc)NkDZaiyh#%h21ml{_FjRM$#WiOb zp`eU)##!E=MGMbzIbG960p!^MO`t%Hv(~a{nx#hE=@?mi3lQIs0qrxFGn~DiIa!UIiE06AV{1&1 zQy`#gOo6)Ah?ts0#8vBsW_kHogDCi9Dz_nou0@&s0uczY#0pC~1qAvaG{hfast`nS zAx~8>qSaBNs1t*9E&$4zLLu@%k^RU}N75|k`3%*aJe}a^*@C0e(2cGkm3uuJ081R>mW4Wg3hlg$O8)gQMOLimW&!R3y(y zUKD5%Q)Wc|NG+DddqNiBgfI%e(g(^RQ`te^k}0HecwE5qDl2442gKFT?_|b`%=na5 z#gO^aeVG@JtdS~Fz>q(QHg?f^v5rDEC%(ywWkxR~P~X;h^BVY6#lp8b4js2mW7o^K z2+eZ74q5w`C0Mvn9>ZmkRn8f`lj&j@&|wf7<(wt1WXYEC3?VrZyP+5?%fdihH&Y}4 zIm=BMXG);zPZ6+OyRPH{EN8eaWrxp)<*Y}|@+v%^my-ZE4;hrR@ic>UUWV6USkBWt zPip67<{P*1Jl4Es@GZe{DU+N{8fQo@**}8ioMq3joQs#nPviC9JsLFwwfLOEXO`Sz z_?$ugRYYk5f)fMr=0~sL7cV_1GRw19=A(kH83&(*c>KBhas2GNaENk3U~U9T*EYgM z>xrKAUF0!*hFgAi9b}3{h-tGyZdJi6*a3g}?nAtF^!EZ%u#{5zszNx1*x}7rpTp;$ z9u zn05JxoMjo7RK(DEV7U#>ESH&F;Z;QbMs*@x>rSH3=g;4H8qNlPDD&eW3zng1tO||> z5BkpwMBRk4>3Yb#WFp(VY_?ha=aBq(luS1xFeer(=pL0txnV)92kN)6S+hX9_qzU!p{U>AWmwnKNi+;LhV*+*1@0rF+t^-GHE01Nk);EJ$+2 z&yW8KJ0H0muC@U97e@+dmarN7YnWv z!P%ND#lm0kaPef;ERUdm*wfP<`ot()bIpDLU*X0ZuY!-StH>^Q^P7`*Nh&tuFwP)* zq)gOrP_`!_l3x(?7@_P=rek3h@=sB8ZledNpBbWicQhNCi99HKOo*bsMZ=ll({s`* zk|nLBXD(U7M5+Mgx+%JcMpF%F7iP;;Dw63!)1op`RLLzRV+8v7%Jg`Jf>qWc5 zA=U@7z!l=Fq|5KV7O^HZe3X9h2=WrX9Q%iyQ65A6R$P)=WQA*t6n|O`h||X+$)<-f zmHNSiFoZ+|LKzhVU2;5vls**ukguhQfUCD7GV@ar5*7e!Y7#8zMkHBvFeGb4X1dm_ zM)zO`x`(>Z+|z`qty5_3ZAL~_7V=k?VfgB`n7DZxDmQf_YrFwtckD*#h8|RJ>&M6q zTgf(~cFQX0yK7s|@YP+VM$f~+j$=A^@tOTK@u9)EudGKR#Y_J$GRrS+lk7q}?cd*n(cEGklHv4uy+K&{gwL2rOEA`J;dKm^D`5TKI7 zUlj&Fr3!v>6#{}Opi;y@6-*9Ea5%z3BPd9UK(I=M!0<5IUNp3dI7Ed+!!tY*&M^^i zj|_*0Tn^vhU<4`@@QzZ#RT%_TbR-hBIuu&dkzz2yDcBdw6%>SeI%0XSH=M~)aa8%h zUhaeCtWg}`4Vk+$mQY~k7T|#xTCT=xIj#&`j^C^7@ugxh5F`UscKBLuhxcQ>@k&w{ z4up9ji=2mGvLM=S(?Bn#uQ&iZ3hca-VzDrmem6A~&Q&q+>og&t$wba31)a@YeswqY-mn`(8wc^kAD%#RsTDh}*^b#=d}MbE|>whl71k>h^juXo{w-)zB6|FItTyuKOxpB_Z|Od{fX z;$a)jK-WwqM$0w0B{LGgi*dsl`7(SMEW;A0 z7OI4BEOl9etcq-0{*#07Nm9Vc6bkFpw{tTg@su=c_0fr}LjUmQg6FBZpg(bnt{u8&jI$Leq~Dw9Nye?|a(oc#jXwu@;}5ZZxGGbHs%|s1 zvuGd&R01yCQFeuS&8)FGGvTZifnh5Tq)YnBCgwjGBx7qo-*|0 zh|F?P2(%?l=#$6Nxr?h#L~Ml~`Z^7odsGCN*mm@kc?eNx&ZsVNhhniL@c!BP+MJT>x$YeYd$d7%cGt7+K;FQoNV z2vE)$<_z(cCHNwcw#880g^sDBNCR7MG3=B4@$;k43SH`DI#0M*f{@sg1)0uSXsavR zj3TqS?9v|e-nR+%MRJjmrk>0ZatWMSF5vTIhLB=m&GN936a=>E5xY7A%Kj9gUmiT3 zj*zJ=#B44Vg)L+0I*y&r7dqw)IXUAxY%o$^k5A&sM@ie#dvTV{kHVKxqab`KgZwBQI%o&IaX%A}SX&%l8<(z5GLx$z5 zv9t@YoaI#{Sk91-fjN(})Jh~B!>Bd6Vi+-+DWqEBhUnOgWkb8A0#WpTS%=#^R)Chh ztKez!#pOS{44>g6lyuYoO^-xHUm0REqY;-CCt&%t_g*P7x>r*iXea#VsTc8! zmmd(|H?Owv-?!n?1WUncQtJxE)Hnro# zxwo-;M<13cm!o;M9eHheh=>owx$oY`v5()v@{r}o=`TVWJzM$3(4kLX$LTNLg&{MJ zuK!4+j1<%TVny^+A$(Sukg&Eyyv*awax=e(9Lg0L!a~AkhR(yfd~rQSQJ=ZjYWFw721;#^={ zl?R^^dN%4D#j`x3kM0Ks<{e3ppU;|RILz6g5!44WKxaVCP@I7`gK~!AJk7A2+oa5L zhU5|`m!w!YBRhopdWP{*aZd*3Ece2i<@{OqB9lArd-oA+f9O(?S?*gHE?{|ZX`Cpi z?5K2uPnb6XBm58>7Y4Igi=-qqY^mfkxY>)^5ZuRdeF%o-Tn~aX%MIE%%*+fUF)P&&i0yoXlGkG$N_R~zy(3}gPT!Q1$Gz0Q~2Fr7|)gX6cHIj$2p(u}q zoz@kLB9_4^-VH&?Ay`EIZD589mcAU6>}WyZ-gczzu1C`LN*K153O#R@TVdH1_7~VB zaDK7<5G=QLTbjr1JfGK{58MA4{O0+RNxwJ0?T75*?ap6sZks<0%T4>}zcMi2Ux}Q9t%zHf z0sYo|B+2heiW5L&MtLC3){bX-4bNfcFfQTt+1kUg&d z#VrVqm%}B%1)jlPqF>^dc>Ki+gK|x>4pF)oAe2fYB#%s6W;Rmh+a2$7BKa1Zzdn5jQ_7$8y z%wYWS3z_A|-<^|TIdx>tP8@znNUt1u^QXdi{P>}Vsr^?Xv;4*9e*q=+mCi19sHmtw zettgkGc%EsO+H$N31O*m$R4Rd+FJ5SHr7D5vFxA1a@H(2Y^FY7M=dP78<4b(3sKg= zu(s;|2`p#L^!aU)aU0M3d$3%42+S55W}T@+t`IcHy;{el|5z?WZ1cJ^=V^Yiu@ zT}+>R&BJr}^5To<$Kn5;A=y`CUwrlzzW(YveEIoVoI3Fyjvb*6<>VQhI5syte)O2I zQ`DiHJbnVljvf}qFkKq|&*>V~Bb4v;NdLAD$V>>aVp$pelq-mtfGgWWP0ING_x-OUGX?mk%V zNDe)1!_LtS9?Lyox6m0fJ6hk<9Wq}pEb{ck3U?1UczI%pj|XI~_VDoYK}=LMvXgBv zCMIDS1zj><7cBB~!(x9|ED3bM!XOvO0-ea*uz(zZB?<~=!-F1l{R7uwWa}`tUb`Jt{j~y`|MaQ*@X)glifZlW{_-(? z`rxg&_ko-7$rs1S(fbU>%mlcH+M$k|yB-Sg*Y26Z4YyuLPStn#vSg|S)qr-7)MhrSKBjM$?6iMl3L>gk?NY{|e zYbg?oQ*hbc*TY{Q0bf%jJgi|@V)n;!YXB4_38I*yJY5aX#4xz0gdw;@i-_7}p;sQ= zlp>^9k_HN(q4RAWr@(H60>blv+%i^zD+T>IcK%8+y!e}>xOcK6h+GVDzQ%5WR=Lg=FD>QOa=5aB}kYp5>Sw}K{?13g~llO z=g-h}6!^1dFE5upo`->6E3T*D|D$j}{3X~Me^C43#==;%^=HC3l8=matx&Y3!?iL_ zfN}F|G2#bOk-V-#WbpYkszt`HVJuH%zDKuOgggfqC1p^ayRn(B^$cWetVaxOlVw{N zSaFdk^JqR2d$Wcu!`-}8TpYOx}?QVa7yAsthTfbR^;Glt5buD2kpR1bN6 zEaJ;_ur}M^o9GWiNg_fG3dGyga0_xnXhaCq+8F5c@leSF5#;X$d7v+x?H0quehG{Q zYL5sN5-st%IA{_Rpw+9P*2F@c5F;!yn$B-%fRJc$_j8A50B2AJz~0LVi@ofq-*Lne zxf47!L2!=ofsZ~I-nt+>`lqMRy=@QzZBIkt zKrw<1et7ov$0>k6h4HJ`(79fYoQZNo(7CS~sl++j)_uRZ4>I{em{u1djjp+HqXJ)? zJB3faKSR$=8ItH(n9njkb~60o)o18w@hOt%`eJ#a>TRv?Nee*TL=EllDeS#x4;ILm zpmBX0QW|V9CO4{pyOWK!i6_e@y?M zi`x2TMdGOsUJ`Oj{Dp{hRW4Y!TNb+ldDOQvJeP$p6GfC6m@j16rR+!)t)cTk`|C^h zW9yz_@zPZm?FKhn7#3@MkUiQcUQ)??7a%H6gW{1|EQ%sODB1~G6V-_Cru!;Pr zTvX)i(X%roDp+JvM#m`O>`ceR*A*d(0BH1aLhg#c&f)%)v&xkrfym2FLv3v_a&uGQ z>*a_5^5?>pfe5DO5JUF>r7zrrU6EX#f|GRqIkP;7or0XJf zB13!;qnpSVQe?KtQY3Y!BQ!4pcJVG)7GV$nB>G?U-y3`CQB+fm%H}E*HeQ2Zak za{g+pW?wgqy;<-gKW9aPGdvBxP}r1ECd(0^^FwrI6kIi)SP-=w?wKLNuP8dug|xjb zqVF(nskk7)!p1OMg5wuM^B;oc61b%skG3 zTLR9!9bQg?;PU}B8_$!*c|A4;=bUZM%O%n8NWYP`yA~OH>;J~Y_Rd@K?rLG?U9=Cp zA7mEZr+Fsrr)0LBe+$bmEJtlA49oYjO=YE-6-AP3HP#ak&w`N^CT9hdJAck&Rf?Ybz`-V zUSSy)r>Y3JS4E+8R~x!+7)R^%qoQ!GV`Vt9FYQ1fZ8zmW3u^D26osa_Eo)bkka_93 zWeOho3PjfHF>&Kscv^#?Z%f6Rd$waiqB}H$SptUV?Q2K=W!(bgW$bSg&^-5&PNdSX z=Eh+m55t8-3wO>LgZTXIO(NT!_4czi)uM2BD~k5C3CrKvEPP)sV#-5amg@wtG$GgX zVQE87AYh*{sV5(X4tj3WbB4bVT_|_Nt&jf%k=A$w#f4J8;t6|Cx;Hh^qLxCWI#TG3 z^9wyyj0#Z+QSg`3{iBIOaCiXp77fKS6cg(rp)tiGrz9O8d~phYp;+hr4-doHbukKy zGY~<2AQw5#%}YamQ6?H&s&U;dS5y4z0`FiCocQo40>b>U&|v}gUbCB?pI;(G8;o5y z?tycd2mG}Pymj^jJt4ow(Dq4OPchiU?rF?kwh?cCc^H8f6?`qBa7p%uUv`-AC4N}-|z&^S2R#w}HJkIos(vTz|<^R}7`mbSBw`XuUG zc>eYp=vn%Y_0DH1MS|KZIE^(wn}g-a8(7wfmf7*I!*bo$$~h>0ewvNPxsB%un1BAa zC5S!Weh7a5cTL*X55aPlVc{a5mL1feZK@VEjvoE;cLJ6(7vKV)R`CLX{u3QLHr6g@ zXwC&bB|t7^j?Xu#O@iet$-?6-#lo;WVK@(~_73CBU*5ypXWkI7{PgL=IQ-5VIP&(N zaOT8O0n3k^WIHTi`SDW>$PWux&L+X~`M~^QNG?I~`6kWd@gHINkM^&a44-}qeD*26 z|D3wlv!CMZSD)eYbD!a}uRp^lUw?tm&autG@sGbghY!9zhcn-u!>K>>@Ed&g)%SGa zkbUu&ABX?jhGgfy1it+2dph^P+0Vbj$zvbk*x@rcb^JpdKXMu;j=oQJhT19IJwbN- zeK9OR zxVm}3*~JY`u3m6-^MQlAFYIY(=jts$`4R^YEVXloos&20$yPXcVwr;*mfE{w@pa)FP#Ga~Gl!A#bo2*P#xC>)Co zz@I}L@vZ*~oC{ciZzKG1N~6Rb;eP1wvBSo`ChWU{IBZh+dm@W$7yKT_-XTdO< z4=n@IsZxgMvUIwhuKHR&~|$xHa)i%BX=x1aalzNNzVEb1((#e=>plkKB%X-n||>e>IKi`&VM)!+qHH z>^QdnejO%hJbxkySv^|Rt}8(8c79P1hSJq~%rwT~?i>~V6zzwzJ}v-VH&FWEj|Lyy zVwJAfoIE|^ZAfYWy02d*;ok%oxc=Hw8A=l&Wz`<&JZHc6eFsi5qgF z(9@QQyrBvh`wHP-Z$w~E8WLIebf#X&%dmc{lFko<2`vR?#;Fn{Pti3wU5SkKb;#b- zC|=rdwmY{QCW`5Q6+$yY*E=nrC|(8>3W)^URGE;RF|5v^>$yJOn2xEEjyeUy=m;2Smz`rgQ0rhbRYE&bnSp#{i4vIFtkiKD) zw;Du7rLr{2)kf~inu~cnKDqWZKyJ5>wG**YWN)wjGy1_Xy z06|&NNNUMMKz57(dGYl&$YNb!T~&2DnRr^jxe5P;{u&RqkUwqfG5k%urV;_ z>~S{LL>A<0k6}3%Q8jI>fOaxpd@+)~k%CEjp7@tVVcTPu z;RrrN-c$wMHzBYMP+!ntLqekor|=PeclK2Q$TQcJi~ePi#tFx%{V1&?i&_dBozvQF z?N}6JhZnwh1r*kxaaT9|^TLomRsuz7EDFZT@g6?GZNIx$K=CY^E*`IjquPzO^a+Kj zAJBEUL;&WZkqV(%{`A{V33-^vf;edF%&1z|C^EF`)-~aMTI;Tte=0QBODAhZ2Dzy* zMYO+-!_+q~Lf&{8il?jTo|4h_$(JFEsEk8+bv!K8uV@F-5YcTy>|iQ1bez1aA`#V- zj6~`y6X>wZA}QwZ`_PAh=zJxRDHmb|fKu75O@=Xd8p+;wvZ4Dreay z{bYgoYK89=ZfDbs(RD!gAA|5jx<@lN(eH1jXAQsPB42|6GT&#Mt%;hDKPIP#F}Z#WgVTekY9rq)kB)It1VR!O zP^3npaJ&Y!dwN91A3y8$v&CSkG|mvWteYE}X6U&%O+Et+&9pDJjkN3(JzuFUbyK-m zPEY-Wb$tn{_IIOleFr=f>H4E*pHG56!je@&mdKs1DVCma2wDsW)pCTSlJ9B@!g7;0 zny(r|?v4&vHq?j$rVPtDqg*>nzq6@CKyuDDXBa+Tp5<>KIhknN_E*^z35qj(=Ai_} z|B+d?Rs2I^eRb>hN~G+l5+;qO?y30 z`|9SPH~khDKh4}xgRGsk$kDd%V7tw#V?D*O9=x0O+(&*1fd? zoQrWDGDzQZJ_G%{zBwabP&eH^iK1)z;M=AXTH~x`-*L-0nr zm0r<}@+()O^2#3JlX#a#qwbPHC>xCMEsID0?VI3M5C)HuDD>X75&65@=)TK`C;2zt z%?U7VszlLM-N@MAERK059iKcpR)q(eP_VyIjOWnt%I7wk=3x#U$4ol!8MJ&BoqHZn zqiZ&GeK`uYHX&n%&KFtEh9;Q!g<7=%F66s-P=Bl_H&Xwl5Rzk$z4Zb#g;uyyY!?u# z5J?YlIyL-50uUJ&C5(%8a?(VcHWr~_!3c|1LKUTeDJ2Q<`e-4sl9EYrO=7G7cC!7 zw~K~!pZ_~HAENW`OE6u^Jm)saOuOranfEjZOWxaf0f;B>su#xN48$408@5otb-rDi zHy@sh-{S4iy~M{Sb7vD&?I!%}li%RV*X}{udU|&4Y(~oV`Z?Imu${NFr;)Zdr(Mp) zK81$)JmWS7>Pg%F3fOs^+im;k_>vj6REb!wdb(L?mUDs6qwl>VWLQodeFq<&K7rH6 zkKpv_lR}2&@QFis_t-l)e2nG`P4mO}=nN-t{w)OmM>ZdzOUCU#!tx*OU$MW1nf74T%(#2s6Mvz+dQr`ve8S)!Q2`o<0JQ+q?N)FgsUYEO++CQb$h# z%z1pit#DzW&S2dS4(|Tc=1FZ{Vmpo=esJ>gg(Gd3&B4Q)rhTx&)m;?u42}qgHrWid zF$s>Gb?)pW3VgC|IYaZMzV2A=?}_DsURWCFiKPs<-v#GrcqAqWPZ}a{XLS~?ndpFDz%sZ+dkHA&of!># zYcL$sgT?2_{uR+8LpZdNg3zX9gg2)lww;2q?qWo>X}p*MHwK*)e9V-KA;WV0Bn3|lPH7$+PfL)Tp*fp%rV?2*b)pC&Tgg^(GB&p& zrX!X1AsKlan}y~x7vzhtOGZ37KzY3-&=l#BSe%I5)_jx?lC#=bhU(RgsOqoB&g*uf zd#nR3z4cHhMPl_tH%e-AU`UA}2QLI!14N0aIH>;ThlnH?L*LDX`$K zdkuRWjhNoeqTR!{(2o|eldVmw>Mzmo+gak--h1%n$dhu3p(y- zL*7sl>LxSLcc2kX2Wk*GlmO$H9u=)I*hUULYto;MQUdZoI?o>XC~O6ui}ga|QU}D_ zdkT;$^H~U4=u!lhnsEEmk3yTC2Jf&?c*Fz<`GL6BB=}~AVo|gUmZeuF3t^&Z&X!}#8p}roU5ERN=-dC31y%bM(TohMGx zK1`GdaLy7$JTGA|>w?q_%g%6ivS!uXF-sn%YoD&)Alg5tWRR}XsuUlb}otlv06ecYEgbnG>F z_}B?;$%G^|%r>KdFp`9#!MbqR5h~-e16ShR=&MZg8{(i{hmbEoKDQsu5ThhoJg+ zQS39cNdrZT4$4-RKrmbwm!{dIX%1FnR;41c+eY_H24XvHSd{1v-~0dxUnv|lQ9T!wH6rKvxG)@`s#AHrO4q-$J(+gA1e&r z@XrZ{iOvCMEAue2S}UYAOe-^B>`a4CYA}{3I3tVtHU@jD(padQj8Im@p=e`0D)+XF zeGcz2B58e*0NC=?^xvm55i(+#lfjrs7f_l(wFIjr_{~x+QX8+!kXi!aZ1cf54;i2{ z_~xMmw)wMv9%o~)!%&CEc^Up)US3*8`fWC8T-v?_*rjdpJT+&WPtxz5&j#nrcZT5% z&^a@lr&(S_NUTh7278_;(#g}DNzUUEEN3XrS>|l=HCaNEMmagBS1us>1Z$JeWtOvM zIm=A&3oy6JNV*4$5x+W96nhJ5)L==P55ig!A=BBTbZ09XFY7}Tznm!yhj*?5vH%&> z9TxGzmg^yS6sX`;6b`pM1)Q@(kh{JXsgtGfEr~>MRlLxtW_gy;hrCa$W|THJ;~7Z+n^n=!7!9geN#HZyAlN?=WJc6xMKnh*JY}6}h`Tl$a(|-skjK$5bJ_rY^KUB3^#C4?z-Cn-`0;^)hF({gDm;>f?uc-HvyEqT{n&qfo(<)vP_@_o;^x$ShF&vL}gDln^GFql`T@N(18RDJ_%7{ht##I8a z+sAu~Pwur1R{D(vDBspf&kySRSpI5VF&t{b#eKn`KlZ#uucqhzAnn_L1;M?^2wG)^ zlG@lf%U%HSp1Go+EThFzCM;{D=(UKfbk9}|+#BLV*1B$l?v=r8RBdjCvDJ!aPCkcy zKf46V+z2GpCL);nn5a@6H2F!0v*{q$gd3aq;1>W*HF}>5oY2Q^{KuTHK*E zYQ)hw4(ZT}mmd7WNP^<50){dpBVX z_Z=m4Uz4v!T54X_NB!80iY9?{+~XBp7lQ;%KSrm=PXFlNVAV#oRkY@Qv#%;X@( z#(FU^HG~P89vJCEYgaR}i>V(WKT>IoKn(d^Dg7nL+|UT!bSd;}OOeF2Mb3k99x@nD zr2UWpIRkVa^8AzyrDDkQ8KPJ2?Zk>0FOiKJW{E{md>~u`?Xha41<$?oFiwB+C)|49 z6dLZ1x6xs9j) zky++J@%bjT^Y2L0^XE&zd``+_PHsg4<~(FzJ-=NtDdU^R8H8K*%w>%8_R@D$BWpYP z(qtLis|74iCx6nkuLkOEC5YOTkC;v5w``~XzJvNGGQ*B?#BZkmzP(IjqJK^C&!OA`!OIB;;Hg zu3wG%8&*TP(g>$=r6_J&N7MXrso=5>lwaEm6J2*H+p3Yis~!ahI)oI1ocx%=ohuR6 zM)y{e89g`6AgC%q7|W-W?duYn>a3TawvAsP)YCDc;hs9=?rTKe{ssZd+4AYQF)(LH zUO?lybS$%X(s|ihAuM}arLfE`wbBj#>sLe4tsuZBwz-<6H{jx6}( z#EGvzWfZ?XfBFq%wv@s@K?%R;Pw$ zOcsNvzhJWHgf4kpLIlR>o}Zc-LVbOy=)(+LBvc(KzGh_D&R@m)P%NrTrehHiNbyh% zwqL#((WY?tM|dEu+=d-D?}J-hFg9Md7g1??q}3K<|7{1+w_ys;z4a=7`QmTz!1GVx zS8u+Io1XY75=y8q&o;o^kPrXlNJM4pp({;6Oui8jxdz0SS!uow0Y>VNsZS_xtq@@R z^DjOS5*hpUZ^xRM5p3VT1(#mCA3OGLL-(py^!B!5^TrX3P#k#2Ej!UzWyITmd=OXd z@53{XUJiWy3cmQ@S-gMpS2*D4)wPe-iHwEGI>YItoz!PcXH z&n^+0u+Fw_cO5izj~VyZ!?c%WOsfB({SY9ZZ~U85mbsLLE@h`n5M2W4^MUyVX#RI# zIZM0zE3jNo+cfWMqW-oL859RbkWcjU&z{GDmv5sOtXu$ehUE;q8J2Svx{(3#yGb z(f$|OH)r3+_h&!AH=m!upTGJL-+u8P-aq~(P9J$4ADn!X9%irO{S!R?#sz!-#A|r( z_^UMUKXKyNA90vEw|Cz^j(4a-`}oiFP{sGK^Y=t(LYy#VqF$IPF%kBGfmq<~3CDn7 zEcNukaxY)3aGL|)^I*Je3Kx#qelRoJOc$F{~J3G$t82~p>4W(2v8rO zQVLMc=HlxEI}dj_`%?fw0oHO~_Y1ImS%4=N`@3V2k1HI4eFaFj^K=zbF226L@N{*9 zhrJV&%a_P@EPxISwo@Us{Z*leG3_i)hUrUbj3^~k`rO2GFg=KXy z%C>YMZ+#Q(137Zt86wLBZn3E75*KGgjT%jlMhkF!YmQbl$iUG2QV<9<#zYnv8r3K+9SN>99}4a32(Fci4Bz}I~Vf(>%GP{5g3lZ`u{c?e789#|3O ziWBW>;bFJ(uI=XMchlfBO@p50oIT z(E@!>=3HUVp@Iv*JZZQ9i6azX4do+sx)Nz?YhYynMQzEGWys!8kMxOh7~0binimCM zTPQ3YnMkJVNmZ>w-sUFQHq?sig0s{(Lz`t}a9$Tp=uI)9I;@Y+h6u~Pa9K|!uNNUfafZtyftn^M%BDpaQ z<*O^8E!0u45ras&AI$~H@Kt$>%tR-52PBy_;?vj__A*39hoG4Ph?=@W*^+_E0EE!><0bcjy|*Kl`PyS?kP~EnOCj@K zB!Du%a9J3<0+0Ra8MLhLfy|e`RPAkk~#o}{Zr?eoE5w2-WfqQZgWWftyY{`VJ zy8tdpfkJx4-5e@Dd6h*tAbXe`{+0|{ZV?)`^$J;+p8v+=fgc?RY@&c;B8 zv&(s$m*MponsXZurRCUod%Qdw19e`O0VV$iZ&2Ief01ln*gE=Mq`K5#TO&$ zQQBXcX2~1QvNDY22%Y7Gfi$RDj-uO4_i8aRW~r}OorUbR70~ykA#YO+5{Kyc3}(_j zPS2W=T3XPnj$h0cl9BT0r;2fhf6|AcCQpK^O6Vh zVH+++CIzc00|ltv+6ilK9;!CAiQ!U>E5ge);yTJ5uM`DI&HZ_BP7M-$o=mk+WK!o* zpO`q1P5VpdW)&Tq1|6)_zm@N9hlTpPvRy5-PvoQ2#UipzkEEdt=mt}fzLsCeo|x+F+jH{lb zTUPk(;= zhHJbxR3$p(Z)%zQYH;?S!*U+-y!n~uJmf6%f=%`CPEx>MBZr&Z6J828JpKH``1Ffo z`1F%^aq`3;@ZraA;>ej-#7o_ntY`$Ls<1@kiP~KQDBsr$)4DPNpBaj?ZaIT z<$G#H0nn_ycUoXLGji`Wl_?vm6B z?5X1f4ucT#%~Dz6woaJ?Qr^xPl*$yPXL%b_KoxBr%P z@Gc6UO9-Mq+&GdqmlUyF_N(aOU{;hA;H4Wq^$MT@LGY|M@g5 zrJ3+l`N2owFXUFjV zDIU&lDEUpV#9=VOUueeSaOn(Rho)b6P?JbN<&UH z`3EVn$Z0P_MPCzq6BJOH<6$4{h1ALd_{J*XNqwQrVG$PjxnMcn$}0*)ADd)MApe$p!sRk7cUb~^ zmlZ;a#mmb93W|5{xb*-w%y!_eo3{Wsj932SHoWzp_u||q&*Q{9zrY8lo)X3xsU(Uc>KS{uvB<1soigAS){eMaAVpyF90m z`rDL5gc`yTm8VD9+IA%HSJ-`ItI7YNXS;IsT+wO;`MVrLhml3COrd8#{cq~a{kxOk z*^>xgdVU43q~~0%fu5Vucmu~UdDjjRTQe-z@2MBCJZWDYjC5c95Fnp#7sK)YV&^l+ zxps_ZbGaDKLHk+(#2K3ZJ#fw@0r2@I!E(+nzZjHDCc$zoZJXgY|F`s=O(J>b;j_QP z?*F(^NVI0`Xq?L|r~5aN*ZFV4avn;?^B9(=9cUBt`0Mu~iXGnl;*j`a;>ek|MP~W& zBX8sMvBNm>&YL)P?1+$I5fUutVL5A-pE>@nupeRhkM=)hGCt{?9sc>*Z!g%FWM6&p zEx!5uTYUfNx4_5ejRE36^8sC2X0nUDP2B%N{ z3CE8A5ob=liQ^|;qv0FW!O%1r4^N+Z4aZOZ0Vj_C9*2*=hCiJ-gx5bff!E)o&gQ$b z_=I7(A2|SOHG*T~5T?^Zr8Uqn5sm?&Sm^2lJKqp2boaw@?;zOGa6T-TfVpIIKs-PI z@{8xON%Ad{go~Y<=XnVhF9FNl`~rj=i!1GupF%D&+~boH;pXoLCm(M(`_Zy~o+7*a zzrb=oH<4w&kerroNX zYNz0|odVPLB%wj<-=q-*vqD;pP_~)rp~m{ntV_<>z!Z$o!(2SjCn-=FXYKM*B+pj< zO`EhF19P6w*}5#h!rA2v&0{+$fUZjvL0-jZ!J;_=s&~;AxK4m{R%op)+nSEn{m}0 zmtcC&1WMWqap0CcXz8s(xH=e19B3J1B(n01sHn+C>q>IkoAa=K?-)jRtU~vuM%?t= z)!6y-&A9y8y_mRn1REdUfXjY=B?j&uMa8~aX!;Xjo5~iJOM#eSFd2!f&1j@RWz(Y@ zaOn&CaoO+oVgK_xu=ANs*!aXOwm-8SSH65DI>^zVykQt)*N>uRQw{Q_3y?jWf%>s5 zbT#U*Awz}R5<~F2s6d<~XY?FhFQ0`3;AL$*23^VNrT=K>wGb|H57Z5J;Jz0hfoGB& zc7{NN6zCC}u7#UM0Vi!J>L=T5X!g4w+J;D+sSySYEwWJ^@GYqjM8tl1eAMX0? zJ-FhLYf&&(2~~v#*|QYT&DPNQrNCjj0_v_bxaNey&K4ko6xVD8Wbw&M7dx~j1y9{biXBsio%Xd(?TFKyFzAg z#xe^zyC!nBHTGC&a>OEwCzjg$ge^?=g3RP0h6~Je-6Xk*_9gVYi!9!vosFlL(>~Z` z1c_|crB?5`ZKwFaB})$b)IcmXd0}aiC;SUy5LuIi@QOrORuzf@l?-{^tqP&Z9aWHk zl$K1m$NQkHw@T>6X4T|jsmC(-$f+NT3`L;aAAZyiaOMx|=(>5VfQOeoJbfG?kKk)O zP<(0|tBDp_P-{~WFn%)asiezC}$ns`A}Sf@J1tK5zB=fOL&ZJF=J+ za5MX&XrdCbu*E`7qiydhZ2#o}gqB8Q`1W;p7w@BVcMIG~mGEthgK z5c=f|p)WQD;cN`cS*nHG7+}u_>O5Z>=lSzt`TXU0nwMqJ%|M)|d7S6X2l3K+(l&TM zCD_6MNXjPX`3%b$2*pmbJj$FdIqQ(KvBo+V_l#T11thcPw8=+O1@MlZ&Jhwb49R&~ z8duW(Gb~rpJ~J#=()fH>E|wdkWrl2s7)})hDOrD+HQyQZDQKvh%!P5b2vL1jWNfX0 zZahbTbKOW5a<)*gG@66Z1~v4nGpMgkMO3#L<|!^BosWcJ`oCNlageqIfojEfVe!Z?&CimWB{WFV%)g2et@Bn{@EbXz-&)X(WwW(cX5 z%!vvpD%Ikij;uGpfv%g5&X;J5Vw;0uzVG=_=Vg08pQXdi{hM|Eu~#e z=cO-I>{B=e!`k6Y@fp5lG7lN+O6fn*wLMdaJPPXcqnY%-=0Kx%A`6MLbguY(jMI50 z)6C>TP3K58Y!xp$SOO@Pw#Q%RIA(`J+ntW=(Mni*^68#P#idW(1jl4Q1kyDvuhT+J z$0)E>BcwkHHaCk5bk=O|x_k@^;;5etcM#G?{Bp`SSqWo91`0>&1pHPO=+JZNG~B3N zrm(|ewJ&6$c4*r@3N>q(JIN4|9*vc|han4EgyjkDD4eQ=yn=osav_o_0Os?QyrBaA zEeVi!P`}VgeMT4c8A6VQp4*Zf%j#5-UCzLqLAeCO<*Ud?S!os~Uu8mIC-o)WMq&Q# zG~Q-_UquX-8NEd2|3bxbyzCk-KovdX*n4!mYysj!xGk+grK$r1axTNQXVcc${Ch39A{9@ndY2D&TyQkS$c(K zSGbLrE6)N`bp!ZqOV>YV?D(Sf6G8A@;0@=%=gf?3IW6= zK+YhXWmy$wQ z9rE`yB4=-d0O#4Xu4T&{$Y=O|G5qE%_KS@H`uybt1fSO?q+2es3jlp@ElhhVk+i1* z$u!I)KRIWAlhD7<+FpnLyUCBADS;2&BRLyuQGe9{`C0bjrC{UrBPhM38+p5%F!;bG zxR$HnTOW(Oz0D}t--?!7$3!2;FXk$)UL~^38Ju&5xovw5imvEF#*PLd_0V+fuqae- zM}FquZ5tr3)gX*~oBo@oMQs*&l^TAfk?<}FM__dvyep#MT%dqUp%PvtQE)FLf0g=u zmTzI*Z8q0jB^)zD;GRqEIZAl^kYy>zKlO%-B|sD$cQpCK#Tp8aG!>l9Ay`5_kIZi& zmWI0t-~7oxK8KRVas)*L!^PVLe!;%b>Zu=(j({oI2&>J4BvT?Zx&%Z-sYGVE#b$(D z6(oGX7_M!ji9|%S969-E&>CW4wrEgQQ;6=BEvTz6M}1Q@-SdrTZf!todlQVwdgK&k z;NA!C!hOHI19v@eGk*2_L%4xruJ+YUsP3yp>r^)iIx3LUR0>66G=jAe@F72Qfu{qs z8RXaT%SdA^LXFYzhz}8fJR(PngwkZh<|V;Uo(g?M8sdtR5mjhJbb%3?VhfVX)8QWK z0pC#a%NNL?)kX_RLT^7;kw{|iz8tPz&O)k?3w)ZAB5~E_8*yOIDDJ#zGrs-uKXLOl z<9PP*EAibIzr!b|=Ri5b@#F7uHu+;0GRrT9<)RqqI}hR5yT8Ec<4@q+7k?12Tpb?> zS2sIYtu~Zb(7l(IhRo~?WS3GOos*2_wS9Q$n?raRC-4V~QU3#{@Enfg*Eou2a72v% zmgc>L(|CpEy@r$cPn!M>*;6=1%bcQhPSg6w@w;!{!do;xbMGFJV8$BU49nGYf3XCM zmZg|}2!Q`LjDa^pYX;);Gt4EEVENy(AA;Zv%Ozlb@%;J5zpdF`EdV&faxUb_b*!HH z^K01k{0*?Jtwj3v1_8?%fO8>GUY2b>7?;N9w@I*^$E9hW$64hJ%Xyl=f|g+U(U0H7 zp;K?-$dNzc*x|Qu=J*jDJM=b9AHt#IhlLCa>z1=-Im@t|KK2ey9ew*pSpK8^kD2Vt zFaJUp$Y1dJ**Rkka>+jV0sHve_xR}R@A1Jm-;#YJG|WHv_Uw=LztBGV<}5z`_A7jF z?hAbS-8p>t^_O_}%n7_n9nzuqj^nM<)KR^66z{%&R1DvF?=apubBNmC#hWMJ#v3Qz z#@p{7$DxnT;L!VL@aebT;9GLHz5Robpf(^nN&{Vj37U8lbea?d1Vq5eB@pi33OKlh zz|BVq2lqe$!X+4fvHdexE&%yFlOQ=~n6o5{yMN$+f#sZ8&Y9-UzCLg~FT=9j`@hPt zED7*{U8t{^Ug75oojpXAUSdIwm97U)9Z2V?N{J|NAAWmFFuOaRkfJhyc#u~rMUL) z%Q3ojHBu|Axc!k^&@q0$hLJW%&8? zKf%7cx8cs`Z^BcjAH#1xeFncg^>b`{Y7a`u@i&j9BXKANX;b+y4X498o(nw%v_)K0 zWH1$>l`1&coUu^10QQ#Uh--;PDFtfTW#$$7k`%hi~K7-`tD9 zjBqGQvA=j5o3Zl12x4mK-s#K~+U1FK&b9rSU~O*GXaOu^MbLJpA!$`M(#Fe#> zUuA%<+K7XXTqk5ko_ga6ym;~jJpAV4D48HLo&Rx zlrZ(=qG4ALie?*8xw#E>J9!N_TXiXltvm z{7p^BURNiKp?=yF1-O$GNKTX?bxnoH9+zN01GD@M6r|GsPamhCZ@fyp;Hli)ft>ML zl&xz+$!rU}QdQ8_r^3{h1ADD6tR4CAHisgus{kRk2w3Ve5N?Y_eoHB$O!07~`=1Lo zg@%Q|i~0!85_ffTKv;M%G@2-cM})vX#8(t@3ZZ~V87YS%EExVl)Gq{j3s}z64A2>t z`-b?ykNOkOP`bWU{*dd!D0m4%Kyo;u^9=~k)*#3l4tH$;o;mS5bZ%b_XM;ats?CV5 zF$zhC@J2JZmH_K}x)({)i zWq{{s4MJi^CKN?#cv%%ff+e-52$s$~$P_EEBEee}z$#zcE;6rpoMl-Un5*kk5ME{w z#XWOIDuqmje|8uOCaY=Pg@~xoB4c$imZ>S|OjkhPluYAJ2rZ04&y^!6+t`2|k6n(Z z&%TVGeeevtC}8L8^6)+j;wR>yw0dox0Kj3Rb1<2W$E6HxE`}+xsmZwQ0*t14l5vqw z2Gb0!dC1dTSd%S&Hea-hLYuTLUS4YFaUM$BDQu&hR|eX^)y^_??OHDO!hyyl(hJ8WiI; zC@1I`OwzHKN{4a{wN0jq<;1eQ{qw+|wYIq^rIz-A!A{g_s{q2R3(rHA5D0G9AiS6Q zp2=*X$E+SrN9>SIfVT846vVB`Marf!k)h7A9$MB(-dG0n`chH+kZT=qK}301qR{y+ zx};rsMS>v0fowy(|fAY%`PwAWqxUmKyjXEfs^zbc@hN{_svYm8|MaodP zr3uj;W-PUMi2}m>B@Gv)meDl75MG$>fBuWALU0jb^+*mhTxfAar6_o7*;q-}PcHnL z)kvpcj`enpllgRC%);EZh6y=UX=jf={%PJR-t zTXkh0yow?bQI{xQGP#=qVQS65!RPJ}#nf1aMc$x;mZfgG45A3HWvWzsA;uc#ESFNd za~0feq4ZxJ5mRAA@p!%XvLw7vhu#B|BEwfxXTz#Xrr?|zHM^}E4Az6cKs724&T zHO@nILbR~RC?%{Zi7=V9LbE(9EQowgm1yT06S4XTB+#?jT4lq#e>sk{fqW?HG$OM+ zqR&kK(<}fuOA#>;mvxQv+-#TpEG$LU6jxAHzxos^rZ=J^M z+Hs7G_ha=?F9uhyLVHI8CT53_S4I7gEn3KOc~F1J&p*!mV_44M`|rVW2IM@=_p4zt zM=ZxOAv{06%L>uiiU?v&Y}Wk(Zyv>(4y~ocjPzJb53M zQXlWH3lb7P?kP$%TsB1a*uMwMCFuSC7n(~Mf}&c;wWbzeQQE^S86CC$j(Gp9AqK%HSUXKyENo7)!4v{YZx zfws$6p?OCu%4aLdzaf8ST?ulx*P>u=lgR8A`^VefL+5GlUrhq!48eK(Y!Vokvd4Lv zrB-+-Os|nJ zi#t;2+T#MC1-qJ%Nh=wxX3wB79%th(A1b$zZ%M=Y-GdjbVduaFYuwq7RhLg-=$a|4qU}^s zoWt^ST<^iQvIzS6G{hD$I5tD(y$nzM{%K?uXTkTpf0v+%MNVEe%odY?<(yp}7NLS% z8H&JQzqvy1+8B{MVYViUaf49}jXnm6rUayBkgt`ZLt2Ir`2`uGA4@W7X{d)*7mw6* z>Wg%-Vp)EH)-%`&ohb%Im6;e`(~X<&J&2NaiecJIap~Pxi5HJkyVv9B7pL(BzQM__ zKEzpkhmDu+!0sC_$Lk*+MubfbKfN45=5XjrEr>|hAdEB2DQ@#lQo$)95U!eFcq9bF zEz%dc)p`*1vsL#$c&->3hde1 zgL9w#9#T4(}g(4DX$IQowQsAO; zU*f%!zrtr9y?~crdVuo{ATew$&rc_aNViUXd;MA!TLbLqX>ACFk6Q_^h z^r@rxfW}#hM*^ zJ$;zk58>^T@8Zo9@6h-W9C_~qj?g+^oc$7i{_Zab@e6`6HW3=p7~fVgBo1krh#mv#1{fQn22^7EPHoMkRSa%XQpVGPS1 zJiPvk3=3zLJ9>NlAS_=NGzZHU1$v0=avoJGC_9}ewN~{8(C_VA#z{P;S3CtTIA6U6@wIv+)|sGfNJdm+G6FkO5Zs$VL0_hj(~w}e z$QUP+_+KU65DO(PUs&D4p{#2-BL z6kh-K5IGR1@S77a;N~aq!2X|HfrG!e8BJsD`029`A~DB+D{i?2(_6=}Zrh~Df@tij zL}6_vR?qg}u7__y{Xh-UYEp6SeOF=4)?wWKv+L0{*nr7({rK&RkE6D+2-|keps*qX zMb%ki{{6qY6PMnx8`nQ{HJ*IuQ9MqL)Kl;M3dQ6IsaG1I>#-n{0@<8t3fB6vghp-l zcp1{^f3SY7nJjm#lme7$luVJcN5`mgEd>;EGoq0 z#~?aag@mj?6xsr@-lD)G6x_cT7KiVBfDWJ;N zz}Fm&h|F}v<>W$NkcIB?cC4MQL2;fE`}a@crw`tYg32`HR%Kw*Wg9TEYYbCYt;L$_ zHi!&eLuV$eLv+sQzpzHIelQzJ!xW&87Q)h(hm4U@0lG8B%MsgPLP%i@%x&pt-`tJ6 zpS=sOzyAteJ^2!T^VZXN<%2(9?20we)tXSXu312xQcyy)v)#!AZM%! zZYd#H8A!!bTUlrLTkbHUn>#fXh`zzPlB zKXEQtnB)anvIk^FcgVE9SU|zHOl^-PCKoJDa>EiM-D`>NSfF>sLW3KYndx`PxQ#Q} z9c%$2vz^T`H4t`IKan}UILSjSXK$gtfs8X5mmBHcw+6x079z5Ryfeb#kmwH=b1>w2 z@yHvlfvYhX6;rKH<|QDaM32nAQuxui&hM*+w@xlHbmZDdWR>SZwsZmH5lTcvg;Nj| zjF8X(`1*Ok$#FR%qvQgDD`*(bg*>B`0*(jE{e@;ZYv+biFu_?xoSp9E>4;@cOCfVu zh$XJe;Hsd0CDI$dbgglgkEYCm=zJXltYP@gd#|8t_XzAXbD!R`oI^lyoPg!g9jQ>Y z(z4yD2yWC}$SS`Wh%+b;?=lOE=uZ9{<2F@SvVi3w-4+D384)v>C9=ySsc&KZPLc5% z=LBO{HZ+Z?BD-7`;fScRL==uO#IuJ?z8qnt1{AGnf-KTWET?Ts6Y?xIo4RS9mX5!# zkQI^_#lkmJiQ?%x$fE7QavCPO_gv_lv37apKmlZQJr%C0Lh)=3IxZW)jj!E{-{TNA zK5+nCs5HFCEHa|Q29gEzm1IjKV9w(Vuo-SMoR$FjT%pf7V9s!xfwi;@57{KZeKGXb zuvR(^c|8fP^ZE?HrDbCF`Fs)2}O{=a6X*B9GI4(U4_4 z_$4pvd2_ZcgAvYTXYkDWwOJH+amFD_NU+2OXY_Jrx@LsV$6$uYR1cx+Ib}Wd?KBuEkQp2VXy<1e*I;lg2}krmCKl%eLp@68f??;HLa6#|P*2eLoX8bf z(b}0JQLK`|H}4aJ@%SO?n^&hHlY%-1`wYoB3sMyCq-8V|v}$Jy#Q$SioLH93p<|>R z<(Cm$Xx1vU<ZRfC%WN|Q2 zKP_KDeYF$DuiuP>YTAyoOaSxz(JCyVKA8J!eopXLO8gs~$;omB2?H5W_y2$Fy#v;y8)pIB^_1F(r=eIEj-uW-(e! zmIbE$zOP2DD1J_I|Ns8)y>;L6>a|xL>H~G^)T!EM*Z%1Gr)NSwlrd&MLg$w>gUZt_ zqWn(6oXK*5nN+U$V+fUn_P-a)BD&DgHS5`6=xB-X1Z0 zU*b0ol7NYj_>6;Rm=FA^oyA~PIs5xgb{~JsN+nqkLpaYb6#hn}PLf7h)YPU$bTrR<2%vMN8)j8Pd0~QFY~C{@f)m@RZ_)YiY${`=DBa$P&d277Q7Wu5FWT0Q=0|3UG^AO9s4hLy zR#pj>IfJcO_&rd#f%0W>IhyVsK;as?=Glb^DoaBBwrNOg&?2E;3u%iP>M8!+IYbQG@qA>fSeQrWXlkkD@9OlDuQ#Q2+WcqATvp% z!Bn?;8bjc3r#`7ITv&Xu-Q6UWFD9!3#HbKS=mboT^A@9HU;gXwkX@Q1M!op@OhqX5 z8&xU=lxhW38l@n~*|(gP=CM={v9dfQJOIIA{vwvmn7TX(nK|?hO^gtBCgqiRkfp{# zo|*tX)qhdc&s3>p(CUcd&i_5r%za4oGKmXlxcQ|B(8#1~&&0qDpN(?0(4$EQ(OuEPg!KZTc`-Gw)Q`=B7o_fuPr z$?yA8Rt*GCY0rg34REV2!LF!Kuc>UN{gv) zYq!CfpM}iYLYV7vP`%Ag_Wmy`<&D^ZtI+rYAj+96bb zr%;_GqxGtVWiSty2+#6^IE!UZZ5JQlZR;BaSQAFCe-CFvbt6{{{PL%) zF#m!I!56}U<%R$Uf&AwJ!QSQ!_Bp?C^%LB@dYN$PTl^2j7gRaiynGQ~QTo}Hi#U7a z5I#P%ALou8#Hl0uaQg5*k)Ap75l+*KlG9U1KBO1g2RL!$0~|W^K8{hvb&URV?ZP?W z+6^QHg~B1z!5AxpBSjBWq6TJ}39&&5@Ny4u6&kBWc$T~Q`w1Hs_s}uI+(nkV zRONSt`#}=qiE*L6Vi_yUc|EJl#|U;G1j(WynM@r(LX0vRG1>?O`A~<~Pl6vA6L3Hp zj;|8J0NM{||DVf}@QyqQcc+A+DJ2jJeH^@v@o={$z>gYw0d;2hHklFFW=Cvy24ZW? zf}Ao`*B>1681BTT9jmaOI+rj1`8oXL zr61y1YK(1qbUp5WelM)u4j6kKNT+jVf~|6C6AI_mpkSmLUx)7t(h#g!#1HEf!AgM$v@|}IR?Zd^; z4Q4~rpD8?nO*8Y6HBye;xmAJ)VapcwB$wBlP%vD9z70co<}bg%{!8!UuSeg+^MCpU z{(9;yto`mfI5>!GwE?E~Ok~ZdME0y|*ePGws>Ie;gvde#b%@+yrRgkMS2&;YZ60;5 z=F|z~&8!*v#CQr zOdYQ|O-P?v1X;6DDC1c<&(L*e!!l5a^jQ_cC*MI0UTs&FSZCjPgDpt0Yw!-$b=&W|8*biHao2bWLc#(O%nEbr#4vf|AK-=9 zq-Z3_;{{PJtX5*fgp!Co%Ng9UVk?#~S~k_s9d|KVG;s_Z;BzvSd2gyS;;H;4=j)JM zph1K)8Lyvt8(kZQ5t@;N#7YAam@KbUBchtFt4fXFDiy-1Ga1urKwP^C37r-sb=#2K zV;3n$wZC&2gY767uK9!>8{+z%NF2(9SB)GAeNL!`^AX)*gmGrE2z-@PX99aKOKUC2 zpIvvGFlP_`+!@vIv&K;V`XH%P4_j9O<)gn)?;BgQg#U6rx?Vgu5mku_8bcOB(n zdK|K+m%z(J&r6*V+SWAOC36>~dDal!|DgheWXB4H`3vV?$M3HH6&ruI7yji*P|u`t zJ2OL&nrs0fo0BC7OeW14vUxcI?EmfZ0C&x^8kmVrmok`_aWG8|q?y7BSxPyGX6pO` zk%~Z@l&Tk(h-JJD2iW9k-j~^WYZxQAUp)g;>wkx?vnwNouIaKeDW{T|v`OTy^+r$u9F`hIhT_AaG#+Ztn zAc%AN@9k~pk9oN>l=E{$kV+=R*<&|x&?0C}m0|8>q+)2d3k&H{07m|#}YGWKLw&(9a6qJo2w&Y(JbO)ZqO zbH#9cCMj9{&FW?jpvc4|t9qHhjKYB#Xpn7K^f9S}AeN7#zcK0KsR0dVE4Kdj%!e)eHB0T)c_u*j< zhNg$gEIq4{YVzU)T5dqc#vu`y zQ4%W=Uhu|&TtS#~{0VhmhKN^@+MfvB@ouv7l zN^_wor1rwir{&3MrUB&=qxN*Jc`8&MzC<rw+c0eQ&&i>&N!v_}|_HzW4-sLn6YG{gIR@r?NK%roKWHt?u}52l(V5 zo=l9hN}S1WCdysGK6x1v*8dJJwYZCD_V)V16N zR=_jZHpT@jonz6x?J%w>hH7~(a_?z_X(QF&D~eF__y`K_=|aJ-c0q9GuBpeQj6mcp zuEg+n7b3Vg4!KlkSMTZ->xwqEpnmU=u<>FabGB$H+trQw2c`>47ADP$ws)Z6p_wS( z(X?6ZN|;ZZweb0Cd&_f^b4UZKX>xC zx0U5C8x|(Z*@orR;osonL(kK;Pvh*zuL!dIy?38Oa#DZ@wx5uYgx0n$G&i=OvbqX| zRi!9wrDv`xOY|>_=>3_uz8#k3W5GT3D=VQ}Q32gDs&kkyUtB6ac=CrD=ZY#}S)!sk zLA|z)>K=NoN2z|Gehb?GF8%2?p;9-~JDvl4YUmj>ZKdau(r+Zd{}07w#9c(Wi!8rQh~Fa1??)ith90moMS$k;Bwj zK7eya592gdRHqK^7hux-%#r=K!Sg4NeuyJS-p7fL_v7TTk8u6UIpFhakVS+eU8{vL zSq7U*2Scg`MvVy(G4XH@2*TvxVB8fL1h1Gl_=Lv_!kks&F0$N3ir-0=y8?br@(jEU zo}c0!_)mm6ljKu;{4vSP7ZW_Z1zGMH7>uB3Y9Pp@(5Kl2S?(1~=i%!EpNJ56Mg$82 zeDWawx|%#{1Z2ZdpAA(Lbz6v_x=b<5 zP@1cUw!{uurWXG4a6w*&s-xg14Ti*jOxZRmXeuU0`Xb68N1|Q@Q+gWYaw#-MH8sF0 z(Y&mm8ri*c3>#G1KvcQ)qO8$ij*KGd%4N8|c#6fdqt{W@w`ubU=DE|e{8Ma6RJn62s( z^K1db>(~N_=gXJ1iETKoT+t!6<8{Rg8b$EV2I~A2&2NIDF-;Im@>(mV>O!DxbfSJ) zH==T6NTc$hsKFx7pcP>%;uUBNaiQSlLCcy1uo4~(E-Ujzht!^hu45a_%i z7l>+RqMYlAF;bj~aOpJ1Z9<$0^Y{+4SkK^j7m3b@?WA>mPK34_g}U6kN`~-OgQzQ5 zxvm|^gLQf_)Eya^s0%_$jahh;``gBpthSDPq?8*G>`cTYWdLNAX4Ee2h9tpVc$+IJ zpP4YPTGWoHJSjX3!9wX8-jMFsxa&z!S7h%g}Et8%u;*+Lj&1!6vd z)wwe>kVWTdTt*!q+K*;oF$_y9Xdgu)=oAN0WHtPlBK#H!z94suC||%n=3@%SwZJ!Sz0C(xboR_++l}Mizm+-OGO?NSb5J%X~T+g;o%+J zr4@v-hNd~6Ilq~B)+{IxRC*5Qr^tSLNt{bJ>54BNU5d!kV^Ma zHj*jqRoF%(bylWOKJxi65zHhg`*t(2&-N=^W;oxHDUbPDbj#@2lz$<;dPo=3{a=_% z_qCkLWCub^q%e19A*oO)g4kA!)Zw9*zb7nKSXr(Zq+?C9(7n!qf2S64{b@+-rTf~S zA>QNc1Ff2t4T;(dZQF<8W(tEOlC4+9>M)6q1liNd(7kqsAkSlpbr`sJDg2#DkVH(t z6g9oyGLq4?apo9d9y3vVaOLODO;2qjLy-8u${!mg3O6|Dy>H{T!Ein_GpIZbQTZ7h zQ;74u;k;&*Io~tR6IM@iesL;@^BHMErOhJ-c)4sa1BQ_T7&th2i3*bFDS|A2@8pMg z5Zkc0 z{KuIv=WAwSoJn(+JqxSOSv{S$yjrBLk2qZZtW3NtErMZXu^54%nw>3dgzUqGNGxEF z;8=7FHDk-Rm3ZLZEx2#zdTiae6zkS6#D?ulv10u^tXsDTD_73LiWQ?+wPqofu9%Pc z3ua+--YhIxI2S7x&qGgV1B%PCQQlMtW2qV5^uCHMNk#VjN~F^{GWqRXF_yX%<}L!= zMVK>~FgJ|mi8OCR0~&V^V!YZPaal@47~(|P+OcOHwc)8>cku*pyO3GwChV*pxD1?jp}w-Tj{+ zRM_js6y&b`@-#2wbxep0a{1OYljJU<{LTQMUk8)ncdE!;L^=DAbIRK=G0ucDE3{oi zxlnR%sfT5AEesp0VBbdnrR~$GZY)|=i%q}SjE}DV4WHsT4xWDtXK@Pmym~*X*EQ3# zUn@Rb3Zk9^dG2V0ZFe)QyP9Cz*#yUqCb2J8u=9sahKnp`65K_Wn>g=oEx*%th36SA zReAcBI=Tm?$l6+qJUWhZd#&&=x9w_xWqSiuYs-W>p2>a=%vo~}wXfDTilCnss;_1~ zx&RWZ7tB?mC3(;;KB%$%3X|sS)1F1wS-htm z_SKar+tVfd+Z!L6j+6mAf*a&wbX;s3wK1v`2&|9`d&sCdJ$wt3;lcf-qGb4$%4i+0 zSBPo9q7(#_$PiSPD$-y|L&|AAP5Txk!6!EXzIllVEJ#E+`S$5h+jqy|$a!`0C%u|#J@S=Sc6j5DE^%cj&(Hm64iX~bEFV-O=(=HU} zVbpfy0P}eTcI-d+SA4ktk9gu|596tqevIt8EUehM9PZ(6*l^E!{PDv#aq8+BT>0uM zZs0TQef)mh|D%WS`iFl&sxuXt92hiR22G&>2{a$)R6t&6hLrkL;SL!Rb9ExbJOf_6_Xc_Y&l?5b<#|CMFJTt=%ZdD@Jom8;Wb_{7UHEnx+tBdF!6J$Xe3|2R&Cz z1iOf08k>yPIGyZqT^0bZ3 zu+Td$ZBZrO#z`!EcB`<)bF8Ae@M~nbk=3jXSTM9Y5iy^Y8JHM z*v;cOe)+Iamb3Vh$?_A258%)~7Gp9=epuMBoH%nFAD=lUY*^T{{9Cg8Tl~KX$(Q&7 z=g*x1Zr;T8vuE+;`3r>e`274ieDUc;T>bPsF5EneGoPQu=`T*-#<|Z<rB|4{I#g0oj{;KHY$i}c{h)7W?Hq)0zHdV+AA=1&OhKYkMXPaMaAlP7NB2;M*X zHV&S74=1l2#E~-};wyZDL}@tUlft1fDG-?)0Y?#as_kk7>yoJhIT4aD4@i=Ns38&x zH?~Rf55G->Gb!#O$lZKG{t2$-3>TU1<`X1vn=lUu7B(#ZuwtS8`1&I}As%sZ>U3!} zu;*lBvX3`Bf&$?c76gy*AWWqW8WZ3`SsorBl;tjUIg{m+W2rF}9Xz%?%wKHdvTN~- z3x#hS9XrC8_U8fbINEoLF9PDGVqQZL-WZ*YA4SCAwAP5vs8je!j5n@DkH;Cg7oJlF zV~Nxod5S5JrU$^kG7(d1Rq(E|BBnMUsWoL#RF^?oUy8)mBE)y)BcUe?Dc$LibvvLQ z%7u2gKoH+diZfi(E_FE*EC{dH%`BW$6x&ket+-}_~`N>jBZ|pwfC&U!u6x* z8RKDlC%*>rOukloCt+3 z5f#-17?|FTzWxqE7qWAxL#|0dk~9Xk3=?G9L|8KP&~hU$LxxaY2t1R$5UL5sxX_8X zD~QS%H7q4w)S#ozxnv5HlM^w{dlDx2P7&!{9uug;J`R&T-7v+=1LFvHO?AikDN`|J zvInM4bi^;3w60|qzKY>Go15E;iUT`??|JvLXGcs z8%(o`;GA0l=d4ns4;3MMS^<{azYM#d+=Zq0E))f)$pxu5~@jaJAyG7w#Bgsdx5%&Xd|43;U-MjekA)PXoD z4aD1uQ0z5FBbPcS3C$)b>rBwKIRqgT++aXVr3HqLd^m>kVd!#*K&0%8ZJm}cQbT8! z82-rCFl-0I>U5rFq)(@7BBTuziRA_Js9`vbmJgP}+EWO1Q#y>Q{4US&7#B>Pun2c}QMrvyr;Z@O-xvj1i2=Vo^%u0SpCO28R>=qFry#mUhcLEG zqWc|2_nV3G_%=ej={6EOIl8}1s5@oT93oBWu_K9zawf?;%p&D^CfGT^XGpUS?xl%v zFG)aPtrCe{b|?pOp&QJHu78X$S2jCEuvS@(1vaXK*cM_^sz2o~-OJum_*!D&p^rdR zZYnelP7we!wm>D+SsZB4Ijxx1$>D7dL)GF|gk>cnp+p5!XEr8j{9&P#$#Zps1wVS{ z7bu=vg?%`VCqH@?1*26+Z8alnv>bU$Ymv328rC^QFwQL$WEPXGOs4AQ7YQ(->Reri zoQ*9)`It_fcuuX$Dv`UXRjlLfGuAf1zM@8`XEN4MhhZf(=&7^7_8o==OxTt~Kfg@) zHfFAEq5qVMdG0`@t*D2Z3EqVjuu&&NF)JUcIr+%h&@T4FA2NBr)}=LKy=_^o@Xof- zxySd}#c~7f-%6c^F}oK!_Z3vvFDMkGEEDfcHp^$zGr>d`4<%kuAe7il>N4reDPL<$ zk5LfGro||XA}pC)H_b0W=F)mh&Im_9 zX$ltqay!CnR8S4(Ad~W2Jv|!^x}R(d!ZsrujFdfcjibflnwi{Wa#YxD%;o!+CsHQX z`TDf%Urzb2Sx_XVWi-viF@Fr<`@^FNlICRz7?+l#dRHGpic`c$iTt5*RLyOKy3zzo zO9mv#lVF;WhoCxzP`9TpE>m`o|U*UiLuMWFC3Z>9PyoSrX9iWerN`oY@}f#JKCh!2C3K#BNp z)w*FirW&bDMD=^-%t{fbf^DtR=T(YW5Nz+o^#T+6oF{S9tfCAtDV{h$bqb}*Iho=k z3V&E($fzu_w>_`p@+2Rk^#d6qU^oZzteDk^B&Q6ozV`-}Z(k+e$KyjisVxI=#1MP`x^(e15JVqfAszx zcwo;aY+k<@+qSP1F7tX@mc{8wR;asdiwZ`xO_MAitA57q~@)|0^(Y?NXAv&X3QT18};6a0(*&7I<0^-AqJprTy<}LGJE$ zF#^L$b@p#gyny}J{*D7@{)8(yiVr?}7w^-XE`Jg2m)0{`&cUB^@9q#}xp7;afQhYG zHrERBo3ABfU5)st$>-=IzrP8t^ZO<^Ht`1q!X~Qk329sDy}GR$mL1gg-%%%!wxBcgv97hb!&-Gn3ry87wT{(&DoO0qclbY3$5Kd zD8Qq5ysHvWzPkrSJKCUMLD#yc8EgZSwS6p~b9T0h_etdggDAgu0EIidQMA1qm3szI zea{S3?H)qS-80biz#Orxa!)@hcK7`QJEz@7+4dfkZSA7->J%v7M*G>;gNm))DBseB z!qv?p4o2O!K3G|FG+YG3bb60d{iW;8LoC&~(Rm7tkN3jMAHD`tfeoR_VF-!|6e9|? z7A^Hzs7}$Vp|={Lvlx)7RYIXxz+g8BA%)hWL2OD4>{(QYYLck$Vnm`M4l;ETWR#}J zq6HzYQm2TIg1LDaf+(-6uMz=1JA0b(!pqO%* zA<`~G0`*T4s2>uYPW`HUYUgKY;1lI5_T}e4RS@EdNl}PR2!}b{fWSyU(f$pM@E7Y+ zl7fW|%VUqM69GPf19%WvV`cYcLbd8n|g38sF1ZA}xhGxJbeTQA6RLqR$;<>@FI zZAHcUenFO-S5TXd+B&zD*Yy0`Hc;88=PYYelTekjRS4pJ3q5-T_G4$y za<*al6AlYyIS2U6+uV-y4YYm}VQVX_TU!KK&II_^N%C(3ljRI1#~DnzXYK3~(~99d zl+UThp-&Hs0H6DhzmJ0l-@C0WXSaf5$By9e3C1DeS;}F#dIY$34Y+<4IDG=Ra)v6p zGx+S<8Qi>n3SV41g)gtswx665>u}{VaGAFK7XLHx*_XhlH|TzUCgv|6IgWGt58(WP zgE;lUhdA@mKAhe651iY-ALkByMC)mrgCFAbfxqF*!MAYi-8bm}$7x@uV3I~5KFAYh zWdfWwHHwOyFxXT`F-kEZ)EyEgGXo}IVsrq!BgeeQnJ{;e;4X#v*9meLT-z{&^$LMi zpaEUr0uWLfFLOul<2@-^B+=V(Vt|1dK^+kv-FGfstIU<|N5#C;cu&!K0 zb!Q^E%L!SxT@VABnbg6jh8`2*F1W~Y7m?1}@H{VPRk?FXt?(w6b~;5+&zJ@y3f6Q` zC#VIErPNR$WG-()^_Bss`*M&mQi(0k-;c-s_#}S*?(;ZFozIu{y^7JT3-QP^k751Z zjri-4zu^Y1V&k4Q)R@vxgD?theRasI%)spBLs+qW5gvQ?JLq50kBp{FJo)NRP}f_A zC!c=|gL67y&QN1`ULQK9HHn}$Il1YGPly8h_>K9HMvEbeA>n?)^DjCv6v_HH#A%`s znHq{jT^!tl+%YwnI^)#1^9c>W6kjjlFV8_)eS-txNB7G&*q`Qo;mtNYK4X~b?FTnc zAL^LXa(7?&PWFb!Q+V>b z+fY|wLxxj^WLY2rW2d5VupXn^7T}Q=zmNTt+b3}uKYZ^Qs5!W6n+3TGtDt8UWvdDC zO-3Yl*r1(}58Ehp8s}1HbOv>d2lIv9MZt_Rlnqy*Vx$Jz8WU2=)X1MxC4zf~7R#aN z%0lMcTFBbd;h7bW*m^Vam$jjMLmyImvJus2#+2+h1XidJKuGDyLQIPdNv$@-m!+bi zAO+8vB5_g|fe&=ic)&~@gTf^Em8KxESb_LLIlPM!5nM-&@!B*@(T9V*sXff}jA?u@ zLE|Spbr}=2{urgfA|u9eIdsiXsV8>g34PQpi*(NV(-(&V&ss&;0_u#4;v>c)Mg} z5_}@4eju<7izHwiCQ1DfZcj!O-T&~kM5wE5c=Pe7(bQ-sJIISlk1OzITb7FR$! zD_8hlbFj$lHH|Qj77HR+1Tv&`>~qcYyd4LDEZNkJ)ag0Gt6eivh=O(PV)!n{bKt;{ zObW3z4cDL9Yg&YwQUs1#P>Gzi)Tvrlk1XnN*WW!8u>+`pFB70LCoa-7;u(gxWfsEDEnOob4qRpMiUDr%#5gq@g`-ahc z|1fHI4~mXI50%ZQ^>urO1X!QBhP>5HXnSZj9k)Xe($#wgQL?=o zY0GPbZAi(cPC*{<|H|lC1?%XVXdU}iR?zWyzXj`CM8}EuUw_|BG(R|kik)M`MBZlh zwX78%Aeabel0J_*R!lZ#Q->;JWt|v~pTD6MX^YE*`Z|ZU&7$RbYnudNVP8P^kvdK} zbj|r|nvuS&S_}u~|MGDiG@rSuK?DTNTHPqF!?COe1#4SSwV?+C4=qGevl(vAa53^G zk2<>H{8?Vp&***lx2Jalk})@(|T8v&P8sR32$? zi!4`&@4EQ3y=1T_riK@u(zq<*+57O(IBBVKs>cewv&kKx(Byn@w_?8NLX z%VEx;_lP19A<@Aiu0v!@D9S5}aDY0@UwwH4)m5d4j0hI(09Ku|rIl2fjDXNFqDHPv z6cz=KKDrm6*2mL7`?0XUlF8$RXL(3MkRZ#C;WVsNpG8#3kuuGS#C|gphA5@{=ljhm zm)+bAErK-Xa^PC$0)NC|+_qy`K=sNZCd?`CmQfiV&8MD?5q3`dwc6uzoJjFY;avlR=grvDRJ&g3_f;;e3WDa-G)S@}<7xl0lLufWG)LYfKO>>VvaSXPTu?we?Rp)mC93i?42i&zoY_1 zYwJg*-H<9En2(o-r)xRanwHwQY+MLzp zmKFT*r5vsIO^0rP+8NzeWGpThzU2~!uLzXPWvXWPG*s>ELF*$UNb0k~vn*Bwc&@&e z-Zwis#fY#;h2bc@yBl@ip9%8@x^Hy+yuF>!t|=2A7z*y|g@N)RXIB?8x6}K0E344k zkV(&{lirK`aXX#gFg;TJl8HMy81}onA zgK0Y3eW zaR@RcASO+Yz|;sR?JD6-zH9epjE>F}fk-uaIm+uxP~To7ROM5qj>Guz62!&$qQAEa zgVg`oxT+WX-u*cq-8&DzdTNufVL7(%7kK~eALFBUe~JU||6EwHoH+cvfQu~u_~1)8 zdEhrVzW-Okv;4$iN@@Kk7yl$|STt&CdsChU1_q;~xKb#~E6S-2RZ%VkE~!P-R-}Gf z(aJ95uJ1$|wK15i6~r(-JI1wDqFfnQbA3VOeq|NxtE-` zztG!q&2R6cwr>M+sa^WtAB)^jwcg^3q>|3(@Tm0`pa_;&`-1y==aPtCg9^DTrCHUgaKLhW7 z1f0DH9Qznl3MnNVAsi&^J4Wj%{qQJofVMmI;kWpoijUraJ;+^f5$CKjcM<1bC(B))<=#P@a`3z{ z;`~m(a>f)NKTP)aMM!K6ua{X{2j3dRjVVX@HmATaMpOG)-HPiD%YM50d*0FkxiMH@+4Kf$i zBcwtpzNXvfR|`csHx{y%QR8xD8?3{nXx}yyKl$K!Jod(qardtt#Pc7#h#&s`NzC0m zA3uBT8MF?!y!jjos2C3n>_s4gma@in!)2Tt4t$?#wiT4gBHCJGlRiA0Vzm1$m1ZRcqQ{A1**_ zy+#n_e1BcRU4{q zP~(X`)LAXgsjatAfbBnw9XTSk_7sSegGs6zGm%nhg{;~ReQPevo%9^E=L>at#o`Vq z8yrG)o;#}sUKXl{X4i`Vl#`UKip~*4F8i1p8!}KZP=g3dG78!%g;k1QbP$4L=(&yz zrLq$y0yg>hdcfDu12NHDuKa{zoI65HhKEu8z^Za4eE0(o2Lk134)V!F5G#>b5$P31 zWhg2D65sLgRYo9y?s;rRDncy@2r@<^F;9h8j{gZwEBX+Uo+tu*vM+mFjUFkjcA+|r zZ?lQfB{7Y9#5Eg{+-8NeD-H54he&ypK~lRFik@_&_NG(EFGB!C|%qp@;um?0DWTybPeg?K!cJ*A6VN9U~JC8WJQqZ zSh7Wnvf73KYb;VLEzr_^V1;=;iOR7I9=TBn ztCStQydAIS4~|o_V&FsnjiqU}xZ>^ni=|?JJanA@pF-Ed z^Fie@coiois?C6q1`YhGq{1&gv`#5LE``=AkkD#IWSxqxLm{rkpX!~dnc)b?PY}=k zWM>#6Ym{`}F=BmCaf(>a>QB#XdcT&*A?vWxHfs13#v!`NAVwF2(SKuF^x_->=o}*G zIZtS&^C*{#{YX3PFwV$>e-U-?XLuoQb6CVGAkkV5SIEoZ6j+geE=GN6Uq}Ii9AO^ycH*W|u-Y zJx7dAN$qur5i`~~R3@oj6CZ@AysD;ULeXYN@uCJ1R5QFV1%(UhV5f3xo1TxXxm2&r zD@Wd<8Wb(7NAdCo6s~9xqZ1r+i=Z3IK< zXJsR-*C71f69%1#>7jDXDF@}{clz`!@iB($^l{c;xTi;g-iQF4S z3mcKrV1YzB5!D-eQLw5BAvLLpXi|&dm#J*GGTk8pyD~}6kj}KxGAraW?T`-I1Zkew zZx!luCYsseiPf2`h?gX|(Xrg{%7NFh?vX8!cu64fBZRq$Q9M3zK?qNbKtvMNkqHq< zOo>HnM$Sz_bDkYA92&6`(K$9f;W|Gh_q zXF2=Yva+1Xa$8lJAj|Fap5r=0K9EM|Z-;z#h9LKObVF2!L0GNu2P&RtGTfy!=Z_{| z_b+F)IgjLE-+#l>f-zg6IXS}0#!2lfe`_TC6#?j&(Sj9gMzLhU4D8&r0uSxoijA9= zV9So>*uHxewrp8}_3Ia7_3DKpz~_q9i?DdfT#U>b!eCz)DvEPaQ(1t5;tT}E`XH6s z8s6$acv(YHvZ4uT3&)h>cdEx-WVuUKe&;$S&0W6b*{f>DK2A|vFsfP&cMG+J(xMUW zj7OL)2Jsom!geLV5(a-~6cTDRu*@z*=32Jzs1&gvT*UXk!ha&m6G!M7m__fc`PqUL zXM&tlCeHsW%5oPW&g3|&$?sH@|5wOzmm>UMfzN@7@%%j<0=c`|1ZmDBwaWs~UiMow#c<$))xPVjm7)SBSh2NuUeKWPWs!+J0Q7Frq z^yUAj?Q9Z+Im6{yE{;d%b^98=Mvi|S-$atT@DH+_@^K53Mm5@ z-6z!LOqwV3Sun9AQk-M%eO<`Ezeju!$h@Z=>3dq?*x4%7yJ`G^g7Q6QcQ>+jP+M|q z8?yNLTgRq3Khn0=3fQ+$IoLb~4pz#@pgePK=6g=pLde)e_4j5v4r3#=HJQj;QZ7DP z8+nx4!U`nzQJpZrmQ;BNDO16No{76seer`o{0!+$RIkPPB0QD)5{aQmp?(M}$yr&h zHfmwCn_%c*aWqE3X$lnOWRiTKe^9z{+L)tjnh=yY;n zA(iGZ!)!GO&vT7Yg^U6RuH!1MeRUB#9@vZ|O$DAN>{Y9r+L+oj8Ek-+2@J&K|~Z-+2v7wk^Z1$M@i#C->reFa8iKAKZu? zPd%BkX-ure4vYbCienns(^DCcS z#DSyx@bQ@=`1I4W_~i0YY}>p5FFyYrG}oAM;QeRto%`kr&vIPCl4uwBdlUzFv1J?ud)tZG))Qs2J> zf5s84difq?t*F0EmUAB7NtQG5eJ3gYufW@hj}^Dba`r3F+1(?^a<*ZqnA>ohEN2^* zBUEOO9{LEUk01Fjk>&r&hUHtb{9F8=hUC=M!?;J%C!JmM(953D8lzC9lgWI1tfuJv2|55pxdy*%9l*VrCAcTM6c3lx zW0}^9`zsr;)|rF*YFn_ossTHz8?ZXB7$YVd+7eP=mW+pD!W4vf1qt%|PB0Mqq zK|VEVj4bDr=iMWN1zA2ZI380&li(i~gRszGLv(ccXUA9o}LdZJ}!8~S%FfF#u$ zVY(ocC;MZ0ydQq9jKl$bEY8Jw;cB!eF3V$Z(4@qVbu#oPheE3eL$EU$-ZeIOG-n~O zEgzvRxzveGM`UvvBD)-j?Q=jnkSWyVOpXeY>khKqJf~EU=$!I;PF>5HEKljQBeF(| zoF$EjuG0&JIeVsNFK-rL($q1p3eJ%VWY4a`$b-x9gFpThcR%|8?tA6|-2K!0(7$vL zTOZku^ok5DT)zOrONP+YTMMmKj%hR7anB>$V9L}$Wlur#jCyQ+Yzz8U_Crmb{JC4^ zqPQs=&LR^M6cKc9RIsM&p|>ijbC@GK!z#6$I>?F8s8dByMGp97riLdsEOk05OeO`= zoO)PoIp=3=I+B=`dOz5D)|(-$3~K z1qtHZ-3fF#Ka<4mEDq=iAEn2cDJ7nWwH;vG5{BqRV~ z(YT>h;;}q4p8dggOj|REm?AagY4Nb@smNGR zi}H=#f-LnZPC|T#9foh?q z^65WLcw3`TyP`+zi>KMsoK==Fd8yFW+EG8h9hEa1pv=>ws;>bFdMO+Q8F1!0Vb8E3 zIyOT1<#J~xJ|P0WzHTCj90!_o#`UTC#z1` zLMgS|2~|&qP}H(Ilog$v>iToUGBLtnCY29@b+}lhrs-5y(006yxG#NK&{M~dm8E8? zJ1kU3*ydD-XFp@KhPKIsp*LRyd*uMI0nT{gOI|!e9o?Zin)ZgLE&`c-6|i*_3UZ8< zt*RP3oISv3ybNK;>@P)Rwp7^QWDFDw8x{_TXJduAuLPT(-h)+-Z@>eu zJc`Hu@Hl4OH;T?p{bCO`WVbwiP`)0?Bj~RLNtnoe~%9LV%a<=4H)Cl%)=Iw$C zQp9KuU2l%qUr?!B5YXXOYQ)s*5YD4F3X>33p%x#rqRZ6?ElNQQb=vh^8ORx_Le_8@ zmFpZ4NHT9;Ei_$p58Iqjw%8C+AcL~Wirm@Nkk-=kRA&~!0NHn5(LwJGF*-pbMuqV4 zEHg`xP_Gxq<9G*24Q9mG>BM{lom)KB8_M=H#8+w&nxBNAoJ4V)geo1pGolbxsYG}s z-Pde-|5eDuf5S>s2r^7{h9bBiiI6~b6}`(cA`o4giio0QL2UbFM8nTX`zWIS-P(T$ z)sgO&VDUkc3Faue?uhbKp?>v9kH8dL7(6ng5JLZnu2LbnRu7-F2m!ucZ+kctVo3z66gZ;mwr zp>zFA$jVLh{_+r3Ni|El=(%GL^ALI;P+6gO0~6+jD_fAUs7iF2dBlctB#Y{Ms%z(D zLNiKbZf*u-!*)TGt7fMox!*EImJiqjSaB~O%7C5T8LBR-JEs-E*AR}E55IwXo_!e6 z8C0)!7a?<~8k%YctfiS^Bv@Ed1T;3SP>TnL`HN9I{J~MFpt2MiAUw=D&?nEUHQXjh zpm)AOcx?m*2K#SzH1w?ZdzUURR8f<*ZKSQ4KLg3ZcfXomPWY z8x~!iI%C%NH)5C4zen&gel)YdxweseUQQ zL@~9^v-9i-OAZuX!{ZX%kX)@p;fh84J*r$vyIx{ zJ6qw{+8{j7UEp~J6U==4|3s8C?j*gDhvT!kocsZ|UM}L6#TY z+l{Z_5 zB2~$eO#K8_nKNO|_AE)aMjbLy?#M}lC7qUARY*vUML>iv%nm({o%jf~wZ({y4MkyL zCTw;i@(QzHu$3Ol8E}i{7uAF}z#|}J)5C8sC z96R`{F~a;7S$_KPE4KrDo;v(%oIXzJ@fUIZlfUA_4}No-Ecf;GN18nom1VW4tf)gx zV+*udX^6|vLcuYyR(B(7T{|qR8w9Cr+C(WU%QsXBST<1k;87au=sDO>55ty5sOj0# zZf${uRo08?`JGvcLpYCRPwzn5(psvY8epdNye*eWGd)9h`j3ATzKKA;6aQb6u-_YTPSa~G}CqcgDiL1to%Fhb}rv?o@UQ- z!)oeR&~sKjzZplaAH}gthj8fQk8t$pM>x(g@%|fRIV;RvxO4fpWcj!F??7_#(qZ7{ zS;8e?|A+X=f<^fC(p9+mn^%D29|Nao-5J8UTR2TPNjOG0ei}G?0=RhmTl`PN1;QD+ z|0nm;eWmo{1NiErw{Y|QKLY#yBGS*_{{wD*@P|9n*C~Bnq+h;E+Z{WBFMjtX@RxUi zqo;sNpP(`+8I>tg6vf99;!%;3gl3%v%(82=K`yxh0c2Nfz^MvYbhBL5LHWC}+Z)gMGRJ zezLs^6XTpRQSM3Ll;_+@j43;VBD% zuQnJ#DnF>?e&|uhV7EFJZ)c?9qhx;^3k}4jgk*fI)Z z)g!#th}c>yb@&{J@6JXtb^cNZa)h${Uy=AvzS zE4JRh5nVG{F+9H?(`WZ!boopySUnpnwl2hyZ41ygw-sr14%i68>xZ%XyIb*{C+@-C z@9xC%4f8R&Yy`{JEyTiQ^D%P{HK0w@=%fy?JT*ylf&&A*1yMO(B7vv-T`=loFtFbr zb(Yy0!_&(R-rk<@@bZMOzn>tU;|z_^g4d@_Op2Q=&Oh=RY2OHLu5%Jv^|vXqm@FHX}$Gfgo$$9 z9O@L0mcuc>62^gCL6&hqu$)=tC|}Yn)R>AcCvq0mA-F^ezk)a*4baRr)OlG%oshYe=;_bLPm1MuOCN&2q=w`BX(=e^ zv>|>V9qK9_@_X`-)TkG}_|~Bc=-P7OWeCC~r3V5XF>p78Vv;5hp5_Q)^T7&mhF@B& zP(SiI-iECM*t?hKr|5!(<;p}=C?ryUOi+fv%Nz$EYXW?2@rW-o!roT~RZ}{Gvr>>Z zrw+0@D}u6;5Lu|8`5L(E0#Ptnj)6_XC>yLsfFcC`vJiyGBH$VBg%}wJAEx`JOcn%q zWKDi7;2t|Bi7_4bpSeyo^IWQA-j-1(PusKXfmW>fMOz7}*&@IaVR-gw(1|m2< z6ag_okoZl2B#_`M!Cg`Ag6x`{;Dr!#EdFr%Z47Ol2TAx{7$@_l{0OJKn2HG|`d`W< zNYtK?=zJhao$}96xIv<%eW|9>HXi?2=9=e}*Yh$tt+{PD&U`8VtV&0kKv_rf5D$_?#ELHUdEG;3H-@Z7E*RQ;T=Z?IFAHMwy?Edv5SpE2BEPr$Z)<3Zgd!Bs=5B>K0c^|21WG8;|&a+tcgDu$l^xarR+urlycksZgKg7-#9>z+#&Y=e>UmjeF zPUab7-PAvNVdMtiy12+DA54QdCek^))4dye0PcR_5%g>y!JO|b$MT!+b{Z4XV?pm4Mn4K&?J$M4)R9qBWRkTG10 zHYzJ4k1fUEgQIBN+>4rZ9jM>Zg@*04j}?uA9L`u!DQsJ+Hg%(D71eojN`wkNYf-gW zUQQkFoW(V;&MFi!BXZeBXI-mM+Oicv`G$5{RwDvtHqo)yJ%1mzzWOL0d;gaxUEPU@ zTD4FetEOiQixc*1*UZfo%4YeDOhL@DqM3d0qdJU`4rK}ZAC51Qv8V4mhA2i=d%3TY6DQ*Jhem1j8u3Pe$_zxgrp(ZZsRp5hs+h)1c+R zu^il!u7kbo;|Dn?YJ~`xshK(U;f_Z_ad6*f559t>kFFI~F!FjE!i$yAwqzpOl#EDO z40P$nv5$z+!LX%UgmRqgP(hR@MALg-35`+;wIW4)Fy{~FDzyw5nO3A{SP&N%Ccptc z*|Lo-4MJl45h)E90X~^5cMj%@0H3NE8Autj3D0s4 z^2xcX8dkPQS&|Fos1vfebiY?nTk{Tb{OkBnWI2=Gu7IAb)Mmn*=h=pZiSqwMmNPMa zCsBSUVeTT${~cM*$NYC-+Z7i{&hxJGaCw=tEs6-DNnmRfCd3&$eLGO+mO7ynul?>! zK{Pw5tmuZEu+Gkfc1||sX({R+9E4+SwXhChbvhqcSgzbbeBUO^w>AC)cdY*=d?QKj z!e+{sEtE%F$H;OQVLpa2vRS{T2=*;iD0!d<*}IyNx-eIq8>{Qn)>H{Xym%eG-wkfa zSy_vgy)&qOkq8g-?(fbM9_AcGaoP_TA-Ug1ZI+3s*hTgArWO(OGq_C!&$=WSS5_c% zJM|5=G(tu9Jm=nS=qbNhUGJdda&S{t*1OJ~?}dIaJ+_`n^ zI_(>%U9!GXq-h(uam=~A0095=Nkl^$RNds_@dgFXFX>Z{TOI{T#`5Id*^lUU*R-WOUtP9Q))n4xBlL zOJ82Yb$p2vtop`h_|xHcpvW>JP!S0^_1m;1R)iT6AkEc7R$zjr(utHJ6QZ1{&{sH- z*-#+tW~R>_KuKw?hzY^I>S2)qkW3l#MQ6A?%QdPPJo@lvtX;4`oXPS-A3h_9at0ISA0K%MXO8?<1o%92^hKOL@*6>xbAZp! zufKzjK70WNeVnMDdNpOPjDDWs!vNEdSZ|{~K9ur)S{*4`ew9_~f9S z>{)JKRY(2C(%UvHZ1I<~u~m@eg7m&cmNU8TQjGssz$$VVS7q4jljN zgdodVS?(gs&zv~=Un0v-9RCL~?y_UK6W@~M-{SuiB>3VI@aY-c*!Mo3T)hUbZ{IUU zd|tSEizq(@Ts(!(E}y~8D`)Wer8BgSaF%fH9KO7Gj@EsP|Ea*uPl2mc2CjdCuRb}C zi&O!fJ^T^QAKj1Bhu*`vqaO;KJ@NtJeStHF-xD~0@O^yx!AHQ6V>tJhzX6vn;p*W- zsBqd~OpbvmB^EYWJhD_NC{)T|2=awu;&|kRhhWHVhtl0c*j>1Yau-?7f%3ae;jC0B)xl3X0+QvS=QrI-G{RXQcSqaIcIV+2`)Tv}^0#-d{&aH-V zTAm=wb&YAr>o3Keo%8X;t3Sftr|!p=N48+ogIln4^Ah3DK7ZA0ELuAc_dc{8i&xIU zwtLrM`KEQFmehm!tsp)lY3gI(DD;6|+5z6`S#_G8hid04k?CFU-i zjrmLFAGY$e45a5S^Ab2Y6vhD3!+`KX~!~1N{&d z5em6MfdyMuplF~TlJJSRE7=QfazD7G24Jc-68D2emK1L`E~OGpAVI-D~p@w6%u z^$`*{G`>hu`5{&ljPCwQEMM4;(e7MqnpcPU(@QYWlY=a09C8bk(69}MCLEo!+tIbK z7mvO26Kwd=F3fvi6<+-K4}$cT)$5>bx1eZI6*6a)fP;Cmf|xA|#K(})a&eC}{n^4p zmkA5DUa4N*23egE$qhzij8-9}RECKbe<<3lA}ARvZ%ubn)F*1XU}jY*nIXs0cqOk>fRO5dJI+#gjQ|G|wv&k?5^Wc37)Th_BN? zHJC@|T8qd6H3DoAaP(%QZh0pvslimXuoa~XTK)+o^P5qr;n5&V|KX!Tk$Z#$V6lA+$yn5te;zf+y(WbKCsOyL)n@x zBVXI?#=LuDd3VD`*vOjZSAswP5^Y;14Lf>K&%VP?t)0&?omfP7vrriN`gGpHau$@bAdK7#t!6FUM zPJpJ-j$|q$96V84VMI*6Lioh9)r_o?I*<(xVTI#kjucAx)M^V7imB5}|1r{i;qCpb z(PA6+#vd>D5%cmYv)Jw~sh1!&!?RK_QQ;@jSbEMq^q~l_$BGX`Az8`L(Y}%^jlyd` zj@FwRGZAE_{gfCWFVa!x)rR!eTx7Ksz+9b%)O;bN2G-V0^lhAp zhDGgg@-ZksT9TikcA;Sl)fY?a(Yu%4Ek9X>8Q)uk!ABQi_7khH@Mjw_`s6wcKD

+&z39&Ry$YTK7HWwbE& zQYNKu<=rd5;QA0AJi7jAW5c+MCkjhz`u@@1L{1wNVj|mHcBr1zx-Bh2@0q7jy)zG+ zuiRu^)v4;-=G64S3E*lJue;WsF*5`T5l2&48x9L>)N4Ob^z;1+?|J0yiM*y`uX($K zoQkV)3hZlLn2BZ_-Pt^g2ZYU*>MPLy=`XGZ> zby1=HOr)su0ses2lDh3qVc9p$xM25Az4CFX9Q*ewB$IWmxG*xXVrKHb7Lo9;`Y-Ts zhaRH#tJTMuGh2`K`YvNCn`{lEZFOR%UYrKSdic2UZ9&=@FoxhUwJ$A>S?wb-2ho{P zeXHyRFQaolLP2osHZa;V%>S3z$~TOkriD7mJw!DQ z5)0wq|a~Bw&5GhdzUz9;#ayGAs5|JW=lZ} z0&2Z~WF=rkns_hVQ^F%4;bW3SXH~si#p1jrp-`j)G7!F?CP?+KH{#z^4+cc2z|?Um z(TdXKKizcop{atam$*bwjYVh8oZoc|H5Fe_t7t&*^skukKlL8|llEsK`7QAef_l|7 zce-y1li8QD&__KiTf+a4$sD%jxQY3+&)H#x=CHw?BB1SPVLIA)ToO!BQsP zVt;{AchU)Jl7sm+z4TEUev6+B9Myk*RuYDq1RhDB17H8->cX!>$kSx{sRq-&nO0d) z+sPf0V72}Sb=ZPz1Or@Uag%{xaygl+Y&W-XkE`sh)Y!Nqs!;i*0W-M1t}1eXVU~<7VQz-5l7HES0YsjJxsS0qyF}{0stdrlFRe8 z@`6uBu}0(9MHgesPu^WsoysaGlSTU~stM>tJrt06SG85LVCRPL9O&}tICgrMIw?uJ z`(lk%?BEi0U`*HrCcwubpYB75&xbXqcK<*VcKUAv!c@DwC_N;t04xBB6B{nP$F7ZV ztCNe(^g!DioVi_T4*=piZxO|j)O!|35 z4ohPA5-EQ00|)p(bLtm!tw@y4@abwgLg2OjmnQLrCQV%(#Xg~p(2_XaC`?6jRhpgE z4>Os2EA&Ay8q9NMtz#bNsy6XFW&-%7?dFqNq6$X4V_BZ1HDxmPcW%Hn4`qg%(_eXn z6(tg@SMs!*BAx>GUcQE6f9Xq6Ps$xd?Doq}-ZDw~?zb=*zvd<|UZ$>R+Kv)##^Y~de;|XjgURos;so5p)C1~>~-l-QR)=I?~$fhUTD)&*7~L4(lh*lN+W= zxTu^6xAnlVxHTA$UUFqTOApe%l1UUEc13iEWESz5&ZqaSHE#m6XAsXaDpTae7{-Jx zxw3d~dw5opyTw3`s5E|6Gq2LZ9jZjfKMT-`c3aGk)ZEK zt6iDYs?b6$bO_Ly6D%dB2$3U=3|Zl1Aoc`<%!Iq^;*sSA`XB86$_z3b`Y{n3z7&N1 zurn;z@D!*yzYu$$c?w!UfQp<_Lh7GD6*Kl_pHZw(@L(?kABAzTdSq$T_rNIZe{~dF zM#S-@1sb7Pcw^~w)$^#2b^hny3=#6+wZZ568Jh|~A7#x(d@f&3f=7hs_8(`}oqn-A ziS=^Ea}R1Gh&^u#E7C`2t%zQa*)E<+bb%XD?rRYwElFOR8y!acZyt?n_kiUMJc!+hN zo*lKe!4vcM3y8D}^Rkp7w=SPR4^J+4F!b67Cbrs}6W6QF>CkQREG{2Owr}g*L~nJQ zO@}*=xZM2t!kug+Up+9FFP8-esxYJ%s(s||?2QiMK6|hiQVUXV3G&MJw9NqJMQwW} z)KqMRh#2)P8#t+vrkiurPvtAd=<9?7_;pPMhRJ2X++3WS)pC?9Nh9#L*R6OAB#+{X zR}S45?BO9!o`8WEN`gzIqVjVnd~DAj;nz)#J7D)p430)m$dSbtjbWPl4W{ zTJ7Nx(cNT(fsXCTg{fk)A4*xk@3gSkQH2&=8PlMLZm&sqHte*3Vbs`O5nC5~tz9$E zcOV1vKOYLDrA0XhIi$G zMO>0UZ>_Oqc_syW=cXuow}b5bJc8>}K1e+INV~DTC2-YiUh#uFoEVZ}==!RM&+ahP?+bpy#^PTLm^6xue?iN`W2=O&Z7uQLDRs|PxT z8{$?5IUvQG1#}?+xycfNTb9GgQl1OE|7PkO)r{zLEL%8?9A+8_|YA$dkLFwV43Et%BP`h{%sBg~1ngf@3G~%Ng7T zW8v`d%Z1L~6Rgxzn-G=-D%hccSfC?APE3b-M>Uzz;Y-2p*^kecD2)krEB-l~@fYZV zYThl1$zEi~D*UQF|*qIDDCmm%N~!%fR>KVQv%vjr(CxvoyV` zCmV)}z_#LJ}-!BKD$}=6@Cc zU+!%GO%ab!A}I=8?zm>m7O3AH>)R$0)Wm<+yQAvLzR~aS*m@9tly%$$)BNYHI(Pe| zNx`R(r{aJ$VuI1-=qPI6jMJAPBxbEr8K*XBMR^@(yb^A~E|{}CO0Qx;Fd2Ro7g6Fo z{BPtz0{dtzJWrDb@UhS>dr{&Hax($(|E^HYU-Ms!q}HeZnD-N|p0nWF?BEOE&TyPB zA7K}MgAkmK$;1vhj#gc4@Yh#Dmbojmde zyrz31Xg`X*rppV6^=_V#z7&GR9%?*Y?u1a!p7R5Vou9Y0JI)88cX!>QJr9?Qg_X5$ zwBy2Bp5vXju}yLY0$;B28xuHOW(fCpqV@x$#meX&*#cr-H6DLA`H~5JQ?9tq-*JBR zco+C|w0d{Bsj_uBWztKW-x>V+TyIxjBNBdU)I~kD?n(aQC6W6*zYRM-@PSqIVclNO z|AZcoEG1D$hqj5rBznWO#1nKz)CITw&~&7jo>C$`lJ za#_avqP-9pm_CmPN=WJ9)L=yeR3+7bl?UWx!J(5Ykm>py$I)tGIa7h3V?4kq!%cd~ zS}ms*Ez}>ngQJ&DOT-BCMa31ablQ>C%FY;<+$sMU1UtdRtw$3jg-^;&j=%$2a1pAL zSLbGQ#4TY5a1MW8fWtXH)(Knu&?>Y>*IA&|y)Fn%0`aFKzqhWFaL}{)uw#rLwB}AW zXqeCYF;>ETNQJ->+f zbP(lxcHvvo*RUMQpu-4n67)2TAkE?76A5sHYkudhG;$n_S(}@B`$7|Nc6}Rs6l)^j z53O>nLfS&gdOJ{)0|EcYc`SN`;T?&w1CUIGRJ2rY4%h^2 zh~pewp|zKe(`$r>`rcGNu5q=%kiL&flm4bMPLJGk^p`ssmGsk%FSo$dOl|xuSOMh7 zoZa+xjpimQ;y06zXCi`mnLcArrqc(pke4%zQuY!SFs6K#sRl|N&?7j4rLyt;h;mlr zlI;1meQP%2B%7(Ucjug4|LnNqQthCL=?b;58%Dl&w&oY&2y=$CKLwbP;x2nmAj_3c z1i9xhb!fsneSb>2P=$c%n~GYxNp{ZnBYW8x{wyOZdf!7bPrL?3$+}r4#XWzZX;zG> zFDIg>q!1Qr(5kO$)6CqYZ@2<@RTv$NHDhE0y$BN4T}i}RJ;bma?1s~XWH}cz!ey!2 z5C-GW|ZY#h2K4!I;j$ngIjp4BGq2A>9-8i67JS9U8v>7pZ4A%#TL=-=CEd< zCU0pFMy8)pIR$JFAD*6a2HZ2&0=Ac_M3Ok(@Vk6^tM6+7DWw5W{Tv0X>S06_kc8%G z#zs~ZpBWZB?2IXeR&#{T$x#IJ5%hTo<91cl;kF1G`a9u0{hGz$%%p)&Fo@Ki9cx~r zXyV8vs(A4yg(XHgAgRK7gwtZCVcvl3$q;=?F={t>^kePCq9JEQVw!&2f(UU)v$kl4 zGH6cyZc%pW=c&;8;ZtthdA1N_w~LVfwAX|G>FyiFGpv>Wv|!?(wGFLviO2jfo(lNt z%6D?@7WP+#^R~#`Hi%f*pm6YFFcpF%>OV?kh`AtR(=DM_z1`X~o`i8%#zJ?T zY071#9QKdy8>gYEx2YpWw9cYJ^;-#>l`K8$$B}-96$s=M2YktQei$h&SM%WbYs@VF zZ^-;eKGqiMFG7s_7Z3MZmH5KV|41by$kz+hQxGXPa3@+tD)>03H-A_g1 zV*&hVF+h(DG2>2GlFJUJXFWF=H9AwH-}X z>ul_a7K{0*3x~K7Jw>(LoZ_YKy+!UuiB%0Y;ty0)_^6QvDqeP*g>~`#?DQt5Fx7^8 z{cYr`5n99lgzgEh&)lhx*}V~IHQBSA(8x7C*C zoE$52=u6@J>JNuL8F;z$bscUNOrT3iq{MyY#X^_5$=UccyG2jh4pHgc5I^lzcd3o9 zl!wjNihZgpbwK5tfmtNas~n-Q@m{xulk|~n&1>>@+_@Z@sLz?pd}VypCxZp1vr`!x zAWL9PPalY{_D!^jNqq37;Ged9^Bq-*uN!aaD?f;zdmoz*CwCedbvsu{4}r;o`tL*k zwP%TQ7|CQeQ?dY+w}iOT_3v_#-_eCkg{?1d0X6(gdpzoHWvR zTT1auZ&jtEWurlOV)yD$rU`llmJ~y8FiM>?Z$HIO^8`C%*2O{KG8dHD$i(z!{H6r| zwzq9fB@pH3l1FRa(u0tVD3b;##1-tCTl)__TgDZ=rdM6OL@v$z;;~9*w&Q0$aK{(r zk~2Hgfdsow$Ex_aVxiab5urYO<~sf6=l0!qISz8@RbBkqi{Qlit>3ImwkEs#rq60? z{?F!Z!Qi|5naX)`(D2ZR4p3U%TI3G{pyUZyKc9DM_4Qs3P6NYs zn@!>=Bbs)W0`Juv^Z?LJzf-FY&qJQ`5AgIodynA@t}^L_%u7~UB*Cq)G!y6*N2SYb}IzRW)|!HW^yPb>9s_wyNl z${!i53;K`#y%2SDN3Sp+2K0w2Vqc9QyT9b|&V%@YkQ`oM=pT9eF-rwGlgIl<^t%cCoCSXYj42dcmXTud@wH65opX zbW|EzjzZDmL!9S*w0}n)5SP*&fUvagM}TiH#MSYOvhgj04Mmky_KI$88^Xg&=hAk} zt6rhr0k|20;II=W`ppTMB+t6h}0*0vU+? zLu*2*T3J4Yl+m@2BzM9lah`G59OvBv>smddzFlWYTw8(?DiUWWresHVqIwn#qWIQ|Zeeg3>w(K~L)+W?&5{t~|Xo zGm5msyJQ~|*Rs%WV?S4RT9S7?FCXhsY%^~LnYa=teKGVR4DSbJW0Z`)3Dsc;7KI@l z-iHu!-m?>s6S;d+D2Xd>rBEYwC%XU@-K1?Kg~3H_k?Zn{W2{kF#mB*h?i3R9p0Ld{ z6wPSvH3bQVWM@+Ry892`1A|Bf{0ChWuJK-7SJVkAZ9|pK-YAVuj^vdGD;mGA#LF41 z3%g-6Mn+;nujL$5sRX$VvnEy%fb!qJjK-Q<*Yy@{n@e3=(zY<*c42bu=uQqK`BHaC z;7KZ2!alREweN1P=hMFd<4z*gDV37ccVWyNLCuy(f-b3BiBi&?B_xdA1td(JZyuhi znQ((MmCiitlFCYADEsITadQb6T-bT}5LPEQqrdB!v}8~w&Zg2NrTh{WLn=MxFJvd& z8`JA}g73MU4P76Me(lR1{O!d!jk?JZB^8(>@{~hF%fp6j#e>Yr^so)iH%>6Ver|ir zI_nV`KI^%KPsg89_xLZJ_SAbCMN?C4#`+%_%xIJZ(6L=Vu4ZkK*+=NU-bDXVm&;_9 z7_f=&X*u&K2I#*2TnZi3p>b2@qW$HzWk4O=L>I#UGT>1vSn`&^-heZ}kIuL+;-K^E zhYo{XGpc&2uMxnhkSQ;e4#qj0?h-6^{3yU$B5FvRukz0ius=NjzqV+ z-hfeVKQ)SL{n30&h$;e^=i9Q&D`RE1Z{u=JWv2z8SSV$ol>_gdJSDN4h16fS$@E{l z$U)05BKuS7;j48Ko6a_wTodyq>8-t)@j9S%RRJ5Y#nkpie31VAVP3M`*!S z8BvYhTOhWEX5Ymp9vyw+djPO`>RSA>@~3xT-G0FdWnn1y{9V(hIeXr^wYBsQyud3X zY$_$md9|jFVymhL1qDMYVGTsH3%%g&s<{I_kvF#kpXqsEv`y^z>WyWQ&f1PGEci)r zcK`m3q;+8UF_SETKPa4XWD*XGu{Ji#9TKYY{jl`@si!mjn)!aVh8D%xD#>m`JlTpv z`8w27`ct8hyJ@t0aH~G0g(tg`nPL*BUhJ%g_HROY>xaUeIV>-*jrCC%=P2#n z=!Z%2pSACyZ_{6P7%BV@e7sHf)Cs~ze0cU2zF5@ezZLHDU(mB-k{42paZ}GpM`l_r z259Ztx)}&N6^S5*?z(gQyi zLWx&Cd{)-w35XCYaIiubX0^bX{`t}^dfi^}ngSMfpe9Ro*Y9`BU2}H|R*iuxKX zDwC)f5(c}8CT_d^8&U|`L;6cr>YjN`qRsx^=s09i_G!{?l6s&s@UFN+8^3%q4IbCB zkPZ_5gsx}n?ea?m`c`X`(PrNVbAX3}NqAqFZnPT<>>FDouhkk3bK3puLaiK9LdNm* zOH0g19f|l_h|$q06%`$=0ZVHMAx1F-PR~pTo}hGLeHYfi2t%KpV|9*XBeLb}NdEG|jV{8r&%;kgn5(XP|2GXe^Y4RLZ1R$+hpBJpVsTQK>UK4i-wI>X1rtwMH#xUvM#Hw^gsIUG8|d^nseaVY$*J z&k9sh(5f!eqS8~1_5seV=IC5XT}~4A@)xI*$0z(a zuT!5llAykek>+*3QiSaf9*|M z_TR?xyJ=3?4})!5_M87v&Em2>k@{Br8-K|jY=!Y6j1HYTRQf+4BnI+?-L3m}00U0r z`-wgOy)WpGe-LbCRla*t0uIxJvWSrUW%40Qo+@dbfhnEc-?Z1f1B%_>RPbLfvU#0W zEqyT)_$l~T|0Qo0)w%2YX227Q=rfdM?e^yF#h6_g*$?P^7^fLrVDt!{y87V3yj;Pa z%%MfhAF+U(jVA&>hSA`zw)f%}ZD+=EP{_rcbh^8~VJ%6D-=4G1s#D!(cg!&X*vFqB zk5Bi1i+UTwR|)o6Fo9?{fN`|R{l3fA@9Qlbm^0U14S>0_`B9Ci6&7ti?$)Z-WgoA% z8~1n89aj%@Ua&aXvq@jool%o#lI~aN(XzYCyJtEEuf5;YTV*C|!KkOLh)X8TgZJrDrFtqy;5@x`pDA`q&hxuQ@Von~ z=ykcybUuRaNdsE{ggne&;0vK}?!0CeeL2(hx`yTNgb|5a~k_@mv}u7qMj|XVQ&Upi`uG5qXlJ4z|>+7jN@I# z6>WtbRmQsp4z$z=&8row*#VsE$623HG|@TKcLU+YAWGkduLAFQdFbpo(bM)n?Vha< zLw4?DJbreo6^i(O3|5~p3>n2t!Baok|NBmimYnDjpRcwJQ;u$5iAY=KpFUj{T+$Uz&HSYLPtQ*oahz0HMen5a;W}AQHgs|5 zrt zpTSWgXbHBOiFJ**8+MOu`7P4%9)r~^eh-f+Ub~GY+ob_w5z>q;=goReI4=QtfH;gG z+f4bwM|VXHmp`+YIJp!E`#2o@R?S zUE0vnHtY5|F_WoSoFk4KF{NyAr6JY8SX{Dcfm2~iV_N+2Lp^~;V1xWOo7#WR3^P$) z|7syA{d#XBOe+3Uo?AhD-hd~*dQ5WqD-mLe)~Z2X+;mziz%ZA?y!BP8joDHoDO^L58v&I~Ul z3^hFZQ6C$&00Xq%8O2hU}0Csv<9)h zKi>7D(zj zSMeWDI}szOTXZ_+I~8bgKxuEfJ8YJv&wLHu*z1x9!Sw&ik0{B1{&84=yWI1gm%k%cXVR1#GV5fLAv+`ryHvE8m z6~RLg2Y#WwtBG-WppTMupX9ZCH1;0zL#84n&xRLv`Ku=o+tt1zsi~N>wt{tgwsMk7 zfNErOI(pDH4^XZu@z}Zx&^>mr4bB$cD$`#om_+C*$6ozmFp*y79?3GMG7qu9u{v7S zHc{_(WZaB|h?gF6Ph_M1L74sMq0$g{`*|}Dt>~JlSNyoddl+YI$({P}Df3^jxyQ*~ z<4v7g;2$T)qz;U<$49lc8rkY&SlsNh$jGL2sj`hwWThhy;wYLuX&R_{DBjO9QBF)tztR%(N z_r$%LUeIsICv5H_B=;i&fpgbatwrctkoCB)u&Rh3D-{ zu0>l_VqCJV)|NnuguDAWDntH4xB+cLb@@ ziT;y~4IB&&+Wg6^LKny~>Osxw>o;G0xtnC!k8W~}=X|Jfpss=|@wZ=dn>jSJa>;cW8sk&Ed5!<{?R zQ(XtW16^ZZOFbjgn;5vF^-o?eue10i*0fbBaS8!uKnBK-B@b#{^!vWXEFq8Cgx1M2 zsoA#HGRbUIeWXDaZ*MBvJPw!`)G2CyBmLHj`2;BOs3$^o4_m)`rrzwe&hLu8RegDv z5AW_(Ki(ju>PT6*m6MtHy&wkM9+jLA4tEbkEd@pwLpExrvDXQz_(3hucuM!-7-EZiN*)&wHQQt zM6psK!YDfv_n=ne|7y>etpYU&{QEq2yb8`gkJM%4L`~M=e~|y<`I_&*)&O9F71Dzm zd$blgyE3QVcej-Y+HheQ$qkGdK$b;aC77L99>(docwYvv878qW4! zsJ;LY=7pPVLq12akr5=o2V+X~ndBy~T{(GVuy}}uK?wPt!JD~Sty|tFSt`A~MKBT* znp})tJ02d;(X``uvU7}R&nKj4d9QJ;pVt6_1Z&nM=+%1dXPM#e$2X>*4m9WAArKAn zqXTb0MB(Y37!e>eui<$8$;Q=5!O$$l1WO6hIRBtvd>sU^#LGxY2TOq?bcbk)J}LBg z?Af5%12_?TmQ``js9esywL-v(r{&(2H^A^;v;*_C5O$mxeE@G z>oXlHX>FFl0VDJ%lmu)n#qW*RF^rr?ghKBZy?Nw z2$X+Fk7kJV)g}=pFGL2{yv`s)sxXrVlCJu}aw>=y+F@|BAeW++7JKGM0k^Rl1Iv-? z>_|oO-)B+w)>8v|Ery-n_^LaB=csEg{jPUj%XB@fgazUodL0Aw&Ios5(?r8qO^3Hw zJic3f=-71K68;fQG214I-~VmUUO681Eo=%Qv0>xm8ECp3PStGZ`Z^EH+`SRT-Hp(_ z&~$M%V|Vidafzy-`ZD1^`6;)+d>>sdv2V8@vYWR{JaZEsoz{YUISfLWoP@DA+rQAA z+`Sn4!MX1(d(m(syn`s+sFiXLNp>ESXy<+^U(!!DOZaJ<}=V+G50giLmr0{n)Gbz#F;@JLVlV) zU{iyZmkpt!4yTSC+ibtItBwm>+`fKGkc#7-LCs23^3>R;yK1?x)35KIhO}3y6s3A> zXc1-km1PF(u6--V3Ds0^WtL2b=i{Epr2&Kpmy5jhX0tO(+ZI5Fz7^CM6w4>#Hrs8D)aX`U{MzXCX?Whc zkD-^CF+D6}qn_xv;=#<#FtnIvQjf&E=AoqOP}i;lts$6Yz+i(6x9ml@ox+L3ISr>Y zyKg?D;GvnthDAvf{ZB86*+ZRFBYPiJD}Li)yMl)Q8bX*|WlS;8I z2YV?FTl%sS52Ggxtzn#kRUCFGqs^z~XrW=@`&M|N#q?t~JdnW)^wS&>&Uu^uAU6K39k>q?7`|nh!tUD02;Jo#72pncdA?mW3*0Qz1 zW)@u=;#)xaV#URo&R`**Sl?l_OM3W0eK(+s3V?P6uc?;*95Qhh^YprFlMnPb|B44V zIoe0?B=(g;L4Mz3w19m!To}f9S8+_DesZ`CIQ{Io%&*_uyGk_pf#Hx9b_?&i1^LF2 z-L7ad7_2yRS`bCoD<2@`gBWp^0$_q!IlD ztMkBsLn)3PJMK|`CZ0Z=M9~S@f8dlqlg|%a#MZE&GHaa)mk#6&@`V_vB3G$->@!Qn zWnOw`YQ}2ZYWt^OsQb?uUMp|f#=sQ6uY|9LRcq|qdQf3g=vssd)(ltIi2uuCU3hih z-T(uLyZmcwm8(%J7w$}&8?j%~YRhx=3rssuj)lS*GLH&LnC6}TN-l(}@WU!@@EsGL z2;-Oye!naEhvN|tqwe@y(ao*FfmF&z7nfo|fJ?72Y45``piBh^Am-BhPRi4AOj5V2 zU;xD0ar5Oue~+!qJbALyh8_V!=i4)9W%~Rs>4vvhRU$*asM9sk~qAhV*$WaP10RH?dUcWQ5RM)^t>(Epn zosy+~SnpdO_Sm9W2%HRq$@^E|DGB-G6cc9a{@Z2HqDv0kUF)peFT1~iFAPs{p3Ldp zW?QbMyHXph5#Kt;>h0G#RK#=mOJ;h3b<21szs**5QNw3^OTSopFVs>sfVjiK74x26 zwj2i4B*{|Q6Lu!C7hkmC57Ls@B$$zIJY4^k%BXnes$~lD-dspIyfmnN?t1HW6`1#E zpy#A?Rz?RcnO5FjzB@En?aA)& zKmx-5Z@d~Y*8kogo(&hVY;J{)Z~Rs;=vr1-iHU1}L)}=pu+jwg1g z$1MYJi`TfD#R#o28~-Bz{32%~*of-C4KlvR=1dF>O4<%1ZxD}rT@BdgWrJP@tvXkz z?jWoI=pk5r)V0K0O+j+jITeiI27Av95@LKni`)A*q`=rbv|b3_oc3dRj#;1|zP5choxZ$Nw2-AH}=K{Dw)N!<#aYCKVQxvocNb$4}69CFgGo?l=|0D8N(^^T3*Y#KTf zllf6&E;baEb6&<~2W|~B&QANX{!Wxp!lNfZfk*hyp!}LrxpXgf>h86%Y_d>S*En$%+;7s9ZNoPH zTMGld?UV#c)-s5+!Bt>T&R|VKGM|vgJ~N`}!{*Xv+Zopr-0|;gR;DlAK+^b}!7<)~ zql+YHD~fu4k;N~w0d;)`#b(iyd8zl0L*&(9rcftR)$0Rl`(+Bj`p*qoEXCPVgIEMF zjog9ZAiBx?GgVdA%5UL=F92I%pn0=$F=nG(jVO1eZ^sCyJ03w{e zxlDT}ysRm(y^rqYwEIMz{Tu1!VHE2y(MwMR4Ab5Hm5+52^&R!r4XHE^%SDbf{IQFg5ITq$ZM~BpVFi}~MHL3e$Og(u zMxdSQGhgzRO&X`SF(XTT^TmQq1&_bK=}oPvpaZ3edU@|^)VAOOcd_5O3$^X1-dbJ- z-P;qUd6!-F^82wb%y+|fUu>C0#!q;Exrnc~>$tDYE3owCwDRb_EL+(MW&K=^$3YG?j=J(U@xaV|12L@uagDL#x3f@{cyisTKtvDr@EV!#Iak&r9E=v~ zQJ;!J>)b_}Wf5S;Amy}=*QkGaXj35sLkRU-C!*qIjvhu(bf*Dp!;H#-z4AAS6}B3i zeQcg4gH4|>Wt91qs%xdMPaUKOGKwA?X9mjZS=F-!LdQg z!{W^o|1vfye!x(eBI4V7N=70?kWKE`qiO44D>;+0Bcbj$z)syT$e*&pi?N88x=hx%#jbSWX7=&BuJL={%6k# z=_})xiAQ~;zc2OFOHo%uJolHK<|`Ojm?;R;(g-i+_y(Kdp_xOz*)}R(5I|YXGlbg_ zKu+mhilg*-aIDa>Sms1&Q=O5|CsnL1CA?ll?!&h*$|Jrg%1~WABrvp#aKSMoQ_hTP zwCx=tt&9(qhR`oHw_w#+8ARghes=I^Xia7aQ43ix?_*1}Kb8E~$n5H)^9ifli$yPd z>wN+Jzlo6az-RiEDNNd%a)D`WsYsnh!-7umoREID%y-ps^}+_w40yJRJ#y=z&aNzf)oL(h#)xf0NhD|6i6lF=YHC z^NU*3#nQfnyTm5?}$H?&q<{!IfM%I#b@Q=1B@ z^%l}%0p5TMgahNXu+}c6Z;OgFar`QJh|ZrL-fF(M=0GXWz9W95Af?i+|HA#s$1NxY z#8{cs=`mo}?I9~cOTdJExXY}fJL|>>o-=O2Z^|c?SaHE{dizb0Q`x_8_{Wmlc+>fV zm%`?ClaD`_0)O~U4CPi*zmY>J*{#qI#;hMFcF-r_1iG6!sHl<@#b+lF^ZIni(0+43 zWnAF|i>(4VD1FgH48=3wio&NVrGb+kWhf@D=z5M_3Ngt3ftlTYf%tOUL>H&?!N1Fb zFHvo9BSm4^f7SO1yyAN=(*6P?&#m|b7b|dQ`?MdKa&}KJzL~^zA~7y37^7E9mhJoU z&gXdo*JJlOR4v1kB-`hK^5rZA_wGu;e!bw<$Di28fkZ{;L1{KQP{vL$%4^z@ZlbP% zNzITV7srUl{%N-dn6*rB z?7qCls+i!Xrl$Pw_ObPR4?c@HY#fsL5OXXiu42L3N|09BA)*cN?Gm(|D@Pbc&X^Ir z4VsdGhXIYD|BweprY(&|;i|8=xRA*@UAnugiZBT$gPJa<9_pTph?$Brb*^nQ;&hrC z5?si_f0>{na~>*3y-%Z)yI;TnQ?W@dxoEyRv7$6orIJNC1f52N6gPFCj1zkrJ8*9d z?-ypNiLIQ7qUD$NN%(c_14?z$C>v_90t%*REe{^Z=fGo$#L&JDg(6p$li;npkbAf~ zGySNPo)|~G3NCdmBzy+G#?&Z4fpL*W^H*c8J@BoY`Mk77v=d$Z^Z|_S9Hat$fc`PO z+YUtsuR6?->0V#zQ2(UMmqJP|I}P~zM}QqA>mLP5nQRb)2O+*V_s6m-L|UOp44Kq} zDrjun(CEEUi@OSVDc!_Sg%~sT1kb~@s7E4ibd!4BT-ch8Br*^w0@s1Bcr}ERk<&8E z;vWya;2!!W$!i5!wt0V!qOxbUHdl&2LRgr{ zh!K|jZheEx+}^Ea9lC9{NL3DwHf2TQf7(0J~u)s zUd5bDo%fkBBCfg=MJYk+tA5#tI>ASuOzlp|=PEH&)~XSIPg^q4xh+Z$HBM1=Qwj@S zG4ESKlr&iakl#2m40Q;#mticFxru*mt#(&9V8J*3lY&_BLJGq~P>Ig0$*qE$$sDPU z;|o?}{tsSc6E9wxjb>Lpfy&qWhUS~_vYMv{U>fscR9|huN!r!OmC3wSd2~`G=IZ`D z^InhdF>W?3e6N)|HEpPd6jC_QqE!95781aeAHtqOb z{}DY>zeDyx0f&{i%A0cH&8l4B2nc?(<$MQRvaSmZ7AuWfW1b^7>Ew zkb)O^&AbQN-^0%c?bt*cEI!-yW{x)w;ufZ?@I9(&|HxlNRvet&#g!q6ei!w9+(Bu9 zzxcWNu}?b2{Ok!oMqYj4yB$B1t2Hp0NvKz;l=1-2ynz0{;eid0GTnj zgyHMOn%E3ohz3_^m6uVEciU$fK1s5q?$?jFT^I? z9gxsw?kqA-q9dX+=~w^yOO%k6R`KRuK5c)^P<5p$S8Qz{P2y`)YA7P!ZsSvQ)aSAq z*SJMS_M$$g&ClA`(r>RKL+Vk{M<4y0J4ddEj=4|4KDPkz;@XKer$V%~iLVG})U ziGxo1rC&!?L(PDbS`DP~j&Q&gI=4u4m?{6jO|Mrd6r1-RJyx2$&XJGy?$1BvXoC%o zFMsOkFkq;q_s@_7jK~-;7rd3EyNt2|jdsl!y(PLhAiaH@f;pU64H}GKvWG#$lX>^2neY>O`4lNE#3dBFp@|AGqX#$SXLu&z{%sT)g&^4G629ih*A$P zS`M!Rv#aVY#e`VLtTRtEqqm9jhyhe<`D=c4`}uq^k;1gQ&v|MwV7~CVZ%T1kmm@HG zMAA81CzszC#WLu&J}qTjN~l`vYr|i?z@_V`HwN+HkH)R2P2GaS`8(w$@j0@AqC_39 z3UJnZ-FeXHxw!WOvYWto#ttxjvwk2HO+P)#UfjPh-tA$Xu4QqZ5{zFsxz=bpx_r%q z6w$PpUr(%SY3jS^(;YAqJ@aW+Qo(o%I#2=41n_Oy0ybk0=R@7!(XMe={_l`UDj`S^ zZ{3{vTi$zYVL{8VvY!|HXm05F>37B)*GKbKoPT2dsl3%BLSEZN9w(V}XA6(xYc;#4 zQj%Ky@e!1N`Sk-=*Qua)8)lHRBCfL|9U&=Eb!_d0$g{=q)josQ8_>#+U557CVHtY+ zF-c|VcR!{_W&b(ww2tkI|M33QT1a%JbN%?dn=QY=WiJ?srSFTA7X0(8BG;qXCPwM# z?=XcGFCyQ^BUgUNuIpa;a9>-MK-4Pa0%~Qgu(&4OL7sH~aa?XA6lm@Q2E)2Bvq~d z;>{OhR)qJ9+Ky)@CTD-J#J@^Y1AqDy9bk-@?h{rziJpZ~)Iua$5AK$()hS|3JLY%? zc1j_#MJ!uM2}k&+=jqo&tDba5w~bch(>J!xf295AS@XuwO9hrzm1DA#OxOKOb@|&& z;Dv|y63d(i zWjt_=ewS2#x)KNYYSa~F*k?Nnq%8PYc7en2vwfvTY#K*WlUy8KoqVYNdJGO_7-AOY z?exV|m_D`>XST5+)^%3s%QZs_|2}duu9saffwtH=KjFdgyzihS-r1M+UjZVp0at6` zUqHLP$>!l7qEBYX(X+cfvoVQoPMBkv#cMVfg46l zD}~$cB*5z3k4M|V;V-73?>8H%J<-^Np61=6X{aAXQ|i4SxtQlx`gZIy=8z?<&sM>Q z91D6!$o#rL)BLipQ*(K937W?V^}9hlXQu-L<#7xc!EP&6AW#LrL9v&Xd~r#duLjDd zOc6+c^rAc_J$So*8bvn?{qllRytoGJtR_I>6o|c?id6LLO?c`Fk2!oa%&P`Gjp3sO za*)Fekokt)4m@vEJ|I;+p?K_+_+%2(Zt%m}(J75mj>-mv?YRr4HkSx!>jaYfy(kMA zh~G0V)^IPVt;ibXnI-(gR6i%9*PB4gP!(z}u4%FGL{CNJZf1Vpl7N8|eWC-39hxQ4 zr17HkEJmS_vm!y&p~k{NpP4@~Ag*ZqTyiP*`G`7TNdnx0GO9D?%IS;MLeOoAQ zow`x3SXU+!EkO$&)v$HU!(RWL20x6Tjk~T=b(6A3&4c8&?1qSLO!`ZX{o6_>D}HYO z@Rjbw#P@Lsm zRa+(kf-k`)0h&EdqV@rf^1zM&w$fX=8uM%XM{*tXjex0V2mjxTG`MqF@kO6~C*AX& zTSFDlo6G70meS5zGPss;)kg8;sZL$6`tiiS=n|@Mecrf z;qQIfHXL?E2uU5nXKx5PnHK@FJyp;ixfXcb|OBJ^;TM5)3+I!i2y6_K953rXZTmP z9zk?(?mR(S=`)rtcXV*Lo5j+<=y1ll{M(Cd_zKiyj#OINSvROmdfue z*bjq&>w#mJG)F!rJ^6hT_Ss#w*o?tz*9~*Wkyn2#B$veYm+W}1L^N#sPGjKZ1GQ&g zZS1SFWSTX7WrE*W@OItbv#+P+772MA1aHQWd;vBa=Z~~QO@q_kW)=Zo-pBXh3mk7` zzKLD381besvaKzt zD4$aSjEcXA`+r=*IodtSae}2`u&uY6jigKiSN(@)caI8dec7u$MRy;tIv_#;b?`rD z<01rIO)iO_Fsq*TUHPwH5}GfhQhJ#N2r2eozB0uQmXQlaj=x;u2|h1MKS|6yiXN{! zH}nr4;9oacdETnEvDUg`S9xEN_&j@MrRw*MlRZ=D=4E2*5k|Tm6z(b9z3aSxMt#Ea ziC*mR<>Aa^k9vK|jy+!#%I+d2e@1hEx?238JyR-QUMlx=Bhh}l@9gn#oo(bIM$nF{ zx1O*a{ddISE-7?~@eWlWjXo7T7_oV{o_-t|HXt6vMMu%WB87ujD6c{3!%ZIETZFvh zi#51=AOp|`Eo?rErYCe71jGNY>&e}%o zgWEo!h1j+Mw448;jGSQ3`>YKq`LLla7rUADNv!+Ggl_>5kR;Ch3A{ur5>`B9=- z5lmK|j5VB7q|S21=7I+xC$@4**4;$*{F0KjE%6gxp3oCWTB+6S&Ux?@a?;hXvk)&M6g0Y0z~AUUJQ@`C zK&@J7>#r8TF8lMqW0S7&~`Cyng1jaM?8%ZE|o-8dL#oQgsbl`jM%q+snx_>pMW8&W3nktK~(?2qg$3==(VQ+F&5mrylUdGQT zNSXa%-!8g6ky<1v;R(?&Q6;T*v*n&zpBE9A0Oehqvol z_L-3eOKy1Xx*Z^)mlJu&ZHVjL*!AK0wAh?suj+d=HdL69u#sido7q8wM;=c7Wd^eMu{34z0~r&?9cdG3dR$+r>tY*##SSr6Bb&vEoL^B5|0S#b%vsEWDnI%?NY1Rc z9FN!1Q&>d7>6`{==OeBKZ4v#KGJU%jwEZKiddcgfyrJisCeCDIqKQ%o0{)I>?yUoz zB&KVQqZt|PwCDYv>!M*T=XyeCW|vsi3f&syF0NH%Nj)ayxxu0(2i3NXm$lvg9j$u; z4MlNj!dw>8_y@YDtN!eqVwDE1nNAxMwNv$)QoE6t;Rv zT^Ba4E8hbY{-ZbHCTC>C)3jz+FXey2**UTC-@f`&lqoSE0sI~AGagc>h?$CUlHfk8 zd1(io3mpD!@ixFIN*SbF;?o%+o))4`)2o|FIYLw{F0R)) zEp4N5{F`6o+C&N*;q>#mWSNE)i8;YScQ8uWe>>7-S@Cx+!3!i6|9fl)LK(o(57PVo z5ly2$jGWhqCs**X0qfZ6fobA?7~$S{xW{ye_L9;xD%sGnm9gCEx2Y@!`Iy9+Lt}fl zp#g3{s!@Yp-ofs7-1HlaV!=*fKc2xfP1g=1ACz$Q*oNK)1#fblPA}o|^mepA@#SCY z`3dz2L1(fkA@;J^#wx~ZTQ-qMrS?jYobA2uEEC)Q>u^>}*YQJ_f1*qg@4UK)eF$~+ zY}XIIBTKnkOE0udn^7zUPM@aW1tmUli+>NwG0qXaPK}LY)697gMrl`lr0u#%4=0&Z z)Rl@oG_(CJ`qfU|7)$XGK(0b@z_=m6mBaxG+DOzN^c3u)Jlp9&fjw4f#YXzx zlhy#MeE{>|-+BYS)k$Kxte40&Xfe}$0w51`K=w5{!YV(Jxk>n%go8%4>B@4Lk9Bx+ z`_<5Y$EYjaaqmC=ZTE0xA7Eboh{dzW@lY=>%G;6@Pl)74 z!CU93L+eDg@sj_^5P{X6mlBZ9l3boM5DXh5E}S^8aI7)jZ~p!+b1o**-s85x;75dY zmD4dXubS-a?#QS&9lGNHL%A>+zlKbaBA%B3|tLqw6O7QwY3^e9=ANz9`GsHW$-CfdPwzH z(thxrc#S>xeRzC$g<`-aGFb4(FBD!MKr4?&OwhZt>#E>wNe%dK&IMB<7cJYqMgJWh z#}xmkF?i9^tc1JY7Y3sAfcDCeXD%DE``&-M6ZkGW2Y239Wcx6I6;_qG&|zty&YiQk z*00CFjw}8*>Cox~SVfW|3;4HpEz#@Q$)1$t52M0L?$_>g_rshpdKoa9QR{arv(cxb zVa`T(5HrL*?em}*YesAiy|AyYxFjCHaQk70 zaVr{O@%y~tU{^IRMrH|r6f1e`$jG>eum2jIO$b`KZbu-Gjrvzdq#~v&IPi>A6D`)* z2~z4tF00gR$PxWQ(-q8^f*j`-%azOyoWEknMti45EpOLf(SVPU%c!|g{&T=NU^%-?vi!UOt$sT6PQ3d-+~-qEKAu}K25TQysyHZM=qczJ{)Y`RDZ-7 z^AE)Wa!&P=5Zr6a|<3F#df*wY&<~l$BSH(+xoU{Ndh5Wy6mwBBphq8HvrK zNdQnDZKRb|Mq1;QRLIfQseac^CgE}u8UcTg!?JKY00Q@)VocEJOtmGJSeNNr{!rCU zgCrKEUbx>3ciqTX`L?GYlo!xzZWqvhYNjIrjJhZI(XeX;i66Rxvdl8oUl!g*BFI*= zXJD(7#56o|b=z>7Oyo(h7D;x~&4HDE4xao*bE}LzE0Q|thGEcfYsH0mZF)Oe&3#yD zK8A;!M!0&MNfB&1ao9a?@r61JzV~vNs$ufDo26<#J;?O9Kn^`WLm=4LH?QnnM-Z#l zF@<+PyIpmU?&?6!zN2u{Yeve|`hL{hQ7nGR?&*eX>19^H;nTT@p);bW*R%&0 zG$QQ$T~LhKM|TBw{s-Xcq_Cuq{90mj{d;=oc5f0VFp9&~0gT>1qu`CT`@Cihc`ayj zJPk)a+j;GX&dC0a(e&GiF6-{{@@_@P-K6(;x4V-Mv{PdfgvR=7CIac#ezD3zDat!? z1+lfSwe%j~_kgF9)fkGFJtn#*-kMmakB#evN!#WAkqoXEl~tjbQ@0)u7Lk(csPO(~ zsU9=Gjo5MhI>YhlA+uWJIO^G^BsP7aWVL`7TgQGm?3$}W{Iy^2!*4^xibI_O0sPzI z)rrxdRCx9W^+v-@|D-bohrxnXp$O}f-$YU;+@Bh04l7rgTc~@~h;I*NfXF1E3GYiP zFlLIc8e5l{TE?D84}gX{@ia~FhW!^W0SL_SFmE7A_+e5(8~kayIk~YE)6G*P%<7N7 ziIbm|2Kwg?cLCnn=;HB4f7_sx10g$BB)%@ZoCmvKbq826@C|b7rQk{FYjXl{SUSV4 z{u`CQY^kC)hA9W3Lj$siCFjYmn(|>;vnroJJ2IR6Ykf`f)0*A%myM(*@sPB?HBMq! zvP$v}ED_?$1`Iar@Ypjy1BbF~=JD@kPTn|2J}?EyT^Lq;*F*0)*qk{B<969(ZU)nM z9`Kh|Y5{@%lYa?dzZ5KdWyyVq|8x+um{BM6Tm*!~`8_Qt$K|hr{5h3Hm6Q`EV#o;OO@my1nkOhsBT_ z)aQ_cwgssyjSG4#E?TOgmqZcPHGeciv$mZ9-X}NUG};VWUN4IT)fD!@cc>8_9y}nP z1f4xG4|deO4<&!a*CnO`d_8s09PM7G)g(_KVsno@(GGpHXx!byMk;3)v@y_^4K@GO z60%D|jxxye-3msnts74JK`D!AP|k4dbr|P!)s2w!nSr07tB-YJNDRZ3JWP!{t?87RCvvGYLbC@))feuS%^`;OEWma*b5T4>)g%t$%); zFMQ1LaHaah)zJNE>U}Wr!35+5n`q|Rce{nuLj4x~I`k2+KVjZ4&bVH;imGPMMU~5y zVkPl*SM){|ZuZ7s)!Z5KjbIjAujls`FRq4mPn$V73Ml92#BH5-Bq^d=!nyg{mRB5z>;ps8bgLf3s0bc8g>vMl9nD^?&Jeb@M0Kv zEf}z7gJd8{GZW_6P%&Q~1$Fx^fjDJg-)kJSrA?%aD~ii+ZCF9o6b&2j=FqG3u`k$R z3^6xbVriOi<+0aw=Ow(gPYl@_FgsB}aE{;v6D4zv)}#OT>N6Ema329+JUIPg4vT%u zSEG{GQQ)U>Ao>^2oBxqF!U5U(=G@tX7t8vwO4Zmx^&h}2aC+gsQqB777R=^EGny_x zn6m?HwtUph|I2%=>b`!`^r1yaB%1~(t*7G%uoA8nAEeVy6CvA84Z`bpu#Vqmd_R=6E4!Wom z^(j_Q>ut86Yi~u2K(PR!QN=JyMfCelqkwbhgwvh6Bt=apie0}^*#3xwi#aCrG7vOV zVMqB`i`e>Ed8U&=9{l-fq-RYHFDfqm1L9m6aTdS99mfEr=*;$X87IyQMvX%rl9(k* zfF#;_`2kPa_~#}w%6ba5WmB36gR02Z;fs>+KwlG_qX@CJvV(tH_uWa2tO%Uh}|1? zU>BEy8;)l^O8#b;4Wo^NzUYb*7~>6E8owJ+dpx`YZqk>)kT!79oaI7|p=IdVqgc75 zn`~#DbTj1E`&G5)B994i?>gQljuPAi!^8##t)G5z1FF<0VDe1=?O=S(j&_uD#&3NO z6cB1+RO?Tm&jof}YMIp~#{RoN!0YNFUe+FfVu&f)#&=x|4Y)`f5~vc!j$D&EuwY8O zr1M5%z&zk=E`BRE*Qzg&_@VmLEEnwS74ZHC?2;JoRG$BS&@>gmwOYb$yO85?GFFmPs--FHaA0p#*x3jX(Q_ z3A-Wr4)aF{993dwQoAh5xLnu$;|e9sZppJ(kl*u?;_0rGsd<0L zw)w2|eVAN5(wU&({gKu$bL5S&Y~5H4zCk1Ti^2OjlD_Uk7GZe}kkwp$4@EC7f)s7d zL#v!a*@e{2gVV1H7KtURnQ`^^U1cmQ@U=7iA|EL}RT43Xdee$DdtpC1A!ds;lOAVMC@Mimw_G zn?HbrADMsQq2Phz?)L=TGb2_i{(39V1Rax!TIJ z@I2chTK7Zm^g`J`xaD@(CL?J(hc92?^Dpy(@PyoywHl$2$*J7) zp+9-F18M$vDT0c|Hj!9qS}Duf5wbWy)ylS!yFGEdlKCtmvkoQvhMO1hrsg%;+VS}h zz;0}kYr4CQ4&$fQJ4~hB=dE1+nb1wcl+$P=%NS$Z{?EyNnY(HW?O=JQ?puQv4*ZWay_8G&QN)9;}Y2VC}+mA%XE&)BiA8%BLJl0ah>>pVDx zg)7pMI(q2DPOc-il9fWK&&WlRLJU+K6x3Lr8azn1>WKI2SLN74!n;BGZ_ zjndOn1z0XTTxkq13Q6Z*_huZdW8%3;5f^X=%6#b5!KIm=r8R$5u5IlG_nhFa+23Sd zM=9z)CXMS2mUuv8CkOhCtNJ>auzKh@Shgu)jw<~6jqapoCj#k6TpajP_SQkS9?ZtG zb2)|zSjmZi?O-c>79l}1ej~S%+~lw431Z%2t?Hw0$XTJw)sX?S{zKshb5(m%)!lQq zG_L+um<}k@tH>y6j|Q}3Gv0lW?zd=K>Wq~TIN1a_JJa5Znhq0C+8z7sa+(<=S4#(V zdYWjrRvf#wNocVy{p-~IkqGl9_xwq}MuS0RH$29q*P^qSynnGwsl858Z}4rtp*;c$ z%=wlxZ+iqa+^KNR6BgW?s<>OwL51tUsOnwIg-#_^xTbj&4aHFV&}>ZegE<2q%eluR z;5%&--ba2ajLv@eodB|F=&AsE?Jm4M^Wl)ao>b)Fhv5~s{dsU#^7ELV%kSSI3)+Bo zQiv!kTYliU*(T_IX;Ak~WjA+9+SeqQb~((63Y=nVp0lExYL4hk#H?JNPqDTHSPWFa z8R#$`v$P`^3c2|&fFZF{q;mWjqhK8JZBI552i`)`!rH?wXd65=vD^yX5Nwu*HOIh+ z?6Mia*^h+asmC3``evIY`B`#e;ei1s|Luwc!FGv;_dOR6k&iUp=7(ze%1zG;HBbW!RNKP<@lviIoP!7z7@>nEOP)fXO+romhBngJ*B3%vw?VUcFBdw&hfN0Qv-=U9@%2$$ z7Bn!OLHw_*Z*&SBMiXB6ALNJR{-ao2zkd6_1zGu9cnsL<)!-^R`1LGM1prwHU5{zJ zC4<{!kAwb&vQ^F@#5uls5_P_5x>3crDZ+F=+(^AlU zIp?cd_vY}+dRor#IGfI=|F;@AvWZ(PIMAJnaFt4Z2VPhWKGGWnz^rTSSAMN;xOoF6 zy_bjPbwi=Ya`f}dv^hX{PD_VaO^dy@iGw1uDyOPS^k9INIv9lCj8l0GYr_1Ew&rzYQe@yI7%{u$F;=|X+8JtD{F@4jJ?>+y3c zkXL(on!4Deketzgp@;^#$g)?$Y4b_0YZ0Y#7xxg`!usQjD=S3M@=UKDn*ougsf{5P;i2y z=vg%9f}R?pt4A>uxuT66n>>JX(*3%&(MV+)(weNED+^2~?wsz#v9 za4OS&i)(3BhB%Urz$=!3bc=NDZdrG{df^;CQ&@+8gx&E_pwdFBb*Si9@^vyZvWp1Hb)gw`QY_5}9Bpf_(2 z*H=2oHsr>{v%WXPOl(C~;D4>Z2c+!|H%=kuenqmRzcbhI*C@ImxtlmOOV!bej}gwH zI<;83i4bQ|$Nl9w${HSY=8_IgqWs3;cU`rb1b15*1%Eh3v2x!#vLfjiSq2cZ&D=J8 z{DTj7zy8%?2s``Y4DAPeC<@}3s_hD1-MgO%X=nRkDW-Aqa-g##*&r#Y0HBm#;`Hqa zqSjJw9i8yioAx@Nj$a@OA!7r{p=}GvSgRf#ngIFRWG(u%eXQ&~eY@;Gz3ya5<%T5k zHM2N~VM#mQXR?mdxBad9gnYGv(_k&NIXJ8-lwtO5p$9Q|$f@^2=hoQLHK)rdfOJ9E z0`?}-Ryamn4A6Q@<5A~=aG9)9<>xmAplG}D9O~~1dOPW~o-3o9U%3==6&tGZhKT@W zL$_3e-a}j{tt5)+b?mid+`sp5-SV1}dk2R>hIK44x;`HSQQwY`y;FUGEC#$DgPNa&u1 zx5=%WVTyFsd;PI`)KOxjo``C;#O=?k-t#IX47(+lM4FEXF;S{g@p%pUqp#$1rIR^} z@dJ9?7wwSAisgfw8+W$O<3(f#cygnoGwm-n$AeyXBmhZ6@j+k}Z5@FH0G=kUxyvh( z)o>bk>o-1}%y0{(MdX~D)@YzA!|DxkInXO~L}}U9h5nd^hqEf+KzF;_xRkm&Oq_vY zqPLDMt8 z)v@Cj?lN-QL_-ON42j&=@tB?$nH$Q^3Y590qwn0bp6l&pWBu!8H)|26WIZ%odVW+w z&58|TxSY%N24jr=foW&Nio5x_U{kx|l$(@>S~PXbO5@)6iZOx{36TS?ah$uxkNv0s zO8KlfIx*BK3ZFJgR%s5TWc3tV;Okp)z~_1J${5if@P_Z5O=i#D&3lyLNJ$5uFY)QX za0td^IJP1=VHSmWVaB&kYnCrilVeMAnTKJh0ie)Lwa&)Tt6C-s;p!x5vmDYd!)ynCPRN&X*w$N`$*h!S1l^Pn+Cv5*+tnqkOt6pVV&ZS+_kbUBi*zJqEto(yVj!nIBl5EKR%1a^Yu^+N(u8*4l z&aj#0-m|4s+Iq2qknGte9Cqv)co5~T`(Hdt^-EFqk%R@8%6okMD2f1y!y^u_#`gX7 zYhZIo0{Ltjy|b&vI<`l?fsoEXr}-^+7e^n+lj+`rfV}k52lZ$q&~Of$86Rvsm^a`n z2u`Xop5M?LyCi^XY5$kELny%vJS`!g=HP2kOU?88%&Gd##Xs5w?cy^g@H0%gni*JS z>kAy{s%-gZ*;fpnNLBhtY48U~&0N2)Fqpniu#MXAY5slA4lI?NSBbjDH3p7(W~#Fe z8~V|_VOnEu;MWWy8I*-l>j)YKdJ(=|2EthLt~PL$@|0^oijEH0{>9->p?9*E7r(65 z$(~>%QRBUTd|2IUz>Kk@wk5#&>sG)y8f}@;8`dcxl?GE|_ z=%qXeB)*=+goS*udAC+RRG9nolj1r}5a;97McxmjkNsqX#`v0eVa z%~r6`_Ws*+!{c8wM#Y*oq+^2EoC9ILh{n0R6JcVj+orr7;j&LEQh7myt>F!Pmr5ow)8oE@FX6R1o zkZ|Z$x?|`rVUX_bMsn!**86Y$v(N0Xj(MJS-`91X+QO>(T2XsvaU#kV!UY&gPyMAQ zMtsHphB}q^74+@YQA#@N^$$9RadpJdE2@Zf-AE9M7MmB}((tx-qy7b&lw%ihN^dlv zMU<_lf`Lpg4_>ZRB(i%lbO1R?WA)ed(p|;3NV~ngk6gw}mE*zR2PKqp!tSd}phSzIE_fCgaE+anW@_>%%4Beg<95*P}pcV5~0AKhUy#>_D7OskQ#t zg|Msaix`ScTMU+PN6QFHihjzHUa@7d28=B!{B>#0&};4)Iiy9GhctUutg`E_^Ft@` zVd(7E5NCFGjbXgS$@R`{Z$Lm)qgs26RdxV5kf$#MRkp$Jl?34bG6e2M$?|WkySebb zJYyD&tob}qZK@d!dT)b-5U&1Tpbi*xnMSe}ao)XS6L&jQiQXkCk9iHbPEA+4%JhB+ zWiao3aBSxQ)DDfrZqJOXB6o}?dJp2~t7M*g6)EQlrI+14RqNAxOlMs~a_VhWL|;~_WQornf|r1l)yRd>@g#`woP+o8$#z$PCU_zj5tzKoad{*tDPeA zZkx7E+)CGI_DGOwHU-0_s%7YCDD$VOZQ`f%+)*BMHoYUatRD`t0anp~XyNGK>AX&0 zM=ZE?@{4|4iMU>yhoukOr_2QB&`o@aCh1r#Y;wGJL^PId_-S}wxPHsEPG`MUe<{GV zwntbunoU?6xVZbZaewg3{Qe;Mqlw7-U}ttjup%e0&NM)k60{M&i`cK}x+q;SF4m^C zQ#H{LLx;f*9PI*kfQFLOd#+wlQDU0kH7Ix>laH@qF6+5O^s zl|l9d?~dNX8_F@MTWie8Ic>Ck=+KSCXq30-PdSAv`kQY_yCFaB@q+~NDoW%j-~Wub znV%2=5qTF_tF#NnQNzXYyYqNZSYD`n94QzF-3t90&3HyeM5bPgj{NtbmNiUdKxc>A zDRK4TyKjz%3APS}O~h$%X*tzpu=%0ic>F8ci-Bb&9DhH0SiOmQZmKGEImCB`mrTuc zdLQ~jY|V9Z!q*2xG!fz_)u&JYL6CB;*s4}m7`jrH7qsgMga~WL>Lc0n!BSW`p;lk9 zGZWj96Ma4-)6@!~K7UWhZ`ysA+QV;QS<6%#K5QOUFQ=}-lbBI!hNd6BZ{v-aVIBoy z!irEv&6sXTdSAUBZ*G{1a11S^PUU{phi6@xMJisSxX6_=Akxs7$T#*;(=iZY zVlsyI-O@G-pgwR=VlR>HX`2ETT52c@1(BEwXZo(txFKo0qwe6wOwWfl{gfc9!6RpQ zfz?_2*h&bN$$Xfj-zIrS@o>&Vmx749Gr#{8Tn-8IP1#ub><`wIU>`lr-!GHZMz)7rD0@UAGpGP%%U3? z@#R8yzU)TEd@eH47Ur1kA%_ z>{Pt`iw((%PneL(5sQbx#^Rbn5>X}}jo$;^Dh`bFhLYzAWBw?wTMK_I>qRAg*RAJt z2PPV|j_-0_mg4jMYhINc)_qaYgDtUb6d)tQ4tguhy;e0>SlPzXm;uaXXg0toThm!o z#)iDDr>E78%{q1o4XbBRSTc%_FqvV>m{f0{|6M8J<3$Yh1!EOrvPHz#`o$P@et1J> zG2@0;F%Vddk;s!WSHm)7Olx@u2{TTQmmb44s8WODe(GR>Q7zbzzjM@``|OMqe3dYxD?Ls+Kd*o+e2p!GR0 zlyWMuwQ@C1)76V>9XnW8Y$sA7%#n)=6nbq+i9aK$2JCXc1+&&o@j|-NJ^T2+Qd0}# zju3pxpzt5-?_XeM8R;3>{y~5Kt`I}_GfIzTPv0V|2pbAZea~m$v}g~E%2y|(WE6_QRv)x#(SjEOJed2+K=#!CxMIh zx9h?`XghP-3coed`q^nzlmRXH5vq;$_xs--yY|P<7Qiq6elo;-Nghavz}j+M^zS z8q@`}ql2XC&REpf0y5DLq1U-~l`_<~Vfc>Ic1Jk2V!J2Q%uFA!m?Qi5YZ#_E-MX3h z$t%-n_S@WW`=<_t$KLggCkXOZdQi)+WZeD?D*&w=sThO8{3@9)QdmD;c2E>AuSJzE zEl&K6a6~+^%qkY0WXvZ5?i*OYWglx?L*c zAfIx%b-p0zya6*%-$QW--PdU>dtrHN&=-&eH_CzI&rKYDtuHdjsWy_j%FLSiFt$x= z>+`$oy`)`_ZLqUtJ&<>LvtgIg(yU#`dniCMquMokEwpL;+Szy(<{H`>cIr)XWG4X) zTR7Dj_ycdK*Yz>z8y5?sz3NCn;g6lDC-tq3OK2da*F=iIe?<>dA)4{<^fHhhFE-y= z(j2_u$lfzRT99S#&?PfG!dHBKbp(jPwAwlL9P6hdu^J*`7^7<# zkfU&>xvAD}@HGxbw!L|?hMiUN$;FYv&CpTgQ_AFEHw$b)%#KZqt9Te(Lk z085EG6WVhd;97DL3=$G28^q}NKJJwJTKsu1XX9d!!(wjZ%j3bCe~6wxoGsgXchGaI z!nW+kBRs_vyG9vsL!W%>APlHQ-j=PQFmK+~=QqDoY1dl`-3i$6<_A5OHJa$SRjvQ! zH-SoC5|9xFgF6T<$$?uWA>71Fu-{7-(&_vYXP11ta`UiE?>uvH?2=O?)^<$v+^V|m zai5x%q}kb7F&|cv?qUg8ac%#pi{BrHx82`TUtBko_griOHc;PcrTpQ`>xSXv+_qz< zsur9RTwy{c5pMHE*jsuwjM5S$>wnwaNH?UX(V9n}D z&1Pl6^}MiGwgOnUni0jazV?-Q-){|amWZ!#A3m5c6M?dujo5RS@|Y21U=@f#0Q_m& z&3-Qvh|t|}!y}IW{P6o=^U=PNTy;kRh%LRRow+Mb{$s^B%fME&qMm>M7{gYzkoR2A z!4m-hMke?PZcCm`f>IO6r7^!!+XztLye2smDwdS?5lZw%`>|vggcSg{Y}yNIMTWH6 z8O8S%qtHu-^^UGaaH^j|**20B!W60%D5`18RqYBEwkXqD zPd|)b-vn*LQ`VQ|)MyxeDdLiu*74F3njnO6dNz}1Q%Nqj19EX&K}xOXe>s=K)r?o8 zIafTe)qKyNivL7*d1JX@($3Meb0D9-JQmD*eSRPO*T3nkOJT%LBOp~M>SL=Vu^i_= zsX^`6iKUx3rg-5n({?PcLxZ?Od09`Z+BTLST!YdrHpg0>a)r3!O^s#^is#=SK~28s7Jwwz&F1YJEY7YnYD8g5p{S?$oNzy9<~9S|{tgC* z4rw#5v(L~ju-LB%gJHcXa-GpnSG0Hm9a-y1Ln17T71)V`*g{;25D3Ofq=nDsB5p`= zjS&*Oh}u?(g%7{H zY?@U8eKPAN_SCO?lWd{WXZQVOk(dK1*qI9Y&%U;E_`x3%W~urXKBZkUjkeqY1Gg;t z8=^nS2`j42ug=(_e>8r3oVlT#NRPVh5UG*c5ZKovVG4^aX3H+fE~1o0kN$q@82<~7c!?8q-mUGE!W*5v^Q%q z9jioQ6Y&?0^MCO>J5))uj7ZaaP=A>2GU^4lV=P&Ml$PUhrpb zqEtxV)GL>;A%;4E)eLSXd_>gRv9E&;@Aqyq+sX(bS#B3!VJ(x?^FPD$Z;os4pPYjo zy~s;bgcF2~3hs;PG+U$TsZdYa_&g$@sN^fwyBG)1+Oj@u4j@^Z}M&# z;zxEb6;4zyvqPnPh0PDA`95RmcJZ!I)fF}7Io0Ft&hmuL4A6FPV}y7pcdNw4E*w5v z{@b9~7Z44GYQ44=7mXOO1SWcm4Y&s@;ptn(#iA3j11=$4zZ+f$@thd8jK)RoNHNWc za|Qm{MdB&;iCU$zoKM~f+FiPz@CPf?+8d7Pn{)fM*{Z?Od>utr;%DomaE({p%smMl zTolzS^Z4lgG^=3@^NLudskiS#WP?_aLXkG@U?GRh2j?4RsQVXF;KkdexEsx(^uXO?;F*(r zVUs6-V1ZcY*(za85n8>Z+p-cMw^`2~X2C^PEC+ns!RKBu#vA z>;f0qrP$8fqr>c%7NRD$0Dj-mq4&~BIfFqK{&A`4_nl)8KV?s^G2(p%Re@EnFRn6~ zjf)w}C=k3jGTz&>VChr2orH+fF@RG=$*OXsrfm`ccH?k%CX0 zsTyfAo{d)K9KtflpZ}X@2s4#wzLl*bYdEuY=_y_sb zj{CU-B5Z~GHI5M}dSeViBv*W?S`f>kgdGSR_TDUNp1#_M7S_v0ZNjcbtsd`&{Xi4R zMl~!2GJO+#uZaxdz8@omJh&RJFQvW9iKBnDlTd1koi3~!-mCWW+Zdh#HRK>N_Yesr zgifEIiM`A&{w|H~=ce3|20qI~se+#`++S1@Siq8(CI50%zSixS4sJVFe3dw2--V*{ zGAn)jIP$HAA$P4x`eP+fez~Xul*pL}4P`XV*^H;9Qo}%TUs+CG#*C6DodxR~ZCD+B zk4UvBj(D%qSy`OyCv%>#Yvpdi9*WWDxU;X5Gj5F1q4!-&bEtU}9cQ{QzT1*ZeMqPw z2Zf}vKCRJ+Nd#-G?9eAdRnyfV>9yEY4A=g#I*W6>hU1bGireFfk0KXc{>vUO{=Nr6 zA-9t&jb<)-4CLBWw8YBldxvG>k0K7D&14&qLDm$-gC|8dwCv)ToG#Wa;E{SX3BSzo3scJFw)H<%A zP~I(uJG~H54#Zvh)QCyK!zHeX-YPJX8KjlphmnDqj<6@PBQfrR&Ky)U*QzpF{NE#! zPKE{ZabEH6dhLZoRX5wc+QA9kdSC6UGo@>$Dz8db_y=fLU|3PR(^C0oMJ6gIIlA@5 zPWdb$U3zjIVoqBeba>VOEAQP=%aNF~W1nr+A0wbL_@LPOMULIw*9_Hd@co3dp78xY za>*GmZ(9Kc4rD*Pj;bl5w4bt^6Gi4|NYM8&a?EmLpY0-J%6V^4ZL6cxPdlp!eCKOI zK^PhXvIpfeqE}Rl%%KaS^H#$yaK|o|htQgc-p~|^Vjy2OAi~l-q_R%_pFfo00vb1fmzSLNr^>rh0k2N7qfj zi`KE<{tpq~vx=x-(=YEv*caxpH}dbBNU>&aj_|gFIy(4%F%Hu5u@e7gxRbB%Q}_p< zYdEC`WvOYokXHY3$SXuhfpR%TR>(DU4FYfbtUd2rX&ZUa&7Ezi@+hlsG%d?X%j6p4 z*V!LU67j=tzINBWN6q$QLDBTnT&h;5+0y;?o=}Y0Vhu~=O)-0+i~MBgBCs=KMG2NLQq} zWJfWudJtiR1HwiqFb|0H%dodIZy`u0q6S9`LG5iaY)ET!#fXwP9QAI#+K{X2&e>$Q zcziX9aXS<~6|6%#y#RTo3VBbDDau^`b>PikZs**kBvu^vaY@!Qk(U6UzGp*`2$qmr{^$A zs={XEQ1(VtR~_W+gPuru*^m2OV}mpdFHs9=8)+|eeZV{Dy0qgs_nxY@2pH_p2&5di zi>S(GY9a00snx8UJt=9*t&i5enMc|b>dDMCigt>&w{G8DB8Yx$hjWQvkLw1llm2k= zD{yTOvm#AAdU6^Tx=+6}M|@hb&lBvwBU5O6sIqbMdp%;Lgp>{NziIc{!m>zH`Hi)6 zz9G}%zQG08##!i(k-_=OKN~{5mcTpST#JS3Evtn2OT$gE4cZ=+YEUb?s>ZR}usz#I z;LKXG-8LzedYYR}01%{kOwGLMzWByBaV+}n!@!tHbz4Ecosf;n-&Mih%9j8#75rtp zL*I*R`IGE`Ok0!gR?Xt4g|Lgi+%iCnjajFHrLd zKZ#y@L$hahQ+-44_M>kV&sOi-*^L?B%>^z)M@me>tK0tNr?U>-AJ!clnO1((sT32w z1*Sx&mEU+)X20h=UvfH)$#I&k)!5&{*E-n%hzKi@=nK9HlbZKAkfrNJ8)K3EiT)t~ zPSSR_2X)?V#~?g$msT(bq} z94yXQon4`;Z4D7+-*a|flycKCi%iC5hS($i1yEH0{0{7$Vs&aS`OIGN9%pCv4_MMU zN;_d~JZOpQ#_iwDts!fSxQ$@jFedza1=;ZhkGe$dLUIVxLwX3WQpaA~^ z;f+T2&vQ#Nfkr8@Zlv{iF)k*KN^+S;a81;%y|RRg-L%vs90%N;LTJAbqPDj_S;}R6 zJEY-Bc%!L;=dmLjrFAX}ZH_DWq~Xe;df7byN=wi5jtPIPAg3`AYD_~sm%B`C?|=_X zq)2EMGB7XI<3Kvrplksh#KB?ppq+-dZ`NMHNZ6G@lt%dRsp-k$Av?Yp8UMjLVmOG# zz&c~0Il#3%dq?>>t)cl%<oxQUW`;FPeTGmV||33)@k)30xk4lrs znG+{aKCf0Z6Rav}ilm(}Rirm(53=ru5C-i~mQv77pgLP;B#W88f@$L@dhq3fD)w{< zStsIlrecdT?0R?NjU*%$+oU1FmE7HHD+HHXTb`Rl;@y?)OY6rQ5!Df9z+tG7hX@dr zB?DE}Rhzc(j_XME{~d0jS()kqea#Q1dr%Ep*xdJ}UiO8zs0}673(K#Iq&bZqNBjhy zYFhik`b9+%aC9PZRVa1MAt)~1se_H5d+>Kq9<)uj-|3(|zGI7#1S|0=n`dB~=7fP{ zvt$<{Z@2)(eH=b@8~^K9#w;j@N{v0|1nL}z(5}|^Bqmu3w2g(JS9>(C(@-czB+WcZ zrBlPNzWgzy&L;RcpZYH(c;QW?8GpZEw^%Qhj20Y`zYVSDqp#g7NC#~bQD}D=k76P+ zw>NL`>^m1LJ}x;W?8P4lIqB9l9^V86IT9dg4~94*8Jt5WuAiF$&UAIG2}j}|wH|tm z2>OzpYnxY}NR`tXwH1>YPZVpRb4tlx^JZ^G1NLyP$g^cN0g+AX@H*ktKDA4_ zb5|+W>{d5ys+L-Gs>fTF$CL0;3m0R?RnPk+&&Mr2b^W9`C9KsTzedNP_Ha~gSg+^B z9hJq>D#@>%fz6+5A|Y!2J0U0vntQr_IcxqKhSm#{g`?l7kGVy+B|y(c1TC1cw0=$U ztK=VUzS0%5NZ_)zY`-Zz^-DsyXchD3e?#~%&b1i2@mH$p>>2$}@mQEoBB#aCM-zvm?)JTBiQ5fJ_fK?8<@X;b`Su6%Dd>YDTakd&q3 zCl5(jGF~LK7f4WQ)0Z8IdJE_s$8DR>dQ#$AX;Z0wFh8}r-dx|iwmg+<+*p_M*sP%v zi?|4SSM%qbUwC~Ki=y}ESax^9pksgbV58ZY-->m|c!U_dNYsrPkLq0~tuWXM}6BaLiqR%nTDQV<`TSF2${^EkrVus~Z-faDZ72NdmUPd2cf z$6y!ZoML^t4(82vIFK}IZBb3i1gZ%9?1g+^AENkn-bOqg{!JVgawtadSBX5cSH?d2 zXpnf<$Ov42`X!EXAOTk+v|7dE4TUHV`Il z>Pa|2>yb}biJW()HE7h?YAP~vH=xde$1)&9ozFm_VQ)hP=rNp48p`HKX^c_=b9X=A z>h?$QVhkEQn|$#4VD2^jiI28*YNrCH6`!A%ucBA&`Ig?j^Aw0}o<^ZGKeGcsHsXUQ zm2Oq13zxuvA55&QXl8L3Qp%sPHQ5fyL+@b3WWofO4k?QTxzJq@!($47{ znA?*9Fh%+n^`$*?i!ewafKzZ4XyvW18HIV6UX)t3KvQu~!3-G9sKZ-O?LScc-KL@n zT~`X2P=2PH!97UYCX+`tWeL$G7|g*P42D#k2r`z{c(yLism?fL7zETU&JpUYDq>xt zedc0$uE@G5jEX1Ccr)q{=An~`aQUy-rkspJ>uE@zcDNNwg{Fy7t5NjKkIjrnk4KERsY`JxaoT># z#ok(BPhc}8^gU8?NiEK7dz01x3#+H(4;HVF@CQFHGIF%`aVJCm7PZ)+Yt*@nIDK|K zB*ttq$sSEHzL^JwKEB414QL#SRj5EgH|iiNP3$B>X7-kMbKEDZG>f!B7)#^e7dG4V z4xzEJI>eg0<^~=CCSoRht2F3)q~#ddJt3pY4dN8C2DHDri^LMmt71neL-xS@B>3n8 z{%grtttIv&sqvgkfNZLl=r^-U^JY)(Dg+nAPZ)T-xzid=11$|QW))D&z&R)v;^_-3 zbCK)PkwOTVLT9u^M-ANDF{^o*MfYbxHAI#V~Ka z=9q)WTon>T6Vky@>rvZCf>u3lnxr9fln(vRW0c(Y^QB{_BR_c zY0qnjum;z)+ZQxQUF<5Pa_VVeeiSr&0<;GBWg(ZBPRHx7`vyX?EPBCvZ^zch)7m|c zPEGov9Yq+fS;tHtkSj%Rlp^T^HkyknyiM3!?*S%)QqS02c7IuwA)bFn#-9Q^L4u?H z!W~Ao&XSvAV2Z?P1U$5YP1XTS!zjaRzEcKP!q_Bm+?+Qia>~bE@WrX7!Z+P|(}A~( zE@LPF`t8nzQ#{-z_BVlx$TZVu9tNu@?QBuDMdQBd8<1^ri&e z&A9DDBnqSZ=TT3_hl9;jZjD&E&u0iWnAiEPYGf#|Z>^Hds?PrGo|SpcZ}yTo$k=se zaoYu)o@aaJ5D0V0e6b)D}>X9cYqIFC=^C-%NrNhfY8g zecJ}tY#D(;2%nV6;rA} z_(^pPtm=2!n=qb2ZC!pA1IpqjQen79ht&>x$gh|^Nn>>h@(&9Ct#Vfl=1eamRZ~W zl<>?v$|cOogjrMQ0WcJ{z~LuBDs$RAv~mB95QemYO`oXw*IO>SV; z+pZiVVZSf1gdAy%0Q5ARLNa0P2WZeBLyT_Qzj1JJCb1DdvSy8kb&06NKE-e`MbKtm z9H_`n4Was;$DS70)#AL;Hz!`?LVA0OafY6M)ArV46LDj+0f$i-kMFMdba;kzB~vdc zcIqZuy1Jj}A1WD+4q;ekrO@N;;F?501RbT;+Su6i&7G#&tLL*5xwB@q?0$JS*6fE2 zwXNu!0QqtmvHSA}=i5IVNZ*^c&T3W!z!schk2P=4wz=2(z2)#Qv*#l#&%g3u>1?5k z-?6!`HOR5au&tzh@c3=%*HY%`n32y%UCbj{&QS`5Dsstq!v}bOnavqLoJBeY;O^KT zws0y++L(w$9bHsUOoa}1+?so-_u8iLQN}Gu%qJ5B#x6Xc6-R~`+P@>8;bp1zRW(-P zMlMsp?EOl@Qr3~wY=orp1r4Ahi&!w^XXY-87=}h9*hSJ}ovMXeodwE^jM|S=T4r8DlA^xDJzugNYp~zJYWUM|c$2?0z(5>7 zt+zuLxV9Z_C9EycDmVD&{Z4Tdx|;8n#a!*E2p!LVL?HzQJQFxa*r=sggJmPQZI+9= z-&M5;AVCf2^LS5Sh>L6%WVrL$!Rl@m$i?5P@1I3y8hS(!uh8N(=jvG8MJHvIW}4;0 zSXR9;E@I<*5`=E2pVY9ixl;1QF1DWHh5B4Akl-6W89yuwm&-XNvKay?XXyc*B zFC(N{9G~5CKBHxvE>wtJ3VB5+I8kV%Aw4jA2)q&QT|{xk})6? znT!H#95N2nWWkOBX~UE1ww25uKeJ=@i`4s4qc}Jef8L9>>cm)YkrDbV%V?^X1 z9q?(`3`eq+dpnlY5O^p5v7EY{v=x2j#Q=`Ejh^82(TDsIaA z&m!rM;}rsDb1CanjtSvD&Ng=j)tR&?Ow=hS#abd=kCTe)xcymIZmOaP>=oQ4GHS}}nbmK=**Sw?Ik3&QonH%we zlf<5Tq2>>wZ^zqy>s?rV*c+To%d%csj7>e1o@VDOaI@m?v9;WQ97O|@5>+Ems4=v) zC8b1eY(e2FGw0J$2~E%#K3yrQW0~5O;xzXjsyiz5fIxL#`F+s+QtO1*S8|v5W0`}0 zguEQ|)L%rfqOtz<6q55#pW3EuhZJ~>neYG8kF;JFEB5DS!@F8+X#oeh$`!hn{*rcvA$kQ@|@|_+UadnSq&Nz2%lX zg7*5v6vN(>ttKgxxymWc%8sUnwfpXwXrcU{>_IWr2GMRvFt@#1(Kd`CUWBrOFT6F-0RMW6arm}gcO{q4G*kEFA)%(sBp-&3Sx*-rp5)~YDj5E0-2gyq zgc?@D@Mf98vOl$uc4pps)0bvyz1p=IMsc}MzEpGP0QNb}>0^tF)RC1yYm?T>CrQ~Y zOQXE5!Ky}Q7km;cqu!y84pU}GEPDSreHi5*!EYSzwNIphONt>b80EZ3MLcJW>(Kwg zS#kC#y|G-uE)C@0xdBj8eV5bF4d^D9Va>^s0a7 z@~)9bg*Q9KR236O&;O}HkG$RN)P7_OBp1Xryo;psLWC^^Y7{Y7B}5VeyB0s1UCct);O9kO1z0s-HOHPUmRtZjSZ@g1I92ZWXOYd zU)0a=-&G)7UtEZu!%3*#7oLk0Qe+6xKkG!KochH)E3XZ3h_ugtdhqYnVSH>RI~(#; zEV8psA2VH^`V`HLp+zF^BB+LBDq8$gPS+w6xLxLd>~a8o;l2#XEc4S=RGN)f5%17L zbBf3i{X}X6gujnH&Mi@Gu{jsl=6GI)eld-u>&-&O?RJlH?w)Q@EnW3L3Z|D4M81+@2 zpacNyE3joRs}>0;Mk{1yI-i8r@0Qxnqq12&=zy}Qt?9Ufl2k)6(XI-YqGxH<^DPQ3Qgv3W@|A7mVV@I#bkURAT{c8i$C?dz9$G~h2gPT7b!%Szit8FmYHuhfEQ-EXNv( zwG-@h_zU|+os2gbMfivXAX2@Yhs>8gUpe@^yyFw+`@VtYS|V=UK-|FC!ke{Kajux#30~HZQS4M|3jvswyKJy}XxjtQa|4*GSSgsZrymEhK zMS^6^xb^%2bGnTj=WObC0BddiTZBM}W({lvrp|(ud}}CwCKnw!oJJ_Xc%ScfL=ClTlx~cVdSQj@P`RGu0DHVg6R6UlE zhYC#%of;(%&nZQZcXSbgi-Ad6;>s7&zt(VRz3G#G;f4tPqT zJUyI3uK1jB8C@eX&*^Fb0+%1miT0=gsbC^qB)!>SS$)_@Uxn^M*>Dpo~> z|84$n$;Z-1@AYLA7+gq*Hj6s*!E6ncSh@E~4s#vixXkdMt!*}Zcs4v}vCha*@3r$N znYrMRz8tnHzE=b@?{SGs3*908Q5ScjAGfL-rye(CIK8)62(2@Q zN3zfEUqrCm9Ixm`PHGi^vn{7@X&m42GIdqb6VrJ(hFg}jG!{q8J)GcO%o10GUliJY z01wgz>xeJ?I1cNHw0TFKEm?e+Qcu1)&lh0+_7Rrf7spV@N06P?J@3B9ZVlQGZS5z* zVQ}7GorupCm6Eqpmgoh)7rMUc=3OG&z1DW6qLetQ@I$eQkO*p_`qpZR6p}(X?rS5x z@^TYmvQ=>?E^|T=!YsBN*1{dK-x;8BEI*9Nhki!cQM=h*_H0`HG#TzF^OQ&Fsr{DD zG9N*hs-0ltuQT(SW_U-EWolb3y?XXFQ_Qb_ervRh;%$b3+F1`=f;bxE0>v9sTOlO?XdwU zT%@67OL$Q(!pRP0M?778!FB~PX1?qTJ@E-NEKfIS1tR!^;vcL>G*4miCyF2EfVu-ylhdZkulynpJZGm)`%&A_3%= zw_2cq0M+E;G0P1Rwlr3Js_oYpax)4XaaUrW-v5jw_^7#zRtT6D6ogr7%rszj=3b|- zxq)*t?7!^@uwCljQ+vKtI0t4df>c5cB|C}pmwCvpEBtgzkKz;%GIQP{HsI0uz4Xnv zYE@UZsU1@J76u0|)jBW1+15lk6vUb-{7p>O$jLlcYRZFzmS!_autB5Fb@2auZ{peA z&2pz*zvad@ZeDJMvIBOA5W7i?M~lIT7b%ru(L_0VZhAR{o~j_=i%h)?7D>Gl*_n${ zvEpF@YN`xgH@cn#M?l;t!@H^l7535tcc}K|ttp~3)5Y~Ultw3o9PL1>A7ybn!3?9F zcbhtGUMF`tV;5GY-nt?%Q{NpgUU{+ajV8XBRqaTD=fc}+oHG0CQ z(fr7=(ege|bYDdDdz7INLw=i00Dr0OF$e{QI?PMVgrH_zE;}qqFbT2wQPYfh0BhhH z^ERwN{u67F*iXjdVar_$Aw%-D70B)`KL72VM%sO6FzJ-}!9b}OOyM``HA^M|br@uM z74#^W?JXRfX%BK-l6~!RqVIsTXC&u1Xx-ZbhktbP5uz3QQYx8P^RYA)@?Lg{fR5ZM zZIi2_aS2q=RK-MxV5&sw?qXtCZ2dr3>4@HG4|j0qthZ=Rhyh}8YX$%TSKa}AxLKq{ zSck%;2JmXswQ0i72k4}Lr=v5ow5JjsCaOe>qmliH30ei)>{3*VfLYZ7oArD$=d0=2 zb-LP&;;IiM`$m5D)E1BSLJT}-WqT`V-!T|2GF+shijf#s0u9S+hx4=F$nWeyx9h`o z9GYg$9{NqbH>>cPKbmu7Cpak6sIVtniyyouVULk$HCnk=g6$L0?oe6>fw$eUHS)(Q zQbu~|i)ysTnj+;meGZIvSBnUoru;~EK9S-MKdOj&LSAFz5=Q)rk?y0Hq2v4bhUJ@r zJggdpnJR}|!ueZ}G{on&1u!_8N#`mb=&OAl>j5=_EFYyq)w5@MlFl0r>GV3WWV_XW-~RF54e#bsk2y{ga$}3b&9Wh3#s`feMbWS;9Hw*j zh^qOL7or7#+~<0&*j~SyYDR>Wtm{jjir9k3{`TYYs-6|FqxL~%;KCR_JwH+G6R-Iq zZoDo!WFxh2h;?(m(W;fdqD`MVV|=EZ**fI*OdTIL#;BsUie$FJ_xx1P*(SLnvs-WN z=_wqM;{{gaiOUg=DXy3AOQG+b{87;H8tZZQ&T%Wa6_s;0Y;zA|s7q;WpsMm&olQnn z+?%|Js*NJDxu(f!hv#~wC8p)xS6S7KhIRI>*sJS#A5ZRQ8HzEi%4ha;ri}Hh?O4cn zce@xj$-EXuHsgg4jaKS&t0PvB8MpW=6 z9Zr*F(p0Tbcie*(BSwUT+{`&|{Gbi#IQsL?h-&vqmnX@8p4q&L4-9bM#9zpJ>Pai~ zHA)3>N(x(GkCVjUt%*er$;npVCMb*qIN`fsVRYl01^aY+yRI69Xyph7{`MIh_vk>* z5EqMlT3d}fe)_gAHW!_`3lb=XZVbJ;-NajyR<|ehZKnrIEcMsD{a78ZIF zPHU>L+@2>y9>Y;Y5FNJTJ8wS>CIWTP^a5P44$`T5;0GVVEh&~f_s5CU0);@13rE~I zbkaBr#a;oxMw5zwC1>v329Ha!m`N+XhqrvST&l%hfV_DTsuK|~3$UU@Ffg9zq5mbv zepKI8C1o648s`Y^Q^xOUU+|{5kkA=%tx10E&4zNUAPX{O1$ucS+YKTe`*A$sZtmbGQK>;Qr$A6#CMq`5N7?A$9zQLJFN1bcKK99R*j{D?fj0-NZsp06y zJ74iau~j5k`gJvdb|yizCT2FN7VJ6~Y zv~GrXJ|JI<`{Fy)qeK~Djpd{Kg6{PS>;Js#`ml`m{EG7I(p|z!12b_X;q1yOjDh`? z`2?^vPuu1m${$tA#X@{+PssS)@!Aw?`*RTuJ2we~4swLzyFqUzyv%m~ZdK#4-AvFs z2g)v`m%A|fTh|JJas0XiKJp@>9W1g&CrSy^}YR?4D|<& z{4HDwXxzmvaX*|T*ol#P_mm+%q}umJZ?w0WU3PVwnl0t6)+2k?d)xy**!`t0Le-$S z7pVBKDdvIZzhvxdA1H4R*m7H7PzeLpaQhi4 zP_j|)# zWv@4M;z#C}0v?{Z^-QPC+6rz-Fo16FMr~>^9*+HQ>307Y0lEW)`(KHn^g8~!uahcs zT1F8@74J{~f(*fnu}v-R7T7~2ZE$^B>dJ)MNinxTQ7U*dXWh!Gy^(Ef7obyw@A+}@ zd~35#_yp7d#D4<>IDY?JP;IapsOcw7Vj88%Tz;4MQ2W^aKeFD!tE$Hf-z23(x}{U; z?rv$ROM`%PcXyZ61(c9(xO7N2Ttd3LyHnzKKHph0vu4eIK;E;@-tYT7UCwY9-Ty2m z-@2Hd&T`aFi!=opxthXuZ3hu@B(;ksy=7U){rByk;U+M|2A^k)VGfu2=#0Dh?YN1OcCa17;)(|3}WYyD9E+hsT(S&0T_Qp#3)a z<&Q_m?)$!i7}(?ClK%#)r}O`7)!rZZ)cebNg^w`F)r+G@h=-ZJ&?++*vIMIuP%cQ|_voD1uPJlbsiOo|aqdb(kZhn*^*0II?N(iH z68(fJyI2Z+c$Y8mKs6)o7*I6LPfyuRe=qwXV&E@{;$p@SjaV@pOM};O}+(jFxyD zj+Iw$5=A;H4RXPbo^>j`+l{jDI^3i4)R2}lttk#`yzRhAT2JF`ylveZD%Tp>mL z!P%OrwwqM)*C|UX4d>^tOpV3)&^Q1fu6!XSrcB5)&>TtjaD;TxeJ;epwn9yfxtWTR zG&5RF0Y_=>1XS#fGiDr;VU|WRcq(F?Btc%m531Gb%aLV`6!o8B-SJs>;xv2B+{G82 zV_>fPx+Ua)kjzLzEQ5T0>2&c?4*{~e84sGSrUcbb3I)u1gmz?nDJY%Y8hoYa;I*09 zQ0~G%R1iA+LwH1pf<_L%8R^y$(-0|BgpoW~n}X@geR^C;mHq+<@D-0{B&k&+MPv zRbQ)Q$iqgtQCMl8o-L?NX6AK(6HBPNu`@${4;70qi&|vyhKYWN@`SQ07sNAX1tP1< zN6l5}M@}CLc~fM0-n+u&OHKF@WJ~iw53or-rIP=yHH!OWj<3N*(Az(#Of~$H@4Inu z8rUT#8Y+X-GwcN~q|xbEvknuWqVlnG+kNIn8+!a!NAQ8Fm%ga>3&gMt}C+?X1^hE5zs#rsrF`(_4teWyVARX485N5_hHa1+rV;`tz2} z)!zZ`IRmk8+qNVe%h!m(4v}ub3O~uoUhiZtNS=jPrhG3~*Pn3{e9ujjxHy9M|8%}z z_j*LS;QqHYv%CE;`1T+L@rp`RfS{iq0WdYe=(m=~~wK~4*njY5GYQeHg; z-107RvczylI5bu?cEWkf945s@EMY-xI&02^n9?MJ-DC!NcBBlakC{L0AKUZvf~7+2#3#i0Q$DWu}q+Clo)_>CQFzxMfJiIUL%AbxsxD;wBvLr~IGJ0SA%$B~T z&+cuD!cVPv!5o8!Ip)Oln;i?*PJYhp&k->VZn0$??qAbXqqJ6kq`IBW)Q&ZwC7g{V zd{%S1gE+zoaWMxf38bkXzpJ|c-qF~OT!(q+&~V6phOkfK6#c%HvmcW^zQaoIS%ruU zkaYJCTd!OMTlhCWNd8Nap@xjap45D_##s96p2g$fUhS~8Ga+sfc z;0=Lp>EEW6N-q7lrbo6yK7}0~JF~BYBbf8qQN9hNca!%4`|KY*chcM3z8y0Dpegp} z-yE|46l#;nxm(0aHeP>!XHYUj04Jd%>TkC>^ zUExTFeM>7xG9}LrX}|9wJ&hgAVACdTN-LEY>z;{BKjxw3`FMug#0Qo?X^TDI1|zVRW!t-FP(@V;It}fY12u17#Z>Y_?bTm8#>>&G){U!mgEqs@y!w zzS)9}3rYIFZ3`&tHxvka;dvhO6uOPB-JHGT@c#xUJIalc{NHIwO(_* zG!=fpxp$DAZ?T#oB|*sVC*oF~%_78vkwR8fRc^>4le#{HWmIf;(dc5unMYsa4v9B~ zAIf2tG*b}bS?|Q@zEzVW9qWH6q_k?I;g#7d^R-E6%%_|86aX znT`JBdwclqQd!s*PwYje-3>>(Qq8x`l;dh&kziZW+p*FrUbu^fjV2h5Gj*kw%+rRj z7(@G&cg0jBeD<;U`)w@CGCz-7k1MP5hZ@@eEqE>5CL|!wx;+d_Z=Ko&+0zd{BQo>4qJJM#2S@S-oO?0B* z=y4WiSp1-zS&N=?*M5;l{5&UjVRggA+jF(v=7s0*d}$uEt4R;!kP2m9#I$lqBo|3T zuyqW}>?NihtR&`M@#UX&{M=`bto+^ImkQb-ChectfUP#WKe%nLMW3uH4K1(62Dgv0 ztp~4U#lejNAAENuttR|c_E!KsA(DQ!E5H>w6{(fBOvvLG-l!D`K6-!LHw}QV9``LP zo`?S7I~P-Tffn7oPDU}_yKcT^NM-mzMbjv_8t&rwQ`m-=bmQO5DaR*oY=+7?%A4;Q z#=q3oE9j* z&}li+dEDk7p0b-%OSXk@5Wk7no@;5B^Qq1_LJl$5;WJvWg(=hL``bKE**}3-wWPqz z^d1kSJaJW0X4cnePHofp4t8NW@~2SScY+op@avXTji(C|Z@OAzMb-JG^Mj^T^f}vouP=;zvNWV*B2y@ZcAqXl z=Jq-lJ4JDZl0gua60Ay7L{A~ijDo_R2%H(u_h~y?#yeOXFY9Cy{vkb4@NtO=L9MVb zNyup-D*%{3mpvCb251BS;GGk!0$Q$TLD@j*fIRsj#;4$cl7SV@pWkEw^E4KRTqHs7 zT$E}u_rHeUP{smh35|@DqjC(QdT4Uj)m15edY%F8q>is-c-NKOZ978hph?yu9^#Sj zPbwZN$mb6oc$3($WK%z>q6C0g<|gtekq&@&u4klRx+j-Q`-HRI((r3@F%{u_4HvfP zP6-Q{SW$N58)DnhHw14atwA}iPK6?J#UMHaaDQH?JNe`X#}PE~BT(T3_zyv-oSBzr zGTznXJJZYjrrr)p{jT^ov;QQ+!C_=Aik}I%0Gw8)ya>twO26bDs+LKMR7&*>&RO4i zMUa;^vn4tvL>1=k(f5IQ2kH+0j?>H*CsNO*yCJ|EWzkLN0@+2{G)KUKg)WpfoPy6V z>mNfv-_PF7y+)KoO8=743CU0un2)DCTZt+nkv4B-{`8lumO0kFJlt9xw+G@v>bP+Z zdcYt3#7YA6o=n=;+`160Tlw{?EVYFHW`nDKIq1-VQA^*OB`$-Zs-BD^$e215hLs zwlDt9i$v;;pUawA6Mk=u+aC8(DLpJ`V|Ric>S1YGhWofj&bm{tp+vPKB7dFF{?re= zeg_Vi)r^?XRGCWiMcW_B+<0Q;(JLTu$tvPgShvcN#UtJnN8h5_={{rXO!FPf%;9m~r_@xr1fWI`k~1MrzWQ6EiQ{1bp&Un?xU?E;>G z)qK8(j8nd=Fu#Sz8bntk%bw@Kftqb7T8XGZ)Ti5h?&iN3uSXwg3&J)fjsB%~IrDmZ z5FlDE_jkr(WCBca+`P!-{JG^ zJ<8`W=~?4~lpV8q^_WpaB$t_!$b%q4_G(!%SZ?h%dNfY91Nx~_aX8>V`{7-<+p(Lb zG2a-aVaCjTJvWp<>)>Y85g>RP=`7()w^oSU_c(`CEiY0)#kAkcXc%zPbrQ3Z>AJvQ(c7w2_K_UcCr#-JGYNx<*PcyYqb2PR4$or7 z#=$ov4}NG1k2Z+U9h4!c8XW3hNVOUaC%8N{%ZkC}el zmo3nv7h=zhUeN$5YL5M(8(9C-TC8#z>bz8@xKC|TsvlR0KN|210Zjjfu~G!IQRHe-Xt=WhFG=z&;#E< z`DMI(%l^Dm5TVI(d)k7)!&ChAwPqKMsgi(l^XntOiRIpH|+xE~=A z$$;-)@O9$tVcg!#Jc?_}<%s?GOH#~>t1YJIFC?GDlpfp%X3AIaJ4*sdrDU*s_;L#H z+*8%i;h7wH)H>W_%Gm!3_Hf6fOJFwM*a&@QDMZK1+it{iB_j#ZlSUr7t2eoN&9c;b zWBzjQ@q4q6LRY!`4TBzumiU)-E-iGIsK&%fwE8t~Yinn^W66DsP<8cW&>R zV=unIv!K`hckgvXA8N=#JvFTd<{tjpW1GL@b{yDQr?&IccE}Bgx+D}2pN9;CfSw>2 zWh+*71$nFi^u4|EG+M2K8Yp6^hX5eb=>v^*_6B?k-Y>FIHe&V&yD4{^MtVnlQs<$I zGJu@A0V~kP*bZTFKKWEYmpHVOVA0;jP0%AD-_rrdKWcu`$4Q3jPsF(qW(iPY=6YI_ zz3?*y`dF7hFesh{n8*5&T^sY!(Sp3DFIn_o4?`Y^vL()=OuXczC$8KZV(%DFS0?`L zA-bcPX%F_5T-m#=C<>KPLy6k$(T3tCcWlIg)cl&alcy3OhuXH8#iFu#c|(V;D|u%% z^bK7BD=?V}=lJBdvy6>o4BVW4&CGzePi^P<_mSw(S?!#zS%Pd#RvV)Xk@ z;A}6jD{i~`$=$uLtG4TH*gT~K@>hRT_`i>mz>$~~Z@e$Ny0hwC7M>tj)Th$i{Pz@m zT1|Ec0c8t*{)mx(|I!^gH${ijEq|MToL%q~j<*f_dT|`=zY9OFP0IU_qLsvbLSwkI#M2Jmp$XpXk)1k2j z=tE1h41e|O^Tjv#as0ugCqVl?*riNA)oL-RsU0>$&!#eQYnddmMJY8kJ#(C)2fkw< zyH!7=eyl-m{VTmXSjQpsaH&jMui23Z>TMX}4qgoJC?>0`Iep-&aYM5gWcE|@+H|5Sx|JH}P>)|dRy;K2bPAZ0CLZxwzAg}nRlX^ts zl$Lk1GN4M6#&>JFtyx&#j3#8H=a22w8jp$Z^P6(hTt)kUr2Ph&roQ_Xv;W$U;1;Okr*;Xu+D`2M<;&Lt+u%1TCr z+i7Z= z-UE3y3!=RT^35FMsDmiO)OixpnHIwNr;&vvyNww*8mPxR|O8SSH z;z8Tpu=+l&(KF-zs7X$v@(t6(8?^_xISKxZ3Dn}$SCHILCkq-)OdlKp-k1bc=LleRz8$p1=NcyD+B&FzSm<)Dheo;E%??fsJyoJQL_BrjaqsX;ft_7SM{-fs zdVv?WVN8PihhTx}9S<5KgI^}6L~MoLRBimECQ4RprN{gpwaROJa-$C-M#fxh1G$GT1H+U8!$M9R z$}K%p9t|>V?wy<>N8ge56U@Pl0!c4CU*VP-(yjFVh!Dq=;&K(-?*>SB}R zqc!ngQ*pNLhpy$Tldq>wvmy~wn``FbvL0}7vK)P%Ltp1Y+k92AN=1-fHn(TfCu*Ec zi<*chYWofQt7&AMiOt??{I)DZ5eai*EA241xD1yyEYZ*5{w0Vt`=e~&gY3-tNr;Dh zif8(@0Czusp6%jKm0&Pa*tHVJY60%ooY-)^h}j1cH1%+SfaRtBkq8U}j(1;ZCs_yU zJH59U35A8|AJG;DAMm9>CQKiD3}{8A9P7#9;Dj*ojxc!txm{el4hSTp_y-v#eOzSh zlO+@2Xcb}uHK1$E=jG4~>62oT;WMaab-cZ9TK{o6YAO)G7;d?gV^#(ufgCoPA}y7J zv?bfxXnTj8y~6;mj5zDH<9N=4LgJKi@``*w6#fwsE zDDaeXu$D`*ot0T8V{gq2{6*!t=gvoqP~5Df+l>%wL23Dw^m>Hd+7ZC(@Cf;nA)nJ!Q^kdPI!VCFvfP$TVnPA+RK9s9%_o0>^i zm*(EnDI#+gv`4-c6L!BI{M9XI-OC=1bf13G-J8%&wl!5?(%TxQKB$CmCKf;`Sn}~k z7F{c5^2e^BB`1y68CA}E`C?`yA9dIWk&_OF&%CH5wqh_3?D#Ef{?Vzaq9CMirnBVI ztwJ6$)ETI)+!u>=)$fO$1h7b z>qWjQmrgKv3r_v24cqfJ?6ukEpq?>Qcq4%TlAiK;df=Z*v)W(XNczDR@(o4QF zf62{J&juh?p)36JD-*4=g&%U8;WO9&js}$YA9cG{8hwR9{=yJDJ%{pR@zaK-BXe(3 z>r?;7##lQ$T6w{BM6h-asnn{pn~-h!9=|ds@aTOmee=clXge?Ix?2C=05f4!_XHOG zH#0%|GxPWJuFa_4ef_~wgApoQz-FOQG&-7{)`6l}wpr+&?tiWf?Ow`nch~b4ZEse54nSO3!Coq z4{k7zSSRwd(7R}h->G@#VMq^pC$@9~VNB1A91@&V@^jfOFlx|_&cB~OJbt4S`4Io` zQ;7M@TmI|5DYdRxhiV+4OUVw~tpb$yiMqylDET+#LznEjI<<|aO5|Q{OnRpMlw0Bw z^;S|?KI$dpRjbuJfa}C}%q=(nt^M7emZiUGAq#f%x>%jog%Y`=Zl&rHjy@~(Z@QJe zl)xqA83%-sILI=7;PD+0S>qwjJLUnpg|WxQim52bor%a$x6l?Ay@8lSsX*JnN#gG~ z5_QUY`If47xW}=rYtHB$ac-FwSzeH6_Bi42R;K(`mEpq z{8f@KfPM+$%RB)r2d8;6*BTJ2)KWi1mdXPQrqK**uB^WlkW&{})_QXuW{< zh}v~k9t-DpVDPyI0Ss-Z2T}hW`m}CDH9(}Je9(WO+H-ZXD?kH?{H)pFC*iHWm8Voz zAxRV!WW({%KJ`$}Ae!ts_5n2^QnKKa8{E)v5cLpX^Vz`JV+1^{T=Z=848=KKs*#;E z4>wo$xWJSGo_3h$>{7?}!G5v?v7ktY@B+8S-RvV)u`WwGUnC|tG!*FLo!F>nw$L;3 zsbbit0UCUC#ij4jwdzZukSE+ndnG593zk^1amyB|2Rp_4Koun}xaH*j{ER?0*|^!* z5A>K82-G+uSm20p0t#Odj6|q3+)#*y7c)qijpnyy9rq-?@PBiqG0V@9a32e*tNZ%y zl(YDytko?|BLPsD#p{{ZdpnXK?O2Sj&}pn>yoA7X7{E&uwHp#qCtQn-V;mJ9R9yE& z#`_bpW=`7ivN}N}G)+zn<0hpycw~md10=z$BFR5Q-?2E=# zi~cjG!5!?{vFN!sd=weLQ0!)3!^_ADn%JZgc=$_SLP}RTJC@V8&Ezl; z_rOIE8hHsj5ky_OITm`^8}^NRON$sqJ(zPPW)?IFE^M@N2;1$ZyByhDChM5Z^}NZz zFufjZ%=`C+zDN`RIz!_K--a-Y)cmuZsT#$1fr?;CgZmecP447IBD>Q3@7$!C_PVpPH<;xgHUkWMBmA$NK0a=!owPX+kojz)As?!Q7^w*O zdQWZ4V6&<%t0jkNfwH$hIgl>yKOj?7FRZ*@ze2v8DYkeFw`G;O|4voGhz{`8ya);N zpU9buuH3ovjBRjwmH_gYx~ZXBXxCMcDcTTWc}m0wLpLYn1G#WL^$MX(T{JLKsZCts zQ_7oIS?fE^KfqF%?`$=V>31eRU#tZ9ag(XVzL!6KqU2TN2R%w6O4DP}2kO4lsTZ0I z3keU{R*VU`P+sPr4}Li5*WR`ZYcYYfATQ6a?G0%5VJ5~@`$_%yhxws9P6pP#Q7a6X ztF&oaUre^#aykp16vGJ=KiSKXG2{FJ$H|k)SwT~IzavAN3|Ej6^tr#60ejaLlvf?B zi&%BP%sXXA_lCHYZCC6m}CLxoB=Zcr!V zlcjZ~q=5q7XW}oLXXl|aD^ls4`HATS2_5~0@)z^Jo8U0VMyMdxi$${A=E{UeTS z8#n*<))~D;2S_nsD%aSq;P>wW{j7@lK=lwsI7jrqEhnVLzUWq+&eUu`+s=lgt6!9W zGXE*l<3n^Tn2|VX8O%*n+&qeJZKUFDu>CZnYZv#;M;Vv}Dm~(&(4i_9!88wM0nO2pV!BKk2ox;&Vb;-8o6ht42pKgRvP%Uwt>hCCQY(E1$X7MfG zw9OHAY^*992ShAw|A2vU2;hf%6}F0&i-?92b1P4UOAmzC9T5Y7P5QSNtB;-MY-Fzw zc+Y#}hFB!{fciVw$nQ?R#$XZxq*{o*eusQSZil>iEcWnR~T-L$Sb>J6?LS+4o&)EY{>buk1S9C4CN1M zj{m$bbo?JMY9DakgQ}>Z0Emm3CZHOUsmnN`uMlE^J{tEs6N)^*50Dbm4h3}c4y3XK zD2u^f6(BR)UT@**Q;lY&Xv|D=1KGfFKcaa9mzUC7k`WG_=$$BREa+h@pLWi#YAEN_ z$^o8z=u*Wt@LI!>@A`*?x!ColxhDR)V!M`P5dyJYUSpWEVgq)N1EDz;ywNaO5dG(o zi0eeI%yJQ%ngs|UHT3XMsnhp0s?b1ewVN_%mv(tcwYddIJz?ibX@M{e?8Fsq@N4(2 zCw&L&+q9ICHzv~}3&!xa^pt;${O5z&XWYZ8>)-Mj9lDAw{QSU6Z!B5G``P2J>yOa8 zM}UH~Asj=6wVX{2p$CYYf}*}3O@t4JwC8`Qd;O4#o~9O*yhZG}3eI9KGpbY3M*i!} z_(3LDpel3nt0#U0GLy$=6l~D=(BI}^Uo-nkiKDNDpymSQ5*J=I^qdpqOI(b23~6f_ z?3L9_Og#M9g>>YgUD!>4d-MU{5(jf9=I;ds>~6hjZhB-q4^sza2iz!p4?JL&5ALTP zQrJ1zr@F9~EXb#!HAVQC?DMoA4(Pk7*Pj?paD+B&FR_fY{?VvJF%^@dnY6Sdb`2vQ z=c7PLOi-I-zmJRcQ5 zSfc77skbo#f)rK0uSgLz4$b=r(X3qgo=R$Td?|?eR~LbvV#TGG8Hu~%b&tq83_lL8 zhRn+yy!s?W^3pe4YLJ6sw2XmK4M9RNQnpK)LF&y=UbRU-`eN*6nmPF~z2CWS8kNRh z_zReXHdo(S9iJyma5Jsb?_Ixvwf<)nNx3fwCw`fj7EvMXz3*yvFRxvbhvrW*U7w%k z9Vi7^@eac#A115)VUmxav9%LJ_gx)Hn9mhFXzN4Debr<>q94xnf{j`U2F}wZR&7ap zPoovrp5I-JDR=Qj^i@gJ?>6~+slELcHh?H1BZ`lwVtW{k=j4z**C`}iAWPbN>sJl6KdL8U7yw})Km z*1elkV2V3B#h=5xU%8k(03!z7t%fPmAbOAUo*-o6Uh>(v3M7QWquJ6hI^OPc4ts<}1|U8!f0BTcZD;EmXn)=Y zFQ`SuBT3Aq$N8M>SSUY-$Uu36ge!@;k<0O$&0R*YsJs7Ei&~Ki{n1;^@^S~Tb z>5*=>gbW3mFskG0Ea*_~f+A8>bA;)SrU15l8PI<@ge>p+r*9;$A2v>`1&sx`eZvC} z65WlJI4hg$t8YDhoOgv&v+I{|s!&+cVMIxqo(0S!x9l~->kGNf*;s+qg(N}F(UV)c zKu9BcscgL0IagQZb~x)u#6g=IyRq~Z9KBole$7JrBT=ZH4#a>Xa{=DXPBgvz7croDfFY}J-U+Xj+gRSAgKk&vL312l(ga*Io@{W z->LGpDkqe)Q!9vh%_pjvmHeyba(m4v&~QB%M3d7;iF2LLr6LvBauK^bDQqgA=d4m70^UU7y3i;0h{Fw40CbWAllRXzeoWpT>tHKVqBSS! zEEQVQg68bb>>Kx2dWb%GGFFPhs)6Zz91~C|9G1Jfhl75S`DFvLCoxbi$8E$i_MZqX zxpOS1d3YWU5c$NzM4h(B?s*=(RIPjdssmsafLCFt&l!ja?S^G&lp|Emq+1Zrgwi5=D`dwC8xCH}Wm2;C)r8U-RluUjN4C!78x8!l4OvmpGWDaI<+&<^LB~8i$qcb*?e>f*xsBna48mevtE4-7=Qpv;SDY zCH3E7kSBDvTKFEIg9GP5lSf9@vZwtV?EeNV8&GyYEqQM~X0KEghDOcSoVnt&Tv3gG6pfa68zFXkwKdtZMKll?`{u1x7oUtc3Ry)>}n!(=$Jy8%6KZ3U9N;J`kc8>-glMG zuB+g~cTzlsz5MiqhrM{%nzm0T{EM;C77vbYfQdSn2p$*?wE_0;}k zh;M^ni8wQm7d$AWM)^0!F)K<61uBU&m6%_3+@|+)W0EWZl52aYN2^ddMD*3KoLwc* z-BN>1BKQRh_aFxHSL~7@flHP`h(+-?pEy6PfC>LTb$)MOFfGm3S?P#KWY6>+m;7Zq zK2Ls~WZ!qq-7KS6?vvw=3U@)ti|`^kl*lZx12q`g{k`kY$aB(y-IS9!03{O+3Llfd zo9eOzq2aOU#XX||j5QS~MaTr9sr20|B}bAxAn4aThOSBbIQW2v(ap_gP#)%b2Xa~P{ zQJokcJ%LX%|6=cSFXHj35}(&ALSR5hzz@N#nR}OAJq(kqC#GTOEW^(sStBn#mI(fB zAD!>dM;FQ)kLQ~qIc*3L8mv6fpaFUXBXt%!+k@^Z(lQk#mTUy;7hSaTFnl8Q^S z^Ld^-t=tbIUA`1|Mg%-3i2g2Y|3JAZ;(2pG~K7V~**_WaxC z1;?CMWkf&)IaP9RU-)iMh{x9T`ah19?Pt}$dMFd4#s#hfT`b)O*aNjWmrCJ#%))G8 z_F|73I3Lwte&jwW_*#%D9;Lq=Cu8w~-m5ouw%V(kr0ru|8wbUrg+l5rIr^8V%Q#8c zfufq~X%+wy6Z$>wP=V%5Phy-ygpiiWwi7q=CDch@h1j_%bz@Y8#dxd6Y1H5QU2#q` zyvOqa;rKI1snZ26qQe)a$!`}X-uD>u&ew_ly9is{IF7L6glm{jGwBpG>7u2$1MzK7 zF`ak|QZ>ue_<5}%kwL?>Lskdo*(YgZE-Nr)mD$l&C2$>bL_RGor)sL&eb%T+g6|E+ z`LVC8)m2G>IcZmV#TM4_RP(ZUwTD0+4w)Dn-=}ovAs@az@^D}x&rZdXJ7WzjC#JUY zlLBS)Yr@|jS$cBybrn;~8&I>ubpS{lKc6I^=yr{;i+d`-XO2)Wm8yc<6+nX&)XR@d z!YI}UqU@RF#^p|@@5+qAX)*d-%d1!61Zpaki&Hnq&_W~Qrjz6Hsz`=$NvjY8@Cm`P zCe5JX6z0b0)o2H4rq508!NbPM5h;Alc+bUJrOK&6&H04GXbCzfS@^t`al?iseB>!S*>SN$&OopnIEPsM1vfB zuc22wNP{XJi8zF$OkF|%3}tPHlA(!afJ!E=1w+J{{PoGlXfSa)0y1nz8l305NwfvG zZpj*Z{;_xVZ9nyYKgtNjJ+y)%^cXDg@qu&Dp7qDvdQ#Lu{CEWcU7%uPFz2Y>H0ihu z(4an*uS=stAG6M$dx&gbR!Fb*U`$$ITweX{wdS+2_ivv<*Ado3w?o%(p@1@2Uxs1) zE;hKB8|@w{0OvMGQmMJ7)VQG^FRs+^O7xT2KGnm1%mu6UKb;8AJ14zmTxgg7Y2gcTkq13u2cJ3KTn9k+^n!DH687N&1_V#+qa7Y{i&(=aRhS3NoHGDMC_eTTD4H7{8ra$2B{VQb+KMkers~f@+u_ul@mKlyC zN$$PwH@zwkVG=-)HnISQWG=J*sZ<)r+H{*QBua!i!Mmsw=PhoG5^&23KLT_*^PJJp zdRLOgHB>@^3p*a+i`(L^@DH;1#2rpVMSk2926ywlSo z`fqj$+P&ef)_w_1+%+HkQ(+3c1t2BdZ1U^(4kN{HT(bIMcK(~T@jM(WrmfA?V%pLk zr%(t6FbC?aozE2qh1%KpiOh>vwA2*;<3|Az*BRLRk&^8|JGvj{tE?SlXl1rB&P2N%DUMJv64bt%mCVbSqF4 zX!*>TN(*r)3iLYOoqF4t@#=#IaJ$0^(8?l}?k}ahR2b!7psNmc{sPKwELO{NAnYHK z`>0%Z-y~npUw2=8S|%I)^Q)p_!DfrOO+%Z=uX+tyRT^^z=C4h2!zsIc{a+s8$7{`9 z;_6KSXh9<-m&Hsox5Nr+_dFbs*wPdC>KE*Kh;tRTtb%>KHAAa)6W-TxuvNg~v93YS z??q|2-Ha-9k9P zO|x3YTMg&vxq5h2jPi^=goa~SPg1go6t7&cepAu57f7APQ@5P(Mp zygX$CGbYN>gkPV2kW_*du-yU5ket>X8bZ)yf|+|RqxcPXG{uawEk6a2A=fgH^JZsM z1=dmHY!V#iZHm~wQ*|pHeF1o2`VYIkm7n1X{|RW4Ywzolc82e!>ggeZuN&+dJ*wZQ z4LwF~GD#`zQM$?EQ59cdv1cdzID0SU`aRdP76rrqQ1T$-WKd@CHZtmiY+xsETl)%4 zi@vcGOmKei2Kg3!Bje3qTB-e%#N7^Y5yxwHyz2i>Z8mAyyT_Tl#_dpn z)Br@ht1s?`1%o+0EMyU0b}c}c3Tl-r;W->>H18T9|9#Jh@Y6Rc74?#kuB)ji{B$am zp=2zB97J_4Vd$){DIE{pzu&e+z*UZ#$3#6ZLW+6W;$aA$`Dq}UHWZ!70$bd!Q{ot} z`c=ady(kJ9D*P{La~3aTqZ@D;|^rF}>8A~}GJ=)bob;I;;X z(^`lt{;LwW>hFD9lmPXc`A$D#`zcWLmnfn)BD^xCeZg%#muqbkHv8g+fb)iZ1y-6x zS+UVM3D>q}6S?Bek#O{W-*GqHDSi(k5AK1d&0DEg9$pI#&wgjSDo_Y+*y`wfMgI7u z7mGhV4%y9c?5OoK!-w7opOMS3OiLln?9fjQXY2l_+YeVz(QeJQuqwR>V|x|Z#-rtK zwdOmSJE_#1tl}{6h*n=!O^hqI~8`%~MoG7;Q=MJFS*fCIJ@9U6h~tUYL^WZIhUg=fPo#h z4QL!$E1o2DSMfs|`ykM;&3~7NImGqf5uQ2V|zF2#I`%5qUnRE>KOgT(a z{>PK@v|7Ug9hm6`+hgnlwjMs+)~N^^Z08l|l0}95Q<~fr0L?Ft@JjmC7KEdma4m-O z)1F9eJAoKl`}{-5FzVn;h&z6;r<#FyvAr;9=vub(h4yaM=MN1RPtz^{x!LNlPWPSl zJZOQXRP%Rq)sM(qan(rMk;h)Wi8Xte43;*qIG$-H!X^kW*&*~q0^u$lZHSv@emf2eTpceS&K`ZA80$C>SyAvCjQvbt+)?O^m!jbM zxYtw|#9!>aJn&-a6d?5dv_?5{{B~zSTkPT1HGjyNOfp#f()XbRx3?ghF?zZ54DqhS zXP0!8SMB|^mYYg#H9nD#)u0y3{d`MPy+U^McwOB^X-trhJhHbviF5%mT7KDf&F+@6 z+3j90?W)4W54REl}g32Zbvzpw@O^juim7&t`nEO?MRgZIdk0l9$KwO_Pb+#BFus&FJIDero;yeqnKDgte-} z!?g;YtE~qC42yT`p^L=!F4=+0_@2wb&dgw)>ixK>OP@-|mD-f?G6tOgs~LhlMg3pPPZ!y~+JV2R&%*R%CV`h&qVb z$C7m>E~wZejIJ{>6?28o{eJEQkTwm*4}X~FUv9jojw=f9e*$5a%;^z9Z*!popcS{3 zC?bF1b<}P8Fgi~T?4>3QUih>9@8~^~PY(L`FQ#TK`opF3Mo}h=)ULnWa1+#whclw+ z>6UUje`+5c`XBA!|HVk@_d23O?d(8YxbyHo$U<+tagX^Nv7(Q)znckj%e6m@Tzekw z?$dVf|C&!R+zGscGxXh-)>r>G1$o}J$nL5(3>g2palOQ==4}S^Sd66RErZ^3^seOQ z1`{>@{!8A(v#BtH&{7C7H$z(H0RhO+%Ns-m<+QiLwj3|DG~%qax5MKD#saVlhP#|W zSt}MpbEW!;4xfrK-~usnQJ!`OZSqliJ-IiWeb8;-lI!7wbB1#Qw`2nEa?k2jCj9e- zc4$F>W;(N&G$x)4IEl41noT;c5(kaD&ucGXH`!$wLBX`9YIe!Gs&@O8@`Awr%blqr zft*?5IXdghRXumva-K=^SPB#|&}N~s;8;glW0@i||28CEXdb{vxL7q|XN>zD%em#R z)r_OUbY>?F#AyG=%J|zKEbZqGd#HXiv0RU5U97AN+hD$OWS$LZ>NO{LD*g{oXBpI1 z+ji~ZR@~i-1uyOn#ft^^;$GaXxD^OR3dP;si%TeO#ogVZ$hYtJnfds|49t*(WMAh# z*ILK2+Ht>%oCXJ{@YHG!}g7D7@7bDhO zOU4|ndEa)a$(dlGnHaICAogrKS!r{Uj_7;~u~_T(cFOn@Hy=fRgR6oSEs>d<8fnTz zv}geTWWAS8rZfXXsoS@f{|AQ;(^uXS4}xl^(oYZCUwvrexV zIaR2g?)!A!tD4w_PQpgQ1Ma*7S5MyzapsAVvx_@W2*J1FXSlg}&Nd0KL;TYo7CVw8n& z=dCcXE8&3&&?Y+6?5@Uv7!u{_w>kwMrS{0%PZkatzprY_=%jfpOr*XuxPD_E$XTN2 ze&;cgU1De-F>=DVz)LLvLs5Lg&HyUb5jbVC9-tB3EgNGB29i3+83(B+Gv>0-N^Bi% zTPEv7G_Sib=EOLiifAzV5HJiii~~Uh^g_~JpJ3W2#)J@fKA=(_+){sU4toCI&AhUP z_cA}cyeQ|j5NO<;^2Lc|VNmbn&`ta}V z!PoCzZoMZSPKaJI(`a;`oqV7+1__uzsi`q3{W|OMRExfC z6kC>B$6O7>hw8gL_%m$iW>iNkx+QG2#hxOBFf1%Cc$5K&hv`>b-?yD36@p?uXt zd7;1PyG;F2)ZqEtUrJms>|8CI~Em3`keMHjhQZoV~_s)&(>TvIC!NRqYz(IG>h zcao$t*h^U`5zkotp8GLBk$M8|EaH@C^|=!j?9x6`rhpov=j6n-V9kWww7S1a?zIS3 ztH(#$k4a0TC(jB}xtCxS*~_)e`I=vv>vLRPz#pmbnC`r)-x!_r9Tcj^u84eFA`$FVN zw=+fQ-s~?0LJ&|V_9eFr zvNQnAdOhB?&7RtayyD!FTa}$p8lBWx7n?^nNcC0H9z8$)#ybz|E!3tfcW^z~?EBpi z59@dM*J*Rd+%q~Z#aN+XQGOt`__v&)lwaib+3|a^x#Ht8MKvv>pzo4%5q)r`P5la6 zDoZsNJ+%2_HZJ%?JG9xmDjvs^tA&FnDg4q5VbD-&*-~G4{=UDyv>gDA;qijY=xKrv zYdr~IdBPldvODwJ;in9ZUF9m&&N28ksZrFpeEL-hWS&qQ!zS^9xr<4_cGlyM50$B0 zfa9W2q80Hh?26NNIo6pF{Hnu1Z!DGd^rzq_@wG1&#Eyl4+>)YtbPTQ6C2m6>?yI>) ztM*luAPW2xplMiHw2~#mgjCb(>8RH#eXqbPKKt2-yvk}Tq^BTMHg{K+U0syIklByJvQe-13NmLc^&MUTo$4nUs<_*VrE> zq85kujf#Jq|6IxJiBs>fJIeJ~Goj;yHv<)X+3IGrF7L6^5S@}IZ$ z?F}=)H4SGZIA97rhn|C4`u8U}($d~!M}$HgfgYq=88cXF<9zD294@9PU2~fUE&j;K zX^<&*Gx$}8h$+_=B>bZm{kg#Ry;s?2wAMm134=mDlU|N$RAw^+oU>WP;^9xK(_ek0 z<4m~^x;X$YD6TxQ+P176*PZ_b2QR*FAD0f*6eKil51wvnrukn8zH^LLG|r~?@n34} z{KZDFqX2iyw4-=YMLn!r`P`>}kJ!OG^X{^R+0fS5JNB&eR$sk-@8d36i&t43wTaTF zXZVx2;(wM)0sAF@j{-lz%&2Fn9K`-1{lIh7%0;vp3bsaCfnKdS4zPjYWH4*6kb=M53k*?c&8D*Q@%zH z|Eidd`^s33eCeNy!l8vOU(2thNeNV#K0KuCWZ&zHOgX>^B)oNgx+et2#9u3m%_VQR zrjKvZ=X3RdTd(n`Ui0Ts@-f8x=Un}>ZdSknzv%rR)h)h2AAI(XJG|_Gv*L$c4KeI4 zx+azhF>{1H+t-O8fkqtNs!jfZx-ZJIy#Mo1N&jyPri+dYY$RV_Cm=i5}Pi(cr&1`q=5 zA!QehSukp7@_h;~zKkhXMFj=Er0x%V+r3T8>5b_Qq{#7lQXCdp42?DKEa~D8Cn?NJ zhAYwJ%Sdl-%-`^$1a@Y*M<+zgs-=`UXc~;7OA&atedC#Kr>ZLLsaiQ#FAn8q0&dkj zAz4W~0Fbl6Vrq10E_UpvGVDO(M-T(v{*CPDFTRhg>=0X1-3o~-*nEe%95kK@!F;fl zJ?*LXuVzl473+G*+KS^p8kUhcpj4(b8H{oqZ zK9gDY=sk=N$~0gqkK0xBA5L|2TKQl`m zZi!d-@jr{0UY@=-826@N7gwFZ!3}@;rggjxOxOioI8*Ry6A*AR~9LQ!L4NaK~EP}U?s*8v;DGvZx7D274 zsYR=y%DWXbS}X%I*{{kZG@0D90+pWw>-G}c3}1-%DWAj5`o{=plwWE+oT9?Ko8FB; z%h<~-8_Z1UC~ma@ z?R8s3Twg>U`r(gYhtQl#ugtchIji`yaV*8K48xzp>Mzlv{q*{o^a_;uk=wpplOBqM z%yW;J<*0IBJPAnlGSsGZqNn3={O+p7;-Yo|=ssW1fIsdDnUb^XDxEf&$M`W88TmUt zCqn*Kq2ARY(7+5+k>C;>7*IgR4ir5|2(aS*0JCfVbd!B?jCGTeSma5Gut$mbR$%W5Ze?jy zkJCj-GN|33E2>|A(Ne9+MtsZF^txk+5{YTfz$Al84qH@tanBsl*UZpNRlLSsM%pX( z6unn<&&tHoqzJ#-{qTcE8J1cKsU9F2v8Y7=N8wB>au!r-@iR7&ZWXTIRbzl`mK(8* zv0D?hCME;F&S}UOIuY9TP5Z zq~eC9#FI5RoDUQS+{s)bzO5;W{my*5YLoWK^iw7h6^y|Qe1w~3hsAwSpVf<04kk_1 zbdng~)AKuC2#lL*Qt}Ht2L)s&hZomzU3fWAbMgL|MSq%cp1{yB_onCN4X5^~LdNxU z>PsD>>_3BRPs&P$?*_9!Q&exP$i;88SNoxD4%C)aD^YjJk_Q$M6I&k2v&r}BzukN& z6Dl{^??e&vIzocI%*W}&&cs8}!St1uM(TksAnX+|W(oTXLGH%3y>ER8T?14jlY#Z>>nVRmLvwy^9f39<->WpU!`mE8DUE2oCXC!Tmzwuh`CmNI z_Sl_d=I&%au1`lDUSBUhZW!6Oc93iAf0--{c!TaSW2<3BDwko(qzzDM{oHnXJ!7~i ziILeb;hpD`?x|w>L~$YCaPi5)x!;U<%lfS*U!{U+QO+h@y`>tx$es_+$tK83fe}ZL zORaPEefJgzo%`-DkM<`JflmMJeoy`f#Jwn*g7Y$oXNVb{1CvzUlI&#_K~%glG21s^ z7kDMky8~fidQ65K@~RlqCTFV1km~ z!8BmK(aJ{{?smIq?K1Qs2FYOhc>}VCnT99!^@M}~irW31U;1OoYc6EqHigPu@;2^5 zS)Q0t%b!N$Nor7@o~%B!hG~`XQNw+hw47kwRilMm^xv2cr=OP|1y#Y_PTxvme1+_s zsxa?wk$yA`qxh>kI9&I=oib5}s0jLj*x?^)@bLd4VWs?bP3em_u_ci2t|e1Q^idYz z;6$)-DG}X1;e|+cVi8lm_cZnm>;Gr&TuRxkrDLxt#q39#yz!Yb0r~dj(hui{+(d~l z9vq0__m{8D;Ode#E$c4p@HG-IIrh|`dD=aP1`+C(Fa4fOG`r}8vOjRMxR)}2WgT;n zbc!$4h%~3xG=2g?JTKGU_W$}h;qMEh!?jM7k^t>gyDm;i*GTi;GUn*jsubr^vB4rY z@Nt=!Q5ccc-(Vs6?Z?wIw|DvShRan;KEa$*b6Gy2z;YDBB9!nY|9IUoe^ymxeh+}(_y(9hTj=w}?X@(2|NMQfr<>?e0*!)i(^4RCt6 zjbg;AvHbHZvL|i7F%;o}`S7W87VHc7UD$spYbg7v;16EMUBWDPtg)Z|vwf%Fw&BL& zRvjaMC08H!fSu9V_+a{>I4m2s4*lYKkVNWumDaj_yg|Z$eh^LDF1yKhR-n~NvdCb~ zHSNiAJh#UR*u}>5AMd6LB;a=T`Ik^_f)$HpOvKZT$qNg&g=N0Y9 z2|n5i?7MRyP+5LD*9y{lO9eu$+EVk)1hcIj9Fazsr2AGxG7~SjHF|YmQ-NHsx6b;5 zRtx1b1#E~0!0V408ev+Vtj|(#mpji%9tK1gex}rc(1M5?lAAGSl1a$NdtrOjcrm3lVY(rmGLVOMj)P51UN zz{YCjn|g)$4L@seLxSkOZt=a0OSY3_O|}N4l?}$L^9iJx+$Nj(D1O|b#cJzk(yD%& zgm{~NJa?<@<|A(iEekB|n)dM(tJ<>6^1HzB+o@hl;0t)8$@V*AXnER7_PT8>_j-L~ za6WBifdAh8)a&MTI#BL)T4+b3&j_SFHe?Y8cr#=SRsRcNcIvE#?FMd|X+DaT_5@A; zXX5MjIp%qO_3ZAg4!m6w3U1{rGZ-O~sIv6SD9(9u0p{kv%wV14?u)_emb;@F9Ffa|Wtzkd6c?7+^bz)iND$(=eX^#nm!d6M#a}Th z-#N2NUd~$jWG_@pe$@x7yg2n-wV<$&@u|9yH`PiyvxWeD4F=;LZIz7`uZ(NrD`~*> z{@*ynm%7OZbgw(rGie=I*tkAT!rB_T{)@uDz}w?#DC(vpSc} z5<39uKJQ%M9A%(v8n+LdxgvVqtoz0c7E-&PvBJfnK5<0WB?<6N?w#q`Xj*|Q_UR$x z+7ffp?#R)#kQO`|5vEq)mumuB`dXvCuL!P>9{m=?G=iTuwF#oH$Q?cxg-cHD$yPvb z#5Y~xw%TWEx7SX+Hp1XQ>6?ti$ajG3Z06G2PVbq-q0+U&}HfuGu87DXMhq$UBE0s zBZAv@C60M<%Q=2EDiDn4p!a>*)g;ELOc=#D6L`XO1ZCrHnPONNHKD z!3rZ4hVp>+g*W+R0B!Q?C#om=Gh1oF7dKkov^R zr76;>nnLt!@8E+LcQt#zwtLK&?v|0hu=B3x=8~Uw()+pUV{4soAFOb%Na{8yw!->X zz!s^+G~FVUm~RL97h`w*=`)HCE1UGsVse<9QKO&y>OrJdZhsz*%rU7XfelsSoJRm^ zLgy8}-@#B$Z&H2pc2dOoP;=J{y@CO8#$IrDU-_c9WpM{_4U+(lrFrNg)GxBwW9j6*V25Z~NK*!lh5!eE*tT=TeFV zUK7ffHBi;_U{*zmMwY9}*?M9tm33Rh&qszwTa`Xx_(pH&lI4#lVV3dUBVRP#;46L? z0bnJc2(1w;BF2(X`#G-omnd$9{#6iA;=3?r*}O}ZfsFBm60pJ_?2Q{NT0Kw$@G6kF zWZ7I(??O*E2vzJk!Z`115rO(`6moU6jH@r=*q;&P%1CKx_xEFQ3XBwt5=!16KQ~yd zz=R=w;~hYdTGGK zLC{ypXyC76bwl=3=FXsV@fr)_+r$8D7A5+TRN;3Wm1|ucF59jgRZ}89`$0oF(ww~1 zB#uZdxh6K$Z;4ZoN4!@r{~!bAeBaE7*e?neP zOyx+(q6M8yw7#j~5bN)cpc3Fg zRIingAK~hoSywlCoV}cT=OwLQ{d36rJ~Dkx2jLK*xj|44)^sXNmCm5~E64ma%541K4?WOt;opx6Id^ z3y|`42&Oz;U`0IR^Yz7VklU!;b9Y>N zgO;)igZTwd4^k}%dpa9eHqlhiIYrZu%_T|$( zk70G14PzyBGk_bNo?KdlP#G*}RM65b+`_K|S&i0g#7#YtNT6D~i50ZZrB^;%Iw8SR zcHX5>suhQ?dF^f2DshY5>#A}*Ugjbn7f1pTOGtBhO5*m~xde*v&W(EO*~OyD*+s+C zjD0ECJ8#|_d2KRnN{~Rhfu1$M!vymKh`~YAK7s<-0U+7`FOj5t+r%{Mmc)j=9RAj^6_RY|ic#1O-+~hZnfqdJ8-vlx+41aWV zbDLpOstX%~S`Pw|p>b-$-c_;|@Hk?kpbzeZ}k)&gEi;e#!U}=#@>X3>&pdf_F;YHFVo6B*Cu`@oKuW8?dSPM|qgZT%zdRnq=y~gSMP^7}Sa`-D= z>F#%F0>Ceir+;Lmjd}AB>kuG(WaN^UtPb)&m_npvsQmP|)qM4Hq?M~aJd9xk$*C9o zzKYDy4C5)F_0EI+Q@q!21d#i`bRoMOC3Hzc_++R|tFTHlwZ!PapEX`DCziA$?A=#^ zIzKc}_0k+bsc@=O@tfr19Ldcf_`}yz&1-b0jA7!~2(2;gY_i1^Vjt!ON$0Fq{ z4ERH6VW+0of&!lw#5O`Hy^)Pz9OeHgNcb2D;(Q*HS5g+&R%w$?_4R4(75h!v^=br^ z92uUGZlUFvP_`g>_lzuPnLIwptNsW%-OR*|3wq{%_##KeA%<8i<^i}4U-EG-k0As> zlUH6|yAdd$Vm=oCFbyA61c+0tn~b(Gic-?u1xsX5p@_~24v{X!(7`o6(0eliSHy3n zK&H!~j;4_}lTnkEIF-+>zK1f3GWOC2f*lEcn#Rt1-LONrE2?;6`Byz$oiie#vBCF) z27*m->Jmu?l^rz`2$}UTESKESx_+y>Cp7UOx0+`U=%2Lx@_%1@+R1uju}uSY;5vG# z6S}5t4uK60q1Z2ptmY;kl6Rnd+@5>-_lD<(wv?WF->tabe9zyaC`1$+J+&OF41IIf z1AMipvSOYSC$n>FR&ctoD0Xv^tre#o{_=#;cqr0ar|11A=Nqe@8^C@5d@WY3vWeB> zT566a0vaK%6SZFf;xz3z69(Q9Pj>EZESHs#C8Y{@+`}wN_gh9BD=HM_6DapONkFeG zw7+OXM7yqyfb#LNcr)=J#PI%n$bbEX>V#W(c0F@)l2dyrt{6er;qhTIO)PQ}&sg|1 zorQ?9e9(N~b7Msu{{z|nCTZd0!)-j`_&wT)-*GGb9oDg9CJGW zD~Hx~8^cc9tvf!0iU!MUwrlX0wv`JBql=BPj9p93=&w;>(&_rcC7;@YRzx@kn#q0} zo++mU_^1YJgo$%_Tp_r-TWD*$Z}Z4DBF)&JL~(^+V<(j1GH%@ujivV|)(_J7$TB*w zy)dd4LG{Yddkigh(gI?UQ{U)21kltST1h0x{(eUp%6b>a$Zj-4w?6^H_Sl2k!-@@^ zYIBl?5$vo^-r*;XQq82DcVkDbZ`x$^#Z#VVF|mYimNVs8L4&>ETI=06dSZ_E-y@qh zT#MG)=l%6o^9){Hj#(3uwO{9q zEm*s*UmAGDTa?{?0<0ghh`12ngaR8nm-!|i@Mj%HkmuN~gqKuE6O1e*f{#wu)H@{f z?q}89)D_v7PW9e~R;*H*)tF}Po$}qlYvkEjFs-Tg4Qiw5=DQpyD%|E05n39=iytQi z`m(!-S6H)BO8r?v;GF$_oWmn>zPAVmW)UITs~F`M+=m<=3YVnUfpFXr%P zgi|;k#jfR&%XXs&Cmy0EOmpmvcCp2|sZ;vCY5@tjJVwH=lm_AW#IcZOx%=8b)Ax%# zJYrzzp7c87C z<_Lc?4U@+h3Je!>lXd>Qfh#cnl_r})s-}XS!ku9d>>X4L34idV5d^*S_O`jW^7z)A zQ}2`0?o}yn(!xi!LI9LsqMRl>Jg~k-CO%ofHx>6)vJ$`c2?(~7$LmnDO=B3_G_Q|e1X(y9Mmm)L3RnB z6>MFbN3qK_kw8|Pd}W`*4Dq&`733l0;9G7_Larr7py;mrWXhYydA!{a1+o$;f?prA z8m)^|zH;PuXvOJD@?gD+Z)sJMnQ$#SsZSqtte$@2T;37!^!!!n@5B)h41daJo%LBmUQ>Znmhfjwom%Bfk$dcb`PGzFl3O?DV8RnGxR9$0@7nF!!W1 z;O0&iRB0UulMto}{dchKNaToe9tiNd_Oj?N_09no?Ggml_Pq5M(RMY9!KJ|mPE7mZj&7O^pp6Q^M@yPCDS=6 z{Yk$L%GG_HywjUsOC29`jwFs-1HyM%t^Q3qm!YxlBTo7?Q7T(KRb(I1sBkA(X7OGt zk)EBYyXet&IphuRM}wS%*CMK}%}d0VLW6yE>;m>%)iu}u26sV$MO$A7Vd8SM_zD4p z)L9jKUY~Z#GLytx<-!qvUpak*d!D-}>yGW2QJtYI?N+_v_muUyO(}hR%ED*>$FA@| zTb32MUfk@Iq|9gTgQ7V{X-Ic!5pAOr9bB=pCZ7ge+2KItBVW?olXR8Xf;nxnSQ@2( zWu}vmgWa{6VYk8dp?Op4oTC4(QtK(_weVr9pio84bA*@C5=!-9WWe)=98B+3e0kVZ zASGzuo2w@4SNq$VOKR}$e_KBmkdv4|Uf@sh30Dd$=v=CG8)!Ko2cT)y5)p%qJoV1- zTi3?|a3S?8e#q%)iOapt%QpJyesJ07@0#(i9pPJbfi7?ta`yHBl;I|+6f>?aZZuaWoPh&C7?RJAeLaq|9HV<;CCQwrn8dyk&P}ju3ovTMKfAn`y23yLRwJ_eoCY-EsXP@p@G*|%sl->-iE{VTF+ge3wrmlxnm&=q_2Y(lR> za{^Vy#e9p=6^mBbDcse;S=+%^4u%(?gy{q6ke0$yBiq~G61&Jy{CTGoUoU_Bta7Q3 zby-FW&)ACK?9R4NJzi}Fz8Ft7#s|gNeKyk{2&_8o`Xo6%P22^wIfwDe&{j|*LUGAW zTe>afE>qE%dIOx%Ox!zIRR;Fp*{o{E_2;Ink%kWkE@ z{jC!#m@(&){DluxC3JeGt!Y_qOWIg!vV2x1MlIwJX(8(NZp~s8cpUwD(M(%b=H~aNY0az;z+t(|kSr<>0t<0GF~GQ|#ps7u=ppZ1lOQ zlM^n7mFYKwYrV5~12%MD_adF$@7+tj!(yE&tntH%IltQ_RoBC6LS6|Ixxee_phs*E z)4bfcmf&8v05yp7UFS>O!>aMR?0K2!j`sd$aDqt5Jj+O{!UeLkjD;Cd2+cDV$!5X^ zmZU5uNY_ll!h)*GK%iK?1?6w8HL2aee4oDaRc`xKLz!|<;8zD`zygXtRy~XyM88D* z*WA5ET7dau!r^e5Fj5$A0b>vyQT57fFaiqOlMW`zY6F7aFZDf0;=n~^q{Na*>B>a5 z^^QrRsUpu(meJqmNU2OJ#ow^uyHhlZvpDa6>V=*^Lnkf^`MP6NyRYadeD~@fE~>@C zRgM3lc0J5DUzVnI$I1o1GWk6|HD87=bjPv3oFVaF-Lfoc+f+&!`*%kP!z&u&c2vQ4 zC3{~`jLZ&S{dPGviS5b{+do8wayKpL1Mb+_-=-vx1t*&bD~XNwpq#Xwf|oKm!z^La zUEN0QrG4qPJDUbm({&4-gP7qv(5+K(AfKuCmKq9#0RFf76X2PxwvL_jjWtK$pO^dH z%4z$dF6*BvDM7Dm`3tJV!`CqH?m3@u>^%}o(ZsTiOs=WjtPdatG6rF*?DQPNgx@R0 zEZDmGBv_Nw3+hi{KgK}?xA^8Zd6`df*X-y718qI@4DbWx%lME9#S7VaaA*J#YPsS} zx3u%{g_KuiLqwVM2`~70pSF{h5KRg~3lc(Pqs|5& zIU*rZGPFFj_OeWB{L}4qjiYIfVrBqgqTb1Y}W=U2~0$~hFHT|!VRD^T8Tu@G>C2bv=}|5X}g(1Tzj3WLjR4W zKyeE+Dx^%t1yh1g;5T!R4;>uICue@U>IaQ?Z&1?#%r@PXcw4%22k~bW?>kECxd2gr zRWxRm_jw2L6c(rU(x*wLv+F!T+3m#}8iY|B-@Ib8b;|=S>*%J8PCr|xH43j`>vleZ zJw3R$G7G9FZsodG?2gABH2#4mR>T|5PloQwk+5eHzYQ;0Slr|Z{bVfSwg2N)M$uXsaIhVN?XXkw66AH z#D(Bu;A-PSX4*Rr;y>)1R!jX&;+>tWzQ1|5H1R$+Sp8tghr?%G?`t-hdUKIejat2Lm(W`=KB=Zl@q0 z0O|GvMgl)2rxrlsU`M-kZGx*M<@KsdbRI{7)4hAuSsI!`oLBb_4;@sCQFknt`99%? z6Jp?l-1=O{ zmnF9ZEa3+CzXQj$S+;B-?o!?J2bz_p@IBcv^K@2ZK43(AZ0g!E81%~Jw)|@^FRG6S zAx+<&cXM+j^1c#!Lh>TGy%Nei?RkIkD24zf#$I=S3zKwQ)A7HLEww$fR|mhk{qz(&zf?8K)f}|@Y+_0SC~d7#bnN`#h|%rSr-gSPdRHDYxI3}w z__%<-p1q3*sUHing8S{jL%6}~yxfEV!^^6vcSf9MCt7qJw%1^q-bta4<=8H|%%#sE zs^0|FM|vo5dc?9Va4Ny)k?)q7Q+Vrn9G&^B8n1B*w&;54?SBsnBw*iO3>|WLo>uR; z8Lam@ZD!x(n|OUcA^e86t9Z^(mlZqm+jSHeburwzSHJBx-v+poLf%4Ser09vzTH&^ zYW+urm~aL7m?n;SJyth&jp+xj%fqhvC5}OlaTZj9v`}N8ZSO`?YOKKHrE4z@K?x7D zSWw{J-2NIIbUonOyW?_y;o>o^iw6!GQ@Bk}$3SJ35m2L*KX#1?4c%HHijKd@`+P(M zR*`q~8$p4h44@M+eB?{o;|ty4CIH1suUnA+PNt#b>)QR$=Eo-P$O7x64<5IX%>Y7M zswrbABXI~Zwgikh=wnU@(8{SzU}uOncxbG$iVPtwWq(wb4s;#mognxXalg+v#``XF z1`(3kkr{QdtUVujc^^G#fW-EbV83!QD{&RI%Yk<2|9VcCZN4wp04NMG%Q8G0yHOrX z-8#moTW}6EYD^faM3MU2-Hmi*zQO*w;`Q(xA8KFRsuDfJ*(YGDWqxAG?;ySI@f5(d zt~68rGf&Q2+8CqPr*2k|zC$Nq_@1Lp7#|6L=w*ieN?4=(?UBdylmyC;x1q*SM%+`I9=Pt$H#p6KtWl@^QD!&xK6nu&0 zH635=pzlEw#>T}pS@WQ0MpJudvnQ^^_A)ZZR+xDSjMY6;?_anCzKf={*IXb^qbgn& zs18U%{1@hmNES8;LF8}?a)0pvuz^E-r1w5JI~A8uuaZsGfRX63h4u!E5-zjP-(sZ* zJ+_%8HH&~K6iqIT5f>Uv_>19td3fH%M~N=Fog237Ut=o#HESt&{PWv&B1G*L)I4#e zp$Mb6=t}-BCGblZ)%2?&n8Gw7@d*B5^f6!c>&rX^NcD2oPx88B$`&N=B5`4Y0pSa? z`znBRY0=MO3OM~p4Bvocv&TSBF*kwes>{V`l#a_%I}5>?L(*pk z80yecCa!ovNUc>|T5FW)kypVLmSg7rlJ}9NW(D>ogVA;3DfV{2Oovd` z)L<*^UEAO$yF6WzUG`!-S`%E^6{X1;`rv}hmNNsjm0L_t2DihgX2gc zmGxly@tE3K%P5~zb^}h#TA&^T`R;quQN%^$yT-DM3+LY*-UK%{JlpzW&&($s5UP(% zShzximovv=a!NL^G@rKTU?bsNuc`^XD2vb`hsI1^5LxQPAYs>V*~D^kwMj`J%i8a{ zqdeQ&4*GOGIu97gn-;u7++Xn}T#d2!1_Ta~D3>z9l7zWm+}bg|W-KNbPyKne#%6iZ zu=f4VT)~2{raT2!KSGOe4SYEc^FEA6woSRy#tjdGz=wCDp?3C2SauekyY9(lrs|@O zFeRj>lh{;+`o!yt6fV!>%(Uaf($Ay<7(6KU5wq-OZ-{71-M%hG zhK7A`EKBhf)_xmh&|SlQAmqocw23?)?aTAh5kL$uxz+}+wYbrPU=(XOMo3dL|J85| z;$P=yC9Ms(P;S-IOyMe2wxZH@x=AJRsbM5kh=-qbKN_>=`Y!wm=s+7rlkjqRFTDM{ zNpS`@!9f`Z^1O2oj_4M84(-5?#7zVYSBWb@SCcjG8m*(EF=PzBB7euF!6qdvI$Z%e zj(Vm7obQZa_{8M;i@s4yFL|5~igtts27AhU3~8^!qC2O6F@HoR`SY{3-1L(;a5P|N zWe&T>F{jz|x^n+uFl~j|gdb~4ToMPAzF!)^kw&raFUS4SHfwq3vHSiop&UIX(26E+ z=z5p@JDe%5EFo>!q<3h6fzj1L?ZkeuqgACA`~sp8X?h1~)I|nWrdsChpEmwK!Vv6` zdbYQ`q1d&HSx+ z3U9*0S(qWD@k-gRIwWM*os$91@BUuBwo!QyBR=SS5c1u~-j3ObmbY)~fcpzqM>)qS ze?C4myvg){AKuf5Da8ufgst};)c2$e^F(~%uX-G)SozcHr3%7O}RPoV3Vv`YxGjMc|Q!& zXV@S15c$&i#UDLQH^7`{jn+ZhV(-smuJz`3_U`=d1S>U$?s}Vq8Q=2)BT660n`+;c zhk#XQnw-|0=f`rZNA^o$#ItPag+oq0z0}3)|8`xCFF^bOrF7=ewpv$-+E{1)9QKE_D@fv0ez>= zyvY^uuTL4IPHwim{0s3mB;PZ|er{S1PITV^g6J(DiLMIxb>42iEo}D&6!=Xn(BgR=ZRZIv+}vTzldgF zpU`kS=?~h}qpQeaey%fWCBQ3Y;!d=&=$=h`X2jT7%B;M`qxP29L6mH-XPVE zET)Il`5Q9+ohbqsW*}qDVHi;<^`>HSflOPTy38bCq@MXUAPph?uc-2e`!0#Q0yw*+ zR+AQLUVN3*A#t@kBpP@C{PaK09{b3x^uV1X@F4{Ne64m8jIg#iNrIZFK(Al;?Xz9b zG5pu+hAD(qvPX9*Rje#1L?U0QMvJ%``#^Ba`I(=O!n3H$FWe(q2j97=MYLqs}j&A2n{L;53;2 zYw1#r8vIV&^1q52VLt(aK>^y#P|ycKni?@Q#oZ^I6rm}CJbJxNGKp4SojggQXy+BL zRPMQhg+0bN;AZ{)_)AJFe#&yR_Zm58#y9jLnn>*ZIMWNeIKwVSA_bIfK|lD1!KjnMA-UlLariNEm5Jm5x}$$VxWsNf!}{( zjspP?T>ns4)OZ#{?eb}2>|2E)Dy`u44L$yMIW}danZ`W|@JZTtDZ4%`vYZh3`UXlCfGWHYE_>Xoa*UQDAoWyVh0Zk5+%pO8L8v!TT2Gb%Xcvhzg40S2ZWV}V!~ z=SBO6%26Gcj0<6L|6i3g8c6<);k&vj)5WtaAWWM`xl;(Q7XiYEOL1OGld$UqaIZ!R zX^FGEpj4a-j{}CH$KZzAAZV=Yh+@U z=x&Nnr6R>!UY{2vv&0p+%BVS>fUUdDgrVph`wi`6V)>~K5`v~RQNM~pcKjw|GT|<9 zFt|sBz1>@dS-3da2M|y?y=NA_a;_98Pb9cV><$`%lrFwEZIoAj6?S8u!kOaWl$qKb45}((GnPBhr4HCB(*tadv6!b1fdIaWj0MvdP?^ zSH#`m0BHsB_M_TQrsFGi5+bef9xKCTvx^HB)v?8zn#v(){pZ|{n_&3e;ORhwkv1D; znPH0BdBGoyoAtrlDN$EN_SgG3o4l6oWA>AOZZm^ZnN-|}mrAihmf7U~R%ISu_U;5kovKKk*J4XI zGxTX>6WX!aOP;B5_S%_YYvly}xj&JH+)y`|ZvM&vmP!Y|a&B0vf7tdmu^?d?{fump zJ^W|)9ZMTOBDZ~Ts?k$?NP4p5%3XQU#hrbHt8=QgTs2r2>G`HQa?%PeSYSv_!B{K0 z3k`5534iPHW%zitEDh%N5%M%{T(OE`6k93_#l^WReL)VsKMZIzw@F!NO1^iJJx_ND z-+i6N_&~YBeE#z))($1jC-g{vysg0^J$TO(>Qhkh3h$tWoL+gc{LW=>?q|VjG(H4Z zkEI1-1L4+k7D0!i{ALy zJ)iCFMj{!}_qE0S%3oRTv!c5VS;cPJ$d1yJw&MSfsk4fTvf5zgn(%p?n42^(v4&B}S&-)$yC!EY$u&8JDzT?`=@_~{DzzK?aJ5{gz z?T`5O`GqRXjSiuLmU(6DV??E|5Qx0TQDJstFwuI%O}8OA{nhu4fCHDwMxVpYG}4)l zvm{jQBXlX0feqCXbgi_XGaqij>ph?6T^h_n*OF|D3xbFFWSmNf$LinxP@%hfF4OY% zTR2I)E<(0`ei8!J{f}XWC%8VPMwbN;&aFh50P<6>-Ge_9tOa+OyV$|vx_DbVwNY?+ zXRk*R;#-8fG92DNDEFOebW06+w?$gy!ts-8f{}YOu1#BMLT4K#i=tS8!%(N8p=cd- zzfGl`&|~9|#!-RlB?Px^H=4%M#P+Va@UTR9Ds5+=@XOvO08!FqamB?73b>ltam0k- z>eiB63}y{xi}?LN4JrSCCmBCOe_8h_^05_Xn#EX5C+d0Yb(S4 zWTmL#tb5~QDvHN&18BW^W9bVQzwT_l93NAreB((vKqY#E*$G30c~Pb?F!-&mpCst`*V zzhz1uu#B~zqw6p6AS}k*`;|5sOd(&D@|Fqmje5*4KF!J?V#ECrO!yg|_IZoEV(s3D zFW$0AGb;-{YTED%cY149qmfjqfb^2I%W$_VlB+6F9J*JLoo!Lb+bLowQ3|?;#fTg< z^>9ymvXXSmzDjYaRQBqBGYI7R4<#x*U26sm-OC3M_^2BDdXDzs{WukRGcCc-bGr0j zB!Zd^)$VG#+NX3SU=)5z)x@Hfv2mLSIiYaldKvapnTAJ^tIC-4Ah@!oxaBgYZC`Is zC;1G(XVKrBsB3rk;iQg6CWf|s3guYa3e2f_62%(b(*s^s$lw`v*UBVSt__*pyo=6e ztL`n36lK+va(Ta?X~l53(O$zlfr-eTh@lo4W|bf%?&n89PX28of&SLVr)Q=glRJCN z`P^MIljH<}CsZ+6e`r*_1K0@_j$_#*em z0HR0lK@y4Uto{D)R|_0+z+ce_LJq^bmTJ2gb!<|FQ~*5eJl5^%&1#o&P@hv91P|TG zK5{udtX4>QxO!dkQLaVJ1nChynNTw0*Tm8%|68IAbmz5k(s|=|7)X{+gj3tWnXgPS z8|W=-aj>!5|6(uaiXzoya&)teb=!bdPgQLG-dYsR)cI0IWqxzjikMj1a?3#WtzDX} z%Oc=RN`xN(`H0`EwtcUfsK3X6;=$iGDn_fBLGn+L8lhDjQ`T_i79QZXxN8#KC6-1* zjRyLUf*i+#Ms5q8!ak^M% zc4U*G@$Te)itaM0{>c!cZ!vBIJDqoIosY5j>oxH|Q~=X(tun1$&FfL+MFz%;(NzY)9apW1b?lql&I&qvtzg4lX7 zPE>U4ZG^fQbxWU`gD9Eb+pf12P*0hEO^pQpW&a#qiQQjmqE#ea^L@w8Ir|t(twRO< zXlK!4p3M`y|5>A};vITUZ0dzkM}-yxztsEI+28cG?F23c9BTp@G14|Whl?LP8~O?v z<;+^%IR-9_5&+xRQXL0c96WdGxX`2&^AqoLw)MHq*$N}5*pUPv(K`Zj&86jViK}jl z@Tm9!Mah`>DBY{rFWu&H$1?sR;PhWVv*~E9;SJ0%>>=dy7^l(S8z_5XyYiAV!KgJc zLSC|cvkYJ)XdjCp1|e|ptWs%U1H($rwe>CP1#)W7hA4gzgz$72qua~mi2+Z-8AS%N zehS0-^ZCVcuzYL=QIg0td7X>|;YJ$&E0AxTAEo7_PVJqv5fv|pFC>XBPQ_j-%(*)E z3`?!b9Gecwamb(x+nwwhw2|~>Y$t#c2aim-TR;mLImBLZdd08PJSrXaEm3W(i=`o_ z(u%UW;?2KYFa;|t#~WC-!$#M#i5D@}1s|A^M<_^C3|`4PBmc%6wsDb-ciOIrfdJI= zD;zm1G3J7uhyg{DfLF=*Cz@bdL1^(w4&gZt?lSX{zjFE~DrEx3gSaL76ALQXm+pGR zSu}qtia_uk?Q;FVO9x3Si6c1sV)eW?pm4_IY>TS*0 zBX>i3l-+y9uO8xzg=!1_Cz3d;e34*?@%A-IzI{1beuQqHZg!I&x&oiCyC8prh_g$r z|3qeUHHjI`&|s>S_L0#Md1ou73afVoGWE)Gv1$9hb!M-T>{|HrvbDH*gZi)LGRy`= zeLi=~S4_IId0zs=7UFO}pY{^hZi)0gX!81=P~J8vG8irB&u1$%Snhpyn}T?wjMn~` zB|_d0sLWn3#@sDF`dDPi2vhmng1CpWRfKl|*dzwl4UCMS@gzGfNV8i}Om$ZGqBXa( zDzK=xAOc&nmd@#W^|1>JlATP`XoF2;&3exzNs32(WB*odx(XBLwrABD49X=h4yVi` z9k*!v1g-hMw>$^j6nn(mLvK(Sw9%>!4+yb9%FR*NUHyv2!$j#6UORb8#^*r!`ycd) zp>u;L_IQ8ZI`gT<>ow5*x4&5zQKQ=xW|Ib!~eT5RG5kX&`y-otN;j<;@ z!e6ADBWZ<&KmsPuMLjnkcLbJgCX=&jW0?cgSXnOSEFcTj1kkR>-m0_xi#$DK-?4B& z>0kwoi~bEs0eC9yypj9SL~P=dRTKYR2jd@?{2S-GSC2X5ga&hv0ATvK;=;2aH^lSM zSP}t7kZ|DAH-9+Fx<*;l3u)ZA=G5D}Nj@4GN9=xFksRy<#aI}Ajm>EIW}OEoa8ZE; z2r#m5kHgKMS6WYEnR6;8WbV#HxXgz>V^3g~_uab@ETlSw&BcJ|xOAKyx1EaS>3th< zh?^<~JTl=-;jY?fQCeu>TI(V60@YdUJAG)i?i6DO^trCIL|eWKQIHg_Lm^Xf_Vz@BTAIx*fYkz>MS%TXN@UejP>|TksM^vUYy$BckfC#E(=K72Y zi}q|_2=HO5ZJcHFFU9bL`=44zX#;tO^YR(N_c`Ui^R)3rw$T7v3GdVf8)no0ic@Nr zNC;|YaTjI#LP15UPs&>gAc!x&sAO~Yp0c-8wAkACd{xU0wyAR$6;rdcs?56Q9 zG*h{~JYW2jBWo>sKrD)242V^*32X^^c=*OU^huR%2odXfS1hH2jbQeLG$DM zw>MTjIf>WHkij3;-RB}EVBfU=5`J)0-dYCt!8q>huIqz49VZ69F%aN}ydwdV!+!>RcBImy zRVst7^|Phh{(dA^yo&G~!<#@P!G!hcl6L2^Py(l+0>5z|xls1+&!+#Z&O#=b3J;@& zhyFuL6SzvYTw2T{NkG3W?(X8z@Pl={HD8;~4DDXm4%;*16d({uDD7S<6HqNm_K=io z+*}30X@2cvIz}2IsHKmutf1hXQgF?MJ$K94l@r2aa9A&OFeJant~Eg3IstPzocJKK z#0_~QU2$Rz!d;9!SHb=X+*vZs;I})i<$ayRBa)Wdpl+f7%>DQLx^V_ z>no{w-Qs4N$6_|-pUUjcDug@Z8wI&UyiWLhpE7ggU$lie?%|MWgK)1?U3;lUqSzmw zz8+l_yS$*QZa#j`XNy1k<1`z$VHc)%tFA}te>0=#44+n9OF9YN%2T%}j93e~$?jpL z3y_ofYH1?&e3}y=dm&A;priA%o*kFv%2kb3(X<8j>ML67o@xDY=h!z@97X2>sn0~c z>xW+=cGCz#L#KLs)p{WBzr_!akE5!pM$aU{xAw%$PCB(6j67*q!+4&zINz6z2OHG# zJYqA=^kp3lG|;1H9O;1*kBTQZfbb77#L$WxaC(U=UxnA%`?m{V>CA94TWLc^by~Wx z-xaEGYksBGq~e+LOaJ@pyIUvmot-U^D5>yddo0Ty)YwbaRqAT))P73GWWqelYy8Bv z1xF`oBx-tQ{_Rv2Ze;aFRyd_QKt<9pyl_;t&-H%gL3O*^2Sn6KG=EA33!Zb%P#E@( zw`3!R*R3Y42QH~JfD;e6{PgSZ=N?kRhifeJZS5iypcf(e?;s+*3a*4*4X=!uB2SY& z`pdax_m1(Jb;3D7J9q0Y*ED*uB73?Rup{LV!in^7IEl=@mMUSIfs|y&!yMJ4bpN2+ zO2oFYwg>B8#|Ox@KKlNf?yO&tj8>8tF?7NgK$;>5{;0n8kLRW-i)g`zU~oW{SlMJ1 zp=lUnMA=>DxWF(IL#%lxBF|ohiu6y5nO+hP$DF5`e+iM!?+5y7UbJ<%5}5cnw7yZc zKnUKm(S`CXYL+o}VG>g%dBbJj>LcdMkCZr>78};7tUjwz*eJ`Fes&s<7pjZ#pv42y z>qNj#1@k&}qIzr-xj)OsTJf= zyGB3BnF?65T8L!~K2+#{YCC!LQaz-eNs|_X9Sq1NQ!y4OL>=w5n{k*rV}Y5&<2;** zzIa?jUOl_LOf_C3UhO*KKclj0R@`5Xkz6f79O7 zl!6_BQBDj7WNvp}AO<>Wgi-bFlc_QL_+Vtd9ibs*Sky1Hk3W_f7hy7{D%4RrbLNka zubT%SG={ag(YPz7*qjA+SvoQg)I9RH)I$XG9v|sB;-`8G$U1cYOnA4Fk)Tsf_<0ih zS+P#|H3=5}kh{-#6?*yGe3?niDi8uY^It|gaBDrtjkDCHdL1A*d~E%0InoP|DVT*#vl4tO&u?ZSWWd!# ztwtcDjxk}tjhAknE^3FNCw2Me0!yvI=$6k!VV_meo zz;*8GtedeGI^!Pz&L4Er;e`dzp*mC_kTss>8ej!~%=Qu9$bx|C!Y0s?sQAVMZMA>{*e%o@!|AT-;~!e) z^j2}MZ4BZMOtULKt{h%1I))rD@-{82)phFYK{YnDm-TES@`|Q)1hZFG zuk)647T8t1zMM>!51!8%CtQYEoesms*#RT&itH?^psM|rs{ILo>K-jroh=6VVbi^g zrfPh(AkaI1r3g0m_6Aqzl541{XG0XlYVjIv+<}n+21gaUQIAmg!Qxb=@jkn@LkImq zd#$5E0bss;b44Dc&~QA^7_)i)x&0dt_hp(`CxzZ5lL^x+@U} z)Rh=x(jxd_iE?z*W;>l<)>TV2(1EcHvkdpLF>D>}C)GFqd~t5`S##{3^Z^H#HUV{C z@65(4%n7Ryd*nKYpvK5oJM}|W%#aO>mRT!`9b5}5+Jk=z>Em&7YCl<`ziGJFn1>0} z#sWxVj3MAf_r122o!Vu>UjkXhQIx|oDUcKg8m)1V6Q`^plh)kdCL>{z1v}JbYBoX5 zF_sETHi1+23wH0mI@*3qa;3_QI8f7eVZO5!XRYuYqaT2n)gkN44|Rj2a-0tD5H<c@a~5OU(aGt3U2e+w&FSgEYeqRZcg`!G8Cp)$@w8GYZ0TCXQoH;@K#x)rE#$!#8U z`yMLN^(}}MSHmZ4vqXK+pD$LQ1C4xU&1;&dVd+QzE^aA^-F4S^UY^x%uZyMP?x(1; zz8+Fn`d@-hi*;QD1<|^=*?y<>2M^@D4XIjZe>}&R`cv2Ck7eS$#rJRAAT%q3vHh}Z zrF-}K`>FD&w5A4%|Knp*&0iZ@!*=R5s>5F)5VUZ&(|2?0;4t)_f;SnCJv6 zuoEH|(u6B5;$mKEaz^(ngPMKepjih4TtyQfd$C#?wa49PFzM&`m_~6>l>03YwzI=BFlzxeH| zpawoly?5Um0_w>Jr^H$?BVh)lLNRu;yh1x?crjloY2yVHU{q*OaxF=edwfQ z*saHD>Quk(lq%nr)S4L7`V+g_e4C0_y>2kW8ioWAW?ww#p+@7KE3rv(0fABd>RVh( z4ur0B>yFQdx-lYZ(g#vWxrtX}A(2=rHrN{y3BhvL%jeWv=z7Y*$mhlTHGv_>isjM= z$7U_Y(bXbjG&GkyHwLdSI1`q%0~0pnMEV~Xi|dG$uI9ni`xst(Z8~x-rrG0+zBlmV z>bor=l$}t9Mj%Cnd<0ZbuB8|v*TMUZ)IBu}fDB7P6g8Zosjc(1ZV+`Y%K@jpINC6Fb`k?C-hY8nH+@M^FfaU6MHWvj|fv61WEM8!8qk1`~ z0&bxBYoYcI6iO()JcI>6u*zr`SjN}2LvgM4#MpvFq@GcfaumU|orTovQ*^e!TkLZX zvKL?f6w+8)s8W)=z)9Qj=UerB_>x_ndDZe#*AE9rOn(teiKN^a$Wspv5TzT6pLefGZM!!JblY+Bjq_RZotsS>R2(_ie&?q7N(`;d*$BRr&ySCiD4o2<-_ z<|_shywIz%q={p-IeEu-6AqZhr~X_S{d-t53;o1G?^UgBCW@ZRLQN<6CMdL(I5bru z-@}|W951fVB)g?yYQTdI92p}68MjxOM*KOzU770hR$)cCbi%h8y-cbZ_lK2E-sa&4 znwZ*)4Yq|b+)@eb=}PRreU}yQQuHgug-M1kvt5pru&Ukzw{Df?=+ zbC2GG(__Xkyq!6{cgI1c9r^FZ)Y`lSg|iM7^RwuRF3C>X0JixakUcVS75K^8 zF=&%H`P%k7f3ORZEAmkK0DqJ-fQ<@!pq%7d%-hu+dxT==TX%^ERdQiO~~Ua)OqqjXx% zzwKUy+y-8ax-il1qFJloXO{XQ;M|H?F`k3(=kq#TfBy7?+tMJLK8}ZmloX-?GI26- z74WIFBFayo0X6yspBMf5Wpjz`YaiB0KaYl@B1v@1f?WXzi}MlF*pG{qA4^440&ULI zG>bY3893x8hHA$ibjud1DyJNr=da6%n#BF}XVky&YHE$aMc&)?94q)fNck5cq|h~? zotWg$)!iWKy^yrvSH^v`)3*F6V%G9WI08-`SZ6RRKjwm=zGwuRZYbjc@feMm)tFVW4p_zMRzI7#-V}o+snXm;8#xWqJjfLlWT$tNeR4*fmnD~IbeA~YB;(!JznXZ%Wo z9#_<@X?jDkw7Ej$3}^)|EPxE!b$jpjwwqPrKg*RT63Drq-A8|wnSI$m$V<)90Q*19 ztgiidd3r5*eZZ5uc8b6chgV;Yl=Pl&XoXN3W&7!}PT|#CTR zx2XRmufRjMQPy53Ed@Hux)%M(2%G+IfO9m>sd$QV2o=qTsf6CGBEy_mWSwPgh$I}> zZtdrL-HEOo!WMvEOPvEa&1zr6ts<2l0tD3%;RMV6%Zm=U4O#1BDbIY+}4pB0B7W!E}tZSi~x3=BXfGJ9-se}Y*SyHb} z7qd}1$|t_3tdbsj_K*E<0(i{*I3W*q)P)yk1LsQt=Q{t^`iHdBEOCqQk{y$ol8f|g zslEsa3X?h5e|L_BvmnxbRCX5p9XK91OZ1*^*v}?W_*{4vXfvT7TMQ#g3g~{KmtS~y zFPDzDJ;aZ9+5(zWz95fO6(d!6il`cy^vQx^t&Cz~oD3=)gC%?~@@CY0)4Q-`lP$b~ z!1>o^CT?z32QZSK-y2+vs|Y&uJnXY+n}tdgG&j??fCA`hitor`MV6c3ZAz!>L#ZqyZoL=jll&d6m!8yU~VGsT8wR-|JeHWlHmVntd97 zQf03ig}e7$MAzc#`>u2hB8$ce@Z;G^PH1=cNDg*IhPf$l0Ox7`lX<7BvVKu4B@=FA z?X)IWOgK_*YrIAhs+K}l#Z7cB$JgrKSxpArbS|-Oy2j&M^ytnG;H#rZWmlXzJH||0 zL2j7YaSHI8o3?!3$n`Y{A>}@$Q+|5>1-!q&_Je0gdpmfP)`@dz^LuFSH{Qf9aXc-> zVf|=C-E2&R$IuJkx%IdzXem^3%WNzF2PCko7b<^qDL!S>Dy1?wlp;aJ@rh{xv|AAe z4KF{?U6S3pm6eYHN!{LRPy^3-@v9NxYR>}#$=gAB9Gr%3{?*`G=x6cM4z=z&aZ;17 z*KMbI3_T|dJUc8g!!jS9h`LA*Mrq@Il1xF&@+z}BuFdSl5W_-Mh2Bh;6=^wA(2v=w2 zd5H!=)Dy^h-&sgbP+``X?Y}Jj(?$glvj9c{zmI1a-OIQg8Q=ey;VRYho7+3NPkHrP z*hy_$)H?mv^Ao?c!vAqy+%#A*H;YU>k~mhkLZL9%<+_x^VFmE2*e^zOChZDpz- zJ&u+8twp0k@&l}amHH-QSi@ySx3Zzvm9PR#E`P+Agtqf6_cgAtOc0+b0vpe>JLw>= zdMRI=n6{9iWN{L+s#cxmwAO-20!CAyHm=JVe>-D|h155zM91T2v=Q#Qm%6_OrYvdH zz=Fa358B+m>yMo>nOdj`8J01v>(gPr9BV(>;jV~~ylvm^HC z4#HL=zsA<<4MT>Ok9Gxj2`NL6O^HInZ6m(7Itc4rIZlt*uY1pzeo?m2QN#7cav={0 zBD)7kElcJB1^XtoMs(wj+gAPqnWPj_Tu8+ z9&_(|<76u4c+ba)@UWdw+GENvHK%i%$+$3}s{Q@IG|R5Md+A>dd76EofR?QFb|%{e z6?;~a$HP_eXPXu}$-7x$UUx`HJK12J?;A2R^On}9z+d7Hi-?b$l(878N9Es-hMp%5 z40;;3*hNwy!S+ZtsEgC;KAs)#=hcomgCuTpE=JFxQgeJo`s|!-wn|-;-@}nVIurqliNZmG_Gpu~SSm zgNr7te)jq8YGm*I1zV3P=5`M=@_&@Hlo^>pU_+7(bbI0wp_KxCCG)E>Bfn%p?+t_e z;%Q}Oo%zJEkZblw6o}Pyn2H!sYhr)>^Lt@H-R>#mW23I@Ej6b~oPB+wND|3LUEZ6E z|3kf+b~P=$9jZMYcK7oV;DbEUn(fN4ackS1)lKi5W0 zxHUeeyZAK@yE%lswOLYgUXbD@L(A_D+jxuzA?ojskHn5w+Wddas8<=iJIN zZbNhnZ^`7J&?0-}(8T&U4QYR9;;xP|#n^O!5mPXaK2v~7M>c12t9bsd-U}If)o5&H5Bc@8iA-2S^g?a99 z#pO*-6RlcA)?f$0?2Q| z>-l1Cs?$>9F_3X_D0Mj_CD5D7aA$oM=a z&Qg=ktb|$E;!!G`Hd)BjRCG=WT-p6dTAk&v`=ylxB)qen<>U4|Dp-xW z`a(lN;E2$OxCR*Yk6)^nMl!{b`yJ*i&#iWV!|MN~tbwpKupTW`{T&ts3{@%TJ$lK@ zUlB9GaIXM=qVdjCre#EeAVo6$jdN z`RC&6-IdjhEj%`r#c$qrnIB+*F+m!u#b3A~>E9#VCV!cw3`WxjK@!`^`AfwubK2`y zCv$;4SMfpJ@6W!GqgXd<5TvNRdfK)h=TOPnQChS|^a2;?MaQSo^`UHKy?&!>Dv8@4 z`>~)UQs~9Utc7CfLV+>iHI5ZASssaSRNXJBMusk$OL_!{viDsOrc7Lvn?Ktd~)=$FH#ke zc@y-8;fh*%MJVS2msV44G?*bT_%H<*XI1Xw$~1LzO?uM32+dnD31kYUJ+ z)5Q$lXdiAo^GqX_q!tU8t9S-#HR(j=!hc%ma-KK-wX^WL&d?8oSB9AZ!^aTOcLBht z{AEg<{$D&VUhjJ`vM*rp1zgigrpKp6A{7jE^dd@f*{BYh%%SY`5)@pfb{qINzlEbQ z6flrP`h{WGsw&*YsWx;f8Gk~0I7cA1w+-~MB*zl^+n3K_c=QPaSZP@E2luqbN-koC z&MDeR@i0CFW-}kLR*TK=N4E3hiyqh#4_jTQvY$c@?Q+5`BT;F4Rxo1mB8qd!kdU89 zf+J8K%6LQ>nstAYwLeM#*EBTX^~Sj-q6cB}D4fz(9f79^G;401PmEybctpQTkbVbP zoQ$DdgfPxU5=^;|a>E=z?SIPLdA)RFdS;A}D(4gic(Z3?xB&YhZC%WvrWWNol6H^= z6v1MD*H$g=&WN!Csg^D<;H0x{Q6SVvbBMAtE6E`=#?rxJH z^run6*jEZsGeByWvyAXQJH2A%>smseobqIpuOInIBR!Sv-HgXt)~;(wZ~DVSS`E1u z=(ciU%ZNIFad^83LGejKW0DY;M0_kv7?JKzPhBz)pK?NHtLAnpgPR>PQg~fLV?H6Z z1)sHu!Tr2u*5e<)lGVRaTcs$z59m340KGVD;!?Wd`@dQ*+|K7d9<$sRO_AdJjlWhW zeFnEyG^cJ4m9e)gblG7}epurCPt|Ug$f{q())L?2Qzt!e&8`OH*%V*m@RXJQv2*GS z8IFDh32x7iYnhw}n)0Bop=`Xi&AK2=40=22t6CScAr1>EG(uPQ zQBjTwi!a8``f=!vFoBHjl~-3xXak94a~vEPdQe-#mbznW z%D+EI*)ni=H8T8^K!pBM0Z?42~FGWuGHA~lip`n=Qy7z34?K;Zt_5=_-R=rpEgk(?kzLpR{sjX-R)96;jVX_(> z4Yj^Ix4vti->rUFvp49{H7t=sG-G zyhNJD`G#(2V$i$^vE?R0({zq9jwCi0gK7wB^+Q}4trl3G6s|2uK$D!+%>BrMKst$j z0W&%;Yof!78Y=AriaeF})FlayPO27JB2kLHdtVOgsl^}z#k+qpV2>V`^?kWlt3Fzy zMcGkgY-Og!_JuN*y;jTb*8M7GYta&t%EW&@UE{b(?0*e3evgyM1Eai18kQy6L`qH6VxJ{G!^*r8+>S=ZzA z#oJw5buUr?lE(|J3Sf|Z4={iv<43x)&C0eYc*fc9Qv~v|oEP5yEFwu0D3r$v;y0^9 z+{P-9M;R7xYIFviGnfq`Xwf4Th-VD)0N1nM)GyKro_pm@861kM6%gN z&vLmN*xc=Tz&h=vhi? zG+Jr~yP~cxmXUmQTlqT&m&fXF(q>RuO@}|}Ya*QyL!`cBbX9#?$)|e5)taw0y&=}7 z?&nJYS8Ubrt2f}1#L$bzf0Msu8jWNa+!Su!VO<0t{KZh8O)WQFBN^LUM1zSwYf<2F z2e1d!st2GCH;je4D`&Q!C*7P;Di(bR!IY8UJ#%4`rNWSrsbPETRS{3ag^09a3k$E* zpPy?9$vSTXdoKs~nYS(n#T?|3{@|&aZNv%gSJ9bdM(sx`e5BT^qQfqmtzY}i%EMUA zsE_VhxwsIgf`170VkEN|Zo3_hKHzh;k!T%{$-mo0pp3ixd0ff;m*!Y{v&IqV9=^+@ zrelI*4*HD6{t{6+f%hoe@p@V!D{xoI50{9q>TgVV_!38+m&YEB%k|@lDn_6Y{G%-H z&e9PSJohP99kW8`BG_tgn3x6<+Y(+V*CV=L$JspZD*k$S5-*ckyle>*twUh!qFt`I zA8pUkkBwp}TNEbqDW-S|@~)jzk=&s~3mebVhjpQEtP0A|l)|RHvviN`alfKVcc9%o z?%K%J@RDFo58mmVzza9c3`uxpU#1dMP@g#Y{x-Tc$0}UitrUHR730RoBYU6^!zb#& zDGqjRj@)Dwm$MW0FzP*G6)JgwF?YuhbfBFu7LS!Q;6T)EM|_XU=?hF{v&#~^L=8^R zPrPavJTR9#fXcqBh*`&7^vH>z(5%(U6&x_+)TOvU-^6;Mue;rXn~gua37L3Wi$G1^ z@u(928??HHt8zz%8ww8{G19$DG}{fpf!5*42&3N~LZ5yDowU30Q=EIXq1G+qOozVD z2YQlJz(@ss35b9%3xP{Vk3}jng{Z5 z^(iX&r;y!jvC}ohlL1aAiFn~>XBD78(Ek}5R^hGT;iunZcIWUURq;QQ6mYbgYR%Gd zhpeJ$fUf~~mour4BxO?HE3ED+?7>kdw38*SM0(jCRzT)sI=E2Qm_RvhsIM1bXN><( zEn1R;YP|;hUzFX@EkKas0_ETi#XbiBWsG3}iwleW=zeDpVDiRdSHe~RP6zTZE~r>! z)OQ%cy4M^zNtBL1A!P0OaL-{dUJ3aAX3-?;?1hTk*Uk_SUM`j7WVCsk!Y0d|ws-U+ z<{Jrj94@|$k3;9L5B<_Qc--K7-o-#4dAkufv13o=Lf)GQjxFzI2|5V-R^89;Og~;-s4>u-l-B;busyWga!(| zv7jk{&tPQ_7KaafSY<6>ENIX4f{c?;?jA? zQ2#!85Ht4Cfus9hE^Z06O{i8m*_fn1Mb2Z-jz^$)Dhdw@nL@9`@{2^Zc%CHcg=}gc zdp{K_(vj6!#9iJVW+XxhEECdaa@zm)^VE3q)1{4Ew2*XPGw{z z^lQ{nmO?iGVn2q>N1#<+aIYt3@nBnUmd8wXRqHv7A7}+h!JD9*XS(^|B-Bp%YR!-) zHxZ5~VS}*`>rOgHxW%{lDSPj!oLzT49s}|^j0$^@PV(MSaO6_F-PXLV8Vx$x2ZgOD z0R4NWaEE*V9II|i{}$1=zW%Iah6Sv?8|%AJ{Tn1R|3y@H9Xp|;ky07UFQKkN>4@*M zZp{g2%Jo7h2@B%wN=^Xgj+}0a2l3j4i62gE2b@x{<0-pCcy8Us-xf2C1uFz`iQ-8fkA1_zmU9g@ z^s=c^RaIUmTZ>YZJV$u!U7Cs8?Vk6$oe}Gjv-T(dTt;CeiI3V>h>;+qU`K+t(DG(R z%M7Az_ZnIVVK=mN7nK+l9UpW<+Ik#%d&Su#$EE1*L%HEoYZhq|UV2pF%!ME9moAlM z8%!vkQb{*U-v1%M+q~;l^)Cef%!{?QAuQN3D?f1@QOd&yiIbTaj&U6kTKc&kfFzv7 zPxs++Gm_0+E3%P70sEq(JE>Fl#Wt*SPbT(E2WmQ7d#4iuss7+Qih8xsIMhc_w%ixM{FM#alLj^y2ZbHO9| zsxYT9j;SZUIJ#CmQBdPobyfh0dS@%DGSLzrk3DLuSM1PPMRzS5&(`%{`VwA^{1Kvk zw?yX8DJ|w%myq1Jg?PWs{u8slAqR{RTt#;XBNSD%1UK5PI${a=7<^bu?0L+oZmb)A zS#Cj`I&{IsA?G)|yhKBoLr@4LCw;>eQSJ73j)HH~)VIhi=ta3m`PkP7*_8&6#9D4P zkk&WM(NpOaV@;Vr#qqv@m%2gck8w#ijca_60rFHy8_n#!I#bAR+dZ`+F7TTqgKUG) zEroj7$z6L{8^|9Dbw`A^`7o!~*$?F2XYoU#)))hG&-ViLv?h@yJ)kG@td>HZfopo| z_(UuAej7<)%&BCcIFx?!lL~I6K1;-78FQ+-`~`J3^dG=MB0S*FNn8p2_d4f_4Vr1Q zeWB;zXKZlbk`dymHE9<`9JMq2;3hfnoOqqXeKMSWew@X1GL~gEEI!M=G*@cVvqG9e zeK=vsadIg8G)Ws)CFtdmr@yjF6@Ozxizpx?5CqwrH0C7etkXhovUnrp*Ewf6AAY&c zh@!2K=a*A%ZXS(y*>Vu{?rpQxMmX=oG{BhB1@=tpKxFYOSf)5=9W>e%eK4D<1q zW|4wE8pPq2zMOa8eWEOsbUFDV=UL2HElPSIS&hxNyoceSB)wOJ2C1@9I10j}!AYs^ zP#PmdN3i@5P3jL`Yher(PCU32D}IwhZ?sR4H~qHgVyQ&dUDmVLL)IhPMj;oz>#!+)30I5wgO?BLYZK!C3xQNH^6Y7w)R z=cBFm*MU3CSTv_pc-kuS6-Jm!M`d)`o7&Eub6eD7L)Lz`{->?GHBTQNB^v$NK^M0d z5w$efV8GaoVOCrywAGMDil3lUVCE^&*HLl3YwMs>dBMZx^XnXf74Y7_qVfUrFQQt# z5Py*AW!K%;o-4l9^3(ws+yE|q_B9hOPIx~q=~z@g$GDTZQ)HpW=^w7E?ow?OpOXy_ zU8lLJMDbe(>Is-tg0_#eWf-*%@|>g#)t818y10gk@FKIj{v2^$WZ2%-_(5*>OO*W% zva7@KcTdK}&O|FwiKUm-Ml(M3dj-cc&6mQJL-YcM7j_rri)-h%_Ac7ZtMI z0@Zr|BVJ9XwksWnDA=$9?qTX5^#GSciRvYsQ^-bc@@@A3t-8AZlNZlsSZY9ib=Kzk zWL=i{U@4h)6`x-})_-ZSLmkJ0d0-Ry|H{;h(0_P{=qd?-PyiTQxY!b~oVIJ~>~(~n zNu8IERqlam$S|q95nXj(dvejKJ1Fd3_RlPTIOH7Y_-I_i3)`fPw}-bZ6B6N{rbNf% zK&)?Ad07c^xQNVD$;bZA`uBIcL;IcB0N*V(NqA;t@L%m?N3}0^j;jI7$4?_bx&TIk zJOLPm_VcrCfHVgr?AhWow>;qkMUT6zoEk?Y|IPBjcvlhZ010nhl%ZirSlvhHQD`p~;pXsaKG=zA zyJiWvHgV10r~y<)1WK2hL@5wye!cCs8p_54PzfM4W8G^&!RtNmRTtr0DGq#*O z<%|jMdQ5941ntB-0=ax~*j?ZJ{brWbDJeGk$1n{52pkp7Ehc=Xi4RGYRZNQ)3A( ztQSX@dAP+mWAm2~XowT;-Pq4mB!G#UY`H7J`z^SKpZF$)p|}RY=9(PSS>9YPUGG1D}B*#0k?Y_CUe_9WIyq71vthL239XG~F46VyfE+!&f;L=v_ z{0E@`jYXTf=pj6a(4lN8a|gyf!b;RN7= zyi~7b)`$0Rde5sZZF~61KqeVmapk$LBg(F_Ti`^6lDAC*?7Xb>tZb~jJAuIf`Gd=f zS(M2b6BdGA_g9vsgp(#n5VKVZPstce(21nX_+u^W5I0^sp!q|q_@7Vb)MjT!2+9+m zo8e*f<$NUTqZAkpus}s~YMsBK93VqOijr9(?ur_q59-2lsJ|s%H5{@Eew}r{L0D6W zGr7n~lHwCn%yB979|V~w>J?N#5dIN!*ue}ETHmwVUGL z60*(QlFo@f@3`clv{oUUNe!cWdZ?ph|1Y_8olZwoK72)7u{ls_3f4SK=&UqkYJV3lu(dEKsL%Rz8ZH|P!e7x0?B=>VB}296 z3S525iNi{aKR?(*5KR)yiIHk^;qv=^P|IKZ&jyLEMTSs^7&TWYB-|{mS2N&4h%R5YFBLglGso1!WIp_nBGObaRO(7zLKr()8=0hnzgK&{=oqi+XF{Z<+g+2f4+nT0s_8a z{x$2?JRi$Ao-IGR1`*_*Ogin-K8asZMcYB}^G&44_E;8}KnRBL^_FzEAyhrcXl-Q*&WVrQ(FjAv6Rg zX*fA)(q9#C&4ThTBVZu5U)(xUuB>w;STG7DfHH+mY9fV?f_6s_;>UnNc|xmF1vEF9 zG_+F+>Ee8Yml8}eFsl&uB9IHDuDt?vo2lZAC4zUJZ#c0YpY-8|Lt@I!hEl-8=3r0t zfK_1$eYhnT7Y6LJxx(wsXJ@ZPbO}0jpy}D2K&G}B7gmcE;0x!G>e-#)`evXc))LxO{Opsm;V7H>} zx7nT)`t~bbh#z8@?UBAPn=>C*|9xflng)$v8#=}Y#8^g8uRDBUWyr*K&Z z)y^+D(axl0m6Cs};k6xHCE^ot8Dg#44PKu4t|nCbCx`#deOrI}{7TyL4YbCZ=%{3F zCN;`Ct;96Z;n`KO8m8HNV2qPIbpQ#f2!lF8zMwG`y+%DaUI|YtWo8z%_-ScGCIp<> zQsSC_Z#^X2qt4=KBpN!gVNHyy%|^dtGIi-lF~N3m`9<_b6S`^;Rns=RFHm9gjtuQu z<>!}D5=428_x7WI#_*R=UrNbub>z)A(XVsYrFk+=D5W0~&D^P}WETlVp>5t1-pyo3 ziVu^{%?3el);%t2BpaO9Yxr!l_eDi3yTuJw)Y{=RHXFTP_M)c`3S0x@POc+XZ1QpFcDVwo<`;XX*AeYg9)WvfU08G5oXW+pE6Y^j_OSBgrSn zpUmB*5XEm&A4c)XuUx6G&Z){Y;tG#3q^#X@Gw7t5yUuO{uk>k;C+qD4IEQZD}+ zJZdhR4CCN45v>{?5%xD@#toO&l9Dk+L?N|meyx&Fx0ce7*(-sZ#fp}E#U`zQW|Ir5 ztw&d>W?Cedx)rLzhT3fX<1WKY?@C2z6;ScE@EdUwZFv>T8ZqJQt}b<$a_o@YXc$qh zGV?ywYjMhti=)wmmM$LVO}*@Gh^tusVB(RG_|oCZeU~eJ?RVe4*OKVlz?ZlQ=M#YQ z&G4!HcE$TSlmc&+!a>@sO&U+RSPI}Cc>3ZWc8D%T$-7$qe@vZKRMh?Vwvi4g>247i zKuUUOP#USBOQfWwW9V)W9=c1UyGyAdq>)A#x`)pH*Wbar-eVSP!2!em?0w(Yl}m?% z+1E;26^}sOIw~EkL^2!~ZH6IwE>BxpsV7ii25PbU9jUNZ*phxY_Y(~N>*K}nNw-Mx z(`jXz&|6l&!DldJeAk5!c)$a^MA32Ff-fdCT+fFnHyhp0ul!u%-vR*ej-&Hkdx(SP zJJE@zQ62P{rMqvLUa9GpUl89}PILg5$#Tzm#I zPE&c_j_u3@!T&+vi_`oIgME3w0|6rcM}fX$-Bp0cI`u^eZ18X6)M*01N1xY$dt&!D z+~~cppJiMuCi?20*+J0TVym+sqtDwUd;E?s{vDS70Uj}~i!euV;BwgX?`@?iu=pAG z4uLmVF}!U?8xHw{9zdnnd{#vgomlSpNwOi)-e~D^G4;=!fVxkWm_ho`SEeBU!atTx zm%{cC{_hH$i;xJIpYF-oM&SGO^jIdvx8~SlFn9Y zyv9Imn5Lk1*I>O^wuH!>ZeJ^}mOTVpumJ#K04+re=Q@mnCD#OTW8CgL&lUd>En(g{ z?S1-y;w6Jw|IjA(1`7rdD<;qm%gW*aR_gI@vr&Ae>V3U(n&mSFuRi7Z`U&vv{xaH% zN7aLte`&Uo5yYlM)ZVVY2DxO!lQ_T#$hYJ3PLVE08a?!p9VK*Iya6Hi#1SwjkM&bj z9jiJyy9Fd8u!WQqCnvH9ckzz#{%bbR2h#SRExNjc@sM{DDPOj~!Ea%?>*ZrnH@o#P zc}kSlZf2$n8H#uAb6GRw0C^0b%4k_of*4=`E>^h5%EhPZE+u^SHA4p%1)|_kqpL}d z6Y>VAW=zbK})*eX_lSjnFTQ_r> zs>cHXUwE2YftNj%yRmq{$dj(&i)YtO%o&N1mg2%in57;`VhVs}UMhb zLn({ZWuCu}XAOmoC;ALx&I|?!pc2ba@_Tfp^-T%7+~+GR0z#5VdJ`L_)L#)7_>!_A zbmp5Vgp~W00n0krW2Hdy&TdkAGAR_iP0i24#zXqSdGgfVBe1lBs88mBkZ>PEx70Es z3cKgHlWKj#F@B&*@uGU~XK-#8naS;J8Ug3gDCaMfRwlS@rF8VS)qc$ySc7$Y}$~+7J4B+33V|-XHXpb<6Qbpo}HbLy`C^RP-uk znRVHc#Tr>hZiSh+k7(OZnJ(I3yZSYh9<1T9OSl3NpFKZSYI|I9uhN_vB*!ODg+csY z_=;^+o3Lzo3cL9)eMob0zGw2X%y8VIhv@tuqszw}$IKCeCXKs{SW8O1obFCNdq~n< z^vv(dpuZ)JV1Q58t)no8l@JwC&MCkdtI`umIn-?Ty2Tyk|jp)u5F4DS( z5r@5}fC<|PUCj5R!nik#v#bSU!ydO*SwU*HT++5mgw%ii;Km-mg47plKm*rR&o2!o zj-=H6nE`kzFsw(l1TllIY5+h89J1AcdXnO)DYf`k;{2upNJ|cH{$(O5 z;#*r9dqJ4=nnlir3Lo=I($|(5xxcd*+7zBV_|Y@0<)5aA-m!j>^fpb4md0fj9c#$- zGnf{Db^&kLU|#?R6#AIt?c-Rf1t6El|Isv;7OO@{?KQ|dfh)m!;8)*UHHp5TC`%i9 zRCpdXC{p5cy*h>SL+xqHI9i9_8PVV$h?3%z)&!C&e~Y+(Y#NkO4ClM#=4I6R%;f#? zuK!63b>z}&s>rsf48d+npH=MA^0n^<~$Y8 z>l1-O9W-}V2FRjC%OUiqdP&F9CkFj-n~u0W^@xy2zrfJB=`5ikGhYRQ5W zE5|ZPu8mtQ!t>^tysru<=kIh2KUo!)*i=L(vOMw~Y<>ALvp4Ey*+zYj9b2k@I0nUqA6$5SzL4q+MzJD6;$rK@eEaDrh< zD*K7NK3@ItXlCevr;mqM03VlXSQ8E@K@l%o{Sy^sk6ZRj4_6U=V%r}ylgnbxPQ!jy+kn(py}*z zcumvo5nRGVHgCH7K#V?7Ira5#7cO}_6y^2FTErQ~yYZseP?*A%InZIOeUcHa*{EGv zc&bHNcp8>jxSD)~JnwS-@b|=+6K})F1lQ3~f$Q)Oz#UX}bbl%lOJFZnJik5uW9B83wM#CHMeId3uk-%3yE zFVI2(UB<=VZsiBSvR4Ci0DX)(+lyf&M+iZ|cci5n3XFS%^( zTv4M=b9F;CkZ>zCj4oVY*oob7SSpPhI`=T|-^8%=!{9f1%wK^ZhKzqezev3EzaV%A zJ;YNHRGk+-%dYS|=a$HbJp9L_^jw0Q@f%UMu>5a4>iZ&%i0;=h^|xWsSG&&t>d0C3 za2|X!KnD$|DrDN%8-MR_09o~&`2D$VD1)C_cvb4g|mk1SU68H?!Vp zz(e5Z|Jlvl@)PHZ*OX4K;lLb=f6mrr@9nx6;E*yUTV*;THT|n6)OU`=t{RQE(HflE zpMPn#FmMQH3S3OFr?uR#iz(N`hrPT35b$r8WLq-bYDZ-|s3=bDafX8LTYqRXpcsZ- zwy0K&`YsS$f4fH*%i%p%GNQxDOGpGj_nc9*iLN~2V-Ke<^sFS9#-H6O4AL#jTAR!y zTLO3Lds~h=I6`cP<0yw}Fe`J5U4bkii;~cj^SNpseZeG@<+Z zPK(i8adC1#hynrtw-#%h0@OD3RC5<%#sr2^?g#6^lu9n*v%novthJi_#Vi&!tZ=c8 zB-J%w;sH1IebyVPxiDKNf}RXNaY{5r6BmpA0(!%7xfE)S!Xe;@Y9-96ALHRw(2%Zj z{pF|Ti7$qS-zmLL2zPJPZ_6RaQTb0{4-2nPFKZR#jbEjTatSAm}=Sa#z|mtmAli0bD(7?8lvN9re3gv z8H*wG3<$_mZ$^rqNK_@lsmUi~{A-r_T)GP|TP)G&n^=fa^H`jeuRcP++{>yk;#7qN zn=RqMyC8A}Eqm+14r`2WM&HR?bal$Dge6*TaV>*%K$NwMY2SN*txk+JON)*vnC4co zW-z6RS+$tKwwxfBDm)>C0OV|h3Nyzs^rK18`!8%@oRU}@URYI6$thD=cAN-q6e4kF zP=!!#G263BFB;d$|K`nDuHsUj-gecjam1eQ{cp4Q5oD8OK?{@pS@IEW*@1~|NO(0; z@z(6qfgB)qOBc-h`VJ&WkbQ|v9@<*_5!g%)=tIm&3%yJvK$A*|zmsv-zQ1otMa@T? zzTwqLT|X<8s3wH_-G?Vm{TC(pyoo!b^6u}lE}iVQCmN%E5|6~B6h?gGrajwz>w+IPQ_g?T#ZpSbKS;iRbkN*wr z0T2q=0aUx6Rn_qr1%-^n{|(B8GA&HtfRE#bCKLnH?y*~1Ipy5_k-^tn3YXlBVtq7D zw}m^WTim%l=kG;B=2=EslYBn47%~moG)ogyp?IN>>T&>pweT5M4v=xedQgz|rAX)7 zNs98RH24sotyh!i{*{}BS!(@-ZaFs0uZ@U+pZ#%0_I2O<4uiK38)FkmKU47ITkc;&E7FMMez35L009h)WO2LB43rJ5vUAp&^xm4q0#XT;p>f| zZ(0h8QpI#>G6QRt>lt5KQf00i((lv?Q-uC&F*eNm&*i^X#PHI_iQ|;pM<{o1FIUC_ z2kYloVg5iEQ225W7Lf)XZPrS)Q4BN6$)zr(GOXy|n0zI;sqN4KyG-7Fo#I6P*i&)>vw!lwxYQY#aCom~tyWd76?RRt)h zp!O|&tPz{Wai=gYTbYS0b^-neWc_ZnU;*`BK~mSlm!Cv#RQu1j=3W&wkea1mSj_Y} z?HxR%{cU%Apf=z-R4_G*x$yWnZ-q5d>ehma!8Un9!cy<8ca`L$Y!$i3O?&+|Um`$rW2m-Lh zW2u_~q-A7Hmd0koH4epSkIaN0`aRh76r=2I+wDqHCYL`fhw79wGy#Ow;UN6?rwUxLBqGV)i2uUyJB%)yRqqEdccZr zabFtGp1|B8b{aY@bRG)>VCAg%&`ZWR=souF63(^htbNiwL zws zzTh{$>#o{lJ$ZO_vYvZ--rXJNXmZcsAKksq(h-~cd?x&$T9W&`_E2<=(ZR+tBO&8Y zH2lyA^)X7li{5&CaejcQ_Iyc_euuM~K=~X3{WT5sC#in_5U)Y-jGar>Os z61Kzar#<)dJq66I^sL_m&h&GZ7eM>D!0MFf1C+~hhP(KX?BfpFpXS`5kKDs` z)x%9WiEyuu>P-`Xo^{}*ckPB2)}53gaXYcL4(om-?Lwr{*{vpb-#3-4-A&^Q#NS=z zLW>YHf=>@JzWaA%XORacJ*+18$l#|%qMM%;1$(z@T~BhpS7WSa3re{IOcQ>{@m)7; zzFWW4?8H+K9$>ls3RU8P@tt>Qz88($ws$QT?6aJL=kK4&D&+~MH!QDwB-4Ac79xiwcAI`$hUf7V~EBbie?5Wvw z;)9voSl|yBIf-I=aR^=L72z_Xez4)etTq0>XDPkwP6;pKH2-tV^?FkvU&b8i#Q8x)4{g9-v$@92^=`J$)) z@Q(kumzV(bvfb9fvs=Ngs3uX2-%vB`N8R~=nvToWZ@ZpO$SP?V&k_*xK8|6LGG+OI&XzL&)|rr=6D?v1heA9)W)%~jpu5|18V|G!=)RsVT& zgN*mi(fk_V4#ae@=r>#0&H|ai;7GJJkya-^5PW1LSlXw9Dd)f(b2B$?<6=1e5vLiiDNEI|B_=O>-*db@Jdu4NeZAM z>aPHivL$N+HUgYfC%x3S0jV4fX0;V(x)9ZP?Mtz5zVf4TcBuM<%eIU&U3uQRxpxLu z@j6U(EJUzrznMBF3(L@d9mm0#Ee_DNUG#jQcy=^0zxi_4f(gdMsJ?D6vrXFY)Ogyq z7u)-tfLz4KYy$3`@Kt!aOLfuv%-wcZ0*Qym>)NBgpCQyB2xSYVF^>ae{ZnA!&c~K} zkv@qb&3p^VJXVo*{nMp2qd``QOY&{b26_eoJm-RiBJ!Wi@=UL}UTq{Ytgq*a43$Oz z#(;OFXn;$JrX!m$hZyZ-K@x=Zb>OeM6{I7rhe;T75^#)ra{XNF&phiP0~evldY9ZC z!g0AH^Hg zFv&+WoQQ>zDtRY=Gz8G|mkQtj-?F`x7c%~B1Cp?TrUMkK1PW17K z{(k6%fcvt+OeqiTSdIa>vr9?ZQ;R9~*Bq~|c<#q{Pg(y`d)nnY9X=iW6K~Q} z%zC1Ea#fS_5)#BYM9UqnrX&W!QX+XLvUAT+tbJFIfeISA4E4}V`XNeC$|QbsxG(|A<}2SOQMgOxeC%!@nG(QoM4d9?~hEDEJb z#O^#r7}%HbKYSp>j6NOcD<;kAba}Z$D^%6=HXeLN0KQ#O+a09DV?M|rDr;g2C34%h z7%#JJ*WzxZjXW3ykc=#B4)6EUz*5_sJRAvpI^~l|sV%?C7G|T0LvtVu^9;~%F*U(& zOrQ8sJ{WKibn4xWaZWuua!c=SBi~d`XsOe7RS*XrxNeCkK6e}64dG7F&Yg1;6meE3 zb*YsE>+V=nc6A{!9NaL-E%vlg-`FR-t1U;8%8Z(=3f1Vl4Hx;52sb#`FrteMxPxff zJBBNGy(tjk)96wenKl9hUyVFExod_VGjrxNs2Y!%f`Vl<#Fd{(SzG#EwY^O1dU$b@ zD!boFw)8EQe9u)F9L(aI<9&qz>m0;%4MOxhz2taXjh}nQCiquO!t|_bE1*7P10Zsf zMo`%iqKw6kMGQ}ie3bCzCyI1A41p6`%tcrLrxOgK)b_cMzG?% zM|gIb)wR%e=m%)hR(MCRK41%Q)`8^A7$V_a?Ilr{L3w1}K2_@ahv1er0cUGjIYv^n zC5Fz|WH^S!_z1VK?9$Ffqhia_p8h2?|G+8#R8C3#&q;l*@)>-6z@z!$Hxc{MHy|F9 zKAcgva*yFTyUD+nt>6 zj!~$BV$t~@MeARmHFrhf8~Y&RcbwW7`dtyVoV2R#U&wGn@pSzkHDZgzFFWs@C%9>Q zznO?v5jMsMS&j@D%GdI`d?Wl7^WO4;V~4_~e z{3nV*O%jT+;?t@4ftJO!ecz1C(xi_qa$(xLyv8vb}bN z`Cn8|ImIIHm`u!^>`6bas%jlsOWn@Nr#Mt7%nk5#ZhulfjVj2nlNJ#vybV=)ijhq1W4U~hWY-#9~u^YJL5^E(q!&G66kE1DO@ClB z-yrYLp?zYPS#BUCx< zDA`R>pJ69qi7VyE$>(BcyD8lT`bHm9n>NAKwFbAL(oDa$TW&&W_!wR5&`!R!OmSc9 zgWm1xYdtGYMfceQmyT5yAF5fRF0FCygH%{M-hs>dTtT)=Cv&b_x?{&?x(;>9V}fP$ z)*XBp!D?m4QrE0S?_ofKy+z5}t?Z8j@VqXGM+8b+sQm_Rf6Q)fo((yZoOP&1dx7}= zVzm4jSu(D8$G5Ku^(TJ3u9n|y^=~kwmVNH8u%f?>1(^LpmgiW5_Opm}_DhgecGvxD z9;Xxbuh}M%cTCxyhl{0WwYoX#&vtlsqMpwpzw3bztvmQ_+<+2F9*y!K+>FGmb+OdY z?BZ5vv0C-P=p88J7+Q@R{bE^g>PwBdfwsprfP6)1#a;gV#}KwKBI(4%=d&~lkd6X8 z`p&mu7JM}w`f-8Zt%z^=L5?Dvh*Ha2K9`s@RtHR&$-n_$%>(!I*@Wj)fPx2X zH7^%o(>)Kx6o7{5($4c>Y(7PWqWv4ty;2)1{s;G6tp-AXP^ZTOlV`!F^HK@ByZP=1 z?uV-*kJBpy$Mx&(`jToBD2Zc-!%@}^OFZL0yCtab#)?P&BAK`DPO%e}j~?aVRbTz# zVg>hlqu`IdOz!T0HDe!&la9NnIlq65kx1Z!)D9a4h8CZhbZ>%)0<55$>j!8+(Cjwg;X{x<{aCTi~;Mw zIxS?=<{U-T$oS#ES4k5j+5qbpS4hp6+im{+ij5F$cN=n~T?Ic}tTYx9Z=PO>Ii{DU zQP7|rLCLK%8NX0OSQyH_#5+!uN`a{&sgmG;)Dk! zYE32ioi1NoKuzYxn7y7JVRKfL3+W|nma&X#)7}7pj6RnkiMQHXH?sp((B`Md41{)j zr?t0|LE899G_kw!gTJ!d5PqFJNb#~kK9y{+r(KA$>Q~}>Jr;?PV{(8~UaPbCSKemx zK#8Ee3zKWiEFx!A`&skuKg7g@u%}+#Lkld8PALTbIY3Q5bw_QEsR%3wT#+FF$ZA8A zsv>7^&xQMU{c;5lwjL4uv?6XQ!sRZfw5n2e`4d*soK{aaA4PO2z^~i41sHBxWnhVZ zw7m)r!pY>YvQ^>~haXbP2Cp8Xf@?xhKFbUBGmVl2CW5ia$+&BF=_7hqX(O<(`o3?x zP{zCLpNEkUYUE?aV##UwGV>yM)%A@-T0*RaME;l!PoZJHyqcDhNE7AiFCd9F-7&|o zk`NU7XXq@=M)r=Le|1w7&cH08>gO9=$5eB4LF@bY=VU)OT6EBdv5X!$Cq2-%Uix%9 zizZ-U4ix(LB9<$otiKP!>PZsDAT>@_sk^I7Ye-VvgvC-p`SrKj4hV{tY11huvS73w zCNCt&+SAE`wVKT~_X1t?mFYYIcIlP1CvHh!EvI5(H`Y}LJCj@Hae3Ei#AP4vH4C;H z)(Fv*xw?i?$aa%{g9m?JaU*HAkqSBavGlV#>!MHQWP2Ts-)85VD$XElsubLj(N8RW>tan>B5pKoRcJ%9?=I%>DfV+pmh}+t*=(nFOC|*DHr( zZ*<&wblSM&;tJ9Bz%YW{Mq*kGgY1v=y?2o&s2vk|#P^ zZk(83%h{w<1r62&Q1qzY&=PMIpNgwb4ecWR{E2396vne4%Gt*Xz9#Q8M?T${5DNkD z3nW!jq@)T$dERa~V)elng=2kXBu=BJ@?VuG&j&`#u(C>R=B(Mae^pEFWr(zH^F$o0 z=q8v)*3mnEM>;DgE2rL~wwC-|bYYT-O;E3y!yy{I(ab-lmS?N{&!SoaG2#GeQ2;^Y4*C4?nPP6LGJHD`Cg{d%70m zrq+B^uX_WtVP~zklHCqzb&@kj$Fh=s{N`zldw7wE$3oxX{=%JZ6iNVylCM!Q0L0ZI8A z#kiM-1xp)jvDodg4M}}%`XPlQX$gBK7@EH|*f`|c$V`F9Go`?c+5;ZNMTnDa8cg_+ zDbR_$$o+wI0}nTqDx-PDK3&7OfK}By#cC_-8PjA&w?}uY5uT8BrE6Aeb~i7&EmKqx zjl#>9l$b$UdL$&y^kSHeXK^5X=glMNnR2LiP>M6(-AE*W?CiCnlJvR`>-Cs=39!t- zA!YwGN~x`SPr~F4us@e|#|;ikup18|*K{h`0$XPp73Y}#UL4+*#aimmLk;J+FPQ{W zf{b_2+YqytzkfB6w_((t@=8k7uDXBznwVI6n>1QV#wW;S$F-ED5Nz0DGYQcN~Z_G#XX zi-?;G7E_y8xNyY?QJDfX_Tc-)$9DfV$pn%TToo=EZW034{1bu zpSr2KWEiF#w0@*Lw5k!EMZ?=!N!==1q2AC=8tQYP-cgDtcfYUUU4!+_qcML=vM>rE zZyBDUO@fj6k6$vzy33=|@~6oC^~Ik!y5YVlYQYOyD!IB2l-5u8rkkPm)@yUo0a>Q9 zX#=KXlb1t>sXK0(lz%h%Y5_k4DyafP7mo~LK4&#-Ynz&x{}Vd_K1bZ(dd`O*qO~+O zW4EWuIFhO+6z`0eD<@_OA}M2X7wIQJspt?HR}f+ z4b7_Tv#xygkZ9wMFWBr;)S_`v_?2C0EzDPjh%LR-LJjGR`JG|`M@kCToqI!Vq<>g4 z$BuXXzxReqY{HaCiKBFNl`W7T#t%J(*=6%q0` z7}sBf<|=AZ*HaVHZbe#3zl2|o=2cOfYE|d{sCcqYn<q+2 z;4derhW82S11#pypUPhkho!QuI#qA8|G0T!kL?Wdck7SK@kwnC(`vzl%fYXA6s}s~ z%L&KO{uMuK35kOHiG!gA1S39K2&jh%;um@%z>*v1#xM0=XUqm zR)}L>ey$%eFV*cxSPGy38#&W;I5<^Hej$_vveVw#GI0(1&Ta56;~#6@|N6!*Z$QNB zVML>_7Od$i{n_BsaAQ3?SwFX6qP5bSHpR}>k_DaizbS7K_3sgMY~Y7;VAP%O4roe# z1Z-#w*NN0?EF9~{ZBTRcmWhCyyJU~-~$m_H0ZdKwKo1Eh8~on<gPxLL+`F;za8Tee30n#jSgYlO9g?>ql;afVa$fX7niu#|B(4dmge3ISD8SiFm8P> ze_2WWGi(T&_)$1UV2)OIo+BIk?+N4n>`4FIfA**C=?>p5}vz|Hizh(tgM7BA@4FuJKPI zZeKKEpC$FL-k8Pb(wa>8zyL<2KE8Wy=w(xtLYDIiPsbbu20)cfg-dskx0>20Kx(U> zV`*6d9x9L|)kJ}9&TE(bolEUzty|XlaPZx#rv<1f{sr=&lKxEU4w+U3V`FWY6FWh0 z)ct>}5`EXj(Iw<9s^OUp-Vk_GPgX$Mf#Btrd_jcrpRrG=JTMJ(Y2Zev;R^V^9JwsO znB)_VbI~-MIWGXF;)JAqeNMN+=ar@d?Hf+Z4$>EX>6jG53PBBM*Y3B3OSz!|fnQo0 zell5;g5r05$Wp0HtB_XYn|c5ognZ%z8Z20}j$q;St&yI7=_e1eD34}<*Ylvolltwh zuaoDMoT$D)UB_1g*7G?*Gv|ynK&(YN$OiJ@h?L&fitRgZ8JmqTWIb|p6;5i>VKCEV z%QEOEtS^zQ#Gdk)WpWQrsZP5RP6haUap%EFbEp7Er-6awN)Ir1C5h_cRPS2@d>)Wm zI=gn>uQ$f}mIM(*ro~^%=I%M&EO3MFc-PfQL!xMoM63&q;>e-|`Ay{#>7tq%>22!B zo$DS`v_sz~-!qnTlW7P<4q1#r)RaiwNRC3Sq5#+SD-d8#YhSX+A9Mj- z)Q10Z13&OGX;nF|ejj7?_-nxZASn*Z22}TWA0fwlxUj;dx|vL0uR09uK|3o`FLMR1 zZ3WR$&s4tduirHouA{WLTZZcX$iN{vd%+E}jZO{`!9K2xz9OqQFsxy5jF0QTDY2@L zKQ$^dTo{pVpyqngwV(=_<@Y0l-1JdBOstqo1`A5MUUD9}Sv!<#G&ar`Li12ig0m^j zz(P~8iNh}%uHG?}GGavg>GrU)QV*}Va5q_*nmNT!dd*Y59QPQhEmu5E(|T>Zx8wLpcUJ9rCb6mxqr(e(A8&PccMp5C1GtN4bDwDp zo7{Ed@$e{CQ_z)Sg7uvV3Pe8NnVtSlxf3SCpIJ}uHtcU>%2Z$e7!m8@&~zWNK6wKY zOUVc$Ok){3tD)zad%nQr``e^j z!#G%`{~iE^ugOak$#@rR;9{t z>FdugJA?7cvd3?vw~iTa97jU#wHU?bnfo21FC3R#Hbm2ddbDjY^)n-DVp}7Y*{?5D zTc162l|;X5|2G)1_n-FEvts532I=!98aAv`kZfPFmXKT2;=*hN*O{oH3PG$@zhQQ| zyZ6^aes8c-?s@Wb5{-^{ZX^bHGso(uiMYWL>|pZlQ^gMGPl5b&to}Z z!8qi1oz{Zf2p{7dnJNPpWUH2Z?Phk~dB-n&BaI{?Z^{Xj2xiZJjeG12K8-w=SN|b_ zjm<|$zFSUb+u>*UHBT+q)Dcx4m62Hl)oe1q%&|;f&xYZ_S3Du-Tg=dn`cKvm-Mc5~ zKHvP+oke)q6vg}Ty+4Q$_>T!MRRzbt^m!~9rEa>zKBKl?9%hdM z=Uq(G#4kkrPKA-|-b%IO{mhU^p6IPFuhEVHKDhK$B8ic)_TwGhSQJMH;`QHW&akG<#@9|9q z$Fdl<@k)=I+18?hF?bT!_{%Di?m{#Cr zEwFVfVGerzQ1Q4fIO-!1;f^bl;M+-GlM?cBKx!Nmxeyb`+1FUYPDP*u8#GFUjVm+y zNgqq>RSWIf%I{Okq#Fow8@tD#Qx1$6sd0b!?!2eo@1C6CB^3* zB?1a#8m&64cb{@G8fi77kXjMTnEF^>E!WC`Tp=Crghh$1>hL9azLc;>z{*<-&bla2 z30{d^)O@rS77ZF#BKi(!V6DZQ0s3+CaF>Rv2oNC9QcMQ z!hkE*<~s_XVm75QAKFC7lpnjiwqSM|{8QW2u|sy1#B{~9vhWRy8L#G?y%5y(Y=KQx z(3t$jz$gXbNu<59QoQp$?jYfg7?>XGyd7kIiWM%_*LA<+-O1irQs&Eb^Li=fZ=qx! z7w?qe4mjp7zpRj_R%?yn!b;KhI5PzZkk5?eA_M;D#3Hk-xsaYr zChZ~q1}C~eRY#%)AP25_BQ7Z*4gtWRq+>^lGEtdVchE-h`Xa+sdUfGfu9V(#{eZ%VM`F?jYYTlfrY~qm6Yq!85zBZc?F%A3dteW zEPc2=5dtXgfq|_%7qFgwBjV45V|`coDKzi6uTek$EWzNAdBDH4BX->z;Hh6guz2rY zVw+>4*5;3dMKwHsAShY~98-6Ee+E$J#(oJD-m&TjQexxvS$Sf40yI+D=@}+%rBs&p zZR$1cXlw@@>*^#$HCb24F&UuMskjH+F>II-PX7~nYTAl$Oh{#8#45eLw^HabN8_E$ zayiS(T05M?&I-a-41IXGfAPa<8r?n-+E9{D*i&bNa{2NkN_^dWVgNlL>xxe8icC0{ zQU&zr;TOsi5M9pukLWw!O+Uqc>#Y!b*=lFEu0`@4kh!7+PbL*w@u%vTGq0(BwQ-yioWk#rSvnF99VXCY__l zrH86YjLcV0OdXH`rUX>Y^G4A>qS`wtTt1YZ{k0(wO6z?^M3s+7oHRSdxzff-{dE;x z3lyaf#i(mW=Ly|=9Yhu^OjR5D&J&j3EQAVMJWf{XK#rTqxguAwVd8bjg!DVn zCz)-OlyF5vD1T2ceedaTtdU_F-Ma@1O@`;3(R#9?nmd;<_1R4mNT{PKHKpk@2{izf z6Te#hTTgsub2-ho$KLzcanD-}pmLlLqv)*oME=H)8+oxYH607j6p=E;`}xn`bi3jw z9u7aGsJsK@?ysb$V{irD>uCm}?&)??S!^s3#IL6k({u=QDIBj1Xcb+jUDYqRd$LNu3aSCj7G38*nK08GdqWypPsp@3Wb!rMxYpA%4A2H9y2Q#D zB_^@WkIdsV6u)&^`uBE08Nm95HHynGxV{{5iM7O557OMUcVP7Odt4^YC@mUbWZ-$V z_B5`WkU>)&JmY^etZ-U;;){$^RH@&w-OJXC!fDV(xR!+%U5(~uAWAr!%5F*8*piRY z!QzfJ(k$3tu3s{pW>ZwovZhhkYw?b_$BG%N9AkegqnODzQ;fqM=C+cGlj~M~YMdF= zgG+(AlwlVuQYsEh{U^K#J3(*VKByqg0Cn)kb8*&9ABF*9>3i zQO08l&#UPDK68k}l0VBrj@L2^cmZnB{s*qTnv0V{J$7lw5oMwzKIwGe`eHkB%K0p;As=sq*v;%H8t{}wQLC5w?kXL&_p@eut z#}(>8aC(HKe8n>2$H>nlb-@-{9}bYodJ}=k({NhN^SKo2b{KsJJ36e0yPz@DB82MI z`QKurb~^*(js;|eK^91pFF3Ulg34;+p_-$LJ<5s0S>pjI@pBHisBN&*+itGbnr1 zqPScMuw$|kaCa2qqJ`@xdgOVP(Ei$6epDG+&D>IhMHj(OXzgh88uBo z$(VL7cP(zK>I?Jr7QO0fqq~^P`$0?0)SZL5_?6H(qC#shPtaxjiPZBfTSL}x)sS-_k4Sg;nnNc$*eVseei8IeG7G5={wW^$ zV!$H1u5xxa$yKRr)yo@+2)}CjylJ{0d(fs|N>Y`4RmzkT5wZocpan>4d)Z`zjU5|B zhShw*)|*!o_Q1RxdvZ=9noMm-2gmqX*|C0zHjR#$i&r}llJK+#_1JZ z^=7eP&M%H?@$fVgKOM7M7`H^F#e&{tK~!EAqeQ_r^7=CgP!xHQ@ZukT zAINRFtEEG~j?1xP%rpa(+89uElIl{=c~sNJqIj4_a%Cc-aKLGCWHz7&mSnxxhUQwWm7Ku8-jZe6tO>ZKDn*N(B6`p1j z%-Lv^@Am?d#WqErKi?k*7|5}`@(lnlv*Us|99XFS39?>v~4ZH)Olr!D(Ly5CbexFD0HW8CY%n4xg+Ia3ml zOdo-J#L_z(0KO&i=Ejfy|LIzXWLUVC$){R6N&4|+ICa_rrl+@<75oX7!~)y%^IdCumXaFNbNT?Q zp196tqRoLFS5+NTTxjWDKirLTdZuLl(xcTfOA8dms+l6SgEJ5t^^GE5{irGM^`KIm z;aN?g+RFGo&-Q0J?5j4nw<1mdA7AHYzRj%kJ{BT3%;5-GWhpUU#dJb@IprV}9Rs1h zzTm|Fs9A4YU*!AqT3cCvD*KeANtpP#ywFV8Xgg)aMkav;(>T!h^yOLN3$S?Q6NK&< zSM#?>AiSv$RhH}*PK>dq(+6|N97GTc6c38i3xubBzcJ}Qhp0KH5~ULL*h0q1Ne%3i zK9#y8^xC?K3BRT5ZPnEww7 zHF(vR`Oy@6Eg%4uucNQSRNt--eL^52s=hBjPQ&+OL(A~sz}@fJS>`-n&paX&6dH2s z!xU;nZ$6jvfAPw=rshjRQ3kNu*L^7ddbV^le_FV?i5v0b>02aJkTeEXy*)i-VQTpj zmugVvw`{(=RDu0AZzr}skO~J1Z3vnP8No$dLM_`2`vG2jpNnd1rJqmaPxc=bjqg#z z*ak6*+YMNxL%YFm7N@y(V2>uPagLkz533x|sI|wdv>L8)DvIF!EZQN$q46tHfh5+R zEd11W#OZ{y>1^XJN|krY+M=Jw9~L3pAtV*9`D~i#!dlH+yXkvmm^Y#mzL@b@5_r?z zL}I}zLkPZ&!JWOEXo8TUpuF&K;Z)? zs_UamFeKhGP|6q+7eQow4DWp5b-VZG&8X}r<^N=B3I2m#aM1OVJ>Mxoh`MMqEjl*J zR09-}a&6NZBg!I!frh$ROq8_>GE{2nY>0f01igH!{HVONb>SE=Bmhslkxk zR+HEQ8G@j`l>7{1=F-%Jr@*}qgfXe)<#ed^xQo}w35W_|+eV7*+6D`S;GOLKdK3L| zUK1_9Tb1&3!?^z2uOoSjBbSCKw*HS#OUtkz5n;a z`{Dh<$FaM+-QRi6InOz0Tb&ZBdcz7mlMlT9iuNTI!Ec5;ef(*M?&Gn7j$v{~^$l9v zBQXu~Z@!O7Qsvr?9A{d0a3-%KYF`IcRtXO*;LR!FrmrLFO00qv8V2xLM#B81`l$MP zEsn`hz9|j~o5|~}`B7->f7pvK@^}Dvz5R%=(DRgEIODeo(zaxobm>11Uj|FBCgUSk zQT}AjpKEL>t}0%dviVn0GC(5IWM322{?NbtY9<`?4wrk5+BMO1W5hwMR~xmld#HT= zxwY{9)Bfmhk36A)nm2uGzAT-WzkoQRJQDU+IqLeC!)7c8ALnbxv)f<%tQn06jUsV9 z7d8WhVE(~DTq;SSCue)%_x`8Yf3Dxi$93@Dp<~s7YMsZgrKx$Q(?Bf6(c_0{--vr>^{7{*@BFt7;xK zBX%^FM|_m||Mdwi4bEhupl3FpvC-I@0jc_!5KIs4knjPQk_y!eDO;%lM};-pn-#e- zTaGRE);|P;Tcj!0AgUp$0e{aVAuKPXq1UIjghH|W6|am5Tcp2&g`L_HOW>8GHbK*Z zUQ=i+52)jQwUxnCCw=$^j%KcjlJo`vatkD>0wF@U==s#PjEM6}VnV7>VbUmH2>D)C zjERl3JwHA2G!Ejg6)a@a}nbP#V!Z5P1bT@_}=pC;?0hx zEY!#YBqMCrdWeV_uXpK2+ud1S>sDOc#|9jf z;r{mbp|so>bg0+}6a=8bX{r<&uNG;yISb1;D?gB+NO2!Jzc?7`&LOD!b=q4%!lJtR zTVYG5g2cz}_-J8MN>w93Un8xpf~KKXYf*THtAm;3^h z%1Hz^@URnot?1O})X%IYH?+vIDV)jQeU~R~C0C+|CihAXvN7nEvRuPnf`N0`dEE_a zpYtO9<5OXO5Eh#FZrJPCtCVcgC~wO>7dj|Kx@4vO&vMtHY)bET{2_u7(|?t(r-&gO zS{oTPPJ2yIZv^Ru&+G8-Q4^*X`(QzeS+M*G{6J%$)H2KWc}VkhAVEfE;++11-irj2 zH=6H%3Vfb>G%f6BOw)Nc*9Bdc`wvU;fHwMAI6xbbOvJa(P2th#pbz%v(p*>{ zD^>*yd+Y^UgbImLhCZBj5g`sZJAOTso(76wdfxd~nP_-2$RHSMbmJ3q(3A($@E2xQ zfzO$QB+ZbXR95{vW>WQ3ELXcRhf|6jPjk?<9aorE!K?mpHvY>W51w1WMF1AYVjj(J z(A7Lx)8ZnoJ=qkFXm4 zvht{Ktg}XDNYc8uQs~ZutKl{&G=$DNc#DC*u6=(Nlu$DBwEfUOx_%glq4p^iWAVM_i-1>Oj z`mmo){b8NAq)&7)b4zq$)L%?ntV!56Yi=?p|!I+Lb(& zKLyFzS!{GaYetBeg%C}lY+fH^?Ihk@zjTmehSA%?TRLS$Nlj>CM&lkkj7_qJ{KOgm zR61h2g(TIgDFO0So5R3d$hL%3i%3u4t&Z`jUk*7=HF|G61~vOQaj0}ytmXB>mv1A~fzU-Rtc(8G;hkQiv`5(zbM6+1^i=N9_G1l&tojDKX5`%v}B^ zCRWHrNsY$FCaIZuNd^777nTL#r__IYFI6RC;whKQ(WmxXL}KO(yG_!wJ~{@juzbYm z91)@Ekm#hIl60d;A{mIGZgD-buIe3d12ba2s@tqzN_awR8~pJ>&D7GQ*%WNRTSZ6J z)-y@3usZ#SCxePLzyJxXd^Yp?%?mOY{e}+J@4sFeFqDM!A(^Y5pQ*QQJE;Vw+p-L6 zoSG54_KoKKQoYn~?Up9q-}+1W1QI9{QMqFC*gPfm65sXsFa8AmCn*_eGlvWrX6%}m zFO6wg4u)*3Wi@cyghl2PitdR|&l(AM%dT-{h5wTd>CQ_0eqb%uhaYMigxUv-N>IJ_ zxYWt2t4Bs>cppjl=c{{(ucO94RcX4`%?K^bd$FuLlVMxVbS+6F@6+Fo ztSR%(!GfQWh!o2`fb~OzXwyEtKNM(UE0VRIkGb{lD(1$q8txHIoo5MoNU8UJkRzY4 zKN_eFCN64vq}KnDU5<-Vfi6TV<*YwEDeovLiZO^?fFgKtCyo99EATC?N~9!*Bo{UE z9nG3V1h^P7kKajvSO|whaW^ztbH_rx8vw+{CqU>-%46D_#h;7o z5GKI6h#PNYj2?Ewig_s1bt){s1`>caYRz6XnRJ)VzWURt9XIk*emwCw((+FiKmwY3 zLJJ>ySC1<(AO7&pyf!40G-D;fd-=ZL5JaH5Qg@w)YW$heiBozh9?Oh0nJ%@%zTno; zg=;acnWrktXP_{NmUs2ot_Qobg>k zR`>B5)Gi!dRGxMifBdPQ?ot@NT&CA!p83eho_tD5UVpsuen0HS<~hD*>M!frGULYP zI$=fEnRn?5(a7UQW*0Q@WVFRNX8kkm^dutEDDVe%xINdnF)&v2g6~&ij?Dc_;93GN z)V-`gx*@yloo6g#Pe4vlM60fe$YUzH zGfD&$5cn2~Xkp%#c~2QG&9tUrR%0vEZ~+(G@JOiG!9)+XP$6AxYKo*b8h7S-nHqbo z$vw2o;QpLcY?04@%FlBGpA-ZW!qoSL!>px%jQ_Pvz(+EE`goUjR!90-QX?+9XGP~; zT{=zyJuoMtL4sa_4g$TT?nz#zG3C0atqRf6kd75OA7#KR5bq|h_>_3PKxaZ!>m5-3 z;5tmwKl9iB+1_4Mu>x_D&YoH8cN*!tkHR#6J$LU&ir?2$NC$6sHi|ICEM3$+@_1l; zl0J9rvHV1jy-{_6H{f z>5guddTOptxaYx}Z2f0%`{pTAiV~jCcK!&J4ag=tS3Y#q!QR`T25%HU(kDH{g2I&dJ>- z$h9e@V8^Ri&vy4N;n<_(=yyo?uGbnv4**k%#*%DqeVktnMLn`m^%zzzbGiMFFxS=d63MW75P@b)J+l`I z#V8Ee(K&t+(^CZy%aT5dNo8bnK zn7@?ymR*Oj^Jd-$9wUx-6!bp&z9T@_=4YUo9_#ip zbK?lfFjgalNYFd|^2&QK3Y}jKj%&`p%&KMj-2W_^pZoz>XI+9$}c7v0V7xo! zC>uCgqTxP*K6NO$V%iu1n?}o|f4s4KD{T*?018-c@yd@U{fXRW{JX?1yxH0N=u%Qz z-@iqZu|dO(*(wiPM_sg+pTZOvLCn%Go>e(OPo5}<=|u*taz%4};0Yz)kGFZgXw0G1 zsh`h74~PWY5uxTkq!6oZ$2ibD7jj3N{+Z5pDkp!Woxl_|_GdTuEW*Q_u14KQ)D0uj zVS+`{`JK#;)RY1e+PCpOP%&*br#JciyfdXIYfjr<9;NQp8uuz#$J{Qqe94h~K@=}A z7?xS6Fd2&yxkk5OfVHtb$k}gEO49F#Q-Tkz7#&s@uRzSRdb;FV|&A zn}Tb%jJQBN*h0Bg6q0Z#~>ujK~+YJXQD^V+jIM6vt+r2mpH|l@!P2yS2?4Sp? zUD;zBhF|GD552gez^X7PvO9og#?v}VG9sV4YT*a&&Qu=j-|pwX$yb$QUz3GbWm0-J3Uc!TfB(BTk-^DsEUGqkv=UNxHkCTj#j-Tkw_B2A*&R9OQIJMUiHFsw5#2quq&fl*?LA3i<_7kWR}_zQvL&+rv1}#P-lMXP zGP`b`w%gy4!W_egT~)4BD1vl2(0=0b&nl7&XUEJiM)nV=cxe&Vm@l0A+=Vfg8>F@5 z%o4H}O0=Z(amsT4Sh_9cVnujvNTA9@#)8=JhUZRD8-`K+>L@)yDt2dgkt#d{X=@j4 zXB&7KF3v=DgRosN#%v29QUN~=aH;QxY$P93nIT8P;bB#7Qxfg02sJDEOn-f+Zze0VR3y zb|kEydm|X%IM~|Dm;O(gPKlmaiCcPz0m*uKxby*UJeS~kG4@k`vpXII&WH%r&_x}6V+YSwC!oOY1!g}1E{IcS%=scuFJc27l@ z>D=*o3xT`-)A^QdNi5P&l#z+IgqJawJ&eqW8Ebx0U#ipJ7g%N!>o^E=m&OQp34c^T zE&1K}cgy~KV!&rmR}pfy;^el1=jV+BJ;5m230GdO{*quZEK<9Vm$8yn(QmA)50KUb z-Qt(rhsl<$khegwU^5%1-s~HIINS&Onju|E+9qIzHTFzal6;tuDO*@hvgvO!&}$iI zbycw7iOi50lrZAJQAGD6D{Lj3G|{9e5H`IVeNs$5+>1{=SpP0leljUu6R7Q}uvTiJ zR+d&*swpWp#UI*162?mDy|W6ACq7=JasuX1pIF1F_5FH&`cjuhD`u6uzsx087^$M0 ztZeHa4Z=%QC7X-S!7?r2R5C(abl{4 z?60%qij|v=(sM}CgmuE6J{Fj0(47Z!TK2toSj}=ZnO7}0QS*W=9CvZwJL#-^F4GV+ zf%Lz-@F@6S&YEcSp(_f_5{gbpH%Af%$C1A(#1nfsyZ2ALe~^zJpoOmx*YT}hqa5bf zB{M^WuJ76&n65kC)hC7u;aygBiLyDr+8}>P^5K>%F`Y2E5}H?|TeSW~Ciy?kVv`&y z$-Fc8#P6lel~~sUAKkx`K%rZCtI!>FPpIOudVwynqLgyQS=vt zYjF|YAVer0)R4bBXskL1O`qXnR-+70wuR$lR60g@5Fh7s7AuFrqyJ&Af~Hqwh<+t~ zo@au&kk$Yu_$V~}=Y|)ul>`F|w$cdN-(N5;_P#DRM9)z+OKSHytxAAaWmbJEpC4Ge z+egj*Ue*4@#czjfwi@H5jlHYAd>tmA@$SWd4#q;2|Jq=hWq{lpQo(dnIV5 zU=%img>{MSl6&GkJox4ke*Lg_<=tA!NtkGV%hc%K-- z#{o*&_ExVKj#lqG{;q1d0@Aatg3>}$&;5)Tw>9pO+<>FS_AiWqSO&rI)X>BR&iqfz z)0D}ssa&Gjs0c}sC7Xl<-&ZMm$4OTR0->K~_#ZbxWvdxSyr`RNQZus1@6{h--y@)- zV3n)m0Uyuc4fo>8c9V`QTvuLVjn!}~wP*dc-9T4L5bd$}HhGg%p{b!M@_M5c2O9YLmNbVl$)n8J0^QT3 z@AvVlyMU3XVF9!c?mZljC8az3l!NYJyT^Zg9%&uc-2Z*t8~GC|aQ}w$zkpG2n4aO` z+e^+UwkCEa@L;7! zx30$b@tzk-z~#$Xbi;!qyFK6LHO$M-fv`fH&D^&1qCZ^?aM0CN_~R|lYH{z{|Ba;` zRe5JhZ-*OSCn1fW$E1AN)XE4`SS(1-`Grr-gieD}$IMpPo%%M~1bxFR#uD_sy3_(N zt_Gl(q$FMtfC~SLJy9$Rur?uyOY-zVudE7%P)!wheHF+kK7L2D_%JUfb>En<;^la% zG+*ExHClP{PLHd%nTCL{EYPBDM4WI#RQ(-uV}nJQ^iEAirT@CI6O(J0Q!&+5;3jA( zA|k(0RNz%`yT9we%Ac$LdKW3v7aG@7Vq0}2YWt&>DD?VF=s976xWHp8PqrD-EeuT! zDcE*{P?OtW-B>^n8#k5pFJ2XESKe1Jg`e?6;S(zfEwnWA+@#ZWzt-RL;thP* z`M7KIBp1VYtpCl;J046sUn|D43q!yC#WQYHCm(94dloJfbT>ghe0(Gnf_?C?g7=SX z@8j`N0E)Y~Ug8&t{~LyX21Uq}9*h3b4A%FWnJw2j9J+pcs6y6yzBJi*Qh+&u$R?1r zXG#2os?*FN0~k+M2Lb&oa4holZa4(v)Is~)3?v% zNLV(x%3ZK*rR@W0`&RT1KGmG<1}7bVPP^0DHxigCD?j0M=3u_?lfk5TH(KQ1=q#e@(IpM5Ue_kcZ` z!T-q@;U&nBzaEf7?7a@1@D|+Rwu}s#ErYBDL3F7`x{IUG4BsRB%{%!-9xVmRx7hT!Yg_x9~$8UA}6v>Fqdh_~dcZ6}0}P}M1R zIJ7&+e&mX8LE;kBqIN&CXX|&^)3=?ldvY16c>Q$hgE@cKPfu=H+l08NmuIy{p2Sff zal7eQJ|?zPuC0|V`zl~sVu%;k9c&{=Ia1?$S8tk zpG*oE$~jDUTYqi|I>ALMVPO`m@LVTzG)F#goMFgI`;{=yd?JQKKrl~pHDye`;yp}y z4+P1FG6ExB%5@L&io-+>3cOSgH zV#55jCtjZ}jl9fgk`J!SD3>r{OwufbM_2WTem$pVvtD4>^;^N-z943Ov2dYQsUTn0 zjG0_vB<1qQR_M7>fDUu~HUH61O`&h!jU3J>?GJvfit7H1&UoaIY-F?Xi6>R$b##BH z1!wuaaHr6aIQ~0L`Y*Ge$X>0ImbLJqbV@@UO}L%_(EXpG9kgd;+UdHxv_`V@k_ex- zk^T9e%jTM#gd?8)#>CL?n{iIqHgkF;rBLuD=`}K``1;)w+!|e*%|XiCvGbAcPjXgr zZs1)cL|9wl+rKcFvw5(tSC(Y?``?}Po|zZcxk_VK285P{$~S+>42Gm>q&AGQJae$Z zw*6~d43~bt)+N!FwttPkPOu{mI%pRa{L+?RtEaEWi^R{7L6zcf4i(PC=UfOCSyvak zU!ug1Q-}|%^e<RusdJ3?)7QBK_v#bc)#a3u=Nc(`qn)g>Zt%YSo~($1Q+N*zY6OmuZ_^3U_T-piqOC)DnxI;P3)Gtxz}A&98X%`IRU1qsy;@GIu{)1jz1A1sXItq zAJF3}dyY|RKv=JSjT*l0&-D69UVV!`j|fl8n(6l!@aR?gpe4+%GRsK+S6+Gy)77{L zf{z4sK)Iq&8EA4Iv&NL7s1~=E{u#qG#JtbWvb3i@Z~@gX^P2vx3u(2j|KwzKokb)# zVnu2_8{)6l!JL)zp|jn3N^(C`d~5pp<(X9-OmWElFDjDd76G~ZL(-L8c7NC>b^m+f z5*gZ&$fU=tuBH>;|NUJITozP@-+mS#!13(ipc_0`m%;MNIz8o7>#ek{zD)wf^1?9h z!V;TsPF=f$Q%v`9>WI{Twvn$?W>!bt-_+{Vgjy_MqdXgWZ5^-oVhfPQA3C*z4ct@P z!M*qzMdRkole7RFbaodCivRGFu2$L1SPoPB3z&-JoqPbq85(@dF;fe(1Cups_ zr>YLB>4dY!il}70`(dY}(=tWu(B5Tl?imV84-4>6q~(`4fOH2`9W}tx_yNC6IC_%0 z_T`EokJbg@VTPRZKB7MsW69f$q7|p0zK3_WoZ6Uhsz*|RwivJUXxcsKjg55pD>FCF zpg*c;M4%a*Vo`cI)@_&+@9LUUaV^=XcWs`%4)&Yh3r3;907Hk=@Xf#Xcvm&)&^g{B9PKabGC7I$F(#L*P;yU+2{ZZ=;3Lue zeP-{ z=3ffF<$~B0;;@PLodd@E#6tvdzCB(iCZaw*qF%VJ;^BB9*RoXE799ZqRiWYX@B#zS z=!*@Bv~wFXAo+ZyJOT3;OUE(k)7*q3ywD4Ax$7bb{#av=!%}Rm<<4-k{*O$9bo_QJTgJ+%_b&q*P-_b9aJRrJhX*Z#y3Hm7>Z z>h0E!gLU0ed6~F%)$P`**^iJktl)~V5IwdCUz+arGVJwybwRTlh0wVsyQr~swsiP> zpo@)hA>Z61yib`J3MUGJiVv~GZPQbXZyHT+YWIV?bZSOV zMuUl*=ZND%v>Et@W+_8G!VF~)4I2DCwA93}Tn~O}e03I5{^c3V@ROR>UHflhYCud2 z;zP&#nOE<_`8)*}N2g4_^yLwI^nQ>TEf@AKAort)25eqFJF!%IPdAJrA%J!-YH!xk zMT>%Z%OxbG266jxMSrYCC~FqCHq@1LC$4O1RHd9yIbF^C_OD7g9>gsp(bfR&-}?ds;e6>k-iV~Hza#dp8*A^2#Cyp+7lWRjon>(ZBE>|t5wIwFNq^r*#4#Suro1w z&^gY%zM?bMp1&?s`eADb8|ps#L_Nbfu*Wj)`17Q~fc*-&z1i+|wm!cBXuBo*%0?OG z$f>iQW`coc-1z5aXNEt?rvf29EVo31K51pqoy}?|n*62%rcp6x^^lyBCJrqg){Ou` zh&&6UGtX7qiZK*%CZpm-G$LJsKX#^6;Fayf;!3J1UF44*R_HH>e2nz}4max%Hn zwt~-^ZX>}CyXEOs;QW_03+TkRY|o}yEj8=j`2tKd?SryX4Vx4joGgRkWY`n}r8tjI zxEK+p7yK4n=-sn4#c%)4i4!p(La5M5g_ZJwN~`bZr!@YP;~nUhi|lw%9p3uLJHmOz z@Xl3xOhmCWdELe!nQ)(6se&=H)IqC1;g+f+zVU?|(-3$4UEJz7{prayB)fx8CPxK3 zouhry&n=L;h6`Ko$rpXaiD<;wyqcA@^yBEK^#?~3ys&SXJHDN*UCTm!$7Rl`<9S$4 znlfN+{_z06M;s}FHs>RPAh{+I*+Q9!0Ul!8n_pPj9jy!$8_kI89E7an!na(-%e0uf z%S+|2<$(h=#l^hYRZvg%CM(6y*ZE+$qO-zm!Tu5CNt|4q4*9<92 zG)(YQ8nuJpN&tH!lv48uQe51=m3R$8xg^fRhIa9M*mW#xnN)|jJH>GXQcfRNIo-o? z=c4ALX6RjATJEgsZgu~3TVVOeqk{wn`^J;314|iPeo53~8vIp1*S!Ra5@lOzbz$Y^(F{wB%RCk->+sQ5h8eMTBe1dm1S=+M;DWiqT z%GX^kMWX|(gbV`|=Qo_g=6O5D9^y`2cBWBw=0izzDB@CwoHH})EZ7z#yH09 zjy2+;1#c4Q(!|0xGw4BJy6YZMdzeu8(D32`P1Dsc>)w&nyy!=vcvYXe6P{)7erB5K_-PP znyBJ!yU#Kk$A+paARa;f}U|WUQbD2Y?@+;U@2v%(xL z%BCkA-9QtbAY_l-FsRwMeW+pIn6lN5JxAK?0rK9?45~Xp5V(okcj%~7Q!Cyx+;v3qXofsnci&I66iN`9mJfSCSlx2WX zrpEYYQo56|uXhwoylB?i%tQd}95aon&IS>@;z<}lXQE7_+6&0PqTa6NxCh~eUN?tE zpB3!X4NUjpbo^4TGwb`e)j(i7MH**Q1i&#rjUjb5-hONF$lYy++I_gfcT1&jiV`<& zgTZlEQqvVmIzp;_}& zCD&}GXX>3vX|aVr)kj>(syd#ph&nMQI10aH?1pxN-g7XUoA~u(bHG_GZLZc|GT0E4 zq_-ba`HI@QxN;stUKv;$UhnK4|5kYMf-ttBy{wr^{_X=NBG3u1j_(f;18Z=I#Q#{L zK!7v1P4>HhaKl4_`KFR&wOHtuIejA@P~Vg?oK=-S<;2cdhNteSi)wK!ODap3CWsNp6x#68D<%%dF1cDu+YF`+ z6RvCM9caqf#AJy*Jx$a!qFLoe5>xxNvMJa}ok*1JqJ+}zgZ2L%syKbaW7bX_C>yEp zoTrO9O??@wC&D4aZ8X0Kn2q?d%GW5%GU|z!rHZ5xm;UuIN0@Uq@`IP}a<;3!<(W zU7g2EUf%p$Ep^>*Wpq$sJdKU=LHQhMI+He4Dp>&glde3sqgOi-v}bfO(9D1qj3SCH z=LaG|vx2?w*_)fmjdz)&$I+1s`0gHn&FwD=v$cC-vM~)S=q(7vZq=yT^;>Ob;|Z62 z*ZIA2BZ=bIl!{~aJT+GN+j1ZkOdumf;47OI3?2Tm{>wLJ@8q+$tl#AcN{vY3LOh8# zSp6$za7HI2Io`5cGu4X5y(oGD)0foGFYCGELSrGy0HVk7_9xwd% zvxOds)evaY_4O*NH5jodJ6)B|lV%_#5*p;BWa&Es2kWNR`Rdxi6;x~kx>Y*(D$9Np zRgUE=AQJ6_{%9?|?1-rql8{49DUUnaQ7(h+*<~dMOU(3bvHGd@=QjRz@{bsd=gO-< zYHn^7{P#m{8mV0R*Jewk)@m}B2{HI)y{a~*cc2^F-eaf_%5Aqu>!ps8j*EPgpL>*E zon%mNFeh%b2oU~K$pW|wPrv?L8dzOr?z0;OmDx>-YbO|h=)GJ#|4MoA4ERI0{8cR ze7YfOiQZ?I8dIEQCj-F%4O$ZJQ%LcdBAbE36n~gtXbUv$2A0>;*VS6|@Oh_x=5*83 zBSkQ@fOqh0utqpto#a+a32@sZ@MkvveUK_UFE+ZiVR)+NQ-t284PY*$!heCU)BU_o z=4g^QabZ4sMD;_(OCFt|;mu;mOzQT>v`-V+ZFN!cSGdCyOMxf6xG8!SJKy+`u46aM zYCS);vz#eXi}y8~mgJ(NOG4I8O^bt6n94e}!_n`5Z5LENV@^}o{qf;o;CC6b@>?gi zc#R6jNBZ}VM@_P-kR{yGc$chcB0<=5IjY+s29_?LT2b)%RBTO1MJsZn`)@9>Qy}+B zM*7X;)Z*>jN_*RCy^JHV)|8|opK{fjongzXx{5$C2psFCu#<(TO_t2UQFV3M?X&$<5RW~d zP!%2LEw=n&2y-@B>f+twJ?N0*iVP#ql~ni>a~%^f?(0a8Rq;^swkpNh^iFd9_gAYF z*4#p}RrAyHprqdnZwy-6aPNu8zL^GlmA29x))Eb6Kh0`Cbv&%bxN`n{t7~T|Am~zu zy!g7rkVPOHW%$@q2vW3kX3b+%NB?+D|Jvm} zzV5eQKdCq_r@Rw^Z_Qyj-ql)w+t`OZL6T}EuMRy9P}W`+3ue_iYZ-p^RrB|t%eyy@ zBiF#HInN^=&@^j4RsebGgPcp@3JIJ@oTeH73F(`Qo4ISSWSj-S9#2$vo?I z?aL}a>$>Q@P?D-iDWp!3F3Cq{ST)Zcp;e{s?LPkTKWc5?N|#Zb|0jz2LDcVgj3OJPixR>`%$C$p!eWKb8h0?mT1QdvqirT z&Rh)^eaBNL70hG4-pP~4G;CQzzdig_Y@|;{=a`L$^cL*pQ%rH759o^r%!f-M_thJr z5FI7yeDs+71=H;sPi(Pxld|W zvL22bsLbvW*7sun5o3S;&tA0ZyZ9P+y~_t`xchE~?@kZMF28)%dpuoeYG|z4ckE<+ z+35i7x}U$m0sfw39bT~nQ)Q+Q))F2*H`CSh4{xR808L{BO?^vlyRO<^t3}53$=zt> zDII;eX?xJDo5vr8oL9;;hofK9LtT8~QX^SR8yciFfPozLrw(=!we(pxqUBv@h z^a9GgHf(ly#{+blLr&{K0>{u?vdQ$=84;S)P@x3^=#FR&P1pyIS%!hupfQ*elLi^7 z(x^f^mG#}Z>CqZZVMIxHw0QEb!?EV>R}3j(@w}XbZQWf;?pz!o9uLXZ;iNxkK>H*< zu8WnKffO~D-kxKV3I@D;5cD*}Ne!#)5PmRxLP)_Eynx)tCTcELpIra@I zrgdPo4pfqykJj;vJB$m?zRziR`mt)FIPt7X=VsoZv zWadQvB(h@gDBO?%N}`8-tHX}Jt#D?K<}FjuV5hvZjst2JOz!~l@#~rJFrtwg%4#>P^gggUHCp!hUL@IwkTB^I3u@uqg6Z3PP7Q3I;VF4t;GNTSw0S zekv6RAzLhXTzQ?yf!9Dbo*6cHLa~y5wguD%97*)=)vDhrqx2ZRX`Jqhs<{a$t+;tt z&lc6tOi0JlA-Z=zB}iSB$9NpiGQ(QyqGFhrVt&Wqrb*z-d0h>VsK>c^wn@AQK)w~7-?e{1^mUVcyYV3J zD-K4a{>097pnuBEC;nJy&2`8XCagrxOz^gW25|RKjBQX$Be_3YHNm+0=w(0hu`33Lf|bh+tLxw zONEC;;76Ir+PJ*X07Hl+)V?X`p78@k>Tjmv8(^Ngu1<^;J>*O^UuP}8V3nKmRmjWO z5I=eKSj|ow^v5VP!#aa6GUzx?qA@L_52z->_Z;mgL5t3zZ(FX}%*33l(yMAg7{gA*tp6cI+GK!t zu$nZ{FltRE{v#r4%d3zggW?OY<-#M#9{A!(51iWG%$eC!`lo4vSni0yBYzfzX1!6xGp21ku?usMR-@j~;xxSP*wJy+D#R?X#gtYJU z7$g?tX)2ZDBn7q#A0HAv9<1bycDz3I@!B`N)2?j|`F4{(QP{;s(kro%i~2$SB#Wfz zrW^a!>nHjZv%w~&e4=xY^=IBB!;;yf9L#?=%|vP{dg82qd55t+s=Oi8LoU;hHiM>b z;BMtp?}nGim{=_HbzFTHEaiGx8nsp)jPnX;Q&0S|HB05O_@kLdjK+t(NM2{3#Fc7$ zcJ2*(&1Do61hSZo9AOfuYv%sEy3Ce1F6UK;ktk&wBDE~VCZ0mX;j($j4JvyA3wsj= zzg9q9>I(&+d@B@)S9}BT^PMztppyB!H1*6Fk|k_`Q^{aTmUpDS(w03@8%AB%NDW_q zMaTeZC$rqA6z?&*le^GL1z0XSrVmu`#@vYy8ZU>+BO>)%%ZQT~IgMC8s9t=}gNdrR z6ZMEclZ0+L)=ap0b?72m^ak7NYOJgs+zhJEs+@KYBe2WYF#-J_6 zL@_-*!Ih3R_J5s`#|1o_pIKI$bAma(padu5uI27^8o_T#@_17_@$XGmM^@quc&RWj2P!Dp zd4O^VI@ot4nmm3~xQ_&~D7n3pfwNnW8P;1EyrXwW(iQYXG3ZLx?Kw{Tg;(5%HEI`@vd?KYb$p^ziUJOsM*$>74~${oH>4W&r! zI+4g<7p(sTmhT932XF`6fF6*9Zhh)*2PCcfNq{|mJ2R``tr)+(zXt@sP(xGuPiHKY z$(TnIAiOJdK4BvGCzDL;Ta`ILWB#9Y?97~vhpKF)nbzS$GX2I@$2JE7pKsl4ublro z1h?3yJphHyGet-T3)~A9@TIK*++XYaJ4qrS$_+mIA0wff8p1V>Q7DbDj$E&fx#!bx zCXnP*NlWrU&!%fvJ~lLk>Yg52`GH_$i#ug&m`r$e7dbdf7|KaZ+1)&!eCE%#vdi&8 zFTa}HrgOHl(Ij%Qa?9roAn2x7MU^G-0{C}@2JR#ehFIh;hAuU48HN6N2i+bh#I!#@ z!|`u11L78%0qXG~fQ3F@%x!?z68V8(xN#mZS(x?CiJI8>|2kp|M_=9KraiNc7C@1a z_q_@XQkqAj16v0GQC|VL4!}jt$N(rsae+o}EThqR3>=)Dy}+dlj?EZw)Xg_@kKok% z{^)D&2Lz5@aBVxjTJzf?j~cS6DI=r(9q2_*`#V5x{NS!)11B;U%RH>~1@hMNU@k!N zW)Y*GvBsBueW5=?+MIYl-nn!rUEMMz{WQAyHalI~$vgH<2$o-$F`M=~J!y7X#v#*@ zm35vWuc=B^8_amyE=NkemJ(ZMs3D<36^;LA6^@NP>6C==a5>!b*aHBP4%Xok&o^Q-MBGxI#IF- zklHP&$44e)2=y`k`&0*${yEB5=91;sD1Nkv`7Zw#ov5BZ(!a)i<}U|UAfP!$mw1(u zxflkei5NzIhSI8$IIse7S5u3WY9vm>j|!=YS*2h}pOKVmL=_SI%}CEjPlZ|XTR_TQ#|&Otm;0#9C-DWsUjx0UMWoaq~QZZ z8q|u)c0yupNDIV*nes?g&qn=q#qm2F9N;u4`7<3-1b{MpkqL}ib?JX(k zE>7X+Ux!JDYFb}~U=>6qgHoxqR7u%CwWNyK(_l85?PAz*1j?~Sg|;R$xQr>ueTH1( zv_c5=7ha!b2D_52L?Xc39V2Kl?L@2a-PVF=v{y33xk{&=xcN7$yxb%SaT{IE`})Jh z?;62V#ECCY*+IQ{OSe-j98Xd4LU-sak86&N`oVgfovVbHK}xBB6Vj>Ns_QH*jBbKA zTVd4^OG@OgNF>?(WZu|$?aD1CR4BfAHJwncuBBgCZ_iF)sJGvpS!+2^a=|jxSeCN7 zoOdG(31A$y|NC>+5(n{uyZ5aaS*Q3|2^x>n6)Vxfwk>Yfkgr}S3hmXb^VYwHry|+A zuZ)`C| zt9GWT@Cs{afz7dh*@n~O=H4B2W1nK52AXoqJ?S$LHsHYua*HQYdFUkY8^rAuQ&566 zh9u5=Ub2S%!1#?apMjBb)7{?36^V9l6m}eENnQ419U_T7b`7$jIQ4J}J~X`((yStuOF{bR(vAf^$qoM?K?#9ZC4zd{FuN3$%YMtV7!C zT6CCj2z(Cx2cfjvg0J>5b|Z6+eSe3C@|ZD817)zz6%YhLt2iUz+|#VbzqG>LggMax zrix*2CT-11(l9`v5d_l^`eJ~4y^6i0izJ6E{$&6Y=w}$(Uz3hwhVumYK5bZVYWh7hvuCvf9hD)ETu%96RMdE+D)IS^5)d2f>UIia{tslaFnG=8VcE0em$kMt#zJ= z9D18NpUWQ^2u+;);?_!K&V-}&0jUADFHKzV*w3k~NN%lxN(+ZL^S2VGeBS%Vdd-rZ z{{E(jjjk{Hu+> zaP7i0c4d3AL&@?f<_T!VbM?_vYKCQV%ETNVADg+Di{hPm+Saj@Vyj?NcEXK}&$+B^ z`^w(C%&&%YGRa>54^?Ls73KSeYw2zT0qO3N?nX(;p*y6zBqXF;96-9HySsA`L{hqj z7^E3G_V@emeX@?E~8IsvV@1dI7M1 z^e25AFCh{s)5l3(b%yl1Y9yR2Kye#=@?r6`?Znd%rYt^BuM ztJPaPz!QJKZfXqNyf2oo<1vhWNL>un>K?f`pWk-W3=%Td4o1BP)u2M)4OAfAMW{H! zeU9{^eslA3>^v}^CG~DB&Sb)6F9we<+8jBU$eM`c$Yuh)2`(70-nPzS@@!gX+)Gk& zgr7!%_GW(N(AlQ5Tq|@Jd2fF5tju0tp+9A$UyVc?X7Rm7rWdS(Vjb3si8b} z#-#59tJw^7doJefs2i2vf0oWB!BcuPdeY9m=suY$<3Pdb%EFQIkzh>k6cs1&wQ$(Oc}Cj=eg5m^QmIbKAQ_y)=HJ1Kfjh)FN+%%k-qMgR zt+23qn{D5tZCL{l3`zD&o}ph1{Cp*Qfy0C1JP-utM4XW0`^RIq?3U+G?;{cLD&*o( z$fCh189|aBvxp$s8L$y$`gafx%7SWi-Wf1!cZ%8~?|Nlm&$_R7m71YmTZ_lp z*|HqSGjmL9?Z4qqEkfgCypE__T`rZJrG=w3OQCGh|3#;mRCH4!r(0>PljMElSS`uJ zEN|I8jp~GPA)O)dCXqqR@>>x~22m4X!_SgYtSifGM9*4n{_PUnqn~?Bw53dDRD?WO z5-kFxAFIitkJ^Mf&xy7SNoCIs?E0t$)vL=)c?!xsltoIm$Z7jR(72+<@ual~ zvoVsP3M(bFYWjsRnk+nyM4F-DzsXcb@`~2jgadS2b*#fm{V;SzSw&>RhJh5q!r z>3?eDedg|hsaBK9@4Z5ua5@vtvOLW8x=a^VJ}w(f-Fqbv{l{J`9*N$2vjq2e4Wps? z(MT|&F1Up_{k0z82NXv0a2QAl#oXnTIQTRxZ`7>k&KG?$CRuPiny{7*t1y7i{KNVt z4DDLrJ+i`m0h9X^zvFsWa-6bv7qE;YD3#pLmV>*g+QuB6Z;mEyjZd2meaDmf5|rLr zVBk#6pB-u4Oj!gHmbO1oB^j`7v@m_{f+9@#%&YrUh{8O*Ps+devk_r*R%lk7U}YGX zx)&2Y!#@(n@VS2yv+Vd2OgWg^gz?u%H$<1>>)UyC*^ycEjgKt7g)wV-vGK#A2!{av zy3MOlGmJECtY~RQ`^fed2xgiyDu&5lS3c{j-KmgzDivaLb=32q2hXRlY^=Z#_h4`Q z^%TlH`PERFu3f!j#g-*g*c08tPV##g5H^92pX|;-cVFHxMu$HFEG#*P7WBYk4Ok^i zT@+^$hC+KvQpPAM`$v#Ns(f!NuO(U$A%`3{(~XcPE1`ob02X7mC=CsCiPZ$vZh&aWiY*IGry1}LBST*8uGY>|-z=!J*yQYtijDuSaj0qUgv{;u?_`o)jR zNGEIO9N_KF@A3vbC@Tj%=!y5!j#x%&?KNv!=eNVHIB}-D8R7^EH`I}LMANg~+2d!n zXsRc3l2&T&%bp^Rs*XGgJPnXMV|k2Klxpn(n!cUOF4(^bhWGT@(t=DSorT0bnp@7j z2&6dAmlY^d`e;&k^jRbl>eHc(jnyxt``|`O7fCdu&f=9=|Azk{(CLFQbdrmC&bsHF zh5u!{jF&0-H^1b5$CckcwusL-GxnmqU&bMEb!9Doed?%Z?ON$O1PKy57!dYs8gc3b ze$oXMza5qIM^M1}#Z&o^d$mrOeK%=U_QP4h)|Z!!nS#J9FEOB5Rg-E0!MSq#V{bJI zUf>mQp#(I18ix(Ue26h)&2hxPHEAp|8G^=E!#clq)bNC4yJcV6RA`J-R^lt?N_}L+ zy?lPK}ZioweTT6fLn}OEX;@zean*GhiwS zE6_!FJ?87p@yIpaiQG*)@0HmPS?CstS2mgAtXwzZ1V$f5JI1g8i22PTL|{}*-W&Fr zwA2Q+Y>>aqOyBrtUPSs#{kOXG^b@>%ar0twR&1D8Jz)cwhZ>8@^dH{z2r^4c`HO0- zEq*OJ-U`;KJT;|=3nZA&idKY6B(4B17}QP0Pj(`Ujkz_IIZ*OcqU6?G3IcQ&VhF}4 z>p}@gkvH-yQre&QE?!CeN_ihSh!+V8DMH(8R5DzUw-oIwEvoCCbTc5{sGrJ$T7l>J zRH8ax{zaqlHxSF!V1Z8ut`X2Q)IG$Zyj)V@sep(jdg>*nM9&(b0gnZnT}(hWle2fc zsHEF%aJ81vzX=y9LD8W+CIr>w0Pjd(RyJ=7kl0J3pcd2&#Q9(c1_*m?WMDp_I8v5} zIQKP(<^OyK5D1HO9Hqk3-T`8qV6qz-vc;oC!)n~cLk{nqhaKQ<6ZT;W(M3%D9}bZvOjqXXh?d)NC2+rPbep`my{d4`*r%>Fk7mHkg21Z;e2x-J&= z^4k(E?tnxz&O|eiVMhvVu$rxVOdy@pnV+e9)D;NY(VeH|0t%~x@7Q`C2dI^?RWduq zXX?7HCz`O&%7NDgiUUN&&)E~w?KIs3ZozLza7NZ-+JO+HTx*<- znP=Yz)9ca|>o!eu%vwT&0@xOlrP77{bvd(Dhql_&#i zx*rHY1F0Y0wES?7LFsU^MaqQ&{+)P{F^t{(O_gKFAnZ0#oL`0FyH| zX47%pa7D{ody`iQumVDbm`+%7mqxQb{A&zS_$N?qeW%M`5hXN}k}rA2-s-;%dbqgp zhvS^jxMGnl+Gh*^Ux+P$=pPc>*X97*HN5gz(-@2Kzq1_s`qw8+-tkylA8iTj{QsCs z$~syl7fE`G0`n069y^bh4=QPIFy%4YXNwCVi=rR^!)J2BTz&PqOCcXJf^&nBU6AGO zRfqTT?AkjtDs?S`a5zr(9z7AAWYo&kor^r{2ne=yP=C|j9=35wY5|xwyh~EMJFvMc z!roDsggNGVRTGu_cQO#sR!lSaSM*rSNQxugrb@_*cgDctAT#S5a2U(2UHNpOFnNIu z@0sqXg1P^kVwLvsPp1|PriVx)J_y-3U7h#{QbK0{N-BTuS6t7LI;RP28E7t-^|U^4 z3NR{4$zNAYH*(`#V~hyz(ip2*?LmxBE+prF{%EKhISK#L#uG6Vu`OBqut^E~diJJK z)KqUNn`E3PNh4O#&^8PkGcye)4>V0{H4>quGPB!!x29|D(M)V+T|g@z{El9(@`ZJt z^jp$#Bme;WU3@kTl~-ht>o}?2@~gv(Tfe9Qm77M zw2Xw=<~o|jG>g|6IeeqmvKL+4yVX@rqkd;!R>mA1a_yVv#jkDk)d+f1@qmYIF{G6@ zNvv&0kZu{pkru6T@-RZK)}#i|dhRW58PE#6?Wj{lb*bm%7kx+s!4b-H%3Jm7p~>S> z6e)ql7<B}*rFjST#rSa>4mB=88zERp4T{d8k*&A5RHJ(P{ckeh zP<;7^?&O7P341Ab<}EVX0B1j-8q*7MDx)V3o}w{+UL{Hecswc9`__zcM4p;Gbs*&n zoMiD7o|CL5)552?6Re_R-p|6NCqTek<5RQ?2mPy3^dS)_w}qt+1pot)g$nQJdFcUl zQPTy11MZB+G^Kz%tYq?=-nMieAi03NJ^1E-&5jhxCFhRlAv%#@naS&;04$K1y97nY z0ZvE6WHoy#cN!G#tDO|2F-a_w~1Ack!FzN4oU`pq|L<) zqn~XAZAcmB+Jll!{>Kq|#zmVV-y5ER2KxHre^h>U$n>Ub8ZMs$sRP*tcy8v@u}yxA zoZwL^%9@D^?%nql^-+WMm`7?|6b8>-(oP*^kK~XJ0@BnkXy$mZ7Gsp5t=Xqhr{SZ=A(((V3MF=fsd1H(L0d7S zdJFE5zsf>S>|0xz4iDIQPN@B4TniE45bEKc+5q~Mx>x$InM%a^FGT01h`>UonZ^JR zM{U-p|NKwI@3ORZb66-OV&BZ89by&)H|V~2SB{wmLGgf#al z2tMqiY3>gl#&}nTRo2;WUd|fdbs`7TH)l8j-{=y{y~>sn*@uUcdLuPOJeT1Y6?htiOws# zxmyeQY`P}jl^_l;nOMl>@%{GRkuc{(h?X`3^={BE^7ddVzaG_-aeOs28pWPQ2G)6+UIZJ#(TjQbh3G*LHJ-RaH z;9Zi*uwBm`ppST9imDQZz+dG(qrm+5A{i}l7MO0^%-g*=2PQ0&|Cqc=x-xgqyxji_ zOg=ztYQV$HTeWiT96pKpO&QzBE>hUk3e7X6c#2+DtV2yM@((^=>esS6t%xhT4|>5< z@|-Qj5d#piSG@-`PT0#4YN1(m3QwG&3$K>8={8lh%>I2Z+@VLYRB(R<$#5Gg8K&vx z!C^&#ovOAB>QnACpNH19l(j6T#AWo$R&ir1d4&ju!K~c2J?-4L@LUV+m2f7H>!UL# z6h;b|kf)&oAx4q|8Ft;B#&5?WHUU}1KJbB&XwEy}0e*kC0BG?(b^fUP*qoDHf||kC zrPYqI4BlU49;*~2o%k8ALsLW9 zy5MF~BirFBsVm)H)&v{3aU1DNnxfVaif|a^s{GT4J$cwC0QP?G7HvncD z1tD*8%Ozi8`cE3) z9n#0QsWjFNBdVN-m2;xzLY~gQK08puW@)1pp^mUvF2rz*_-A>#S zHAPK3#L0`w#CHtp!~+Z8!(PG3f2RFf(s~=a9BvW~`|#EGE6UGexN;u5(*42*kWwRZ zfa4OU%lZ37={#S0N#Y$|Qq3N02&-r`CBHx6jjWx>=wg1OxMLY&%4>|XXuSR_q_`#X zn-SYmK(Q5$NeLn%rJ1@IyLeaSjoimP&LJJt{R=Au{_S*3PHe-HeNycl)+UOtpN<>S z%zfRumx2E&T+oQ6uyB%akdPQwdcUZQ@SnnMPS;Y4gO6WJ(=atD`w`n8eKblfPw@2<8B5xRy{{VQVY>1+C zjYUU|QajS+RS;}l-Gn}YCL2N?>6xst;GSe*LAH44_gdC{z%@rnoyPQDv$bQ?`J4YS z0|3JTPOf7b-z4*yFWJ(@;TIQCpXIY_{fbGw?V?a(DXc(VitUNkyaQgbm*g3X*(Wmd za+DvO*((C;;3T?It38Cj23YBhKqH@?#<|{AJ~ie3lPg+wjfCxsaU~XRspj>4uvK2n zJC*xY1QXDxI9B(@^a3iOMD{(J7KxHge~kPlQgNV`tMe(%_cNm0<2sht{D=%AHRAOQ zU?()E~>>{|;oLWNohk3M-R0v)gYzympiF3nrgkY$-Z%L)**M z9Ni51oKkqtkjKWaSj$D@B1|MHKoW1f68pFGX7g-c-D0nN&EbU}5dvH{i1CDQlhK3T z@hooh>VQDKYdJKr9O#IZ;^9tk>;H2BQSJe`;4f7rq3=qz zn!#eoW;hW?@OayqL{BRdlWFvxHM2$FPq!|&C<0T=IwW(wYGI8v@@rjo=3WF84tu*j zIG*TPfm0p~Rp?5rzH$A(o`8F)u88!FVBG2MTZvGpYuEXJNxuhaI9-+p&fa@X_11Qu z|6S~^#aXnMcFs$Ho{ef=5*vZ{xl;W>d>OC`Jc28Np20BW4L^17RF}F(#xRePR@29n zzKg}+YdXn?C+-5BwJ`$lqH(5TQO6fOlWb`~y7*rVm|I84HUiqbuge_l4cPaH`~ciG zje>Hob(WG6U>IuvYcya9D9Xy##+d>PGv>Jg(i%7e7(IX)N{nYQdG$bW@#LbD>|hqX zbFDx`0bNb`mp?uJ;%0z=CV)V%rLRF)xU>UuOlvoy+$nHs$huSO9&dn$kGCGS-<4WR z;v9K9d*77o2!OiUNc;T>+ysj^mqyj;o$KC!1K=fwL7}v&3+A5%$ToJ40qxSFA{j*B z?IMo}l6TnIkFO+wFL@ymQvOd_x80{fukk`I!d^Y4c&;$Ajfi-$b1>I2Z0@Jktx6Ob zLo&>ORa`cbkfB&3pgs6+2M8pv>=Iswa;k?yhd-|%1GyJqL_+;8h5}Yv_}PO6)@FS$ zq4^RX>ff@I+ywH$;wbGDceJCtm=}=+^|T8+p#YmKfJq~?69I0NbT|jd3D;2|K%|(L zgR9l9GTV3Apr?F@qb}P3YJ@3kGqG4M{QGP1I9;*YYkFr6JQLSC%=pBc~!4xTe z50HqSQk1|sofYss)MXbZe-eIZe;Jak(a@am0wAuTZ6_NDF8<4^{6p^_U~Q7#aFab&9eE;ab8gxu_oHEgx&MZ?@k*ePD+sClB@}2%DuJJ^_ z;=hC`PWq#qTp0bI>d_&wGV)&071UvmI?Q}Tg#-}v{3c=HblMiw6~%hhaM#$&@yTS3 z1c06QZm+34I_Q`3&NQ7aC-_N}Kl{ru23t|xg>5@0McHdvGvhm=oi#d#jH$Al;^uf3 zDM31ZXj7M;bsE#o_mE(W(b}BkG5SQJ-$72urV6%cC(cpjzp26JPQ>DW*z=04%$nQ! ztZ;S4&GRPF@yOLtO&S-Vf{+|Bs zS1~_XEvZR)a3p~AOSV?_1Q^9&fk_{VcBLz&`S&6hPmZLezrMbndN)UXoL=q%+`nFJ7Gp=T^l!_l)Uv!Ds zFEo6sZ0j%G6Hu!zwVNQ=X9$iJn0Y=^!yWBV)&OByo#&W|M@@!m-F}xJs7MTLmoyFj zN&vQ1@arPmn$rAa^!!Z4lch^du}zQbZVUD_Mt|mG9wOxEU5<&<4GOl!^uXe?NJ>cN zeYH^G>9q4xAle61(p6XZO5`=nbvzCLRu*3_ko?XpR^3_vhbdEIcAYVB?E;)*MS8+{ zby?wtmDi+*4iKag%z^nRvbUFD?&{`*9z2rs|80!fU(w=mE)Ho)!ka(OIjQ_OQTJSX2CSFV~CYH4Dv=;qId1xtoHY3m) z*P>!=8buA_(tI4q+XoCwLB4n?}TmXNJsS?EmTnhXxnYqU#*I6KZ4n!K>!pNj7q29lhu5 zdW)l4m2>;=3MFxK|H6Lc*TB^}@6XRhx#`pP>4T&n!O~sC2Dh!Kyip zJ?#a;*PYB;AMv9psU;&avsB*bgt+E+EDXOJrL~e?6DoF5yg>>-2=bHvB2u6?U9zsEuSd%6TUxTjZz`v-kw9?niKUT`HyBicB_zE&NZ1KQ-lA>fJM-*8BoK zc*{fE0dm4NjRFE7R=~(hxw|Z)4kUzsdggk!PXX_7BX#siG~TbHbH2@MjKB&PeZj>6 z=bM1$&v!ZtU-XcS5IT_8KTIw?11SES!^$T>^sF6V#A%}b-+BGqd9|T<4gx6a+|h8Z z%ZsQvi4IZqW;?*8ryXxoAe_$(z=}{`^3BUx*AN3fNR*4J)$X`|yd-ovUA|Xbpfgps zretGr%@*uv2S^}}fO;aFWLBJlwf?5u(syqc`4By=G9#hcTCL$w#pr6tRfE{3Aj}7P z;?P+mIcS5{;Z6~H;INj1dfP?BQQG*Jx$#15`Y;|xH}F69d)6eF8FXT)S+nY)4#1ML zogV2M6q}d1CtCkE_lyiN@dxgy*)+ zxi*#6MZoJolSIuLUM)tNvi29qAA~(|Dx0#9+WAX+Vo%`tVDQw6@I{0jbArB+RrTyL z_UmQQ)`^$#1*3pVPh9Xpxjxd(4>q8aH7B`=Yd-JbGN7Mezr9k?+<&6w!#KxHWx_~g zm^s-dplC#y#X&ER2Ch^_>V6xzL_kF&O9IPLWOP5Kb{}uxhYvg*BUUx|3J&n5M!~<* zmWlm|+NM+kWo^YhR(oHF>P7|3@lGnhvK{0GGZ9Pqn2pH_;Frf|(bo$0VPuEHnP)iX zGO`Zhg>O@8`o*ei-mblB?A<;1b8hduY@U!P9b}bYomN`RM8may&IJNakjn{?vC?r@ z3DtfIhC+Hk4!I>Vv-B1k{@aV4>gkLzy;0l?r;8BLVydxUh#tE@;UhY$cOUa&SVW?6 zjJbuL|G8ha^kvx(2Ko8YKH_G8OqNvvOJ8+3Q*Lu?r0pgFON}u~4pRM&YF?a}ZiP*A z8`{T)nq>u$FI!AO2zv{cp#hc%jF6QjY;Hl@1(> z7+72vJ^r(xRD@`lg<2hrxFB{51ADdsuiM@T9i4y{>guIC>HzaRww*qL)6*ULDP$Nd z%3L)$bNWl(%axpMe*gBC+El6Eo`mp$D5YC7Vn8kdom?Y)I#4joCw-u!Ro1-1<{VHt z(Ak$j0B9L-l4&cp4*k=5qI%d{;{=&emMp6t@o~74f=mPJh+019& z_puNqOr=CT%`~I3!_z;Vq3aVjn74@ZSC=8|d3fBQnIntXyrp@3+uPRziJBKN*E$xJ zN3G)@u2L988cZ!eS~ZNVDsqn2$|I8MoU`Io7S&;P`ysORS1F4?u>3yv_%2#Xt7usU zW8j9E)}EF0qf+H2ZzlF=C|iu{)@FX-n5>=umEN8*X-wy8d+CSlEncw?#Q-{MIe)`D znkU@>UwS30yD>EBaZUfzi`ze6{zf5v!{4;Wu}_~%46-;RYU1;0t{#7bTTqa{VqU{hrbM6zf&dHEH2 zRS_VF0GH{WQSz9Cu@+l2xx}G< z6VIpw``-SKH4dTMz?1u^h(-IOrNVdK;IDWd#&{_vGwjIQB2n{CyL`ZjAk;A-z+pFp zN&WWYvdxq~5bR9!=$MQ{@25VH-@;JDZ;AEHrb7l`e&D~glNPxH#F19AFLg`rQF0y8 zfkT`;dNCVDRK3S$*WP#0C}%G&bui&4DMrJ~nvisjwfj>n`$XIQ)YRJcE?TvH@;)N% z?VR>#-Ia-ZyN*b*-R!VMQ(1YN?7TRwSbxC7S6VMK3Q~Pm1ZuQr20vIwI}O*}-z2J` zg9J)@(HT6?a3rK8Rm;b#s*ceZx%3WdvFDj@$~rgk9}~vk05x$zc`xCocZ{dRqDkZe3eqUk<)}bscmT%pn0A*H`A@BM9wWE(^t=P|bIP+nS*GHU@J5c3yhb0HKJD9v58AJZA*+1i z_#+mZvY{P{q)#QSD2K4kuEpzZi9o3m#8+ppWk<4Cdn^kIY8t9im1v3nS{YZjAYbIy zftb*_Qb+rXs2eZQa`zuc2Q`(#e)!-)fVFDk`(HCI?<9G?bUe)41y&K^;9VCO!e^ir zzrO#gRQOwfI+txPw}wPnCRwu#HvGBMyRG~!tvQEGT7o_RSEz7Tni6v^$b7uTp^56B z;{Le|hh#f-;*^dPD{lYUSN|bgo6VlL@ZhP$0+pZ;tDgao!Fcyf#mjMmE3+I=8?af9 z8^R^T3UPo@g9BozDx~9aSO3-BIel|#jTjtOI!dXNz*|T`p36SbI<=6O=2$UW)SXwXjW3jIR;oB!X6dL+ zD!3Vm5TA4R<#hCOiP$FJ?HDxnjjpEL=mq4u4=u#|2DYn-mkl|F%%}6ft_cs31?Yo; z9NbSW8AV3d%M-t?HVOq)|5Zw#%+;g(UuHcUI2UI_B|SWkFgad+U*-*;c3t@2dB0D( z&wilJBDfJbB8tE4{$o<30CFXUh}Km44ECz2L2pg7+$fFaeXi0%n9*?d8fvC5Y~h)N zRG#@N>PP7o-fMin_tGGh-yH$9^q>GBncC}6MFNyZ3HV0ohc-CP7+ovW+95{?WCZ&O z_>bLQ%z!fB7s_PT{9UPq|B-+5F^ac~$tLf|AP$Rr-9&2M*cz2a!lSwKK77-WqYM$g zxQ(an(Q{amSuzXBf0iKr+Q(ti-lRp09y6bQpvgYgIOZ|>i&40{FS@$l^VEu}LR<5y ziP!hurzuAuu=DabEk)#e_g}4=;r~X-=O?olH5!r9-g{{8=BR7$Wz8EB(swTcETzDM zSvDo%{}g8yZK!+M4)#5W6K26w+~w+LP@&s*=V*S1e@|72Ax5<+%^7VUcr``W4vyPY~m!v>ws!1<)Ir}!JlV7J*Xqa9#@rQ{$Sf+=tPR>N7mW2bIeTUe`7zYzwu3Jzb~>W zTnd#n*y|V~fOmXwr&oxk>=Ag5_>fZ_Rvq<<$B1tt(>+`AV`#iP{A)WsRySJY`HX8I zcDj^5icER`cFQD;OWLg-2cz46`+!JaWDQ0Hneu6VDeHOr*L6~J#stD!c3nU$p;=d$ z5lZI{UO5=kuho9(E4we8O&UP@ujs9;`GdIhOb^hewn#}KGd_juN31YV`;MGIw;Y{4 zN&k{}ETdKl8biRqr5D#QFOt?>OCSQn>e2Xy!)m0WyHZO8%5BO@>=3o)m@m}Hk;_sU z+%mEu0-YFHD&4jCAhdgdM}77%I9gkN7TQONPPZ)No9ojryhbUoG>ek=8LHeNT2B2^ z<=i~BHCXEJt*#30YaC!poFAa92sWj`B%!D)U?E0PQL9+n9TYM7l2(ElaZ}nam==EZ z*I`$6q0jmz!Y*Elj?n4CGdSlPg)OeESG=0Jf4%^EK}rF7ePr|wudp#^CEP2IzlQM- z30De7OBuSsDJhH@X&z-|aFc8sfS4Qy1V7Bhiilwr80a}QIfpjBLm&;=XUn~d+ZYTY zpcpndsZv#x_CbEzT#o*6RJ4u-)7@Ew=dYl-NwyGMX_lMWBuNCxQp%bcruLkz{2~*5 zhv@q!PKu9W8>qEc_*I?({rsFD)F-~L8O9Gz%27%+WHR3MV@rl;5a2ST0%KhkO&c&* z;vTt0T7Q`RP9{;dyenPP^y?ut&^>RE$kD0`KiM|2dMu{xkNgnHFntXV?zqjkGK*T6 z#56+f?W;Q@1EH>=nB5*ahWPKaZS1eJR<<|SQqbdmybO7oB?tZ)W^cS*&g;d)5_8<* zI9Keq2LkmC$qgXn(@fO}s;V$=Gsb_PAr>pzkz*!|K!d#ettA3o3u#|R+4B9AmOCkb zBE6-fWYvmJdur9j(9<}s<6s0TLs$e3EMKTQR+Vt^v^#iTBk^QKVU2} zX~If){7phP^Z@)WrV)cPUQtg2Bln?Ie@1*Z#)?#9Gbk^B{7zQ{v}2J9K<*tuK|iRpIH5h-2if2*4jzx|;YW-#8Bb&OCiFHZDS~n>&slks#u_ z-XUk%PE|*En^LcsafC+T{W1Ma@QFeNTqa~KmyN6J!`cn+QR$o%1nVL?!+u{ApZobcr z+rq!!C7&;>u-^(a7%SsZeJ~)oKn61(m&?R-aPvT&WS}!#@^Cwvw*F9cxaog-YMmqL z`B1Km?L`&f4qmso!&V=1B#bvlmzk`!CN?KA@NWmd-N$Ky7g8%qbw4S4m(QM>gHdqQ%q-|lfmIvU#g@YdK{woq0}N<_XvUJpORU#>&T_8K~Bt^FEsGe^ru zP4R_@&3|v4;&J8ef54=UC6%j`2O%%h6v|pb;7mN6AKSwQxpP18@*;R5m_W&f8En86 z<9(J~;8wQ{<>RBoCTSbWPdL!Tv&;w{R?1Q8m+3h>1BL&pI0jWAL`P#sq%Ru!eRfT@ zr|G1Bdj}OEyd%yb4QKAXws<_03c@mlttM!WW~c`|cN19sg}IhunVDei&%wQA*3$9g ziIS(wpDpTT6RFYei_trQkoN#azg2pL?gN8#?H5lpv_}SP{TrjtI(f}SmMB&HBQYN( z-lBsq>tR23bdHlxT=zo6NHJ4r2sB_+ADdmlP|8n=g$|wZyjFU`!)VjQM+C-(Qr`mUB&|p(Pd!|7zt2hiT_3dW#NIsG7=H3k;vess3s}Mc@IX zsK3i#3wadytzwN;4>iA3NPG@^n1t{Dd@MSlWa2)--}jwylCb4Il?w=od1P}ug3D#J zHz+mS`~{0?#21}Q_sV3}$UY&TsE*k; z{P>!jLGmkUd!!ief*7yRj2guy8GfRffO<~R_mfYHprxFN3 zcp3#q{q8!ahtf|7@XS+t#fNbE0}+9k29sZJB!%Kyh>+|h3naf4Ap=D~7e#Ou3FCx` z9XPD5wQ$P|jg8t~euoTxCovcMQ|a^XV#&^y#wXj`g*h9Ms&KZGDRNwSVd3`=%%8~y3?Q20Uv2QmMWTA)};G&afH%qoC zT^IOeAd1TyCP2=OoByzfO@6Bq1}Q2N|NHfXV)h~~QhlJ$Gu#|obFG}}BYZIa;gA4* zO5Ef4?LN|5$*!5%gA8u*|_5GB>kYAZ`TgtCsa?+Xe5l`8FgoU>CvQ;3K_WK3n;L695v^vgzi z{naL+Y;Vmyz#E@4qzC-%7Fsx zs26wxSV1%YC#&D^cv`7_e%<@HZ#I_p`|((4V<4-RD7NyD;_c)&E{}=Vy#uUJM5u2h z)bIotw)3#h?yezz&)@9;&#DwL=y{KwdmEabJJ?w9uU*J^%5&f%uMGFRS|}I?0-27d zdl^8lpw3b_h8vI_G|I0Df6t+kU4JrxDVnZbm0{UG{dI3L%~gPw(}u45$D8@rk+w67 zrg(PA{S3(coqd*#>lJ!X5zJK3ZfHvO`|`_=6Ia>29z_Bf|EcGNl>v{bOBE?V#T_7# zZh{opLjk4;y~{Bd$=O<_tSM+A_&~AW+{B*62R`Z`Pu1qw*EuzEoetpOcj^7nbot=( zpI~dmqX;>TD1N%ks=ommP(@waqLx>tW#&Teew{gbR$BY`x+Zwf{hw&as}ecyI^xlO z_Svw1^$x_70<_Lugj4H*5ev)%%RjiJ3X<&Ke?vgCdcee=&*ZeEWb0r@OFS_ySMv26 zpxN?A090XHZ^noSn6yH1+zIi%iT-@vTQ^?%p*@s9Jf9uATVw2XdNK-mImhgIyfGVT z)-V|?eg3C?+ui#>H^JnP^5=B9R=!4+c#yaGUor69ljsQ-RTrWO7W)LO=OH;kUtucx zg8yLMKr|rdjUr$R3x$@iu+{g_VOvOyvxxkr?d!Tfqq!h4s%!s^`SO98<2x&lJ|k@# z8$u=)PFYXL+Aj5ggVMnZTpGe+(D(J+48?IqfjD2>f z?Id?7TWJk`c>R}PHaGlVjKjDaaD&f9V~VBSLmlheN|!H*8nZKu{wY!EIZ<((-mZoR zBJ5@lm4QP|=ZhfON5Thoht}Iav#AW>;%w_&b*oN7;RFaNxa>~6DSR2sfHE!$jh^A%D_VMx=3+k}5qMSP8cF8kU4=36 zbU{xrn~m{J&Y5~YJhoi1%H2r@WI^n4|G}ccIii~nA@PTG2AvSP>WwmH-|`y`zY^3U z+ZtV}$=ed6xZPke-;q9ATMD7F3X)L7way#aL1O|Al6kJKZb4cx_SXy1n#9Dmg*83KX_+O>-I@Wt2MUq|bm(_~rcinxG!%f8&Jk@{jru@vxL1bu%j zJlN5~c2zT5YMX-pqp(5J*@bXdLdd{XJs^f(4-2F9miVOaEIN*5!fZEZS5NTK>aOgw zm+FWRO<D>*I1nva7hiV zNKxSJ5u&8Lg{sO#kLcp7JQT??k(tW-Nv8~>ZHC6xb#O%8h%m5G2=4CK(@~zowD2Da zgBj_5j$f<3=ku=Z6O;$#{=Bbj23800N|GT+GVfKN6z~pT560k(d4{~}JuaQ=#Yf$*^KV*j8AzJal*vh;R!jQ+=-u{j- z^9K8P5eBVxoTT0kVt3Z~m^?rS-k?IQ>8H4&Y)F ziBcWwe+^goD5D7@_%=8cWfLYlvZ(*gDOeWj7ors!_U~3jpSm}U*fdtM2bNP2+f@*M zm(h+0sMgPg8Sg39E#b?lLrGvk0$ol}&j2cdZH)B;r7Rw++5Eq_b8`7j`R@SI1w-A^ z0F(^Iu!bHA>B8{ND1I-|HcnYq+^3XZr z&)So)Mt-bzB7rx7)(Ed*&k=aBM!0wuXOoEkILpU!D+aEhYd`^E#Bma};yw})%+LpY zC096pm^sn>;oFCbz@wcghK~Qk)LBMF^?q#_0g;px=@wAwMj8o`7J;Edx|yN7k(L^y zk?!se$swgnau_yn*&JEg8--%(?Ki&`)xn%EAWroI4DiNt9LQ5@q zq3~gZ((F{$;&W5haq`cM!thq^vm31l%lL)lI-CVBKSIxanhg9y+MD}tn6`?8(9e|2 zv}-XX>C4kes$6o3!NgwI`q@NIfK2L{(2I;W_ZH+mB7s6hs*Af))g>?&xy@7U)58b z6knuys{tE7XCd#e4R~akMU;*km7bhEcPX3j-!75;xArr|h*(WjPy)GPd3Gy^1uNq6 zaD9*A;Gj{}f=8`7nzJ>mQxB8;744rY{WNCn+<0+u^7X<#Zlcx9Nsp3xoFPjb2%ed%mW7;wPIIR(D5(wb%jn+phaLMPRTkXsAWK z4lAwmxomOoITti~qJKPl@&v3&uZv%%Rkv^K1ev8kswcp%AC*qWekRWvdp<@~0ssYr z-HZwGISv&FDmZXETz4DBX#!B#k}MDHC6QTP&)_6m+CbJ8Ag;haxP`(C=;`* zaEhNmczAl%9(_m7N@bOuZT=FV9fs8D?}*2A-#fgKTsdm^cfJbzgZ(joE{kXOK07CB z=i!^ur+9gwUCnL;|Klf3+;;5V=THQ0ipl9ZtKnT&)t0=(6Jgd9{Nkpq>G7omG6iuq zDNieFTwqZ0EyA{jhSxu_ z5lZi~@Jgf?5@}!LVH;JCZ*k=C@=8WYny*(Ht^W*`{d9-)R)}>_Dz(Ai2n3wNquAd- zy9}0{EpHgU2DAXGNfejf^V4Fd5=FJnaZAQI4Eq7OGM08?RP{-Xuyx#7H#UrTIkt$zVzdxo6JmusSB-RA&=4Mckq{Abw98Ol2?YMG-%g_w&J z`ps`XBsyRBm!gQpho?`itAm&srt85Rn&Xs@!Hgi?cC?l8aAYQG)TS%u)G@^#4Yo#w zRrqq~APporeOMJ&=I;An)SUz$Y!RptK40s_^ne#n@Q9E+3R{GvlwK6lp+1(b>lj znM4azjAM!oDJtdf)$GmO)Blx4_iVOUzI!PtM`6B&m7omCzt}DEkwiB7c z^*sHw!10OR!4LV?4tJHwVIc=|)(};cz#2!^&W`C%!q$)M#Mo+MiQgZNSgTk8%sYFU zp3RT+6hH_~poeD7SZ=5sGC$ziL2V*J-<(BcdT`mw@ryA~sHfR2-L|^&;K295J{s_Q z(NtWWe2S3zV!`mIE+M}3Dv`hz==i7QUnN?}E15DSoD&&OL_@DK77e27X)as7G8f-6 z+@p7OcgHLIG!-TILK?axwu)ICE4|qH(qnEx4VW5JEV@}Ne1kC8yoR79cG>Wn|r zQ&ZLpXIRtWaLRz8j?VJAIX3*RaFSH5L?9f#-uP6SL0OI~<@V6TN>$Hv0l$!du)2Q^ z&J^`qRQLX~ta_}y{SQNp0CDnU`eLxq+O4Ey~KS+nBONEzM(y8PR9eA0$}uV40A83ht~JGS^sS ziacF`AZ?a)AeXGe@81!^b&(>OPsHEKXG$T=iLb(2bYPFT(R=<@DTm@ zVf^uPB-(B0TN_IM451qQ@Rvu@?y5MwqmP&k&wCDWLyh$5D*ex_eeSvp1KgAG8mHJI zGO;LCUxUWOaYEo=ww)+#8Q?LVXjuE}=tZqYqKaI|$Q~1Z_Lup|TcU>1n`Au`AWsWl z*&zDWVpY^SsD3oj(t!E4bnK6Uilj=nvZRWWN=}8rCdGH+5aL2xccG0Yx6A``hmSxd zNbwU`00WRAu*r01HuSX&i{c|8BUdlue%VR`IQs4kJMfcb>X0^(p$5!qev~4Las0fi zsb_&(8DJ3=EJMuxgYlOmALe)?&GqHoJ?AgUT~>c4+p|bCs-k@OChS!;mUDehf}C*= zek|jyyx&tKw%Q1A36Y&QaK=VYh<2psLeRyQ3%b}p3r<0BIr+Wpah=+%{d*n%qDGt% z1@G>T%LQB}bKCE>ZM-ugp5$no7~U=Zd|zMbN^`zd2EFV;EQbmEnfVmvJB@2-^oKI1 zktA4q*SBNO>ei-wA=S|0JLN|tLpd{PVF)|8i%fUyD0d@O)xA|`2dnX|#yx3-8BW#r zy_gvNC24S{tAcB~euz8bF8B?i9`KKs|1OQ|W>-k}YuAeV6RTHjT&}VK zKILqO&U}QrbBxxBofN~jhnf1jM?&1pw1LB9gI!S`CL1xXfP_WeVaExLH8dqHVhcyA zAKWg-?=k!CU&Q5I{}BZUZlrtz-GCxa-~3CH@0VEL4Lr` zJFPzkF}MsiIF}4_ZLKP~&iyTV7&vIjB$CdhA8-?+u70gN?=$hOZ`UWIVDu=Vxj@gJug))*yde7kIYwk#^x7#lyN= zAW&WbN1CK-a^u_67f|${aUG6WeX0(FyIWCYEiKfpgKcLu2#N5Cj>qub5B$HD21JpL zb_Rj)%>4y-(Vpw|Aoz#8dw)u(Eo-Govk2?cNiX=b$cQiyJQwDdhI|GjYods?ZSd3@ z^11?}KgLG$NEZg`L>-$IX9}};1scbM?%38@<&uSaJ7d@v4RCuIURK~Muk*JD-ZEa? z%xH@T{y);h6X6+Q;(0Xonkgt$o$bGJ?C+|9-+w}zyZeY<`te6ELOcO(kPKt?FU;YHVv-9Ba z9f}M}sV1lhRaYivlW@nX8%4mH3PtpqmU{r)1=;!$FtRhHnU~9CY`dh?DIq*9mFIJ9 zW`jvDRcZD_0tVBKCl8WE3WXl~p;gMES2epcBQc66%%o>!~Xe%99D^t8_ zI&D>YQmN2n$6p&1Y1;Mn&?}Vaj+;fgpE9Pl{(CU@Ro!c|S#3HiT)Lk43VcWPE4@NO z?uREjLs=dt2F(fn1fnr|JZf{UZxqpl8MV_Y{bjZT+ev-u)Wl$T!-iNR;n%`UCjzeE z|C+kM%i{QABu{8J>5GedR`=%gQ>L&N8o=&fss3c~N;`k&UOS*u0u<&(R?UCfk!UcdiQHlA)41b!1}Bw~a9 z-y(4sd`aini0XM+S|MIa&r~K5Ep}~0UEE(eEw079XJ(sFv(Icngsh|Q3NP;yOr^d% z<6zs$@hMcIjZg!n(=sg+3iT^*Gx`-uN^1PAWCrPK5G*H0Wjzo#pDh-tFY9n}Q@B8j zn11&X(F8SzkVTj*Qmxkz_4Q&xXH7x(Xujw7YOzv@CfzR zQ>cQFds+)o-w4wj0^cl$9ZZPE#yxJFe73{l{g02OfUgI{hF>obET_dZV2Oh$4?=Tm zC<5Vx@R}jY(jU9YLn9s$V#a=+!!nt_8>$^79njOMiT5U z@*h!|O0P((n7R_w>{DFr8E-3(kaYx8WrntVs#H6HZ~?O`3x*0_8Ws+vji?ie?-CwB zt#*F)(c^xfWIQvwJG{#Yn|ELFd|-)gIC@Ta`@a-TlC5MV@95icMTgtm{f|(aADwOF zhA}EY=Snz`=yFSw^esX<%!Y;P(?SyM_vivSbODy)#@PVZMJd*w6~U^%@a)3}ztWyE z^Rz}1WROSD-v9G-PN5a|Bq(%c{$13Xu{`=dE|QN?t|8o`i27xl?8=Ty3gWdHCcw+; zLpNS)RK`iNAkXDZj_eU&-)nS}8IzfcnTd3)^kBq?Fn6{^%2F5tt4P%0VTJqyk)qDp5+7$FzE}bA@D@0z2D=1M@!unEL-@3LN$n6{{ zzXdX4YB9uf=Q2Ng1xz|TadN-p5|C};h1)!}HBO-32>Kk^W~V&PFFO+3q`foyu>#=W zl9J&)^X_OoJe%wAIywEFs*Wqh`+5Hd>_Jtk?g3@yn-C8MrVp6nD*pN&JKR27w2z-F zpFN|lL51C_1q?=T^8slBQNNIF7if5_1%n6Qx936A<|^{Sw9VF*EwLuQ?)2xKpFt|M zuUTN-q7ErGf~7HFCzYW8azN6I6^hKv?aQT}$2UD& zdX~zuD$2HWdqa5WcTPr1EAqWXvCZ6T9Sz@fo>-pS&w|o|^SF1nUh|@9$czgS0#1XXc0Ic z+xWGf=19J?HG5xNIM&P6C@Ht{;;PbPn~j9tffXy_J?s)MHM*Yuy(k`sX@!>ag00(oY&*th#40WIUPsg!NN z4mpzl*5s$xKIYOa_eqOTR4k;=N@6~)u};iNe3^amB6`2jGM3Cn=<)Ss?ZnEaR*CMEJ zEzz(F)=Y~xamn)wpzWi>Gl+6vA4AO*VsEzUh%)nJLE~1h{!7RWW-ZXC!td|J&krq6 zQ?~MBMJnm_PW< z=GJxkc4uYO093yS$vhVzS7HaiiJDoI1l9z8BAODVOLb{BYJgy)voUNF9ifZ#-Mdz) zkUU!++9fqoKF(S36*GXB^?-L$h@nm50-WRL(D!v#EnG2I)5K&#V(jDR^Rt<2n-5Vp zOGZAgBpzl(HaYy^mk4y|v?gHqxQA=&yG9>_D`sm)|5w(TGXCGpm>0I@Ou3#o4di7+ zC>YtETyOUQ(ZF!S!db@+hKTqqdFMYiL;pv4k0V((Kh94UxA>_#mtjjg1+<%kr5}B^ z8fe#PA1~|!;mMYR>Mox87`NqGnZRdU%zqY1m(r+r{=G*pVK}oN<^XWB8O)|SLnSw< zV;^UD!w3Peu3^A?dS5UQ4$xb=u-F9m|3lfV=wz?!wf)u^=Q*CHj%_mv)I}41k}$Cm#rJ9kBUxssZ;Y7wGaG1f75=nm6nXkWCiQ3T3PpQD6WSBe(Kc z7pI?})LNly4bnFYsTg~Ha%CWzb!HWwL3jn!8)eFmJ{pzE%^g#q*UQjD6nurhAn@tE zf`~HVE|xrD<{A;V(9!eS3i|{d8qod^JI|f(#J!}P4W$!;Mj7x- z-1;&6+=kWAL0J3S5wxj&h=SEP>1(Sq5cS-Lj)GW!H}td=B+#3S#g|z$%aiO_2?hFa z)ArWnV?mxm4`L>sAxI*7nu*u4Dx~yoT9?GUa3adzFF2-c_844sc1aXC*eoEbQ`-xqW-ap;?g5N|Jh#HB4})_UOfvYVp#%en#UE&A%kOXIDY znR+;-am!j!c=wupS#Cf7_^Lyy@zbMv)xBK^ei>LdSItCkAMNWG$4H;`IQ#^o5&lhx zj?6qdecRZ_$U;SI2|a!37qPH}>oNG^8*)8JCW5OfAYcE)2tE&WWaM-#b3-v1q2d6ZZ;7_Ie934b38z*$#v2 znG%hzrOU(ST>=@I8+zuqxZ{2=op9ac)ZECh3r;TIVag+ZDfnEj(weRzI6qT1(AB?@ zT@$UAVUzXHi)22zEQy*kYlqU|{1Kd|b2lnmGHL!dz-VoR#?T05w9=>v0zVF5_n4>V zWN5wLK!>L*zREcWCJ6$Uh!k1xQJRZ*K~qM^dJ+yoHdoox))V95_TevHLGSo~=N_XZ z#w}SJZGy;yW@0p#!lWCM7$ggQFekQ`-Qe^?`UWo)bEB535AQ~whcsE(Wbf(FRtd0; zUrtfzjK7c>2?sA#y(|junMHDnXo-5R}gk1 zz4S&5hSi4E{1&L)>{PHCu!hOi$IbQ1UX7I3g(B)na3~b#ec$3{$1o$VFaS9eF;t@w zOES-lGVZSsdi2Pp)(B=lxu*l0ww?Kib)dBQQQ`^frq6gF#x_mT1RBuP7za&~4dk{yBVQaH@w!e6B zHY8yck5!a4`^_bedG-qDGw*_X`+Xz7cDw=>T{XX41I9RV{!#SUS@~8q*J?EOBKb-8 z3qA~vu>iuIesIjfeGS@aN$i|+FSP8%kI9Uf1q|zXu)W)-t1vz0wQ8sCKUS8_`F97G zP*dRxJr8);{tWwjl*-gv@zvKV*5V&BIjhhojIIfc#W^8C z?IWw1&gO8m)T1xH= z`}p;Y?IN;wKc~t>CY^k64Z!UOarilBU-9=RTyn3JC`-rdM;vDYN9tBtC6?n#7k7_s zI)6FUYOsI#$<=uNwa9CdH=czyp9|ThcD#1eC8TQ~wwHv9Qkk zm&^E!GmC{k+v|=krq~~f+koP78L1A@qb;raw5kWc8~Kpvk=V$cq$7YO5To=*S#Pnj zE6a}9$555IrRY|Pv91z2EN?E6fk?_8=23B7J{Tf}rn3UE;ncryj3i!U#uaPQ**n4N z_Di?2*5eGhtuaO|98&cO_OjWgb|-nUWA7`-O)uq|%`P}~ zi2)Tf`mrU91A9NNa67ieDj^sWmd*mFqLDh-h?21 zt@r*%PJeNRt60!r_EIgMKd^d1jl322Yx2CMJ`BFj)}SQyf)OwyZxdtbfU`-gFXGlx&c`zlKP?fs13h#47+0_I89?VeB~xl z-VHvAOn|MiX)M)EmSr5Uj^E7=GUjj-2C@%hTC=#QXcLNR{Cm&B6@3IteAq6v^n5C@ z_IX;%mJ^k7^<%BogH*FQk*{p6#b^NiuDeL+ z`;!c>OE4lS*a0tlH-cwOqFmQ~@I8G(eGeWVw+; z_KnZJe0luR=@R@b(SxTnV+#K7y*tGH&wtnEWN!adA0dniYW=mvJoPz_eu}l(E$Wl` z_mWRvCcte@EFN#}tb-<0eJ|)^*orJY)%=(ai9|`lh?A!4MBBw*L7haNZ`FU*@uqIGiFUfLoS8D4KQKiA%&H1dg z%aPFOu>L04J5*6=v6IfP9zcG_o$qxe+Md&%LZG)1MZ5R(#_XGe4;t(9Zw^E>HWVcP zrlHJV$uxf!oB#V&=!&T?!f#BO+o>2^YTYVpsg+FyEYla}C6jcwu~K1sRt)%E9){6w zHd{sKY<4FzEKvU`+V$#WGY&+t|2=2a$!vBzC#MjFg_EYQHW`Ox{mpNAdLA|c!k))Z zD&Mtsb9k)OqYOOI9OHQDaV7fo;>zYBE|zE|`e^pxVlzpR$~=bfGc`ixo( zhz-vJi!@|^>aw>ahnYIpCNigg3lf%dWrj64sK>J~6k*S3eDKq2@QUXx&2UHIxKf$)0cU$|_Dz7iqpJoKITzQyn9tdrZ>CAO(%Gx*RX%}=SUe_r^%y4$`hs0?}o zBUCSgr!`lSJQECnXMj^BZ@dK9q`;3{t)iyN9JvK6L>+2=FWjvW8z7Qz_-prEp>Rd% z!)mra3ihCkY1C@26&-t!Pi>wFEgUc0$-NxcMbbwH+wgH>o^bw0WpzfQKr|bEnbLrA z=lc!PBQ#5Y%kpZy5Ga&_?`sN!1j{QwKZj3a-{-+y1XaQl=K(1A9^N9QLD=5Ml8dH15k?yTWwIM90D=h>~Sqn4u1@H!?AuAX}XC zrc;lVD(rJEoNL~LnqaKoJ^{_sBEtFX7qQja%J(cr-(r!a0`&v)*LUh}!~1XaT}$Qj zqTcFOC1u*l4o{KB$S@mgX6}9rUg4dgJ{UYrPArc^L3#S8AS3mansUm`3-?=-{U7ui ze(%;PcL&`It;xT3u!_6thpXTP=Rx}0mx!9D&P1V`v*|QD$XW+W^<8D&g6CzmO3U#i z%lLZtpvqXK2*WasnzP@D*kCo{IPcxKYW8aGg}hn1fjiBBz-{@%HPzto3y#ehO9$u! zO*b;V>EOQ8J8tWDa7y*V$g{(i3s&T{N{(4Rse-c3>G;cmgzuU{PHTkC79Mo&IVd!X ze~XRgBS%WS%D+P-b=^tBR8<*1A`^z++fI4v9;eRjFj(>i>*oIG5~FQNul*sO7!;k# zGy_CyZW})**_UWE8`hOQ=NCy+Z!9702ODYBcB1NRdG3n-i9s5~fRa0~j|&_yZ7_e2 zl)nP~Xh+fcV=0gK`@q`X0a?$8vp@D*rOmBxft# zzS91%y{VD9jgg-MgV8VlI5e+#*#HL;W^+Fj*YLYZAJb3sf>cNH(`WPzyL%FxcM_9P zpRHJ= zcBf4r1llobT+5|(9mTlh9pO45M2j%eAf?L&@)!vk^(Nd}Z2HV>mS(~ouvb8Sd~!Q0 zo|N$7bUEhV{>T7ou@e8TLx?zARkCXcT$aV_2c+4c zk@DkZ3B5~J_MiN{dJ_{f&o!jD&(;f78}P*IH4nLm5hEYC^>YA7D5dhRr}}RaNbA-^|*J>&7~O*469do)_gCA zOy_Zgl5@k=&22)_@^%x_8Y{roWft^8=XzgJ^$CxSQ;awIK3#r?$cHqWQaTX#I8ybp ztO3}QuER~T8IQfkV?!ML3E3v07iNUTut%M-v2a_F>nndVc9FCZbb=? zRnRFDrUba&AN{)TfdZ%k9y#@d4qZltEVr)E!f>~D+UMGsizt)7)b z{xa^cXj6*$w^^dM%l-Hy^pJd1cTrD?EHC)okj?w<^ckcXO2LRq(7GTA0&m%)7KNHy5Zj5GufiwAb6(CIMwYd_~MyZ*puYWhAmCB!jx&% z?<78%v=~|UX5c9R@^bNAC4Iz@$i3u*oXzU$Wl1alZjmm6ZTP?!LpbrDmRmFk%^sytp~WR zrbKoxqGyM0xq>JVrSZFNZ~wAp7h2vjv;?}z4S&s(>n3{XUH_)H<_%HjM{B2pMkLVx zxN~LEolV5e{%huONfa9u_QzzNJltG)quMqmOiw$vlJUmkpKy`k>abIyz;9QF+6qNS zqQkarjFvapFI_jB%Hsm&)krgzx2oR_;^65~5bEv+uZDY{uBsjmsvfUIsvbLZ4_*tb z*FYFO_P3VLR;#k*&0?v+0t!#{@!ju?^1S!xmA#V#8lImTB;uS{d!-`!;-Hkgo~LP} zK?s?`N*t(HM0#n1k)9^i_lyQtP{w{_?N~)M`f5Hx`*GauIlQxj+@_yMAOZgbDxPS*`Rb`5N5Wk=Lftc!?5nL z{!_#EU1xJ&3>$Y6JSlG5uD zWHWpzyqxV!zE|ljYT?CYkK#|eiKeM9f^#P3)&!+)mwG0ir(X_lw%?-9u^gbu^@1mu zh4Ia@4XOXcrhQxgOTl(qmA{evBGUA9d^9ApwviN&&-_i2VxtY8lR+UQ_%KA|FNnoPZUKpSJZKL)~C; z(7JP;Jy{;ix`(K(;ER-y7|h;xgj`3Q7D`+Rp_D%VIR>w-h~8_|VsI;qo@h*>cN3_w zWFnqXF}F<;V(bxB7^)37Yp0en3cil-doR^f6`E zgXnRA!#O&Fxu>WiT-c=P*Yf(AB!UIU%5Lo{F?!#l<(sw^25lneE)eBUu?zM>Jq z)a&5L2Th@W+a`9tX72@jET{#1-Plzg`b?-E_c@~1L_!*)j)s=rd|Mp`{VrFK>~%?q zrraWsNDdf{As<>wirAUPTe$ws@ed%tq5-<#BUPi{fsTjWp}q6-#PG&XIh}tm_D_&a+-0AS$75@;_Nu0RfG7e|n zIY}*61x@1%J55ZlnM8u+@ zb?2G+G2Fcw>f8KHL)V?kOaG2Sc7ne!uX&UDq+2;J!=cM^UoYqz1LtX(q>ru>pRLW@ z+c!J>cNG?PKHH9_%69BBZHHkEVT~%2=Zz?vc_OH{PJoNH$m^tTsTy~s?b*j`JIND! zUToNV{Q51$F3-;e2-nVn9s*1(ZrOga0?uQgt^jqPj;ziwzu36(`QK74nz>2&RABhCfe{ zSBD^QZ5)j9;^86iH$^XgKz^d#bF_F=4cwz=r{0-4`4)d04|`+c9V3TLm;@Q2G(;u? z2l8rBm|Vyaxd`Qt&R_xJ2JA6=`kPB*VT3S0&p|VF1qhd|>G{r+kx5I161tG97?)oM zkKWK2ICQBlXXP;EqH*$0j_2;1fm~twu1noxH_Ce{y$dhBs19Wu_Yb_86UEKY4{!6o;nIRXr)!mW$k3bS56TG0 z5a7^{JseSIRY_%q9H$>t%&~deR7pF@5hhK`XHFgc>d-m0Rro?lD(xz#%mem3Ki9fH zotOZ^u%wHbw?e*8gMXSXOOg#HL4V6z*RlW-W&BT5~Y*>^#4DTYAH0k(I4*6g4mXC+S2or5+^Ri;qS3LY)$A=I92%M)`1Q{G3!l+$tnW0 zUF&sMe@AaKejF#3gQgr>X@FG7#?7+o&7DiIKh6Z)JN&WGCPBUcJk` zZ^?}c?j;y8bEm(u=?DKiPW0H$?hKI)e7{b{GMMvSu>bGA&T$r};EpH#cbl==rRtDn z`fS0D8V+n&s%U%wa3K{l&_I8@D*kC5>RTE&=ltnH7QQ4V%CWuRr^`^? zojy#Lk~}~79}W$HSzEI@OW*QF&ZjhxwXHcQc`G>SjE8OfI?&q|H6wkCpstYWadq$1 zE^WLW(yg8PW*D~eg5s$yn~sMAaT0Obdsf=9pr=o*np=Cophg9- z(Mx0m6%SL%#O*MYs*W6N&OlbU`(BUfdDn26B{Sb-IQI3TXS>B4f@pS&1=vdXbv!Pg zIwN*4enns#S+6+Gy~0^Fl8enS9|PJHr3o%vBt98$=Lv7i(V1Da;Pq)lvE6kUI*TywOC_ zVC2dwpJ=+22Yhpz?cvz4Ey3h>3(PmnR4lA4>lWlv&4KH31D``RB3(yCVK^@va{qa} zj*P9hB~QT`1kMhXTaQ175~twNY(-?|DgonQVgm<;(U?nYgtG9nmI#Wb7#hLJ6-gHj z3p11tJwl8VSi{zB3AK6BDdg%3AQh0=A*PZ{OAT|e=xScI&zM;H8OPs&GXML~e|+<& zZBHJA{t573AHfoI-;nyZDyf!B@t&2$q3BzKB2zA)V|*F@TFzcDbFf*h>hn`@=GzZ5 zVUc;~sV|neT;}CwsP<%Gsp|h$+A%H%ktRko0SW9eKRfFU)@naljYxk{6foWY^JA9r zLD8H6JM3NjU!7tF`#f8XhNC)~L<-(v?t?l9ux;#|!og4q^0_XJQFd%d7_Q7$Cb|}G zje&^Jp}lv~7H!eKX3K|Hs0QOl9CDu(V@s`yv4wpLAlWH%>N$4~3zHFZV;xSPPP?Is zZR^Q9ac!OF-0i_eTL%+9IO^tSr^DEjOzA$Sq<_f5es+RL>^XbWR4aR0{67TaWvBK4 zz5sWeox#L3DzTK`6WftbNp>aTT5oJyTz}~Pu#5z_OiF} zs2LAu>WBABUWXoF_D1mjp;G zTFhX?+HkMM~#%| z8aRN~f*LEtK<<9Tg%fs3;+5DD%6mgc?~__*hmPa#a%;(&nLO!=>2S~RhB2!mrN)h) zdBsKNJpDsoQpL@^HOrRkn(k}gY_IQ1Z&P=+t&+a@Vx2OJXp^!fR&AI%3tm4L-P8&cNFrVnoei2Aa_^|Xka2%k0 zq`a{=d&C&IH?R=VNHN#9#ObUmI(Tza{~RG01m{O!sJj*7oA5pdQ;%vqe(@{E57rjQ zF&I$qD=IvFPyU7&>VNWjZFcDVwV^*nRo5j^miHNAUq{9Gk&x}_)6-LKobl~i3+52H zxDIE!x@r zI91}|^Z9+=2j+V#hVcM35pj0-e!|A=7Kc+JI3?>z_^;osu)a4O;c@-c9x)+yK^Cd< zl1>q$@l})Zud7&VV_$0!-IqDUBU+ngVAqek@l4#!4k>v}K@W2)mev{Pn>= z=*-JhuYF<$-^=kBX8@D)1FS;pK55&Kn}{zJ@*XPdncVuZ%qvW)Fd)c`7L%IV_UfZ2l_5^+KN`WqR05|Wr$Re%Poy>i%qI2 z0}KnGOz{vdWk!V55MA=e9VSqgKB6kEv_D^ac$kQv%nC*BS=`^OX0OjptVU+OcHi88 zUA4Jn^jGp|iS#$@nyz{a4Hc+|qCvDmWD{VyS^0l(dVLc5wH{WmWbAA?E?rl=RUgq* zGS1W7S9G_+5(X3cJwHDPdh`O3;DnyU(o@C+w5IXc zESHP^D>#7<;JUh(G-De!eF+>0To@JHLxe|Kqvf5xTv0U z0eR+ovoEsNTd~$M?^Q=uuT~i4oQNP|bJaublH|O(Yi4}Mhbex{!8!sP0L;MI`TkyV z9fQ*se+W|vB35##lC+YI?M%rkk5xd8K78S28@sIoebk->h|>1;PaP%$Ez1O z1Ns+pB}Mb;u*J!xKt$Eji9R$f2k4#uCXA+r&XeQEDRhn#c8bKequ&*oE#4MXy8~>XAno2RzL)WrHu;IcH9X{2*{; z;~mJ9>IWSH|45@9naH1-IVefwV{YREL-VSjo6y_o!0f%#*jP%;XTZGX%Iz2__i59Z zNm*=@zk0vi`dRNhsRSWOL8S+ms}qw0j&!f$p2uuB*+am)J~I;L zjpS4`dMbHv^|&|V?1Z?o(>(oV=DU=kH|P7vDE=@|x6YkVI0dgCF#gw!*tc82XJ)X` zjtPQ5W$i0M?wsCjy3G{7`tfEJYwy5@a4yxPL342-7hzRd@2nUk7U||zYzgEN^z;~@ zDbML073*~8LWYEiXEVcdW9*0YrcqLY)Iw$pdU#oI5fc6Y8Sf-sCnXN~$m|j7xlw22 zMUZGKSMz^Non=^*ZP$gROFE=mKo~-h?gnY8p+OqyZUkvbg+Uqwq`O19N4f-tW*F)2 z`tIlb_5CLfn3?O|*V^Y=%YBYW=r6b8`??1St&n&|)(&qslZcdAu&?sHIcg=+--wqkK<5O&6Wpam6PjA7EDpug72e<)U~q|61w(eU!Ejvir4< zlBkN}S%dM=_L60caa@@F?MfM=1(r!k^02&7Moq;eMtUZkS{)pl6?CYyxPZElO!8^= z2J)e$dR*?{$^XU?q#plsO2*v%YMuR7TTG=!=r6Y<`ea9rdygO7G`2!TE-F**WGl18tN9h_9+=&!Fl1CQpS&aL#JbF4=b=q8q2*X;=%=}iUNn9UFEUikI{V_}6P_K1;UyVhV*Djl8du6-3)xm%)(*W8;&D zSMJ5D;!dJ+~QJ#i?Q{7nSTr0M?IX zGh$Ey#1-Ve>Of@5a0+Za>yTImb_#O_c zS^*7xV#iPe0`ny)5>3ojLuJ=sUoUerdz-kcbTvEoq5Cy=mXCjLi!Oz3HGoYwRY1)~ za=cwvBg$p*zNSZWN1&j#vhJlNA8VMkwIR4O`}zEzj%fxouPHMdaWAGfnY z<3an(ONDf1wDqX@x6-b$?oxSi+=>ZtAJ2M8$_mGta}K4U1GL+Rl{$%^?oxb=X%){S zEE+$S3QZM^pzW*U=k3{XFHOW3_`9$=_;_u2u^c~7q@4^;(Dt!*-o6mX`Ww!*TTQ80 z_&7i6Lcdk?t?C0w1DvUpk>Zrs`8}J8oUb$aPwbys{F+!3zT8%$V0L;=&F#eXKLpzX z+w`p<15$nRs0Wr^xKqoMVD!h;qcZuVw@Jh>wV#beXr5k;(waxU+J-91de zbvY6EBEA{-6Z5-)|Efd={&{fC=oRi>CAa#MK=)i4ms)Go58=V2&G~2GUq69zgZsmGMwlYiJGKhD9dt#0jy2 z^aD~Bz0kjX@@$FLT66MI&6hnor{cydIImNkc*&rVfUxYk$A|~nBAfa{_0M3Yr* zFDx#Bd02D-*aa`u!Z0C5qD&klf-z$8@K{1oVReHcvch^=(Gom~u{0}o zMt~u^ok87Q2!-bc-9dS~5B0&O!Pf3vbscAC;l0Nl1txj8ID9-akwvG|g%XP$T45T! z?)8phP=wrmszGVUt#>&vP7y{IyL_r);m?X^N2EX%nx?i>I5oRy>6=rPFYL>&<K??W;C*^s?tsra zfs8Hgfy;R2vr{u&zkY5Ic60ECdf?;j@p{p7AWkD+w$d*9;Ov;F>)xs8hBj68=Pddx zQ$Pn7!i{Rb!PDXzMZZioi~dbn_?_jEXn1fTQ`&>=Sl;KGeJgVn($G3k1A zW?!4FCSAA3nM%k@l0qNQFG0CNwPZbBSd^9O%cwva7=OSM-QKDZe05IOnp#^}0e^k6Z0hTWo z_M#bn_6^E{7 zPxNn0tsTAADad&!VTg(c5VtkJHAFXO)V5(nh%=NWg*wmj26XMBG|8OeW*MQB1?nB; zmAs@a))(f~hkatw>M$8cP_!Bt8O29;f+FA-Z#BMMwK6YgI~n~0uJYf8;ODGglerOE z5uobPvwpRya&xza?oF#6>#Q;3Fue7%NnOKDpYXNUN36U*?d zzQq%JY`J|vkh(jiY0g0896ngMV# zz-K-+= z)99}_(l$070Mjxm#=(IkEd1t9${t=O?|SYLXguAm4FUJM{O+fYv6{`}|R&@51<=W$@3quJZmFCn^;3Ej2&R zerEXsvhF{o_!QoXq#egoT&8i&5nU-V7qz7Qh;4;&4Ey{fIv+a1aOlx7)mDseX}iE= zsd*Pnq2g}XU>M9qaZXxY`u*0yge$9zXzq`i0p#`8>_IK|w#Hn(=PxAqCnHUPmCs?P zl-n=UN?H9Q;w&j>OvP8i>tg)VT@;6!klt17PYQbN={5hfQNwYtG1O|#mu)JSLOi|I zsrYV9q1XyXx3JF2lyG%fp8T?xkFI){E$uEZ;+}C{JL!WJd-q;TLbo(V>$}1?t+sNK zn3+?d)0G17<1V4&?dHpQ04)rlUHe>Mww53o>`f^uDH^{V5{NS&6v#Qh){IAWY?PQo zyut?AcbNyXmoBxcld%uakQs_cu?KXXQD7Ax`P z#L@4+?b`j2)ohCn{(koVqknWDwK7f{xSvhO@QVe_`P6j!Ri%`1uo#ht^`Bg_*sL?p zLQ+Zn_fp`)T-}ZzRk+1B@)<)WWG0N}Nhk?=6rG@8Hzmwjf!rq6l`k-c!XU z>8HoHG$^eIh`lD~Um^YL<0hy_mm}k?FW|lU8v|eb8m%GwV5s}B{O!f57n|fiHDr(+smP(cQlS#@w1YRwpw1T@I^3ku9>E6;blpX!;sNZ`kNaXp}zqT4fi`(Jdxjh4k)=wWSZmXY9AS^e`0IJ!_ za@}zSi;4uSHzEHqjn5pwzWjOo(!#t|`NW;M^*# zH=Fy@(xw5l3#P$%E*)&y1^<9FYi;n;!KaBX4B&5tXG?a4PCT5cU_(6$zi|DwrqCr`@2x@5=&phKe(FUGd!unaH;^qjWmYiq6%h!fc$>p(SVp)`QZT%w2yZ{VkNJm^ zE%v4>A0|auR{WC8V*TP}=hf9U;qteHns01bcm4JcH-~gvf@d1zVq#b4tOQ`{P@P*4 zvhPwA>V@_AVhuT19fuMaU^La+NoCHu6JDZD8d?j4Jt+LN_0!SlT&m$A$`JrHh_EfL z3tFeVTypo&3W%>pV*!4!s|de}BpSehgC_2LmWl)}KYzERN$OkIaUp!vO|CM!nAK1jM8z4r|M zS^|&*bqIgfz#2u2(*QjbSQS#e_ZhvFFey!jqnhB)-JRV0qQA4f167p>t*!x1p2lv0@qY@gnGibg7gX}Q}H)+$a zSj??Gm_O>h>TYI2w$?VdnYP8-e6ke3*)HXR{jMf6OGdgyQCvQKE+l zQ2>|}^x(IL@oKOb;6>VA}rfZHq{Ko1sXxrfs_m6!bD8cqkk zg4z;R4MrACYfqNIfHVS1;sJg!gcTU;gST=R$5g z%T)9!>M7=;)D38R*Tc#L)d#FUPTKsv)^sqJe|H~g^!qE{M49+uei$mR;Yn>$SE)TD zW?eU;sSaWhhyKp^4qTyH-(n+)+b?yEM{VC}mM!=vfJ&1r=gHB{BpNaF>=NcatjEH$D#-FTk5kBVJw^|ABT31gu40kgW8Z8WH;c;biP96fFIFK2| zVLYkD(TOVNySScht+_z_W*?>;qt#Fmu4?!aL z&2?Ht#QpO|{muAsa7F9ei~KdI*ry=iL~fDU(@xoaYv;oIHX8AY~)#KprXsbt&g=!2viv0AcS?XsHvZ(~t9V zX&Vaw54_8rFK4&iS+sCLpoxRdZ}q1@`}nTFDT z3W&pUt(J1U8GXUc^e(aZke=n6i{@kbi5&HJhfcC9Zlyj=uLfS-Yx2E zqY!P=YAqra-byW5oKJwPJeI&FnGwd~djie*UhN0AvZ8I?FBz)aNwir7emV!So(+|0 ziOqzcKy*+AhxwbuDCOOq%D^ixJJE>Dl4H+0MRYvpy7^(mBXu1hU*SEg3S$9-&_Btl z%!w=vAu3$hK8VeK&G_ce3(Z@jGYEc>z;j!cDgQF$ds>4i?v68M&trSp$hdTzwll3I zql&2oWzv`vwTo`vwaklrx7v#Z{mwu#mrY^ERu7_2RTmaR#S81FX5!)P!Tx--0sH5F zgS|MZnbPQG26{91h%bg#Whze5U;FY$wQDk8 zJ2goxkF*FdpzhvcVXB|>eN4=>qHe{m-s10If0n#?=;IA8k=a%hs!~2J74Qmr~6U|0*mwQ05!)iksu#9Q?{SCfEP5 z;@{pNeEXRGDQ^q%W;T~XZv4tH@YbyB%S7i{c+M9Z1nZ>VzC#2c9H(pT`oxU}N4*0` z7?{H~Z&mIT&;LvcRD=*J^C})cG6AafKc%}=RTxmG0bZ1mYK&3)k&mDv%rUi#7NkXz zv@zRE-q9Dw&sC1kw2wwR@~IP1n+x@(`TsdS&hCs@iYhB0K_kb0_Sh@07V=aEJuXK8Ex>VWa3^Qr>yEVFEF;{yqKsH2i$aJt<_hE@Pg(%rl&EHWe7o*xga^I;4zhw@e3FDCMp(kbWe*O>a(sW)I@+xpQ z`b`H~_~(*oz3h)3``iVPs80H9GHxhS|66RkW#0w(6n(nzxdM|mt+`=JJ|5P$JgQuq zLnBOXM!LkJqC)QYnSIDMX48(k(^-%7L|-VRuqLK3{Nyt#4u_*|0+uIOu@m5diFWIC zmq7)Ll61&{VQ2j#yvzyEw>B36W;w_noxSSdr@7|NsFwMc@2Z@D7R5U}=a6mhl#3K| z`4eo=OEB_~6~5ev8YXen8PW@J=$EMTiq7LYRn01I?m9ETOA6?u8B~NBUAd}Ow*aNa z2u*|B(dP-Gkz)AIHUmYD0w7e$RsK`VGS#VJ_ryB#!uNi)u$Ofvd~QFLPtu!Ok-08= zJg_9T1c%+07!hG?_9m^!G%`+0H7SnHQI?&se#gCVMYn!qE59Qh&M>17NzI)|BjwO{ zqscW{IdCpri#>VZm)6hEv5^#CVl#*Vq9hbJuA|k#>Ls+RX$dJYGAW0SatG!DjD;&H z6)rN1Iw;gX#R-xrV(RvYtZbMIswz-d#}hD5)3!E_aMW)df z=D_hop0&_+FF^R*F<(5&s(anPuk-yBmfa9!@O|?A-RoZcldZpDyPL>4F|Uld5v}#j zsIo;{C>%;8uGQZ93X+uSs&tj=#Se%j)f0Q44)`*VnxEtvZOlo2A?-Y&*kd1(6IOJ0 zFqv)$$-4x^cEeOjA@YEdk8+>Mh%<^IjK7ZGsi-S?W5;L@3a542w^ zl1X452!%jH^rggA@h<@hP3v!Wk0sp-N!J2>xt%+0IRh!f*7>vY^I+DRoeQ245A(13 zJk)5#^box+CWH^R*c;6vbjqSw5JL-P(|kQWRj$$gR&_6}8g6{)r$`0V)6hRwuVJHo z$vmK-l#4ePc`R%$Lj0k53GX~}4Zno#io|1EeVi>DbMLFqH=#QKKcsc@>n}+u(2ufY z66%mA{#>Pezzc~C%HuPP5?LqR`LYmlnQ^zl4R+LmlA1{hqD^M~`Ze$-n&qNC0*ZBHD%ffrh0)aKVCa=C4x2{gxX4RzO`((9QYB37h$6fsj5&j;` zJ1S-_y8*m;PyA)nTTPwVWhYg+kbm(K{;nlSEk-vV@s_%M!bA09u?JQVXE&W7ph7SI z$y^fjR;4i{pXMdq#ngNhJx z)vkug-nP(dF2x@gE(4-Q1bh(IwSatubi|S4G=^z|O@1YgWYqb{^s6Y<9r}+MPlrV( z)aqeFNq`2_m2VaFS$fSqhd2s*rM5D}n<3F^5jF`dC`2b&2E z-t;o9(tZ7%#?;1!wD5EW0i?_vV#xUhE9X}Ts<19OKPRo8j`O4?<^U?&fqm;Tpl$ z9yeEAPxTT!xRB028VM%GFlep}1_U?*#K;!*VH9gmHXrS=wRl<1+~n zR~+HHZbs!+iw?K46z0z6!r$#FUpUjZR7zk%i2aGfCKAa7yR)=MrOt0N@JA4zg5L=P z9{y_EW_KpSaH}XE#nK*c=yNDPL4crBq%m;LrtB`Aqn@?9ua}_LT{zGY?$>u zaKo=`hHq5%yo;G+?!sNw+dm|;ENnYcG}{gf@j4a0*mZw;JuJjo#;H4)XwODdDZi1| z@V0e)sL_h4;w@>YR}9kj0tW59tSAz6ic? zS(_Bx0=eTByv}wAMFZ9-b~39kgmVvJknWKXG>PlV`_s{o2V}|nN69@S8AaNqNTVE) znB}KiWLn=ROQDC-Y}a_h$P-`g{{9hurMrare36c`5VJw0B^n1 zWZg>`{c+*i{=kwAm_iaS8Epf;>@?)R{;6U8Qsxs;?f$6rO>qQ$DLsXn$z`-k95UzR z**UM49+%}=1@nI$N42Hcjb7Fw6BzCtc!-@M22sVquGEN@!>g}1Te-nF!;OKS75G3B zhSjo8X=dbbG(mXyUEd0nFlKk^1UL26G)@!{5KdWECw*wz67d;aEQOcgcRF5SSSpn~ z83Y+gSx@j3q#bk}s?TbGf{Y7miul{)r505Gq`(Wr!K5H&Qz)V}(nV~ZGm<>#3$nDg zRL1>~UDXj#a1*)xVufA)$5~fvIg18`5I)Jp*5C$H$^}8Ox+cA?uU$dd*OKRGjm!2D z{1yMz(B+>tX*F6{cm~dJqPRax@*oUWJ^2n5(Gf2MrK^#K7QR5yr9Ui8dtJZkkRwL=^O8uVRvmZ@t*FsMIn_K!dLe& zw~#wT<CS^%MV6H)GjA`ap<#=p>TEN(IWN2D%jD;fP#NCPxp zED7lKRSB-jMvflO$K=lu$%*j$b|A;czOQ%qY%;_1Mwhv}otHL!pK?bGs@*itkbre8 zp!cWetUsL*u#800{+3?Ki`GML$^kZ-Qr{xBVu%zwwAQ))H z1%Br7ht75nJP6+&psPkdy%a`&bM_lbAf6KMxv2OQmjw+P08=|A{^$_uFB)`^84Qbi z=PR~KIsTn)BFAE_XNyLPns8ADpF&!W?~gS?^C&9t$Oaor zIuOHENCdnVPw58;kU|tv0}>1Sg6Oe;{Ej5}=bi>(u)31sgj;M)eDWqqK8<{Laq{_4+%9NZdj7uX8TTv*Rv z*5A778@uUvIe#oV8(A&cK}SdICm7xx0HQM8T6Cp=9M`kpckaioOQfPK#DIhne=!BB zye9G%P|7U-{2Ho!$GR9&0Gn)LEyKkTANj5aZ6jeNaklHNdx;Amc}Fj^DO3AAsSYx+nWFMg=p(v#JDOFKD8Ru|m$}&yiZGt= zU-+_=)r__ZY9|BpY@jt%QO<~i~inE`T@Cty+C7l)!bAK2mY7r3j+Yyz)!*a z<7avTds_oU-qf=aKFRK8xK4jI22Q2dTBx0R>A*Tb(o-Q{nZ3IM3ptL za+VJkeh!L+9W#Lc->=+O*h$aWL?4(*S?`Om$AeH{{3EPD*Ma&t$1HKKD+~%nGL@MA zRVaZtJWMMo7A6jyZ(hjDW6>ZE&9pH)H>9Q#A_OcN z%<{=~tGWZ{%VE)eSb>G*^p#ZR+yrlJmSL_$7m zLYQ%F-|nk=X@_NHo8zA51x>N4N$d-8kFJN`jD~LSh$e>{0gTFR@yRBlO!Y-6up6ODhBDzuHlbL3G80q6hM;`gC}lBT($XEoCE)qj|KnTM78wcs(J%8MgNfojqLdjt*0ZE!gUVNkU^(- z9An==OCfvI=KqeGT4um|>1V?~-yU%$@=)R0VS6@tc|{tTnS$E)nM`AgG)R`-LN=M!qqk-7yDZ!4!mkljD)J3~ z_ZN-R&-E@}$%p6NS{2<|SPY#qj;1l@#yh#}_8n#1g7JtLdy_JgW929^BO=l0B^a=8 z(F}&im1RG;SFpe4rM3``YdrSXT7|FnZVt8yq z=0llr-?Zfh%|Tf71wo5qYd4oaX&6T@kFU4PVTd6&Ua7vs?^e>!W=&;#JEo}yzZ_gr zyFTf8>7#oYdZ={8?o&C_rQWUE zn%hV7#;~(`Jt=1nlwJy9XY*Sx>DH9=ps}=DK$%Y8USSie~QvdKXVB$R&6J_7-O9uPpc1%IP6`l9TqS11;)@b_=c zHtn7-KC>V%uv0V#4$9BjKWT7MYqfug?jhdMB`rH}`2*@1jiz&je%#||ppr9Dpn@97 zQ@loN)M?9A5~v98c$ozYY7kC~$HmEa+s=dCOh7!SfE8Nd zw)*UPD4j&?tEY)idj_VH+AJvgKK=97KYi=46zMwAUUi+i0YIBWP?)P>4Nn{FvwN>c z6`$6Q!eDH~i1-!;Hi?6F_!i49TLF~6%(!19PG%y#qW51!yzk~%h@738*pi^nR+P&l zCilYzTHvuR#e=w?q#j+iw6QFEN4l@4l=CY57>oAL6l!imxOtd{jNj8C@F4l@1|V0a z1HO=nsI7C-*>6BR7?y;Sg5 z@yq3tCYZLpN^Zk0vt#3 zrY_7Afyx~LSAQdc4P7~x-GIFMnG9Fi6thU9JfQ{CE+$phWR2*PLZXBjZNUj{v0d}I zU*P$8dJ{lUoi8i1dTL*LCV?25X`lTGxoYIKYgyRqJBW51J1gj#QdPf{6SbHz%+qp4 z<}D#xaa`X=8YmS^qz z(_N#54a--Gr|HWqCv&0;8>@ZUz9&asEyu~SC!fB`u+^ zpa8v(3SX>uLjn9BInn*u1_#0>ra^galkJ8?{-gCb*06G7!j-J}gAE5yI^)WzhjDx9 znw#qWSWH3Vhd;U}byh+4jKb^Xkdi>BW z`Ul%Q=JOx^Moeeb(CQ0Zx5IR{q;nWiGb&OxR!ulqGq6yFQ}?5{PEQDn27|CgYuK6E z0Oq2mRXmp&$3hP7>*!^zQUOqH_zJH;jn$I!^TOxhP*vag$b#sYFd(>5k1%$ppsz-b zYZ}9yL**g4x!gb;iXuqH5NKJN!1;4KU`fSfspcf>W7vc^J^+M_54$Vcn?Yld=kA6Y zh0&i@+|`wz9cYDs038f9|C~QLlB(m%Qsbox;)%9>nOLH5h#t0K{9A7LXLui#PQQ?w1;8i75B79W=+-tuRlDwzBzE@PLgg&Cvojo#gFHg3=f zIPC8?=8msx4q+4B8A5=gnwkV@pcYJd5DtIBJHfkFFtkDLEgbV}7w)#0`{=7IIWp|d za`p1%b;R!(-XLP8_e=D|{vsk=(lQ^|kWq^8@y@kc#=S=bsK|Gt8W@FxPgieln(2C* zpWsn|T~74PQq4_baTjY{)+CJiikU6(+dkNoS-#4)Y7Zs=SIX}bN$>uC& z@dClAS6zVuBdqytaRW^wU>7n7>v4rbS-hlh5EK!R7D51GJrU^6vToAjXd*;3B?aQ8 z)CUU4JotYGra-apxeWIJVQq-Wn~NNfa@q4Yhy7DH2>=p6x--sE|DIc~3&?}l0`CjM zN+%nIOFI3Ot|zv0gRZLdt3e56L{ z(u8cHJ+T)hQNo*?)%Z$b%JrN)1D+GH{4R@b#ws=5R-xkLQK*t-a1uze8xWT!^y57(aPR@$)y9p_mBlim*!quo z&z@1h=|o5{5%<$V;^`HgY436HGuNsgLigb&w=1za@RpETw1Lh@pkg4c>p{4}Ks4;& z%*uCAsN^+{M-LbV`s?;gnf0&}d~h@Bo%Q%+plVDWIi> zTH947IdGC*q)<4+QwngB9|={T%}TOVUAyIbTslsp*_#(kMqd6-IGs|4j~VFR`?f8B zGT5yrS~)?%Lz_lmyh6cP6LV8WhLGr>dZB8aCxn@Ki2m(svQml|HnwqTdwB-Rj8BuR zb8$P9fTV_2V}y-(HL16XqD|tl~mQFJ!M`pe(WR6q>Koi``vP=op!oC(e48Rt@ zo)j3so(3%Pm(<&DQnl`q#w#4b5EOsa@Z(wfEA{wz&vb z<$C4J;Nj2mHY|B-CD4x?Hw_-xZY^gGh)h%G14=H-b}mMQL>>Vs{qdwlL`En5zpmbzd(0&r&S|R$q4_3Y@NgP^f{)eY2%=$oymE6@^RX5`!Io>Gy7*gyDvurm##g3WpN;GI=wjp-t-yf zz52q{h``zEbIa7_yjw7E20#VBDR28R1!;z9D73we&78(OSOrCNqArEQv)dJ1H|q6I z(1Rmvt<0aP9tibmpM{8)acU6Swg3uK^v)OvFknQ8iT|-5=zS!2b!HrOD$47Sq?-zA z)gw&7S2hV&4AwVDpxTfiPtW;sk^Di`bT!uHaVM8hD>ob$(X^g95rSj(gy6PZsr3Q} zcye+D?$~VOLl`1*KcPT@x$=2%@<J_Wvn4JTB51&qn96FzR!j#q>C-kFIo+Z%#076ukpsW<1d!YP z0$;F2WT|Iy01vOq`{blqAx@E1j)6@~lM`$Vqb5y>Qbg^84w*2GQ5YPN{wp%iPKGB) zaDo3dQG4f)yT+btN(KQBu`4rRT1|$VJ)IKQ+yGb_t!@tBg%HQ-+t4Ba+#_)$w*9`V zc3*nk6Cc?6-y!VZ0gWe=z5BeRvBVJKGU60KxGSv(4UX*@t^*tXs|b;fp|8pG%t*gWdS5fY5v-$G<<2D?(U0dyswl z)7T%h?sNV^akYt=*A%pDtG!J+U%r`SXUP4C@fT-j+DO???2ff-vA(sC{y{@M^SGWx z@nYeCzTt>gej=ZLIM*@U(uUr+PG-Z1;0vkN*?n=;<{ndSQqI3M0Fp-vbz}G&;9J}| ze|S*$;X4s8Q6f*$6Fhu+un+daP5li@Piv0Ua)sd3n!>MDVE4H=P8JCS|MBHI^;-x3 zI*q`?yz0Sje|>}VgyKEUF~vU}GvA~4(EgyNcr1kb74Z@DvR2X4Byx%0;OD_)pdB^j z9lkJK(4=n*9Znr}Qe!ElR(a(JX*zW>;WETQvIV!8$s>dn84la#AIuj*#rlm_Vz_{p z<|vF;sjNgZ7G#+WOMDpj5B=3>OW%A$|LMFdT``57VmuBJyK+ z75C?ByV#`~tI^AB+PzjI>-$jEMO(~R!P!#VRu6ju!-V)@;d-fi;-#9JV@8l*GMw5- zF5wkmaQglPgnLaA9R#m~WHM(+A?-TyBX_PsvvPLG#?=Dl)`a)q_ndJ;hqayg(wax} z6vYT?24Om@(=q&@JbG;f?ltD27<}6Fyl>0E?vD`On(45yK!T$311-iqj@Qbu2O}J^ zom#_jt~jfdaCMq*DIA?Ox-fjkChYQKeWp|5sx~-IIrbEZyU?f!y^z~&(n+sz?EbW4}*QWIt3qM2Ozsasx@@; z7-JMT_qBm2{!vGU*5p#fIb&LdJtPXi*(o=Y%3zh{EIYr5H@n7Pw9Hr5vFH2BLEUpd zC3ysOvlY>no1vfPBBZmv|UOHD5M=Iwxagz#JL^H&<*!M z^_OS0e%!F(u#%kll97o~LAzgENqb;CVdsr@niYE^XhrvZO{J5SA!wwO_R~s1U0@3u z8iwI4*DskPTe~;f!Fjlg(~+E9+m@Qp z&|N58?%1!s`uY{^bWXU0?ojS}mPhZlwVPoYZBhJ|Exkf&cga0Psmq||H)gyo)udN| zsJB=x1@Se$`F54_!R;oxV}}d%5ba{jcl_i2Q;oy!w66OXM?ven5|1akfm`i~oA8C; zgtdpG4A{aW$%N@WLr(C1)XlBvb96{g`OU-3^~RrttBni6YxDhAgSGo3xPMRnD!}dz zbUkVI!);^vh};>Iz7a+o^y=IU-1qSbl6zs?U37Bj2Y2<(1hI*7bn$;FO7K)MN)hO7 z4);+BSmb=R} zPCiim4xjZcv@ZTxQ}H6ziB_#g=bSFY#m1g>v}D%RpCmAGr@UL_fa~C;doG zc$of3k}@K$s9ePoycXgwne#C6{fBTJUgFc48|*H={Y0gMamcOUsVeZ~1LtAEg)zqH zxKG*NLAH9w`P#U3*k><37bEAU-^q^G%BfjS`isE8_OqqxpJ%zc)53CW6G+#cRyRAf z$xmUNFMWPkSRT0Xd!S6l&tY5d>#9%HMeOg}>iXbFUzzEuX$Jbq5xWu%3ap7$;V0KM z&#kL;-Q&^vZa}9c`~iv$%QVv^yJ4xtm_qAo`i>FC6l3l}FtkQBN)EPAb45iWT^&=` znX_Y5@b|s6@ILGXB=ese%Bb4&M|zP;bH|=0q^%|(JkV(3^YJZDU}x3!Z>Q!={H`}B zV{htL<-RW~q-u+y13~%@fMfQlV^&y_c^@5qO_jRl`JstIb}Is_A)8|1zmkNGuVw|G z+HlsM;gXw`Yo^-b_q`Kz`-~0CTO1BBYQ7vy2}qCkFm9=*I2Vd0b!AmTCyTX$wb*dcFte zv<>a)I&*ygI|Hu$(VwHBYGVh?wd+}wU|LobP4?hySjp0G3b1TlE^%L00=U>eZ&0R) zi#bUDyEhWYO_&K>V%B5zj|te^`qyObj|Hm+)yE(Dk5gfe`^{%}P2AR@tuK5J1-kI! z%5u1o|Bs}z3W%y}+pvmscXxM5cY`!YcS%WiOLxN{FqG2W-5@oDbTiV@-SzMH`_DL- zqs_2+)_U&yxJ{|a-=Wl;2=;xF+Uh$)x7kA*$z&YD;s z4!1WoNm0+T2;xD=b}F*sZdlJmRacmC=Z*@&LCP%Vf(;y=fz-K=8RQkHih)j?ftM9| zW3`)n-Zx@3n+^}nHP5>q*T=-cI<~E{72K|(?i~1=zZNXSbyb3ZNXQ45ewPqey2m&Y z2JyLkk`}WEBk7^3XJ7L#zG@xEC33~r>}L?!-Qd9REg8Snx&L;vgk|!&#*M#lwVvRB zoST9OWc@SMC*S277PRj9=#llMxN>T0U(rFQQt2hjYB2H{u-CWrIgayh0YJ)ej!GGx zQzMsJ;oS_Yb7=I$Q?C1+ruRDZ6c&{lzXBe7UBL{ ztgjbfZsBx^=Trck&)Neq&gx_;?xg5 z-q83a(txaJ1p3wb6GL?4^!%!RY<&Wet@;*d)=K(+2KT%6J3E=6dwaLpeG%AYyxI^w zC2}AmBmC)cYzH?%Xoa|; zJ$0%4QY$TZ$h-Wjsg|aV%GLvSZ8i1pN~USJE43|BJL=l)0WPPVKL>7iC?V1E=O6pi zr09vpnK8Oh3krozeu)lp>N%@rarc%}erD-2Rc+ll|8{_>@;wZ~AJu^(ET+FQ-wwm3DiB z0yzD@BK;LfN48!*3&|4yh+^H>&5JVGv}w28zyy^e@6_d5Pikp`Mdn(+nFwz^CDHw< zZQ~fcLup%MF@p{f&~50zS9c{7`ubpcIOmIVmtp3-kHMwyYIb4tq2*JM`x)8qe|4xM zWR)`(r&;9Hh}uBo_;a2n`eO!n!4ZAWtH2G%og#wdzB7EguK@>-NJw`d8jGHta*6_l zGN!!S7#H*N*H7LY{nYV6j1v02}(@^F>g4c7anHv7+^V`XK)Zn=cW@LdHIx z4)FhCa#8|+KBM7u;uTZmz!4+t?KW!o#pmAwSD0hUZl*A0yq2gKm_Ke}!eq)5uz&Y6YL$h`0gIP_{8gm!+2cBn zDdj5}j&^YL51$11L@NcTVc~xDqFM?A?56!CCU0&S5U66c{y;`S*Eo@=M_gK?Fx7|D7{~;NL>>Q{?ZpWf@rZo49Kk@N%Pr&!aB; zn5MMsn)+|sgQm3ocbOCa&Xq}>qo4mNth?s6{-D+!o&19!8pHOf4sj-7duJtuBv>&+ zb*mxoiDqTxh^HhhJCFOg>jX26EQC36J(M2$NVZlnfVrkP<=M6uZ(SBbUwD=?qBZ3y zd*Egl&&FOGa%l_Ls|M;9kVd2|1#}Y>@~_!lvY9a(>aZ~F6)~9>F;p@Wsm<)0L@~bh z%1~{#Hlj26SXZso5KKpeckg}#r~?pGf*>*AVnI1-!u3=RLioVC3qIt9`+@B`^}z-9 zxZzJW=GK>mU^=b6*CBz-%ea90nywqc-Fn=#7Rr5jX0F5$UU=dp&swsBCo6yde3b&9 zN6I$PSlaH_%o~2%PgDHg!Ve5x7ois&LOBcq@PiX{C1&p!v#{;Mu z3&CTt0Z0OX@U9mbp-Z)SRCI^TG>^n06DtH4?6`QA>DS*51#fHr%L}Nqb<}e(QE9gC zpAOMn9}#7G5*Up9=#M~g#~`=s2GAKp=F7QX7zAmoT!SQCgy)0yeT8pVmIQQ1c` z(^m|_40>J^o-x=5eo^AR7a1YMKDF3lb{Q;D`MQH~E8I+o?R8@|9BN;8R-nA(d1vQ; zN$!~85?jJ!w`Sbvs?A1ajr{DI<8mFGv*dEtNOvRre2=$waZMMsTn9*UllwSiG5UH5wY@JK;*&qke< znwvnjx9=o1Fh;IZ>L@i4{N6evx=hnBuMg@=eh&zEm#ArT-Zb>I`Ax-m@7c%@obSHZ z^d$1^E4d?JabqPjF4l)Iwc(|Wc?&WkdCn}l$6uS;y`&|qZ_RFDVgiJ)LYt~=P)&g5wT{f`^O&ho5UD{2&;Rcodg z$J^xJOEzO4|EkVr8J=y%$zyHtj#9~oZ_RRSM^dCA$II}7yZhE=kH@z_`QixIQ!$|Y zS~9V*&k=VY!gl-f9!#PtAhx8k3=+ums@MAcASvLaoA<<$&THt?jP1V~^0!lRvJFYk z#H~P8WaNmAQ?OlUa4>zrHr^j?QL|~^f##^3T~DUQRXLY&cvRfHyKGwi&Hmx#q4^L$ z=m|&k_Ih8P@s8Oe(r?i5R*1A;)Zg8#UX8bmLVEieMTx}kEEB9pfTfrK$z@h6v!>z?Zr5~Xerh&`UcZ^^R##|d1ltQ$f$El2=|EzQj&l7sYh9{@XY9_wyZ26;1;0Tce5g(@5i+xa-I8QdVUX-2%H| zA&Tsx6~3Flt_bs)rQ)!kD z63F|7`JL*zE;l_$9WIHPCeJ4*)5clSks79o5eBlq$PFp}Cc4J!LC{7jM#<;RTOYr- zH#ag@)WS*0BjS(xXHO86eS-RzxAsXE>C}4Alu)DC9%C()mG5pBDezaMiX<_u$ks{2K`%?nG9i51mvDJ7*L~;pz9Wt(tOLb1|&`eF@^YA=>!YTvHKfLQvBN3J#=jkbI zTM5*=1c+`XBHuS=niUHC`sZ_u*vgY)B<9|(jLxy2Ja!8$6iD6ah$DK; zeCd9EH^IO?4xvPDZ8u6;_E_D|apYx#@}zEs#v=V+6x$1+@?poxV*MsrmnsyQ*={oy z#j7v1c=Kt&vK7NyWpdfM7Qa;RDE8~yZrfjBa#+3INv!()Fi@p z3LEiYGEjEZn$7^}k51v`_s))biAjfr^yBX}I~lYdxPGzf%Jav<=jv3IkI_BgD5Ee&y>XmJJw6 zt!RWQmEhk_m`q<+nsSX|YDS3T4d9(M)38Bf{wa-KE9U25#N!F+C3&`EqJg;zFvVJf zj-%)kcIBa>hPMj2RS0m>U#a*57Xq>C>K}0f-O$*y5u3G3dK}e*JjS3ac*v2L@06um z^O@c`QtQ={E6M&&#oOXL4<+atrnY`_w3H$B~3g3*VuTeru#JUML z95Bx_$0PP_1gUsA+l*m_A5(A4l&`a}D$CK5dl*SKSfib*;w3LF+g2*l9M1mmeV&Pc z?07#?ORngSN|Um@2hxZ7D{sziqT^I?BWYKH#R9N=;cOCt)?~&HFK*t?26=r45crE5 za*<$U@}BRLnT~VudYh2n?~|Ensrb%)pWK?l5!?776Csy<^V+)R(~$r=gk) zKiy-e5V@p|m5h6cvZucW4M`4&nqx!`8{qZBQ*u!e1kW_<;$ag0B)hM>P|s2V^@7iZ znX=vq`>Plhx1P!(C8oSYJW=t_kQYn`M@2Q)=^`Ra>)O0a*>N+s==a#j!}R8gk4p|v z)N|Dr{sByFm+RPE=E)jqF4s;p z>?4OnUTVWwgXMhqKesd~E+gTb9E6wz39hwcVe%)#C-!}c|3qK8!}H^o5LvOy)C9j0 zb4F3q=ue};?KbM`?DL#It`P?(S)1!2**Ip)J)@JSTk;%&|gqLMJy0)>GxXn)=qp|E` z_az~sA2Ci+MEs7T7g8Qn)u1xw?NZ<(rUSCE>xr2o!v3S~J*uSw@qQb{eu}>} z`+#!4yQg63f$fbZb`bpEf=J{z!wQZ9&O6b3<(e zJULTmYEZ4H;uXZ~rFOhoE1Qpa_ z<B46+YFd=$B8S({Be$lnW{KEP(c=IZ<&BYbPO>GyqxSZ9S3e`6z`Y1?%}V7)3lIsE<5 z({}KgXq;2$O#naMeHm@MlmiFYfC{st07pVo&rV{1kvxl|Uer=Km(6X=3dBum^W$1s zo!IhQeStLOzBj`(2gG^-&>mXqNJdu?s*kMnhD?6a$i_NlTx>Ld2AqO&TMHV6ro#X)6K z8vFVGoVmHs6dsOU4<*Wkgsi&KV7Q7m*t3kjii8giOUvyvB#zuAowSiVS}$0WrF-x` z?LLkVue2IYK5RCe9&zL; zsabU>ZB`)bd%Adq`~tCBv&eb+EYOja)}|E;B4$qH<8DOHu}{jLkE*W z@NECA$U^&Y$FA|v;gJF5&ta$OXtFetGl_#}$ z{hAO|`lZ^jlTIfk-s@}_{TwT|uZP07{^NTo0R*Dt3#d2a^J-B|@3B&nUmN1inM;r;l z-7pXwnyk>KEzIbjRAnNCQ z=7wHjgiyfta-x{nY(MzvR~ey*k>4_r%)}r_xkWkuA;Beng;uR+I&FH~|0(!Zil@G7 z-Z<myl^#7ZTa>nOG2KnPoK?g?X4qtQ`OwS9*ibvIMec_A814g@ zChr*hcU`-ljg%UfU5C?NMVcB3lh0%fa9@qU^=MrqLQX9)S3&cQ6%~w`Mu7F%XVGFUNqDncxD zs+oh9UTf6ccw?mGS%tMdzfeuivPCh8tXI^pBy)`U>L!FfZ)6PbIPF8ls*_e|mI`x{ z6dG-RwoC|Wst}$zANm5v@1s`oNjGSkgUG8kV0+3>>8bO-D^|3y5fO@L9|$O2hcfTG z(wAEbYf~~oSBvhxD-jqo+-btPPJw#5^$!~h%p*w#s^S?o3==if!`H;LN4w19=W15z z?;3=P-VAlBAgu6@Nuv5u7qLf$P+xe|)Cuq7JhFk+w^zZy8z-l&aQvWPuML0Pn$CNa z4euM;rbAkapo6Amn@c|9`VXgz)A{$K*6WJ+YCsl-NvLr zVsB#&Zn?nD-fSJ;*iQo6KM;e3{g+t2p$%l0YH$PwO;q3>5Q;y>8RqX&4fk0;R{M6D zjie&8I-ykB&Dyy4Us~#^iUaN9p#)k*wp_UXze|S#{lthV_}w=nT}R}8)O%iFPpWA^ zAW9yi3B+F+fxX?NkAX`UD~mPhLeqLKDRc_> zPmED8bnLUbNgkfKMc;v9+Y61YdHoGEa5{BJN!0$k51h>!!~@|&@=NTz@+4iJ*2H1O z!*)d112R9lU&P2DZ4er%=yuNq;erVTj6vVOgE?+6Zl(~13Mz)r|0R+wmRe;0K^WX!xc_q$_7$*Us9gEyqQ&Oy~G?S5abzlL}**JYo* z7k~eB&3Hahn9RD58)mNKMDBSWK=!_-H|cw=kUO6V>WqN#BJcBpK45m=9(p;Sd5N;} zo#y^qTMDju`K#`KQIRKY`kfRcpIys>S5^C$Jn$8#{?M(KYE9ko5B2rZtecp9C6SBK zgD&`AMBSA^E!S^kytm)-wo}6eekxllc^lFSnq{Z^oAjcIZ~b`^@02!{x~x;ln}T$G8-@iQe%Q5e}AO>q>bYc5A5v|aehljl=|-q z(a=j%GyK8ltiv?jS{eDrp^K+`KGZRjxE>&r>YLy|FdKC#!bdJ`qfTPT{o&JvZJ&GS zqXD;zBe;<@HW7B-U=>3b7gq7w6(v`n{=^xv-+)`Kz6k~-j?9FHO5s_I5=^~JbO5pE zgt{Ua7(|V~Od$Lid55jKKyo%b^M!BDAsNc;P3cc;f%zvn?#Dc=HbOfcaj?A`?hkk; zMh#sRbT`@TNXL|$qay#R#+)XftiPIOJ_*!ZMQ`T)CQs%jY2PX{L@7zDcPUGkXrb)B zqlW*XcY9F7owG+}cP8y4m`n!<) z(K_V9F&F)sA;V2}XO(q7F-jpF=1D`#pMyX!tpJHoX)%!1n*mqCRVgHb8z+kxHc>uL z6nUJQ-W4EORs@)pUq|1jzppKAab(XL%mxFZ_HCEw-XS!zE1uwUHU`)5)01~==pDhA1N;kgFn)@ zpPubqMFE}5IvT8d-2B0@Z|3bu(4uUX3r8Er)ZHAz zB2`LWQT2=NWTd3%Ob}MeRe`!`RLylq@Hxt@xQ#!;CB$v+E$FKGCQ3DC$n~k{9Q7hN zCxg_mf9?FQ7x~aYk2lE%ZZcP~d{|J)wM34Kosd+b=gI^|Lgd5_BTk8q(C=M&TYAi6 zVC++n(36E#-u)N)@iB*6z-G;t(7K8>`N#xTqgnrC2&*vXw^N!+YSfj&Obe}3`q3;e z;r6%G15d*JlhVvsQPq{trLQ_Rxt&Fy@6wysk%m!erq(DeG)Ys(_}vrZMDBPgb0`dk zY8g8UbCueZVaKKvI8)cMXz^+$V2q~qH{rZ3W% zO!F#cN>3g_HexGo`D&V*UfD0KX9s~o%-u&wZMc)$&pN4f_0j3fe#=izfUMR zaLQqWrq{;ycAoQhjd#q^740YiAz#m5;?ejima8NfQ!tnZ)K8s^X`^ ze_pkVu=gVRU}^ZHtqisM#&$-oI>cJ`Bi-#caXWRodL~Qo-yRY@Aj_W2=?6)W{d7_x zH)Dg+&fb!Lm!J)Po~EpPnxWwp6%BoXu7~HCtj0{37$=ITo({e`o%RKncv3rg3BsM7 zN)9bZ&*ha5_Rg~%xNX%wVpH4n{Q2IM=rqtgRrPz+iL^JI$O5BJ1jUS}{s( z#l`zY)I0`hsWCfX_rjf`gHHl{xGsc!u3$VW_J0C6avcAlwNW+!6F>%i8leb+^56291q{w#B$X+m(L{()W0BCy2R_ zmE^X5A4tp@yr?lsy7eK1FNzbqPFGxd8nHco8An7h0n5%7h`O6(&6QqPCjuihDK$e! ze~+zvV8dOE=^9=xuwbpG=HQ#z)hktA1~%m1VA|tRc6g5%R_l+Vdvi3e2*G@-wnD8w z7(OMdIHxVfL~`@5Y;z~4gO5UYV-G%9LSg|Qgvf=%bMnMu*Av0NU)jel9<~HXUbpl} z9zJ-WMUshz2DpMf10E5Yp+Oj{qAubk0D~RDzQ%EQ$j{SaV7;SpvTT_B=z2_Sjs9-b zDc`pf4eGnc*!keJcz)Z{UA({?_P1u%>U-_;F8;+_P1ZC=F+;Vyp$ z;xw%nTw${rehacRmGp8Z#L5KBvk#rhtnyi<;>QSg20u9rH}7rgLaxF_W7%s_XtFpqQgx1EJJ@jF@O zN|y8BfCBRJW)BOWc6_FVroIk-jRaeMEWh2amW3p*%8kCZ(tAVtVQ5z7K6>BvZCby` zQ9BgtoB2#O)3vFmPA%z{nMNznTzT z9g$j)=KO4Z_@}cC9+%n!0g|Ahc8a-EhA2!Za=P;^vUEgEI_x7;ultp=ta#}g2@5*P zxw^bc1>S#*s>vurSrEHX(??`&)_$&i+}2TBM9}@kybWKI>BVQ{-f|AP`(oIw-V?d= z-{hjep@)~{eH-9b!ZO4w`48o87H_LduzRngOXe8ad&xh@Yt6`lUZEhnA>SlJbGs5D)uHc8*ZxFnsI(Dz_auZt= zu`>kIj;gOX(c@W-T&yf0CUQLp<0JDLt;E-ey*U^@P4U$}{{0mAe5>lRiti|w+Sq46 z-hmDExyq}(ofACnsmITIIiz>>olIF&+ZCs_jwm#=m3R-!0uw$^o-m7f!+vrHu^F z#;-B(Jr@GHogh=QQkWQe;<*r-Y9aKCE?A_#*+P?j13tdrE5BT&utCNA%))1)-Ea`@ z&N?o!cWuCSW|&QCzD@#%^mMv({coA@ef-yQR5(^{0$3$AUC&x%X6`Pvwr=Grx6Z?# ze^;}<7v99(PRtJGY@{9_=w`(BDg&U{fW^HsR%9~)R=uCiY1H40x@D2}PwjyYXQ#tW z6yYTB!zHWoe>_=@?gmoOkD?LiT50Ys;p!1CNJyoa(%rr-f!v$blL1Zg^-I_DgreC+ z?cb4-$$^$nL@Kb9b^}{#*svuae(#&nz*Y0j&rj(p06ILH%Q{6>HvQ?Yn4(rp8IZjC2!;2hQ^<6>HDxggQnQbO#H;7)GTu4deB)BUj@BlF<+h^PF}?I{4&tgT;?OAVe` ziAl;;6E=L5dIWYfSBAx1$UVs9`4Om=|A>XEn=qr&po>`BVKJyikGv3o5Mg5=_Aaqi zyjA+Xv}&c&EdDX7CaIo zZAJoB`8d$)EV0ATO; zoJ0{}^8jb)qFB6K?h8{V6E$!!Db?ojFU4RA2`j<*M&|*?Ba_J<)C5 zNNYfQFF;NwJ%vLZDD|+GmL&Amq0To6JB?d`sU&R2R>-D>%A$4RH<4a$qts9UmG2Mk zNANqNu5p=0?SlB2DkEeFkOdOm;wt)&uVLHK4_NLd9~+I-&o1-~@NRhXjEYGWH~R3J zbQD%KOPZM*bpUihS;sE-*Arcv9&={RYC)SO9nRdHubFs^03bTcWYWh`2-*X%rklAI z80n@BLKmE(YO0 z3CBk9zAE&JPh;smdph@AKfg~q6u^4ygN#eJ@>le+Xn}43y8#CeU7V|$I25EfR znk*92P9FMs!H;{GBtG8~?V$M0e{;##VvM{_hmt!I&FjuSd^~4uNg-$*?x4!&KnN`< z`QvV`>!vbYBmCxG(=DLXQ5iGf+Ic%FvPNc${$#+@556;z5V1Wkjh(g^8dmU!*nfLN z`P@;Std*WPGG{Yb@|%)Y^KsFXoQ7_gl2HH;QK2qtjhm5{jPU?beo9F~)-#6g_L%rs zGGdOMWo)K!g^&<2DjrqlvmMJloo*e;@Zg&F$3i&D7R}SlEH1U?I@IkJ2f6tIQ5*#^ z0}qX%`N%?2(v;>QKKKOpQe1=+&ZWspPlAsX3s!V0mVP_eFVY6+${K#v)+&a3#OPlR zU;)t$ME0Si@FXY6)2E%-r#=x~<8?W=N4>yb^iFkJ<)5!PP*{TyCbQk#FK5w{U`TXrdO$Sp zXTKl{Wb+7&$Hx6E&EjY@gHv$=vCv}?BWEZNr<_e~y<4)44mUCGa^ za$l#ce7m9jk!V5TTe3h)sXqK)+WUjAz;z>EJ?!?Pfi?32(0x(5ZY{IE?ekgnD2_u{ zVsat`vdWP`joD>OtHG&>CZJyzLJyE2`r#cT0p1?07ow?=G+(^4e{}%P$%f)bRc?kW zT#_El(8lyTPPk;3jY^9ylaY%c{V%*4;dxzGZiY`MivJ@NoB$Bd#|rkpCyT~?M>U<^ zM!G7e(rPMQJ|~ZAYrNi9FYd~>PkRP6lYN&#Z`)_*C1P*cE49xDs+N}jaSSZycgg*@g6g1K-DMLm z81%Yw<*h9^`R4c^e~;38dYbLiIu{TAe{b4fb_fta&m$p#?MK9^fdBj7e`5EKyN3qd zCpCe)0PdujtM)m7ddwQzHxPp+ujd=`Fk?fGLnbB!;29*N?9jdA<7I;L{f|Hgkfy#0 zHBsz zo6Tr9>j^*Qyqw6W+TD`)HOiBB{?n*W+qg2d%XP~+iOvi$V>0vI^~Ezr9i(J$?tNlW zbszXC@5ho3sGE+(l^J$G#9>;DxwX=j^(xdSwM_HK!90jjwo|fWrqTMffBGqnyEV;C zM1e)JKv6h6gkf^n(~8V-6~LMs27C4^IfkQT*K#G{_urHBbwr)+Jk`w7Ogl14uiaHagk; zmjrD-z~i`vr?*tfD_>YVLxc=4X=198RE$2=TOX>s*dP!JW$&z&E{?P}R`F#0b+c;Y ztLN2W8k|h3zxS|`UuNNZwTGxTmyn{-zISH0lslOeZN-Vmw;g`>46&GR5l$afiTsSY zloHpetSoP05wH9MJ!FSgOojHcM2VQu`_QDWvxova!l zQU`_GesNhS^v|pNuv3-nIh!2P+KiJHznE`VNyZtDSi7Y6Nl#O}lw5KiM1`Sl*5|C> zL=ww_7Y6%KL5rL!)#leuA$=$v20tZ}#!Zxwy!ZNkqrFQtpHEw$Y7l8r%lXo!&z0Se z1-%iNMZx5V0Oe{aT!@l_`=i{cU;&~i{s<}?wtvJZr>DXdz^J-=Rs%SZ)!gW@7T`BH z(C{ZKb6YTTzrAMCicuJBG8%w7-2@b%JPt=X$oT!2V^v+XAK9gDA7$^G#?F@0KO}$~2V5YH<7VAq$CdQfh-q0>>Y%UyLaM9x1BC6yeXa3($GU=Bf9J_c5K%LD z#wJe0iSRy!|2()QtYmSK^Yvm8y(+?PbuULpUvDRZdONe9_E^B(1=$f#ZZx6I+vTMO z@4Uo$egj?)g_9tE9qG|CBHkogzDad?684Dj(SeBAPyK6H%?R9gB;S9pe#meS`iL)0 zS@H|R>3P=yXfJKw-SZJ{yb-JH|MSxF z_XOGbLfrPDZSW0^C>J7c(>p%aSicr+!81o!~Vst1y=EJd!yU6uFy53i__r`2~ysu%O zYnk zGV2>Y`_4dD)V{}DT1`}}9=sJgu*BFVTgBF2Z_cjEb-eqS96c706Gc20OgoRp921b# zR;T~;T8p_nTxe)QcX@6273+`qf$Db2?n-C3q?ud4H0R|455N%PE9bi_|2;e7tmFQT zL__x!Zx?=F&5J+0Lm>|jFm?sPZpt5zM93-BiZZA$sD@k3E8C^^j<~kG^ZLT4MM+~= z&HhT}h8}>&RxeLZl#gz|)EqkSjLCo$b1A2-E=aXqq>7Rxs`Gd_7bkrmdEYPc2L><~ zV5AWyKoU2?Yq~FtDn~9P1~C$oN%Ar!!*^b{GZDa+G(OcKu550f#U1}w=9ng-u{JQ1 z)CJLw@JzhBESzX0OXZwlVM$E&w9oELoxRS{8d;JNyJXVSDG<-z*c}zJ@@L3GA3yA3z3I^in0krKt>||}^!1jCWlG{J^oI5L(Ia?-k2Rq8VTo4gXrRVQS(=sJ$Q&=0|&F~ff+7gFd zQT6(HV#yrAb^~d0$0DWI=kyrnmvthRI0{_;Rx84g8It{1EP^%0rb7$}s9H@z9O(qmgMU1K8Tz1f zs25mhkcdd`e95{Mv;D%bwi=<^_VwI>YY)x*{PU|WPwvB2#pA7xT|D?Gx=(la==-=U zA@RpH`FAk# zX>W6xUZ&O|AF4tcxc9hq4C`|t5f-jazWH(zV&ox>>uoAfjXyS9v7rpfyb}D5#L6l! zZ%a?e|JtjWpYcUJ$D3Kce*G#MLVXaGnMn%)Ib>#L3N%Y8&(bJ!I%G+%q-pFGD-R@C zBn*JzR*Iq7P~nZk=)+Gh(5H<6i?y#dN>yEp#(oaQ)>Y8lr)=;-#;3@RLjQe!>7HCn z-qldsED;v^G&TVxKopau>3y5<*hz+OHS2$Cf;!;}kL!Hnz-BQv%-H z&^IG%Uf{GYg_d0{5tK{zmW=~B{~eT(;jH$#`pG*k-I%tiYoA5hWBC8PAh7k%I8t-r4y|HK+Al*Tv;e4pe-)m$PUJY>_Bznk;{`#qpc8v6izF1YavLHKz9ICY{{)$HM| zH2{l+?>N=8ZQ7KucI`(l!ia6yze69kBjVcUt+o=E-Q!s#2;#z$?s5L7^-cubndx#Nv!mMc)cHyWE{fJ-J(X+(NJHV33^hv$N^F6aidrrc%=H`( zS8E-2h>M@8<9JC;rS?-|{@IHQaM9LKiB~?XouU zq+)3?iL8C@xnV(f%m^;i{o*8w&`rHM5e4dVH*bL*?Fx^w9hEgNad-Dc(h>}p_>Is` zXqdX&Pc%F4m%RJyfO7*}R#q36cUN)^2~@~z?8CC0s`Xd1+SraUE8p*pq$6_o0 zIL0g(U<~~!7HQIbK@fQH`0IW?J8@eGKQNfpMC9jtaTxm)44R>rC>sSioFelb0vj;z z-T|SC)7TF*-~zvhs-8!xBz1>h^T9R0NBk=D>p1iDjd_QgR*A4%@EY-e_B=EFv$pBv z72`gy$|P|KDo~kvCSsvy`0v5{s3{irUy3jD*?}?~j?|}I$AE|F55W6#RVM@i&Mp&W zfCTK`4;UPf+?PV?5u!JzTHyer98|o@>N!*4ITk))NSU4rA}B3==0IPc&ZC8q#rluT zSS|k^+)q0zctf`ko?h$6?`!q}G6)XJIun=IMYvJKtZIZHaQcliVez+6`In*~H^s>7!sP8gRK!sD%so!Pb*V^~Zusy>` z+yB0!#O=Fj=4OILf+%bO2hJ&6*LZHsw-Ux)NZogT7}q=?SZjC7xUFxeTCM7E?}iS4vhy)<%in80r-5|zJh`)SQQ_-*)$<#Z0MbCh*Va3}J2U7$`c`mcPdqF! z-1Lk=a88Hz-)xgERCeP)oF2cO65VDG&NV8dx`#P!CDh!a3-q6dGoQpcD4lKG;J~r{ zpX93;J=ret7D|OjcL?NOl!WUUFil>U17;38qw~`+eiUb(zuy>MH+cb%<+Qd6Qqatq z&@vht?J@CB$*Y2%+sK1=;28L>AqTX^gILOxjKT!h`vFvw!M=K*Ma;H>q6~2bRyxz_#9P#&lUdc4xUH<9f{X zWgrv}h+c@ish|7_ko#5`b^j7o>OEYApann=YxO zt5~H9QIe=L@PXewW%}rGDHl*PMGNmng2cbeLxOBu1Jfvs|4_W%X49WI+pfBEJ#cJT zQ~G1J;4oHxEf`CI4od9&*e7(;cHJneKn#km%{6SD8}6?Xm@d|0JE?GTYR~fGvv~J> zbc7N}Tfm;Xqi2rtzW6=N%pO`XrMEF$NaXI_RTg3HZiJUWflvP20K3l?9&V|%pb6Cw zJ4^5JZ)lq8F zpC1M9V((JqN?U+Gzu^dqdGOCZi>{Zo8(7qdDJZtgf^b*OfsqOY88&%vSR;X@!3?Lv zq~*s5Z)z4U`QWyoD0csW7Y@kq`}dh<_s6Q;VKq4q!El$m$Ov!>H+dO|Z{Jq8Pt`wYO3F;n&5#?>7P?=-J^8W_7&VR)o|*h&b%S# zyisX;5v-j?W+OG)$IJ1@l(AqpFy#6x&WSA%yH0(Nk%(pNZR1PFC_%V{2&05qvP+E2 z5S`4b6}gqLB=@d>MZ`Sze1}kzNqS3xai4F>nip9Bqic_brb!@q5oxwD$%mmhFJmY&t(Wizf^QnN2x;H=g+PgjxUH?1t>y5d@ zZi7b-=c{+Vs<*$ko%!0)@63Pa*t>`h_{!eQ#_cPRYo55G;n|0`u^5oAx zol%RNo~}Gh3p~GGmKd1OZ$mYBMqS^g3CDaJbxb&L&XV2QD^Ni>Gdk<@A@uI7F zNZrFr#+ta<`Fsz*Fsg1DFa6$EnCnb^@|P2 zP36SFBCE{IAH;-y^K;8I5f0Hxe2S^8;Oa(3W|!3!%y;+e@>=*y4v{RaMM<)Z8c0Ti=xQuswNU>!-sjT*^Na6S z?=lnisSWSI*75IWpH#S=sK6yIE2W9`!kIH)^;O-0LBe_N=S_U;cCz0^m~iZk(5|Vs({%xTggk*RNf@t^ql{qg}nJLoR-H{Fn5X)dgFbbJ8fDy?XBd7?!hhVh_tdF2E->7j0$(=KO@(@GK`RH@wULTUh>a zW)I0Hg7Ty#GQheHC^ta30n4uk$!RL1VmCbzgwrOd#X+&XmBMu$*u^ZcwJ}06C#JwaP=jfROZ?zl z-@xo?lhw;NH7f;~*=Z;(x1z4L5+T9<>Rs;X;i9rEKE57m3{z!uY~1( z?I{Y_=*=29l!k!8)NvUW!a915(+I!~sg-egm21X4W4XOC&j99}pW75E1N<~hsf&PD zUpo9clMz}UiPq)ic;H7j;_lBZ!xwHD!{42e+jnZGI`ds$%rnoSg24@{Qf9jXx#M1-;uxHDaVCZ2ffX_}RnX!&A@v2G2hEYkcmG!}!r} zzXQ`u6Mp*S&rsGc_gzaKlA6sh50=3^zY^}&2v7zpXK}4Ub6VNDPM88Gt3*rXSc?Yy z^h^uFy}$l8p8w}78jvtBJ_sds#rQk^rjioQZVn0wlM-X~MGWt;xY$VbwlzRGy>JbW zaze$p_{fid@#|S=n4hd0pwQeNl!pcTAUN0?L2{o41bSkw<8%$=NqzFgt42}QP>R>_ z1_n1SPzb?$(>hYCaRz3k`{>I^Q?e^&n*Cs1)e2Lhqnv|kxLQ!rq;Wpx9l=E=2KUZ#-TVP1*`3}t}u*wJE@VJTkPtnx=}Pxjw? z5-wSRaLx^edufzPhIuw6!nGkzWmgoIOB?IclP1pwpBdY;bD2UvlTO%kNCxf+9pz(g|aNJHDRh*9^03#+Q9TGGbPW`7o;)s z^QFI1rU5_sJkh&7ZFQA;WK*7n?KfXYWiPJ5q(oN~FKLx_#S7EIUDdPPJvIQ&;ohnh zY;v25wk6$o{LN<&SDhx;e=7XsxkzixLtb++X8Ab6C(<92=T1RDR3Ktg;930ES;M^F6(1rPM?@dxT9xy+99F{XR;5nf<;dlhS$|(UviI#=AuV4I-Zvb{lpcJ{_9WUiO(ZK$+Ca#^Nen~-~x4U`-6T$aAJOzR*3 zC%mWSZmR=9xpi+V@^>_-F^^!J)b{y=)W&kcYNiC*rAIr}iVsWqgRL^QXw$S{f3u7y zWc>ruFO+$vMjlf_aeG*9r1r3!+f%T94bI!ce5TfY9Vpz>hJxLcW07shw3 za`lBIU*b**oQ}AXB*a?dQPNwE)Vd7hcNZY1HyF59*}ZXh-*kfa#IQlq@SDJWk$|GuKe!hp=3pcw42pv+uH-HwAC@4Nr;zr zJ9Ajt{N5}S$e5vXM;}_YcA;Wz6RJ0MVE)OK=-M}5)@?x9`eyW;98*v6(u2LQ9PCEg z4mn>(dKH$NWtuM(^d*9vqx>CB3eWk1fnPB)J_F-21T@C!i_R5yY{8P7*5knaC$a7G z`*7mhw_xefwK(vV6WH^GBRKfw<2WL1H0|)0PpF;v>M5N1`px*d6pzWG@klJ$3g{TOch<5#fy%e%4U3tLrkrRvBK%8m_c5ZaPcgJ`;Y z3CxGvQ1#gnmG7Wea?$ZlSdO%*ceP=J--f<8K{<^wEC0z12u}EI80YC#PVaF}Go>+) z%MD;oSZ*(?@=0cRl-nDF*b;;jejCPl1ITmU*eB-E!-N||CkxtKPdZRNnJhhp!49oJl<5wR9vNiUTvm1CkWL%RjC{?L<88QO5vp#s zov+f}?K)1{@xU?s{-4jH_0U4p?2+~N%P}6AkILioQFUSgYHyscOoeSu&A~xb9~e+$ zAl{0-ay+}cQL@xncAqx1Xn{`F{fC{|S~GVEcN2+%N)fW8I1647g4p zPP1Q+X5`z$Z+j?i0CNKI>jCp|SWZwb@%z^w$M-M(3UW88cX-LNW&~CzBB3i^I_q*Qy@iOEX+kT4^Y2~#t!iY? z%?VJ+grpuB?6#TVUm367=<1c;V^N6vgI69#=7LI3lQILv3YiP z+kiEJI3aiXf-;5J!Of`%YE4sEmnj1c=5wCXCj{R#o(~Rc2!2x+l`9N4Jjof{ldxO^ zdP*LHdJ=pm3>WEkxlMam&Sgf>Ps2VAmPdByt9QTQSzfeB25Os{R2Q7EJhUerl{=*K zwz*w3%PGS$JKJAjd2n%(!g6|+6P6cl?$Q9C{2Vx8xeWSOP@}v|JgY8<;& z#vp4+HN5I$RYHcaoZg|~eHjXbO1H`LF3%jbc?s-Xi^EX7LfVMYDzvTZ!0x+tA)_uu zB{aOEJrEe@i{NNKxOvV+V34mu$&dhFm0!uvPRBrZJFNL;4SYz=OL~^4WhBE|Qhg57w4=1<>dcrNh1Cw2*!{lg!$-@MPXjkMb+qaqJ7)SLy4j{pPAF%YSFKPypg2~&$?4TfP)_}FP8+bC zdgb&kuUp*>Q`B6{P7g%JU&SePfh(yeaBKRyI+{#6~++VZmLQ%fIPhq)7eT;%~ z%CO`wug8oWAEb_yz!W_L11DF*6gUYUMUe=uPKINuH;RUdBV`{uB5}I?6&F#)L;r8!;0dL@4I7fJ*rl%gG zt4C4aUW4Upma1pBi}M^L@oR>da70G@OMc~g8s-0uZu$87Dl=pQ<>4W|2nq2~BP?G$ zHV;|(DQNF+!h^qf0De(Eklq4T?pup#p$-VINJN?(_mntiZDU>K`Q^P-wxJ8A6lZu= zMx&TAEFqIsk}7{uHKrxIqI7u^qFORAE!7Q_Y2l~yET6Ny4pYotm|GgEzcr>bCj@k6 zpnOlC{>Fy%OB*(rgS^%Cn3C**$`uR@ItjjYu^Ql$P&iTA9D0_Atte2tyV*YwI6 z@Kb|+_K5YR!n0eR8Gg+%AkW=k`nVaeoX@8|qeEHafZX1@JZ4b=T$`g6peHUXQN42- zb&m%IxwM(`+@&rmhAGqpkER#}<&<4vN;wvSa)2+3$NiVWVPmFW{e|TGkpW|Z_oG*QNkMadjMrJZ9t4dJcB+pNIAOdpSro zgc$%dDmF}Ec~G1@16eWfP778I+imwB$K0|oxV6P0a+wt#(w>DbwrJZy<8;WPd;~7Y z(fRNtgye;YT3)QiAi^wT56k(oIB8XhO0W=^r?0P6Sgyf6SKESp zCaAY(%r%v-8#Fq_`lGHq{$$2P$=EqiMfvbIzzm?p$!Udp;+1=0$wC7*d* zhh+`Z`5m@8%sXuW+?dbWUajj+%s1w9c2TZHwr!WM+uCgd=1h(HjeLUgygfEx&Uu39 z{Jl2tY^38L`w-<%nry&ZQsxtw6M7SDGtH8^X=d4%T&b6qBlYG zJeOIdF3ppaW^Bi(pW7#3w?7_ZzwP&*fkPQwlv?pLPUr8D?e1(=4{A#7P=B8K%>=~M zx>l*3&2{Q|PGD|G>x7M(;XROwn3W~)mNp_r`d@*A+4B76!<0A+larkhU7xBR=FagR zh><=8W3t3oBq1;_6hYQ-WOSJkQXPfKNiz{G?a|C^XZTixz>UFt(_Ilz5+UttS_)4EJNS3EaAG3(g3njrSvohQ40gH@NZuaooycq{uUwx9Huq6>zHxBCz za^LZ|`IQ4-B(#y2Z0o?0pM3@o;{qD?kD%`G0@NHGMdgWws5m)_@*5YR;>0{ze^BZg z040(PD?cptid7t;*FS@k4#_jxrstB&InU)a(wFCQIyRM!)~ch)W&2j>Dn{IiF4sxkCN~1S9L3#EzSte%Yv>i0h+)(!svj^pd z8KC^*V7URxC&F@j;BCNg`+36*&v0Y8k!JvK!_8{*1?bmVBgP+59pL_@#Zr+9m9{V9) z!W+2fr(eOzZ{CVuUi=-t|I|dC zC8sySyEsavT*w z|BrL3rA|F`>ZwyFJ$|TAfi;cLoDiGF`J@pUWcTJO95=kgX@uDX)oF_>)EhraI@}R` zxq6-h+tU%=o1$eQR!R(LHCCzY`0UW(C z%_CKaX_s@-nywmp@$(DEVR_!_Mup|sOKad=7pvay>RGSQfVUc8}bpF9D=xvSR|yz!Q0mZ!6E+YB~JMZKbgN_ zvI%akb5$B6CN2`egpE<5D#KD%TBKg(lwV=_{5GsRT zO0p1|$JA%43`^OV&C`{je0H)IYF2h?c~^5dtn_Y{G7PflS{eycnj>O{^AXUMjPT)X zP#c+`+^?TGjfaJ`h5u6i<6HL(v#%Y{(ZH}-B zaO#l!&Lm7J@yC*TwjiL`A476q-2cN9c<_hE@y&1T#cg-5!jaFf#ylC2v>oh%M@s|( zN3#%3IgMpjM9Kh}uv|UM&2DlWbLF`!hI3h{!s@6lGs4<3V2YZKo@2{Z62z3^j^fqr zD*ZzbWrt)>R4r{mVpArj$2#hO-m@SCp_Q?)^jp!jx)Trl<{P;9>XSHq*CD+4kE^)z z2X`U8DH{a?rSLBd*YahnS~TWBNJ|>h7M5d9QIH0wHKn^Euq9PL*Cw=2?kPg|u7xo9 zPDbnc0Za*Z!rec)7gzrA3T6j6!{j&_uYT|<+Im}6cEa7mN%h0MJYA5O5UoJm9*T3C zUbwtB2@dVS`1Q;P5K2(adI`uwLwykz=BHlgo?cGy^moP!Z(PPqw`nM@FT!8(4u)0@ zV{W9}mzBx5A#N_>+H&+oqbbG#MJrqMrHgZMI2v{h>2VT-7p`c;^b8Ngwr3+!HFRgd zvbYA}jj1pNPeSMZQPq^5o$rsPJ@a6SpRH|@Z*wx7D|uf!!@V{ZDg3fTe#a_z^kGK2 z7n(Nq!xU&jKw|=e+EWoRPuj(maxLa($h}d5kQKJzo}p`s5VocSK`ROov{c%>6*9l9 zPy>Ndhnhh{O<4}(p5;!(0bqd7xUNjNm4>2hW19x}%voNeGAw-A=QxlIw?$b<-qwJW zjkW5szHH^!L!R~V@M=zgcUuztI&I$ND#y~7 z0m_8XOVq6^QDM2ype&Q;a3U;^BD7wRhlu$E+VVRvBEJ#WrkU^36s0dLV;2{yq!P== zjmd9@Eaz7~d@~9;FeOh{FwAE? zs5cWS^NMjp5?_3@>eno$z**>6GYH?*P`JkUz&9xvu2J5wc9!GMFFv6Gi_Pr?2rG?O ziJI7gWCSLL!9BzaaajrQj||YjoYQCB01s~$%$_q%?`KD+S@7_5R(Q_&sWT?Q$KL}^ zuCw6jW0MG?t~o6}DH%p)9+;1>!jN)RLW6WbUq4|~y1<#pcX`AKVUnhOH zRTf0Aq<4I@978rTH&-ZpCcsYJRHo}1Fq-QUI%jUP0d8ZS5SoBFduOe}ctUuBW6raF z&w)4v#{|jD<1+3;hSXyi=XITH>k)Vx^IWF;G$G%ZXT2#KOTq2(xcD-F`^Iv{avr;p z&-GXz^SPY!1kc<@`|T*~mV82O0%-zpW1h!L;7zd2GuPseNKrVg7fT+HHcYaQLkBQ>Qi2bl4MRT zd`Xrq{e7$a&do(=V-ljJ-SsO7LvT?fJftrWnj3*Xz5E#d`0^uo^si^|^gqwzmY?2% z0BLWNdd-M!OG9W~9AcZ(P&6vnpsNVJIbmpDJ)qC?jrW|wz^Va!?HAv`cOU&B3Wq9T zU05T(2ie+w7q4tU(eeh=Z0N!trT&ov%P_oW33lFn1Sh|LCpO)81gT3aP`+EnXRE6< z5N6uiY6Wq0e9ESW{ox*D?2`L*Zwqqvwkn7wY%FAe)jjkwZ&FDOeqE6y=O|ImMJ63H zsAVl}Rb+oA66WQ>EbUv?VtJnC7a?_?oJ*OG8kA#PV39Fc8B)h&Y$MAO2J?|PkgrmS zaa}pcACtZ;zaZ^n0Mtt4%JCJiZqt{#tv4=I2^fBrM33ge{T&KWW7n6VI@$)qquCyoGvz#CCZ|8n=$&nVYQkrN&xvNGXSbB&v;nK_ z^RDMDZf}P4ioGn0{c`(lu}=GK(9HW}EH3+I%(I;RK2xIRKN+vN!tz7hMz@UfM`XP& z1?HtE2Q}p~%E@p!=ZjDDtEKIbvHYH9&EqoG$CSqM#gv6PHGq=SlHN3U?RweZe957H zmDRfY!gukrzyAdV>+8{UWDv!B%WXIM9mnQ+@j4iBeB_t7~!c z_n*h3cpfENWc@t@upSsh(cxiOj~O-y>rpx8BmL5j_1Wxz+#d&eP_$p{pqvYtXMW}J zd8j%$AEk!}q-~V#AM8W*sRep|sefLzvfAHS>3eF8!{>sZQDln(L_`+4Z@ciX*4JcbfL@<6<=j|IS`$md+oVJJL z<6h3o_#`=J%#7aJ}LY4G+z4P>NqUVKRKkH8%z)*Lz)rK*EGIBG0(>ScE>S>kfOLCkPA&6v8F;5Hll&zzxLRz30QOLv zc@y*PZ6XLajNqLR-taJ=2;vR99t<}?xnay>nbgHH@LMGNBV`S3@)XG@2u_|~qHs8I zo|LyUf?EP*E+g2rhs%V@A(SQQmyYXb6(U=*u>7;zaTRalD-VC$2FoA+5xmm;(Y3Z8 z-+Syw$ZIV?fH@T5`B7MV<0csbzlI&3+lQlHJ&DKPenvm5jI2n)<~#S|DO|zUFCN0A zI42FZM_A6!{VAhD=uJ6o|Ul(YvI6O2EX0;i0dm*P|jeXoR04=gk?n&e*W&0 z$X-|tznVk^<}9zrCFh7Rn-H5G;D)C-jj}0BnXew@miv~+qHb-EN{vvnJfYK~ z*DSCxS)n)sd=i#VDezI*8eTsRTs*3ykh4;rS$XC%mX#?i_o$0NwG714CC|MgRON4G zn|;u}dw~X2&6aCy?#hRsY^#2>2~l}5@Q(3;UyQ#7_e{%4gHNyzQZkb<*VO^u0iGH> zZm!!b)y1W>ig$n)fN%K?Ba=t{Eo8hMcKB>7)Se{Go z@ZcFL!NLHahG)5ImWR(#SWY-jjdNQ0k`|qxk>HII!t$^=s`t;ALo+S1j}>8Zj*Dyo z1qZHyay!j(dX-a##qcVp5t=j4&@y*!j#g-HfO7(Jf^x&V+_gPUgXx(HT~%}3p&?3j zsvpN?m?9=&@xFfC|FfI1|Kuocx_dQt-ZX;SesmB^?-)a^3^W3VWqXTq5wMuL!t&h6 z{WYb+Uthw|TXsf~pThF6&J5%%sexZzf_~XS&GM=(eK5t%fho-$Ir41t9-=f4V5mB3_FEqkR6Yz~c zK8PzHzJ$=MNSK@_;i2FD7=Ocis$ouP3cj>q;7{t46ChHag3|=#+2%BrY%x5}Kgl#; zVyN7|VFB=wdz0Gblx3OgJOls0yV!MTtLjQ`+`mp*=C^S4o@4Nc^@3A^2a?-!kkDlY zHN$fkRcWk-8`9iVnu=f3xR*zwc6+~`YkKev9$&5=jtqEQxt3Bu(^0#*M`JcH0BGHo zUU*l=V0NybO_D{H6Bn$u9SsapfkI+ll{c(V-FSGTBK7u$GK)J(XQhp7w;+ZW2P zByFfb;8>1&mItoLSI=_7^2qh&h}&3=gv~V?;FGYNn&s+Qo-tctdD8p>IF|$>Uw%U~ zM~d`CUhz74h9V}TYI_f67WyG;eI5K4=fQJH4x-mpz_PCkF$=74E(=HAqB@oM;a3XF zPi}%^x*wdg1NDm~z96Ig7Tam3@=*A;B*MQVRXspwR))Z-IacoNEQRIt5OwQGQUFE} zMlE(quY@rO@G_5HXi<-H0`sUv@_V#c+RniYosL|Xug|cSm1i|!L4n+l z?U-)ylKayQ8P|Zhc~vz`>2u&v87zI8D(U0YsQgOEP`1k9@R^PsEmF^NQ_O7rf=gfA zN&8hl)&a*zPle?K<(_f=DDSJmr4OEmyR4lj{EKJ3mNH=Lw-oU1>9mXuiFQCVMe=2I>?m$14*=UI-hoZy{pVD_d4H3D;b-BS`nzpPpH5xv|Z_pS7^)=S-zpR!48gY+#o%62vrWY=nt zOG>s(%xBO|rkT6yk+!`C$y+Mbk~UW$ZhZ;D<#`Dj%hvf60{Csxf88N{U@=a!Y~rSJ znDfp+@u5r_m{`P z@|-8gqc z>%6X7rGTR4KIJ{gSOfergwMDsY6={3eGpcksNUg$MPVo(sm9$u`~vR!!9BR~zMFCK zJGa6+CkT(c|1>IAG$Kmc?~J}eL`t8aY*7QO^J?I4j)2K!5>9>Xc8u*>h0lNci+J_J zH*n*ZZo$BY`N(LsAXWNn`XY2mt@N?mQLtRrUDkw0J~)r>JoPht_4g0pfk%FVr~h#k z8@_Qwr5Z~2_Nep)$7dXyW$lu4xA$M3$7(zua!zyPTF`i|Rmz4^H*#J1#RN6?X_?Zl zr}Md6T7YzUPIJ~&s%1;x)GU@K?U`kLJrc%>^h?L2F&S$ul(ET(1+_c6F?PoWl&)?< zv;20M=a-^>b1&wdSc&GHL+C%c6wSNmqjXcJ1{$S=1*Je3n3LdJwZ{oz<@zc>KGuPv zqc$r(VzZJXZEA$&hOW0^hR!%;QwYSF$9silEN9B~>|yow%<$~yv^~r=rVaQ_nHBrM zo<=}VdoX@IE2Ta;_e=K00OFix9+%mBk{kPCgXFgTU>)2Cdu?=Mp3A6P zET>WKhE{rdXxz$f8XnI#${F?8>grZVUU;$_*3*)Ist*>~cdkp&%eMUXGxy^c|9o6M z%j*tM@4O4tET`^#;fYR^os#WPZso)^xfptl6QEOW<>U~G2*!`f`M8#Elw%&386M~a z?uImr0pGdI&_Dk;yB?6Yw~6(09b+53hbnFwlC(=b%j=E|Aa_*_Zv5TdcouJ>a6=oa z4-s_FQ&?VjOv>Ik0_%w(SdR2c8z}eBA-Nu61mqu==IxhjEospa0`>t^-872Qql3y# z$`{w;TfhDGc!1AKm(JkXGmmTRI!dh2v-}d-(<@hP_R?ig(cr}^=hO_%a(fPC&!axc z2+QeNeu+Bh&tFnlPR(-4uzc!S{;Ap9r?C8g+^z@9uU>ghVL2hW4U|9kZ?Jq~fY0&9 zN0(8e#TH<}n5RvI=9FRiBv^j-{8PAm;b~lb_NnW_a%z^BogR_S0N)bN1Ep2?=^kZQ zs99dRzXwgH7pkXu*5-QYaJI+*LORNOJG895X1VH?Z?ak1#yX@-0Oj_uoJJWI1Cn14 zloN*2dz^sW$TvL84OpJKv`Rs_y?4328F>>SH_d?JhH>8B!`$#ZpSUjb$Bo|K^a8&I z#tF*py~mBz-t2)oVX*8&CZ6GQRo5 z53&5l4S49;Um~qO8^`WFg}=P^B$^h>fTW`c-K+c1w{aMs{r=r}=$T(&>A_X1J3P97 zIZEc&qG#&}zWdBiap!NohTw_>L^o%t_alKIB|RAIlind;dG^QfsEAR$^yJ|ZM0e*Y z9OrbxKoMek@{u@bMbYY3{Oqq!C@d#XjOmj7ACmJY$7TR+*Ng`-9D)2hOpebI9ff+Lrat3TN1A_ zEDZ3OwzgJ*dGe}qh2@lCaj6N`X!KdD|B@9X3g(`O{Dv`yi)F>Mw{vbWtLL(jyR_9s{p%U-(A_ zVanWT@CoxnQf3mogS_Aw-~q27cewgGsi(N7p9lN{eGm}jJ08@NK|X2JmJSOKf~%V& zJbc~NX1UE#-SR1JGhuSSL18(y$^EiIFf+sfKB)oNe(P@B_nU7iEO&@;Q&`RbpM>SA z<(}au_j9g-a6+n_fpVQDAW!cqQh**+o36n=>G8>co=ho~K&x2Vs@~@_6Mc|BT!YCm zE_&Yil4zRQ1Afhkh@w7me>wvCQ&g{IBUltrHLeac$5bhRl^l$6H7alr=&whIkZvMtLY`Aq4JHEad zJ&aYcyA{qo3GiQ(GY-q+R+gz}dFHxWm@?#8t^RWF^PW#vsOM1;r7}sT_&K&@0a;bXP0GbYtsOR$BJYQ6;YDVd36?}68HAo>p zZI5b5l{O{=wHv$D8;vmvC>!M0m;{gN81;glZ1zNv3_wgNj{1^OV-pld$UWZ;zsdxd zq8w1PupSPnJ}`ORfN%ZzhdA^01(;@-uw>IxIQcl@3tzhjtsRXD4k=GTa7by2)U=&pQ>2Q%=J|u>{b?`p5@h>d*F~CAZ47;cVvm= z&D0kW41&zO#NK=a*C%O^V+I2CES2>nzir<_%*gSBDRhcns}wG)O~4IiA56>k!K`#| zEV^->!kM6EX^Xltkh-D_p$l^0J1-64D+>|2vOx99sasCHavD9$LzWjJdUdJ7@`N?z zDBRVqGAw3kJ5olA;8Gd{i~Keluv|6EBPOGATQ_DD`09NYy21*d< z@-g``2%Mhi4wK&v*!bB!`dm_S$FnE`snV92yi9N?2!wfAwaOj^w5PzQHA&jU3e0VY zg5N;8J`*9Mc^a^fUtk0dXUa2@uCP2}fwb=oL@Cc8fjK?O4fz$rvs|TFhO-bhKS!Rq zRD=@>kC^4zOF@Lxt6t`#1@LZ))!R?C^Rx$NAd4%cH#E66uAK?rMeQ&QTti zH4{7l4W$}^D?4#y~WJoWd>SpKM33+qEywcdn`@A?p$uu;>J;9l zZmm@aoi5u{crM#a*eLzaP4auar4lJyYR1bEo^v^urOSMV)R8IcW$kEC<2>_Ir3^vu zCmBI-tegwVCUG4CVoGhWE~bVlFqZO^RxmuUjqP$7*W)rmX2V#XDa+D~_0$8D!0K49 zdaCB^m+`@#W`))Sv-CoxcPf`r{)5YDTt-h;8uKX+VMs49HMYZPdXExHao>1O66N{^ zFOp|fj+4hjO=fP7usnBPhkBUjALvr45q=@dI&yZk+Rnu`xxR9(Gq=k5m1|4KAHwm1 z?X4)>)&k3BIgjh=WQ`!?#PsWJ7M|sR2O+(r@4 zP4=62FVUBu-+tl;_|hM~ftZFg6fLTOWqvhkS9hXrMJL?S{57^lLPZvS_VjP@>u3Ii z-#z(9JoJa3;rACF!E1OIF^owNIzwN87Oax7)PgePEvrN6sx~}$<+sQmsDi&a3dt4H zCgnw;a&tFg7FdwGwOPGTOHT};T*h;Ghq{r$mjZIWd0zC~T!ZB_zPunXCoEUJ_`T9+ zmHV4o{nYFyFi%?}&)7;UQkEBq6|2rWB?2i^~ko!!|Tbi_a<;WDEhdoXXmT?3F$gy=>&!fnF}Zj`ah z1j~`_#ZoY=h;6)F40AtIG(>ix2l}u=u;qKY-uhX%ua2L>;9@ zXH5rXo(W9_gW?;8i-_QpIu-v&VEw7nVm1lsnX+%V=D%l_|}Q3oM8wbcz%&@Sgk zUuYcfR1b6pK;?Ms_;2o%BYq8qn>$c@WE2(07NGd}dF1&gc=dM1D%a@-~&GIYf&*J&Z7jT8D z1}|K}l@~8ddTHFV{P{~~{|%PY{!c(T?NeC(sr|S1DJ=gVH$#SHA}oLTr56;GKY#Vg zHJkXk3md3^fpDY2GRm;LvCeqIWCzR@noFbiNwEB!EPIYpEFS~QE&M^ardQ5Rmg<%B zP3GQC^(-$t(EA@@`6qdnQ>)xC1?JbZ%G1_Xt4)+)F(A1iy~1e&o^zg{JaJ4qaZAf} z{(6v{^VgGSu?OA;1UHr$%MA!_0CS_fJs>xhsSOu?1egA$Q>k}nKA_tkR`sf-6b7a3%fk}%Xzr zGA)#6;c*!dd?F;L5pYk0b%CK10%b-*SULk!MaX7AbG>Z3<#YU;Ve*`+UgeZwiL}OJc9IB9xvWjgJEaC9x32=TQ+?r(CFg2I3nr&I%QGO)?Ld|W2P7<~42x=(Uz33#%%d5) ztw>R zq5&=?VG6KK$xi4zyacA$*)V0eBYkxf9IK*{y08)~g(PEgwOe$$KJ%?l=YUNs;OWP6-uymOH!5L1I#jLUIN|q*MjXUUJ3W3|P)DB4#_yf|suw%$6*; zxX;0wO)C_Ve<0ghvSBg8(nIkU-ofaO#p)^Dyt)$(iEipu-a)yPKoe31@=&;}8YVxJ zo*$kAQ~WICFRg<|StMp;d#enKDai#sRq^OJAa#XLRgdz5r8RO+rlNWKAZBKG!W1zb zBR8(mI1;8fM|2+;!_-vCm+8rAp0G%}ohQE)VXfJin&gI-&4UW<`7*<&FIoD0UFp6JTs4poK>4hn2SZ@a6`*LCOHKB(Ak^`q= za@ZX7Zyv>*NDs^kae-%SAm)a;p`^1)zXJ1!m-;;>V_KlxbBX>)D3CT<+ELda5BNvR zJ)01Yw479h;UVDx@bY$ri>rga)XB_B8NYwivywq=ay|z!@nLXtcaZx&20q?y8sL`e z`bc{n5EqExtO%U>+hwf1YnQ&f3LDH;xfGs{P&rrO3*h4QjnfQb%|0MC+zI>WiAXsXdiU}xg_tqQtWc+%p5pW-w@I+j2*wG$Lq?=+ z+S!bv-5mP}xudhaqEa&I)g2 zCYZO{plY_1$=X)0Dd%&fkIQn5<)a$ebP{3kPw5XUWZonBd*!*hma10tfewYW3bn7L z^!inAXU-GkN*|j2X{|@*84rjl=V@I2pDay|jcLk;Y9z@sq)<|dJ^OuQ$~;Oja?HTv;+TNP&6MYXc^pd^^E9K3 zQLglej6Vp14)yAGxefdJxlhKi5_HF{Dpkv%e2U~5^%d@;RD$fgq`I#=WIyE^G38gW zyub3c$@SaWuI&`lg6(Z6+1jRGg3y_PeKg9@6|8I0AjFoHGG>v!fBv!>l&@_;(b8Ht z=lQ`sKLGL4-}B86LSbhyo_ga97VaEFU``nB`_p%^;j_Dt(NhG=h_rpuui#f`Atmu} zO7ceErUh__a>q}f`W5eia{ zpPXC5@`G~U?QfKG-GCyw9~qFA0cVY`Hu!8Mt+MKisgzaHUa?+D)$3f^eS-9qWreV= zt3})1KA5Gw&*(SfTTeZJeP7uRk8}^@O5gaF`)`sF$m>|Na}hrC!0q_PAHIX~;TnAJ z@rUr8b3Z}e26+beG|P3C{pJ42G}GckoeI#^+gyx6Ai}wdo2Xa*?v%6^;~bxzb!=d^yoa9r#dU-tB%Qra*|5gq%@o%oB4olAH0 zqVm8z6dxRd< za>}q!v;4vf&)~|Hv$*i=QyRODGAz$McUe8lFJ86jmQ$AZ;)Q2av;2k2&nhe@Q<})1 z4CeGn_9-m?)c#xh6qf&wn>{S2m-!1U$}U7JizBfSbpZ>89a6AjKcCOVua;auRMhp-+vBw|KVQwG3y`q zEHA%lzBb&{EoaA<9Z(J)s*Vk*XL;kPQ4JPj1o&j9l^tPr&dgHI0Os^CH-dW_z}yJ# zX%EZOWPp^qrb=xhBsW00A+=(FbmnuOpqyrSmm5Ib9+(^RTxR5550*3E9)xq+Sl?LB zejWR=1}vZGEp7mD1E61TxdF?QC7%*3hS^K87*Z<);)bydml@vB1h`>cImld6i(u(Y zrwo;7kWES_gcQY~bU_`q-*XWCdlzd!9zR0enq>7X&mO5jXniWu2TK&r-*@Tf@TiW1e^aVL za>DZ1fq!|Hhqq@VeL)2(H})tjr=B_GVvN9_hG#iJwqZ=2Wmr^=7wti$q?GQI?rxCo zZb3@AQy98I=^8@1rMtUf2qlG~VL-aO?s@9-(eH*dHnILUDvIh-&J=WWVW;hIpkYhgQh;)oGDta^$$;=n+S~9e(DmdY z*CYA%4U%26RaMQrM7QCWG9R#77!26{JB-H|u}`p`>0uQu8FVukuawoU{2`6Hi}Mp* zf14e)Em(1Q)v!duvc_NxeHYKA*qhSZ#DYsp0yXVIf`keuZ$b$}mshXc%EKAW=w>3L zH$T6x6uJQzXdl>a4aT;R(j~3>1cxZdfAujO+JBO8M{LK(>gSn!yB-CsN^axPwc)l& z%n@K_sQK>z4qX?JN?tT6=~@Mp!S3O9J|lvk&tvPr&@52{skQmc5edgCh^_=QF?@`dnM5+*0BRr;F}yN#(B zrwX4qUqfnj0h2i1e)s^HKPVN-x(vo0<%jF0_j3&Ng1evekt#UphX`hqRyA6sr({-? zL8@r5_EM^#3nu@u0|TdCx1M00yPMKqS;6qVwkf*#Y=GGoWegS4mQ_;ETvbF>MO7v(uJ!=MM6ON|DvPp3_pRjZ>( z%?s__h}k3fhtb3#b7jU2IX!|h@Ior@iA8&@*DLEuFli;^2^qtbK!o)Ki=zP(lJh0T zZ+VNxzh!f}c!#e&`kilP;Qfd+3Bc~@xI@X3TIJQ>x+j?4yp4bQEZXb;EHbx+QvehP zbK#8J@FXwcY3`W*Y$3Adu&c-Wk~+(GPXv5o z7+f|ZF!94ZqGE}n$zB*&y#s%oyQ3XGIeC||gobSC0@|MjF9SJzzmQp;!~(Xw&eV+W zbowcx^?fSc9#wWRe~9ZiO2GD~<|7(jdW#c9{eH%XP=V_uT$bA#PTnE1=Sc8?L1%<*U3>;!%43Y>fVC^;n=~a~ zmRq$gd|R5Gm;7eX#1C`*Z;j_xzZOGi}@FXW7)|2!WZ#Fy-m83Z(1aIi{Y z?SIHfOEJwlob9wAE4?8MV@X*@UAkqkP2MLuhGtWTF8Tm=o=48v56Sgk8oyMp&eHdo zw7D5)adr%vh)!#!r7{{#>(fmub%~tH^pz#7&ph>MVrX_e%;Bf|S@qLU!R4Gwq@Nr{ z^)GNeUqILmc8e$7W8LJ`eF)zqOKlPm#MJJ{W1QJ$@+$B`tf#Z9HJSbHrD|LQB>K`M z#JW#V&@UwPEfN%)cJM5ysRR|9u2)5O%Wt|PJCYUA1lt9BX+JIRA2B@L&(qiK%n5nx zNDq_>V)psZocwkVWRROmYoxz~8O7k+ji=!aiy+j}jl0gEv6<~RvA@yNIZO*PI3&T1 z!vXI(JL|+6()_01xYAQC8)23g`Z%2or6iwRN5&8p&I1o z+D@!klvtGoH~HJ+9fMu`l+^VmU?SuxgZ>f`po9`i&nHr`F8a-yH)a`!JdhCBwACZ{ zw`W~Y7W-OK++P1}rum9h@}B_C&DuLZYXy;tke?u@al>w)PT=;MW90bILp?HLup`F4 z-(;fM9C?zz2uD!)bA9~dgL<3X!P;tUeRjR0LWO0w;zb5moO0^ZnzrKs_~lm-iO@Vy zU-3)p)BS-}N~MkDvFw=1Y}^W>WqQ&M3Zy_0m#s48#+M5-@EoQ4u8^IoN9V-Xo)rJc zFhacZM&MmUF+2Z4)Rf~T@0z5(0X4CnCrz`6%r>UqN#FGL<{tUb_Oy6xB>5xli}$q# zi*OzJ{6@*TgmX7#QRZpKviPbUq}Zn?+yIy6z_kudYN4u*jlriE$~^Rp!`W7%^hbTMn5 z-47+)lx5&`*6EokD_lhqW9I3ZPMqk3mBa{NiWlOWfB=5g6<=Jer}KcP&HftK2MGVT zSWj3a`77!Pc$*yBgpMp8h}+|RZ|2X(`UnGwNVYCj*Jgb_xXH`Xr7Ed?N|=Cf9YAo( zW(`;1Hp6xzQc!6X)8#0q{H92f=x$&b|DIfBT|_@&mc+?rUfPAiVR(@p8f>1Q)yDbM{@$$rmgvbL z650m}oPhmlT?~6@HFBTrupY;&*OAZf6^`c+iE8+!t6yfuuC;Qx^Ef>nBt0XDb0=i7 zOKTGQi|CYU%UM|nqIMuREbh2Zo14ano4FP#W>h?-8kyn7u&~`H6;?y-$WzfL${gRr zg8x$Cz$TH4C5>I_#hnM~K_oI-kC1zM*FaT2KxTaDlHRw&cug8ms)2T|RsT1%1k`(c7BUzq4h2EVd^*bLN8|9d$;ndU9CLxl zdJZ6uGPow;a&K~A8HN^Zf2F4ZAKyV5AjV$Oi2(<3;R+m#2eVv%c$EGl1v1P$_v3)% zqX3Z80^F^Y17*(UWH^WU8lixMO)$ZVA#qvJ2S`~P3V<7Myz#!+E=!fXx!lTe%QPQp zE_#1V#=$w~;CA@dP@5~%5^v{bhq370>3H2(?iC(YtwWqCQMo)`;_ny+E|4?1 zT3#g7SOXNMxM1IJlp#vyA57AMfhS7&V3ciRF<}qNcX-nO>IWA{W6hn(S)@+<+QhnK zMk%T!q_vRTNkg{t&|W*o(O41L&3PO`&K@3fu&^-Zt)DI+{d zH(BhLUd{bcC9DPg20$mnAfMk*$P6JnicQ#Z7XPP~ewPp@pu6Rp*0@?FynBA|y204J*bG;Z_FgL31)gOwXI9=Tc+ix)T#; z5uO?dPdh@w7WeT3ZXr|sO|1XZXos2jfalK^PVOLwpeh+2EaJ{IFq8TwH^N4LVU9Xb zhS%r^LgIjg`5lk<=nDb6qojvaNeHZMtlK5(Hl(eXa1zb;eQI_TH@k8F=1(=#iz8c? zD;H^LzqeVmo-P>}J@47?-Y$iF(`;FRjF9C38yA$hfmH*o5I0p{@Ah6L@So5{o_ULg zjAV{^e|)RALcKIYYS-iL(C7`^JQ z3k6;5qJm7+n6eHFOu>hTtGJ(2KannU_^PpHQ&Y4b2~@Yb{r%?B z=)2UebLG(3Z2CP;SMVFxkt9>Z{jmH-1H^zCr_YHUmBd=yogB2QIK}qD9LysoJ)adQ zn8F#Sh@_Cy26m`#6?;9NHooU>Z$0X5;=!UH){ySx9yV7}xzqV(=`LsXD}h2 z(XNs&^?d2nWE{c+1TtucR~d2pyaUBtMxHhUI{{~;@{(sWB5&EJ7yt8ooLq8m@Fiic zhYO;7w!5z}1r2vf0-yMw!WPh3b-H~FLGpKy&|#J{gQV#6CcM%0)!;J_V!9S7aAM<( zBNpD6GFhnz28qH5>0|^c!!x@jl0O(_2jQ;8=O=S74VTbOAOKFur-cYO6E)RJk ztzMJ8SpILzCO1(})Xdv?4%+F#IT0*TEIg>td-1GNxYarq`IBRjaI+`s(Me*I+kVQo z;E_BV>1ADd96&!*15f})sxwveK8!W@ghiVnG>UGd78~}7vs{FpFt{*l*?!?=Ebgwo ze%jw;Vjlt)x1@{AU-MTF80tU}A&iqT-%Ot;!0APLfpMm-e?qbmSN8Y4g$3PKXipd7 zhI153ntx1mLbJg#PwB5SHT1z;;{ehMr?sL!i?2vK{Qd@l<^IwY??W8X%5buMoYT_?hatiduS9FyBcOrpEx0yT{9s3gAtq@s~%sFKTK1 zu#x;rMRJI)Ptq2@yD}cOE1U4Ek>TxEu5X#EmKtG z(poY5L3xX3f%YpmDWyJnp~ti9{GY-u&VJbTr=i;MMIF<`dO%>P_3 z&{VxetD}Y@wZrE>9HdUiqer*7bvz(1|KT6b-H(6KjAx;*wd`v0wOGG#5e_w9S*NN4 z+58npKOFv6w-B$Q)Z)Q-#k#&w$i5?}c4`Azwt9YuI45IjcJHa_GgAE;qOk0J+A*{xB<~Y>>>`wbQ2Dd|`#MDTdjX^k<4Qn&GYFAC|_R0i!$I3}m z{$2nN1n6YgOj8f9AOSdVG5x8Ur!zvSt>cD9u?`0G_5m5)cP(tTVU}jB^^um9fAnG+ zPb5Do1hT0DR#DU=VEOmm>zi-@>mD)H-+bCaBgX7`3_PDKVYEOCyMSE zXVG)Am?QE&W^W?)F%yXjMC*0INI7F4QgNTHQvLcsjF+o%t-trzIJFM;h?egEXeUxM zIj>OoJPI<(W06f75sfU$Dc#>Z@tL-ToDGm=s>wTH{b`FCwnb16%=!=oMR4>5Y695% z&ZXI%mIDzW#}c4EPCHHo!T{Tc!7zLi74; zS4htB8VdI<@}Po%)KSl7%72efC)DT!O=y@X6P9vdE5H>++*XpxkCA^zXKSbm;cfea zubiUmM&o&aJiKSSLf$g@%yHq7TMf!mOL5My!GRglEnhFxwS0$-z)VzKOp3*Ql}|cw zntOAv0A7mt^BDn<5EK0#fpDo4QGD?4O$s@YL_TQ`OugrgbI67H8yC>YOER9kaIZew zT+kjG%2XN!h3@giif1f?v3gZ4KnR@{4@4qh7mIbb5Z#+*LJ<#qF#xEiSs@on(;J!Yg-YwcJh|)Pfdl6%p0-6Hf{r}OS#%76_q2we)M?gh z5Bn~xYqEygApaQ##QisIMHn$k0X3To@*@S$Hgw*dQNB~1mSPKh??jqJA-=z}&J$=9 z5uW>VVND?9pis)D!}I$TkV3ihOU@O$z)_Z}5wZMQMcg!w(RESOq{HXzhLEBb1beNr zZrjwU4&^kk!kVfI^P8SyaeQ#tE$=+%bv%CeBujF#3Pr+WFPC!xiG&OaFvt@qIgLs9L?XU`QFbs=^6hNV%!#=Ygte=U zVdtz?WYX#p;cJ8E$89JTN;*Vwab0NV*#rS-xep)zGj@JI*b-X~@sagN*ZC>pXiUVk z@NL=jUOpVXbvALue)i9t6lunDJiZ0B4|dS6&3;HchCT}7j1o;3Y-)u0Vr0e z_b>nz(B%rw?mrjMyOsoK|2~;=f{ZNA`hP+h6Q|OXcVqwFkfs-uj6Z{GYFB!=6@r_c z)u{b^aCG{Ecjv!y`y|eyfrCa94DTGT>a)^DjdZE4b-jd zd;ht(KkA95Qyh?dnmCb_G!~l*fFBIvMii1{3+6o0L6HLms#ZH=WFb`ENkFLqXzvvuquT&m|Lw2bt8!{0HwyRVi>Q$X!aPt&J@E0 zfE|+4ZZ$(zVXQ3&i#G6GOX)heD3=AFm6dLOo93*GUUCmESjh`B?oB&$8QnK2+k+d0 zwLW|%Lrx<#vAq=0X^*IvFsQKOY~YgLWX>gt%1KEH`REen&T zniUc>JL@=P>-3(?SXG|QXxH4L@#cP0Mj-nos^Fx9O0tUQf?~( z4*9L6^jF;k<{!dLcwjA6o6JS@yWvM>4r>>+@!E-N&j_U;k~f8+36^7n*||MruY>Cx zT!EiFM}G~d#k;L-rx;|29U`S-y4|`-+k}af(t_ZMupV#hqvB8^8fG0VGPO33LRKqsH%@wJTYZY=yr)a8qsh{oT- z$kXg}{2TW6=)>h@<7AA5p#Wb`_E&LL0F({hMnrt zZN8z+REdOv#_~rln`3yR25N)pkDT)3dPcjk$<`_r>9vPq>)(0__eLsIfxfp zhxGY6%YRFD9RD`kWg%S6lrh+f1>lZq(o|Khdn+BBvva{GaZ5`9^{>Y1wEl3ztS%F1 zA<4Awr@-%HT{luFV%k72pW_Z)+r9<_?Yav>>N*ooKNBLQ^_#ZhhV^#|pc@zeIon)B zgw}gUrF|B-&8VRF6%PzOdzh;{Nk!zTO>sW^M)$nngfp8wse7#?qN026f7>j=toxg<7_tQhoC6)073#amASK}&TGf;EUz3@Mk zwQAWmeB#3*QpIzzpHCVK2k&s5%A_v4;YA|c@9vocd*gE-@hr5XS4~7h%Iokuqr5C$ zc(aC>?`Dw+G?;s=!J>S5%6E#Wmn7m#krG}63g>0N!?)sBI2=hy9#c&YH!p!<&DFSOX?aphrW5kNqz z4fF6uK4=R?UeKmEjR~>b7953Yly)suS2#W@XUKh0-EOR#XjMBp#RHOAFP^VP>oN5d z)*|?s@Y8~hpWM3{@^CSL73`Vzxcg7)XDF1sivX+pp5x$VGT9o0%R53)uyx1qBYyl6 zWb-NC>yHF9nnLpI)q+LI2FM?id8^`p)5u6dEWbu~*ZQ8Rt&c>XiUG-{{_s*D@z{HmO&rH4-SS%~BpCPlrOK1;qXU1pnOSKzkrN{Oa04 z&eG$TsL3>~@KrMY;uRgj*i;Z3_dhjS>Y5o#2#MoY)*Oc0eK*N2`uM$eB>@2X9VKsb zv6$S=`p^8Gk{WYFOB@+~m9_Q8Qljzmk%n)zgFD&(v^sWQCde0a0|g&EafLQ`!oj^> zDM(9bOY5uFI(es-D$+;G#=8wvh=8)uQx+E~buC@rpb*!R2m+x}oesas zEtx7xYFAw-3+uN%BfMef<)?=HIqG!-77lP~*Bw z;z^tXd%K;*Co+d|3cR+g-Yk3u1n&Q!stqRxtDy%5s*@LaIXvO856=b%RWfQ!c3|kh zh1v|ubkXj?gPk`|7>&OH=Y+jIt`$Ic%z;^f$ait?04T0jMXQ4?n%|EC4!!DCX(D{z z$%`l0^%+aN#LX7dH4DEfXzGVzm{)0Emk|23?_)w!?OQFbtohK?P*dX(67%eh^sUhJ za`ZcxbfNn-$4te=hjiTF)+1cfw*9biO>gg3+l?tAExNwxS-ee&0GCWryce-*7ta>N z`;R=g=a0maVY+zOmb<-5j zfCHZAnC5un5<-&+KW3XnM_DQ-*foJstEz8YTZ{?6dLBhIsRywCFMN%?QRo^9(f#a; z{Hs3=Ua)whk5F3q!x!+U(%7Wpsb0Emv{Rb!7D}Z--0LR*Ns4~U1-7(BpL!drl{7QxdnmAU6`OeWzZ;r;U6|Mm$_QOQ; zM_#Z)xc!vQ=7Hm~hYvbcA%1J)aD_HnF|idGaZKp`VD)4@>EpCfyHAVnqI8A!XbKBI zMl1euQbDh^Y8?AJFn?dlMv_%(wQv4t_7lCSa<^4koX@ zPf>yXuPPoMd==V=P1(N=mG#AxPNokf+`9keN3yYU3=;Hd^rav0AWQ`~c^~GU_VPf& z3VbS@3Z3WS-ZV&RbhQ#C(^ye82~&JWPaqaWyzcOE4JFO(;Dw`gBQK$!j%b;uxSqR? z%lXmxA~NVT_Dp0WIUn)uZhmk8mrsUwQ%jDSV-`CqqU&-lbiJ74J*zMhE(^cIzl9Aq ztwORt4gO--B$E%8((7vg&TCr_J1)wpiPE=GVmV9`$*-Z~a(0F7G3 zwn(YFb~&rlAmaChlX@YIQu-u24=>zjUAmg_c@Qpljzx`ZB2r5uPmw%*3&5lS&gHHj zUAvb3mLD;wl+doD8#jWDfPVygdx^n`7sAN{Z1FwY<4NX+pe!*^x1@D1uGkk7^a)ir z@OlN@d`~HVw~0S#|1aozMoa?8%KzJ)6qOVv8x9@^<2wg!~JUu+YK2O9= zA_wWX$XYNoNHZe5R>Z9i5uU~Xg?v)tH*a*>HZ1y$UDYF7!g>U4c$9&00lY5}Wx}!B zOo*fa7^y#n?pV?H9TQ&*RXaV-?1jjN0m=6r5I!zzg>3y3X1MlXSwz>^Kv;fuw9b^> zw=m%+&Hl~z2f>-a_?;Ki{Qq@F&5BwBUndH-{Aw4hTaC-_S0m^x2I+^esE8Y%2}6#c z;|{)xNC8g>2n(2sO%%>v=ooHq+#^G0JuF~Frfc%-#6Qc`jWvTb?Zw_abzQyOV%!WG zj5~tHdKd zFOg%*IKcBQQ>5l%g-6!R%ClCn&O$@a&z)u~Ewu~`oG(4cF}OoKm*0HT-S>OCaKk-1 zkci8I);~*?2?>N4!1B`#uw&*;#G|^knE&{Dp!#6No88^Li^(wxl_^~`gIPD5ZtvZi zzSQBRdsz@gV6tj#0~b~oQ%-zRlkY>N3+79#Bz0TOlbLa24-u?M5BhtOj16}s*ZR~D z+pql2zmI>%JXzMixGk~8&MG;th7Hj#em$B)V(C%N_}+qV`R^}k(OskHd-b1ba4={dxg9E!D&*o$?bF*|?FU~MNWVVOQ| z5Oeanx+AXg+8I@>@_PBB!_}pDIil(~ckS_5zkZ2T*-OpX@w7u%ndn&EW+|*YT0bOb znTuJ~+dohrSkI;fCK0CF3w>m|H0s{@7$5HGv;debF(^LA1wSkO>2XG1?Z8)rHt9Ea z>9zn)7o?k6aDgM_y)0JE;J-e+^qxSXh})R4h6WS_sNA0x&+gBMg7i&7{h_^3b6u2J;Dc=^jnc>)_HRk&mR0w6I z_gm-t8K7mhVCMT+3S$?4X}`AT-&}BB2|=cK7Rz~lv^;v~Hyd0iW}+;mf2j1>U(}cS zpg|HDr?M*V4C#G<@@*vYllSQb`cf$Fj-57Mq28Nwg7Rf@f)zhH*A|?qC&$zkv3@ZO z>Q|Y6mrrrOq0kwzcwYV_ez`#8&}}cQcwMY5`s3D%*`dUVhl(BE?L7Ef%89+)eGY!g zu_Jsa==04h8hG!>QLlE)`@{ZEOZ1jFOx1dEF7S5RpdY3VpN-dH>mNv``f$M9N&J!# z&>iW^n_dP|`zfSwj+ov}2we#8)2i?gF*PPsNfFF9X=p5Pjo4p_XTOF*z(v;6SB6- zvZyx9>TCJK_1F}ELwBl^xU`}_|+uVpC8C;8sjldqyasZC zAJvApd78}#_wY(6j)AB>5q`i24XWFZX7^-j0SLF^uS(j-#Gi)NBvL2{W%oBh2YLG5 zd06+p!q+fd6HNoGs~5RK9z^@yL6kDlS#=S!XfM*rB zg#vd^ut~cI{2p8GNJH9Gxz|0c;_Zex!PLe~gWB@AA3BS5PG64L)c+H;C0^?<^lSc) z&fd4#w`bKryLJx^|MwLR=kD9)Wkd6c*AYYK4Jpo&Q-~WdB03jgt?gd4oO`XA2KwU! z`roRsUiJw$*DH(rU8*n+z?vUgF^`|U96UQOt0!YD1Fij?pLO7?%}%2^PeWTAFPlR* zgq-6Rtt(~&?t2zsK0IH4@~8$jF#k6gv`J3>j^xVU>{Pz-FQJ<+zb=C!jT(X7@AlmzQ1S`YGRLe{aL)>nVF5wl=ce z*XOERkJq*-Ve?Kpk;q}!rK$W$2WaZ^tUC=<>ydeFyZy8?B(U?A?&YT0!>lL~wEx8I ztwUUt#wH$}meUbMP@_=YdA5Ss>1S}X1?v2^DPo*>1*;%%xn?3MzWjVLxmUAQRiSr2 zUL4)(bHZZW=B98|Fk#ZGlvZSxERO*9%UZF*x1R_b#7l2q5i19jfZ`1 z^Xw+ixd?uM?;;2$D~JGw`uYL37@wHg!xeHDlHqzJb^bi>k1#=$5!42Q(xNbtw@{vOw?xvC?T`lgMM*J z@zoDfXoy=lrR}9<&qwyS4Nw`%zLMQ1j5DC6_MdpGHj;#4-Df0G{+BCqk*ndtncx8U zTa$ZQS+$yxP8?=eh;w(C=z7;aaT%NR*bE<$Da!zuJ^ND^`upZJFPv|Id*3R%_9!zg zHflHLFjvldzt|8aW4byEzC&hmc`|G%_P>IJ!bOM@)+RvJb^}nInaM{_Gkb2ptr^yks9KG*(7jHi{ z?NWKQN(Kv>`OE}mLG5#P=jbshxGGo>`rQ1SsmvdvwL7vNYW^Tt&9l=Dmh1_!mPc}k zP}GSc=2>@`Y1CsKc#7Hl*@)~5ohwQeig42=r!C@F5;baDl{OHs);c&CPpt=`P$cX( zD>o%fd4zdbQ#LY7<6N^5W(?CuQ4L}NXXFyd4g=S_WJnVDu zjur0sV1pk&fBm4H^kZX&=MMalI(mjr7#X%yrlU3)#_N__T~F<=gPL^^lF&JUf5u{F z$+)FA_T1b_N@P!*(A24Gc3)}ajLYf_7)K6Iz!c#I2Jk3{DPO^t`}2u;Tx?6sunZ&Z zxcz(hhp~ElgW3QwfeI#hWQ7&ksZ7N%PuhVl>bFh87L*OG%CuCK5aNv_f+&%;I8uT3 zQe?_@9#palq>WtsH#LOfcQVM-t4XNHX@cp;90+3yt|&LR!9DT9E2P#mEWb%4x=+q7 z-9rNtT98iAqfvCxFwmr35_0=J2O3spA$S^`n*dz(#GSXd)HXr^@FxBTkfP+N6VchF zr|HKIb!<86$0GNYH)~TW;NL2r<)rVEG7~%%U-TpDDoCgRRhMjzb9 z=z&jdKZBdzpuD8tP?F-1pUUPGJZAl_Btm#Bs9gr(Qsuj+^M_`cTk#*X&Or%zg}ZcZ4|iHL-YEbydodlxv~I2udqsz7^tv4Rt)E zk#<6sRS`hCX>e7;j%xW@D;` z8l@u(A~~P@vwbtXB6H(2u@l-^#zqj>zmP*_Du{6iPcYhk(;W2=fsG$00poNSqYqz6 zNn5_1Z!U)4UTg5fu#ARgj~(w$+%UKFbf_()b6|DmZ#|R@sU1J^&V~xl zY?xwb_bTe27!sgq&5(9EC+`Rr#I?vN2mt+a+YvliseW5%0}9`(ZA>@D3FQX)EGrgG z6O10i%9U3xCZSYaZ{N}(QVH;(WItEk(XU0?)+=|r9Oog zl^>F~vKp(3tU(iRqF3A%do1I5bHhpM6jE?KfT)^(YWj+f z7!TRzckk1^Wtjm@=+h=wmkIun31a-*CjjeUu9}Wq@-QXi8OUw?bf%(wnOVGxLy)(T zm6v4wk0z6Tjw%Uowxgkz9oEueaI zRCR_jclU_LHW0RUbNxx$14ZO%m2=Dt+xYH`mh@?h^DV9nWgUd2XI^mhvr%~;GWSTi zHd3fRd3Q?5FPz>d>`65f?flu8wxllYhXlpdR=S*BJ!1t7%~;*InRYzZ*-XAm&POBIx5zx z)X@iE{idI{l$hD9zc|@)B9psyDz}L`K{)uAki}lbK%1Yzm*{s8|ID8os02&SUKuw@&ljof7?+91_tub8 z(+K6#hXLUsEaS26Gv%a1T=v5upI&BBLZ`9%F7Gz6@0xPuDU;~)gbX>hGhR$FLs&t{eOh!s*ZYJIxsgknF9w;*ISwU$6x zdH3dnHcsR)>lZ>1fp-m8GK_kXzx|&K`M>UoA}4%wbe<}}zNTzBDwEoF9FSj8kIE9| zWmtg*EhJ0b9fTv-KE4ci|C?d|-C+i2@-W}kdSB|5XL%ZQaL(P0D>~G0JMQhER_JpE zcvHKMfp$-lcQ;Tsw25AL-beW$Bni%I6~Z$5+I< zhjgHiFMMmbJ`mw>aYt8d3f&f0%4#q{fvU1u;wbQzi9ZGufqXkcbV&V_g96DIvBcS< z2h$5Q-`??c)?-XNfqd|meC~LfzUqyQx_SVrS&yhx#L!>s1=|Vt z^&`Mq6!VpOZnyh`g}aF(N5=?KdkxHlU5AhjCeEgF>e2C#;bz=5srJ`G-v)hIdF=DJ zVZg~R=S}7`a!DfE@^9nMooaE12{CARV2Ic;Q2*DxvIQz=93Lq@!qJE*)<4*7Pbn{q z1nqCa?>O7&>c15Bh=l3AzF@QU_+b*TiG@b*<>-n@*PQR=24bdF8)=_jShHpIwV_SN zq)};?O7{KVF5P}*F4ckwinRckqu<%CeQ%`m_O;&hCT}OLc&78_bx&7#&-1nC#x+5Z zUJV>DJzTyqz8^W9x%Wpq?Y_l7+x^+gY+lp#18dEf=(L+XRgtKZ)~cvReyxIin?iFD z`Bc%M`f}Ltu5=~kZL{;!q*dT!#T@;;x6Vpi&g5$Vud4)dIKiSAg%?=G(L zwxsfP8KTL4dusV~{3Rn$>cRx(+VvG0@8wNy@xsbTKXSF$^JUog6yiF@)yeR9l~hy% zsq4DMUVGj^^t;m&Tx%)L;RmtQucj4EKvp7KEPmE(<%+O7D}C`12~2)~ZTjWzsZLQ% z_Z?Cwg4+1l6~_HH?gJ0&|LQ=yyC$BnJYPZG>vxY8-p{9i{jTv#a$xt6kVT*gPV)2C z{k{6sHL{zkn73T>?LwqaoY>t+^xdO)@fsGJ!jg3`B!1i3nxd~``iaOn+gF?IR?B<; zfT+{^+Mx4drNR3V7?lD~sL!rso-Q*ky`Q(VykFYrU3A9Z*S;PvDc$X5FngaKS$5LE zj01OBjKv>u*Fd`pos6;2O9H~qO?2acU82sb39Z(T&{mI^Y47ul$n%3)tnDg#ieaeQ zlfe>C7UUxo=;44ia_NIVpC(U;w@BRT%zYk1V%uWAWEVXk$3a%@!L92WNG4l$R%$=wTq>MC1CvIUU1*bbQ3}Nx22jtcw=qxPiL86xWrD zjAqugEBru1EecyK0pT^#!JBO&=+=f|aOGkQ+^1?3CM~M5*LN)+T-fU8^ z`70E4q%$eMzWn|7A8g=`KDNP*T{k&&#vmUoXUxL&z^u{c5BJn4Vq<`5&Nu$z%piFK z=9(xwPua%~t6`SB+GU#0j5Gcc9aDu6WuT1^DM|GAGlDwhbhNW4X+84crdCpf;85Ke z5f6>2KN~55%-BtIVoNnKsuZ5fXncqzfIMLm+29xdP(r6BO$uGK4nOW&C>nlgC?3gD<)QW0btrJmjH=#g|ZqYh=M*_FfJqbP|~rzZy-}XOSH}X#C{k4KqVlF^gD;m&TLZx1?4I@z6RZ@YjuNQqsnJ@ zjt>h3E6A&i-O6`j2)8AJqfKqdVx6e9&xdbr&>~7ZCf`uU2~RWO;Hw~ zSenUe*wQxivngVM76!k%wId&RVGiKBAt?WHGEMj^2!@L-{n+?HH@-f?4gCT=osG!$;e`&qTt#HMDe&}hr`UP4@m(9 zsls6Z^h@*p)a_kz=X<%@aekkO&-C2A_`73a7e=N@99h{-J(2K8t+xECeE%iCwAIrf z8!7s0(DcE);~7(m4|mrers;ad1qqn;#H9sj6t_ryrkq=@>rMsLJ&~$MO~D^@#uhKx z+1L<=DDh9AR=?}uo;Utr2w5cwX9Ra*T318SHBt*3XbUZIK>gy;W_p68$%VrS%T@p+Vv{_Qzi8yc?3Pm_*<`BOy?`=Mr zm;?cn7-`7rChErI`gQoOLNH}|Wt=po4~6+nsZn3TW&I1=L9 z$A3yWrWx@uXmXmeq~#<^n-m8aSkCmU1HDZS&Y?wBo)@me4(n~+h|cE6W2^`FVmc>H zfXOI5>!AGn4NyYPAyq6G~-b>+9;J5JZ&!;3bc3TOU9OHnE zo$DalLX%r1AK)O0jTjpuyrY6D3^{EQ53wGd`mE1_oV&0w&_wcj;e#WM3;Xxf%l(Mn zOl@>hW5oCZn~BMHAttU_Yul`6^u>Fuz&u2+)UJ<6p4O_^fdrQY* zrKo;niAluIW=-D5s1?3+@$=K&VKytIrud~^v}eU7n_ixdfsT}p#VV&uknUl$p7Jhz zU|xhPq*x^1t!xgbc-CmjZ(7-Dz$(kS+gbJP8<@9^(Yj&WG&{d0V6Om%WGh}vQ8YL$;y9Zx+fW*+xX2l)&B>wKuy2O^Y|1lu0lByKO!7iH}?pED$^R6c88`i32@2rP~ z8s`VE1qVIQuG0*tY0GQVK%6x{L5Ey-zz^y(biU!?(Wq4kPdpqx5&MEW48tk<@SwzFwFKs zM6U0#el??vVgHtYZ5`epT%TViFn{8_ks9ThPF&7<`Lc#7ziQC)AkPYqndMoI%lSn_ z(dj|tOUnDT{BS=~mX+boXTF0kUicA8w)cPmKCK7D4h^8-@PORMvK=`Gg$Jar{c_&q zJW<1(aw`nxsXFD?=2@1@bN0%!B>6@1>@c++wMnvAHn*yT-nahnU0izmGM;<=3Z8uG zFL?g)1zdiX!8^~Z%E3jM*C3zIUl`XdzbYx^ST0|YGXKGzyDH`XgI%FI!V8zxgZ=8& zD|qLfxA6Y^@8a#Z-^RP|zH0|d-}@N*C{X>>{@-h+ci#s7@mBz^%fuTm;O~$A8hGyo z;N9o({yQ&9p4dxQA$Kou@hM5gUXW=i`;RwY240b}S7rIdE3)ho@ajdWOP0U*jFc05 z`C58O@-E4;m!-@rQkLsn5qn;Y^KVE>d+}QS1*!L<*bCgg*z>Zj=fp0FT@ibkfLrok z<2KJrIZ5SamnT3{$$vr0yhM|7FN$&9E0X`5)X8nWEXM7=#P!53%f4NedRP~a;W=4$ zk^3R*T;}#9eMRQwA=P7h;|baJ)3QwR&rAK6cpkVfJU6nO;Q19P`@H0H{fjIk=~bD3 ziRVGeyeQkc^15t`@cY`jT<0aO^Nwu$eOXUZ?)OWwtydqD<+5Gw!^O8``Mb9Ix$bMS zZ*olt{PBv|^Rf=lBd>`xG=7yZo_z!#o{{}~RO)#|_Lb=q zQtuh5^UR}CpOil%WuE;D{&w~+vP{Z8_9#Ah@?re_3EAFbzX$&ETd7yy$@{a^ z|6AFQKS|lYJTBY)6FxZiTm0xd$FX=_DTX$cV0cG8hPO9ibXzl)Y;MNV)pc01qDH1$ zu|yj82I=^;-##B!>4askt5EH7O0^J_n`LmEE$h&-HZ`ebZfsO=ZoqQ`meUB&na5?E zrqo2%x+e9Gy&f$}(r-!a=@I%ObFwY!sg zixlq0^c5nZy8v-L^mH#k$e=~606~rEDDEl8(OVDTo%deB`IpY(^w)03FE9KNKY8>a zeB*~-!2RF813&%UeV7(#!tB(!@T-bcZOGETYK(1PjbER80>8TY43^w{05|{iK5RI> z7f)R|gNJ|hbA0oQ_h7?@6}bA^MeM(MH@^L=Z{X`c`!Y5kUx%k&e;oJz?5pTs(t}mo zR^ZX|kK;SP_z^Oyim`Cd20ZrH3-HVjRXy`0IhHIrk3RL3Wl2?CaLSg%_U55{O$VOA zOGs+VMOvE$i4EDv?kYk?XFk%pi;&zS*SxzNNj>@cdA#4E6!?#3A-+?tV+#YA79)&O zDLwIsX^%!idkQi;bCJ`OBbJA>);y%P<|Dhsg52hO~oCj-NHj3&qk=2rc*l95}LhPGw(s98~g@=eu9>XUO&5Cn5&B1Se0pl+EA zeztTXdqnQByijE1L?SjL3X$niNG(o5^TH-9*gb+4c|LL%X2Y^98#(h+P`bp7kaAC0 z$MTRb_fGbx9OFn43glduukJ<7>K@Dpo`f*78yXjv!8grQuGau!vl8K-5sJ9xWF#$? zfo`ui%9f_0dV#FpQiQ)^IAk+Cq@ERqpTQd8m?3UtxDPVrpYhvARJ& z5q7fpqkLtHO86vq7h-0TJGR}v9Y1;O2iSRPGn@iv!O?FPyu;k!72pCdUnlqndBQ)y z0}+vdaB-W7^sIP1`OF{jy&rxZ(;ZC6Ei@x7CkuT<5~q&r_#E z!fb&QUA$dXBihB^9n)QA*<@H;r(u%!Ow0^&LS%jdW`{T-$`X&wr+4C~XMU{#J{@A* z5L6JQ-h82QE!+#j;F1@NsHRMqLT9Q@aQVUpObVTa(6V@B_gK}-F1a}u(REoLf#tK3 z{opJEWdoMaj`dJjPEWPVDrY*Q&2 z_u>$wNqgv47J<@DotSR%L;9jBm=Yb4GOtwOmnq2+meoy|D`n|98r+cquX=*38JJZZ zpt{9jgV~r->W{cFt3u0|u|k*%+|*-tT3xX2A2pu?87OgWHJs}r6qeJooO6idisZgD#mqsn+|QI1GQ~S-Oa*H9QjeE1P}J3R%nd}{raqV= zX5n|QJ%-<3`IE}Al(m%N#lJp}?7}p}#D^dx)E7QJE|@cCiUvRA7ZBkwp@>e3Qf=~_ z@_d+Pn(z<2i~f;zIQz}U)%UJo*+ zSp(P+P}XlBhACi@Trc^}>bI(gwRL$5!WuJR@|}c%qpK0snybKk==fTdW|!1saD`l>75S=P9=1~Mv1J8_TvMjOITe=g zl>5fwt^qF7$4cQ|5sI9#a^x;5`xh(^H=%B4kAmYo=_^F6E>T#Xu(3w^79A>OMXlwM zMUCoJZkl7l?GJqszJ*bkljRRT*+-|ESorm4BcLlAChtiIE=ojFlLe-*If(Bl&}+|^ zI{ca_pfdvri%SsFp9u!vjGCVd|L$Z-&6rZ^r7ube$tl@FU~W8TO!*uVj4K?M=P6=1 zM^jpq{C@M;%ldHsy%#Y(&{<_!=7hLohMyCB zV}lT!5C&&o7kIF(4e^z>RDL&;qSb?(L2C)j3Cju43BYNgF(HUd41=X42c^{o8f=-s z+yLr~58)x}JNi1qEy4?rNq>8A>nOZ)!}J9-A%9p?Dk7=m&qQ?GAN`JAY zQLSbq^cCsLo4h5`FPvYAh&D4^iz9JEwl{oQZ7(sXU(c6mY$GT!#`BrEt`;dPD>M)+ zrzzWGq~?tc`t?B9p`}RZEX0fyKh&)sK=qn_d8YhvLyS9?oZO7I%?r@Dx(^kL+cgk# z`DiPu7PpCY=nDzvl`U*U>1dOFU1XKMT+zH56whza`GTPu6b@I5)#`InvY-*=i{y8F ztPRymTJ@_U%5>C>wd?PIF<-l+167NfHNR%8bv&)+wk4nCSf1tTmbRmQS(jLcrkt-^ z+Ntwh8%NN&VF(@Thta-n0BvgrRXU_~&48v2%eysgUpFMn`n6o|7D|vTly!&EBgfyf zc|`I?(Z6jJgF7fyvRG^h2DUH6vg4bu_{bW}-?tL;_bf}~zzI_iieP%CK-ndEDS*Po*l>8OacUW<1D^{M~BDPJ_RX1%H+lsMc8?Z?BW5L1I z7?J%O*}rl;<^C=|zCmog)V~?)Zr+CVx9k{CH{ZTn)74Txx5;$%sV!J>Vgr^PTd(W# zobY%Cwl7AX%C{`k<7C>qZ2{)(UWSo<%k;RIj>vf!+C8S%rD1s|D(2VW2T%S4WqlPe z*XQ7yzq}7!lJ6St2B%~Xr1j*XW$!ThPAx~n!FiZb;4QzSUO4rKd$97JZCG>XPVD>E zDct(&FW?JjzKxO3twYJK4wX8oK0b)TJ#8}nTB2XOw47L=L0B0mId!lIZTm;C@a_%x z;+5~ARK{ib+ZvI(rC#ON=mE~Jf{PAxsu^&cUg0IOj9TMGd)r~z+oI4rb9*h)wp1Z~ zYc;ZV)FF3I6D<2%k-v|!Ev+iIQFxFLyiN1C4jrgimT;Z(d3&2bQeK0L9+qv3@yq3s zqupwprZHawC0+}fXlO$djH?H)m@#jkXUva#{r(60Bv?KX9#6FE0qFlz`~N2_x3B+t zmUW;5*#~7zBF5>AeQj!-Hp{url=1(^+5vjK%lg#5Kh}+$qg_&uT%)7?$lu$I1nEcI z{KS2@|J7eBEVs&i%`X-7{GaGT`k@w$nPz}-!f49y&t7I%yZfG0J**W zUxwxHd|)^KQK6f-3vsu_g3nlGoiYnfN&a007TlX-!M8Fk_(rxxmKWmoqCzdt z=`ZKn(o>~HI9g%B@d`6eR%GC|Vl(b2%F*@jlCqyGD8d~D#gZ1|?)+kWF}Fz9{c>KO z?hE(rcB@&|lVg$X-&L5S>mRSk!HII2mwLX;b#jVvSAHo@lojK6d7+falXbIjTS*#j zF3XU0W&ewc^q5YS<=}Lg87C^Tu&>sPgVi~>O_uZgoGvMneJ<4Uw_7E@Bumaqj+{R^ zk7C^a+l$k*?z;-|aCcrM?#QphX=@dZmKR}feG2w8#^YdZqSk+VK_%|at-}{{s&G$k zrOa2!^{CSFH(M)ZpXAsJ<@^6&KT zSY3}J<&`*AT#TEnR(z(|iaW|maBF2DZmgAaU7w2+^>R&Xnb*#9lvH+*5^Kes@oa4$|wVSK+adTxpZj*EIS*ic_l441V@%bXF zSRwAR+VXELEfy=q-Nn`TszxZ z)^Z$cD8l~QeC+8c#a3yEm#=HX>Z1$Lvc3sc8O)T(kDhs}bd(6nw>87O<)grSA}lw& z$|ri36PBk)9zl7=syd`Bt3vY9N;OU!^XV&VkxGDWw~X`S<^M0ha(nw1__leG6PD9H z4wf5b3D*g{{y*&fb$DILl|Bj|Gsu?3%zRKsI?U&YnVHctv)jyWx7~I#geEkZWRgr^ z!qAfrb-L3G?ryUrvn_*USq7QjZ>^HIqj=m&?)Uq?d+#5u=UJ*) z7eIL|9mx6cY;Lo`-C{;YhYg-?7n}=nNOF#hIT<8{OL%%o!8FSsp>vSWt#RYeV z2ezIpIOb>5K`jd&3U{=*L|(3ixhPv%fzswobaj^C<9A=diDPf!(zRY3?)xh~{L_zd z_>Vutz=yBkz#BhALgFNpH0WV0Oh9Ip7UfkIRF;_W(c8a9|B*Mam=0>M|LJ>piVg;^ z{P&kJc&Q)%`Qv{VVEAv}`6a5m3-R37cB22xJ6OHG2?Lit!0-R?O=LP_v5?~4d-o^! z@ZfKt&rL?>hDQA7ul@~cM;x3rMi?s7U~jX-++>EM*$i`~7DZhd$Z52qg4*iWAN~X# zJKGVPpM=Q5B)C@gnKK?@2}zg>^YJXme4!QM&R>IlAo%%(W+>HY)*DS@CGI$Dz}jfJS>V zs$B}S6kE`cZ$M*)3Z0oMY;VcJ`bIm}&dWk`nHnCAH%d*B*xXf&C3S8r?#e||u@)tX zbI_O+gn62HbfhPtCPR*nS_{^g5sQoDSXHM(PqiA0TMVdoMPY5d9ow3-v9j2V zjTISKPvfpQbxi}Awd+6oj$N24w!0gF6ZtSVQc)#ZbARVi3g zrAJSp1LdkDY|pe~o+29a^7W|9R-&igg{}%amY2EEUSNjalZb+)#jq^P7aZr=G#|{) zjE8D|9;P}XvFE>@#V_9d88*J^PnhjLO=vf!8dG6*n9$nQg7V4|goFhmDA*4Xks*S|JTW;A;W1&D9WYw} z=KfJZm=!z+ll-R(uv``}8PlWZAjzS|>;yl=nv<~hxy=GBmqkn!n&k|Z^Jmn|$Oy4e5ejVY(?0 z-i~mnTkXQYCR0X5RHq}nA{`UWAt>0?f+@xj$WndaTwWoln6z`Vgwb68!W769(}WRE zHuk4lkcsIz(NHhR5&$H-GG_por+7w10^*jqgl0L@STI=bT@()mJs%qxO`^FZtV|{7 z92hKTdjT?I08ERE1;x`eYdE}|(XcNqgDhzpQrj|wX1Pr1jjHY40*qupj}5P;w`L%| zOb6S%LQGDhJZSCv+55l2Cj$ql@6Hf>;|EWEf+HtC6_hNqyeC1MCWnvj48iZL)Y3Ke zJJ}Q&{^KYAi8uCB|C%O4%lvv=$1oObT?ju-FlK22F-sQ&OIHpOX{?3h%Mn+eDvSvx z*XXG(CdlN|VV#>T>_$vCgrIVBhX8q*&Zc4uT_;Zm8^p_htQNAkiO|!t3Yw@!o6t@# z+E7pZZ=#@QVS{)Rwf@LhRtZ_mBw=V(ybzGjLd)JILTlXH8jY&0)E;rukg=o^UdC{t zc^l@I!_!kj?KE4|HIn9V2D_O~guhA%>`X)CVl!e_Ifby1&)8LNLBYacIdhFCuAtw2 zu^Tqp56JBPFfHdVwK4@~Iny`UXbohryl_(;{YDc|{&*{xhQzVCN`USRmTNbaBIAih zVI-Mpb#lab^rG=Q1;70C_kxBYz?Fc6S~Gm|Q!q6r7Eujmde#ClCS^(9$XUku&qf0M z-a+~N!o&+Pbq3g0mm;c8i!d4!{6$hgWeP$XR8TE({~cKV05B(ET9AYuyU-pNLTfv7 z@k-!1U$cnt`G3Uy_bG z`h8}m2g55Z1e25JfT^8kscDQwP8VFtA6`5njDE_3r@<@UA9E4{5t0&#xYR_1#DyX- zItU?=LC_jBP^gm-5gj6U$5rZNq*IvDk`BEjHXV#k9SX{F;L5fLpj@L@AVrxVfc40@ z2*f1EASpcs3cCgusDE$z@=oy;Siy=~n7XpzUP`~&%4+1TYed0@X5sP|9(-N6u?6|G ze<<42irn>$$Xrz;<_Xsd+DB5KW<%G7+gjmVTLC-m6Z3a9BXesl+_aC(-d-=jmEtGc zk@t8L3Z7^|;qF%9vY+EQEdz%w&n$<&gAM)qA%*rjmhK{9)H=|W3{8!l>e_&;1?8}J z6vEP!1#@Gz_$tcOkR_hQ)SLxla|R5JBuyUSx3pyogU{wxT1#n9!Y;>iIu5tC=LnbQ z4@X-bT$IM%LjHO;47IdxYw*CzWs%E%L#^|HtFLiFS8Ydnl^to7R^d;tvO!y6C9#Nb zj!&z!K~rWD;i=_jsA(-yl^CEbHVBvf>QW;VMS9_C%FGYKIXx>Qu%F}E<#^6dx=*;} zCP8f!ldD2xrUFrHLxuKHiA8B5oL?-b(7h?8ddTS>HWbe`JlG$fuN7-4(_5ub+LVHH z$P3d&d2AF@Rl;Q$k&r`kHtn}q3p|PP=5*|`4T8k{R8ekZmi$5a{G|xz%Z9euO{6>% z3TZD$_r&E>Uia(A6lrXLp1&50awm#1qCK>)bg?7|H=OpRV`Yt%os_2*={P>hos4)Y zBO!;vXwB#P#bhZE%hY(|+;9htE!y+3Rymgy;iP+g8G>Q1&>vud`BB{x6~nu=7Nw41*)E&EA~@`Tk6Fa;yGQ}YNNT&gb#5B zE#F*?vX|yUy*gWHXR~%VQ(PHW7l<#l_$8Zrc{%N$%TTtb4PQU{-_Wnj5t`-MPt*(T zUCZWDShkh_9Z=4~AUX@vs4!S=-}yJtn*non+0VfD!(h229L8We1LQ1xEu|lyj)ejC zjD0j-pZa^i`~hhGY^#um4Jk?>x#WHpST1RzOCY!ej&s<*qFMeh`24Uu3_kyVBMeIa zzZEPuJW(TnZwAL%q-z_sFWWO?!2C1isd`xGH#hE~zVLJdEaW#)e`Sgs`{NBzEXl@K z4*e8Az5G`(UrS&)x4ZS3I_URSi83Arycxh|4fpZFn(pI83YP%y@oC40|D&|ywhFzevANp{eT?KN z$q|yn>{2?u=CD30zn|*YOTzAHuJ8T&9iV6X^wik%pCtDb`FlC;ew{i06Lih@oMD&b z_%=oBJTu?;w@W<@Qs#XDQufiW_pQAcbnomg%l5qN?l%9W+W0WViSs&%wPxtoIeaGqk<9{8KKDzFud=8zav_s@4 z>80QL5as(Z)$OALW7^^Gz6-oZ=|B1lh5s4&?j^tg+ zm(#!hItitJ>lKpU0&i0Kw_XL_q5I!{jjk#FO-lDV)$28qKT{rmro3J!d6VQF%Ih5p zf8|dU{vL&WLic?@^?MhGfAuA--&};H>vHkWWY@kCQT zcFrrqip8bauxBos=uneKhv0%OG(poL*GVq(GFu+fD1VrSWjt6uUYLf3HOpC}T)(1N z0N^YPj>^tav<-2G~kHfE@-$Y>_ z;1B<~2UmJu#hRWRI5o4;NC$|u4Q{;mgBNgP|0~$q=)t{@UqSy*Uc$vUeuy`J`=9vu z!$087w|JEU3Zx*Z&)5{`w=VYtP2zzE|;I-`b2T7hgwn zwHD7j-hq>!{2Ha61QfVpk?o2^W1R^_C355!CZW7sjXeGYH9HZHuc*Rc?;p_BXobxa z4tK4R4xe2(;;q2 zi3@9LaYQjd5k zw436$)H<-1?pt5yqVyTqR+EX<^&UJ%dF-j7w3N?gI{2{cu5#kZN+-5b*hV^Ruc1Tj z8afoNq{HK5RIjJo>Ha!1wsyJDRg{A5-Pzbcc|W(L0xQe(SVi@GtlEgpbO8KjYd*eE zV8z~IGZs>N_O$4*vD=QVEf#F6H(+nK2WzNLtZ$-tI^b<9x8j-h0&FO-U~f$x)g>1@ z>+`Xvvjl6aP1GJbJioFE^D@+UuBi^&GcvKmV#OCrGVzrL$~Pwp&$Suw+*}H$dsgN; z@r{ZK>^7Sy?`*85cG=lng1wEUc&4Tlo2&AW<58k|NeNtw^Dx65ik#Jz@Xd&$F;@id ztOVpNC_y#@2c;H7>0*##ks~2J5y7!Rh)jsUEZ><34)aG~kPrO)y)fH*D$LeYXws4} z$8QWQνJ3bRq)QisCgJfTT0S0uvMZ#I%r;-OBZ19e;ky!^ZbSRND`3hz)~p;|T0hTj&`kH4q;nf4LVM63IVc;_^Lm{-kBQjGEmMs?|uQFqr(ihVe zz9?K=B@Vxlo@8h$%wXf4v3$TUGW;D_K0_OhImY`mEQ#KK2bQx&uzhi{&@5*finvxI zqMP+X3)QzcS!jU=7O9Zj>_AYS5{Y#duz^OI#_MmcYL=itktyj~Ii1Rw0$I`|uyIG> zCQpM*K9z*hu%!7@9HmJoH{A~t9HDsbqwhmz@n6h^E6S417A*RAGWO7;!Y#cWtz!%@t6SXg&q@+NF@xpP z3?V`s3yPs`a3HzLB*1c0S1zV&1Cf}a658c|Jop;?ll<}gH=e`Hz-c&ju@4c^0r2sk z357ZV{vo~yjR`?UQ6_%>_8$dc{`d>KXnrri4UAyz-ZhvSJp*1!e;N~In9P(g?H&Z> zCJP!HGuy{#wFzn)e(4vIod9oJ7z)?cV{&?+0L+Uwv=l);&o83>GYjVKJc^5@zC8sw%d0V6 z7YxU|BKX>4sK5FmGE;?&d8O31ybx2KhOmlMT5}7aTAq!V1r~TWDG=O~PJP8DglSk9 zFlP!DmYBsZ!FQjq&;{$3N@4U-za$5mZYO5B!{A&zM#D148HS?G^;FITlQY((n$Q26un}fqf1}GreLq{YEq`Sp(@ukRRSAkW zw_vtC;{J=07|b@)b>u|xQe$G`Y)ne>78>@fJ^TvwQJKFCve`0Bi}R(qE&zUU!3aqV z7ZfZkg4QZFOc?NF&hpT(0KvV_8sn^49!J6yEKJuDr-(*eN|g8tXzHwq0x)Ol7Je}l zmmEv;ccl1=f;rO9+`WViU))Z0n*uLg2m&+W;p2*iUnb4LOlv~|e6tco z_#8^Z^MZfA9CK(7FpGXy7QW`Npdtmlb7CDjZRg!tyi!LJ}5K_$ruEmu5{ z;L;Qk7Fe8wfTBbM7A7O2R4cwLnM~ux%MyX0tQ0YxVv1;AQItykoboq?)7%}5X{iA; z=7Z=u2s5?8V*F1_4-#W_qS{xu%xyl)6e{jv!;Cym*w5*hPRYv{Cj6X^za-)>LuMQ4 z9%_^6G#5|jGRWnxuGpPpr1ioa248a|{A`he!pz?uC0zD%ILC83&PPhmE>kmkr3VXo zFV24!)rTphINZk+A<_lX^99oLvr+Z{M>GO#F%RJC%C>`e|EXP;Tg$@%9V>3MO>cbj;+nf!VS+!5#_Os6t0I3sNb<0=!~NJ#ft05tYqPax>@3d z8%FzCHhj-61Noen_}#3LV*e0JYd6=Qzf}A0_kM}>{58=m8k3Q<{Yk#^2Upe>#nAa4b_?dR0kzV+0yP#1S zqd@t4VIcj1b~y>tsW8y}uvWMPa!c-b;jr;Q`uKZT`1;{+zVBhMoMk*X{#o*mz;dQ< zVagQ=FlXUw4&%6g29`7D_&<_I0nqC?cq+qixH z8gSt@$xYzWB|(#N=jtik8D>h7VF(`XOQT~l!0B$|-sLgDdFI@{iz_2{arxR^+!`7S zzdd+A{sP@|{yK1Oh^{Z;-q0msV3Mg_?lHZ~&;{J4a<1GskISRyah2R#SE*d)?k2f2 zEYZMFJuZv@mxsiCw?@w3+Km$!xp@p%Zygzv(PQL4j%(M?h&;F~i4*c?E+XF>HNxkyQ=DK1^VOZBI4e%7;8|BKgg>E7EnRE@#HtWncvN z21jUMa{MV=y3>ctw~td>oT0piaGUwi2kBV^9Sya`ecp8;)PDD_oF8i^A@uCjHaD+P z`%pVvy>X5@0Jk5PLl4Jt`Z8|zp2gL}{kTFhbd1WPzA$v=G%lPyh4VD2Fi+F~2^;pj zM3dOnzH=DqzaV7r#CZ&yI)ihkPGW#2pNq%)Fh~=hkmHp8I2-z;JWiga3GEzBY-e%i zSU)Zt>BZ&4M{()M5uEKkg#P1)aOl)g96a5NGZ!zSzn><|gGYoRhyJVm`1-rwLmnIT z{CWrSzuJM4FSMfO*=97;qS?N^8tv=LFmHVYmTay?!=fB4+tYz++Ti7^E=1{;S`^TR zjX$Z*SW6qMjSQMsje+J2n6G2QOw2D?B82^tuwTcNEUSwi2y>RRX1Qr~87ylmU|Uxu z#C%`l{83=JB>yL1Ir~{20NOOqW?&bolD7N9TLK~iHD#nu) znRudv?#WEUms*POa#J2w+mf-n#EcheUHC$^1G_Wi_)$jzc6-!#vL+8NFKWYMxen~8 z%*PYeMc9(%#LGp6_-1i2zFk~|Z8jaA>?*~^g~eFCI3MkKay*f*$G=s&sqSX9YklzJ zrB!&j(u_U%8f-61#nu)x9;;8op1E#3+i1h{S!#SOCmr7?r02_3;prYXs*7UbsZ&8t z=|Wl^i0Y)aY;nR=Z-lx@17({Lnzn2t*JVInZH1@Gh=qmeSf7)IRoONyEU=+IKUw5c zT@;V1;&_ymB%-7=5yd4*D58UPL79R?h0-E5$_q58&Q+r(ClyuMT2yCi(442HJW^0v zn1bSBIjRd3s47$-zf_JwI*hZ{c@rI)sV#R`NtXWx%mYP(!HPca?>V;N~H);)Y z;3x<{Mi-U0+J@>S24uI%QP849$3iE%JMAcTN1?G=hn6L|C}=gKjoPZa(TyJJXI>Lc)2O+IQ( zDwO1^+7P84QB&m}S zlNgP3QyQ#x6O3jZ%F2siFs8v|(F;GvvvE(R1_+J|!;FAgf(Bz^h!79J1JH0xZ{7 zS-~2rti_g4prh+K55V&2sbTOo#2{l4(`?Ma3{?(=h^b41 zUr~b4YE^VN;8`byf~_+T_U>G;p~jr0 z<-!PK=AsgzN#a>hBtF0NEGmPWeh;QUVgta&`31tj@DB$53>h8H6-zUrT$LjXFh(x4 z2u*VNx-2BE%S8N2rvS@CmfDfBJ|7YDEO4-9u+Z8o7I?EYKbuJY~9}PGk z^Qp`nNM+>-zT@mn(;=Jrfa?)MmyY%*jiH{de1I`SZ z%N&6MXq;V>g76+Q{2Mgzsg?`C-nTRfT3UA|J41w4c}R&ufaOdP5>cUrEZqlYYG>A{ zpKJ;d9LTJ#DpPm~gTOwS34)TP=85?NIAg7A`+{PG<|+`HL*sgFBmCX*XxcenXhKem zo`Fw?kK(6q{z4dz&9BYD(X)pz)q8>f5CxxegddVL@tEO16Hk5V8GQE_|Aq7n1CCzq zg{#UVKwT5ft!%U}B1=yB$3oNU62>?g1g6SZlu2rr~-S(-284c4)jF!7V%?V@qgnTY_Je{8fSMHMTdsyD;S9E{vm zmE?vZFe6q_aLuxW2+nf`Vc8gF{jMI!VkQV9y==#UU+!=p&stO=#z9nRDuPQ@w6^Ao zzQZ(F{E{Vnp;1t&K=cL92jTox1cxWg9|O@PVIW<( zh}vhaU2vgWXm7<-BdlFMGdD^Y$mG7jFIHrUlc;|t3yKqMBi&z|J_h1B;?c8rIbJ{a zf#AQ6VOtk@dc<0j5vNZ=SaPJ`(T|qLAUYvZyrA^*o(4afFWF`UgXK)E!V(@6DgbqU z@e>vojKFYT1V{S9CukPp<`p7&P(Sly0G-xTei0Yn zphGmRi7~ZWAyL&D;g6_PA+$_R=~EEQz&TxW92-iNw^^X-a3ZEM9doF^^SsLT5|Znv zk5awVG$--+&`}@Ywq?3Iewn0e%Y>2EPJUTt?xy`;n_GN6qinJZm&cZo=1{ghqo128 z{F*k0h-a5+sm!#WG|@iL*qsS0?Fp^(bA@4N$D#r_7Zy>ud9e26!7`8Xr!v#poK&s{ z`c7)oj!dy%WLNT=d$M7hmoL(@#y;oEe%F#BQAZA!@^>vN7OrDKp(uy_oGxQ&8M0`7 zVY()Mp`Ew726=0$QLv^?e1%fBsRbpQ8d0>a0r_id#7jC3XB!*b|Cr7xcU=vNHZ`Mg zQ-he3GFFwNY+Ji9%*%5TyA?Y+QM0?7=GGq6?&>0$D_ovi>YnIE9n;9|>_FAF4wP?g zLFLwVlx=Ai<+IEF%I$5!U$Cy0(srTpaZ3MqH>!4Z3YTe1swrP~8}=?l)6)yl^2}1< z*6yAs_`kVc728@-y19wU?L^a_d6ZWhs<*eJVNbX4*Y4_|`gBpcW>jox5%KJo($((l zMCpbG6s@fl^m4f?E0Dj6+GY*OV|79+ym~90eYUlsa&sFhHaDYYTPNx%4|dCG9m$qq~B{_A~s=0Bf-qtS)N?VZS9Qz`mwWJ4M%pPPsJFD{0n$AQ)_E`@7N z8Jw%=+_Rk4^bOSrt<~T+cRobd4>luxbMcsg#eI#)f2j+$9o5L*-2~mzd=%|$g=1MM za@NiLHZqZ}tBI%bA8nMf-@a9sPv>%RQT^ z|K117x!rBg)(fzlLHExB${FmIfN9D9FaSP2{9gge9|pW1j+20KNgf8vrF%GUe#yWz zEUp(?sn4|tuw1<`>j7Bq*;FsUa^@^|?`;#BH59ma|s*cp4T7 z5SO&eStPCU&%yG~<^Pu=!#M`QNASJ67T}dv!MxpfhXw?Y%XTGi3<0+W$-O#^p_`X* z=I#ZYxig3>)LE!s2>|)x4F<&T1Ip~ueIsmJlHA@qz##x9Zd2BbkKYs+vjEXYuHMGY zq1ytazIbC4XGceIe)Oi0v$w9}^quQCiV++k=_5IPXIOyKmv0PXV00K4Z{7q|O91xNKW1wi@QV3c5V1B)o&Od(RSkqsO&p;ah}p%VIFvjXJGyEb$Xs#RM*iV zQD=U(GoyELmfE48+T>%(^JBjE-ViQR``+Xi217%1?x;==2+ZV*WS8kA8AH)zH{m>$o{QjFAhMarxW;E}XxJ^OuIuclJC@Vgq#ezJMcV21qXA@aYRUbZP*HPhP~a zFAu%9NtH)#U=>xtv| zr2hmC^c}|mni%(=IEMF5AHkbvkKhfOINvzehj-7O!Cwwj*pVYRK>hMCZR}q9^ye_Y z+yV91+93Z%6XgF^3;m0X5gYHYMw;;M!UT$5z?|Y@vmdDOp&{oM~9@1LW+Ngu^8uon7;~asiSvC@ul!43e|U zn&k|LOD^-1r!LNW0GhLC7v=p^u>4VB4}fxxqeBk^-xB@Gc%b~Bf#pm)U?SH_haOM6 z9o3B%tSU2OYl#VKDoj{eZp4y29hPMqu+n433bzT1Gj&*;m5x;&4c26(mW+P z3*~4pNI^FpmX~HKu)(RsCZ`IW`Y^02)?#6f9F<8kP!lM_IztpT=O|IG@;1 zTU4h9p(8yUkGT}sR%%A8DH7H8NVJ!zQDuw3l6(#JRoHD9lzOD_;pmkrI|tB}^ptVkMkKDX`{7z?~C@!ptZX z)1kh0O&)SqWzu1b`X+-i*)cHX#-nLMCm6 z$1JFRrV0g*7b0!76~^T@6tBoZ)x1oYoYBZ_G{e4%`sX4iau;T!g8E%uhYM{>^Dt8( zLu6(Es%c!L7$dQ8VJp(*F)*e?q9i8`^=&3(HKm|(OBRYZ=fJ@rk3Ae+OKRZA*TK=i zpN8vDv$PbAi;B=phxYQ~bkulMSk+O2#>PxUs{O{maz`AB=9NR4l?r2x6M@tRGg|YJ z(OiIFO%&qvDTr3Z3+?ZygcyX!M8L;y4%8YsVqzl@9uXvD%-CEw;uZ1m3-%Sf#5n>iPsmaU8Wz?RV{T~Hj7zRCVxrs|Q{;1yzqk^zxaq>cXIixl6Oz5f zr{?kb%s1`*04$%T3B_!E^nI}057RZlLJM}X$`6w?egZ6?knV@nP8VY9(rB)53*K#2 zs}o-K2t*X9Aq$p4rkDdCa}=h^eMR|GlIIA}elnHC{^<%op$X6a$te^zE}s1y&)~l- zl=70##!OQfWGZh#QDUG2wRce>9hxg3Uy&tfPNEmvkg&=#29!VMM&vRpLYJ5XP#L+@ z3C;RKB=p$eQxJ#b789Z?)$nqKBEHcm=wT|JULdsA6Wbla2qSBEv#~y=yh!WF7Dj$$ z>48XUbRejZo{`#MhC4@n&6CB4}6`c$VpWVOw4fJ=sO<$AammkDj_tfiH(cjP0$6pbinG7gUP;ur7y8ZsXliW&+L zB@c%q+X_W`GQ#6SFoF8n?9e%w>^lupgS@c+^Z|V1SKo##e2Or3>uAjpeC07TU$d6B zc_EF5QWd;1V_;ccMAr(Wv{=P6MU<&vn4c}u$<(t@xw8x2o*3#EGf}W<3^4c0j7Q0q zR-sMIz&iux+_(7J#}g}zA&2HA2~Bl2`Z?9$FMu_fW|lB2$8j0UOOe)Qhb&Bnwr8k4 z6jKF{c+To_x}G8Uva`AG(>RDK*CL4O%i7Qi)+}FSL;P|Vk{%;hUENc}E7qYs`qQu^^?{1zD;e z=GbV??Z^=?uaYbD;>Ce1l75#ejo=EOQ=EW=ZYxq2x`bvqgXIj6OJF&R1b|C^DP97_ z87OCM`e;fQLt)IhFM;Lkit8Rb!kTI9FU=Bm37CIdx2iyZ=gh;+Uw?3W7->APEekb` zt@JJr>5DU4<2oasVl_>j>2IVaEyf#GxDMSVIr(jPNtPZfr2ZEjk7 z^=g>2==stU@cx-kG4JuEP?i|so>z?2CWq*cdIp6T6~nfK_HX1j(%NC6HH5$XFwtCS zrfcI;+V3qXhJpH`c~u3R>+6uUwT1SXZOB|#jr^_k$XZML&TS1S+1`YlO*O*J-dK$s z+GBdwGUY@GT#qq8SS1X^R_tm+<&&LgdVYz>qv`o&LV2U=$$5ewx@21$EQ|9|w50`w zTN;H1KZCtIo=Ug12(YzmXPc0s9Ze|OPVv+)%XW33Vh_pgF5#9w-Y((`wl;}!*8S&P0ubOSs?DO+sA3<(!HJH{>mrXsjRLC<#V{?=lh$VTZk5F zrP;l`@T6jyzRv$Xs7$yUs{Temsg1A;`;D&G;(?>Uvjw~oPYBR zOGSCrdwWp-EaiW{o?LF#-Y!uucE|EwLgjM1bkj3;QQ2HB*MZx0EWAe4b<8itaXlNK znumI7tEwFg;K*ytj$IF%kz=3qfSt=DQG^=SyM}6rV4FeUJmz` z3OF{F!n30qh0oBK+I^q8WmgT@fF}$4B^nlv&)8K9_v1Bx2bMn!dP~5!B;x^aNu+e2 z1(uJ`cRUEs!hQ+(9xoDDE{PQWD6m}8D3<_m76~Ai0QB)d`S`S-)3A_GJ4(VJ`FJW8 z_DdY*kCZ*t;u%=8oGDq%`|2p1+H_yDpkZOK{F{Bh7GOEkYh_Vb#uE)N?yP{}$x1=P zBDC7?gWHlkN<(~n*!XY;t;YlA4~PGwwBzH($FoSF_;{fFv%qrqi~My%+y4T~T^p$H z?`Vc=R|_1wDIW&J83?ERB+l}OfpSU4hf6dp5`bR#h4}(3*VCDjm1;g5_ymV9_TuQ7 zBj`VV6vvMp#@XY?{}&C*QKn)!aa2hEaZY>W0Wkh3`A2b*d=8d>F8`{??qC3SuN=Zk zixR@X$-5w=UuC@J-;#O^jZ@glnS%Bo}b~ z<^|liaS6As4dU+AE4Xp}3eMjh#wl8W&)*xw;B8LJX)fT_^#RcZ}I@?X0#azBsT^vrkZ8E%RC^D|w(J3w{3fU~%Si+3+k-7Zna^qeCX zaFyzOLICg=D9t6RKefeWs`L;&&+X$Fymt)4cTSBx+jR=RLJxD{3bolKTpvA!;k$jf zbMqMPUGKv!)(WTRAEoxaaqSkaU!&)x`rryZ#30?r`7-i9NMV<$?Wrgsm+y)&t~1{^ zbn`YY-oA;;cLp(ZdjL0Xa(iB&`f}X|sU9Pu?YK?Zi0iE(;4bBJkMd-9l&UvM;n#)+ zDEtr!za&R`1o0p^SIJ?0YkkPF?j3(E+4yuOUKS( zu>Uj$kN0Bm#9>@G{Rxhr{}8?B-^Qs^f5o}uZ(!*7Te#By4lW=60GIkcqWkva{IL&l ztnWh{?fnoJj!}6>kKxqu!{|MA5QolwiUa39#gQ`yah&oz*V~742an*w!K1ivybtGx zkK>1Ld>^&D=ukqNncRQtg!_whaG}jhIc*?nXc27KS%vPMby!VlIy*gBzmqnNTg#EY zHb?N_S$EXHN(-NH8!e0^PLlCpxujt(X_K=n0qBy(Ij3RHt&FX-fuTjk`WSz%PjSnN zprZqJIvuc?kDUE{&A@o-!d&5Uxa9v=z;X#3|3_ds8}($coc)r)PX@)M>qiM2oikDz z6LXBWT2awt5!&SIs%>a%FruPChtft9iW;rRYqTMw*$Q*J35HGsES);oI*f3&Wy0Q? z3qw2Arz0Eswrtp%a#2u|he8rhLoQt1B}l2a3jm;DaXnPFBvdc0fx1+W@0>SQE#>Je9~6x`yer3xskQV@|D1V^nF zj*2uYj}E~NZaC)_L0;)VT4e?tO+_#iyP$As;V$>Uk!MC@Qwg^2T#es<^n1j)lu#C# zkWy$6hSt(5T(H&UK%S$Ap(+FEm2SA_mg46}UlaKbrvLd zWkTQXhOW^FO>-JjJ1kIi(&3@E5hkX4O8W)=ykMOMkwIgoc1N4|&4ZoMh|NiawoHlGya@Q0L?LC74Vhc3XnYhRVwnpmYYJdl zT8yH_6;L@-kT;jc!Ky;2AInGPq5>2zErDlwKJs_gK$hVz3`*ASUWmjZ3+gs5gO5>; z*~SFKRv4&{JE^@&RHxgdWMZ(m$03^*pVS>abH7ureMWlm_9*q|(oLx~|8 z8|XLhD6=C{;Vra|z48-~xvWy~l`_X`OpcoBScibLNcg0Lz$YOD;mTO}MzGPiScFD} zAt)peR+|wC@zIEni$tnMj=1aAyjoRhhAe)j;7yIm(>?&pr=^8rN@^%(>Z2Zj zJ6&(Aqr*fFlDb@&RYY^t0uScYDUrB5;{j*6ab1bfELY9T5S-;vRa(KBZeLL* z#!*xibEeaLwXzcFG*`=X{+RBJg8MQ0Jv83Xc4i5UcLvL=9`Aun>xY@PNaU=l6*LX< zS}Sr_*C8xVDPAxv{qkmb8^aNs&0Mxgc=!B%{QT`-A>J4-w9Gv;?>X|U2ulb>lp+c< zf@i{%YsEF(M5rbjvhZniUos-xNrI9=*OGy#qEv*Js9|1GB!KdyRy!13^c&Rc5L>UO z=THlcdDe_&ATPPuf=MQSSZS@BYzh+3m%F|mv)$1`nx0uAH0YVHn+=%C)N|nDi5GN8 z33YlTQod|VQ%=9ROg9_49uG`Qas_P?Yc&QHCt|uQgw{AaCR%)vyR}yQ#JOvA#Q<++Qi#%NglW%%|V{|m`k z8U&hXjN4-cl}vJtQPBR(DNq%&|XQ%uC{oJiVxI8pWltqnB4+LzJ1Pve9&fZdB}Kh)|(=e|Wa zL?;2Jo3K(JGc|gULu;ziohCTTV-&IQ3G+o1&5wa${^CU>Q?amtPku4U25Ms{PEfFr zL?uQdGBFHVqY7%;F9d}7AT~Kt7zI^olA*Wg1X!-IY7wD{!AIv0VaeXr0xUPRW+A?e z)@<4{DO(&!?ama&eOY;cC7t$Fy8HVv)3RciSCzrGrV{q`)#9r`R)!D?5VVKmFK+a- z7O6VzqTg7T)4q@CDOS^7kiv5}*CJzmrSRKV6$_U^#*B3p@Q^sj&%dde@?(GgwkEpH zhiPd6vNzShL*;T>2GlbtAIZ&HUxUmIRmj>{jV#uB+)^vtOxlxXGH*Khb7^0jx4l8Q zDvZ5a zX-&7SE~e`O@l}R-MZS2c!|8Ii)`@cYK2Fc!479S#<#IXfx31!_V&Uo*XCaN|YIZq) z&Ubt{QaTRj`z?>r{*KBtuFR+FV%XM}2!pg7p1ZRV8C&RgV&FmfYULRNY=L6 z2lbW8cdRKD_2hiH9oR;XaT)Dzm*ygMzFXMxFi;+xp6fH-<>!#<$Ir)Z`Xbt&(fv}q zR1UWX|1M>FTaiukhGkVA49l{hUrNutBty9D=j*gZw7(K*ON6W1Xx(JPv<0+Y41I(j{q@HPPz4~- zk%)#BbvS(Eh~O&^%7{i}xe|3REkfR&7Ub`16THoijpf4j6ZdZ$opsnA$GV^F!>_Ns z12%GN+)yIGG^St4eXb4G?G>2+gRS`8tq<_>JKx3o=*1^ENoVRo{P66nh-=rQkk9s56eFT%Nh9oXYx5%{@KES_@lsb27)<^-OrSLV|8Y*+`P9IhCS8LJzfp_ z-X=lAqF$aSz;ZV5>EgMO`aXl@h8^Y5@2L<5J{fd3KT-QgAY2j-<22(%O7}4MJ^p@< z8=ro>jL&O)ymYT54};|6MYPv5)W@FZFB@9m+*Jo9tzF+d_A7k<;7xxE-TxgWTG z41>4MGm|-W*ugQde1IuMF5>RUX^0`HAOLCd62e0Aom8-Zt%yp#tQhSUt$jzWR{|+n{?@_w3_87T-4Oebn z!SKzowwBuc_SGTrjKkM%;R?S@pz2(w;^=3fvN(_X?jZfHbl<(3=WzShIb7wJB$xX! zaPBBBojQW6G}(;w^-{I_F-&r~_c$&d>&N+H$8q5($>Fi^;of5y?mLJJCqBfz7SMr=4p@?~ z|DS>74+G^=n3Prm%T@fj?R~IZ(jtFAx58TF_chKrjy25 z7b9sdwOuP6G@471)LeiV^7~V{k;}^vRzn+k@<%i}>A;(tT9l#0Cm$vZBIKibnwmH*oO3`9QZg=5L%dy=qe+8ic&DAQiJprWvJdZ7g==RQY@z5 za&se+=jOt(v;xtYa=}HMxGEdT8|Yw52gr>LeEA?HU*Vv!?m$9G z6dFvi*jt{BrDaaUDt*Q@B6B0fcwib4V@npoJt@fOE`@B449OWf_@#s+T9b?@c|5#> z1EAIG5E&hTxVRXE1p5oXT%Hn-pkQAFM+6}xIs^%nmZ?@47-xW-!Sc|sK*3oapUB$j zVF-&2LvU0uCeEHB=v!E`d`7e%f>WcRFSH@qsX>4;6yfPHLbLp5@B9W+<7Q!IvM<7I zRG0J+@uJ4t5-GT687!A2%)o?1FJ#YWP1Y%b_CQ@_fh=(rV)8T(z;gF}uza#6i%K!W7))b@=7+8fq4jH}aq44>L;&;Wria4QRRmp)8^+oU znj`YyYAZxWX9+U9N`>oeEr5mk8pm6yfAY&ScG<71av{Ca2}6ws=K3tS+G%bqH^Viz zP;gNzm{WXi20|;k5Wk*{E7DlmP>6)ZG%i-< zL1vsq^C`_KZ8Qcdl}PTk!@D$5%_LIn5O^eE_D|!iAx-XEQY$r1JAlDOm&6| z!=?NpK$bWG<|PHt&CjN~PN(OfewZ{F(;VT*-_nffwlGXI1i-zr3No!Plub@yG;yLX z5EJzNl)e~-#W|Rn5iWS2`I-SXd8ZBW&3c$<{gr7ZBcwu(bZTF}(s;-W(-ByaguJcw z)K^1cq63#Kh5Gw_uw1h=8%p{;;+D`Hu!82rRW8IXw$QPRSGUYS@*acN71z67pXC=;Y2Dc@^oL%-OEu?WW4gh~3w63tQ zVbk%#bTq7SF2Hn>zy=Kr>q{UR4K=MV71yCnX~H-t1Cmo*L6Di}V3OTmXqwAZQ!v#U zAb9H8i0cH+Y!uKqI!HU{sj0q@#ZDIebe1XrUNOG#jS3J3J}1taBq&xGFi(=lVUC{{ z0s`kCIK)qY<;+>mHX>LOl<|m_N5PeC6JYs_Ia3fG8!WWZ8EEGhm&{r29p)pbaE{X+ zck5T5fGm8{7^iyjbm~{$;;RV$(nDron+cRQoqjVt`)NMZk>5n&M)K<^Jbm_<@HK~7 zNQ^$1>Riqm7({dzE9<)&!B56k2UfQl#h~gq` z>cf6^?No*<024g{nBb;7I9^K6@n*`yLf0;O9xJ8gaL(V!LhZrf?2>6kwgUaA=&eufG&*f1(hfmF>`GM*&DI*xubHhY>sa{jEg5gyVjTw32 z6c>S+`4O}ypng$8>ri2g2oI`OV0LLNrc(T*Y?`yl^(v0W>=Ifp%i=JD?)R%oqA`{( z_KNHV*2-y3ND%3m(kQe}iI7?qf@|amtdb+3GD#TG^{+_8?4npIgZ4U9!i2^b8TEtUX zagFr6RJOds0ws-C1+7(zPBYYVY5zT+_L5z+->BE&zdra0zVoN=A-zb4I9lI3w|3Dn za}X9bRNrDn5zTew&&);Ut_DFt;n`US!>W92`qk6e{+s8q^qZTp_-mW7vyq z8?iO5Ek?mJZDZQtyX)b3yaqKdEx^WKK7}9k{|^80;eTV(cXs0&@BRQi-&lh}$~SjU zBXXW>6!)$i(UyZmP50*0x3oG_~qxV<%@rA#LmunIY zi{*)GVc^sLLem&9e;=eCuhlJq)c*_&A0PfG;QLWPxa1!nH$Gmfhg6r(5(dlldus&! zjFSQNoi$L*^9Zo~zfS#8D2F`ESuS|X>0TE-H;>VWHON`UYnDp}KRHYS%_Xorby=RE zZ9Fu53kaBxHb%o-UQBF7{cJ)%Q%Pg_yB$Q zgqG7YxPwbK?+K84@aBy%_r@qjSX=t)E$U2kKgo?7z`&&uT)uh(mxihHv9>dHv@6%H z<0dOhkKV?aD_3#l_FZv3MDEZ%;MDL{oTr=5jf_y-9U()vZsQ8285kbHz~C@$+_{PK zS59E~_5eod061{%3NGKcgEJSY4peVShM{Yqm@z#140Zl1xP{(p$8iY*xN!3nMn{GO z06%!+76wM|P}n^TUcV;*`rE@dFnsYMJ<}lFdx7q~jgzC4#~o_20m_uY=aUS2Qwg`J z>CVtKYsU}V6VxzVm-AG|v-d`D?%uEfwuRRC0A)azT(PT{uL*7UVWw2MHG(6fmvHdj zAP(a?dU20h95`@cMBwW8_zea<)73LWRL%`tzjz5$9SE)b;ZfY6_GOU#8vSUO@7%$; zyY~dXe()MouF&tubsV{lTlc8p@7=)Y@I~CCb_At8Jv4y+n-_2zSJ8j{JT45K$JrA{ zapur|dZ5cV()R&AKKUN{uJz)ROZ#zb@BmI;=*8ga%eZ>_I!+$!$MxYWLOZe%aPjatTs<~`D@RXbt;y$UfSSbH@%)s|@1{fBpuFzB~`EZ_b7Nt37aisax>d zmF#Oq-mXgIZ!bpU_DZbT(TFvTnb@7 z_DdkS1cXZfmD6BWaK^tv5ZJMpEPUzdI?9L3RsSb)BCmoa>w1KxF zrPTyIZK_>#ue*7SS2MjW6Q+g?SevN+jc%%Y7NQnqA)F4^DJ^!Sk}zjyLW=?Fd1gdb zC&4){3rV#m1hm*Nwatpjoi>Ed&4Q|y@~zK=w#Xo~^@1xch-ocAK&Az0^(6x2Nvcjm zR6FIi)!$jPhN$()QE&qI>=D_WS6Ajt3@{KHYLGRqKAUo zNYm^M^lqDNS@1*vV!>AxJ# z`K`!U&<;~)4T8$3>`EQXyE~y-TaBCz?Xa|!AlR0Mm^=rfs@?D}H)Bqz0oI;Mbj|NX zYf~*Mx@zF)DMk9~3TSDg$-FtlYOBu4@Jq6+bQ#Ze!OuGPXl--Dc` z)c+P+V4*{Ai!ubyPts}P*!vS~8R44f^1Oxf&-@QMvUh&BewjC7>snGs`3M2bs|1v{4E z?Nc8L1D_#=XlUtoV9jyX8fRl|A(_d7hD8=XU1*mVuc{XS6lPOGVLf0I|ag&n#Ad98vrLY+)YLC=#Oi2lV zEM^vDQPVLwf#O0Z2%ujULlPl_oW@T~gPsoEB~Y)(7E~+|3utU_$`{`nIiLEz?a!%BpPm z)G8rgk|8w9z4Bv_wm27T;FCFxXJteoYkeKOv*KvH>ZmM#=xF|BVNUO9jz|HXv&+UG z1#m8(iJWx}LL-}vfF{ zkYWasyD|_#bC*|M5~h1%V3?PW#7ZN~o!O8jO-FbZtt|_RX#7lpqMqjdV!3EvHXxhS z?Be*@DcEp&;tg#md6$t7c=49>GrZ~^*JeCnbMp?Rxa;1MsYnDbpl>$q!q5#%%m ziZ?dkQ=EXmD+=0r3)D46XlZ?QRb>lWAlb|bLc2U5)DNLi!LT_^NKIG5Y|&wk4;!gX zg3g#KfOMr+j+E47L?ncwpezURa_UD89hy4oP*z!l=(uqBhfqE-q3{ZxjVNs#4h{7S z&2o8>9?rS6cWb5fq}2s|PY!HLn0}=|Xvk`4ufnfptZ0u{pjK`bA@6Ipw99wB0NPSQ8>mDma*5kBZ?W~7;8&myNiEwt=z`Sc~4V)Xw zVW&08wUITQX?@*MkIe1WLhCt)<}3TUQW_T(LOa?`ecDa;XK$}T?#>2e?WhsjxOq=D z2(U4CPd!~XQCK4ipK3+X(=Eu_#efIpwVTt_kAaf32j=k1$E#7WuZ5)PLHd$sJ5Wk{ z>9Xg$NIFD(#fx32{nA2|ztAbt6+YEWX*xxC`3v22Pn)=p;~)03(MI-jdd`=_+0Xg& z{Y6i=q3Y$ibUjzZv&-@P9PDy_9G>}jt#GSeo+rX9U+O`@)6FP)wjHG}bfDtp9+bb- zh2rNrD6EyjDF2tcDQqsvUZk?g&*|9Zbd_J2hpI2qJ(NG!gUgkkhs)u5^K(k|~2ENwn~&f*@B`c=yzrcN^0wx=emVk^-QO5 z8(x}E(u0yc&B&s@WodWeNALfX&clN^j+1!z@`u>@z1^tV)QBwV^Ci1mk-NJY#m{%6 z;F%6M>0IU9RE7`Hk0UsTV{}4&>)HXlcI5;7df+dD@<)7;u(eV=BU7y8?yM7E8JL#j zz(ZrLWKAthvgc_OgS+Ij&nHsrM&F|Fr>Or zUu0o0oc&y1<}7zUN$0~o^lS_+(zOJZOX(g4!XFj^h~F29riDe)Iv0TPePH=fptW@U zS@I~5`%!V9CDJ{gB@&>{*AkC9Uvn78nRi!G9K8Lz-|^PUVz%<=e&(HUmJE-30ErX;j&rA=OfjF zfqUjJXJLb+Ec}9jHOm<+XQQ30ShDEzPU)U}>e6<%xF7*k`atSQ&J9G#~4<0~& zZy$R5`-Eosv6FOt@|e&p@9RG-L^9~fp!cJIa4BwlyyWM&<0p=ZFb2y{pFWAJSFhmu z^$`pY(@yzwu>5lwC$eidjsq9^@I6-{u>T}*<{U;xZ$l_Zj{pPLfsV~80@EPDf~7D2XA1AI{)CEVLC95(6;>)PL7_!C{>2F*ax{z zHz_T-%%U%Tj;+vN*j@Tq8S88e&#N&Uc5&Glk&L9FBpb!;re9^+`Ed4^hD=yjp{du-dh*Z zcXLE2fwL{t{$5rBNTO2Tr*A0h3j{y4otQ~ z&qs3dI{l8rr!Y9wi;*iQaEl(~!oZ;TdCm+E;qaLgIC1V2KK|fc+#4Cjg;TvWi5x=j zg~K>Haugq4`WPQy-j9#Zyo2*2XK?B){Vu15@cu^!#OE^o#}49n?*W{@a0cfGFX7`n`qT(c_0v5EXwo`(6labf!`YJuaqxq`2pX3Yr$4~!AN>}ep5Kpy z7Y^d%-u?LWz(=@2zyFC|+MZFHy!86_knzQZ(7e(>^*MH|S%XFE}}mo*va(6OTg zbvrAuc1I(&RC(~s%0?7zD28HFF3daWK(n0|mYt0-ZKp+-4(I%dK7$~Z^%cVC#G~Y4 z(3}Bt!^)xu+T;@b3cC_W&Y-xYSw0>tmuOfduzbAcxTG~Mf#uRQ1LhKVK0a(bP%eSx z5-84EK{B-MnL^{;Qej6;cLiSC|0--1X6P&RFtpfF zMs@vKkqNuZ32>LveeD@YZE``|WP`TNisV)^B03yM?D0TZmx`>?WNf8&ZSllISF1w| z<)6}7j@asadagn!Tk{d#?hqhDRf!R`MOv8a71ZuZC~Fg7Z&JfkCWpB=3HnY0-KT-B z(g|Hn2ErSSNL@nxp^BcZIt_&-smLx&gS~?4LcdFTMJAFPa^cnH!mKVQlIS;zuQ4Eu ze!sv@3ql&LkhkTda?3L0E$Kw=igsAL$`F^OgrU-e#`O&-TTO@jrR6ZrEkTe`iR2v0 zqu7OzLNkI2O~{yEgZaznqN}S8Eeq>Ww73MurCG47%0hfWI7%1VP})s>Ww8ZyEA1#> zYC#Ew6)x}~(jF;**n-De;p0d`(W(XnQ&_k&5^1&R^!quWYoaz^MTh_SG!~obH?l_| zb5$*3>di=;>x8^shdTNV=5}VFvdfIJl4Q(Ph2VuUHx^e~5vrI@8?+qAa-(2fREmf! z6^d6jKwfHuzS<3MWib2{VVD&YfWX9Xd_tSC-~IWIh)a&gEN?GNo+3kdSP&8uqT%b~ zB`5;IqC*9>3Tu}0wOpBm(C{FkSsoG^Ao$AzgZ+fo`84lokWG?dn%_*JT|PZzwlMHH zJCX89i$#J>3Ez|;L>c0-a^E_<^6?)rE5#4f6Xzf$PYYi|IJILcrf36%7I1Wd1~bxv zAWQN>TAc&4bRmL<#m5{8FI^}?+(}5OutFB^g^Wd2kjZ^9%Nz??vX5xziJD-{&_yC| zX#*x}f)GsiYU&-3Dd!-uEFEc0P6WE+5af!5k0}D)hA@QK;t^zu!z^_eW-3DvU`>Rt zIUaKiG4M){#EjH1OjU*N{u<+;CLx;q?fs8P8j1F;M20xVZ=Du8NBK9pPYg@(C&V-A#?3!vFtNC((v zShtjkPsCO8UGU0_f_Y7m0QqF@06~+I`d9%JbO2(oJgiDXbA|@VEl$B5Ez?swruibM zSR)KC$_#W*hZFv#N`%$vAhQMv?R5SEX<9)n^R9(-TUntI3*r;E9|XjzTWrWJts+rNZtwhW7RuAm*< zb(AlnbdfXQY|N**(*bW|1kzhFF+~?7fM;V5tqU}U_@zbRwpIieE5%C%J*`!2c>TLonpXG=~-L3^f3p}n& z4^68FGWASM@=(93Nrip=n5MLOU8&I0Hm)m1+GF{MXipa)xybDci5>opa+E&X zjoG#+@#1W{F${6ldd$p-hHiNtqB~5K&I#4pTsY}aoUq&hpJq7%TGX)Ypo1?R>Jk^b z1Q49Oz(wns6Q)E|o4^WmWNIf#BY53S#po=m}6p0l zVs?`XDa*5K0BwjneuKyZ<(Qd5Lh zc|=QapIr}CDXmj< zKxadi88mj-sHURX4%dou!53b$Zviql)CoHU_SLi>r1sV=FGBi?Vi+GQhha@Qv@43B zVMD*Giv&-7I`vcIhEkX|R|qY9;?7NywWAIhTPg*8 z8H0*BkCT5}m5}V6wE}d^-Bpj`eXRnxW?<32ndZ4I<#2DO{I-?~v27`NAnbQ;FNcfz zxg>7d504iq+_8=FBH{GXJyIIa<5kFcvL4pW#ZWS((IOiR>++DrTE7es?y45ooQ{RB zANF&eoEN8M8DBPEbA0w5dS;5_u*@fFgv-ysVO%%PM{@Zd7S5aNAqo4rE_}^xz|WhvuTi+{=Xk!4!wR2i5t9E@ zlkl_4X*hm-UXK#@&T>jezyA~Td+*`$#)SPG?%GlIAWhb8t|!-bEZniJ1O>E*<#SK= z4(baVir^rzt}B3z#Iu#!esd}Eo~T3VQ&h(%8<9ij9}ahIDuI*ctFOQPUHtH)pJDSi zcc6&&c8(4Y(i>=xOKTr zzVxSmM<$(n*sg5!&P2)-QBC0HGzoTu`#?Wewl^!1=zv*BX~Z3V#?Fe^@w;1b~m%8kfSy z$4lV31gf*gJK1&`> z|8RcN^=FAx=4T0~k@6i6mP_SWs14bb;`n+zST3bwKZidYHy#*&l#B<+C6JuKbJnV6 zo^p}jXMp7?w8xXca;9PNY^VP61l>z>h~?>87@w*U`A9(b!{9ZG6#gjT_&CYm&=f}-6bA#*1$JDMZeQC^qVlC{&?*J8W!d(XC**Mvz!fl zx|nyIh3;j(aux|79}kp|7uF<~To%?SFa6458r$6hL&;lKjlP>F(K~bkM^2B~xI5W* z6sLN7|Bi;G_hjD#u$)DrVfklZxg?(z$M>>k`N@;Vg=YEZVEO0rSt7&0AkcpazckhZ z?+*cIui^3?;QZAwp#0oT;1=kQIu4E=2K6Z53U!o|cZFs&(|oW7^_A-^_qEJNuVLW! zRa|54k292i?`7Z=<$dWot_%!g=-O=z)9u4|ZsXS7VT@et14b?YLl-H{xiRS;PA#PF=fzi`SW3oXVjvL2oi}p6;bQFVOwNmjD_F zxH>}D*KzsaVcflW4W~yg;RZbxQ=Z(R=V5@K0e=R{StFe(Os-$MiqVTy50*=(sclXQ zBbZlj-UHK&U!~$0xE{JZihjC@X<+W08K&|mgY%9^IC_)XkOFQ}xpyvNSg@B; zvBxPrH^A8u+16SI(Ws>5o3e?ZGQJIe38% zA{TJ*QZEKBQ++O<#*L5P!^n{XxX2UU@pCwSa)>6S>*zao10P);#JdBh@#)D!IC$zH z-aPdQj?(WxN@4dX?|YwqEZpX z&n-sg7ndUU#RaHjqdB`;79(drT*##MAcVp+j}V9^6Q6+UDc zmJ|w?{d~+oci{$4xMW_3J(X2cy5-`r!>`Ded`C8jU zWzQ>yuCox?9Yv@qb7NmwDOP7%kyCFIpQ7v9v!LzBMe^KyB+V^^qB|e*xw(j2kd62S zZm8(coms2LvH}MlE6hS&b3UvsWA~(X7eZN=33+QSLaEMy^Rp4h9Nr|!9T_myYO%6W ziS3!ec)=cv7wF);JvA9CHOZ)p3qi9g3e|CQP@fh8SGpfm_F#nN#bc%?4%2mUNGNb2 zz>!L#MmULgY6OC9u?VC135tnOm&C(S5RE*G50+X(up>PHU($!*=h<@nu2h4+cIIO6 ztIwb#Egpqg3M6L534>{oOENLNN+W1u5^8MFHe}I3q7kq3{uR1+)i-$r*{~+==*VS^~bLj>U^kHCEbFFt0Wj zcKWUSJLE`Qo(5N01m+eeV0A_!mKJGYuht;3HVx`JtDry#YBnIaO^2k`bi~&w5Zj(A zG&aK;byT(kMLXuwL8uAVZS~YIY{;^NV{Jh?zTBLLC+5@Pf00uFFW&k{Xmcz`%P>Rk z(IGZJ4esTY!dO@qjkO#)(B`jpBflpN?cF-Gxq|R?ehR*yqrq=7sO?KE^gE>CrEC?R zZ1lim2uF%NM(_d$I786c=0c4<95s4hbXKX6*{O%BBMrHm=@7oI6mF*C$&C_VhJQmk z{O6kmm;K^$8=fe!VRe-bJ=t;Sl>1_LjRSL=?Fdcxf^!k`4@V-evrKT&4F%3)P6x3{=PhpcV+Y*O4wgi~FiUnvsRT~ET+%m`#XA8}8MTJS^!y2t&nTaS^ zN%Q5xVq`5WL*CLV(gqF_Y>@<{TR*CS_HouG7KH;;r}&-`+D7FG)F z^=yjEq-*}-fH~Cjm)4jyG%r`dwz)#^mdjUXLBG9> z4pj95Fqf~(f?|C(lpAuO+g416*GA~p=EJm(=CN zx++g-ce*w(H*ck&7~%O;(e8oFLcdi-ns}M%%No440QgoY5ZPwJY#O@^e6gnP^x{~^ zXwH&l1Yl-mB9c~Q3aSeR6U+ zvSJZgmWuqfb&$zti$3CP%f(EEA9`<}2Cwp$FoKRP^D!mSM|>5KH@^xI8A>Q=E=#Gg zA~-t*ss@Ju%QJph| zn($9&nwx4pEQ<<}P;J5-cN}t7QQg$Oh^4XC{?sbSlzz~*WQcW1X7qz^se;@&n3NTP zg1zlRgE@Y#ReV_xLu*XRGB?6Ib?~l9fMS&g#;t`&TS@bfJsO%CJN4yRh_BKMaNoYJ z4AE^y$d|Yf)S^MsG6$5asSmAmBcx3W_3CWI&SeTQ3g;J$EAr@&=mzsQv*At#%gsHR z2+WM8dY6eWg=X7B1Px1Ub*kW?o@n(Kluk^+6WncpYIPng8_NYBK69}%fIl&14kpBV z;oEQg81h0LCM3*49F0kS$t6>IA+gRRG~s1&GF0rHhoBNAWQyrXX|y7Z))EGCt+ZA% zNbaANAb8+e8{M(2l=@T({nnF3otdXOrkUojWw`?MPw21+ZF64Bm@b9+*m=%ojq&gf zqtFoAM<<*zo>i#&*lcOqwBs-m1ZZWpgR@b-ek` zU*OKPix-yx;Q^4%nuu_9w4h;`ziSz$r1)TtDFQ*634%A?Nc$`u{nkkhMjDILAxrf_ zU~!6|fikZsf_-g;*!Qu5g!r0dO^Kl5<4^Q;bj>f|l9px&j(qL|>}u8&K)<0>*yhl# zp|tC0f4IIx%s&jI8@EuNTPk5C*Set$mbHa2(>=EJ#X|U+=P~O>x@R@*qn1-2rM_<2 zR3dD07}gcQxV{kftz!T;%V&Y!49H4=Fay}q^#ib$_RIfB7=Tu-pmEcpLSUmD$%}2U zZ7UVvv~gpBNaNT+<&#MFjQ2|bHUrZFoZkJv%glYMQGnN+meX*0&Oe(qXvyU`E>p^b zuQ`sxIjx=2SZQr=(EY4wobxmrglvF^0daC4C7g~aJUBnjD~G~ZxGpS`KacVnFH*de zrsVl{0gy8|&LFu2nzMhrFkmhT1LzX??%q{FZBj*bpmlQ}g+Il0;d(K!PkSA5$Hz$` z{Cn$!b~%4ZQ1VoZxXyW;e%HsVk-GpzLAt(++J??RSv#tPhJ3|y9YXUxe>c^I4QFnr zwxYGQ<*E7j`d`0`U-!R?kMA7DpD(^8zTC}QPirsraqgd4dzw)2e238bW+R-Qjb-@e zr{BjBoWN;Zz}_D|kM4bo@w2}Fp*5%qbKy9EFK{*Un013wa9J#b%U3Kl2Tm+4iQdgTF7{>?iOpN4^P2^=3UkIHL&xFq9&buL2!=UKQN4Et(ff0p}J zv(PMO8kVmf`WgPS|91i`&)U@n&+fLrqhVpn7B{sci=;s=X^~4Jf#)2~t^}4#n&lE$ zUbLzn$8ViR-<6XOILjFNHOqJz zpYHs?X`xkq_Uvgv!}2*;{<%C#WCD!t9mLN~^}vTixOwR+P60S`eN4;x+=XG_;zi)C zw}IDQ2j2e_ICNTQPv1BP!86X(D@pt&s4@cz?*LZZ@deP8=8@W`L2+~45r3(sNr7eB|nPw2NjK7cbv&g0aPi#U4n65hCU0&fl- zLI34XaB*Nit`8gqP9DW4&pe0TZF_KL<1U=pzK`m&pUVFfw@#nJ!H+(|kt4@&@OVG9 z+HHLA{XZaQ>pa@HtVH%pOOX5gLR39D7v(gm^Jd($vjo+2SYWXHrD6}hv#=S}bXd`D z%BA~i>Cjt;!p+Ud-9!`khFUl`RzCpCCBR$~2Fb?*&La88hcj@_ zptuB>KP(K^u-5pa!1D3o<3Vv_A*xGV z*jHMD)pXeOG&yMDbV1XV1$9@h0Lodk?Ia!ff{U6D=Bg$Yii(o(VwMfx%FoBf?n-1c zuWqLs3GHsAH)SEcEr$;3ISB8egLQ{nP--MKS&@;KfUo4m;Fqa$@R}|L`!j8L&0@zd z4Ho>^WXA7H3h>`K7QEV7g4ZAK!3RHh5(B6Hgf|cV292v)u>D)l6lOQjJD@X71mjLqwYeNu3^KK30ogocIe;8|+ZknV@ZTAh%YB z-8E@gni&OsWf~GYGLc%JiS#;;(8^`a%7|7w66U(0s8=JqED77{te9(0KxUCiXvs%Y zTZK2-k<#XXvc&*Js}hA-Vfd9f6`!b8_`Oq(|FXy6Cze?J$*RDIY9&5Wsql{3i0?U# zc($V&1&ucNcE%!VK@5tsX5-16SbT?`_gmFYWL2ghu0aWPy#c9>X2jK}A--7+Rf`hx zx&$QGCPUtwir5+z;v4nIf4o&_ycu^;f38iyI&&C)W=^4YGT@iB9<;5>gld5aKGcS~ zJQH-8Mkw8>!ce1wHb0JimC&rWB6FDmb)8B)R-J;Et5flko$_%f;ys57AE@GR+M&n$ znk4+*pv14L^H8e^gUS$u>~)0*vw34nks4ojCE=UqaD2JWfRYY1V%n31HkEU08L~GN zz%Msc7|@zkDTh~gD&orGuq{J}@3@S3sX&J@y-*7y@O^a=%bNO!b{1=vZVkWSA5>OMvCG z69R;0`OMfkLbLqaul^Ul{IhR7&@4CAx-diSj}TV^W}B&Q`Dy`}GyMc>lzZ67Azd>V zm%X?Gvc#DP$xMN~(uRqu02tcy5R%1UoWB6eE!~t}6$n|95A-cGuh2N?Z*JQx(co|HOmkVuS#Zosc8;S*uK~$?=82p@A5CNYiH4>Lozg=4(07KS_^=zs| zCP^Xn_lUZ5VW7F@`9)(CS~Sn|+&+oM;jGdmVc?JfN8{!)0fL#fRv?w~vTUzH*j$sK z^kA@DyE-45n3g-ER&~@b?BwvZnm)AgM3J{vGtgWu3c_fYI z6It9exH|KZUS&gkrV3C0=nE)WRtGOlka+QuQbOalF_V7x985|LKx83}-wJ~O%Vlv> z5MQoG`PMefwnqs5?ZB)A*qEY%=Cc%fhJegiq*UvnYBbS0;-)o@)~ar&0FaG~b1>Z= z1ZArYbKEhoEGQE6E^Gi=Mtz7Wfui%%P`sv=IcryD|$y^#8QfD9&T(}+?H%qt3@Uy+Zb z1vVrtv?G2#&9y7sP_OjByCNP@9XjzMrR13|0RX2i&VrKGIyP=7)6Ifueil8e1zwgw zWbhYb?G8*g`3tbzH#-_m+6&0^vuRIIjHIO=!GE5|Yo>KVcqp>{!rFzg)PY(P|Fx_EvDwS#JD-t06B&2WCv!TGBiQx!SMPdKIVf5@=0)Jx^5{l9Uy;MkUGJ5xt zh1!+&Kl6Fbqx}}GHT*?M%EAolTOI+XXlTqQFBt>N)vNM^?E(%nY%CiC%1Kzmoc*kM z&f4WHV_Nx$uFey}pt*G&YX*~SoOv&B^8P#F4(q|31HF2K>3a; z0h+U>wP{`c|8fOY(WYWpHWk6VzCifdHE%2w;gTl0b!!PMTPPigc{8QGFQ!d}uy3b% zm*Vy7Y5%$=8-@+}0tjbdo8veghp|Zajra4t3~qB;cG=IuehE}((3?SVE?+8-%jPmT z4=y)uo>3U+XK-8s;JHqmr-|+}a@m|O<>TB{C4h73+C^#E5Tqm=#&I?(oAZ%Cd(M~Z z!FA$%S)_O=j)ku|j9)(R3kTM=*RIGA?aq4>ere&}ULip8jGdG>Yr&JBUt+K;wC;D+ z2;f}2+}K$r#6{~EgXb)K&Ek22pY?CT0D9&ge)&*C`PWkapnd(SECG-+Jq^18EN1|2 zW09cXVLz8E>a@E~(DraW4J&f+;_KhUN9aXA&f_4C;}4hL!dKt5 z707<7Sx}!a1&eJ}J`SJ{E5ET0UwQQ#_~LKBj<3J=ZM=8u0IeHMa6LwIA+3{@&vzq# zccXA${@_3H9+lIFLGjfz8~E%eciSt^!?mrF+N=Ua&vl4$7z}4kY!(KISsnn;`x?iD zo`Hq6yczHw51LDUj*~#}&k_c{`5p;8m%wrc%I&+T50S7x|AjUIma{v)Oa{Xxt#TF# z9A_|`<+A{EjuYDE4}s$k%V+VJOB&`6gWKbQ_{VPVbk zhr#lHM#CZj)8oN#PA7rjQrP%7NjP4jU3pa6htoeS96$cvM}g(cS?+j_`XtRAo;{61 zv;6BvegQV{nX#G1(mw&q-K=ST9|(8e2h159A8+iFX;{XC=LIj%6B_1BiI}^z3cWW@ z;Mm}C96WIV{l||A8kRHt{Wy2(q~I(+L2f?-lT=V1Bg@|hyTl~cgE6Znq15IEY8fg2}rl&Mxm#|%c|%5e<;_-pu| z^hE5Z4eB9}9Vb>VqwtGDL;LoX(J@1j7q0@BFA9KsIZxA3T>)?=SjvJ=48A^8{YR+a(txH;E=|MvxaQEon*xC zY?(N-Z!d826X4ESj9xv4t2b#N+&hKQyYviaKLtMcBd~5h4mc9=XT@}!DTu=X+6W(3 z_~X1h35TNO_-mpSzp|7AZyp1N?oz!klgqs2*M!kbVQ_Qs25yf~`0z=*_RPCeGjXwdS-GzRq1GoMLL#f7LuoQX=oJCQ29SI93i zs69uhjc=aDo#FSW9e;t>AIru^wiFyy#^OzN5MI;z;my=Qysrw!k%S~1NY>*GT|V%m zKhrbb#OTed7`S~7gLkP8w;3e=J@D(V;%r+H_G^=|KOzdp!V_>#Ye#QpAwKQs#K=#+ zE85}I`A=~8!a*E6e+;K+k~w$iC`S8P1D$@;lYhqb4}O4SU)+F`O?7z7V8e~wPXqg@ zJ&v5l<&TeJ=wq6wdQal5flu(!mG?1phU)ajkAWw5<4txai=T>3-IqW9fzWv1x0D%QSd5Gp7olWd5Atb3XD%_r9{xPB z0&BK6;Kd>*zP+FUWgCj2+?tEbtu+EHFW%6C{Pi^HuN%`Umt;Ix&Kl(pYmzgFqF+%6 z-SPq<;{kH!UmbtVB7x%VFcea_JrkC}$x2QDFJQ zn&(m)zE4XeR%1oUlX5`zVzCc@txnjfd1cn8Gr38$3a~hjz>o0 zVyYSk%?kX$6N~>SNW@RGQ}AYP8s5`T8FawzwHWY6V=BI$m5vTqG+a$81U1KFW>*sY z=cxsi$j^Fz0$qa!>Si?*OU>{sNXNED6_#X0jDh9tbYO1CMru7tGaaUz9Y|<$38QWL z+Ef&mrr_~v-)a0t5tuvr#4{h%0fZ*BWK~YWsert}y>6kFw zOo+uHhZbL1PY2vOCBoB#kXB?tVxbX{xv7XQQo>FLd(%^NxLu(|TSF4|X2;?;#yI+o zHTbzP8o$m_;#YZUe8(J%pXa9IN5&-lQLn}u#d&B|L?GP|hOD)DNU_Yq*XWs#>XUIw zpNO~XY^ZEgAhbIfMmkjLHWb3TA`=tSropv14{Y2jq(_VN(s=xvEgi3!P54Q!2`}ZT z(3&tA%No*<-($cu_iVwP$+Q>t&JqOZVxcM0BdstUNzN4brvxHBQ-=gv>!RgR@D1@1 zpZsfeD$Mkn0zZE*_%P5tQ3fCX>6q;^1?qIA;4Eiwh5_-oglGYfr^pi!6&(g&e{Teb z1_({ZnB*8lB}Tz7G7z(Z=U}4WG(p2MC2}@q#rq@Cu7X#b4+II6JYr) zxj$@;nUKX!gS^ZjG|K~A@z6H9Ad8-i=v)clWAGlpW5J}bfIv}FGGMk8Iw|j z;8|RS37TLqZ+XdvE`(&MA(IDUk|Ge6_IzY5s={<_kkC#qd8|Gt)yb z#}tXFnjm=T!UgpT)2y(6swMza)c%y-7ZVjekfnG-#=v)?mx$wVDQtp#jz}x+QPQ)i z0^m(~1ev3$9&;e`mmzCqIT9L-sCs&?pefKS&xV0PpB)wAz^dIu^BW0+=BZm~F56Ow zv<-Pe>(RKjKpfDSAD_YV#3gR%wv|J_y@L8qmC*XstjtBuPC8s~t%Y`RmM~xz*Jgpt z;g47b9Ov5L!!Mb7tnln=pt4Kp5Z?;*8k(1>k1NSdS(S;@4FyoG%@>9u84zR23g##F zE{cb4X}&PxD*g*{&`G<|QMw#VKCsu@S@6N((H_ z)NkTvAjlq%{N=UccjPY!yi8G0*1Mo-a>KE(6kg_VWUr`3fF}V-l}6a-7eJOU1?kOf z_>=k?&Ees>NwCqH!MxKUS@A;ST2Av;NNFOBi?cDq9Rfv*Spdp5TJys4FLqqd~e6d~7NJO@4F{hmBy~G3MJg4A? z7FyWdGzWLt#z64&SxE1qIlIM*IgU^`X?@OKSt|I;nPNbuoPyjfb%L%XgZdBmFaEM1 zZEcYN%R?(t1z4WmmL*;eaDV>Ukw1!d*SBWD+ZIJ*VWt4OXF4J<(-I72gBcUFK8PyU zLeb`giS`fSwK_yL8ig%}u$pw*KNO075mKl^?%D>(VkRMHbv43D6x0tULDTIN?Zy1@ z$?X=Q-JM9!7EE)a1ax!1W^HlF0BA(JL0n531xs9Tmsr_4xNThX~ z?Pdg5QT_9xMI494Qy7EvQFZBvu4m11o#^)owMOw`p!Mk`_@9AysjjmTo}&;i`T_yl^7UqV2*k!5~rfp$uV5W6p+7?0ava?3ey<|U8 z4>rEY;@-&=DNKb@1;I;A!T_dWU4a1SIh_3uz;@^Gw$EZ*N^hEWbCSa5YE@a znB&u}$lKQ}c*b-0Hi>#I7+louO&WLgfv zW6fo8nVg35%w;=9PtjhV%94b`r1be5N5b{sJf-|4c{q-RuQ`n4SSy;f{rN=)w=)~7 zWLgn+nV-FAFKd1`(|M%nK{(Utlswfors@6E7*Fb3n2(*c)FsVyj(eCAhVSK< zD*Qr)e@o_3XYOz2rDyJRt`EChKF6~#=REVQ^EGqjzx2+x@$?_Qg6p|pYfBvSCF%w z`pKFSRKM6W_S>y56fZezzq|yEUtWrmC%aIxt6fkY)jhiqrTaQWe-v#??aF-R`7d<9 zL~A{R%Hx4!p_xt3E@Th&T@nVa$Aj0BNa2qH$j8e+1Isy#^JC3&7EUka&y+0VfpAGA zt#Rfl|33xG|Cu}r+?M>~<339sPXDO<{*g#&KT9Oe@$vccHHUE=`#B#5ttH@myhwHW zEEx}sKS~5BPQus!3pjuBK6w9B?f(MH9lIKlFwcdr9{IU2@adp)19O&pc2RxzP+gy) z`FFB^<9XvB)37`YmPnCvK?jc;j ze&EUnxY)A*hqRe^C#wQDFh++mIyi*k!Rx@l8Q|M{@fsZh{ut|pV_F8Tl5r?qfsZsQ ze3Y7wgK0MWAxVp0yRvZNxu<~>p8z*b;m(yl;MQr3jvN4n4*~!2MZBG1#jgXr&}T@% z2bM5=KTL)<(*5wMJ{o703Y<(#!}*LF{Ki})w7wbi#^6QV86Faiah(PL2I*Ob*y!c} z)wLh^^iO!Tp%8ycQQ(L(cTC&;C_TrmyEuO33J%}7jia}QaD9~NX^sHIOvGRdzMgqXo|*R z%J&164zF4YfdBp-{Wg~{bY}>cK;?t#dihh}`!C@gZ7dEa1>+NC1khE3(TW1R9ubqyjTr|@>VUt#i93hi6B_LM(Tf*8{+`&RX3*rE`SK!UJ-_fiSl$NR z)78-ID?!%YaxACA@Uw+>{QG>`6m2X(?6xd%*vMF4jl2!C!CFrX?z%Cp^6@}9gXFA9 z&hoG(xdfD_FUuEz2!q!QhD#v11dg-t^>|^xTmriP5m+wy*`OzD-AQ1%q=hbtxPRW? zC|4wrG|3qxm;B=aa~Ae9SROw=mk!05uyp01q|AyZOY^ZT%LD@-ke4`-+>=4|$QCp# zn$COylxNrG!r7P&SF;6q&2d;@n~nX{UysXm_$kHL6r~`wI}Ird&9Kv9*;8$Sj?yYy z&4SC@*kXaHMvpdQBn~7+U^I!`EIq!ai^dOXa&i6NzX1I4*Lc6N1h0D3__Z<^2hw8k zX-YH(a6HV+4#lbAH!IoKx&N~aSL^@%vED&of50up|F-}1eJ=Sk=nIB8;aIUq%=5$ z_PDhv6P^k!s*B~=-QY%-I|Z&X2Q+nANGHFp!3KSk3FxDP1DjHJ?9LUT> zU7->wbz10Z9Wd6>p}xupO%2t(E)}KaiRR#ZWPi%rFpp%%j^L- zU{1uf=wRFo3q-Fv9i7(NWrg- zNjRiP!~wk$FB*dJVuKz})fus=NQE6V_w6ju;|s1de4~Q;URpe~87bn^-BhPPzNHAp zdHTICCr09v5;H0qk`YC1?%CY}!)iLTuVmwXvr)9P1j_1EB+X5SyD%2t*Qv2ztHb|f z=(%g+FUNhWR5bG62abF;HpZ(cD^vm%i{M%Byn`86OP2B^{9ok-~td&YTXb-Gqp! zP+{DYIm^SzWdJ=mB1jmVW9@SPs2~K!gkW;O453*r3z-g|S zUws57#Lf`f<&%?UkAda!Q;<}xLwvnKd^Nye5`*PTv0~g@A~Xh5*X2OHCJXY%GKA4a z)-vZX<#HEPOWXoHU?7Lnv(|Uwsw@O{=@CT29L;QqlPN1y^WCU>d9k3ZVC`Av8&6s2 z#;o!L!Iho!bQ@HwauB!32J230!?^||E_aJERqMy-U$h$w1z5_I77UoNkw4$kB$!uG z|8xXH)8&4kSsq!LhNvp$Fpn3;J(-GSiai1ml{(0@KA7o=#SC|h0MMDcJfJ`UnIRDV z`ErDpq++%^R@e-XDP{?K3K^?wFwGT#(%s#Vh0Bn&rUvplGrFH$fkGOm+@85hDiM>b z5-%vivK7c%RgbCEe`Jx9priSmjpSPA6+x!CGm{G?QUno=^4mMpT6gQ_cQRHCkY$wZ*ffocc;E zv~^Cwq0jV9Gqs_Zl^#j+L^YC1jG_-SupHn{giPrpjF&R#Kg|*ZEwx`d9pI9h4N!Jj zXdTUjeyIoYE+b}ThU5Rk-d~5ub)4_xu*^(i#+9_7W!}~9YPDi!CNnd~%#K42Lm_R7 zNz*22)23l;&~fY-VrI51TP9hi`}aH}AAePUoVK6$`@7!vkGI#QN5gYw=FFKhbMJHR z$5@{xY#sDS9x6cn;LJpNzj@(aPy*RVGn7-@NEmAtnxFa^UZ|&dkUYkQlyNTc!;}_Wjzxd{LB$Zk)jK(3Q(Ia@t{gnOao~r4&OhjMpFyzgx zhF@YI>i+=oBYWc5G=$U|p`DqJgwfQ8W|#PpdoYcAbb%J$DJ3*+bkFCN!%sUvX!9pE zTHv8Q3xnqTg8_r)^0BExb6!sURZjLoHHF4LgCA<~@-OOUy;23`uMQ66E$a~bVL z7nf3cDV3>!ZBa4YD=Lxq$VikvH32z~w1_>dYbEVrA8HnWx@T#r5C+I4KWhNH78l?3 zvvkiV@uD-Z&cHNF>T+u99Uz>=v6OkknS-2p#JfOr2EG|UmB4L|m&&pK-Y^5KQd#L5 z?3Vy@b{Tl)dO4o+a~|8`LJ?*^$MJeDwMFuCyeLC)430BM?&30Z9S@~Rpg9WzT2;N6aVx5fOPfJ*4s$&JK*D|o=%p~{VV5Z>jZ-tl z*FZUoslEkesDEsN0Lt00Cx3avKRCG7REl>g_qps5>f>5Ed(m2uHI2?Ql@>ThWkTPW zDr^(%qZ4NJGn2&+8L8Ax285m5A9|PamsxE0gY854Ry2s`iItvsJ{3JVMqDTB(I#Qo z(@x{SoaNm$s#zq!{6Ez!m%#5I6RDg8o=fozk~3f~)gxU;x`qUncL&Es+wOqk5?C$) z<^P}3u(0;H#8=MJJ&nhO0b>b-mH_7NptR)wF}XMYz4b{T_K%6AE&gNjWBH_b={nux zrGBuV4S;sfFA2wSngoXbn55G9Gvx|{|XJ_*=nVQ^fM?tpi9xwpI|-RqIcaXxOJ1d>bK<=l47ni5zx zRKdyVtE&VJ3xnlq(rl%YcX=k{Ij=h{WMJ4+x5tTjy`$+Qr)teAgFR(SCy_BX;8; zz6Y*sM*GCcIGEzam)0EM`+Y#$d7Nv%C^*Y;iORhA69JB&v|52RtAICO1wMZV`1)Po z+Yh^FSvGxx8#|~SXHTQ^_BFK8gl<1|4rnDgy&tX1=im#S8C#N!IN>eD;rday^~YZe zjc6R(M){5ayY~aHQ=Px~J>H%>4`+6Ng$td>aQ=EL&R)NSlQ%kXrt>B}EKDoYiL*D_ zaP=CMyR;wIHm<^6vmKk`HMq6rQ5vTMf~)-awVTXtf^(gnxO{FejpKK?wP-TFQAFbh zhY{d5T%-D_u0vN^ar*+bchgqjp$#~mVZet$z43Wc5>Ahw2)zAg;M8s!bN+#1JFtVP zRNlhXXP(1ni`V1go-@q;f@?Q#ptF^(b?g&tnN*HFJg!q|++L?~`|=H{{|~^nztUKL z27LD|ZZLffl{~VPhUjs*@SaPHsM6;_c(ocGq7_9Za(%DE)*4DM{*?Iro-xfw*u!v!_jGS z0na}TZ2txa&mP2PTHH<@J&o3r$FTGCw`e>30r0c6*zL7oOPm}x$4wAg=C`)IjE?QE zP`Nj8Vc~3S(tGf6lnpm$KLTw20jCe`#!j5VW1C+?-P3bX@ZbdGKRz7=k4#0?x``-W z*8=myU0}KQkz!1v#rlzaCw@MeHqp!T5VSS}x^?^sEN{r^CAWkY_6Nv+hkk`c0?H+T zyt`((1eQyHxoHL+oF-+{;WQ66)+A@JoczYgIYQXa!tpF72Fn=?XN_=j4R^qA2FDo? zzaLo6@f?PHe|vyGF<@b=`Bi(u?1mIf*B`cocLP}9U5|V zh@0R>_;l)HT{@gq*-$rTBe6LP@=>`^kD~Tec~NCiV5>oceVRnPKGKI;Zxkj`o8Eut zC&1NRST!RDo4?qI*Pp4!Co?nfS-KLN6XWrDate;GT8;;+i?C#BBMzS5j?o*(;+?&( z-4cQgxD9Y2KDO--U6j$$4Kv(5LTqDf`8Xt45M`&rr z*Qt>_K?l2jAa+=sI2x_R2RW&jn;MO}q9kM#C&H5_hl>vR3@9=`dO=YxY*}_hOtd4p zR)$IPq1f!O;b^QLTirRR%C#V&#(|WYY^dt<5n1O&T!UK}anhF?V5oONRqH~0wF{bY zxhQ*VD(dHzV|{}UKQqN(voQuIZ3#5)!|{bC8at{=@SrCZN|OR{g=t96@gP3Ugv2a8 z@@AHyoDO0w^=AB$X=GBg*lV@mj~RNn(}p5xiL!m(ZyP02$P ztsUV-R;ZU%BRMk$PpKoZTNRJpvIu-$XhT7TN@zOfE*JyzNY=z{z%XwTiY6DrSgfG& zOF?#eBwkY`W4ls?_tP}^O?o0$#Pr4EB?dIt=`h032d){}80w8j#^`d$Y$6G{s;~og82_j$MxG6@bJc!7#7qI zz8o*K7A>4<4iuIZprNT2Dz#j2o5v?aBO#GNc7>p584)@{XgdxK8zI1Qzrj7wH~lfU61UE8a2x&VhWcw~NPmF|D@?Y3-exDZm!f;sR)>T>MNg z!s+>lnB)+eFB z-v>GQwaas$TagRSf^Za~(uCiJj{BC5iKzGGZFpCWx%{})o3(7F&n|TNt%NyXQ87Q=k3+C4%#3K`52k_jOuyHQbH7@kl1tB8j(IzB~wIF_^0s3j_2&<68 zJ--O08%9zd2VxqGu+Y24IxQQ+d{I!;m|z>14u5w93{6g23b33( z&**VB$Y;{~cuo#7*ES%qP>G0AEi}#P;u&Ol?z5MLLDTSj4MOr%;>QvBNH>jhKX@nP zA}TE&0}TG+$Aw;Y>YFnJ31dA-nURY@^o~(dyOPBIAPX^NM)c77!%Xj&h%C7P%vs|- zwoEPB=9tD`kNKb+EJeM7j)9 zURZ+n&wPs^wkT+59pNA4_?_Xa$;Hr!5f~aeOh`y%5M<0v9vvd6SB4EA2(3;Dy-6($ zdxf4RzVuA*D3^2Jw{rK!D`xwTpLsg8CV z`X=P9YeX*1Np?BR@&A#0I7KowFp1E zlK*~THpE-<_&DK8*I-x5Tl&O!Q6I-k^=7SW5P7&v)#O$b6FvDZ5FA0>~fgvFMn#H2zM7Lzm#4^an(;v zLe0~YgR6v{V_6aLC4CWtf^_H%s6W6UE?eP*L~kB>&l6J!2KIIi@` zvHwH5=ixD_`^gM3M%+FzE_eD<^ZYb1#uZOfyC@&WOZQpa7fyS80&1R^gqG)KV)P5M z(emtc6hGL4l1D}hZScC6W})nbNof4dY&8912CbWUnE2C~sG)ar!|GVT<~EXTwYPIGyfqK3y}Fo(2BFhe7y~ zr^gBK+r73*XqF4@>qi>|XSXC0cR7p1T`mFR5{NB{6yF^f|1pvBv&&%#H0Q9SNq%o$ zDZd1SOJKM}$I=}jXIE&E-wFS3!1C@uIm=!8mH#i%u-pq$-zyTx{bOQTTMjFoxmg(8 zW|6|2#@FL|q%`(-zqVAK)1*43IykL6F#fNkJ6PUbvs_&BK47_XbuHq?rv48DpWVT7 z#u~Wpe+8D`3tCISHJ4%O4s3S^$yuYErF*?np6>NY*OAiitw+iyUGsjLz$eqNFh%XZqhVnHT#|c%au)V?2g}*deB}~Y?iiJgUG4ksg5?ZwGg!_BK2IDu zEWmQ+EN8G>;w)$B0?PkAST4zrrEyu-F8{BA&;QE56Th47=Yf-F@mo)c;3Dt1Z~|v= z5to^-`{Hrn@;0>oehrS$;pTdfKj16HdASqsDvZEOuTt4g+@dO&;GAh&&fYqXLpXqa ztXY0#GtSo6UIRxeo zZ#{Ps?KdvrTE`{eEK{Jg(e*Fm#*w{fy>UYPC~)#tJI-A1z^UsuarWA6Vc4_1;|k8) zY{TVF<|sb`Z21Cbip#NAZNVo-JMiV#g1Y6{wN4zpd;?dnU7`B700%$9CQ~xDDw1$w z@;G4c4%|L_46WB%(ZNP z<=SDOm493~jm`r{ar-(o|NIRcK2KvtZN`Dm@O48WK1{L!OP-}`p8(i!Cxh*mscbv{ zn9zo+G~SnR6PvDe;2;fo=S|AAr0~`U!5dGKcy< za44r5ClYNqXild-e}+p3zQuvl-{9oIuW_5&{h=!tTNFARFlcaoOd+sxGA_kL;6%I( z*B^b9`o9bNnWOyl0US7aOe}6Y4}F1aJKq7;&d0YAVc27I0Wba%m-fDm?PuP__a{F> zEA0n59@xsYC%^UGkJ%V0_& z3^Vd!qr(yl$64kuh+Yiy>>`oQ!rI~tgga)I(gD2)mZ=m^am))Y!15_wK)H1qm0_@a zd^R+!DNgQPuzaFV0O0EJ-Y&5GPB>*;T9*bne+o>8Q0C8M09{1~X-*eq$J61K^RnU0 zQ66Eaj$PF#I{c3Db{X@e>j-e1!S^v;`31N>CLP+AG*}y4$glOFCCiLwa=loPriW#u z1rgJoU?XVB6Ve1&oFhWC7ww=Ob}s4wB2$QD{)$TeAV5#f9RRV{?(2pNQ;HUMzoU1y0=D zg-I*Q@m8&u2A9DvrpjW?tftO{`WA64g)W~@gV-O zYBIjg_Tbwv8TQ*V=-K@i<7%@ImM=#<-LIgLnTROQLRM1?n&(W$uebdMF^)cHG6vwc zW;J%k8L(I5#m{|dC~+&1SY||YqZ?V1Yw_W>FX75dgCXCB#JW_tN;P=CP>r?LFn9}C zvpgM%4Vg%6%s?XZve&zyElWjag%?FR8Z>1lV{L6JYJ4&%s~w1F^g>mg3LS~6&Vkr! z9aIx-a2SSSXKE_;$x`rIu@CjWWLWF9)D8{8YE6h7=f$AWE<{hvM`}$03`HKqGLLGh z45JeUVw1~`BMAn4pPrA>0z0DXxGgm9O~nXl%tT}p-T(Rwp?Rzr>qB(23*l8RnpXvM zNSci1DMk2ofg5jY6Y-WN0^3W?_`Pl@{$`5AeuoopINUH9k`R&agfh>AM6VffIcDU} zs6_MpO3W-Y;=Pm<>`P9;E}BnI6dU00=?lfGOaXpo%%=_dOxpC#DTi)JDU|c`(Z`#J zp#?_B=9LLUs~b%**k(+`K5ZPnE_WffREfwsGaMs}5tnI)eq0rXrl%lpLJ{-@YUt_= z$aP2KbyYleq$u!Fx)HBrX|W*G4^L6Ov+A8lG>;I#7aJVR994uwYcg8qHDfWYC6ktp zMc>e#2$A_?SolCh#04Qv7J;zvK%v&zw6(o$1jxa|EEnEjZEB>B%^f3fMU6U#_%GoHV zn(n7_TpqM_ZlTG_yyd2rOnTOAf*;yBu^0)ZR`L%Kb_5tOAMTK$Xl@I_(o|G;UkuQP zQ9Vw0#up0UlIc_W>VvzqWMlimPszOF!zeHL zK{sK!1H?O*(?Nblx}aO(!@7qK4$Om#q|hhs-w~A0t8nydk{ivhh=IJ z@>Yz3pD_^rxk~i5M_{Or=1Z0w0Xa&973pA^TnP7!a)joo(Z?E&v{{uXSUM7Zs-eQB zL{D3=pm))Y%MeCFvliB2I8&!IrXhP)mC$a^Vh!_rE&MbiAg@mq*H+Uz!%s!`RWS%= zTGutTtUVr!{we+lFoj{q)x8Ly`xfU(gtf+rZ2ppg=ENg^cnmf3>I6@C8okpT6EiWu z8UTH>6TjQ`y5Q7y(!0eqhMxC^G=!$cW6kd#6Z!qM5r}pw$lnVi6k%BP!UjxOHdQC^HM>WvX|Hpmbyo}rDe zKZpKWf1xd`X>q|q@1K750F0pfG29mpKV4sXPtyHsu^^k?=R;FN&{I!yRX3Q{UyINv z56Oy$tXvDrSg+_4^OdL4yKk^Fqzf!J4i+>lJyQdPHgRyX9y`a@e;I9S>l?cd9rst}kc>ji_^Yc6cj;RIIPHK}UTxgWb zsSo}0WJsBmDU64TeFgKDkMM(y_7HX&7r*2_)LtJF%571eT=NoBe+B-Y7kLt zK*C4|Vp?nnuhAo_n(D673XXU-s>&{hBP-Oj&q=u(A5Z0F4QBDh0So(CnB)FmNo17< z@eL*bU|nz}gpqw1*d4b;bxHbJSxKZ5a>4jg7TzS(kDIF8df zAGe9y$=8*x#ln5=E>c^hzHxpQ9z%Hx^_kqz5(R>blEs*FSQ_)BCacJ!p!>$cVYUww zNB5HZ$^DYXOKJ;Wllyt^_1Q0t6{iOlCEaOvSKIl_z;!Sk68DY6UA7Fm0QEo$zs5Cr zq?6)kf6(F(9Fb`$63{IH z+7hTO#r>GD207^fumX|5E(0$&`RhRl?(MeY6&qNB%u$ zxdd8E0QbG1_5A>D2`Fa~eWNm5R!U=6x|VcZmiyHuUH9I0u`8%)=o#UDi*a97ExscA z)xo#%%CQgNT3C+s)lEoS*9g~o64oGR(3{Hg{oyjsb#(u`f#ltRau(a_D&aCvE`=E= z_de1rXwBF@($4dHu&?a^_8#9OjCLN_^MlYVXRy4>z~`YZ1D_|lfbxUKx`6Wk#K5PN z);(PcbK2n}UE1tNj!^pXqyGiV|0_Q#em5?j2F@PAbGaG7p*`q4e*zb8b)fUY72x~@ z;LHx(ctHophW;8-D260$lw8 zolOlmD|2FxX%z4sgVhJn-mxF&ub~UT{?%H1Wsbleg^TKDe(Kw}a+>P9bPdR47PoTeJU4D%WU|FwVB`h0629VxN#ZRu3SJz=Ve^I zatSvtGDQsKZzVZ*3D+)P!qM9uID}4|yLO!>{!LuHNL60EiO$RXu(aahwKKTV(TYn< zH^N-wKm93oT1_}0PsFvUlfZoI2QRka)a{#SJ+qhk^&u{BaU8NSm{TR!-T#_kGk zwO*yMq5d5E9ysz9K1dG40j(1Mux0~){*vN&{ApbH$AJ_?P`x%mxxOVjn zu2DZOoV|!ESFhvr?en;LnYGxz!so?yY*H(M7hhrZcI@G6U84JT^%m7h<9nGIWe$?} z6x|bG$GHw%Za+kA`5MR5wK$%v!1=o6!1r`BI&R@iM;lt(&f?O6{S-&-eflXJiwedS zyAD@=`V6id-GNQVzremjUjTo38}In4uxZpZ-1yatRQcP$UmwRF)o|=jiUuB`xXnj! zV%IM0Iks2)K(clBCY)~D1MK|*r>paDBt?b&8CAfyJ80qh2fjZ2H4Yv)iVI&I0KPed z8w=Lsus#)EC2D}rzCqiT%{YyAJpJ|SC|o@j#Sc$H<|E^2lQjjU5T&#M zTd}eQD~sLOIDF9I7UGcia`2VLWo0vIN<#yLwar4@;I108ai zceHyxPS;KFK|4MTnsHuXB#l4&UKHN_}9v?N95VC>f?<7`qa{$AokbFM*XXa$c+6&iA}EiS~5&P4o} z97K#H|0t@rJ`*Jt1-_Pp?lM!Fb6Y$;hD=?q#bF?=OP1R03m*|geDG4}Wx8m5eX&9N~g|Wy3 zdA=FyYLC$VPAIkr4(JIhC*tql{T0Jxy`aqv!??6C95U%}C^`o36xuL8KMCo4rMJJqMGSoS7U{? zp8AxpKux9$>uPOi@g=}qM~4j>%OpA^GZ@6cwYJ&?L$w7Z`XKByB;jCE9Ns7^Ky?-! zq^b-Eq=Q~~ts4n-J|t9lpsmY-uG}RwiNoliXsS?Qf_fO^Ag(BEi6GVYk<(4HO{F(q9X!Ny5jM(62ZK_Rkuj|X5tMG5RsoMohS$vr*r89v`)(_Km+QjR#35K; z>%y$MbR?$)A$@uo2K!`4AD4${XAB%QsYvuGU??!6a&i^YO1;q7)Cdgohk^PZ8xtW! zl`KPm|4;-4b{U-;;XfGhiP3_3MW&KLN$kZLWQ+x zgJ@j*s@d@LG{S3jdjLZ~9Kf~x=v&JdU2Ms;Xp_y{QMa>2qnHHjlHUJ@+3M5w9 z1$Qv>>dT5O=x+#zeRMwh>BArlbSnLkQsstoTs|_VS0jB2jqSuzcqf-5Yeo&SXV)Qf zW{u!LXP#@%ltNf(eb6?z1Yb6Pb>fVS1m}cYYO4?CQ9h)O&lPE| zF}dPL7DcHAY@AZvkcy|jc^T1FMr5v_dGbJ+Fiyxkz$vq{p_-Ki_1tWFCUXQ|bn@(U z#7#{_>=Y;Dv#9)hrf8w(;(=V4mKO_tapeLEvjMo(x2h>Dt{4gomhgr#iJ3Hs~4Q~5xH9U>HHB;q@j0HA^bFh zQSjh+LGfZ7MeU}0(nm1_dGyQ$x}t<};;2$Jf(qrrplMHMsG!T>dpL}L7#Ze=&kuZ# zS3mg!y=~j!7vcv?i4~3tCk%N8e1B>yKHvQ*$|jW|du%>3XrA~Dr7|bK#+LJ2FypZq z@Yjw&{@5HuS;FwjC%?z%`~HD_7xxRpwz0IfM5e@G(!5DHaCj$y62w~fN%Ev1Aln`cQ{Tv0l%;w=$kMMeWQlp=db)6 zn|6JT?@#YQfBA6nrGk~p^pEX}PxpL)e;oV-^PZcJLFN%CrgwadD*}K1`W5`?li%X) zEq_6eXg_$z_%OsCMDGX-ymN~XR+uFCdka_839WhG{1W&jQNBfG@G}pB^?@QpO>`h^ ztVL*+yC^=c)`Fol#_n+iqJ1py(pWO>kgUXv;A{mVO7-+!Fe8>EvPgwqx?!-5%@FsE zsXz>4yzrCxAt*NymMJ+%sJ9@rLi&UX>dWSE3VXvSM0SD~yQBl4FD;9O1r1Bot77YG*jT zr-s`jgv;?EX|W{n7-FIOMDH1<>0#hGERFJ6BgKy_{Da<5L#X)iY?v_&aXuviEm4^K z$Q-=3_3y%PaJVBL2|g7RnOY=T6&MscRDjwk7B$#l^3Z_6=uPv40q@AD5JW|XLY5qh zK|}i?me$-Jef<0v6iyY z+sHh%7)u^g9!vJK#M8ayFuNS)`@?iE>~eV?dtT%8Ewpx3S!iAMLRFiJ8G zy9#=4mGv%q*IN)xZDAw7$u$n4tnJ{LYS%l9{W){1kUOthq)Tb+x+fQi z_g~iR3h}i<$&x0Km+NFKC|=Sc(lTbzHD{EQRETn3+J||jmLPY2y~xil=gVK% zNPc>M&!+b}n&G)I2%~X>&?Y zzI-IcK0ForGAjz{-Lv|qYw`FiPoZ|{gDSmb=3ZEP)XmIkL7$rb&NmHEt42H9xHCMA4DDRfelJRhZ&_Yk6Gr|2dza^0X zZHbGV^GS3n9A*HV)9w`sEbk7IcduIti}DZG|4Wgy$%QsN_k*N6z%FUbOMo~F`-K)g zr7zYqLo0lfqn{wY%B%J=Ovh?WveH zim7$tN86yCktyDbyl-Oz$ZY(W>A%#|GN7N9DJX!H<7qvb;6}=1I#*H}8%WpA$`<9= zV6t<0h1mO<78JuUuaL@T3Y!tmMODIngmZN@jLXa5c#zum#7Nj^Y*|ui4zZTFLjrPF zRl&N7&iAXUV4-8HV8nL6T`1Rqx_jh<`N6q&0!dGF@3FodG`F^(l^DJC404cH#JmLpXMLAC4Z_i(`lOA0eE*cgV2D@1pH17_a-wTlcn4CI&3};(U3JR9fr%&R_l}qU8xPnWU z*zFF4OThRY`7c=h|99ed^WrI>^{_C6h@(H?M%xKoxp4#6+pYm^mjso`?LWVO1KMa@ zOi=-Aeh&QXFF0aRVvjBXC&nxWcC-T>*KqOrIUKxnN*L3*h;zV^FL9%(8s}st>@l|h z-<=nl&#j&Naq%jEGi|`D%kh~l5WA9{z}nZrl-j46+oY4F9T(`(bR2C$`}@NAE5M~& zK>J1D@JAIA)NuIYNrCnF5x26({Mj8QhSe5{>Ns~xW!|a zA_>^|TVNNpsjXdr_nqxbXG2*pgC4}|)aG{FxZH|!9j&-Rm0UkheYn~|BhiYEi`%K} zd-%kq#McQ?!1KSL@rTeHzkcNgZX9jL#ho|7x8T~XgE)TmdmN$hJkQ$vw~hdx{uBpO zf^boz1=iD;GX*=1!|6*G(SGs*+IAnptz-LvkN=31bQn4qHvrovjR*GZ#=-X8ICSQF z>hCsm{O-?G*S8eE6W0%ZjEiqPh;LE`W1l90`u7U3sTDVmp2op_J8a-j6FMsG*yw;UCjAo_Ya03`T6SS?D^S;Nrnu zG#}36u@8QZw563Od439fPmD$Wb5l_A_;_Kshrx2|>H<_PEXHcuNUkjRVdI=8CnXXAoW@kwp!;%WhiJ075y$U=I_EMUO={|LvK=9CFB&Mt*vRta=7iUc5`nN|QD zZPFPGXYD{UZJ158AvV&6n8h%W4Q;Y9&3x!-!>t?7+~Ld@o_jaU+TAAFtQsfM24Dhh zAjbQk8<#Fz4s$$faI>F9Xmj5aW@Bh6qtfmQhqYsUR0r4D^(i#FtaZqm*njBEHIHi{1 zt+FiCJ5ylJvkL>6uDT33%4|@jCqiAEf*y`x2+fT|dR_u1#P`SP6gk>bl=x|$85KEn zU^Pdg$|=VO@^I{nr*>H6Sf6EqCew_tVlU*`)Q^1Hz%gJ>2SwL-FPfG&I{LtZ9>d^XLe<+Jd&ZJVJhN{6D?JZhS*XGs zvp*eP)fhIG4!Tt~n5vvmlxvY#Ye0Ad9g=8+)?4h=vw&8dDv`ynDe0>N=%7!o=h10sf@fAk1($P72cBQPZr!xh2M z=9uyFXK!H4im3vG)R#Lk+z^IgmI#;{yy&5!GO~UGXc>_j3pSF-06F^yTO;72G3Fm^ zOd~UpRAGf*$}q&2(EKUTVu(9d%uxpIhPfEPvto!f1`(NR@nceeD-j`H1$w3gqOUGg zqzyDh3P62;F#Ks0nSum(7?P1F4C*m(Jj@-9 z!S-+rvV{qQq(e+$f@i(AJ`lswV&R-w3|XT?e8H2pqE;M|w6w7{(3;K%CR{vn1h`2v9OkD|2sYdukCK&R zg{FA={CW&_Ct^f;3Ia2=!X4^SV7OOB_eYP20t=0Y5Q^Y^LgKFZ-w z`Mr}XX)VoypE&~k(rK-loCiNk5J{l;A(tsTOpP9-jmk#v99&; zGOG~56Z1Mm1E_(k;=TqP4rIpf;EoW09VS?OvuK&X%AE_ z#$8ci6VH5)l;L7s^h_!eoaPzR%kK))h~>|#L-7MmC|%rwl10rZUQmacWuq|Z(OH=M z*ldhhKSlVbK0X)YADWJ_4^9>CoaYu};m=lJ=}T*|_LWDm=H*AQ;x`Xs{i_?X_~&cz z#G60Cvv0kKr~mphyztITc;t^yW6@7m;ei)c3YsNTMJiVP>LKjzJS_b6i$G8ruIJEV`` zI1h^s5gO&3vO0(u0095=Nklx}lh@^G@^vzRPOLIDg?g4}2 z%JQxssWp|f$0#;KUTlK8g7zNt?q-*Nyi=B01r?RHI#qnF!<0fS`~?P!q0xJHowbZ+ z5SPJP+PAgPTEIZ{s7zs3!ZtQXxQ_98u#U-wXG$@A^!(e$T;^R=v_bA-$Fi#C!g#oK95<{Xpt zKO}W*HeBO!gxvxb_Ooz2r#nVx!agcPh*YL~oNc5J)|PZ3Qh6zlB;CtN{_c6CFt1%q z6~|&}_KG^$ud8*69|76Vc{q))%ObUluPue8dZji>=}sC4rWxb+s;-9aE8Ty--+bTM z9s<*lS(@m6QaZ=89S{D3i^E)&$I#SF`|XA_F*kTl@LXZz+x){dyPVGRC8e77Yj@@l z$McWeMylIR_lk`jvjJf1$Xt4MOW~VZ3HQVz@uRhY+F)+Z7PNaR+NY&ZJ2W+EbR7?z zV+%!jPUrHbrYyQ{rUQOSc3K?{6 zagL&~r15f3FGgaG6;?XOFmSJ`av;DOg}?3mfX-rUB zqvKKb>|~)q%0L-|yS|NGTG`$WmB@Us3OSF~3Cb1L#%2JSHLh9Hn7NRd#>KU+3b~Ju z6vjm}A88cAoaXFGfcd`z%e#Z$l2*6`n0L=B<(K>tu>SABa&Gg#5(zZt{&g2AobtKSUx-JW+aUG_WB?4UbuCBogKl~A| zo_HTGeE$alx<0f04|rn7D|nn-mZvEG*{y%T3tL{r&&d7Nj@R+aZGRMgVQlvE7qRZ+ z=dt{~XRze$C$aeNPhic*Kf%VYev1|FJc~8&zksJUy^IYX{Q`6U^bj)EHNmvJ3>LO! zK;v!NK<%M15`LO@3QeUWT46NIzoeZLzX)LWYzFMYvp?)%0ZleCM=C*ZBB^VTs z8D+t54*m_V9DN7AJDTMj&p@+@`%Uwg%L+~PACbHK==Xr+49c@en%~_;(hldg+zWKy zD-xhCf#OnmcK;KwoPlyXYq_(Q|GIi;r}*&8y??>)4!_++C$^U6={;b1cfkB!aQuG4 zz&O*q@VN5V1q_z+7XeIJ=$lf6_ji6I){x!DcH+p{Nx|oK6Eg^b)YU6;~(K;~PyBcInfBM=0)0D;=MJLp14b;yT)Hoe|vI9V1I{ zLMg{iM+va~6wuLzqc_gs5^F!7JPy3P1fLrQV~^Ydto%~hKkSP*sYT|e5(!Tu3Zph{j4c| z^CHUyAq<{(Uh2S&_D+)P=)8Cx*DhVhl}opAmE0SbD9@EMXzy&p`D>SOiRoT0T@#cj z*M7PNy9_dHS0&;2(v`sZ^SI62?(MsPWn-~Z8Hr6P)Q>;BD}HEbzj9f8%7F_s#^3!7 z@1-ko#-zhxn+Mo`mf}09eHYM9Z9U&{o!WdGXF6|_zZ18pt+;rG9@^8meS=lRsh;+W zxOVd#)x8t=`mgxPpg^nB2mInsLSz0==T*>crE$1{+x&wA6}fzVE0x)ev-IF!zDD=- z@>jU|>LQ$0(*2Yvfxm1MTId(sTXFu%Xf7N>Xb!Lh4{XkL7ZW7SG*kME7oylmX` z2V6gO498mc;~Z<#x1FGSNPRnY7?<~bg3Et?3|lRs*k@9q^YK@KZ_eVv-eWj-`UK9L zpv7?4Htad{J+AEg66YS7i@$0UuqCS;`0#5S*!lr>9NmNq`wrmxSKk3!Kf~U6WAK_H z76+$Iz^z?dug6k+9} zCakK+z~gh9k+-ZAs^z)DxRG~ZnK)>=me9*@0c{5E5y$*W*ymNiMw>p%>{21-StT&d zEQVovA@l+$&xf9bX;#=!8;h9^+onl*LW~o0g>ZcLaQAfPt+mj`)I5RW$LGK}E*pli zS$BoQy3us_B3JU?8)nY&dqu~ZM07AR(4j~Yj?>T~PECh9Ntm)Fal99-jqa<>Kuwkn z4;OhcEz>AA^s(bJp>4Fm*pLckb0HF2iUe4zXm$!30o6#>RPO@I_vxc>UKWf`^E{aD z(Zg598cZJOD4)8H4mS1Kv}wZuDnJA{dhSpi&oYjoqef=3S^77!zNk{JZVq|5@@zXp5=9@y0Qfoi}jfJ8z z6}C$1bD0r}8VjPR?<(p`TD}@}=}Fj7W=D%N4(4J5;_4hotTjWy6fAToN}%yduCpWC zJOba@BCuZ>h`$tiF)~dJTbT-qMl~JcOmNU4-&mxAxkv*`xm9Sx$!J_%)h0|f1>s${ z97j`R_&(i=(k!`XhovkPsl}%D61 zl__vQqrI@kHJCLm z7Y}*qo|?mPEF~7ZtxBx0$714G4|1k@k+rf2+SxRw4|w68mV=Dh<>=#$fPa-1y7|?J zv`1iNmJIK^qp;5qhE4ez)KnxRt|1AQnO0;k&VpyG8=;m!lrrT}nFdKT9{J8Nysqqr zy(uH`mB)nNdCeG2YuBO*Bc@iQAu%N!-r05NpPvHv%rZpfDd-^TL1K{(g)^(+ZpwzO z)D5{K1xb1ZhKCG?e@Fll65}!4e;6X8BM=!EfkDFuA|yHl14j%*KzM-AEKgL*5ELFL zz;UfU1xAw=39=YO#e^d;cm$&2BQY#^m;m7eW2kJ<5Dbp??=tWi)*rni2P4^|#en!> zf`;XfU;Y*AfAcs7Bn^jOL@&r$%h(<*s2!s6)Cl$^p{FhY%1S%@;`<67bN2Vv1|TR+ zCVmiNsvp)mWKf+o$)ji-BMX^|W4O>*49!xA9~|_xUidrW5#mWk-mE(GQUwSNP!9Xa z>H0}S;U}YZCJsRl#R&9N`gg?(YL?ytxM#qgL3uwF3+3l&Jyj!&5GM)V~6 zU67r%)(y*xkTlPSgqa?Z&$+5x&C#7{PoK>vFq#)=n>KrrUDBLc_vtL&DeZ!llbBS21AMgDH z`>*VUm-;F9Bp|aP4TGZk;H5WzijTf~hvYr<3+yEf=rX{~1{pVf`5|poF2g@|7{XG* zAk)X9*8o3!`SttweDjA0(1szD=4SbnY6Qsqv2)*MY}xrGe*N}u;Wx++LlT1on4g{J z#m?PZaO&zw1f+z(UhRRiIt}(rJwEy7Z#Z^wFRUd-C<{{rSUxJ>6z*y zelTV2*gl2;46uZVFauZoqtsAmqyX^whbq=KkH}FVEGt=r{Sx~Ljq*@$90F1!#g_*x z92ew{7Fy)&N^$jO`e=rthjOscKKHjr3N3RMo^Sl@_f$~-`8lUGV&X$H z@czNiXsz=@e|p{rsr?aQjYXI$3d17(F)VC264WxmR~|%bY9Ot>{Rh$7(!&oCk--8C zALc(uXqF3Jb5#Nol<@*sXHcEB&sjplM!;&*AvPftLj(IGE`|COKLR^jf56N~=AoZr zC`Qn`HNX>%ex?9~`Vs{dOMp8TY#=r$JpulnSPV;z!f+S$+m|4I+#5n;Gu#tH&ndkN zXslS+&p!l;__SCdoR{NR*w1l;Y0TKq`Pd&o#;d07q3zEude?g+Ay%B4TvvL84P=l&Z!~aW)~mXVuiFQeM8U6E@n9vvxSI=bS%Wqck|rxufxh_He8^^{+7QyRH$k8o8DZmQQUTs6J(xjwd?pr-vayKEHNNM`}l zSQa{OjLCqkN{?h(Q}oRa*v9Y=4*cT;jdOz?2J*9kWj5B!$~A_u8A7ApL1&CjZQC$* z#UvQAO;FH&axZi<(tq>HR+tMe9c)cSDN+;HqAnDYV5c%L|eFWDD}290||* za^yY9G%8Gg(nYDlTH_K>&cd4I43_6?Y!M(i3j^m8c+Pf3{vB8@#Yy1zy@0vovUD#i zmAPNNEK>ZvAo#r^0P#D(xfItONM}Htsa7Pq6&5Mn9YpV*=U(mZeCryynX$9yxaLbKJ46v zk2|;H^K0Ai#icFy`tlZRy81mfUE7Y$*LPy`%^$G&)@~tRT-}cSID?}&k00p&9-PDh zoW{48f52f}K;@HD;9gfJG{zkdH^4$;YN2s*(tI+nqci@4G+vbMUPJv|QzJCZZ5!%D z9tO+x>*=gdW6D4|Yl#c$5)w9cDS_oLA9))YOWBBTodC-ja5ikH7GODRr8Aw$kI9c| zmrK$eB$woW3zl=4?&0on{|+p-QX6^Pc%0H`jM!-Ri@V>z?~lAA>}veK1(vghIRoZt z{2V_uhUQkiP?pM|we5o+KK>`L{LubgIJk%I@BTgi7A$AJ@q6XR40+y97-VPd@?*!2 z+%@p|U$FeYazF7yD;xMchUatBfx~-n?ffa6zuifbbEt@uj9e&KMlP#@~baS#EZ;16NM~*AL;*pkGdAm$IG(Hr zo_Y~DM%Oq&@yEAPzo<Ko2}fD=!R#px6!PRVG@|3P`% zZsN?f!}JO|ijKC^;xm{Xo%_*#?jsx-XTV{TKfbe3f8Y8ZH}@XH@z&$mcI2juF7{lPV2bon_sLf2pqxtEWk#2;E z>WHC@bqXCkjMa1ys4qrR14+FX$#i&7)VZK+q)quqC-N)-0xWNn1>@suuU+RRs{!dOFXCgD%SO?1$3l%=9c9fMA6|V zu*Qhs8WUpaprM+Wf&NwT@D#-2*AXMICpH1!W~JlFOgoy3J*ZC(!x>Eq4kv`*=Ph>F zi{lVo6(prC7nRyYw%ZD5Y~tR*ej_}vE>l-I=vsZ#gFn()5ZsZGWnxf~z( zoESYO6M=MSvrnwWpSNy8R$d`8Gkqu=Q-+2rH-4FC#UgVg^tBdhHyxtN)8M2zrz^1u zO`_;37gFldkd~uEy+?tEi&HVm77ufw8L`z4$mn3kKzBs73lVi5!9D3S55-nnC{891 z$5$Cntg)&vk`9$+c?qbZ!+mq667}9#)Y3uMn{R|FpAGFAY$*%+1G`ia2ca z24h=FBu;1*crR6pm#REi)Rci>kaBotetu+SEcFJwJ%QZWEK z)AV@NtH)$je=KdVVsfn)3EBvx&Zdm^$1XgV^~ZO z5_NL;_4I?rq(g!t5#h0sNY>C{J|P03@!?3MdBU3FEHScZ#3#ogE+JX~=4{|ICN@GC z_>7H@5;QGL!4ei5CV=vuL;9dk$RLF45)fue5Srz>92)}F;piFBAHVtNk67{Z4d@Zw zA1azF!}OsDaVH=$LxJ#YrO+Z|u$)0?o@Z=Ck-33ci!IojC^WuVgOGu8{?t1nHwAvN zy~M$qKi?O;(i001Ky@-tdEwkf3^7L`%&S1|%vxkmuNKC6^JmwKaL$Yx;c~cOPQ#t} zYGh0)L;BQG_$HSKH-oj}rj-efY}RPao?d~>85JVT>1@Q4-JBVfR8K7mX3*xo$%nEB znxU$33SgmR?U*iZ)k*Xm&CWx@q%_E9X27th2-*etP|asRybx?ylR;_*uO+aYL2?GV z8SrMU@a`Zwr*VEsle{}v&S7>L1ZTPy&MTYY5#V_IG?$=Z2_I(`c^GK7t|}AMF3EF! zLbxvbic+C%99B;EXL=6&)cujWpa%8pCt}VoS7WdvispPB66v`go}P%F)(8YjHh1Mi07Yv7^hC{gI`}i42~Hr zD2X!iQt|vx9>ty`+XNtPtMMYr5{FPl2!8eQPw?)?f5GhabKw`%6T{?PVENby&G^|b zp2nsd*II>{T7?|e1Zp`UxvQX zy^%3C3;j(2&^0?@o05a!8PU*>PDA?4LWE|@kTI)BP^FZvYJ#6}m@se|KiP%2=^p6k zk=_^lV-bJlp&#QzNTEvbSSQz8kyK|v zP_~So=U%Xl&qQ!$0($6%qF`yg&>rU>Rav{7e>_eeP1kI;A%Xn-!*%+cQZV;Um5~fhr3JE_6eMP<1r1AtJX(O|kx5a4hJ|^{6ZuEQkl_dk^@oPm&hV&U z!CP*y>Y!y~pGFm}x3S18%z}pY!JJP``_4F8mt~1j!k&auCxbpU1raIX*mwB=7Cpa0 z@GJ8Vq^Xm0#kkleQGdo~&^{~^)`|37Pso8`96dv$(}ioD#7YjCB$RJ*Hmtnon?`%N zX|#u<=g39-L+@N#*XC9reO?*TW|zS;yBMBXrGmDC!~DFZPA?Mi&S`}rK4X3rTr{uP zkZAUzYGf{~6mHf7RmfOC>m|8)OY1~>;fhA_bpZ?eSxQ#7plt0Zl&%>m{G3+2s`+l1 z^Kf~ti|gk4xPIwc9PgW7F8rAbX|1Mk#)7iD;ja9ZB99cG^+1IvpSz@5)Xm)19L`x> zMMCd~Zt>ji{AIMhFK-~}>IaAKbvZw$clC|q>hG2>TG=4#mDgbe8V*-kV>@9RU2tL;}WtOe7He$3z0lyUYIuESGr5 ze^j~wWEJ9$~QCbVrPohs80C&eXIn^Seq}OJ~s*ub_*o zTQwF(a2_LHoG1A287yZFX$H%ghK0d$rdzomSk9W|tbNYfHNXLSt}<6HtPfBERU!WebNI+~~J8~z7a?p#l8W#PL1 zg$RCgx-aZ!z}(9}c0E0o=23$H%d=;c;iKK3;zZ{OLBn$F_?f#E6%NgjF zq&rxCKVbZR!qhFCUo!CdU$FeY@?+vBjBFk|g`Z|+3b4H6!YQ<(6X&m7!i~#kfD7NF zOg4^cgr1*OT+GZ%pyw}2BnaC)i( zTOC92l`oCToy4_kz`h&6#g6O1={>+pbFoD~5SOh^VAYeruH96Q;*Wj@oZ13hrf}$P)rrHmZ{p~!n>cl&L$vkgr8D9l+`80` z+tk*pXWDRG5RvZ(-ufLjX_Ih1n(m1s6<0GH_`#Wi1H~R(TQnDV^&M*4A)u4me47@S z){D4t8`PF9_v-xwqDjY5Xg8(*dC-$L7w zHXPndTdVE+1Rc)7vxl*pHdQ$G0r1CF_|h4JqjU&A;!p!iW&_J+<4Bqc=bRz$ zGWBW5s>nv2&xJ>GGcY5~0%J`UVn$LMY8)`pAzxWrilo{y$f-_6EmN7$Ca9h@$DJrN z2Vk!u3TKi+@m6sR+v=V0mb)-U8-?Af0Gv_` z!{5p+sLxVBLx<~_CZ8y;EB7F-+y-rZIviQ4aO69Mfuq6(Bc7H8Ve^?B7)}lsp zx&c!SGMrJXa4;bRk5_BqE>3{9C>5&8TqM@|kU;gsR;MGXf;MJT%Fz7GGK~D$lkihT zV~9B%ri6ZYoDSK0QdIahI2>;|Oo)l}6B=6ebEn|5?c1Tt@FB_TKw_Q^nHf6#BG-n+ z`e^7YEC_5&gQCy_d$A9?d>d5dPDGUO^}XkbWm>r~+tO%nd9Q{hcb0$xfpq9xY}bAbc0 zG8@&Y#u(L5YPSqWQsS^J!-9hJ7|1G8U?|qZLZT~IKwhcrGA>qThNi>@O@#}=Wfpj8 z9&9Xj;VrtxS*;GcJa!alhasgR9#s#QVafy>UQG_fF})I-Txx7^Cm|&x7Q>2DAS zcvchg=g=X4VLlwwRj3&qgXgj%@r6ARd$n2|)|jxDAZ?J+nT7XlKo9i!;Q~p|%-Ipdie8V zeYG3961o?fXoS=FKJ=5v5hjbq;Gp4%OpHZbN)i%iY+}_i^bZ=0z9R;}KQa)50|p}? z)c-D6KHPr@MvyRN3j^m#@&xEDI`kjbUr3L^z2P^g7yL%_!615nMpzPIDRLu38v|3J zLui-3z5Qb}EF25J$i7I(R3pe5jbK;2_*8sYYK)*_VGi0}8h?bOCn3I2kAdbe1bPxg zUzo2vBqLeym-@*EiS>rT@g9aiLBpb_0|$fc{ONXhx*Tlu(@M{4U}`-2>w?ic#b3m+ zfluKk4eoO9iR-Bx-W5)ybQv4&BoRhD@8pl`FY@(L3>S6wW&@!d&-vo}34@?q^RP%@xkT5(Kstvd;dH4SgXB^f2FF>$T+%paS3WNTNi=`ei*f}h&onIQ zt7<#E78Z!z^g}a95Y97^_mIjXNy4219b48Ux&%RSPgY^7J@Rh7+_C8V1@=E z*?J6dC1Y@E5<+tfLV6ja5Rq>dak2_G0%-n@@Tw45U_n4y3eAOZx(5M}H)UZ&t`1?v zW*Elgqjox$twT|LHE9U@%65cQ9rd( z@S)oq-0*isA-YgS@9u02aE1!-*E2Z}%<1i$Qb5n!a4`2VQxCEBq-?SWvRUbZV>NeO z6OFwZf!=sHN9J@H!S(mUt6%fu7GS3&DO8+Z&URCLj-ROk>#>$0DI zC}PXBLfgELH4t?VPlR8LpD-H9wo2FtBpU-~8lCt$Gpw{9NoulVNM|G0_}NCF50}e~#lZ9k^r3xQpVS}>aD}0tJrE<( zqJ;s~u}{pz+b2Jz=e{TU8irwj!5`tNafmX+Av7^U82F4xj1-hAOtZo?EPeX-!0-`+ z1aG-qC4LkPqS9gwXkOSa9Wc?LWd(f${(Sz0SKcx6|4vr z6o2C%oFTqk@ly>#PYbPY#$o914o4qXurPqi?H`yPMem|el5h<0MWB}}1pPB3F*Hwx zq51I`lpROUPBaGQ#9>fwtVrkn_oMOXN8{6n#;LcP)=yf$IG&BE_Dl^F@m!x&FB@9z zPvh!ekbt2%F&LZ`MRCy>MAzz{9wvnS{9a_rpWf~u;pg~)84*-RI9)FkJ)Hj3hCq?t zGc^Eyju9e`!<^1_NOkjdSfuN4J)DQ7tIynzu4{7}yRJd^kD}Y+=MKwdqqFSqD#zjBd2ymVr~4PkFoMQCfaYRQaguO{(YTMu zPe5=`M8&$A^|FgfYvgYK?ID$IOsY1(la0x<+@$kfuc_Oz^WM8O&rO zn*5_J8{cGut89#vjk|UkAGHc2p+Ti8gjA*=vc`a@dIO?q|HdvG&<(9p3;O~wjV6Ru zYDGT&flD^ZE{wM(+%Y~Hd&fvAe?iFxOXDey!@(6Q1XEkXsNE4YUFAbb!pR?5OY1zv zhfp5A4yUur`2(rH9M9=oPXy%+CqIX|9AAeGqH_H3(j*KkO+Zjt5+bWrh^|y2oW>?h zjF}py**SlCIkoF^avnw&> zCkxTr<`2Wg+E64lFk=%7=S-84A`mihcYcv|{1QtB^gfO#HZ&vy#SmRUN#mX*|ev zub}#tR>8BVQgC9sS5(5avRoK%XG5nQ=6K zx@cIkrk4t^T;eR3!15#e_u%NkegCm$`MsLt|0y-gf5Gzq%6}?;IB`K3nf!TXHgISk zuC$-R88&=*wH=*TPXgC=qV=UEIO$Bpew6}k&%GhIuyNrKaP(80npBFNHZ?wx8-U+^ z0GzxD+yZW%Y^8cP><_>zOYyyNFk0nGbY@rM z)S{)>xoQy(E}V>Gi>Kqz+9mjI*-Cu7`Z>DZMc_KqyL<_(tHD;y5PY4O0(|&AXr|*j zQ_5WJq_)unK1-AR+I5`kydt#3FLqoIa_&0Qp0o>)oT*ZnnuP)MbJs7St&@#^w$s2| z!ik%mI7#ii#q1{+u3|4v;{5F$z`hT0q$(FDls2^L+`uy%@Ku@xU&NY#`A<{-Zvf{n z9ff4cXXz#IEPr(qnRdwYZyuk)=(aiQ%z&Ye1j)BC@`rN2FoEw(sp z(`#_%sn^iC{R&!-oTEkW5KitqfXk=OV9yC!O)PA4a)i~_>am(1oc0nB?I!NB4`@(p{jGhTxW;7%#KmoaO}|r(X%uJe=awp zmMKH3?6iqbgSONQZIK&sn_||Q~&r`K%@o2EX zuEZIo0>@<$c&1W~GCJJ&ioGyb=0V0k476lHU7H6*Sq7ZrtI+iLO6;RYVpB&O+W1GP zD+h3C@f>=N3^=By_3YUvDD^Nu`PhB#2)@{{1L`d1EYCtxLng8--FUGe6-x{;FjQI* z)Z~S-C{2Ln`T{4^L9O@Beq6C2QEFrE6qqKwn1I(MPQy1MP*j}g2s50G7-le z2E5}@BURH6irPfvJXnnJ3o`H%dnC4560p-4i#I&U$aI7wI6V$gg=XY08jFHCbg)=d zio|7RxRz)!y+MW-vy$*mVjOlx%W*7Th3&dzyjl>6XC`VeXPgHulXDSf9s)(a66G_R z;It{QCMN}dx5eOWOeheOgu{^=Kg(!cJ6RhIKuRCh_fpYV@pJ^HWGi? z{4SQfuoeT8M+h30@YDo^dy~*#7lgq~d0>mc5NEWYUg@bGA^6IfH?^N3SZJ6tm#(1T zFb0bs@M4Sf;)gn+RZeq@HO%>weZQ!ls9HJ(L(CBvW{rZOE{*256{>RP?X^NyV7My@ z`TBp7_&gnw3XG5!nV~G9GNts~lbc*)LE1dmOUe+9!@^L(a;2bZ}v`Be5owd~2FKMAOfX>?HiL<=|Ea$rP z3v-c0hl>$KGC}nfU8$jQcA;QVz4&2+LDI5SX-f1qMGF9& z!SbPQIfi)@0w8Cwd=Txu7$EOwjT31cW(pPt*JEjY>0^pTXs!u;>;)KC2kPH3nE|d?OoaeVULh)}ho1g<`Gui|U6@_I{3!e)trt zXbv)`{^XU@5UG#GGrxNp&;8~poNhlNfNxKkM*!&w)TUP27`EaplBgXFmOBfr7#P_X zS7{gY_7{J{)J2ofKd>*N6j9-Z=P$^hVFHexmHIJ>TM;_g=%{w*4ZXrNRM)Pl;vg zXXE&podPWP(E1vl8Ub}d3bijBCok>AmpeZcJnW%{FzCx|2x2-8pG?pz^fw1XQ|mwBn<_xE%$2n;Os74^%p6!|)Bc3SI3rsa zSL+gbzfaA8Z5HiOC~TPGgJVuU?39ngRx0OSP%Mm_rOqo9`CRjhL^|g+&d8#@5$#>( z6~MEkLWp!7+pIjW!E*21V#JiIF@w$!Uv_LmL|zgcY;&b06?$5`B6Kkr95xIgaiIu| z4iXeAYJ&=HuLEV3Maa%c$IxK|1l0;_mWPYAHWZNw5zv`60z`MFT97P{huvXACA0k+r&BXebtJ7>OKOD+(WOM&5&Ulva=Y4fW)2p!8}=s}tdhC&!`e@lhywY!pg2 zjzswrV@0_5(UB;4r~yTfv`|_L#f=dzhl?L=M&(oEQTO~L%F{&GXcYOSd|aOEVJUum zG>SKlrTz05A?z=Cd>l%j7%!yk$q7QFFsHF_K9>8%OLY}KI{L0ib$1tz;-QlrF_{IQOAO;Z{C75%~{~{HJtoYx&dTQT6N;)VwgItL=B{ zKm6Wc!cWR&`kRrx*yyY3Ui*khp2wK7Js=~{?tU0Ng{vYqhpZ!FtwNK zczPmADXnnh7!**MqQ|LkT<2q>kxBPFbA1EcG$+zlRf~AeU&v$d#5k1G*`@U9aVUC% z?!%Kb9^@~7mfG|b^_A`uhbx|=>)wfDVZRiv{t5N-r&EQnzmo1b=VxI**U5Dk(A?=R zc{E4(yj1usweuMow`azq`uWMIdv-Fao}|9gec}Fco6DY^gqoksK=aS$pq9>CMa%1P zg4X){8Kr1iJPLL5n(_IuukrDbFHpC5B!Q;V7UZ_Gw|(suu2GPj&mBvb9t8TbSx|!W|8XZ zp2i}@-wz<~F5R`ur8p_fX$*u*z_`RyelJko9W0lqP$axUk_l|vP7LL#kVCv82i?5X&({hltylYK#)B5LJN#&PQxuunGEGif4r+H}! zj4NnOrTvwajcwimt62+~CGBB453H+&W^OL*OUnf4?x8w)Z@7y!%U@c6j0YQGU0yCg zT&5L~z;dQxVX&M*^6p?c$Lp#6ESfcC0wiZcpWQjjS%aJneE#+P=Xmw_d*VIF+VdU; z->J`fnn(W$SkAoU-MPwHy3?@S3uLoM8sY-DzfXF1kw9??Wan^qpq!<9ekoo8%bBy> z^;q*=uv|UKD=1k0bm}8P!@}zq{}^#EST4qu$Aatn7sB`OUa*`s%NZ;;&dW#ob(obtsOhwK((io1ircSI!*)ZtMg0zKge9NjN4?!XZ;SaFD@b z0H@Ca$G*ggnHqfS>W|OUi-GMOY_|zVJFlYkCSCVDgXK%G#W);iqT+EZOpWi1ZhU1) z#m+<(4$8FH5pTt}ihO*XItAEq1!!lE@NaNso)4Q6d*E}Gu}ho#^f{n|NxE<2`k4;F zHQv^FOMu=dZe79o&UOm7<0#s3h#GO~#uWjMU%bZJ=50dzoPpS@S1#c)Jpcl@zDC`r zW?t^NjUR5G#swS$PJRizv=PU&CY*^(0@B>rnk>gAUnTI5z0|pO+`f4W7fkf2G&%`cee{8X&0q<=GsEy~Y-Rz=;xzsMW)4L3f-X=dih*ufJZ^g9^dU)AD zDg9l$a0{1l6BpVJ1K)p)BhRb_{``C3?<61n40!DkT%0`xo6K%}8LP)WgA?sFc@+Ok zR^Gzp3v^=+{RJo1)Zqt%4PWaEK{p$h+Aq^BJA$(}cj5GreYkM+49=WCi`$2&ua8t= zo2oC)s44Fs4$%GW#P);7(RTI(E}uPy6Gsl?^sxgtd+-Zfefy`_;Y`48iyr5m{3EVx zK8M3U&|-Az1kN8jg`<0SW9NabxY|bdef#S;vtl%M+O*gdACFJXdi*2HgZF(l{3A_` zUCwZ9G6vxM+;PC0f2DSx$H9Haaqhx?y!qAdQU2gqWIr((X|(ygSF@aHSgPru!L!LJlY^HFS~2tv%6+FYm+C*3M2crW^O6h76{cSqMF-i@RR8FF^5;-I3+17BO%ol)o7kUoPdKlO zQibVNn!3v9N9GG!7IrzD(r|}4XA1uA=w=rZ>zzoi$UwEvfem?SnBvt# zSCfXYmUQTwT+mggBEBLQu{DKI(6!YqUML&9NUFBO*l0(wVYmRxk0*!VwK5+nbL~iO z$iYx*Z!q;Sv?(144f&AQ=Rj6xqc&M!t}vrU7mU67P@GVXz#FADRAea-U2DgX#x%rL zcp)qIAgIQUNCxyP-B4CKpr4S2{M-cmK@o|4YB|2ivf}Bq6jV8rFg7_92jXIIBq9*M zC{Us*BNo1FYGbhv5#=_aajDC8L7(P=A}0+N2LB5SV5uxdMqMVx6j|_CayWKaO*pL9 z;j45vs?!r;sxiS<X+Q%!!m5FVeG(Xh>7x5lSCrO@cYkDt-uHLt<<+Dz3^eN@A5A&Vm$7QVzv?RvC^dV)32V zh^(x5gxBjS-6A+P6KXUx#%hFBnGsTMM+6%yt#(76os1T5B0e!Gu`f9m2MTR?+#Ly{ zeE?+5$?!c^ikhXF*jT5*o8}{^WB2|qyJ!bq}8I3*0SnPEs;=MEzeo^d3dO}~MdgD+su>u-P9G2uL z@P;!EM^!O6Wu(4aQm~%Ja6_E|%PZwrR1lA;c7JTB(qg#TqoZhhX|dJ4TK4A<-s7#)458K=;AhQiLRr6808)4rngQOUyL(HpIFV7*6xp zQ<8;uzW4ww6UU&}fIhjqMh7D#E=&M^{$c)tT7`k~;X%WMR(Vi}KY~ey zj~I+0!v+fQoVCt-^zR{zdCIutOtwG<3#v(RHEr4=1*2Wy+ef2?*6&v9f(@SWTTSsLHBcH5QuC8+l&fBxLRP^ld_^~Jp%}C1CBOyy8z*k+lQ>4rDjZhSrL>>b@8|GSih6;>ujm(6hHdPq= zi7V0IH@p9efWl#Lq|*AbG;v3?wbcM)JHYq20|OHUr%Zj5E;9 z0Jy|EE`j9|eG2DemxaM@)=cL#E+?f)U^s*1lEF{T%RoB2T(<<4GX)E`A#Q4_(6X{E zDn`;+htO6uP0m0cTZrJNWy&o-^)U1{hoXA@WWifLJUtmhT!})fyuU48XpS>*&Y(FP z?_@BX<5<(2waXLAUGUR{qOT=ZP_S^CzgLZcPB|j;*^q0f0M)~@4H#mLL!Xoo0njp7 z9+{njespcNmC-LF9#PG9SRN=B#;W;8Gq!6H>`j84?qz@3P#nE}0>Aj{OIWyZvC!O( zr!^(fmWWl4FUOwaJ8EVY4~!XlXk1EY-6~=1 z{qt>~pk{0Z&3$@ign`cyc=l&c;`KlL2JgQ6m#!a@=sH6~hoG^g8fVTP#SL5&8rhNd zWMnrLA&k~$+67_T&Tlbk!DKWa(jikvmhv#Jr&GOR6#tE=IGFJ)D*a8et_@i&a5d3xP zyBL-d4BzMi(MMB#8a=am_$da!GKJnLW86YBJg87EXj#~BH-CQ4hDuXs6rh(i0R5b_ zCe1E}pKdS`YRw{_b9NEpo9TIO&_h2X6G0UUs3v(}Ur>nQ#WLYf9_NH&f(y!tZsBrR zic6WChD7qKrh1^5OnIibp`V=z^>ixUf#56;iwqLl=4{~8nraqcc`&WTOwW>- z6pK-#8)DK zFwTLbi7v<{riy-Wf8!n%m| z669JQ=voKtON!uHUI7Em5A%Woq%JRoeR0X%c;~VbxL1~vTR>7o{^Gmg)aAwStSS-l zt`(eCD$+S@Uy?^sAY3!8Rh9>6pGoVHZE-G1zKEB~u`AUt)ywsGR+S-bb-AF&@T{wb zdu^2v_Oqm|uYs4rjSY3eW#Kp}uWL=E5RQ}L?@dcxT_J@1Qr-8s->jZ^I)}sxAwnIwidN@AsiBWjItTUTE*9`2(1D1Cl1@}C?n(!2UmBaBPtKRFg9&rJ|61J3zRjq3t^9~&t& zqVp)8!!F9t+}jT3I;Jttc%%yyPN({qW+d;akwVj&0o&}yo9+t7aT)`*9OiThw3WgP z_;S8`%SrWdS>_0r;#j0Gr?Gao^Pwu(AFL1{a^@rT$a}OAxips94^i1in^FFg$zm+s ztEy1)Mn11-2`tr@5N{{CH$OIg;Ak#YfI#+Fhi1cQ1hM<1mlk9T1xP$z$?k zU^$No_m%w;SkAyXr*pg{-GOipbG_ZiT#E0Wm(wKR`^SXa$;;S}zRMzy*d*+M@Q=S4Orf-* z0fq?~_~iNyjCygN(0+EVtfKkcEVQHpmSbp%(9k9F;XRo!P^XgIH(zn2$AHtrf0XUta z176;Qs|Rl5=Iu^gxV#r=-$CimU`OmQTu4#l%AAeB_Vb{Mfb*MiW||J$?L+Xjy9W6F zCe?QX$2;55dXw@nSpJK7*lG&Gr4&8R$sO36Q-VV^b+}Mai0k=fxSZ33vn8{zvt%VJ zdE(kJy5^bBaB+qk`?N#wgE<}e-6z2D^SF8GDsErAjjL_9aE)1Bu6A*NGavZHt5?93 zEDW3fW1HtXfQ!`3_RF_$md2#@_A!ds z2JHL*N3&dLPfo_gpm6MqljFj=r-2g}ak2d>mAwqyzJ#l-hj8xVS)k(>PLDF+kZ}Mu zo2|gRTR@fJ-1#oL7^Wv--f*F@PuXu>xGuo`GdJ7Ne&Z4@Q2GtJO&3~kP~1(N?Vya; zPXWiMEmZ&Y3&(J|?Q1Ik4RDeM>9bA1%sJSS5QFXh{eekiXzZxWRl3fpw{dcD4z?vn zV7Due@>9Jh+G)IwQ=KQ!dEhv%>^X~*$Ik%!HsQvKGHglghcnhn;P<<5=|DR+9Xmz~ z$$7LM*^Sm?N6^uB5?9Y`!R5a{gRiv#_+FKOD^L6h_~9~+?>U6s2Y$fOBL`?fI)GEH z`_ZxgbF@A_2Op;@u*u-S!RoQV#~%ROs1ILLAHMw@ZOg~wV^1PJQzzln*h#<_TXEw! zHI`=QYybE;idN9(?YT+Fd}{n%&hq;i_*_wzj>l#CoJe zc2_ve@iBD{gpag~Pf*=eX{gM!U|oS56VlaS1A##!=^BkT$SaHpFG-`rZzg079>`mq zNT9MYWpqeyw4>w>SbkTtJlhIYT^0gcvJf*a2eHi=)Sd#UnsdcxsPfTPs2i=Qu!d2& zXq-w8##=>BRA;K`;P1jf>Zh!R#;TIWs4)%E6((T}lRsHcu23LbKN$ZoCSji<9)I_$ zuq-_hrP&(P%0qBkr@@89IJ{MCLbW9XX$3Zz8*&9NcwCtY&f*OCiu0k)_aQ!u#?eOy z{yZl_QX`O^9*@N_L-1a59JVJV<8z-Ab=gUX%8Eo>i4GCo6cp8#BH5+Kpb|aIjSf6j zWX4=WD2+`=z97h2jmPUmYESz?S!h{3va#w4H+reQ0hXnJsx@rN0yqA!hG2! zM#%Hc0%X(`YEY@{Cp61D;|61o&4_1HWSHTMM4clLBh8_h>5*ZwJrp(02xL^-kx1ji z6ef;*1*R&8;Zs{8PRkRpEzN@5JUJqoEp)$Jf-6~8V?s=&QE(tf(3nS*JD_B((t>16 zwgls#O^Z_r5jb6)hR5i@Q%7rTS&j^g7F1&SXfOUs^X&~;e;kbKhf~IA{K2e3d2%G; z>E2~OI2C0}=$U+=0WnLnkhIc^%y}NvO-V-@wPS3P7i-7oV}mUo-|G@^Bqj`}bUJMI z+AuD<4+_(wQ82XxGFv2;n`_aw<|#F~f}Nc}C>7Btqfng_db{ zXtVs0G0BPyM?d_@(gT|<{qS0P0-h??q1xOZlbiHtrvA&Qz23P^=$j@-+UPNXp%?CqJ)9Z zpvWLZ#D)vra*3lnIwl;EQK5*84ijK`Y+{Ts2+CkP^OZBu?l-I#dWR1|ujnC2bg6|F zsv=#B;fi3q{>|Spe)SAN!{Qe|5RL{P1{*^$&=3MP+{s$X%y$b6e`R?9_*IEFSaiR8N=Wg z)vJqAg(+BA*e|G726PGgW7&XTfB3~Ql?qdau(Js*Dos+fH#BJ z3}&-Plqyn~!EhEybDYy8O>+*jRyYd-<{U3+nsXY{urN5zpgE^=KF8WhkE zPkWJssi}0pD}sEoM;Q6^GY^4tb^$bF(rMg!3!{z&OPU2(K7!UO_l$D%u|~pAF+zae zOvS=l;|z=kXX);0m@{zB;CK&x1eU$_Jj`Q@1&|(=OV4nz9RV3y3~(f)pCukqc@_k? zmGFxh1WRKMl8fxZNb7KCEd1m{=$$zV!?Kdl(-VcXl?_OqNaI8887lixm#N1uNXT89$7hxuVZVAmHFI-?v9u3n0X6GsYAd~h_)35r)~ z67j$Tv+%QDJ&&Ft{V`M#3R|HYJ?Q!1`0d*_VNeLoEvk!uOzKH)abX&M{nC@jDRqlF z;!_h4ltSx5ffdzt*_gg?BxIIIL_4D}SV7~Hp~UxlKBaBZZp0g7F@pNQMnMN@gAkXi zfriF{4bL_%8;66mNg7D=^&Bo?kSYMD$xX=9!aJ)Bi4*7@IVVdP_$+>84E%Gt3@SQW zve7GX2>c@Y;GG{n?lMNI4i@VSbI8Z$s>By9e#yO%P;Y^LVusKbXU%aosK<0H(PbL= zsrtb^t4PqA1m`6Q@Z2w{r=V;}8J#M$#>48gP)zb5VT>K2wHgFgDxsg1E&NI2Q;|$< zlux960Qor&3;VfD;&{6Ny%Q%okTBkcq)AT1)3X*k#w_BM(>zF-LGR-U^llq#fqaTf z5WaFLUnn7i9q>OVRxHt(DUYw7=p8f=VZT?U&#YKq{ zf%HyOXBg0HcwfZPdfVTB0IjXVP~TFE$Deux7imxa)1N&njC`sz$%4n6InATuBWT_A z7aHjPK||qinlXFMG<06Sj7yhW5fdLK_{t-a!!R&n0IjKN?7wv!;~$%Y_)t}KFMd4Ukus$!(CuYix~Ehx>oqELjr>&iu# z(>Xu8!oQ|O094L36>zLB7s7s)R9fR)>#Br%KjAbfUGg*kba&&7EK)khNqp2SoW^mf zYpHE_08G~Sb*1lENlRD)N4X4(6erciVF}=5zm(4H zkTjMBNA?qU0Ngv8&fF)?!|9yHKscvKedBilgQ6J}Cjq%xl#j!1E=O+OGh>lSbxQfz z_0Sk(KSkGhlCJYa1AH5)U60Y2JWS*G5Y_o;jfiJ|+9Ncs6z|$lAzaSO!hTNUJgE+%|9LFN%<$BrW{I+!^NPDs#sgF?|57&tC$>ARs9-?+X$UinTh`GSyQT*&g zq_3$(Knd-KX&=Ub=wUjG9l;q|59zE*GJeApM0*oZGP@FUUs#Bk>_m*&I0dCE>S_ON zMB*r$&~~r-`7|+Z3>NdaGT_?vqetysUUI%Rhk2|eO>%a5{CF(cb=h67=bdiUtT38F6ja3?Hy)n^q%Npbi?lRvtbC zM9I>fmgUEUwaU-7o)lW;r%#{6f5Gzq%8!X3PG10yoyE^HyTI}*7tYa(?}pGUzrkSn z#ZAC(m!pji@F(KrxcQUMKyOE!zjPJnZnxq>$8q4)cfhh*Y>ys*?*rAqpTDI%2Z6I+ z;@Y${9M*(lo4patd2sb)D~{bbi;HLj&g}qxwG7+L;W#L#at}WX?A=D?wo{#S-J{z2ckmRh-e&zHVE55hv~>cVH>t>p zR#3Nap{*S^Iw?a3{k2^Z1~xBVJ45}X^b2>u@+;SIk*d3Vsf)U#y}eUtn|E}a!_6yu zfg^Oiw_e27xIkP9jKpPI7O-}B2Knd>?AcBC@8~XINh1y_gYd1f5O`-Fb{;#4?{NkD zPwm0^ll#zi=pZg0+l#itALHuZpTzgZAna1cp!1<$16$7F*sfhTe&G=IQT`L>58&j9 z?{WK^zu^-)WbZYo(J^aH7mZHaDeT?#9gciW*E~pV*zzgPKd~GK%sT9pD{*<9T*hq;&rqu@SdK0;3Ccn%Bx!Ah-==sF9cY8jL@Qdoai!mFshI}%c^ML;nfEQ^%F z4JuV5m=59rwCVNBix7wFL|-zp+{sv&sYP>|OmGtpA8EnxoCt*ECSZ7x6@yEx7+Rzd zT5ExH*o`PpL3mCAiVgnQCJz*x<$uX{qrsy`jGNLbQW21of~b5wi@_&3J~X6qpX?Y|=R!)c6KNS1*bVVW^(dh%*F#pWfZi8|ai$UY zG${y&O)~tY!h~995Y%b0$f9|A#%9CSq$EKh(qs-nv?mrLN;QbD(n3{XfP#&AW||S1 zP2-+xgQhqY@^Ujq)FncjAC8C2(fHb!g6%pDes5JE%^84*(ij9)sSsPNh25ovEmeb< zd>u^L$#|~Fi0Qf!h$&9QfEF_XGLjLWp@O2!fS}w&3@%h5xIhVePBOfjp;%jPL9I0c zN!fCQm+O#NtbjaE0ac+1@*EwsIdW902Vj?WI9k;KcstLII#U#sS;2^{jzw~n9O^11 zQcB`sY}6v5&VbNbJ%VX&7;@q6Bn)Q;=FvRJ)*~uc16iIC zs$4IPg%_cDTBxhFD6UP$eEV=5GA5ucA`rV&QP^QuW2@PM%_&y8zYgq4wBUGx3RhAR zaZ?w9W6BZO>a}BhbO_|RDNxR>K<#4-pq*BZL9<+lS)GUMm9)8~jV&8?V`GQ*c?D>k zo{h)7a{N6$5Qk;4*r!j%&wVmvng*a^bsYk1!>}w*j`z~!IFKBNBgNUscg4as)q|QR zX!E?-iQ)&+5#t$(y4m^APaJ(w-iQRNRK5}dD%PbSdst02MJv+0Tvk|8V zMDC(d=#`#`j9Hb4%Swi`*+=6~_q56ldzlMLj|OqtcmaYB8!;FG{==bBDi9M9j^V?G zATlBZfkDF&6g)!kk%vSEBc3^Q6JwC5lnJmrEQ0P;TqMH6gG3%7Ow$q@CX9Uc8roNA zm-h(h2fyF}7^VzEj5QfS>L?77jSxl)U;W}uJo3sj=$|+YL$q{FOO!D1*+VfDQF&^F zWhv0x5G1HqdTVKpW+??=&cHc`vu0PJzd2L@;_fNM@KX)N(9{@sX8b?w{bhV(N47SO zsu|s8W)NADWq~c(vJ5iF%*;&9%x-3eBps%iWSIF(29nGq6Xs@Sb~C1*yH>e(A5Wj; z%)IaY|L*lfT&zKGvxP!kZbd?SwlEr+ z+*5$WjvU0dWQyzPYm*UMmjYu$nlL09-O=*2mZ&vuAUcm-%Zht}#DX+ju0XTX~QbOyCq>pQrIu0{D6^yV;w-VB`mjKOeCQo=Vwk5T4O;f_y;qVWkw%jWr5_nVhd zyto_9o901PkqWOgtpM0ZStA7ni(86@>Ii|mO$jfX3S$jH7#|-77fUE)F&?l_Ek#7N z6+>+Sh@Vji%j{xAcRHYKuu;G3peQiHRGt7Ytq%fpzR0L>KxK)*Fs~tSkD4I({(ayzI{g0C$(cbH#prqlQR;W`e zjAberaHe&MwWRXaHN!JUDfr0E^$rYEOu%@pH(vV7_k|H=2G9NN^uC-^2U)NTk;MiW zI?^EXl?kJf5?~%h`vT@CXId5ydJpp-NHv>!1aQtg>Wws~Wd1UQ(mRd+xL0*0K{qK4 zqn$yJrFaP~@|elgwock}&^t-qo*?pY*f^c$H02F#G{H!RRn{P%K<|=3dY43XTA`nw zj<~rwLUWwm&=!->G-r)+pXz9#dG24QgG*63+$$7_o{@pT_IUU<84%H%gy^Xbp^+EV zK+klY0h$iFE^{zf=!9muS5_Dlv>uz=lW9E*MSvj`u0b9MR)z=~7UnGP=xw8Sz7?a! z4udtpBq&x`gFG}MQ1F#UGH9*}qxCitA>jdntGuW<7vsi{gg#b*De(Twm(yQUR7HE-w`t z&n%CF<%5B67AbD9a9$}*s)zj?$Mp>^I~atQ0CfhulUCFHtzl5R?2&MoC3SrTg1d}R z(S9O*Q?-cW{Fz&7g+FB-U!VGu?uFg74V7?gWYC_kRU+zQzZ5SChZ#6!FkAxpxjloy zd=>_48BCY%f#W#L_o<`zgI~KzP)JAsIRoKIR38h+W$$bg8n_8`?+o&C+@tgzO-SHz zSVwK#NbTD~b(2V7cH){6n3v@VSMnSBvJt<6#+*(l;dC((Iix=o}pSS|tZ z5>U<{Ifpa0)jbl&HcHa$%i8!1mS?V~@P>i=ZNDG~HBK5X-*$pZUi zCvxYMp@{Z$Yk#^GM{o+iKlEo*F06-JoEI9Fx1efC1KbjPkvXdvwVS&H7k(_QKSevc zQ2Oj-p>@w+2vj{cS^SYywyOsvPj(4|kvuO;pXo*6t}f(KA2P7aeapf?GXus9JP!u2 zx%~pb-uT~tn(!Yb65uWUiNYYc1e6a3!6j|-Z>sZK<>4PB5-85?lYnvlvqWmM6lP(+ z6fXhL-zE}BE`ie$cr5|uDb!9$B!K*zG|LBv6KURCsb4Jo$JDw3jd7_y7QQaW^WKKt z$ANOr&weh$buo8&LSG4T*EHaBdOObg-ZEhv*gmU3(1T@fXr{5QgJpRY5}EgVZ3A+) zcOh|Eh1lPvtfV$9D@Vch4st7ywW&q?`OM|gmQx?}RUv0p6D-pTP`z$pZsRXR)>2vON8Oq-p;^wF;*tirq%qEMgTvn@62G`aog#tR5}^G! zaQ=9ll=s_&wcr^@m%wzEM`4<;+*hoP&tN$#rYPHO0w{m|=IxK+lW2YG$Klo4vKyn7XSwozGZx;5SJ$F*XGid%epw4~< z+F6+MT;eRhdbJ-6m|wZVbj*Xn(m_Bu%YVS~|JR8O7cK**&f>YO9N^F~+`e>~jsjl` z&hq;=7%YDuc&!gt=rD0UOaVOoHsv1xkk381fm5vV{NN1m_or|uSAn|-YAEkIG%&Yr{Z2N!Yc!KDFE{AC8qgRn;5))i|!@CSSTHqgD}_#Ir_eL>*%SH5@~*Q*^kr3}V9X*Ix?7xD42LwN7z zNgTRx5SLCL#MR?RaQoCgTs!d=?)=ww?4ga)5ltAd@jJk$R1g0vcz!qbod1%_e2L?< zFz(s842O+TIHr&TzxfAly}u9pj(v&U=a1p!ky|*o=PEAl-wk~BCaxA{;z(2^F11bs z-v0>quN}j8Kl+jQ=QsVCE@bZN6<~SZ##ZERX-52}O4?NB2+i`oxwTlBpCrKYs*R0E z+1VgCAe(nhN7M6j(EiF|@e(dr--6ODokB|JrO0mOj$YJ0H3jugPZLtNYpMuWKQRea zJ0}jvj>#z5-ix9wy(ry288uJO62kucja|sw(21ON?I_sPjl#`6BAmOP+WIg)b9JNO zv1GnV=C5QocU`04nJnBiz)Q(4^H56RBIbXjZ~=2Qk}xMG3mX^9UflraD%wbpu%F}0 zxA&lQYnS*$ylh)HDyiMIbT4&uPgT!NMc%WWsCj-8>iZfnXIdqm?#joO8Ko$qw&lG% z0~NHXtliRvl5KNPuw$;^Xe`;$M*Y~08tNnd%yL$h1^Z)za7h=0k9(`JZC)$Y*Fk+b z73FK&QMsxOb*m?$a!n7i=|#&MeBMyDG$i7K=un)Ch``$=h3GBhKP-w6HLp?_UaacK zM`uqV>Uy$}Oo#Bajs)};=B$S$CMOAvc>jV8!R2E0wf4- zPlCG5M)f41!Wn_JwF&6TRl!POWjEb#XCjO(7R1v!X{k$rjmkGzJn@ym6Gx&w@ZJ1G zsNK2Cn{h}UhNG(SII8!=mzEeTmj^?Y77pX0D&(!`g>FhQ#!g9s*WyeV*>KOC zQn;olk+QG_kxR>=pP!9}Ml&|sg7Kv)07rEp_)%sQa*e}LM29o)R1Yl5iol=kN}N$qF9sHZv%;RXPls5V zYiu)td9|cihYgEz*drxExXhEzbQC_x zkwPP#U0>?U!Qr5cXaqRux(*eBGoulnqZgXH9PgVFg-E)lu96P=#d={3P-dP0^Q24w z3_NLZ3`2nbD4PG{;Yxdn-@o-ke7xr^6w`ASLi;jhOpy3`;@KCs z;;nanhxYCo0c4LHE5j(7(@Cj%eEQkj`0O8l!6=Fk*M>lwsD_vCcs&2?7X0R?uOl{= z=J6;Q5{szq!4oiN!6dx){F8Y7g(u+RISL9|tG&Wq5T^3PkH5PMufMbv<6WqJPkLs| zK?scY#H+7t#_QkNh79VrVXiW`)4JsuJpuV8HvH(v&!W643m$=E;ji*WEaeF_hd}Mr zBP3Y?SmD={F6 z-lM{pZOBOc;DcXbtkw(q(nQDtseO7cWKAyv8=8!)GC@&qg)D;lpk}~;r@AEx$_84i zD~(8?F^Z~<7Y06^3#;Ig7EI$h3T3NW2g=l$kg}*0!L_kMb5qxwil7=jm`_~YnFMW5 z3SuWyo#bbUnV2Txn6Er>ZUKVoVi8cIMa<+>XeTB^(@S$gR<-~aqB;@<#S332wl@vIl{&<9*abj7<2!vAVi*TS zWh{I%!w_9!L`?dCX88!$k;2Glgfa}y{7eMWIyrL8P=wR^8X6WLILn!zoM~9t$fwq% z5uD|@1zAF~JTi*bK|c?2gWwEp(|4uY>cM& zIdhUnPfinBgb}pAVEPs9^bA3-qMzl2c2<_4VbRac5yId(e@VaqI{#4+J(c=x8m%SM z9f+Bcj#$SzY9CUZRQ*$Z98O(ZiPUxFk0gb` z@-?NfGk{K#w!Q*#{(5X)I?^{*A#p{a5C_wTEH8jId*I_yr zrepawVSa6HJKx_xTdRc@Ez`HK%lF6{&_z#oBkzg!M_@Yx>`cv4`<N|?n*=kx*DP(Rh{)5Rc10WhaQrQ#^*FKa=Ud=u^G6Zw<0n2f3!aV; zWX>3L%yYrB_z5#h#TTuK&Cn}zqD4r$0Zo&38L65^@VCLsxHT5&~ zX%6+VliD&^(>i_Y|2bIxZ4@hm!SccJ|C?~TB>5)5{BaUc zAL0NeK0g=veKi6wFI?LU`@&Lare+~$YbUZcwZTAV^SJrNaL^ewbA2P?78S#}xfS8` zE=lKbAFTna>X5+uzs2Q9UP@!SyaCB{zDS%|3S&Jq_=Ztp8c2F*`4 z^2szTN%U;#dChwWmNV};YeGu~KAF>;!EzI=0jwP^xq|*gtZ~)io$y~bKEP{-e=}gf zbSXWLR0jjj7P@!VEN5+W)*6?nRV3|kj(Z#!|0a1H+-8vg@yCJj{~NHJ+d8-m%cC&0 zlly_S@tL9~bybZ}3}nsn*N*(|pE%1?HVy#g5?IbaIcw>E6F@##SWBO^$r&hTfIOX^ zYZmTfw*A4H<$pW$t^mvTpV|Y~EN2>)b0?4eTVS~acuOJy;*w_hw}Is>QvSy|%WvMi zj;mMMy*UUhm4NYw@*lAL|8*jJaOFI3_S67ae()IXpTB}D_kqilc>l&p2+i`>`_QlU zz=hB#;HkI4)ZI5O-w|5Wr|#ZC|IIVN*B|5FOS5oV8HD}*{l~s_Qyk?h>^nyb)urQtR^{4>qquu&zW~ec{c#8O#d!;!VQiqW{Nw^|oji)KPJD>3E`34eKE~<& zZ{c@c<+y56nV?}|1D|cXdXcoP zRv1ny-`IhoO`XVF*N(C+J!pMy4mw|2fVwB9qGUsdkjkySsMc675xX2_VJq{(xY70jBTK>{k}ycr zDGc-s7%igqtf9>yiIZM_EbQlvY4VmTOkrm+W4=fdYIpkHWk?`s!+YM8B>ak_)_nS6Iw6)uGNXTGmDW)8y@D36Ni(f zg~(h~0mq_pI^g8di?bNK?hpTN^))kMM)kVrccbn%N22WqS=c4Ri!Y{Ml)x56DpUtpmKF1 z3aGE*+1S_eDzq*v!_2M}Y-&lyqET)59j7dH0LHGe{(nTH})WJ)l?Mpb)#s031&@8$F2l_d}Iv5IZZfD zXIim3H3ao3-snp8$J&Z`JlB|mm+JDct2_l;;{)*n`EYz@@yC~OYP^!DgC#vw{7I9y zxEa=&WeA^}g@9!_2wz_c?UFKhS{106)dBm`CPdA1!m!MNswM?~Z}P+5m;n4bSA|l; za1_(wDBS6Xg=s-})275pl>)~~3Xzv%gl=jM3RcoaZ(!RRr=5$NlMSfvWy<6RKw?tySWek%02Cumq$JiXlz5*8@Hat6v-W8Ej*A3@4c_|rN$I>cSjNvP8d2r@?@ zxhexP@1c0*jUQmq)2lElY66BUCLl6Xi{K2kFb)`25DU-LNQ9Cr0PEB!!CTH8%d*H( zNa-yUfcgYmh@f7PDaS%y77sP`!-#l4K}Te0%@A7Vc?)V0S!#q#>jL|veE4T6G2Rx4 z@zggmy(?sz@sR0Ugh9gLCQpnqdt)T6@xx-N-MR^oDMpcuhD_~3d0D7TG?n47YAmIZ zM2!^flF3P=d@81Op>V`d$iid-_><|!VtjfKp8ouY@TrIvpM5iLB?D7J%X?vt0L!Ch zq(VKHxxyVntB*l!iDrfU43tYiH-}l1oHfEZ%=y@5z+3W5z&HE3j=^9#gX^r3&S9>H z>t@iM`OrCz(>R}%+QC|;;;mMhTBB^rYB*7Ox(i({9`V@F&s^FI$ zgOEHkv{mUejw<-1=@6W4rt#E5S(*%aaT3(!sUm(tf?W8A>jUBIh=GS)EdX=oJNM4i z!7p78x5OxVCL+m=fQv00t`rQ%=b80kVtYJ{o^JTR}!eP^(sn&_YVk=xdWr$0N z5Texwz?o}7VM#J9iE5;#8(~Yd#WBe`8Js1BOzCL!=4n4e1{dP2p>3dZP3sf zVTx0sp{4-oi3X%58{jBPhAKgU(C7fD)Pd-#Ek%(d0VydaWEI#E8089gFBzK3GEqR! zkj*MbR-pxA8Yp zE`AENi{gyE=?Jee!oXkAb)~{SyO8RmXM)l=%zWa^B^=9N)%B(!l)qrB&?1@+%=|~M zrrjneRM_vH8!muvMN>Si)3Xs+u0armSraX&)&S39CA^E22&~W{vd#=eLp+pqafs`3 zV2Eh~7Jh#f_To5#a}-d~^AM4zMksUS+qG~Ba1#bT<$8snSz+yQPajvBCwc*ZGhnXP z$`MWbK!qj>DsnYOnvW(e@(P`3Yj1>)uR9dVa0CW<39#JL-vxe=-Uy2JhdNn9d+9Tn zylt-dio(#Ij+o9gXgX4$?z9Vos8Ov6h-{&`NMZeCnj_P)pq-p9!1UPZPGO9UML&bq zhH075%^3KDz&I-lakHF=pPda0?H8s(zU42Nc|s-`sB zUy_^BSM;d<^yL*o94jknZ%6rPKbX0i_FOAyzd(Byb~!wFzbFasCxxNRjV+JzaUE&Q z=}W?4mh_dhpQXIg{!@y7B((P(*xL^5eOY*4nX#I#zp@-@E6QlU(g^#KA`xG>mG;(@ z#{1=hElna1`*Sz)KDb%Lv7d$gtkl8f+0W@LMcZ10NMYVz3j>AJmW4Qz6lU;vf@<+WA9&+#Qsw4?GF z+UGs2>v7@u?5&O9uX7pbWnh|(e)744m34T0*??&d-LsSWAZ2weDt1jq`wMeWL1&*Y zaER8!i$eC%FMn*%G@*8FJ5*IB#CNA-$}5WyQmPf}(DFa-#LyHUVMw?6 z#aYyjX7LA;WR$d!`isHyrq}0+KVMYz{OKFeCKQ4p8@^1pnrSRimxdfO?!1uSw(fE(~!0{{k#eqi3Ao=fAx8H+=v2e+dd52Fv*m3<)e}pgd{A zL!g|>d=o%ESlEy!1Lo|qb~$U6=RDO#bFNVs%+8!rjCYRENZvRmXjqt9<;cN30xUm% z_`tuVS$^#JAsjt+5QmTK7s7r9!Wj_%Ca|2t>`GzQKtFl%_^=Q0p}iE#r6BAas3v(f^X3Ten8i{1l*!_9lLdxu0>^!{tbKTa&RFw z1t$zn9Pe8W+_-?t*G}L>{|VsEJ>WEh;MYMjA6M@6vR4o;|)qjr4eu7V$(y%*X6!t6qaewQJ)bICk|KwrZx^fct zuV1CUzDshS+J2i3Xcuwj!D-yPbc*Vx_EGc19{_Y)xJ7yBUIo<+-^68#Jb#niTO$3| zRf@myCtUyGJRAxS#^tzNT>IsR19|(8;?`>$aLyEtBay+t)34*+?&Csxow57Nm#*Q| z`P2CH#$H_A|3@6R=x`=ng%eA*0Y@&O|L`8_sw233;WW-3If~1NkKpDBiaYuj-1*&B z>@|Aem@))d`wH;kSzJ4M5T74?4|^_uiG$2*e(D4KX<`k|s6%m`HQWF4HqO(6$P_Kd zFP^}q6JO)Xi3d1*Y%eap^D|&UC-&);ct0Tnc<*yur}?`1y`LcQ>8UW%Ce`umROCF_ zi_#smaivX`eP;s_Ru>AeeCDJgtg6fs20mM!>_*y?O(@;gj{2RGQAtvK;C-VAg^x_8&nqd=dK&jGUo#j zAC~x_!-pRhj+6W>DSc%EjAcvR8FX;rf4^DS&)Vu-KWnSA-$@4)7S79gl9rax3$Gm6 zw27>mTZ#p`;w{37U=oxs4ohjT3wFxMK#EqTZzosbf8^GhtrhZ2GMYCFD>1Q9i#^s5?2~)p4-FNV(MpHLrL;MtJod#jpO*HbU{(|I zXVoHq36)zx2Uwa*&9u2$oEd>XB}d{s-OI`9EKHn~fs|!s$XQ&2f<<(&TvCF}z7nJ@ zphM}L5;W0)bZMIff6)5iY;+h78#Va3LyznXU-)K>gR0OSMN{I?x*!)F3yRP@BNt^E z!I&Em$w!@4%>W6x|r%GyP#!k!9)TmdImpk8hhj>Ou&f_9 zDN}$^UWsy)%xHl+&xVAy3KXZC@Y862?AJx$uW|8sIl+qAF#%X!o``8h$pW27;4<@Z!;m?%Qc$+AW_f&94u;41!pEr= zfH@nV3@XqG;BKVF7Xf)1Sh}+j*O>*|qStF|$mhr%o*r@f^;aRVrN0@0?YJyam4!$VQ`wkYX-Dq7CNDsmm$Dw2EsXw;~B_ijdBLQB~YBT$Jvz( ze{vZH$|aE~TR6{Puv`Mq8F1$~b~&G<$u8yNa&b!vh2b*RK4mHvGp%*JzUQxPNAlcq zc;-gKLj9(wwh0hBd1|Qu%ZJDMBOuctxW-Wk-`0 z$_fK=rW7E(ndYk5AIi8u1SuxK-CG8i@iL4XLoUt9@#AC&i=2Q_6zA$IgHPaa1P6^q zSl}qQ4VS^4@&)+F;BY7qA0LFEpy7z3{9`G8*iaclL&n41ZNSg<`uUE)2rB38C4*Mu ziy+_OaFJ0y?=gb9Wu&VN<~Sv^QNC~+Cc{|D>lHj6C1>ejrL`q3PL4pYp%_i~;}JFrzVh)<$vqGq z?uN*Kaq#yXhES^CmL7w^Xm2;G$-;O(y;hut6*qwK&GC6F$Q03{M9oUZSq4%uAchd3Qc`7WKqKqSg1o} zg;7wd7~9j}m#>0MH5~2F%n@LDG`%N+D`LT#=K3xNM%euz(~cGz=3|osgqAsf9l$g# z{sn5JPW9|>vpnca2RIF)5`RZoW zZ0JNi?Q2?hP9>Q_aV^MMSb-y9xkldMpxLO-xXg#y$ zCL);LJFfn2nBeCss8vj~o`yvR32;109*S6l24+hvw0e~Q%bBa(lxRe}%`E6zdM9=W zDi)1afv|9Y#L#{*B-{s{ffJyPmm^3Yg#EXUVCuGcf-63z!H(2fv{ub4hjmJ>_yfT- zF-y3KGYVjzOYd#!D=WS0Y_p4CUqEZx;wm_nR0=nh-fd}1s>Qn~gFjVYQueJP31NQ`%_ELym;WSZm*eyJ&u9|Xax7d+ z^-w&Qk^G#Ny}U-maXB`|Sh1y3xRqPG9$kyw(v58*4+~QaRMMW5-D29Ka((QUZEC0T zv=^rMGTOg#xSaO2TvrY4d24r0e3XylrTleIOcGqe^-t2?cw@V`7MJIGIGxK^(f+r3 zdk-qNb)af{yO7FlZK&8v?b*Wp#r;P6b&|q$bt0Z6pY}|}8yZAj_H$m2m&$XPh5gk# z=z0&!ahOHAmLwf7%|hD?GtlzfG&DU!=K+#tI#aYhKV8IE@90APQxk=-ziN9YYMOOe+#vR^K-tsXC{k$Tz}bC>R&q3R8re&cF~wTjA!@p{DbS| zb}-=26euk0=X{M%lkB3gqw`hu(^F7J`P;w07;UdD6beaQFD}5O7Z&2jduf02%NR*~J&Lm7z#Ku!ud!LnRm?B5;ly7eqAT0y94E8c`?$|P*0sc5x zE{Oz?50=5;xKu`}*|A#yT$0aRt$)G2PS){OZJ@!lKe4Y4p6)1SV7xv{9$fWbp)Rz~cp7uP`pPq}J zZ8VQowPE^;GY_ zm%pY91?1+^`Lk$cH4%RFe8s!hcasib8n_#)1Tp>S$<_wZEH4DcvbzS!KGW_G%2ZFPF?}@K)?D&2h zK0qUT;^@BxmNVGR!r(ZA<}8xNI15v(Na+%Q{%v6SV9oOXfaU*@$3=GI)-mAXVZ4x) z3G5~RsT;U+3+TUg7q@So18#nV`#wa9ia|UN0oW}*qf9CvM+`UiNx$yv3m|y(XVc^AeIHJ_zd}IthOi2db z{vEaC1p4U;=Wf$OaQirp+&_-b?;gY_R4W^5!u^}n_*-~z^*Zj}zJn|DK(O)8d)F`F z{-0%4jewOZsPhul*q`W}@ z=~pj880@@v?TVmBq5j30Ti0>>-gV$O_3ckz#rvl50#N=arx5tvTfmhQ+bFz(FVol@rM^6Z-8Zk`5Y=$@-aYI& zv~Qqq?$Ed$d;|THYj8uKgb%|LfX@%$(#`X@cux)}fPACC)W zBk;$MaPx~}`0Ug^{Ppxc{QdALe0KB%4xau1*!^oC!M*oBT*!=v)z>a9Jf+d*wy-}Xp2FQ-X)inp|*;0dOkX+!hEdi2ex#ioj6 zY@b?&#!WrQqs?;-Z2)W6(Sc>{R1|EW!!;dts(EwHR5f%^u3XWM&TK9A=>2e!#{TVw zB&2&Pc&bI>=9(NA)hqMO9xBN?6mn+J=L1DqM?^j(!fS)F*UISI{k;*q^N6NwwjU|ZIK zJla52PfNwxaveTXscPek#8mvTwgl7Xm%~9Db>?hiAlptGGW*&Vq|@Qhxt7LtX$`uj=HjI)3tpzf ze+6yCEOc-wUPb-0q#Z@HA7iN@DP(EgbumK6t;k4a+Arp=MPpZQxpwzOoY~>!zW2c^4{{(I#>> zZS-eXA!S7)%I6njmNN{0%#`E2F$`x4ELho5hGp6KV(yVl}Q{Of&EI`BJ zLbNZ;#JqwCe69|_C6yd+rJ2!X4S`=y5M)K(2kDX;RtDp;5-5um$fxz= zMMD4%M@QnYS&MBcYRqhN2<`Tq#yD*6DZu9HB+Tn^pt>UwepYulW-y0&DU!NP=;|_H zZE67aXyiDq)8aKpG|H`>s9iu~nHh;4aY5K?P~d8CIF4jxAg{y%|LIP|tgV1@h7+b1 zC%h9?NTH3hcd;3ou0mvI>G6|jZyeQx;5~yGKQhN-VU#B}6(wR$t{ok3nmRXTN^WIJAiE%;W5vmS>TBCrg+c+4gZOZU)_<4B1b<7wf#u@SUU*5oy zz6Amh*BQ0Y$LnFT8j)S#L|S^X&?NWs_Y%D3s%SZ)wMwB`&V1!8tXa-fEHd{I17NxD zNWoX`rt(7=t;x(;{^NIljkVw1CcrtSVF^fz#0V|bR~(0N)6 zR14}9<`-uw73Lz>*QW@c@-dbG#IR^-M3-|LsElGtDm2s5g;6WkNaZg^a#y#)Hlq}(#$@Q49Kz79f~06k2V4>&1TfCR zn&iq-nm;*l0wiaRat6^EEFT*e4i{^b@U!;0e?}~VbBt6z3?mFaaJNNLI#YDG(!AC{ z-td%_+ci7>Zei1Zx;5AWd!QMgn6UI_Oa1AVv; z!hC6tFhvVJ)BZu@P?n#BbiD$l$tJjtlEL3^B(-S_;$njk={5u^?~!mB!STZ|p4#P2 zZmKB~c3lX9++>*GB7>{{5cq_RhF0zgh5r~tcnpIdwbO^%nU)>{XR!@4mvzHYo&tu^Ayk1KFoaD@4oNC5XoCoC{i4pt^tHxl0 zEr6amdS)r#=r|w9yy%&W8YU=S`0I|LG2>`1(X*{!!@k3X*1Ig6(tJq*NXYM!;3sHc zWWf}sc_57Pay|U~Dk(mao^k4H4l^(=3mHoF55e>u^RVa60jh)YhYW$tkH&-MfXrh! zd?Ni}uo)3;)(Adw7Y|x9Xxzt57zHnHSA>N63-Fw&S(wwDsag~|xd7IgnniEaU?}Gw zKa$q$(Fl(S5Oh9rO{k!;Vs87hIFFgz=3`_uty^^eGA*q;Dr&2aT)rQApUE^NI_e)@ zv$Q0$A)2vPN3JNu)5>GdP~>G(2ppk^Cl_bL^VkFf!2#qm%qF%H}z7FT( z_L$gD=`1EnV=+@ccBObdU6aDYtlan9ZVFQ#5vKG}Ngf!U;EEyfR41hmwYZ2hDg3Bj zscsgIm&8nMpfeeNq48*pcwCGFX(JQqU269cGR#8H2IU6+xq%v9DwuAc5u zOJil^_LCUKV5p7eh{Y8nlD#p~PJLl@#c-P^T(W}UniYbPDLxqI2*Btx>Z@d`KgknA z6X;n@pzBaM&M%9hagU|CsXkd8UCTu6GEf^eJhz5mh}8{465U1pTpx#JM#{_isXW)q z*XQeUdxj-?2zNx17lu>3%ua128A5R)K7obu(tQu1GBRqDxEAFf>7YF!&wqaQm17V@ z`^<=9EowG&AYpPA;wELlv9MJ9DN;!1lg?Kc2)fE4bR9N!-SOOP1Qe=Zr?rj2(nVxCE3l1q+Lm{%tZC82=^_p!9}+4VHfsP|h+qUJ|K{ z0MQ@TB?0BkQ_ik*U8cE{xXW4CFNHZz&eNTOhn?+TG(R;Jt~OtI#(Trt>cUB{%$bp`vQ&6^`K`2^eFQ;){S%bLc~ zY8D33B`OvUbG%_yxiIj_TIK9AU>?7!0&#REOIleeD8@d-A-uBx7f4-D@(3(vkXpZn zuCuvT@SIDOD}%Mm{~e&5Wia^7!gWg=<}CmJ2FnL?mOlc@C2E_011y*L$}_gpx%r6> z0hF_!L3F0B%b8LBjbQni<417p(Efi*vs?nb83dPra0xvBHn4nfKF-55EX-Mc?HY5H z|A({uKk`3CcJ0n#;L<_7l$inSJ_a1SiTgKzt5+Z3#?4E>olkJ{Cw({@Sb#6Xd~w)n#HS@$xcH+dfwP}bMylm1!^jLopTrGr^j#`*fa3r5 z5pdx=`Y)dslm6<>TS6QB`mF)5Tmarzui+-$|M{;^<02aXz4U;q!ab%kVdI^9evUt6 z2H=ypNF1(j0dtMBvb^9nzeIg;`98Jv4o=-X3-NctnR~z&dvJYq8Gf&o;XSPyUu2g7 zzx)yK)mwB^)ULaysmc2O?hp+0L_&m%X7fQ>4Bd2ij>>1oY_Z99O{sfmkKZaW;?&8c* zI);MAFYIC1n7+&K9qZvEyv__N9z zyXmm=VE%gG7jNVC;e9xG^fT-~vKLp*?ZJ)De~eo%F2v`mFq#`N_;lVPT;2B(b@Ku2 zcy9-acQl~rxo)J>0_@z`Ewmn(|1NPGFXF|5vwV7Q0ajLIVs2d~Y||W&FGv@kzcMGT zye$dpE(f&TSuphGK;P{|bQ^^`GGLsTi`brQs9I7*SlyZiMN=}A%_)!aXxh^e-I4}* zT>{iiHt{L7sxcAjhJi3^c(KbGU2Le!L=r>(!C~R=NE5>UxEnhiFm;ennz?fz&o_lR zALr-tItE~IGX zYZ)>oC8D-C7(cQo@CAR-qBP+hs~O)bi^h)HNNSG)E3y?>;?!b!juxAWRQO4b2B+e! zI31siUpZ5;q|$+Wx=+?NOPXGWgz1$q&aQ-h4sEbzmB2uoeg3?>xYCTBP7PLOs9(wTdX6c%d{FYa48Mz9bQ^7MSrI^~26uE!MYNuyRr|rnbalagq;? zYQu3xqsB`a7TC-I@G8+`c(VbqOEZzWr4Wf*%Y;FjuzAJsFE$`C#s^E)e%P%E#R+W$ z-bjhXrs@PVFLolkMvfnrSn#Jr4SrV`kDa+X)F$|$o1Tvu6VouaQiB)sqws5!KlU38 z_$1MWK5Hm)(t=UDs1BCoP;5&G$ER@$Tv8}-Acy+8%!;6?nTTFn4moS@He|q;HrPos zO5s|hrFonUCym8VVmxs)HUu9gSnxA@BIZZAVM9p*X6M;qjg3Ucv?`3qki$sNeMr6v z`brD@5<{WQHzTdViR9u`B<0$nF=~WHczAdy)G7ty46!g7V}&-kR;PlOk2|9EYDB3c zA=lEOQ5g=sIR+X^^Y--+Kzd-1uK?W{Fb|CiflsiHpkiUL+%

J2IZp4b8Z^hm}{Qy7Q_ewFKsGZAvAtHr_ohKUBL~s#W@IgE5btFU_{o8OD_3-keLRbw1WQvEniuy#5+tE= zqDRN7K}?oWU6r1K(Fa!}JVPcv@Osg`n@a7D_VvTiH)jjNJdw&)&2sv0%mgYENg^%@ ze>9cICkgLzjsw8KP?-#8Qk<3Kidha}!6Kbu7V7fU;W4jr>8vafJXSSYfOxtt*iQ_qAslj3Yc!}G57F0!17a$(Cd zJ6jOanmHLFxThe?7gxZ>u@ri9gr!L+we1=Q8?a*C0zrx|S}=t9bNVne(1e-OTPYpG zv}rA9>!?LdJ=M3B1t=>o6oh$ht^*pq6l${^scABJ(7lzUxT9`EFC6pB1rg~Y#Th*P zb?cR{FLM#5$ALWQnO|B4<5Fr%uA(-; z26{hisY2FfY8x)6w&pi@mAmkt$nvif;7p7&S?CT;%dMf|cc43ETdeFc(VmTR!I2 zb<`f%UWc6BEy%s6O{nBe8>2_$8B`o7FPD}ZWSLJ zSbfeaaz2loo$MLU`BDqVmaz{Ku4{6Ayl{QM;13#{e_t;HVt#G42tr-7y-UQL;GoWy zrBtS<{Kt3OkwE>UU~1Qf7o<`hIT=6y`){DmGayPu@B0L{j|xLvY69ZqNr;st3NUdl z*Q+3-HesSFnbybCv>XPf5#~$_lxAu(XH(syh{O8_{*LR{&*P2X{|4@pB}h(=hS{PM z)+(IYy0BN;UA7^VZYwalV8cL8}nTte& z96^au@QV&XT5*mTIUP&=qpZ48xJCOTLZ6HXQwoAKF|br;L0dv~c!5cHmZz3jAuqKe z+%Bc|Xe#2ZGUU}zKhvUwN-W@9oQ+`A6jHjUuN z-&+shkO=Vk!ZX|P#nnIKle4di;GRsDvjxlfkAFAjSAK*oSzf}aqc8sxS$^i|3xX`a zaOPEfdGkH&`{+eMmK%&pL6%$04%AjPqqwL7jcuJ&KbjD3l_Rdygwl1>U|2x+l**-+ z?lX^25LjC#pj%rG)4EDwpJiQJBZ79OQaMvo*)y}Ud?`IYBNf<()3-g#*@lJ5W!A-G@_OoyPIYhlOW3+pzqvkmbjY9=sjc^PBK3S^h2lPeF3! z!~x*?CE(IUj24!FYH;BA8Q|Dy;P4UP%0)2*=fdZgar#Tf6`H<+D>tv;+O@0r?CK4C z@yWONpNh{eeu`^nFN^g0xhptx=mbt3ID)f>kK^P0hjH%637kE0^ft~=nK*O!5KbSW z%IeTz9D4UX9C+tlTsU=#iqKhnh0l>BPY{7jl2YTKH_Bl%DdD7-zab(RkrD|E9`0CK zQ4OWL7XrNkZxi24l27ss#6*t(VZp*gIj47$=U=yFar5Erf^WkW;L`=4kTCd$hQlj3 z2nI)*Ak5=a3;*%2k>&28V-PkiOq7QNh}0*7iSaS7^GRXem=re^<6@>@ zVx$kIMA0=w#bZ(=At4DKsmZ9HKOM8SFUQn4FZfA0=uX=X9B19`$`fc?s6+_wk| zA6kj-H3L}wz$)}C>4Bxp3R|fSBdh1&ktZLhY`D1dpAC(tB1X4K&iw%R)roqV8WvCwQ zg0#?plHLlm^wywzs13#4)JU(&MNY95bIQ{2gk6PK=@@6C0&#(^|Dj}WtgX4)Hn&Vb)t@DNi&;gUF{1<}3#j8k z+a<8wLW>QWo(wVUUfyU#IW-JRmefJnYDPk}67m)kEYov^$8Q?@1hWt8f^rx}@}V2f zMPRiQQ7u}e^rpe9Fa`Nl8hocH1%GkG;zPQRPv_}SH8T&gxrHbiDuJD@Eq$Z}&iOU) z%a+5_5(iUjh6p^$N^(|yhvvvcASEArEc~4b@J)+@J3SZSd8xF06xlkOifAf-KijXNN~ZXtb%w$W9Z4d2(tZ{KNc&vOGLFQjq2TiNTm0?JX4L zZVA4^&(|%{8-dygeDLWZtbS~Z@b|qdaVp&_s%KO_7^m^Ycq3a&ctK(efJEUgNHmFp zwqYne{s|NHewd*16&SDe`6uu&dr9&nNRkLClOd70jr~tU`{s27_DdGW3Z;&b%9qZ; zkNy{k)H)`a4T3E9)l)szoDXwT9wb!H1(@PtZ!16wm19YaJ3{SAB4}w=Z>g|ku(oDH zPXG0{Mx$XxFP+0wL7G=CY!iV9?d{pnR$CBE_dT^tBZAVJnmK5q97(0AFt(*Z(`bgd z!wCyPS8qZpm1|YCj<&PG+U9_vk?OWe4U&uHkd`WtR3t-Up%f`4bT4R`yj%rKs}l+N zsZdv21(FKso|o#y`K5K_340!8r5TC}lUNs(9&-0v0OLVZc<%s|A|9M$l zE_bje!CMy!LxWTJMW+-~*`)Q7s0qlLRzk;CBECQkd4*ZzRajagf=qFO_ztF&32#S3 zE_|ePp99AslJeP9Y(u;`5fehG&hnHXKobdlbs8oo_&}DYfx3v*!Q&CA3?Ebfhfl$z zcuyo`s}P+@9oz&@1g6Ccum2Dx#f?!2&ypgk*dTnaRh4#(Pon!BGZo_#J(1Z~MD^lb zm=NuO$+XN`l@5uwgx+U9bPTGib5)p3bzF=i31Q|KBxcEBpnDyt3rBKRDkjHMd7}UG zf6Ns&QP%nVnA|m%n(19hWsc5sLbw~WMMklHQk(}S#nSV^gujlJwBx9LrvLd8Lg>F? z<1jwK8@?tEY)RJ?D-q>9I5$DqyGT+dBD^F8KG{+5N@sufICy78V4^($e!0;|mFIyy3n&jMk5%3% zTGk|NdL&jq5jZw&X_Ziya}ZA^${Dhm7Nkr!jgjWl9f+G|g?x4nqNZ6Oqm%=mvSM2` zlqvH1E}bV{IQIs2{q`YY&BNaKs-Z0LpYz zXDMWfh^KdWM6f^PNpVo5Bp@Z8?jy%DNg50I#x@2aAwGzUjSyB@+$KoXC&QX+Movo} z_I+^#mYz%`w;G|Johz(kq_doY{AMq51}n)KOoTH*ZdqJ@+j_;NF#jja%ZFo0DKxYn zCd*lAZdzDI_bgAep;Bs$aHn^Qsn~*L8`+b56bnWNuxNA;-5r&fG1!dW&N}pT)uFw; z7LCmnsH`bQaT&dPOQ`KdV0$^4g4)qe4Z@XSm_+xHgCbX~>w=Za5)<4mQrtz1GYQVb z_?@J&E1(^ABAe!mHq;}HZDr=<3LoE$4NcH4DnZ`%PNdGw6M;;# zx75S2t_-H7*|035_uRsCSXNTI^A`F2P54h_ITPV7;`>e#oWbkpA+put;(t=&>w{2Yn;Y(mU7WOc=5bQht`((L; ziSq50w+VA5%F{Ph-VXd(bayLVFXi?63ZdZ6f3O>=s|%soP=?H%lpm|9-0tZ|)z(fF zu4#b8?jwTEE_r?{B>E|0)I$H`i;%yunewFxosZ2!D%B6HFfXOD)%xHFYIY4EvDc2c z9t(0dwxIN$ewbHRA$NBtER^@jqnU^wu|dD0i0%osV>eUYuP+}vM{%7^aBgb64F}~t zBc1QT7XIKs%hypJ-T_t=J6G2rXMM9E?0IC5eHq>76}2LUMF_QnITlP9wHLzkrI?W7 zg(v^?3lSVMBqldNAuNkT71~|&{ph`Dm#*+Ck=A(T-AlN6^&F+j1kuQO|{TcdC^cg)~=)eFxO+Z$a2e?Y7w+k zwy6fn&GcMSIkhdS6*hYx;S?79coQrOE5QLiU7qDkmK&%J_@7Re>*yFlDZYm4B`W{= zkplby2e9lnyWm({CCGBex-o^gi!9gEasPM7a+k84ZCE&Evb=ZW44lJxoVaoX`;Whm z!-qe>vBUfRx5@IaTd&-SZ^`m+@!x?2H$TCbXHEjgk77+}1@Pe^;Nmsl#5v%T8~FV4 zC0w|135ReM`*8)QKR=60H%{Y|YZs|tUBjnWz66yoDqNrADs6w`$~Am`=^DPc@HxJ^ za1*#dD+ym+xIy?FI7c{t6Q5n8Z7=gOI>yDD^xx0LK0dqjIliEIUVr_{4ch{B{6Z}&OvZK3BemtDoG&C-h)^cIoEr{qnJ0`@MddLC4~2zH}9zT^<8Z^SSVM z2)6tB`~rdZefg$1&+DJuI*+Rt@!1vHh|huYh4bSJ%72kx7q8+gy5`R>(*sP$xPEzT zAAH?o=gHSKc5OGVToLyQ7wCG<@wJTQwJV>;{>SJ1kNo=VGHpxOh11vR*uYJ?QwU_z6t$4#ZTyklU6kygifTQ+)g}&fNp!r+Q+7hZiP!`M}NBUwD*z z1_ld7d2nljR)XGdwW?<2|OrJt*K`D$DOA%Q>A&9W_q9!^hO+Oq@>)^@JC7 zh9<;Kfh3$d_|f5Ti%Y_U=p;xYV<3r&MESfy%-*vGKJpNRs3H-nh(!Q3l-#q8@XS<0 zkuF1;+#jupzIZ^LfI})3kRSs>qVQE@I6hQH;2~=e>hk=ds0u?&vlPiK)cC5-hP^Te zrs>qdnM<7|f^9B!kY*POH82N6GqbXE4mE=3(Mx+)6)f{=V4Phc2y`dCs8ZTYNT}7J za8VOtDl{lu(u|x%)aYN*h@w^Ps9fKRO}}{n$8ecmpC?36&-VG9n73gr=B*jQ8}Gh~ zbJtIcXz8EfQ)*PvGeGsk&z}7u`ewAFV_Jg<^f`V0G>onu!K{@tAxo1YF)bNIT_sqy zXDNR6;uHAfi_`e%$lvgn_g=%kBY($he|j0)_H06mGC`<%IpTU?h^P4Q5*-@=qe+UP z>235fJB#8{>fGwa0)8o}vFab<2Y2tOm^jr9{t=<@4hy<<&w}6?#h`l`P4_m+51x^J z2;e}jo|A5o<(_bhp|TJe0H1Jw1V_>TLcEb|O2v##3(&N%Pk0tq_f#P(%LKDo32hcN z;>)v<+f##`)NtMR-JN)+p#Uc%{BSKU2p?J#vCABZ+U!*7xNFhXT#0ACcQ5|@(xZ6g z+1+^c*AL;hzj+ihN9s^nn}*tkY&7?jW5MS6Xj#yO)!*Mr`F{xqaR&Fk@?9vJt+4jz zAZun33~e^#4VNN!qym|e z!Vp`fgl!-f)vH^PIZ}+6%2Yv=XHfZI*k7{rz8pr(0gjU9;h zkpoMW75YL0(kq~ABLWdY<>099uOJ^MCj`g0NAWEMdfW$kw1MXl~mhqgCUfIoz=|1>YR zOsBel{mG}%b3)s&54N1j4Uafrun)F@mK&yJ!#t1!^H9F_$7QZpu|_)%Rr3Fg)u zWcIPo@)YC@Rw9Y+CtI>)&!i4SSIWK$V12E$WN zbvr?lG6n7$KLpt#5NwY`NLrKt&vQV!Kx?>|_A`Zu)PuJ5)cT8k@w!QJ4>8YH3GPa& z17tp!lIjN!HP!btKR(%0klhod-tf`WJ+sCL;+yBWyC~h;oa<|3WJ|63aWA&f{d}4Lhl1p zbvmLfNtl}8i(qx67y>R$S3(jv9&S;d!h1BYlkzikB6WasV61Qm0-cF%{`fL6b}A%c z6JV^Rds(2txI|AxWy@h`VHLXxvKlKAinY+xr9)qrLFerOdrLmt-W3LW#hFoB){zLo%K2nyQi`AqSLqcIzanW^*+orI#nYDA{d z`!vQ4Q|Y`y%<=G5hKc-flLjEIs}P}7HrPr;*PbD~+Y{^bh$@#Ownha*f0n4L!mH(w zby*?rwjqqBLn=}b->ehsqNv{EZKYKAB{vzwG}}gLd(#nD%ii%;=z7wjqUTN8WE9{a z%ZfG&Qd`Z?^*NB(pheoe5+t>o#mDG`PI^wM{tRo)OgKH|GA(9dOWY*sDjBeLBoj=r!W&rr^kzg<$)TX@iD@;6m+=u69xxx5UyD=Lt- zs8GzaD%!ZH7|MCMaBirFnyybx*TxEG`CI#|&og<=zT)ZIn~*`v zvbQ!NXG;_EH;*BYrg=VZPY2{n^98YO+)^vZI{C^Xe$Fo;GCdYK3}f zAqwy55@b0C`gEPII3GHu2poDV=qKa9PnM4n=BzMhOBVJpcM;``j7_Z0rsLAK5z`IG zzrPEHjTLa-(*n)vQeD-6s>PYP>oF3u4JqkBd2Tc z9}-CDw?dK`fSi@}=zL%{sR>wD3Zs#`p#_Z(4+~PeXium3P?J0-oytT7@+qJA zeAs`SJ@eT@!@jYR(ni?VHwdJyrSrXo?9Hv>!%xQA2Bfd47pZI7!2xbJwV`NhC)Kk# zVnhW8c;*1hlQQWYMQz)-DjgyV<OWF~|+9HcvvVJWforE#G9Sv*P2!;iPsX$6zR{EJ6vP zxvL4*Y#U+~@sQh;&}Hi}ZQ(Q&v=u^`t43N)8X8BM5ku{RR9d(Gk)6;M+Tk7(09`>E zu24Vx9Im5gpo4mEUt;m@b<~Ua9H*(DR?t(6NV^Q7<|ITqsD8=QAjqDGuyksVQyZ>^ z`gmKOxEqf?_XGUtqd(&5=YNX(AJ~nTUV0W6FMbRT@_GHnB@yWJ#F=BX*XuO>DZcvR zBA)o(PCW70W^_`U`ps7!!5c3>fLDKW4=$bk9gZFtvt40w{NqEv#)Xr=9V5z*y@1ol zULw4LvqxXKMV8aDBhL%6{OrfC;O3`qQQp3bxHucTjn^uN|v@ben6T+*Az> z)pN%6^h_?QgmFdzKETIV@Y78~S#DlkJ4P07Zh(oNcP8NPB*qQ2+y&l7PtS&qmb;+e zI0p9oW|%hIB9+-MoFE8m#yXlNxX9+OgU`w@`g%q&i7UbrRd!i0hzd>ziP@18JMv=>N?yP#s}f zT~E(3<=u)JXom|hw0RCbp^|y>@)7Jm`W_A){7{hOV`TY396x#t$BrGtQT8yWWlV;% zPx3KMR;#PVZICBO#P2iN>H#j{*%TE#LI5@}Kxj@Sp=lDP8#=z5J8LelF>ob&|qGim- zeoV(ZN9hIr-!Yn|^}PLATIMbkZLHSEvd;b^$j&1r>C{%`d6Q-@vtNW7aIV_&IHN zoi2{{cli{hRM5`T{?2>}9KVdqlsR91Mt?p}%P)O~W1n8fk!v^c7{VtCce4?d`|c5GHr97wz>Hkli_SvL)ZG%Wn4K!dGz@OTseMR zl!344uV2t5e17%@&Y!=CbDx~UXJ1{!*^BQ`j#18jafpsh8yu&T{p1Fn4;K(BROe}* zmp`IqM{)7W=Qu~#bN%!+e0Bc1Ao4%CNH0V>^)vJ!fBxkOd~u2H%cqn%2kGQa(gh#o z2mBH)U8Mb;XY!nGCuQhm%CECmFX9Vk-}&L$cUG(e?d#z2ukbG2*Mn5yoILs=uD<&b zK7a2ZW&Lq_fgQr%kG+SF&K$z|;~(Q=T7Krpah#yS{@SUJ@ZPnv_~MJNkZyD!mR@8j zS{qX37U*OCO>SXAtqqDcL05%DAZtfZn$@oc#O_JiSNp2`Ct3+#8FAUZ+ zc=`pxHz*XLQLzI4A>r@~rcPgY6ubk1F>cBfYH&oMvY`UuapCX{@rAp;7rcT4ge3}- z<=&xTm>L)azlca`%$Q)w%0#qW3im)?c!dSswo~~gFlm00a=VeU3 zx<}ErgfX%`6z*Zvk!M7NVKV)7?SDwSYJ2qg`x}~^#*G6pJx*Cg@&PHcXBZlVk>Ry!O^}^n_7)q-Nb$^rU`81@Sj8KaJ_bJz{9`sx|X5f8h`{jv`>TNHI82 zkEqD0h))O*1SXGUusF=f%Fh(UI)fwBdj$HxKOz{xaS`we4Madp1Olm?ct->xC_Vz- zbRXHb+}+0m3}Mue^$hlgdyogBQ{<XeO$9>JX!jhs>CQ(&~IT z3mh<)XCW?KPmNDK#(7VKGGr=dMtI@P=wMt)iNeRm1Uzq!!*@GN@$mZj*tT*3o_qF3 zICR;xu%2RblClMQB>qh2Y#I5q!3EQFJTV9}}IX{#?4JjmTYCi=<|=P?hJ$S3CQ3TXkYq|g4CRBNDHFEo0F!BR%SGVDv>D}))>@EQZb0RdPUOt2Lvoo3Y11lbnmU@@ zr6`=!jNIXRWKE}Qon9&6r2X6ai-mm<`}{Hi%)v~V0Ae3v=Yk3-ra37u)1c_d6hRvu z(@T&!PzGO3D2ltv5Rw!OU%HP|eJ3I+HVDbGSOi7*QJpfCI!aN9QASgF3P5B+B*G&@ zpi(Ii9Tf(XPKy8^Pb9=peUp+XJoF=?LaF}o7v*DexHqDx{OHOZNb4@6{HWOkyt%&QgLEfJ!$h4$x8xp&$ z0<8F#_oqWKm?@SgbXpMCZW7>WUdAd{-cC7`CDg65J||M9*~M}fc)i#M?K8I30QEp7 z5?YPOSyl&Gw;htiyM#BdsWTUn6i>KogM}}-v{)~!AUu>osGipfeVr4MxT$cXyw$hn zQrRuQByA`(Et%p&0Nbw=&uI|0BvH9?q)#iReY+#MR0l=11?oC049yuZwP(W8Np%~6 zr;TkHP}Z0QR8&s14OAwZodSC5tns{s${~+pU<)Ztz3uik){bn-|2*0*T^uiOMwJLc z%E!?)^7>q{+}xH8dsjX(`bq>GJyfsKI!k+wfUPr6%(Jqbr!#trguP7OU@T^9txB@dvU~uZ>M#Ub6Oh(k2tPwKB(WZ7T09M&%1|*KXox}G zXs1Y7J?urxO?8=26`L_7-UnrUHHfw)VtkCdh>a1zO5!+oLF}{j3g@evK1c)|j47c` zdXY@nG3nYI;v$(!YL69p;=leNUgXb8Nv>MNg{Z1N=l4Si1X+ij#rXE?_~A>4vGmu0M)e|NRQ))XpCxVH%22-9*c7ZwTSI0y8+6Q)J9ZUK9_=h8NLFwp+k*PWI4#<^5a%q|r1LVQdi2sK2Y zpgA9d^Lo%X)Pmk=4VXQv2iS}4mi3+bHFG)OQcB97jh{L#sm+J=)< z-s0mX2Po!u7?&d^DVh8>jOGbqd@OJ$wfm@j#{@bPw zI?ubn%kNzG_4VHb*MAsyE_d0m+_{eDS#5qNVa_Bp6GaRcQSX}PbuJ4Qq3pgj&qO|N z=TdvS{>%I2j|vRlH_!8OR*W;)O2h@%GPV$L;Z7o3kmCeChU+*kFk$Y3mCi@(htHY+ z^R;dN6WG_=wz2A;AUwS{@%7b?1vcHYK3M6l_$Cukw5Ed zkh{KK5avl824NYQxvU10@*+{QcRKQRv?FUEu>fwJlnfx@zUpFP(LXs(vyxAkL(I3 zPUAdsdn?epb`~711<0FL33a&*ubuciPT&gir`6!lSLaYZ+=P{nZo#iUd=*J~S~%JY z>77Y!>uS9S;>}_Vb5E|YJ{0X0dbdjg@51Q%dHCe>3xW*a_rYIq|L(1Lmp;qkNv;cdzEx?@q68z=W$MEzMYw_Z9yKwE3H*xgPFL7l5 zFLCbpOE`b*Wn4V*iXg;K9(h(M%votZrYL^_A0K)iCl34)r;pS6W6$IA`8ROo^50>% zNny6Cpj0a1v_ieP1-gv{CXUy)!nB5c|EbTt zsu^jkn_*wYzTpI(Uek!QwN0>6%3y^&!$N%}CZ6q^{x9PG0=|yx>KevnJ7(EpW@cTM z?v?HpGqYriB{Q>Q#}G3^5{HvEX&Y#prhzuh*f80SSe32k-l5lZK1*}rTjTgagjgdQ%X`z;fuKUyKoaI6v$LW4XT z5vQ{dcQPBXR371XN8)>&#o-T6BAM}Es9uz0@$reC)s*0?d z_N$;cUMWmT=_`+vLv^?uA+!xURz=sYfbKvUB9B%h?$k1IkJ`1FSh{;T`bOH&+0%&T zmKv(-YiPK}>*5A9UaKXWAY?YyG@zl5;?y%Pb=zv|(OKI_R*#m3M%1@7;96S~u5>iw zT6;5U+9|C0Hfy}G32jY{XlZH|KzUtz3t5u@(>q&Rgn~j(W4j=c4v&mupnn8|qvNRS z?V>)%gw!set`6uJ0IoLT@yc?X%t^!(DH{Ba`V()TqOssFkr8-VAA>(d#o&+8w2h9y zOA!XVt<&LkeJGxd*WfqF6gM%HOoyjaqVQ~DEdCysf>$CF@MJ_7ej6W#KP7ANd_*u_ zjnd(r@F;v19FNz6qVX7||7e;X&!)=p#{?Pvm=cFaLPGJkqy)U3MCs6Y@j{FmCn5vz zV0r|8lbVR9;u7&pR1*Fgor1R_9}_|OjuQEQ zf#UupB96B4cs@EF&%{im^+ZA<9!*Nb}%nNygJr$#^C@7JrIY z;r9j~JWqY{&vfpeayj zt`qiLL^%GMl0oUD;kmd1><%;FH`T?!7q0=$=LBH>YryvZ4KwPvK7w&>2n|>9P+|+vECsJ4vh$)y!A#ey07zFhd!Wli0nFUQr@V& z<8oUY25}wjeKpkB>3UscedloFn^$r3qnFV6_`~SA=P<@jJc%3cemWsV^HVc$z7d0c z?P#a8he!Ga8=RTuBb5A2y3|NFFn$YY@9D>_F^WHUnF{GA;KD!9^Tm4<;U=2fXfsSV z*GgqqPjUL`UViul{crsRSAKsA?;cx$x~Gl!SMLH%gsU7w6vwzN54l z?WcRe&`sQ=d<=Aw4cugW8y$52UESYOT~OK3Lk$0*e7sLJMwc2JYDd>7r8!6$r92Px z-Jro~1bt)e6jo2^e?#%V#=wVEU;RK$UAGu?#@f%J_v06-uBkr%`YQ0!D;R$36*PVJ zGJ3wHJbg=b`z6)mx92f(?mSw0>T$M_%JtTDXk|)x%a!m^gh3u?fLav`PhA9Tyu9Et zcMd|P8R4P>W5NL0YIi{vCnsOIRtgO&M_06}rbk$mzT3f^3#U1vpu3~HF;sP5- zGAAcEd(c8E&>uY`ofLl<>$k0e5vA+kMT=-l6XB?l&Dh!ovn?!PYVQDlwFV(EQE>9} z!3^{H6O3{De+9^YX_96+1LUk{%_f26;+TW|gxT2%n`dVuK=^r%>=e`rm77;!`~3$n z)y)hRT5rrzJ7a!?H)e&oVQ!c=Y@8=&j`l zUsr~RO^cvey8vF5v|wKzi!fTK2bHP>0GobKIRZ-~k#}gB0Lmw{iqi!vHDP0(0Gldy zEXJ<;cA{iaA@=RthOKK?AyylLNJTJ;Gm=n}or?^czW8y!O5KJb2c{ZSc{Lp z{Q%W#E3st5A{dgxkzJaJ6xqS8XV{?2PyykZfi&YU6u z^ZAyhFr)gla;CbmG^2e6Ky5MC+8pLicH)JJDeW6mTbOG$59YR(uyc2Uqn9fzU8w$S zOoU{Hm%<0z5AG1mH}^m{n(QiINYo=NDI7@)Gmu!8hk%4gA?IU=Rw2vV7W+-7p~fJ` zKju%xwGcmiU7ChBcdWpw;$&>xu~M+pc_Hsb`43V0z)$UogxnZx+_VJMiwm*){vE>k z3A2CY%VH6-I3A%(5~zM@;klL;x=WG}y&??>n`z;)IS0CxRNu=J#Fqjdg(|@=&bYS} zHp$*%fvqSrz$Z_Is8y-RxrZiU)v?8I&@rxy$Lq6iq4 z$HOzjAKBYz@w6l!E-`M<6^B8^*IB4UGEKIR7pLR(Bm=H#UGcQ@RCsvIg=SSDvNlv= zj-xU4SraG?L0EiXHReaVLq_c@_wkKT-jg9d^XADZGb#O+7?6Er5kgla!zD`&%V9X`ZQ+uvfRVqYFf)U|=ZcYn{Vbi=4L{CK<=!L@hGd7q8SdEhh)8LW~i(34Ycsq(REDWqW4C4Q4E|Yzsy*l>O4#6>044?o*H5rza&nF&j8Yaua{v?N0? zXG5!F;Fc8(|B_I+<;v-vji9NB6JJ>vInNg7`{;vU?e7e;0A~s_fjU1AfjBv9gS47>DiP;JE)P|$rP5r{DLJiwuxzN=Xa#FX!ZnrYE*m_YPbFU1UczHy9 zgw5+0=DBpjSVD#S2X9>}G;pQ!_&95kOItSXM{NEpqr}#i`X+}f*2E#0^}T7!vLy_@ z^S*k0qS)vB@V<6)s(7aJzTXl(EVF$uJDSEmoi&OMECK6S8+lAe@!q9KUY!ee46LAj z#td_QapId1itvGmkt1Z0E=NfzE#9b5$?TO(NLol&r-8ji^{ zPSF??w8(&{op}QE_gNJQ<@PlAZKQfy9*WsHP6*f>g`n+ma9c~`$~rv)X&%C0IWzhB zi=|iV-xJPtZK=)iOUvLTbk9{W@Qk9q>TLx-g(o!HAQ-|_2=I1=FFk`@UF_i(>_-Wgh%O-QBvP{hBc@rWRa%^l2w6jDOzu0E2-!I#L6fcSS zJ_1)pz;|^70yk0q)9nGs}*c` z4~-WbHLh?7_rR<`njd>k6JJYY9xO+~u0opcB_icW84SCb;hrHt@X4UK1cv`Nu$<48 zjDJh%FksH6+f8Xqvd~``gW(L2GdRvBf#p&dZ`md@%6XsTut}gcn*?N`~QtG zi=07i$s}g^uf_c}y93hGzH~09Bfx3eayUz(aGZoQ6@pE#+DC2XG@W;P0?=m}n(`;s z!H<0~6a*t--$EG0+9KnjWt2u4B2SeF`I)3gs*(CwH4;u2i}pJ`###X7>4!^DaNlAW z?oPw>C`-X?WeFG7JLi`+c~7lH)agbYB54-|Bg)>iPk25IF069DPw4${{XjC{13DH8++}^_(4xTR1gon}?6(&qc zV;Y-2It*cvS}3)_2+_$A5gh`ZK?ZMsN32>`iJFG9aPy+|todCCjZ=bMcWO#waOCBO zvG~LWC>KTv|1ZrL#JQXG$lO|rt7u2^`a(SO%`5oJxwlbva3xlq*^Xro-i?L#uSWHg zo3Z4{Ey!hQr{#%Il|&$-A|7drGhyXxDb^*9?$$6fn~7Odj4vO-Bi{nZbCv< zHlh*|#8>RWYB_=oN~A5%N7^>(uX`uJa`~|w1RhU^>{uF<$7ozTk|IobI2E!ZX$U@) zPL>JP(R?9)qTH2*fVBxYOC`Ma&j*B@TFAC6MDUnwa4y|*5X?bp!Id=<5ImjzQ?QZZm_sH+zY z^Tx(T!7yj0d1FHzx@+o%wbnDUoWb&j39y_@faNU>f>qu|=eEToj@+DCFJvH}p zz@J|MVmMra0Hg>TYkZP}r59fU`dU-%`ADwRDWGReu?{OzHmo zIi3Fv@cmifvpU+g0WD-5l?aP$* zS+Z~F_c!0tJ|Cy_InD+8eUb8UnT}ndxL1Cjh|j(V&y$^_Yq9bDTp+tdcA4xd*%dlY zb$}Ym?^QbQBHt(NpXGEuq_FoV@^_K*dzH>3yGZwUiMHoIq5FG}>|+X}d|#vM*HRjM z{R_1JBjxWWvL;IJJl)&-l;`i6*xZBG=YNaORu==GzYb>E{~ECUf5VL0CxPV;CdCMb z`M-eWUHusD>;e@HY6e;{`1W&nDJu$p%_>0W6VHG~JF*|q^~`a+m7~G?N*kP2xZ?Z3 zApGF#fhM&D>cgz?y}=J(hRSi)KL8gzy>Qvf4d()a@o{h(22Q>}X|$t%qz_~Ki9;7P zOd;Vy85ka=!aa+&k`#R5ZG)GUI@Fwe5@;J{%p4u#eQ3SeiI!X4=ow>HIaA5$NZWPX z>>WW3h1a47ou~)K=-$pz<2ZN%-}&m%pozrSK{oite=h2MY|$e3#aHS8d>{)%qb3er z3zkx4euweiYv{PuPD6h$u3(gtrjElG2Zs8o$fy(b-Kxc{=8tf7+j4xIo{kqQR^!Ic zZA@$zvN56oK5-weW<}s#yLo5|(%_oA3RgTdX!46eyGshb_sYg6OZNiIuBT3Z_K8z? zn-&ot$rWfg^%6Cvo9Lsu>KP{+7{u5u%3gab`fk#FU#EJw@B!Y5ioicYlki$pHQj3$ z21lCFM32s~@#`2LxP^hP5sVD<wnyZ z&*EIsAag^rs}tqZ6&Dp$J_a9rrS--&{~*-)hM+O32zZ+E_8kov{q-2?zJh|%bT|dM z!(Xj}My7*?%Gq6Sphb~4yl2fp=#(iqmY<5C=|(V_IbF!4SUbBRIyqI;=@1oHe0mm) zrrrfBCs&x;JBqD?hnLuz*x13*(+A4%Fp58h&Vde8Ew2>77K5F0EKD)iazc*9*xDAe zX=~=-NRyWkXrd$G=<9t4ET3&V0e-Vd067EU5*R)iIR90%XEyl+P|h~r-u8}E%Y2$7 zRcu<0ZTIaL3^?;pFU(dsVV=Q@7P+o4)_KB~7KqMa!EiMA!#3Orb~;l8h0RBS!4e0< z?D3(-8x8)x81)K7k9Q#c5#)!5weBcRcSTqsl|flJWQ!7@S~20^kr&gL4bkLciS6PH33Vv$cek>jc}}#L7$HT2sJ?qbHR$v3z(0KL zX~2IL>k75F|F`>)U7mxe)OaMN#vnXGMdcxfB2IzqigZ-0Ey12MyHK>POaR>s_OcuX zOKHTe%|QH`3>c{Hm^B`@Gyw(ss*rql0hE=I0%XeEQ-(OIM~8Hpu$P7*xWWK$c8a)A zCnQ-?$>b&Ba7hb5(so*iERTg;EMEM`7DvOiNCo#2HFR6j#b>_^ z`uZ(12nMKYML5E?<|BA!J2D2%C1W`U$vBR*?^v#eLzxOLizxnL>O)I(LVMUlI2Zh<1+I>P6UAc| zBQszfi{&uO@)GP43px=&`VGvLc0Iy2_24el^4%urNeO2svj3!N|{8u>ZXh z6hdak)W-%^0nRX{erTief^mR@c!8iOj1bId9@`9SQy^btfM=;19u*;?{kqWBXIX^k zKRo7mFQ)pZ-#&||e5$l}0BR5FN8*c%Z$O!DYmc?iEdLjd`lFWxHG#zVg?6OlV|#PP&E3*bO? zX%swP_!Z&0W?lEpEybujuo6?fjS*Fyin2Y+VPrpr+PMzZCpN<_K2QMS)-isVtFpuD z2e!jELnFX*U+M!J9^C~a2O}8y%oblR@e5cZl?n7)GLU?z4ECi;XtrlSvojM;)e4vt zdBA&}0qQ;Ja9^i~|5obT>!Jl%9=tRHZn;5tv*lx)e(y0jrux7sI{*rLmW3@(hG&#N zJe3~sl~2fA`FJ|Pl%C@*j#lvWbQI2!ZE1`R)+wOStA#EwGs}JayrERfpwrWM8Q=~_ znyWDzUC6M={2`;cyp@BQaKyK0+Y*}nw?kG;bzKz>)rNQ|wj@HfHC`~_nMKZEID_L7 zaL!;jhw-t=V7X-cn?dogd(+5L#8$U^f{iU$+1n|6D?QKd&PM#EEXazqFjZK>PGN_r z96fR?GLV`Zhs5+)q+}%^IXeL{>5&MD)4)&f2WR$O5K8kJss~GhlX%$`xiKAChbs}Y zBUjAx*l{8=!5QdgJ#yYMyPR3(40y9H`DC!1O#;j%VSj>#G#ggA|#lnYIBKBTt6Ewas!<@gIh&fn@!Y5V>(3^qq#D^Cl zh*{>8Hwh@eV+@otxX1D={{ygG0?OI+duYtvl>_ZIYRj9c4YQ;rOA*ri(I(a%Z(My3 z-*$eF4=%lrJ&*2zm(~-0Vg6!0!|NJ%@ztrnSR1ILLTEn_)^7BCa<@lHUK-R9A#iYW zqBV~K0g51mM;j2N42DmjFI;Hs;yGlHG64QEUwHbv(tOhgL6mM>ngM7w~|I70a;(@~(@P|isVZ8Ty{OyIqc>nDOF*f`S+M3@6 zJM3ib@~+x<(ZLMz+Sddi-cq+?AV2*A9({%zD>eHBghZwj!yv*R1+!+nsD zWPnbm!#p!fRIgrxjD-u4oRckHp!z9k&PeO&q-C@=*inXPYJ;o|9(*Df0jDw%a5@9B zlT;TcQlUIa&$g3Ua6O$5_frM%JhcG+r^_HeQGvicMeyB_j2CtQLp8Rw+R420NI?PhfrsLU&*`J5_eR)XQSBM0%`295g9GH*@3ZwSN z5-UQJ{8$b&$1r%R=yJdJde( zhxXV%EtLASWDIOeAijpiK?e4DtER1*`i@}1A1R0WXf@?~F~atg)7mH>-=Yl%-+c;+ zbk9k2&+!MU5qq#2(TA!Lb+C%cv;xt4D-gA}Ot9i3_t7}9zZj7RX`k(IDWZ-rFkV9G z@(V-S9$6@4W5Q3ABJzPMp_4A(oQ$%Ai_n55)Qw)l)!s|E+<6ffTh61V<0`JUT)~xQ z-d@AC)*95bT@!Y#o#M7#MqSHQp?1(+TT9zov@(D$q*&@v-&QZS6A~;e+fpZ_U4%6^ zptWT}vz)m%!Cb&4CfJ~W2G(Gm3A7((aGA@p4z!L5NYIyM5_7zf7adcC*U zJtTViZc%>vFx=Wo$A-~9*hbOl+Wix0HVxdswZ0x)XSI&&6v!Ib{fw7VPU~AJPA}zk zn6{l5AL&L9dNBxQ>ynN3;O00PB{qDc8{NHhUxU54MQIF<4N(3DME-i|UPp&1Z&U{8 zA!AIHt(UIT$41wpdlr%?4YgDTjTq}`!pLA3<@qM%YY?}_E&{i%03%%(>Y#G%?ZVB` z8(@fbtdsK6OL^_5bNlKk4=orT>qg)B0B!q4zA->0Ioyb*!K>)LPG!uPYcpNDYml~0 z==;rM_)~EK{qFo#VEg}u8MR*@!#EW_8fqrMa%x=ElBoQzqi2{ZdyoogWCWCbjE+-A zKX?(Z=;io}CKCAV3v}KkpydY)J$(T0W(MOQp|-f7b;Vg4v>HQ#Ff5yodV3>$=WL8i zNaLHSNAJlY@{I;g!61r%zeVLlx z1O=b>mJ@+J~TZ3g~v9R-+2j37MXsC`uG~sX$*TT-% z3*Ix0p){I;0|jaDonr)hOH0hAhaQ{J)akHu^Ms`%EfQwV!Ss2i!uXh(oudHMO>FEj z)5ILcmNr6d#YVvIQ!=0dZaV#SRCUEq1gt@B)+?8HfwQC*nmo7kj zVKPFKY0)1;lgYSH1Zo2j5}^=`GL2RSLsTe2bV^v-nBuPKMlds4t3UYzH&JXf*9enj3FxXDV-@M$=Ckw(Qm-)DmD#MGLGV#d$8<16!gQ(n0 zWLDAwE!_bBa6hP%Ly)#C8^8PDc|7vUqsZGplbX^ zkh+}~4jXB5Ul|QuRSXuLUW=@qC5YXSB|f3|$X8O`(gZp?7=dNsv}mV=>heTrm&QX= z6%C6h7o_i?#lzZE0b+zKqI=n#gSgeS*e}&XUml5?TQ&I0=YPVZuRKWi&z81NA7QwGD4D9IA zNNx@z-`SWJVk21OlHH}T!Cj%&n69O8osDp|XO|rakJ3<~>2J6vM*wE>^$7wnXV5Hg zRU$3U%AntviP%l%&tTs%(se+P(WpqznT2Ci9}g@I`a+-8%2YL3q!I|J4n?w=ES2k@Q@pz~HT{>{eBbcvnL zta1k3`8aQxna&_RALqC(iGjj6+$r8)u+Dia#d9Nbq%>?IJOub{OZjI&+?CF8PYxC@ z4$QPP=8!qW_z2edT5{E-Asn5o=Hhl^6A6S!D!# z7EnEB_zQM9JN9L1CS7HMaFjV;?SQBy>6q?o3ZE1uvPbdRx{vtX0q4L$XL2Ekb?n?Z7)Wl?ag z3>9)i%+zK;ngR2`<&hICbLuDjLg>GNZ!7#@3X0d!l^1mm0meagjsW9@M zi@bYiF-zq?E5HJ}k~krcG|kVH+Pn%YAKVFZnu8dJIAe;R2`u&Q*!tT8u#NB%FLn6k z(UMc^1z0{^X@TOS%Y?53BiUT2*CZkH#3HEZ`mF2izs3O1)ieffiWU+T9_tMV+MXbo z+d-=$#aBztS^jvd^%LCx-s3|0%cnpISv5V^s$vCL?o9RQ=wk;LcN@4l+rZn+0e03V zLd)09(+T!2lqXFPT>afK&w}O_&JIHMDkj>1aD51D?aW|H^Eh`Gd*SpmIKUfr6s8Cb zz&yLTShj09&EC5qU!X%!WjHh&5}?|e0QL4H!6cU$_< zJojS|ok8$lg5{HqLGe4%D`ZlbuwCiG82F!T|02o4wmVI*#U%h-0?Ro}0R$5Jq6pw*(-VfQIC4MtQTz?d6Whj#o4sha6~`|%>`K2(QFRFqQl@X4@96M2p(SU@bRH_F|CaQgK6!c znP900sC*~LMEU@Dsolg_q0iL8C)^#iBbU)n^Y8L|tC75O0kTgm!=k5lAarvEiXYyH zoYTu8r+Hb@!E!{?am~gwWE@?BA7zX=3Lre2pXm5HKy{#XjlNsa<@1TQ>b;%{|@{R^( zmA@~Xd$!cPA%OI@=6BKG{RP_Fz7k-0Qc9!%%V*7=hupj(EG#ZXRrO+oMd^ivCeI0Y zo|%1gIrJ<;LTy5QEKh*hhJzVM*qeqd8rw2yoMxX5kq2^bzdWHe>fur$2N`?Y!RHUO z{@MM)F{ItI07<-7+L?#&d-)5C1pd9kP=Q=w}G9oK1Er>$cH#PUk{#Umj#+s{2?P zg_+@#>{#w3qcPybgfr5~roC;NW9+bV1;txSeS~c9a%w|m_!hm`|K2l*-@OEJ`<5W) zz#{6~ixG2p5n>NjA@)Ee;`Wpy?%oo_?WHk-?k$Ea_Vx>bm_yW0$@rxdzZ_s^yW#9m zl*Zfe6D2fWltXi*5c17QDBiyajkg+bZTK24^o|++_<`(a+`zRPx6nGw$8VsnsS(Zn{kSp)T%q$? z*lv>bkD~SFs0jNBH*tCN7A_3}=jeA08C??HgM(-s=>uyk2o`)Vt86fIdK2y4edrn< zK<$lgTp8~`(?}bwXPG!Wk*2V*n`j*!Mf2DYuHG8Ld5lm#M<|aYs2d+e+sFud21n3K z);T+Z)srPcMN|{$*0zNQAnbUjdxRn=tb*T z588+OMFV18qhZ!fr{lNUzD3v5NAa_d0`=-t;D;tEN7e%W3gi2$&>j?kR<8hj93BKb zcM@p&jLPmSpq8$8jmr3|Ptkw!Bwk#xkLrMWf_Rhl1Nx%<(c$iZm*mORYuYI*7pM_( zlOLzQ*D*$mfSyLmfBkp(VQC@S{2ZyA{P3My7~1!p!Pv+(YNSo*7@{sk`MudS3Vxe} z?th?-9+ubWf&O!N1a7?k7RFln4II_u4^%fN@4-*L&bZ?41+3cyy!Has*K2fNWFJz! zpFV>dYqsMneH4CDYtbqT#TA(f-FL6T{vAoiLDdn+uFm%%^fmbm;lS2{3xEKsc`!E|0P&H zgBGb%4Q`kf;=$MXR`;;W1fKR>klyWp(c z5-)|@X2*Os= z!+C81d}%`AQyL2uP5zv+6o|X07-{<}5xyxKk=t^SuxkMni)aB)i_Az`c!v~32q$y8 z)NmM*BN3GnEgT%irN#$2VXO0Plbi$#Qw~gMl?AxLVQ99wr*PlzW^%) z1Urb&6s_#3El?YnKIg6p36^OSpt%>78GmWOpFA?N+}y!d0OiIu7I&ECEWN_aa@M+^ zknb_0wq}mGR`W2^Y&K?F&4s7j8yj|SMru(8ik2)8ERvw`V8mrcLmw85*hn=Zqt$Rx zcwk-#E!5M(F*lU9uBQ0I;#~Zg8IB%*8#H(r@a9z zm59!ZM#_dlJn-Qku;ZzNh$x9cNFnPkM^7-zSHvP_aXi8oh9hV}hyb?(v#C6@l+cw$ zqF`qkLMx)+lIjoV^Z+4^;F=>7fD>z(r|h7K^U^rPQ2j=%PQ}a+OQceG!lo=ZC3_=$ zQ4HcKoUai{>6LFQ5tH(V|9A@DT>TiTNFT_<+>u!rg^1Pyl$n*z6r{MJn>hm zO9snp^9(d@H^NRA2wg@b)^A&d>!Y1QcmAJaH#>g_g2CyM+MtNAH=NBhIy<9Y*PG?a&H+jXgtk6LX-bJWr*66huAGNG2J?0 z{5x_hEtc=5g)^CaRRS#*QfN|KC;%Skay0_i#=@{G7XfQxq27{3{U9Fh#WXgoNQIIA zd=zc3L}0v}?yw6F{{DW^o~zbWAf+G)W=I~`<4qrud6SoS7rZ6<=KeH!^1 z3k`GD=VnH=k;_b2=v)QET*VSCUh`lQ>ICP6K%{S82qWid0MAVxmtzhkr9r&VV?_T`C)=t&TMnGz+5dd=>Axah2yXuy2L=|eFmzT(VMs;2NtX~?mA0o zhO>NzsnQ;^d}%y&xC_b4a}Z36bJh_rxw{HJu|b&OZVX4g7p7DHGxD4R`)Kb8rhGvd zjCJ-1SV)U<8oOmQCWx;~iZnvj#63?TBv}m9-dRW8GSmg}^emViXbHbmm2fc2X_~1V zkiNPA_F*0(A8ZViFWI+RfaWX_!J6>lixLo!7b0Hlxh4ltniitY`9*?}mocXLnjpL~ z3APlUWoDeC1BAp(`kDnW3$zoCLrns$kwAIi7YPia@|Pt}Su)sV2GLlNh=2up*wS;6 z0pHlg>2Qwl6YO+58gpm4n!{G*4oiiT$ZPDk}=)BMUMgqm}oJW0d zvN15uAUU(f83cDNRf+2}NX}q+=J6^le0VjM{C*qq?pt~%UdYB|+D|~t_I!F~my4H! za}16sKfR9H!gLt9O&2enSYw}GUUB)e)DC|^pjbd-@}ql%hWYd$3(V2j!zjQMJD)iw zq==^Y%@;3RDvqtjyf6oi1o*Ctf@V(^+}0Z4 zyD1i4t0$QBvSpF5PIAW^jUVFF+mFC4-5-85p7B=>tZ(n1AcuvgB`jUc;6w8oFPiJ7 z(>lb)+!!{N^WfrY4+~o}!M61B_W=8UP^o2z2n&Tq9t3lfIf$is12fUxY0l>7=?rfV zM*)`G^4D$dmRP-SjnMX$F9;Q18pu~i!*8`-I4EVXoY~|OAT9ys61)7@fbxF==E+cR zr{~K(@lfwfLdb49XLmZZ_hyh~A$&L44tmz!ok?@6Jn>>Wc2$~qW;+_(;iz?kB|Ar! z*~H5(q9G|26w%Tq!=M!_4ykU%+w(su{4B80HLMGjJ_|*^&gyFHJiB?`$$K{%gk9 z{3TE>f#qxxI4^}yKK4HW%NYcgfNwVGw-hFACGdOlF)8dnnFLz@JNqRV{@;wxVIcc| z3YJSI0p)D`o6};joYUdoywB1rY!YbBEOC}$i9RzSPa}cl0ZV9(u}~>wSZ1ZVBImJH zh&f#$WLOv|XPxt?Q`8quFGT!_Qly-!5DarKcKT^BLE)n-k$R#W6~Egg#+RAN4x%q* zKeSXZ#G{Wbg!2f^2yBi31a~Bj{O2GHyon-B9p*!$)XNW*ggh8sqOAahjJ@B zSWXl#J6UdypAXU7D9>wBU|5wRzE1H>52ELM2o&^e*O$aYw;&Gs1@S^=EHo#Q=8j5u zh6lh~>yKyt{yc2GXpKAnF3h%=BfgSRXytIAaZRD3d4{Ju0{ndu92|%ctxBwgLJZ7I zS0gr?=92|6NUfy4NplOo1YaaAPeBJdap~q2ta)q;k`6M9w*(h?j!P?r< zhs&VakqQ021qj@ngxI4Mh&Z%RY+3Fj_px;pcQG;_UW%xLc>>sFhs8X`WF0C;!Qm>X z%Jta##7?|^?rr?g@gw?Zw%<0|gi9^wP}6b&qZp=9b(nH9f-%M-Zua2kvmfKlm!H6q z-HY)4YY*eaXZPT5FCRuv=Z9!)cpa?`Z=$p5ZM4?BfwtN=(Mr}>^E%m^XsY4x_bBWg zG+%oY4VPJ-1f zs*HY@!T&@V0*{voCO2z&haO^yl2WLS6+v-4m(n0Rl0%jU4fVMYYO^fE!T`KLL%%Ha z@Wbr9cHsnL`_P2NP`yVUE*5=>f$^~0#{HFz$1!gA++P^Djy<>#aR=Cnk+6TlV)mCI z{^&}?9$AgJgDViTX9>bKFTl6d!uGuPBqHuDq5e`vX_X2mso~Ve#TY|lMC9RII+lm1 z!v%M~)?kOcll$7lcsudJlEZl%j-O96^P$<0jMAM;&^+9R`kp3SZL2{|a}BQ6 zUqe$IGB0rLhK$O*KNgrK#yETAQv>I2onU(o!Qd(Cb^T zp{{Mh8Yq1Z?`WBpBh$>So1@n}a>T;2@4hCIDAh zF6A6RYg&Ojb_@Y613+gV`bK-vHQtGv1MLEv93E*w-}MO_8fn9g0Xo*-jq!m#2uGEJ z6mPf_gY>(Z0eU8Zv%Et800w#*aCYD))S`iU7abcLMbpp_TKfkv-r9{(Dx3a+1`Ln4 zOysYB2;=N)vb`TSnQ1;aLhEoQ9ybB4b;3905ZxR5C>`mdYtSKq^7pr3bhrhBqiw>5 zDW4+$eQm;S4zy5M69&f`FnGNd!(-QQbNC9Ke~rqZ1Gv$T;p-h}?x#8$9>nl1O7j*S zyIC`V4PU2Q9U2vq(Sx+#Lq&$`;~48{#@Jvt<*84Qvxf$6;6^V;VA69tZVa}dmD*z6 ztxhy|w&Ujb4P0k7eZvLd;@5aADwN9ne^G{|YxFv0@E2ftdlPy_#?Vd21g(Fl4@0-c zsbMq&Z~YlR>*V;(Hw-xb95os$f+7CgfJ%ReDg}+WFTM#zP`nuS)6`0Y&9in8aX8G(-bI8>nPVcrad!A=W$%nB zGv>g_(;xG#9AIo=CydWyX1TSiJA$>ez>1E9y|+7NSQx|D!Ser88J6j^V49KWgXwWT zm~HTeakwAmM#wNHR*C7!N*E`}1i+vVb;D|E%mYVL z6j)WLM}Acjl2_&+W?dd4*X0OSQ}E_+DECAnc$*pl8{~-Ek%Yv13!zw(3D=Ss1Xs{P zuPOl!X~EF1%|gTc7rN<&Z zGXbgjX-Lka1!PkJ3S`B=KF2xlJLhq?2Npws&a zu-wwlTzm#7vCC)ApCx2i9NnFTLok+NF}5;?shu@Uscu-SoHff?yWG^yQn1x#nNfS7 zYjJ#*ZLxK?ho!SMj3`ZKe^*qmTY|I&naC{7f@7cyeCVF^Nnwad&>}lGp6VdHn6lN2uw# zf*ZM5t zr%A16rV8OpQehJ24CiEO52eupq;XCSM8?iikx$Mq>$S%1$Omgl8n$N(S%Ao`If%NO z7CmGUTl1jbOpEBvvu$C|B6H;@2y1s z;pH&VyTDLMi=|Wz8fg-8=D9O4qWj~oWHL(9A*cR1+kOu0sSkQ+eBea)=d1G*Ur;y& zJ0s8#1bMUq&T?0nc$>pL+#B8r!EmR(?2)B{tSS}?)|Rh`fMbac-pk_PP^yDNp$0Bg zZ=N|CD9WPoGn$07f>o*?9P(vwC{YVGIfLac6IwG6?THToPT!({L(_i%LCR3_sb4J+^TE=iZfWwjPVF+ z4+(2>g&rqsUu$WcVit5*RifDPZ??&DDh%*(d?_9qr!4{AYz%U97_(=8O@@VkGi#mG z<=+g9GlnN7}HW|1@7oR2xj``=-mGxM7PVP>QAv01@Z0>re_ zdkSZaiafmlt{Etw>1T%7e&&d+PD4%yki0}!(|Svm5xFpg+cad{w4w( zbx80RZJ2!=XqP9$DI*wO1tCJp#4#fPL9_stSJ5*t*#|S#R)YDiFHeM#<6Q_{7z24u zn9!Mbj|+r>!p)Tq!i{dGn=aJrNDoph^g1U1k!8V9nnki&qqUn6r?e{AQ zM{s47_;Mk*JQ@K-)ZQ6@_ns%@MHn!jMbA~25PEicTEa2Z6E)-p1cFOi z<`P)Wk}Uj12ES}#hB=2#W|T`7z}qEy!5(MxtPB+_a(0fFeR2^pj#VQ4Xa#alFA?B5 z%dxOz3xnyL*U*jWG!AAVad!#K61^~0V~O1T6Vg>ie)B{hV#meY&RA|IdutiBv*}PT zj790b6|kqa$^ITp!(A~o$Q-NAY!feqi~>yHmL{LjLwBU-s>}o#yUXEO7y_fFARlyHua-S zg#gQ~d~9ItPHoQD5!Tl8QC(Jqts7S1p$Cp5RI7wFJ>OYs%|FN+{sCTyiVTBRC5Ii& z5j<&*R#jSvFpUi7fA|VteDWT`Lgn!Gc7{wzebCcFfaSF0hO8(AS{m=Q8{-i``PJ=A z5l%cMr=AiB&R{tk?@tEGCB5>0>XxSnsXN8?Sg3X+Le0)E??{kj3BX*tGYet&WQpfh zJUzS8sh(KofTh&fK{3Bz;;r~PY;l~BS4-TIgPi^4C_c3eX$MLWM$apDP|FN*{k@q` zZKG>#PeR20906)G$jtycZza&20dQuR{~AC(*?uX%B7ky=$M?qe-(*-O?sWnjXOjSM z3BZ=ZehH9E$0cz6m&YaJIRD8e1K*Pwj+VJ}Z1Oo$TL0Gg`v1Wu1L41B5(Aw9Y{~fduf_c}lg^)PoCbs9F?3%Ho=X5Z z@AEnF50r~z%%WwmJocfo2~GDSg~GvSFpY~Wd&gk8ai%A7A73rN@(DIL-PegC#N5ZA zSuxTcT1sLO11Fkd= z7SB)H`Ea0h0Za4w1^Yl1LeGale_AI8z~A3jfafvE(TJw?kvd+3;8;1_!rc*35`}dS zY{ZKD*CL(f@g+yAkw9}_IX!pcj+Y_oR5=XCOOW>XN~recz+*!Uk{(_v95}|@R|)y< zOvF)nMN=Ip_hcjTWEsMba(yloPE)xbq@Ae}FT<<~X->N^7+RX&MXpc9vDeSwBI?kA z9-QyLh>tISjOH6nxY~OKAD;aXZ~pKJqGN9A@M7VZv1+D0`>?@mP-jn@mdW+RWr_{?2-NZyl& zc>ZePaKVH_U||Kq7&PW~$8DImx+4Vw92Z9MG=~bHrEu+`A|YX-+rL0K_+&?*Y!UQa zh$4&JS0+xApp|{nPnTho~Qu#U3n09GxFW=O)~?xc!w#JhT`I2NxlJ zFZEAa`-g4J!q=$B&iBsH^DBqiND;IrD32%e5OO*fx>Gdnp2(zrOm>vkS3E{h-{Kcj zd~J~*x=-Dqd||xL{gK1@H-81f;{dbFl^auqG+*;TJL)={akaS)H4XKssi{MAV+)#V z8_`kMCL~h2>RZX0g>}|9PT6KfT!Y%ys{%Ac+=okUr1klDfVjISWn;`rF4qn6P=rs(D)lygkErBV#rw!=tr1fzx(Afg~ z^ciseOM#!>7`~3)njZAm(sA}}INF3;EM+oqp3=WY>9=EicmP9;s1M$tu=OE>e^1`SzmD}j={{+1BcL-hde!3~slqQCyZp8EB#VrMwTd z3qYS`Tm+cU)<@T+V+{NcjW*Ez)YE;{QeGM`+)cl`o5l4zdfU*=3MUdHU`j_-k?;1^zFB<$c3c=so?Qkqi$c#ZG|bbQ4`;BZ5tSv$X-^+z7b< zsj=aer*Ki}hf99pz=`L929`YGJE4;3>cI8EW(*9qOz7;e{`mb5pf*s0AC+mqlT>L< z?bN1P&^X*q1Mm3@(K^p}6bWqLUMU}A%>T>XGgKLM_u!#MiT zMe%wtilOVnR8c(`@1XpTaK(&L=NQ3_PP*p~y1Cv#+#DRi^*$=6o?cO5T!9Va9q44R zo`vaOd>kJel=v}(^7Z`t=)8WNrss9Q_uKGiwGo=)WfdQ0Fw4SDY>ntaILFEXbFCf4mc!Zjw~4(g=G(alruoeImY8R54GUXm7)_rG zTNfXg+p$wUXUw8Hm%wrxHxI~kS^<{ZdAVV_`CI{(|9|P=bC$sa^WuCkC&mjiqI@tt z(hqYYWtbnOhDB^BY+}{0j|_r0#n+1hEGli zE!5JHv#%OS+ZG`Co+2o!qXbiwKdol~QJxWk*pg%fMg+qlz!kX_wD_ROT})aW60%bf zl^zExPbW+p ziP+9FHx@E1?6~vS9DFjfoF!N!u$)11mS163xiuYUT|ozT2Wm5Rm}5B?J}N(K-g~#W z-?+R)$f8w(Mb7QoKhztts36SqHiM_9`j zKkA%q@s5){s+AtF^*4u8N&qY(+z}G1fHqML&-_prh1tM5GZ?axNJQr7k-9K`LV9Hd z*{UQ&E{{jvmRxK(vjGd%<)L_O0jjoFVDa81*!%l~&{xL^=bfx`ns^UQ%(mu2voaAO zYm$W?xX|$~P>N6MqiJ#!xh4%}21i6LOG4bzWJH(8B4AGTU-o6Cp z7E|EqVTK1z@1}=cJDz{;K|K81qp+H9ghU5(yqcYaCcPgz3uDpo>03e$$Hm7HFTeZ@ zTIMe^g&F(G)=Y^wS?^2w3>uH>L=@FcK`Eh8=;t{uk7GSghF%Gpu(&hqK z#kmW>Kj#Qd=GP|)7G~0+5(KS{hW;LQ)|o1R@o<`~@|M9PW|D_66K`ue^@Ah<4l`J+ z+eH(-d-I^!l7hhX@$g+84ejU+fvz0`y8^XvFzTMGfq$VEK}BIS{@`VQ!EWwcj#$ zCd$B?ybMS)bDSMhS?b*|Ex=R&=gc-|hnj4xg)SUw-ZuWtCOPBe_{>6QW-O<{$Jhxc zhe_=8Uo+_#=g}hE^^TKI4(IDKOI>mR%GcrF%s!VKiF#As*?cloLhsoxOCz?dRnDL} zhcm;PoqRI$oVP5&!sjrs&HyH}%UP;MycjJ@5KcPh1z8Knni}f=+WbiI!e-Oy?c(Lj zREHTtuE9Bs0ru%4|E%@S8s&E>%*D%!fD%1|Dk25Y>|d&fTaFUG3v@87N)xgyRxuth z33EjGzU7$WF&F-6YQ!(i#Owfe(mDq@n@V7=c7#=^3zAmkAa7GCtV3Kd-D|#JZ>Oxt zg{{^NRvIVq#gR+2FU(Z-h^|h7eS|0G1X~J5GuJ!6z+i`y!3$_{zcvpM%QNU2Gm*Zz z7}GpW=w5BbwPKfKV2;ujvFmb$6p?aqg186scu#m2hC)ZIGye|RY45IUv!Ep{}{c@IkVksj@mW4rc$%IS`#bZe$ z-tx;Q2G3b4DrQds(vDSN`SUx)cxTv=4ei!65sxLLBKgZ0imTm{3151SNAD~|$hs8R zWCp@A#TU^Va)e`7BcD0&%hMwFo(l1zhF^%V^beO$NJ%UzkFSSgavx)k3(q)BMfJ0?ux>u(F;HUoU5<1N{)>?Mly{St!m+Bg+78jpD*j-(W#OCIZo{&KzWJ)%Nc-D?aqLDS2|Spq#}&cjMz=>erFD1cjhB)UkS1glp||@8B%r? zA?@CU$kW1j(g1!bvIFe*?=I=w`rtGHA{qw#4|BK<~*QIWr6;@cP$4a_L;Q z$-wxpnFM-EK)7TQK>kaO@?XaNZ(uot-n^B8I6k!mdEWW zg7t!66g{;;faTHml?kvs{1}z*aVk%;kiFT+e|jC&f3^V5OP|?{;4KL-inm7UsR}Io z%~}*bzKYsvDok@csg0%!#(CVqBE%o1JRUC=fH^Z(C6j>i$tHp2l1ZQ?gXNMjXs+Kw zZI}8hJNgvk8jaID-mJYS;#{DvSuB}X_c}}eGb)%_H5MKn!3h5b;86sXb zJJIv`H?RKzK`{ziOU@OJ;VqoZ5v&b@DqId1S}O$x`a`8sAV?O7Kt%xb2?j)G$BB8Q zN2D)3SG{QtAw%i0B`7#j0sW>##O=yJ;r&%eJ~2^GEUh8mM{{7Rx0ENBBa-SOn%X6Y zE2+*n%$LTgq{o+vI2c;)YcRbF%HZ>YKWce2+}clm8JUwscP*WSGin7@YF%P*tu z+TYRL{waEUez@)6Qw^n34wHGNhz*NGT67}P6KOotg+P}S4L6z#1eL}kVP6%(_EH<& zOKpvwmx;6pg@L0A2kJ0@6v2+D~o2tSyDH{ASPKiH-1>%d$ zIJ~Uz#@`iQ_=wVdJ5f&CEv7zQjX0WHu%>##9_q)tXzbpSgzsqevHRoG(Cw$^!b!@<$!w@k zXF_!<1DcaG#-B{5ew6S4MT0X*4>CJZS?{$zfxa|rj}+jH8i5NVFJiz<~KX(WJY;wLk(K$uc4v- z>K&Purp8(Ul=s%wp|7qEz4i41FlWv33Ba7S%^*LI=g_8Hi5ql3O*~j%R^p5mmXkZYdeWMuZ9|KxC@OfS~E>)LelyOOc2~v99V`A+&j7GXn4H`}z zz_*D7=-G8YhMJlgDWz){^ff4l6HG1e;EHcqIcoPG3&&>Spr2B3gy@?hIZyTX&FtAO@(JisuIT#vc zx$@4Dn`jsxNBxa)k(YLUsX*KQ8@JHaN!O+mhu(M<&lTk2z2)};XX(WDaq7ck0x<8Q zG$|H(`a3Yf<D0D*9v_7GhT~Jqm2G9 z%CN8_Pmz0SWDh3Z2Fp9C;anda7>z?n0+>MzHa{xQJAFADIvmm!#2V`v>6LgVl#2F970-c9kT zaWr&L9=b8i;Cy!-t`(%-GaaEThtm%xsVXmImGM@T&I;8UPc8ACTZadEr>%(}SD9@{C2QM%o}jv-KqqM6F0dGH6i{zWQ7YM|68&fylNLFL!{3SQOD zN26SZDlZtrpjZ+|1ECG4OC9&aqG}}oR18~cgg@@-wt%hUGRg(8~FHrDpxAY zCdxZSAEyC9cW3aPOJaPzaKEAjm)8KPYFFYjkMVzm_c!;WX z8mI#T5o~G>rI8UHNKS%b$`sfdn+l+O+I&mQwzL=9IaUrZb95K`d~AxbIqovC5&$^^ zG0oi^mO38+mYYQSV0O4W<{CUPSLXs_y*rHK0$`jFjQOz&IDiE?TwQy{y2-Ar3Vv=aF9btf4t3!BX6tsE+?3^aR@>z3cW9IA`f?1~4 z1R;bbnJZS7;>5{aP^sOa(+9xHcAoe|`}BjS@Y_H9244Q2xNG(_OrJYbu*(?$H>bLo zZEo@}%yQn&vM>?H*r_K2=4`B8&eANF4im{wK8S&EG6Jd|#z zM9JC`EZ9(r#mBY?ruYXJf5LZ7^*Hj}Z?X9JHmrPnGj=|_0uOFV#osbCxEc_EivdA6 zEOSA8kOe|Af)QF`K#<-CF?kWhgYA#E1$f8*S`H5e(XJqg}W;RyF77A9%8oS2xn^H8#9CjEsjFe z-LzQUl!ZA_j^em}O)BQ-Y!JCJ1@S9V5mgo=!1C9>co}bg{u0WTWMj?xGR&T1gbrn0s$QJ3!97sv=G}#i<#{i z!g;O#D!pL6`K~fRwLVDz;|v;UwxkK5T)8nB>dmPL*+!GQyIF&h!nURgkUU^r9K2{T z=e;@_L7S4`vBUuHCDG8|ok!)9CD`s}5pDu7ucKVu_m_voi;$3X9aKpgI0ieTU|A7D zlC-d;zGvlc1MhHOMC3+cy5lV5t|)*5^>JCc24N+!2+r5SmnP88nKHN*sNq!^4#!dr zEh6P`tqy}%bp#ypRFE%8fLDPQvW0pP{~AqwN=~kXRjLmh3KbKwD^;OzE~m7}Tv(2! zSotqtxnz^Ua!HCs0?YX~8~^rM5h>W@43aZo?o`Fv=B$0rk}jceTcj0iSqA=`N)!S> zWPmPsb&PQI$zVBaK6_M#L9sRosS-(()9Gsq1(<5&Hba2ZtUI2#HcwbIjYSLgED<0u|7PZS?8+=*%$DWw)Qv@giOvjj zW|1?qn$P1n%%0}-`(^N)+2#zUGf>W^Du_VF`UOJz zgc;=wmPeK+L01q33%NatHkHu=)djW+M`33ERxp>_!c60Uu*J!6O_gDq+(H1#L1htw z0qmMf?IVYs#;V{`q!l2#Z(%5=1e?G_?}YrFRl=Dkv&mWZ#mK@)fY#X?i(y0a6$Z}v zr3Sy;uuwT7acPzS$c^l#;x5m5NL!VUX>PM=@$4tS*DOjyNomavU~T?cqAd8U0(Lm+ zN%tQ{W$!^-Rb{-;?a$p+4R&xkpJj@|+!47rO|Z`mRBwR`BcNWK2w4Sx{+vtu@dE5u zRK>uL?u9kXjlAZda8rel2D6q?xu{%W7Gwj{Kx;VBg7z+IXUVH`5l-VK`#K0+6c7FC zbn(TMbDkXjiz47wtP)IemOq)F>IU2V0P&mKI5W$+y|YPxxMaR7CyZYvasOb}IDdgL znO)9d60=;AYLS@fywApRMiPTvx+eE4b}q_bJ%i%>a*9E62Fsc8&c{P&Ok+^pm+~5R zPcB_E24Qz+!>}b6))@gXP4GngmICqe?=FR<=syXobA;3m>%OPm2F%seM)U7oB<2__ zb7L9l0pm~yRGnB4r=&m_x!#4q!f=!wTLUBid6+6QN5Q^D0$?|in?kofMS#Gv4TSAU#pXBxmNOt8$)MTZ zT(Qq!`2>6XpFnxouFQWi?XI*50Qp{e*4#D*%9Xq6S+g?@@*Sz-Gjs;cnXPKLm&Ucd zh2q6W9}OfK4+8SGsw>243rCY`OXRX70G@n!@?jpzaUWW z;`>h*05^l-3}o{$4xelshr{_e$CCi^$sqY;F#NySWN>`qv;PTgbm{nH$DRz7OYu04 z0PX(^SUwr}mcVlk<1L3VSkA0!iA_EkNY@>ty1X6s@9dXA^)Kz$fbq%3tW_bqz;icts+@HqcnGCPRD$r6`YqZc&n$ z131w-@8jApky4!j7qy$1GX{kR!au}U__Og0_JF&O8$$IV&_-$zs0{}DbJArPpv(w` zf0_bD-ZP-3`Fq8KE0MG>AF0O{P`=nlLNcPq$lO46mc?KPJwta>ecoFYfrF)yxUV=GkLN|< zcPV+eSWokW)oWs~ zg4QQXH^!rSQz9y8EH0(-x`>`1`Fk>uLt|s+fo!B6%tF%sEX328nM7ep`*M-6pX%&D zF7=6g#8A6t<~qL+3ZpGM6V)DFNNuA8p(n}^aNt(-C#a8{pmCC&haN71=I}y<94Vei zpDg5fDP4!=Wn`+Or3m5e@d_x8(zQ=jLw9BwWV9c!Ig9RXF&c-PQPW$Cs~zmf^D3@2 zT}4Yz2UA)l~oXlcAmZRir38h%Dy<3(I;rSn?r(ZJFy4Grk3Yd~*ZBf9G+ zBwH8^uW4-%PC9Ga8`0F#h>oTv^s`2JLlf#-{t1@1wX_Q0cw}S*W4!~oH8_M(CiC`n z;$}x180kHdlmVRk85r+G_gDv-t^-XBJP(g!oKf@kR-ld5DJ}zj7lF>J6h^;U!n%{e zzaF5Ye}Z^R`T2N38vZKx!?{hnfeT%Nc-%h3jzR~})kD|$;WIQ9mEmje2;AIxhSKgr z%Z;08>0@CQi2b@-W4KJ~=QdhP_jfa^of7%>8~i;n1z&_l1BXrlKc58}DK9k_fL6*& z-yr3O^1{GBGv!-pzlHMDHi}!_;{p_KAEuvVokIYt#xRgQNZW2YwRsdm1-t7OaIIqi z9m6+-{B?iF_yj5Ujo0yfm;oXmXsHM87>BOU|2+Cyl{{d?M-!h}oeg>H-hqZNh zXcAc7IzEEt8)LXRKp7iuN832v2?MilK8+s~9=Iga0uTHSH|fr5a9wDG4-a=@e5gs# z^}DX~D~J~0krTKQyaUx>gGYuTOYj9q%0$1#_Jm+f9Cr!TLE|k!>}&b-fPb zU;Pc|)c*J(C=jiGeu+wv3jN%xcs<$)-zdD$P+3itK#i)GYJe)Rr*RNN-csAfCI2Qe~! z1GgyYj@CZ(3I!8>b3+#z7()LL)$UEI#-2vt{6Fx$pEa(^Ja0Qa9TAPF_d1nX-FtW^ z!~#89f7FIh!~K+6TdjD3gv&$2Xr+7a9UjI|_cbaAir+v+)p3EYSI6HabkGB3doDVC zTu|$+rcOZDrN-7xokrX=>$P{BL*v3IoTUfX@ZJN!hacc_pb4%hZBf5iaeaWq1P<>rMSQCoiw zbq(ifV7i3bnyaX*tHI@l3#e`V3H8mNQl{Sop1cp|UEI*@tHh@PDpWeyA=2Lq5n3&@ zN+q18PlsyeT{w{xi-@~uaXw=XjBT6*FwU%T2Emy@ZZz9Og!BGnW1xJ7nGL3!T4RQZ z^&PN$mNA`2=HwX+QyVwTvvkHBGds+;aTd&SCm%nk40_1*VX*Ud!CYH27(1HZkzrwQ zoSEYDUF>M#<^VHyN0`%sY=(`QV3SM71wc+)2~3}?Sa5Hwkuz ziP{}ACefp0vEd9RAy7>&7``T3rCs| zdIkHzUlokV_-GhnBcV0u5J6j|HU#0(k;0RCSX2a((`m8o!gV?o7B=njV_YVv2()<~kZBTqX$t=c2c*eu@r+i5&q6eKKP&*p zWVWct)F7iO5!uT!5LZTv--2*xD`OE<7A2%CoOJGp&Wk{7mL4$$2B-@|5tJjxwud+4 zTK{=G^}-qKKD-eheg7stz4!sXYx@@WzxohD$|I@1(*(0zx0WXP%VGsMBwHRUWJ(mv z<6x2M4gID}1kxmNTBrpgSEV9uWg4O?iPcX|Ba%cSU z*#~j$@|Sq}H>YsVjx{iyVT434M|{3LNI(EhJpI?k2!NcuuFEzh31fg< zzBLs}imRr@P~h4GS`4KicvYg%>esGG6JVpM!4;S2NwDYlM}e z{xVu@W$NJ|cY-WI300~F)-pS2vcm*W7g`vJ_~q${T}Ab}J_nvfYQbpbMHcIiv+lTc zp$uM?1~?a}Ag_*rQyML#@H_LHI4Drc~a%PK9{w=Y=`5cLX&S7jEm&5*@aU3ZP2J4wU z&Ma+CPcmkev+)ZYJ}$-K_-rh<}}soa%3ZR9WG>07%aEU_JMt2&>gUx+c@_#HqT!e z%N4OnGDU0>5Iz|UXGS>#yh0wl6OK~LG!=rFhp!kfqq8{JtM+}_O~RvBH3h} za!Jp8!l7sC9o9K-HTNVV?A{EaRj%5Z1jRiGknN!DF8Y0M8Z>(|AiIZ;(f)3Vw~L-% z5&%!n9tnUKtZmw7Fgk>eF*wd?GiyDJS?W8e{=|Vo`_ypk1y5#K8(MEwH%$0iV(m# zGt22WUn7#GAr9msd>_>d*<^OPminZE=8J4B-KV0tBoi+bo01VsV{g!!1o35EAkBA} zB*1g*kmX6@*`zFw5>jqobp3=sfAuQD3!|V((;}`g4zd^-qOzlD9&C*{)^lJ*W1Jm- zRiku=XSk1;KRVIe!Y@ZDK;Iwu7i_Q zu4G&vQ4|(Q$N0G6G~Mr{R_v6&D4fy*DrvzC3_N%Ax z=|_*EtNlX^4Sb1?whz$N_A#34-bQonJ7{nGK(NYN>pwzk-6v=#YpwYJ7ruKDmw$Q@ z*Dk({&eo66T>mcmdVfF+t&0tjN;o+=(E8989)SVKEGk5NauWQ4{Sgu#ipaDWxN3co zx1$Ok3&UvMtAiWOYgsBRXceuYmWLyZp5f}nS_H0%fcq*P+*gDlU~LrC^t{zBi9}>& z1k%c*F?O>ak3V=1Hq*0mE6rmzEKSDN^_keTAr0GB#o$nB5Y7~Ncs{5H!A&!u|e z${pW?c;NFeZ+sNx zi?`zg@JezZp3exx)44J{S|rE)G)Fm6sm77T8XQ`x#r9RINI8&>ghQE#J)DWCBh=X7i{+6QzZyIS&E<&<&Yhvu)}3gAFLoN69Bl3S?i;}i8qcA%*ERx~y@p|-gZ7aD7ErKb(o20C%By#bfon^4zI@oQ>CyxQh^0hYHkH4Ctu6)^@! zC&2QX%z7T|!x;Pc>*@pp%STdjfQDw=>Tg8rtu|UC_Td^M+)O0?_${=oSO%E3Sh5IMy&i*`Hlud+I@E96M)5uXn!g9eF8~+*ioazV@VR>ou>Q9KXudKy2=)bl zt}DRiow(qo#Wzt|Ks^K7{b=tR!~kQ`6ouL7*V_j%GT4Q&8!Z?g|C!Q$4?o^riVq|F zamf%2R2Bji3xN&GFuJN3*LN%t*1L5PTDLC8&^=o)P_-Obbq~hZ@4*jCHv={G81HRI z%gsL2Ql?sN3{lyP;07bzLQ{MQH+x6ux;HUANZA-17g8(ey)nW3e&;p38=}M~VJW~> z%6IK0u>3Y|j-#Wa0XNWy{^6e}y~~tVGtfbCD7_max6s$qkD)F`$FBw5Nr2@nMvv}M zFs3dv;M=Iy`$ut$mFKC`VB}|9*uMgogS^oY5s#4%&QZZooTjgFeoqO$QaRus;R@XP z{A+4-5I!r%MySn>P(B7Oqix`QbiR8Z&IJUb-8TyDn~u|caho2Y&e)H!u^x{ixw4) z8c(zt!hz4v3$VMH66L($@>#U4S%OO*4ybYRqK-okk&o(d>&jKSX1CC1$BkRK)z^lh zT5dS>o9?BR+Fj4hTXbX8_@CK_CU;YG`pJN2zoZsJ$J%?T0^4xCht4_wF0RG~;0Ku} zM*r|C@Z&{vBzd7uJ|Ewv6;U3jj<4Osb!yZ%_=U%{kI_jBj7uI~xR_4Izoay}$1y+! zc&_t1^wqx&Jhl^G%bf9}Obr}61N?9n-Isqx_mvCisJ%ji%~f2jZ$eFDt9WB~q3{S%q=|-{)qw5$IDR~7mQ;uZg@@SfI3U5)^MOgDOi6H(ESL z6h$JjJP{Qe%aOV;Q8=}Xh|?k_J_3daEutdB5glVdY zEnFjAAx{i~XP5`vqWy&CG3y-r#0Elb2t<5Z7{W8v(B)~c`Sg0c{OKQY;M7*^+P4;G zul@sHUHTYbH-3qYXSNEbpbVB9)~7?WIti-PiNg3(eRh7y4nyZBxFKn8iO~JFOz}p@ z;#k2PVX&Nm`&T~u3toEfIb5jw8VRYPm^If3_71c0^Z8FuU-uolI<8=0QJMhD)pq9i z+tN~eBX>e=vKCKNmQvp~MMX(2Mu*$*;C%;hHcfy43~n%3F5g0vby~nPD^OaLz>35#@U zr)65qO?HQKi3WB#GR%o_fpfMT&gnryf+e6Z1mE4dg5pyvVV&hGWLFs2cA`b7eYsMw zz8T1KWjU3Kf3nIMB)2V=3zOL643z&n6X5x>@H^~sw#l01yw9K>%SlWI%lX<~i*y3$ z^H~-F%fdjhW!W2+ga}>{htRcYaLQG{$Y&<1@819~8c*19pq+u91*NoL%nZdGf9juF zC!saYHdkdUSjY@uGf-~iJ5OvSP@BPT2GJ$JoPlw60y;}hW3j>-Gg&8_w(~UhA|3hc9LC2voa6E_mWg4T>Te>n!r7)%Tz(lK8UJQu zKza&0?xXnpo45R%?~`8;FspthrE6qmB*5~io^yo`xS>1&Q#|Gf9~2(+Y`3Fl#Z>n> zFbSfC^=;rhXVU`M$I>$+!db{=ai4L|RS7WIIMP`-XJ!c#)uK2AmFO{7YX>WOwlHg+ z^DfT|LqtWA0Js?-XQnta&DoJB%dfCJOAyslcxk)<$T^Ie=gBK`5mFQ-w9J{sy=3$3nL{8J=YmPCZ$Qg|)yLC}$IG zo7(#SRI{8-Vx3FixCD?(;SyLb#pitn!xLzr79hEt+D*mbHPk0;sQu1C#x`0gml%YG zdD6Ybh}>BK8I9F$G;T1{+iY^qi6A#^M8Yd-X0-Ukx-O}3yp5p`3+7F z7cZcvTFyX_)*rrd4|w=F!7IoW?m;fFbhp5K$9b^wu!ILaUllrk#3qCzH$Mf@aXQE} zeo%x4AS_A^r8ZDF3$<`FhewEqnAaS6?gZ*+(yXbDfPQ@Gy#0y zwqMGwa2W4PY;q2p%rs}9o56CHVo~l$B%^1|E=r5p)_c+gyPPFigogRv>Ct`Ip3!Qluri9CxhVs$s|x*VtTVlz_-Kz=i`%sat@P# z@5w+p8~>JoaW)AUmyCZ)Cc;ik0N#>>%48`OKKAbb^2x?w{|+o?5ShVp=@2Nwxh7Juri^Kv|paI{#+uT(y@5pHEPkIHaI%8?S} zKC&FykFOAbdF+W2agL1o1WUW<4&>conoB@=I5W#7wmF4~cEDQF2dVuW$QA5zX0uB= z=0dw%npfUU``h>{5gHe6n*h%@P~TsdEM8J7SHvTzIcc7_ZOz5g`+(fK_-YWxa6 z4_(DqE#Kq!?>vi_K7SRzf9qN7d*lGt9N37g<#|Y`N~7mkAu=}>B7S`qlD6g|eSZnE zPgWu8{wl=ri-h9^0@RMWuMlC!vL`_A(^ThVQkhD>Sr4v}K z4>d32`O7ci>1(gx(SZ+er0+c(=z0f-JKn*emN#+m>MJ;M?nRvb@kRWE4s3X4Khk$B zMB1(eNZ6T=WOkNG?I&el2FmY_#LA6fShrS(tt)l7m*&vNXiomf0xf=@qrnSF3cMMu zz$amHe501(Y;Z6x1P0=wUjVLB-dlWm-R^)^Uk4$nS{LYmYxFFcrV%mZ^wAxrDR_`oEwaz3luoIP>I9EN*pXvVt=^?duaZDPqhZy zmxp81s&K4bYru;21}xcVz@p6&sHS|E(=#NOEOSRZ@^&O4Z9_CNX+71320ZckW5_*N zjFbZl5Py)yn?n_dIarC9167FKzX%EY79r|j6_kgI5p-;UaB#{pD@tlBYG#ukDHReh zvU~F2Pir{;b@ZILJ0Ece7E^m-XQEYz*;s(m&Bf>(zJ|K?bAohv?&3et+tp!t(s?xWbO|+!pBw6MwYfnMRQWgq>g?c?!Ey%Adq#&aFgAqY{yy9o?8oR( zFUFav-PI0s^x#->F3`}58~qgjRvWI;8nN+a>jY`_jX&XBP7;371ma7D8@~2*K(~t@ z`h&ypbyPH-4GzL*(Fwpq4**Ty0G%HL?XLsRA4Q!y4D|M;Ll;AKsyMb5`w%PlKIM zLu>9IZoyvj*$Js+C%VhWPi-b`O4Ub}Ms2}5flozIkH(UYUdLG{>+)*DH2fWY9 z6Lde#WEX#;b6L;*ET#Vug;6%|>s4RQ`7iC!f8(1y`-^bcff2&70<;1(c$LBN&{Z1VQocROi9^E61do#Oy z2;Eem?c;rdZ7#&&AHEOGzW%83(oe{?w6&v$(jFMSC3Jp9scc55EebuFq3dYBL6ttn zZ(QESmk~jz4f4aSs&&9Qx=0^23ii7<#H}ty@A)0YIBxZ^ zzW9r{xUNAP2i9nLG|z&BKW4O9l(^KmVBHa-ZZ zhW{Cb(Z4RP>sxg4cYnoIZ(nq|YjA^KBAlfPpyQ%3Hk<=~eit~s9Y4#w@pAxm)I*O` zx|h-ab1eog)S>rE6KbzE<63PO8tZ7#Y3f5mcP)Bbs594njF;%aS?4dK>xW~fy$jOm zp`Zv=!HXUiW;3TF$ap69rbR(L-3Vs0W(#MXMpI|P-oqD0v*y9cJ3#z4v2_xF_+)3F zZ2X(U*%7Fjodb-`EMaP8hZ%ECgoZgg_H^{{gSnlH0LzW7ZG{YrB0NlhVgB^05(`<)&et0wkXw<%5}e zcflk#iS`vBxml!#V0T$WxWYWz1@q&bF(=gxGtxaUBikSI^OUg4Qq$r!1ObWRFeGV_ zpQXf>41YYG;DgV!uITi&$B>tUcys+yxDU$mKo9!BEyeUOT!O;2RakXoGcJzQ z;PY!=;@P*K$NkSgKo72R;lSncz-9c@@dF-v?~Sz>C_0NI?c;YLw;TsGP6=J&twj!&zXiPv!=kx(Gt_47&FV~F?;-unPax)eBt0z zu* zr}5&?pX0~w3wYz5-{Yaj_8=@L3|?_+*ePX@h3OGz&|s532!Eq+$ZFui+m*ya#Kixv;dEfrx0icp>`sJ1^k=2M$1^^uye# zMu=1RPv>^v>uOl@=B13PId zI*i(zE%nJiZm- z$T_?OKckf<2?KcUyT4)E<9qSQYrnw@pT2~X&)kPUy!k91fAMh~cZG_h}@&qu*~+IV2Ur%!EsRt94pmeu$;kbp&wqY6RdHE zvI$Ld2FiJ#f$+)BJQ+CWEr&}|ENq_3^@348S+iVX%}O#X43jh>t8`&8lc}pPz3w1EEXQ>YdWUr?MYzly=W{2g!Oo1?ct3M%iLeYBJ2?)=m(pj;*;a;Z%5Nqe&!FSH<=?s6%aM0ag$T={ z^En=e@s`6<=v)RWD-SFe&M4E@=Obf70aDlI!Y$qpvxCgUzIRHnco}0HY$4cYMy}Ig zuXjT(rD3A75xV1sRVnbyRluu|#^dD)uubuSe{r|~m>DQ#V3;K|yt6f;JQ$>pUX+Hw zj1WxoFvdK8OJuDs6ml<`{0KypB?`TC2GJQH_e=Jub-b5gzq34#QQ%x8Z(S&W*ZB$uO!GFS zb}|ij`P2BUa)yz^49t?-iuPgTXAHxd3>djkJKDJb%H=U|DWdVT+JMliIKj}L;x!kU z)TaEBmGFoP6#C_yr|GUHbYG6J(zqgIK{V2-j+tQ|xq=pNOXCnwtrre8*%yLxZM*=? z*@-5<4B~dqZJcc~D9$!nvs^L>6#pe)&fq#9XKXrTxk0bC_yV@`Qt33e#@O zfO2CJ9I4+sQ6Fb{fWWnJ!v6vT=5jj5rreke%|;sgH>Sf#Z3gQ!f28gx!Bm;4c=?mW zePTrxOx58VXZlYefA17@r3#0#snkL`wUmKH`{^AK8^fV}P1 znCfc=BWgR`9~czkmoiyLmWVHOf@o~@Sr!G^>IA4(#=$bl9pB!(h|}*p3Pq_7y2a6O z&hUk2ww(HMIx^OmLX}~_Y*$lwDm~yD=qwz5+WXqk9BUTlI?siPrx`5$tl<#s01v8L ze~lM{b$$rc`NBi)^8fJm7vOyySN{j9BxVLlmc`7>%*8o9gwy@ZRS>_kHB!*`1l4ot-%|JM-Q1`ySjwoQcqn z*P(9M`qq512*3dmbV4N6*$*p zi_hEw%r(?=3q)=UBpXZXTVd3)R^Z$MkyR{iZwmlUSS{zPN{C-6eYQf%x&@A_B(0SA z<%LG{IN@%!_Lg_n0@2rn*{1#qZYvmWK<+kRx$=>>rCHHM?N0D4_0p*tC!M37+x#_P>xAbORwV{$p zmr%=9hoU+c=$sI}Nc4Y+jML?6fnGz(TIpXAbri3^X4GFcM$gu@s;;+lh?<;5^!O~? z%R=z0l6{-(={)j-h#8bZwElW@U^)?%aTLlLMBn9umyc%LmKn_a-4ez>G>fYBqbOZ3 zYlY1c-Z$E`t?H|`S>7Wf$$WT-0lF0kS8H$;b(pGRooC)Vh&-iT*`|E@@|;^$N2TtY zJ_>$-t>t z_VfvE*vneL-oFQaA$_T>iDTB3B6e?onNQz;jJMy|##f*HflohvoVVV3n2+9nf)C$$ zf=@sABVT;@Cq91XN#1((H~jIjyLt1a2RL=;W9pB7O5GlH2Kp8!kG{wGb6?VY;YS?$ z-GyDhF7%T0qo zRk9ZuYz&LiSL=8fCT%~2IMI3Kzt37P~S21Q* zIg_TAF-_iibHSA_9WkvD(M_u|zYPXk`Qo8rkQ@gA*K>0$2d4sz#^zdI+q zWqXWqczAHa*X>tp^&>$ZM(RR5*&pu7u1HU|CwTLDikAV{-^lUel{_zA zl>0qj>cbx@19*5uEceQq{UI5zTZYE6t|l4|yvtj%Cs{cmm&H>GnLVSJDYMHNKevLh z^J*9~f1r_pvOm*bW~lSen0so8-C9eWjO|vD_7U-4UV`h~EF5QM;3MzS#I2*qd}tE! zn@12UZ8CA?bgs)D@a*}MoUA`i-O+=FQbmF5lc&yb`b-1IPuEj-;xq?OoZ`UA6YM>4 zjNQi$v%Bsf$Lo$5hoALFPtb7u1oe`q{=^B+9XrXnqsM4CdXiK74|3?I-5lGu-=v>9 zc9g>h4^dZF$I+ulId!Tv?&Qhih9RTz+C?s0Xfgn>g5}pQoP)EiVELB(DyTcj&8Cwy zTs_N$D_3Z!mvjX&>-WNU>c8(fc7GQ99AS3dg)TF!Ij!bPrL zx(wHv;QLSDk591MJAl*nK3s~(gxCHd@!!E$Uvu&8w_wK(gE_MO9XRpT=TA6&TI;(Q@7UQdYwmX@gUoym6KjH(GIBH6p%vsa2X<8aaEtfipMH&~W28jaLtI z>Do~^{SCbPFu#QN;)t)i=wdJ*7ew<`Ndm8hhOsj_gRjFp`6Ae!kNq6^Fw~E~28Hs1 zjNzSsd=Q#;p&)0&m7lqIaX6(pXnoq|)y`#iy}8d>4}l+x{$ybD0|rH@Vn+mGjbR&C-afaEEW+0?QxW z%CP`H4*4j@_|wvmCpmlLGWFMP8txnY5TUf_`m2NHif z5$V(x#avp;{NXLm$fA39j5A*r)QU1l1D?Jvlj$|-;KtT36_>u`z@~B1S%I7l%z?k} z1jVG)oL@g)$W1R@s1t<~C0A!c-+n2I{<$cVD9{IggU>&OPrs!8v#%wy^hwKgjx}H5 z%GH}(*1^#r^=RJ9rN7VPAJxvh9})_0{w(*FCKPGDd4ZN|r)g0Sx$2$v`DbVxIe-(P zL7WM2V^2^IK8<(g!nTc~xZlHZQQ#}0@Hey}F46RhJcqKZNc(gA3r-jNaNOU4Z!@RJ z^U5>Gqc&YX0~dGl!@BWo_i>`JbWrOvp1C4}WEfI#%~wRuhO}kV6qRu`49ayfM<#RVIW8T&kwDanVU7|m>ss08m@0RLg9DMf33ZQ$YKRwcY=#k+` zuT&3ur@PZL!G9rQLLn3&z z$cG;y9cl4)09izw_Hp6y+(5>Sj3;qgHbK)0D4aKn;weKJxpX=o?)#b#e)*I)zkQ3@ zo92=+D2vDc{y2a8@^8%DJd1UYuV%{fiF~{7bM~L!MP^YVo<5FbW+zZul25tFfa)?v z4jagT+6vM$lDMOt4V`;*q)-3ehQh=v%!jA{_6+5ND@ZFyCpb2Q@VGGJ^*u0B7P|$h zzdF1rsw^ZuFWp#lx9i*WTK5pj3!!iCp;<`XE%EZ{TV#8g3rEu4=))@-T|J5 zt2`_^)PUS-S*~EYI_qquU}>dc>2BZGIQ3Lf-g1?m+K2YN3{Y+?%N1a^?PWlBEvtuJ zcjMr5`8}&it<0sfM{nFyf^ba>#wRlS|2)UPkhy zeB!6drgxfbl4r>Veuivvr{wleRz>I@1d2mE~!?`zvr)G^vay|Newb zKaI>?F_pfKon$=P7>b?ZvQ&BYbwYk+3N6qq%JZVCeLl^60iq)Ub$@@>jGa{$uxu5&?RsOQ`?;Mr*BO;pXfTaE`eNvAnp5x? z9d9UORQ$)LnqM;HEgNF2=I@H^V;r_BWrpRmkR`Pgvq|Fm+g>;2+~X38eL+EAc4#(6Me>3BNouUnFQh^81|?2gDj+Lmhf5VD2?C7S9nfCdMZI${ntuN?W=W6{RaOB6(EWrnR*|SCHI_ zR{-1s#PwMD%&j;T3s|?V({r^R*EC~AJ}2LRNzG%%oG0taHNc8MR>w-W8$;AzjH|Gm`j)RWcVO z8o)kue1-wbKW*O5+E?!-U_c}hBNB11492rM0>|7S{7T}9sm{bZIhfwEPExSjImCr- zu04z++t9p7Vk(jhk8fyR1R*(Lgl2>goEAiMUNnL7E)GZyGQaZa7pk28t|Zo`Q#iSj zkg`}-{$-QQsYh|E4kSY6y7)O+giK2yNx|#|x&IFZOIz!5>)Zm+HEe5n-pVK53YIIN ztfD}u7J43O|GJr;~GXU%pqn`uG~|3)a4y6=PJhf zdtoa8e!EzJxWz?of#tW$zq(e%vMjfNa{U#TQnEydL@t&($#dy*wgt=o6<~flIDWfW zd9D1G+zz5!=T@8rj_dL5;CNe*+)A^6atkb1;4$akp}&IQ|4uBxTg3vz+ou0-!E!5~ zTAC|J9=s?Azq#qgirWIFHEaunD^RWUD8GW!TBhDZ()3)@^cpM8qEgZ8Za=rmx9(-- zvCg%Ow!pY0ZR0ebl~+Z<@}&Eue5L%5d=^+9DC-8bEKgokPPZ~|Dt|jwt{ZNEaCPvh z*I8E3YEf>$a_N_NsgKgK=&_+=**b)>$0i#9TA)Kb1`7}cA{P`+^_1?z@Vao-s7w+y4;o)Jb@Reuy5 zSAKEjiC1u20q`to&zyS)lY8F~BYLcHN~dC-XWyeb-x{Z(IlkBWXd(J3<(fW`^31qd zS4;958DsLiInvf~3rl4!C~L@(3FafHeu!1-nSh}w1l7jV&ZiTRve%4Abm7I9?q%$V zG-`^2`1;d7@a{hzI!ml zvdGFzHME?;$zkM=leuJKF_ANi2%BF@xPENbUk1o~GeOq;@$ya$p49rwvDWu(tHFm- z>x4}d8JERQS+P(5{W3!bS+H8h&pOrpA;e1iMM}GdZyia z0v{O*Dt_CBOZ;#`MgJr3874YDjHFG&NZmM`($zJLotMG9>G3R_636oKv8)>v!+nFJ z`E6Ac&y+;*YHlR&rAP2(LO464!`T}a#-ZRajs}Kt(l3xk9}g~gyVC6C%4JVyT0ES& zdP^>QI&$8tKWBU#IN|5O5&wQ14s_t4tgZHk_UFe)*@Gsz@ph6cAEtWpNxC0@4Yp(d z&|Kch4B^ETKVB$^}i9;tjdf+6751!`m;WHdMTF>E==cqf=$dPmBIeE5$vxn+vJamZqxK@5mPTI5%V;dF|Z~_+v&PPbQ~H`$qCrx))zY+w*>q8}EmO z@?LB#Z-s~OWt2BNgB>~S+mHPr?z|D>$7^}%JQttLAG34#;=a{#pM6}Y->+7+uwU-^ zm#6qSB8F2wVUSbBPS0q*&a8&_zL7es)%G>69Fm>rzFX8MCw_plpThf(@b$1>K zXK4j|{52dnf;1F2&Yz>HrO8;_8;Y7s7dbD|&?4<5ZFTl~6K8MKbMD4TIj)oa?@>7S zohkDN+4CLr_vAZYFP@jZ#mo6|ycLzmkMTKt?d!=eQ2`vxh-XK73U5Rw@YnK6eths>a1Y-S?SNiuN`ElSg%+~Sw6aQ0G*DBU%#U%X+y;+(#+M-=Nj&eUXc zJSv!PD+*x8w^Aoj*p?P9s$$gtK+6LY_&TXSJ7ZJex33s5xc-Fv*K|qhQwIk>;?&F< z8r{4(>o1M^$&cKuzo8W8oL2?c`kj?~?R$s)^K1A*Hh2d_c7@t(a~%Vir~k^ zi{bbYnyxB={&f`BuWyh#G}Ob-pL0ewS>MIWBs6%E;UZV-?1N`-NX}-iUp~y$dQl#A zBYRrf_1I6;KfIdfB5m1`+?(%w+HpELg#%flpuc$>_Ux9*)zhLsbx``B<4tlu{Yda5 zY#qU2**Na;D1>Ju-#KZ&%To54k9d1P9KQsH!s7dlW&6!jQp>|1@maD1--Y{eeBxYr zR_Vr5`taXyYW-*qyZLc6A{V~fVHDwN{Y`FOxI*2rueiSdZ?J7LKgmS8JwnRex{YhQ zeq?{$UXC8#!|6i@II(v>XZD_y38J3-cr@ z(I1Zt*@(tO;c;gd(mM2HU0ER!UG6fLfOtL<_egrRe9&WcG$an5E`Fg zz;Y))F9Vi$>euIg(6Ia~F#LZ5mK*8c3YaTc-pxVcrCbHe7i?Z(z;bo)X`d8;U0T4e zV0o8hFKknN>6_+D*Gw-uWO@E7dfqL=3%k5vdgTVwqacJnrP0`z$KhC>fOlCc0o55q zjLIWnVm7(5a2zo_l+DFn#@R@dk25!&T{s)y$H!@rhQ~Z(WUO(37&fDXkxQoX*5~h1 zHolq_zgx%BM^-X$?l2bIzmQ3*Co^QuAU@jtK83^bc=oM7@%fJ*@!O}iF=f^`Mvs*R zLuvwJ#|$SmHJ1MUd*kTT7r#Ic1E}8F#YWnF3_QcV z2v3b5r67suG}-tj1Q3=ONT9qB9NeWJdUfJ1(G4xjUiu{@G8pv~@8sT}juPKqy{}8Z zYZw(To99T`aNn{lSAg5HELYBQi-yHG_Y}F^vb=|rE#3OH@|yQ`?uUa*e{3aBAKRYv zvg?VXM}K2kzHI9%GHVO53wOgY!H;fXPIL;e$1&C)_vBDw2N!dfTVL$tIy<|r_{c&- zX#vW{44`uOVETJYKa2i$?r;b0Qty&Jce2>imREApc`_q`fuRnRr~4A%*dF^HHryf4 z=N;+6BI%pSo97de6pp)dUovAt$V!VMHYbwUf+&WKEFmL3l;pHv297Od_PS||SUQp+ ztHzKxA(xm*vaz13KRqut6f724uJKM~L8Q&AB4KI~onq`solrpjq*CsFbOrKi{FpUh{Tgl2@&(YY&W)mg?-U1&}e_F;~+bMHbw$)|v%M^+$x<6I07rC@RIL}#Lh zr4c?X75|~}#@V1-RTzGQVhI=+i)(oZzOrC;s0=g?H{B;D;yyJ6w<*cEPK?84TnsLw zB5@oN{;RdPT9Et5qCaq2rUA?}RIpsZbWKxWT=VI<=F{seu-vjPZwr>IWx0aohJxka z0OcBLyz(t;XdDqvOfvwwI{j3BcC{`qT{F_qgV+Rjqhj$;yb43;655CE5q8F!HCEb1 zt;N;Jre!^@$G1D^wBp)Ynroa|n5&hzm1bFxtM$1hRvwL4D|5B5R_pP$=av<^hH5pg zR7pWz>TC3}Ia=nIXS*~;#Lza!EM9$Mj<&rGz zkUTQm{0zH&a8GPy6Vp`|(#kj8DawvJf_qTDY&h*AWUfm0AZla=QKQpwDfTB~WHP}+ z;_x3FhjVF=oTnRyo@$k?9OV^@h8y5oDOKVJW?<9ZhG3aLiYHbQUK~pYukIuc$iQ9Z zEgOeB@yiP*du$0#De@ln=!|Pd0KNqg-036pYlH(Oa|Yv?6C(Ko2+oT&R7!Wc$(--n znZD6(I3#+KI5N*TKJ6UsfNMbzDU)S9)kYIOI?Vvz$y17??2bg%q>(bbfKjWakv*=G z;%S2!yksJ|6Qqr&51?@NKwOJLX&>E(kWoo^4vC~gh8+%7ez?|zl0K&r7fFvFmv5|{ zYvzxly>}m+V*T)uji!x#dsD{_UOkP)eC6CBgjB@QQPyFegCY$DOZ2Qf1ClFuxmuPh z6^iQh{}wF29W-wXm|OAx3M^Mn^DqUtMfBVP%{A0>jaTb(-Qa6p*AcP?7!Yj6rN*mo z21|l(f#zm@lesN=UJ0>tOUPb6kRI8d*ya0Cy?Tt9>($|D`P_lh)|JveHe`({B5zW; z`H+<(x<2u~`E-b|r%$ps?Lsy5WyZrRah6TAjl846D>In1X@Q~a=@x27)sm6)%MawP z+9&nn%WFUL)~Qd8MS1?>YF7UJ9_Bo=nz?^m$E?TJvf`?&Z zyK)NSS5IU1wk3>SGnFyxrZafuc;h7au`izCJN6PF>z}yU*;2PsB4$b5W+c*@13wrt;@niUK5w$cf=(|<9 z%PpW>>0uGg{|1&Ptdn}n`lM}|mZfPLul(Q^IId!W)^XdsDhhfh-dk(Ha(ym~h9yYW4$4{nzX8kDid^GU z?-?R#gGiA3B}!R(uFgN>*Hkg=nfa7GIL@r+?#!@7X)uO8GS%Emf8k*h-ZmKbDVCYHKE4@!e8?aoC?=F+EAbP%7DT_)C zfS$Es2$`FP8lXI3WfkdbYDkk%o%6;oC~Tz*oFn6EzN}9cmKhqV_!;@+E)$)cE9;gy zW#$8~e$>vGS4QcE5fp8ZK3pa`zqo|lwF4>GJPf6s(e})eI;)=MN*k%JX@8i0xUaP@ zRj*W^G_CC~BQ(xRvyT5?k-Bfuk2$R$bWGd^{QxDhM#k2fT0=XNvP#C!njyq3EH@uQ z(^m{J0JQ7iSez?EaW3@5zbKHO&wayFFKyvBk1S-^zg@2$jsOBs$E zWWTVrjF`=`&rsPY^VUY4d&Bn`I5Rbx1ak)TZ)6VHj`Z z`tw$n5AUaW^J$_NU&p$$BhroCp)Q7=RjFR;y`5=tcjB^Zf37%@0v7d=u-!mkF+Xo+y&!DPaJg zB!=)|QW)=~hVgn<1TW`C@N`iWkC#XD`0zBgjY?;e>;=}(%wvu0wU)?!Y|6wW#>jg0 z(N(kI!Z~gp+{g9(d*Rp#F7DdL)qO{4-gAWJ1E*;^beeOA&v5$CDUKgL$>BrCIdu3q zb%zdf<=jawoH@j?Q+wEb@+Wqj{*fOVcd_@vevUOC=D@)n9NYf`$M^lfg@z*>KE0dm zCx0-8N#CB^&EeyRXgGd~vqxINawGRo*&sUWCCwx4~7$$IMdR=zDuW|?g%&E`2f_)`=w{u zUz*G3;Q_FD13dR9c>iUtye;9Izk`QYvER#^lgbY9_jkGUhiAF|-p4e4@-gRr`BK_# zw~V1(QlEF=`QPzXL;#=12hzM~0v!B=?NdguGcb+1@Je|3bNJ#%l;fMLm!Q5Gw(o)a z9%V;p6yId$^3mWy7)PYird+$k5$Tgl&6l~N>=+G-6Ki;dYv(T;%utP+m9zZHg&SPH z*h1r_^PIYQk!uYH;p69cKi-FZMdk4Mw{kxj|7Rp#+pg{c96BUJUgCC3+R+1YF7rX% zX|7ysHf8MNjEuaq9KUhF;KbL?%9PP0UC`3PjplmTwTnMVojLP=NW;=}Ng6?|vFi@= zK>k0$^7<=RIDJ($Kx%oRp3_&<3|tiEAAjcSD1Uy4NQZlFf#qi}%7Z9SEghjhSExTr zvvSWg)WIKCvm@4#?;?WXu}3BD0QEPO+x!X_np;e{XD>E#Sqa{oI$i2~mFA-j7#Fb((%F08pfjL6C4end@a{q=cGKw;pS^JT$K76=a^q{SQhr5Cpoe=$%$`*yHFqJ!PVaVINjHa zL&GP^eGi+jOm#GK5OoZC3@%E2|M4ojB7OPB%UP81T?15KKQB!ny4ZNRQ3l&FS}q;r z=#lTZsi60b%iNHGOT!*6-aCmMxqf`(XwP@HZq%g~uxIoX)VnKZMJ`_B()kOV<|3CH zcfv=T*&Aoess1u>mc1Z~*3@e0|JiSOJ+2>zqx0a8pNQgJlNXLWf8&q*GCo`S$%XGy zQ>9I%V)aso!|(9p*ktO0!Z=YlMDBN*#+y<*X_xDlugQe-xwPZoxbon5wo7~bsFwX( z?&Iq2AK7($H+zrmq3+l|j_lvhseQ+(-+Pf$dqh8u@8RaL&!qe}c~k0h+}nx$5g|+r za3nIu8^7cje8MB?Z_|aiyLz&*Ko<1v+u_x(KQ?!^GXQwIZapZdsOICZza>6B%bd4@ zdr!)r5Mk0D4#3zRX`XpT#Q|5fm9nU&p@mak8gN-(GaLx1+y@7hUc8(Xn@5 zY+c<5iHpAlmiy4fz7HMkm5Qa6kG!o|)GKY}_B<9?-p$$R--6{`occ0v<8nj8qL$^h z34ZiV@iSm~cLm5(JPq}VT9bE8_oPdPH=Q$l>5}eGkF-E~rKyw82yEpAWG62mhvFFe zmqz1Q7KLY3EdGO22%R7s<7q|aC*&y;6R8~@#>$Ey{vn&&y@BqWc6H%sm_M&%hj4dQ zI0MF~P&Bugr4KLT?H}G_-<2c0wdZ3tJbNFRqYGL8^k&}L^&UIUZ0Eh7-(lY7xqP|r zGd|q@E??~Yh^-H-XU+Ph3>;L&%2i8w{)InLf9^P6eEpHki63+E#(B0pvW3v(FxEW0 zL8iO&JpRg4jF>x)%1MJrEK8?i`~XVFR5N$oeE#;{U%3DAjVxV1p9S*b+_Y^iFTC~~ zPyYD{#!Ve(s9K`pBMl$9(y>IvhLM$6Z|IQ(_S50}JWp+zVf~{=~Z3yR3+u!d!Ye_Q6FKEWrWpc-nO% z%Aq$k&UQQ!9LT$cIV=lsrO>WDfwndbs7Ynyq-y4`pU2(zujKi+Ut;?FDfG4NhJDYD zWM#xqHXxsfQO{UQkQem^30MW|Jt3E_LRa zG^@mLfk%$bz&6*5g2jW$omWHmSO>x?VksC?$Rp1`B(qf$zkBL_)@@wK=#drV=fpB~ z(qOJ$KFPVW`+5AaErzdrV08tP#*OCUWqD8h_%UB+hw??DdVa5F)wHQxllY@2f8pUL zw=i|yXjZRZ#F7mQc;tPAZk(G1}qPosSZ6QUdDieNeN3U zZqXO0!?zp~msR6CDcx)a{G{!azg(#-0;=PU_kY)9Zz2k#@k{Z?F~pI?;$-|21Mw3* z=;GFcoWWA>f;f5y_QN*Zk*M-Sg7PDcb*_%Dgdv&I&hdC;`I9!j06$qU`VLPZaCoBG zKt+y9GyLYxRlzt73^RbWn~ZChDM>g_mbq(!Y*5BV<2*6~$DxvMMD(vfxX;9tR!h@q znZE+!YDKPA=Z?c7{~vl5z0Tq+cN-gLM5$Nwo*F9Mi?J#n-wKjjV7Wz2q31rMQfk zd#mNEp8J$Unq%cHw;XP&wYkPw9Ojy)jy5$-<5e_|idw1PZk29vom);mHD2Sa@-(m3 z!MaYZ%9XR+;zd^rb}L;)Imp$bxs&AUBI#WvT|+(Bc#F?mdC4_SLya?*=ANBe`SAOR zINyP1c7U-gSN`%|agNw{+-2IUd!my8I13gI#39cQoA6%b$+3=?UTIFWkM2dt(0I|E z6at4Pn6a(=<-Jl|@hXipK);PwClZHeQ#iTG(5`gw>_*j$L3H-%Nl)b&cWQ6+v|{=| zY`WUeE!Ym16km#`*BajP^f5*Bi0Dt>1b4=5o=t~fd7s6(Q7~RMgF^}^oKQu|Fy%k* zhFz=&?fiPuJI>Yoa=^DVir&et0J}g$zobtq#lI$+z(H}w3OR3Xjd}jeabC2r`KP|_`y&chGGKi8*SCHtheT5h5=*@LtII+_U@K*lRfk~3D zlcDu+Q7h$O7i@!F>EY{O=(4)`+0!dT)*H_4nXqvt!8LK*mDm^8ArS`PP{7P=crB$oe3Unyr&*m*{{^SWjmCeg!uET|`f988B}M z1>=fwjCZG0`da5F?UST21x$Wuu>s2M()^5La*v`ICf~mlyCh%klnu5=W*DQFPc+u) zj;Y=ZS~rQV86NnKP9ZTak;%Mx@GZW$`V(Uwn!)2c{=#lfvX^=e$(s6z zylr+~(T!#UvNNDjMBXxz+ALez28ll>>+ZAcK^=|Ajc(LM{~G zJ(sTZFKXE?@3Mr21xDiL7m&2Dn6%{;2K;Udi0idlhF+_2N?jH;FXw-N?V7H9KwP=J z+gg|F^=&!JZwJdQK)Wrdt?6wo(5?ImhFkF#fc>wox6<@n#X8rtw&{AT;IWFHYZ?FP zdIi1Xw@QE9vMkTPXDEXno=otBB*G?Tkh-MuztXU%m9AQmTR^rEeV%(;Im|U(=~9Xw z7{jnX&N1sho2U-vKD7@_pzMLMls`0H;_fneR7xHiCwij&FVDY8>ZYOG!`x@9w42<+ z0?W;FY^gEUStEIjF=tM(@v4(5 z3g9Y7xsHq0u_5KHA3(-Nxo*=?1C*=eZX79dR1K-i2a&UOB;m3?R)dIc*)Dj*SV7_Hfrefs)6n=-8|t7q z(c3uDuf&a_R~w{X)(<9o?O^iO45nbsK*RZ+w^qjKT4_7cuY?U129%H3DDTBB6?n@S zaDQMZp3?8W_YWc9zCncEJD6zcfBkTjzCq@xb+r_%uA*dR1?9`jsS;hRUQ)`i1%=F> zna(oV8?2B$!dh9sZy6EGLxZAuvMP$_OCoqJH-z`oL-NTm)z~ZvmY(CUBTZ29Q%s&0_WabbL+`P&z_w3?n#4BcN+Y9aNeg6 z7v1b=adYINyE6@5&Ybae z2if~QnH$ZCt*bb)aRn#uT@TMZ4S#(ZKKvNI`5wOf4!->Xe)t7`+6_O8?AZ$k4!~iN z?cZ?o=kK_D=m#24{mhAmUpUtAGsjQw3>=4`tWD{xc}Ywql(1SB+gO z>S(iG?zK-=C>O5of)}3WrI=hk9yu5F&3NWgqpVskw6aH>J1%wq2|jyY+9#V2LlRn_ z@$?bS@BUQER%`el;gL=J7#IW7R>RJtYK6vqhe3 z56FJ~+|_gJIaOz#>(Yhm+-SHi*N8M+H9)yK-Mn=10xcIVbE6R>*U#T*#dB|5<4VIZ z_~;ehjt}MCm@GJ?mbz!m2LojgxpC|oH%`biG@asd{b9Hu?b#>|cwUmFJ@;R{%rDYj zC*}TXuzl{LRI6SdS(>lz>Q$~@lyY|M;?G(C$6$GVi!^{*gdaJ~HkoudA(cOUf`-dd z$;-+=B8t-3U!P8;niXRcmuwI)~Ky`f32mxphXPI-Er z`4aVYL>N5!gi#3N__FaP*Uw$!oG4GjWoec(lJ~USyYXl0A6>~_PdCoG_`!xp;S(7& zZ~j&8{Q`U-%A|wn+224-Cdb?z*%J{fog>P2{1VN2+iOyXi{EhMk?HJdijt7;K{O_cKc(_hP=e~aedOkqcyw4J}?(>m?k&Az%r z{BrytyG|WuSKSc~9Xct`b&*s1PjN!Y`_Fy^J09oN#Gcdz^=E&00P~#sP~_`QN@P4C zA#rr**bVQ_y?7v_jAEP4`1G))kAnl9y7$7~*;(d{pLE{g<1fC(=FU6mZQq~X{rZ_u z^Y!WHNZDaq7o%?jhrbBydI(4M0ojo0T^`@_j zE5WgG{|{K+*0TIx$$xY3`R~B;RuH}~v(_#)4n8}`OQ}zs4?PpS3|Ou_nEv;g}J>wa=eiGG-M;S+w1D1?p^qNUL^460~-!hXS3x`rOqn7u6e3#che~m*8 z`}p(Up5ix8Ze!T!Aq*H?MRZ&!(TSnVTsVa%o_maiYvz+yo=!qh5*Y(?S@!U1iYHXF z_@Pw{TRa}$j8GC~+-43dnVO;1#!B4T z!-*i7bD|TX2#*ZG!`lUKKX-z|{0WW-G+?;`w!qS9R!1RZU=(?J$r9eZ`9OV6%ShUie&4s`C($Nt--?$chYEsHGAaA_&SBtyVdUm!W9QMGcv-lNoLWn4VlZKW zq2##uFr{Nh-cE?)bU)zkhGbe8)}v@2?ks=0OQz1e5LPv z#v~dl7Wd&Xh66rrQI(mWlBP+U4^P9!y8}U$F+>kZCA2mP|MD0DE8`4DdD57CqK9S> zR26SPR&_?H5;<7P%77HPkrEvRu#8_4+Xd)Gm~bu{?9lf}zAp zoh#=LCToJ+cYJ~Qs1QCR#n2<=&6oFELVr3WI1oN26Te|e#>tjXbvPZOdzxPt1q_VF zw(%De4 z1)E*wF-z~1zXaW-@;DMJgfkMh9Ar85GRMb$%Zy2ct`>^zU>&WW*jy?-3(Z+v{p7QUFi|%L}wp++PU{O zej)Dgl({*ex1qdAn_5KB2+_$Q;e<~~p?8_P`Jm=FFoLl0x!8pEB%mgl)UjpU>Cqe8 zP!D`%j*Ko$!8O_sucRRQggDa4r`73l)zabglTCi#a$f_OtA)8zvZyY*4UaN@0TeJ- zX$y#}SPnk_l_hywz+A<$EN=^zt0)j|c+aP#5inKaCDbxCPS4d^+&b1Y6$Qs*78aZN zP=Eblf$a*GYks9a2hubpw@#WabJ#1q8P_}u3S(~WCJN-pK)VOpU3ccx@=T4`zesoTgwNr{G-4eX% z73WDvsmv|;(IgMbA$3R&Ipa$4%n!q_GM31ZS;R>nt3y%WiYUTr<47HsZ^pAakWG>{zh%j-qQ}Wg3tK_(CF(@F$lNb!MIi~x^NCw3^OcB#>6$ND?xBFV z0^}ATp0GfkO+-QQxVibn&dDQTzW&;(NZx%??!01B7MBt?U*B`ByyOaoTVS`=L*v?l z$2+q>frNst8Yuxx?F*61p3Bz}Gg$%`wMMc}l`skoyovUSj=6$MP|CEe- zRgcs;>@DDZql}GB15Nv8Z5G|xr0qPEJoB7mD7kNfu`17AH&W)03gQ-2ld*C*VKd|% zG%Xj`fnoAa@xndVg@<0=z`I{Q&GRp8;%_f*V%w(i9N+&AUw`@(-+lc8Uw-iyKKS5S zKKk$l-hbygzWn5`9NO~{-+cN!UwrT!pTGYsyS{yc-c-I@8sC(yE%W^nO ze}{H->1IRMZXIdgu>*IsZ)f<*b91uDlYLfpZU*_)GC!52EtCpwOX%Ghe90y3QW>uQK! zFMCI6>#)tO5-IH;Df$^LeW+l0%$5PfZ>=SMa~1JhDoETcbD>(HZx&tJB=4QgqDNb0 z&J;8J~SFk7hqJr6*5Y7I~6pob_Qa`MQ=1HTuv0yr^UIbg#!4rRmzq|_X zy${>Jg1y^e-}ms-*YM33@QKK4@9=rqAU+>F65jfUukV2k8~HpkhZ_(6QR-C3jnl`uep9Kek8u5r)K3BJm!INw*BE%pU}NFmI%m(6nNklvB@@ z>!;Xx@dp~O{|u*ofK5yIJ|&cQf*kp4ygR4IRkO##kEYl>E=^qmA1EV){=!4)v(K{k z+BxdZo#WEQ8-`;0dgFEToTsl|=EU_2oVnI$Ebi6W=k@bfMXqt<{3R}5I8Vd%i*Q!z z|L)83{K4$c9w^UpoaVX%9B!8UH$Va!n=Wykt6Za*8&{j)h&=b<%jWT$o33;A{CS#h zv>3{lix*l9^F@mkU3a~S>&mFH>l>cW{6D5)QIPw3Q@vDlKaa|U!!c>JQ)g+obY0}8 z9AA)!zrcly(wS=4< z-$aDKZ=Mh(InC9J*Fg2+^bKj?X0GcOhZd>BiC?5)-{q^y3>reiIPDt9x1rg*6Oh2q z!P4+C(R>(}%e%4Jd>aA-hbx8MFY+%N731qqa3>~gYDcm?C9@9OW#B;7B7&&CC_xa zMf&k7M`S29UfTh?-{Xy>1a?Ho;92(xq6{Ia@CWmu1i$kwN|H6C4W(;gCxZA4V0(z?Z>vxQ?6GE^+R%w7YsHJ@+Et z&raZoyDMjvKIJF5U)^q+Cls(J#F@GZnLu{RlQdu9a*O1@Aotw!G23Nhv@h0`7Nx+^ zFLHla$p_JW`7$O7o_|yNTPB3lSGXq4-z<;$*~#rP4}8X@N9OZGj3?#|cIAOR=vP88Hcj zN5s;pb9a2Y^yZ<=O3G}y6I%CA2*CUJKt#lPX`ZYdOGx@uL9Y(!16xME(D4G zgh`({`}-QOyn|gY!!2$BU317T&jtF24Qf6XQX*Sa-U{d(b;0KsJn?+?nY{`wSO)CAs4m>xWx(5N@&II3>my zu)KGAEWNX1aL9`>V7USyc6pxkuk^uVM7V6|W6Vz;6DP?=ZE_KzGm8nCTWFjg=1z=d z-N*!3@WM7$KE0XMf4SFyN>PK-$)3>4Q9W(zJRbPVeQbPeC7XV?hUqIN zlRqezvGc~T@wXdTw0$vy9 zWh~q>hjDX9QB#~n7n@ev8GXJk4qfT%+KbxSLWT?|A}ubE)Odg9%pHw?xD)QO;IR+2 zC2wL85rY#+n37M_q#UBA$i{hMwxM51ompb6G#zq$$(>bYK;Y2QSfYwzNGgmYRP-=3 z+>3;`ARNL>5E6!!11ddEKb@Ut>D;tR_LZ-J;rl{3- zgs~1UFaVKK4u#$^2j+w zgw4!1_fU&+wK|VkR8HXZ971O06DD!WWgb1d1c!=HLdIkfJUGSBZYU4=@80|aKb_sh zo`!wA`~CZTe|RUqf8|dGU@9M1OH6Shon_(JFVqpwBwya#@s7MTPEjzrm`@LX#RD%t z%rQ<?_+M9HJP&r)Xv%MBgNxMU-t6VnMDn{J%V<}a2Fz_@HWME1rx z-w&r;e_RTKu+8wKePmxcMA>4O>4j5%fT0@Ek10KpoavU}Xhe@SUgtsQfS)ZK)dU(>rp z*>P83cRGbAzj|l7OZhg=Hna=rZti0f(1|{2?#3bIUD3A2k45x^T)YRzN_%GFGbo1S zDFuw!Ite$~@Z`>^Z2cG!&;_s3a8f6gVB>n1nRj*0wQ;)3P_L*(`JFCZ2+oV9V)|f) zEF6tXqAxc6?jUbMC2<4Nxy!2uodWyNKheiF+TJObz}0XxkMMIGIPUX!-?I|vnRG;&W5ACdqh7fR*b}{B7_df z4tNcbxo2((;gd5Bce&-%*85+GjuVx(ah3(S1&&()dD~+J%Pmk{k5v>jx2(+d*s>;9 z>v4^<<~{vzsAFCMbp^*G=l#?9XW%p)|4ONpVkBU?TsJr0jCtjoRp-T_le5jo$WEz_ zbV+w+)P2+G8{=r4dyZK-iJ~c0qJMW0J1~vRaV6a0*Tek!NBPRTN4wEG-iwZ*{kb#1 zmgx_zB6d&?HgPRQj+JFnh$yDcgs6xUJk)CQ%GB* z9K`wmw47d2Y-mQJ^%qHt@=U1b>Nr}{6BHy@>XBuo=3GNP*IzUl>XjvhzXHs9oUp8r zq`Qmd-IUeJFTNzl0OTk$iw-qo~ z@Vu}UFjpY`)-@^yT$lPP_^yDvmZNc&Xx{i+`QvU~qj|JVls=+us2`g(H1E=d(jK=$ zb*3G$K;E}gl;_fc{m6AoR&5hgwxK%6*^M8uQ{Zlk=+?rP4T%BH;Ya~=aTPaKw z)K=?k4VAV;L2!-Ne0p7^(%49T%TiX;G~SdU`So1mEdbk4A>2ySa|0MEFe}Fj6t@M7 zt$0f;u(>UO{NKQG%aZqBiKZ!7uAp|?a@&H^3W)2m1&C`NJ=gjq$g@~+ZR@RhEuh>A zHBZ~;u+kEx9jxoxmZRwk&}*Egsc4*vb$&Zop1om3|m2HNU>dUR_Pb3Z-Oe18BOT}<0-mt47rAIMzm6$Y!*G-Ho#DEL~ke|>%pNEJ~qaLO0`n-=s434 zT7R{W*S5;OZv>f}hqYQV-)gtp!E%k$w1o9Ft$~E2Ok+#-fSma2#3c#mt z6g}G@y0J-~P3l@8&zmg$sFvj^cT1m(q^}x^&!kLQ7iQ2s&lR^yKY}X*cKYjfQCl7pVoP3@?^#%3EKIHV#54d{qCy-UNvr}hdS>CS09R@6K-@YU1 zsTrguCQ(*YNI^j!S*0?+Rb~++>zJH1c=R#K1cMta7`s;E7c;s#L&A872O=Zut@fo1;*qf@aL;IKeoqs@neKLyF;DXAMD7Xfc_l!v*WCHcbdGq8oA)vl}n!8xZ=@` z>k6JLu?dsF8h!fyXaz6y=tqxe`p%una*+7b?o8bZ^!u`qiv zth|S&^m0D;2;*zncQ-1v^4A~3&aYtikF*@AGhq3#)5i@MtQO#B)v~;$iRQ}+2sau` zl;idMCaWCwpQM$BrP1J`Eef0|E5_9mT)D9e_I<#Knt|*IN`z0oL=;`FS3}l1E}q{B zSGL26k9d1<0bk}1h4+;;V;?je=K9Hl7$1sXe!yR16WBRqKJ2|L_dCz-U-n2S!=ORr z)D@H#hUR9Dz4R*ApMD*7o#4WuIxf>9yG;e{<-SMWkn8^rzqy;AW!<|w)t`N`Hg5Fv zgq(s_EB=F0?s2*Q>HXZe(L|G4(l=j&Mm3hc!i}bj@~lmqZ#m2Li^n9sPVO)HwVub0 zib#7LJudf>JO`WMj6#}n4|BcT`=peqA0X6E z<6(KOBNru3(xq*$UpQ-MsV_HPmcF>oVX5DZOLCu|zv6G{(!Qtv55e-2%A+HS!LFZq zCRHBn=y^DBj@{uKKnz1W$W$d&sZl83rN)5V*dzHy5B z>&Liu{sK1|uhPneegys?os{KaoJF!#Ikg+PdQ-|&(DVlvO6$|y#Wb)6PC`W68BkTDm%kMITvKd4<6n5Y5X*)w5clUoVhNF zd*(fMdE0?|IM*td!1fzPK~J7<;tHZ9XGAfdUBf4_fxMkq3Li_{aT!eKPIB|+C61gw z!(py+$SCc3E?hm&#WT%ZI-)4KJhzl}twBGrNCk9|sp9=%8{fxA@KZ!QEeqGePlpY# zuUtqCC-!mm@(1wY1`c}l4{)V!AEz#yrco|!lG}ZI?ieTPzT^DXMf?;W zz|VowZ>!dGCh3I&Ryx)yN}@=SI}GYDe&FBUw`iC+D-D^g-!eR+}WuU>g2OyubzgUMFDjM z%)8m!$+dmx<=EfcKRh{}eqL_0>($LzmG^LQFqYz$^|%Fyw~hNx($&?GPEP&k(J?WO}Meh`E zlo!-C$sfDqK%&u4UCbEd9rM%GRd4$MD~&e0-U*biFGl!NDknT(B zs5ml~WYD#uFTH9#WmB8X2-!qG_xAI=^X=Pww(oPEl!eVxpFhvr2S4T06W{a9M=vvY z&Pe<+!%&BCRSSmUUlBnc*^GybNR*9i3=!i}&Clo6x=i_M72r|++W1jfhNm}uR4xgF z(@Z#I=_p3X#yN3FI<~TrkE~22xHuY@G;iZY-Zs_=yEtc@Gdyujal<>y8<#|9e6xJ$ z;@1_YcxPPVTyc%_z&ptg&p2Ov;sT^U?C_L%#XHE`Sd82C>w}ZKGj^^{^!IkBXMYEJ zNH9NXG(MtoEVfqtR~qAx)~UIYYs;_L5%udg%y{;m?|L3p?? zL4K~phx(B0)}M(XerznvVNiG|k&X_8cst?b){9Q|?Xi(XZhOa$^bNEpZD5x4XDYVo zKJ?A?qi2o}{mNvX5d8?7mQUD>LgE(7f>5bgl#*p$G0_W(e+9i`<|~bgY)F)nU|xZ- zq*VHWi1~&1O-;vVa;o85G#uWuWP?Aqh^YA`rW`%CBu*C1YE2$8OTiA=XfLTITmiG$ z#l$bHA!Je>8S@9?H&Ap}bTYguiE(SEv*X+z_O~2k(funa7*!$jd=nkrdXiL~L1IN3 zuClo76JW>WmD6Mmu!o~Jk1=iIOnzwmnTWC|-aYUkvmaZ6$Dl|&$0Qg_`p~Jez@L9PRbC)seFNugQ)9+%YWlvD0u0PRVs1|(O9p$hWpxdLzslB?yo;cHeP@Rs$s(o_UaNcj~U*W&{AH+g2E9On~1HHR2Ui=LQa!ni5fCQe1u6V#!U z#A#aWWZ85|eB$&x5@!{VFjKCdl`HbE!xXjR5*<;8PH{7HMDk3$f_BMsWHT-Oo-X~J zHcK|Ta<5dWQ^vefGUk++a}CYCrsk41r^7lm!@l|c{M(MveaLJyve!5j7cMYd?rZ~fmH9QZ0zr#dfsRg4t<0gFWMk4b)WLid z>=orAWp<@^v@3Ub_cC-V{S&+?npjP@V0mwb_Q$5T4TUoY;9nkV0BooHAmWruJfyok zQx>*aUdG9%g5N9sX*66M&LFR*Id(U2mI!k>`luWFloBrBE-oq~O zKJ=FRbqR7{h0BNtd?q9iI6cjLRBE;8&N5>} zKN^n{YcNsSm?CoPy;l7Js?Ffl)C3!M}7qhZ>r0cP&#TB<%$9I0G6!Z?b(!@nzeQ_3irQA_tQdkQ917+Mw^r*>qG zD`Dd1dDtbXquCzxO!CAoGl)e`Z8nZsI|bO9k0eF224dsa9p%X%wq+{LB_VW7uqXfS zfoA-B439P+AY4aB;XXEo$XVI=4~}8T`tclqeC7F4H<_Q7 z4~c}9yLF%u%j(%W*EG%Zuf)o$wc)i9d!^&&LS>U(TK5g%#qV1vitvpt|UZ-IEe=1+wNcoqI1FMT0;+p43LB(0F=(qEKFn65M$hGIkdahZl&J1X7uN&e>}jupZ|$hUb&CgUfRO? zr9;{I)pH!#|1RHt^*rBv{UR^Dw2eLcKjORXZ}Q#;&+_G$FZ0VUZ}aIV&+_qme_;EU zFVKAEJNE5(mHN7mICtbzF4b?Rxqc_j4SQw38bDk^C_y3qc&gD`A6wG0^C`?Pp{$^U z!DUqx=H?KY8ck?P66NbBle~T;;Tr}LB7GkwZ5_2q=9f+C<6sC$(x>s81`#1`6f6?9 zWtiynNRsZBxombNzsP%Ozk~lfn`z1-+CP9XRZ7%L(s3ob$4!#mf%d`a=KiVAl;CdfWofdxCo}ZuILYX`R7U z;#~TGeOD9S=+^~&`Wq|tX7^SwzS*xE7iFz--m?Quj_tYT)SDa54qTRf<~iA$9uIP+ zE=WRuXU_V#(&FjOB_|Iqx%hI)FM|Evfqd@e&8Z;+;P21F&tJgN-JCmmgkxvU$SUHh z^!QaSUTUJH@!T!G?#pmo!QIn5nw{;IWRJcl+>1kDZk&*H_UV{F7&}tx`3!9T5q>%Vdr!%8Uo~K~ zVFak+P$ z^u=)+n=ep*?Is7VU*+b72KZqIe@{t;Q~!rx`3ZH}DV@x|pLkqveq37r%r!3GlyEE9-wxBoa(()Y;4rzFEU88A0mICkl*=<{WcU1{Xh`34z8qSW$Ffp2x9d8z3l z4Hqt%w5w`neoPefgXeiO(3Jy05nLQTLmK}k*H6neBG;Q5Xk-UB5B`}w@gAHC^rU&! zLKz6#IN}q*!SD?D^m{4)CO6NYr$xVlUAh5B4#JvA{1DTHzh=vX_0EHwP7GpyU^o{R z+$(jKKDZ|JlMZM&e~r`9AK#rgN@LwGT;6&&Uq^a!Ff9u1+rYKmyEuHTk>iJ3ICcCo z2afOM`$O;X-LaRcKlwLN-k0H?RqXeRG9NWwNy=cXk2~>!ZUm=>Pk+1rGj`r7@P-o>sTy`5d@(cg)7 zJzAZCcInxduD$xwy^kH;CB0|A{`7Y2Pah{o1ClFX-p8dsevzSsCdOjx?#!J%y3pC7 z?|%i${}W(t^2kK3V7Zk~0oPtG_Vjk`XTb7>o0cbpnbSm0xTrWCd6mCby}_yj^HBojMBHdfPRb2=e|xJkL>%&stw z@|06IX|!w*ho_T2qmn_Z#*#a&6qj6IQpQWZS>+^*%Ornp1+in($(T_@!J;a1=9E$} ztC+NLsg%zxr+iK&1yhU29FtAPh%6#YWAIGy!9OJ!uP9%E7Q?^shbb`ifrKb{DcYHlu@b~t>Kfs%SU?2Qc0zL5YcQaslK!6)AF1>M; zMNgEs3$d<_luKJq&dsGdCW@>eKN2JS2?%k+*0VP@eQoIA)`h;o{Yb6JAhIlhPEiin z=J?}P8%NY6*>EqBjl|L+#7lq1Ib_r3^&#?>2NLVbJM;w;NL@M5fb0s4>#>HKu5l`w#{$hY%vdc8;Q8f*%qTDbdBmI&!e)uy&Z{J2 zxolcw!5=AY6g@hZkbx;I`0X0@-8hL~b~u0e{8i@Oe>XF>EasK(-=)2KPZFv#h%QMq z^ec{0u6(fjV_DZ6;o!A8?tl3KerefDNO>fus3&Vy3EsnF4d|^@FltG!K(}QnuE%N_ zs@CFqu9o9gynX~w%W$Wmkp=))aNVL}QJ`GKYhv<0MbcFK#w8mGxCNLyDJ{$3FcT`} zidx8eD1FOF89Sq54Y;MDTH2~ubSr8d8ZajDR~i=YQE?_+0WmkJll$NZ+y;dkpgctG z6{ObZBBA3_2pgYD_=GeQCa6`v)Kw`GBBrJjH9gauTM|Ac&4{M`D^Y+bV#dFh=-F9B z&6069GlTHyQr0aoX)`2F+SZZ?Y0tJ2DebNESD3V^&R=>SE$yyp8mH$`lQW5)l11z^ znZKsWb4-#lZ#|oeTGMKp=Fz-Xe$A_*lsggQ(#)KwqUZWiQ6+SAvI!HWQ(g z85D*8&{zV8#}hg-#c+}*jLIXZDghg}_Bf>bl0UPSy8?QVJGF|q!I{RHXP+1ssuzsl zPVa6qZ%0!#Z30_a#qp$$Dlz9>Lme5g zcszraP9$bvwxqYCM`(XMGebxnUSPm-+e8mzQ64uskEBT@gvgw36V{u4`TmAyJz${d zip)Ps1!6eM1A1_$e@{9G+tbm%FTKNEv9Z0A?*9GhF7v02-CcAHv?X?AJ~qKUiJ4Ml zJ`#J5Odw!XsOk_xlyjGBR|A;a zg}cZ- zSF81Tt0+M3Jx0c}gx0wwdagjY1)3`$u3&DYT8NA8tBxyhsX(uS=PH^{L30%a*cCKa z37C?C|701*lVnVpxuTV(MMDcTSI52j>l3#L2}CR^B3RY}dh9DYAGWX%uc@i@lX2g# zB!B_y#vA9c>P$9kLJ2`7(bz>fQ82DlHqc|R>1jjysA9%#o=Yd$5G!>~*CY=*$GI^7 ziFKk!U2shCqhjuGMy#Dq`yg49MfPLx`iVH?`OqQJmYS{O&0L|*niYUjt4gQAAtcF~ zW7*TIS@rxz9{uR|{Av4(^h$MP%tJHDk$1dWrH4&OH=MtTGItkk97*QtL55-`XWbBz z7Zfq%f$@AV>-|t^TXo8&V_qd^O-(Cr_xv2=EHi0knE}6p=422$KfBcmTCJj&7aEXP zdBlx%`Qlt-T^_Y4$6V9ugwq1HTSIktsp-a&T%C4G{=hk@gf7f67OD!uDM+rC&r!=- z9b<+slKEkw{`yJQWs9Y(r3I$!gu7cq@z+A;Tk6$Zw+MtdyTS0X_ z*HEufFjawY1$He_FkHdE*fr(9g0F4Ca?KO7y37ER{|zix>t0JT?jQR9ih`T}LH>UQ z%iG4cO|yV=J=S=u3@hD=YYURA++L2A_jW*CL0rqK-AdQ^|8b4B(>5vV0jY6-xQ??CDQpiPxT zY^X3aJPB(>Hr5gs-?mc>hmg>i2I%0ek%*k}l7ixp5fj z@_tENTFZ9MF!Xn_&tEgbIO@)kwkTXan98LC8N6U1W9C*fX-1U+(YKCFtJJW?CY z6SA)Rb44UCmWK29{2<=W^yA|cZ@y3T=BH?P_Q?A2P>>_1f}D(%_$hB&nq-aFEYjrG zhl|dAx$0yK&i3Hr1}^qobCNjc-duIJfw(EbCThp==G5u{4gPpH!}R->1W}CFZd=koaPB5;oCFt z{Ta?q8_b6V;qcanaOy^@(XCpy{&Ex!9hP#G5n~@mUwoFIwr%3s@_3$0a^(GJJN6aC z@MTsytlI!Pz7zQrUj74TW{=<_S@-`C=E~lvKz@vg;JvtLUQbQq)7qi@FlPa~AH0`C zlK1+~ce(oRv%FoB&ezG&d@uX@U&8(QA;^n;(NXLTOJaLqJYR=PTC6X7V>@v)t{ca~ zg896kH$O(jvo|f1ul>ULE-0Msaglrw;LfMPzU+&O;U{Nhv4~|yWIkUPkAfH9khZLY z<^wccspIVBCQe_61J`fLb2r2GoxGWxD*f_*OvAzrx%tVTSyv*RCkn#x6I_+Jqc=`- z@WwH|zWOs?8awG-T%I_XQ-1z@l^~7(wRH5!>s-8WlcuZ3XqJaEG%V+o2VE5G%n^8g z3)|CO`61L39(q*LB(L1^(&ot8`c zX}&CtraU;O55oC_5_g!Z&BvwuU83yE_%z-{Iw~3z06yEojjI=FY*EYXpSk|R{d}Jl z%W=t z#D41P_sbp6No!ud(Kz z_k&`jeSBydSPs)?)94Y!!Po*Bz$dwIQ_{l?DuRqR}qZhbz>Kgm&!jXK)HhCnoo~=Il0i& z(b-s=t7Fg}eO2s@C~b=oJ6j{Rt}X^Jw{>$eV0mzSG<{rU!`H2o0n58P|C57UMZt0v zE6xJU+k)nrW=V(sQg6pL*E`r69_*gZcJy?!W5LE{%-g)29`bVNAMZ=Q6kp>ot4E>- z-4fmZD_GtqJLrD`=J}yGltkfLm4NG@1U#pt<0TtlwZKiBUP$i55{kzbQ#vxA0tKK) zCy_B2V2Q35BEQaIx2$IsDWd^@6?gKt00z1xV zWD}gXw2~~@WW~?OF`$uJY-Y_XCr#>^Iir-4MY3R?RYSqtffUS^Mdrv%qK2kYvT!hE z>cFldoTLf4R4$hn`P2f^rWF_~%;d?rB2wmw$@pr^K z(u>;hgBUn@I6+Afq?XFYG&=?7Aa7g(e27VmCMM9E{OAx;eBBAN?@e)3D1W|pBX>_7 z&qJG6a;f8=TF&2Nq$U=0V!bas!r!jLE>gDiX(n05YePP&BvJSeJ*@CJqTZl zIFYgbI0yDO;9Dn;ZrFx6kW!s4_l!2q`<(Mb@UD!(e^3%(qq7JcDLOqQ9^Vnkgip;U zQuHNyW+Ab&Wh1SYzH?=RJzM%#j-zIXPRuVObHyO4w@qQ>6ALKYI-WSuwTKz{WUm@R z&T84Hh-9slh2e79FfFYylD14X?Mnw3P(EQnrKHIQRu+ee3#*8eg>v$oDsq<$WANtb zcoatvGbEGK@|M`yxQ_#ukMiVO&&V6$5(jRaVeOx`afd9@Vyn`KEJ-xZJso4EPm7}2 z@|XK$`PszUXE*WJpI+y%T=mM{f8dbkWoSwi09VVMR;rmi0|cokc&^~L1(0i~Ah`nT zdT!`dCZ`iVE6?z;YrLi_Q0_Y=4X4qucuh_AmWEHv zAaZgR5tA|r9hXX=T%$mtQVl3bsG^hudLA}a^g}|WABdQqNwjh`&(1ZW#woBEAe(ai z$@hN}YoyIo^kakn$OL1_YIc zHl5^Q`P9xEL(1TM^2St?FLUZ(neP&Y=Hgo#OXoO8na2tV8J}e+MSO=R(KFGFjIr{Z z-EHVDW6mknpQNFA_~l2nTBq%d?NE zzh_~%af0bm5kkVOLh}(wt;^Ml+<91}@dKd0((oLk6h#`!xR{V&0Cl%fQFx4rF<`b@ ze_QdE=(&nogsUiUuD{e!zay6DuQM#3biHq|yx*0oMX6R45LX%&i@&@TAXi{qt;i)! zL37b(6+PEqmgxA`U!-`;xsRj=$r$pVk!2)qaT#|e+Tl_f%CJpSaLDq(rk4%F?jBF3 ztRFgfcVocZ;S^7*l6Jd;q~W=Yzh}O2`f20QkxtQ0cosx6UDk@KKQ^*?jUS#z&63gB z_;sUetOI3BhZ#rGHc{Oe`tUUK@j*Yv89-}#HW9;;i5ZYg!jN>nJO4AW!_x7Q&Gu25 zFNbcNOxW;Ls@IM)JpBq@q|U9xXILV+cguXfq?UAf4-_q~HI6?MWGzs=ZWIHzj3+|o z8tuQly9biFw3@7CHRP@yEboIsq%5x{edPcOHx4(v->FMWj3s);-Q{GhsFplcWUs6- zVcJqzuPiGiV|k@H&s#H){B;9Nn6p~SmHg_!Emt{kC13LLax&LclPP&pR?4+2tBj*S zQi*NmisOzREnTw;R$g|AMzxC^wJff#d zygF{3BJ-m3qt0zQXIb--&S_av-;{;LB4&x)`g5W>L6XOeTzNb(*SZNPGUZUxJ={SAH2t+LySRS&D)3Y6=I z4n0;7U-PJSdF`Xq2$ywFhdgI$e>0VlPc1MX3%w>L7)$Q#EpjiBUpea)DBsxnYX<%J zlDv8nbVgrC%;I@L^7VvEW=6Y;hZJ(>g_4}dp8m@ zvnehtBP%hD%G^Rqaag{LX{}}!FCVCVnb5h*;YC`1s z1MaCcV0qlu;WB4S+sV5|!SW&Z&mdji9c{sKZJ+-QSl$-!z8x@coBr?QU*)yVHSJ#k zWWLL33@;9=w+Mq)AM+0QvG-Oc? z1LPf6vaX8!^`(+lO!>+}1}!gS^x}Lb&&g$$yi=CTdw89!Ww#DV#jsEIhSeFbGt1%GU9#r=jr-SGIo#o7Td#(Y%!z$Q$|5 z{K?OU57TpaB_Wl66bxYdl#TGkF|HgsF3)ff-unX=o?Hzl4@lilO5G3A{MBphS~;E9 zvO{?;(w6spoC9eGS8F=AodA2{mU;YTMz67tl z$&Hs@faFMIJ{q;S=y`l2p7-&$ocDgXu9&FoPQ&AlzXmP%wEqx zjz$;2eSd*{&C-_APDfhlTK3D|CBCL<>m>F@dvMU(iJP$rT=0y6smrAO&T_D&nKKug zX}Wrav)8XlKgdAa@fz=hbmvgCFQjE~*(;3iy=Bn-C6{X+(rA#KfT7Rao^Lwt!%k26dQR**W=E(dR{Ol3V6~9bQdM9&! z(i}2nqVkS)CMe#I$mA%(;-iQT3&z#vE@Exk@ld|JtZdq2-?5tk!4)XiP=WG0yZ8JR zFjrB4+_EfJ0KL0|qp>XSX7BJTSZ=J!Mf7J`%5UCTCR61&SFpUdlOuMbR|=K~#YNHE zr9XFc?`&vTl(W1o_LbN4pM8 zS}~o>;rYbYrZRlhc!CGU$pR{s!lkmiEK1x6d6n0f(2FPIBi-!SrWz%OCnYB zL{vwSGclhic^PMp%%w=$AY*VgLuZXNju)N%U5SVfCo(#W*q8_ce7y1X_QB2F6Q7_U z+P>cO771DL1V{T(F`$Tw>H_-Ob)x-UHjErz z#?)!U7&WGbnjs~`rG?`a>W-7#H@Pr{?CLxMVuML3lud80^i@;{?m<4rVX3F+Oqjb9 zzI}UA5+B2+d9%4LFUW`1tz=krk-Q7`%lzBO{ZDKmB0YrJcTZ!{nmH_3J{>PV2cjZ8 zS-oNwdw%(X9p8Vzqrclsc!Dq412V`RTS#Yl`6W(~zMoQnYjq@^RZ+%KTHzeo+zv~_ zqcGT5mgkHr#52YNuK*W3JspUT3L`QkfFM6_0s<8zm-Z4-uv|s0&x1ld36$sb4|E|a z(1UnCcjDZfh;wovqQ4zco=%42JY41;rvQgm%W{{_*oX8dwJM#U>@aLRyU;bNKRx4| z=^WdiZVAqGk(YJ1G*|430T#!ZC)%g=$0lCV zlVp5myV5RI?iJh1oZCeAkn4N4iXKOHYn7<(Cho3exi(40af&0|ay*Ubu}zFz8`T$^ z2wQA|dKrt|yvddP{@v%e|Aj~S%}c+-Gs&M7Pi|$^)AtimnTC!1U8D@lCvHF{eIjLk z3brG#Fp{;;Y+?MS>E_oGsT1;8`?ve>u9UfGM1rARQIK1?*$t(PgbJ7|P;P|^qN^x? zu6Z@Iz;Xr2W0b>vL9wBsQRjXNjwwjyJSGlb**Gdlrr?0p9TI6MMZAVdKMha7cceV$C+|j+K5C zz0rKWLlX%dl8SAzC;iiW4gHCYcUN4qgGd;fjg50Vx`#V3YRy#I`}M>j(bLds*~YpW z5PjVG8N?0DGS=knWCNiV=4wf9;btteGbWW8pwzcIUgnxu<7BaKwlBVe;)xocgHv%Zz60Xun&@bp3*Q;oi`212 z1Qf>5FW!sp!H&2l1z;!hTHi=ddWJe1I+&huZpO*3dsQ@cC4uxT@}Yl4DBWb<2(C;r zK)Fj+FqQL0$g{}1KS;)}V|zm_Q#@@Ty(3)=sPCH_!K96InZ9`ewh=CL^z4hh-0Mz{ zp2mW`YSBo#CpsDWknjoV#Lq4?{ih(Wg5_#at{}Oieh89&R^V5yycHn#92;vyt-qBr z#Q@^BEWjUIn?HVn!dbHMUN~A-)~A`Wc`ieijKwD}jL%R1z}QW* z7`S3Qh4TheCTs4pB_k~0%NVqNGMUpVs9rXL9ar~Bo}qGHM)9J-vd*Yv z&Y#vWV8cYpSC6K2|1cU$3j)FpA>UgG_mas|QlFW(aw!YAIMX z$i$be8*cK|tRF?q+F?|!9!8m@)od9}*+Y83iOy%{6PC(xp;I zk$hSElr9@W`Kl2VEgMY1vH^yBw_w!(Lp7xmBKo5r|8iH>n2&+hFLmN(=Nis)l_>qi zj_8ekm{i@?c}wRiotqR8R||3#3pCfz0?IYNg5_#iuJQVjK`q=J6f9TH@}zrejdgPVJwqAz&?NJrIcQ8WDGSQz zKRBGhPtG=Ad0Wf!tXu8(-z>}3g4{Z`tjqP61Nut=wJa~ae;ma!e(ub2pyZx0R6RVI zsQHDsjE`!E6Q0!xrS>F)6{sDadUB;tHf& z7UmjfS(a-V3XaFGC^ula9&0&mL2^s>!9&!u#HcmH16vVbba|39r1-PWQ1=X#5 z{|zix`W21SP(fkkYS(ykjh3VBEp4kj?g?9JjYWB!oNGRHLYc5!9i3KDvuzT2E2WIN zMFubrmv@P-8#5MH;8__=a9JoXfBp>r_~>bN?Rtk-U$~DKe!q?zO}}t#?*|;+|1npa z_i?Fl4-Kbwa_QV&xUMFOXSvk8pYx5s(AfARZ@=@n#2qzqjYHhzxX4K^i(I&Rl5tap zF=O5o1`QubXq>DC)G#MGiIS2sQsNS*Dk!9;yo9toSs$eZQ!DR?to0*_*)Z5R&y1Ak zi;(`;wosi-TvKJ9RY7zG%R{8CVm1#omgUK^cUG``*aNf3TsxH5wY7#`B~tWA>1vW> z9Q-%1T#wtHTVS~*7V!P=Bzl9~Q}XHcZOhU)O=}B`|0{{zAlJ45%q^fiNq^NKI;dc| zQY2+;5Z#maR`TK+e&7tlpIBr*GGuNXCG+QqR@pd&?6so1t7RTtQAN6bP`ZC8fe#EJ z=)Qr54n}{KpmR#bS{a`*2C7z7GjLfYLl=}XdTue(7M3%6eg#veI)g zaB=d8ao zC;jZHmv!8Em!4d8Qj78~;LuT|J$T4*a9{B2&K2i7xaNA7#7UY*Cy+JlVfX%g9~Qw6 zgU8eI{HxG(M)b0t`qRHqcVhLYTV+{``AROdZUQm;i20 z7%KU{;^pjU8uByY^}oVmn_&6ofScbnA+LwD2PlwIV|4%j8v?0*A3 z|0ArO%88;hcFXhDO`8wD$auYQUY=WxsSn9>%NRYf4^AJJb~%Dl)Nn%DPWjH2CFGNb zIlO)}$Cs^y?NSK^{p*i%^Ox;1v?cx0aX9xAXU@x9a9zric>(oX*?eBIo#0$!Jx3dl za{9&zPG37o!^I0UwcMoc>Q%XiFoI ztK4W*u>1r!p4!OAxq+e}(eR{n!l@R{Hr(WL{Uxs5xXLd#&u~>bpJThYHgq7(uD+ZL zi-Ye!mqt0x*(;5lzM`Bd(oqeKa^AqHtBqW3lDJdSXblHAw`>LtK2e-=6oq>7WqB6K ztMjn_OhK~o$yfY5VhH;(WBJmzA9WJ`l$Qf<{{!BY=i9Z@d{yG}Z{fc6G!Dw=3#aae zdwbu|d7{8)*~Kwg&`aCw{Rf|ACGc}#HmrY6p8vW$(lw4>x&-;x#tg`NgbY-K{JIN-RxFfuw{5 zlNlXNbZiunk>T`jcNbxIwBv#NGLmfC(XUf?Iw}a>$JT@$6d>=}+l1D+T9B()`MTQm zqlbf|;Vtjk&yiks{Y4y%^sv7r{p^kOadt9%)C!g>XSssqYFU0)&#s1o<-dXD|IM=e zzk%g*)-E!fJGKnM7jfHj4)NBIg z77#YSl-Sv&WKS$6XG{S}qq7X(uh*0Wf@UU=G%B3R5h9i1kd!V#@t`TTNYQLcQx*|W+GP#!%p%{cgr7%rQ(A*sYq z$TOU_YDreOXpqPN91Hv;K8KvSvca01Yp&0oTTalR7($1}ktQ$PN%u@+&C}~x{Mb@9 zJhz4QPj6<+U$!xS+Y)ANn#Z8&!*C3A!6(eufYYI&!Gwkc;o;(nmzz6|j?Q>_`{M5D zVXVv@T%Bpxy%U}KcBez{&UCixDt+3W@}cD<=Oz&l;Z0;>2$}hb*gJM3BGQ|Ig9-=^ zbtfq;9DfP>d-S2JeJ5GS^(8zxoXm20uA~SOa*~M6NFX993bz0c{6pmVV!{bZyF?>e$oC%a(}L5TY|9n6Y#+&%O2(Gv<%Q!^aj!r>;zyG?)>? zN*Oe`kU_(WarEtjXN(&)a|RhO+^;s4py4UFR7o8s7gD`)G?7D63|FmxMHI35!_3f>PCCqS;v|lfIA)e? zv1AJ@CeOE49UotHuDknw?|bk5WBfy7sdm+_Q@eK2u9~%KE(9!yN9eLNM6Aw22$r+Uv@AMm78U`HkuX3mv`H&Nge&|EsLf+O z^1y!r%Nab^ahbEQra4o)Fefx?lru-LeF;;nsD;)zYnKb)ywn#?#TpUD8s#IwbOy_r z!h(et%_GIV)K38A)|p-~O>q;TAR9Z>8Aar4=1tder!yzBP6RhIzcbwv@hkj`fiE^6 zc(Y(0)ye%Z_Ot6q<;La7*Ib@v*LzbqVxrCSa8P zWE5_kEkH@+w*PL}C<8+?j&KHJ9EaF952!v9L;!3Qc&|d_Mu2>)Gldb`5K$ zkA^HOPypp)ob;h*ISKkwD@=5vZ>xhL^k}@8Cbz&;l@+3vXF*v(---D#u*j6cDc=`* zP7`1r=89sP+%x^mB$jT4;h4w0T%c5H*tLLcog1uN;hrbi1a z6NLku!{veoW|Y%ZW*uFI(W)7OYhTZqzH4ry1xU}dK+k;e3htnrmJ&U9>-f6}FG(PO z58gffnb=?*>uey>;SCWz`d;W+Q=4ShoHv8a@#5Ei5+{D<9ats8^wl24>`9t z-qaHSIE`0)5{4;R{8uI*WL+wP*QSW;(Di8uT%80Tra7au)JvkpbpX?xtw|Q3ywA#5 zt&zh`Nr*j|Ck&Vd>`X%7o@A(Z#6i8CxyKU(|2PBY3{WzV$b8OhNYQ6Qyr89FL#ctA z889cIwEQ+D3N3vGUP2joBsY9#Cc<`Q3hrG2nD0zO=9zI)CWC^ao)P2WcL1C>v3Sa}a$b zS4hm!0)*51js(a5C=5h0Aj#J{pj-!@GjOZ}hFNrAaR|r#7ov+ZGA_HiG)Bf7>Hk;4 zadcYS432Xc|CYlToYtkI(>7=SgRlcy&GNt_Ibu_Q!E)9t7bmvnha+-xwwOyWSk5#o zkw^cFvs`RouuxjMyznzwbbfwL%oAk-7-w1?&LjKz9zQ?k(PD(}%0tof%P=;|0x3sl zBjIp4&6Q$cTIhw;C*~k@FKcpB9qiMJI7z^OIiD0Dm%-8iYEMCX=pG4cnzK<*`T96G zE(&~bkHa{wKea*TfM)s@c3E`y)YNWO)Sfk4*}$zfE~lr9$Jc`P^Y-H;LM zjkGv#EGSPxLWC5#NdZWYQlls>3_%(vq$c=a`O-XW*gOjbWl?aHPRE!TdhnpJ&`PEc z&k%d~M9ZL{dAE&+6(nj;cxt4ulQ_e~*$!?hITF)Tq0y+25EF@{&b|F1T?{g?i@RqX{I@6K(E>09+dGX`Rsht%* z0L#7i=LoRekJ{(|Tfp*g2FtfnJ71fLv-iRBNUG}~R+KwXB(&{SR5r|quA*^~jpO=I z8xP%Cgs^QT^xI+~q1&mw?qH4dA_Q%t{=Ac(vojw7+o>Jy%B3;1l*UeKLwu@eX$00D znT@Wl)9Al_3aI}DxcUQd{a4^3`G5WnL$5xMzQ>QCZQEuvR4znSUOp~F$Ks?)gKyp4 z@T;!^zpCAEj@F~sCH82P*x@copSvXn-Hp*|F%EZW&eCE12nL+S170%#nllcX>!F|K z5yMJ%{A_Q7H{E6UdeJg8pZFBLZC5ZjSc5*a;U+o+U_Q{^Dil(m4~qpZ-=ym{^mnxb zLyhQdKL_+zq36TraY<>0E+-3IwNRp?a5YeSjo#}Nsvcc|ef7<&F?de$IXI)>5OKvU!1yQm#xY7;8lzr2RCGC6Kp zxnMY}h$^=MgH3hl?HfjKFXfM(ht2_-6!(z~Xbpri?|Bnd^k?tln%WN+OdWAEDF@&k z6V`aA_ANA~Tj{rVs_@IAG(p+&lf6C~gMx6%$`Mr(1Q}p0KTTi*fNZUt^qXm4&crpy&E;0o(_6G zOMM-BUV954#iihNdaqx+198JI92X@@T%^u<)k}s`4wkqflj6FA9A`BN)Oe|LwRYlK zR~J1|OLcyywVmFXUZ#^8^NCMzHP{>1Z47YJ$r8uia-*W|c;}A|dy5g#V3vO6zfZfla_evFN`a03j--J7zP3WnmxXu0OuA)wM?L7MS zuf}mNWBl%9fLls8oc9gDud-m=a*sltTPS{abHynaCtPt2!qvbmG;N|b@yiKnN9XX< z-(G-?uJP_jLg;0eGGG8_18gE#R9|!3pqj4xU0cyQRV9cE5_d#$L2F2NkCkun( z43_J{S@@dou~s<)=F^Q#?~BO;u$(!|*|;amwEJRgX9YKHk;qpJ-T??O21QyVnWM@|j9|v5=eQV=KV&>46Ua5iBNA1O^yr<9;Z=8bc4alm`;;m4Q@~GHEQewaLQ3=jiEUVPtEB;swP}hA5y2 zq{-f_ER-%RfZW#|W>(XXl^X+}08gw~zW@gx--U%MDrh2S4XK|*OxnVd!f29b2UB}9 zAsAX_=b%ME>2^10u+-$4`PdUr9aicM23|&tfB@B*EwU~q{<`a=z5Qm~U zSxCwZhtkIdV<+fg$L>`qtH?lJVFFUJBjFdNKnRt=>c`f>EW`m*11#Z^=L>0BsL(R^ zsfdCJO+ejJyx~793L$gi5R?}VJEbig-L2u}

R*!f>{SS|No@E`f)a3*1PUuU+Qt z4kb-8lvJ+jAUTu)Qn=Fu#arqO4NYKW4pvaP+QY-%0&*`W$Z7oGNiKusW9c2trPc_} z2!~^!I}E%`AxTmrs4Rx^k$~_8w5VN33-$SN2waqen6q5GRk5jZai>Y@k%Li*%|3A!Okqypi2F$m6!M$Ce2 zIKVy3@6!saK#HIv$2zCRqZykS6X*CO3ZXjcmjZ0d_T zP+TVrlrtEvqh8@_7S`lp(ShlFpTl*Uq&f{!p-Ij_+7d0@0t07!pEc2STH`tz6$Z%J zV4h8hS^(wN#VS}9dc&?*{Q%@;!2F+RSjzn$faT65+Hf6+&cgRuo18`P4bKXMdl`k1 zF#QS}`cy59gsL(Mip5dl7&U`8?6ToF1-%=)Isj2846HLPg(sB>-(w9&*}M<|6fy0> z!(8S(W{z-nwVdHv?r_e7d_IjSi?nnGJU%iQ#MexZ!azEQF*w9v6W?P$irf*%<27SQ@)v=Wj@s_)w^SfAFT6~ln%vT5DBk25khmE zDMo|_c?H$=Eap*<7B1gcE{cKo!dL;6TW2dVCCnDC=^FSHMPdehPXbF~AkPSZiJv{D z$<1iIj)f(CPdpM;LSvUf^QoT3!nkMD>}2Ro(G!5UYphZL=7vfe0gM-Io-cr71}S;- zCvj1(h^uEdMreQ+Y@93Nj&hg=rryX{R}OUn1K<--c4#^DJf>r2lpCCL{9#XR-+xiE zu$5pM?+(wBVDcy85ycE)Xn3rrAv~!6`{h&lrUxN%RvO%5)R4vpz$rqB@L8#lB>Q5r zw*^chT;QG`2%iOUq7RuRd%`(gjZvO6=-K0-XFmbcH8jq+Oce${-ICR!Tpn?m2HPl4 zgp|jNlPs3>eP!+Xymb{YQ#!yzVJF=2^v#$kp}B@^CL$K6!XU&Ne zl(SLMe+8C1Eed_GLB>Ei3-@~tV@f7Ial)G9Od-RYYhujcaiua`yhqSF-cZcJvPA2tyR zEPrAfwLL4rLC=7B(u#cO88cw+h9{1{Ciu~JfAR!gJo9(#|MVFg_{&q+`O-lw+qVv@ zj&8!zy=zgjelB*uauj77=VSKvrFita^Mq z%C;^RbUjNBZ^XQPtFim7$FcUgJ=plt0W5uT8x}vl1q&bB^g!kx+k|n7ayV1Mu!O8l5_B(-Thb7?k>(cbW8ksWAAZ~85%+ijG&?CB76F!19=2-% zbH8mV2q0kqoB?y+_3?tXMhAwo)*^GD>s$uWwX`-A#vsl1bfI<3^uhcPHF;@JH{C4?3!) z@`yT+Ck%YDW;uWNnfi$55)76LK<;qSgH405` z;u0Eh8aHqXSCD^r9{iTZ(YO(e5Vj$-B2gGDmuIQ4oW`>8G{^YIhcBS6>LQ)tRT2p2 zP-{5S97mSu1!=4ora9}w&EEsY&K59pw1k2SQs!5;FA&i zso(9Uwy>4@`I-!zM+-_{T!-krZKIaUF$ee``=6OSTVuQgNq zx^ed+Znm67)wQ3{a^qLDUH%o_BxtDybA;o{@4yA}vz+}IIC&iS_A~Uo_$0cH?nl$6 zHMlXa1m`mo@N0+~KT2$I!e%-eydBXju|%_z5jtE9(M@x_X0y>~GJXV|5;L5p@W%X9 z3_tle@Wb~&YZZnEYth|Xh4!I()Sv?mL){qYxD7P3W;ui9wH2Y)nWEYm9CHe5#iOB?WVh%NBeUx7#80@myWj=lh_*oqsbPUPPS zoVx^k_!sx|k4DjRao{epmhlS?VactZbR*00~!Zz<97dD zuvtcC^zQ4Ve~neZ^V@M;>5MC~MBtfk@%!vmXn*I=LV+6Hb?8Pd{Z*k0o#-Fv!tk9t z7;I@pduu^|6#Bk?5)b;nFzqc8v`T;M+s(?HHi(vU3*1Tp7 z=BgWbI#>-<|3;N^34M*<;kyIN@tM06XIwP+(8~`OiYtI!RLQK8Prqqt93BCdHw(aA zaF)0AYpuw(HlyjSC-Aq7V7wO}f!0@E!%#~nI)|90WQYoZQTiSX*Iz>Qqr32rP(S<_ z6@j5+k5L1wM|WqB(ER6UeeJ`z)7ytL6rbgG?;!d*=s8TaQg;zw&(Fsv@j>`7F&g;p zNA$PSYf!xnQd{K;Z)>~&bpAq}?R_+?%*RJQQv4noieKHNxb72-pM1mdwQmT%ReIyI zU=6P9UJIQ1mfrOS<%KGEnB1FR;c{#cZYYA#FlQfi8cMri7(G41O zU0sdzJo;Tr4X#jU{!@4u-cxwv2Zb6ZT_pJ3(H)m%-Z<^6z_)=^?)#}T+-gEcV-pP? zlq|{F_7>E(x1za~^=#M}Cl&g&3%I&+4n9wo;bmV-oLRSu>h2a=+uPVCsAz2c9rw`H zJ%FL%UaFt-===5^d=(yvQ}SS(2~Gpv{si}0+8BNZbMD^0cNaY!d>n(ugX$`DUOt8E zPj12oDGFhv;rnoJd>rJD54?l%oks|M@(RMq$PipD$;H5y{WNHuLdW@^s0^r#?lt4v z4_=4al+g%Q%b`}tq3}@v*gz-0!#UU&GI~$PaT5er`Of$_xIdx?Gn#-h_4*WG_W&+;D(eCojR$<8xjsIbK}r4^=XYy?_+ssgbZg85O&7QIMxZhTSL}b(n;oy=+kL?1Xx`8m~G_5It!kQgh=l>(N#4 zpC5y0N@v!dGHiKj4W54f0MvdGD#OXhSV#+qQd-1SreX18tMTj)Z@@WS0cmLvqSt02 ze04ga)@2Dz;K&sj@Gc33lr;{^!r_wR2XmSXS*OaNrgw;5M-%wfnb0hVhHMs1xaqe6 zi{cTqBwlcxGYw1P`fNP*)wB4p>I>xdj{?9AIf}1uHvS%rG&8-uO`%Z!l44mQOO7Du5!^ z4i8BRMtE{4$`;c^H6<9qaejFEr6V}<(G_ zVQM=Q=JqCVmAb&%$qJev4Q!nqq4d$f)6-Lc_^eHyo)ixoOB0xx&p=XEELLq>fn{43 z!%k|AmD`q}WL^&T9^3$#(gCJ6Q!#gOA!g6d#ddmrXp9=>G$~-PeEzOVOjVk|BE}8! zvM^D;uDQOL8Rh`nXm?>ul?{9{SguIYz{$r^aF%;}yTRMb{Q+36@b-etTLPKN3o05n zHGXnvG@b%1cahptzjB40qZ!=YZ6T-0tJKvNe%>CCxY|G>v4=wCE@){UnXZQk=96Hh zutQjO6r6%QphpuIeT6wp{Ou^OW|*ut$7CN1O!T3?9$<-a8WW85F%h8Ecz^0={-&4| zV1_9{7ML7tfw2@eF2o#qY6IxWCqvK25TgQ&G1{N{YlJms#5ut*(FMjyZZJ-9$IL`m z;b&S4cE^WUVN$p)rpHjc1UEtPU=-(yX`%L*OyjE+P12dK+&x8uu!=;u$Egrf7>lHN zS;DYkbY%|A!aWhUq6lL=jFGsq5dP)yFbj2oMHIESBr2=9F))gD7GQn&#%%blN)bRb zgH<}Hnz7WDumWAKc%%GqTAO{ZDTV7V)6 zM6>queeqmCznRV2&w;{qqeU)Xv-UCrz3j5MmNEDp1P=;hDiHTFTFjKNW;dln!uK8s z-O~wkZF^Bamdy@>a(5VnpMJd0xPOWZ@dW6meKFUGh@Yb*=2v=Qp&@ENFhE8qyC$)VNJfL zbJ@tIYF_vQKhtz*Dk+~NY*d-wPcb)27>8t+{T$Bs*|@GB=V2)=rpaYLFUA=7RnDQ` z%%b$l!-T7-h@k5Tc$J30lg3Jp6RC}g(1>0$9PprlwX=yHk*a+rS zJuMKtVV2PF)ntbtZCSq1vbFHB$25)dq}LUWw8 zyi2!LLY@`~uVg=Dt}4YNw4l|q94~+_|KuboJ(a>5((x&_nj3B({NWzkQoc$+%|?5&C7EI zulp2*8NI`30h}`hjfL6?lW4*8h~;G11iNFh=S%?-n}#?cZF7mR?_iPa0k`5nNauvX zsn7@3ISN6Y!y6uavcM`|0pko0SQmJUeytPTsR9Vv`#(BjFkU31lLj9QfG;fkQE&MNWrt!pmQ6xMT(^ya$0T<@9UY$ho zDUXz{>%35SEslm=nICLReW6;FBn%}pm76EEYu;4U^PB?vRJqWu*K?Uj;--(_mZ746uPA#j^}?geCP;OS*66Zv$&TJJ`~1?R?p_gME+_>}Vcn7w8Dv z00-Fn*~6ClDQ{fcdfUKCW(7lMLs)oOz+Pn!OSvta{oNsrQqpf+pvdq=AkFP8!ySdz zdi0VMMAFz|7D?aXLSJF{-EUzueC9`su}eYYuqSU`(mc?$*oQ;|7n%>UD=GKCzro0x zixijI3;WqnvFEG+uyJPg>x>w)U%em{K`Y~h;ZXloG;Xem6588QhqDoOkTrs7Y~017 z1`mgEQV1GXhm z7=0rs&G3C`2tSa4NR~rcNIX`6l&4D(vO5_O2PwV1%z>VaD8AmGF2Xr}DE%(<00ZVE zlwT2c-ygD{sasMJyf5{iTn^{og>W2t*O6fOA7vz1&eyDIt^>;>jut)uxpg2kOUQko zSSPx09Z1c>;3kXizAk*^Z~o{X8IOg3uLGxb_jU1g_jN7<)hz7icpS#ys_&spLBry| zhsu3_E;1jT4dyK84f3EhDPr?I|E1*uERQ%+EH(&u6M-pm1l7%mXL3G90_FT1CDpOl zh8V~;#R-mS9jMRu801YnG7EW6FQWP1WaK`x7`e|a5j0hXIc`XMaxQcRKL4m$&Rp~? z41zO=%`Su6401D&9YuMKJX|Eg+0Vk)43Kkt7M;d9hw(LQVzcly$7Pq(VQ^gc8@}dr z{|J_k1jBVeIm;jK=|mU)pTKg~n&vPaZ#j!F?n!<&EXsz6d832tR!hZ_BYxw(ISG=b zVR)dQai=WqXxi$8yXv)_M=3nxEE*PZLQc;Q<-_3SQ~I8K5xMuI3> zr>3k(fnOPY=hD33nkt2JoEOHs=)+WQ4ZRuTFxqe;t-q&Z2CXY5yPG4vJQH4#D)=Rb zKpv+NC*h=pp-9|22f@3Gq28MhCB3_vgu!kGo7upnKh+<FOnP)KsIj`a15m)SMT^iC8i86D57g4SzsXaA!SGOEK{4>rOBDZO z;Nmanx_%yaJ8RH`W_0(}p!M!eG!J&7wZ9wp+O%N#GvTqo^_xIj8yW`&aIJ4h=o+`) zY((4fuW@42Y~bvdIPc+s-u$`1Emj`BgZ{@B;0>BT;JqJ!b3K&L>(oVRaI-KU-vxvK z-%$ANJHVYAFC5PhE zU{8FjvcrW?5B%cqh%-S7oN!a(lrkJ&`Ka)FloXdW6LHpUEUs((aoocPUxljhfuB3R zq&5Btl@E?%8+;ds#!dS)BF1LdW+TdPUWG$`mp6}|N(>Kl#yP3Z4v)ndqP zgXn5&0opI4|K08Qg4QTkWnpOYNX0k$5_H6uqA|V%c>WcNa|HvpPEgr2Xy3c_E`@cY zkBWvB)LZ)a75mWLdmDpyDa~ej-;R5z?;AjWFZru~#B&KM@%ul5+W-F&y;{mtS7S49 z^)mjJ6b;m0!cYrU7HTn6|0`AEx4>&uQNNv|Mn(R5s?7R2+-vB?0ITLx`Ssr&5HHo; z+e|OkNz#j+E`B*`U|jiEP6};h))w!%a~HS!wHni1ogL`8P0zkfmC;FZ=|_rpnhLE6 zeYbCmdg*5{p6X(#{hlD&zeFwMGP-fMdjNf%185!SLqCPxtDbNb$TAF&JZ&clu4?+ zc6yInls-U^0E? z>A6PFJVE987C(T z6UC@HOV6ZtVZQU*ly+My`uhi|e1_1~N}Y$I4fotbZ)ZCOdZ}Fd>L`7B_RqfyEp*(V zjQ0-UQfrI$n8{E(4HA7+pF_BI<0_>=acU|3(^T(gKcqa8eE$`2ik|y>64T{qO=*PB1%QqL92@ojwd$)DhAV+t30YskG7kofz+Da04@AexwupCrKY%?Yt^ z8l?vl0|Nnm>ws~lU>P$_ACF9?h55wELhGEtbDbtRQ?D>!&h89zs|R2?1LZofT!`Te zAq;kqsj7IQ)%TSklGxv_|;OhVkU6ru4QwU;Js+j5YzItOkJ6Orva z0bgW?;Ht(G=dCR8yO%efaCSnbk1Mu4y%AxH;*qc^2diIRkMC-~!teDzplDG#Or

  • ztY~3wOXX-l3vM%o4U9dlVCrcNH-9O7qXOWjl)xw02Z6zK?M91CFDWFhZg6#W5kR#g zy{o;817=cPj+!zClV(oEMB^#Yo1h09sXgYboQ>$rD7a~yF?Ur3Bz|tN^|ZvCCB>Lk zS%Bo6XsCm|;2*9;aI_D#HCLEB%|yYRTmhH|M*1N(l@^jIk%If&*xC?IQWv0)%;y@O|-dlHX6bqMX$H)%A*vDY7iPpk${ym}NLAAb)&p85>C_N|2~ z$OF&5b`&3d`DYwI`7z2D=0f7@guKdZEIqhFXpcv)$P|Drm%VeQN`U8nr4b078!vdv z17}4Guv{AEMfos=Lg6a-%9*!ZCHE3wxwl#hwZ9VnK`J4>zEXIr+~MKv3}vt!&JtTl zq_jYnI>FQ34t^RhxVu=x#l;Fzg$o=!tntWHJ?bNqV6SvUWI-H_37+B@J{u-1sp`FTx zM>VvFWU$+3W9on7DE}i^uG2c_Fdb;Fi_38Yy$W+0GkC^e`O*lXRjv~T%Z1TDL0|G; zK)H@nTuS99z;dSkV9=Y&$f?v{ln?W1Ga$|sAKmIRYTM+uN{|TGHdzY06fZcY%HW(KgHxIu_9+rLq)4gGs6D4E zgrQ>lWG``_{me7(nn~Y~0v|{Vs4TKnaL@IH2Q3s?SSwfiJUJZGy#@V|U5ZTjS@>G} zT$#AfeNn1w!SPJ~$QO^j*?(r}wZM2dhXAL{_F_ zJbkBpOQXf}#(QeH$(iC~y2KQoF)Bg*;TYBdS@*g9$z?x}KjH)i^*446 zQ(Rz@LG3b++DI|e0cnABKH2er3Tc*B7&sR+O7pdbJsB)_o*xRQc~ssc434{3@`;p4 zy3aNZ=pOZT+Ycx_WgoJtqJGt5U?N8a?kB)cyj5hWQu| zeX6TTsMxz0!KE>R2cI>}GglW2jq#|;92D$YCa741SWQGAmF29R%c$L$VG@0hBj%(c zkvCFI^zeuq)r%X=?W{*(vNyFI>oN2Vm?(gFt}iwuI?92mfAr{CkBDc~p$WTQJAhNo zr!k7!T4-@3?$DfHoOU2TZx-<;2UG1ZO^m+UO3?A>*-yl14+By6Y!_pa!c>gQEEDM2 z4BpT1wZ;s!IrNn@&y!O;so_5f-<$4D?SZZ*dC`22+-VA95uatI#!>+36Fm(uMMm>K zjX9-h2?HMsam~NwI1HBChd2vR+>-KVBr(ENr>U6XZUh4c_MPcjP6jZbwy$qJ71J#z zW2)I?Si4(d;>__hXVr(fvpJ@iPJw~V3|P9;J6cY`cB20}^S03Z6! zs^^9Yzm&cQa{4~XsqOL!KfdoxW4e^$tLU2%zC0c(YG*;KVv)E%4{JW#g`(Fhq1+tx z&tUn^cr92?BEWJI&E`a?H&NKuWCZR^hyV7}2Y#l{U_ToHRc(xa5YAyNYz$OreILn2 z%wu`NWgwgBUl`a9Ka?r1BMxVY@POS(0uW~~oWt4W@Zf{#LP8E@2+{e24y66Juz!*R z6n;Rs+fjuA^OH0GzLN;P^l?%X}!#Ey?Gg!`` zc?bjON3_N~{|J_k5<_amtEGZW}uwgB9~{-Au4mK8@}&D<>IwW zOVt#&HJ9cqQdAsUBG!(|*`bKpkR=ov6borCN@GI6+-Q_+oh8;w?|<<+u2-EzL;V^2 z`tzqa{`Ft*;Ri3{&wqLnpMCr$F8=-vE}!`ppMUT=PXG1=I=XJ+$1|T|_L?I42HPWq z=KC@lk6iPVaHV;ueTH1jt=RasRiG;jJuKj$@qk;XH^xiMY2Kla$OT#OO7+*y&vR%l zFgp(68}bozpaKE=i{MRdKtW}opmrytcb4tR6f`Cp8grPMh7Ei&SU!@5#cxT{1F$@L zU#S4gy{Z0nV7Z3-$bG6 zAgZrjM)S>EXuVa7_PQq2UcG^unwz-Ma0^#&-@>K#8eHhOg|qE9aHj1lF0@_2^*hz5 zudhc#bpvkQx`o>M8ZHBQ_Y=US zFVJ866WW@tqq(aEx9_#1v8Ms;9W|7%PC-@N)zb~!xeYWm;^~NJpsEUkv_`KT9>9%3 zpq7E+K9W1EZF&{Bd>r3-I-{+i47l1#VePoRG9BN?dQyH^Bb;Bk4Y$922meTnz|Y0S zKn-J!UAWy4#ZVjNox%I&PIPrN z0t44@?}KglD9{uay#s*1QXMQqQIAfZyEdTF~3l zjgIbnXzuPuYhSOxmG3c+d?TgbMpe)=g#I47s6L73;?@7lVEJ%A2AD9t>Jpxdq!(+d z6B)QO)P$BHdI{#4X}^uG-d3SGF2HZz&1oG#A8ULwAl=oEyM3)Bw<*z1k?>t=V1r#$ z(A1#Ocm=2!tyECZ*j& z`RL{b$PJSVbO4QmltvG8-dv;nUO_*laTD#hh9NYw!Zf8b+)lr5@4#?p6Nafl;x0)C zN!u+7C+Vbj;xN9ZaMqOX?rBGFD^*M*YlvUR#o0NysL`M*yOjL&&OJbX$B>|$;o}GV zJ{`T(!TLMU(buj$LO|&ZbqNP<4K&lUSYw>Rd8eVH6^*z;?|50%Q&&%i*q|8f(3V+G=RJ|9p}QSaR=4S$>G`en zY_7K^D$qOa_v@h-jl*4N?C+%K456!Y5Z4;(ak=3NYMaiWvF-#KuYZNx*S<&7)ibzr z`3kx(T*KYV*HBk;0aqK(;Y!O@Txz?Hlef>|^z9465bMuBe?t@eiIDippzu~fS#;(GY}Lk{}ThB44~`4at6r9na~1^Tmh_G(gMs}3!?M=sb;ijGokk}n;~de z=5JVnMLSjt?KS3NWw4w%%MEDJWEAH503_D|<_whUhq%HZ)J+SR>p=4RG%Px;a_e+o zSY^_}dJgjzhaqT5qA(s9P#%Ne`AP6yLX*Ia`EXxC3ycjkv0FnQ*#+@}mL+mk7P1e| z$8$ftjo03L73P-HG1GK3o;k1#?`?SikjFG2z>xD<0EQ2D|p z1k4VDsb(r<@wS+~wG2xREQf+AVM-(6m?#x|)5%*(gi%T9>?pXG1tV-NO<33Dz$MQg z2^))rkv9g8Y?I`W6b4gRAyRjg3yn<2JRiY5&79KAH66G-839Y;gm!sQWvnptnZLUn zYhK!fRmV2KktR^K8V9J8{UD1~BYsvY3YM26rGnmbUZJ32aZ!38G@cfKRR10_2~;X? zD3!FBR4XCzqWf;n)P9^`VrwDjSM;Wi!DvHTh|_}HT4s;(6|)eM8VX010}edDAN!x% zi^DJM$L?d>P&6+GG3jA&mfK>Q*#ziYOd^>q!1C;}G&p!!!(HWq)Pf|67YQ#v3B`4Q znX@GvlwPo==X0BMmP#;x@dAAE<;R$}WFG7#c1SPJLe|_I#1$tXCO-yqSIJEvNeoO7a-P2Li^tYKltCqpJ&Pq@RH!_A_A3@q#EF@8wCzc$60R%M!(8F?HV@ zc$9^~XHgR3*3(3BRtzj-JP}rz2G7hup*il6?hmi5Ab4elz%0ZAF^lss%FRe<*SgU? zlWMw;-_^IaFxVqkT=0Jzy8CxhS2NzS4J#&rfiM*`>!oHJO? zAUcC(41hC7xnyZ1tSfwBM~g)1syIlNN5f{eAKWQi0BQ?@g{CTVX)|!g^eAj>lR3l% z5MD<2DuRVDSGEoyXDwRU+;CWCNa0Z$2)AN?*kyZbwZ-oP;k<#tu2a57Xe+X?)-MZ# z;vV!Hd3gwAGzNsPOoM7p1jhNy#5k29Y?35G1JWwW8J3YQFb{VSt_`(Q>u5Kah1ruh z!XmCIa8Lh;W8M0JW_sSD1#oz%a-bW)ZHiq@&!Cm8uy3fIKn2Bv}5Fb%MUvA-n@ zH5NkilwFR)z!;y1n8cc?DsxKD9wtE!n69?KIL{dZbmeOX<@DKzt!ySnyHBUKGED%H zlf8^F&W*l-uG(wv4-ERTe~im?VW5-2Ks|@aT40a?@$6uPGMBX7L`2O^fnQ!Y^eo1} zC0YiboKQ@1H-s!vgMi#{OmZ<0+T^K~*^pCM#nuIw=rkQ;Y$u70#hAINaE*~;qT39? zYaTI+zRU4S;SVoQfH7<3%FTs%rw1UiB1vehGZ=48->D#qKgxXu?BczlE~CYBQ8<(p zF>uJxKvEPc403wUj)q&FpE%tjFA0GceM|JL^boQj5fi1xh@O{<*!h`or^)X`cN16! zy2Coy3vO|~^j!&oN0JYM>AB;)4B?jH14S`!xKiKA^%a{@4yiPL(6a*PCyI>(KA93Q zCmvq8fnr?Ivl|O}ZV*D|(!0@jO3!&R;+N-W$DRmJL2Kb0?upbzIdG1W3gFe)hsJWc z&-qKGZ=zY08^$V)#COUrO#$D9@j}~NJ}(N=dExMw6)MIjpQTBHCdZ+`SM(>>(jajv z!?BRYU|Rg^!kJb_@Xk{obSvflrh!8t8++vqDj(5D#mSHPp#ns=D^dw9cEyrt(T|13 z`kX-O*E9w#je*NnM3V#F@dzRtoM=#*9PhP@-e>{T~&uzo*za7KoxAtJi zU-x0_JA1I|r43mA>{_gSc@x&Zx)rNm+#o1UPIsTht3SSp`G+eZrLzC~x%V+^_Z(zz z$j7XMm6&~WIp&fS?^`G|;&XS*7T3&^&Zh%XHx(m^>Me0Yfsj<1oA73S{+@Y=TAGgJ zHF-$iP=v%)^c^RE?6M4T&EaeaoBdIXQxQ>_jPQj?2%~n(E{hL+ulO4pP!TQs(G)j^ ze#10A!SfSDTn4P8Xinyx>4)fwc!U*2!a`$>xUvKkFDpj&+$_vmR*vGz0u;{6N9n>M zCQ9H_`F+ANH4#^Ul z$9cj&$pfyba=2wGgx@OG8Fq2*FpqK&W3m&C-|p#hI3;^fACw?=LpqZ7!mNO8}+R~Aa771bSk-=jfU-`ci z2AxAF{zwgP28lV0f$Ye~inT!I{V)cKS@@d4>yh{QxBMHv&#nNJ$^9d>2@Csm!uMH5 z#?=AV|4tZO4LF+ffQE%n1Qb5ANN|?(=`Yn{nunCAk@EOlq&-`Sm}BLLKE~i%7TCZi zgXKD)R`>jWC%Sy<^38nPOv94>!~*CA86y4IJY>`JnTCbI^2A5W5qXf}9iV6I*J_vR zXjnoH)3c9I{;5p`?xnKZpC^Q`b$$V6v*!0fdM1P4%0j`0gZ{PvXM^TsZ1L4Gxjb(=7EJs+CL8=yNjuhlt6u; z5b}e0kWpLnqW2TBUkjM4wxk+a&Pk`mV zhl?QJtEH>qa$+hIU#hQ>;P^;DTmaJdg~R^{pz8o|9SE-by-r5nf0!`M%Db^(p@!O3brt%qUB#K#-@;#3tiv}u_5weg1nO#Wuj&fgZeBoR-8s}Z z|BjlDE4bL&h;!{7xHa5|+k-vmYrlhgtjychFR(S{D@S7^o{kI$ZeB-kcN1#wb)b2m z9X&lgK+_<_84`-CtWf+{FHc-6Ur5jE1KRu0w`(Cj33bEZPv_|OO_bINoT2&ISCKxz zpZ*FoviCfE-;JhjnH*Mv(WFyC^$SmO5w}H!bRBn`beFwUm@1m{!F1iMK z(9_$5dmUU}R0s6DmhOAvnYex$&&T;uUKmq;IJo`)Ytd^N=%mavQh}YrGm$}}Qos}) z{oP<7osSwc3=W`*hPj4e$|Qrz?R7${`)(I+hA`zvuKxTYrD{P z@9W~Y_och@zEDT&rjEqY(<(L_I{I&;b+B1%LNwlMqC7SW?N}Zx7$j%Kaq-S~s7tW6 z|7{u!`l{(S45s%BEq-pOJyiBp^gBKt#hT$BMnx9XlF3lM^8yI|f#UM$k945Fj~&<_v^~#Kgl@<_*2k<6vlEjhR-qFtW4}@q|H7 zav3z|_*VALLOAXO@;i8VQhXbX*Po6F2Kq3tFvlb#!v|ow)L-*|1eUWfQ2s~Fb9VXO zBr7ukmg_)u2Fn>JXBrk`XG>IWUXCTZ)(XvX1DW*$uv|aD0W(6hK>5D|%Po^sFo~53 zI+p37uF#M4fN7$)Fz{(#7z`U)Eb|d;|K+rJTat=s=I)+P6Svv%(9BCf(CTcsl!d{i zBm}`L=;Jy!4!(2ZkhNou&<>lkXbu)s&WE#~9JANY#gQl0;o$6O{3Fa2r<6AMO=*u0 z{oQaVF9Kyn;V4|1iRZt1juu*e2rQCgBQ0+CzOfHMG-+{7kO>frX;wmM(U`P@7T5HA z`&?fb#<;^KQzbZTlQx&aGR_nF!8QWqDBM>mjJ+w!!(o~1CA9aLgPM=MYZfzTnuy2^ znSzItH5-_>oHY;pXadECDPQ^MHGFmM8@zw=L%jCc+en?Cjf@5Pn7y$QEB9`Me_|-C zJniACqQ#xc6Yfe0q$;@p&E;x^5ca#uB`|lg!i1Sqpf_zai5~Rrjo_CYgkx_%g|vz^ z%ygXz8>&YqwF5#@gWyk#RCTxrK?d7_$j5@-U+~rZDz2 zL&@@D?0IqrQVU}d6sN|4XLn)Qjz!q8cO@cH17YH*kD|&PtUtOAL3yDV=ROTnG-j9< zXeBfxJ@fnpSk6FsP(=*nc>&_uKRX02e$Il1#naQ_0S${x;s#GIH@JH`!$sl*7k4{2 zx!S;)+P0I6r4}4#ketL-<^*Ri2RKXYwT3|Hy`(Z%cu8Gg>%jeXDyErF6Vx~X>ESSx zS;B#PuHmM02hbUblpaLQ|L7y{O$A!u_p z0yfhmZ%a0O)~CU5BQ3H?WXt0Oh{VF0mP|*WSeYQg{WoQb_#DQ^Em@1ivoZ$mbHfp~ zi54uYGmx;o9GUwUz^gb6R`F8IJ+>B-oIvQg&wzVI093`%a7xx7a$&YG@R_iz5Ytq) zh+UcsmsDRoA~C@9Ks$IAg+M+hQc%2vZOMh>oFFh=!UI0>g<6^w2Es>z;jA^z06DuX zy89fa69&lg@+;Ks$0MX^E;-Fc_8tqhW3%T4vgz+stif@}O z6I3azDb8BsF2#NifN#en$1R$QW zBv<&|Vif`qXU%jAe@C%t=oINi?-C|Jb-wqA!(;@OCkP{oOvAz_D)-tz|vC(SibMf`=ibR0l3G-k2`4KyXPSB50hIrUb(=QVGXs zZ&-(Vz&gScmQ?pqi_+m&5skq4u{4(XVzQq({OLQ#8u(0kWRoC;o~OQ`Y*7@3Qh%KW z$7E`6OETe85{bylG#L8ZLeG9YQdSorzA{6M^VUHwq70bZoi_^fY$w8szQvQhO!0{0 z6y$E64J&GQdX{>KTAm?JYE2Ka7N9vB1P)%7ijY+q2%~oGJumvfsTiidVhy#>6;yu| zk55psVOBnI#n((X#&kiv8SKA|zS)bS1>e4;Jb?P651b0AFO~TVP@O?^wiO_o9|j*< zX!$a?^lDmk(pbo+L0I^t2>Tfj=S?s^ZNuRTdWKFoj6n#dUtyaGJm#3^NMTdp4U<$4 zaUz5_yNx5As0@RVurgb0?9BAFLGku^TEN_P0*bcGg}Nw8*kECs4dwfnQ(5Ul-`h%@ zK462eYoFOEcMF;!&&lVB%IQkh_!aylma^H@pqEOIBPr(?W&3dYDM zQ9X`95WP!18U^hO%j>_rjXDb1^44~0_j>d@GpYx3Or?d{Bww0;kvk*Q3R8m2Fh*?v z!$@20iIoIrm?gRhcV?^u45RHZBf?I66V0MrgqTJ;!!p(#*6|YIHwdy3r?AYUT^|Vh zISz|e9G^Uq!68Ks$5e$lEuuSF!lxftT&e9_(cH%?(+75uZg7tAgcFT#$(8A}_M?R% zy6As9zW@C=KKS}Qyzs`;c$yZuue|;oUVrOFy!-w;`0$f=@x|Al;JY8b#*aULho5O- z`^%YA_~qOwy!Yu}@aggQ@aebj<95UJn+6o^+@e;27;NABw#NC^jg6D--%9}TL%CO(2~-w|0!6`Vf;Jx3tsm7 zaoNw|y7YCwA1M#$R1R|8|Cju$@IT7K0P>OYM}T~!2(X>&pUax-@^CJE=$b)b29ed9 zk`T2s4^cF~mX!Dj`%|9uEeWE!P2OE1PC-TQED-$Vu6Y_{ZKO6=5`hm-{vFS}eGH4% z&p}istvi!^kxuiTbq7{p^U<}KwIUDsbCNM{Wg!l|umj&-{(?r2TI_shFVr;G_gNex zHg3b{*1 zTnB`+I}#+792ep?yg@U$5Xr$8^s;2SNdq1tk50Oh_sEo!^7S=3hfLuo7t(3}> z%hi2B(EXufd+tt5AERH6IYE%aPzMCa8O3TwI#me-=T_7>`DtI>R`3cr5+ z6>gk5iH@5$aksG^RkyCu(g4K8)n;d1MBRJGUR+?~5P*EWEf0idmK7z2V9q(`u3 z2>XiyEU&*0mS09+SEIlSJMP`VK!2AOr@R9U-=&L&D|lb6M8oX)Kr7w*;RLW}B|h_Z z!0@+pef2!>(~I~n$r|6}M*u&6kGDf2fp1P=5Pj(GsRhn`hpOBpoQ{bDPMty3q5XKd zaxp!JVzl<7rQ;6G9Qtvmy_X(J&n9P}t(&f!(R1=|ctT@`x1%G__~BWhr`tSC5$>Kt zb*UOZ$W4LIC=b>5=y$jA*PV;;c%VOiSg;5<{R_P}m3!3%3}FCm-5qGW+kuAe9yS?C zX^=DwkS>mg}VBq{YbPrynEK+#gW#F$L z01GytUKxik?KSv0G!^x;mjf@oqt!C+9mZg94{oD=P`gk zOvNr}U8s1`L+Bch%z5TAMO%k>7H@9U4-JS$ zJA9WKE_Ez^$L66{)X?<2_Fgv{2FXv)Ztd?xCpF5>&Tc`$(tVfSskRAMYin?`fu!aJ z4OF+#a;pxvZ?xdfwKlX~q|S4>9aY!v;KsEEG+w3qH*eue?NwZExlR-RUVM4x1RgP- z3aPgO(JpEvNc^Gn@rT4;jj7Wnz;42597sq+fZiDBKQcyWk_)Z!@ssfSU*1J~-ykkk z*9h%#2Fn>JXV<{YQn<#}b^<_WKhyctHMb%)D;Ii{mVudt5WR^LU~EIb83C4i`Kkn1 zZsK4gz;Xu4{}Wg~l7fYWuSbIBOv9oB%h}IhIUDz!X>S2bi9MEXUybE^H(;u(iJ)O& z&TQ z-F(ObZIGMhjBSYyI36j%4^GB7BX`5`*dXl43&TIYd=7v5EbOKMj|2Vv2Jm3`O zjM=*v!nZI~Xn8VV5=ePT*;WDnC24TW4}oo}Qt-$HSEkS+QvoT(iCCD5tWD)Y3zR_= zKB6D8JPirkiV(0Yi6-5&z*-z9IP#ctlZ|}(%nn1`sx*}Co{jfUeTc{3dK?E{Jb)8d zf24`m_s}HyA#ZsJa+eh&b728I!W5WfqmL=pGhps+0|%KioD{ThrFUY0+&e%6?;tg- zJ?t^Yh!*Mk<1oe62o?%^0TL->sySXP3f1vL4j-+B1Bz{=eW4su(#`_uFMU7?It!aIiQRb~y>FclmE6|nYp zhev<{?iw%1gOmtPj=-WV%W(4MZ#eMgF{Cffg-3)GAvs}Kvwt;SfA0l+`qMwKbjKp7 z6I4i>m4r7xd>QrK)p+CMR}hvHisE=7XgS%sXRTrU4@o8gXRpL zvoTP<=i?)TgQF!3j3#4}@gz*Nm zKF9N16eT!&U8qfQ|M6c>3*wEmNLoV^;-yK#Fc6=D@Sr}HwPUW}E;kBsf*JJ(SwT2F zb3Oq4EoV*hfUTJ#UB1tppK?e7Ci0+8pz55h4!~ojs`Yqa#*EEh3x>own>q}D#=T@EPOJ7flkfrC;;@VHaWETUWsXdOaM^QXIio>8ZU$gc$`}uk-#n<`uOev2nW}`91X$B_POvPBs zNf>8E&n9<_#YAyE$!@y17Mo_|&Tumkz%Fl|1!vK?A1)J|&*n5SX3(7JRn+N$0(jS( ztOpAU=V$n)1qxx>kjc*w>DISy;QOVa`{h3d#DQ3b~&wb=NwO;U&rCYKz4c+xn-8({_^wvZJD z2^t6n5cOOq!M7wFqn)S0H$NO<f2kff+F#oJWa zd5EU(nsvMvrrb|U&xY#MmD-Eagudmrm>KRY=yJxZOfg1o1cP9EEufz$gE8Hk9$7kq-BTnJ)!j?7R zf>)*sjrWKRxyU(EiTE9*D1UA(G<@=Gbq4Z}Ek*L43RJ$a9gqI{7UsUa8Hav<0}J2T ziv2&nh`+ZS$5W@@M%fd~M0q{pH64j-@{qQ^Q1HP|^fbiU=eI+V;VoQ$%!|!_gC~U($FxF!RO7|{C@;X|CFUv;ujtctL$02NW zEMhjMB6&v^Qnu$HVM`j~H>D$SYdU=91|ev17{ZswB5QXZiVs&{?OPkL?B&(S*pY|O zRSAft@jq#2p>X53(E}vde=LFK)?=Fm8W(um6vHGLnqHu(*s}&sS+sfZg8(UKt z%$Nd0qiL|RHiMOoIcA#7fZk{t=SET8jHC9iCHcTRf!bSy7p!UQFq9a> zLTL?2q!h|Tjkxbi{oNM3=+~fBc*z{M7sl-n;TKG!-FKzHx}!kq(!IYRJ}x zLA8Z>#S?}2ZjOiV#yDZPlljSo_V|v>e-huFS@7GH4gcK?X68b@jX`s5m~u<1@bfim z^D?Kk_qKQ_wj@BdIY#(>_oNE?4(0X)Ef9MkQwzp2V9sFh{tQ9w!BiZooitb2O>>3a zY4F*b3ZFgntbJ*MznOt_of~jK3y!nvx1T8n(xBeOTI#H+d|yMF!DYJEiO|>`;eVKn z1gl4a(|paqFoVRpaCUXTF<>;U@`;NIxTJ;K&|uhJ>Bov&jvTy4WMUo8mt*UGR=``>(cp8 z>FdJ&l{^d}A1Mz5$#ufd;JVHY<~#?DKDB`378^y`AAVv zyYt;kZD7CFz^BKN917P0>4Yt`i2!SyPuBpH6q&CCa=X*)$ zy?NXdW5t02sF>zvZ-Efaz9RVSFQze+)UVL`%*2Wx}gd;8?K|K{yJ*wucEF_D_5`nE~q?u2Rd-8p&Hj~uc5ZJ9(AovsBNl4 zb8RhJ8`@A)Gf2M&lUJapi!rtyM$HAA1LJ2pu>6_GFrezPP%vgpt#Oz!%Rcnn(P~={ zbX@^%eTDB7PC$ABaOz{=!neTUQe0C>fq#5J>0HOJS>E_lus#M)y##ce#i@{BT+GU+ z1SpaAYrvyhaZ%-r;b#xg^DY8Ax8bBF82J15z|Gs}Lnp2dG^4Q<=xnB+F|axGZSz%T>JOwGbt*9=MvV7-rp!+SAI z&tVZ1CiEcI$QGK~^t=u#nEC-~8}|mNm~W$zs-|_Q25kdPf_R@ncLugu%f0XJJ!;fc znY_Eg9OIoe=%)&5p_alxJFD;yQ*bkta|4w-zmo`S8xp%mZM_3%?jJ(qz!231J@ht% z<YL@#xO+L}gG z->gGzT?1-v*5Xc03)-tmZnUD~YCGC4-9^jgPSjtyi-t=rxO?^%y06?sUG;U`qQQ*b z6emvqhzW*Mp^$ka##xOx4}Zvg{oxj%1 zDZp|sKU&Z`*kF?JjQ&cHZ>;7q%s(;nw=4r4kNoo2ZJ&MABvT{Bp2WM>XDHyfop`-;)R9OP@R+S)mK_+Hzuf)4QevBW_ z{)SIJ{Ss$?J%=TW79*oH2k(6QXYBveF1-Hg27I@+04F0AIOAx6A4vWj?}H^#UP#Ld zL}+d>lFFhHobCe$KU+wmJcNJp?ihyqpEzXldph*mYD$)mq;= z&Oj3Lm#b3!V6S5CbW>rJ)5lv1jlv6_Zq5QM_wXW-xd~8QuJnLX=?)FKDw#V}3J-WI zC6K8l@Km|OUFjxVg-QYs4+m&8QaDn7Fqkn3`c%dfOeaI%)f6+8_AsQrz(6$9DKKS; zhVtlD5eeDcNQA7-f(x~8|JCV28QQUtKhbOU^!dCGlOQTth!AtryUrOw9fqIZ@Ejq;#%SpraE&?#zd4s27s1*o;; zxvgM>fn%gbu!)ljZSsgkS(r)vG zILQN1I|^Y_<||Huux7dEs#u}@tpmYF0_Oiobbz{Ybpir5XTWn&1bo(~2tH%gnnXCy z3ldtROs~L4Wrc=nsh=?R#yqsl$L*e@6qFduoy}a{7IE%iu5Z?iWbn~0Nh)MUuq{+2 zVK8UF(S8h^QWTKo`U?Yq`u1YaS1txgSsUuGDBb0VQm^o3W16!K^V z)Cn3$BW3Um_kwq<63RFg+=AWV8sr8?KPT9zY+ZXvUQwaNjuDo5DTSRx6P z!A9)}JGGMtX9Is8VKQ-_LG-C^hOh~676831O-_yE76K@r=58ch=J__3nnRiBgK=yK zapoh!2&jRpkqBdBicI0cTINha!W#;#Vb0*W6@8Dy27{p<%>5jM2!o79dV=c3uOI@` z6_yx7*H%`>R32F#FCF7c@7VVX3L#$&x zgfR6K3%5f)?c_pjmW?jDB*|eO>WHM3IdG=_Ez9;3Cu{;rq7Yt@AUILSI8Mi8S7X=* zN-)M|nlS!3Luw_;GKs#O`Z7~03w!t%h6zfY@iaD=20PL>kLDMdevr_2&pA;6^Dq~< zCM)4W!lxUU3WmRX)9F2o{B7Yxacn8COgqH17BfSs9D=N25^fKhcxoG|GMX1yz%Yd7 zI)Rp$>_=l}ggqS7<$}U!YJfS6!X3!96sNS<7_xq-9VYo(K%df>M(G*GQlFJh1>0dT zN^pao>sU+(wT7OC+DCvfm7^Xe#?ibak=m1->RLGkdOil^>ccwC3o|G^J(mfBT72M7AuD4Mwwk_C%cF&xur(9O+p-Zv<6Y*SLPXG57rrW9 zxNZe<*rvPEw}R$1H2!5CDo6Z|T>56vH(*1m2xB*9YZjunWC}kEUq6sdS%_SpjihZw zh~HEwjQ@I;1Vc*S90p|)wiF<8O|~#j&W6WhHsl~?eIBCeHyqCMlgRbCh@x4#j>6=KsNkLEb(EAwbg(}?gangfKZU@NhPJitpB0C%8y zqlNWM=o?Ig#M1>1j@IP5!qwdgj?Q)%J829i(mdM8YzCAnPq@ZZtQN);j}(Y-rb^-X z!ocKxKWq0gSjgJM>;UJoZD|jf}nq6usrdJxms;( zdOnv|B>gt(2)*C^d~m*W@21PAE=+g*N72!+WIaA#(6F#(In%IsE{TA3xe}>Q%n`iz z0x&;FbwlyP4pTopL}e~c8c=(qdkkO;;CTeF&DT1>S_fY10BW6|?=jfU!tr&qDV!z? zU+dD;g|Tqh$aMa1R4aJ>8HFA1AI6{0y@#x|`IxhJ5%M>diSKOe3K~CG zq$7sr@rg7hrftbb`sRG3(KWmAG;U_>qV~F#`p{--8#LAj?aW2|lk=dV@!xNIjxbow z#_0J3HE&98_|txT*nC1Litt8S(EdUJ_{wPS8&U?s>6(Q>bDhhgq05MQIcr*vq+9uKVD|m+e+8ER zCmEU6!{lKA`AB&fNUjsk6Z5Y#4NJiO0tD`$wn^VQ<}5FHVg({MQlFu3VAytQt2?Oe z)0iAWV{*uzEMbh9`TPC$mq5M049dMF^t@6k%Q9+DzsUFMWPiv~kJ#!Ge zr36ts=OXpUQiN_SMex!rEIzUk%}klxd>t2WUP4vv4b;@#LQP{Wu2kQ^^(F?&Z{b4A zEu6nojSIJ{aPjtap_s{XvGp1*-MNPAEmv@}=?dx^E~BwtEA@0;-+UFd6#rb+?>Jj^ z7A<$1al4}hwKX@WGWWiz6~_h!lo#c63 zPgCJinIBO70mc6uL)qy#>nTUy-`)o5ub@ihjH~YEz|~)Xb0>ippG1RHj?UuMz?qvE zraG#=S1UNo!FCm^e!ztl`S`)z0X2SsxV>PB0K)~I$XI7T#kqD0wXrIkme~W}|A4-x z+h`x?0D9=%exm0T%)%{KH(Zf8;Y?fr@W~tW`!ne7Z9?lXGf?zmxV4*}*CnW8t`FDa zD*8}OuRTb~+@oZeX$0*}z-tHaCCz8P4$Tt0?fpX?LUFnM?j3Zr-$pB|sI#HYddlFV zPvOVxe4Jmu5jam}J1~I0{w~V?4WSs_)zd_2Ybjt_=<%%akBevVc6bm4{BP2*Fw);n z8NPZBZw511euo-GH?@;{Xc*Aqy$qT&2FxHgQ-ZKC=*wXY05j0d+TaX~3mTR_)*#o? zu`o>u1G+4%1O|4R1lmQ2EqBIJMN;p{wB2$=38f8qizB43;y-aULnk3 zuH779fLxnCgXB8V`GuA}xlFObn&T|oL7Ru#shu-#eA9hx`+iYY46L)u6ft50qDxC- z)8Bm?J=Ew~L!LF)yZRb1*hQU%s*}^?uo`rtc8E6w2E<7Krih`6!M!`(7^d>{&Xt~*h+ttlzsp4ZUEvT=)joRu~+#+eb-h$S1H_>^e8V%R4;SLQz zOsI72#7~$xWh#_XZ)iMJP$~W36yyh&02NFpOn^dfG@gt~M1bD-jeP4ZTOkVy3yZkQpWxm^#B4Qw(NenxTns$4}9RCLjbw<#V8-0b=4b z157hEg}$jdrpz=FG%O>*a-D%s9auiqlG6FV1j`vHAICi9Ou=Gpis=?6m}+h)C^Zc1 zOdf#cI?Zwh%Vz{Q{*S?O)+T4IavfN194`lJma~CRi!2{lmIc9Wah%Y`4O^UsxJ9&Z zTwR3i?;OMnKfI0Szkdgd9$kZ{KY9^ARQ-gyzFPe0%Xbi-6N%aD7h>DdeK_#sW7u_I z8!9UDv3NllUU~5;eDe7Rc=h$C@Yvy1I5evo|6u@1U1xI!APR}Hi1rvERBOQ#TV){ ze*_grAgCl#aEC@L)p8p%cPevK`z(n^$m$eCu1!ZMO_l-{L?d8+BqHa>;+-$v#8;<2 z#n-=mjxT=w47;D-1Gi8Q%=9u9U>X~>bB&Zj!a!Jp4^(Mdpe!Um2Jy2q;ppcHw_tC` zqWln&6Oa5=bFgIp2F%;F0$IyTk-ee>p#`y!QQpT`O~54kDKPOg#oYB3c<=kaRyZrDd+Rfi=~;9o4T@uro~k z?1km_qP4TJ>hK1v*tH7bnUOH|Fo&VU1Tz(um_TJ~9p(z#FgKxL%V7Ig=fB36=f1)x zXFtVCsw3}M1vVa8N8?64uD4&o@yp*LV+oaWs57i1U11iXJ!0;VBohFVL!2j61;KDn zR|(*pK}ai^B`ocYg~mAZm8<2R4`^7txK@wzub;Pz0_{6>Y&b#~T^@X5+|-SMb)2Px1E6&uK!t4!%nhpk5dQ z1+|T!74*B+X*A(YNAA&u0@z?4eCFF`US2-Apk5S9?JE{x>#_w^3WG~bJ-|osO@bX! zMiYJ`jg0_(W~i)SNqsYK;~d0QW+Q*=d>Wm5P&L$yb8R<}v9uV@;c|pgTek{wgAMmx zUmKwX!y1Zq*(#cN<_V2ERpr zb?_R_2}>9}31X`l4OsK?b|~@#@zgi3ijzs_25;cImS6GauYbo^^*`aK_Om!Mcpc~O zRpWI3Rh;g!_m?oA7J02DHJ}K_$gyWuSI*U`}o^Cjg^E4s;>BevP;>>Y; zb?$q7bKwVkd+|s7c>Py=dGTsk4}9?@(KR&(}!Y{ z?f9kdDL(Zp624~nwT7No{R^de9PfVr9$xz36+H8|=kW4}uj1{m|BOFV*qh(}4R3t& zSK+=x{y&{~A8#Fh7q5T)7rgxW+j#A(KZ|>BfA@EB?=L@ofWMvm2=CLgKR@>!KKcC{ z{Nv}(#OB;%?>vK@&mY9TmyhDupP$1nx_Y-?Id>cP$o1KSO3GBV|=Fq8DewzdRNJa}p3ZHxZ$gX|zzzLEOq*WNs=!;f^_o zUzUmF<=Kd$`wSSSFE0>0=xj`sdCSXpEXC4CH>2|KCKPX7f<;F+3cl<7O>0!Eu zk=RUNBgK5W!6{lQTtgZwSWDeLLLxR8OnmJG%?sb>4G0F3$Ghmmz?;TG6@3?iY~dX1 z0gn_pyi&d4ndS{?29L`cxF*wgKiC$NSPM_4kLf<9g5zJBx; zb_`NB79o0776KP02pc7tv`|f^MeDqmH(|@ik7LPOJB4QX+}Ac?)8~&NZf_APUR#TT zXO|%Nu?1NB{(j7UVJ*s^UWxRbWdfMj^PDEquQ;?sXwZ*xn}Su(ZxLgIp0ys9Kf6V6 zd+SZtL+PFcDA+O^le~;D%6W=75x^8U>)+T1J@={N^jq?lGNf%UN7@c*Ut6+}usI9K zJMxgUJr~g%XdbgU6X|=35VSlNsk;ggyD0-HJM)DmImem*;z}sy1j3ibJvJDY``COW z(}F#6Q>Fl2l6DsfNuz~)GTl$yRVXB7cd^hsPu@lMcNQXIJyUKKAbx8h0+uHT8w`Ak zjY0HuTJ-aGB5_9{l6LTKim4n+>32mUJbqg~VmId_YEw2MH|8Lcjh1cAN6fZ7L~qW! zPaQ|U-I5Q7G#T^*%n&>`2AQm}H!mLN?p{Jzb_DFCw!)5yhuRf0t!6;!Clgd>UUFAB zy4b?dcsi`@%wc6~24@c^Ofr~+nU*tQ=WHXW&YWFrAn|m9xrHHY?aW|gGELB>Nu{6f_5^mc<(D9qin!VdFyaJZP>Ya}r^uwlgusXd(

    QvNsz{Di{ zrzYXnGZK#;ad;0-$8T)5=%nY9`g%2?19CA)bf$QGIogrh)V|x5gwbhaOv@v4Rvr=K z6NsLcM(BhDf~O?oGbattxf%G*&LUuDE^JooQo~+=|?d77p{(+-+*RkjNYEC@f#_4B!Is4)$2Ss_biQ{a1 zae^aH&T#hm84f-_#0ie_%b~ACcV{!>k^)3OU_S@0uVWi~SblXSE5-b8S61`m>E%kx zFRtX*%YU%+{O^2o>?ftgM}FXwJzw(f=8u@a_8sQ_@ut$WU*<4-73>wW4@cjlx4FR_T?Ccd_IbSpAM(*M}z70{s6ka+m~){_onMxz39GRFrDA(N7bBq zil@|)J*J$b!FdXfOCTQGFB8uyQHKgikS-(3B|P`5i(=G|Q<=8rE&O^!6E+}OLGYw8 z`3+Iy{TsZ?H6G;+{^Si&<`R?#^@&$@F2#dO)z}X4g^_&y>nE%b@3O6v9xu2_K!h{F z(Qf=A>Xwb0mN9SUNX8HB%Iu-NIQGYKZtmO4!Z#){dQ?5#dX=*Ho3|-Ri{#FcUEJBf zolQS~#k@Br^7U_v$nTIT+6z|n?pw!z;oXTXh~f3G-=vLo8x}431kocVJv)}GmyZ+X z>%#U`%lYl=&$xE{05L(HqWrl>MMW;*@d0$|U(3vevq=^8`y1;%B5`;DF@v&2e$A&~ zat)ax-^q^(P9=VHoZpMW300I&>!_?-I?d}v(fBImE#F~ock;x1w&-7EkEtYgTs4K` z>&PEnL-yb@(tG7I`1O$t5%2B0-@HqBN-%qlY^AnyDO#cei4$pZ@Z=tDJ-yEF>z2`>M-_ud_hZ1=K8${CG(Jhb z44*ZO^6sT9UH>C)!H(=dwUd3KKHPfXPx_DP#aoN!i?nLZ>tDUW>)*UZ`@uDge0v;O z9dmi(>$gR({5F4_*`lJ$E2s2ON*`Fp$6LNp(PkI@UYotKy{{)r? z&nzW$?q6_Nq<$mH>DCjNH zLaH$g*X*O2|DVBfjpX0bVnqV;#`pUwH3r(Rk_LePlU@ep8fo?qnkuj3zoa>)N^|in zHMT7>id+t)E2W7j*R1>Rq`Bw+r?7m`lwsU@c8BxV&i@U|Po6%eAo+!Jp52z7<$u9)39&C<`~%TM6CnBKh)Pwqd1hfm?L(5>6Nkd`f%E{l0NAn0?r_moFB?{V|` zBRMNgO}KKqVc+|Ao^$=eb)Me7!-K1rd3xtMPwrmj;l1nJeQ=W-k8W}0@f|KcxyRXO zk2v-GDHoqUZ%;b49=TcSL<`Pn>? z#ur4QNiWlTytw~>XAd6n_~8>CJ$xqgTumPfJ(JHudec9CC?4Y_v7gxI+G!5F{~o_b zW^<^cxc>9^IQ{4a+pk~aqvK&$NKPFv@grUJo!1? zn-$T1eCKA&t`vWM@iJpegezNvoj4NX%NiR4&V>1J+}oLpz8>84^X87X7q?tpx$fY| zOqJIEFLVU7fh) z>&*#qyhHBp9B_AIo9JY(cCzJ1TT?!^(&J6*whU~kMOPsS@v}uoJW(i0ON&q;Pcd%* z96{s0)kX_FvA&J?TU#i?(}Y_mHn3soyL>D1#&2KG;)B=viH3Sl`t>c~^7TEe-L{0! zmww2oDLwi4!_j>C;Rrr|e;6OXJ&;B33|7A7Ykr=`#+C1i&i$KgS@|AYS1nMme8-v( zIkJ5*n|^5TQzi2PQGs4KK%~9Th3s--o2JI;v zUZV!y@vDl#B;HX)=lPd~<6j+3@(|I88(4r(rv%Zl$t9_O35oRuqC-+kmkIqS?cb5n zZ_l9n(b7jT)jdb=x-Bv9xZX_WvhX zt^wxK?_7d%4J?-t?GlvRIy)*!5H7*EoJtTbVY#KPjfyIla9l2z(c==9%XM;@1mtpC zDGAACM7hRNlravKd$*T8Zab*=&C|D80JD~(~fJjUOWVBE)3*{(=mbtyS7A-RO* z&K@qiLF92e7Y7WjOlfT((y?WehIDP)N^=Z~Zi;&1*HHc_H zcmS;oTBB{+j+UlvRaCk3Cf9W`MoYgr=H3ppuxPOAG4pevsZBey-Nf^1r$uW|Lkz-g z@Gp-cv@VH|jtPWx7M(GqCAT4osE91CAOKa z%iSuXu+H=m_mzTvs150T+T&LkOIuHK+*5*ZjPb-i-V2LpXOj99VUq4a^x#6(L6Cms z(y!5{XEN>`BbEPoaDEtjPVeBz*l72G3|1B#dOD&E z6J@Z6oe_TG9kw=YsrHco+svpnbEi#U=cctB-?v=>cRf+Q8H(fjc$s2t+lJeB&M|t- zkcP-|X(=KHOEhRoL47&8qAb^QHN;Q?PY*M$-93%Brxg|k&9OFYiL<3XhGP33T`RbL z{j_Kfoa6lu<|=qA0kgDvadtGqQRFQr2SbeXo2ct*A=cT6^7!Kgq8@*7kH{bow8b)W zaZFcxLv+M35AEB;=FNZ5O1l}&gv=bR6)aCK$swgOS499ySnihWic^A(g5_tQ9wZ>r z1#`=G1O>a|;buuYQI<;>fByI`_HA9EeyYD@@d8p}z18w|tr|eSN;9!-J8_Qsx&k(? zS;ED0`?-Aa2rb0>WNO$-R7p<6hxn=e26XSt@gsZHyC&1Dm5o06z1yQF@@;FMwit(* ziRbTuOO!LeZul7+Clj>A`(tU|j!-`rw8gV?ve4nl?K9%ptmE9V%{;huguB-cvvtEy zeDvNFrcdg}w26IL@YV$WT>UNAFYV{p;SHQTwpD@r7UH_ij9U;I?1H_GE+z&o8Pd1A zNYf{3@X;3Sn$t|=fvQ2B@y?3CEi;thiWEF^!mx>S#Xl{Cd7sQz14%o&SmNYlhL^~< z_HrO;e=9a`{E4qVdyRFgzGUSupEP_>`0g!!U-|)?ME$dW`!eN?fAQD`j_z8aK0@5O zegYR!j<`7+VJM!FolR?^!d)=X)nb8o-gD;7P-)iI+<+M$zOG<-SXmr~VWw!=X_4Ah zJX?{c<)FP^{_rX7#65U9+oIp12|l8{^L4Qm%>!*7-8#?qKY!ukiS3-)yOv8LUAT3e zM^}$<uK~aYc?8O^z z&!M$N8)`;$X4HpMlnqosw-o$)CyRHq0hWgk&cdf#ES{Yr3F(tU%+Nd{hvpJFtbl~k z?MWV7hD&KUT9KwyyxtFYQTEAS;Y8Qx(N#uvhq%(x%aV>CjK@KgE5;5j7||t@aXEpc zx@ptWvn7SE^(05s>rMU4(a8>=_KWG*)W)IZsZD05R8jYKA~4q-9V;z95P4)$=MwBK zS`wWuKY*CfeoPhpKAnJ;k3PxWis(0Q3|g-Gv<|hVWL#&;M^9z7lTP`Zd{TymQaU7sy7A@8hdE_RB^k3T$a$@r zq|qhlN1IbKJeTkUQznfnqu=0cI?O00acVm8v$BYso<{hDBtoaA;5$15&v}`6&CkJq zZXPky^2wf%Pt~X_+V_Z|OTTowj1%pZ$@!wgF3vrvq#+V{ToDNqi-;bVL)3^AQFkPe z+b52?{>k(Z+ayoSC1_e6zSHwX2fs+c@$_MZqzx}tzR)QXN{JYmMe_6_Ql{q;Iv|wv z5i!(G%cN7kNCuVr^Il~*KbM3sKg)r-9$wg%7-CZ8j8j)pK8yM%tTtSf*Di!r+EABa zMbC6c3W~glEpa2Nz>(N;4`M|+2Gxe))+HLBu1TcTrII5QS07Jg_b9SQrjb?d!;Fe# zMrMW4ZJ;RE`Xy2}rGoa;J5V~Mioyxy6isYT#f(~N=5(fdb|Z8a|e`s?f7<-;AH@zKsj3bcQ5@LRq+@iRZ4 z`%S_5RX5i2?a5#H@$5>LUtY)RJKNawWFI>@ss?b|$0;?xi(^XrIjxo-7k!^?FAi~% zE7X5H1h1~)3Xsdla%sUL=Oq-E&rd>f8DXxG1mzN>2lR?1P^4AG(Dn?O){pq?P)=Of z&DuYI67`6d=uzIp$=Q%l(Wkh2?Ffes{>eM@#?!kxpF~f4+}bq3rL`!>44cujt7x}Y zrJ*Cr+aL!M(tVuC_j4!4&6-xCeD6A-2EQmby7#LUU8pNuxOkYXiZm8{_Z}^coAK4p zpRxFdPpGf2V(hR!IGO6wAv={(q7T`xTD;%JI?SCsiVo$uL`3=W^NMddcy2HG-HUj0 z%|ZgZi#AcO6ygWvi1(z7)Da@D4J{;oKsH)lt!NcyfN_!?+L5BY<=q;?cq{C3L>(Az zjBSn=HrbxoW_gOXkQdH5emIHtg@dR|q^(zwNS9x?{lfV>rx`zWIJx;rgoSu8ant}N zjULGSIg>@5(3aV=Co*BeFnoQTiH;8B^w~p{wa;by&h?^x)Z@zaGwj;Ci8bqgrLv|7 z{~&k1UHYZ^W%=M~gXlB52RRkuz0HcGyh9%AHvYoSz3cgS(OZ;P$7&4BH85OCUV~gOp}7R*nn-u084ZJcz6z3S^eRB!Segj&e^Sic zn!nW;mP=6n@4)hZgyb5@V+s9tusrOw1|TeLSmLL4P-ANSdTSS-omxTY*g`eHXJc3{ zCC@3(uL0W{xcxFL_ZQDXuG7GB&329V(aisMu>4h$!2DnC^%c@U?SInC5d42t@)$4s zqRZu)$a0OZxdh}D^oK zn1|<1arfC(aa^I@``KU7hjVcqV8IXKTIILti`>0)N*r5UwDdVYe}*R) zj*ET8$uFFQm4C21HkbY0acuDnWp_wC+XAE6o0@L7o5#1r3x4}P50peRMjZdqU2%@9*Liqd+~dQ0Jd@G-SI>y+5Cz3=KXYW-94>$S zEzfU1=c0HX$FJPs?uoN%Al8LxapIoWbLH3?t{&e9r$rjAUM0@okFAN0>~q%QxrY&m zj{O~LLoVB!bHd4*>yaUx4))=Yw<9OK?K$CY$vIb3F1wp?-QApPt}>e2lAA6TJoB{S zmX!`q98JK>mM8Y6Jhc_`PF6gzFye`+kpkeDnt{0mSXzOVt(e+?g_t)L+uGak%t((@ zqQj53Cl7?qd$@^f@aI58Fk7R8Ssv!i;!qD3#rp70gc}pR%oyrrLz$Hg*_KYEn%NO+ zWJ!d91%ZZU_z1Zho8oJ4kF&KUW~Rm}@>T-IR-*CS%2ZFtfEIfCv}&iP0Bbv)*0{S^ zvvcbo{QT_#zF9P1fs4;RnT@xvh4RIf5rxf7TA-!Zj6Nf~Gj~>R7R>3%`*VBo-s~QH zG_Ma|y+52~Ury%t?`E=Q$!ly~`5qg8eTywC-c{QB=O_HR{0&C-%cpB?I&urUOy$&&@34FWdXTr-9(DpW>scSoQL(GX59qHGXy+fC2J@70F z!6DZV-wttV5Hhc-IIPmV6)gA63?ZjSIpqU8;*k=Hd9Vvk$wBD*+2NWHh+kS5-pRoP zWJeKMl8jZTi&}2rZ9{N&9K+^Jpt^ro!ZYG<5Ah`;ITpXjV3n5AZbeGMav4o7qspZu z9G6k%wr^WOecbU04Im;hhKRT*Wzpgp;7LMy z0-;eMxca!_;qQ)Tu$PJ`*R?f5$IbwK7gMzD^l5FUry|LvJ%g^ZnS$e5X5zV+x5PTe zosjZGHK3Vg{Wq1%ZvA4X%q${flSUadI}r zz^Dao07_Q&7XLBU;nD-&8b(IQK{pNDsCR)BHT(9Tqda^tNx zM)UZoXrP|i!_eWqXx36ZYxzF5Yl@a}3v#=Z(8f^@15qEC`IutwW5I(LmwEC0D&1=H z@vt`_#LJFvK6{&k`~Kv?!^>>kyh25S2L^kn4!WI#Dc08d*h(uOlQs%WN)L8B8v_L` z~rG4R!$$@!Qqw3bF4v5ob>ILtv=c9?|Q6H*wBQ>3ekqLlTRf1oH6 zMHwKYz}tvpCd7Gilex^BF^o?ZOlR%yU#W=w z6ZhNaufgwrM6*B#0gu0)n$U8RL3Y>rW`Fl*5IFi9ASju?}`7sxpb- zvM}}Qjocmuw6bZ9v7-SSwyjbYEH2h2q>1_^(#K7Gzz*?t5$Se`;|I5L=gM(zT|C4u z-@H#%emt(?*(XQ)kr3%gc|ii3*UES2lKREKo$H6GC`qKHxHcn^zJY$Cju3fMK9fIw z|A7xanokSUmQ)Sv$f%E|s`@jqKJ{NB0MMNIcpS_Et3SLDWk(M6QI8?rhmn#1WOyjxdH zh-({4dR3?L+T4Ly*lFP#sz>hunT!@?kduQJmY&Uc?W+ky z7x-fvZbIdlV)g5q<{4ph|MCN}`qeOUQWr+oM=&_cin*oXyw#_Kx<2`ojIE@6YJ-YK zmth-fOusHE43G9;U1}yP%1aqMxrX4;DP+y7BxYhBk&_CDnpi;6xMI>Kl#)25jI>D= z6ppE&qbOGg_fBVczCRxp#q&X*V#>#56Ei)F+-W5wi}|P-1%$m-iu>zX_)STqcu*ok zE5i9aBa)vx71DQTA+h7Lahsfm-_#uPM-);d?lnf7FMLuFDU-^G9iBn*3C)u>+$hDskn5 zXm5VbOQEJboWx$yr1lLFbyOHJLu2qC8i&)URD4HdsdBwQ)QOpWQ}HbKz`N3o%03AU z$PS@9^Pycuoi8m@#NTooY11MtS)_f7 zv}=(TEz+0VI@^)Jj^WtkI4Ro|xxGA&Jcis>TC#Yw_fz}0m5Dk~$XnEXzO|9~cZ?SG zd5n^rmyzRAj>Tfz_CdIo2jbHqLQUm*>s)u7#j)fdmA>7hloz>#;S!ijATB|<1m<$N zv|!QLvB>puI|+!(d>|nK?xNgygEtqDM<)jTNB46bFvPqpt7ww7UetD$!FCt?=u~MdZ2eNt>Q_#1JvVN7si}#|9 znP`uR_E|)fKc9Z|7B-^);%Q^16e`+){vJ-0QYRNXa~r&uy-)R(!4G4u>lwu zHpf4}iNw?}iYhY6ElVYvJ4FT?NuRmtdanZAvq&l?~2|28b|KXLHC*sz>AcT(xn#q$c3H-_cs z&NTpY3CkrY{|_wxkN!_eYd`n7_C$i?)Bg&~Z{O$fy<0rGc0$>gJQ5w$`#j~=-Dljm z`hW-5Z}9l)Ri2)^0oR{NOE$Rnh&$(RaOdhBoM{c zpA*}Qd%k;<7xyK!zYRCU^nzIS&F?}hV9`(T>0(&?J*<`XDktIoO>RHF#>MBilugY& zag1lup5~6Yp6lYiZi>m3r^;65yg1`kq3h2ci(7lZ{b%>M_v8V$9zEfKgx@l~9!Q>k zhi5$Dh1iDu$He*8@uJUMcyAdTz6+;Cnutrgard$4#EAo+J`U$jz;kh|hc|gFuH&gl zr^h0_9zA*_(&!2IA4@$`di3l$ckhdHi+hz3WIT{y{en1_NWaVCI4Aat<4F%&alQAR zbN19#9v&8dZ{NW?xk)@Z`Uj6sZ-#xl;k%`r>)DTOfu0<9XwGw=Ry?%T0>@T7Flokf zD?Jt6ecwPIoE&*zDE@Y^0y`5B9smE5SZ^t0ZXni~bFWnsu(t*aWA5v;;fa}89^}Vu zBe9K}3r}5~xaa7=Z6_ygi@$HUyK&XsmGeTUL}PEeqZKDb=Xjlm10U>}jfFKs#eo1#4|=&DpeR1;79D6~8V0 zgaz+RX3=M_k&x)GK#6Cd6M7<@bZiV6H**AwKb^`qACBZx(I|d*W<3jLc4yJsgZOUY zXny)^JS)DN$&S?@C|JHtMwbiiUbm1v5NnyyEz6Bs8&Xg{6xL zC89IfZA3Q`%9HtK(@!MVWf4#iLH>aDjQ?~Rza3k{&wG~f)81u#ux1g-z4Mf{giWrm z=%7UrP?dmtZWt?$Z{p80yI6gEEAzg49~;r(3n)s&H6uh>M6iXNAsTuNiXB0;&7j4qdddxr$7 zNOU!*r?^K6%GG?!X0L?h8cAR-A-N{XT*7i`!D8>~tYEo}FxNzuYk;|&N>DDXSR@3O z>l;f0#~TB4O@#TYY*?f;(dBZvgyov$jUl+y%lkH7r;%nGjr;-{fVs3{k-%I+aw!co zH?}mz+0#{law*Rs(K+_>#LeGJ*|5mJr45VpF_(5E{$c*Oi}zb9ASwuZZ%15%JZNPm z2W~W_wT&(ESYa3Gfwr3ou^loAuS}tBkcINe5AK*ktjMcg zH8HqVL=fB~9k03=+^fQg>Yhz}?|h8ooY0T4C%$K%0_edVk`z2|7iL9LpF+_wEGK(- zl>+5P@lMKqC9YSV8u+t$h#B$y3$QKp#VE~*%rWKoca9;fXR`V^xcupNNT)cG`exJ8 z&wz}6MZ|T=z&$Gn@4N^F^%FYgklZDo_}VN&OXKj#302T4x;B}Z&MA151QXOTmdHNo z_}3>WAZA|^q9VOz#COEN971}gDPSJbIguv*`s9tPMLXV>;9ePccS$C&XC^L{QR4mb zC%86+R)J;;mfNQW5LTW-YL_CCYO^s2w81SWn1tSi7-xDaSneUMSNf#j+C5&`vAA`P z!nY=zh|)0D?ODpYtxLFgWj{N%{=%U>YuU49B`+Rbqq;Iz4S*RO>P2X{4<4e74EFON z(8F0lL`PdAOpUY&@^#1A&I%_vZa|x6-)HJX(tyi?&RU)a}<@N zsmO98OT&gdVA7JJ9_1K%nPTQ=fw`Xv)}BUOxpS0*2i9`!{9e&s5Ov$bOI$d)Q$-U? z;4M4VQPIJ)ZrdC~BOUzwJ+ZYj!^Bj#VQQj-qoXA)TWVourbBbFy^KJA|Gn9w>OL#l z0++ab?J#$*9~brRQGWgPTUu$0d?`OlihWub>ycWPM_OgRg5~ZBUIgWc_bA;31D_Ub zJo*bqMA>%Y&?bIZ{5~62{m9*`qJe%?v>Be1d;kX9<< zT8xdgaj-GQ%h?*ewoMhN?c2ALxVL+vn%={r58q(v*Pn1n)UlUO9c1;YpJ>`zlwbN< zw6xMDt}+?R7#mu8wZSCJ6uSs(Og;5jx^A(k?@w~z;GZm8@(FvkiZ;np(e600oqgMX z=fvR+1o~Kt=hhSxqn5O5r=?_U+!|9;ZHx_DDp{Jg#XzSCqlWe3@!j)WId^~qyH?Y+ zLmq$p^0^xD^6Zh_9No7~d6?^%h;r1d6=efD5L6t8O}sln?c;Gy_r*BS5@T;;9&($= z1V3~|dV0B=D99b)XDRZ>UQVCbD(byO?A-P{Q^pOz&Z4dQh@dYc(WNK6r7i}dtnhF! zW!kvG;(89L=eT;+_vnf1m&cNk+&UtSqy>-6BV)%8LC3Hy&2(EbX!1y`LmZWNc2rF) zTJ}xw&-6pvwgp~cPTaV4MtxX_5B0%Uv@4v%^KUKAzx;1Ac!MqNW}xI4ct`Bb!tuJYja32ZG|DqwCd$~+yBuOwLK#cf`j zH<1?N8E9a+W1j!tu-vy-625(t@$Md{fO&ZTbOL%NDvOrTL86Qqnn%EZOk#(M&UoJ( zVkTAL*f9o!NNYMy>W)i(2wF~U$*FHo?f8CZ1)5-%>A}z`-4*2ipnoZSQhn&xy8_oR z(ROh$X26@{@#vh6R zgd5TOoe{LojK-)WgRZj%)3<~swRGHvGN>_o6w$=vF()?d6Gz{w29RX(WQe5 z7*n6bqy%SvNs3^3_ae$BrV}(fh5Q-$WR6ZDW_&8Kujk|Qx~KO*D}5I-)L_z`Kuj7g=mE{yjAyjT+#$CsUR z7*wA~&BStYrxuI4DHh*+BVtOdDC{0YPX8ow#dFRR&pWxqgRVWo7@BI!AAYVJ%}ir- zMi5+_>@#U#29YAKYdp#|KIO8`m6G#vP)}*UB0bGBMwTdB7P&mAOB{(qbHsa* zOh~^(lE)UPh;kW8E5|V3dSTwLavPU9Q7EYw5SBYp>+c0qWfhl z3l#~Biag7geT_W7ajYuz7g54a55bZ!&M!z{{ z8s9AXNR+)z88Nso!v^+N(?k1rFn88u^)XfcYR65~h4=4YXZ-l#m|5znUlS%3#&O{6 zZqb%+t)lNs$}*JQm;8vTuiFG4FI#^4;Zthsim-Ds#=yKaF{vSZy=)N<{x+=Iy^;k# zf2ab`4m>%9UuhIR1tFqNv}WD8%^ZDvoKHpnX{)Z7{(#dDL;Tm#Ji<@o=XZCDz^av52E_Pl6+3thf+ zK|%7rf%%!U3YJTq{R@=;2bTXw|0ks-x|-a0bR9&-d@J=Y&+<#shUGptAK&8c(+gaG zc!G0xPjTVy6>dEgUBTy)3qRtj*!R}+d)$8Zfa}j5a^?AB1&HPFTqk+L?t3@bfBzQ8 z#rg~4@5@q8?s56SO|IO#rUqoX`t&vzp4{Z}i~C%B@qn{09&%cA$&QNcPKslmdisEK zkMD8m;T;u4e&_BD(Sf0$OXyNABcY2dC?U-_L%z*o`^=m6LyO8pOg8*MNbon3neFc#aH>VugsSO{4g@XXeT zr?#ftx3%D|gCh^zJ-P4W$5jtcE_!*h-^q!cZmw+g_hw^g5Wfcd@uiO|Z#Y>o(aMm) z#%<}N-;z4fxlglfg_~%wxeB@Ih|ac+9@e5G?4;jDHCp`~>~XWP#?sgrCp&v0A|i;6 zjls*?7Y7Fi+#MZpwYI|1+yXmOGwh|z%yBTa#MZ=IEVIDc$Q%oO(OK0sQZm;O({`fK z*Upf3`bM9ZflUU>!@oev5bK4&kjC{aCzkGO=M+*jY5eKu-%t2OSJe znkvZs?wo$SHKj9iMpiImL^P=nh#ZE zxtxv}Sj5o&?b)*VXZ~FO1IJHo<;;cs{P64NoVtFDGj~t3;qV64X#PQL6VpD4%=&zK z&mPRjYro+4!+)@N{Z}mB_%**C`GfqSqJh*kjr_44C>-07;<2459M*v?*Y>gQ)HZ(D z{wweOwutoZrPNIwK=Ft!^qM)GrTbU2>(){B-8;$0YrY}1YXKd{_oZ}jCu&A^XWOO2 z;{ACj^7%tv|6+mY-231j?u&0!FnX4z%9~tD6Irf-l#Y~%QcX^ zF}RkI-V&HgI4*5hbJ;ESJZ8d7aeX@I1ihU!?IVm(k?X zpIn0S(CBdDGm=$AxksQ6F1{YP2l?O=9*9?n55cjagvN*C7ZHH7uedjVcf7^(vGaDs zDaakS2p^i6w^5PgO)a%)C8n+HbyqHb{aaK_w1lm)siard;t!@~wEYh85p zny_WluiUtPRF$>TZsh2p&0^UKQS~%c*CzA1gyt#5ISsH}Uo1=TA|Ok=qbbg`b8pJ( zeLr&O$a;QU{0^5+@81rt-ZGADd7ImqGrFeECo#fQY+7v5G6D-a2F*DY|+Pon;ebkU1YLHZUpQjFP;DkuG z!@K@a*LU^Y5wzv6lI--AMNDE%I?k!SwDJ+hOK`^`#tEkcH#~)|KRv^RtNZz2!4xu6 z0(kfB37j}C(rwQwRR>A9FD*+XkhT%^y|cX;mZmzG8nzL6OBV~nc9`jF<6>)0Sdb@& z_HE|EnFH#B#q4Q=Daa0I>V!UAyL^CaSB^4dSZ|uOZbA$F)(oCH66Y9CyfQ?&DBdA0 z8!bZf0x@uEgQb&bTZnedJFiV7+Sdg`@f_NU`~LKu`Jx?lhwE2P)46kndOp_HhWL9s zsdqy@vw#3mPCHv+Wub$!sJ~@;X^Z?hb<#iu%Wqvh#N25^7|^4PuRnc_=l9QW?c8qW zy*7sChE1p#TK6|B_pfiTVeu34@1KfKk9Y$5Br6LRIoPL!<-r3o6fBqWs!t_#T4(%4 z85K3A1h2ACHP~zY>q9Y&w8y~PinRI?GADGQS*Qtti7vc3wHHHjg9#LQD8DL|-ZO?^ z;wkFTP$vrK_QR)d7FzDju}C(f^Jm@g2yMd0fesw;4`8>S539rc_%tzqughZiRFttl zW_s~mK_Cmnb6#DR%vRbl|r9B>2&LzM)J5!V&~)$Ju;D$ajArkiKVd8n;!#w*`1Wg zoL;GP5XUa=5JLL`PsWvc^M0;7-$&T6BHfR-GQ5~y7RJnMFXm-9@pZ8qOJj{W>~F#K z7+=;!c(Xjtj~~Nb_*UfS*UKa6S{FfR|0w*2CzCFYpVlRT%#pc-^^7E<+?)IyPo|e9 zF`*=$u0upU(>0v9ehm;@f^Cf?(3X<(8c43$Mzc<%WOG354|$aM+JqeR}83h$Yye8hvg#;9qisHo`uqP|KUo==!~ z2jt%oy^<6xj~Og~b&*Q^@N5On6Gr3^+BcE7VOipx5%(b0M-56-+h`OqKwPKTMn;x* znb3*$-Sdb{_U4&rW$xOulA^*`;DZ5`{{x58* zXcp;;wsBqvDA2<@TMhd}KRBlZ!O%GwzPVcX<%Nl5n|S(O=4ha3*USZWpo`b zKK5uv-y!}b>(J?gkX4?7kH2~oUwrc(9{zS2SFRq#lBMrs@Q`kJ_q`VoO!bO_^5f!7 z?Q#bhX1z99434_~*aqysdlYpqkH&ykM`Fm^bG0vWYM_-Ny2_R**%dqych-3I-&FHL#WP8p>`R)i*tLTY(ZbhVjKl5XWw#$v@BEHq`R~c|-koVL98d-1zO*QyUfr;->*?xXK>}=1zdSl56`du zaZkYU8+7aqIw41y-@kt!kM7;ZA9rp6x3AUPsNBARdslDa!QJ0*|K4K}MSbkoaNv*YI84`fftpdLAMrm09#O~o2Jis5f0LS4_aEa3{={xtaT`g@$xI7l7*Ll1A_4i7@gK%4&~K*hw~>woYdsaGBY7ybZUynyDv(LU^> z{@bm``2Eg95%qodF`eVyZ@6`X_Tl5%w&vagT)KFMQU@+R{u5`Vvkz@D9$UXerV4&v;WA7WQg zH|+9_#}zLF5UdCM9P!vmhC9A8Jkqwty?|D@?b!y8{9J)hC9b)-;I6+n?gn_`p4RprMX#0L}Y0ks+{66ZpH^pb<6J8U@;*iQEA)=O$_MGqCp7W(KqF5#v<(PE zOD{h(a`b?`UkJhyk`a}b4NZ&%O1%O8-W~|_a7KW;lbG^=V5|UFXZSeU!=-ggxU^~o z*Ve7!-nK0~Y;0(13+I-tVM}?mwWnq3a5JFcpYyY)?UB7dV9ochJ@#2)u zh}YS`!IY*W=D3@UQlyN<<@U=;J`PGS-K5Hnt^`#HAMT@S3YEaaz2%Uy>Mru_$ zK3KU3;nV?+YiB`b59-V=eGOl3U5eF*SK*zN?_%km)-6A4a}D1y!TEqiS>yBzDU~T(?|g45~yyT?cd++Y6)LnSqq<)DiBSgNjkzP&uX- zI!^45E|Ul1wG|)Z#joDQg2iv6cG?Kx*Bf9`K@lAWdoLFO!C4$-F2Qo1wxF_Qe{x>0 zq)w__8(I&^n>DT<o$UdP)SdZ9~cN}yc8 zbiGDEa&1Hy!VGjAiRXDRPiauk@K_TJ@ljA4bpn)&$nppcLc-NzfXh&$<|!l>pgcwo zLrOFP3<@Y?!=Q-QLgv~WO}yHmsh=&pqC*g#N1fj;`S@bfclc)KN&zEXV}b-IX9z4n zd5Z8bhu@N!Z9fbN&O2EkRJghb^gLTQYSH+ zuD4yh@FS1uo+$=rHS-X_`$86&FDiaM7r*(xNDEQPK|GBn-Iu#PK( zf;#gNwN@xfn2HibUAJ3}|{LBcf+2)O?*KMv<0N zrb1k&Us)uAsFUkgWPopeIAXeH!p2k&%L6kEXr*yS59+YXd|ScCtP+0a49guel!zHp z2xae70n3AX)Z5e5J~TuE;IxIp7w~;`{T<`U&N_nYq5LR zH`u;y2_D=(g^r!_1axfc*bBR>1Our+&qrJwM{YsVz8p zaJ_)Ezui5HoXl7_IX8#5AJwse-r}9(=b4}J0Ln)wy?+t(t^~>h5Ju0co4X_J-xgY( z90>{GXxdDMy1`v>;rwpwqi65@iETK2bUVKP_7f5D?&j@+#%-DlSe{apjf{3rY*@^p z2uq{q-r|qeAu_Dq^%XX6UWyY3e!+&H7h}`vCAfV008Ss;DatN1H~@00mlPp#D1t+v zP$;0G_mS%d{>K?ZeI?fi{LelITNn-WUaJDori~0MmVJ(^=MUr1j`i61^HN+tdk|lJ z@s{{yOcQ!n7%)@}u7XRnJKE@NMP#`;Eg1Ge&G7o7SvYZKBlhoKiJe=&!QSo5MINu5 z-Gvxq0KD8=z~9dX3Z*BMYPz>-B|?)0`zIXOzXmt1AI7iizY$h2&8h5sJssd^(*j+U}_)Owr+%*S5M*`J+s@XE_r7#g`)@7QG4?g1`q8e>~z|? z+oIo?K?sUfBBCG~!BlT>WO;mP6k2)65Ttg-)hh>Z?d(20yl@P^Up|S)mrmiq<gIqDMSzH!3<>duJ}gjJ2ym47lySAx&blT% z;&1c7id&YEzQdi1yD@+62sEWOkOa%whDAs921k`^`==s&P&$lt8TFCngEA2}BnQzX z1JxA~b=fct&qvItQhKk`5ILzFmZ_D<8eRfJMHK8}z0voj5%7r)Mhm4AA_o?td`=%Y zD_S8b!VMEEEyy={!%^dal8HT0J+3dDBK;vVx}xi=Ly<~#k&8lx*aUmL-Nl0KDg{mi z$+0R)ixrh-yq%=LT#XYpv`fO*$tt`U>WmNLlz3a~hc&rLSeYG%4Jg2pkxp1m->B8pe#xI457l%d%Eu(3 zduId2caFzPz0xtQCKeMqM`C831@lU^_%_@RN0Vc*o$~!zaS|qXPQV2EcDz!VjM-)J z7}Prj-6!TFX?P4Wr==l%L@at0sjxG`fUC(?e9$==qv(4uze^s5Cu%SyONno&&flW& z!byV$-^Z!3ye173%^p}-6oN0Zys$RW1qZ?$aDd0>q3tV-!PNc@z~&S^mX^d}G?i6c zZzD7VW0B1NKimp)9f_Vb36wJw=Vc2$ za}2^6a5Ds#qR4qYM}_m0ml=X{?zu-D?Ks49P8nsU99x1QX?(morBfBc9T+(miEJ&hR^GKnl{w7e9sN493mF zvXC$|Q$X{EVql)o&x&5NdSk$}K8VkWfG#cwaVZ+an3cGA?Eq?e6~QCe2KK(q;2vUw z1#eHq!ndbm_1eW)`_pGQMep>27bjrS>=EcQwkMWvSPGLtjveb);P9q3IJk2?dJpe` zIUmkP0kx&$GU-{HJ_cR8S0Se&3mXn?f*~UcpZ@$g&fY!)b0)nTYnMTWG?tXN*T}Z4bQp>I+!6dIh#_0JA_$zgv&-Q%B>>`D2(mdm?)F z?}`sUdlwJ?yo=Qvf5O(in=o?n2z<755%tBXKYjKPs(V*s)Rd8!{rW7d*!3g5)78|j zuSG?lQoO(9O_X;nz}9_hvG>R(tXj7e!^ZZ-ho3LRz>z&L?~Q5neR~mAy-QI$u`jIE z8CZLABYr%w9z)-rgagzU?KrnTB5EvR5cqdDeTu!m9mUGCYw;tgctQuH4lNXe_vTOQ zguJOW@GT36dx09c(`t}8sRLwjE=Zr!9+rs}Pholdgc8I&0pbl|IfHKrmNWd8BE}_4 z7T(V5Ok)egR08Kb70c7g1pJPi%--kqwktg7r_kgQBu*5cR z-y+#9{EmCKE&}x6d|prryzv!q@*%M23~>7%K%HCMI|baNeXiXi{Z_9lx556~phg1j z()K&N|9RjRt-EoJw(-8CtF#~Qdxhq&+#p>c(LPrwy{nY=RXX}J~to768R+E;O+Nm9bFrnb6$%G3r?f9pUf8bXI*G1}fAY=nS`4Upi_&EYXixjza9e@733Kyo%!OrXg>{BRlp9j_SwFd$maL2O+ z9_jtD*UuK)sI#@xVi28|@1m6WJ}LxDsZ;Pxv-*7F|eeE zue*TV3|L%!T;S&G3TIyz*m*jlt%p6@xZ9znn?0JlQTnbnkU6)3%#q~K8Z!G9!n3!P zLu0hHm%-6l249~>*tz9%Ec zTzvDvM6CUC4pw|L8K1s9Sith1KAVA+U(6KI z*yq?GB^W)tBPLJk4`6BZc1Uf+XFSNCH7qf^*Q`?Ix% zqd5qHbWB{AOnk9>1vcK?j}@mjVC}Wti0Yh#& zp22ioBpzhdLr&!o>;qF`6qE)v6h<{tiZftLi-l)cAoOW5h@cK&aDo<&T5p7;=#bPQ z6ULH6m`an7Ut5Xw=XOGw5iUHoIjYGn$_L7l7=(39hNg2ed`gVMlQ*C;3aZYD0vxlF zhL@swyeFDQxg)kuu6W)!%3NDzMsuSZVtQmDsvC9c`xgr96^=A_O$njSV7l-y_fA&} z`<9k*-cWQ%fMr-I%+!er?_-6AI_Ns;;OqLQAYx#en5w!bh=|XY7GJ~+q)t3_Q0>w} z1h{9vOJn~GL=MOjusv!ZN501+tY?y#*U+*49Srd95P`sMF;MhPBqboQcRYe>EePnH z2%k<-2=AAUu&zn4Qe%*#!(w`7pmm%Vil=siwvz=heRH9$POAT>KtZG^D@)H}5m{~@ z?u!nid&4Ed7mfyB$g{!`+dW%EmNP78&vFLx%3c2Yx8;5a4hax2m7%IytwNYqjc~P=q=wNDj_`0Dl!{=e6(P`t zDv%Txg_QURF}UZP83SOTg8ZZ5pGg1J{8vRMd75u-qoN z4Lrl0;UaH=11Hzv6x9g_cmIG(r?%qE;Z68?*&+cU0|K2PS9l{(LGP1NN$-;i!K%=w zQYb?aqEJCi@0FW}vw)i61|@Ryli?TW0FBNU$Bu5q*%MoE@zi#lIJ61Bto;s+sSa$` zx(S-wQTP!JSB{)mk+A}=pZ z{M>!y@V>Zq;RyC`U5%~lz7=UN|L#LH;yRkji}P08uLO?t{I}4whJSJZv>6ICbC==W z#q)6Z#2Red`ZYGL{RD@1|47%j4ht8I7t!u|Ej=H>ZX(*=i^@f+kHnP3P(MT-i~t{R zxH{ONYe(wT@St@WakzSBH+E88yzAGmaeU7z9NqH^uADm{27k46Yc3#uSzQMNq-x-q ztQ3RnhUP^;k*b87+8$T$AHk-rOR#(EQf%L_7(2Hw6TcqVvHb`5``V#xYZ=1Bf?;pd z5>W;{RQ%6Jsx!4JCA1p4uT+P6P(AGH=>Zizmj+!35~9@NAOE|zt-!GZYp`|05)n~< z@!Vcam^c`XsH_^>HpSSv6X0zKfUzJ3sw^#JzA{A9yW|?&5}tl7ar?$moZkN{&hOob zLmPg=xxHJdZF2)NCXN&qIsD5CFJCtV(mSEmg~C73NBlw{DA-^8BPm!B2wy)Bcz8G< zB*+tSlrJuC_FX@+XEn|r--KhkS7Oa~Z{hysop|%LacDzrpLRn#p>E-Ls4AkN?35s) z%2mCSgbfSVKl~3n1Fehbn}TqTFds;D;E)_d49$gpFlksmLPyZ@h+JfiE<^6HVrZ&j z&?edgBNk4CyIBF5&JNa5?a;oqSon(1tjWeZGX}yvF_5;|Q=L|Zg3(>zZlbz9(g#DQ zbVWb9Z^J47SK<L+^CC3Tua!V4#}}z35roHM}=wM{Ci`!xn?6EmTU+ z!iqi}@p;cuq_mM?URey5_9#Gir$*@Q+6F7e4nT*zD0r)E5FF!+$?wgAS5h<->9Lsg z%1|V^$gm|V2pggt@kv=27S<$TVP!UEr^Ms^+%&wN5`&LRGB7sG4Ik!*V3DCM_Nv@) zEkTd183rt+d-`6H5uaBje4k|odyKzWnSfElGSGh*gX&nk(kT|7lp63kwP}uO zLvgaeiUqX2u!{mC`Xyj!qCb`&!ZACLL1CaUw*HLn;k+M?_$K zybw(79Z(?@RLe`^&LtuzuJn*o+fmtGhuW`1!hIH!A64*ju$53wemQO$x&l^ zXiF^13&S@(tmsvspl_i8VM7v-PtS+7w*?V&9Wi}kQAOXWVdZAb%t=69VKid;#X~vT z0%L8W0OSm?8GK6-;Jl6_!&wbsw*<<0o+TaA5TNtEe7uydloqGM%M8l~k93v=Mo*4$np6U^*u~_vWFQLOh=|JR9*GNzO2QNX9>j z*T->mIc_#~peOA=NdS&1*!e}Zu@4#&*b#|s;)84Jf@-h0!~b6gjMQoEt7wg}&D z`3f(5G!vQa5;1Z1UgTn4f5w4Jd$9S? zFR1QUAs{+`TcWc~$m)~{Q?3c)-k1nOX)IQq--MUeypO5NUd8h3TaiDlD`ZA{M08Ka z$}5|20H<&a7qAmY&~8q5q>U>>!pH(-OlgneS>35UX@z%*P7L;0$^(2x+9PE`1*}us zBXMH6uwjWCUySG{Fr2}-WSheC9ChAM0;==A;|ib7Hx#cE`%Wqqk?N6?>6j^HB1&8} zC{-Mn_hNTMk12p9M^2?Y^1z~VDq)^mCD!wP$qPCPNGH$ZrG_y4 z-|1OU&N5OO0`Ss#V`orV&G^T4NH#1SS7PtSr`_zVoLHV&0hXo*KSk6`~LJeR!dzSM6pRDHr@`idoApeKX zoH>IF7cPkD`Sa)hhUI_jFD2V^Xdm#~9q^!!zkT-&Hg+2ZY&-$%JO$i(2p$L$*J=5} z`Fc<93y*0^I&}j$eYPIxUOPy~)06@41=^nh@R^IW{W5U!O8u0@>*!&xhr^UU53YHR zj%Db3<}ittPtp2QwEZNV?<50UK9-N;^V6{xY1?Jmhaoagc|E7gu=x^A88lxc9VHzm zaisiN5`*YVB)*2TEXx0R2FwhbDV>X)A4>Ba<$?2Yg0ANz=`86YEi=%+M*Cdi^OG2& z-=HZE@OhQ?xk}T^w2w&RNm^VUH)#EB(jD68Cg}>zU!?VXKHl#%iT%)z)B01i{Q_^J zd8#Nx9xhP1@G@VgC{Gd(z8k1afZvB#pTgJCr;BjuT%c$ntA)dL%y#tog-Zs?)&MU{d&pmxon zYAQoOvqo@k)>!AJ{j-7*b^^NgJ~8uoW6Q@2u|<$0>`#}if=!j zg!dN=#Ox6jcxP5`yg#=e-kjb8@6mM8OLh3@#l0|KZ+=C1Wbc$Nta11n+W*9rCA$>>{tOG0X(T-)<_3#W9@A(=1 zUl@b1{CKz+0}&9Th9)LLfO5Y749KO(a*ihF=y6t~)-A-d!FDVR&6~7sC4f0Ybt!VZ zp`?g%hUAh33&V1@VR7;D5Wt)*SOhfp^L+}-B_J-ra^BVul(QPba*i(lcd%Sq_w0H} z68vWH-B1!7m-ds^N&7xs-@tl>B}J37*pplzV-$mUvgHa#le15}Yk(Jglyse{Ab5xP z!e1Q(rAZ_FGr42UHB77&NcItRn<=8Z zHN7p+_O&3imsv!DvmF9QdzuDiqOCO$=3ym>8&m|xY$cRk&4?ROB&-okby*1OlZ>b# zIrYH3U#fua${z6u=p2Qht}#&dNrZ+v>goX&g!E5>Z|`^{PVYeL>AZCA%rWht@0bAF zIB!IEvBD)g_MJu{b1D=y2ftDy-h{5q)^vT)^z0wDPUQSRe zjvA9w(!t9!6~pAb|3i}d-pEKK6?N6 zZ24Z;uuLA)PYjyo;b8-HSnzXTxkgB#)F4Em7J!;Te{cu`O)n%Rn_#x+(UQ)2_|STs zJ+@hhZ9LYm`yNf2)x+|Zj`gs-v}*@MWtc@|xtHDt(FM^6Nen>SkS18MaS;w5TqVHq zv3+Z?Z|hI^_2+NUx`_<(0B@+2A!1C6;1H$Ai^x-`R^(5vq zC8fDk#z6=Ua>c{jXK`TrDr{f-4_Mxq^4ExAIejlG23El-+5>G24hTvPg2t*qD{mP- z`g%SNANv`*b}q$+HH)xs+xNJ2Wgo&d9%A5554YCh9|zukuJDulBZ%%V1NvxN!7Waoudi!d~VK%kA7-2%u3uxLQ1a z9u@_Btf5e3>ma9R)>UPLD|ZiI)27APyX8yl{PlC}+xdftDsRtYRX8<;kCz>lohNi0 z?N0TmDmX-ddu50Up;S(sFSbAPr8?Nx#{&cVb%jA2fOi(o5PxEO*!WK$mTVGE;-b0ga(g4~1hu(|TA=?W@!K*5l&-jX1aKS3Ed( z1c$b)g`cYpk`jz?aBNHEIjyF50%d71|{QVvfZJt0Nt; zA>AK~#}=S#ia%bm#NcC76n?U%Vr@nWKB0Q%r{q|yp}K#i!43za{BR^b1gjGQup~7Y zAEe6hfklpGW;IqN=&-^ZhEMa2m|B~F;XRF*m8-;iX(}wXDzP?7j@xQIPKJfy&HQjo z>|nrW{qpb%wK@0cjX1A~!m-#mY>Cui9lbZ(6T`9Hq`;1-P;5wuz{+?Xen<+(ugQ_v zN#ERkfl8d0>##Y;jNX%ykv%jFQ|KC28A5O_(ts269bFk0f^Rcpup}i9Z&tQP*YO1? z?XJh`rT}bAh{iXCshD0ChtAz1(V>qX!>fZZ-)x6%5xzK>Y`}c_j!iDo;gtw`EVl$; zd2tjbWUElvCl01QQON9Jfu&m_!UiQGyk88;+DBt}Nj&D}Ct*Z6eX|B8Ab4aV3j$Pi5B|j{}rX%Zd4mZ$g?m)b}`a>N0?KHmK@GUkU+l0** zb|JNA9>#n$6Z2QRftg>vgjbipg+=SWz@b}*uz2+s_;%fwc=f{tSVZ;4=0m??{s(jL z`MSmQtn|Qyccx+8g)JEH)>wphPDb9ijzXzJN>M(u7pz0ekTSGX{NgRDH+#e9Aa+2W zP;~zsME1>sp%1kOx+GB>CJCx;)aL0T#)=D}QL#XBoM#%CLri2g(6 z$S%m}S%~Vfl=ly2VcMek81(WObbp}^o#yn%;CCjVbaY3Ie}5XrzdacXzk3reE`AAp zsGgYq{tUdc;$3u~*b7x7IwG@oJ_-hvW5Or1L>uXsJA1Gf=dlfE@YADx$eY~_o)zIp z8d-w!xjj%evn$G`cR|!eB%UCzKfMjq*IJ;-8|-c{@*|r_*)KW++-8+1*fowf4~qYlo(IcK zl!kz~Bq_37%4f_RhTZ=)SS|to|1DT9MV0>}Qv5#xacTbf+v?RY`nzG|H_!hoNyq$^ zBv8)#@>E3eKLO>u?SBiF8>i8Er?yAZ_$qK;?HJX`edi9vh*@I>yqKMXd3jlwRgi({MH!e`WW~IKL@dZR|r z6lzFY@oBOZZ)RHYLLTpzh6!b97+;ow36#c^V!o~nI+qo1QRDr!>=cpz1$h>sS8^;O zKl7-AFssOd*@e6I=!qHwy z>-^Ey&KEY%$j;Uq_V(WJa0`T+t2Z3%UEt*4h^WX2B*aG{EzOLe5Fa@BI-|9(BU*dg z*UQTRtvv0~(%lx#UE89y8?AG(d#YB>wCq%`wvHrQ8?H;k zH+SNbBP+3B{l_r&&O%IWK61v^AfdJho8`~YZb@WlD#yHz~=o6#i z9UNF+o-U402m54L&I5ij5NEp;S*zwE0^QNeU0Aa)KyT?_`xJ z!A`((I~OMrUGD7ZE`YhaueX5WY`?-{NY0X$dE2wFoGl~%3YIqn=6?mqpWWUNfH#!1 zUfNH9@h98{6gh$5B7zVzXx1{yb-8VLL04z zpE>|BY4J!a%SK3S82lqu2u{+$R_%edq~Nr0gqN5hPY;K_IF6<|^q4sayC0rFbjMUN zD4i_S7QsaZVWXm~iWNV#^KTa^BDbUHIpXLiwkU|N&4X*Y0#2!NXxqobBRv$l4oL_s zFu)-(P*||=PmB2{#Rc^IxTY!u6wesi4vln<0;XpUtAtmE8ZK!{nEGTRvR|$M@u6MK z)M-qthur;B5Yi(aA>CpHtm24H!+>-VS)@KSK+BNi3q;SQ!BKy9xMaIk3#Pgf^V9w8wNpgGE2135{8`BL&8ysJz%4yn0w?w4t)HHMzpi><4**A8dSO z`1q^&*t_q0?ArbnHm>=I?&&Z1dD({|%2^rWAw1{<^S`Lqn;4Qiswt_|bRS0hOis=-s6q@-w1wZ2vlJSoMi`UiR-^fn!I0 z#rSdk1T1gv&;+ArkApMSN9uGv6!ac7lQ)AgR|j{c4FW>!aQF5xoY=hvXLhZ_S<-Kp zj-f}p0whzrqfJX0Jwtvl#u(^ZUi>dyrG1GgR2322+s3WB4 za?>FCo({=I^w3#UOt@x))-ws~a|i$KqtH8T)+w zanjod52($vEG`HOll<{cRW#;OerM*G@Nz{O=1`k?2DRbm6sF;ovMfxc_S&qhNNRtY zFq!J##g!RYR+NQrlTt9pWJF?^FS-w@Mwk8_VC!ci>a)48jz%s$W51TiV7b}`U!?gX zHPsQF>!=Ny7l$8uw#W2%Ikm0Bv8XZ&QzC=0FfR-*TfDKd*o1HLb$G2ni5IIQFtd}M z+Vd*RsL)}4l>zh0BQUup3jK$f(Ys$XrWShNiLAQt7ig^_ku#zaQ8b@jTZ}<34@1qkZs;|& zH#&{1!K>fChNAwZD5@*NhrfP~U#@J$$2*pw^Su6u>qpl=AO|JWyNZ9b$JJ&dV{9d| z$5kPd#Pd95rH`vb+SqnT9bJx;QDv~uwX>&x^7wX08cX#BO;aaUA#GwctYc~Y$a2ws z=k`+3m>MMY$Pw@9g3(Mb}n6ryqL1I~HAEA1d<81CkDYcO2GV-GU$N!-PIQ>q1(g#zqx{Lhq@|NPBbnMYnIkLFe!&27ElE5^!Ss&e7dJe9L)_>h zB#kLSB(;0usIIiIjSoFXDN`$v@j@4vCzXk4a<;znDb|T7^RoH9A&YW=bz(bYOznW= zNmMqIDg>;43d9+9Pc0SJDF0np9zzNnnM3mx$a%2`Vn!E=`aQTyEXrT*E9!fmRxGTg z?*YAU)2a|Xp#+vW9g*=;_y063{|}&?<~ce&aZWuPPn_5OpCmzZ2IVO)b`s)BmP-)# zS-AZ_4a=qTup}5R0d&@X1(r9IwEkK6{a=-oHqY}^0CFm838MeM4a?brMLUJ=(Gysn zI=Lefh7<`{KJdj+!iI%C%Q>?A)WuT*mY+O*?4Mvc&r7hJ?Na_HVL7MC_A7tG^1t=( zBzw$J$A3P=fpc4M`?uru(a}eb0mmJoQzQ<@CuRnb1iB3~`q~oNMq%$NDdCj78ou}hCy8JBZG^a&ra76bB+QwpQ5RNvd zmqr|Sfy8;_$Z`>-O~+keI}*|*(p3^KAEot&NGC~Wp6ER33h6580-cM`cbLv~h_8c0 zFDXvbGK=%UI`>4pjj!z>=>RPsA@MP1`5H)PpB&3&z}pUy4nH~OIBn-^p_d=0cs~-C z>v<}Ri?=D?*GRkRx;9b%c2HWBuRT|Qy&V015x7Cue4UQrD1I)(V_cR`(h_NsPCrj{ z+_kIqx_XJOneN$9N_#Iu@1vCFWy&X=_wXJ{^JM*f+OZRlH~)$|2Y2BN-IuL&-Yr*- z;`Gs@xIx!+_smh;x_l7lE^o%IqpN^@oABqW3$UVVM|{$&EB-vNQ~XlF7^#A<&JQ68 zYA918V9ZHGm?aMGK?>M9`@`8S6i)7HH23gF6E7b$arZ)FH%~Nn@j?@4FEn@Z7O=df zy$@R3`@+UP0Je5PaIg)6y-gq-+R~IH06NLWPEOldye<&7Hhv@@c(}>o=HgGsxxmrh z2~ma!B*dCvO-?{Spf_9tJmBE(0b3tewDod^Ez8ptHXbf$>sBA_-qwZIIXhD)o0c8x z2lbTHv_)IAwXuVZO&d5nv_^oJjQ}spzgU3J-ySOl?_4mxJzkzrjTgsNW7g1e%%;Zc z3!}PV&hQSH)IT5d$F#2p-!aBV7=1@$X*b%d555m-$btq|XMR;NeY6e%M!?0?Uaz}P*e~eo+2R&XKj`X?; z1XIU5qEm|SB2TL;LHeK)oBfAUt%h3yK% zbGB;XWrpSq$T@PHp*V}@d7Tt-F0E%^&i~wCVD9AM_B6U&0^@%r37|_+Fa?xN0aO0Ob7~7il}mLRiFUo zE`eSMj!+4Ya`#{_gqw|s&N9PI?FT!B2i%N-XeM`rzeR(fG(CbcBjB4x`6!A(dTl9o zJvfejFONi{P`U>O7br?h2e>C-(9I{r!d7-|^z%S1?V1a&$S&_vM&=1x|) z#rRUkIsx&W(x54bgr7x;z~oT)$A`ctR*r~b>fncY!8zOyab;Gt32}nVyCpO^CK%f% z!#z!fc#MlZakNi|0S-$TF z+_`xSxtR%Q)x43g8$9hZxOIu zr|^c0Lv#50xUj02#QfcZaQc~DRg0)u=JKy`I!s4ui(^enhH$G6|S zjU)S3VgL3O^a)#oEgM&$3EMNZZUS2uTLH`S+n1uOdwa<2njnn6Lyk%Z7_)U~<|D(} zT}#D301oU}jMj-4GwRxjNFhe-n+Mbgbd=^5tx zMr9{OmUI480+>@hK=qcBeH*%GW<=@(QCVuiy&DJc%g-NT+xjnYV9SqBVY!PBm04RE zI*jZt{xRlB-3U3W$p0^c`IJkMSfaOOItikYM-Nf<1L2knLJ0e^Q z73D?AWfx3&p?j$aQ6q@%rGoOQ)oBo-3=#v98mM0CNB76YR)(wRcH`>VZP>i-Q*8d_ z3tT+E1Cu7!N0v9Ge2ttw0?sN|Xfnc~%nU=*z~+c9G{Q5~4*p7e+`DsJ!1B{OR^#;6 zRd_&cK9k%N=?Mn3YF2N<;veiM>PmZ8XXqm%pAPmc)$I(+ef_;C-~I>>Q=ns20qk4L zFtoMsvm7%&m@jOG8im=RSO0Rno1BavjnVitIuy%elsH58WGg*0 zAN$x~OOIUiSG7ign+$XEBk_6f5)|0UFd<2UcdBzRit7G}rT~o8yP=1=6+Y{khVRQQ zm~7V!OH^7M9xwp$L3S`%)ukX7n4Hh<<$|F{N8P zX7xvIZYDx?Yv*Tfzk%)E!O&Co3e3q!i zH^p%nIxGRb%L1@I#2?q`dHJz27GrvZp=g*2X_E{{9T1Mvx+rw$t3vM_TYQ!7kIlsf zEXWALyi5g_q-ybPN-*Bf_rMqCR=BLS$3v|**6Tg7J~jwD0v&Obp3zegIxIIEFtt}U zis>0DuS!CCw-oq}NP@@UD5P|ZM4z%a%*ZoiY+*dI=(}d<7mK*s`iO5S5}fB7!gC3J zO8{Mx1j8Hd%aYbV3(gxZ$M#MVuw2tVLV)pxpu8b4XGQnnK|bl&x(oryW9gg8>p9Y# z^{*n!C0HKCe&!AI6qeII#y%;?pHPM7Mmuzy*9W?yaO4dvKrFRG@`e_pdUg*4mxm*9 zXr8d|F!fD^fxe-IbWG-mVlj=S@2X{dDUAKCC?3}yB}2;4ZfFJKs2v+umxr7=-C!PG zgf`T6C>~M?M}sTUsU4Cvq8vHYwvQc{h4NWFkVEZd2Eje%_lL|uhQ2QhKvR0pcnpGk zYWJtt6(FX&73m|W-953I@}7#+k!463S&W2%xkwsTfaKvNbX{3g4n;^GSAm?#9g#J; zz3}4Z0dLdBS0ZJ6Ia0>86VuFT)dC1}U6C|_2es?~>(pwbOsGWC=rR#RkUymhEQ5-K z|9RzYtJ@%@HV;X(f7*~@@ehIM z{#me48Cb_u2yhlNC||T~%o8dQPuCJXp$wMk?V+LPBw{Xc=_49O*X7zyG&3%CDoh2;{|ZV1X* z4Z-*G#L)X+NlKUZ{r>`%8z>zeEgPm%x>M+#oY7STE3pmBkXOfHz{J70eE+Hd<5a3%o$J8et28}L%O_FqyG`pPooyho?j~@abm2Dbdxz2` zUA{-@lCIMHb=r2F(ql2yz4AntpXd^$ahY_9_Pfl!-7L0^VevXTKl^ZBd?IO{J-T^% zophCS=83M6ZjgAtb9C%!O5-f0#d*0#x=8stM>C!ysf(@Y}`E1#?=$8T|Cg-*$vH{T+!IU6^-m&AhUBuD_6>oGtIYYg(fyl;q22E z+xPs0$ZgsD`jyiYoul z!g3x6@L5nUfo=(QKM#aUYPgM$ZwTI{^$fk*O{2}6|yZpjKn zR;S{dW^U?sNvTy7rO3gLYi(ouxFBpx{jz#gT7x1)IH4z?@yiX;rz_zPzO5`ZOlHf(EFD% zxC~x-T4BQyJDfT?bPU6AjwELr7KY(G5FcAA@HRtjX1ymlrLXO6fu5#19{7{e_URgn z$U!*>>ug5euySm_wFeu{Z9z&+Iy#N*D*QZqOsmC^m&ah^`R(}Z*RK#;n1G1vNLV`; zpy#w9c=yN8u>JggWOmNS$d@M~Bt?tvv+LlP7)aNdEy|J4&H2^#ut3!z3I>ufHy8)b z{Dj>Hmf^s@mAG+nzkq{s4;Sd^Sq%$SL#^gtA^bBeH_)@i1AB()wX}|&GfgP8TH03` zgqTPzvaL~2hd5$LZ7I&5T89H1CBFAZ+`V-YX~|J&)4U0qG-*cfBE#}#=sj*I?3M0t z(YnD^>jX#t=2*G@Gwj~I99w_=8mA6!z@wX|pz?R4?}8l^PX-&6({mWCWKZ=VC{!T= zunH+O0B!oKZ4V%z2w0^m1qC4;@2 zy%@ittV?^e>(x=fa${N~JoO$(DvyJU#twVW{34?9xBdDBc5M0vm(K1&VuBvt-i`=S z1j5V5TYzWDcI7E3S1Q5QHtJ9%)C#4DK-bWF=i%){>8*&1 zpgPE-4U9$&eEd8SqM`aFEKI<1xhe?q5LU48QD?EoI!EMl9v$skBRR>4#CR=gI%eVg z=}p+W@pIujzJK!%xO{Rinl+KZ-QPhB)Z1xH9|Y60>1EXkVD6t93g2iSxQ4XBReH8J zuKNgk*MEY28@|BhbGs0#qI>FTBfQE3{Jmf@Mj#*{2wF|JxQ7~TINfVK)tw6QO9G{q z@}~(#V6ZoQJnT`Dos70rCdUu_A|l>bEPVwxF73eK{Xb#)v^q3yPUY1?hGA2N!cF4= zLrx^rnL5aP8$+L^gMDC2%6lu}S$=BoI$YSh9%r|&!M#)a5v%fp10BnQocafN&^>h* zgCMg7mrAD-|7c)f&ahn6=T8Ppl?V9=E1vS=EI720p*SaA46u4&=l9q_Wq0TD7QD7_ zq=4o5wH2tDQ48OEofwxv{6ggkEayQ!8J4pRixAZ*;e#_p^rUfEp0HSo9F`C5=p1N9 zW*~Za8huwYVH}$)d~Vr_pxb+6AWQW@%d`NDTQC$l&lZ?nl8zU8SD~bTF=T;Fp)QU= zk68oJHrfrII(t;c2IKQF-4GKZLp!+)OTFxI(x}HodhTW!ys&w4A9M?Bfj(X`ylM%- zx7Aj3r0eWtE5nXaHJC|lh?=%CbPJZDpGt-g)8zO(${$-TvG}EZA*Rx|T^1-qW4$wm zESd>ANL{mdu~p57O2tbQO>G4FUJQvtan~rkR+xy7$}%yacN&TYTE+IP5&4K8Ux@VS zMW`BQL63BI{2CdCGu5RSHX*R3!WDLbS zL$lChOrjXLGj>KgG%uwiWUd7f<6@98G#cIdQ+W=ELH0-^s%w;3Vbx!vwfbOsZV*1Lj>7yhJ$iI8qC?kc^eK@fpJI}_z!Co33fBo<_K{16_2KGAj56RMn&3Bg61*35}$gTH?(b$ zwoBWj?JPcqZCH%-06Ia%zTIP3&x-9&`!tZWKDw_N=0T}Q8k{Eb%G=@xBqOoTD#Wmy zy~|lV&ynT{gXkTgdu^^u7gjACfgaO8`KfqWtRF;a(6_sIW@pHpW$5u@En4er5Sp(= z?vNrR_s@cv+OXy!xk#JTj@kuQSjLtJE035#nMfW{h)i0JqxUg;UMFNst3)NWv6FkJ zizxN{5v2l17roj?v<+n8ZBRL`6WWB?qGECvXsTln-qQkOzf{O{Em1YEr?3ktpH>5z zvMC0?I~uJ_jz}Gpi}I-GqWYCuWKFI@ z+IVVHPp%XZ(y0^5MLrnlTgH`%DMR3tiRDP2T7~2ZWiXE^LgLtBVLKwha|X>tb9=%$ zPYFeb7!kdmRGW{oNnIiHYlPB?UC=DbSwz)$pt38T*+qcttcg{m4&s+B9Ic&5<-`_u z=HUg1A6kI?*yIe`VJY?mq{2^BK~Qpsmnwt|6^rxg#gQZjZuTMkirq>v@LyVI~Ye~ zK|LfDcI7JMPU|QJWcMo6qKK}qZ0-}!aw;FTVM!WWiuiFQq+;P6&Y)WW@QH%@MO==q>LYUnwQrSwziUT`Ei2W9A}Okdf)2z@>njqk5- z!1p&dB9-nXN4dw0EkgR-&LSH9KjT@>%MByTrKod;<&tN)1ji*wp5+{6&VZaHMWD0& z3UA|Ra|wDkv{qsL6A=GbdJYu-D?JaE8=pX7;eS4Z-h-L{xQ73XXE{gd8>Y~+LE9xz zF2QmJ)6c@~|7lp>5R5+y!&(0oSl$qD|7Rr~^H*vJ#(Da`?O7f{Y4J3i-sdQ)&vIt> z5WhM;gi9Fl#w65EsQVAFoNZVn&vFTtpFdj<%7vbQ^8X1~&OYS~%X!KX<_tyuhUI_j zd6MD&pLlTY4F0%(27f+2g{#MR0rzi1favp=>Lai(?*XnI0InaWDXn7wO&t?lBk?|G zXx}r}fwNbEbC>JaiDPNM3q0j@wCz0Y!{GefEz+HOF>q%1dx^GRqW$Q>6(E~+`CR?< zVuLgo!1MV|QyM(w^PQu8PSHN6XnKaGXKBjk=VLjqJU#YAmnh9EBzpP8{->U#d5zM# z`Xp~BpXdzf@)L2s`Ftm7Up|JRv$!S_=bO)SlhPC(@24p(n(}!#qMHXa<$W%axJ)k7cX9UN4d50nU%!Z3XAa~1@jbYB>IjaUI)<%u z4V%uN#^EC;aOU7~oIP?J=Z_x2&0{BU=gb-0pnUB=xD5yQ?ZlbG$8i1BMc@%&4vR*l zN{^(dXe7o(Bh^Zc==eDJ1_lfJ6<3#FI64KRt)o9$JNu%QlaGidZ|3MFELfU5F)a5G zYV7QeMow;M4ZZtiGIlF_`(k(Qn57$;wnzfg0>K%tfnl&(Vn9Nj}ma@afj!O@jE zZBb^Jq7x7upC~-c8J2r{`NP%C3r=(%M>>y#i#r@#Jz?wW@f4U#u)L|G3mVxw2~aMx zbrJ)KHnOu5gKIXiYXV<|Gj<Htq0 zSA|z*_rlcSrIFL!A>YI?o>IYUsMA!OSD*52Oa~fC8BM zQ)8|#cNX%IJc=4sv_5J;J|bv2d`JOQ)R9n7<5WwXkSJ=<22mq8dMGtwyHP`*IuQxO z3I#aiK?XBs)F6SbhkcZlJyW2i^(NXLMGfD0Y8*!lEdDdN9wB~kllutkmEZ`qfaU>V!I0||&?guW5~+rFSRni&L*SyP zcO~2pp}8^8S0q867YV;C9YRZE@$QzdvH0Lm@JLlb7SalSIa<*v@}bU3Xs39Dbx(m? zu@0tzxscPcuBR1IwK*c<+|?QkW5*Okc1VV2d=Si?($OT;PWX?f4J?IqKncvfa^Y@O z3VRl|UU5j4!_gXoo>^rWZ4t*$f z=sBV@Zb%O0AwzUX?dcgzre~g`)xB~wA{w1LI1I(PLmb*OQAB?-G#63ieN%)uZ3g6e zdd|aprHUvj?m%h>WN)4F-X zvF7kEcyGlAsO(pXjmI|QyPc~Lk)MF$_s_#pkwJBu3D?&FN`kMG9m47P)TuSlK8Y$< zhwB6^=K(!A`j-`|Q3(%cO_&fq}WjSdo{y*Z;qq-=jVFg^4%+Nm)Zcy zW)oUBZHng2T0_>d6=XK8P&;`PY=Yh37Un5nxl2$htXR7U8#jI}K=k(Y-{QAh=MWa` z4R1FGVOzr1DsqJ{f|Wi9Q3Z;@78yi0gysIe0f;o3#6XdL-fmDSypWq6k7iWgo<6w+ zJ2!rVH7h>EuFcD^eajC5MmK9IgQJI|sFMeb8H&ty`2v>Qeli1&KCC63yzw_f3Bat6@C16~yjb!dq2<<_WG(9-+H zuv{A+gp@Rsuq8QnavSzio;Lir7)N*iiXWCP5?=2-I59`PcON|f%|e`DWAH>^5?!}N z4tGUs0n1OGScARWzQ)$IpW@c}oiJ&s*$>@<7Oge4z>Tg)t%sy?Yi@lVUTrZT%A4HY~=zO)GHe#6C2o{CWh?H_f35 zI*;oIMNTYy(hcxS3rA2|nE0;vXdQ9)!C`D&{|WYQ_zZ_OeT7H2Pr%u+iGbx=w$%yn z7K6p|GZzxfzY@?2P_EL32^bv^Lf@#+K!k(^AygX(`?gKcsXPzfF3qrf$=leyWeL{& z@HS2yT7~bIF2u|kL(qg_d9!+0?h)pNsDfB%vhA79*~3Ldw%QSNJK`2AfD>Q$9GPOK}`?t`WAJ}i=uZT zw1cQlsmrJb=CxFR)TW9$MS|rf`o{8iIC5|UKc_1iS-fE`G+|WNBFrkZq9oKCY1OH4&)1_#xC;zbNhljr4PBNB3UzDLQa#pb zv;{>;w%DGPfP;|+EQ(fOSg;*l%Z$cHB^Jyy`ryrECEiX6!}3m9m>)04i*&Dl?U|34 z&Hk90;*QbLZLla)fp6oKSff|tvqTg6b+e#yMn^P`^%4Kf95|~zy2Q1{u2?S|_p`wP zlO8WbhQnkrpwnw(;Fs!-vSMGnS)srWL$cAaDiT3d|E5grftDG16p!zP!m%|-9M933 zR%(mHqO^SkK8uaUkLl?c(LWCbWAjlszD&SD#dO+lb|Lb{ThKMn2R|hmu&E<$9~F;? z7gJ#!myEm-7Fb7FkTE$8sZ%UyU#h^?=xFSZFyJGqySooDBeyOI>67viKQj+ulagT= zV@ArPG~`Z5LB{Y{ScaQW*((BXmBr#`vjJ=9`P~_z!OHY6 zI~-qkO2EisB|7#sqqJ`lI#au+uALEe?Ufj7w#E7|4;-|FVOC}cMx}Y<6?H4DN>Siv zN@HZ68mR-~pc|BkvhLZ)>68k^z$B;!C7`&A8G|a#7+(;NT6zW;mPgkm{1YtaDN6$7 zEC$;QxOuw-(OFWI_+Le&OKI^o36isTxnWuoD39rv_)n66Ip@zZgw9Fgd1)O3be?B8 z&QM$o_DSt?!+OLcZ%PNqv@HZ2w~cf{>BtK7dZB;4 z{Yt-dSQ(g(DiD@P*|Td9OKtJQ(M70W+YEX~gS!}E8kLEdF?lfcPC@~DWsj*qWY$>~wI3Lkr;aHRKsbFug#h}=<4Oep=X^_wCGl}_V~eQW zU5tcrg|JR$kY0kMF@*w_^Sfc8JoA)6F}Gbfcp#42K1oB1&~8pIL{ghf7TOX$77m4D zW+39JeN;H3Ga~647>F0m?t*xZ#Glj-=21l=;Gpu={wR5|Ct`->iF|R|4CB+McM@a1 z$P6~n^-4jzd41^KXTh7EWo{2Sr1+!Dt93{oS&F=wT}6Nm*L%^U>!%!elQO1U{4&qN z(ctsDBYkdHBu=eF>a_OAnbk>@2}hQ*4NJki&WNRYKsC?;`%)#XuYL;4i>W_UKCj+} zh5y;Wu-r`NiRXxPDl-P%QgnFKgaVpUc|HN(e+A1ECen41q;1kNTfihz*+){jr_Jgp z^2)y$%BE*g-_t^E(*(S>;}gtT^9DBjc>q7%+m6x&y+qVG?_2P4FA+T-N6%J67~W94 z?q7**SQ>hKOZFwwG6QD`mh<|e_iIu7!2n^w!rQDbQ&~QN-hTzlpI!f~o(IMMO8*L$ zb5yuAz^4TN|1+>WitbfISk8I+|067K2)HG<{hyH(js92q{~DG{(dGI{blp^+&ev4kO>3jJheqaP83zoVk2Pc$S~La9RxVdH&oP0nB+S^aPeO)RtiR*^3t%K=0@4 z!Uc{P|7&r2moHxy)4yT)-}+aQJ-&AL30ysi54&~3n=pUyd_fMuq6vsnLf7M+v! zd()bYcj!1yXHIVYxq02&)=VtOs$YH~yM8*gFq86~iT6{|g=Q95F|~-#!)c|8>w6(L z2@^|`F}XNdtotCvig#13bUrI46g;C-nKs58Um@e<{y{(AX3bH(+)O#8i*ohs5_n3gBDy_=SRchY0V4e4@ff)C2)K0{=T0BO!NWUn_UK`pKYa#A z&R@jgGZ%6B+WDiEogc|ZsI|Q} zS~+^5wUZ}WIJ%>my|Vz-46K{Gx}uqj3mQ2)qOqGJ8o4@%c~(+XT@*cce%;}DgU04K_WPmmwneLdmm&Q>e-LUt|=;%C|oWk+dBHY{x%9MIa% zk@9JW7HwLiW$R`F(AYaRrB1dz_U~JUC5xxyl^1$o#)M+LHm4(AqK3^Y^g&s)urEG( zr4L@CM&3(Psxfn98Qz@T8;f2Yf-l}2iElodh#wZu6dvWL4}OcA7uVs;@#T1NZcmIG zRVpC)WNMI&picC(8C@}Z{ty&ZQU@k00-j+`aMrs)nWclOBnIwTTKH0DP17p_h5`9d z^spk5K2#j_%@N}a!K3O5sWF@b?Z6!9h803b4a-n!lq;y=r>x5oFfgn(T|~|@h_q0{ zHfl&7RMZHMrp7A|I>`IPP(z;;HYgKn>ZBQm7s5<=ji7Uc_N5NNjP8gXR*Hx|*+?Bl z4X6GE!iq%^7lBZNp6*Eu)W&dOd&AM=JY^Wp^9;~gY{$aO49a<#Bg-Wy{;VW`E`f3u zFS8X3-%qw;;lV!t-2k5rVYw7l{#USE0^|yH=u=7S8t%tx2+{uvmN(qSaJ-?UedM7b zPiR)R9FA&gCRw*u?E6BKMdAE#qdwpARr|a`Ta`apQIFnWSP5Xi)eH9!<6S6;FqHl z17fy}^gvUSn*il*S!y_Cs>HyYiNnhgP!TP>%6V{47DIUfvpM3s7e{_u5Z)(QbN~(9 zVeFNR%d$WS6>0Cg;T=fNv06!P{_h@|IS>QsjIFpGgeL!U&c{{xcKloZi34TfIy zKJYu$Cj&m6qJ*6S|4cigCJ|%apM;&)cHxb0-atlmI<}qJik%mC;=kShj6B zK3w(zD!P~A@RdV&<;%Cx)Xx@2@0>wJziO(>njx=SF@8F<4o)T?*hG87*v$%MHUA^R z0(BQN^xc!8?N|@X(>p|A?bc6m;P6k_wPQK1pWBb=qw3(?ss*$`a%fedBC?!eWvD(3 zT6$)5IxTczp(GV8heAuwNf@kd&c9(uJ4_H18*qX$-C-_CDvc;71A zyKxGs^gU@NYxD$`ljvQmn?3<;f?VLP^Mae!749K60+w&yyc9b(eUHs+zQ)zl`%#!- zfo-d1@b>hAkB=9E72XI@dO@M|hf)50!%69k%Z94TN5!6?P&){$4QZ6^M-t zMTg2v%GWwC(sp{jc)M5QMPdl4_K4>ZYI*ao)| zKa>A{{m0n0Z3&L-`w?qaek=y6%%*R9TiYh^3-A_jm#t02V4k7$4u@(4NM%T_p?8d< z@Oco;V7Wiknh>~p*g|KJBQhogKHe>H^U47M%Qvq45-0a=#82OTj;0)0&h|CUW#}=w z4o&1vXr!=*N2EXeqUhV_F2mAg3vu?$dhFV~7~9r;h6h*oBP~ILKraUb_>JmKSOi`QPANF9T%*tqF4to``| z?Afpa7mn=_<>ux`WoF+99mn>EA}3D3^1w_ZLNddluqY8^aL406PKwCtgBw1@;muzQ zfE?)W09UtGbY2fA7={M~3Ro_D%Gu{VgroDR&e2eQsQ&R+_#rUV2gl8ntE{mSOPJc_T7ErXH62Hia%b0*>^o zc?8OE~l7@XbRMExx4eY$^azY-{? z@(d25vXYB?%HHd8KM$lPnV?g70Jw_1+rP(={ZwWr*WvB=CZm;ib7b}@7Ln!bSuO_J z>z|5{US@>Vr3p~Z5>`-k8DbD&!_aIPhUJOK^4LMSh^G2OKRO%X6LJJBj~SPZunF1F zPRNCERG|O_>8}rfo`1b!4#JGuYP?vQg(|H-%6b=~b({}Id^`iedGuY#4@ceXzKF60 zz&U_@@y)2t^u%{jDxAzn!KaDgcs(To%S-d|Zek4H%BFUtS&jFK)36{d8go)jcqu&! zuO{j6enBi|W{2XHLOs6BrZ%HNgFP`R*j3#HdU;!vO{_uc;A;37d{G?Q7H?_V;+D=8 zQ2SsrJ%48=&qPE-1i~t_G48|RNK(qMA<7$jEm}EbMQbz`Cq&>!vl72(TyRO{jq64wel+@Hd0a5o zgg9ewq8h8p&FG(}gnFO}E(4;F(#e99@^~@sMrgMv6qFe;pdbq4a$+!mVR=_0qWZk`QQuz#92Jg;9LUZ49O)}&VW3sZxSN=B#J3-XG<1CUkkM-3(>^T2A>~Xf{L;2 z&_df1TkdS9XCW7+o{1uIJYjS`40PTwI;V#6l{2dvzEwI{M&`n~C;-a-vB-Uaz7>>q z934~1KH&YSO)`P4If{@nr5v*GR;YVzC>#uqP?v@yjlTJzHBm?ynkn*7{Yo#&p9MwJ zs^F07g`9CEkVUjY%J3X&hii~Ky%K3tDiA#~3*kf35J6=SJtPwulgd#rt0UrvWkc87 zOzn|$B#g{M5=Svp{$fTw(U`n?jm;OpIBrb7I3|8b24d;jVyOH$z35?C)Yi@xzo_GJ z68IkjC3CtWacDk0FUe?Y_CPXwx6}I}i?$QT9IxPmwCzKiea5tfv|p5 zCL`(Hno%VNtxTR=CZ-JK`4@QU)Q>TbEJ5W<{e=|@!)upxIa0XoXYoPB+}`3J{TzjE z7@Py^j7~_HT7~%W<>Hq!8RM%2NKcvE9wxf(2+DgDozFV8y{I=WBMXr=p`DnfQCaan z3F0RdiD>a$IybjHy^F$7I;#iTz0kMbhK2TLFwL+$VQk5Nh%AqpQ20Lr%Q^a;^P4e) z%5Qi+Qbv`aWL8&vaq<2*zaRiU*Y&aVtRziohnVqnu73l|rAYFI z(dIla_L*64TOvVn$)~&_G-p`O)6|!01T1GUBtruv~)05(t+h0rdY0EEn*a)DV_G4}dq6 zwBKJzN=w?8)BoQb;FHC^<+_Pf9uugZo8L#+O78me6h^%@1;b{H!p+}r3(s&>y;~4u81i|m@^dp8^SXvnzo;T@FG9Yp67Jj6&CH! z^OyDk7Y@{?af*&PPWv7u9Xdy8uy~%1Jx<4-=5uglHSNzjPvQY1*~9w`rN!cXPLg>4 zlbkm?p2eQ%EPBCkfu~Q_U!-}?_fgI-=_2Qmj^{K_bJ}}of6^7o=S3d8lGYueZO3>! z=@N;fzAw@G3w$lK@A=)7Cg}{#^FAjiJx==s=ZEshKJ1)#&M)Wb2<3yt`*7Y*kxo!P zxNMI-S1<&3vliK{bOQfIierw44jyo6f0IH9e(D|E4uFqmTz zlWK-*fS0hLa0~Q=y%%kFvqM`~TiDRl&fTeAE<7-#1MHn?-pLUTBzs3%ej;1jws3Z_ zhm%tqINCRXw?}i~?Yn3Dm)O7Sa~$9I1@2t@5j)ntjD@q>V=gst=TO6U4mAefnq7kn z)WE-bd<70~U4#{jr{Sa5h6t_rY8DP``xM9bFTvq`U*Uz>-G!aY3-fwn&fM-8HoO2+ zW^_kRX*629%HXYWgeFA=pBR7mCI!QjI-=}%EN>Sl{KHenbwosMu7KqXueJR$Xuc4J zfjQKH&l3^h5hIJB8k&P3YM^p-xt?J-HMTi&Hjx^7;kDElA5nd7ZTF+2f>T-o~(; zA^EegJdmvpA~f|;<#JyzFb|}1_6+tD5#{PgJ^VC52#wdn-xLC0Q!u=ZayaRI;Tjo$ z;EV`pi{s&)szG3G1WG4#$M)ZjqhL%YG2k3OTZWocgjU5NsN8^nauY(TV-VaS7JlvO z2fE{^Nv~o(+;XW*Dx%?LD1<}0LPV8kj_(A0uMC9sW?Ph8gm&l7ayG(xqzcb+_VU*DN}-NkDtItY zj^c_Mn2GRS$pV)1Pk{qV!jUno9G1R$@XghVJhMfMsWu(agQyeRCk1gsaz&IB+pa|P z�gFrOqvh0XchQaX^7uN)>|{u;w<ppW@T? zUtr;PZ=j7Vj;4ALc?cKK}6&)Xg4&|PF!FdrDQqOtb)Mz}^( z8JL3*(>E7tj##BU@l@L-5z6+_h#|MP}{Z&;`TT2%;i5o+idAnH|6Yvc&>cSE#MiLTXo=vZOJ{hJ2`Og_AK zC4D|N;K8kPNHIsFDW%`EX>)p4IkLPphRmFVmO;*N4flnM&J}Jd2P~&+-?Z@?tpE9Q z?D_S39N4l7V~6w?(bWv+gV?KFM3(!B$a03|N_uuBV6F^NP(D=%^7Do=*dHd!Yq~WC z4t9-k^vEXsvgS){So1l)Tl^X}uUmqhn^y|x+oUPOat9Gv9-o;c2Kcm-yTFhU1y#Hf zq2^%9pB*(nHetht#rT!-xo*v8*uQTL#*FPRU^bVBo45PZ=yHxK52f#!MxzmtWu^1S&KC-+qdQqFJ zjlu(s{B7Z8@PQA#6a3tK_5G{3a(N4VL%zn*-OF(O^j36hpAFj-N$v~XzK92u!G0@Po>auECWti+z(-(%(Scd%>yGF&*k zOWaQvFZzbs)Z4HqvtmS4xvy1^AgdNZ34!p}yWrmAquBJz$Jn{<1ML3gQ{1F>lV0b8 zfIw&X`@2$^1PSXGUvD3Th3Q3fxqkrFom77+wJNCC21@Az-w+R~AAO*ddmu6_NO+d> z^R<4}A{^Yk9P8J7jJvlFVbYXZG;PJd+LB=my(=C%PhrEN&D5i*e+wuqA!zI046gny zahckhyElA?L%%M=DS8%g;RwQg91&pO9C~`rjNz0oe=p&W&;K~`qCEKp2T>U+5kk)y zN9Ftb`y()b%96HesQipnkE-RK=vH{M-ItC^spQ;n6PPhuCQ-n-}3mu`NESod`u4X6Ef-h znGVAUE41UOE}Bw^=y9b;oLY@Q`VMROmoABN3@A^*#I!gJv>1@xE)m9>Bvei9i2-kn zfp@wJrVeqa99ax+QyaL4$}qel0?Xo!_?E6|m`h9SnNWv1YTI;g(;Sl{La=f`XLJv6 zM7IEEeATBK1C*ZV?`My`0c~;Q-H8|+?uxY0ccNo3fAVCsp!@8T=8gAebij7G6HcoAvAACmG$vOR z5AF!3Bn_%(4-mE(u~Tx8KO+Zy2AMG--UkPCIvhz$#)QG?NS|zhWs(&M6Vi}0E(;w; zO&4UX_LU?NTwd!i>??@fb<>uS2&8l-HWjuS*18j*-)` zCVbH?9ph_E=+IS<4#_TJkkNgH5PXvmgpbRkF|9NnlgpDaD>DwS(>L~qI1P5`0&$b- z+>1&DzS9KaC#wlR=)Cb$QYhXnibF|O2)ugg(YT{h3_PjLqHk}}7_jXMzxK7hro(2C^qsLRDpgXIdb>J-Pz9g9^|_Z;N*}eT2^Q z`yheZpqg&+!t7!@c0JxV;pd_xUgOsUyLM<6rWfk zriqhE#4j)yrYF<&q>L;Ou%72F)Gp^KN7JW|FBd-TJUC`1wcpv_-NEVy>xg1#YvRx} z+L7{}h3qNqMN~W6!*KLA+nw+_zGjYcFMF{UovTDdt8*QeHKSV0C-8ZxjnCGMxl=m9 z%AV~ryF*X!qy)>`BzhrjbOoiyHjU+o8(o6D1-+oBK13{?lRelYsc*o+2EvMk*0YTa zgKi651LrH7ZE41oBEBvgiPXnP99Bg;+n+_anDi=K@N#L%6DQMl&I=D3I+@Cm z#Dj(kcuw;S#uKT}$iSS}v0aN~*}|~gJhSQvFz10Wt6-j8NuvE3ppzIp^OV<11A$5~ zU5Y$Um{*PXxgCTg04^;z-1b*`9u)s8Jr9;Q^epEAJ~>~Uzqq*^wO)ycS@p0y;u%=J z_TfRid+0yHat8f8m4NlLaQlB6mP^+mL2+@;X{CsmS|arCVEMBUTLRe<;O2i4{44Rk z|4I$h;i&}WC5ZmN0n1HuIv|YREyMUS6u!_GadicvFUgVR49jmkzAYll*@lHdIeV5f zD1SDxT!Q82pMdheVfo+s-;@j&uHeHiHQ4#Wc;MD~;KWVfGFzA5fdJBM`*GzCe!F`W zzu#p`k*lb;O(C&8$+ZXdy2Rezw0!F(9^JWzKWHr%_d4_ZvxN{DFuow7EO6w|J zINQNoB(XR6RTA5?T&L*`(oH^&!~Dsiz0-L3fcB&75gzSlsSM83^akgF*0Tl6 zWfJ?bvo(%nkHcb5c9yV);cKC77cbJjG=GcAg|6knnX|aRXBXZm&82kD(zZv`IR#E1 zJ&rRc58%kDJvesuC{CX`Psxl0#u ziYlLbj~?UZ-8=B~^b}sM#;`D0;$x7RYC&9Vr1-fw!)F^$C%90jw7I<_TG+b?Al}N+ z11%lB(89r!*4K*%`D||QA;jz3ID3(3o{nj3jO{jM5~l=3-E`7rw5#Uyy4{S zB?kKBX!6$f_Ch>w@9csWty-e3Z5z0_JHXMo6)s#lLfVVNhgaj`g-vwJHsQ#=B{;fw zF^=y180QZyrsrl0?wtPt_phy`M{gA_onDUj-x!ED7WBcV?~cH?pHIe`H7H}LahkwUZi6zZQ;;DdJG6td5XzBo)Bum94h92rZWyZh=dfdn zsBuUg|Iz$2^7_ty)bIiU(W6Gv{?wRdXl@*yFQVr(1JbE;TR{!|_Am^|7l7U}fg6^2 z@G3D-XDl10j@j@^(ow$E&|Blt(ycx!)XmEqZQ9zRS*zA)+PbBPCU5501~R*5q^6MB zH%C*udYJyNBmr|t49yvsGc0$f`^rFEiYVu3au2%S5-8`$@`irp5-=Bo5voH40OE+r z5HflG6czc5%Z1mnFPk5Q>S~3k{P)}V^EZoh( zC?DGeM{x;tZ;yw}M}~j`Jv1E>pzCZwa8(R-cCz4CY7$V~x5Ow0_~hr!DNP}Ox3)S7 zfyE}MD&rw9je>1r079!0kUpdWX#>k(>6H&2NKjD}g_!P{aI(n7K8b^h;gqR>e}zdz zjvH#T5!SbUkW2Q(XZxR!u89ckX`%I2X#1ohsB1j@Iz>a-%OW~nChDm0uOfu!COvyL zDSqIe3CH)zgjYV5VV5}Sz!o5~e>zN*MifmMtaFEly~){9K}Vfs77sY3?wbltuOt!W z&9L0W16omMP2W8Y8KWvO`28tJt}Q}qlLrchcR2omhdN*MCe^{C4c#vI58VZbU+)1`f6@5EUN@uMmH@g#;kjr~?nC ztJZ1|rle;kAOK-H6$0d5P^f&N(FDS3i9|_WGL*iKICpd#E*#&6LpxXD+Sz?Lwr?YD z(KpAEV62C}jbv!tvMHL-J2_;|cr*=iLTjxXoJ`&VnE$Y8Db}q15N0};S}HuPk(O#D)~L(=-vRf454ROOV6)7*axAZ{*cSv;p5|gjLbNcS7f22 z)QWTG_v7c4i?MMnN3O5H+8-8U*OpaJAifM9elEhgBc85Bm86HA!cCNGe104hkpXD! zB*QP8zQN{=-{6;3pW>$tIYd)f&A?HAw+CFM`82^0SS=D{k%^^wqO zBH-^AETX5qyu1*qQNY#P9cm;G@*Q zPpgL?N5Avns0uj(0(}JNWk?>b3PA+_Hv4d>gBM+hKfen>J=YjJ6-$Q9~NQr z%CB(m!cjD*w4L2sp{ZjdR1fP6O->ZF19<9mxJ{N~OwjG4!<+#ON*QP8AmVW+Z% zU!(`THFod_Y=Ij$_F?Oq&v9fEmEEeZMH{JKQ945GS|G^ThTaLih#F^)at9wDDnBiK z^Zg(X(;*~`J=Li$SJ1Nt(#^HOa3`F&hG_7fI= zF$d1_*2wQuf|@CP5L6H@tf<&(Mbj@CK|P{H^eD@~mMm-=G0+O#V5(1s(|3=)wOlu` z?UQy?CNyKL^!-eu?`XQPVbPDx6OouvBZ^^|+)h}Zsm=Zv**y=l%F@u$7=Vf{DG1IE zL63R;P&TCtqKB747U?Lwid*Q~qEnAF6b9PjyO=m^wWMLVmlJYY%dlbY81xJCL9JUW zyq2iNTkTR&Oznu}bzM;7-U8JwjZx_?Ll2W9ejd{iA4jV(k)DygG3od+HU)#qvM_LD zN66`Wu&^czKkBvE9U6coA@uwzWY`wtg+O(;&OR5(K4 zZXWFPT!a?eLwv9`R*hBqKu>!s?E=$J3qzJrMkb}{M8Hg{BM0`~Qx~2zX zy22HEg2QmyoQcWwZ7!#Ja%h|f2F1IhYrYZYLIZr-hr_dr3BH9&$cwb_s)&TXODfFS zI+RlTZc2s${mgP$^R-YFYM`w$LRq1QqMV++$_QxMM?zg?5X-@(R9Dr+36QSs5GA%N zD_HucQ%$7-`f7TgXc}0c5>mH|fUZNNSjY3Ka@xO4htP^}u|A?xj1Yr&V-GXJyT*yq zqrq1I0RQw!L_t&t?vQr$evx>d*BQDeP~Kyq=}2jjbe-uKT4wQaF@00SAfd{NFah!z zzVnn}KErrz2ZI3qysYbJ68{w7d4~4F4rXA6@FNeTJesIIkVM~g89lT1(XQw*yAPTu zTfjRt5XGY_kT4jyw5rMIf>d3<{^3Fn2KrLU>oO&(g~g5Y6(JI z&vc{@EfMK3H07}i*n)-sfyVynY=aU%nA+h(bE%DzFWTd5hhk>Cl0jKw%J7%Lani^l z0jYU8V`4j`j4l@cWJ;m+DZ>hoNbMaUtmgfDs8*m9(@k2sy1^TFp%pljhk13tfiyu)bQ&^+N^&VW35bO{pad_|LM z>OILvlnXd+9b6=SX{fBEwp^bKxaTNgqOxSG6^=elGa0JatA6lII>%En@T>qwVoTBF5(F1f z*MB&Z&TDZUrJ{m%%WnTtuM9&uUNo&Qf6qx&x>2@|I7Z zdX_gF;FG5kw0;(D|5stTaTZ&_)XzuEC=&{23ow#?8r_#C5#)a*38YK#p2hRLj<-pG z{I4WgraT)VEol;(a7Zko;eX!MOy{Bd62(NdkyZt-n5T zJ^aguC%~N78|e9D`xTamE}usCcxrnjjjuxbxc1nKvl#yRL=2id9M>P+!TGDqkIvxC zxzmCvF(BvY@~5zzB|-3u=WzB?y&8h?{}Zvbi!{I|+pzpSz~|rkE6H%;9Nx~)#-krU zq<++KJi7WP9^I!t6%Rgn{XFS09^PiYeGeD@xQW{jZsOtHTX=Zq0q);@gnM^s`<=(M z-|xVUN4R_c4sJZC2d@urQaU&92!PIM+`k3)N9S zxbWK}Tzvc(x9|OqN3<`li~b#cqqOec{T(+RKA_!i;o5Ik>2x=7AQs6k1kLe*Xf#W;kVm&C|`GIdXMt* z0C(@zU*8`$8EDr}AJH}QdM>y>Zr#Igcdz5xAE$Bo&vUf?5nbb-R5thUI}d_-lY#YB z{C@Ly+~Xpk^WLBfy8Y-9?moDVhjeZCm|H)1O!>Jdbo&AAc#|&l)^+hugX^^a^@oqB zEFM!jk11~taEl7{)}zaGe@M43R0Yd7h>xaq{#D zoIZIDCr>aeKT0}6>yF{XiDRPTIdkR|RWSGHKHY||uQyC417c&NVX-74CB=fsNF)6H zePM5J3p+a-IJr2(jw8TbUD4dZ3C-*sh22UMdsj5EaYdsxE@*1&PV;VP+SU!t?cCAQ z&JC?-dkb4<5pCYW$xnEdH*xS5V$XAqR&VLT@`8=KCmPw<2=Lw3)kOfsNK1n7a`sgP zBT%D;yIc+r>d<>B6mSm=f>&?|d=yH!`Uk)(C>S0AL2&Z&L0e~6Av-q@*t@u+t%Eb% zef-hV)>c@0u%$~xOayiw+=d(X&*R}Am+(6-;nD9W=snqo%NKqTmMX{he}%)_KgQu* zALG#OPq1hEhxq2p$(T+Jt<}rsWAmEVvFyuf*uC*XpBlGW9;w}jHE{J^r@XN zdvjo)-)E zXca<}P0+*{gQDd}h*&3}{w?!+PdfOG5O>@ZFG=j{rIhuRg{g+_5v@F@N*ts~t z&C653aS4*UdU^;kESKOp19Qo z4!a0n1Q*7_HrgK!F#*sN#X+4H4MkQ2{8Q8@9nq1RrPtAURzJx68^bjv5J9C8i0qvP z#|$~*1{T68i_YIZ9swmLgmy3^wofkDb3CZf2xDg}T19z6-QFw)mTjBp4@0j^0f0Gb zJfb=UUTJD*%Hv_^n2HuAcX;K5A-S#;EzQ1=S4ImT;0Wq?aTK?vcM23elMvD?Nj#gz zLD{sPI)Dt$dnCf2I^urRDd%nc95O%`19A4TQb#NwwyFMzAH<&d1@JG6fTp_{iPWLt zPHZIY7u!Drh8`9e`&yxSNfuyUt& zP8k{uZ5TbDLGJJia7L)w2ksuN;Of>4dHIRxU)vELo~?29#&N7!`z?O>aWS@U{DJDz zO*pXQ7i`<`BbrlwoSa(0h9qk#L+#`th%QKi%to-{a(-+vaV>ME(QSkDz6CT$L?m2RttxZBhsjL(l1o+ea3sfUK%!EMyV8l>4 zaygW?%Z8n^3@^Pt9@nnz!oFSKV&j^R@XLx1uy)x;*t>PrQ&{fg>xq7&hlz4%LD$&U zr?r6PoafbBKF9sXhp>6WC)m1n5pJE{h7-HjBFMuIst~q|l0#*Tga>`2e4oH_u4gn_ z64g7Q!St^CdLY=-8D6%{5Kr%UYnhB1U)RJytLs+MecAXOw*C4o4s2S98)xp#K8^SiKY`N#D(E-o#p zTs#n}@JF~dR9NSPY3cjw<{}1Y&Qp0G`uQ7pHI*SQGzji?t;H`boITy)9~K51s_%mh2Dk*&f9Hb~p<>W)xnB^B zYI;woo==T5h_d6ce2(q>2?w`QnQi@=+DR+%#pknON8jG!zGdh(tuK_NM)9i;hGFbg z9yW;TpkX|YMAxkMo1A z>aOmtuCA%B+I#h`wV@nNbLXHO!F3xmDg)9nsn8Bj6B0K%6LF(*p&gnJ9aE-}p~>S; z6pf#QJ7r-?aT2QI{Lqocve2SP)XeOLtnux|sx3RU3-aFXgJybH44%{h!*Ua_(rUt1 zoeuL%N_>)|#;a*Ed|qzCD>T-;Z;|2U93{pjN8yXoWW19ck9SiQcq3DR@mUdgHCKj3 z*?O$fX|O_>h%fbKq)B}-X+~ejV_IPV$3Qs0a=95xQ&MoVM?Hqq?=+q1RxCl7?B5J( zi4)R#7b9_C5#sa#_)HUqO{yULY6-+>tt$o%szgMd3Ki2jA!TA7G%sgB-#Z4wlY_Cy znt6cB0k89!V+qSGa>%CLgUgBlRxIy$}qXu z3m@e9VZSa6r-Hn3Iy?}kXg=I*kz-A=0^5?**kV>-b!rqg8iR2(%m?QJ18|Dw+rHq{rgJ{%IK8UWPI4<#@MDfgfZ2uqHkPi;I)Zo1i>2!@3RLNn8r@p4(I3cwfNUJp>jU}Cm zf$_-lcmbIEWz%?C5RLE>1){4|kkx3#c`;QCo-@#{L~MKZ9ydbO*(B1qP6km%c&S`~ z?R-98%fethOJqd@ARk;TLqJgsWOX{kFo<5ybSx=|sE9{U3B5xd4T!3x`cx%AQmuld zQiafR1;WeY5JlyvY0ho{$h86pkE~D#0G;)BEC`6bv)z94P||1c1xBOJoPV_<+uOL0oUrV@V&@^vi;} zFX;ij(i>uuP?@^knaCJcisb(JXsvcf!RTrcL^p-@E&Ut7?C{Qs0(6h-N$+ouOc4{s zF0w7ECilRLu`bYbN<+$^Vps+j3*K;E$;RLo3V9EUIL?4F=dtiM z=P{7Y!hkggE>9%=#W)}vYHEwP&SseVW+8WU1x$T15tJVTU(ypYXdLm$i-cW#TUbXF z380*xm-QkR?Z6zm2LttmRF5JN%rj#`jcB7l?kgSjbnk|s!+hK{xInalrEe}$2Nxl4 zOf_1n-RQTc-=}kuSaB$!{>ZCm_!=$U!$8*=N0lIPSOJYy%-NnHKyn7P`Pq2CF*wh8 zeG?VDZ-w>7Q3X^6I}YWDvRQ2Ve2jr{zOOCM2CQ>Fd#($x zoJ2F49h3e`MEyqRBXL5h0M8jH*9giM<|}7fmU3t(l?mY7G^0j{pk@*K)kvCNE%q%l z89Z+g_AWQQTmj=NHu*0w+Xj@|z--R9f$0DLk_IpHDgl@`2Fo>ng5~kAQ2JV>5H;1y z_;M`_V=JKPpNoB@hrF|Oo}jX643^u3L1_ldZNT<3fcrUV42=JkFj#JrzdZgY0RDHv zb@;1%mWE?o#@~w#+-3lr!Ec+`z;Qn3c>vu8mb2JEaa+DkY{&n~TfDI}2Fh)DjREt2 z1(w?ae8x?t-?kB0ZsRQPJ8lRr-@Ad+7ti9vxl_-;^8W^uHv-Ggo3#r|G3zZ zMS|B%I^g0S;LKk9!65fT;P$l(!2K(Dcsy!KG55h zesT{daUWM7(gR&-kel=ZoOyZ^CvXYpa1rfb-{EQ4x<646- zK+ey_U&8pjs|>n7pzH2F1XUkY1g=vxZr!E&ay_Z-_@lw~JHVv}j7L8bK>yAA)HZZ3 zjS=Dlz+HNN_Lj#@{y;(Zx&9P)Zu907I{yYPKe>cUPp(nh-^95m55)(C%a5;7{uP{~ zXF2yrLtPm3=V#!Q_qmQNS7`s{&6{+;TjF`1-lcY=vT@@oKFy@x{^&0H{TY-8E*w9D zOQ#Rx@VUMJ7Ff>9W*96#bLJFIo}^wv&%zQM94LTtxm+evi^UARo|MYyNO*d>qb-A$ zZCaz1vlCu)Xp1KHZ7Fr6eGjzt^oOGtDZF06XyNFEmQLPi?c{@2j-F`a=uYB_w$AQo z=jttvwRH3m=QW6jkd{vFXyxJtCof;LXy-(E?O@lcC1mP&ShF(_qmskPgA_Zd6hYyU z2#b;;A|@6Ap%Fp?!z6+eHkb@(-=I)9xqH!lT?9bRK)D0+r?+uH8&?Xp$7|EO;hi`8;nR;s;MJMkF>X?444T{v zt}-`BERg~%FCSEeFIIeo@t;h>54#p&{Fl=Zo~MAMOpT;LMIunAl8l1H5haM}ogx5o zUK+|^c`O;@Okcsm)D!IeZ5%}tA}R2?QH78XB!hn#8TS2?kuZ`J^HHRH4reKN=2^~S z^DJjc98-d*J}Hn=ne440B_qI%j4OXKoU9|uVd+3B%#mt8w2J7=>Bv6uK@DK(ij~7D`6Uj@Ytwl z6fFJ`!6FTn(fy?ioChEERX18L2!42;3DQ= zpd2t%-7`(l&}0s)f=@;a0&?WSTVB^a8%-6if_I$*bY=}9<+Ro+C}%u$L68=x5s@K> zhc*c2x-2-!eBmbbL$pOHXjpudfe1E4K~ZRcU%C{ku9=AJn1q;asR-+6782f`>PEkX zp-PQCr&nX$=I?Ri+I|s8^Ys4BIDK$CmMolyHuf)y0FXXmbPr!wNTNfbAN%di#E;w7jSszI(+=rRDAK#>o|R!bOhW(V4$aw=3r2$kEL>x^s;H$`^d{CU&m-mCCq@!kTO` zHu?m5BP={fP>8T6c~FoC%^mItkMKfNqz8PwTf%6F#Otq(K|2RK{6TZ!lRqwF@h@Lv z>g1s)F0f$6q@mciV=Yb}ZJ-lr+qNlyedXLP2p79z8veeS3bxi9@S#YX2HsJ+%WDk8a26CEp9LdIr{8 zxjA9v%!zoxr5U13G4P7*wM4p5-|3`!9HW`4~1VSshG5uv+rdxahR38g zE%@m@d_V6s9N4u4%a(pkI>!Zgc(j3!j}y&tas&nXAUrGtvKT4cTwIZxog+BZ`9ry1 zfG?a~+d-qFF~Y5_-~)GS*A$QMUc`x`+puc+_c(cc2R3h6hU2HUWAwxUVoq)C^&-Z< zH3q)%{?HWY5S1DWdr3RQq)1>N)I}<_xS{FKz;gAF48#wi`Ey7n zltVLxXStlYc?ai;kJEn#mNTfNr#V_{|(D0O5CX;xVhjfXS&+ zEGS9G7aAF6C&u6dQxsm#io{rh4`$P`Ihq)Jr-{eM8KftKwL!mW-RWLVs2@^|j;T6~ z%QWJ`*E8^LQV3RMXmIM436L7(Xq}me(peMXuL{8%<(c?2J_4%^@%YlJ!AoQNAh=j7 zbc2LRxsbk+ft=w+ysDL8jaG}b1-W>oIt5vi^P!trfSQ3h7?E$rd{YWmD|J|xAj3vk zC{8J~IFz1+*NT!bU_dr<`|HqgpaHMfsqvoP2lEXYxjt}$Y_$(s?3p2c^uB~x7stry_9q>g$ z8+@1(j4x6n@VYe?{qoE(WT@bk9SxWA7&sQtJY7M3JWr13nq-*rR47Q2U|gXFb!iev z%M`FLiiBSYy>CS_K`+MM!wgh1AkCh=3`p|_RYfNw;z;jf5LLl6UhNab@vt(b0JCFi zwR8`Skf`d0>-ZQ0-h7Pn80_Yh&#|2!S)&#omZLlB1OOe=NskDckHSc|3u17d@?$%h z5LriM)ROK``!doQqB>}GBG)sm8nw#yyTMBxjtPz#MVMO}p z>MZTx0zu^_sW%H@-I&Yb6_`@mj-h!ry4HY%u4$x`oQX%J6sq#sr+YzZ6nBikOl zx>Y$aORU1-Rjo{6B7z??4GnE`&~+AGb@O+kCSj_RfFdb8vciNndB*rk*u~omkethT z79)a$$6Lj)Z1JH|Hljh4WWU&isj=ikbA-gwn9RbfYyX)r$jx+=%v&BuWwY=$=kYNc zAkO~v(y=aj_;+{cZ`Z4k1n7${ebp<^uLi-Z?BOTwR`W||fT&Zjm|udr}%Ox?7K z2HKSwm13XM26~qNE`pBbm4BpFv4Q0_5AEjx?*FOS%Cv#+EWFKmx>suii2KjLa`o$U z{Iv#da|3(Kzf=vwkRlu;J>=~z-w2QV_{r2JQ_DnsZDRA}{=W&9+e9_9;+Z@TfIlya zNksw_=la+vOL$uV`E<+%TK}Ci2Dcd$w}Im}c^)ipERD;tUH|;GHsJg3q%m;*SMsmG zayga3@;q3+kL=1(A5TWF(F1Ye_Eq6ke*El7oH=(|;7tFGvz+AYpMW`o<)<$+0OpN> z@BfYb2Q2@O{JUa@!^iQu#Q?#PeR?+@-69+L5pes)WjwuqRRF#>?>-fv^9eF?uRd<@ zdS=j=!RosY&g0(wi^8K?fZh*IlbpcgJD2eA?iDKQJg(v*PT@Ar;s)+LI!<|qarx;b zoWXURe|k-n$)NQg?9DEyPI&u<0I(Y>dLIvNH+XhGx!K^=&EPzPvJ4!v_cgBE1}B>}oKO$*#JqXsBGk-jM z_Oam}o%@8Y!wtIN<~2ca!xS^P`jqNPHXd!#;|b6At5442@*n4M;g4$qEI;@7iMaQr z$2Ubixjqb%H+*EcO~1u$Tz}Azf9a3=bUnTF_wV8U?K^mQ<1QZEyhpzkRp`c5e4MUr z0Lw2uqTiL8@C4oK%n{*Pe(2nRe+iZ!KY0YljvWzRB3z;lN1a)(FcO}ExO9a$n58^gVZ{p%CKeAhg9q##z2M;F4f}TP zXk+h0;s}R!E^v17fU}z~oZQI(r4cyStQn9=~I);oAlHiaC1O+n%KqUMFLWFqv1;WLH%BJ!hT|MCH=_B?z*k?O0 zPqcQYy1P()+qFbXH+x~+b3nN!?a0V?w?kkQ-B<34ujjvlKb{`L-n|R4Yx{TDy?s88 z9ry{mHhqN$*EZww$>mtL_-*_=XEOF|_!>Lc&c>4YuVT}R&+y6HL-E@59+)()BVL}~ z6K}rOA0K`;0ml3U;aSd}cC!||i=6KH_+r)9=>Nu0%v$szMt?R*1pbOBO@L`Y0c2gQ zLIGxlmA!E}=okkP;y^$QoU^w{G8yOQA*A#VCxxtkuHc^Lpp9{ZNckjXkOP--a2)m6 z1`i2dlE~cUEF9#MBi*YDy;_IzCLK%&H+uEy(s8z+B!L+Ewy#?cCFE*O>+T!|1)U} zn)5!>xd=)Z+GYTq0eA+;8JK6Wf#vLF&H%X$EN={yvv>L5f#nR0v)DY#8-wM41$O@x zK;Bqvp!(klm(6r6;gkl11tBmzSODh?mivbLBUl=SpqS7GZ*o~E{GtNkDe;4M6mukp z!Xq&p&e~AHO&*#V2WfsH0xU7e=~qq)DJe8xOvMY44rr_KMr^f#jASx;+w0(w6N&g9 z>4>T`L)O6}ysMK26vI0`8qVerB=sqPZ$=ChwMlfH37#nu;c2bwl?zSJY$OdTfkRR- zd@`i4_AQ3JhU%0aBY<@$3)Lr24#Pm|JA4qpb)C0$Gc zERXF+#u$I78Ja7Aat70t{W8d~A|s_AFL};In- z=adXiHezM{=^g{qAn9vGNDngfds~D-%idfnGOSHKvSH{MQZ5lGvJaK0C{mDf|H}sT;d3Qbs9p1rYb#IG>b3euU z)xRP-I!FMt(b8ZDEO! zdSWZ4jq8tCKPR-avx7$)I~3%a#0smauZhQ@DOLXINBj6 zD*@G&DM+?R@#Nt-nkoXjMi{-*F)|KL=?#Bh zM?{2phz}n<>PyAPguB;{Vb_*rIJAE)jvf7-43Qn!^7}8?y8ag&+`R_PTTq*MwGVO9^GE9)=1t+5|MmJzT)b)$_4?+hQzU@G;h|UWg69FT+p2%o85- z-d?Vd(YVB%=|KU3kj2Ep)7=YUA)$zmkB3^V5_5lBhgL{WH^bMh4W_>|6nCzi#L@km zasA>^?A*2jM-FYp?R#f2dg35aCwrfknDF*X@J|RtLZJ?lR2f=J91x)ON1&SK=AdS{ z@yBWWyyOdLzwWSg{iFZdSzfGz+eB_AFNnOcBB~EbLh>K=ff*0xXve&JbWZug;Q=&V+1i15lng zBK;Xy&d0UGX-*|WQ`R>HQcDPi)MsOQSu*Mj5y1kOZ;FnAb{LT0ib0{R(1Y}urIiI3Z=mOtIHBv*?r5U+LeEbpBFGqph(HIt zTw%p5O*np0%kg7nDaxokJF^_6Z%u(uVl-YI-5JAUys`9}s4Yl>Z&4g_KkNm~ z8zqRHo{XYiDtxF6!xGZfmi4d2fNm+snOp$VOW7!;ak+PT0)DY%VXNAL4T*9=qjFen z#E!CB4C+)M=opk^vyeVM69YRYU`lErzRr|jUNcF`k**EK=%PfV$I&>J9|gxM zr8t)Z%Q9a+r(vY$Nh-96tV|SfLO3s|P$`7BLrYZRxS&y^xjT;Ll?Zyipkg{!mVl5_ z6#|Qt2rE|$@HxCf^GtXZRb;geQ8jvzvhaDHxuiQ(Y7p7pASl=vxMq4bTN+%RAS9gT zD-Kl65>;oUb2$iTx(GU{>P~toNlaa$5C(f0jOSwv$SXRVL>?dG{D>+Q-7^7!6$t|P z4z5%SAY9%d37XESC?4AZu7&`3n1j*#-4Sp!_@h~ZJFG)WXl~DjWhBkXbbkhg835*# z0b_N)9HH-W5IVy^l74wYZx&#%q$Mh+bw{&!SD1R`AbD^JLfUJ^`>P*T2zmEZSca7% zZA6s_PM$rY22JSQN*h**j1kpP^~`{AXfYCp(9D|vP$p-Fbi+!=8gmf99 zyO4gO8ImWwqxGbpGp&bic%j%gk17@5dGeTYWKOIWV0`Z6_9&Rr3BJ@v94!8V9>zX7 z0CsV0pzfaq%h*z(&ud5@;voMb(Es3kx;N7?<_L-FpA7|j*)yn3W%4mS*$gb4$6^>> zg8a$#h#_6XPTmfwqbi~6pNE!aKSb0Sgq^{(k9-ZUW{vKd+CarfZKW8P(-5$j^fW

    !Dh82mHKZZ71FwE%pqtb9q1htemNJ;0Hogi0W%Rz}M=N3F z_Tv>h9DH3dBvSz2vZ0xXp=)D?XF)n5S4iBLA}Gm*QI5=qY%QO~~*iyxaJj9ax zRmvi~)2SRA7;Y0mu|>yhU^(xz@OERM{FxUyohtxy4n*4sERP+T1LYXn9$zFxNj4XY ziapJl-+Wqy;P)0B-_vQIgh6l?-fjTU|6YtQ|07Ut1It+$ylxD9|8InO&uw724al~E z<@(oZ|0P(?!c;8s$t41aHPP>F8df5}^4HeShK>VA{tZ|z0Q2X7?zrdWPf+~t#74bh z+y9?}&i^5iDY|M3Xd9^V4)9;XwJ z;^DpPRP;TZ#xqhgSrU&fqeG!3+Yk$2oJN-@12SfZ%ti zUXSkFYw#++d<}PRpU3UH7yhIvxelgQ5r8y<<=2=d=B{{-2X`5eC%MV|=(hz}&R*^8 z;od-H(s0k4_Zxs`A#|Nh*mIkY3y}WuLjiuX_xKrl&eOP!3x8Y@-rwAAmmfY9-t4F8 zInUq}E|XEm9|r^v`o#ur@ym~I;KF07BlEnUBcW!%HKui;`rM;uq32>i{o11&qRfXk zpNivD84_xI{ymsCp5+RI_Om_1pAgUAusfvvk0* z-E_?p@w;C-Nx#PF!#Hqy7xtgt`!B)rqsI^7$dN<;0G8jRc4vcFsg#Q)>SnW1c$PB_ z3wxY9bC5*`dpJ6`6G7NGaARv1M*%*!Z0m?-tsT(H-U)3TJeC`4r0Gqvleu`tuW-9wRjPs;UP#) zwIWfkg}=YQ@Dhv&4u>Q>5|I&62xM>aKn5KoRM${=czD6v$4~HQyLfoQ+1*2c?`}Rm zaP;zoUCZWZ>P+P`K+ay|%%|=AA{+u8;UDWqMvfFJYYgHHq3F`L7~d~^7r(9i0!x>E zg3X)eW5ep%*t`9EY*{lK-_D+dpTC)jFG#tc|Jfug{`PfjS@k8huKo(MX7t1K30?8> z)Sh_vt)X~jdS6VO-UpiOI4E;fB8cEO>%YZYKfEI-Sl<2hW6b>FE#wcaL_}dcq}6&P zbWew}2N~l7N%f+j}F8^Cg}5FdDl`@$pCTX>WE#sncqL3K}%AWAQTEHwe1TH4Qy zLqtvj6vak(BnG43nkzq)`9UH&wA+G9{L55=) z{IX>5C1XFX&WeCcnV=tuZ*LWVaeN2*t-EK#*eegILo3K2kB56k6cp_(B3P(?FW=4H>WOoy4A742%o!@%~Kf!=B@*$bY3POruK$fX;w9)2|2+os2LA z8JWyyF1*WorwK!m!Ez%Ra27I#eG6p>YfnZt_t8G7f~TC9Gc$iVFL{omGNSuf1y~+E zAQe%4t%BE|y_VPmJ-VEX`EnyvWhNw4Bq6m|5rQ&e5nZH3ctHY;J@ODnX~y76Y6}aD zU9u6GmjG!I8T{GtXs7UkrrZj@L{SGhIK-M{h zjC%{h*|WTZ36c(G$g1>6ELP*$d$Buf2IS!Bh`X~Xc_qOS!Y`1HXATspf8gZtH>RZ}~-IX8uyOLO7v z9UAU~;iCp3Il}^b7ke>wH=*&aiAPJkI{$q%32O&Ws|4Y>)SuF&Sa)zG-u_?;+BCC+ zG{6}Sc6P8QVeoy)vhQ&J@fDmowHNQcF%c;y1^hf(z^RQL97uwETS6P}k3oGauy5y5 znhZ%FxN-nj&hJ4hx^K%Sc5rpDqw%^OTG6=c;noV@&Hq$*dAFcv3yAO)lqO@}oPva0 zBf^tpuvDcZt2PUXX)3sQx5oa1n*}hg(?klu-NUsRT2omA`qts`-SarKXFYm%tw2PO zO9M>_l@}i9ia>7%s%sla!#q)(rAK%`TYUA&%Xo7C3_$aK&u(R+ZX9HlDLmM#`MWPZ z!oj^;#K(b_^t(6&xMAcQFQIh^&1Vq~2s4EuI57}*u6Ee4Zw2W-XE1HbFi}QZl47e4 zPp*+(b^j{9nezdSNiJwf_wWmHhPR(ReEi!YfaV+z&z95{%^{8QL1vl;JGcFYJ2y|@ z{K=iTa`6EA_p61o%L@pPaKncmOvAYoyM#x#s26*d+uPx#Po}}!5CIQU1ROO~C!eP9 z(}tj^OCc`aI*vn!f5(o^i?Mgxa_rl)0h>3k!m(p}Fl*M!Xwm!y1PA$vAfHTmBA3M? zz|UVuWLP*HTDL+Nji;5RMbITEF|bD`YBSPD&K|+lGl#M0yDtT3e*Wx1oH@H6V$_d=L zaR#?iNU1;*9`f9 zWW@HTaigDAaF-_x%|^n=TtUIY9*8_AGMBAvOxE9m<(gqd0xXyJr!mhOia{MSF|E{! zdSe7~IvL2NBPUeC7+{Cx6$MzPNWj9N z7#t|8!gz^0ddk{iCXMTsc6RuwdntO5{?dc`RwrjW6!_YqGNv`UNZO%aggX{@?S$?$ zmxcH^h~S>h)!u0T?l8F07#l3Z#9~5&k3NVHm4HZB;maw#czI(|}o|OB4*yA^W9tq>M^I z)?h1gYvM7!OBQC)nEF9+6y8(0U_*ien<~rExmymBCYD1sDjm6ltQeIRfjNmm*pw>8 zVjAl^4OK!tP67RRGt$PIQ8qjlee>M0IxY;m(~~f+w-w3bQxN=G27D(cBXdkHGW%GN zJSG`+z4UlLJ`5{NN_^8L31jMFFma>>y)#|0Ff9=K@}u#s$`K2aL-2F98dDO2&@Vd* z9nu5PJ<$Q9g6*&_)EB$daTqBLL~>XwBr94#o6weY9tnI^!LW}deK*bWj8ge`r$TAoXvBDHRszeVZcO8U{P16WUoq;ARaM;%E$lgFXOGreGm$b^hYxHB+MT z{AxSTBSj)sLh)SdksbwSDvMWr`R6GRSP%#AEUAzn(i=I}NJw#l5Z(^RSHdq>F0S>; zrn$aL8eG#PV$OD?zRB}CQ?c<%vw*@l#I&b5x!M2;%~hPw5?+xgg!5(XO#;BTf%*Zg zW02md>y<6MxfP^eFaXZyNo$Ql806CgI5hl`WSfrh-LZ4w> zhClo>FwWNsy?7vv3H>qz)f}e`STj)G08}%8&R}-7IL>+yr@Ue=s+(2hH+YAq3ou^Q zI~{&S3OJ>O2=Dli3Kg6(!XfKsLCTmap@Z|s0lqe-M~a|#laj6_?@jrAvZ3sogSdXV zPz}fz`3VCHgz$Mx0mtX*hnK-JrdqVs3u+JXY$>Cv(aIbsDC1Jc)*^XaEwxJpQeLWq zVRR+b{Gnh}IW!|mp&U{G6+L@A*&7P7D+F-Pbd6LuDd}BI6KUJ$l#j;_%xnPJ*|}j* zLp+D%anA*#B1kPr-5q$`vz85X(V4CzZlDu2O*I2gp8odCg~n&V1wymNP(p^2D)cV7ZV#!E*LK z{|{LHANhY;>~QE1J}t=u$gse*nnsDio$aVLtH&u>1-{AWRPK zdF8GEbJ>gf+Fb~`5eAushxla%ZK<=}xq%z^ZsE@D$HEI6w@=ear}6Oa9o%^ENO*a( z$Fu;Cxoi$#d9wjLzxMc&pdh*S=!!Vb06u$8bHy2eW?_$M_Nabx;}+HPI<7vsh}$H% zeOZ9z%$d&5@CS2#Q_9}x42BCX_3M0$pP|7^okh^V{3*=+%|JbSaI;({;WoJW;HG%N z`8r%+p~k%P1m_<=!I`IbaR%3DD7c8LRDb3TXK!?-QDNGbb2ue<&L7<4j{@hZjgC=0 z>E*|59LG~UW^Z!_$}ck*&V2CqMV)Yi!T2|_i*D5op<#-KFQVtyuAL(lV_gg{}ZtM@X-S}e3{_A0+Y{l?471F^AE0hlul3wxKdr+EY!(Ck^xG%T&{TZv$wZayCH3h)ykWt(=6 zc(GY4G=U)059)We(V$Oe3{Ul76qLlGJr27liG1O)^mEGzJ@zT}n*Aa0pkh)zX8-mnmTp>z*FT+sA(I9muO=5+71;=pha*T9CIYcW$14yP9Sv{) z071uM$G`ClO~gl&=JY!-@cqxk2AFfo`wW;r%ctMc-mx8=+*}1vZu2l_S{56Z`M=9q zF1)<|1jRXR>`~5nHlW-ljY09h6TbHEBw8AUm>4QMN+JT+g@jSRjS5ACECL}>A@Cx@ z+&jV#KGA^)Rz^UQD1*cxLs()o!VOYLta3zVs^F0r3R!^;k=Y6OXyqIlziy&nXf2vX zJHgW$f#`A_wB6E$aTwn(c~4&et(m?wlAPQe*cV5xmpb zGZ(>R%sM882+9`UoLIEc`@`D5SQzLGpl83-QFy3v`P@%sJ(8bsj|FxO=uASn{@ zl}WJkYl_%P6Wo)+p{Xasw$>_y!F0z2KLl8!;1uTrLv<#Cj4@)oNJvkFXQUUrqkRyl zqTkUHi_o-KcqT^*sv9=$*|29}Bb7g9rPpU+!OFP;xc2jRfL!8-U^jcn0zDAu(i(d= zufncPzv0}89W=cj#JS^JaQXB$+`YIP=MHbcG4?b*xE_19FT?Sp8*$<6F5J6)0*-C% z;Oo-@%D5mzMEcO!+y*}WZb;2ah9TJ?yrZ3bT^j=Jy1$6oYrlts!b^D2tLrRO??^1) zyA*+uuFz`2;ZEf#!aSgq_`{{`3m7|Y0FE5pD!iHx?^%tDr?!ir)=wXvrh4wfrE^MJi7@ekFLd<6<=ZN#vieDeM6v2U$>@E#`wb3tr-kPIXpe>F?H%F;dRYk(!L=+ zc+sf^UYq?cl$mk&q%IpI?dW(*KL@<@(R4V(I3qS+0TaC=8C^0(VAMOL z3yhvL1TEPc+S>_!4lM*=-lL)bXAf@0z8x!Z188GgPkA&v1w zhuSQB`^`JJd|^MfZu(Vt&hxf1)*sENpSaQQ)w&JMk5vA~b-##Usoa0sc(;HZ{Z1p^ zp8!v@1Yvn<=sM>hk@~fr=Zo->`{C@3u>bNd9KE~; z=>>Z6Ji#GO7}UQGczO*NPVB~SKhF_;heaCh3we}3f&=UkC2@hPvmFBH`K1y!w4gqe zYF6Uz^^>@CW*@cPLGdxA4fP90Cp%1@HUt+g@54{O%|SDt7twh_Pn3*mkDwyC;QLk3 zxWx0Sd~m9uVzCAIWY2QV@LXue{OM6h=dcH)4J?lxmo9+v#$dVdARSR6Xju3|9ebAd zt4+nk0wX%;LXq3i0RIZ92<#ToCl#rEiqKZ>iJWPj(M0QvPQyzOD{F`DbtZI*^TRh% z1@^?H;H0S-Yt$C}K>dG4x)g7;H)DLh5;HR5@OiNrpQNksdA16(EA)8H9ELe5a(tnU z!KX$QUe2NRmpG7q&=*a0o+zI+5G|}hFqb6YyJ5AMBM-z?g9#Wh90rRF_PI*by)p;!u$lVMnG7^WFrvBo6Fnu-i`?_q>yj0G{T6d-6!8d5kQ z-=JiKzMKj5a2-Y%f-slb=)HaxbnY1qZ3j=JrM19{90@L_$+0-X9xF|e*w?KJSnwsf zXhYE_TaNKXO1z~H#|eW4sO^QV{RiRu(F5?|uyVXRz5_mbdoo^mYdWU9Hw~|U^(Nl= z;#GY7{YM!6*_-%w`zrJp+6C`T9flc2$vFDmhxl~PoA_|`JiPSH8lTBKxn=S z{?u+>DN*oDC80TxQ(x+wevQDR%$H;43={D#2bbRL&0?Vd*WN}>B&sr+O?^Cs(>CRVV; zkiNnD{$* zkFoH10xTbx3-hRQvAV)JH%b8K*0EKvQ??a!FU&j6p6rUjG`tB4uGG3ie#L(XZI(SU68g$86hj(jQrD=kPY` zm7MZ%&SOB`2C~QU^<-z+yv!5E77DPOxyzZ3h55?00xU0v_7&PENtjVc!u$UPmfO6} zZQkZK3KknZOJlH{#RireUuzH3>vjKd?0+LRk97vZ|2H%&43?{2tw7u~%AZm$!15&O zKkQk~V7Xx;ojaB3L>lB7U_PTlh|M$HCW`0827dpYJP(#XFMkD)Hx?U6Zlhg!o|dJt zm-t`F^FTMJjRAAp{_}vj0K%zV{{a}M{l+3Z*Qav({k{AZNZwff6RMByQY&jPo3K^L~Q|_O*x1-+doPa34oO`;RZ;!M*b$xFu7Q zFbMtd23^X$-1i|sbq0r-VuZQ3Z{56#2iL9wXC4CQAJ9#&3IP1_lY6-O_=yO7$pJN= z+@y~dg;-9LD|C8B@B>rAWfz~VUO=i zPi}~`A^)cEGG`hTZa|!)dY@;$?H_Q~Tb!&4D-Xi8|W^S1#a_jKpU&EVu9d7g+x9(y$ykc2I!j z>{WjB=waNtbwhyVzP{dwk5`Joo(z^VaL#;W z6Yqcc0p`q^gCBobh$TP&ir*G5!%|9@{PYW@i}2f`MOd+95mqkc^cO7ubs<(Q`3dWm zFUIeymto_orC9shB9XUd>0+!|z69UR{R(SVEEDqmci$i{D-$tPj|8PcaL`7Cgu>6q zS8&k=2L~e{AOL}X@>6s0M-M+AxcYg+!NV2Jo!X)q3G>a`d%B{fmkUDFGKA=42sbLA z%p|2ZS%uh49U_wykY^-7S7?TJtS`beq3|L@yi>nw>^imy+YhY6o+In9|L|(8|NT2` z-1wac(07#fckNh&o7buBPyCJ($2Q>7rCpdiZx#j(>i~0#3<_-!43rjk%!0%$fu__5 zd2RxtGw7KtQP9;SLsOXqSxF*fr8

    #R(5yX{}j!`lxzlA-)G0e*;MoV=o9&%9Q=m zM8F*OxGfn|i`Ra77Y85HghlVu!b86ycVs23Lus;S;G2{{-9%Di#*k7uB=iYe2uWKOOV%hcJUw{&_JEI70nzwKFseP=ddF+Kkqvu7f`Dh&l) zN}w+ygTayjpV)8&DwuCui5PX90I1zPJR zBP=4A>JTP?a^^AiiSR?9Gz1cj6v{LW;JcGq@5iWT0x=Cqqj8kUh;AC}-fEJb^WO662JVNTVpU!}DtQVZ)ebGkYiP$oOpd~SMqq=pb_pM`^0Lxvpfe5E})mtA5 zb9*v6&9O+x(jzh3h+ugTWO^wwslS~hH{u4K%{)|e4j zq{G(J+XTod*YZabZ)lYgcssX1bdU#*@BJP7wy(g!J*#kF_ixy?X#w``{Dt-xVdI*w zuzk}{*tBi|jX6tc4Bv>=tLEe8?W1_1sU0NI?$8>kFUJNzLiKWRZ-c7N)kw;+!XwyM zfS66)S_pcR@3#F44@0Qqkl7c2i)P~*#df17y_9d#m)}1UY|?~ z!ZmO}(sRdt$Hmi|1qb%;>%PH`Eemk$=n7mo|2wvA{T}DfZK8Am&YjszbHe9n(ZmiB z!R_Gh(;9IJVQ}$i344bZuxiaO@bz~=vzB&f*^cVvy0|9~dUnc;{pEhpx_us5}{@dGQFQ@%;SLD`@H35)MwS(TbimoaUJ@*R}#MzjkU5 zHm&(VaC0wT^%YK^+=PqgcZm7o&aK0^e)Ry(pW23_2i9W$t`%7N%NI0HeuZzpc@NI* z?BM3wL`YBoufnp!v?(KS;nESYD#|GU2|@P0)Dd=Wb{O@^6akbcbfkByHVw%=OQEYw zhf9w0W`N!$AWO z{sJ7S&-Cd~g|i2C;o^}!*tuajP95BVcFpb3iq7$JY$(sgp(XJ2KE_QLA?oHF=z{5= zyh87aR8SX1(|l(ybBDP)6%JuE9|t+$F6n;`ey!ma)E2Fss4U-BXiDwZvvUca-aUsq z7Y+fpFQ9*?azuJMpbg!pEgfg?|1h5>kOa1ZK^2G}zj+6Eav3KMZXgBgx&X?Z9PH4J z-ZA#x_YZQ!=d<6&ud5fJnNM@{nmGs+FV!QgEFMWCOCal?BI0>)5Nz$}T(NSC!Ey%8 z)%QTc}!9;`cx<5r93^_>%)=JJsEygN;U~B>A4lBb?s&H)e@&uGR-1Q2>IoAN}35~$d8YN!WM&r$V z116=%VU#8WzjV&WuN7A8Y@ddGxf-0aDsd|=8b^aXu^~1HUlz&{V{VF+S2EBv%L|?7 zjD?-r6$7VsMNw>9e4i@E5lI9VhXz9)<0OErKJO1jV3Ip}jZa5PfE|7d55TE#6?SQJ zFfkzkulzU>qrM%CdE@HvwILRp^%@)>+!eK5H84(0g?3yjOcQgFJT3>x6LOI-HVqjQ zQqgOa4uh?Z*r<)f@wz

    6w6x$z~WP=ukA$gaM_om~EEhm|TgI%2@o6A;DXnA~CLS z1V&f7<7<;AexZ42PDvbI>6V20{#IlUNks%m@v}4l2i$yc z)+Z9H!{k`4O~MjctoVTOvN{>15ekI(d!lVXJJ@;9I6?iBh>zF(fREOGkIyzP z#2gw!`8W%ozwppHu|041Qv7si4Sqhl4qtEm1@Enzi>5+z~>tm;FAsCvZj^71J0Tt zw3NBQA>I#7!rH=~=6Rna((j7ZLWf~be!k8xC0d+g=idr`R+(6-(>%rl_DUZ(kUr%^ z`Tz$!XJ-N7(VreEKznu)aLtT@M`i=~Z%g@j<9yF7s&9b;p=BCKNFQKNcFt#~1zxeo zb+J$MgRI&l;>EP4d$F!1Db*shM2+w=ttg9Q&G;57q3A+mN(U>Xq^EHjQ)@+N1=$Q_ zH-uH{5mlW8X~$&5cgYfg#?1rDU>Hy=&iCNe30Vpldgj5-(+=uxSxD+%CO$MMJEkLq zQaR~72|aV5>OuBF&unP>6+y)-2D)cM)4xCf@3B3ZADza$zByu_w;8Z!k@q4!jzqy; z?_y*jUP9ko7zP!?Jv#oRxX6O(-Q{dlU`RSJmlr<&EGd0(!Nv($St_a@A z=dv*9&U7a1rG4k_eE~KzUCNW&43v{Fm-$V~yL}(m??1vdy5EgI`MJ;GF;3$Fj^hHZ z-Xx=F-!@>|4*YTBKGo|fE4IJuxEd%=u@N?NXPla4=0PMMaZa%z5=Qeo4b6s(P&SApxE7VT68h~#G z`x|)IZ_q$-vEc)R@E+&(q(->jPzD3`Of|!RIrFx2y>33dBt9VUM+4FR=lC8sgx5U- z{U<~q*82i5XD;_g5B{KYAK@O|@AmDxxOw-E_<+FN?YMFlAE&EenRQ6uo~yKiIm?9cJl zSF^ET;dhwx?brC?%g;sLoUgvd+%Lbv7ax6w58r+l^S}5C^FIHA(%Ay|UijTN`1!|q zSop(SEckXdW`Fc1=6wD(zWL%keD%pJeDdxqc>m2Ac<0UOc<-%O@FSJI@P~Q$@w<8W zY2o*%E-w>aI?uNV9R`~{5#gQEVSf$$0rfW3zkT>QP!&esjCyQ;yzeJfDiAqyS47eb~EMyT8y z(b{07mKae=25skI9TBVxLqahrwdqt|jtbf;3nbY}$O<(AEH`z{7C@!6(jWkHR+yPz zIZgNU3J;a*p_~9GHQ` zmq=k|4pveI87ya-6^<;=iloh}oB{KgerbX`n!V4HMwbb&T-w2a-k*%Z`s-Wq)7I~? zblVSDyyXXczi}Q4dljK{U=8$D8E}mYL4Yw9Zn2?oBIDXmCJ}&nj8abhD+sQxuKyA& zw^6P%2FqqcY71uWRV9KM!F*af#lP=*YNoioI8a@}OJ=RCURStu(?>?F&V@0mjam&~-{jA{kAAS+S6i0mWsu zGX$cYIT-09tI^gbmmY=AHo3->wRj_F|)%b6J{XWnuK%XR&8glD;HW;jASXasMlvTv&JCTFg4 zUSVMi++_pHS)zMc8obZz%?L;jNAu8@c;&N~5upl2x8Yq8lO%&fgfrU3xWk`}ZF#AI zjBS4bmMh5UjIXx9+aiH~ax^4aad3$bKw;k+gczmpl+t-QW*QGGQj=)Rq3#VX5#HuCm_IE^!W_Ebi$aK>li*2z^581AtY3^12iN2GHFL3g`4`x`^CwbAmSM}*Z?SgWm)N*v z9yV^Cj}>cYW6%C2Sh3;@oIbr7!GW#d*a;r@0AClV<0OJ2hUr!o&i@eG z*Z+*ItAD_jwciTaMD<+1YBtuc_zWA?eu-_r&&8VGKEV2wpJMrvkHm-0X;X)Y;GlAP z4-;fDh?B&?-^By%D=KjM%<(_@%Iy%MkHE{{zlDIbP(&0+VeXzrZKgp)h64L;o)FX{ z!I8m`O2VL`am0n%J6#=%{hOEK_f_-p^H1+$$*&(^V#I| zj(B77Cs5ST?^tF)ba@gKRVf09ORmnwoL}Y&?|8X19MQo(2ykl!XDX*dS(aGA@bkCS z7K^_T-1k?`9l-wWtFdwALVWY-TiCI7F`nKyi>pU=VgLGN*t+5;oI11}UD}rjfIK|F z1B$3n_`0=&Yr8g>^~TE>KXJ71#CHyM!^|(i}x*1hY|+_wb= zyfqTFQ@V@bhQ<-ai0EMi2k}%4&wy?$ueQpBvOm4E1CkLph{m#ESq?J$w{U#8z>56x}c zyuGkX9*y(;JE2O_3a;9w$bGL4O_RNmH>tDuI5=+RAQ(cLU|3*Fx<-Ouqa#W03qZ5< z0CfFeFr4)c==N$pWK^#yG*+!v>9DJy6Dr)?;gslzW|4O2=hY5Nqhj%!A|78Cr=oIj zI;w z%@Jd$ugufLVO4?xznY`*Q*Jos6!>CpqCIwoJL7n=5+By8(4%`CI*iId(TFT$&^%B* zyb>MymY{G@0kp4|AbF$(V@;u0k`j+KRYuIpl3-w&5~I49&`afj@2!!zYSiIqTms%P z#bIveO3X8uF<&mnSETDLR`}yqva$U&G(fGCL1tDW z+9HFZ&;)0*3Z7ay;^Lx_CketkNoI6*bwMhP39<1~1jR)l+$cwcK@Oj|FnG#>;HQc} zU_vCkm7xeyN5MZq0v|;vJYs{yan27=(Kx7$Mmy>U?y7M3s3S?=3WW=u<0KD4n+Px1 z(Ys^k(-uu=jBiE#zjdUy$ZsX_g1y8W_B5tC%K~WMllJ+1do-hSJrZcViVcKgYyjMq zG`A~)MCzrHz)u?mZ*8PV{b@W7x5SZ-Clje8O)b*MbkY%WjEK%mL{zF8FwhnH4$xDiK#~g0)jFa(kAcY)~D(`~4RjeQ*|6XihkI=OnJ- z9@&W3vGwW!9D00C(9G?;bByezD`YcX7Q)-7=uDQAw0-R9MI3o@9{cZ{z>$Y%aRyhh z@$62lJ-!8tcdx|ix~Sg>a~e%`wh3wN!==gYsxSF0Cd!PezicHnm` z*tQIFHZH_FOJ-xrw{M9t_Vr&s#*`o5#`yWKVd&>m(C59;==#P`bbf6Ry1YJwwuhk8 zD+5t8wHHdqcR}Ik4kR5>GOiwFFLg!P#IC5B)(1mpPeJ?XeUaR&02SlAqHanrWc4pc z7WLh_2|ba~uLR0+6Fkjf2+ouX=NXO>!`}K%x)8Kg2MFP97W)K$A-wIK93ws)xS7aq zu|$cqHR+6Y5=YntwL*Aqg80D7!Qq25soxgqprr9Bg!CKVR2jS|-!DThK1KxP#DiBS z$Vd<3)e8)$OG&R`I-cknvjF@Pd(l|eoyIMcUYK$M{vngxjgpUJnq>`UPJSXj_jz!QKf?aJaI}9^bCs6 zEQV%U0TQNBc{59esHW5Q%N0ocQ}i<{V3<)Q#5lbnO?s_PfZ~k-a~2zD-Wc5e-v|TX zwrwu6@jV!572q$)-+|>!!J>Ji8XB(4v`Xm5lnbgMreT?}>Ju0zF?jo5VEHq^+(vWK zh+kZAj6WxT1%@}4gqQ!TjAv9Xe;)gH!Eym6|5+av-sZf9WB=$C{=75>xt{^tv~L5* z8*euT%WdcLwoMwBWjmfY^IuD2z`QX~&Y<|e0?U3#r|DxF8@Bz%qO$W%Z!POJE`S3B$-2Vf2 z?mxkUTX%q4H}UZDr3PMb=DFU#1*?Yi!{=GWz>-bCrQ3K2;OLD*xPE;@^%78UH=@@&7U&4)r-vJk{kUYhm>y*Vf@hv+20`T|`;QX2U0R4Y@ z^8p>ag{QZ#liUPuQXQ@{_)IswOefxaLWa+EoV#-$bQEVV9-{n{*qKv_mC9^j(JtTy z=wYe)51vq+?&9A0O9I?KM-{(FDTC%Wu06(sD|D~xbPiLioS{mIlju1Z6u(6GJZ)X`FaU_kMViZgz(1MRJXfoulhcQrjJ&+FkkskFP(*mUxE*^L8d_Tj_{8k~-w#mSS$#UOV2&!tNj@bu{u5zJF6jYdI19%jvY6I-`##*Q7^uy*Zg{Qmm}vA=QSdi?m)_gKDi zDb}rDh1F}8W8JEi*s^{-HmzNcwM&;{)#9aCxo9zdTl_PA{B|zZt!98{Irbgcj7?;a z|MFmV@rPTWCmem;VDIIKHr_6<_j7@tLV`##d^C9}NUkk_zBCJ2T`Mr? zwTT$;$~fe9t3pZNj%XI(j1ZFo5!QHwCC3YcfkE@IBqc&kGK7*b7feP%Kztbd<$>^% z`NJp1n~WVl#E_yFp$&j4O^ULvIVi5rL}rBr?faCW$MAa853EJE5%m}}r9Z~KJs$n1 z4aA5yMnP9*Mr5iSj&d(Z(iMoxju*?*nLn9%k>f}))pf~2NN${1wi;7u#Q5*u#Hw3+ zF=N>$==|X*Bu%V9^uQEEb~VC4%3bDAQnE?u9QnZntUt9GAN~3{7VTew;*qsb)ES}b znFbCxq#8krCK>%4T+uqVq5-t*pFxIftpLg;eN%)dgorZF-V+0}8faL0q#&v`5nbLL zjFlHR;Oq6XvFgZDtT^%;-un4%m^!7w+9MCa^emQM<;WS-5wXQqxGKZp7~u!6s9*%g zN)RQFfh=B*fUpp_`+B2QJLZjl5q2*&!3!;#2{4@V7%XqnviW}#&SzoI@)ujSK(kgY z1z^rz}1;WS1eeYXERkZ!xa zab9B(UffF(26qo<`1pE27E9N}L?ARe1QFC{{iB0Ku+;ce4dTe?WZq`>Bo9j=!^I$h zlhP0A-HS1Q`yw2}1-!NRWB6DiU>DMo`il~&{YwPTcvQI#nImfuSg3-rUlGiM%Mej* zMCRBI@W_@4?Jw22BcFzN{52M>j9~V>Dv&%lezbq z%Us$g71Dlb&pdYcLr(mFEEq->3xkNuw72*pi3}7S8AA@qfe5Kn3$UEQam|2CNV}TE zc64_$*mIqi$cA<&W3G=C!E~;)-arOfF1(C>=s%+$wjJJtQW_Uh@-4yxHYSPMR~-s3 zZ76iL>2TGDBA$##RSos~!bEr)BSa8Y|DTsmceoUSiwB;Ov}O_y`szXsGHmuYtQb0zAPE8k)Fbv?T26I&>Vga zM~`j8BQo?iZ~Yn9@9e{wYg=&Y#un_muoByj{fd3ZS7X-!8c!)bd~PGQ9$JnokB?!~ zp%rw0KeP>KA;4X8feF`XBHgrqs{qQ?79&EbpV@~vp|D>$K3+WsQAH{d@RY&w=;C+` zeSZX9b4848!kfCO9kl8w{6X{OVbUY^?^%aKdspDV{-xNxdl9zpT8M4C7h=oq1z5Ft z4mR&!fGr1p!ir6_z2|3a+rJp6E^NcLUB9BNDp}Oy#ddb+JE8~8i}#RQoQ{@lnxKV! zGqm$^LU>#hPTjkVXsZft@*w!ehr%~52(A&X@R4|6&E{o-=EKRU1tKE@U^Xfd=<6te z(OZ`fW5detuwlh~Y+N}PCl0K_x)ony)B3qsv-%5c{CzGqZ}|o*R(ybOzL|{mo91E_ zd&TcwiKfl$;P2-N8PhZc2BT$@7xC!cU3~iaN1`44ltEAx=rDWZd<5sxJK9l)=n56& zRR#e#?7VRdVOkkly0n3U$A{nmc(i^I6NmK1w$(pk$xk2Ro4GTv=$Ci#(+_WA<&sau z2Zs%-zQ)o;9}D38=Y=0)DUIDLew%}3OTWghoht+di>q@}L`Ql<67GSP&FyIJ-h*YU ze?l9NR%q_i8m*(;@Xf9z2rbkgrrLsFO5;1GBQ#Tm*z82iUHUy7J=&oa)rSLMM*6j* zy4j(BeG$$a+<=Ai-lcY$OZE8{ySDs-9h-i_?yZZ2cmAR6OL2HJ$)+VZx@8%TY+oVh zZaUT#!GX#M4fKE{#1GNofr3VD@uG#8Flij@TE76NAXmIR`z`orLZPMiiC1m-nrN&| zl0ixHZ8*IvAAa+J0M-K{JRzrf*2%dEf&(1U@&!Ab-n$X!_ix0RoojGu&w5-xxEW`6 z{Dw>We#6;4i*fbHN}Sm73(g;0fkWGVp}PKx3nwP_)Dk zr}>c1;aCW~>P0&uUx4K{&T`E#noCE}cr~2ClMG>CswPy3kA%_YAPnq~fk}lX^s*`h znCqDog3dGhqhfdmO#Eu#8iD(Lm(Gz-&A9_WH;XQ>03w3FjYs$cz1w}~o_r@!;UV*nR9`=Sr zRJ}3{jtSA|JZb<;DOS{$XWmc*j`!=Z333P<9YBm`$U zK^xTuBdRhmb=*MwuwyY^KK~Q?yxR}on^SSZP>4-M6&RgohJCUJqTa8A{|6lq@K$?7 zjV(d?^m?SeRE9LvIaXXO3asdVSbtppI4>er7|fdD%#;(q!jm(GSMO26-N#(fl1+xN^2;( zrTJrq#uNK#&OWSAU}~}y)hQw9n-z^dxoT7wrX#B`3+B>HSSzx{SeBQcjs%?%7K0T% z({nLIrNtNK6uhF*qTH;9F2z9eg$YVi0#s%V64Q*(r5d5nFeA>G08NUX#_2@JbV?}n zq#LS8XVNOf`AUNd@kts;>AYBLBIHS0Nc3@#(D6t^yx5l~>ky%li~UfQ6oK*4h@tDG zbX}A#?$7ho@RgG;qLw0v^bP;mFobHPbbd4i{WFnt+>L86oNU&NW z^y{FwFhnIvp`!UzZjOVcI2HO_Gc0A)AE-|;<(a9J@`{s@QJ0V6o>gc+qzgI@?=I2~ z!@8mOO9L@<=4cF>HZ#cgT+pizM{`;qJ=+SAB?!J8ld+(m0ZI)9w`0x}?;4)5;Y`=a8zwBFqg8tPg z8(N2|kzG(Rqz*;>Xn$Z0x{U3Gfis6<{QFbz-j5&Qw*%{N@ZJfWe0mA{?j6UrYX`CU z%6{y+brk#Vp2mUuXR-IrDQv%X1Y0g2#I~!4vFqk>Y`VB#?EijYAJ&}OffdKLVENI_ zSbAt97Vlky{dCQ~+b6O8${}nxvkQy%tj1dlKg0NsXJW$Vui@QAUt;RqxADfpPm$84 zNPGZ_D^5amwpPT*QP-qG-JZruvRMMtWeCerp?FkBjGy~DrvLaZCd_-2wqM1#Ij>>N zS2M+GgCQSJ#Ndx6VdzH_(fhR#=sJA>I!)}0j+1($)8u|=KdBdLCiFtp1o}Ov^hF)% zX-qj(KCwGVPgG9rC8&oA$JHa3?3(=1wJ03h5yj&>qG((v6pU#vIPP;tRwJQPst6d% zf!noR(vaN0SOj-v-I$$7ymMrTtTQ)w_xH*cx>-PJ0s=}@2(8k=pY$N_0tGyCW$++j zZ+<==TG>F`$sLt3di|wa`y4f_g$B3=GUprFm#tiJ(2PiEer&^dybJa_!V|0a7!F&EDkCbBx;n z?!OZT+W8s=)*A!vHt^d9xZBEOu~D)7JD%n8>BUHRtx|yHI<7O>nhcg7qIcl+4POd6 zGv&mhXFxggmkSQ_>GWJweq-QU0Nl^X^T(f;#$M!qCC>xn&kF;||6Kk%K;Bs7^lZ^% zb0K@FK(tjNwS#gpQ@Rw3eH#G&zZILuxD5oi3Fq;#zw#`%?ej642S0zvV6dD;fay~! z1yC-V%yc(&&UETmQ)@+lPo`mEuzd6_^Fe}g@?IK z8grK0z;avO-$`R&{IBFcVEKRK-<3vS`9a|7N!)n!5NGZ`CPVuv9^Jf$Kdx|4satr& zps)y}c^n(N)?#jA67cH=0hY4|^tGpS{mre|H(&sc4w-_d3?yH^1{__1rI}Iq(P9Q! z>QvSv?EZNnzD%{?OLZc!<^ZtkD#)s4`brTO^yw2cfYv830jJMXdIC6gvfE6*a%>N-r_&1=LihZ3GjIW5YVXVV19)&7e_X$YhqQT> z^6ou++JMfVqp~*b2G(x}e%}df*h<@U?e8S3*8ywkS-0*2Ht(h9-UR%-h0dY+Y~Duo zUxkZ@7UJgNAAy}qfGsOXR+G?qtLgZ1DtF5%fU3$!_Jga`HXO|J$pg@q0L^dB`4Srn z@-W{g7}t9ZqG#muFXH-zW4Lnj5*|IK)2T@=v-kP^8}!`kabetGERV5bV^Rm)nZKA3 ze>}t^;bDI61YJ+4 zzXHooojHz!2ltC0pDYZTKYH{4DP%k`V9tR(GcwXd$`mXrRh*z<;eCZ77V!xR7)*&U zC+U%>RUt7!g(NcGtceB~;?+nunUS5A3=5r;oUEsF<6%gmGO~0?%he-2TZar%yfSn2 z$j&n&uP7PC z98ZeI$b1p#lb18H=Q$g=i34&Vt2d+O)n0gG<%igK?RP9Wwiq9-{R~}R?G0nkOcCfY zqRfD#{uQL0l2X{S9EOesNGM4~6d7l1Kn28vAY2iRAP#I99txkJ00Ejiy1NRHoB?z8 zfMh_NsaR~D)7T#vS+~!$s z1IumREI35^@a4>rsI~LnPc(f$-3TAR;p!vlf4jqqu~Rl2bGE7WFZx5!N-}L8{sjWKi%3kUcV(kJB^V9rZgZJy-}ma|8YUr{Uyr`E$dxKIG+lFoVomNUH& zQ>-u*3kR}|p+3wU<;*)N>79i5q1lM-WreD%1%@ukh)9pb`wQN|JD-#!!BatPkg9~d$N&#RxG)6e9qv@xj7T?gLYGCXEYW2-id*!IFS+ zQ%7RQzD?-RiQD?B(H%W{mt*AEZs<(yUsP{FhY^JsGOIf#d@=;Xrgg`Zw})fO zJ0tM+T;|K2g7NPS$GZ#O#Fr~S!^ew1z&ESs;J4k&(Q#0{@IYqZCA}aU3D!ik4R?a0 z!W~s(J0Yql4$)-^NTBySvP6mKVkO@Ac@|B3m$B#EHkzBR*xNz|>9^Su<+q8ZC z=3yMA@#xs;bvS%>4fY)W4LeRO#n$7$V$a3ZSV!~frV~qW;L7h_6}; zcI^HMTc|D@w#~<{t3Jfuql>Y6>pZO4@e?lHJAqYOmSN0NkLqfa?S1(@?AG}{| z)fCc75aG$*#H)qqlP}GGOMv9e=Nny@jPO!DWYm9| z%Hj88+eIIcDx(qT=ZbiVr=W-Vb^d!;z34L>+O-rvefO52`r*2*TQysJVA!$wJM7-_ z1NP8-vS;0QLUykI5tlCRM|ov792}bh|w!B zclGyB7U~d3a|4f6o+KQ!wUtj>#G2(eb?pS2FjYzzuM~4eYO)#;L2d~1X@~olk7CQR zZ*gw#Ivm;jD|W5;4hPo%fCC%8#X;&*d#R3lH_WH{eTRKp7GlT71=I)DQy=&R4z27+ zCy7QP)i0d-2z$X#8aDzPH?O4r6pZh7Eykx?zeC2@Dnxguxv`@PQ3H~p9Zz%C$ZTjv zqs<+MVAza8d~uCP}Z zhs|m!-pGkTO|lP0(YQOQ!i=v?Mtm2e!PbImtm@VWi9z1NTe<4xm(WC`p|;P((6>H^ z6U|-yCXGTnH#f*7VfbL$U`$Aj$4_z@P7E4=(vF#M$(5nUjD85vc%q&RX@6A<#6>#5 z6dwrJ5PN89jCeuO3i8m__}(WHTRo&$Q&4~zwHfeHIUr?98PZ?xgv80^BA|HcxH4po zD@E?$baWn?g8KA8e4V7ixAjFx9i57xDJif{D}r@&4wA;_AZ=U@iU+5nM~6hbo+8B} zl?2D7QrwftaVazi`)F+VHa`|Kx+J2{pk$PeOoMfJ3N(X~U>TAQ-Ef+FW~9^o^!SLz zj?EEa*qtE729pB6kk0vWff{3zz44C08%Ly3IA^fn&0G_9t)7Q8Lnw-Km7u7)47nBbd*)@*bLNQoCMi3W?rVjSo<*NxhKin1olJVUmF66a z2AX6IRHPrqYDv$Ek4CgA3Q9fcKxUP2Ac)nGytmljc)XoQe18Lf_n(nw>l zk>)IV7bNta$I$Pq(8&>Jh=)`igK&8Sf}%<9iw;IuY$#&lNT;Lx5JfOTY5tB>MIGTx+yTu=KNI;N9BW{MTUb5XdC^gn}4d}x=aBtV�qrW z9P=n#NB5@Vq1q_1f`<1a^rZJDM8H$(i%1&xV(EQTW$MIryedIzlp)@t68b}cG!UW6 z5X734Fc(^oRYy8Nw=z`ps}mmvs`_<6?ZA3;9MS_Fhjv5Vpl)bCs53eY?vDE5JHs0hNR6Q9ZOCUB~uC^db-v@mr4?)+L`l8!}0qFPga145V zEC#(b76T~l``Snhd}}<0zds4X-kXd8Z;rvpk0uGwZtN#hG4``*829NkjQNzd|J;A+ z^BH()_DqcYV4^s8>YUdxZQh%h^7U(&{_QM$O!L`$G>43y_c|t!J~;Ht86urY^YGhi zzrkzEXOo@tm5^6|`vTJ!e=LrV{q{|9&08zK#*9TDW8f!~(ffn(sF>6X-QFIBE^m!M zJxPaG2cvrC0F+JXjiO0CP&A=C3MOBzQ}*M!IRtuc-z2h8z}yF@>d|a?S75H_Qn9ZP5vFv za;9Nn&vGpT`7>*fG@%C8Q586j8<@3u?mq>~x%~eIem^ITz0Uti{t6&(EYE}E&kNV% zpUGbVGGDOPz>t7pP0rF7P`82Q zHlY0Pz;dQxVX&M7d@@+hG%Wny4Vf}pfaRwyoDtsTj4>TMaa7Q*Fb&Ip!1Djd|5wBg z2M^%goOE_62CkgO^~d*d;?YA~eFWURdk^>ToF#+mDsEi8fcs~T0vESp%cu_cl$0_o zUkky~$G2wbAeuH6E@pM~{mFMMlMHF!+ldW!qo58&4HY1o&X zj4hH_-0IK`Sh|?bKLy-A4qQKsyQ>#qK}kB+s%1DR3&%-PR8GYBV-G1On^oahrIlj2 zMvdjNG#uzL1vq#O4jMWgdnVwx?`Kt2V2zv*k}yJT1ylbtAnvNAqx9r zV{uR-$04~E>tbd2g^b*_)=->?jlhwpC@f2e!?$WRmT9c`Hr|RKDth3;k1O%?{B_*E zaT)g>pT)HYCvf)072Id;nTPb^(j>lx6ss*VDYlYQilciNO2-v4Xqle;$o0!O!2v-Z zo&$dV7(3GSSQrtHKVJD5ICKzqub(C(`zDV3aRnzXQd>WIO3%k$@elv>EPqJ%yf1)q zreeXh^Z1CA69JZA{X@{OoI837m(Ls#G%QCh9Qv1F`RTJK1pNvhXR4M97tUe-{=LY| zOoz9(rwHoF06EjKczU{vAe$~OP9n9pZw*gx5BU1~z{kf6F3yf{c4!9=Cl~lQyTQZ3 ziME~K?e2ostzJZ!BmnOIPH5-d8cu<2;V<<>oJERQy#x|f5WuYU6ZB-VI@nB)lJ0E$UU0gy9r z9ze=1ONdS?B#inki-Z*Qu*676l4(DclwVUA{B%JG)Q3?y5`^f($+!%GtDKBf+V)ll z!ABPkKVu{Utx`C~`C;JO#5hW0x#s_AWt}sr}G(N`HKwiq2tS-#jc<-ELDidm1c=UbE9}wBp58x~b#i=0#litUnX8_T;}Xu&VYG9XrK`GAh(GPK(`5l+YE%; zKyjNi_87N;+Tp z?T@N9A-+q7SpLdjdD6ggC_1FUH=D}unG3g63F7KgMQ~5%EjRU|KGdfWDgBC(Ik*C0 zIZ8O`17Yr&2an_kxY2pcq3N0ufshKV@FeFYs7#Z>UgYde&fqswt1yo~gXJ>nOR~Pn z0w9+UOcP=Q%Nw}N(;$L-{u$uY#{H-mlqCXu3SM(6mxJ$xRH#t-S}$ah!q(dCiD%vGL9{a4!4B0SgG`!kB}!_-5}YaZ9ph>)yE1Q-J_d+{e2GNKp8j2VQ= znnHL4IE&z%P7-%`(s&e|trqWTaJmA4sj&!7i4`9Geg+9#jHBz2~CsL{jU6bNO0Jd~O7h%!XMT9AzF(j4ly5&=B8#CV`ZqyuvLmmsZQKIC*w zQon2{>huUNjzvU~9H~7sk={9jjQSX4m!+apk4l;k{NU*PB0^)_(A>oi5%DxvWJE${ z4Tgk%mk<+;+Xh!er1>Mz?16}s0EAk6MICj;@l;kMq)FijiVqaDDxc2(7{@Oj!@5mt zU`{i^E5rwmey;G6(mSM+!JEcoKTU%dB7dahAfMriAXqX@_~wVN@cEbTM%@vhYag!qww1MZ{XdJ-a*ga-SFktpQGo19!M@ugF~1LB>VxiED>>? z3`nH@?O!4j!Ihcrh?l*8x%Nj=Q6Ayu<6C(02Y*t(hkG~9;QE!rxOeviu3X!P!^hX+ zH0fg}&u_-D^P6bS--6RucH-pa9XN7sEB2n+h@%&G(tLjs7jGTKnX3nI?CfqFJh2T= zNl$o++gQHxXW{Yh?C%WMXfN1#y(lPyczL|KPcEW6S_N0FtlBJidv8!Zs(RL+kcidHq~$ zTJtqFtoa6;cQ3`^^E(k3;Q^ljC$zSI0j=9K#loMy$AgD=ph}EKJ1 z@dvo5QWf>zP~o8;Ws<>^Z^n-+7hu$s;R5&%3i5!LTLb_6TQkSv#`yy{ylWLUEc*s~ zH~oTh$2MT+hVQUr{X87lwh&v^&BeZ*KVk2Vg*do(33hG!8AlGS!O_F((V;F|aG!g- zQ+br?HL>{P-VJ>6`8#Mu@7B1lXQIb@!x7m*FX*6*6H1|w4)vq=Z(U9D_=)yP7GqbTcE2t z4)3cKSkcA~H^N>deYPbwNL%2zIRqC;FS$i?&ej&q@hP?680sHI9(GVmT4CbrLlLEq zK~O{(Mo*gr`#68}|7;38jPyR~X#5CliUBm<&yNqs_f|C~52!?bt`;A5u0_AF0DRHC z0Oj6I(a*;d9UR-DI@lFfdplILw!<*G*D10eZb+1vMSW{ow_MZ(zKB`vt@yHM5vI^Q z(~a6QbA%BYQ!U6Dt3mfcatu##$2xkRttG|i(mxNXmvWIZtrQs}(@{G(2}3)pF)L4s z`Nl9Tqk65-%J6fB9t%p7@Me-PJ~sGb35^S@Eo%H&l8SdaWnn8w9X3Yd2St(^Ihlp;4=l znqoytGU;q-DI&kLq)13*WjVTb?}pCZd!W8^SJZUqi1u|IQCHs?9XoYKbzKKkR92(7 zyaKs-1<10;vli!~yrvYjooZ0qp^~mEMOkGL@(Xj2lb_MxkdtCW zYE}x8Gc3r+rDvf1%p4x&OhI~9vdGWMO+$J{ zGOVd4WEG?#vydb|6=~UAwv{A>?vqCM$V8%ENB2n*dHgX$XV$`)oQUM?B&6r3z>ubg zksW%{O(Hd<8AYBc!;GXX(oK@-H??X=5}`{;gvO#3;6JB^3Y@p zrg$XiNc2kata^(EYGZ;ZN1tvK9~JmIX(CfW(ma%?K%7BE<*K13yGWfx=Tpl2k#S^4 zBuF7u$BHyos}T8#$$C*I{t%!rkY1vTLt?5PDfwha&^>sc^@F7BWV&A>@~etO$}1uG zV~{z^imdWnWL4!Ots?7LYRt95ke38gUNYiR)X-Bq@u~nrjz#3#j*B$Mj5vCx@c0OX z$3=>j1R83?7_#N~hpA2#(vM$)>W3lc6t65soCfLTaBPDvxYBPW1(5 z5ogL&Y(-Kz>5PQwv2py<2pg_YH+fFju4^FiA#s7umSwRAze`v&*bV>ro1A zbvk4PG`H7ez|@h(qi)4W?N0AX*CG)sz}zWM2*(!CRa5`0%@W5gG?!-gtrF*(yA+5r z^&N9ytf#qvrBkj*&0PzTL}McB+3ABzkvgmdsicFXO{hV}^o~fISqI~kO6aCm3a?+A zC$R7?r_?44V%wxKu>E}AKNH)z0swCWl>eP)`m=NY4X|7`wNRugI>ygo8eattXnPdb z@aFGdLp`QYfaL-ppV|PJ3z^OoCI6bU{CRNvdHE}Vys`WhK;BqvVDjHdV_^KRBxYP5 zB1dP7l&Mr~)G7>g>tAdCm)A6w{|1gfFVh-;a_$??)2{rxU^%z74Jc*% zU^#!3Vj33aEI)nmERLNyfm3Hr;`qs90vu=W^8bM4|B?T%hycsq&&~uG2xqYT$z7ay zbYH}!ynW{$9^5>JKW-fXp4_A3r+|~Iadu)o=Bs7EFUx^L*MN&8x3=Qu_cL)spAPhy zDLlmmugd2$ao#Gyksft)?HN2dbrl@Q6K4(q3qHfu%p`1;M_@^D3LdYS58T`bJU)e6 zYreb`Ou(Y`cy#(APU8+vF?Y-D!*u^M5H8&}9#Bfpc6B50{oB~vtq7Y6wK!U1#<>n= zT&d9DSiBFmhqS?Vg(psx>ae3ihm-ZWxK>F9Vn!zJ7gXU&egMuuF~1Q`RwUtoF&wAc zIp9VRDbz(p*il`BgEgJ8rl>tu^csa5OE(LT`KOPVPUSML-#v_{ce(8@h0^e!tMWv9(4aIoU2O5j+hV}$tnbX-%ZbbiOxNQ z+xO0rIeQ0x;2~~axCmUkFTBd1+-v~L1qV6_^QPk}gXNlk0L#xGJ1scNk6$_{ILrSP zSbprp;b#Fp`5fjfzkmO(@G{@NeXB^Bn&sic`$Bk|1A#KfIRonl4@D}JMMF z1peA60h)8l5}=MmpgID9@e%}+!4|9x6FlaD)Mxxnp$JNfM35;00R}RJ(iM?A{+!Kp|qS7Mh40&O@e;K z+LsisUSy8~dmZJUiKG1Z@fVM{_vc}h-W>z13e{KbqT-<<#r&eOXS1-Xhq(A_Z43?|M6eD^N zo&ORkB_s0@J1`TvQN;-BphIZ28rkEjVH%hNRWAz?`jSH3KV9%aCy%ZaQS`m?6-XV~ z9@fFtu=FiQYVS%E45~x<(9X#3Ns1FGxlwwV@Gg&#lA#_GC4{#bFz4;C=tx1+;uYX0 zfO7`N1yxJ4ro!`_z0R5QoT*rBfH`}Zv)H`KZ6G;QvoM&>!azFb3u>0Y{}SIIKllav z!#^b8nRxkoi+l#r8+)HK@NEOfIkf@iESzWaFz0JH<$R`Xk*gF?s^bu+iHB0FL_lN^ zB&uk{kzvB#;O?_2jRl+{f4M`ocF_$S3?j6U{)4!v`%>J+oZH49vH$fj@ zul9nZNCk86T;bgsU9A@$%+fk~FX%UqtTGC3^3K+RNEuiv0(s^RuMu4NuBH&dt?6h8L|dJ|@F@4mru;MsjDw2lw=SaoM@B;*GA{n~ z5@%YK_yHWWGfMzO43;x6F73xWs9_NCJWk9B&`e__6iG{t&nTmx2g=(me zyJt&KFr||K%iARR32mKOnQYfkwh$Ye1YhmhUMiSLs*IoyCA?4@BBCS2m z0c6;2IkXiI=-*>JLXad7QSmYGiwZ&rdj%R5@TBpUgD*==v2d4oBZ9{2h`2Dg2f4r} z#1m2SP~;Y*qHo_$h>G$@c&G>LTid~*9f^}2-2Gdjr88~&Hif_39sWuW_^Uh-kVvWC z6FO=~Wl=m-q$9*;sSu`*62`kdUQLl%tV4Ra4we#X zUwVI&s4t{c>X6JULQ1vJ6foUDBCM50RP`-IN!L8+GF2!c<2|F)f@SM|!p6<3@r2r} z_wc^3b88L92i{;x_VC49LSibZd?B2W> z#}2N+hIR9Cm^XjYbOvj0HN2pE@uxH;+*t^)Hv|~BEWBi2|d158Km-K8wdC_n+ z2Oz{64UP$tT9YNbG#`-m^Yha0(WP4r>S~H{;mko&^loDF#znYw^C(W8+=6X8f5EA9 zn{n{iO6=RWjP#K;ICx|g_8(b}bC5Z4J9>VKyO~Cr~ zOQ^hiICX4q1OL3e9kK?N!_X@mK^5_WiY&6fmFB)wL=R4;@q@;-0aii5Vgt+LX-wgO z!5rXIJD7~%p*jBzEVpr%Gfj(XaJ~S`nT91HD+b-mOcj`=y@oWv6sOcKlsdJ%Keg3&F+4xi9F-Z{Y+?IS$#?$9pqRyw0% zMi;cw`ys9{4mBkTj7|x~ccj-G>tBuf#31yv$nllYfFI*kSV-^0$I5Ul(kJ0(V=_Lq zBw$@#F7~7tu+hsM=K}(8MJ2^5nq!s}DDZxa6Bef{u_{-GFG-hqd1wmScaK7kfpU!K zE5+nes)xY|+mh7SR#S%IeF{<3KL?%rW}|m|JtmdM;-lOMEVc$>ohcaWNPqefwdY6XcJwrHtPKd?wL=6_DS}?mj3)6cQqMG!Qv{9+hj549HN`^V4Z|pUh z@k6B*V+x|swmFS;VfJ&ViMOqDVGptY-=fTYoFPu4~5gr&# zb3}xlouDb=6&@U;;RV`m)$Bzyp>59R4?Dh|9%xBAPE>f90Ll$i9>?mj(C?6uo{B8` z?HNq(*s&fRI&?x!O?y;SRH3r68r9XcV!N=g7Y#C{IhmDN=hC@(8PQDMHgAA|J;`MC{XeMK31_Uwu7 z-MiC0`M%ZY+O?}li^zVeudhd0SsB%(0##L9w@R_id3-!SKOdbtcS3bdIf_g2pGjd+ zE(!{BL|Rr}BqT3C3t8D|NK3aOHO(US`FMUFr3E=CF3LkmF32ynid1jXKx0S{se$^2!A#>g?VD(ufo}%rd0%H#!;)r( zk=`3i2Gt`k4cP^mV)blRb}Bumh3;jd--CWPO1XX+*(u1%&p>jP63<>UMjqr81ND%(?kp!YN@zu|mdZID||=M-fky)XloY--Q^G~`znprEP{Nm&+= z$0>hMX!w}W@KHczN+HGuQk79m#JPA$q1sUeee zA93-$^N~xth8%Da$P?QD} z9W#`q!%X>nuC^!@iN!QGl%zpjlp=(;6HC*eub|(hV-`#uGlfHnxqlIigG-P)k!+_a zwJ=Vpeg>E`2+DvogVi>mys=k!W8pm8v416vud{*PHqg9rS&eC4IG=&me+8DuPAfv( z%l|+2{sTU);%pm-Wiaktz4x-x7HzNEqAl88X;-~>$*PuZxyjweHa5Kn2ni4%gaDx? zv`|8a(7O%py@Pwfl#Ffnu$<*zf#p93fd6;o=K%5xC6teUBtHjmUnmTW zt65u~elrCN3;SINoc}ZVS%CaP`4KEl@hpzcvs2m}nJOq|& zF0U6L`GsJ)>2m4=%j^CQEN26sN54IV-3Rw#+nyc5z$a6&2ylG&&i{br|B?UKh@fG) zE#L?CYy%s7Jo@bk>^^%2r%wYv9HBqVzrFo^VDnbsz(L@Hr*WdigY7yUaP@D1za9WS z+6!!a18>f*!Ur}d@T-UL{T2$#R3fvR@c}KezgfA2p8pCscmyX;9l^O{pU@iSU3%^> z*tBjA{xG*4phXf+9K|=(QNKHR94B^f!>KRd$M+jv2R{D`@aglE7P;@!^*cXOr2O@b zVS1FUXDM&HD6i{*PbiE@jUx%^z`f4`Z*2nhQGO0?A1=$*kI3DFQ-_b?;JKrqR{}Ur z<=}@Puow51pYU`@*TUjo;U9K*=L{Ni!auT-(P)oNKmru+qXvy zN{0>|pn>Q(rF#Nje|=coXG5STPMxHzo)H7nNy@;9uaD#SSI2}LJ^Yp6KRM-${3)$n$f!P_2$ zK4=l3N=bW};4m}?Y%m6G;z*#(t%by)95w)FVJ+~yVUFR_T9OcNOcg+RDlOQO&6&t`$|3V8kz&k1oH~W_kb+oUn&3f>)TLvrGzR{e^%%N+ zE!tPl#L_!1hpVR?sYUrv&_Y^K&qmpt!k~`1CkSaBm9?t`w!U&f2ayxhqiALgRz7sS z;3?1QG$FZO4b1>eq?gc#b4CEB-V#)-=tORf8I>!i!_ehLUcCk80b1bC^uaRd$3vT+ z!GoVaiKlnIg4%V{!3Gl<^khSe>HT)(FAhSvtXu%*Y}MVix*l263y{%b5P+p+egKxm zrEs!!cM9uRQ4Pz23Rvb8XIPy8{01GWa?IC~7Je$6Hkf zoiO^z8s@BBuF$H5pN1AKGPP1@ooD3cAR#RU;jz(ziiLr42F+QMoB?wd2Fyd63kY9+`JTfi{QSs4;PKZHFVl3j4B8&PkA7L%-u0|P+y^ntQ9JbM*^ZWOo#PnKL(!!aUevnWKCP$7(*!VDvil2Z>QYItIt;V>#7(^N} z5TQ*&q9vEcggC^~SP-5YhiG{c+zKE`wZOGJR zV2UIH>24{QA}6ClD~$9?TkS%-T-D`*ae&I#TO>{b_!rP5w#kLjDHBoMU4uuT{ykQ# zo{w}&Zwh^fH5EE~r`1TV&4+PbF*2+2;harv+~q({oeBotu;?%&tyV^DL}TS(F}#C8 z6m|IoMHHXf`GH2_Z@)c;U*B^JE=jxu(WV5L+Z>S9XsGQeT!RLZHhTBE&5(96*s4P| z-|MDDB#k{Ymi6Q1zdnyVT@Lc>G66VB11jj73LvS-M^23rs_9n9It<8aQ6i^Jjoel> zr0sg-HmJmXQ+FXs=F?bF=Rk&8f_t904_|+G1nII2Yx)6saY%EPp*M8vDJ#3GhA zGr8`W1}jZX@0ctZ>55dy47rF+jeyH<#Y?X~gQuT;1fxcUK}pX|i5P|01HPBb-psJ?vfS$>x_gG2wtf5?G9wNn336Dfb=FKG8zm>FQay;u|QL1 z#GG~W@Z4KZiOu;3et!%8^z=RG=&wM}{5q_@c^;PBFo2F_)mV1xY%INPSeD;5h}FNG zkIR0!0PAjBh|6wUjP4aJSaZh;-1^Xsxc;82am&3o;xBJMkLO=~4maI?Bc6Nxd34X~ z!zIz9A@!=@?kPb*w+D&EStQxewK_0C5sjkhK{U>9MLvDU@BYJ`c<|wSXu)#;&p-bd zZn)_({OYc2vHF_%xaGH3;)dU@!L5&8gRAdeiOX+WhP5{@#?`m4#LVSwxb^-kF|e{7 z*ZgJ`mR>iARlgX*HFvDS;EEpHe8-je;B%U9QvV+u?1s`PMOf^`@KKpv3uv)U-$Wg~ zGfCYBWDgd?#2Rl)ilJWUg?ho?YnE%51O@$>dEws-d|t>|u3YMcatRxYD-%ZEjI_|? z4Lhb`=`1%2&GLS?3cl%XObh0s?AjR^c=Rebuj;_XrfI0{Dug|IEat0X@LRhCe~`xG z>5OQ6pv=WCuM@9p6?lr~$amV*xToHa-}cuan0yK9b0^`i*UrYPG?xFtm5#@?;dtE~ zjpt>f@s=?hA39U$*=W3LOu-XHGR$kWpnG)#65VNNp|SjO8fUL?CF3u}QoLBEMtNKq zmebhvN1F+6IxKk9n2kT^bMSnD1AjEza6gTIcNx;~wn>UjRt4VEr{V>D3?8>cKpURPRb#!%jQ5RscvTmVw+-=l-;hG_=iqal8avbl_()cWXSLP1-`Ro7 z+%@Pl*-=Mxmm04dW}gpIiy11J1m>7&xUZ%HeHqE9a$8YY;(}JM5hphp2-oQ}LX({7 z4;^+ZCQqJ-bei*&mC-n2Ho{JR9M0?Y2*8~EYisLKSJ!Y}7&H$7=#7od0xah+K3_44 zihL+32@2qx!E&qBiqb$(XtXm(&fqu$;tY;6V9o$}TWhlb%xi0^#5Ma@RhEnE`nnoa zR8$D?I}iv^+$E^4t`@G3%H7=DEbg(?)zt~9si_eld2w;E2qWU4IQb;2$Kw+8j$BTs z(;>=PL1_j8#T4Er?pb-mfLzwLXW+iRx(cmZZ_xs%BPtTNWQ z2>OKfI)nU`Bn}R%d|#vYA@aU(D1! zZp!0uIzfMtNXuDh70)o}&06)WiC^7N1z$1cn}qA9IN%p`#n)U8htn?V%3b6VK)=&n z2#3Q4o5Ko=#U%P3YtNUI(_Ea&@Ai9ywm)B2R#%{PdYd?Lz+w2rL3KmT`4b167MGXv z!W#Dsz;m8T%Bii&sQi@y;WA)vciRLo&#u#3NNG_$Q+O`7)ovaxH`N8#3*YBBnQn-~ zb3AqtRWq^<$8+eb70eE zT5B8z4!j3^{Wfsu9ib_W4_>46jsW{k;`Hv5`0A@~aDrJxXi@&vw+C_Zn?3mEG{tv( zA8>@8KXihG+^-nm-j4U@tiz@mt8j3|9Go5~0}Pos5;Ya5?8TYBHQ2RiHNKcT3rB}~ zaB$H~e6s2)Y<&84Y&&)WTfY4kr%s&3w`bV2+DYuC7x}>HFQ`69Zn+CDWts4rApm@| z2{?U(LL9^X;|Hk%PvG0bl;=|=WzD;UVQcO3)p+xP55~3AYPp}fL+&Kio^3e@lAIXKnuk0XwrG2e?B&M&&9#z zt8r@OQhePMz-~S!tH}XqGKHnf@WY&iIN3W7-!HiW8)q%Wd&}11+Ydek&d?J5BvY=O z!O2s@VEMPl&j>kt;tb{I0PgbqJy`zVrD6H>^N$2)IRoUocI`NC=#vMkkRNN8^KXuW z{h6+XfAhVKn>S(0Hr7htC1m^79oV*UE4F;G8JoV`j4w8RiH|pYicR~sVdIhQ_=5W5 z%xi~m_v;Vg51&4ZTVMS>u6gb*T=w`aSoO$FSWUtPVHVxB7ISY|j+xgjM$3vml=M}j zxVsW%eKl}4`CzG}No`Y!IEtqw(Fd7+r2s0Q5xKPBW-ag-MKZE&3IU?07;*%F&R|QV zED=%iB!o>06NZZ7rD=%DNf2P===jMPlQb2RXkp6Xrb=QlO%jdpoM;LYBP5z6E+-Z- z?4K8jNM#&il<|m^(|uViBBe2yniYn>ovCZOCtOLf`3!rmYC3-XJ8k1;_~MVDBx%!aLXD-Zvh@umAD@mj3oi zVU#Sp-3;{%reP_EW(F>w_eDWvEynPWYvx;GyH_T72TT(8-@`N4>^bD3StAKM|v*3_UZqy>Mwhfk{ zG8C++f@Ni;(Bfs97X4rV4oYK^Jsq~005l}iqQiwm#6}9xJOr4BG|kz)5IE=Gp=$=uLt*%tknnZrdDb## zpj@HJhsLOd&a4+M1Lv$gE3;}aE+rgsstlC%HsHDke~CY@e_a@4+KuD5{e}BQ{pFPD zkW*#f&_&D42|XJT?9_0PCbNGX&c z!6iXzsR~J@)UWGJ$ZfVj(QbvT)dESQ0h&%Hv~4a(iq%4U`S#!c5- zC&5f@Ry4mBvOa2$&S9gzTKb*aWni)<3>Z@8Q|IHp6v-N16-Hu0|e-wvKeT7LeQy|qV5u25abiJJFI~Q4YHKLR> zPRmmSKWrw|yV91ATwM;L(jt(VpN8`K63m#>g=?D#NXaUm~gf~4FCMYA1=WeRBey~0Rsas_=mN)<@=%iwG;LX12X!Dc_c*z+kCty_S} zsZ$ZJN&)k9NmS=*rXK1mgpuNsS87n&R|b_cA63mISbOzyv~@SY zUR;1N5o74vWrnrOLt$Oe_qm|!bwWeGHNAyU(>SZ2;YM7E1ky&Mumxe5?u4nm5P`Xs z)St5P@&3<*Rym*cdj5?U5vNEICn6a9)z0uCwONm`MU>Zm2htj}qMxPubD^&*fZVIV z@1MILC%^j&PrvXe_8i>?lTU@QDI<|;NkoD<7Dbf4ra_7PdIjXQGzQnw7)IsQ*Xv-e zGYT=)>!B)>!%(3`L6u2tNId%dLwNkT$MD|z_i=#cP}%xi!N*%Omlll8Hn?UMV~RBz zlWnm`3gjWyBSBzZgV-Q%n$w1~{8SW|yK(fye(XEA4S_0`pk_%{$3WuBM1+pUOJ_VJ zrMb{m8KCgxBR`--SbP|C)mn^9zZgy$1C^yRm}|7q1Qg=rLyjp8uYdd^PW|u|-v9Is z=v``z&7O>sg^ehf6@;wE0X=>9WJAM1ckX;A)Juz@UF?TyK8;ng3!xaKI$2mOfO6I> zXQS8u%)lpu<+`DA*skqFTBi{jUoN^T&BDOvbej~ND_Swq6ob*)7(s0{)}4&W-b5_8 zdoGH7X}HNH!!uNWpW0|{o}YpDR5^GsIRd|;dC3Db|Cv+mgG!Z!rZyVW&GfA?B*R;- zf;?v=$~6-(LpBoE>nG!F8XF!}O~T98Bs`Tj8Gkip;0^i)d$Px&hrZY0hG?w4b2&1m zg<+0<8Xm96$1iQk2vR)#UMYUx62Of#hq{N_cy9JIES2VO0Fj)VOky3#%(L@pwTRJ~HOuBXtIzbLQc? zz5>jp`tE8oU`bGoKiUj<%c95IK?|O)*5KDI3asgtV{n!h4MP^#FLgn^wg~!be9&Lv zLBU!Nn&!E21I+;+(dzNC$$@99DzK!l7@oN{YM(;nUq;`Nd3IO_3SgU8h+6s{tnnN1 zTelI91`Qap#lX}MjjYZj>f2Imf9p?J8Wo2JQnT@hJQ)w>N8%5fX?Q{xjTh+~@S#bE z52Z@HmS@7F>QdZlslkx77)=HXY7IJ6I~}NCkhrAD)`JZ7+1P{*(o7a`#D zpoGfJV7a%*DFAbR)=qIS0L`E>gV9A4j`PG|IhT)x%XU7WB<#m!<+^6!`s45nqVrrd zL^E?9EDutfkT6A0PhU4WnGe6AR`f$J<%fZCj+ZxUI1cW^yg^XICje+o%Vl8z+~%-Q zn;EHJTZQm7YrOlYj##su?-`65QD!6^J zX?dv5ODVt9r`UCQi|9VJO%c=Tcm)+uZBreJsSk2^JGU*BlfxAi`_a_VhNiCRXzl8P zvxMrVstQ5s&-JaX=$|)Nyt~yc&8TT=5^imCGkwdOP|h1f)R)`4x-l>~2YvkmsA*_K zcTXQGYwO_l`Qh~WVE542pC{B_#?f>HN#-J@mkhQu0IcC|D1%t@BeLKpqzp6e}{%e827xX zNzkyc_A=A3IF{7n3mm}Julxq))inYvXJN2BME@dy^2@9LC0MSxn$r0v@^b+Bh4OO% z_=O_!@K5BY;P^ii2FL%q^0NT>h4Lf#&3%JGa+VN49sBC52&sb{e)yrTC*xif3t}h^q(ip&=G;#g4#Hs|sK0 z%vhfz!O7H7IGZ>Er_>UBE|K63i4>n%%=lQEg%8ssv5^+_>*cBVfF`KVF@?+TUl`^) zr=<7pI*j8dkKy!*!@!Y!z*l=HkNX9ve&*;I^8XsAk9`ar`Ut=E*5V;+0KazS;8ELD zd?^XTQAq?oOv=H#3KyO;*zqTo44Y|z{G~>Yzsfz>zvdqNaDt-yfzms84mfZON6#I> z{_l3-=*dl#)^^~g-{Q;MB5blY0`G63aC>nIXT@&V{=`M>h)){JszWgg@a(;8fQ%Q_6M9l~X|Uxn-Mxf%C8{Qw?%;ZgkVnFsOw`!C_0%^%?9kKV*z zK6o8(u73|Ny#E@0|NLXP?UB2&?#^qm*f&3{43$~IVLmXZWun-#?L z8wYX!Cr{uHA3cFzzIYctII{t-9sfvxZ*1hO@i#+=Y*AxUyV7|T)Ygun zIwS;@ND69T>JA{XAQOpBso-V2I4>NkPHMY>64(}0!?myu@j(S*e0i|+2aw>GVTv^s zy6HuT^-IOQq9u(&V_i!9j!zLNXZwGm4elnFX;zqSr3mUF|9OL+EDVz8FYpLqf9CsT zsuiYSVGZ>VS28tV)`&I<^z{9x{^6r$y?#QYc%^F!gvKYcM0QfF`E3HYCy* zvG&F_ICJ(WeQ?fV($q1CPLGDXSWoTYr*an|yU&fBZU++TRDv6s>oTF4`Wn@_X=xdx zeKu-a7pwzCs2r-HyiP!_E)DO0_zJ!`u@Bc=cd6Jgw06?MeI~U-8@*c{1;}mHLN(KY z>~146yUoa*VHc-Kc&r(xjKVLUybH&1g5<1e^93)duf7Dg-gCRyM2gEyMtZ&kNh%2< zrD;O5Jkzd3woQq2g9LHX1aZ12N0*5NNencOd{})(l+_g@H9MZhl1a!_vknBf-O{JasF+yA!{8Z3OOf^7jr26AAWT?{Y1+tPXi zGRhQKNZ-+K=^yYtrp8Pa{H_thf9J?Ojfojk5UWpyZMqxU77H>f<&d`OgaK1YqZWD1dgN1?)NRzSTI|p? znP8o6qx#H;zD5UasS0`49GZ_E#?kMN()?p14xTPddLkjD%ojV^NY)I<6YMxK@pD`R}3ICkS9(j80S!Z zwHaaV_QKRg<4mI+7v)W)d|5G8H3h*%Rj~EAP%<}wEN?b)izLv|7`X0sdZ(xz-umQK z$gEO~NF9r^6nr`5figV zVpL2RA``=K+3H3VBy#bsBN)f=IV9?S5(2frW$3dD$p>`hrvz<*3$gux)wiH^_8N2RVloyy{MjT zLsxGB7WO!?h~9-+G;Vh<@S~lcsiWTk8r$4UN?=`G4(nwVuu}V&7P+Cn)Q6HwOEEzG zeu(O1VMh_>4ppLXkqe5&R@hef5Li);qM07pI&E-K-2MR{ylqz0cGyv0P2V)l$7SSu@aCkc&AcJ=QoKSZvF~BC7v6J|B9#K{U8L zsBu`)QfNby-zz}1hUuNip}9ddt(op3zw4|8XtJ467VrunkTqx-_+$VyP*EbT8`~Oi z$+(diJ82ARn`&Sv&j^ z+A}cjBVm_;NDGyXfk+0(8L;&Fed5|zOl?PbWxzaG!QA2%0%WhPuM>V{l69 z1KQ;QlvS4x1N%SLGmD4nny=aAGCG`vlov{a%SB;X_#O-U7m~OrZcCvZ`T{fTyz#)G zF|`MC%~#dcqPe|Iv~bBjKW}*OW>Dyw zH$7Ohy@1kW;GV&JF877ud2{5#I%92jE$DntxVz^)V0ztTabl+br`XvL{ zod5Fb8WGm+8ZI-tEN+h~ zOLxMurdDW`hqTKXC};W?25?pDs{SQd{?q$Em7fF1FO;7H$p1U?Q$YNuqT;eq*+T|9 z*^fc)khVE%n*THTFW~r3+1dsSZ-L`cpfZYkG%pc z|Br#s|H%I>5{8XT!@^+sUf|Hd^P1)7PSP6ctJAd3CV!?KVgBoVJAu!i0cMtBcTP6& zYc?$T7O?4g;OSfOnllHlYSZztN{UaC({W6mixVjq|T`)VyVSPJpiY$-m? z&ct@L6dM#-c#|gHAJU-zfV=>BVFR$4(mh1-%~_m2eHh=IItUykVP5WohsixEs7216 zI*e~me*~QP9Eb0J0(k0WeDfE|)03BBqiP}!%i@7G*8+Dx1w8g=;2yen$7MiEIlj!a z>q&#DZVFP#fgtT!^zXfuzed zMWW4wRG$s0NrGIn1Ucp$sJ&V!U2KrXjH>P$ly}mkzr7qYme0g5e*X)28@-6nPZV0` zqmw2HtMa2LZ>%X9tiT6sN>+?cAo5IcZ2*aLJo0PC#*&_JMb;~P-e?&zd3Rl#@ zv$}~Ub1hKJriC6Yl9_AIKBr3XF0;0LpuYzG&NBGhOW~+-LQC}|cgP^KOOa!hAWNSq z3<)s>OS&W*aVbdxG-r^U`N;*<%E*fZKlzwR69kAJlawHM%$b%YN16wnP6vfdj`Y+t zL`6hm)EIi^qA-Mwp=ZJ;x#LeuQQOH71SZW&I)^P5Z1mRy$dCnW=%)D zPm0_+3&vZL5LYaRWp){q(`m6w?Ir7^#pNtN%yUX1X)S=Vr--hD0w@o6=fFU5#rqV) zls?pNM#*B}o>K?&K&c4l9IC}sSEc~O3kJ(E#gUGQ))c5Z-NT)YFjWiKf0(PBje9DGii97FdcGg(IetOGBDB-l zASi2r&l?8Kwev~@h{!Z7448*0C&DyXA~eeSqN>116k#2=o;*>Ho9?f%q8&GcYq|}&Gn~liDiE6b44S968=#{)Rrfexn?Z}m9zW7d zDZ+^I;iKDd?(894e)STBMTBADua>~x^9M3Qx^Nd26=LMmr zab>(b3O$$3pfA#C>^Zd`IYoMm$caQ?aR+3rE=W5`C|~*W1Hw3Pa<3Wkg+8RsD1da1 zi}L4zY`_5{Yg{`|-7)rI*(&D!#WIb?6jQrbSLdjv^a*dKpqxIfzzfV6q|w zI_Af&upzCo0O}cKNNg}dPW7l8;u8vGG=ADpI6DYej}McxC!)B)iHa6KuDta!!C5{b za~k}8wXpS<3T<>jztTnR+i8GemJ{+minqs3by5uvec$+`LTO7eKL;$?|OY zx@uvf_fIy{3rU{~*?msr&MJa*(1%=VM+u)0=q?z3uc$3;iz~&u&a_JmmdpKW^bB+f zngJ=z#n{;O_`E1;ZyIw~w~7-UiEUcsQJz@iJ%y=zy4_IM8KJ2#Al;OOhhKOCe|qiD z2+xj(!mmfzv@rPR)*`>v1`~}Zd2B$s(r%pwi}UJEf*T^6I`jNUDplw zKskzg%ISNainf6^VJMF`733Bf#-&X_Ips@MuM?*d_>_W{#tI#^5tmoh=EQ`8#NiDc zODu{OSHVQ%lb*)K`c*B6(#ODDZKChA90QBH@aBhqfsN)87iEoumF6Birs!#WDO}qC z+vW8r|J49$?w$?JvJzNURR}7UlnxD2JM>~qGp(!?Cs+7g<7>rIKk}E;7`4a;(_%j~ zD*{lhV9J&<=oVGLesvoXYG}+3$S}LniB%;QIAcabX-+|^Egjj`3>d2|u+kWtTd&9T zRh`J!Cc&dfgp20E*|MpamUaoM>)f!GS}@i{-;U)?NNuqpv(gA(Zw(^y;$f@y;_`cM z#2-HWGuAzGJ8paT_gM4P4e$Mn%kPsaE{8Img8u=F%z=5=c@c-3+Q z2AgO+qH-^)gnvy3YOk7siS|@@)=h`@+D<60X+<8>wymlY??&zXYBbXvuV!HbEDV&a zD@DmNKkBIdDo8wwhPCt!%cxzJ)xf>Hf#w|zu&=5|;hIJiT}DFhgpIx-x+TSMTw0Fu zg+T-dJn#*=D0~UB7g?dW)C=!&>RWS4=$-bUgxb4=Pg1p8A*J_AJz#^hRswsw4yv+T z$g6coZgAlb+df66-iQK+OK?k@=-qetS;O0mfWwJep9kfo2Glgzzy_jO6PLNMo2x6( z(@=$;wgyzUH=~sNlW0C;7&RI<7uYeFnt^(Y0cB-g7))B|1%I^zx&ochn$?&!f)|?m zK7-}0-K~P^f~h1}yO!xB1Z_u&R{+thRa;S0D-3IvRaFa@0dsa4=w&d`WVJ!5)lhgJ zs_W}eT3IE)Yz8p3dKHz)0S1nl7K1f|nOdZ|wE?W3 zL0OjoZ2iH2(A;GZ(pX>-`QbEd&O*vZjQ}xOI6o{GUNdOUATK}5;3fm+fy#2Yi|M^~ zI|YbqvRj3p-BT!(C0KKq4WqIaIs>c>wlbK?;4_1(g+&Y?yToty7xXC<7X!EqPP_aR z#_OW^9YTAVHNF|7<@*e%7C0T0ZlMqcS-DObAZCN83<@()?JxCFT+Z_w7rcqVlq%d# ze9dC>*q}A*MZP`URt$_&z68Kb`L`4D9j=3O?DuZ4)|O!1c@Z zz;W<%+$Q`i$Hi%ITI|Q^FmPYsuv6Z--wgM82F?9JYAX`n6yi+|emA(kv$i*b=_O?h zSW_N~e5kEy#PrTy_`TGoz94$LXCO8v5hKDz;^K=&Va2?>Ga zp?m*K&V$_lKv+XP1eAxgz8TCG_bDF?l(PtpclNucP6&hL+Ute^bKUjBv?IoKb%KV4 z?OJWdSGe}Idtg~hVg3hTx$=tYe=0u*kY6Z22Y_EFAu#zL%inb70 zuw(xYY}vV0P_S&-wpp+a?A);pdw1^{2FrhR831RnJS0B_$A2n62asPV{{hSYBmb_1 zVe_Z>1x;qK=Kye+xuL(o!Bb~|V?O`~PY=_HoH>E-4jmh&RoVUuPRyytMu{2t^^?G+ zO~9^?ffJj7^=|?ne+m3`J@DL%!0I7vR89ki>Va2Z06wR%Z+$}d-v>T<1^A5QjhBH> zKLZ6&$4Br#9jA_nUF-+%|l3{NOO}_*ayVtve|_%G(jj+mVkb9HqVY z1m*u61n2m!*RVb#24^%T;03zB=_Ig|!gKz&JOwPN!$%4m&aC_uaP({J|Nbz(`t~r+ zo~Ck(wCVr%^yAzH;J4S~3%LSss>>*EbpPAoAiEFj#JAs_#xB+@|KWRzXFIlEz7X$d zv^cwT4RGi3zlF-O z3*Vig->lhwl*3@(WyH-0>(q(xv_Rve~gl4QptT#|@sxe1t@6N#!B zwZdqrxzdb=xlQO?)PttM>F8TB7XvF7qie}L%)V?X+7`}4!<-(pESib>dEF>%DupU& zgLis0T2~C9{nA-zUe=H1<-G{bsuw_X%hDe7uNy?evgv5Lc2I0O*`j-w`maHLUp&W6u!0XurH{EcTo$_uAWXRKzsmOptodc;sDi-N^200W4HHj8VnmDV>2FUdqq~+xxJRufircOfG zsEZLcmL{Z=#tY%!7f%?A=#)gLY4N9%$zjTq!;q5)MS3Pu6O%B7+Unw{X$Xs)jIi-z z5H^k`xs#`0?6hclHXLCWkH^UIk%&ylKzMv2B9h}VEg>FJOtB)#Ml`t*adAjVOGSKa z0%9Yh5I$)dO_-V9WfH|R8RO%kF*Pw32`SuHG9j1Cq0*?K(W!?u$8`$G4f&9n@&)*s zYREynE?w}}C)#t6N$n!3GQv8$0%^23moyc?JgXFn4kxnfOi)kvfce9<-ChA&r&eg7 z>U3giVTPcJa4(`s&kR3g?FB;9nzhRnoi;e;RtO`m%v&#SvLT|7`gNNNSv3|&Tb#(D zh5a<9BxrWRJXl5HXpu{9I`fhjW{UJutF#!Yj}de$V;xC?^H@Kx6o#R4LA#=!Um|#T zLq<87pPUVKvM^X1x)yxoKl)!NLc?7Ab_;-;!EAnppACWSA+S8Rmo>!$;^?M!Rxw6d z;^1Cd58GfFBK$dmqD8wXAV7Q83{~_w1)YL%ZYi`gy(E6IiQt)61y`RRZYuXZkNpyF zzWWs3e&;!K^|oVj#FXI;mXTpd%1uFZW(>y0PC!If6sBeK2HZ5kV?HKf3NDHoPvc7> z!lsPD)Rb66CPyQR#)yWdTKxLXUt;|Dv5+aG=i{3gHx-w}PDJaH88n_Pz<6Z>lDza@ z&^u}9E`g%i0d1!Tc{L{3drDw$^TAYUMXWRy{<58TY{s!~4&&u_UxcpMgo~2L zLf=p*3{2Y+->cFI!$wIR(W&_I-WN2xO*2^KKv0p;tNW3%w2A2U- zV<+L>-`znI=EI1mu{tv?9x{0rvSsPW(qtk$HwM#GiBM5q$LJEMtcB3`7mHIl3hFDF zU3SO^{YYyu34@Qm{!)yJ9w|7+t84wZ_4eyv@aPdXISkh6rSyIVV3}8fX@OLsh0mPU zLTjG-w7kOt_nb0X5*`yL70O$KRPU!TxNJ~t&PHU!!QWLQPH-gFDxsf4&$gL{+p)t4 z^XfWe%q&FKY--=3Vx)H$KuclxM1{V^CIHqnHTBh)X-KE>N@LZDZ(oW-O8uz_HhM=4 zORAut{H1nT#0e077c}iISUbFs`qVH4EMk+`R_qwwR5oTKEcPOlEo_3kk)G*tAhliv zNw)=AokkdV)2rVKGt-px7eF)HDX5lsLyK)Cu;I?Bxe-XDzNycB1&sHjUyzwr9o(y zFjsj1n#IEaxtiKLe-VvU%u&AB2hAcM3=2!>+gJh>g;y*KB7b?g;GE?XSUTPu^5&tN zzPoD!b_7x*XfBe9sfuWXC0v3`w+uDQ+mPtVLGRTwF-xpIZpzA~u7ZI9h9 zjE0ZNk3s43PH5Xbg5Ig9uM87qk(hJcA|#sAQ8>LAwM$#kbScfRW|tw{5Q}m0Y3RRZ z4zi0Bm_qOItg9CwMwf&YcVCW+<>45ojfJY#fEax=3LEIXb!VV-Q4J=TV^O}M8S;9X z!>s8-xH%QkRtXYaDukPIFin$z(KJ?0pmvV7Wn+SY#>eE5=)H9@Mo?V-%ezo?eIFD{ z%3)%=CQB;eSX55)y;}Gve%GQZL1n{r&-7146s~Al1zbxjQ9%9$bZw{kh+}aT980SO za2^u-!ZHz;b!i3NtAu-DIXpvUaLo_Gx*#ChLr?Ed0lhm8?hkVUa1K&BvjW0CLvBMp zRP9>mJM_q}kwM?6N4i%cxPu>k|3zr+23QJ6%sLblXa!wYp@ZISmt9b4C=E&!28vKp zSA!zf*e)#-KyhVD9g6CL&;^{BHE$+T!or{;`CU;hmgk#LVPz221f$ge8^y&MxqJf6 zTwoGlFoTW!{g^;=o?vCE02&!=WtYP%?)U2Yejc&7dpG9(>JSLgys7JNG4(0m!_6R%$YYRz)wzx^HSefCn!-E=wv?z zJ2^Z*&wd=1fldZFIUL8$ehij!K6oR6!!i)cE(?bZ0lW;rGN{V{E(5g;2wR=>%_+2^ zq#_6>1I;CFD5;K^ui9ug!elcFgPDOcAJ{l%d0iRYr5+kP>?p0FxF~#O74yC8P{e%S zJ|`O6>S6KF*i%XQXefh;+tp$afH`aK>*#lBT_uXjis36Q7WriQnX=M=pm1U86z01& z6q*pMFNeFlNEo){G?g^pldAKewP;{;nxJ=?P*fX$HArJFiKE0NP7N?cOJyK{GC$2n zm^y~qkZDsw+T_f&&YbH3s*9S6azTm1!hkZ@dw}YrqOJ=5GS*OMO>5Tb<_&`&)pfaW z*)Ig7GYHGqp>QmrYrbDzT_yZ@qkx}fKL*r8pm=M08?}Ff5cXqw9ro|)=@!!7*+K2y zDEymSTf{Z@w@QkaPY&?&9Iwe@7J$9cY@&Y7lq|eSFr3d2z|ZC3GI0D1hVygm7XtqI z9-m0ye$M^{Hr8Tyi~H=y_c?mn_5Fx%1J{*@c#tHu2o_t{#jYGfspbanVR> zTQ)pfElzqcb&tO|AgFwpD#_=k_lfQ^kZ*T5#YUDmvEZU|GLTR8VRu^vjcCcDR+L^p zAdD&+u4+O7iS6npIQX{!K$)haP5{|#?31P78oEbfy|($hgsyGZwFtQ|3}1&d$XP-F z`h`?3)*D*kxVc04=PoNo%3KGs7t{B49gX8R(0Y-cyAUilUtK38q+zbPx<+WhGdOFx zq5+OI&0;S9Irig+r^M&**7lspB=09WLGepA@;w;zDvzp7Pjn_7!kmglv;PVsg#M<9o zhdHa~;`rIGvHz>R*t>rh_Uzj&Xjpdd-i=+mc9HB6?(Us?uxHoq3wX?#qGiY50pmX> zY%?z;e*?%byuS|z4;~ch@oxr2&z?Ptm1D}w*`3lK9z>BW}Pdx#A^d|7ulN9zP9Q|kyXf;XklDq3&ypx)M z9ZECs#s-0Ie@#hzf1Lj8c^qd}2Jnu?23&O?m{w)~x!ok&aq2YPXXBf!K>qDPe0PxI zzhyB#&CkZiMQyG9yA&VW%{aYu1;zUf zPJKgJI(!)C_V35>{U>jG{IE>@x z_Tc-|n}KgW$F~pNhOG%Y?8){~{e6wor;g#!X^P|A85}ut4#!S@gA?cFtN_JNoj!-t zXTHI4YRe0S(-HT71j~Qp*HQg`N^L((t-g2Lm)N)CV|=mmOMJO|Gj{Cy0=st%bC+-1 zz8gEXZ^e$CTZX~%J=^j1?malNeGd+7=K*aOcI?@W?R$4()9!89xP3D=ZynYo-?r%s z?AZDxwr``jNH%ZTFbtOO`~vF*SiTV(DIEsOw``(xH*Ld?&D#Yy|LGT>;gfCavEi%j zc<<1cXk61r3%xcJFKa>7+AaiFwxWDx2imWjgE_aaME|u5P%=;rB`qqmty1I|@{q00 zMmB@3(oEz@v!IYmkgv>xEMEeNobHi-mW+hjI!l#@atf^CwGG+|YCr?6dGA;bG z5)hs|6=Bn8f)su+M#hd4K-wshajDUmCQU_xJ_jl090d9*P(8Z}-IsP@*)Nu1(Y4Dk zd({HWU%L_uFTV`Sue}P_+;KY|d-VmpzkMS<-Mbwh?cRhZ-h2^7&E@#>hp%Gk&12kyRq*6>#+3R%dz^w>#*^=UD$ehD?Zut2_AUialEEXwxOuE7S@Jh=mU1B3iXhi z@*&sCpwh~r)X0SJCWT6$FE%+?6ujYK)CjOV->4ISIlFlpCDNs|7|%)PW zo)&`%QOOuJC63~of{Vvbr1&Oa#Q1TzXwn3Xjta-<@Ts_D(nL(0GzH_wPQaA$lMy*N z95GR`NK8sWa!xjqDUEcM0vek1^D$x8sM6CyOJ&eNs*@v^%ATdm6UGQL3UZO-RU)rK z4{5yxc}-SGT5XWD*^xJW*bpDPvaUkpv=s=x;R0IF=d~0d(wmK(MiVmY^qA((KzvXJ zGcEKB7gRw$y%4^YjYzCiz_+{}g+mp{snx^S>qTCj8M(D4Sb779^Ge~IM-!ipB24p1 zp`A&K#0B+mQ-ARcHDR1C9#O6wRITntv^N(Q>!O9B*s0zeB-d#LkZ4|91?_?|q4mw0 zu5yyR*`B|F+&=>0e9eYELw@Z3GttiX2^ls9${@KHO1@rDB80(k2Fv;ACiCG>bPfYz z%)vj+n`v+>@xVuXzeLl?c*>koZ_m)5_EdtZ7GV{)fK-ROXt!fLvGP;^uM_IV)d zbHco!6v`QHpmk`GB2T6FECY#(bi|S{V4kebMFzcF5}krX1}Tl-xi&dsvSJaN5ryu7 z4*c=S2a%W<4i(d{>}Bwu+GNm$nA%*pFRO>V z*DkonE!6+&7q<&-?Yh2Np^blrCOL1ee-~rpC&SxS2{xL`G+MTW6=I`@4My^*2sWt9 zCwuaSijhn2L@tfR+`kK{U$ZgRY0|04Gi9T|X@uFT7uxev*q(+d0~UI}wG=LQz=M?O z1u(6kh2*T^{$lPehI>W@QVJvj94~7rN9UaB$S>3&$00{p(rA<~Y8JK-lB($2ILNd* z)OT97$m*nY`b^Nwwn5%!M0U3xDLn-=76ec*R1MecN+cT7kZa6>OqYq8)*yT}E{ux3 z1o8S5af+a1aTC0Y8-<+&rW{fAyD`$gEJK`HBG~7s*h*unlQ$B_zcr zq&ihd^J&E9Q`x*`SXw+#R~MjUum)CY>$)rZ5T=?8+og2~-q;JrI%<>4>ZpFo;kdLK zMe7>jTHAoaHFbh6$iAwE<`wnuke}zWM&TB&tbu!V9Xx9q;G!^v%c@{oRv}#Hr8TfE zW}uwnTUsgng-h>_brJQ6g+bUCmD9JQl-{p0;WDsp8w!d|E(^U+x-K(xG*0C=>mY5= z!QA5!-)Td&gXT^5Ay+4bLL-MxOY=p&4i=MHP=J^n^jfVMM;KuN@NlJ{U>vch_T?+KPZh1FbzDCYwQM7c*rA^O7?sIbSotdJokdvE@l(b}wrTG=d+cCXeq{9F>gYd)r=);=Z43;zK&BA~<(_=8;&c8YToKFtV z!eLn>n89|w=D0)gad-wY8Qf$bQ)mj?=p7-KHwKtvn!$1gg+s<2b#?>16@C;~m!P_d z<|Jk%yg?VtZWB~?wK#ocq?&LB7Yb65tu+2#9u5`f!^=Q%mK5+PE#jQWv6h*GVB&Y-9Dl!5x0R=8Sv zZ&ph%XvB{jN{u299454B5TX#`IvbonPtZSxT}<=A zkrxXJn_3FPTKRn9f=^4Zc0Qk^;CoCf#D0A0f;IUChq>R23Z_M(cdN)-NZ(==N|v-B zaD5*bC}&WW0do75jc{Hu>@rx+fb!3QfTwN7#UE3o`R zFr0;fa|Y0vBc1cbzeB?JLJ|tk;B^SlW^ntb0QZHU_l1CW=(&)~@^j#L2s{q~=phNE z6#}k*3UdEw}aA$u8b(U@-qA4j$SijIJFxyaOlCd@U$aHva%@p=7^4dk&{g9}^TRCz-nC z^w&84)|pHc4(8a&l6Tn@y6L zjQs30B!4Ufm)seZGJAaBSGoVaQK|U=SROG5tDG$-Hu%u_fr^ts(A%`j>6{!hPh)J4;sElx7P%SL# zB8-R`CBXBr$s-UJJ`!QEV-S`&n#!X=vLyu*vS>mT6DGp3wtF1qF@+W?3Y!I^Vk2=8 zYe7#QixCl%5NNN%@Kt619YB1xvAt=0Rly;ONQI!lykpjzqvko^ubq8*E^i~1JT|6}m>FO*@ zOb$n~K3f=5z4@j4gmFmgvRZhr=@dW>8~WtMzj8qda=LAhbvqGU*9qtRTKEQO!8^Sg zx@r%kEpMv^phCpw-Zswa}V0P@2`lLJLNfStkH;)+lGW5Hx2H zU7}JTDmg)DlQUS(n&nKf!W0)gLA`k5WK4*PK}>okvZ#Hu8Wn7O+?XcnP6JKS^Yez& zq&CiE5S|vdSy~ekWExCPN=Hm$3KEhM1-(l+bCjnfAUZu+Xs$=c#~~$!>Nz75iac6m zs;CUK5MT{>1@)aglNK_g7I_Ax0PnIjGD<^+EIrkMS%DmzLU7Z|OHI%=J7MhcL)YgQ zfKFD2RcNqEy9&iM^UX8(&Bi(PGm8b#%fNV6y#c9JYGH&hyTJ%`Uy%UQ^SfQ*cV?p= zY8Aj?Og^QaIU#t|T z5S(+W5$?#ugo0!^=2s)Txd7t}(}XrR1E0)^%^KxQxgz+<=lTSIcOh8LZU`(7`Sb68 zCb|VwCnQYA!q>wF>niB@58g z+llcLD2)+(bbg$m6dFBk62`?&I}et3uAYbSvIHbJ^O0R{hPK^{^m45LZF8%Qu=fUF zZgz=r;)aKB!Ec_w51KL~w3TLD{fC>e=#JF_)RNSi#6}};YO%I3gWE!re84Ms>kZ`c zDFoNNN_gj0L(^!5x4#_e4heq$@gYYkGzyx&+DhBKDm(N~;ipHRxMcp)~IEk6pENoj4HsrM$pzbVyb*2x_!AeZj#tTEAzK#GS<~-c<*xh)4(|Z^h zdC4%%mM#nN>P#ePvXH9J6a3@3rhMd>BdnF!XG$%7r}`c6U*3%PIyp>y@}k#;qWP7uclaXQQ}T%{pW> zYM|}*h|Mt8FdtWtfX3@)A}n_dT7EHCY$z&PtZ2D%2GZTRxFmH9v|bfVMQYsj`(Gd; zXEH8QP847{YalD@qp(&v1L?z>7b!7#_f-g!MdA|br)@VZLRcJq^YWrG$(Vz@Di@|1@=&s%3n>93vTE#Ty=Ec8 zBoWZIm0-#5Zp2cOp*yca*ENgLxONU~{WTb)PR8^bmm#Ihgs`kB=(=U4h;#mLuSb|7 z7KQVgaqUa@|{DG^`bHgCYmo%XJrr8KAtHXF#yfBLDzP1sj%gUi#;iUz4DGDyHfa|In7*`g< zvbGGSH9;6IC0Rw|{OU4TFJqxTyrvYU6#>}Rl%a54wQx<#N}yX(1oQG?e|F6)>A4lb zzq!;N9L~7R2kY`63YJsfr1lZ+(h~Zf6+t)OEjGEtSVZ4Vwo@RCE;rbb8Z^Q`y9F

    fdYY?PV6-@3b$Hz&&g$=oPRU0%>Z>i&7ZPzGLf8`B*5@Ap1;!Emamg&j+2lSF97+d zm`DMXkEZz*8**grb9Ol%2Dlm6W`LfBf3sic9)t3nN6wd?=51V#&@-Gr2Fn>t=P*p8 z!QeUzKgS?s2n=O_lR36oF`87%h%JkUFga0aOS6+Tq8R3kP$1~vw* z19ljT3t$Y|pm1rS^O{8cTd1CORy9hhe27Ykgu!FPw2UYi%N>HsQDfJMld7rm3>1{o zm_}kOErcmZ{sP%J1|Sks(A^Pr#lQ%Nz3 zi##Z&dTD8HL}zC^nwlDf=6_>blc2x}f!GY(GLXyHA;6ja*^jlT8Kh>gmroWj02~6A zL)W4E{F}AH`8Pku@v<8Nh&kMhnFFG&IBw?JW&k?0*})r07Xsvb+A=yeMgY(Zz;l`$ zS4fMT!E%m^{TT3OH(c9lAo@aj+PK#a6FaPFy%Pw6hY$RPWmezZ;9${LW>AgL|Wl)>} zbEddq?fnpN&aQ*{coDUEF_qa@8bEbvIm&qhs@M&+TZ_QbR+L=V3kJ(sd)abT!+EgW zcEvC-{Zp{~=K%8yf$o zXJ^Rx*etI2}e-|v5ucNsEqaUd?$9DrjGpG34DViz}L^>mE|RPxX1?l;R#^x zX5jE{VB0~^1M~_Uz|rIH0uQXkJJN6*GAMz;A$&5h7@ID?4Lg=xjhzcuVcXKB*t2E` zn-|t&%Zd(cy>2aYn@}9*u<_~V@P0=Fj@Fa_!E(T6!nTx=IG~8ZE|mqxYNliN>@GYR zwBxPMAJ%iUzVEv^PVB-D z$EgjDa64?J@@%I#*;p$*dxYBL_(8$#&cOTeGsmdWPvGpyQ-bpy2lwG_uLgX&AOx20 z-?0e?cYlV>dpBY0fgRYna~LdVo^m$q$wn701j~1A+fGH=gq- zXw#CQ&PstKGl3Qv;g}dRT7c!FQZ7M+EE=&|nmFsykz~#mz(ukx8@4tlBwh((w6xI8 znTTn5QJ9hyi?C@E5Eece;}YrjLM#1e)$>LX_3{rppPd07HErT z0oN2n%U~P27WN2k^s26Ey!Gi@xb&vW(0kot_!hTA$5aTNw1}^=VcE?qv4R%2Y{)Fn zB}Ykrg#fm0eB@Td=SJgqkKc_aUU(FGw*eDUr=WO775=dPIk3?>)*jEB>qX`)CroP_ zQ2DDtVVp(Y<3diO1r;kgQAqLSm)jxtTaf3}A={jf9D^KrI=MKW%mBGkC4)wrPZMZ1 zaH)n$uN3qo`6ktmV7Wm6<1(EZQmsnJg`hbD=2;3UVrii_A#$3~EDvd!GrdaKNNR&| z~RZlJhRh^lr}SxT8u(7m_c&B$42=y z{a(mA9RegzDyQ`OeHdko5x}``8BM^rZCZ!5&pE7qwqNi`Gr-B3<aUrTafvbpqckxHlTOB19gPE1!!S`3i}D4H zh&HAmEO`{74Ak%QqmbmzMT|WYw*DZsWgb$>)iCr?U3C;f+GY`w*Gm1fpW2|)4*Q&P zu~Fa{2qG|42TPj=x*Dr6PMM@nMWTk{r?G3IJRCZDpWU;le%tME&#w}Fj{6qVukgkV z1DjD!8i!jQs9DsCiFs2|*yx6>t`He68649~gf`|VWh9()sszt{!MsWs1_LlNg-f?x zfWg`U@~1Yk&kYE%QD64VtAU}@i*eEjBpA|=tVtJ~)eJtQ>N1gT%B3+i6H%&kA$($o z-!tBnOViOkDoa?>D41$&c=)x)FfBVm7!D4$2Jq1H4~h-U`21ufs8hw*9G;&5M@In4 zDk~%<8Z@qGgOlDRQ(ut)suNpuqCe?pm!NKKH?`FmGz>P1(*#q}r=VtT6GmiAKxQ?K z1Kl1$eUw}&L&5xj&?r~Wbc=WxfU^w*5S9>zTb{ZT>+Zc8V^V3%j|xNSKn+IF@6v_M zqAwRLu7tdsPnPgTnNLVwmkrY1Va|O%$&uA#gM|F})IiztCQQ-CAl8(Ou$W5_OZAl> zFhWi3%cn_fbIU0&g+e1-&=k@0Oi9GFDv}yKUfTB_#w#N6tLN@Tq%sZ}b_pgcqA^7i zhf8GBP&8Bnb+=pOiFwkElm{85Z=`q%=F@_ISrv>kXe{frAhp9J=xccF@-C>s6je0j zUImSbNk}oI;IpF};O;3wf-?)29v@tDD$saUKQx_AOmn3ot3ij%dNm5@c}1fMf%)}_ z&?Umw z!!kw+jdRWupLm!?^SZ#SN|ev6g160!XWxAa55D;jM(U=*v7!oQrb$^?LgN;_Crg9K zU*JXdY=_|6XJO!6fagOrHZA1MJR0{FQajUJTD^RjGh4s7nBoXPy{H88#X(3Zo}8rt ziz!;_-vv1sr%6J5ksQ-+Sb(s+$%uC5 zpyRrE{<-ox>Cp$f4Buj zGi%Vr8(Na7Xj(T5lg;#=6|2y5^AbeabK#%gglLBZEmzG(L}8||Z=&gNBRPzuLgzIDn5dtMsm3Ub%O8)a+NqFLN~!NV5nq~$reAiU z>b7%#0BdjH>``DC|Kx%alVzl zB_^nP_0UW=!9ee=qQyjFfuWn)yWWc6>?Yj*m&cK#l|rt`7h1ALBh3X0Y_QlJFgXih zcG+Mm(7|rkp~P!LO~8X{j{`oM*A&_{aQjS{HMbKpTdPnNn}~&33jE4dipxAcRM0)0 zTLrV-2qVpbc#gp!H-p_w#liqHgV_w0GlfY=qnq!uTnL(nG|KrmyDSX0x3o12@R~Kp zbEOifX>P^W3Z-0VlC!YJIfL>HmfX0VgNP+^eL?-3{UcoTvtSnNf1xQbn{`5Y*q zwX4}}L4nVP@Z@l4Y5uAzGC&u!LSNw!Cx3WMRCshKtfDcxARn#@HzvkUg1goyjB*<) z3sF#4gj`#`IGr>#CkCp31^O!bp8E9S9)Ei#B~695#wY9@r7AO!WtJkdK!yaf1St+V zQXNu6sgr5`ABSXJ1|(JmvMn;C=p^D>m0-@pG<6!L=BFZp)}b--G$?FZ1gZk4X{;9X zJ6vbXs~)0aVa{?-A$_}<|J_?8K=b;#8lhFrhA?^4p|+_G6}7|K)C>@F-7&Zv0;Cx{ z4qY?g&A>7X`-OmV2A%mH1HkMu5YBDE@iAb|_uD$!(J{SK+zX|}+SjZN&U7mw;5Y=y#;Igev_T|w^wm$QFhhRElI`C%ZQ4x!F5nkhN>Wir}x+AcR@q_ zHn^-!XqFqVZWf>`gXIj87hXQ>h5%)D&2;Y{0p=G1<00@oj(jGXSe!Qw{U-T38oW2^tpGEH|tg<|=2v{6gWl|F>yaLK325VF`iV z3|yb5Mxoyq0_7Ki;UVGc3&Vt-=e7#P@zZBQ@rS~({7=Dh2E5q~J$qpseD8ls!y;Qt zbx3ik*3$hS!E(=vMryx3xbndpvGmF%0xaKqV5b1f87pEM76!}zH#EzC3X=a+{sWf( zNB&(2!@iGjWpxp-Yd^5(2ypBSP8~arA6WbN7+vESj-J?wLrjQ#oA8Fb6tCyl z@upOVk2QHXWZ=F5FJvx%;m!ez%hz$?GO`}!=rLz5-JgMO5vquXcBGPTUJ_+pt4e^DBN z>+S(|eumAr4dH!j5_aT7;D}6%J-KRpnv;U{w5UIra}iEvUX0Tj;W(j4#|PwoqRPN} zxeOm?$?=8KjL&j%ur+fE4(E=-vD^{ZpEn7g$~AaLWyLETk1-#gD~xzmst4}88QA(R zmE%_6(O&}(+yeaJHsC4B%M-r`?s^FL4IAye9r!cdd-`5r<#HTPGXWAC<#`Qo?~TBH z6!!OzP#hHg(FZ8L2Z8(P_irC1|33ncJVVdE02)oGo(|xfQ-=kA`mwXDwSEHMFfx8< zAMWy~hB?a*euv`>mQ$S{-1RZG?AeGd`?m|Qe9!ic?8$L3L`6UsJ{6|uNI2r-;7LkGQF01A2}y9$;=>Ug3wL4?9Ira+gL3RQAEIYkF~>d*dn8bXK6S)&+Hm9)s5`z@1P11`S3vS7?BP+nNGe70X0AY{;3 z(QL#oUc3{Ba0K_ga4#yRmtf4)FgRT*Y}xP@wr+R>pTGYs4WG~9vv;1r-feXK?&J9A z?MLv|%lF~KcOJopkDtNE?>>PK-~JQcc=;i0{qjxh+xa2p&TfI47Qo@*qmh~#i>Xt` z;+9))z_0GO4U@tr3(oSf5mPWBJ_=z|Mx%0O8=9BR#Kk#Lm~2c(G#hfQGC@{vMK-mS zs1sTF%v9v^k2qopSLnqXB`Y+ z@ZRN6b=xuHj%7ltyzTngs9fEFamHAoX|8IuBi56Rs+H|%yK)Ait*MAF%tT(P8c~Ks zVcfc%@-xAi00WI*f(~k^SkSN-SCk7-TsoiHU@?t-BuWz2ED!OP>wlzSF|H~nDTVpc za+p_^2?`eDiVCP19A8DUx=MiNo-13RY&XMPrbKJA3)6iDEa@zVtw@0cYBxz?2I6&* zkkVM6V2MVCe|?SQsShIRL>K&(C-@#ZK@zpRzg49AMwhlD%( z+8%_f$Kj$h>Jy1!h|*6$vNaOf?qo`<3Nmjd+7~q2~ug3{GK8XKG_TjNJ?l^20a zy}~V9Q!M;SFZCg~vWUhI4}41s;agOQ;w2P*SrLsxUX(AV@Jn6rFLsg)-}fzYz&}K? z(Ec}ffgQg2R(R)GQ8d>A@1O;)0X=Lz^qzFep>N8extRv07CF?l5-7?tA))ei(0lvB z+mFFqkOR9Z7fzbvcuaD5E%_+2sZiw7!tc_-YgM7#u0xa8hOQDfTJ2_3Xk{p~tI=5D z#6V{idP?1BN=d_FsR|2o^RcAJg@9iVgI@!OcbKo7!E)9fXTX^aA2L{;k(G`~QznAB z#zUIi45)`R&>3Xq-wafTG|d?(XCR%ml^K*~Ks=;H&NM7cyTWc}b_TK~Swica0r`tY zj=)G(LKqQ-5I1>yC(~~*kUb2Ja~>Gv7KTj8pRYsQI2I&e)sHME&F$!W!zXXz6iHBebx1a4BgaSI7fS{b-7>`4C77y8#AIm<; z+l4}FfzT>v8kX9cDpXdM3qYOgu(Ga7XqGcT&A=@KzYHKVILyE{3;zxQ+$;RS@T&>Wk8r)8v5Kl|~NCizW^ z2p1aKlc!F>#XK*kel<9EjsUtDfM?-+gd~(7{>^y|f!XZG{el5&{>{`WoG&gjmyz=q z>OUMeKhG|giG_djGyE(+!$3KQ4b@4=pTqLA43Lii^G7!#SIRoVkkh8Jd5LnK?nTmx$b2hHa8s#-q1_sN^{3Y(oc<$N8|I2S-G1HL5x2rOryoHffCoHeek6$)1u zYL=VU)CjPgg}KW^V0p;E=Km+a@(bnP0n7gpP#%(>-VZ&iqPJJMnRNGPY+~@qBtd9 zKs^a(5--BBdj}4;I5Z}U;i1n_m9AX_Xxw47zp5yE)#z>mC^Ix;qa0D*mmv^ z@cnnd&K}>4<_Mf9PC>^@}_19nHTe>`Z>IZyB*~6)`z>e2|->=4} z>U3->bWxruE(-q@bCFXx?0+7chP-$_Uk}`PA8=p`zWDV@ylu&fV9I1FaI|io{Gx1$yJdR~WVw)raZ>1#(W1`Pf+Rv-icwMH!JGnZ1 zATi->sg3;IxZmod`q)ElcL3j>WQvxrh2>$UWMS=c2Frg#6T)EwpWosbbCz#ekA2%e zz{Z^$uyOY$8nFHbmh+&+1{U`09tO*|?cIj0J9lB*uD#g4d!G=#-m+^Kw$k9kTILLv zZ>K?NE4Afzk`P$VbS?~-GtJ7j9ow;O`%Y}$z5^S#Zo?N_Hw$6T^9`HVW6RD>ICOY7 zb=X5VeR3bJyJk6t=1oUinG=_{G~gHQZTJ;UQhwdrgWG6Ac5`zxuCK4hwKes)rn*kJ z*Vi@ThWaMlP}_{_svB{2MIF|bS7UW~6)vr)z}m_hTvbyi?%!11fE&u|aYJb}?r!bD zubVsY%jQn}qPY#%G&Ex+O=K1YOR=P+6mvBWbY!UEi%WwwAyH_d>oRF#oE`^xY7C?) z5y*_6jHoGLxR|+#FQ!Fg{Af76Ds;@I1%AH^rE_WVwxFEcaum-hgKt(T-2KI{cezlv zq8=_jl0Tye?(QP^x`L3>A}eg#I7H-RVN86q0L&w@QxTJwDR{PHb5c>?+YU7?2>KV! zM7~9ZeaH4<@6kPY@QM3y-K|$*a`ZSK*V*aYx(3a|O&pQtb zP}aDl0;;8DP%f*4o+dbMT5S7Qb->bFiu`gb>~($tCd+MF$O_bge_Uvc>sbp+DS&dL zffk`gt#BDIS8M6MRw2Tun6uMr6u>wG;wq+0G3tdI5{=0qfbtM%9s<;}q`86@f@JOOjnHG*ZNizIO z8S=9-ga*9IqDHEUHCOYH>(V3Lsz3%UkonjxQ_JLNav{|#ptMqXJQf&A?65WY#R4n8 zvH;3jJ4|gpSi4JL>LULRHzW-f7nT>XoD_6=H%?*oUf6Ft1zy<*Htf0J0e<=igaPCP9I~{J%_5B5Sh=Y61q!*+3|3 zCR+PTh4wfbBrF`PfwZX*Q68x<<{DKbLAWam&iOS+EK_2-8|Psp z18=zzf>veJC1G$`<@oH~=kWQvf5h%DU&Q)%AH(PGJc{>Uy$>7SdlcI@Jd2GVKZy_D zcnDv7@Dz4#d<~zy_Y5|E@)F*9>0!t-BgB{x7c(9)F_R#nzQhLLuD$LG(JwP{vjk^( zY)(2Zj-G_dnH{KI)Pu12u?S0>fUvBI7_E&J0C-sHNU^bTi8@MXBC`=!-VCtMV*{)K zvDuPVsfDSx7!ys2kT+VPZgUFYI!rPa(~NOg_PezL{L8LXVb!D8;u2Lj#T_a5hQl&P zQP@O`R#2V`(hx=8rYZEz3d@{;^q?A}C=VkP;YcsnU;@P-zh)j1GXAi?HS?=DK=kxOB!J9D~6;@4LiLr#Y1(FwOFC&_my1U zJ~dnS2PLDZ8loyT-5;6 zB6@cAu(4iwqY25yxkxWlKt}I2`*Gi94t zc3B&WX}m64N@Kc4xZ?)|thEUdGf_BsL0o?2&ZXMA_}LOQCMEA~3%e z6_lTbwLPNm@TQA#pct-&HI&arG+f?`Sn3NY)c#r3YDgM&u+0flegi05)ehx!H`V(v zw|PdjfyPDN1eA)li11MR`?7?w#=x=$5uP_dwuXPq`FTGgQ3%n>@pQ5>S6@X zId2H@=0c)B4|#P)s5@v3^k!0BI#9T>8pcHd8q3&FaG}sF7gQ`uXq@{|vpjzh)$`(F zLBsMlusry8V7Y~5WhD$GnpM?MuBnFZ%0|eSmmzp_4-}mR(3Iw*qRtApE*a-4ctI zCLI>dFNan!94SE3&bFazt_#!WIMF#+C|tf4estY2%Z}dp9^tn2SHevcq zif6!vju}>QzoYMO(%ElC7loTnZhMazZ4|zv%Y?R01De~kXl%+yeO(T^y40wu$wWm} zCQAINaMQef#q2Wt_3>NLY|2KfHXH5gEVL`hrTIa-HW%$i89FQqw5X-%(kd~>Y{Zbo zjM++>7v@UPrdOihXGgc+hHje)O-ZTfNy|pb_{o@4;(;e#Ky-UJaXE3S{K$L=Xj@vPZ2VT zY3)XYVGPZmF23Xa+q)&kNJJ>z|3*Pb)lu#MDtlVxzOu-T;MmcL82LoUO zpS84JX=;>HLYjQ8AMzHeMh4rseh#jVZfYEb%sYq2!MR#sNp_!q0F2;OQgkd zG4Rg7HK)bta2mW(!k~2s_-5fSoEOep2>1?Zf%CKM&%ZBxj(>9)j*r7L)k_Er=lHmc zp|Y}Y{Gm8`Q(yus;aoIA_auR6@%s_9xpr&`Yw3v&=%=YwxUCT<)&*|&V%LF z%jui2uKqk&&b;1CT@nJze+roY6c`VI=b>=y$G|tsPeJkv0dfJ%Q#$;c=~qJ9<<^_p z{v}w>eB}i>kH+=up++yMX>zm z{Qps$q5J;|EdN(DEEj5)GiNy)_+;&J2FscH_kRkOhvdJ4`ITp*9jA`XId%_tBSC{ zwHtWoPryM2qe=FD0sMLq_GXL#WYe%umV`r%4Z!+s!Z_u*lV|bG_lGIqdvyH>PSskl zO{K$urFQ}QIF1uIi8DC*J#d!!zz=_cP2E*^U(H(8cLSR@0b4!>_V1vu$MMy{V>o#9 zyJ6#@M=9Q~-o{tgcHvW5D!!_y19p6k?@v;KLFdF#m1Q~Jgd|LcRxcnPT;Ep zRK^{YZ`NktdyIZlVYnRoKLzf%9v@k)IMgr$c%A7=D9lc}x0@o|bDDndp)_{_8(smH zv|_6&0a!2qd`$iuIi4>mjnAnZdvRtHJ@@?)S{UrX3#*pniIy6?*;|T_ru(tEIf(7` zmDpa_giQ^t_@uP~pSK0En-<~kWrP8ybRa(&TV?4uSX+wsYW(=9w-Il5*5bYPMyzja z#+KSP?5LWKt+l=Qq6t_MJV5z7jI*a0C_gH|a^@}&u#&ZGuXX(%QhhlfN$Tu3p;2)+D3yF z)2wVE5d+~a8sv7;z{p{?QX1P>>wJfJMo_VA-zunCHtybxEhKvnY^MQkGuD6d7XJE| zCowp^4$B8Ra9K|)*3v}b8h;6{@cOXU?GbWSNdPxj*WlO9ZMeC%UdT-~b;7-+p$WIQ zwBfGK9^BQ_kE@%Tadm4GZfa}CuclAOZ@XvUq22*J+BFN0b@bzrHkMvI+&O?pdS~Ky z)BDBqw@}=7w0Ggo+71k9?C{1VLK_>2yyS2s#g9W=^hhMckD`fR7{X)2kR+P~y+0S# z{XX>2qJ74aMsy6(#BW(CYF7qOy{rtSi-IU!Sb>TqwdB$yYi29_5Wbl{xVk*3 zo=200S}(%JUyQIRJ{r(#-a9CG#f7#}qW$&wV*x7A_w6)W(< ztIy)u=O0Hya|O~eVrii>27!PZufFv%I+hH;)mIBkcNqeMP3T`a3)lbZ8Z1~ifSH3` zC~5Es4)}qU1GwwqU*p*q9>pggy@oelc?uuA_aZL6atPtH2)_2oTcDl6T+_vn4HZLs zX)WaQOQD)sioo(N7#sb9az$-7LPB{rIjt}_Xn|K?gw~`JhNE;k4fG@iy%uJZ0Y-yP z__1LrwSim;$6Vz~(=Z6mAi0(nn=A~F^EJCVi%Iw~a30b&=WBk3IiW8aJpyCKgkk*n z5g0#dG)7JykFd#;5H@i#!p2QO*l2P`@bO4CzB9bp5fv5&@Axp>kQ#-D90eGn1)WYI zL9Q$d`Bo)T47ox>Jj<&`yhDmKr-~L$`H(o&kUKR{c}&ok6u?sELP50~dBr-R6&r8O zLPDVg*#Qk?)h6Ur8-|S?()*v&W)`#v`Lo=^8rQR3kkF!^`J4?i{P4`L6*Mi$Whz0h zkyNfiLTNtI>I~Et#c(X53C%zWRJ~ppXO|+SMu(VUDNKW9;+nPAV@nlK_xX@qp%z9u zZ8OUR;K>FAeG41lonMdQg-u8es08&2^Oz_2+TsDYC6TO*! z0n#xqxRAMC!6(i%DXjg?p!QF-%K0}_v+!>Qzb^#Qe@TREi|z=fvaD-~9sH*T0CZpFV^4U%ek6zWxBVfBt7|`shjQ`r-w=`_k|5`g6a* zmQSC<;T`W{$NE=EUdPodXJZ2OqulgxWM@PoGJF(d^u5Z>O~F0)-hmNU+hK!$ zbt|=V0A}g~Opy^rW09`i3G;MXaP=3XWmPBMKmIAMfBH7e{^cUPdHiFvTs;6?r%Pzq z${NhDQ-3gYQhPNypscsjm_&=Xd38{=xsVW4LfK9W%B8L1q=Bx}1KU6;tTTdwW11;5 z!lYv%Z8M>GH7%m%79+de2*=WD=w=562mT~yHpZJ%q3bAuzSWJYg{_d6)4N+`L6%Pm zS)~c`8Z)vh^n$zJI{W`&?=7I?IJ$N1Nn$3MWLeBiBh5$}CTT{@%q)v+nVH!!Bn~;u z%uZs81CE`TnPO&Uh8W&|?@~HP=er-Ab$8MR2}^I7s*<3oh!+zW8k;hNnd)g-n+9uLCgPhikuoBe%F-R7 zCDhI|B_MZBt@wz<6X=FjT3~Mrq-(SxJkN~YQJ(OpXSip86Q;jBA8YokL)qXWtonT= z7Jl<06y*jX7sK;1u;dVbAacu#KxCaocs=t61D`yF@BrrzNsgIe2%-K@bXgoCN-Zdu z(}ei(Wsn7QqB>fN@Tyq!v-%=-aHi0MXE3efUuy6Kp7dOKS5iCCU=~tCer0O-<|{Gk zy{Q=S`UH%AYcgK`^*t2L83328FagYYf=_-9Ie(Uk1yHmwK+h4DNOgoKd5swq4=u&f z4va_qsB~x=E%46`!<(BwfXqvVitGVJtqF0Xv*;MQ-y@+T7UI5=x6%0eugse{N;B@gT2YI<(NYOBO zw~Wt&epDu6$K?rc^t5qBa4@(dh@M~P1b;DMCre1N#EgaBohdV_U>ui^&;~0^^epf% zTsj(EAd~k%`m}QNGP%JmIS9$4={-BKOh~avlTq>q6TkEbIP(WUT6d?mu%Fo**^?{9 zgp&z$Zk7k)0Xu(qh^6-%PZY_pTsuA!p@U+DCVAi>GnC`g5Io$5kP-0+8%gzH6t!6_ z!9x3^Mz=z9<@gj~>}4J^K2=Qqshp6Gh=~~po17sA#X)0|khQ2u$kv3UhQXSxMo>T> z49>G+db$zMXPB@kCk`*>STH|bgSqK3!p6r2;DsU!Cer)mjmkvKOH<>SG##GLG~>lA z3tk|bYzd{lkpYwFT{SmJiO(DIFhT1}V*)*1&N1TI6g8fwG~X^w!rVj!7Ufy6Fk6SI zRypP*EAeJ=0w(MH@k+iKuNTEp|0@LJv>tfBCJ~FMZZAkv;LS2ColA$;3#@qBqQFZj zM!XQO$D-6YEKH!|^3pKZq`@;59p27N!u!;}ogc5oEP98IFa%*?WfCT2Mq_w#IOdd^ zgv~D0V@93^GYbrukH+SIk|dav$D0A#^sc6 z#M5;B95$QU8V={>(`0ig?3qF{=F$GAv$U9#Nyn4%`qLS-o)LvbC6w=6Ifm;TF*iFB zZ&ukbpWflmC93dBq5*GG|K>fj2_G3O_{12CkI6o?#NquoE8e%o<85;y-j7Yg7jfD6 zGBz8Zn9}j4IR!5!W#ZYa+`pVYhDEAS>ftN2%bW5upiR?=U%r@47C|p3(sRR_SR+~&Fj)+njFR;n}InSuk(KP_GW!+HueT*&@IK6;xg1`n9TrI zl67IA&G97CWd;F5tR zLrVsnJjrKKc`-8cvV>l_$wuvOF1=@xVuh1MPp94pjR`|mSr(iFT@b7fMTj*L%1k}N zsh)Z#Mk0jnG5@;HSVDc0WEJ(`~6%+3ZoyVZ6=j z4A~hna~gH^14P<AZeB}Ebq~i#|^T-JlFX+K8E2rFF7s#Ai;4*j~|Eby=bh_29}prR-lZ^ zh>c-6ORun}Im2=W?UNw6WKvv);?lMh_V?0Y z`+E{B|0iTvB#&`6DNNeteg9op{;wwZoH%a+Za=t+)8~%k*vUgUdHRI#EN2N8mj3-e z1Vd7>fpeDx z59goI+`0V&aNq;%jta-#m{j1`b9h8qz>RD8ru;DOR zoBP6wSMXzPJ}$oT2AHZ}y#YLU2;4ihA2_oH$46vhuObK-Jqb8*75DGZWw1oc%}2oR z-{C-w3Comf;PYSUnjhl^9ed{iE$`gLwHuFd{my+{d3X}Iyc2l;T`cia;b8eR;N)Zc zasM`sUZafCrQSPs1vl>gf$OXheum27#pzfb?1hJehXJSQTxaMS?q0#A+oy094{`4C zL!7vO9hdH0q4Qn_Smx%!Zi=@JIJB4YM%TBG(mr?&ID87&zk|xz90)8J8anGKournuc(rP#1XQiIC1ER&^^L=!M+H#lcpU%GnZr1J@i;Z02e5k8cbGPgI!h^LcyxOTBTBQe?8SLlK4S`gm^vBX zPo9Wx$B)4$)S-HvZtYoky_^{p~G9JLxHY7H@{r|??p zaMtP77^Kr;jKPE%vGG`FOU29a8F;~*j74#2cr!T{@8^`_oxD=KmQ#c`ip%j)Z38|i zt3$Iq5)nN*!MTSFz5B_~p$}PK8G5?OFmXWx=Da-;&we)(3zyHqv@a%L#B0qMJhuW( z)Nv`8ltcsZL}ZSmfyC$}q>rHv+xToGkD!4=a~yO7bTBm-kv<{~no=DsRY{1-GC|g- z6S{ah!&{|5Z+|a1hXn{J7M5*r3-*E1sD=kmW*Y8~?1D^;89xj^uUd{hzi-B>RZH>e zq6LTu^F=mwvgbWB8}$>1AZ>6t!f1dTlB$7@2DF1mHln`1j5?KZ@CbHAYFP@Ner*n3 z{pcm^+`SH0FVej}xD6N1?Z@2bCsGH$51#-2H8D9IYnH1g7eGIw95G|_p>D}V$*f^e z<=Eg)ZQF=WxS9;HBZWCWrjDddi-hJ?togH=DJD?ZE2_Vb0?~M83-uNaa9Pd+odb*lA6v|Mz`@6tL9VBEP z`e=O7FE#|7qutTh5P<&1Ab48-oUD@u(GfK8Ql#m{&v(t0Nr*0>GEa*_Xl4wei%bGy zvS*{B!VI^JPp${zX(?^@#{BGr}pAj?GpIW3SAJsyOsd3>Kg~egqAUX4E5d zLKR#RLIo^0HD|&*U5VZ%Z{fY%Cy@qxbPfYcWlW$B?}#h`16kfAdT0t1Lz4ai--?mR z!jz*@5H&jWFDTBQ!Gp zpbYU*fMsh~f`+|c8J36C84y&dhOs3Pan14g<f8WdktT{Hy_W<8iF@ooQ!WjdkL$Se}Lb&{zxyH zvluhD5}jo-$O9eW^a-kvUy_3DI-<_eTg zZb8Q|NA%Qr!@(K|{{oHhaCM^c_s&t$eGEa|*aGy=41;E57Tk+t;Ln=a1yRC-UOzY; zA;omxD=g@5_J$AD87I9vvWDeh!-Xw)cF9ZlX8-qCabh*beK=d_V|!5D=x_BCn&>Rk z(LdH7!Fd|->xZ5?PuQ9L;F1{ySE>)4RBrIeiiSOf_0oBupV^m=q4p>>7#>;SLYF&n zS}_9Z^mMNh;9qZmVO$|x={gvg_q7EJ$)7Hf{qdwvH+;T%30_(8E|%{78JjNe!TfJu zg%{O7_CD`v_7NWG4%PtJ>D*zj_d*Xk&chUlz{E&&4|jlr-UmIk9(kLQ7Djnd(lhK^r2^}mb2{Nvj@&-+d1J@qV*D5L1(+_L*$6{z66P;ngfI856dK{) zg;C<25l|E(BvSa72P|O|J0V|uaNu9m@G_18KZR#bD1jffVNukEd87o3Hj+Ks^&>I_ zq~~(?sG_!Y2DQy&vcsI6*H`{Km`8OZUo!%OvT!~kjo%Y*yjwTdk4es&gyd3#}uw+|+H1!0O$2&Vdm zVzPfI#`_0hR6sC>helvjxB?SHqcJ5o8dF1JFhQ=tKsohQ!y?h3(xSy+L6);8qT6>B zAL|E{6~d4mhv-ZTVl31y{0Ye!eoJ2CJUOQX%Nd+Y6MRaZ-MnNkbjgF9kCQ-kTfoif zGUR4Z%}WN@ypMr3gKG(1*A8Gk>10$?l?x4Zj>FpNyw2%MketuW0Gzk^Tny%UU4rh? z`8kf{WzOg3FpkG@7_xIZ41F1rGvu_y#R`bZ5LBzzp`f%7$r&jy#F>O=c~)T-j5Z^D z!u-&#M+fNR4VW-%JQln%7p62Ly14g1kTnv9@+1MtL(~A6x1(ccbRw%6 zQH!3Qz0iUB0DVFn;A5jc5%r7Il{R=Kg(E048h#1kaENjhlSB8VXXVw;UPk}Gez5cH z2_H)kg43hWQ||%i1ZunJJ>;bGL0`EO`qOh5qNlWyGzitp(J#OWE=nKt4tGUg1^*(- z5B3pWaE$PVGxb63eVyPM;3XVKSeu=Jxh1}JvQ`G>8R@A4k~1`C%gN3}S{h4$WQ+Qd zmYps@uLQ%{80<1c=A~4g5_slqhP@n*w;B3M;8z0Ek~cboV+PwC&QO`xdB2n{Pk_l_ zoIS`HnEyRb^1n5P%M73yOmm(&JqF#JC+S=axEXfyx&+gCAFp#f-j<*@$K!p{^+?d1 z^UJ?b;I#NW(mu)Kob%6NEce65^S0!D&JbUCmQ#K?U6y6x{S4Q+oVYwWF6V)_M~)qX zJ`U8Uc=8G1Va}2(MHF7&+$22A8J6>;p1fpOoFT?Wx zt_;gRg5^7L0y93CkEzd2!JUWKaO&(a96q*RfO1K*oSifO4a@&+|5HqcJzMb}bx?5R z3~-?pmhZt8s>(NT?H*6Kc?zfAehb^`Cjc{_2R3{KG{$4SM&7EEefa_&Ub+N40&w&s z@b>HYKH4AeCkFy2e!}g^%~-8h0b{2E`%mHS9d-e~2kcmhyVd#F2)*zFl*i-QQz(Ovarf?RoO^s7_b*-muH3@aI}~>F7Q1BQ!ko!i6BCWQ zlV$^_?t_E5kXa-ADrN678|CH7UDgNxLwI;!xP1y2@0<}2Cul$206aWSOTPY72k~HL zEp`UWa9P(0`y#qyl}ZPEzKZfpx8@3!)qRHEr-VGo^~aZS`r##`vczF9XUWf~Ah2>Z2a;bcN_~sM*`UBa-N`z|J2#j`Jre>ZcW8#7hIP;LGv&ddKT{?WdU-`erp6->pW?2i2&1zZ#R4jmCmyldxdPM2z{M z5hFirM(&gpmjxpGps`sVQeEfdWO_dO2jB45v7b2;k=(=xl$bk_AF;$9<5VBsfs}q&z|4L zI7~rlMDnCsG;m@t9~>Tra7r&)qZX5F^16Ru0J?VUfX?mPp;O29=-j!ZSUy4ZOV;B_ zD&KZu62neZC*sJSa|^_8Y8#d*H5fw!l?3NbsLF{)NmU-6>f28IWS6BL9O6UKPVI{R z>5&2ex+X`6pWAxa!r_;w5Z+5d+tMmWFP<1Lqz?^(`XiL$^^0+Vhs7Vt0v+VkPI;z= zAf!+wJYVC6r6Xzp4Un6x!uy$Zn-fM92(4$Hgwr@M6Am;0>thW-%9Ls-n^F*77Y|iS z27)Ur!n6Z35L2HFd1ah1_MDAko$Ksq1eX{QRBRAwuuKWd7-USWMAGPDgmO5gn?AlA z-WduZ|B*SV3f+tzaLtWGB)t>ZLz^dcWGEfgk|=b*85TwkX1(&bRv12#J*d~nE+d^~JE$49FmH;~Mm*U6puNQ{5@l0oUK01|*@<7I*o;`2b8zqAB$Wk-r zQMuy!7?!i-jA2Ly6iqgfXC>>Z*Bha2ibYImG*;~V2L92Gc&eieVZr_3>(&F^+RIRq zmq2YawYA4KQ@gkgo7R4fx|(!!p?w`_pyb-WJzS{%I8nXm(Mg7atT-%MI0GBjEW?#^ zhtQScb)yV4y! z4L(9@g+VHN#Cl~$i0g38jsWXj`;Z0JnguBLF4v-8dI*B6O+xB|r7swk+gj*8m6~Cx zwxMQ5Jyst28J}(a8t<N5k?IP2aq|R_J+yAH49pVHTGg12 z$N|X+tFQ`r9z~@Un!03Y>ym^gI%}e{Af`$1b8C$!XKs;J&jzC-C6e2ca4Du_m4iC*YmE6OYgrRPf17zZ=uC%VNZz^|H& zWrLK%(ne1^bWPchH5Z9c8yz#Y&DvuZEu#751!lVlH zu=>KkRF8mS4I*pI2(L5*c79c(-KN_2_@5I-;mLQMH za?c+JvFzk(^osRBL<2qVbX`8RdiXb*p_xF}Rjq+%y$OK>ZQ_?0p-t3ARO^s5F(1|u zR1T#|JilrYdZ>FqU8l!;J3ofZm)gQnX=0*I11%N&%(hq%Hqe9+dRGNE8U;L$7-SVP zG>Qf**52QTwYPp3ZN}0gzoK&1APiqL38$$O!(QF2)h@50dNCkQXsz=H2ji$LF(D~S z+Jw-(Vc^Xl-jXI3p?Fpu{8K^^k{OAxA~jsnf`zP1()2R%D-wSG!|45~o}AMzQLus)$CQiN7(@`75?Mn#tC zkyM`shoHX5s?I=aO$NI9^`Z752hV-|GN!)!G@kqRWjN~G5SFb(`Se;b39XTy&xouT zWDY8TeWVM*lVVUjsuEGzTF5h_(J*Tu`b0ROVOk@S`NL3BB%Bq_aE)?BNL&c~%>n4I zbjE~NCc`nt6@Kv{7_(>sdIZ>E>~mw`K<_UfgE#7DG|=;!i5hzUjCgK1EahgnYFtn{ zq7*UdF{m3;hd^B*lyNcW;n@S@o*RjGR=k3BhknGOPoKuyix=XhPiJA)JL3_V6$tkP z7ZlKdJ8pD5;wK~`YgRVWsjs9Ts7BhvBxFs^pzSoIOiV`dge0Vl|I@}MB6&;#y}weC zJ|P7e4q0hdq^8Eg7OO+1&4TLm3>e&fq3G*` zp41O%s;z}C-i#QV5$5<<0i#(?g+0m{Q1gc3@+aE8ykkCzNo8J;sl zXFx4^ic22m45b-h^FGP*oPjlmGr(rAZUJ2X1n2C%&S9K3LwJo&{g=cG8^_~xC9iY| zj7whZY#h$Xu?0 zKC=t^j&DVKo`WH%H+-p2$dg?=Q9sYaLj87)5863*gin+=+yWgDp$>w7xEJg_`=FOs zZvpcA1Urj4He8f`aFTnYe~=rxx%3jS+%3=>{_AZ z0PsDNWJ)9m&FM0%=KIJ%nm>d{kea1TBnZyOar&Gt=S@1E!`L{E6rcC=Qu0XW{T!F2 zP$chfJ_j3L8^d%qj>G9l9|kxchx0XX9yvarpTjsF8&62euw2rA=VLeypNGqlk70Pu zd0|-IxqG)(DHb}0fq3JffhZ^`MkVDfm&=;cW+|2=Iw!C5lD*C2k`j!#-_1q7G8#wAU137m5nFZn!d5;zxeo+*Wf_N(a__HyTaddib-ULgz%DBiOrLa&@* zxsJ|fnn!6*EI`7PG91P=jQsp*XzAU_8s(A%3#Y+L0pg!7Koq5=oLhj%IeEeqw9Xbm z>+;#T{|S6cFkFJ;Z2|c|G6`D$@0tX`8IVh!zjIlAS(z24_y47IyZ`DV#rjf|e)#B`lW! z`9Cs-Hap%sRzd-4~?cXNDzO8tNIu-(!pJ|n0IrR7n z4P)h7u*{|eeqBw+oWu2t7jft8G2r4!97##VT5U8A zf3*m>xewU89zW3bUX1}*y9xIW9mIn}`+>z@;Yf%Ir`46fr`vJm@(rB9W8mQ(;3TDW z;j~!pQERXzLI>=iyxgSy_YVSRf5s6@G&TiA0w4V-CiXmb^$;C<7+Cc=wkZ7ZO;iN1 zeXpS8k8T6!$>=GdYgmqBg*vP>#slB3qXX&s?mWb!>yL2a%yk^Pc^~x1;376r9u@=C z5j^jx#=}t`0#pn)uHD4NM^|z0`dKjn>eah{;2wkSbBA$p&UmbgR^Z;GnRLRtIR6L3 z@|(DS>pE`TdW;*C&pUJtw{P92jTQ`4;J$qJS&%Tw|x@!q`9au?eF2S!`zQmTj%kb;QFY(K&&#-6f57@uq zd+h&Z2~>T$!rZGn#!yG@xzr5IH`%brmWnTms_;Qp5#CA5!%MNr_@tm5Z{!wWs4fzX z$i3z0sUIy>cQh|Dx&z^F!y96uCe#tcDxf{6xaY82GvWA;lk@Z0uP z*s^Uk_V3w|eoh9d))DkTWpn zFox$^y0;up9-)ArUl_V~>x(C3?Encu_PzwP?Ah%p*maYkV^TExF*#H}OCapx0?@_ci*9lLaLbMn@I1C9 z4`1$Eh3`*n#BZ1PVDiV$B9NZ#px976|H*Us&z&I#|BnZ&WlX*suVVISI zupw3iG||1GFovgpd4~T9y(LqPNf)~2Y*Jhansa=HnGAhLHPHw{Xt;=xX>~0)Cx*adPFdI*{m%+{3743U=frFnXo^3C zoiqrY6|U%^^FU9tw*aZEQ_o)IUb#x}M6UAs)=6Le%5`G$M@4fYd`i?{IUlFwV4;D{ zusotj2VDi#k75Jj>3*|!xwSqCIpa!@FeDSc85FN7R!D#_EVm5K7E&xRHSy@Fbw}p- zN_1DdA$dXt%p(h^Ze>B!lm>lM`d<<(`bHWQQ~hJ__vl6&f~vI8kIjVN06ii{B@0;Y zQK5x@4eh6UU>KeQ^?+pIwVpb-0IQB|z~>vjMRHRPemS`bd1EROlA}XZWdhU<>EdG# zpMzmJdn;?pt>_fg3!c_s=%`+E9o19*|N4M4C|OKCtZkulG^Ic@zy`zMBp64giAgM# zgXpXgIpQj^Z#VkC{P(_^DZtPoy?)D#e*ugrvFE;)54| zz_L=^w~uf_+Mq&u22#+$9E|!8pP~C3k6xM42xv%#1I5!#sX|Z6f7i5d1U05ZX7EPZ zykU6K6bPBtABockp>GzoAJqxeh89559cF`j*}^z zQ1HT7^rmxkPl-U*!jZ5`lp}RUGh{JtsCjD|G@}YIXYEJALK>3rq|pOCl0%U5%rLm* zXpuOn9-XuS^gLCs{a{ZC;TsiVT8j6^C z*@#|{gYfBzP|l|J$gC9T7i1%5cAD5$&^8-yvqjHHLDckQsAtprVZb)XnZySuPkP2Yt4wgrRYO0d81HZY8NN0xB2%gE#`45_Hbf=Txe{ral?I;_ zGu#S{@GUh7nWxB99aL#%SPGI6SC9%zx(&Ix*{CThhD+C8u#oksg`PKO- ztjR%$F$6yP0HihLB5znJbOjdJ`Sd~`&z|rJcSqykDpc1NVDi)vnEmtwbnN{koTA-P zGPwrXql%F;vKTSBS~1r~YDqjM&Ki!mgcwYjJ`BGf*nr^^8sQky4}Ikh$Q#RZP~;FfTX+yQ5zKJtwZc z;S%TpN9xBjFqf;90+{Q}dhx-6C;VjZ^5UWbA;rR4=0dYPv-KANTrU^~|1((5Wy!FY z%a{Q#uQLSZ`0N?Yfcl>q$7hqy!@!u2V~=d!=JWBnIE=wIr~S9y-qNwWkEKjl#)Z>n zKrJ25d24$O(s7&?n*`MP92}poNBR)J@wwh`7%w@T^UO=$*ET&~^0oxbB`p^h!IpROTa(6_w3+a+Mg#vst3~%dY&fr`6vnvpRH(x<_l^0CoGphd0SY{VQpbKuS@$GkTWP((Y9Ep{p?xJuv|Z%;b zIj{dSlRV1#xW9$vA}zXaT+Y!m@&qW?KHchl&J&aSPDn+-$&Y@88CidzW$g<^kNHPV;^C2EWA z9`0QP&TPWb=f~q~c{omuoC0?FK7Q#6uASRK=h_X-8i(}}(b$kbh>pL3TYntEqqD1l z$)m8xKM=n*)Kk8$(m~gS*YqWx1e6{~>{)`HwqSf6Z3dQZ04`j>gNv-q{!l>o>&%pK zkuK|J;Oxh^qK(EWcP;SNI^Z<$$F+M@Hdk@|<{8|5a2Z$rxQ2%}Ptm?@xIbeM4utyx zV@J}l=W*@+9Xz~!lF~had$+IQK0ScAMi+AJ0v&UK9>y!U_Xs$6g7QGc`1mpK;PzcA zQ_9cPJ=j*8j2#|MIKq>p?x3>Xx(s*X;&9403TLY(0NeRP#(m)aBiy5VaOvzt{@j3@ zbPb2kT>jIGoszo4(lUQ~v){QdOrrUo4*DoByJu2TzySL-v z$s;(ka}&P*{5>rH?qe)j{t*^`{}H}f`7xG#{|SCzX`N*s(|h=F_51kYm-n!0-G^Ad`faS*^a<8%{T#n+ z`y5*jt-!{8%kcBMukhQtZ*cz94xIXZ9kwj_1a2}JjJ>;~F){+P;uG*}Vk*9=aW#2{=uwivUQk4N1{)fn_m17`g)3ZEQ(0dMS@jZw?% zQT|;yYF0O5(B_fI`G{VALxN!)9gW;s38;837fIvd{(|M|Mm>y!On z46s%w(x6I%E?)NN>g9xvE)H-B4~A!Ch=AoC?0ce*ha;*7)uTV{@9oeNJ^OTnqf>8q z(YBX+Klpk%3SjQ$*atm2w}-Q9e@t047s&%l;g_sNZ-p0%n<_AHXcNlI^O2ZjL8vMS z8XDkEdto}>`|2J1{L4~YxpWNAJv$8_e7p!P;|8E#SUnCEOG@e9K-e7}aR6cB@ zOJQuthL0%{kwz5)0|Q}>F+wYkhC!o+Mx};2MkP#IkBN##ltL+%(a~*874yGXjGE%N zF%FB0iH0&d3L2eOY%8Kz^E^uIS8Fw585yNPV3--b?E}#6iEilF;YoDsB|~pJ8G<^~ zfafV07WQe6pMwLj)?~&@Vc|&X(L>Y^_x3&DW$yxaKQ|1VIt=|3p6G7~L{GgR?Basp znyW#-lt?%xN5Vhfi0WrX9Py|lh?OHv>_*MNc324VNftysHnHCAk1ito3t zz&k76L1=s!ibj^AVth5~rZ-~fvm-I))d{Gd*^J@OjYQL&7G%(1D|uJ}%mcIFof(Dx zi6Mv|LmkwiIS8(bMMPtg@G6(r#zWJb4pjqt*i}-UN=El6XXvUD5tOBYqBs_=@!{~x zP(fZ|7C+%k8doM{A$Vd)makA#T0Ehmds-NDP08?OK%1=)(gX}5g%@c{qL5x;NUk1{ zEVJXRR5D}*NR!MbWxih$)DhmAow z8-sH8mSq_h36^tx>}m6XWpo}a!*T^ImsiG$i49qPgYz0O%!=@V254K%P**7N+reen zuzfL39$kxbhd1EVzV$eBl-l|`XL0WQK}2gp;O5hhtUm&1AnWXAk1pNY!LD~#IJ(%w zzF$u<2=elF70W(-x?=e7X8iKY3Yyv#oxS-_8nyCV%HgV zPJM-DIm2?6VJV)_jE)hG=%#mvoy8OW#W8SB4@OX#25wnlVx46^{7O{t$dQZv9L};9 zT{ZntKCcPBnQ}z4Bu^<_V}%)-QX^~)$xs#R5t^ldnVwz#Aj6Ysvc5DMdzUi+SJzN^ zSI481+#b0Ts$r*bhjk0kR6N&QVusmU-ZA7l{dgpxc2MPX&65L<` zPxcx!Izwp6dzPvZRBaNT)-jY0d!@%UW#Hq@-{32H?=>$NfvIsx~8{LWj_D zjnIN-uXonk<~R(WLz~!>ISsyLdg0;CUhE!8k?5oLf~PqI{+0-Ia_}0JvR{psBSgHL)n}t^1~C%dgezVXT|{N=^Zcgw-XZ|^M|fJ zNx_JlP>PV+I7BuiBDx^~A!S{kR_WCd2l@o!mS_8r;KN0LnPWe&RTWCN<&+i~A zH+t5^{08*wv&0MEJLAAaxKjOBunbFT2ps9US?a~Fg4%WVv>!C|HJMLPvGT zI5ZRO==ou-a{IJk0nD{ya)kU1=TSW}MR=BTo7N%TMF8>SXRF1eo{{5H1uWN2qk;K& zYRkr?2=8(UmNQgmV9s9UF_W{Pn3M*^6lyysry+b?3RJY;FeML3Gb_Yo%%N0A_&Mkq z;ey1*eCTVk&{^q?5$`+;nO|=_8RK*_Yh=%Mn$#E+j76A#ORsm%-Oflkp*cp|hfJX4h@pEC?@)<_gjZh@07 z3@*9|^w$Jo$|nn97vln%cW2o1ud%32=@i-nU6p;|oaBex1+~b2j-HdL*|5^!UNI&f z`Y9QRpGns~J{5)u8PH8^H3OBOh02S~ME9Tf#ZnoYCuTuEHVxX*DKOG9mbT-k<{^1z z5#pxg!ZMge++{W@R zeZopi@J?4Dp|KEOuKy8oqXvd}8+3Xz%oZC=ag=|H6|t%G&a=frok3xl@zlq%BFSPx zlFf?r^j59p)YMcIXXK%!VgS0xI-s4b9c1l0qqueetm&CBCngJk#sHatGQ(pA(Y(%{ z-u4cC#blfeMcK=n!8XHk2|jathRzJ1IgE|h**G1B;tZ%6UQ6k+@o{Xt&Jdo{<#^IQ zUYEA{yqq3yGXUrFaaz1C<(q-H(9tI2bq?qK4B&amX-bft^TOLw9@#^gJ&f5HbTSm> zCF^&y3`yh9my8}1=H%1^o<5G~=hh4T{T$&T_l8TD2b@CO;27wFUY`Bn65=JCV;sC(;1?bQ zqtz^6Io}udEKf|Z3Gecv!hA95C(E#;q$E)pG5l`z#Ab-x7Burxg4J9Pr7~sc%-a$q zmzMv`q;wb(v+*{AZBC1q42>nI%rIO6=Df}OrF98<^E$`pv?Ykm>l~Mj^U7g-PALwb zQwrlWc%8k+d7GDPe+$YPX!Eud#>a5lZOetjx&HC-yw3YMf0Ac8pP#p-GL+8EdE#r} zYaKFTxX>(rs$&On410{1S67M2Jxl1?i`k2w%b(I`2^O}tusnhCX|mCCZ;2C{YRmho^aK zh2O+90n6F5+%&&h$gr?yIZyC8mimA!!*coNSuwfiAyzCnbzI2zG9bTj;nKfh`M>Rd zjLC3fI~G!B4ad#_C$9q6@8b6L8`L473UlWw&fGqRb2yJ9k1pf%)xE%tmDoHn70cpT z4rB>%>QXBJUi==`>E+lI5Da|w9i?+e%%_Qy$AP_Dus=nGpJ||fe%e5+D$c~uY72H0 zGyuC#%5qB^UB3rLUQHO zx$_i{PH<*BaA6DX&aB6VNKYIHi3S$D0US9Io!7XCw%+Wm-y~$x+mW+#m_%{ixn%s#DoR^!mm%dmg#a%@|>1nW00!LOT_;I}QbPRnf@mtyz2rP#Z688-a57;As{8mm`+ zMrnV9mCHZC$`$Y9`|sZswtVSZ_-)mv*uU#XEdSy)EPm%X1Uq)c(6Ve?KDY%Ne)$|< zfBw7x=0C4|8@qNc#i2v1uxZm*Shw*rY}vjTJAPk+)$2dR+O3~p^RC5Mv*lx~+wnPm z+4Kp1-SQ1ioZW%XK79#ij&7kcJd1Uozk{%DPa)mQ6~pve42y}uEBS@^psWfXSJYrk zm;%K;`Xb$~JEHr@P*tJEr&|_b%(CHV{(cY|me%3beRJ{b+Oe4M?Enn>NF5(Ho!8_h*&aPlL>kn zl*LxWL7u2YNB3Un>}HP+j(y-976dOvC_LrC=+L_ddbv3W&vN#l>FeAFoqKddZ~JcW zq(Oq8p9_Km+=X6wM3_I^ockeM8HU9hen7*53Ghsaf`d8$N}C31lM3PT094hMAiX#p z-ci07J8wMR`r=Kz@%D@O{PTD5%4-WS_l0R_9#;<+r3+sB@m=T!&_HQaJ`%^53TcJ( zaa9P-(7`pz9}0sCAt52Ks14ABvln?ANUm1@wNypN2sj=U74@Htfj1k&Z?=C0%XwXj zAE{J`b>7GEqEvc#2kGGE9S!@wPU!xm483JCC_Bh7xW5eV`u4&eRXBbM^ui>^?l5(d zp$F~j(5(xcdwRgjDG>d=T~RZ>8Gcp;+6VU&5TSok1YFXh1SnUOCm_5q76lUODV0l@^24+Ehd&M!-qwj80yi zVJtLZ_`KoBZpwx+--t0UPQ;8ao)=!>e)$^2jVu&04h+ge>ugXorwH$I)xdNF6zYVx ziJ~kP-69=fuHnI25>&-BSRGn|&}^OX+BG$0h{-&)4XJQRm5WI*Qzuu#CqEh;VjPe; zwF(}Y5pYZhp!-`aG|E-OGZ5Mki{Jrfq4%sGlP#bXd+A2=M4N*dbX&nX)eOjaojoww z6I1dO|9i&!7>KhJ3u`p> zfu6BmLI;~CZ)8tgmOf%_dzR}6DvUv7xdHN09poii=xVKqsW4&u2Q%Po@kVf#0y?S} zUWq{hn1|;?A)-JnCQJ;=kAZi37=meARcjM^&7LV?h_18>Z*66<37zHkRA-9NQ{_f& zR63QR1tH}oDC+1u^+{0F#0fyIA4Fw8z=j~ohbZIvSh(dYVWj%uM0sV%%YZYa&Lljp z{Y%vXI`PN0$Wo)2G|ewf0iTozgy-wUWSC(^MwkX=L0)EovdRVn)l<$_*Km6X{n*$5 zgk&h;nh+!=!(@+Y_DE(464v>bH(H=*j1_W5iYf!O!AXdsy30}^%I0{HM|oo${K~ZA z7ZcuvYPyC51QlozH#k>F#CXI8Ltkn`fHgu$HT4a5gQL%aWijvcfLX1pyg! ze-c84?tklqvU0?Z%thaLKO~GP6lK@f=z}4zPoea6=xOmq^uRQD7Ew8{*ZYWEp{dUk zxAKIS?0L=ioF~!biGKM566=t&d{7u&i>`s52f7dP+-R66&!z?nFV!Nn+K9kvy(n)6 z=3M65VQJzT^}}=Enxlkfa2jHo;^CYcfcZZzf}&CfS!f3={P|_LBzq#PEE?KDR+xCw z&tY`_dXw;S*N>udV~_kgo=?FD_22~Ph9yJAA04Wx?8|gWr}sb0*LU^Wui& zn42?^MDJV=YP)%Ug8baCSUZ?dSc*<UusbMfwPU*NTs z?_=)A&tdp;V=?&I(HQ^sbb8*^;zLiu)FScA0L!!jYUh&?H!V-VZid(v3O7y2hIwKR ztdl5wN&##<>FR_WYV$K;otTSQio@&X(fo@m3LBq;#K{Fn;a?g|qPUzkg~yJ~Lfp94 zb*|@@k#uiIWgwR4j~Pz&U?`Opz2ErPC?@_zN=rN<%AycfOzmz-6vB(CuTiQOlh>v< z7vS6VD-fwuz!GPKS+9fDY(ktRR!C&9tOA2g)|pOEOF^M633)~pB!+0rqrt>yKa9&FLB;##Pi_>6v7ipcrIPYiR&7RAAJg3F`7?v~q=JPQO zXIRT|BxugY$F)j>w0fBHalGVwa#|cml4s%cI6g~tFxX@W$-tN4B!f$qBVk}(QdNek z`Wm5G-ow5Jy7lV;SATc-hWp{O#UIf)m&S;=g;C=MB0h)u8Rk%A4$OzXC=QxDlh7Rx zQu!k>-Ha<&X#Dkn#(R%%Vf`=55F+HM*{ck_1?$6uK?d1pJ6{A%f`p@F&tOQFMF2TJN8G1E}g|OtWVCG zK(Z#~E zoPW8*A7F7L$AOB%l8Zmh<}GgW&&F`!_8AxBXX5h9leYVtPDq;v8`9s;DRzZ{NbbJNNO2 zfaVwR;L$bQe0aargZkPp*g7NuKk5y@w?6?Fjsbf%;6Xt#_Br_gQ|1Eauj2PJ$8nfn z{tr$ACpQ4UeTL&YKkResjl;o#xHot>9d`hD^al>#K8t&}jO&k2;3}@*_-|j~NVyJM zeLDbytAJ%+1Me>azIYvYej2V0DgY+tVWV$nTnWq4=eexuZ z{qcbM9uIN-;#GP$FX7t5eZbML@neh=zEULv+o+?&u>a<5>MuQ_2k#<|@#LML>)ihl zu8hpYVXt7^%NPP2e1MzOPr7^O2JTUZ>HPhxxcJ~6uH5?rkNIQ4xdS*oZ!A{o!*O}W zQ~|9ovQo-z_B_9W2iG6s{&kjN`9sK{T)lT2*YDoO%^P=di|o;(N4R%lHPx z{t!2u*2Loe)Hi|O?^3>R0cYqu7tY|~%g5yQwe7Ug{5U z`qovPze)Fz-OR7DyFA%tx`)?WVfopIHwDO_qjCk;0oIH^e(V}{{JIj~fAtzxuU(Gg z=Z}ca8y<5f?g4IHyNd0b)?x7%@8h#C-o^6oKgYMzA*%<5$@B+o#yK<2#%?{wpq>S&Lm;zM%7dio?Gz!`_`=Vc+h>*t_dH z?Ax~r`wy-jYfT***y+ zU)DfgABfmN(MTF=Lebo8B#)y(&hR)`hbO=|hz2A>Yyy^B2U}ocYcfGsriQu9g0T2V zba1glXV<<0mb-=q2~h4H7Krw}x}&#ye+(Gf4EI1!*wNs?-NzNNHa+t4X@DN9LQs$g ze0`k}5a5A6y}LtYRAKqf-(VV$i-1fchP*TbJI)@UXYvnx_}Tl&E6GA?aT)>*;h6vK zLcIFfYbdKJz!4e*y!FwmNH0x6&H(DfwiM#i&EJa2_I$IV5K9B+w6Wz#A5{)Vl^;B! z1I158RVo#9(JE*oqaY6pM?^#f6bjZPk48*P3{)C5v|85R)QNRA2I!LU@sj;3ST1c# zVN!hdE>}|<7DD+5j8MSQsW1A=WJo4^zE>Y?_7BAlMI_#$0ew+_85}#y(B4jl?v7p2 z%gGTAeZ1gc?*+#IZxoHFL&2y4=*_?^E&>iT;9`%vJ{o_x=tJObi9}*;9&!d(A~;C{ zLq$4b%4pDCo`UD!Ux`4*@tJ#SM8Qk#n)bLs?Tt_gW#s*yUP6sE>3_~oeJnic_FO9njiW5mRm z@nZ|&ov#qy%F*>!q|c}nUc2l?&VZb~xY=`+C*xypa?R*;L=3hfwAm~sze`=flMa74%c@GZqB%Sn@s;SMz z6CGu6^L3?xw?6{IgW*fF?eBGd}s~WdX~bJsi=wZx3{Fq=8qT&cd_2XwpD*iE=_u zvnP7QdBCF}0zp-J1Xk+k9p#+5t9%7i$D?We??`LN)wzq7YK3L10d_&;(B!l82aLGn{nZNT|<* zgVqzaA=yHcJf=QDXy~h(>Aq1~>`firoFpu$f}XP)u9sE>Q{EUr@=`x66VX&xludE) zEum+%$tobLUqKY2Yh#7}w@(Zm*KncN9+azwb8G;5#<(CbJsJ)wU-XiDz%JMY9ld(N&k%;RIvSLv z>EWpMLDqbgvnn^L2CC8d+MWHUWx?STT|7d)vQ4!OSYOi|melI0nNYdY0>rFbt*k zYD6lm<8xscnGV&^6nGXZ5K-R>utRzB;aUT=LuP6lVxg|5c7cpP*aR2EAiPKiuhej; zYi#gMlZ#1=&4V)pv}ef8>9AM1rh%`M?tNA$y2ZLcGdzXvSuBDn4?Ov9WSt4xMjPx6 zE(k4*M!$G}@rwlOgaVPTh^AP0l}Ev?I2`?QeBoXcf`H0ss#jL%sH`l5QqfD}1Wjce zT+O~P(6zHZIe(n-&!cxnZR@W9xZZM|yXdV19fi;%Ao%AkM}Ud@9MYo=Z)J{j1nqjANhF5wRGA0!Zh#TEN z@mj2K%?&{9tAkPVN(=l7<#0~*N9D84cp|JjoD=+!O6|FSt{i@OVTd1*0a?&f7`SK{ zURw1kzCE~{?*2&}!f~uRw+5Nx^3mVof}wAYg=?}89OJ29G^Yl#&`zjc*o+=J2e_p8 zV9~lau;Gs_*iJp}VegGWU|~4ytFO?&L(-m;H1;aBj9K+w730rfv zkR=PxRwJs!jIudRD45fLZZ;2Ozt9Nl(`BOk_=7|2>|)_X9><=NRCdOxd1A>hJ$8B_ z%v1BlhgkOZ=Z_esNjWgmHbZp@tXn4K3gc}9m9c>BQwv0xZcI9~qtjp>mj&aP3>fJ> zrXQIK?eJvrp@>a8lx&y{(M>T_=Of4zkk?QjrcRB}A_dZ^?O43^8-$sHU`SNKU{NC0 zs)EI;f!-R8xC{&QiF#OR?8P4B1@WmUvQj@PF%@Yk^qeKr`#jEu!n7O=Z)kx`_9SFa zwS%lv2PBphAvq-zxfywgjcoc$PfY8Q2P-OY59>UYE4Ad7Y2v zr3BL%u(NR(FI#0|c*4?L0UjAlR#sODXvv!838{(HPpv>{b-94$9eZ?yontTIS?=uX zf-k=PM1b-KcQ2xYiW05o1 zx$$Qdm8GMjcX#wR_#$Ocp72I@kM=?jm#&D>hKjWD=oW6AI|>?1L$8kzy65ekIwEsO z5tR8x=-IQJ`gkGwAWWY>9^1CB#*fQB6R>>9z$)rL^hZCJ9&inGMzB6q^ufK9@(B+_enqjE>@zkYPTT{A#IA-9x1-!lfs43Z`A%|Kg%+R`~V4-A^ydTH}M>6o^# zoWmsWF2Q{%T=GokxD2+XaLylJn*_=wljK@BuN+UxhvaoG9mo55$ucoLd-oFHo6o`9 zoDa?;$Ccnc=bgjZv)swe7418B636gIH1;Sjt)%`Q<&|YvctTIft6YNR@vP~dnv68c z6E9Qa=^5e=Q7Ja)(~ZcUQY&Ow7?!hUxqfajwA1s%yN9*Q8CEmoWUwrGkuwaJJj{8U z0XZ*Oc7;uf(^j**EhPVYu$%$7WV|iK;qCtlEN9K~=%-m`h4MM85XLFRNS|FRJj=^p z9QOabX8FIe|0%FsGARw|Tng%|a6Qt@p>$_c*i0(38M%m{y2g6t>{YIMwnD&ii!CkbzD_8Gu+>UUhciqp74K?i|tZ{R0IKYXJ~1=gMeF5ISm$!*-f z&DYFYB-bd<+wtJpL0A*vgw1}Dz9^>*o2IlwikUh=sQ3ly#;p|~x*J|u9 zF=11P19k?60Hfvrhwk9f@joEGJDk0SE7vK{HxA?0!m-#H8-+b8BQ~qzaBJEu;3%bW zi|*0Y)3|r*A|5`VW3SVJS8vljXw_tSc)fMPQPwzrbn7HODbUk7w$e4XPJ}8v%l|lo z{fD>V$2H6F)@#pT@h5L$<8P~R?iAhI2Q2=62ahR3ckZ6W*3HYXP5;cGLae zOU1E=Zow|xy|M#$E^ntk=59LQDLU_QeD=XJc>A?k@N(^fDdPs>_@ND0z3d$<`{D)s zvg9@Vy8KOSUiBdk?O1|yM_1D^bpE?^o=1mp`oQ-%xczIK+P?xvb}z=M1Iuvv)Nfe3 z>QkILya^`{ZN$YBbk6hpsSK#*Jh+UHpPddDnG9BMCww?z6kctt!%&?DrM^C>4h%p| zR4DZRc8E>$!Ph4~!tkHRqGshllzdhKS%eIMSv?Sv-4kh3HK_ce3U$8>#jq{Yko9IM z!pZ}X*rG$>%yd-0P>S?Psj!WRhjn-ojDzA}9%O}PfDW4Q%9t>C`#HnO zwKsfd85-sXZyz^AXcbt0YA>`kSqLq#A~3^%Iqy7=HQU!>!He^eT}p$^bPIwlk(l=C zY`paG%NRJK9!E~?!>3C>78-fpngH?h)z7ysMOdx|*1^F~QJ=dO+>m6M4Pu@TOM?_CzOPyT1mn^z4uHt}-}wmqF%0=GO_Gyn73&n;w1o zp}&V0`UiRo%os9jC{}Fy9v`mw067D)F>3Y* ztlYQ^yN++is^8ZjaY!M|!>AM0n1<+q83?USfO<#{6oYuu$~44|Erqfn6;aiR2+K2I z!Q$7j>Ed1tnllpCid1NFzG`aM`S`jjNz0Os^MwSkINBYnkU#}W6yFnmPk9KWD8)N2mTTu$)afDop@$mP+9KFf0$Rx1x7~ zAL1tz!#1iAPRXHAH6)9l1%?k!Kqx(bfx}qGS@jnz|9bW7IB;+!HP64|6y2v2dw#`R zugpRFPBMf>`N7@K9iIN)aP{_tZ*U-#8Vw?%=y~uDqG!twq2Xb0aIi;6s6QeiXumQ5 z7HYS<(DBbcGZuSxe24G8T8OVdUx;m6mg0w%p9om)rgVK z1)Zau(91#t@;DE;<%J86VV9h6c;rPQq*#s6ylCjFV&N6*2d5ZkgxKglmYCsf@zRvN`5m@Ku!-kt0rs;!DgTzwiMGSzU? z`9PCzhC_^dYdX~y#MH%!4=C&@tR&+JUs6vUaBD_kCz(NIrOEr|P zLC9`I)x<$v7mu)FotT)EJ?r)LNx~w_O(L8nX%a`~!_nq1Ah(*HAqRCJx&}GJRYmP^ zgf9X#VaTp6M3^;70Cas>BGQJJBEBUT(Umq7POpc|qdjV$9ghC7{_x6Bz&JD;*6}4m zyFH-Bf`Cc`v_t6msIv)BuBnZOwvMj1Oo#Y!G>~hwBA`kK|8kA^b%9TwLP(MX=F&YY zh@pHM#r<%~2m$M*2h`AY^RqfA37*+6;NVOZ^wmjNd2&6{=(&*jwa3;+ z`ymT>5>6?8NSZ`#)uep5X9NREaQpZ$=F=BYc1cs)1$%6w4v6 zP(f24OV=Ea?n--DsZEr5cN8AxEZGxUpb@e`T;JH^o@JZV)W*e7J(M>mAbt`J^y%IN z7irL4a(LX%^`mq@(Skx@qxRm)-0*I?7WC+c2)s$=@#lkWxyv?5C`l&R) z9GxP(%GDFIgw#s(REjs5+U#kquv|xjW7CX00eQ`1vQRj;9zK~$M3zuFl*Xfn$_H_S zX>eLY*Q0SpJ4G+ZJY{$)swW(heULf34Bg|LQ2Y8JE1NoSAYA5Mm62Gy192-sV^ zkus)$o^d&n$K@h*TpoHEoiO69ad5VJLQVBgQ)Q%gh606C${-8sfQ||~45R)1;;7Bb z48}-GuTyj{R6jouoz;EtWK=iwOLRjgZBKaS1fsL97g8qWP?>rlb4oFS3zf(iUyMFF z7evrA>=7S=j*$*{BD6Q23hssWA-&+67>@Q~Js}J2fvlNT)Q{?lG!TA_K?pWr-Glq<`$=*MT$ zJA~@;*mR218c#bmRlsu71bWBOy)}%X`^T_+WYV9&JfRhs53|8A)C_eK^)KpUAg@tE zS*t=IwabZvQt{dP&k<$}fiX!9Q(QD+ZB(zU8tCF;T48yz0hZKOuj~ATR1_ztAtxgf zDOnk`KLzHbc;uvIpt-JI{7R`~Kf1@gx+0^Z6shsaC`idbthrTAg}trWBq&}|Rt!&X z57_nU0S4y`m^mIB_rDlwOJ3y?C})#Exdg^JKBvdlHlB1G$7iU`#_JqUg4@#hq;oRd z<~e70AIIbC=Hqx<0_+kTXBeKD&7QjnVp{^_ZDBdXcJ}OL2+1&#!7IZ_UQf$TM{ZFb za*OkknV*f^l3YC5`AKx_)frv*z3S8pAARv2jSYB!cpXhctKb>wj;{VaVXRC*`mjQ% zi!FGX}Q0ewXRjO7XNQu~T9wJ`!4 z)~&>?izjHju}MJl2@{4um#9J~_pZnrU4i5w1xOi`EBcnEY$L|b7>>`rcnkCAOu((n zC-KbO$#8M&g&zGnqMwgF{Io&v(S?X#F>!yocaRJE2Drk`qd)9@T;Un!kFthp*isT; zwpm2^F&t-OuX3K`v$V9hbvuu}n_FQvmlqqa|1B(M;LEU?0Wkw!-p~7ZTiW+uHIC1q zT7t)%j+6$2Xf_VxZ7EM2pO<`(`J8N09{5;3MoOFG@wRkLd@RS6(vYr)O}b7#R=QRR zmbaB;kvz-!{1O=FFlj%h#d+f6`8d`g@6po^PdxRc0P_swx!kyJ@_G0;&I?a0%3%YC z3>L8biT3TN-}i)&SYfU50Zokpm@_QrNj|eEeKrQ>tZUA|JejrUXm(%o-EQ7DLFC%wqYBR^4(oURTZf4`~(&mP>G43S$!z zE&l+LOD4f<31&;-e*x`3VL5AGb6jbH&$h5!c$o9K|MV=+m{W)SG+wEAX*gXILt=_c z>GSbzVL99XbXd;7TU!5nQ2hUIST4nHYaGVs;d4gL%%MExQ@x;lvnh<;!3@iJf=`Cz z5u6`h@~`M-mBKuw8Jg`sF#e^~V*QzjRt?mP@dlJ&b|hj!qF^aS9{dEoL*Tz>EXr>U|$y7`c{?*KQh;o+_8xP141>rd8h zZ^7B0CiGywSWN8CAb3yl8Q{;EkWmTHxdtTF{4#GM?yOrzc|1t~3_#s0#9_LILv-bb z@c1zu^N{Qw*a0Ew7w3+cGy0&czegIs9QV;^*;>3)UDHL;3>nHMTIzYZzaCi^AbiZABLJG zgE4CTOjLi=3=<9HQ=3hwrcT0uMb$`~mkEZU54}<__uc29q7GVWV;)}n@dHGc(13{s0*0Do@$>DVBn3Rx zfdUxIHIYz8M<7BT29uG}jEkdzWGwV%6JoRs8kGoFM2bm3d4f)!lv6d!+;?T zm^5b!Y}rYOpuuu@q7IJgAh@Xg5fJSQV?qpqX&I^spnGT!d%r&D?$Hg#TpEZLC!mvS z7uZvHeq%mf{O|<~8sCHneK=&DWXPLXhs)507IQ8fP225azE+`_@qujH^W-t+&uzc1Q?D z2elL8#ukZ5BA?Rs7ap7pLv7;=gjchYwaSOE_imz)JJF8GfPP$-@aFZYQVVZhmR?bh zW!Rko<;Vnt4YmmHa)#yX9WH_Hzc-Pm6xMbhhf6S>VL8jNaF|Gowp)RD2Cb(Hh|jQ` zCm)qydBVgJ#E&i#u$*qFy7s_EBYxM zgok-RYMAgSkE*0+t}YIh&kq*zExqGB(M9Jdyp$OVhL;%-lp6z8B|V>&@$gTSBb443 z4hk2jGIau)`y_`Tq#z1%*2ON@2oGcSWR4h^h@d(Pd@GHRHzYtlfbM%mEV}C45n5<~ zgER9K)HCGPRpcFAVCwqGba^9#N zWF2*%WI4hzVp@NJq3Dkw+U^k4gUZPc>L#AF(}OOhGUQidb#yQgh7e)@+|n!bM6%71usjekUV0!qh4xv6ilpzZ)zkQZPYFg&Oiv| zgY~eT^A!Tnrp>Am^F9R9xqY(~@JI}XPii>axV%gCaL-kUGLcgmyJUo*;pLG6eyS;t zv4hi*Ik^lKFANr*-&)mOKEhJxpY77XhGD0<&%8Qo#aYadWiOWad$dd;r3p3C^4P$-}eIF1Q;kbxES0s7g#oA4vn{GLwMi{85m-$%E=+5#Evnw=y;SI6u^Oq)aG9 z;_y5es%-Eu`yqF1F`kO)g&=x2r_QSs9?h&<9yK;qKneCN7xF4&Qv~D{@SFiH>#UBV zwrxC}ZyedAEGQ>uiU~c#C#48ru9}(&^~7}H<;)YimdtH}S84>p3(W}5HKJ>@H{x1K z#4o|z=zZPK6oR7ZgM{w*fEULJJ%1U!*D4kcN4u#0XnA8AGn~!>Td!(`S)5Fca1RDX=w>(Y>g6ZXmi?oMD-g2QBN4(;(b1EeCP4X>dN40e3Pi z({o^)mL-6=aY`mkQ*+1|inC^U8e*xeEmPQYoZ`?n>yw+PTzT665r#$ASz>=AS z?5qq_mzTjSz=!%9zIej9CrX-XkYSEPL2Lq&t*xM1GKS0SrCnKF0UtkaA;ZFun!z$d zYu?{hxBTxxa0!mHaXbl_OK}*Aw>9Y)DV}5;&UxYR7#77Ow@^8=XSuAS44ry+ z5wN^nkM@|oU^=c|?ISaOdl&|hG^z!eGk<*4?)3#N3lRV4$ ze0;r99(bLPV`Hy--sbcMG}NQJT@O6fzMX*Ke4JD-`P`fq=cjf+od|0gHWY4Np46Xw zQh1iL=Xhmp4H^dx6rSZQ#lkWy5-eva773Q~M>X~=PhcH-TLP>mz0fRYSk5vmJPEaK zK?O`NR3mm_rO+zp_mcVPR$wi>f@kr>jID5-jn~`4ayChZMT#TAauMfG`2EjJ!0S1! zK%3VksLkHw49Z!voVBkRxEpCa%#(XEFlR^}Gnewi(45al`PWX!7oO!j!Dkiqc_hzr zPM_13On9yTKj2v|LGQLuobB(0|Lrlt{+qB|lo6@_*a^ zB$MIrc0A7$d{Sk><*T^<$9-I&O7iID1K`pP3O_-8iHl^ketaMB`wDELLEkUoI^g{; zaU?ei-{|@QZ#)MaJu5u9af<$Z_XTc^ZpMb_aBNknu`F5(eETVIWi_yD9yTh1us=8o zTOy3unOz5bz8<*n81$sjIgbOZBfe!bZ65|s9|D9#3FYO;J=#y_UEKmNeo z+vh32`*3;ASgg`S0OKbCyD9AS9eUs{;S?^>0Q4@7k)35v2I@HBC|&2?{lG^H@k5*! z*3bZbe@qBYhbI6pE~R_H>E6MmI~Q>US8TvC*GP`mXx9^_Exks09_VE>5`QwVvO2<{QQz!ARCKNbE z@$Nss#XI-#(M$92(F-&1>1S`?mtR-l%#j^<%--yesoe1g{oTOr>!-2z_YFdRWzDDa zaOhJi^WT4j40T zAbwr<9ajAC4nFvJ4!&Kw2)p(!6Q1i29v;HZonK?cibdG6eo(bEB+ESSb$3~=}K@2wu@WQ8^r(E3R;2U6S(!GF$fUH^0o#x?_Mj=EMhJGFn@C^2VQWt?py4N0l z{o(3u5C2ei1crOV!`BS~Q6YHy=dYoz$wU{mubB92+PlxAZhQ-h8p}~PtN~-^O+@wR z2F!VT0hVw49@flQ=#sPuiHn9qv>#-iG>Dtjgr$dmgP|rB@dK$7I;skJ!z!th?}JE7 z3?jAB0*D6%g+Lw_K?6rC6v}7;$XQQ3Jfamk21kS=EQZ4LYD8&Sh9w4iwFXA2-zJR? zCY>Gzg8^C^bSl(p;mykyMRC~sJSK()FVRXwMJZY*_|#~jRO{&620Bg$3k_i7qr;FD z>Wa~kj(Az=iWM3qepZ|Cl1CUy+Vw?b$6oMt@kE#Y&gdH8haTYpXdmc`C%k*3olkdk z^XZ1}-rZnNX{6Q{V$key=-}290ftCKCF;>MZV1YoDpB27jqHL<)D5hIDoz9Ea4L&b z1LPTIXp0gMmmf#>tv7VZD$HCo9SOzpa8tTNovuMbMG{o$+P`3VT6ro)O&fs#g)h4F zZVxxP2L?Pd3VE{!3RoUqmx$nM8x8QO13EMZvExhNS89T5x)Nz)E7APiI6U*!tC;!D z0+{k?a9x~&!Lvr;)Wb{oYV-Ga$3ww`iCS(aykI(!MkMTbtxg^`d+w5(wX2>?;Pj7Ud=yMds zX8<)e6ES4ki8LS>$)4|d2yL*USCYT*619yffKzH1cmhVvunYtZj6>j%SOg3tXhdLr2-$AB`VEvj8v0=>@*t_j# zw3Eruq4Se)@N|Toi#=q0yCS2$7+J$AAPek)ZbmmzuI{BuF4Z!LdzITqxgsi)>afBUi6x1MN{vBCsvI#D2I%UoP*xj-BnMCS8aXI| z@}{Tznjt`=W?&kWRaP;v>@O!b2?-$ni1y<5uc4#72mG@s?=>vL5ijH|JaZ$EJ!b$` z-PtXE(ZG{zvUfRqmIoBlHRo$F@ss)RvxtSa^>9l&=!r_B@FnFJIm85!T<{hfQ~nLFUsNky){b&WMGbw*wsgToA4er?%G~um_GF+($wp1o2vdM5b7G9pL7@m?Ai z$h zVRf;H8kmI8YBLm779WB|SXnpR;(>so81zdFK>xH5A^%hL!VpYbJRcq@0qCW*M=y0>cqjTmQK&>{ zMmV%(1{6*#N0;!Ph#ioOUQv#SDlsB$R6gXT1~G{-YwL#%h(kmR{~{p?fwgAnM`nw; z8Z^|#=8dgD#-KbnMY>Qu>yMnt)IMeg!?Q3F#V@zOGK~h2)c%Bzq;_h28Y0G~B4k87 zRFks=9OubB*$bLI%UOy=GbtNd8c1q*0?^5sVq(vzY1DR2VK4Ml@iCA+%WD@6M@XR# z>e?j8i{j9O-_wIi5L22)_rM*sbI0TDbxSbz{by10%s6_Ubm*q?geg)EWHnj2CF~}NIhKBjWXkQ(My*L&{lPZufBvW{^Cr&Oz%A9hD`zt)~$3u z5~$4Mr{*An`d7Xck&shgi}y1mH;rNGu2dLCB?&YBY5EaVw}&w(w?fxKc^OFWuWFNk z609bAKkF^9B~jY(He{CNBfT&ad0Cmr z&(1)4ZYFGbbne^~#AYX=qM{6?B?a&f^hG~vS7cqEL|H>6(kyW(O-e&rQlfy-46PYt zOW?VxrV?I0o_Mm|6JndeGJ|PeGN_iczuSWFw$NKL4r6Nz$t7sc;k+$rl}qrOcgvcMP65fZnq* z>gV-ENVW<*@v?*72QugOq7UXD<%5sDcnh1iuEOJoS8?UiQM8P1J*Hc<8w_=6unovU z7wXF~lpix`7(V;#9W43$11$aGLmEHb!L!fJ!r<|PAnW%O!ZNjpETZzONkO+DI;NKl zGhdj7%{za^oVgQe%yJfQzWIXCEAQC59XdO8fkT)Jdh@RqeR|?4ubybk%>T6v3j-DG;JI{uj>pF9ZR0Y)mhP`)d<+9`PD9EoZ}U=$Bf)Y$R*ENif=lu&tas0l zoa3_baU9Oq%HW%q49g{Nb~aw;bog9c9-KcbJ;xlz9}pUv8ii+h`;Hw1EVm`Zi#Ytz zfUk#-=X|jTIv+n`%xHM~)A*?kEawS6*|VJCID>NbCYLnJ+4EdTu#hFEry(^vTdXHq zsV$HW@=DVpY2BJQO+#64F9-Rwf)U2b7-^LZsu%*gr6tDL>YCC_nb zo8vGz=P=%u;&M2{a{<%;28{o$Ns=oJvn9EdzdXR_w}Nsu?Vq~m>;Z3BKzW&0DD=vs z=H#}*SkB9|0;u^{P%~?B5LZz1>S$=DXL=0E8H%&S4{PGL%>yqZsh)+>yO*U{ z7?#Va&!e4LDr8s^r%aCzK%W+`Efww{GJ0-8;B*i?+$yLQ{_OZ~H%E?7%BI@!nzujy6kn>b-ySrm)+$ zTaDE?*m#|fYkOb*Z<`E9H{yj%6L97zaN!&tQ6{e6WUX?R?>GmX-4Fb_44)d5I8vO6 z&H8Zs6zqu|)HvhkmB9X0*tlpkaB?R=9RoZ)4{KC<{OIL}?P>$QjnLxGf>$WsaXQCo z;5wb>=3!v{3S6By5*t-2Y>14(GL;eU>&(4j#)D_(0SA8vsFLH<1>Ai9Q*6)}a40kgCux9iB-{lX{OqyX z7=;syUI%W`b>5?VUD}QF3+7^jHXeKZ^w=4!!>K{d!0{b;bmtH*KRSWyf1JgAhT_*K zA6NJ~t_ZL3(|0LPEckNuC@#;PjPIl5cr;=Z@cSX)7^VI28cxyvJ-CPyk0{T#P63;K z#?4`au`W0SzlDckd5|C0#%ghI>O?AQy7qII=vuGh=9P1}bBE8L%dCZ@Bu*6s%CIur??LyOcJpinijDxFouU1GszbFit-@32Is>C+CGm zA1*PlKZ&LKIAG5XoV|Y>$LR(1igEyYV^9!fri`N$7y@j*z&F61ZgSD5g z^{Tku2b7lZ3P1jn@QU9V;g2nz?l=%nb?NQraC6BjLE!M9666@E0jjdajF32_0#KGP`0BF-SpMB2EdBNceEQLBvYA-&%|fjH`E_hs{{ar~ z|BlY}HLhO#4Ttu9L)+it_}=Ake^Q3LP=8FIK}KVY0`p4qab(5U_~rB0aB|F} z&g@?gpAIr;d-p(!V}BHT`(cFMgyB44lS@zJTSKw))K6G;_)C1Y<88dX>KTllQ;IKt zeh%YaYrw=WMq$)<<1l^AJbZcT8|2U+Ei^j_#nTH=`b-J3XXl{i#X98DcH+oXgqJ9w zZ!`+ca?@ZMptP7^r0v)`D`LwN5NuSSx0?&P+Ed5hlLo%wq3G}9h3<~_=+ws!{XCs9 zW$rWtM};6j?u(=>E5=S9ikhZk)HW2ri=F{DZ#x8pyNa3iT|+(a`KA@{NQ#Cl4T^({ zY;cT=Kxn!Viev*+Nd|=LT>wY&)_EJ5FrFx+5F$^Xcu_N%eXs)$f((c47EC z^N>Ea4%SBM0FP=wQgJpEIyH29Bh=A)D1xJ5QdwcrB+#}QYAQ#D+%Zuq7<4@7ilaef z970Sn@SyyMs3V~_YLH^0L7Q9&eW)B!;o3q>G!Cpm%g`p&G*@EM+$pFSS_4Iz5$QwA1iaAEK*>gy+meT-8O_*#^8jYPJqy}g z9WolS5m#bE*@#LEn>h@Vo}GxiYU(iO(?Gbs1jkS9$IfFrkUyaw+JQL;E{%gnE|o=X z0`w#EgoW3~qi=EuqU)0pkfX+c`6H=reumH1e2Z1TuS4mOTD<8@B79^D6k{_G zH6}xNnzQ$~U8*09)Zw;GEJW|*07MVXfO053b1cI$C=QCDR%nLDLD#5*t~3&_eLfp! zE^o%(-7B&B$4@YK#t7JTmmx63Q#@bpp`q{&4M#{&C_+Pm;HUIQu+kgmU^f(ay5N(9 zOw{-32OGVA?0UlBs~J9Q>(H5`VN#n-5|WDc@o#i z>R2K3;FT1Pgyt;B+&Z9gWHsi!ItRHG8OX26Mi=kyP~>W0Ysm!5Zba5upd6GSG~h#< z;)L{v@cONaMNnEK?8ExwHr2Dn5w#dSV>qti7M}9%hUBIkSm;@ZDKsN2Q!OUPe0$?J zSbb#=VyctipR0wkDgiMAQW02aL`aDR@?sMb8#3W%@<(2CF5X-ACeq8|apKk?w9IUV zwJHvg`O!!nM+1=oCis>p5jBYNQ*S~*NfbPC~ge z%!Wb)q^Y5)r@GdZj^HXQLP|{tEzl!pWEq}c@&?}D_$|6cI-_$)Kj=!REUl3U)CR-B z+a7g;XrLOe!=NE`2#pGWbD$HRe&-o@8iHW2^?_~x)z2ymG=phL&xB8f2ENq>;gQd> zHDa>VB5K#NwHP*UB%W}53dTGOj{k8APr7wN`~a%+R4#$33VgW!D^yKw6d-r<+q3c3 zFCQayL=m<7>{YsPJ+r50b8~OuYLI%o^Wap1Koq9 zfw_=v?+^V7-;@Y32`EqKIr!y~u+~@wG#W9j87<># zQPP-=NzaX^HnumyGgYt+$rXC_$rCEXWT?Rv7Ij)%;%GyKw`(VgyX`%rthQ`#3~)?(Tl}dYJ2;yI(D>YFAv?jpKB}ERLY!yhn=|oLSRV|1V=6jFI|{iNJDn?f8Qjq& z#z}0~&L1Y=VBz?Bcw3e5iHm}hHVBj6T>zP%otO}}SBx7vg>k;=JsZ;>9$DdNd~-Ak zpKA~v;4G8EFq}QdQ|A}MI4KqJGxK4ak%u^j;#0GQ7dbE4I855d0G(kvgK}PHh#pV- zY&3{ZeYy{&few8&<#t3mfkz;S)bTgQij+3BxTL{i!ypJdFWB@K5$LpL9FByDG$4X#Z zg5V73rMQwOIm2xR;|#lbUu&L{M4yj6c`b3V0xUAbl)$Cr0nAIbI2%t)%0Rt!GDh~W zZR>T*u#q*K*)pjNO6#hjq-#i^bILkBNo`$Ebno9AvM%i~cx(&SZCftJGL^&g&?~4L z?Bsn!`zX)WBO=QvJ}CM`2f>(Vz><|;;k%`u;NBnnljWNj$gsTsljy7QruHNgvDIn9 zYrK8G4oJ^U#B#I#!)wpY6|kJ)cWObBXyc-CP4wPX!&06~?RsZ)bL)w$ifk>2Ty-j0rq|5K5z_lK|81J=ojGuS?{ONmEJKdzvArU2}duMT8uoL+oI>T}`83T0IR+qp%!*uO4rNZl6 z&zkA8OTn7unbb!;h^wf6Wekig?=hR+mkjuyZq+=OO!IU;H1ioMw}SG>IavafD;DHJ zF+U%Xv>rXb)eD`y?AaKw^R{FxG17LMfwN=`oh5H>30@26PWvJ$|7?nRC9Ug}w@4~u z*6vo$Dn!)GV!9_(?sVM@oB3D<;cdY7&7l=GdOa6$#OfB8?W=n5MJ`V;Exc}uMVV-68|52e*qoW zv8|1wGP9VOq195Oy47lRi}tu6{UfOF88m0^ zd_Ap+QdiX>VO9}-$7#%ZbO9EwpNE!?OE`Psq%iU+w93z%#Knu3aq{Hpe+iafIDht^ zz;X%rK2QEE(*1u1oJ-+E*h}Ye{v!F2T)K7{*KV|-^;Q>JZr{Z9o87qGc?{5x-Vq3cdJ+B!S_NB*1A+SQKcTi4Ni`x;tqUPJ56t0X-x-*YMjtO-11?-eXGbe;&^J|p>i+`R{&$E4PJD;0xd~K&)1qKJIGQ`U&~}>! z3Tu=%p8~#k8*j$x@l{+T-c*F*{a7N}D{)OIVj;Xt4fU!;};-%!7tK84$@=WzM%C7i=mDnko8 zZ*qUM04FcwllUUw&l8l&ar}x?c<-ql_nE?E*H0Z(hJN zdpBb5qpR`Zd;8(yG!WCKG~%Q8U&Ow>tMS~EE3yCC)i|(!1KxOb3*I@n9Us243!i_q z2S0uHJihp3H$M4bCqDh~5nMdW0R1aMuAcZ12B#s2w;6`{v~k%{Qi6S>8}Zw7d+^+* z1=#<@8XSC?;=T10JS;3=vL1p=dnc5+`(Q?NJmw`OBiDmAhXX9&7dQwWDoYr1WU%+O zz%V-tT7;j5rJ^?)w>Mz>kB^~7y8x3WuQt%&pCkBg+cyOVK>J^8m(fJ6g zN`khIHcF#u^D>4OT$%9*R>=h)d300^G)g^8(TRwPN`zWZ8xmtQ!gLyFG!gXNh!kp5 zUhGFEnISi7p@>q`2FnbiN(p~zdz;?TR5XWZ4I1e5 zD(H1;LD3RvjD;>L0b0Eo(P|Cy!-6n5+y{?F_~31}fe^06DgIxGYZp&_vK_lK2-2Zp-4z|zM9Ho@K)CU-|deJ-YMn2&z0L*TCs zg4V3Tgc)NoZ^9nyg6+pRdS_qVl$C<^0Y;b%=7{x~F$DuRyOnmHpde)UuoO{qY_h)kqUDn#;>Lc#IOJj$#w znm8d(@Hxkf&4O!6Fp?%02p(wGPS%Y`5+G0Pq&y+vH8iFt=E5UA6!IcH0&`SCW0$EN zl#|i~P|jcz1Kq0WJ;py7ENAU>LAxTTR(eD`jrq~Dg{z_G42{piIvJac0ECTBg=!L0zEE0|(-1K+5s~9!U}}s;Omzefe(?l8`|c$i zI{Y!3FCRipRW^Kl91s%fjR1K70+eb5Dzs3BDiBWNgx@8Z#uG-l3yQq#urVkUALN&! z%EtxCA#MnA8wPE-FG5@$P+O3Wqenl%;Un+j_kX;OUq5{f$A0(>{b{bTavBOdZ%0_W z*Wgz(%*B#h31Zg?V;4Y2|s4;vE?8B=Tw zH`nJSHpuDL>^n;bg1zB@x6F4DV{BwaRlvpF*w_F2< z6kkMB9~&!UAWsg%sF@?s-hKhag{e46eYtkW3Zzz~qI`NSqAC*+KROo!HO_eF{5RP8 z@jh(*=xO+;tLQsp#80h95S|~2jF~0Kr1~ohA`nIQto?c8<~e-+)tlI|V>zvLF2OC_ zmBwf^@@7;cbt-M7#}}ZN&J~)bOt@w$5KwGD)QEJUrI|833l{dhFlpg9xCGk6)?+9> z{r-J;D_oIF&tl8t(8p&0if2~A!oRPek70wPkz-Q@-#&xo`f+LE;4gya(ArH?kT5=9 z{OcgTCQTezMWz`rcIIe2_S~bQ&4S}XQMs@IzIiHmmg|tabsQq*7a)9AHey#*i$l8z znzQ(yFl=vujT3XbCep^4HPOwBihDH8=jTB=GZoso6nmK<|)g!6lw<*y$eA(5hz{Q2s@(>hH715rT0L1p;1tw>8ldqVDyDklrQY{Ucyxs zM#GuhqM7xO(Yz2=7=x^-HE=Nbp<(T0$ny1q_J`+YeQhif#%3aq<^`r>8nJFN<>3OC zxFAe=WPvbVTfcfDhU(og^Qjf+t+1wV8+|to&S1l%Y&15oK#Q6cV<9gzpn%4POLQPy zB7*7dMB+c zf^mMvKY`>7g8!vi{s1(W{8(ZrE{k-}&zN>4X>l=9mz5!5VIj;6kdwrbKTFK)>>ha- zET5Jxz;Y9bc|5IUM#Vr&?{0XNLD2aqilUJ@wgk_A^cvLBS^*emr)MB7AqnZpDM(9U zusI2dsVTI!VPHC00K^Q;G4RD8u>=$|z{h~5qq7tG_U{K5H&+47aaabCB~V*(87ybb zYzD|Zy*)5+FpYJ(W^kIHb6MDB;G5&H@G}+$y;-Dte#Yss%V4qkT!Qp##yM*7^)S53sew2VcF9gC9PHPTKd(T00hY za!d5}?T@69IWUx`z*QF{w8TARJ_uEZV&=T*c;cy@xO1;n*lbG7>jBd}Vr7V`NJe5^ z797Le(AS|K64Fe_&rikIAH9v|_dY_~!ym9~*CrSfbm;Fq5b7Kw)D&Nz69;=*XZCRz zMBfY_np1YuzTq}boj*Zy;K#H^R>Gdv02ci$5TFi*JAJ2ENyClHX4xA~zV2}I@q)9v z8^UOf%x%G%#th6#KrXjad3iZ~hnTOtTma@JwAW!_;FdvX25~tYx3dI1Gmy;fECJd4 zj6vjwcL}05>AW#rFw8UPJ{3HfPfDSxXwHt`TgT-77oj4aUOgvrN#FTgXQecptxk< zlfiH-1Y5klLiSorwNMBejlusnE{4b936(uk+e>wU8-+|>4_{zff zk~|EA|F1*>#{ZT42UuP$Kw}19|1+?h>13i;(DMZq$X?NiKX45-+or+1n99Ap2lyA@ zKh@K?ssvF~SHmi*?@H#>E`nxt0W@n1pJ*kR$Z#P>pLpYjyoKZ$-h#i8#gyL`{u^E&EhC9Pj1usm%=E#hYu z;tKZE7X zce-%>W+(2ncjI1LCvM&7MCXkTbab$^qrIa|NLyF?|Hyw+dcg8l0hqUTUq@T_HQ_Q) zevSM(I+=#L8)$7u3thLi)BVNkB(1nX{d9q`;RpEW{|T|c(Zkq66E7}Z#jWezxO@jV zb{m4}`QoiRxZl+QbhY93*Pj5teGmNb4etE>3q8C7Hllf{s|!>e+-bRlyR;zqc+qU& zoi~9mzX2}a09yDNIbGrsmq|`hn&;au<6bAF(R>Lweq3;cpMURt;93iAHn*Uw`wnfC z?%~qy`?x@5x=3YWe()B`tgZ7t4cNQXh;70+<>mMGqw^2u&88wzxXYAmXUl!uze>-! z!CNT(Gv89!uYmJM(PMd&(rdYebDdXlm%-yNenR&n2Y{FVL6yHrb-sgZH`@iseS{Kb zx)sjzPV0Si-MBBxb(-pb;XY+SbppLi%|HBrGY1di{!c#v?d02e7neHk;UpFHBvZ0e zSmr**bt=<0pQHPkr>LEN0FIoags$PF2d z8*yp=B>Wy@#?b&@oOiRrtsqBqgt($J#1qZV_GtI@#szO591iryuVy`d%}&CZ;pOO@ zH3?X^9C-2(;LYc$&0nYT{YqotXR73H)Sri_a}Sdoq4uXfyLpo8ME!Q>EEY{D!MiVR z#m8^#!2nuVJic==zW)40y!XZ~eDK!eIQa5bJiTWz_U@XG7xt~d8?SE0Td!@#p%5!TYe{^YCA;g1jYWps`Yg+jiyb^#3Vt% z!W!k~@n)FDnGn?!h1d}Zh^H+KwkaE7C=FTBD-;Yw|7?e2_$cEjKn=!sQZ z)|Kw<#v)YD8;1$2XJOXXMfm*mw^;w$PN6ZzhSe;n9(J@b9}r{(7usltV+ebJGl&_)=Z{N zW;UWK6HrYH^>`{v`TPdtO{+lej7nrv_@uFUly){u4Qbf^!IOCA``7UHv5&F;*EjL_ zcl$B-;3mNp9LUE0W-*mPW{+0*j2r=!3!|aanU_2h+FA5$HUm&SMnyGK8IZ~mptzP? z)-Y#R@-xoL7rf2(*};gPT_mU^*jQ=Us1!s@VLtR+s3#>OtSK7G5qdUw;?KEhK7E=F;-}AE!_U8eF6NQG-ZmH( z;)X#U_UP|86eVM7U@A`*pwtkPD_k-Hg?6-GjRD@3I=JSB3yptmQ53yz9te!^#@d}r zF=PH%G>j|9K&QU23$YddOmQ>$!Y3_UyrV%W3MjHP(3QsE*&hzjTs0oHv3^k2CBU~J z0`gK5(kGW9G>fj2l=Q9Zz}Oih@yF5cv2o`r^mQ8mS*8{-jnpso2?8uvj!s1As91!I zGz-Iw!Bjrx(vGQ3z_^8@>1%oeGiHs&$@6~*aJ84m04OpdU?`4-sVW%}B{3+UHv;pY zUV{%We1~a!m%%YU2=a0>LMvksIVuzJQ%evzA{Ei)u?RK?A&K6jFMjzD8+I+jk@G)_ zHVjLYA+|0aN#ipGkfm;nMf8*mgw#d~EpslbygE+sJP!?Vf+k51QxeUy$vqv~cxx zfH_tpjJo>zJ0U$k0U4F)uoz;2f?2hKR>R1e%QIhCoO z$z{o?n^29Uf_P-oJ8Ch=0>u+(qepW{K!zGG|MWH{Zk&aJiRGBIekMLT{SQP|C&42% z3_%5vP}L+Lv?N*p`?-_LF(|+aig*Po>x+?*oq)XRELhlCKuL2%($su7<;Y;3TY!MZ zXoQbVfO}yWqQ<6(Ll5ppN2L>#@pAn1%jbwSt7uJj0djpHl`{!Rb?Jz$PeaVeOi{;o zE`Edjg~Oquw)Up-G;NrQ-)^43P>mzx6-I=W8w6iW+^PRHgK!ZA$DnnIP6nS%|Q61 zRK)VXU1&~IPD&A)<xsnOU1hKsP@diL_y5&2k3J87yZW?xGDN z5m=>zc6fp~ptLb~B6UI`q8rlTmJlL9ZU)L7&HiwW4@UjU2}mAW0QdM1p|R~1FN1GV zm~e+Fonhh93l;O55K)ng(0mh8#+M0=@ros*&|7AOoSEfl+B5|(9eNXQocNIBW4!p= zn=lSfg=cc80OUt)njzf6x%H5j7{z;W@bsrx_2v$2`}7G+cx(>b(`4dMG>5(c%+X&w zYdAdPLgAmFfnTCVXzyOeP3-#Q1 zoz(-FOJF%`mz!B00?QTEQG#|z98`=c#tR?6j))k&0FSfM(gm+DyQ~nvTGXr=$}R(L zlJ+apHZUN}!q@za0k>co^`o6FJZRm)U>gH^EDT6<`V3Sv0L@^v1eUXA`QV|0#5IG| z9F8@?f&YI(V%|JMZ_J;o9lcw|tKK}Ysu0FuE+2F&?6`!it4_Y71@ASZ+53@S493Tu~_R8`6rBxqNH)3kzuCB7yDR)O|n{&DuSg{P-I zmd%}pw_bi07mgpoQ%^ktpAdKSvg6=)RhJG%Vun%y9jMl-)xv6;hjhC@$ z`$nu620JH5goMdaQB&Omq|&(I z0~l^YZYKuHD=RC7FkmienKMYuATa~x5)dr`+w4jpG5bpZGp8vDk5dlAW0J#&yy#lG z|5xd9dMpz7&0!^ObM_bg`rtX2kFPmzDGk1t@|66gydN%~R9-1Pj>F;DpP%!1lkT~k z3~2McG{!hC$CKpYd?ew+Ep7u&i(S?j=l4|7ESJi}*PJJ(!}a3&a#+?Z7hrksULp=_ zkh4~KDYp&PPoiRBz?{Ky)+(2Pa{ebpetwV9Q9g9yv6Eb!0Zq0MWs624Ye}5|%Nax! zn&qq|O)i7w43z($0Lx=H)FNg*tz92VQ;Pq;1C}#TE zDGZBhO$jvX%7mYE&BEa%iP%sfM7O>|fZYsEGkC39LGekHt66Kk461eIP?F2Sn&oWl z@?mh9C?0?gTuuNf%+yY@L#p>V%FEImMZkMzW$@M{<>r??Le0`ydFZc`Sf z$&qMrggj_(2Euu~aM*_r6Vwlc>1?!=o|gJjM`K7&Vp#bf!Uq8oSRTH#2Q1euDi;5| zi)OP8+T%ozr@FM_$tFP>+)fJ+xH3V{5| zg|oQK0QbKD!KM5E3Ruo^rTH>i+S_oWy9@0%d$gACwRZt+9k}1#fqOSPaHstSZnw9h zyZt&k+gi}o*(T^h{zv}n!tLAM)s2qMTj=Uw=|(5H?03EU7CJk-fy-UEf29*wnMeN4 z1F)5(`z~RhAAev+7K7!N(cRXG3-^E{cOc9yUc5;Kx^M+(Z|?!M zyUC>r-tOoEl@q5g-oQ1g&y_Z+9IMOU?f|Y)Oa{SkG9cZBu9iCjo4!J0?i5w>Gy}kt zb~7(G?zB?cSAkn>M6wGl=g#2Pty^g6x`}2^zvDJ8+@^9+oGT0(Q(g=fcTq8JwcV#^ zjJ>P z-a!#AQ=*s2=QL$-q6KZ&+i4Mh7svUO|NdQE@1p$LDBbH+Jt{7ji^1|Ut#_z%srWbV z^&Bj8Qy>}$UG&nmwbMYLFxRPLFHzkuwcJN%E0wu}!nIwbN}Z-6U872oAM=w_JD(!= zB#nvVB*z|r<@B!NCKd4x<;`-Fvfw1zJMZG+wW~C6Zc=}+0ahMG)NoX9fw0q$xzEvZ z7k9Z>6z4jn#|ICmNpQ6bZ@kxpTKbOVf+_)mNFKoh{^)rA+76VVL1ipC< z`1(~;yZ6SCy~}Xp<9#p;wZQAE$K&@mAH{*ERtli}-Gh(f?bmh+?egcIT8=%B&c)6x z)9}g*tMUCmp24p_?#B<`?8Bj7UczS|J%WFHu?Kgr{e)C+N5l^tfQ=d1c&@$yYctca zf6i3=cAcjpZHxmsYtmT`Fe+oy%`GS(`$4zogUuRgHwvcQ-pCZOigdK9mv z1?7rTLBEnXArbKtX%jO!0WssEVIFHl^vEd0jf_WJRU(3;wYc;U4-p2U(3 zb5K303UB`MKIEBtI7E2E(;R}*DfJk?YC1xa6v7zX)8D>|g|BQ7lp3t{l{_jBB{OPK zOB>zXnN`S~Q-PfMw1{0?jV$^oMwUgv$LI-pLJ-1ZgW<1nN4O~%s)R6TQ?!Ukih{}< z0ac_5k&!wim`q5HHo>IPLLDN5DLM)UQ#364Q+xI6i(xjlu(fu8AzTNoUlB$kyGSj5i!k7WzzFR0mZK@i2iYn= zM25Q3khQ@u&!HIP?*PkS57>wJ!&?>#KmQQ;x%h<=>_fq<26!ZdBWq$MUj6X{6i%o_d|3))G2xKMDUmn2 z1dU53Aeuob8t;i!sTk^K1rMz^v>AFq6HzmBIEMI>9~+6wiWFd|CdUBxNMES4BZWc1 zYO2$?HB(SHwGs_0$7026Tk+)Y2N6Cx8Oq6-LOYx#a!$Sg#3is?D|pE>1X!+}l_fMa zBc`N7JtaecQ4EYTb&Hbx*dQqLl`|K*X%;P-C#J$FD+Eb&oieLf7zd0P&syub0&Hgu z+JIUu!s>M}HJOkxCLW8nO~&cwAMnd>@8h?hKg8oSC-!H~a$P9oVZn${Xb=$|fiRUC zGNqg(5Wz|x_-Nb^q;Nu-)(=fSUieskp}+dIzivT z^fzpbQ=X-Uz1$w@Wr_IkA8(^!TqR~Km#~#Hn+Kux0mp^z|4h zv~HQEf;q{RjfsM{o;AxEFxQMrLgLJPWXve0cOV#{adP_XoX4VNGthPaI-J6sF;r%a zsM1)()u$k_F$*fnn+=M_&{%%^)E5}PYc5<J_WuNYWS2Y5m>H;cb-O2 zzQ~f5$RD1Exl5;E!nBbns?QTf*BB%f^%|K1`EY8BCe~;-pmy;n9O^m=$LIiI+|4vR zTNv;RNz=kj>x0r!W$16y2TE-q9(!yfHg8>lZM)Z@sIh?FhyFsVI(tqvWEDneMx{V8 zG7)~21_afb1jji48^qk0Aq>uGGj-6X>QFnr3S(w9A+E^qyZ6{Ts^0>K@W8XRX()amBEwcF(KN#mqSqQ8&C4i8*nwaOe#u zy%&9h=v^A0j(~atd}?%1j;DInMPcQ;+n}cMrj5;pv(^m`K{hya^P={%|=i|WP_b~gZWzaMvLO&uEM(TS$ z$YD**O^>d^>h%k-cFPh>m^-@1$R5of8RLuTJD4fxWNZ=w1(Tij%rXm5BkDOeGjM8MV;pEWRFr?LI(YMVL#k1-#MB|L8rVJRz=fE(Q#$7{_ z(CAlDUq?;MMcmXPVMI1@Y#xTuyUcS~R&5qG?pceEzIhjhWG#FQewh8}VmQY5z$rBt zO?&6TK0i#*Iu-AjK=V_fFfts!kT$ndDKDC@n0AFZ%-QHC+hs7$r@4vdvcy%D2$>Xz z=%s~-TFlQ25WSF|&&v^DxnH>kkyJJY%bjBUkvWAn!Bq(YEFZgdHu{Cx!6!|DoEcT9 zSkxrwRC)!`x}|~ovmybSVl#|1R#^kTY|e0uSUDMi^sP74W*~W7DZEp|kvFRb1C==on6;pD$y-t@ zD5uhwlnbz&!EELq7hw4E0>m%-4^UhZ)-+F|%{kMrut)&8^z30xbQT85S*tu{X{n%J ziKc#dShHLL%pV5Jg-lIH3`y+7WC4~(jEI4%HX0GN@dzu35}M^NefB0429?mxPDx1o z3oK_NpR7^NfER;Y5;)G+f4`T&Jhr{!?&$$ve?I}VNnkkx)GQJx&49K9mizd5W6+R+ zVBTs5xFv0F7QSXb4$ojWgV<795{NE=H*UbIeUpuDeDkAg_q@N#tAzkuTxzk@P100X`Hi9=idr=Yni8{w%YT6bDtpo1kG z+??RxWQ#3Z*W-HYCETJ7m8I)Y^!FMH8$Roi*hz zu-w+m5rf@qU=!eq{+>3lupb0#DwnOZBdv?A5fBoLs=8VMs&d=#;R}x=ZdV4!87ODa zT+%KVQcnI40COH!5`Zm%*b+F*ZU3;apVU_zmgBL%1Tgb+?ki4PN`u4kJ-d=0=g)CD zFZO3YPJ`3pbXWtM{rR5b@HNMg;&FHm$M;gc9A8R<^J7155BB3YlAm-a!@^*>#3Rmm zaCtZkr~7c4d@Yq-8k^k4Tvxv4G$hS(DKAc|v1z1;$7SMs7S=3h$`z(z>D|Ad0L&R6 z=Yt;})9mv2mgt3ezIa%xoX31&VUJ-_mb8Klq?BYLBG-iC`3=ZkT2FIi<$ns6$B_TO zn}#KRQ@sGpIUc7c0q^|me+MjQ>EYO}{tGP6T-G3HZL79S5t`)^P|j2=EJ7=K4Fk-@ zROg}|E$U5_4v7SoD_0jnv9<)-O_k7WtPsGqdP6xh8!CJJ$mM$(eP?7V^8a!}R}><2 zWdY0w`CJ%Rsph+T$}A-UF7G2ryg{2_$Ec zG|MH8@_z-Ei)U1C!5{um_=n|TEqNAhOF_Z%plzc!QrmB2?foi5Qk|nV*1)id{5DjJ z!vNj-N^vltr8s}KENAWV(`Qc!u>A7nt3s=sfpV5h7cTbzjCoT$Jo;$eH+5vRl0*xZz@;QJ8=l#oNjRv^C$r{d;$CA06oEK8L$q7jW&uAzZt16gO^M z6kKgBoh`U>qZO^xU~OHu&_RvHCl5^Hg6ouCODAxR61?7uw(Dnct?eug;!bLC3VVf~ z(T{CWUc1yx1HKjAcdnu1&Q+?@Wx8(>VQ*4eZCBcGj}|1I4A^t|FI~a?b5w>_dSPzg zz?t?-g7SpP{hH61KPTy?D*{%+>-MJ?Q zl0e(9QiWKx{tDHf%OL9CM)m9#lrXJrmvQ4xD{kEDz@_UKafSPf4>?*Ml>0LE(uc#I&k?W`BOi>V#ou2Iz`=c8As8Kqo;qx(LcV!H;2E%4?li{qt8EyD{I%{*WyC_ zqEVtlt;DSmFI;mQif%tkAjlT?y$7Motshz(dyzX3H@z%z%i9JwT!-M6mmNKK0BE5H z4?BPsd-vU~(dli84!>b&_ZdR&P;>@aqdUYF-7*JshB~1o#2M#89C0Yf9;aeu_&nSZ zzh|iMN0AYa`wzlz)rq+E5Q6f!%?uY1m#<5kv=~g2@{iOGi*fK)D!`h z$4xK`u-w#SL}F9C;9U)llEK!)3HBcDaFYeVO&%zWd$KXWK9&O!s0zUoFFuLrL<1tt zYWM}Yz{|%D<`@OCGNLhiMkDq-wg!{NS0E)(h3z|+VA8Ax0kCa(elwy9Oh~QE#DtYo zP&S@EZuv17HFp$r8IhR0eg>ZU;spffsA*$ejm6Jy$L6=6$M{E5$+lYrGqC@LxPY`i_P2!Gm;f?Foq@}LYas# zqZxWbILa07SSNGBKLXrwMiz`8Rch=DS7NLz97#a|h}H!|6%_z~y$>A1T`)L=@{!S| zMdkxXe}A~S`@q}92Y!xT@N@QtkGnTK{CwaV;tL0bFT7LKSpD{H$V$z^keO$?3PH44 z_RiEGq$nDyiUdTn@u!KUc>JqZAS*UOSD%KsafOJfOGDGN;rQ;SkMP0gui=w#-on1u zcH`}D-#`XypVy@$nOxS~WsSi2rW{06BqDcatuQFnhu#L zMe*iV!lOVX40863a6t4(+JsN5#Plr-P(P;$S@i`7PtYQ#p#WRnF;l*EMW+g0d(dyXD)L#{HdUKh&4C` zw>ia$BEMKlFLFW(T(W|YJd-vSGYesx=mp&b+FVS@7W6L+mIse8Kt0kZXpa&{#$eU% zdHDYDyZH0i=Qw@pJG}GObN>OBhxj8hgvO^#iC|SYd^Mp6PzDP-0m0$kkcE4|%Xb(` z)j@dNPmK>kW3g8iiF~X6hz_+8#)$v;;Q&s2_a^@Q>~;M1`5XA{(AT1UENFhUpm(+x z%{vwzHprRY08MQg`bT=elKMCxK2R9z3@nX6U~Lp!v*ZXbGeVVT5XJ|qCsg8%k6(q( ztbp32fH5r!eO(5^KSqv#WEFg9+hsaZeE|HD!=a;jNmUasG;>+Ayoc{P4)R7bv@~xi z%M9>}4S+m8jK2IWXdGRMrR(OxD#!}GeESKIKb+>2h>~b%%c7txjD)d10otkGk``0$%IF?ZQy0hsr;r@7edkEEt_q)(>} z)97R&92jDb)T$H6aMFZj*16n~Jv9g<2?FvM{n%<)=`9b1c(G^405 z8}Vh%+OQlg7QVPnaKnez#UP~44Bv7+f~w6>jG#Gec(Tye_oTL0r)aU~)!ir`S&aFs z=OVi@3%yx8k>+LocZ#Yi5ed|9vRnf~GIdZF#Rzdvl*2G06Pmgdgp`;B_d6fBn5t4~ zu5-i0`4jN*C+`URAM3WQM0!;^66@39o)Ut93Ozi^G>}stGCh%Bg$}b`TnX=tFeFmB z0^(#)CWN8;?j`JaWGSuNu490M1qOTeL&eN;xSG76DAhqXA^|=H;ldcFM`p0#b=K5G z!!E`Xez^*9=;4vALh5+he5PwDjlKv7^Mt3by)Z`2R4U#&ALt6Bkv*96Gsbbbh#^0wU@4kghk^9X&K{WuRiYB}Xs%qlZ7F@z zyfm&8i9Ne zzNS)Wl}F6Xf@*3iQrFcAkUVl>uApK`V9;P;9t?A`P`Y_Eyi1fYj!s7umC+?GP=MtM z>Q`BQ&)@D@qnx$NSH8L(o{6;92pEc_G5Hv?X(pCFy8&+;{usY>9>?bwf5d@b-$T=y zX|OZ+Lrvd(reR@fm8xZ91jS3u%F)o(#6eRT4F|I)!ipmikgbHB(Hm|F!SJVcX3cU2 z=SOas2G6vxo`1bWy1+s<1pU-DaHqbB8=nJJb&LSZnTDl&-blEagW+Wk7nBz~*L~imNV!kX`xFXHG|fyt<7LHgW+rplMQ?_XL)rk8zRgV{tQw}!eBK6+W#xCTuPto zz(zaS^D`FClf$!cn1{0BPJ9|L_41L9mi1|Rt_fPqWNp8-m4 z3l7g=*k#a=+mW^O6Br!kXVh-_rNx4hrLw*jezZnpDi*e#W6`g75BO|ng)n_Mo_T2( z4u1Fygn{Bg7BH73Be6CQX(P%Io@9bkurJLWJ;oRN4d{zitC!*RgD>OFcV0ywt3I%x zbxcUI7HN%z$Qn@uPmMn;EPG*qRbTX?ILR>vJh5{NHmzQYt(#WE#m5moDq1(tdPtLP zf;Kf8_WrII>}1)a@lImzW{-b-`z2m{={by_G7f{R2f@oWrqpKD%5NE-#mh@1^H_FAi)-cwDlK9MuGS zM_RK{-*Z~5t*-+gBpl_@psS<9)rfQN}=*jH?z8?VB3}#cl%vsI=`Cl650xU0q za%GR^xr*|UfN^&J4w63%j!W_|0RFK2r-noyh{TD`!eG8I^hxa{X`VA*JOkkjdb7*m zHrGqPf$GWirat0>1m<36;9o&$gj3tG%TzNGSk3^spp|(*!NPpyd@v9}@!7~H_aAGP zCoQRjd1@~Hz!@ysvrO1O>b}>8i&xJ66Ig!bN;4#_@_!dt&fMo$IKA^1NY0`8>SeUG zT}M}UJG#5t1$M~vA6L7tqWNYsuH3$cOZS>VA#s}I-2FB*cilv5`~Cls|Aw@;-^Gpg zo9JloMt5tsaIbfC3oY_XH+$UMop*%h`SH75`14K&F5jTtBenTe+Htf3f>-`u0o(r$ zvB1yY;F(l2aQ+C;au(e;+tJ*~20pu~B<&D{>SxcwD8H!{d?l%po32!NSL>qEuqqghEN}GV|8n4?2dNayK`62!rZ$_9neAp zy_M3V@ZA)jAKblro1(OcmjU?p;C4?F;n$D&>0zZ5OZO76aYf zvkc8CyQwv9H;M1aVyyp{wOCd^hIJ=_DW(e;4S)q$I#`nDY z170MwnY`;e2neymJ>Q|^+5-VLxaU3?a2o=+4g*}sW#M}t5`PNkMXu*i+;$s;E|&r5 zrf0W&Y|$OyjFvzrTnhKXakV#&#mexh(gk0W`=ZPqUuEgAFHMP`UfzZ`UfCw7SbqG+ zEBOAam+;z48}azgIe292bR0eOCe`;hw6}bVqkkO4XCFO^Uw?c-82M~H`582{IIVE? z#O{Jp>?^It#`H{72l--nTm*Knn}hvNtixAtJ&SB*AfhaX2pX2UKsjc{Bnv69bw#YD z4Rir+7-ne!JNw?Sx3R$3njD-w`~|E$`e4+`CS**_N5Al);;)|lJo;gv_h9JC3@F=N zgY0#MsM=nKe+PG9FASfybwjK_`kf&3i z59|XxVC(0Gq3*WmW!Vp*`Y`N&^F_p`n_!I7AXMQ)8y78#OVY4<Wx;ZqzX3~qWAMk1^x5n1zwW9|zZ z1qkV#t`=PHZjrtiH@ittZ+!jZ2YBtn7x4bKZ{q8tU%)-W3pwM81i$c-XVzom+q<#w z#f<{|vN8D!O>#DX_-)Id*!|IdXiMVYl@f-eDaA;iQ-xu%UMN{N2JSiGh#ZwBC>=h% z@EwkHox%m0A+FGbGS2!{c>r9!9pN3|2{#`nxcR!mSLOv< z7aO?wIYXumMW124;VbtOn@x9xJ6s|>kvp{<`+j)?!L=sHM<)sGa^pOvF33aF%sd!o z-J@y#K-AOHpq!Kp^_0{eZu4pBFi;%xjBMz}CBY>t5Gk_? zkTItS_Nl%?3tBxfO&AJQO-zD%LIU&?;$dhsA*w0@8=hW*Pk(%!`shQPIQ|d(@ZASU zN{&Qtnm5#nU>E{r&<4xlqYQ<+CIo)U5Xiy;p$YbfI>Z~EGDm2FoRHVAAD#@;;j6ez z)LU5K;s;OT%<;GI<99FO*Y97)?_a)-LtnmylYe}NKK*Dj?`(I_adi1F)g4ugj|RNTAAhru$!8?K4rurme0(HtlY13Kz`VNd;(P@00{ zSN{|m<$T!f;B75{M>h&5D~dvJu>nCJZ#K%P9&*Q&f#m?n$)_Mq#RNIt@kl`i-(|f=)EKJLys51*rW# z-@T2o<0`Oy_bLo@w7?*bzL3+nbTfO4wzZG*7PLXm=|R+gf$+~$!p7`DW7rj*8FDzK z$%Xw6K4`F#ISGw?w?Ieu%iJNOIXgh>gZR<}1SZOnIk6bAqcV^>tr*rZUhps02%3(> z=>0JQ+jiyO1}f9v1#q2r4v* z`B_8rs%m(uxDKVZ4=#%a)7P*jbwpVVtil}NA03Fe0uvT*n1dhb+nz?{vT*N_Sj@dSWcVS zIXUngu7iAPB4TLs9m^VH^Rp4Vv`A={S8g8?cgavQkB`(x)PPvKiyJH2-FJ-m7H6YTrpRisQP6ckPjl8@OkOK5^OuAhp*5iSU! zZ(a48u|l()4FykqVj=anTJ&@F^a=#!XoY6ES3J!>DKu_#%&1#D0rU2*#R>WXy?p3H zjN3K`TR(XkV`%+mpX?{bVZqwrLc5%SY&Og(fbV7bg0uW#iWLbo|2r_wu0*}^_wcN( z&PF|1_?orLS=&5iaj^i*Sr{;G@^5hf0RQw!L_t)47%XRrp>In3j4T0`vt~JiBixf00uYLUp4h!Z#F0lUph`2qT%3yNtONu{$dQA^mDWnp#KmXD-0Mi7+!w9f|78z<7YJfR>JQAP2{rS;6;!E&bLVE4ZQmP_C^ z3*Sp3f#Lsm^8b{EMFPuNv)oAEN%O)=Vc_!^+R^anY{V?*G<$$@2FZ<_&I2kD76!_h zLgX)yn(8lTNgjaO3=Xp}sLO8T##$kKt)=oP=v&O9q&Aa8(h_HboiUq+i$enjp|#6< zs8pD@T+Ki@rLU$oXOX~i<%&Wfl0i`kD3`$Phkg3G*J(t^Hw8+SX}(0c6>x;p<)8uJ*0t;^o_|IN#NZW6hUw zvb~iWh1!hdSZfu4dKs?cF0S9dLvcEAn&ia2Zv1+u9p7|Z!SA=*!EiU{ z!9e{zrcWVZ@R~VwxGZPylXO#_w{GF`-J7_2w}bNKyj#(HlgiY=fIl_QgK=@Wi<+4l z{dDIQoW4mf?k#$OTQ8!8%G-uJ0#Cn$dpLQE>Ogs1xOp2b-FF4u3jaNU`F!~BpygI4 zuH3nSOLzHC@xaNB>-eMn8qVXs;5t9W^f9+PagvP{+`fgb?g!RTXgyj7GU{(r+$E&We+g!F%0*;EQQ?j94f%`F3&-@8Za1VXrpy9 z)E&pd18^kVAHT3@L-1>~3g4Qw_{gNhkrAa>>S2kE+5j}~T8*nuZAIz;3w*MCD%w6j zfcIb6jF+C>fLEU1g!kWk3}1Y-51+ih2XDQ$4F~qG$2VW>!gBWJJ`HpZpk-BA0zeD zHfxqQgeU}1&f4WAu3o57E3kBC6SnVKiq-39V9lB-_~_tXoICR^yfqHUnv?}~tr5vn zb6~2DfrElJ(ME5S&8G$2#tLMu%cBKA5t3*F%`_}b0g*f*0p?LgB(P@rXah_m4M-Xt zhXmTl`|JH+<6#G9KR4L7E_Am{8azFQASc(1s@g0pSvnQPB`F9C^~9`cqp*F$GK?QVAIT6uq{SML zmK05!7c<7q9F5ISZNaF8;}H<)kKBS-DAgV)tWU#}?>|8s_&i~}F==KQ(&kh{Rh`2J+E^&m1{h1L!zV;=X^M(h9RUn9!}XR_*ceYXi5mI(&bQ% z%7m;g5qV3Ru=C6Pc;UDA@!`4e@x-SuA$M#s8mHCciyz*@&nLdYKMsF}i?`3=^>1HC zKffV@KX~VRPvPxTU*fGZUtz+oh44sIBC;U^D_(yT-?aaU&9CppcUO-fvWzz1O*w+c zS<{e={ACU39qA~*^4vvrnEu2vJpJ{{`1tr&IQZ>5c<=jkt5SLh8|cn5o6kW+u530<>bBwqXT zBWOpaLf({&&@stSPtHQ*^gI}*BM{Z?U#3O?7I(e?YAG{ zWMKgh8yoT0Zwq%@SkQP&pEnxHhHMNq_`*KMA3ikR*f6TR#th}~cmx&epeZ*YC@Boi zN>@SGQA!*CJM-20vuqg_Jd1Q2<##P1bA*o@2YD| z7~EpR;b;hewaOFD5q@w|dSK4Fc~sUPaqQe5_=?6)Z!6m1+4q8-!5h9=YIxJw_bt*2 z(3iE{Lr28GEiVjVl~D+yX8{Qz$Q_=8XAeGw+4CmjyWhUTV4q>GzHYOvahUUlmcqnS)h2ci# zZnqAy!`uIO3y;#6o3ms(=xYvd>Oa<$j>s~>F*X>zR8DYDRZyHb1Y~F-&oRIwK`u0P zo#H~^pQ{(3IUjxmrl?^Z>Wo0640~UE9BWoC!ooSzaP9gztfx8;^cjK(n!h}9+Ed2oA!%YhY)tM5uQG}*ktnwyR4ofF|v z7>3vhIfClLHJ;L+SOjxprl4V|UOrYB_+-xVrj64D1q<`jGdDgP`eeE^S5p9u+hFl8 zr6790{F0S$iIE|Ccs7dWjznL%Erzd|1g{i1ECL3I`Ncgc071D*IK}$XTx5ZjuWl1s z?Up)s%-p*i{lo21vtk^4GL@M8_#((km|mz76)Q(VQyU}x5fYHE5eEvaSzb7!j^-6V zxEn(S4aa`a=pAfB>4pd+qx{bq|2(ZYoGDz{Ai(m3xdj5mPNw!?u5s2ZXR!P~ z1Ii_EoZY{Nk)E?in&d1Dlrw0~20s}rXOKK;VPTJU`JCK;0?T7(WFdjRMKKeS5INE$ zXjoXYocks?J3`QM9Qf*8$h7p%Fi4!9fz_OXsFXx7SRN4MFTnDex@xdyIcs%uSvZd5 z{v90uJ9y4v*iQoFrFfhdr^mwnQarw9V4StaIS!YD!?PdX=NB@+avIe;TljN57_4Nl zoB=-Icqn{Bd}$3D1eKn~pQVNP_gqwNBJ5<|a18Z_FRklkIvt{7V-caFZ&OGJ zG_*dIQ(RNL8TOuz2#Am&y*eN6>HsJcBN1v+L8cGGsEJLGg$BTzzTq2J(ptK4IO^*v z;Yj<9%273xPXeq1T`120xCMG+`1mF)T(uP8S|y_6OnCa4r|`;wmyunN16yZ%jF~zC z0ZJMA*$zQJd-`V5{BPyygn>4e7;0;c{(}d>jn=0OvIfv)xtOYFr=qyrR?DD-7 zPs)e=StKx=!|-!{#_3AW`C2LqKjSiRUL1$V2>Wrqe+SE@dx^W9HNF|-=CD%xarzwQ z;WBVM2`rc1Nsh~hS`2(kv@RS^iqH8mB@4&rXUs8gj*k=Jd-dxp{uRLo9uf@;1LJ%U z#A8|l&iRmy4}`d{%gZapyTa+lrpF^bKLw`JBtgZMvyA4=K?TY%iGUB0RZsArMDa@ER$zckGM4w&;bgYK$jY@D=*w_LfD!qdG3ma~X@ zF)a#f%u{=5Nd8WX60^1zv9!KOSTh`n>*|rTZUmCoHwsDGI8xLvY0D@iY-~i_h7m&I zA6%O^H2jm8HugyLhT$--uNT4^;|#?A1-`E+7n;uG#OxW#Hrm;P`pq1i5D}kz52$pCNy?5BNXw-;xv5e#c0To~5=WInA~gS*V@Q zkozaMFS*n|xJ2Pk9iuo$d*WWA{<+@ze*v}sU1EVFC$KFm4>(7I;c^SWU~pSEy1E(E zzJ(iY9k_Gn4q7|gaJi!e$F5(+1>D0Qo!z){54hD1bX@9UMQxmIzb3SzkKVq5V>hn| zMe=5ff0Gg8PT=14`@)DQYlt)75C6rX>rOYWx3vmDm(%FJd6(+niPp9*v@tmRfWPM2 zty{QyoAP9!{O%20Bx$+X-Gi!=Fs;gUwwlVcDYQkpakm@I%~T&o>lx5ztyZp2S7Q~zg+LJj>{VBZQVU!J(J8g z-@QZm-RZHA+j156Z*>88?x90ap4_JmGre=<)p`eLyL%rkcRDEUH7Y|hZd`8`TKrvI zU1)A?!_^y|g2=v|%G7+lLxAKxWPXa%e!(V7%9Yqj%2X^tH42{pcU~<@7Ne zKXU@Ncu@ZIBk;vXz@wXRCMN|){oHWF!vS!$1p=G^_aV3+V2d`_{&eqvJ5GZEFFUk* z48s-L?4J#D!Wo4#PAEyjop4y~j311y_&m-JpJznj+p=sN9aD>ob0?!?^9tO3atFGf z+lA(*cjElBk0Q^*8WWQA_~yCC@asGK;WfwtJD1PK;cwr=+pq4z8?WrZ>o2i(`5yfK z;~Ths`A2lM{f4&YA93uDcZ7EN>0|HX>c!9T>4&@U=b-~=yY@Bp=OL&pERZ|I8c*bw z;o$Jm*i%@BndWHhnm!I606;;%zQ6PszWHE34uAa)>S7Iu96AW4UI7@dF<^dDCZWG7#ok6rf4LLi-EZ*62=jFB#w$jY?T?_IxkpJ zn>hNp!cj(>0GTH()&t>5Vi({-3#KG|@$2WvtIEOjMU&7lx)NV~`#!$;?nC_g+vj-Y z)xB7=dM4)0AB*aG+Pq}PVDZxFFht2Qy0ILGfB6#cz4km(Oj^Y2RY*4JFm?oe5cT00 zH*q93Ke_?Q`N`OSa35Z!HVO%{g)vEv_kVwz%ASj;ahXV-SB1ElWr&|p3Xd2C0u35y z4JPQ6(TG(gB3@1#t56dRAu`0MWk`xtBZf8#`mj)_G>-yi``JTM#~YBZV=QT2@%1l40gq)5O@3@5`ebQV4Mv0#>@Ur7#`w)Xss6_ zV*s+Xp02R;@ep7+YnC%$?&$3WM_+I9cSApa2lNkf z#ZXfa9MY9o`Q~HDo?8!>GzDC;)v!$ugHNRyR+(W49+8aT;YkRoO`wf`GO}jXB5ox0 zbzLUH(sfX#X`xP1L6sN|b*c)Q3=JGq&gknq5c;xM6wIy>i{7R!GXH9 zR77ZmMvO{HWv9)fIZ6+$GEBH(@?bhp=+h91LYH=aB z!zVt)pTB>CwnIO{ljfw5!Pf9`a6)ev+IacdBYnX*s7B<#I?7*wO041RTci`2#NZ1LPX&*RzG_u&q@P*zibA^CO>@k?;K;}ATZ9sjz8kgJ7 zVDik-RJI!^A5nzCZi6r^&>Fh(SOgVDz`H;VWmA$Umwjdsd`q>EmFVDZ@c71dt(S}bOGYPj1L-yg;9C6ez1%1 zN8bQ@@t6EwE`tQkP)>QK0LUjyYQUKbf1vf&1q^cTL+{&QSgR;(t_E(Yp^#DEu|ZE6 z&F!pJuBl6ewmc3|C2??(yPyNDn6Y3oem(L%I`6e&u)_d22fDyJG8op8-ZU0y-iQgp zV6`iJXfAQ0F~Zur{^=Un7<|Mtw}enw1X{r>Mh5E;N0g1J5dBzHnvbjJ*q+NxIQcoi zD%cK&ssuzdBns-4kP$I(E)0iubTXpH)B99mhN(IMZq(;-`7y#sYtv}v2+l!}n#Rrm z3t_*&n!foA&Uz-xVc|PK*i0CrcZW^1kGN)kD=OPyDyy|A7<~gBgsq4=YOCoBry;*I z6HOC`qjGc^?5OV@RIZ3`NJILhLL^V1`7Oo^s%jH#<2(>ltVYtLY(&+>!Y0ffGuKQL zZ8mCZgZOvjl68wQ$Z;qJx>`b+YJ?^AnWtHW-oY;L&xwX#t`VLYI=Cb%;Y?$}ElDBT zi@CLJ)oxm3nVu0zTCk-~lg(?_v3oNj3$BIo5nH!B;ag@uS&T7rdN??gO3lQhgt zi}InHnJzTT-3#Q1r@5WAm)Xc>)>PUsSHy_}CDtSi%88&c;4DCFreSf53x-QfAQtRf zi)a3E0N=J8qP1-s)*pBTHH${UB{~rDd=uiBZ+T=sn7g0pT$qN1X;&=uE&?p?BOeNz zD0ld0DKKT%LfBIuGW82J^EjT%uli7%*pmoS&txC>6rj?8na}aGXUl^vRSg43aZf zc{1IzcKLq>mYc>UKsUk&&2SSm^=4tDRyNi!$Fk;j511~r)3g4=SSN$frWjUgNJe3C z0YbxMf`+B4rV^}0&gEcGn?Y&@wI#|Fj?4b+Cjs9QP|j&dAUL~xF9GG8ALq~hQW^M~ zfpXRy=Qs?OOYyjD5@^rmVep*mA=QAc5#on@E5t3x|~eb_O{az+}Ku z0v080-1J6kt>IX^++t9Fp{?y5=nJJrhJauX_{x1S%)^$x8+Pze%HTum z7aMO6SUS5PKo$lMPj3VV%McyS+VYtKu=EcLMvyiXj)86n(9^m#K@UH1U><-lt(?-9 zLlqu^)L0Wtk+jxR$q}XwMSv;@Atn{V;%I)=DPV{{tOZ`O^?)G42&~CURYQtz;Xu9 znUaOujsa%w0|sz8EZ<9DHT$thAT;|i$jhKI$L02y!b} zIcu9U7|zB$c^q?}vX(hN<9j{`V$Jiq5e=xUtQP&u@Beo>%UKxQX3cV@VaZ<6h{I?>?Y0?+Ue=>EF9GHf<%mQ(61}00 zo>dAEmx1H7tz(e2ZJYp$W0qHof3UKsX#Jp`N_&Q>dC*MD5%=K})Bn1Un3fMM?LpX$ zpnZsLdVz46F4DMwz8$M;k-ljpGPaIF;>LQ>=34p=MKTqM0K}P>yay=nk$eG`|DCIx zuO)Dt`Ow*qLGtj$dE%a*KMa;LMT$g|!rI?@t}BUgWhKljDv?6D$aflxYuzV zxIu%bl?D$>`&IJ0hR&O9=<4dg{kEIrfAfL0*f!klyhd^r_c=~G#bwp{YaNs}3tbBe z5q?I4vW=vft}l}x%O!d)2^-wJLc-J`Oo76uJshu%z^VFm9LE& zuBt3sEpUi<@VsZFs)59$z_To(q^IXTn~vd zh4U9e&zd<7=SOMZxPp6~SEvo>nt98)U8Ojj2FKxas1EnfQyn{~Upu)S_&}tY(x7{$ z*ZKWV>?|w-jvvCEyI0V9uNha59>clsf5-Ww%;|Im=gyFO`Y5iR`4xAMehqy5IzXGx z>*>ij>gs?tA1A=i6>uZh#S!rJz!isKXp0WTCn2`@Bry>0X36nEu^yifPr&yR^YF|3 zO8mBZB!1pJ3BNwR4BtJr62CsZ8Ao4z9EV80eQq1Rd*yNb`SAgq{O$v216@#En2I+J zJcIAP`xHZl^~Um53-LK^M&5bzDZKvD4t)IXlX&~JNAcW~E3t3SGVFe2E}nR70iJzw zDZc#V3H;;pr*Y!Xx6pm#Cv>*`fLonE0bR$Tu&_X)MPEE!P>KB&_1KkLgq7Kucx=Xa z9N4`9@4vDKNB;3HO7%+UhYUozjT1&IA~4;Qh=rNiC<=7Pva!YZ_0PBQArx@yUlp{wI|Tlc@Fzuc?=~L>4=DygL#da z65-IX9|YKR;@ly;^T}(-EKGvRAV+L+6q3`JuaY*%V}@hny5(3pZ-)4b(z=byAd3t^ zKx`QHeDey-(`a+Klolv6X@fbt1Zfj#Q<@V6qbdLy!GWj?2*Y?^1!lUdFvm-aSz%Ea z5w1m^UWXJ~>_z7%Av`+`Bt&X8 zNKiOplExD6M%d#NZT62-ejm}MXPS=}io(K>5D_7?veZT$G^PmXqSY`OHPEY6h+yN4 zG8tUGyEF%KCZSHN}D48#0U(KyJDcm3$bI1u=CRw;GL-w znyz6r@$j#RhIg3(mT4jIDvv^FLn4B!Vh~soCA4o@YqoOMaIAT9J$Aje8yjBQhP5wk zMo5Mdu??w+tc*p%=qzMTrOn3dYHa`H8JtENe!F`HyFPgiiK7c(s7%J5k6*-xC;oxY zPJD}(|M4bN1x8`KkHK=ELJf3d(~-M!I1*+RA!$Y-a_3ZG(Nn9@xL`Eqte->UVhZ-r zSa|1~x3Fr@O03(r0n49UgW~Bm$eKVKp9xh+s>*_^%u8s;Db)%nl}bcLMhQ`>G(t3L zr7*&(*J%+Zmx+75J_0J00%2jH2oI+XqCzf!_6WTe;mR<`X;a7>d3PUI^tI}R)Up(K z8~gX!FO~t%u8s2Iz3%znJ3etQ3B1aGJRp3nT^m4C zR)|gtr2g1RbNVHC_w55WnwO&eLNL_L85VBCkhO3E!s|1I);DVn^O*7~)g!Ph3ToyG zFQRv>g5HP17=%-p4UewHJ0HC+{wmn3uLZ0eEz!?r0Ag|y(J*r?rmUHdsp}VE+$tIi z8yBH&-guNvYsBc~Gf*>o3^E!^P&%<5RZ|-T6^}02fLA_v75m@bk9R+PLx2s@sZr?d zF%+^aJtAw9F+k%C&rEthtD*&;G`sQ&BjhCpq>ag^vY9b`#Wd`FaTnhE@O8{zI$O}C zFkOkcGz+Qqv@yttMau9J#8&1avN)aUl#S@h97L99BBCS>`id+VYiN^FnvT$PBRs;q zk(?cegYUkKNi)XaF1p|w=7B-312MpR2qH>jF-Yr7@1FtT^e%?cHz;yUx}b7l&~<2l z6-?RDxYTh0OE)aSw?BV{Uk?8OXD=u8vFb^+l$;h7PR zuDg%Sk1HG)!JJ=2uzC&Q) zIS9S{t%X5h3lF+?8$|w==oLiw^sHZ~BYOK;qrZLwP>nSq;aSMlhs zE$B7O0>c7r;Fl66jH$}&W8qpDF8(3FeHmV5f~KVB-wS?Gfe6tDV&|^Ss2^U1#!>Yc z;xJV7XK%;Bu#&l<54FL7U?=pGIrq$&)IR+~UC<}k5d&o|7_9I>FS!eP(Q`}cv);}_ zFloVL+(tLmw+YueFX62(4#L8o>gqoXL1{`Pjmkpem~7Y@+@Yc}S(#kmoh_s9DQ)m; z;^3rm#yj7=iKCYeVe4b-1hrp&d5)lw;)6dvSRUZ#1P4tJhADjDXbKg=G&;71Kv?U1 zV56n)fW{N{S}$0II>0i}8ZL5YT)A}t?|*$zP_VS$x`^zmRP+iM0>j936fPS9)yO0y z%_&3j+;YTE&xc*SH$v$hZQL>$7V?2GPDn%MD%!BGuZNu00cP6V29AkA9&NDMz-RHU z@o0K=p`c$8TIICSjG+xT)3B7$2Gu1uM1bW?!{TW66P)GR%6Nq2=~26KywECljt#{4 z?Q`K|@)!Ti@JR_rP?lC0_+;Ax{61KzUD2?7yx_GD%3|99S;&}N1^Z}U!9UIhJ{6@= zSh9aT4%64?2+rX9uETis$a@bcSi<3v6e^60TIoG7`O$?4$kif$UL7h|jTV~ay5aFq zQvVE#a-;bvmdZCy*fq$TS}io%WoZVuo8*|Wa~VFr_$#)*zYnVpJc7;d?!~G%AHnk1 zw~K#%FbzxUqEcios}x{)?ED-7mZz;P6Po1`KrU&FOB&=7fS$6v8v_&P5SfNtF(%K4l6E=! zad@tOUS3|0wsgrq8)0Oik%4p8#uaWs9_pJKQB+ZehS5!e%e=Iz3|ZM}$Suf3S}yfL zRx(nGb5PJwjkL02=;CP|URsXKTpBA0sYr}Z5(X88)^TaE0J)=+%{0%)!JH8fV@4d} zbCQu(m?`+9lT)dl)E;$}Wf)Ogg&b-xrJCl>umFS@6woF{K@p{eQm2MoP4g_RYkhl`|~&y+RzWcW_G1;4E{=BGK0@7 z9FGBENxPcENWifqQl3&dIZY1FVYy5khFy*)rNw@n9s}F#FQqGi*6gyMlrNW&^WbNk zhD43RaTpk9fSX;`3TKd5&9iAc zM~QF@f=~QtBO2dW{#W?_l`uHYK)H_65&-w=@*X3d?2<4@&ITx%R^?%^JZt#~{Dvzi zTR#y|OSn!<)lx3RxPj`tnf9M+s-Rd@0PSL$`?rlj>c%FdZWxK|jbjl$J_C*gDumR> z!K)~O_DdxB5%9{_z%xe;*Q{_jr^(@v8Uj~ZpSfg)3D-SG3GX~DybIVcyjIw-@vEdY zXjue8M#jUdDiUGiQjxu>2`OvpkwV}3q)o%2rE(}2Cvf=~xg;$osQpQzS$9(*=- zIPlr06t4MS0^9!%vB1$IxcBWh*fVl8aN-e;d(M-epQAy3j)81SljC2Y zPC7?&>OuaeNzSlvUL+?;xIOr90w+nN{8`SBoFX~R_vFuci@#&g{V|fGEOdX2)8VwK zZO(ET*rj{sfaf$gKF9kfp=bXj5Bxbi=PlL!G6}aKmsM)3<1BnnBHE0E%g23kf(GOf z8l3!>l4g>RKEb=QXX1}n_5pXB(R$;Q;AFZ-al3y#jcZ3Q;`E7&`18zp{7U`)>)FFp z?B8(r*pI-MGo^Gd@1@CHB1eG!n~_F>}pKsN$6^%mKa}bjmg_Od0Va&|dYZ!7$Qt`;1O_(sL5gWFx!o-DB zU>o9uz_@Tc{=q&3rpVzR=ZA0-b9@j|^q$BLc0jea17-wyW3y6$C$xIJY>2~w_zXN| z%)}f+5(>;FL?uTfFpCx+X_4@Yi$JJ361wO}=t;COdO>3s3J*$ux(I^ZXT9i9tu#k`w%jgP0GVj1Y;1`9WP3=1azP;d0{u!f`B4-P6{_{D}}!QM5fUpWcR z3BmBnP{OZJ5BEF`0;|mMDApl-WQqXKc_E@}NEQ6DrL*g??Z7U)^V9oy%`nwE>?`DM^GC1K>|sidS!UC#5f0WQhd~8h#9^JYe-~IV9&bR)6!{0s+eET|nFU`k?Y7M3g9RM|jA2`SY zcA-P?!=Il+7v_(kzJuXz(O+neS$Nu^WaTuN#+M1I569>Lco*prTo;Rwk|?OkXuQP) zBC0qBd*65x)nhC0$P-&}@U8urHe;;Vgjw1Q#2}mgkVn#nTpfS_Ll}JYGB_)}1%IkC zHBxY{Mr20Al%D`Yh6$1B(eT#>AwUy|yqbJr=w|BtDYPkzhpVqsk0CQJE96e9M#JhU zf(AkuA1%-!jK-m|CI)V_;V{-GVbK$-5MT&HmQLd&1GcbDT98BM^3bQt^#pG3su;h`o7{6>9 zR_tDnHBW9t&Gbf8Ppm~kUOXnx9)}CG09>_ZK8~IES@6}m$*A4zEiiA_5}MzWgi%D_ zTn(beWKsX-!Y?lZ%8FPha}CIADulumE;PU!MpOyyZ$q@E#}Hh93u>b|n6!BTChb^^ zIghQvqP^>}aMx-~r#7BMbNBdlb1-q!e3Z`{g@$F5Q8{N6ipNzUEJlSDo0ij3F zw4xAxzMd#3%Ed7IVek(1L&canB$j3&YeXqxE3*+>lZ&|8JR#<)Y#7TkU@9Z2%tGvl zLIkAfAWPEGJQN6Jlma*JcVH@wTR!+0JF5v6^u96Gmaa5L(4xfCyf|3p2=}BQxTORl ztSk~46Y~&JY!nB{D<4^oSKoUP?|t$H*kHVGu%|fOaSm`3|Na>45AbPY<7lvY$B3ZRU=_-HA1H* zBZfAXA!Fm9qiwgt|3mf=!&IuMYEX*6vhBnhD6$`o^ z)+n!BI$FGc40tn$Z5!zYj|3TP==&|bfKBE2ta3|~7QLAkW%p*c8$-en`bH=ZdWh;B#|6fjKvGGWI&LBmqFY69%c zJ>32qKiG|Zzr2olFRT)W1oE;d=!PevU`{R6D7!;Sl@`vSNe@XjX0?Hre zE$1}RmX+2ac40d1aXZs3nea4$Htd-*Z@wBLU)kEop)? zh|VB5-!nMQ!q?LM!yvhouauqyn)5va=2D&vnlo6>U_R&1V50=avdf?!w}GTpF9DsB zAA_n4Ix9_!$ddb38VV$lACJm@~LtSY9fOeoEI2JQfudpp@^+ijYy9 zi|q1Z6x3HCr@8_udHE5f_*yc?DS_x5j>{^Qhh6sLc9Y7(<>2t_jvhNkXq68bG!SFPjTPZJ-@k|Dd__Q}Ryk9%@VI7vbIHIb3v-sIlw^WwSV|W*B4bev zVrlMVEoaucX6|n`@EN(h7^Y<<0x;JvEf!!ngXEI?Ffjh`{oggi*^fbTHsZ-(a5$~M zvmP5Kz;i9lwH!{OZTVNiT-uTAYlH~u6xJwT&3Q3cUnxNHe+8DaX89pBqhjM^p;;~& z*c1jVAAs(xT^+rKzO(B`Aa(sH80dQ}8<`~bW^VLd3o11teLB4}b4Q?Jek1CZj>pK= zlQC}NY)sxZ4^ww6!t_TL2_x7eR!$Vps~3$D2C9o^)rmvj^vR`SU&l&P;k5~{N(w-~ zXxh`1Xc5MH_~q5e+|Y>Rb#*YUsz3zoOVmr5N~KuPv#^Fam-~MOmUErhWleH!Bfgiy zuyM}6xYg;qs99VjfbyIzW0AgcxB$7;Ba#tL!!ht?f!;;FF>h zhw8!Edhy+2TQ~f#KQ?~uo+yJ?ibDKr)GJK|&vb=IBe>82b#)T$$1;#Ow+tyus*t;W zBr?`E2#$OP&AIJ^=VS?>oGD@$ERR_H&tN&zuq@xYL}->@Za$AwXO9W6{QSjpICJJ4 zE?v5Ue#EshtNR3eipcK>VM?_iL_IjwvpU8i(6f1akKk8?%klaZliW*>XkOSzIt4Qy>sUz z&~XCypMM7L3~vE*+C!kxh5S}6sKZZvJOjgVz55l zggx<5c-9<={n3$lHb#d%2|8@04fcwx7@;1&CL1KYQGg)Io_x(!_}AeQs1AXP3bk79}bIu4BS0_79GEx#^s}zaD*m? zqi3$*k5lJy_{0gEI&}ig=Z~Z9@-doNe#gxdU*X29+i<$E7#I9PaoI5dZ3#&LZB*}^ zcoS#a-p8Q}Z{W|rZzhG@uWv3M26C$4}$4w;o5Js|B{L7>C2(9mJO(K8r6t zdLBP~{Te=c=LvlJ{?j;f>{FaQ{uvJae2~(A54b}w+TCNg-T6DNT=+~F`fR@R1-+z) zA+xYRmAfz2#HQdt!&p3CT#gBP8sGD#(o1@l=E7fb?f4JKRm%`SVRM~4Fd{^S*>UNZ zNE-!%M?Y-aG8(V`{1}$MJqH^;Sb&Tv5lCr};pn}O@x=;gHMBvYk6h~L6hze;5YuEv%H$MeOv^&z zs8skS1VfW;gt0gY(G_WeuUe541#6`nJfZ^O7b}AW5Izr@5km)=T zVDN;C&Y8-UiaC21A$@#4N@i8V%j5&Az@Z3IIb+?5NodN7#G29+tc%lPUqTdKHEQv; zUX2eTHF(dc#=+=tJZlKXZet*}o7GsPGon5s8c_x<{A1N{OH{)rMk6$plT|uoD#%r; zp^s8P9jib@q5|faFzSyWH2JyXQC}Z?77&OF@-UpygyW6KKrB&vp*TDcaWW;6<+Q<* zXChjWh6rsut3mj1T9j3o#OZucSu~V& z)ISxmkmc%;Ke+;X-+u<59{B>#e7+ygA9@E(yXPWeOd8Zp$wDLCI4MVHnMP9llxbzy z_VGR(!(}}Cj|0e^NQ=c$#aO&+B|iM)bG-D;LA?0=8!*Lnvo5| zq;%virG-juJW6NR;N0B{c<;M+5Swa1QkEI3w=Kojl+Mb>S0lb68EK;mkvX;m$-`+Q zUzsh8c}ifpMx{n{lu3w2t%q8zg~4DDn`&KT1VTcCg%&w$LNRTN&ZtMYMu8ATsL-5Z z?I^wu)hfibcaS%#8_IG0b~B7Lp2N~KNEw|EQ&Sd-myX2brq9JCguxz z2ziwWwc95ndvya;(=uV8MWS|29wO%EB4~7+0Hb0SmLim?RF+f{(%dZj-sXgG=BWyeH@`S zKl#%;`0T^oz^TvCIM4#0M91Lgm^93`v_w?kFa#%hV&PLuFwD;qPJ{YG?dc7B7Y7XX zcR}Tf=}4MZgAjVpmBl8gc!6FMCjcmYSsW5-)1jg7o!k_Plzi%I>bt_iRP><@SRb0V z`t-5D;9 zuBGrZ_~Xe}b_+i0QKRYvAT5C3e!Vf+#Ss=m2Z`(6{8#yb{is~Fu&^GAKF)R+>f;V8 ze=qcRqi~j#@4()ooK`M2Xd2&ujayb@)!HTS4R9A)*F#;0z)9|gN8jBC3nvRe zy1HaU)u+HGiN;|Hjnh~Sa*DIjeB&xqIt8tNFZJ+;QhRav`V68rvK@wj4wkSOLL1sa zyyp)$w-=13|%#i$2=2OJhlcyoQB}gv0pHI_GDVHT|;k5mw{hS zpa1r6tMGse&3V2iIsA>G2#BJ0Elw>CJ)&qFm}o8zPSQY~V?uaZB(%wq)b~TNXWuTo z`PM5qu>Uzcwfj*~S4;O{FyzNz#fzK7KLq&S0mBk}pdCr`(ugEjMY=1qqYLgqGzSm1Ktg32hA$ZldA1JmjhV2c zZ<4MmUKpZeBd}>>axrP$ba*J;#Xn{~`^S6u;_DCa#+xsTy19BeWAxN9SiE^9);_r% zE1%qk?XNwJjW0fitu!WgzPcA%_dkZUPi?`nN7rESj^$XoeL3c=oeK@MX9lf@Phb8M z)8>uGnafA8b?0hv*lOX~A5-=&LCW-EVLQM$B^R18sYsYpjDl4okT5MD19bNA%nCut zss;>*aYn%KD5R~gLo#hBS*tvDNhxirhYPS=H7iYMm9utvgfQq-W!ztXa-< zFKjnp;dAT7d(XV(F3CZ#@b3qo>@Wlts1Z-!v55Kvq)(>JKlNAD!qN2YRS3;;WnL^o z()F-sDloMh`i0S4r>1wuuRkn8hN5Ui1G)W>v$6&y8%GLG@vJqK0`wMI<*RzM%7unF zi3F5O_x$W(Epm4GUINO+J%i#4>Dfaf{2l=1OvMs2JNqw$iSmyERi+K({r;? zQdJ?^zqGgnWhFgY&N-z;$Sk3GsW=~5RIWVAqp-9LWn~p8E-XP#RyJ~Sa(cAZsSYXB zo;^Tr8Hy{*QBYZe{3?o5Q-*wM^W365Kf93nnDe3MtT8MB##}e1 z+2OjIVwfU_+Va6TVPQk1y67mFsZG-vbT2MIPEi5Ua;RS^ENhjsmNE+;z(~L~3%3sg z0)2DYX0a5@se&1K|KjX4;890tax5Cdk4!fM5 zloktz<1ms|IfL4)5zga`}b3Aq#WS=;Bl6dF(_U|X?R=5mOeK>6n z!(pX%WG!<3CxAt7T31j!9$U;s&VV@6=}3Jq(F%!wqtG>n<1x*g*!%17u8wYP91m^@gd`-y ziMxN|?(Qyx5Zv9}ixh2v0&QubEv3cX-QAK9CrW@oj6ksax7LK+ho`6KJ>T;?*L(hY zb6qPldwkZ+-h1ZW>vIoNSZ=$#7f16h;Ck78+$_I`8{}SpatBvS?%-14b=sd@!@0c6 zxK?@>SBh`qV!;h@eJ1BJPCht?qj%0=AFb*4-9Lq2Zyv&y^MBBLcP{)!CcrG&9h$U$ zGDvk5G?EMuM^and7be4Qc8uUNXHeg20qtl03$R=YXO{tU4r8lwwl-(roDUggesBh- z16B+q?* z25;(~;_cfyG%yYHn+95wzrowamj5UJ|47qoynS6q@)GZxUZR=&uUhH_l{O#T`LVtc zf^p-`d*H=$ysM|NXn6|Id_hqS);k0O&;K_$%iq=EWzJ0q%9Pw3YQ$rjEYzSUxj-XL z9JXL)3+w7@?LyD*HXOxDm&7YJ2#UzC!1tdijRzi87kW~Cl*g~D9 zg3__IbR`MJhP#r9#?B;zIYDf8J>+xz9^0P&GHMQ+8q3frVN5o6Q*Oa%4 z;#kVLObRb0;kI&{i`e~qT~5Mva5?&i7f^&*gAhsqLcuBu_|6zYx|D-Jt(& zCC=rOaQlQc{AUrmqH-k>b$k}Cll39BRgm73a2>2S(H53Misy0t+}EeYt?e(N>&hH_ zcvFGbpK4KCOYQmi7O(P4NOgs%E`5rEf^q?t=attW?@1N%Dk|`}@(FUOjC(JNkWV^p zesUSOasY3}jKkBYBwVG9K+e)>cu{c%#Vt3H*LW4hFR$Zy^=;IZ-$i}JLo}5?#)r~E zysOB?yEhNf{OJxF-rYc5^Htg)Q(KWw55?0sb7DPmZvBb$7+Xa77~uNxt$29hcNiC%dS&?n!l~g^CV>?<#cmCqQ2&$>D3)nl%7I! z!yUTm%Hhr6{M>Tx=!x*eQG6SP_48+0{QxP=L0s285G4q!JSbu*R7TlPFNtdT# z_|cJ=eR3L{Mq9yhpb@MGn;~umE%2AnrfwW`qcD5gU`!mDj4=bFFn>ya^iTJNvx_?H zoz>vrrVcwNRfI>`Va4(>ShZvowzkain{sLJ8w>>*g?YlRKYCfMa}i*tVN zIP2;tBDV5~_WtT)iXeS1TcS?ZzK&(P&fYTo{L2=Mn>7aN?glW9bB5!9U}0I#Gzt!bLSUHWDlE$F zvIF5ZGy-me!UPDGHgh0;I=2%SO0Q$ry(3t5Vl#ZFC&P7oG%N@C!EtoB;OO?5l8oT# zv>eAwF$L&jS`yczg*o5OIn~YcFVuZLc>4+Um z3;D@IkT5b68WwsmlUWMT+uq(DULM}?_Vj_w!9{#zkU2RD%QgoWnXndTpxn{T39epl z@D8MTNcq^3+}hb5Hgpd$P|kiUJ`B`U4@ykk&`wTRZn{LfBYXsH=%)6=y3;??g18#r zo%o?-GU7SjZ47%zEF%Zf%C+$R+-F)e1-@sbo+5Za2gc|r))2b zTRjd7H_j4(oq@43j7@sM#8?G}M!hf~JBD6~XHod@47~!c<2EfiFP__tTv}9Lzi|xL zZXd_~v%llU?PDlBe*iaj|A3sE`|zgxI;`a6Fj2k>uGqL^hmkoVbi1Ort{i4>o(ThQ zWAyIb9bMbXp|e6KbkkMA;N{b44#m>q*GE{BvIQd_z{dw-MhuIGidApO>yj=z$)UH7 zB6M|?p{mju8mir3VxR_vZgS`*F9$`H4roJt>7dvO?kZ|`L3d56qjyIU)=i}yH2Nr^ zN3Tw;pzLQcFw=#;xh@pcx}%4>BHDNFfbKfVXs@9F?~E|SO~{0@Qy&4)nbZAX8siAl zSO+-JytImPK-7>}ctv|++_aGh3HO1Uvn@JzYAe9<4vO;V)kh0GwR%I_)DU`BW>6%5 zA4^m8&{RV=jb7-kp$Y{pHFW8%jLvFG=-EdTeXNY3q^^Wf<43^VLxvdIEHdQ`x3_Kg zwos-qnzLyMIvDqahL0IMvP0>4=?M)t17u9ihN-8y0DZerU$}p6K2A_p?Sak=ij(fS zEQRi!(NjeM%DsD1T|FVMs(?<)UC>Uk6WVldk8aBC(Oy9g9ec{5-RBPts(L-qmUL`t zsRIWG6X@ynLKo71XKIszdN=f<=ZaIT4_wj%p&4WW;{+FUan=+TJKn>iVHM*7w?se0 zWXHkE(HvX8{}wZ+jmPjISz<%YZBx=xhMYoMbkd>mFjj@4z6v_2bwvl|j!@9-4rK#X zC>g4X_;#Az(1qG0r_vs6l{yHW&zd_0ix$qojL8!a5fX?FUE2w;+A+oxYYuKfTU%v8 z=fu|1vO$63kW||QH+ZE5h+iwQ-pp(aXr8GdJj5R=%H3PrM!Ij)nRL)c4RZ2)wgiQ- z&|Kp@d>_dvw4?DM9rFhUlJ?ZTUew->-P=Jyp#v=FxuC7l6FPl*wSHWnybR(`ST`H` z{?>5o8;maW{_vuA8Uwq5!=e#6A|6YB{u)XKJ+W}r9PulI>(|d>;<({xOZw{AsSUa* zbro%COZP=*9hyTX8tAAgj~;r;P$NH!vYraMYqioUDQb0xif&JIQfd!n(&?E?$1r46 zf9yN*2hEvwH2%~!&34%J=(wOCaU2>fo;NPzqQn^szS9yAKCdsrW~V{UUIChsrkJvO ziTHTqIWrcC>qj7zH}(8+k2aESbK(%PIt#wE>9?5@i~u%4$-c0)*$7&e4)1yK=(}MI zbP}x*Fd<%8mNQr$H!Ty6ef?pR>?yzzwhU+RdeZj`ghe^?l@DDxNm!VB^b3Z2W)R{h zXCiD=B6NMtpyh2Q4*2vNmVn^VsUrV`&GXR4tUIEors1o7>+tRAAF%z_F047e1v9oU zhDE#!Orm81n4dzMT?I!?4ElNkx;beGz}z&^3C8gB)0C_4mA~8;Y)NG}l7~e|& z5|c#X$?*tJiW6WqgPI&46BR9fQ6MCmo>e?{G#-AWBkm&u{9G=_d3f;ng$cSH{xHIT zDFdV22XB8r!N2Yo5`^$rDwEpFz`yYGM+QpEE|<^!VI6V1SXd`4+#boYoJCmYQ@jKQ zvq&Je1R_gg!r(50ybLn4d}$@k05c1xVX&HA9y2aW5-y9&re zt>HkGAdGp+l#R7&T_J&14)b9U{4)suPr?@945CVw@}dzW#m=swQeJdZOs&fwIwQ#gM4IF4O8j^kHP;M9%NICJYP z4qiNhBOG@96pm8(t~2|vapxAyTek?K7EeI%h-g?OI|<6Q;Au$+qw(>XoebZvG7+!WmAedUYv>_ikC`ax4XL$X#R)FNSc#ASLqxelDUNwKh>&8|hj{oQW zH{GTW;ExS_1|$RL?0?Q@Q?|TA6UBX~`#|GCQvZp@q8ab%8&Lh`1?rwKrrCsD9w}h@ z?tcQd|8IyKH3c2V4QPB_C#31Kyl#4h zHzaQxYpMKND*rjv{~Vu41ZVfFe+h?i9Jk|b({svKOC75fE?;xoq`d!@mdX`rMER}l z6P(}@H#oJK!#Pb8mDkwZ>T=nlT@A0OEY8Q})`)g;ySX3r&8_`;-Nd@%bgY9``A|n; z^-VNknkh{a>iD43x35q~H)8#pf7S7KY1PLoyr;50@d>>`kN;{bx1Za?_5Dk4By}%n zR+6qsT3$XwQ*CwYmz+;;@ChyAntACz(2WngM?q0Oik_6=X-zE(ODd4_q!JG*t8x2z zHEzAA#@(7qvo*~V;hbg+=|l|ci`&n{kVE_A1+?rjhi0#D!Da@bJ!llog#tdGT31ueyw9m6wDtSl(1|1Gcn@4p&scy2wOq%gDx(pfIG- z#^e{;Z2!Jx1$O+nTGSb4VGQq{J&~eoj081ZOmOzaXg_cG%X(q$&*QM-?~ zPlnqV3-MEXmh7#`7`lHDre2$gk;g}4-kF(j9%BuU@iO>L^+4Q`Sj5xDEo@>0ya)Ot zdK7Jpr)48$VqYXpq{Y-%Ll8M79#-ix*k`%JB;HL1o%$Nt}-FEbQ}tC^;I zz$nF4aN9B8HXqWbAMYr@Yo;?WO>(8hgb!@eyx`m~00}d)FksmjB+ea((3$DbPPB*j zR9gIuiGU{`95Xr`PNO2>If3TFs__`MVFuEdjD+v7Xff`dnW32f^VisRaStYKoGZWz z+e}~hPfMjueX5`*u^LO8_&KyOTrmK4Lw%9FaDezF0P`iQ8uUbZzgWzkI{^`K0ph?w zJ$rq4B?hAJ^r46zoq?ci+T;yQ6JWWig9WVYtzmC(3vX|4A&!pD!rGj<$UVGB$8L_a zS+|9ohcn!L+=TcA`@-DL92WK#kh#lf9Gzk9Vk@le*jio3NE_LMGSJ-ek`|(eU=!eg zs1b>X9Gij@Pp+brmL<#ge2YJB9Yps0;aIkFE%x4{g>2qQDCzQeuaf1-*O+0SmD#e>s-pkJ6X9OdM&xsN`s z28CdjjR695<>?vx3^Gqsbm}gL9%@|$sK|$huH5xKya&g^uCJf?1p$LH{L#!M(Yuug zTZJ}T9p%toUJmk#ZK0_y55=x>Q196hovEIVB;Dw`n}Qs43>2Vmt_&?h1t@8>Lr?X# z)HiwYF+fMJJB&@##9_Yy0WL^QjfSJMr2t*pc9w&pS`Tzl?uHJEodp=$Nm~&C{i2XE zsXvtLwb9c-6Z%1xuub+rz|bg!42=;7Byt;jXt#bCQRvYg-KecyI<}#Wr5w8U=pv+j z7ix>DBDyJc6X`nl=nNH26?9hWiuT>wqeG8Q=+;X?NJpx_t$cftuA5>P^rC#c*;MJ( z18UmJ=tTW)r`!>v7f*(qHnml=BXqpY#fK)BSPwXbyR?F}46ak(6cjrM%X>AA9?;cS zgM9Zk=tA!qVVVC~7<3gD=PaDB16%7;7=?3K2TI?*+vhk=L*d5sOmTOyLAP%0(4_~} zq1qK)w0k0SP!fCwM8h!32})iD(2sHuzfLiYae-@EAUqQN&_<~(+S8b+s& z4edI&fjix=!2#Y#ii?I)PX)B=+E!S+JI8rr-ft^~WiLO=)FUill0t3j9|VIyOGFKd zg^GSp(Z^2I-<~}?2;Fp~@l>NZ$88gR|13NoJJHy)@CO8*LmkO&Pp;4tRaG|pp(=XO zeCGSEyJ{CG(pYt5z@PGSJJhw5h4j``5`E+J{5(C7dkS&0`oUpffB?!JCq%(vT$m6B z&E3XEAaUscbav|n-FPcxtQ!eAn~rds5{bT>$0LR|x*l`l;W|53Sd)7$N<`4gOgPL4 zhu`Alzi3!AV$B5&i&csndb;W$W=e*z9AnFJ=BVxEX&}IB2C=)#G@!HAzRKpa@gzfAER9SeCcO++tfwJK*S7UmNV z`V4pnFH08IOKNr**wZu67a$y8Gw{Y~*z%g`&LnGY2B{@boDcQX&{C&7ZIIqK4Q$EHR^$v~ zGhofafVX5>{&%pP(=kZSB3YI*_|4&*_Disw^GRiK90Tke#_1VAXJLSzEy_7Rw~_O* zUKoVs{z%}i1Y|P!$6@U9HHQm8`!f*C{b&8Kb+iDy6B1gjwxgn20c=XoWwXoWN`N_o zjSMuhpTWxh8Cgh-Nf7x2*qlOZakkoyk40iy5|R^>kjB6ywSy%&nesAaOF}e)B4}*l z;*lIn^(7_>+6>7$ox${|gjSw!E+aWU0VxTI!q4qupqt})3}d5X1mMnn2nq@ked2NE zelkeP^Tf@|Q>$M z=Z^~%&pKjVu*)I=+7htL`B{e?E&=5dpv)jKr)8j+fpZS$e4Li^N#HuC;V@||C6UI6 zh2yv#QvIBd%aYn6`5A1M0B0%P-|JzK(tjDx`K0!7T^!GCXUY`@!8sj=F|f}4VSt<4 z#p$_?++PN~ISuD${c*fRtHJ;|1Le$H&R{zWm&x;%%O5skxJb`!;JH0$*igYe&IhzI zV4lJHq;eQA=P?bTInHCv!hRlK9%l(GkBe*laKvp1Poy*{w3bbv_5Peeh+3E}Xjqt+ zy!G%)2B=d7FE}6W>9;HcK416y3%q8aoB?kJx+SY|4wpc4zWx#@mn_m5q-J0|VBNsK ztj4)4wl0^-{wHCuTsq+M@0{h*0iTj(IfLbVK%@kg7oZ;58>Yc|b}QWrw@XIPbUt7* zeEkSsQXar(kZoV$Dm7p|Ve zrRx`P`Nl;d>_2ny6i%H#f#YY6;>gKEICT5~_8-}c-3R`}?|XOP_@z_Wf95cD9@&kZ z$M@pE&j(6!#dr;DO#NsT3(!SGe361G;8kf&txojS-YnEn#&z`!E zV$Az_i8$c1{>^hdeO`f*vI6h{pZ}Yd<(1WCf&!+hx&*aVg#h_cS&3f)Z*+xJ4=Hoiei<7>Qcc>Vv}|E4R+hx#}8Sl5D7q5gFfnwl8=eTz2@ zEqGJ^5w9CQqKTxwsfF^trF6}x{VaT4-$WBl#DBz#H}6s1LS>S0*_H3#w#tWQAyx02 zsJR&gD{&Aet4({_ak*`(wx~7HtM5D^`jQmv;R`#IK|Ygf(1>NWGQe!~)M zrt1ygE*7$P_m8-D`wZSNchQGB%$qR=8&)mE<p<+VaKDjSbBLbCZ3*vk*CID;NHQQacnXiM_9pU zq7xF9L}B=rVHmQ0I0mmAhSce_*qhuBvBMK#6=Vk;4@1n^z6kL%)1V!04AT^Q=tfyW z#n+HFwAQdqZav&f)-OP~-JCROBkkGBd7JJHy9^&V4G4m6gbmz>h6}%Sx(6JxeBnAc z7=9x{;Sgm3zjzxA86APC^rD+NIvfi|1Y_wCKTHZUL5guZ3^VV7X_kuk)?ORCWhQtO z0m~p9R|hPV)B?cj2=x3@Qg^fdAq>E z&JNa&?r`u3gq52gEWD|`zV3nt+t=0wA(k!(vvo&+qYFHo9pL6^4`(Ms_*-hBzoib= z*<0Y0qa*U|T##>Xk6otfSYX~8@z%z0w{?P-eHeUYG4OH-fK0};6jmhW0`T*&vw@$L z4F1;6qAq7gCs=sMpzdIbo~AlbGS-9|xqPUlmZcuFtoxw5Q7`myH%CuvEoi%$V#vbr z*n8tR93wqpALj{+3~v~uxj`}51oHj{;-_~Oncf0GcN!8Z4u5kby}Jx1UH1=wF7+#bLml-jz9~%tW$Ur2_%YwRx4!Y@eg@%y| zZ5m=|T(Y5|tps_MF6d*ehp>Jz@Xw4y;>2u34x^36q`^?L=mTR1b8)DuorA5|)bl3H z!I2N^w1K_M4o>{xL1sho)^Kxof-8y4i7m|8+T08_GHU^zyZO4&*jvNY-W(>@CgOn4 z-s(Nkfq^p;zk~qzWCS5$VqYA7d=5toE@0v}GqL6P&zQ7kIyUUxgr86Ug6~iKgqyYZ zvHIXf=!RKi!0HLuUvwTj?;pW0H}+%4or73?U^CVo`5w#mZougEGr;s40pk*c^?$&W z6u6I#L+=VU32ayE-aB&wNocR^SSN9_K=3ZR6w+H9%@5Y7ef8h3mLpXKeHyl3rJ#sG| z!o5SkBk$CHAbu63@fmP5axp@0b1lIozU-H8 z;F%Q$*`N^U(0yf-;SMAIsi&6(PCvMa=kH(Q>ch);*;Iw1qI=Q2X>D9_OA%Y1wt;dq?rO=pydtoWg?#Cs15;6|Y`AMq^zGUey%fSw$Xx z*t7~&<@u<6S%uhy@K!6~u5E=?cUN^K$SHM%e|jX6$M=VVxhj+$v|thG2(xf|==qzs z0@7@OOXJ%?sf_?r8My35{p;994sA%7(neS%e<_r%r%JcKz*n9l?K-xGe+kHTlJ6kg zwj`=*J%!u86NAZJp>C#y@Ahs*8?A28@-U%$SOez%wlJpqxohuE7&&ne4j$ftBS&}Q zz@gtTfAJK|Suhb_EuW6rbH-rx$~oA&X$7`?y9jHRO~<0SqcC$CJ;P@W#hitsvFNJ_ zm^>j18`sXqnw7J#a@8!X{dOU~-M9pM_HDyA-+Topdoy&U_Hdsq?aZN|&J;6p7`tLN zbbM@}8E6H07i~e)WDw;5yHsCjdzt-Zh25)n56E|E3-zAeq1sac+FEK*VoDeWnkila zoI7=GC#>L=={?1IU~BkJ-8;5^K%x6vr0v#5{4zkhk2+L(%EQz^7kb)!52~P}VkfAY zYQQea12cbK+6v&uJJNH^4c$Gpq3LG=;{Z#@LY+jJdWPz7bF+rIsU|%~jbXwEoc3%Z zesQ6rrwC0Q1(;cCQu{kWo%FA!(FMvX?V+mD0a_Z}psC&!O3LkEXr+ZN6mDZ@2q${Z z_&D3bqK^i;(HIN*AkstE-re9t&)e}d9-40Eh#HfLUQR}W^SYOl0X$Lz5tJDPBWDw# zj~+^0psFm7&NPpDc5M%H18q^3m{<;*kj1piu|3b)OL=dd#x#BW|f8i4g+u;F-UeFie zvr-^u)*hxAPKaEX0fiuKdR_-1^QXy3-7;3turNUGI4crfi<4kEG2q|8a;9PN9UCLS za;8H`oY`Mkm0KmcBX(LpVHwUKHq)XAN+b^h@hhF5uI$FV?JKZ+_j)Yb^({uNo+^HQ z*2_g72B9)|4T?eN*mUTJ*&=>Me*wg|x9S1i5OZ|2q4}yx^U$jg&8Y|Uh-dAA-U zI_|qUkTaGSbS!LDp1ycE+GsCGhX1@c0f2{nod(yL zp??A2UjpLNHODbO`CpVPsZbce=Cl%s&7k_1G%Or10p}dg zW%D%)gW(cb&cc2U=ejtp1eS9d46d`E(=bTS<#F1i6b8omKtkqZXRGp73vvknXKxn_;q=ZCanazN=1eQx>NFXU&gEJR21I-c_G?(8mEfWdR zR8M$#E5~_S3gS|zu0*ag4k^irNMWFu%4e`VjpCCtQo!8dq0!-pkBmlQL^R@K;{<@o z^ek+h&VV}u;@tj-uyDjgL?S*qMgZeHehidzT@euxi2TfB&-6TOSh_#@7;X&3a{^Spt_C7-m1GW4$vlEtSJ%O65qx*IXa_ISr>};j%d| zm%)CiPN{wlm*Th$>}L?0{a?0EDnn}1m+7UpaUA!70dNM)8T96O$qJm)u>QDx++OY{ zbCGizj^nmVWpMcnhBE~V3#a99E{o?jm(OLgpVPALGpRlX%f$ho?b-@I1Lb^xCqEw~ zu$;$KqGMq{&u2~-9o;&Qxx9!ZdTu1qJ}=e_iL(X>u$=b-{{)uv;hz4>`-(VwdJeL+ zGlSq?g5~T=fcTeI<`P)W!hQzJIUW1i<+Pla=~yK2{GWtrSfm3!1>g8*u-xr4VD9<_ zSnf(~bzPV$ILn!aMY1fHz;aRFqGb3i&qCz4qu{$J3#NnoVU*^9k?UvUXznFEep!N? zvOL_me**=15AdR<0#8Z{Q2L}*N=oxlRGf$Wf=9^ByN{gQdqN&Oyp20|uj9te%eZp& zJkFgziIb;};OMb~*u8fb_8q1@$De=TkA1uF%if*%X8R^A|8X5AubU^%i?K@eLGMV~ zAJHB=XvGkCugHc2^~L_HbU1#M_J0J+rEvB$P|kYdFbOOVT|0#OngP>+KG2T0L(Hr! zY`?q<_n+tBVdVqlmE|Hg{~qq&yNL&PZy@L1ZRFm+gZnpc(jMUou3x@@E0@pV>ZP-| zbny(%pF4@ur;g(2k^R_zU>6P^+Jis$?7)scwqy6coj7v*fcVI8;P4*&y7w0>|6v)X zZfGsPVkpA6^rYN*70S|a^_SQmgQ4oaSz3qzwIk5TsseS&Cdj9 zI3MuIU^!E<{BMBe43w8um!h<)5Ko_%;uVQt)hI5-p@_b~&0M^0q58oFr>}q)^}-1F zR@D?B5)dH6baLg<1e-|vTfBOl~8=LW>`866pFr4}xXlcevrc-%M4QqIZ z#^#Txc?VQ}q_$D}U$%Utj#9e%x75i7A)gwW@viADnqR+1!<+Yb)$$%M-@PMwi&yWO zP}kCghPTal-Q1d{h4k}|vVN?8kB?NxhsL*5CdD;3qw!5MrEL=VzLeH7TIDsRdHtpd zjc*%-+x+?+$UzI0Dao6rkD@+K)A+Vt2*sP_yyvpsq3-Q_8V_o}=o{BTWA~v!=!W&cZRb8P_{~yXUV#>BR|~bNiXT2C z@88ov(qAL>qn`YYGzZ?ke1n#k%>p1Vt*Js$Ng;}h3MhXWo|Qhq%YqWr=9Qo(uNc+& zPf%S{iOSMe&ZokX95j4d*^rI=>Cm3y#HGq-S;hy?fHge zJq{e$fNdwf!}gO~=w-7RJAYb>-?pyC-rv8&-kqDUVOkvDfW|-&<8`{7*4GV*Hf7-~Uxx!^c7%b?eWbqi`T8 z5VxWNk>~G;+m#M-WI=~31`1_p{lD(wdZ!Xm>9R+&Dq?B@fMzMilf5-ey|0%xQnbb6YQsCilN8W)3r z=_&A?mIQweTQo?VM$V_0^XcWb*@3X?7a)F8Xw6);X+FZzIA-2J1kKEV&&(9qjthm) z!gRRJON8}=V8pB$0=r>;@S-s{3A04M@fjE~aex5IBSL*JbJiq${mlxDoHhnJ_QqKF z<7$KqNygwslM&c24yxw5Ftjs;iLHg8Vqr@%=_lWo))sJQOL7uNnJpZh?BM6?312@? zxVkwCD{}_W+3Gwn*bhE|-c*K_0Lo3ROa$m;Vxo&bXbx@r;|I8gxglm)62gWjB5VF| z^qn&V!})NX>D0f>5R6_p2GiC|L-x!87_)plqQ}q%Y)U_@J-9{i4~7kohkdj=LIy@5 zWkMDP%^QI~uN}hPyT=eXG!7x76QLDkjo=BS<8jI2bbE)9{_vU^38zVPzl`#3Jrs0Y z5NwC~!fRAGJo@=!|Mk6i)?A9^t7nRXhKCPJ#)tRSxNv$WPV8ETf-8UG>BD1qQG5=S zl^0O_>>?i5UB;cFV`zSM7tJNNP?LWJ<@wj}wCo`s`_j#EsB! zT$TA@nw&g_>l$EaRy?{G^?zc;rgxpIC*j_ zu3x7#M}EMO1DjA&ehal#4={h)aL6-2sHp@^weFZQWemzH3k4V{uhv6=<{ebK3yK)# zwoe$DA?_1R2H^ZHp=jG1a@rl>lj@Ikzkh?{SC8Q2#X~rC<{(bdf_u*|+i>X5->_r* zci6LQEB^TN2khOq4g2vfZ2f5+e%!hi>o+XLrp;et_nx0{ z{KPICJFy!_PaLET>RKZEOBHsaB6gxx1L>qm_4}hFnM|9Ndjy~?D=xN*w zih4cqp!hC6pb2sDbpIOk#M}jAX}MF0>K8e<|L82LD(|5n=R9uGyXEoi<0yM{9!2+0 zBIoW=+`DraH*W94l`FeY`0yOcbFa`lXg?b3is+qr16loJ;pT3IKYst7-ZRaxwJ?IV zMlZ;B?*e@*BgiSVN52_k5ILqF)cq}B6zc??FnX^0nZu06SWdk?I%z4uJ=h(7{_c?3 znZwz}68aiyXd@>FU42b-R_Y>nbKJp7gAvd)?OtW7p3T0KPIk=au}8=sDvFnu=*cA<=*R?2-?C6pw;6>y!8*}L(6BH~7+WOD%hbhzp0U$2FmBUyq%RzZF&n32 z#5a=>IVnw8mNRELQ>HK-%Yr}FK+dQOhJ7;?@~#@_B%)tVq$Bq&f&HRy-V?W#ZR)3`D!SyMV2@P0WnZp;Pc9|I)IY^Ku-!954Afj{PhQlyjXNCRvwDWpH^Ct&5ajqF~{2I30uMoS(zF zjod%(GXsb$63ELgU$aga6z6Mpx$m5Z0YVlApBbnYAan%vDU#+(T&pED1HufBGLXpD zx@@(}Ah|?s!sRE$k{c1z3R+XW43x*GlD-mS5fvSVbZTQNwK**=25E_LNKH#baz+y3 z`X+-9++;5Dq{!BCl9E#qosx_Ysw0%^NlHR2jd^Tz9O9$mkQ_(p<6FbxlT(o1FAJF& zeUX-wET~!-RQK`m5$$FQ79L{;OTEa?mgT;*-{ASeI^lz1+2TBc+7%WPB|ZW$sP5_O zBP`1~FMoWI^u$){43aZg&cgbMjcwI6gX9u$%{q~QY<3y&WiXh*Vxh;+z_SE2GZ4%! zgVpTkG@O>NIWLzjiBzrx#&cS(Q?j(?a@dvP7|>>sKyaxI5-`sBq<9wgb2=6Vvn6Y9 z&ck_Gq&O~vh5g)4Zad#+>`DMP3%8kd#Ch4zKEaz)J;8U_Jmk#)BZFdG-7No#^R;oDQ^D(WU zv%Z}I_xUNJjUG$;g6UWIKu@0~{a`mC8YWrZ2%&e$zTC5Tj@QV4Rzhp<`zR~Qr!`wH z3hv!SY2jm9pXB37X`#R}Dl1C=O-f4&XifJR1^GF6oc9p9Irs7K!5!Saa|1VTT*2Y} z2XOAxX&l(SAN%+3$De!mVDt7LvG(VUn6PvvCa#-@SlTa|rTaiT#RWFw>Akap_I1=w zYucmzS715Qt$azlB8720>z5DHv=|ux(=1OUEg6Ds*Z1I2V*v_Y7T_kWOY;jJpeX+V z%JOqjRak)MB~S3OtOBpfD^XisfoBXlmzSctjQakh7!{>OLMM+O-N*fVxA5TpZCtr} zf!5oHX>Gm>d-nc;J^TI?{@n+6V)>>e_65cHsQT~@wJj~;D*)T=Pw6T&db-LEH2|i z1D8{e*Q7{RCg-Vt+nS#hD2b$Sj(`1{@-$ML>ObMbD+qZ{&EoR8lda{{3E=@~ruyH~ zgn!%68qamTr+T?=cHcIAF{spD=G6H>df=}gEd0{}4i^JTWxj4^lKIBgx?aDbIKF}2 zP<(3|Zaep(weC0K=LR2NeWJc||65vhAW7XDp>x(Rr~Rv}H!VUMUcV##eGqNueu#GR zfdilQ&_Z{yXzQ!b@{aUCW7Jq%i;pyRG|XtCJ~q5ynwS>UG&Kur_jir&1r1L{MHR}c ztB_9*%ooqAQCU=gXZZza%qzm1$4~IOunez?>0wh^As%Rj#YK2pTa8Cga#2qcJ*W5{ zuHHO_TenZ+!lk{qcKZmf-8zWt*Z1Sfl|2-;3&*ehiQTv8p?h;T&Rsf)D`yVk>e)lM zap5qooZE-fM|a@(!Rt76XUH(+yNhX@5rH z!&Bs^huo(s(n~)1t7rn0QvdSs>Ejc;Y0jgYF^?uj32o4?p|bQmZSG5ew-r#AlY>tW zB~114$2Y0z_-^n3+}*Ji$G3fp-?uEszTem5`l(&$Md{p>ln|z-gF#j<7;5j0e$LMD zcGSSJ>px)G;dz+2dje)3oq_p>reoEKx!Cb=1D2g%fcag_y7~80x?c?gXicdSY^1uI?WYfW1`@k;E3Q%U&Lnm(PqFC zUcSbN3$;XspDvcAIO5pIINTl(iyIzJ$hEOSrG+gjO|9`z&j{rKzBuV(iH&wT_}b41 z-}Lju*hnJ`NpZ%|G5rubm=;cHQLs)AhRd{cm`zJSpBXVQrp184Vt7M7mQu=n+XkDC{~>|EgJAcLK|1I)cGA#*f9UkiP#F)_m}V`n_K z@Ij@G7tUK+W2Lz!vdsIy-P#8-Ct85W{NU}t7S4vSan*wjZO9!$9AV*O2QwdA82Q=4 zko=~eGT6Gg!`*>4xiVi^I6FYyMjtB18qhM;g0Zy$Ol%BE^kHmo2z_T`sMu-4Eh`jz z3eF>9_5i3w*};8664Vo%V3h3x%i)1A9~=Pt5n*s9y*rJJ5FaNP9Csd0<2fV*t|KGi zIwqRpqiNHfM4RqJSPu$>Rk{~EIZZZ$>K?+<+<8G3z zk;+mHw}L^6n*iKB89*6H8>mHnVLKrV`hz{uXNWu8Xyea^Tl!3mh5PUjL`_Pc=iYv4t|emqY^QGL@Y+o_{L>>A!TYbGA2hOIo28D2gM<4U?k%E zg(5yH3R&a&!9LuD`lX2>lM^v8$P(M=p1belk9$r5z_BwZzj91iy=pl0K?i+BxWv-^ zkrfQX3|G-MlXPdK%^!k-#!6u+YhY!F9=*CjwYLH+&9yOo;$YO2-4$SN!GqIybn7r~ zU)hD?ywkXMV;^$wAHtpMyHJ>W95=4~NwS+3&UcXi;4Fqv8@qRsgNnQy`cQdZ&Q?(9 z+6HIN9)*IEJQP%WLQcN3;12IVbvgvPA}BKk%CM17V(9*QCx5xkM5tt5QB|{Y?WhdZ0wTgjNwi;&Xp(uyoFh{)qRD;`hkK_8)1LEN5oEt~*TcvdIEuoe(0vc#$fN!KSUn+u5#!|I#lj1ha>xcz{5KyaGKuFM-FYpBbsv$ z?j6S|dOx2#`K$QV*NHVWq&u7M%G;^T~}i7tlCoec9J7x-kwqLWE)==#CtBdfW@)4~$%kZS^K3>1A#tWK9??1l6yEj#6rup>hX&zoy=hFRLgx9sD zXnI+O#usJy*g|V7+CU{I#Ugt^Uz&T*XbJTmW5t4=I3IRpHOLQc zY+1Fizc@3&qMtj0rY0hD^(eTH2}RWW41~@~hMa9z_|kJZdTD;Mh|-p7z9}hSKd|?1D1>u-1u7l*21zpU}S=@EbqH$IJ!FYLc*+mh?~(D zs}66#!J<>xbm14IEf@sL1XpPInFzX<$v?40xiN;Wn+jzweYg$`!PUk`*!k!P_7$DP z#GmF08W!fePna_RE?I#{m_7iyewMJLHI73Zy|c3-@#EQDn7CmcQf3bUA28bYtC3iI zU_Da58jP-98i-la4^c}p;Yqq-&Ts19I`Vq;qC5$uARFGpp8K<21OYxXW*MbGzKdrK$Jl+2I|-%)x^y7KY-;7AT#|6 zgU$?AvjzExQNsl&&S12bjwU*F=?DhX8N`-oT9^`rL2t<#oL#==G?L4pI)mDr{!768 z?_fEHae4_XXUla?BU!LZX}LXYg)YT&o7pb`;oMj5JL`aT!QtF@wxE{)b=DK>h5Ijo zx(tr9g|q;h8SwrLmNPgks74sLCVes}$siGnZYfi)I8B}E*GN8`s1z1hG;I_9~m!}9i8Md5f9Wt+b3bmQ3X*hif zwKp{_1Ia0A$m%};=`?RSjME5^m|PYHc{wjzIWq{&z%kEj2>@r2Kx7H9mOyyXrq9CR zoaXPqHkT!V*&O#}7}v-3aC!+Km;9WT+rqRbQaI<6@^iezNzQ<{1irJ&VVsZsoR9k; z)x$35mpIEgj;+i&OzNvR;InNTbm`U=GiJ>c{o*uSH-qI|K93F8$Mcdc%llDV*{YoH zZ`P|svBH++ED~7G7d8K^+nJ`DW#98kCbu0M(7hgHGm-))w)?~tYWh+?jJfDAMm4e8{gTw)!{nt$v zR@Dx3q|PFY6E8WEmU=24TaQ?I>(1N6zy++|Iv=%BLlGOl>WvKEJ3a z!^?_tVfa{8ScICQ5AWvMg9$4~nAK>2oTex!hya3Gi zAJ{GA$k78he)cf-p4f?XKQG6cZOgHK_cxfdZVCcu|0)|E1W&g5U*1nxmrG!IAcN(T z<8dEPFn{}UEZwvW%^w=@jMi9B%8OB6St`Ktl9CcsR4}Oh&tSPE{{({ncciZIg)joD zeEtN_s*BN5RSG^InIn{i97zZEZSEtAU=WiqzO*dgWN{EXRhADA<| zwSLA;KVzEYzG``i+V?L-9QU{B^*ez-GDgX1TH98Sm+zmU;q5bg5Y*jN|LYHU`R2pt z_A(CJs*hG&liEOOn@GeSj;>j6ED~N?_pSjIbyaxwx)QHYhpQ;YbCiJ3$o$dX8F=7^_06vYpEpytFdYk9HZy5E^LW3nXMXQG zs;>@jNVvRK{%@vEX%JK=Ou@osGHr@P%ffXseF~S=)Y$TcaQRHB(n`U?ePEGjQ<#p0 zsaKeCMWSD66)KPNwB~DdSsGt6w|c{0?Rn8cH~71{zvKmNsyOUF3fI{xq79VyU*&S$ zEokJM?@OUDrmA77ZFoz%Vr%_Y3vjmbZ))O01wIMu{>GZ8v>|+likeD1=XTOKKCP`2 z!1qVyjj!bo8vJvII`C<;JPD!TS)mt501iR%zFAo*J+O-C zWl@4kdT>=2lN1%Biln@VULfQa7n8sIiTLSES@jcYLpf?_Q~#p28nrK<(#Eoy`tm|p zq1D${L=?^Unu6JSn3WRcQ{Mlsura@8U_pEtKY8$DQl+ z^4Ylo+kaY#jT;u>z`mbhV5owTqqFegeGRG$E}`hoAzV84BlWz3q)Gtf>^8p5$6E%) z@f1&=-$h+r4vGrSqqgQQ?WfD}uI4fN$jQN}V@C{fbij0O*r6@lRC{BnPY5!dd=c;Hj3|E_OrO^erylOa{+wU2@xn^1J+~Y? za<^j5*`-)~Xbx5!U4$(c)?@4W@3H^JE_BprBY?1;#>z1AvVd1=5R%8xhH!8aY=WGi zVW$Ue7b94PI$-gRRY;pR5JoZf&P|3O2=ra62pyal{%oGkj-fjNP_|c;sn=JC@qGX{3c> zH#O5Y_hk*GFL~8bTCIhPdkhqn1K0<#=}3(6E0D%2+fX0XRQ(WQ-}j5hlkQ-feNCl-!VqY*eI0WsrK5ttkdJ0}}BSz5r?-5r+hGT8XI zz{A50J}yphb+Uq|%m`8T+8Ax7j{R1~$g{M>Gb;z=S=itwb7PD#(?y7#0i0c};pFNC zM;BkXIJv_~<_MXittj8liCkv~anPi*rz;#hoMG$g1UpAsSU5Ps#la1(GB@a(>7%E1 zPv~3gL)WSg4D1YH;!658QH7>V4@&l$7`${GzB&0bLMEo7r?-JPw9{jBtgzH~8W{%b zfj+PqEhO3z}L>>{kxEeHAvi*>tULEyt;G~#WAb#dg<-(}fpDE133omic6DoqS1y>gb*xQ)H($okx)@HDGu!gmrDXg4~ zVC7&WC~q8OF0gR2hogrKKCU*fwK9Y@%`@9DZ@7kf!6Sgi$JrPb7P_#rv4^R#1r+7G zz|YSOsr{3XJ|YvoX~EEOH-SUE7y8d03R7Q8q>agdU%U@`o2f$GTn%X>Xt5vbiKH>9 z81?mJM2|~FRliZ77oZ$G|Pv5ve0naGstK7LoSwr?D_kbcV|i+Eh+X zf>w+rWFv#&F^$sF9Cer&Msqb1b`!&ewTAV`KzL7!hs^+QVVUnUBm~YW?r@>;n(*~_ zdUe0RM|yL9q=kf;nKo23yP>Okd&nDigS?#*3`0$!NAtxi-5b`?GI;e1fWDsvY$Kha z;cNhT3w0>T31W7b(%%(k zu}&Dfd^%$Kr^8fck3PnRg8y4jPYu?Vx=2j$5!5P0Mdxtq_8vTXcnF1$kK^{G9jM4T zfe+8`A?Na+D4=I&{{0iUeeI9{t*>4_0wu+EaCNpoPldLyFj9x3jRExN9$CG5G2A^} z1jyV?O%0utmC;eYGlFA7=oyfVHu^mvPxniA+uks6HAFRSQVL3L!^U10-BszC*HI2V zROIl>wr@~;|1!!RUO`#@6+F0olFA;QsEN1GGp#K^u}Itrqat_ai6oJiV8$ z<8l5~+Q`O1NvR`xDt8uK;7LhQ^o)Nec(^-tZYwy?l81$*1`Zzh5fAR26dw)lT|0=P`=^n2>j?7i91|a9 zAKf`3J}lh2bpZMK=aF;wEWM|03eex&ke(U6I-xs_o3>gP*w8%hqtjEYlUQf!MrzQu z(GwIagXWEgV~QUX95rARWeq!;Q`S*VXsg}Pk!|CQxCLS3;NdUb7&qK7x= zUHkx-F7C(0O9ycC)(KoZw;$Ip9>(R<`*3pquQ+*NJ1(8vh0CXQ!_1_8r?{-n=<@PYdY<3uXuk5+g-)%+*xpwG6y6Z}^Y2|EM3l-xg z&HKC8ccQZ3EFRxEj3Yb0L++I$xN~|ZO79*+5w(qf372>6Fdki{@Cye}{OB@nUOWah z#g5`*QD+)g)*thH^4e6rPjB?l?vAxPzd_cLk>Xqmer_*4yaB(`Jl=8scWm0f2?cKp z(RcA+I1USh`;=Hjtr!GTdN<42bVb1QBv@p-Ln%}rF5^StJu?o@^b87IoKBm~czDlc z;5QkW8^=O}o>yL@B4HfsD8TCUc|&2F0UOqW~- z$kKep#~41x#Dd;4Gq)`kXPIaOSi&hQ1U|##1owINvN2F`*FnaD!BBMW4ZR=}$UCS& z*-aZv%hJuEHw@`nrr@lLv0D~E(L)b|)=U-$OtVFL(k$8(r+FfHYz(}HhazlRD)eLR z5H+(O%#vJ%^|+>&DfGQ;U>)j)KAsjZ_P2wwgAR0kECiprnwNn%Fm&|h>1gMugtRro z5J2xa2C_q!q#*RGQ~{KG&W&sZ%9(( z`Qu#PWyri7F>1_k3>`QCL$e3M!^IWyT@}!u{E@M70`!)^VFrd7Kx1H-uNmy*Yqm!1 zqpv5dRV6@~0b>S_IS*5~Nae8AD+BPHj;+zV%6AjMAD72Kvt+?8)g#sUWqF)N5)S8h zDIM3rVO$2&gm4(ANPWqcXWehCog`Zz!5k=nw2VUfZ)KVNemzUKUrex$Tgyi~3T zi)y{*I#@W2^L=?O3172*1o)Yfg1&uQ!BYl18GMw=WPm?2GZX3QseBz0PqG;3>6{!Fx`}*OHF7eOw-Mh_kh~0RJhTU2X^Ki1jXg7~nQ>zSg$2 zQqf3YDW~%b@c&C^{DDKz$fPA>;NSt&=P0T#RD9$cF={Bq#ZY_Gge84aMhcSqrVCn_ z#MCq-r)QFzf!M?pAt@RCL|7E{fx-Etj5MTVrXe;tUL0!5!hPocO5i!`hyi8Ri2%z# zAHvEaai`^7Ed$CN#{K60NnkhoIX#aR1Lzzkz<$cdX;?Tv$8mm6D*@CT zE~S+$$)z!8V4X#bAGL$i^0@H)*O*y9m|N3qs0di{s6)s7{-jHb%k78 zD0ElE_z9CRaL^DDKX}M63?DH{d{7Ask3>jlxX8opU~6>AvYgu?jW>@ei!|Omt~|ax ze>t9Y%pao?)9AUFNcV2vC^#kg!kV7(p>z7u`y&aSi&Mpco{kK{E{TWp;v~2&PKMW# zRCs@t1`n2{^sZT!(Q1Ltlr4)>gs|1Q(}F}nZ^C}B<$Z;4TE6DAl7%^oWHHVlIST{r zk`?-w>7=v__%f%pGnFR}`xMscY{{Mq=jEwz`Z^8v%aS2mLE$Sh1+9nkv_xcWn1Wn9 zN7kB&aGg%~)cRrKpikxlk6ben)}te!6Yq?HE2kpAxf*v$bMUa>AxcY&QCe7lqTF1R z~T8aY0bqeBD=k)Cl-G8y2)TOQ#bkW7b~?V_wGPwPPK3um+8d7wMBuVa0qXO| z4)d}stH2<5MV;+6(f;TfuFB#LN$7Qe4)#pfDcqw@80RGo!3>WUAqP);dxsp6J5q|-+?vESPRG)evu*#5sEa<8ayMb8>hMT5hCuW6zPJ`+B& zw7LSQe~yn$wKNbks3ad~(9y&bpo)a!8C0ihN+%{-JDEEK*t)QPwMbYJAmtAm!^;zo_RG3)Lyy&%$l_QvNE3%KS^X?*Bpl zM%K;0A}{YI@^h}^an2P~mfXSpTgP$X)GlmUzZkoB{vg1h8Pi5lZ(pG-=QOSy+k$5$ z7l4nYIC*q4_U&Is8`|ITAn!Om%r~Q?{3<Q@wVg!a!>ETgX7!rvEnYa%pDIGweIj%S4D`9K9WuCk!IqAQGTI_ zaWsdyPDk|WDTj`Vaxir73F|0bM2z!7*5Y^!rA5P(wX{&0n}LPjOo6FPM*xfo8MILg z_d#s`1f-9m#p1YZgl0v-BESx6_PS7W))y97s}FyV;X!)ZS8xUQn+mbym*psbUx~rl4JF@7-7 z!zhbZpxoZg3g)yCwRd+Bv@Mc2ySTy0*%gjXE|57o!-cN-FiI9THxKyv_`}!R4=zrw zu(q~_gNq%EZH-{!U;-U$J@hhHhpLU10Bo6hW$n=)vHHYTao`wRfjbQh7W6i*!y{-s zoZvJh7e`})9bTmrNcoY6Z<2HWgl zL8sz2I2^&_lMzJXF+5UGx5x$sw_2qS4}o!}I~=HN>mdQ?6>9-=+L#B-O%s$W4z!WC zo*n_a>7;KGn~5Q?80`<6u|aT|9Esq0sR*5yhA@%{$`iXF6Y-0(5Is8$ArlgjFewXO zeZ%3^k2a?xXmOk#D!62w;{1^?G(&*p)^_G_akPb#os|%_8h3KGgC&iZm8$_fDSc>2 zB)q+;Kdv+;F4hQevVgCvH8dUQ{-SyA9O?=05NEi1nL%c61ZPJ#SkryvU}KF(k8a`Q z#bZbt-WL&r;^3C-56`|K81dCaj954ZrLW6iAk#w!l{RnNV^|=pQeEIryCX%purfT7-QW^n8m z4;`5avZI{vW3n$ECx_yk%p4EK4Mx0e)5izO`FelOO%_8*ErK z24{C~#JT<7A83ik8`i$;>DwaW};g+(zUY%40M&zM?)U!y}F>_@h!o3-A$z@ zI;*HarB5Gp?%D~#QNf5Dnu<sj_9E#2Xh;B z*jQ`O@*xM6k1pfUt)s}jcMSOtPvXwCJ-B-DH{?DzjDq}=xOHKmOQ;x$~yAZaS&`-8Gfai=GveS1&+UGrFhk4Iro7 z4%R;Qn6q>?6cjr_Q?n<`Ep?!%+!j5R+QQVN7iLWvf+zV`QJQ-hw=V5R(S5caKZUaV zOM>d_Wz8dT`1HNICxiw3`7?X*=-wp(m^0YhlXP#c-wQ^%^d7L#64uxCudC2YyE}U7 zc1OG3oghc=i7_jt!#qL;!$>Q1b?6D_G!N*w>A~F79FHqE6yF>j>{*0$2EFqGGKo9>IrxH2-HrU>0N#S-30u zj>r@=RVvEVANh_j>!Su|D+6(eY(@TU{5Ep$ z9L2>`+i>~JFSvhWpZFkAR{RM1x*D)D>jNXbUNF>Cf~k=zv^2USHZ~Lo4(&zT&K+T7 zXM@y{L!oJJ3a7+CDA;PiG+KsE7Cq3_TnURet;FeTm(aCKcj#;CLq|ykG80`G^lndW z*@e2N7ic`UBInxgxOeV1RNp^?;wy(xeeXCf?c0dQmv$lN;-7eUaTkhiAH%(i2T)t_ z01^H&m>H-+MX>{VDRqI8QdhXRI?&qVo%o2zA3%0r+6NbUj+-aDLDoM2J8tgBE0>aFSv>=bf0M)`4XlK$5 zZO!DV40@-=+rxWw6pWLd5jLYQOcGs?IBO8iCo@H14x+?Od= zK3_{|IE;aEKC^A5uho9VG@ukfvN0r7=v?sz$YIX$N(9q zIthGZzXZBTfGn3GrQtBCT&W%Zbj|7bnq3CV z8L*eqNnuhRZWp(idY z`jmiaE|URm3FPK6;4se5!fB*<&d+iDp^1gd!N zRXCq0fACNNhO-rZX21RzJ!YH$%e%>U$GGtmMOa#TUtys?Waw~_HZm#(5s}d%50^Q4 z>J&lU!uKkd%j3^;na7;RSeh@=eZpfc%^m*bM`8x8;|J1MkIaDousC>)iABglTGuZ~ zhTCGMDWSFNR|#-lk^q|0EKaE&=Kckn_Qv!t(epke%vZ z-pW_*v@%@))C&52JrTBc6x^5g7nbD=mjB(dTms7-Y3%IieaDBTO1}VL>wV^yX9^nI!9nmF z9)mxwA4N%1C2~shaQFT#VdR)|{~pRppHM$aP(b}Hcv6JoO6q5IDazO_|Mz}NeP*3V zdSN#&KUV*+PZ3dd|D1P)B!csz^fOOfZUgif4&6Xyd!@j(8%~5V}7md7O&p6TBS2v2LtD9 zrHzm8(OkzyydUt9>c`bR*p}#xT^WObN9Fj~_)N5$ExDT;xt%QUKC^ecL<^Po_9Hdp z15ojXs;BO}rYb+YV$*rLC~KfL)S~XgL)4)}bf=mBJ$p|XsQ%~g@TRH`&t5Un(F@cx zT)`h}Mq^iEENa*M3KURxC|UEn=TuJ>-qhElrIspcp?Y4tB3)GCdBbx&tNny$q{kOE zb!d4>by6PwiohJ^e4b+^^_Oy^gsH+AH+^^=`@LPL9o7E^X#d|7xu>r`qJjF|^6mrb zXp+#VpykF5AUBT`L5-@QL9DDHmj<$&q?G(cl|VkFEhq-)hN7J!x#TaR$yQiKLUBdp zme4ibq_o5PmvH)GO3UerNy^DzL1Fw=hh4swr0lcMP5dvRGQX5k60WD@bA6H&e->^N z3)lHi@>ib!Kk{>*OG%`*vH!m#PgpmPN$94Or1Wo6_z-w}kH+H;kaw4KPS<=B7v)g> zq)+|=^s*MO>uS;Xp#|lQ4WOxp#=1B7^pfv#nsu-0@V@D#_%g;{qr^`l#7`~$`(U{Q zjQ^8JY5olmC*g9qO#WKQUogLv{K5j{7Uqcua&GRu zos$W6I#}SWy)AB7SfS9~5l|_zVb#O@_DNYBif00@E46aGc%>m`9CEg-`z&>YERgT&!Rrvw=)z4jT`B z1UqSAmPv2y)9ZsL23DxIa>pYZSNv}0fbn(~h_W?;zl|}x?9AZiWCdp@JJ>rr2;g1j z<|4$=m0TBR*gH82D{@y)kJf7$ZOZA|(U}jzYQ46!vw~_LH5kiGVCHHGU73;Kisyp> z2QC>We!{nC-+J-oUN24t{X{20apOKN7Uo$#0?4)-=nv~`FE|Ykg4^gY0hS9H7Ama5 zJ;x_NH^B*B6KFv+EE3)QO<<7X0f(Vcu;}Xt&k?b39TF}M>2w?rEDi!?AifnS4-*#a zd~m13s9+doxxs#P2m%*m(1t%9&QmFzHuAR9B7`{1jD{0!@EvJG?>sdM9@AstJTV-e zQ=;KJEl&LG-)mA7T&XO}Ojq=YCLQ(*gn67BEa(Mmn-K`(ICmIDyTX59Ec#9z0(CPT znA(_#13X=1cJOj@7QE!lM{ea{2APi~JOiEJ=IRBRgFD=PJP_>fhA1aX1lXHG$HoX2 zL7s5*bAgwi3~rw0RF*NNb%BwgCAxR*0(pfF&^6IQ{D35w`dSMx(I(mriQ_X7HXsT| zZygs_!nW%mO`hm7rv}1iT$u})jX)Eb%&*;zMx+*(Njiudfu%4 zdKxX1ui@UqW3*5zz{<7L=-$vLohzc3QX6RZ>I_Y#c2Msw2OrYwm|>~dv~fA|^Y21a zOGN<5YQ4I^$-xjksJyJS2)ujyLewR|Xbla>wQmoF9`XV#j~J37!17)mCQx(LgTA9a z?mxbQcC-Ox5Zb`FCv=Q^K)xqE3w0H6=fWX8xpyAb^nAZ|evhzhe^Gsp){FO0oPP$z zMd$GR*=^jueURQEmvQIb2|Ua>2PbDEsP*m&EuEgwGf;(=mLhCzjq%l2vuTr?CN`W3 zy}F`J_x6z2?}dyhL($zzo1UxYP_xk$VEOo2V=!b`CiL`rL0v;$0Oi`6@`6&Ns`M_( z3$LT_!FjxWRg9-4w{dju_n1Y`-Si|sBq#V{y8^?w9_&Iui zT|To1H_jixmD9U$?&xngeP}zmzvJe`BlJwSfsO`^fsQJTuPT&#DMGQQJSL7Ef@@b! zpmSF_C}}IeK3ImV*@L0%s0FJ8dPW3U!L4r~Tx9gNBpsU4SwGI6?Xl)4%aX4rlsChalS}V z-X+x5lnM}EQN9h8*BeIq$}l!i5g!>gZd{4|2lt>&Cwe|um?3^}7PLsWF3ExDZl?~b zSVwd)?FtPS9els%Crp|>4ei@^M9C8-TJ4w;v;~8c28K*bI^d^6@9c- zpsn4D)=V#8N$;X=s-3aw*R=vH_Z}H7tfzO1uW8Njg#qxkZI}SVC$Hv zS;Dg1InEzuz7CkVVKKhlzZDPbi!fvJV$Aq{5xzV73x=+q1XX{1*k*epdT}PAzv_qB zmDvL14qTE9k2w(tSVHTe&(`G3W&WjnX=N^1m`gzUzgeAswkl_!{C^6T+xPeU3oLg{ z^%G!uU~~Xt;_1D?R@5OOFzRE7&KC zy5i7421hxJK{E+R<$P>i&Oj{ZlK?hdT1WBokbzeTw3dX^F!&~==Wx1iOow#|pi}kBJt!JeV4Sd)->xj#g^vmtw^4Kb#X?a)} zERT)nGNX}_#`VS_G$IgwfnJD;k8I^PjnGG8;$N2JY*o%cc}z@^NI_GpuX~P!f zF|qNqck3t0n=);xxKH{1=Js^GlkpDOrWyM9pvYe&7qD0Vs2rF?C28AVXoPlGuZf0S> z1RzUk88BzOg2D2~xp_h!Jh+Dom(Jsly*sga>n8lP{d;jR=CZFBBC&5AW~`WrkxM6` zPlO$mY2V?!s6TvH4H00u!)L0MFXcA@BxYoi%?WlB*5~b@)DF(l?bq$f6ZS~)(VPqAK9v&`^(q- zF@XEY{r>Xf00ZVMY+=rT`L4ac3$Xn6og2lOa%!@dHUot4GXztr9%EIu)MnZ|1AFm zl1uVG1U|UH>OSCo#V35a*FfS1ekrcHj`^p4h^AJFjn zQ!5qr(+Z&ZIT~nhhFU87+)kXgHNa`-5TNuWKE5S=(JJoQr`M=`{{b)F12rE%P*@|L zGPwP=95v0A0ylidhn6xuI9rTAC!yvFbe!^4f4YytcUMvMrW*B)FVRBx7T!|5)P`4$ z&1iW~diY3fX(~Y8_sen6&J0(4!+;A_t>wHa2h$+Gc-xE@Y?nR_{Ad(+q{CXF~ASs1o@F0 zfX#kE_}(W($QIuqeCHp8Z)xGTHrNkqLVU^f#kZ99JO2QDPw||7O>h9d4r`T_p#fMG z5+K6Xl6(^sAo8y#;qqBHFUw}XR=2hM*0f)ym-0wyzmzSXh5i52{G8^?_Wgemsr>bU zzE~gZM&d-`BHWEZF4#!!cjSH-a11F$X93tPiH@pFVHev9@e@x{+!URWREg_j5S z(!^?{IaevZ?(heh+PCk}*zgwb1P?le&;y{QsZQ{#GX)Ft3)MHbh@X=1PdEO*g5?q@ zE?JPXuwRmY0?q$^&1HTmg@uJA^b%q|u!2X(dwfsutmfohN6zD`xI>%nvL|;0V7_(J z3hdwcBm7-$Fn{V8;L}UIs(py>f0~P$+MD=}RjiX1mVE68|xO8DB_U-xx zXO3;7&GHf4zkUeMOK;--l|y)Z`=s!{uPelx7kQ+|CwNhE6HVpxuzF8-cvBSycsatM zqZ~#!*kgpbHHK&!VXT%J#;BQKlCC9Y*g9fffIpTcM&qlj1RUGC40q1`imKAHsG~Mr zzVI{pXL`fcu{S~jED-2#4O<&+Slj49QH8B7J3~>Y2h>bep)KnJJ=#bb1zW>BN(P%) zC;WW&SENr!hj*kC()xyB_<(o}PYJ^ing=6&?Xbef7~6aevCH2AhrG;j%Eb)VWL9|O zV2gZvJKQlb#$9U*T%oWd&gR(eYJ{~OdRXYGjiG_MNFPj#@KkeHCz>K+LNMn4u>hV! ze4*+`n=?B_baPP`2ZzdOw-r{g(|%lxaT{jCIMN<*Q&KQ^*+9(MF&q0TP9R`%EP{s9 zhGqmU{71whWL&J^%w{0hep)14rqPRYdK!GDq(N_R7*vDpVQ#65Kr7V395sg4cx>W;pNy<9(b^WlGFv#f*u%xy5uVP@@N{&5v%L*uP7bi6u)hmit+P0J zxWU!i6K+0U0!+8Cvw?|~1m_->Za@fZvixC^;*LJF!DeAF-h$?f+2>ymXeZjkDAOGpNwzQ= z;2}VA{^_B~ATQWYihvVs?Cobn39E7$ZSGy@n#GAW_l~rgXZ^cSI*-Xw0yJm-a=+>E zwArV$qr;#PZbjo@4y`CVXvI20HQWY9iJk}?nT)h)L!f4%3nM!d*pseYU1ad`bcL_4 zH$1%D1>Fr>i+j_v%Z}~?Gh-|GxVs?1-vi0EW(YLZhcUf0tpYqCbCeutNgub^0g8GFCYuDtViCDO9E@m#D3R$4N zpkaw0k%-t)3CNt<7Yk@k?mf8!Yu7Kr#?8xc=KMYkpO6J}4`ZCnIfdkDnV7MCF@Ae^ z1mB$h1+)KL1+7RcIE)A)-NXpXa@*0t;y^yus}1Rmt;|{945SMS^fBQGpPDQz)MYeI zHsLaaCWd0z*kR&luu6uiP`B5GMWiF$E5_oGI=vWMc#n+{7NI_)VxSjlBLFAEU^{60 znW&cx3b42A49otG&>Q9pvur=evI1e1 z;EdD>DJZPG3rj0abfIUIo>mtqc9FxjElX)JQi->XCBgz)NktCbddR`U#}0ZXnlLie zg|Qipjj;|4G`qt{O9Aqf-`rG7So5x4vlIpf>gcW7RRHCymrci~w@+yenFDWMC$v-O z00nh5bm^sx?urTs2oFHmpd_?4RffDw3o1@JFmW@+qr&S@qc=1o%xqXb@2N%%% zrjq85iJ(lewKs%`nHG#q)X}z`9QN+rjww?{p##&2v~RVN?qQ&YaVus)#X%2Uj8)KC zuRHV{43I+4(6WkLK{vx-em6?1r=x(&XZND6<}u0(Z=(L`W6YX32t7zIo#f=uk%YO( z6&UoEZ{;~}-$4%Ep0+rCcqcx-d5(*x_lvX)m~;BU0}@dCyb#Y{7KsBk zA}*ZYgZ{>yjR|K|@lb7Utjp4x@$=l0|Nwc|K@WCtGHI1LAjKCm{? zhEk7?(9=_gjjg$`k{&sEZ~mC_roNo!$us2LzlhZMK=f8>3zhDqGfLl$`p@ZD zFJ^{4@%54^Xn0X94)*bMb3ivr!$7&Ao+7l=I}7gj8#m72$DcO~UGz5WgSf$cVc>2J z&x|m1u~dNxJ*#wm4A8Mp2Yk146C&cn(WAROoUE*2Nb}Q?<~i%_%<=E>rr|zrU;7=8 z?;l3-gHtHJeFixf598sb{ephw(2j3$eAgyCymD9^hFg69JnE|RV5CDj(eDLyl8`i}S!>gp5gmfvY~eBV3R@It_=e?#GlL z=0H21o}p7>#0H;#6%@B}C{k7q7l&B3ap{SOg?(Y1<&1Vds)$&gh1j)25c*YL1kO)E z>Y9;I4Ko(c5eCauy^ICNH`A*y6-(5_zR(M{g{p^%0Lyzi8NzQ!A_7Mwp}n~>RNM^E z*+vC&MqQ!lX9Q(8O}bV>2PI0p5;1lu^C%jfi524AzVUka0eXTIjR2nJFqOp2EPU8yY+2+l5pyev{3lJGTu z2w;m@DXo-VO2c(f`dI zezD7GB#>7E${E!DQY0W)DpzU)ixkJ@NbTS}>~i@m?EkV17EaIkxgD$*cDZbBAA`IM z40AYxZ%rrI`8J`c=Olt*u z+2t^aqJ{x;2Fn>BXJPPM#8dwzz*_>tC9s?QJO&)kB8>@;59^ilvL2;0tS9y}=*?g@ z3x{!elI8e6f#X~k`?(G5XPxt}Irv~s2Fe*EXWnrJ$=Rx$T~5P!7$9e1dKI=ZXRy3Y z+xAdaQN^_BGX+S_!hrdJfrEu^6O&Q|Sl%}?OIW>6n=xJ7+Z{S}6n)};^PJ$hBF$-O zj!7csGlgdk%tG3rzL@ycEDTvV9`Q2g)*P>P{aR$qsmL|gGt3<(9?nzn6c#ekvRn(0*nG>EY+;upAi*N7{oX%ovO+G@#@~Ir8!!p&&O0 zrTO{7Ey&M9$&*49J}D63xMWc+SyHpGU%Hk6V|FEAom~!l{Fvfc$j>11!D9#T!?y47 z)6ZMP*)U(PT#U4=BurT}8IxAef?b9$dPP{lenKpQ*NucT>0b8v;Lb0>at6sIz??1c zS+{Ii&er!K8-@zYa?>$^Fi3L7iai_fjQV=B@Q$DodGzqEpw2DM%R|xQeB@KV^NOgA zCDd*P$jhm3foB#5 zo@=RG>KiH^i(l?D7W2^05qHSFXKRdNTN_kT8E141am_CTN9Y-VqCBd)1 zqOqxh%A@vttODLW$ESBKct>4&&lD?9Kew6ujnyCVvE?0IdGU^(eB_bzt&|1X2(O)nS}{7kz-H^km)lW}s+ zbbL57Ny~@Iuf=-XZI-yhu4z4q;xFL z$~dwr(%~n{XRA?irO?`-N~@xDKwDh3n!nC6UTz;p^xB zgZy6#hyPddWjQQ0q(9nB!tW-(3D$R6{pyiYnpGLP*GQhm#-RW1OJ|G*4LlEOtl`C`s(w601`p}{}e2j!u~Vivi>e? zVJ=yj^UtCLkC-?>BS)OxoL6ucxdpdKZsOj<3n+bZ4^`CfpEiGugFCmv$KDK+24>KH zwHn3M*KzpDHdHm=$6Hk3d2ZplxUkJ!@xJxcS147QV8mK)A*E!7tGpkxA~jd}=F}kBr0=+Khff zo7vsYdN^mVher;ED7Mx^si7vGndsq#g)yo~3aw3Wk2duuUCi*4rxE6PYa`pYH=-l8 z5IN8iq2nCkHrf_8!_7(TVbk9oHd#I}PxplP*fAm7H(Yv*LW914-LomGh31OE*BT-u3*izEwCHu1*Z|dh?<&!)XB8b7)gum zF^PznLW{9kX|S7>1P9vmx-RPn*_ zT3md+ggAJ)391n0);4ppfw_k*VumDR*0+nW@8$`7d-x}WjHU%kW)N)p`op5H4=e`+ zz;SdW+$JYLKhpyy1AO5zH3_P5wqPD{KGco*${mI=K<+E7!PzRDembp9_5E zr3!0utFa8~h6%bAN7~S{b-CTt2qA1)?o45_X_2s<5CR!(?471W!g*2z94CYc*K-E* zv?joFT09KlyTZf6 zL;UR9(M^VcFb{;s2Esoe1dg^&@SuAm&cPakY%P&WVr^>yJJP!&f83DKBGJJBW;S{- zv$unWt^o`Tbzw*Mg=(K(u=A(68SeuHb5$tWYeUz=6e0a15S|r@{^R>0b!Z|&QiBkb z901p7H~6Lb!8g?#+0*)B`@v1PoqHZdrMK|#(FHupxr~r#n$uD4xKwln2L2XEn>QFc zA05Zy{Tndu`}yeNrUjcJt(N63Bo5=kNLSHtoE!z4u_40BoGn2)o)7EeUk-SW42M%c zZ_N660m6sHB6DOvoV#%W0kOg8s;h_&eH5TzqXyF$M;OP;1X#|N<;;=pH6jXH!Soy$ z5(T{gYpD4dBXCv(lFxg1g|dQcc>M4jy|Nxb z-%za;jArn+w+h;JY6tf~+I$a9MQ3YuC^%|Elb$WLmbJEE&RwU^sr&>Khh|B81_PtpAH2@d?Z1&{BaM?Jm6i}J7GNyP(n>_L6k z?21n6T_D%94N@iygl&ww;Dj~|HGy561JoUQ!z;!GIVCrtrqKl|itS;jqXY%gbvM!n zTXPiVUc}`9r9fK03wvoy`(4NZc)>#g5(LS`urM1laS6H%O3c65xHPyPIkCvja7S~Yi z3a#Gqups>zv-LgoOH)lAGFu~5^I{*(g5RCTy&H|cn~MR~u9`^;`Ip%6-Ad6mRRayg z3`~WIx1FG9>R{3xMj__tV%!;O)+*u`C%^phldw{^)b9fmEmf$~+~z|=8*3lo^r;__ z|M&#TiZ5Zu)~}Hq?hQK{Hxo?-XwulY+vvj5Kne4w4Mk<)4e_y|wkij|{j_NizotkejW`gGVI^&T=Kv-S~|Q&_kw==!x0z85|2uUp_oG5Q}%M z#j(;$`1a(FxcK}guDra5UvBKj{2glqor|Wo5e9!X1}csk=hi>EWn@(d%cUgPkgdelrc)A(j}vb_!H!og$}0x(YT$?*IeHyKBO>zb_(Y z^%J@Y8Jhw%H$!1rE`jCk4SGV;-56S)G_Ra>#Q~yB>*A2@gRHeqgP*>>-sxbE`@Vi771kJcovS6uG!D^^T!CTU(z89m&<7wT>TP^W#M`xu$+ajIh@n; zHJ2~dD+$L-<#0NVm)b2|OXJ3V7H%K6i`ygVmO)(xfH@Dhk>glr+y@5FxeV4bQ?#&f zIot>4D^E({KG2*G^rNyu1;EW#<;+#i)Ied8TvrICiAG9F5}4ndL2dz3r=%e+p7N70 zxXWNKm&?F6gYbz-)W`TJaX2YUdTN@WT46u)y!Y>yg{-VB0g6i^z;fy@>xF@72D2F; zmqZGath)JH0=2nKQaTAx=d@B;QW_S%2N=xeayUI-OH?XSTB%%#yPV@V9oH*akB^%$ zUbrj_mNS6PuH@%3MvfYTp~FT9;F~SQnZukd%jFe%2uc>FVPUIt)+dAN@d-)7&mYMc zL?1nN4CcjH$6*P{s}CX=vNpZm$=J0?(e`khqqFv zw94N>^M4X4o`o&TU8yW#HBR{@&T^M!sc>152FI_{{tYbmSV}T8Ralni;u%s`jDqXj zB*+#g!f(|8#B3Z3J=&i+4~xQxmD5q)@(_8}&t4Ah*vY}Y z>WsM0!15jYb{Q{w&G){;dnE4-GA!1I0$sPDx#rOVqjpI9i;x* zbyU_*z|P~aN5*xBwo4kfB7;QOxJlC50ITbaP{j={OCBy=lBMjsF6DgY!zcJUH=G|m zBiR<1!EgTlY)On{V`w<*{e0Q%=gcaXR_qAw%)!vM?6q&gwXo)#a(#fRKu31C*s#^x zl^x+BtPb#HU2qVq!o&C_CW22AQ`oieMM;;WPsUKyb%(fm{Q|Z1m1a`Z(^qS#lrmS( z^5gYaxLGT8v}Y4!)?wGC6Lxb*U!TZ)}ntbA3sxW!I|C7`q{+$7ICcU?y!6*V#rU`!wADwHlq(wn5`aLAiRB*VSH^;8*2F{O`%ISODDe6j$%@ z#$gqRt66}&F(}`+cQ=Rk?lq>fFz?$dFQk3j<^J9xwu$X~*UQ6wJ%^5N;ppKlyztZl zzJBj@(n5Wi+`p$8uGWIJ_O9xnQKlFQZ1@6iLl+wNdgWIV4A9?8;@a^4y- zk|%p~V{Tp+UELkX@7RW6jvfr`Hd*bVi=b$T2&lcQ)mHUitx@%Ri#$FnREpC0LCOzB7DAQ^y;?8@|iJjEO9zh!0h zUY4KT%u7GNMPmO9Jkq=A%0F4@l(@@=odxF z_+rXOcQd-!iBo$MIHimL_1u~#9q#FQ3?G`rqRaq3mHIs3_}tfnks%Jm zhju13!qsTRCI!Wi94G^XfJ7o>85)vAP*^;n(b0rNg&ANT7#?iA%KgF{yv_Y1g3Y9! z?m<2{`Fi5w?`c4Ja6%*@2{8o3M=*T$cqT5LLASAe2`-4kGb@xx)o>kEhIfxd1G_C) zu5jFYaHWcdhOg8c?;UjYi9Gp%-zf=Rt?F&N)lCrkR z3&yD=lK9c3v`O_aaxGC~3rU{Vozz*qNSG>}*-52DOGhJidYSPMQGl!7y0Q@Y8=nh5_bk0pl}_1x?H%c!C@olV;#e zv|eYfbYN#n2X%tf&s6Em&+JeB#0uK_JKz-LZptDC4 zR~`7kP*OcT7$)^GKQ@-Zf&TcoyAYsYT{;923eM%l=`L}41O?K`*_Af!S~6nJEmru)z`Uj6!Y(gzpt@%A5h@%Q(5dG#l3ymkbi?s0fa zI}RI@Wu#WrgFJF_f%zbzFiW+{y$2^6&-2)c1qPNUk1L>fc5mKT{T>Bly0YlSNBDl# zPo$J((9Wl`k??5~ZcDoa7yNp~8eRMNF$JVgk`8eHWZK3%8;wERWFG^|1LYp*lIKg= z$bn?aK(%9_w+zPm@XmkFT+R=a1~z^c^=Y9>u=H1IC*;KsqTgu@SWE)R9(QY;X+;=g#(>Y4YHM zbm`pA0KiV|ThK|KXAd;Jn{pXY&zv@vBL}t^X^%s@S4h9{H%=Vggo|58T6SzklY5$Q zcPm-m*@VdCXo^Pmrg@0Hf#n?{9q>=|mchesoIbIYxwD4Ty;m0b3$iMb~Wd|@Z!UG`Pk8+^Ziux z&F9eJjq?1yAnS$PeXoRXejE3+zKhoG9T~l7vXQxI>Dz(ZI^9Vp?{-uSEn(BvWo%gc zjrj)G^InE2Wa2sLE5!zM!WVc>DZ+$whod; z=>T?Y_aJx4K-a~tHEVzW+Q9Y$J6E!K&39}PTeI>jcI{rt{VgS3?e5~vws+B_Sra1< zqp-YPR2M?Jh2xX!hfACz9#IZlx_O#q%ReDED-tK02gyqhH{R|$H~+$cy{lOM>qi7h zSt~?t+3J2;w`qp0U3=W!?Tt)GQz-+jQ}yJYIdKTzefE~oE%$bAZ#>^yHErwwVtrvu2M)0lbrQJ0s!KvZd5Pi+iNpnqt$bB{nv#ajXRm)9bGz;+ou@kXm29BrEt6R19)Zo zaj)ZDWb{mA_9K(2syR-1L5A@rZzF9+mpeE8#F^t8Ie&gTn>KwzaDXlL(w5ZIKEU0s zVd>F@jxF!RvD1U5d_sKe*}r`ir;lvm%+alETmK^?29`2%KrvfZe@ z1ra9CmH`V!&^ovyUFDhj+D~uDnC~bX&u?bknN57O@e9JcC1Mlrj!%9h{g#ZQWsD=E z|2Bt~(e{+j9>9#(7tm|LU~T>;*lHX1Pw(sgrs}&X8yE!Uhno zW_gTTX670yt6sUrWqFmWX1S$XZcN^zG4fvhzvEeMq*(s&ERX7*Y&^@8auSJ= zenwuFurNfVILX{L`hv zQ{AWWSf04I-+71eR#kwg@mkkV({+V#78JLjoNnte%Pf$sP`0sYc)gw;x8iLK%B}Mn zuj|qZXN7HiOv7s28n1#u>lz9Qb=|VY;83?U-D*~N3s`G7ja&Cy@mbf=buC{jFM3?- zLHAieQqQ;csr?z2TV`ELdAiiJX?J65>Xql@DO^vH^#XeJQTY;`^s|JXeY%oYm_>F@8hQCr=3=?I z*+w2k!M4hUs2NZ$`Dg&%IytB0OX4Ul$)~6=m#%WHZl!WutgNJzZslF+-Lsc51?TE@ zt^i&=%N4Y1ezi?o-r#Ch8RB{VEd!qTl>6WK8H`#u9OJx)Zyw!5i6v<*ElB{ctyzSZ)DuUAN%5 zg7L8Vr3RQ=+bYST%YO&U|D9Q38i06%g&BSFh6z6Zxxd_`RVVmVSZ)FH#<0BKi&NRb zX-XFlmAv#M>am_AKGC0)r30|<5h?GP9F~6c5~r_K8c$`N%=6fuy~YeI-@Vg-*=+}Q zn7Psv1S=^2D^rN9$1U$_1IYi7BvB3TZ4%$+ty|c%eKT8jZe`u(wfwZ~dp`R3UH<;& zD@>g_mhqEDGC}%AV;4>&U*3NKy_0b05l#NHV@&=-AL;&YVYy1M1TBzvsnnyEkCtKL z6MfCL)1X+wWK6m7+zwXmTQ7Yx$=}``?AWaT*xbwUefy;kFZn-skUaw3JHEpbNRm9JKQ)+yhkKKXMJX=DVa>&gYmb?TU

    y<7S0&!6lkooItPF8wYsUaC z1QhU#t0zDExv?`SfPMbH?Dg}Kbx+m@OPG*OoCv*#^PWvO*}e%^1Ki}eA6tV$I204k zwjeJy2L!MoJc6$SeEB#bncZ4;N6y2|YHF_?qq_Dul{KfO_^Y{axrU3iI%no3<5_-F z=c?SZiNB})55w~M!~3O>rSMOm;i2RdkAikxc9H%Q{Qz#cRec zi`8AaX3o(tRrOb>tiLLDg$q(?7p~U*i&aX^R@GmWxEhuXR`)Na*HP27HKgULT;mUu z>uY-dpPpZT@v1c3tK5)=dPA1iYp-y%R`*{q$8@RryL{&B>*yYk$59*U1eHQ%qDJI?6~r;Hp>-L;$4)Lf*#R=+^iadR{CRbFrY%5kmw|2`~N7~a?{Sl$?zThQD({%44;>t>(Wk$w9(wpYE&cQ<&K%L8iH zfo*I%xLIr?I}U8*@bMiSJhX+!AD+oq@4iNHLL{??^n>e_T)%#d3zv3q?dDPH>(vwT z6gMs%;Cl65j_g=Q<)O8llYw{D(M@tAo}u=<#J}}N_U!tF^R+vv;kXRdPf>I25EoAG zka2q@&yO5UYSRu(2}x!_WG=524dAJ?V!j?dnK$|mU{OIfDWXkz?;hQWqPF0{kcn_9Mm7mhwP9;@h{ScW5x_wss7SPb68w?D_ITx!2@jdEf`G z|Mo8DUtP?>34_>HkjA!%5cc@`a@fn0BcARY^mJlhpbNXA+*uWF%Xh);`7qI*$Me0J z)-{O1W!}=^bS1lwAK4?LNEsDJ_`q;t2F2lB9AN%Z?Va7Ar5W8bT?V}wgq5d}&_@R2 z1ItM2S4v!k3@8Vd<6RI>NRLc>%aif#mPD&~X9D{qnMo0&M`n;bF`v{a`8>Vibp|~# zgTm>9`SS2G8T6OnGcJVe=gV;)6=DXR=@WG#N$FsX>q*?0Qqo7~(06D83wnq1L7qQb zBD^^6=gmHEKYsM`Wr?o`Jp!Exj&{Z+(bd44z!*QG!-9wnl0j%tERjJegau|08k9;% zXrz&6304Rm5hUxu_=Wo66X=U)fF}WRo^QB6KA{14h4|nd;*W1c070?ggeFDe9O{W% zv=6~qQ3U2h%OF<I(v%;jz+QA7>TBW`>t-u;pc$PONnjYH2UGf9a{MI51{a`7G@ z`-dVb`z0wa&3lg`D=lFr!F5|g*AX%(c8 z>`Hq-2ORxe@DB+fHb&Z2LL!MV2}Fj+5E2qXd_n|X@-p-d3neNfj6zRO79=O~YE~A* zy*vnVb0Z=yjzoDWr$vMl8Rdgtm^)sPVc1I8{&F8Ld14{c7fmO>Z!vj;ONj28LU2J0 zGhcX!@3;I!#rO*PjOoRcMH5*1$`XFwzD(Xgm8?I$o>@;#V#?y->^icNJqK3GGh`L# z&hF&osU3vHdXrI}!m}SePf$@b)8AOa%y%B=`QJWd@#imdZ)g|uFM#l|*#?#ejgos} zLN4JG^9UZB)v!K3m$)fKgi5D`{ZK!Rc3#nsD=$zz1n`j4u`oxJPkvO;~!7|Ww@egG9 zxM7T++ndM6W%Fr_E58Rg@oh{H4<`hYnIDW#?`Q-0JK^c&gKuaA?Ofbx@99e?DSuZtM_N62AD!E`!QIV? zgv1yF(0g?+V12O>ZCLPd9^KYZ7>Vs5Q?K581hYzh|{(^Bv zvP0qO1MTmlg-aW{j_pn7aA#Wkb;Lg0k&a%i={=-CI%E6!efdXhUh_2@R(#IJ6;3H%?vJ5bWcIx0H#uhcliYE~cy;9PH?9(}^}6+tR8{b2;WHW!uci*pw9{ zvErvs4cI=oYlZOwKe%r-J9hqVJ}TVVvI))YTbMa4ddhP?v?xK^kS#%_p?GF^;232? zTDMrLuN^gIcl6MDP8{CQ0DO;b=E(jveDmd-+>Zlp>MrHx*qPRCThX-HeYBSJ z*mO}{?RMC7mi3Mg8fgCBo6njL0VfY_V%0C7^0#Le+?o{hh@|zEmzNlso~9k|!Y9d_ z?vr{MSgxSlTiTm#oHM@Zet1MVv3%Xv?Ap76AHIFtc({M|$?I&`^sBsgYq>}A|%$#T_@VMYe@%r54yNWnaZ<4+nfHAU_eEwbka|-cgL@+koLQ4 z+xPtV{hJ&-u!fgkd(6nbbav}ZPVWMoV?2p0OW-!AdkH8Ep|y8&?ETyE@RKv7k935} zllxfx!{_|)$(wNHG>7)C;>f{utX=<&)Z4wp#`)pm)DHas;%wiZwk_|)#jzvl$#TEC zbs;v=&q%Ilx&8j*CtN(g-%MJ1>D*qbj&Eh>y6-r+?N?dfOpLTE8|OAGd2J~XJ(C*l z`^&tyub^~W(ifX)ft zjDK+f_xst9JFbGz9%(djZO%9u#KsTGrb*`}Gz;lKi?9yd>D7z}{X5Vqq(M5$RqD9k zykR&cxKTc#D}LGj*hSkD)inmM3_rrV#$p@qj$39RHu0Ved}IR6qwMJ_&pVxTRHaj% z{q7Ye{B0KRZ2W|o?=2>5U@D&7qezl>s1EE^^2I$X1h>Q>{4%4Y-G||s6^?U?KfzM3 z3jRGyA_(lANbe^`a(`?m3Kv%x8J5h2-3{y`gmg2g&!0rSRC-SR9? zl6RoxUH&g7?@bGo|L?-`zmj3mN!(Q*x=)YpDgaY} zs<2Z*shaMyfMN5N^4z#ho-th;;H4hd^Yoa8Qwa_QY?gPiLc@FSzt2n@sOMPVx-q=g z^Ax!1w!%2Qwk|E8Y{6{H^qj`wbh|MiZ)|!@^P`^JjpNaEJ;(Awx5DW;R#?r4rcJM- z>y6C$vVySr*l;x5_>}Gfm>l zk#n?6v>hqbm-d?wO>BG=S-EKx70Weq(#gxsASXMW%#0MWvN9+vY-o2@x;4)#r=t6d zjO9{XluLO@J{3KC(64tNS@xoL_Z|k4_p9hjpI*HUIJcx%tn^!DsGv7P@~vg4WuW`? zdJ3)8tajdbUE8#^t}tBzxTa6n6@F`2J!XYf)BOs})q~tx>Uj#j_1@9=G!9+<+2dS+ zxSpeNDAd+-CQO=WWLeZStb+2f<0cp|uA1b!-Q>1AXxXZbkz`TtaRuq>p|7w!FTc=u zn_IA4<5mxLGr{NWx0yJ#JhWW2%+#z8D^^?8He}kUgzGbG5dFpvr|;Ae^qDi7Jb4eK zOz%nB;sJ!sE-@O{4c^J>mD~Wv)#F@2xmuJ;vHS%r*KLL3x~}`JZ8a;b3E#+5+_J`y z{LlL=Xs%{W@M(FLH(1wOp5;2hXT%e|3@{IsbVNvcBd3-b&+^@zqx++yNO+`z=%@M+ z|6~I!_Z*mP{t^6--#+7X{RQ^z-^KpzTRFCC&n;MPp!bnIY~Htx?R$2ZZS@ql;J9TL zB);WE{)YsKdRTAUv6U^`Hj8a#)0WMw+q|B2TQ;y^>v~qNUBMS$e#~pHzQ}~J!=!EW zWx|Zn%z9!D8AA$XOdW@F&lvKal0LzbUIvzj{mHvrVYy}ga|=y9T4kwT&I>O;#Pe@I!gHTJCH;a50wj%z z3%im2#6XglRFLsdfAZ$`llnWwtQQxu==r6bx_Cy$1xFk7)Q{}{{~uVcp5?DiU`13b zc7*uA)33=n7pRvgI8%q2$FOc2M_-@A-q1+)w0B`wWE6b!2`a}z)d{Xvous}-;yrUh z!pb>y*OXRseeW?ir;f}Gj;;!g&t9vRLseY4RE3!cwE6;PFP-BuH>96>QLc9wr2qA6 ztQ#wBJlSC%%1++^wg&hbIIX7Z>qFf5HKr3k#5wVaPY7S8^km=jAHvZp!!R$`U*tL$ zxFF-bbC)EK7k0qg^Z6~xoy*-u!LnVF{=L%WKL|V4Ap;ZGqjORoZvfs>?yUU?x+lPx z>F|@BfB2jnJ1XZ%SeuAJpueHACKUgXG) zi|nOF8hRB6IM4ALm0YO1LiNRKl8-B#zg#C_YmA*&04Y_K(Q zy&BopeHRzv%yp(0Nv>`Kft-J(Y$(MSQ8;@^R`9ZZO8F9h} zm-k3pm-BB_^TW$8;VuK^9_>AOvv3IS7YyT_%>KNY-jlC-4d?azGM>%NV@6~!6M{k* zW)sE~?_9?EWK!JGhYG(aGHo15YTtpZ&h06&?MQjYR!sD9V_u*yPez6^*Ug!wem=Y^ z1IFj0+wx|7bH0dcBM+mFYzgkneji&-csOy|!=1g3_8bWgVtuF|pN6{eMv@Op)4iCR z@5k&BG6)-&O6J5Af`^7<-^Uxg<| z$nVjEw6bDC@)C*bl}lvzOx!agD4aBafbtXyrVV1uD+>u5l*6FE%_Me$biC99cbtS9 z6iwimWQM*mi`6wp*idtV?@z8HXk;QmGm~(f97fRMOd=M^pmTP2k|%a0dz5r=hZZog zZyHa?VEFSCPc}t3v)`?gk&gK`!k>r2y~zo3#x2mn{3Y8VJqYInFFa#B2@LlnGBS{u zs92)IQwa;oB)~rrU%w#y1APb%4Inf;$Sl1Bym0q)!NJwuShQ+r_bQ`npROckB;ph7 zgNvUV9w8EUxEGx~ZSacm!!sd(p!{g!E3yeFizjM84uO3d;C9f!G~9c|;wOXuh|&2* zy2QOAo`9hlxc833qfb2kgVGEzS6HrI<<8wAX_ewiK>rl%3WAMix$2WQjj<5C5ED&KnhfTW(}|6UBPbw{*w|14!hA^1m%(a= z478-Z&J7IU9U1tJb8{m(IGBvw0?IS;>5(mi?5sEGz)D$@iaO!K)9^b4&?Cr}pI6 zb)T|*?=PIYpq<{;{QT?3jF?z~V~{;BfAty(eRGKJn?>6=58{WH5YaCW``lncrLJNo z6&NTUFe1%(mn$d_7?n=QxNIUO`m$hkC#*s)SJv-=P^EDM_~U$Uq4pk0D1O@lhnDcXs|e!0XB z?uL&HTnoDPVCjobkUqJPJ`>ZJ8`FhlQJx$L4dx3EXZp!`DScuHm$nvKk;L9JYuU5^ zCswZeh*eSs`oZApwbMA;x52Sq5jmH*Gv4g9PKDvV62Rbz4u2v7wv{f_0 z5+h0PUt%T^yw|@ScJVGmX9cru=dbMC@)KLuf6IY`>sh<;C+VzjkayToBK$qDZ`&Ft z8ynnR-3ajUHM+j-TeqN7`&QU>X-~V>P0d83&70qWz2rwH<5Xz=^*8SrSiW`JuWZ}; z6YJJ}!Rb?588xzp(Gq{4l?*)ZYJyXU3q$6PqPcfF+68u@sdH0Yf^8`2oyz&joowIq z9h=vF$?3xz*tYgNxPIQqZMZwM$JwSm9?tf7xH#hG>Wqtv3r;T1IJ?Ty%@qe(x3#x1 za5^?J03X*b##{Ttx1ML;_TSmQ;RiOZ`I=4ZzmtK-O4H8oYSDzYPHkw?v()Asimht`v zFE&W)7#S9K`p+KHAibhqL2Mi<@H%>frz2i)CV@sjqY+IH%{E7lR;=PIPmS|vkU{NToJeuPkYRA|~ z{ivxvXgvDQ9N5I(jXxVNaQ(n=_RKDP1MKnkcR(jHb#(5CpFIEFBwfBf?l?Mh!O77E zA5SM7?b_k%X-8{yX+%2{`LvmSA8i1?_W88crD$EV{!B9#8dA) zgI`euk%P0aF9_oO9p5qfk#S63GJ)jMcuw3r!KBw_qNJBY|W zX%tWGN0&q|<5{k-ylH@)d6x%wOToJ^iui$fjC*kw4}bcs*wZZi;u&828 z8D{1g@Xifk?rV#<-@O^b77Zt)FqDp=ooE}_j`ks)aZGZ@BO{P@;r6&?1~cTb$=v4C zia}3Jrd5msJ|&SjqOu3+_P7-IlQ**$9`YWH8JSOTU+Gs&sUWZ<&PcEX=fz_i zVNxwsoyk9H?B+|@49(qB+n@^mLl&>vz#qq^!@l>!1B0J86=L*B63KI zkzxtylZby=B(c5H_iVI6f&&VOSu!x-8d;`W57Aibd zFlNCpg`Rp$A)xAy|2tT&fLWoMF7gBS@mO?ZtH$4ylz{N)(Wrt z^}1SL8n;zvdQHufUPI&3a8|iCPNyE%eOCT8Pr6UbT%ouwH9jpft3Gw#Kg%~!;>(fi zs^@yPly9QcMVuT$dJT<7A$n$3 zDp{GSTvjS>uvkHsV+gnYyb-(5LZEb6L>e7PcdX6QtqT%#h-KVCp2R+Rgc{A zVApeWsb1w4bk}n=tgfr+Il8T0;Obqj@+o>9l~_@4ar(4o+lQ`eo#=kur&g%#u#c40 z@ctAIk+PdPf|5ByNt@Z5>_>;hq~U9@=#c=fZKxQs%hRBmNy3Gx~^X2iH}wM z%Osx`B-eEV&l~BH|5<89;kcz){#Ux?jWx^v3Dgy!cfX}s9{qHMf#$)I&QN(y>ja+z zU!K7Ms_FCWL?Rb-BY27Q%O#$)#|B9sUf#jduYc$F&pB}Ru$k;~*QN~|+O~tkJ9n{j z>y`#Nkwd%Kuy>1rezox|U$b#F z-+cQyufFmE<3zIZq6ieE(-yuJxv{Ts_HkQco>M zEh~lP-ZC!KvBcJ@JsiJ$TKZ<2*|d3`^wamTecgKYZQaKHox9n;w;^9T$)|$yZF}`2 z!B%$eYmimZeClxvlAH38{kqh0(2oKtyJF>k^VUsl+Om=DyEe0W?T>u&>8rf)`clS? z?Zwm2&*AY`=JWW6kJ5X|AOeRc5x=0E)W`ahy0jlz3kQ%ptAbrOPcrxAhnf52LQd42 zG823%Fjr8ncI@b31Ihm@SpHWK{D0T}`<~@T;r&JY8q|_C-X8Gk2NLi)m322|d0gUI z2Rr`3ucdx$mT}lo-w^obQ#icCT<2o_bxvKo%u(t&&J7N8m7V9$aJu#)vdP7h)kc^6 z(#3kt=;W3+E^+dDt%2t1VXn~p*tx@8k@IV7RX3#)etnY<0y}Z6pgSzzf(#&F=h_A* z=lrvJci=@SpR?PgjHKN59fZo8oYoHoHP>O&SFDcp;`_u3_~9fsWY=*OTCY4T*OKrj zFTjygaAJ?7`!qLeuTfQX)qE7VcwO>wQNn5&t3&VwDUY+Vulf>I7ZsSEh286TJ2hPD z;N<@Twg2C;CUte^BtfU)=m{Rp$dyc-K&4l%Nd~Ix&lzvznmU#4kc?cu&dF=_Qel^+ z@ict#ph{X&WgRzaYq)&ztb{#DP5o)=>dsKFnX0XqN|EJh$++a1i&wZ-TP68FA@QG~ zu2vdf^&eJKN$tf-YA#)%=5iGmuhmk=NQ4t+wVo7v9g{qss6y_6Tl*WEdW7qeGm@8m`*qN1?b&7Qki4+evwYuy z-RwQGhrP%5vH#>g&Rjgr{^Pq?z5Zujcy5WA;B!#70zQA^dA@z?MSgzkc{Y6ZCP!C% z!^NGe~Om@lE2ht`m4Op%?EZ^yaI~zWiD;lphQG@>ymPU*r_%f;0KKvHy$!aez_gRkPLi##}Pd$AMf7r#Evdv#2fSZsdhW}#@RFV^Cu~ISYCW1GmQtXue<fO# zjbPZ~8T6PwhS-Tc36O!m|NJ5Xmz3bYxB#EI8TijgBVkf1y@w<-w_7~#WrVXT($`4G z?DKVEO@uoi%K-e5-ieGEo=4YVGAQnrjdy$)o&23?7vz9lw5yqT&M(@FkYGPTL&Ncl zNW?oLj+mqb17!k(d9ULOM24{W1vbm4tt<1cC>o5jrFj z--<*WibH6Z?Tv506r8(85i?fGa%4V!{Zox~E(pM0Jw|)R;!+-QYuP#1&%pEaY0_z( zP=e>66kG!r7q zzAbTnez^Pi6YAneUUZ_F6wf2Xjfjj?+BiFqnxD?b-5dD$$4`hZNW?ACkJkQOa7*^5 za6~uyOzOv(8)xLzQN!>VLm4o+KU1Ha&a~%dv*^tw44XTENe>U_)sLQF`MOV8w)`Vr zer*YVlg``XXJ(ODlE4dJzJgP#KmO(MbWHLgd30A|1{KjE)tlJy#YSc&YC>MaM4lt0 ztcIsbTTeG_-G6AZIhHV`*m#J?j?N)wcqV?mqH)afFNWT)cuKmVLhB1x(RKtSxU+Tp&+Ol^oTK|zvts3!tXT7{bc*-!rx)JdzW8{l zdE@2bY0~53?1+=2Egd_wrc0MLL`M1>uVsbhW#yS{*}9x#$G5U=+YjvDznmk7)-q{g zUvvDv7Ah%n8(n;DshB#5W}a>69BgM`c^B_i3>;a?!6Pf#vE^II-&ba`XO*q_$19H+ zZ+stDTO7J{AWYh_rpMFM6AuqB+}u5lIlFt{wk|XOdWw(n=Kgz|;NZ|!>dMhf)avH#-Y{XY)Sahv*xfu_%{%}$ zwjJo)xiwMp-q8;yvEiQl^4&YE`|VR!%d>66@{d{Z)BBu0wzWQnXJEa9Vg!np>812o$Ju6th@b$N5k4&Lix*ch=%V?Hj!@%b!$g{)E$gud7M;p)b9&?A`oEbpefNV3tXUi~qI>~!- z(#wmu$Ga1y(}u`%CCSLMsGfPw_^wQRc`khy4`2qke04ryW%1G`!ptO{<6oS|gVIkan>X0}lcs%~ zGcFlE#Pm3$G5A*dv&>57qOJy->w4_; zoLgbkv)qzl(SN|H1dF9v-dKi3fw?ZDCuH7&ZCdT`JI2@TwC> z>e2$m99wY+p)!)aU^ zXI75>b3pT%O`pEKWnTt5xo26|Vu>@&NCTy&C6E{wPI5vd*%^t%#)O-9ze=*i#>bGJ zBkdty!G11XyOtSPo|c+GX_3@xdLrG+rL7hf(7%6wQj=4tsHiYH<*Hq-vMUOpwS25J zDS%FvwCY5n3VIcotFE~2*D%^JtduAbv6 zxuTxs&0Dl$#?0Af(ocou>RGN{^+p#R}DZkYn|q{sUjSZ;xGh3Jj-%r%?^$p4*L;QXI3{GZ>)tU153J zgmO+&#g>!1*mh`}^vBk+U(>pFoq^?hcI;%=t_BI2oquSSt0^c~&u|O=8*lqROg|o2 zrg>IRa?QVPYgw${xXzf$u&mv)4sd2u#xFMpG~X_B{LiKIQ! zo5Us3o*wQ)=0p9>{3YsatN$FH`RF{()HP_!D=gQ^J=MEh0l7L;8c_ZREVm%H1X4> z4fs|7e&R+g$8IVR|3fPIVtoTNzkHo@++^*!)3X^wqcUb z-#_Bxq)>nn2T{-Qn#)I_W)FP$1V4m&akzXuY?tG;l?JAB>_=YB50o)#DiQ(v&q#uA0{gz^ z^LQ8DOdAMNjC-mt%eACz&u-z^{E@tvlE{U3KaleeNe1h=c}}_a4XW#}bLpn!y{2J8 z)5^>0KwU?b(Ja5jaWQq~X7?)IO$q&(5KRj~lyIFY(kWjF!xutc4R&ODARh zysXzry!9uky?&aTH>K5Fl@@kYzoyj5b{&_mR8duZn$zcwa^B32s_^{+H#8AqH&wT% zTH_Y8^v`wq$6pg})HJ~Eda;|=l+eqyrC}-buB|=G<%`n1YULa)cs=JooUgE4p}d}3 zSt)6$Iz@e5rHS|Y^^4SViOTv5oVs|5Q+21M(O-}zQO&6v7dR$maQbGYv9qeLeZ7(k zVwKk_sZ!v7MQ*yvN-m$P;_3x0Ln#NHlvB$0ntFwwtu&hBjqO^^Kh0>M@7u$xnJIFE z@0WZWmBC>R7cSOt(ZKSC8%}R*^(y}-EU*73EWgy?QU0G``CmbD1H1q56#q}wIQ*YY zVYzygACo*B-oJ-~2O2c1_8-~D{$u+&c;Wz?c5Y<%;T@bfeL#+F;r!VH%$qTW7ap6( z;t4}}Zp>g_8#S1}j~&6A zAD+UOFFnlKk6z=wMKc*KoyGJ{ohY<*WKu*j55?p%!#j@W<4budI-j@V3;8UgoNqEq z_&Pn0U-FAt-K#(EW_4w@XBd6%Z%y|*?`L4src7+plE-Dx{b8UdKLvZT%GZ&tUbYx10b?d{4|Uw3|t@aDzr5GMDEq35VHawiv(J*68t<9eA14~r|xi7rgRG0un9 zLAG=Zb;LQ;9UC7<+Iia1#mkxI?V91}VoPV+_IUZaQP!=90fQ@8w)_W{KE4!Qp{i6qx)wPJtW&q zQ0Chs4)?B6Mw_-%mXFaQFL-D$KD`qO9F#%I)E;!o3!qD3AfA2VaV`rdVSI`C2+=0f zlgJS=fSK2ixUofqjm*VY%3mS5T7V3^!=@AwF}=t@as$i%fZ&$>8J4T3xdL-NruyVg zLu0WW5P`?&WaC*LI8F8|D3_%Ia)sqSQ?iWd#Gv70Gl(9SMVNY0k4VR>Up%Rk%19Ye zM9G9+ctm;8)}|G~L4Ksh#8Q}%$$%ccNsUj$*WDc_yDkJr1!EWLi-Th)@>)H}Vizag z3kzm=`!;xV?m(mrq+-0naBI~We}8xUqWo|T3!s&w9UYuH6O|T4czP6tgUU(lnTcO^ zI3b0xJ}!pPNtVpkln^ycjrr5U+pxcOH4?37+`)8Oo#_=e;zI1= zPVL9chek1B&M>AgnMizjB9DFi91dx|c$davmlbHdZ?Y!zrgMfLp~Eu?9o=BTQU?mk z)l`y26t@#Q6jEc5hMZRR7nokKhP+?;Xk(itxgZ@j#G@bU4(*VkW`K6rb2;py%n>2$@` zrlSFvf$}U>V6HmY{sGdy-hWBn2W!}}G9pNGVbn4jN z09|8l3d_A4V6UXl!_(V9VB?)E&!Ob_FauY0B2IlKm2n72+WXjh;rcg1^tWbGJg5_Z8om?g56txWcg3;)4XXD zx^!xWyFB}x-RyDoa*?!n;O^~XV7Zz?X=hg_>>avbW82P@S#+e2(JBA>lUMldhj$Gu z|NfH~S@Y|M?BBDJrH{_!o@Vk4Y~BQiP$ve=9zl~1chEZ2*2r@N6+{q}5r{)TdseLd zLfYFWeD%?DtoiLDqaiPK9ANKVAr@4E&883J@H#@?Dy+}_Er(^58Onn~Py^^)d-s86~Uo#VTUq82%>|`Ip zqrG_k{pSfTkELUpC*D2d_~P(yytnEjRvuhwCi>iRVLKyVnrc3{1x?Jsf4n?@FJ+>!k zCzb{8JdHRxh{2EVR>Wu6-&chWmwb{ zmK$(BG0S+Dt0_2-9+zQYd4m4iu74cy@_hH{A@8j|@?IRaG8EKgYmaAvE0yKrB3dtmd2rZ((u;#x^9(;nx;ps0R;ckL*6>B`Dq;1TGu%A z95pMP9@nJ>$gQ&0{nomMS2(GFTlZ->sVUr4v$n1CHJo)#-Bz=%Va2Cu(eT!_blXag znugIb)ck9?>2b}Yf^pri$F+RabY0J};#RZbYN#s>lVv>26?Usu`Ox8m7&c-sgNF_v zILx1*U~dBbT=8^m_*aduuPd2Z4f^Iu>B$t97ZVv5ML}skegWQ;l^2qkDdQx0-=`)< zkeiiEMn=QG8WbjL+thkfa6MwoXnOSNO*h%6;90@6Lg#GFyQEWLd9jqQ!fOT6T7G(- zmY247U0SePm%2~mx1hFVS{Hg;p}WRqmA!`5_;jh^6qf7tElqNjRnct=va4C~YkZbz zT-Nz|4F%-tRj%IU3e44`TqpHZNIrSWG^1gzn&r3MekZeL&o!Fm3dU8AMVIP{Zt0sV zEZ6*LTAGY*5nkKDFZ3kMmTK86a(RICFv|Xf08%dJ#PbtVDFg1qIk`&@)oEJB~ zoTPab29`%H>V-}sX(Ue+MlWpeCRb3dW_gxd9^<-h!ElA-fA%W3!s@o!_ZNWt-`StR zxlZu;U%~RACFMr5JYasQq+P;JETZ?b6FI^qqgfs@yM%y6B}V%@;gNm>j?I%XnT*Hh zjbhV@-RwBD%XpXX-YR{nEnC>Obu;^q9ANjcef+*@729@iHz4@mnZjbr6dEfmS5U5| z>nql*HlF1Q%a^bIoz1&8vu5)eUVrmtrcRq+Bv=Ly>&v9M;~6<`EKxmEu+I%7c!b=` zO9m3Up!^mrZ)^(7Ez^%3q4Hh}miLyHTf*ZNW_;~4CY`Xsnf!ioBO6ZaVArX=?B2VB z4Qp0%KmobrclY)kW&%>pi+a&-*E!+#Hh^-qKj-()rXXGOxo*Q+^N~Oy`RcW+ShH?5 z8zi5@gdH4-aBt_bf1-v= zZg5me*=Hdwrjz<`A``pWv6s zP>%PQ3Y#k>-EzIkZSc-4-u7(9_VLrC-0C@9rwIA5l->7y8SBZLk$p^o9In46@k@Da z{etrq>3k3s2FsSi+0$G(U(FT8z}G>2fK{F2N^L!tYwEdh?@_Tr6I{Pi_4Yz1*49d>(!jTa-1{u$Bfr_RplA3tCo(OBXz+wsi`Z~SE!W;PhUT6 z>}2&RF4Uf<>QW_VYtC}w{0XzHzj>AG+@P-RBG)ADo0n9Fq*mgQ$WDu$*KN6eWy8#{ z*J>_PU#pTM3WNU%hfh?W<+#Lm@SNNja-Az0r!=?=7pthQt~Aj3Kb?P}zE&EOX?T2*aksl8ZLNmZ5HOmg0}8&~BlX&~z5Ev8Z@muqXJ>}t4H zUBmUN8m`tCyG9G9h0)Ze_!c}cf=uB&N%{Mo3I276!^uVf|t zB`jA79Bp)(C(E;3P4lOJ@3=1ZU%~SK1jrkQ`FGa%+&`N>438b!Z|vy7eH=ct&zy5> zR_0>|I3^F#V`mO=@c3?yo!TR|o2fE5U$|&83nvZbg?<&h-n}P(lflQcGWd8rH;>11 za(OH-k4L4$@kD7Mj~3?}o$>j38O+N~WlmlybMwJxd^&M5AB-8trxPad{;*-Z-@h-P^zFr`UCVesH-q;xllVM0ksrDx@OGR%Z}_$0 zhj0hBMtZWx+liCT_FQ%M055Oq?Cm*Y(}822w(Jac;J0uazKHI`TglEmk{-m2>=-6y zMKUBkgo>OHx)w!{UlvYMX(&m(Vu-DXC%S(EQT-DMmu19&WTFP85;If=BU7dGF{X%! zvFah!%}jveGa?h)?h$k<3N)ZrJ;!x&!LY&U1P)HcxlbgWyN6=iBZ!!h3B(MJBw=VQ zF$1HCm4RP$MI4h~p3X0)RJY@)RlZF#LX#g=(yHYqQiwT2+d9Bcyt)cBX=V!BXiicZ!?2O58$!q9%0&?NrcA+#p51;?`1#f=;E~R67k=#Fz@a{>(4$LNYNDg8B(+KICLioT8!Uv=q zPr1Z#rTA5(k~p@U*wH0MZpEP}6yH8cc*}8LDR;Y)5FE=x2_Bw7+=L=2qhg}R<`X2_ zAroXdDc`{H(5VH+bUk=--Yq@y22&vZzna2w)iGD|Rk)aKm@DF&{;S=J{NEv)R>SD*w87T~F*AhQ>M_fZg32_Oe zG(H;-4+mn?V`$~jh30l$c(6kYTH3Xui?2O%o?k@4aOo_UCgPDCK-uV?On+h~_jS3C z_U>(&|J*#rEgnzth%&-UV@Vq<1JF_VOnQ0(gXi?4bZ8zwt@~VF{AXD5@u-pRXYWguKY*Z#5712h5C1^;B+&jrcjL0z1 zTP<#Q4xM7$Na|l;ye0D{$bjgfq4;!*!nGub@S$nAbPXbDs@$J)Ug*$Nb1$kqOS?1= zBKv3Km=J+SbSUorPIyJS5G?788I(sx&q50Nl~E@5ciEtL#%0*?MuI)tV*>dxG?3Bp zQWrTMgAr(}}S`%XMF=G-@EZ^P8?WGRD`FA|Gsw3xxHmm zn%sK_!O4+i3@+!sfQ~c^>xfOX4FR#vY?N~j?^YR?U)a3q2hLX?V%V5|sIGWepdUWY za!ogP15#B_-OJk-Zy(vOz}#CQx`**F_i%T{)6oqRN+EY4_LJ4ZPXmEp&! z>K&|E{~4=RzR$KzUz?8HL71fYdKJh_Oqj z)6`4qF;?18oG1P{VMG-~;^5bT^-^BHFaLm_zIv5)zkSS!lRIhM?g5%MzZ2g8S2}cV zg^xVn6-NK>!15qzd&M~^rrdUJ`jPD$zF^t+udw{*H`u@TR~~{Af;{l)>6i~3}7vL-H(ACJY1P6FhkdsKu2b%E8a|^g|bTb>4f5`R~ zpR#e;yVM+8Luqap{=rWC{j0wd*DnM2(g^eKA%(pOebXo$T1e5bB9+d^Dh;@ zvGUB9=ezIl6tWlfC3$Xl;%3XcV^#@qGa9_g^B(C-)P!tWW;&2PuRCqh9T@)76l}BP z*)^sF|MD2xMZ3^#_7FU!-NX;fp=e591I1OdeB$308d$EL<-Wyn*d%#lpX$eizs+If zGgBGz_&9n$G>E~Ejivv?W5mYMCC<(Ki(u-DbGgg)0cn#_v<+%c`;d;@?R+nHIo(H> z7)M4tHVNAV5A2hC82PL`n?pJ==HC~!H5pDPnELn8Dl2+ zRGAu;VR6j}!Yeh*!18|bJa1xi4;>Ocv6E-DYM?idv8Qz55XzPeqSuon&E%fRQZ@?9 z6^`o!p9;&>TISi~J}}Gx@}ejDQt+4z$QP6v5N^EC7j-q@+-RN8$~WN@mg~~&n^|ad z%m1uho+zfEJYjmif#vE^o-j4fz;XrWG2=5yoRmY%2fKkDNMnh=}MAqT(a)3iOhGT0D^nkz`5x z{cZJf-gxU3CQlws*U}tjOc~ARpTE!F-+7a;_!!dibmtIME6PWfbwpV#%})t%N3LxX#P;S zNqd-#o%%dC$-wfmhliO7K0_ZaCuE^K=bsv4ytQrRJ)APCE1$0aiCw1-7}=41`}VMR z&o0)lUu&T8-sAgOwPnqJ3Cq>gn_5A6gGTvg<58}#T;cJ`wQHnLw8?mt|FrT~*6-ZN ziuEga_Jt=IJgh$hhxB3a$o@=OIGF)6hnWevZS#Z7SUv5rAp}dl0vG);siy_X|Bzv^ zV7XbBcUF+Rv-G1vyu9PItOBRx87HhIpFYpdi$~aWdMLnra2Kl#ELU}kV{-Jc*a=ic;|ykUO?Bp7y$*Kn zg*^vg%hm>on1kD7{dZXR6Kr1v`&PoMGa<|#;?v@)PD=Pghvi&}Z--oXyDlZ| zyLU;Pa=!F!*(-5xlI^o~PmF35| za1Z!M(s1GmC#p~D7XV4i8h-TjXG_2U_@PSnLG_tU@Yz!w@$1Oih-gW>T<>ZX+v_UX zcU_7{!W_MPlXDlPZ1uwD)S>q}SEP)tR@QR0?y@9Hjw#IFv5F6qLjPxB`BAAD1Iv$` z=E>AT$*`=SJ!2~F=*>$;dPM=b1q~_91qZf2R3jF+)>zu8> zYB;?l&y;=5^&6b2t>LiTcr~i=BT>}VO8)-C`G+o4a!k^3rmha1Y_#UuRW4qsH^BK~ z%_RfaZ(OYB#$`#P>VM0=3m5ces5GXNh&D{jB9&q&wEdQBad>s1fElG+=W zs1eh~cB=NQS+BfaYi?5gi-y{nMoYCDwbC#T?&5FRNm6h7rEwiMu)I?8SSRUGSYBVF zz}$l6wZ?Q^)2$x}F8>#>{1({$6C}5+G5r32Vn>f0Fm~kdez~6&nEw;Bn{*tP2k7ww z>^``i6BiD%``9*yPUz2=nM0W_gTY5f4CML2{dsQa0G=K;fG6bz_1Mq~9v<9_MFV@V zU_d$Z`jxVvUl~h>^yKN06+9u!1w9LxnU})D1?fE7y@wVn!)(5A`5%ac_J^ zr_d_T75_of;T@hzqz=?8qVOLg9jbAuILH9=-po$qPR}8{X8-}kp7LTO?N7ms;bc!7PVR8& zbPgK+MA*CX3+hi=>!Zd!?8jJ0+S0EGPgTpruSgcb94D-%@3?Qu!)1! zN6pvuVbex(^3o~kpiE`x#G&MM&of@MD!CFE>4#5KFJ1+oJVXZis%x$mDB%>GtERcpI#(DlzZ-iv z#mj5n<)i)Iv#NeK@9z1|Kn>0JQ=hy@Shl3!wgn!3E<{C#;ve9JN-L;VvU(e-Jjk+URiYT>OfR>1f%DTV(g-Ee7^A;wq4xE?ftFuY!naG#xKBLFzGFo}IGTz03rO^z2d;*^3QAS3mt<+1(IGv!g1n+J! zgpbTNTKqa#OxLilR4RK{nXdo}7hMSLUhrWG}BP+h) z#Euml*teb;3np_HNQja!x2lyBb zZdWfiI(2D}rhJ-kO*h3RdLK>hz01II z{TGW)?%6!N6Sgt7_{TW0e(e`*TlY1`_sgJU>(6Z2@w+)!{{iCeWKXESKd!EFU3WJF zD~-4IAJzb)#oRp%xc2mLCM6|?sBk~-kU?e7?zu*GW80SR*}U;9c5M5RX_E(V&s|Np z^PVQ=A0jStpAVfmju!5nXzy=BQ^yCf^=`|6kwx-;S;4Mt-?DM_r<^;niD?u2(W-e9 z>}*;R8tQ8%%M1t#{3AWSxO@2EuAtoA-N?kKj=7twBc85KbZXy%V1GAK6GIL3UGeh= ztoZ3&Hn08Mc!eu0zgyDNy!D+t*!F${%Lh#yg@R^PL zxa=)lMh0mTQjryU%)7Q@cb2l&jr+^DCZjN%? zo`Qlj++923>ePzk2iEfa=dVcm{$ZAf53Fa()ZyGE@!#I82?42L^qn!1`#n11k{Uuw ze_LGQeF#nqqO(UUcJE(dyxlkc_K|_*n>H^ub*i4*oow0|k9P$ww)UM3j8<=L{kZT? zSl%GRqQKnE%>#S=H&<2)&Rtsa#fLAkRocv|U*6)^A7A6({@+;o$Ykzq+5|_>&J3C` z5Qk6~BhPf3!~Mo9|9-m`gd_x!lo`(Hv)kFU<`edA{)+X>-{ErgUec0-Xw~X&<5BM6 z=Y@BmFRnhW2I%W^%*)T;l%u9EI5Y%*e_tG(Z18ZklY79MG>JPaIgs4aCd9}}LP!jgBFGV8T@jDKb-&wuwSDTDKI zO!qUM?UP?yWZ?D?Io3MXk)mmRi0hX|>qr|q#M$GN=ZkYu5PtHU)Q|c)!Dr^!Zsx@Jz;cCx7JRj!pe_}TDG1f$3eohq?o*Jb08P)a0Gb|CV5-}?u0TzXYdi`K z75=K}eud>4M$c2=YC&){U02hv7Nk|P!YGW@G^tr}Hr_S>Pu4ZOLUuhzVYxzb1^?<{ zuFzaTx$aZbyl8s#JPYb;JQ{~WLNyB%YaTVcWtv~zZ*5!9Sof=G*;(i4ek(o;#A^C9 z-PTgmp~rPy!|1w}k?vP;spYB5#`R@wtLeI$o}<@ne7+T*RZkjTkLk6vj5Q6KcMF#l|e)L6BQfAj-4A> zzU*th|Mo))3)A`d)363^B%Cj-hgDtx^^U~|jv1`vpzW@GX=FgqT zv}t2FcHsmWB?Wkd1Q4H{PE2|-PQIQv%d^(a--k9fow)P{~W)q6w3=rP@|-s2ixVY!+fSMY6l zv|G?!ZzXPYU)+46Ma6=v>9#Mwl{!WkEz>#w7(^pq;;t6MANUwbz7IZt#xeOAKFfGbMwsyh^W*={8A$D z&5OmQD1zh}^4wh5kN72hiFu^A(e&2IG%a8rrC#M?3c>%%gIt%^c4J^}L30gbpn4+! z{#W*AP~OvbZ|?Hky-N5OG}49UMUl^#); zY{6p-D4TdTu4C=S4Xoa{o@Fb3W!dWASiN;EU;p$qiyvLc;1L5EIesYPW{hR(l4%r; z>`s?7>Dx*lA$#dC;vX4cAio968(U+|awAtG?=jUWS4gg&}E! zQuk>Y=(+;)RqI#q>-ryf;^l=*ojZ)VkBn#jlau+|=g%^5@nB*`We_+nowUdM8VQ}m zrF}`BUqRB8uI%F+3*LB?xlb?Re0`+><<`ojlbKxGXz=Tz(aG^b8odZMVoH@(Ii*-o-m`P#J*4AE(*V zbwf{EP%62yrk>LmE+PxFOQPZYwVTE+)Zd`$@(pV1Zpck0 z=hocdy4cMsU0$O~E_&jeF>Ornx{9;`#mGyGNi>X)q6^XyT_L79V`2SN_t`EmUNB1=> zdWx?!_9U5W)smf zkFdVwg!L&WxL2`QA>nf|o`sNbUFNdH3*#r$1)5#-8>et(COM@A4exs2$U-AG*2kIW~B8>kyQ zF^!~28Kg`pBx7p^JpVfnqIo*h!Q{3P&Ha)`(Sd(W;2WU!fQYQ8zXT}Kf=ZrKHV|sNBA$~w4{pR)H zwO`(5Q`KJfUOC44GdtK-dx$Ad&*7(?zcG5@1ma7Q>Evf?^o#xC{qc$N#wEzvm}+PH zNBXhkxg`|#DPrMs53}y*W`-{uPuD5^iIe(K02)$}N?;!u6c5QFa#)Umu4>UzHZeo; z$(q!MF6n+a<%JU3KNI`>P&~TF;?^~qR_X2}PwP(V%CEDYBGph2`p1t`mK#m$`!V*m+V%B+lwR8lZA6voW%iompjV5Ju39tS79&YhI*abLn zcdI*T*|`NBT{_ass}%AB=FPoku(JTHek}eolOq5JvIcP4EnK;eHQi zg1o{BcM7C+t7dqI${@344gHbDUVKL z&Hgp~u>L!GjOxyiIl~yWWW4#1l0T^jrL!t{=;O!u`>J=D{rW@nnp(k_T`nf>WA zcMvbHc!xz_KSxmiWC8~y(Maky9&xmYvmYs#C5uG{r!2zX1vO^ot{8 zSegl=uw1>%bvnJC(Cd%Mrcpfgr!L-kC#l1%;?!CjYE%7B$ z?hp0iSIDlwJ!5)z^LI?2vLu2_Q}D|P!71Jun^*^2r7eY&CXrB4h;K$D$^ElQ9+OI8 z?;svY_2#2EZ$6Lr<-_z)E`9h4$G>@tqbt5JUgirHPo~LzO=#uV0ngAt<9Y1m>WQzD z8$M2sc)B>?=3$GoPZuL?Vee)~U|0Yyp036tS>=r45<>BI@4`19zrxXNKeKDCJ8z|IUC-BsRWtBefGieKL~ z@*gT|)27uO*x9u;de)jQI|ut)@Lpl6f^wCHQ9$k?9X>Uk996aY{k>dBPmVCKeD{{0 zS^xVd?B4o4Th@KS?w!lH0f^k9Ng{Yfc` zWbd)nY~1oSTQ+^o-W|*M{DT*a*L!G?CqaR}Ml!_7)eARIKLhYRJUq%U^7N|^le4-V~H&ccVr zn)c@A=SZKC75F9vlQW=%c0qOoki;x z`yj2_+=r*1v?(7C1It~!UGVXD!$X$Z=G?q|&Bq3ny72S!F`oMh%UvAWQIeNLbIBid z$BoYWW+}U)JAbDB{8qXaMG+9}#B=XFOGwu^x@7v$#O)qDyT>r;g_(?5I-c$mdhq7& z?-|cH z>tp`mrLbHjSITD&GLSo@dm{N0dm9h(HjyrjcxtAB<@po(5!ok;<{`Gsd~>OpQ1~wI zmb8)nN!w@}?(uDDCe+jqeq9nh4DjzYcQE&PwP5&TV~FmZz*Ap5$Go=}@zj?uGWC_Y zc*=9iF2$Snac+!yVGhkA?F=k$;?>+t@VV*YE?!;nF5e$nZe&<|dPJLl(&$HaA9*Jx z4lQh$KO!sI!193dB%c56LzaH~8c+QACcPdRP0K`Q^RCso9#W=Bzhr)QQzjYn%Z<*s zn!@tJC;L$RWIy9gu2L)t#Vze}^(MFU$}KRi`z>H@ZJU0^AFy1(x$2c$GAvQ@K8>D~ zWng*YG>Lbr^misn|D@3bpJ9U%h?Mt*PVT9&JfeRpUWFlMg3mA4eMe|~h|w(1SJ;`K zPeHak`_nSX%P%G+Ba>_y_*y{Kf~pF|6r?KLRY<1LRlQ*qlqn!pn5XL+R+kFRG@NQ# zD|FR$3qo6;K90T+4J@&(o#Gr*SD1RY2Yt zmg~|2<(8MbrrC;5w-p8|WY?wULrwFlrg^bU&(VFFH_eN#>p520sp+}}t~HExJuPQV zr(RRbP2#xT4w99O8S<*8-?POC2Ud<|y-U)`_!EYq}E*VnSsbm~&m zrS+qxWv2TyJ`Hb`iB(p*PnTAn)Kq#!rC7?lm6@eZejlG0BWWm<=V5d6@2<+KQ>^^` zTYg>kIk(HUhqnWxCJiU8AeHF!Sb2vBl3tuiai3B;yL2({)ZbVA$lkphNr(&LPI;G) zn>~rVzCCb@3?@1+gYb+b0^+0aj0nb7`V=>fxDaD&jZbyktg}ra?tc^9yQHY z`Dr=pF>T+LN4Tylq*idQVH(471=tG9tz&wRSfE_xOd5l4UDxBfuJP%%E*qPM)%|K3 zx5lgK(6}^SEmu9?l4Q|iI-#d}jH?WbYLqK1R|%E}o3$|B;}$4aZ*t3{Jinkpeo0}u z#;4Y{eY;ySEY^Lk<)iII>syz4eXIUWo6eT~@;pgONHqH8K}iw#$#c~{Q|fJ2AJP`~ zC-LFF#4f2of%(6}a#{Wl!1Bg$T+M>w3Vn?GP*BWAO|| z&mBv2k2E@_c@a6Ggo5YB5j3Z(nYi>n!E%+VF~EFbxdG-{ZVJkirqS8rI!=RbYO{3oX|ZQ&>xN6+H1SLgHM=g&|)rHt_5DTK+pGwrGV zlI8|jp0c2?f#nCdz~Z-`Wcs6XIeqCY2aX>wu>9~*RTbE8V7WEP=l^G6`Pn1z>ST5W zH|K(@D=d6j&WD={Fi#$(X3i)!xOQZ7SQz}gg$9L_u=t;9h}IIAz|#0 zvDcBP&K&gfV|QQ#ze?Zun@F*UAbtpmV7cu3Eij0m!#r3P=Ee%?udfOSm$=gTFryzw zzF*Jfv-PO{_~o;g(YZCbAPM}(%ls&P<|F-vHh8J8evkFz3fSUiPknGKJ3J%VnAsh+ z>;Y*@Y+25l$Vf?FH(0hCF0JRpD$y?udXo;%V)0Cn~6PDE#uT>)oPLS?A*+|$~~*r z=(8{2)Ol`JU!zVM#i8>zxFGqgxpbX6ZID-L<(fOVv2n9p^RyhOYbb;hr?@V5^FpPO zUb!KKr5@ndLjRosMksq26D@#|Hb6EdWh?_E=l_8WQUQ1QIdV)g4_(! zqHCl@AG=^AX8zOpHPw>;Gt~`WSJW%~f*jQI51)}6LgG4KZ8XQ#E?%gj`s{hmpFTr% zWfj+@lItW-_0rg`pO^D337M0Bn6B%MbwiR3B@vPU65;b-8 zMsHk&|8=Rt_o{Wo;XOQ;n<8a>P||jis|v;cfaRB^?2Rt@AFy2OOJ|$a<)u2+399`s zVR>UiW>xmOAS#nHItN8(x(i+@En!2=2j9Z*DIMIHftvJD^)?UzSzMGnFJ za|sd)9F#-QkUT<06cRkTn4r-G_>IoRPX}z%Wnd=*In|y{8JA1mvED7_9A(*3{b{pQ#2}#iXn+i>lMpOd10)K@Zq4h8z)>H z*yZoUr|DiSlyWW~pFs5VbOQ{0CKci{t1Eu9q%$zRgy^X><%CQt zB|=`jX)`M*nm2^pX}yRZmO+SID}HPa!=9hUy1D~A`qe8$_RVDR$Imlp=|sjqGn?nX z`8z`wj-yMMGxyj(NHdq#v~p{QQ-}*L@}f|H-r7kzsnY51>|=*>geUGv{sxp6P3%Kd zzbpcJCK901E5ovh9Gy?#;B+a!I06QxkvLvDF9UOM%ZK`H!_9f zjZI;=LU9GOHyh2^@m^vo5OD=1g^uF@-hW7CW$qsjohzvnyN-|-#29vQ_aM}MQ| z<70>#o=gA7C-Bp;wYn6vM#@{Lnq!xaP&BYmt~;0Yr?;^0=5cm%jEBE@$w&f? zdu6uqn0)wyCm6U$I;qlr7k=~vqhFp$@qz);{-dSsXJAtlK=uq72#m_ZwJeMKu z+}tC7+$RdiRjXV9xk|7E3`)ASFM4b)abpW;o8U^~@M7aJl0Bt|`Nx6Euef##r9-wW zK|_;hm*Yyn-~^JV6&tT~of9B$ZiOjlzix4Ol|~UeRO-D?G7tK-p_zYse9B|we#{`Y zn_R1BCjJ9cNtJ7l>k}vC>dNN!Q;~T%>{@{HCr$mu9u=o#H-U0g*r}erkaPZtN`Rd8^3$2$8UqDubQu~FI~EH z!rRLYm10qi)t1fgV8pOq@^09|CP|+K%O{TOi+Y{kc~=80ckuUM)ZFQ`^yorIe|y@x zx5XvUmZ77{}gw9S1|W_K}R z&J1k)J#mQg#V*Pl+Yl$Z_;seVZ#KuyZDZZKFW9l|dyXAgMPI4^F758e+ryFIpa8sm z0%RqnUjR9%y$LTetnn`jwxu z;nxpX@%_7!##IKqxO+Jo0PW_fy5*e=C|9Wyop7|lRFFwoRY2 zYs+VBTKxfBKSnDl^NyWc;N|a)qtu^ou)onP_m*~~uw2`kw||h40a7U<_1f1-ivxV! zaI|kjR!W5VP$3;XHp_kX>({TdU)s&ZQ=2Hv4#vyZh8Ny@o`eBeMw7d>^c|l1?QNDH zU&GfD?(5Cpn18_ZduA-LQ;P{0FZc6o8Ay(ocid!o=Ic9eZdXzk^(1j#S5g;rqwtY_ zM9910fw&Ij&+S3SKRnAVSRT+d_7*Hx8J3`~@kWNlDI-w!yE5|WSv=rxOW~veW`fTL zgXEr;HeVsn#UOd!6iw|Z?<_x}2c!`v&z-yc+T&Xqjel7*10ESetI$r2e{KrxBfIdR ze=F|yYhm^^alDJ>AzknwEm?Q7V$#RXUSq6TqM2n?eu8>@1Sakotv&OJoP1hBc zD>PR~9ylU_@NsFTPm(0>&RY^JVhYRSC&;^DU_7zI(+KGwe+!m-76g;nH_J>G9uyNu zW=^Vs<>iHi6z3J02|jaWnVgPu*KvaRQ9#e>_+j>m* z=~A`8)oWY#E9lm96|^dlR(qY%-gVFI2FTud z_ifyB{~dh#*?Vl?x{|NIe23d)zdmP+)@E$`%qWuI~F zMwNO0>U00TPAv#4NT-9JJTJrijj61heSjCuZ9CG*)e*1IKsq=`U%O*_lSfUn=2_Eg zeRR+?Yu>d?^|%6SZS%TRh;2b|-Dg2`YoCH`l~hr0ZwqRx=eWwHXxv&p8b)EcF7+G> zfGZ@|YbzMnV|qOer(txz1>H5A17w zlVroQEQQkqjpLR1`S zX=#KdMiQ7Ajcu|Yxw8k5@lbyf7WPG@SQL`06ieh{l{^t!*Z|8FoLg{QO#!%p;D7A< zGbFb_`7QekK;GE?49P7}-WZlgi2XC%zrym+N4pzfu25NFxh2DLn2ScLD@ooBv5)j1 zVo`TO7xp0Gu|dQw9!S90V%&PB&}+dsmhIcX(VDZY+rG&_WAzr_uxTwi`KKjA^6yMR zvMw!%tY$%D1;(mbu2L+jS-xW98ovDbYnD8-l(AFBFn;C)<}8`bc+VQzVsTY0t0LDwxv zZUJ-kEPw9JCznq5Td)BPpQ+J^d=e>>=S zc;6qeeA?1EoUA=<=BQI(Zh4mfpVBP<^RdQZPMr|@@51sorn4u!6-T`s;L(@hG+ewS z-NhrjI5xH$o4st<8XgVb?ve1a|J+5WIdA4FtW(vF+6H9|WvdFymFuZgvNF2*OXoo6 zRy?|oy7%9PkKTcg#ol=ZK6yh-_PzU_?E6NR-@@Nz`|ZW>${cv=Ir!U~a*o*NVxN5| z;Xj2B#6Emq_Ps9qUWNDN*!!PJKE9*=-CwCcUd`pJl1^2^sH!pSkqajz&P6Qq=}gt| zp|E8WwM)kGhV$%o<5I==R@@{+zd?RVuu#%sBeAyJ!6@K^)cD~9-Iqlfy z83Lo8k+glox|lq^a1Ww>)+4Y|%JS$XZeFgW^5$92T|I9+&QIL9%*m@)s8V@sDKFJT zr%HZy?&R&{1S!um{|nUqf6JPjzkXaUE(zUzgtud|;IM3;KFpaLr#UFeJ%6><$aqj$ zZ=_d@=zP6SfO&?xx-*=(UWJ6<#`y!1@cpoL1;39Qz^6lc!h!9`$dOA|FLLl=r3^Q& zP_2I}s5~qUXD9ogn8zE@k(`}6TMGR5hA$R}4$67^%$FH$DAx~clk}a0`YP&cPEmdS z7&SF#xKdxum1`IO@NmD>V7h*}S_-wwObB}I;yG?qN=09(GI5<-{v!*E^Le7INGfxk zC6gwbxoarvyoak-A`HMLx;t>)SvOVviN zzt{k}xggg(yo;yvrGcJqfaO;t50$lbT)A{pvVBeJ?5dGlQ8=#J=Q^2!>YbZB%1y7D z@c#*x>$(Na)f&TYh2f2l{gpKi|7X(&6(CrSr-L>4_q7cy>A4`xj2&6J@f%qUCdwW1_GObz4HC?9?Zc4xJhJ-eMdbJC#$ z7salLUAJpboqap19XoKwy$dJ&95@{8%!WvBK8y|HrPKuGMhDZ)qcibtt%;9yA-On= z_@1#O3``?J28$uR;tB7aOl;qDB6}s{R}_J3rY}L=BZ%l1N94dH!UiM|*guXy8G!i@ zOvbl=A^}EcJe}Zy8AJ?`f!y#S1Lu+?{Ru;4P&Y_APZNsCm|RNq$SlH#WfD7HCwVC) zbeIgJX7_h74 z9#lLsnVIiBMUTZ}3F?Ad+TRP%^PAlLw^mazOyAWYB!r zrwymvTe8cyEng(Mv9v6NfkV^CnN&c`%wj@k6%#%!-@xA(8PrDU-=C)x89nd#F~vkl zJq3@>#dl0Po%#k7G%1y&nKH1I0c!GO87$B5N944gIQC5=a%>sVV@mMo9*=jAL>Z7L z8(7_Y@fhCS{4JmF{*`CGd4q@Eeu93phm+C2fV4h2L>9%9P@ZZa?Q37Y&4<5z!NYGo z%~PMh!rxbX!qhh(Az13lt4ACmL$iq-Q$X+t_3W229$!f0#9|^w=Hrs5up-%jb=!1* z!uw|tIXIUGV;zVeTSA_K+6t-9;psAf?}`7I47^6B7>`2#ahV2;tGD4l?GLZ=sriz} z0>UQe{EJ0Q&bnpByIcnMmefkHtScB-Kps3PTjEy0o_lLu|K=YwJ`^2#bA~ea zt;a~~TfmYhmeOO`Ko&21pO?RXoo9Qbvu9LqK8^Q>Z7 zLqMn>9)3RLmK9UpzZ>!SNsO95fzQ@_XJlA(f={PdFN#NWW6{eGGySpYj9)O80h9Z) z^5~UwF`bjwt%_L0j{m8L7#7-=r zRl2i*)xrG|XqWC{z_)6Y8|f9X;NfY6j?6F+U4gl;LJ+w>)ze%(%Pp85G%VFjfUB@5 zc4z?(If29s%QcoF9eRc0j-~!McMrm=Z=~@sw=eT2b$YqEW~8+5+*!Rz9-W74QLuC@ zvk4nj$OAFzzjM`19XliZ0LkT1`T9Q?Xw5nGW(@z7+(7rFC!-~((4X~WkkUeY;v zoy$MJ&Bbls^Wj^M(%$|7Y<%po32?{3#|LK*AKYBMadq)D;Md;Eh0cD?bnzE+x5e4Z z$w*VQXy3wk2503YQj(Xz;oU0?EZ@5P1CHA$he%`w~8Ixe<2|ynEPAYiJe0i!h(YFa{EILBfu4R z8Em`xig~*mQ;4ai9@B1aE;u>b65#JeprlVV%b$L70SET4W#js<*s=M0<1sy9Y(MU3 z(u8~Ny`4Mmy9-+%cZScJMl+Yrw3qTwSne8R$B>cb?A!MnTQ`0sukW?&-Sazv0XBI1 z*kJG2-b@7C#lZ%@puqnXmb*LQ`G1L0e<@SEmkl8kY9g%SKhDd=-00+tvWO_|42wI&7sfKG1x{2(kar9 zF5%v|#Q4+Hwgq;c9oe~S1?yLQ&gvik!J3~x?*BPA-D&Moez`s7}=uKkMjzkkH$wV!h2!0$Zw>|AcYs|jIo zffV#A#wQ^Z*I0iZaO=Q5PHjo;UW&b+CwXP*)LlI)b@~~re|uBP{w=D{Zl!s%CO9~C zFdt%UogL-b6DaqClhm=J0sQ(e1|Q!*Gsv$Lt=KuNp5v;k+wcBIA!W7qLM=|jph zaO;n(m3v|RiVrw{bPe50;>gL5u`59^VoZy3< zKQQ#^>9me@Lg!29_wXp1xZTh2C&to$@lf+Gv$E+uDVfrf_(7T2Nk73>p090UU77Ze zM`;=7#E2JW(l*}Nq^n7%CUi=0rio1xLi?&bNv472D#N04eQ2M>A=wwd%qSdUeCeDh z@nr^)Jht3OndQyyXC$f=mUsO_h9zTeS5jw7pKiAFa~779x3m|T50@KQ-tGAz6h2;I zBv%xEtNex=)u1&l`K0-#RXR5A`Zn&2ok1mWFxcgbX|fL=ZAMnV8Ah29~P? zOVs!bGr_0Iu*Au`R6WZRN6R}z-Vxs2!*0Ry)PZ>hmIumxmyw-fG|SbqyfCN0z;g90 zPtD9CBlDk=Ra&sv0;&qhEJ&(gQIDx9ELHDpUDxBft>-FSRxqtFP4_EsQ&_0SEst&m zuL@u-;ATN%jZ2}ThSPmk+!mZ`Y`Whvg}1s-udmw{eAaDEw_aPXsb232#}$(6M5VfH zoK_2jtLeJ#YkVz@Ppxq{%k(;$S6y2BG;bETwvIP0R}G{4bgA)LU|P$<3Zv)ix>ZhU zx~=7;fYSotdfd96b&l>=0IN$Y9ah@)xL(Ifvz13H?V4{bH%*UjTVCfHR`=_1jk5uY zH^6!;je0$Wt?F5>GAtQc>GbN;)5xpobNa#N_tT+MTLZe6{qij*PV8aE%+a)NdoOo4 zZGv~02WdrVlnv^^-5r{8U&m$!n(L(Oom|>eTYr|y>SJ_le?RSQTGGZ{-kWK$*hdD? z*3Z>U^zIZc>++6lZr_Rf+O{M(E{e|14zz6F*0e!QZ$d%>Wn~RuT+^;FTGOroT950} zg5nCN6oJ|QQ^RZB=yA*I+}c)vu7F(EEzfm5Um>}cWn);b$23hE zzOm^sjaS2I{VNDp06uE;SmRx;p5zL`hmRO#Ai9xSDJn4%Eb4WxaxEH0fw}I}dqc~> zx(D?dS{_;!8o!#h6RV!J?zLT*eYtsb&o3o0EQa*dG(uwKU63Ya9qUQ{?15w~=qK-* zK19p=MWMJt@`!~!jVUbG2{Y9!IIgDaY6`{w%H!M$dkdWZ1t9+`vtW1w5O09y>NRcT zVZ{C!M)&^{maA8}O0k5R>-M_kS#C7T7Y!xt;R>P`b(Qmb6ZJ?15s&mG^{G)LE*^r{ zpd8#w5}5tk6Kp)XhyACHuwiS1w8-u~+l^T;_}`i3QLbirlk4P`mi@Nkch+oJ&(FXA z!aqKFpC?~_hFK5KW!i%2JoNZN<~}lq0TTujUJ#2%Ubq=wWiA;)#Dd=V&+AIi;%;K) zw?MgN7ARNE@}LDJ29&EQG*@7*(l!dqw-|#$bDR@p-DwUE^q# zdIzuN%+MUp$r$TGXd?V$E9`@tH8q^Rcub$7D zqW+Aer=}KaYq);lEYwwDCf}4Y;neX42j%l;xmGRv72bdUcdq_l)cpl?S4Y<`j;CIn zAR+GV?(XjHN^o~~cS@m!(o&@@EiLZFU4q8lNr*raB*5pt_k`0YZ-38w-}_(Bx_7O+ zlD+1fIdkTWotfF6v%jA`cMPy}BXGZx(w0&_ zB^sV}qW*O!I@@chtW|iyR4`BO0bk9)UF+fKN=g7$Z$z7y8}jUJfZzWF$|?W+D>$7K zf&KmtxX4TwN6+B8jtx4@Jb+)mN5fbPoD5gQMbAK>sDs*vo`3EPF0wVegEwBU`xdCC z^1Y-!>M8`I#nj4p+}$Z0e!gsFCJibs30k`8c_sMHhn~|!ee!RB?f(-Z)6)GIXse?N zl;V3gdU!Q8@Z(Cf(7<4?tlWw01QTu4dDLkgT?{6-;LWqgc-i?F^)%31-?ZV?<09%% zy7$p#90+y84_=OH~UY~K&0p2J&OnH zXX12rEY4>nk|g0gZCWm+X5dW z99EY67pbf&K~YUHit0*GURNgg$?L1D&{$E8#xe>^X&lznqPn~cbxpO%tGJH`?WKsA zor=YmcyGS-jJmkh+8un(W^2MGCvLhGr|x#GZbmFBQcrI=gf%0vhkrgl0NQv+{Q)c`e`{4}-jOko6?HIz_kq>j55 z8aQdEiC>)5@uia*7Q5(TtgkDwVj_{6mVl6yaM;HALN}H+k4bLOU;vL4MB~wZJHgNN4mm3*9A7C++aJ#3)W-31to-#Q4GwHk~St( z0Ofw;W8ptK8s51P2%VlN6g1}2PFyu!X@3G@<@c= zlvrUsJ9pnYcutRo`?w%Pj19$PYS%qs4!Gu|hbOv2@l3rR%1vZ(+(Q)$lFbl3!9#$* zW{VSGvye7R3loJyGgf5T`pa!jFg*At*Rx0|o{c2{%O&N_7pXZZI7^$$;))Vne{>!BjfJ>Uasyu+_!_~v(E>16w9$l~ zry1O0JrOk~7NH}<;g#eA59+H?t0p00dJ;S*M#3VS;%3DQ9)0ElH%WAX9mUy=^c6q< zcbG`+H8Gg#6bbWDKKR&K5#BRn1&A}mOG|*_%ujAiW6dzrMT8PSZj|970CI_vh2z<} zoYM@lShg4@|rdeZ; zzdFu1%j2M}9B!m};rTC{&~W@~v{zq+m6H}e81_DtO?04VYzaesE9mQ)L0jJl8iqQg z{AxqVN*5|tdQdmkgod69Oe~EsRACTY-Ruw^?v163CZi(%GRp3r!QG2Yr*esw;5@{{ z1PBYX0W>el^!pT_4jlwLe^&vPe{4FehqK&G9Tx6dxPAK&3U41n$(>WED!zuSjA#s$ z{a9EXtEs8M!pfY=rwd&wCsSjvbvrw)WRd7tbai!MVL^(z!f@eamO1d*3hv0Ep9EN* zcl$U>^3S27_$p@5JjY;pzy2TNqk(+{SUzFtJPfA#DOhM>gs}pQ?6om&auUkQF5}_d zW4M0xAgy(GNZCzAzX39kR~ifhwkp=sf-XH@0_~aVM6xV5VyH9^(E*6ymRa`5r8 zgTl~{@W;>F(O7vKmri_-2R9F+Eu!M?{BEsXnP*rnVSj*qJae&s%>zFzz1%3L;KtoeeSY<1#X~V(E4@xT3Mta87 zzda5|`NIN(zD(27Q*L%nst!AQb4sI3<0c&W_x?gz!Fd$qoy6%Q-{E;jEz&b%Fkm?K zC^ zH_(E-!cgeyX~Npt5;{6s(9~3?@=BKF{}QJBVPVi*PeTKCCdSC5{ZnggA+DX-hrCOF z3akA3s+-ubel|YoCj&J@D*u#RjG%ScKHLi*X$-{x0~G{jrC_MGGQwi~@ZxzD)$cHF zUHJ)x6ux<0j$zcN20F^(gMzZU8q6JR#m6FTQypj-QW0DstbUry@;&GlN@4zy>mf&G*K zSdaI{&_GRu&{`?y(*u@k1e?AC%iS>CNmGF3MiGuMjdnrwoGhV?Gg!`+<%4ZC5IZkd ze8@G9bb@xE1(dz?G0;X4L!DKjPwOVXtAkzC5w$QI8le`@i?)OJ#0cm|Tj5g+SxnzO z4;Pwm;`>{_Vc)~USbJm#d?rQXL$hHpj(0=u);ajle7JD%+22}0e5CyL@-O)2;$Hlb ze*&YoOrw2;In=|<;5{Wq`227g6#`{X8lQo70@Sg~3Pk3XS(x_2DoprhDbymZFxX2Q zF>6O7Y z#tF-EwkT(yoWXO4Y5vejw}#aOPhn-wU^&yT@JEauusj5=Qv+a6^Sbwx5Lji=+VMA7 zZVUfW5$`O^t;L!b65x;M&~StYhX@)L<}7CCd<>9Dpeci?d@KR1432R;3j@pSxRC)- z22UA$=6JRmXTXi`<@*>+<8%zDF#yXzoWvQ<*BChDXY&0LDBc?^=X9JegR^`;gUI|m z$)cI_kicC|!|@W(%jf)D7S4n77}xAT0ZA%z1xe0;~8k>dn6#5%f}(N6SpG+tPF1Q zdGB}*rRVc8=f%&H0C_&=Yf`>k4yimGN^QvJTqbTi4mqtwKGuH94>y5$rNWQF6MAa3d2BSbqu%AfrgVg zM$jIkpPC%{C=P*JkRMcZwJ=0pPB{8x5Zc|{9nsM}B`0ykQJ1_?Oh{NylE30IM}|uvirX^Oey;_?Y9Y*T#xti&dn@t|Z-V zRkR3gR?|LWL!zK!3EeUtMkD>FR=X4L*zZUkGuD& zZugnX{GQ-6FUWr=B>&L^asE*7od3(Roa@N+HC)dNROjn?H*w+S75wn~&sec#6&7w< zfQ4HYVDoqDvF59ln6+sJY~vhZo#Bq)73nnoNMGNW1*au?Us~$tw_E*9JosHE? zp0?6`Z_v>FT=;hEe)R%xI-jEbX)|h>{P{Iq{cbf587t$qM+9)Mg34cvmoH24>UjfR zQMq4syrMn-8>&Y)+Fo{{1+7%YCUiBm3!3V(=g-hUPwVQa$Lr22JbPUUwA}#q&OpA0 zD(ZYA(Hb-oxAiU2Idcv`?ThX%3K?U)j2+>2)DByL<5y5@=7&ygIv<^dD^Z%*>@^%X zdW_OO#nbj?=6M0W`VwcHJaBLNN-#$`UNoTc$wNG+agY+3#a zC@8`nUoYx||BGNbb6^XO@v=hf@^KblBG6JTI**-uvV%ze!qH=yOatcKmk;*f%2v+L zsN7Ge;a_yN(S0;{itpe|TqMr>1p|*Bp}DgLm)};S1g~)aWd%)f)Pe1H(7G@e_nZuI z%|rv&%}sH~EdYO6+T)_V9?m=H;)07Kj+r{)tRXeXcgJa<)uXea9Nj3x+a~I~%cn^w zJbe*3f3@fMRuOeZ0d*QTXm?L}?*2~kdw`Rlqbkx41-1sj=HPM)cv67q8yYxxDP5(RuYsaL>0;{L>d5XzOf6*9+>)j#gCHl%t}&7J(wCvFv=UG08C8!8P+whv$6d|1 z*_e;8xtYk^ITus*Z$S9UF$kEMgt$eS$X=X@#IXU$$Z)}|Y&R^8x54Mp7T6nVj1%7a zxIzl%eJd4|8Y`l~P!a8VN_eFqkC%!=(XAqn=PF8Qk(Wn{rWT%>_);s={#KjFAfHPjk|J$2wXE(|7V zo-j!zg=KWGZ~$nL>5Q(WOXJ_MeVBVa!|K!AYk*poxHva%vY z(~0tOn?wp8DXhLz;^03!Spc#Q)1yd%i@~|)rMT2lfv+wfLC(_IIC}dkZj~0{$fdJ5 zaqS{X+w1V%Uw`1Y`)9EA+zC|I&1kDY(MiIPB+{_RJteD$J^qtuOV*Hrny!}9gP|qC^R>~(HLjU zNVG!4Y(Lm73l-kHZ5PK2%XGi_B#V=1GnWXrc~L@`rbNiBcv4DZh2^&Wj0l*F^%kIl z^Xzaq%?gA29IE@0R9bX1;kqCh#^VB@ndSnwxe18fH~~&mB4L>BE@)GjC)I{F5*|~c zsof$)J6h-Ziw`XR3sT`cg=tlMh2urG61E!YL)U$Ub-we&P`FGYWt%?=Or^4q3x;Vn z-9Ltu6}nd`!a{J%-I1i+tu!54E1~gpt5jr*okyDaj9Bd8aP#XkJh!hr% z?-}-oBlV>y50%Yyq?h0tcbOgu+X+E1&Gn`+)bk4ki}5sms2|Nn`r>0}WznBzDel68 zQ8&RJPLsogqfe784?)$!Ah>awD@@YeU`m@l4$b&O35^Y%cssaEji5Xt;W;%*08q|Z z{*d?4r}G%N&!i3dsGet=j`0@O>8Ll~twz-F9}pk;BHMsvdSPyyzv z#@WI!%>&*u5(Ky5$Ce5hE&7nMuBNF3H3rA6jA3YH z4r6ob2SWpB=rCArOyy+9nx@du)D}F_+U!JAX*m1?JYZ{YBrLR_zo?_l{9h<8yojQQ z=R_ID<|d&J^OZB@iGnP2?aVM|%W{0AE{mb2O3Ny&L(@m=)bGA^G# zg1dJvi2KxZl%TGo3JqO#7@70{(7M`GR&@>NX)*nZ3Cv7PVPIecO>H$OYYu~fsUrM* zEn#b+g6_65)I2~MCt#t6vt{|KXIPJxQKF+SB*#Yb8r zpk-r#kQiThds(2PIUm>l`Vo~yXYugCG5qxF7C|ecZmbGf#oTm8l)Q zOJ>m1GlPjKjWJ^j=<4bV2c%}kdeGHWfQ6A76b8R1!0iJ+Y!MDBFCFGQ8@!MCZe0T+U zx6fnE`ehh6s1MZCsg3n@z<|EGh8A?F9O~3|hUVtbH#LPCUE_~6YKGcSqIxr5zLk{` ztc*2r`{D^aymlISXaB_g3kOl0cLwzpx3OjGVgc}2c~~NS`benQ=)*4~7G5dQu!{_U zRg^Ena^h+HDhoinyKl=l2T>crIPaeTieHg4YRA8v84s$Apf`KkH>@6|ePz&1D z7Em`Zg`uG(EOpIcZfXH-CkqU*(!?-bIp`TF!%%q;wk?^8w=HGJ`|CHnuFS&&>f5(( zYmhuT3>xMN_+tMKSjRZRIK~D>iH_KG{%av|D>4zeFcn8@&mr@(iLe~)0sAR|aG67M z@4FA5Og9#^ArqQ84v=vg4En#re#yRtTPQwl=p<_lHJ+8TwkvL(WwTBiytx!c!MAy8S5B z#z)q}5Vb5Ds^KQkim^o0@^t7Y+8}HDWLV_5!XnF6obxZ&WZl&fHZKh>v=?B@^2s}w zVi@H&ar-<0mQVe1A%@ziVEpEpSnKI(?4Z^ZWz%2`d+6-zzK?-gj^|^}k3&9}?(1C^7O9O{_&S$QYD1~)d`&6~hum)bp@FaS^Eh5=^H8n_ zm4(a09M&NrA;`_mMeev!2n-K~cUS;?B7-nUaTwko@CgPE8!TwewAIy6_#ltw@-vt= zV=U}^XnvRf2%7#hUMI)HEWr!?XkF{4HWcBB5tuS{JbwIcH`-eov3b*43>h()=2BG* zHc^6Mhyygd%`w1S8GQ^DFv33Jn&p25aPzU-hP1!q z1lY|0b+7w-Q>-|wBE6JE%2&EiN+Uvc@JV^HFj(I6EKW~(t*87qB*SK10?by>oV_&% zHj83NCy7PEmdPl^GsLeM4>#5!xm=rQ&0It2S5e-yo-!Sa*M?k}(7s-W^g-*9K^VV% zAx;!uMIG8v_3ANhR^CHlZ86GfOW!$|d}rNE=amhWsBNx6Rb!O^aSO@|Nb*r!RgA)l z0_5fA;ZojJ>^blY)_narX0BU`Y3mkZ@fYi`^4qOg^wnBS`)naBqMV=~W)0gcU&OA= zMZ)HB@K_ixep&3bE)5pTNk3Q<0gH7}FkeeL!|G6&tO^mK+4?Y;tPO+dIy&AM4)aZv zmO>Vb%@MHM6c4|(*@#{@5$;nGpdU$lhe>Jp>8}GQrm~mRSK@B|Lll;lp`fr7kMfIA zTvUNa4~uc<_5<9%`v_$Zi%@d+A&TzYM`7N5+7CZM!J~Wunlo6=fcwq-ySP(wAD159 z!0&$@#@3&9VgA;Yn6_#@7HwI9E#L3Jx^F&1?!t-i%nX4`4$bLvQxLp*6r7f(!f8bs zoR`sfT9hbswTOACs6-=H>{^L6+gG6NMI-Xd^H5N67v;5uD6V{ns@f9NQQOy0ztq-I zU$E3x{}-vLt43vYl>o@go2yaKSdRRra+I~yptgyD@>)EpZbEBSGg_)z=(rh8HBES2 zSC7Z_RYIC5kH*G&ls#!cC9_$u5o%Qhz7O>H-vG`|+v;G`bks zz5{%}1y3{-(Mo$^e7_I4RRDB$3*VK6&24C=u<;3H{u+2rH$7`&Ls^QXJYLn)aU0Ox z-a{qL^ejF83ZM0qtVAqd0OL{J@>;PWg zz}x1l=x8lL_nX&fr{~l?d5+Fkb?AIqf!A-I3xA0foh<@)eEFgauU>Yb{&gc2<^dk> zNX2Cz9bn2%;L=+>T(%XU_G5+%0cf|>QehbYuLNqS-EJ1)p0PJd4e9x(FVOh`TsgKA zZyKnLU%f@ks~6~a`4lLpv}IK8+D^P_rQ4r(qU(99pn!SZ+9m4V-tm&^`5ez)yr%c| zHC}ae0LAyQ$Iq4e;Qt~GOVf+Dc*~a96_2pp-;N$$LXBQ4_;dIxiTJ|N&Q{57XzFek z9mbs5+(>NU%wIv8t83^!l6I1!JY1zs-9wiE;1La`_BwRXUvXPGy%f|?FR3vP@5Xgo zeLT>V2R5$*e*G2r%o*5A1BR-Nx)ZoO!wffl^nl-fq?f0(hsgdGg@ySvfWJXq zk|Qp9gi)Kd}OZDx1hN_xMVHsXu z$y6w1Xeg~jLs>Z(EU$TIODhHPXr{Ckj~<|$ zHg!*`i_q0Z3qbizjGdW=IUA;6)fcldaat@Ujts!UF(KGAHXIvBQP~k>hTnqBag-Ff zyIw}fw^T-n#$eQ`3_zF0P(X78pe&0nx&C-Yo53cH;b=D2K!cSbitS8M9OQ|zoD|%f zJO*{&et|D1Wh2ew zDGXvAV3qC#$J{_+S;bbb4DzwqWP8JNQWW%J9H16r0qaa(0fal`2EmN(Vcu&SsvC1= zo0HgZ9#l^j2H{;MMZkAnGTf$|7&?dL9^ z#c#*=BYW;>1dNTsia)nv?zbzEF(VglQKYPlr_I@-ENncr69sQdaJk?N4xIWP$ItCU z`bX49vid{*5IBKPgN?T1-nQNnh-m5#l&e#{_fz^{DkwOZl z&$76lP1Ev3cq~pvz(QI?7p5YJHgZABGT^@~9ezvG1htFzqGWh2OcKJ!EDVf$F5sW6 zCnIo0rby>BGYZbL*h(w~)>A@+Xr?;CFw0#~^7zh6gm#=Q6hn+*ndK$GZ>Hj~9ODPO zNu&(Vi-+T^C>W3Ng4^7f9w2@?wdu5AI86-|lpSpKYdO*r`UwuO8|5#ohC}A2!jAe- zGu#RzeDvWvH5Nt@_5v_xK31hjOPGuggeB#zJ(ixkC>}baJ)t|wlQwO>0xW0CLI%p2 zv)y`b#D4+Fdy52i3&8xH{JS`NQtVk65SNanw49INDwn|WckvwZIg7=t&>ql!ZnzMO zIblMq7)YNV3GY>D!t$Lh;@ubYaP2Z(2|KuC03~^0228^3VVD|$xY0?N@1%wAtW@xu zoe{Q$ctFig4{oz^kTRVVj4{bb9+!#0xKP9;Mj<^b9vC24S(O5<#PJlJ=EZn~qen0KBN z1B;1)G;UI1Hp)-X897W0gN*r5_)Lw1NrEc|yK2H9(HZ7ho*uLPT5@-?%9D*@YaXt^jPsr0^`ws;zJLQORxEH!XjNi&IYzQ zG(V)%^Dc%@M_9vaavb!dU7+e?2}O4!XnL7K#YG>A z)GpSMj&O=|#Ymbril{8tt%l(|ZIHUREdU-KMSH_F1jf4KgMpvITF(KtS~P}@?4YZw z4O!LxP%&48iIXAJ3>DFT@OyA{GJ&d^EGe%JkQ?$bUUoL3mNu*{kIPV0a0B@T*YWCg z3n>pJ$QY9#EXsyy%0gza3_h0Y2k*pCL{81br{?m)vfnJ;9xll)xLbJ{g#{N-{pd0p zA6`fP#nXbD+QQlh{Z)oS)7Atd)K#FXuO}QVvLj9AS2r}GdDhel=H`~Lv9S^5c5$_b zjh!+2_LITNHM3DyPaFJ_E4Y5;5b|yu6TtqI37NvOoE=We^nV}nG^dYTFbTR|7Wh!D zKa{Oip<}IrS&K%|8g>N_^G>1Y-W4=d7UId{N-Bp6bc{3vV6JPV4HY%!N;iPDsVQu! zEaqH34IQYfYCua{U+{u|I!FewN#2l?lfmV)zn~`nq5xIfD{kZFU%%t-^<$){ToFL? zdjn+f!O&0fk=#J6-Ss&v{X8LWZz8~Q8ESW3V^z$XF%pd>H&A@%xS;zeroF|_`?rZU zXXnIvmWEKE&9}9kE3~y~OsE?`+rSKlCe|dD)Q;wY=iSoO2v(*vUSvN-q`x!NhkXdz zE#v;h{W$R5I@~<<9d4f8i`wej2ncpSpCQzj!#;pt0x6ZtXHol68xHG-Pc-DwM|HTM zXi?IV7tY-Z?_WaR#Ur?J{ve7AZz8|&cF#}zX}mG#x2mctG&QwhZeaywb#6}`C~0d! zRZknb7Dmu8*2YkEISipS*vZ8l<432^Uf}^AUO9!P!dtk0>=#@(yjO6T|M=5(@u9%V z+ZwqGCP2YL8#->*P_{9Hx+{g$w>qBYFfdXNv|>x6;j%aqdSjgtyJHMOHfG?P(u43{o&=lmz8L7Eiop5F81Ac! zsoyNc2yZ<^%ua)Gv?E5iXd`9m7??-7!E0nB{Kv*YH^7GG3IojDvj(y>AF#E#cCaNh z1I@*+@s5;T!1c~T?6~j~PSjq*;i?O`M{4U7+D~i6Q9CAB!Etf`h6igSWMdYY6kri!&VY+V-Yrw1c-=VVw+@D@(X zxjh0_BqDHSPsqTx1d8_t%O$}4zXQuTv)@qNrk?@!u zDS&b(nzQ-iCWGbNpKcTVXkK@MIjuVkmRqK{!6b_2=OkZJ6aEF3hXn;A)ISgrA)x{+ zXW%nDnmM!CGMi~j82n^#n?Yzl0i1<~hrq*&ImbN(V9p_*OK}XIOP1dZFf)KE0nL)t zHplU~WP#4Y#~deJ>kUG4*c-r=^5r-wZx%l8olX*tlZ1hC&Qk)Yr8E+V&c_S}OZiD4 zvh*Cj#(=UE&&L4lKoh?VLQ8-%=P8K0(sIbc_edheaUPNdI13+3=NxjLQk(>K zvoHY4*4qq%O8558gP$Rlhs(h6oL;gz=Qv3?oz&*sCcXPXYCq{i2cPpj94Fd{+Ru;f z3!*&unGBXkMMPrMs8JX-el$X2Y2W7ShPaVwkX2WJOy3VMNPZ~f6-U6`(GevN?$P>m z5#wl2X6|8u_cZzo-Nqt|`eMOIsL-B6(Nq&UG+&=ON^||)J9ysu1be^VBP`V!ELU?i zhIy_0va|5De|=P82e3Tm zc%1cs;C#&S(nm7}$$P+YwlwEo5A=ZOtlN19hr-j3-c1i51bBJTKFI-k4o1SV+<(nT zIIc|>6ejk|;{;gFj{V)4vwU4L?A9iVPy)Mq!0P`BmiNBa8z`4R@7`%8k@At!_P+O@ zV7U!lXW_Cic<;12fv)$6-P#1WY)*sqs#v&h$%g&Xc({;mnEu5q0hULu94#!D#j`f1 ziTfEWXG?WgrYPBv4gamdMx;C z71rlsFc^`I;~x(y_%l(&g60fO)_JHjahQ@+_Fp+R8?H zt~udYM`g*YD-vAowQbEPsj9+*f?^aDSD>(@62)cJsBLUUc|{e<%F0kuRw{n!D{!3J zN|ZNLqx^A|0HLoI+{WJH`>|&C7R=eO1hY0QruweL(w*zE>(KXD_~l9@%*cjIdLV2v z{NXw^MwG{I;}}>k=MNa9H`5yKK>9En#D&gJK{@KMY}X2``(hP3yIWCOosY7b0#rAa zQ&=QG^7_Ua)YMf9Q2bvYc`sU(np(6qwW6{9u>i~~nyAc8RQARS)HT(kz4a-YYMRkh z-Gaw8ZD^=%K|@^=>V;J~gXIk6zshPRKwzAAyobnVPul+m8P zPD=%+EX{!$y4e02RV8(dhl_MiUc5%@({6N7ya3AEffx03z!zWA@v|O7SN2uNpmggC z_C3frU=LXS{P}Y{X>Y^h=TCsna^Tk$D6$-Zs~-=-bFW}rrTyRM4g+u`!yY)dhaO02 z%B#^`MbCIe|Ih32xcQNAsM^xr)dOPFqr0ijkEv~&(S}#;*U|b}5{_ESp?S>bKt3gS zMESg=LN+%6&$_^LD5$HT^Fj&>fWI!`riKLyO{rZDouGKef=Sw_4VZ4bneJ_6JeQ=a z6K|;AY_t8C`s`WfQ_7PH_w+Sh^2Y*dpRV@jU{`sP)oh0!P!Jg&=xNitpje~r-9Uhx8nLav@FlTeO*m7 zTic>MF#uH~15p!Th_eQAxSckN20L{?dlgE4Uyrjv`X~!EMn$q8TF0gWvnQcz`Xt<+ zIt`^um!Nt6G<43$!Rv`hIIVApJ5J+)i!>OjsA^RImoK}i7ikb&`WC-?8=_|M3TmrX z8dP1l_@o#`PibIu=*|Hq%{|#7PSAq>uKJ+5e;H|G0 zmgNkV^FVvm*7K6_F9Fa-XFun&jkjf2@buz7d^0Kpe@>3YsfiKzE!YSL+?8?BLko{wbx~@ngjyYWwCX9MjTG{R zL7$>qQ6A9N19bH9f|U1WQs$fVbx~_?fm zzyI|cMlBkH>vgyA!_ED|vX(7{1E)q&UWu5uaW?k;u?G+CTti7-9vHHwsZYPS(_)=-MGfpWYpbkm%no#F_ML_4U(Q=5|TF@xXQ3@ncGhv^t!m`@0R z)9h$cY?B2@&f>E)RRHK=t8!>V;tPFJ<|9_-AZ^QJxW04Xs1t1somg8KrZ~fTj6b~R zB_MctCVUno!ES1Z;Hx$tL;W_&OK?;>PYM=dpX&#Ubayz73P99?beJW&!Zy`QI5E== zwSq~EBTQ&B#1u7_{7VArXSQ7SUPhat`SCEB77U}QK^T!_4UH@pm`(B*fHRBLOzP8F zVX#{e{WkzE$v;7J2EQ59{%1OllYsHwBIUs#JX@Sg0J;Q@v-D2SKskf<42-idNY0=+ zA2YW+^XoEgjLi&EYL`))FHVBX%m|F!H4DF$oWRdFf5(PHJF)D|NA;f7I38ey zZ%L7ApiQV#lowoQW@F)w z%<>WM8;1;}%X(^yUnlUjF+1nOXGT1YCwutMP7=VdqN}z5%jLcF1X#`+W7Dw#f_BG# zS~xsr(?)-4B%Ik=o!&M57;6~B+Q2Zu2I`R}!YOa$>I}G2TGz?p;(b>MqOp|Z2|IeP z6+Mh0qbmzVCtVl@+Q2c+16~wwAMJ!t+88$<+<|E*}~jh7bZq(=ziUd`}fWw@6KtI6kf%hnq3ocC5$1|evrxe7rDJG=_yCU^?$gFK57#dor#)8%E?+(+tjm?v;s3;DHx{^F}Rh40+r2%7I>IYpNXw$Kpx+2mtBcQ205MS+FAvoTjR_EbWV?OfE z{(daMgYSEVm1ALc-*1 z^wUvQL5D64vBuddko>)e`T&3Dvu?wh$%vuHsd5B}%TJMeY47 zwBNpk+R{9H@#UHx%W`jPoOV;InQQ?oO~ za7$J3QAwW0`0jNJ&|Z8Cbu`Y(ZlA&HiU)XbdOx~f)neqdBpA48W5eF{aHh4|e{uwz zXpP}tDlr99=<-x}&IpHjwyUtx4qTi7r|Gn|%nXL@99oy>g}`-56zt{(!)m%80@kJ= ze0`PxhmEscXn$cQz;Zc1Jxu?0ITU;i5I!pv`b_oZq>0pJV__QMBEa&1aq-X#w1tv~ zp#aMV*{LC7b_P5~hhdJr@$oJ z8J=?^k+5Yn5;l#3-2`7OJ-h`*v`(9+xQma(a_;(=_1!ALbsoDo2S!o$n7VV3_|+M6 zqi;R>6#~XbLEc#twke*7qWRj1_US>hsBScGMlYdzc#fVO1p;OYt0vwC{j&NjRRt zbPrl5-D!RFSr{wCYi_gv%N?iC-i@uxr-#Cojy)#RT%79yiwq|Lmh-O$C9wQN-US#~ z8NtoN6#+iJ@b~mauzvso{AeG-lpI0K`OU!fzpTa?6qhW?88nx!GpODJj`x7(9QLID z7hui+GlzW60INjDBE|O>j^k^5%%KEeGib}_y`?w6&DSN+`=4oh$4kP%F5k!CF9X9Y zoQ9vzp>)pob6N=qmag%A5`ZiL<{Zy?a~>Qo|dio?biI~m~wkjf64=}uEEiVwluoiH?+unSARfoyG>Mc(0@fw4oUOz;9|r3Am}y`*l*+;) zeH7t-lt6UuSB~R!TplhLpL0Bq4-UD%`Cc9?Tt{gfNa=V?GAPbYSmP7pD82_IXMmi6 za(?IegP8=D_XgEP8XgX%1_t?$rZ?Ig~-VhNBa|BrKuqI7_v{m|-hj9SY)isc+mg6%O#d&|<^N3k&-5(+6IgCX@hlE(Nlxc3R4%4s5!~hL zli>bYCTv#6!DV9x9G54GU+m`Wo{thdMd;ET0ha%r*Xo3xx~@wV*5yod;=C#Y{u@Ta zf7M9XObCTmj6Ez#kIP;+4O@?VgYVDn$9HFb!|vmIvHidvZ2I*}to!M6tlzsG8-Ct_ z)!%Q$;$3SoYwHrs{%k3h?p`m_e0lhL>^Zg%ZQNw3)eZNF?1M z#u>UPt}vex3YXQHaNj-#=36qLxjqi+n-ie2H37=2BVo280rsRR_6uX+uqYPJOZkIBGR&zDt+!>u@0&>o{%Q)WNWYYiwiJ#; zL#C(Tvx9rE>(Gzb@yl*(`I_qW+8?)L`~E%H@WVE&ptx0EuEUmZw_)ecyRhq*udwZx?U=B23Vf!AKtItM zhFOkqWdkd2f9g+*wQ(?569Yr4v+Ws1fa@4QMW|L|bJII-8pDnC^e{un3h6 zEhvB7hLR>0I&Nx0<>OjmwcgNBfye&|Sk6YYKTpCf=RtU2-~?@28^ zW>gkmVCQ}+TL_!`d=&kKQVIIC?u)O*I z5wM&sZcu(4)!)v-DPKceHd92Cj}3}R2`*Gu#bXCI6uJ2cPMU@}^8p55Q$`}s))kmB z3s|!j4=wERFfyK6i3U;4U3&f%oSPVkukDPH$DUW&N$86wXnOMm%^g&>>T`IzY66~k z&|qG&47h!Q%0RMjF-ikWa4$8NoBs7>o z$FB;}zB~iJkTQlpxE^%5@(_wA>Io1R2dRAZ^d8ZG=;DFK{6Li#a5>%uSNvjW;I-go zYa8nLi%K)SnawZp^z|FmzT$S5!16W$mUqx7W)HRhvMevd`Y3uaYAfjh^>{-s&{OKT zH_zyWY=6;1n?su-!QL7_9ULK}UZ8lne%;pU$Vk(beu7`=AtT z3gt*k3=by7Ki&?SN%l|(H-~zp4fNw(VVdd<^K@TWX88(haONjB&+vv3DNpJVR?vvF z762UcDzl}s%}8HyY?A6O063;_;53RsCIX!EnnnxbXj06^hY9e`EYk~CBmD$e?l?Xa zP7}i5H6a{MQBFvi7zYnpoPRj^JwDs_8Fn518fOd6W7}`r;g#TxIqPR*_x@d&zG5m) z+&YeVTjt}h{BziQ=MSi+Tf%Wc7;G|J5IQOZOE)dVk3WBlQ^$^D|IfeS?$ui;ymbrT zY*~p(ArAN^+7Y)yZBVAbA0dXJdAJJ79bK{2#|*jI4v5|u2fMZ50u1n;8iA0J;Rwx% zfajP<*iVdv`P4|5P78g;lsgrke=)oM|*nM*BcH-Wqy2bS>8t zI$5r;n;wqHO=A(Uaf|@Z8T59WMGEnJ+FVQug?^GF+$TpMeq}Cvr^mn`-X59}7SN2c z5;Piq^OF$1DhI*KGT=-1hAdBq|3ao1A%&X6Z#F61OtV34>^3GC6L-wPm6p5s{oXNb zJ-iEnatVUf~Fpt%H`OV6~L6AqhsJ-|4N z&4MTalyk`E4Cp&9pbgr*D7Y?+6IOt>lL9g8kF}_v`R{6L9v1$z9>3PyN5+gCnn!=a zpB_dyM+y=y9*4GzA)KaV&^U;~oaNK8=F5#3uBm{ba)V%IV<5otJbK5IrjT-%8VC*M zlwLX!e?6k{yKe_}AN>}S*U!YXO>;1H>pZO5yBTBGPsiHdKgYPwW+P-?GPL5X#0MY# z)j}j~iqp1D#mKMb(|DkI)BD2jkw%ymjAEUz^0&{h;mTEM;e7frjr@ai8^9L^e zVA4bV!o0(Q0>rn@@}l>P@{P5Hd4dBBXdW@6`NKZf3u+O@a2W50zT@vu#a(rMTjk21Fg|oas#h^`wI2$=6ERgA#PZy zV*0T6Fh0r~cS`dxeeD8hn(1PY%m+~EKLi5?4a7j%PoX{heJJ&j!HB^!aC0`o&K)aJ zSN#C3jm4-fzl)D$WbpC(GBDCphP-@#D5(s_7hiA1%!O0%!GQOL;yqkPURXqjk4;A6 z+)+^RF@j~9Cye53VG(JC<2V06e&Gc?Zz)CLm6NEue-kxDcVS|p13C2((6eB=4khU8 zsKZ!aM+gJa?D*5nzyKCZfkFzlp^he;X|wksm8rDwHkuns(9}?f*5+a=^F7?YaZ1F^ zpF0unQ<+sXmGI%9PoU#qiaDRHL?0bFYBvY*YXzpDnY(f#Ezr&QdGBZNaTt2QgpH{_jI~sur>X!wbw%iqs3{MJ!iat_G*ZAXKYxbK zHrks|o`?5tLq?<}C+J^!xAErJ8gEi$KGwf4LS+^L&t@I$HH3TMM zuCNYr!bh?nAS)}5@@dBds#8VbHIx-!N9)r{T)2Kh)S#YpKE1)EL7RF zI7iht(Sx3$7IdlH+PX^6q-WV!>0;H2nc}0u*^_&5;ndG4xO)cYPyB$BN4~|Ix6O!2 z@W(Kf{`f#v1|Cs9NS!enAE*q0fwvRhR~`y=I}^w(jgaJ038+;CZ_t5KWjszaB7at%2Q8_^#+dWr}Pb`wtGn;S|| zeD4|poGjsLq>V^-Tip8V2s)Z8@#W6-qTar-0Z6BEF%64-q#ta8ePJH%L*p$Fs=mgs zb~i?MXDzCVucEB*67p&OXnj&fW3LveG2!Uf_am5F8DfMA%{#^_aMc_Edlfn8YimHq zzz`-(7o)2MB_mY~)g20BQ*}fK(PsSR6I9>5fX0eDD1C4NRoBm;;o%jkZ!0Fx&xM(n zA-*`e6Ar0v!l9)X&HwBNfoW89Qfy&0hSqJ8@Re!sTSW8c)Ifx7%7OnnQjF)(Tt6!S zKK!%wxpX|kABMTK4zJA+7RK!Za-GE8-Ii1x)*T8T#5N zV(yP?AnTw?{a_>{@SiXKm(x#iePI;bXzg^Owbg4rrFjRIvqiaNSbCxuyo-)V)j4w={%{n=^boJmKT!AwY9qZ=W7I6ajMg(5grv zIMc3hC;{RUP%eoCs!JjP)xCuQa0y_QKyelZVO{)v5k#|aJ0xC)iaQevahz$3JofpjwgJhsb`-;>xlZADv4DBaAmG1{r zS{q$yE`QcghgWSaIQ+*xLAxcVJpw9@v^GXMLDky?1FV!W&_V@@E(TC@HO2d?gV0xV zIE>wGFi2?xhAJzF4@BG!!NH*j2?;|~R8QM+n@JYe95OgA0puJqV9o$JOK%JC7)mPv z;S7HN)3Tf?R~Q)Q<9`C>0z9X*ESx7>nKM|<+~f?Nb3FGCmq%)ME*~FrUr5(Dj*q1= zz#$9Qlk3HCe9Upu_~3i^m_c#Lx|~6ArdE=Ke{I4PExiGAN%$V7;PDHKfQK)=r|-aW zXBX0UtaTAQCtWyGv|ruh9Mf@S0$f%k2(X-~SpIjx@_#2%I=+X2>i_Qk{~fU0VPm=w zr;Vv_-az-P=d?ZIw2_{%DOFgOGsTL-vIN-8jzQM0xhSSR5?hutXw1J{W~*`uEVo~q z0*7_!!m8eH+jshwcxUlpC}?^L0;VP*U~&R{NRReop<@P` zLuS%=S~?a{^K%e7BNc(uk`X>DU7W`)%tgYyk;t4$V`WMv!gEM}ig1O7rwP;o%>-?# z*P=AIEKh^?_VMueY648Rq(ftU0yMWJL+$fqD6fr$*-F|6EKC1e>{*ti!C@)2$r7r= zVroMQT^CdPETncO{ncebGCY=K3J~6Oa}xA6#lVpD?$6TT^TjB5uTK}$pBiyC!Wbxi z(MXJ4Hxu)}T7`}KzQl%Kzrcz;o3Qlztw>%u6)B`&Wp0^=ky{sF)V4(!w_`D;>{@|2 z->el*Ls$H?1?zv?fzJ8TC#4^ffVmZGJ$4sC5uQQ6px(xw&^HM2CM zyr~h@jkTy}p!`3zEN>|T_D#h#=RtUA-~enoCcyIg*Kg3(T|-;qTfnhRIAT5m4c0Cw zF!Ke@KcxI0<9T(F&=+33twCpZIbOeQz{?kO&r8Yx&+z7D8#iM1eUA1gEy5DJ4PA6EmH(TixL~4;e4lvW(G#GU>OgvUOGYjV4D3;D?2fBS zrnu`KLS_4lia=@VT7gP>>|@|{2T3<&Md6c%R=j>)1ymmg#`>VnN(HY!`wA$iMfaaS z;%iSUoN#u*NquwNHMhlOQzINEUG=b&7Ru}mahvpqe|?|O=7&pHJS%Zv7xRL)LPi(cX>&WzQ8UcExegK zA6T^x2h1(;8(NTbU8dUdQ zKSfnn6Wx=K>NRt4%)<|_cYFiT;Kd8-=@VOV$io;n5@!Gpso|>{(X{V7{A6v0s%g_{ z1XE=Sn{Xm18Q0xn=~;Jyl1{vCr2*f`fb3};G%?0S$0QnLZ>SSqiH>W0MK5F;uqXrg^LK!q zf9~2(ZSotiZaL~b-SNnQ>RCVof!e!+xp*3B&_8*Nu2*kR(b_CtlpY!u2Fu(30hZH! zH5J$p8Au@w>c$4V>guF%)q&?--FVjV0u9}r)NgHgDFE`vXn)m6**Ah6yYh>V7Ak84 zNy}@zeexWS%X=)#%WG>v0Co`KL1MppzYe)>T!bjwZOeiW^+A)#P_!8iz)S6q0nLx_TJ1x0t9=CM z48lwOVQA8qLy3tZ?%Cz`Yw3+mTOOz|TBHZEP zV@pcD3RFkPLR(=t3{({n8y0{gw4pS0G=^=Mqo9INjWCB|yak3v7z^ui<5VwLGk8Xd zAUlL)niRV+L14#;OqHUW;0T3aBf)pflnzYez%(CB<-lN`?P#Wc=mEg_XIm=a7Q#^& zb1U<8<}EkP@Dw3imvg?Hzbjqy$t9s@2TzQ^&5nDx-gO_Vj&8;HujgRfm2YwN`F*UW z^Ple>z@3hVSpL&GI465!#rNwla{UCTCK$kKvMao&g(7Zl8rJUl48Q($1V5fVioK@~ zp|Jcuy&l(5G;1dAySbs>+!&1-!_aIfiy~7wG-M^>++1KfsNq2UxUsgP>tyu-s>PCJZJ93d?en=^-$l6ab5<%ugFG ztjZZIx1Sd!z;Xtv8My8ZUiSvfB~V<7>kXDmK=?laai(19EmFS!9bhhj7sZLPJIf%hrxs@$uVKM28?mS4I%ce&3tavU$NbH4 z#@8OWdK%%mF|ecd+W6yVSh`^WCM=kWkB0Yymc9n&Et`#}=zxx^5%gS*5kD~nO6F=f zcmD#GZd;D+KYs!D7;g;L8xENPGWbMukl2tOe{>#`HqFJ|=Vih=(ra2YzI$*88_(~- zk;dyd`|JUJ%s(zH!|k&J;5s@K7IE&#Sv3XUU))a{#vO1=^uxM++u%PbR!}DCM%uwP z(@!{rHBEFAG%Z?T)^HpdgwN0a1iz{Aw27RLDZ7^ndL_QcYitBGyo}(S<_8sj6Sz!> zfaT}_I8Kf1u`th}v6bZo^$=4iduhWi*#(|Ce$Wjv7Uxdc{3{e^Cxv6O^6xFvLtr0KWR(rmzUKhDWpq3TQ(&#>EcX2ET{LX6k5E z8HSUJgJCQqgY#E^$F<@MxLtAs-+i|eQ^t(KnCxs!9hHe~bI0KF@1LXe-WfDh=b`Yy zIXtd;AY@c#B>FM8xY8iV4tO8>`pPgdqxmu;9^d`^HQwvj1D4AS`cUw2CrlrS^raJ_ zP3>hEXAd2k9~}~%aI=DcqScI?)L^I&{s7AT-h<}w0r+vxP67C`#hL}p>qgp&&{376 zP+0)ecIJjKXYOk?Wf*FzA;8la<_21{gKNjL<|^TQd)Aa}n9_RS>TH4)%Vy&3>o%-d zF;7^nf7JgY3{aGXeXy4RrPbZc1&^wxn-LVvm9Xvm^>|o%8A{51p){hO0C-svVrU(u z@p$LfIfMndi#YyhFr3;zOKC6^WIsl~4`d)e(A@AYj;U9!0JOjRLjW4S^0t56EvFPhfu!`}4F|9ppji>8jis8C)$QhM_ zhPom=t}aAwdMx6j1F(Aad|LM#@#XGK0>~da^b_c6%R`&Q!rA~jMrzP9P=S%D7W9o( zp`<2@5eogGsy+m(*UY0jwc(H7zeZ)nZ7g0e9#bZ!;_9VCD9FD=`@C92#`-{BW3ZrJ z@s9OJ`mC{dUs)CkHU{Xct$^Xin$WT`5VR>}m5;=@aJ1Bcf!a_E=_?}~o9@}Up7tbl z*s^vpKB7KQ7~UVBP+MuMkANYqshX<8F}VMG==X^XOpH{qcGYa!=a%5koeMbk*Fg-R z_8CHBO0m!TFjSC*o4En)?VjM*-@XwbePCh;B61V)srpdJTk2tewkrAMzFj$mDRmeq4r{yi0i5RE9_Q&x>}udE$4xp#GsqjGvJO1#>xk zd*Mg8=J>*#eP>LMfFrG?fh$wNJ~<-SWeZDW@A=WNp5OzgS)ru(#*lL93d=cxG=B%d zV|grG7DgayTP~P(B$1SB>v2995}*m++3}F|)D$!zn&Am5zpM|#;Hy)igyxVxdP358S5tFBMUjCt(!>C zFoSuLo8UwrY_EdBcFMw{JZwf1ENMOsot+{m=`7Q|;4mgw7y;;~IwN#dCOj6zK*nJ( z6yr=`KRpORt5O9>&TYluwPYF2z&Kl!Ge|B81LfYd-(b2oujM^}xyRBTK-_&vv^e)% z)&rDtycF_v7Pd}jpxkYKs1V8OoGr^;X`OYQ6((p{7%X?2NpUm6dcx_Uf`)}T%k4%w z3$WZO)0Nu51(xw{g1hyvhgV^0Z!Tz4{Jm+f`OdODkc5F=Zvi6rfZq~8E`j8dxO=+& z7wQ!$oAzN2VikUS$T9cgK4NJvdYSbP)$62cIc6%Tn+P2tBxPFESq`l`Z-b!JwQ zSYKk}0-$R}*9X%4>!O3Wg*kA`2}NJMq0q9{rg`%tINF#A3N;&JJ(wA43#ZPej;0u5 zp$6k`}Rb(_Ern=}p1HX{7#S3vkYl zL+O~G&*hP6$)aT<=7$}jaj3m^Y;Oh{=tbn)|;4yIC02mV`lW7Kx9Xh2#Gdu>60bVPQv~Y+25{>rN|@grzov?D5U4F&!oCjJ(i}>yq`vENjmAK39uO(1cOv}sMCH`h4e%I zwYWm0B@`np|Nhmu8tIYJugE!_c8Ux1Nk7+O`o$<~$kD!@DHD}~&4lPByTWB!3_@1q zAZ*NHr= z{=s?$$+EP+L3BGRzun?gA`{f&*EXUJ{ra=!r{Cr86i7IBWTM=IFk-% zkmDw3GufvT`(&~r{ltv)5`%PiLG9`~CIX)0V&OB9^zaFBa2Xv5yPP0cXVczfWPtdv zpr7I9%lbTx8)>WXczFg3(G}cxLesZQ>sjKf1cKXTI5R@hC z6tm_MsT}u#&H|v3(sz{OWmO)^Ne96j#{OF9neD>hm2tn$cXZ0^_!F%!X=_jCPoJWc zbd1;C<-jlNam7Rnw=AQ9^L12k#zz||Zz}7l!)Tg56%Ub=ttnrX(AHF0J=hh;vrCZ7O1|8 zmr3DhlrzBdzS@ACDiGq^V@+Ih9dF-M3P7cn`tI5DE^5#URIQzZADlhV_U(Rjwm!r2 z)*9f%7x>fJ2>BVy0P0`R%k%8_pK#341+Uh8&N@5Zvf=i&-T2eW4HsNffPLrD`Qiy) zv)OmiH5{?F#EpR+DAP5?Lla}%b#lfb z3ojs_Kk2+e+v^v2^`r}Ln_u81li+uBP$xaZOXlclZ=-(b0n7O(8BdwhrIo?*N^FXF z2bMo>5Cr*;ySmW9oa9|EQ1_-24X@kL)zyp_U5^Dw-teYJp1zwAUX~}% z&{$E8^73+&(u7hV!178I)>fjJxy-97QCm)vOG!0aihAU6X+0WA8p>Ge#C3KGT1$D< zRFtBrt_lq`>@c(t4VC$5sxCldx-1Fx-Z@m60SP*=rURXIRQ4lgwaqD!|w+I9M(NvkhfjEADyU@(ddhoI0-71tfr z@w=rwc3R0JYp4to)jvg&9Vvj34#>?7LlP|ro{8Qt4sw8VYB-dft7^;)N5+5L!sBNO3b7Td4$B#Su$oEA z4=I!;xvmIZLJB-7$U#%%5jdWd#L>afNi>G#7zczbOcYK-!>4Cq;--aI`pr5VJ^L$) zPX35HvvN^nV}P1^!m{1?%NVL<|1=EMtUi0ovO9VWWYh=Tj9n7_q!X0+fYXZ~`x z`SEa?8w;zcp-@Y6#E3Xc7*C*0C2d5Q)0{2EneKw~3YbTmz;Qt^Np%G~U<{m_1Q+TD z=9^|J76!{1BxlMNb}FVCZ4T8)+VoJ!4$joWOrRW~58W^eSS7k3bJ#_kLu?^8yOoatLyR<7*7j^{k#}B%#DHl z>yCi%~5-ELeu$+J1#{juxWzJ$c zoyOe!9)RDTxmy>;BY0INMt(aFtIm9hh5OdxvrBt1e%}{JnwEjfE2zC99kJJ36D3=g zL(5Sg0gJ{WY-BWYr)1*mKYxIZjUmF~g0W@SX3X2X1d(GY&zwkv=0w3Q!ULBcT}Ehf z2;y>LkvnS?0+WJ}HaP=3e%pmjKW)R5^>Yw5E*|rDuf|{}HDqj>gx^a~BW3Lb{P^G~ zF0|bjfRM*HddK2iVVCHMh{?&=ckM8yuA7Yo+m<3IJq#Q7Zo?28HT1C<0eN>_n8mrk zB7ruA5q8iCu@YRr8;7dqHW+iF$AWGcCgFxM9_?Q z!7Z#6Xa?VLQE*NR5M1T)v$9|j>Ig$WDwC@|G+gvx>SqCOYL|--??AoZr^xLigQJSF zc%q_&CR2TUNo&<#U(QF%lRLO{_c*TH`V09FZuNYeEV_@E<+o`W{sZ@~9>C2j2T@sa z6_?KMM^)){80yJknC$zov(|x?g$`_OjiIDG4Cz^k*uHBUKIr?tP`n4I48_N)gE4l^ zEM%{l3WI0|=#mn_V7V*RJFosalCy&$Co2P4wnYC#1`7Q@M86MZXwzDb#Kdp`M#~L+ z4@O$@Fkq|We(wvVd|1B^VW^>qF&T;Y{fFIXt}a1C`6F~cZG`;bkMJp_>GJ`Vp`Q%2 zv_@dtwzXKYWDY*1`()*1F+g!BJZUXi`_oS7`r1Lk(Ez5Q4j61O6njs6kB|f}0bmc8 z`xM%mau_o316Z1B;>M-psIPn|IM567E@0EDxtKm76**~PSTcVMP9FJ=)~=gqqz!HH zgY&q0VLz>L_h?^z0ZO#iXexdJl_4@v9sVKoH3ng9P7GeZd4j&O?+FK*ebfg-!CoJ0 z_U(jmlsi=X%%I|B2vsLN=+XXV$@+zOMH@xtUhl`2fWrrh<58oMnUoFR?fDF<$^)Pz z{|OWoK7zL1Fes__hn&L4=r>SCI1(M9*azdrr{LWA1IRD9it`r^;>5{c@e$?s!Fw_o zD*K@b&;0c#?K^8o>Gp@J?g+t4?i(M7u}i1J$j1>elXDO`E(2jX2?$AzM#|_EMALgK zH;md$bqExPd<1!_muz1dM2EQGc^fG><#%!C+DR;1FohI&QYZ(1Nb)|6b>%T-Tq-V~ z{e#+$+v_522aln(wHms*%IHtyLwQIa45u>MXsci_)#ImccHoZ#KZ$8uDIE&`psey2zc|USpmatL|S(gF# zrExHw;ftWHS#V+MkCn7OPxKHVuEUIALB(Q{<4Ov-u~^R-ET6o4F;oIg5W65-aF#2& z>tXc98Bp~$gG*K@LZ+s|Ak0yK<b($9p;~eQ7wS`8g z1*Ys-jDC)aNZv3O;mcB?5@Cd-En_e=P!sW+N8#Jz19(I`?=afmkJ&XF@_~AAAO+fK z6s@l`=Vfh}3OP?bY&f}F%)^E;4sgoyN5bNff+lPHwmE{b%rPebe$(RM&puBm)Q+)( z>*Pr2COaZ~_bkCtZbR)gBH9QZ3!()L4Fl$p8*>CtISX5pvt_xkCVxl4;zQ!MB0+%V zEDV-2FwX5Li4@1cISU_4=WdImgk?GNmb)?~4vEBP?#-Y%9lOj7{TnQ2-f{-Y-DlB$ zg{{md`on3g*WX|{`=c;RbcR)eJA87&arV(QSU6b;VB62jTUeF{`S}YP7Qr1Z!0dlf ztFSO|-rIUy0?PmC=#!5*o~^Y1S0VwhEE13`o%6NcX{2)&322wDOZQ6mbJ!c4X0TTh zj+f+bE9iIe97^{~K(-Vw-6I`K*Ep>N{!90A8V;pu@LK}H z`Mfs}&0%j~n}yFAIF)EO81$6D@_!2F{ZHX|22VNU{P?;5E3lk}N&M*me!H4RykTp<-mYp$%YpY>|rYb!BeFab~f#uvT3_f!^ za2+I2nT0`d2FV$;W?)(p$r4;pw7dhrStPJrvND$}$t7T%h2y03e2vQ@<;i_3JzoN| zIpk+?8b0Q95>U@{Eqo7;1-{1hkUpeHV~6X-=bVPGaXiOK&tNNYiCTq0a*3y0;wR^0 z2F#^v445;J&iAlYy+5^~M8gsm5CCr@~M514j@4TheXq=aJ63C_$v>`^;v9!f{C=0ymFF_>M^k*)|@& zw05#{Q5MhjBjG^#S}ll!-4d$va<-695;Q9eo?B5pO{k70tK(t1CIMz^6Jbg9uw;rA z>Mt|W-7VRN$%>R7{_my9u%>)ONb926db)2*ENnhYhW$3uv$t>?B*1x158V#yc+Lw+ zcb*XflSzKCoEA!L7z~riqlYWx!@twBTTO*q93Y%^6guM3}ElgY~*h z*saWj^Wsc+&&xvO{L!e!GpyXT6?0awgU@bMG&G^2wgEK_ji{`xL0v;Vs%xu+W6!$U z3e?s02Fr_j!1AgRys4@; z_Gb89Ll0-8vrxPD1klhUV+UEM;E?l;@LB`X_aC z57n``f*$q)tu0-s?|6(Bw4&=xCt99&2(Y~R^$Rq-=){w5<}7~)mOs3U-#z|c0?XT| z@jLQSykkCoa-&B1jXM9q9qh|U#-Ye4;2t$v!5#eSVU6y&Q-BMHfEsGFR_fFeYS=R; zP@WWvd}nvuSGB+^n*hAEbixC5HQ@8jl$OeJ|2lOdJ*SmMY;7aO-9g8)aro2P68MIm zSJO#lrt+Wp5w~r0P@cY^hf}BGKHB$xft#k(!HYMcy`YK40>w8!LiyUs*zIJ4#_eBF z$2L$$(@S#v7)~3R;z43A4KnHg>bUY3uLW;->*G4Sx^xa-2L$5Y$Qi&Fd+}-?$=Oq= z_~R^|9y*88S>vb;tnvB)4W>#On9UDxh!mZ}5uTKu>hjrQVBut7=a)2C58~O6pX1w{ zDC{1cLv?FJ{@X^}r9s+A1Eb|BdxY&qHw_Ht7Dqb`;ufkSh5Uu-@vGOL@R{jl^H*|Fg&#^7^($>H3@u16q`|D>dXn)y4{m9Zr6F?iDy?laaosZE)@oinr zG+~vYq_S8z*<{Xf@za>nS~M0npr!CJo;_+t*Mlc`dGCn`TMC;|U-B5$6*S3J)uDtY zqT>2e6gTA41jwAQm(f;qp8AC3?it|hpTPG!fTgqWYHSk9oV8G8GXfRHLs6wO2#p%D z=+IzLT!};-kfY-vLxJJL0QsTlRFXxr#$eRw4o0z!8jjm)<8YuOeh#$9t{_`{k>Z6# zaZX6^)PlE@GQ4~Z5D;aL&}1J3C-}iP!V3Y^UI{er*bz=jd>TyjEYP=)Ecy+WgS?g= zRLm?e+{gej$|K;I5P^ALZGnvD5U6^Xz%tqy#=+LGk9CGaiiess`Cak0x0A`92ofLamjrW7g^l;%wlEHFs297CYCzSRRg5f$X5|*QU zp&D%omr3l%GfeOqyG@Dso5sbFdC#Xt!FFCev?d0K1zB&3A2cSoV?>S(3}^X5e}*T_ z<_ExfK?qEz`XY)p3|?~*;W;%HZlj}+vV1Hplz}ivu!2Fd6O7V5VKs^rn@JH!8|jVZ z@pjnntcC_>U6k`r@EuL@+|33*C=JB7ah}MDu!VD?J#0t$z#-cg!84N(y)YYoGgII* zKNF6#lVLlPHajyD;Y^|XY?gRoCC>C748Sstir@T{zr|OQg{i_hqa(G81+|GKwWGuA zSQt+TgkrKibaF{qTuhsprD+IUnl2o7vao|s2Hv%j>;)js=V2?e5xOEvI2HA$djgiE ziO_dpGNNcR6t+AAq01=U651e5ixNP)UbLOyC7=D(QZ%BS7WYO$7qW26LM+_00HsYu zxLziqCd&)~Mzr?z0QoHtLdD`*oqKNijl;^92M2QU}b$VXmttey~x&X&*Z*u{D5>qXBKa zNO8*wgQ=4tYy(}9Fg^qGR?R~~ZX&YhjYHO=3Ghh?ftI5oj9g5x>hqPzo}7;9izZ>u zzFlw+amHugZpEF7Jjlp?03}OJj9f4Qi@siup-vib8yALy6&JAQ=AZZ>?=VhQU&Hp( z-@_r<7eQlV1<34?5P&(G7sJNS0nyoUu=ccpQ-}-t=#s)`s}40!V^S1tpciNjMHf8` zv(tdGn*m~G(IzjAl+kU0#JT%i$b z593Tvnj5@e6zhoeWup*0CLD2-;}Mb*f(ff8A|y8$5fh`3xpEZ3X2m0ASuR%X--1)s zSF!E**ZA|nDg1Kt5Js<^ioI9=6x1u0VGaT)A8w%pRXa^MguCKw-X*BW4Mu{20j3Qe zf}8pVs53LbY306XTbzT&E8pYJgG0D{`#A31zktU@H&A-zIBuW$9VHL`LQVNKJh*pK zNJ;T!+`4`gGiPK&UhWf^TWG+=#R4j7!!SaAFi!n-409LF!3TXmKtI_5kke9xg0&WA zez^?kt0urA)dRLUKCsXBf_s)1PChs)Ky^do5ir&n4kNXp&{7x#Ek#*eyL5^+VowBc z`t2915EtqOUl&tMq%raHp3iXq##z*sGN^hJ#SgBdqVSI37C(9D7Xh|wDGz~$$`HYM ztwdp3dOUXS`W)}mH3nDNIyhs-cx>MP9n?K7q2p%@$0UFB)04&L`?kZ-K^v-i!=SCN z05dZ!m>R1I;J)O+HB=Vf#EpxG=$Tgps9TbM0Y$XgD=IjLf=7Sh(Y@oyyM6#SFaLqN zH;sIZ^N(G4aQ`pd%{zlj7paWbPvXY46HuW!n*nnExbW%6GB7vM zhL)BB@3i3??1}-yKgNfH-^b{=;H=b>LkUuMo2gX!xR!NkuQ zdR}(WaWamcX^x5Cg)>?|j(mSZ9@%OU$K3+5wi+1BO$f*s4 zuKF;j4e3i-NEn(69t8NWma?b&UUVzOXE3 zu-quhL0FdOteryhjvd@`!Vx$rNgT_$>SD(36_9n%K*G|o0xVbbp?>qy74nJo2xx{` zVxW^MGB-~a6lF{S#bCKwlnMM6#6l_35NSIm3fh?T?Gq8RE*loKcNy%dhLwl5i;olh zk%t|8erP@%qqomNA6o_FY?+Q3dzRBY{0C0gUKc#&nt^6;9~&m-Xr``m8XYX?=J;21 z7NdO;yJ-}%zL|kMT4AF$jfBgba3p*_j@lqx@RPF$uw0^DSswdNqT$QoiUjzq>;cRr zV4Ot)%Q>FIe}d&4=ej6TP_Hmp?!F*Qh-6vr^A0fg8MH5(94IWy z9Y@pLoarpUa?=E-zrk|0EN8G>ScSW}!^6o1zMfux)37keDOr_EfH8?v>K^KIUs&zTRb$0AmiNa`E{;<2Vlnp*iGdGbqboEFUun%^{z2o_x;7 zoR;t9XY)COos!isi)0nd;HLzNaykhJmxSZ^+0wH(-`?e5;bVRd=ga5PvwPQvrFZ}I z?gx$&OH&H4RB|@rWkfJ0dm`ev!dq-VPm^03};J3^rDQ49)SXq$l$) zh}?o)Fm>Koq>PS%%upE&F_(vHP9VH#U*bPCp7uG~kTX++im5Wx43%L{^MBvLA41nu z194d~cu(#lsJRtt)@(&Cf#niFEdkpSSl%1>W-y#B%_VMfreNXYe>(Z(^cgwX zLO6d(dOwFlKIgJYmh2LME|o*#Hka;W;GD;WG-enSm&S|)r1Np_>kN`JD9+a6lI6Gn z!sGZlj}`ui(*v0Q)4H4~co-~q^`dvg)f1uq{sJs#2cJ=ka|Kx5W67Kh=haC9EO%Sh z!(Gl`Ia8nfPhh#%mMnN~&iorRmxRwfHf8*mw30~qu>4P8`Ts=2B7x;>IqtnNTNq-E z|8e=>mgNj=+fkitsZNgTD36U9@4)gNAl_s9C;^~bFHeNSie&h#&w>BOTyY;8GI?(t z36Bj_zx7nljal%a_1EvSQ6lu(lnw9AxqpY=n{!0S>D<0xU~HzToKMY;>`9ccYCUl|RP4GGX(5f1gGA<$nD2`g$Z{s`jpSq{Q? zPJ-WtY=nO{9-&*tB82q+$j>K=WBv#bv~djF7gK+dp6yQJxg=dU=45{NfYrIQ_Kt)% zUH4m_j-ZuU2w9yYgpH*_R%Qr)VXT8Q-H$ij=SF(9>xv9&n^9DU92im?8?DQN@rGO& zugit$svKA?%ZAH}(YQtX&MDvTz{E}4n7IUn?Qig~sS5?ooyc!!LuvCfl+-^#S$#7q z>mH-3t`RkY!@O2lpEuN0qq({a&noT#_b#J(-FjT~3qf5<4sh%QP*;o>56|OqBketD zzg*W?hR5|)0w`ztm5Syvk_yx}{0CrpQ!ViIQrxxGMv;LRu=yyu8@f^V@(tcRZJ~Qh zsAeU2-FgWqzk$b#7U8^s6N(Ky(B>M9LM=1oD;eN{qCUz^oN$liroAuzv~b0N;5ZMk0p7lRhUV@fRK6%d<7;XP)(*Pw0+)B9 z%-js+R@5dB3PfAfy{<<)rFhcuL|~2`&sy>9StDL`KcSmQZal(XJty1>PVb?+Zhwr{ zwkpc83(vcrQeB>*_4#AUp&Cu7LG9}fRKM)PW3=G~<%|vr8>!qK&jmw9$2&}vDWipf z?}NMe!`&6s!GD9<|EJ|Y1k3AbP~J!Bm#guOrzddu6i`r(pOdrkQ%EdOM0wr5hJ7y9 zz`W@+V5p;R{f>KIEx^^JSRA!>z%h3>oOE*oCe8(R{S1s8iM!6WIB0E({mu?J>KllM zvzDT6-+ACl9_4WvSThbM%uRqVe*kK_sKIDJ9o~-1y8Tgo2%uW{QgOQ)mD_#*5CksOOIu-OurwUL@q- z$EitE(EY=K9x$9%y}9E!sP}@#MuT(O<#}{mC=De8xZL=oCNcV2YR4 z?p8FtY(VQ9diIOQD6KC+aa9pjtsE5$BpQnZ%kqrLn-o|oRFd4l@t&S7-#rwMWKC=@4nq1f2~RmQ4#tUUtH)CZtj z{e6(eO7bDeCxFVQfFdcQ3WG?7(y<)6RTS|;PZLeXnz(PGf~$_2IOk)4vzfkF6X}7~ z<5IDNWX6Of%$zq8$rEB>9&80=R~;CJ*ugl&5#~Y8u=90;J1G;vG^P>)Bajgik4X1W z*yve9M@1j18ip9Es*O)oRPm9HCS>&0p&u21=|5~oKSzBG^Je-5XQ8ZGC())P%o>)t z0kEGO0jFuCxQ`EkX|69U#|F|lDOz)Bfu0fuFH%N>mSw^DUtA|kQGe^ZLQ{n!fkFGJZ8pG{bL09&%z%W z*g2!y+ywY9T*8RK{BR5Qg&(v5!!4a~43<78qqCM6No@+8;H#eG; z@hr-NBS(veE4)z@V1yPey1wX7! zx{vtjaKgfo7`JgI#;ltL`*<&5eXj3e3S}z|gk?kt-eWTtb6C1s!qnab26l!prZTWI zHiran7zNovla#$dq#%B(KUDC9f2chOvKGpaQR^$@ea!**L~jUWzwd(ym<DR9y`+gtz$f{uS$NiCKZ-p}L;V80KL(A^DC_DEx9^E^P^B4Ew@)0_|asc-p zp2fKv2XXDzAv`KPgTK!GjGMQQ;Oh0mID6rD_y*XcPk$L`>dNDjzA{KmkHu@e!l;R( zgoUlOqb+1rheJl;6GYD;1tBK@szJuE&hijoIXm`U|I0cIRAuFQgy2Qj*N}yw=5Xk% z4@Y^yZQQ$g77uTqLh*xhs4KsTmimXNtGtbZ`)BFeDcrkr7PqdS#Qi%LaQD_ZJZ-7Q z+LiMJcxkM!0u7B3kXITEB`SxTrxQNg-a}KOsI83Qx~iDIZV56MO@noUKL%NA!XYhC z@V?L5JP#Yc-2jqIeh$)40e98hW1f) zqRnL02BN>t5EzBpP+qUvbzng-u4)xH~@o`24U2k2^cwV5{rszRUUE! zKE5V=9ON#Zh9Rcv7-Xb^kEze(9StzZMIG-M_J@+;aA85uA3Th; zlwqW+3Hf2N;v+*!S|TYt^|*NTPjpvbp*`p!oVGVWNpcwNC-czVR)XrrJ9tob0i`8Z zQ1|FEp4_~ECwDGk_m&l+d^*+|P@+CnRvZY~Pi1iQ_n&a|=SK-Eb9PkewIq&|(^!~I^MflXy$qH!4NK6*bYWS}md@^!o~^1? zW6hwGY$F_e_IFXisBN<_!dnkfb2Dh)VFOt^RirE(1LH^+0hW7@iGiB0g#fH(e!UX? zZB-FICle;|F0_ZS7eF~%r>{TpmEb>5AcfU^Vi;ufKEc?p=D>AIFg|sbL&U0d4DePK zG%P{OlEk@Yf(3NrZ4kdE7do_0;JgMoXkgOLMd)j*gv?D-McKHF?->tv82@hf5Gy9T9->;xoF#WU^%Cez;Xu4CBAYYv?dC`oYqH{fTfAFPosU= z!gyg(&V1z(Sk4YUnX}w^tOu;wiEFwuwYQ@H%e}M1aQgmb*t**bu$w`0PiNO2Iu_p^ zzHO#qVbGgFa*1w*(=r&|o1dJ)bWS5#o^$Bx?gB^BkN!KLyf?tg$1DuIO5m$>y*D_^ z$5MJeW-zz+btw&p64=aXSR_E0g+WhAxI7#uSx@u*9M7Sfhx^~p>3u(o^lYh|(lh@F zHcNGoL^|hZ@H4rL{}hhr>--!}FM;Axo_sEW;S$)%!ttDjg^&3F374DWIE|w#>oh*XX(scP$466nqoRdnc}P6% zFMXU4J}MFVes%~N6Au}cezbS_2r=UlF=gd6OkFVrgLMbtQ|*2j;iLhNanz@?lHfc# zSo|_?kc9$dhR7g#bUacgrePfI)xt9(plqs&_Y^;Yc@)hr;WWRv>O#fG1X=;sQ1UQ_ zl8Z6=87gA1p$e2NXwPGy4MiQw-_J(?*kR$3J=W#aCJZuj8*sg(cIP%^$D4f4*BQ)a z@SNiqBxi710NL+=at6T}3}WTmtDOOLGY* z=YHdm<5(mRT>{Ld^im&7&_PA41h}^1LScD{6U7Dfc8+aNb*nM zJdnmP)3CUB(!S8yo%C8?xO+H5!%7FtSsu7<)PD??OMo|n+r8;mB*0s`S4zY2EK)it z-~SFQXONkN`O~>fY!U7BP6SB4hV)1hOPaTRHs!!(W)vp!wU`>2) zXz%NM&euh{EgAF-%6B7!FX$yCn+_Te1acZchDSvn~Vn z>$7^OXVyl+el_V}D`_vVI)vg#?^{Q@9fek_LSVU)t}%eVF$VS<<6*ZU4%Ta-|oM49JS?W1Z|&$ z&|TBu|M>)X(mL$1F&Exj#=!rx@d(^L9zmavN63ze6plq8wN;OdMBwHe_-)99H?7k_ z8^*$WCFQ+rB!#2kwIWAwtut+m!`d8JQ2$u1&V$SDwQyN;lv@g=1N<-<4Cq3P*;bfFY@LwT3x0hg|$E-?pZ)$~wq=74&0PZVm} zqte0`7c^{f!NMCwX_L{kdIwO`3e>kyKJDnHa&<5j$@6#4KD(HXg&xGHHU$M}MqSq( z;E%;PYp;$guFP5f7M(R+J-8=TOMuL1MN?-U3fhm-@qK#61E8!NXzRr5?k=ih2^wBg zo4lc_zo3lUZ{hLRvyg9Sief4&%9viJiSnz%tNH?AG=eTFXJaMhQ4cgwU5hEtyZJcl z;E(eT0l@LUfF`!Ir#5J>S4UX8y1?CyHtik(Nbre3x_1;3>`0L? za)hI`Jrv~(a%m7eccTpALop|Vdk)y z8xQ3y51361f!WvqSWXCr^Q>67&r5{M>^K3~y3eD9Y$_>L>^yQwGW?d(#$#3_%*J`a zbgZXvl*pFVp)0cmSR1f76%ngP3Jz~y%EycH(MfU;KUWT3m?}VXqhx16D`L%#F*7}3 zH8BQOQ{vz_B>}FJXmOkn1>eb}aL%5VxP$H~wi+~2Z1NHfQ{%8>m`$e=VogWLwch-giC|^Lw3uEET9N>%N1eh%W+LG}3 zKSA&RPNekGJuJQRl#Y8}=X_augXK)M!otoySr{m{UP#y90p@I7?l7M%CZqqZi`(27 z1TKh&&%9)$>{%nM>~ZS=_Pc1|l!qmLhzr8b-*@7>!t*$O?=+5GIRvLDFDTmTLEp^` zcH#71W`x5bDG*AI`j8_9%-Yu$+rHh5-w*$QgGYYAuHBo2EL}Mp^OnuT;`NKM;`7yr z$|c2w=`mJJM)-_0c;T)scyH)O(6u!{P<$w|Cyhi>4wW@K z8Ov5L!KN=aBXue%O|wU1=fUr=*yVhaf#Y5QefSoai=*53=CL>ghjDjzcX#(;7-nE_cXx+` zgb;b+32`HC#9h!paCdi?&%1X`I)|Hk&U@FoXWc)}nzg69tE;OWxss9q0RQw!L_t)l z%lEhU@4F4)-YLcvpNd#ICc6_GmG{JaiCS1DrS-*oEJ+eYp10Ob-40GQa=!9-9@o z{9y%OZ~ubNc7DNXSx_*IB;|WO@qpf1#&m% zyNz}GsBwK|!*PyfkIXk^3`q*4omWTx?tL!>Q+g55m}00q!g?hbi`3xC1SUVRfUf?| zw0G!AaAY_R4tBUZI~We|Bl|WP8kkMLeZp6tJ;TQJ3XH$Z+MnKF)%Q|QpFPjFpTEd2 z-@U~TU%tUg8AG4F|FSH}uNZ0@50~yZ+jPRAduQysbuu9Q>2pVkO^w3V-G=s#9VqHm zfkT)V9erhf_H&dm=|X2;M>=@e;vC>6ww#YYdV*i%dd->-*}P{pJqOepniB=g z1HD}Eakc06zpFFR%Pd;DkT&iACF5@~RWepndzH}E-=2W{cmve@GpG~)^1YjmF83JP z8RKBo*9~`D8+@Hz=yF#(%8K$ibapR0_WaC-PoI=M%5!YWi|4B-fB57zwtoAD^!Fe5 zYW)g!?Ea3u8^31v*B=_|@|T`nYTDG!-v(RnZg_e-m=70ge*Bu3Uwek2f-qj)^a1h1 z^36wAog4M1;p%u<=ig+R- zczy!IU!9J3&nP^5M9}AvQGe2~sFTmOQBE|>A40oWCwkpC+|ayCd1Wzohjpi2q#bR% z?!hfD81Lc;T=Ih{oY+9h&{BM=VrAdaU@Xh+OM?xkyMp8S^LrYe@`MS6hH|BNaWBJH zuHbn34B5LFK)YD3%UXf*ITd8gEGw0PB%lzyG^~OXNN{^fkU=4%qNk_;f85EDyQN*cKel&7Q`KvWGkZnYR!zG6KpAg;i9 zk|=`~h;D)9w~B@-K>nYBU{+fHEjzNw(_)|wZLr+(|cChRvbNAAgkWjXH@iD z!}OkI!E1rm`izx^C0cih$w}sDl|e=0E3m0)=(&ofX#t>`uD+k%*D$@-=d8RH=(WmZ zy^Ee}9P53oGV0L^*XOm4v~KiT&#io|IM(~9Re5$!o}o0!&di~)zK5|eZ|u{Hobr5P z3R1~yk-cVJw)sfgHrSRn-P-U^7g?k1{$YUdyZ!IQvmlV@<_u$uqeeRMLko=)-i}GG zv~jtumCs!EAT|+B=9g`Ed3C@w)sLWxM7&C3WPJ@beheIBeRa+Zk^OQ2ox|K{=WCB= zVhHy-+tS6wfyktI16*sF^YRKz+gtUZK(YeXmIbyREo*KCrd2E}ZVNnD;9CLnTPav9 zx)saXT*EA}?&&l7tOb5+ewG!v1;%T*9yMIgRW!Z@uIn=zrsdQy6|3x4xIV9KrTs*& zE#O?^Xn#=8}n%n}x6%<#oXjk;8qG5)syh1<3NI#Okq?YBDgU{?#8LJt|beB5s zxp*XLvwIPc{q@=ZKZ#r1gJ^kP zMXjOrI#J4#@Q1|S*D7jVu3&ZId|5X{r&Y^xrD0L9JaLA+i>w#1^OeR$t!~@+{oFL zBuU+-NScZI;lP0WlCB)}Ih7!ZqmC`Z=7>%>x5iMf#LkoV5YaYCSS-5iBGK6vik>xJ z^e~l$r9><)BjUbtg5^3`t^YR zjYiUD_A)%-i4rGqUNgz}wUG2ce-a+-PyEvU#4hbi;aF1gW~Ze^qwZ;rX`JG!%Jjuw~yy$4CI?xBU?e_&A))`?^*pNyz@M~y&Rr@ z2p*it)j4B1J*F>*`q#3%p^)E8lKD9`lrN*)`6bzhZ~Qv(yX>pa1vzn3_GedRpL@d9 zj*Z?f9Bb(TFFggjH^QN99NhUEM~>{`-04FcIk@M)<>2%Bx#Mt3(mnZ`0gBb(rb2a! zA9F;3>@$+y5w2W5$d#*yWjlLN;_ZP0@{H21toydrm*G3_%bxUe_<1#K6CL`H`er;O zX`kWRIg5Jvf)RD}si3*yg4fSn;ktt53KuFQuE6uN6Ic^w%bNUpdFLy}Saz!tI9|Bf zO4}l7a`q6HFK_3|El zAF*r1SZ<7&%$dG@IXbF^W8?a8ZfGMH2lwFGs74sklN(hz9E%I&WPC6;t8-y^16M{g zaDHH&iL1|?96bO=j_2~wnXKtM4^|z53uifVc0U&{o#M>3bA}n?;I)gK&<_Pyu5tL1 zlu2n=HvMKWkD^GR+dA0|fdR~nPkdDl&~>3mZh!nwvI zZj>Z&$km_iZXxWfDr0qZIeV)6v9WO^-!FVX28nc*D>vby$Y~t}*ITW?FP$@kMjd=! zltH50MHkLrk7oasPi%iZc4wqArpbLlYS*QB=NUPe0e40^oE>X zl|Fa=)J4vmI?JUCmpOa(EPM9tX6Np095}p(gNJu;_Vj+v9NWR^y&E~TeKlt`{ml7I zKXGM~Om4q@$NA?U@?5<0$$_}Tr)oI8}P*+VFpF^padClgwhkB@B3k_u##TUtqNm295Mds3NM zMs9>CBfhc3`bH2F7fo<%C|&Hk(8aDBE>doLXD7NlI&x3fE~Lq3X4X^7Xye?Gj%mT% zmg>W81wpi}jm3FjF2Tc#3{W09LX@lt)uc?84aCG61CSd_W;rUTm@W&2g5~PWN_k8z zz&v_XAz8AZ#g8r}Xe%rI$KF@ZgkNF7;0XmbHk zEu|#)EhnR;jO^xOa+^ir>?7&+FC=L|K2Za52=1Rr;DF3l$Ahvd_ODIEvouCFx^YBj zgwQ+Aho@rw*bwE-SzkMD*xk)Vo7>st(T!SPR6+b8Q8I^!k}^s* z3KBnjV7@uVkCu0m4ZCNr6ny(+;N6^NBtYIFW{g^%Rg)lfqn^#fN0s2wCl!aDF=Wk` z&A^O$!>6X!+##b2jVKSDih|bqv%8#yeW-hKETs<(A#qBLD9LrAF!#WxZz}!+G7R-g z)W{M;7o!&My&fFR(0@;5#tVy?{?t5XJ-L8BWBc;v7jN<4OAj;rzH!E~Ja2rx;i^_1 zxR|N6giVmm%@_ru%S3UPFuArwX-`xXoL0cv0>u?vQ7ds3%i7!mxc@8pKY`^|dMbK- zYkU=phDFPwfVct5CrO+A0hou#xr&Bs90kndqz|k0q*4x~jV&Q=L@B9rhB9EzFkT%{ z$SY9}yd(W+cBBs>>A})}ODODHN}n;!c%_G86YGUTtS7dy9z-|f5ZyDMJAAs5F2`*r zw=wI1sf?dIh|yzuGkfMJntPQpU&i#)&o858crydX4`TBDGnx3nET%rShy|}b%%dMY zPh536SxrTh^s6MbDjWa!Ai8_n;OOg&t;|1;9u9P|?L=prPKM^9t3y}XId;M++=HBk zA|84DNpgD@Gi>%4f-@qq33MX5Ad!^HEFyB_NGwYyM(IN8@=f~XvUz*{{g>EvexE6O z_ZW9N$GdW8xDCP8i8v&CligCtL$5!~yvOFS@9Zw_wZ8)!nfDYl-*I{?qn3=NYm`0Z zqieZ;#WMc==`##iIE-NrjG<-jASOOGow?HY@?>nKHsujfnn*}Vd@Fx>vO8JLu{4ga zWByam^W`tQ`0Uf4_~O0?INVahuda8p#{D*SRfhA$#A=?I-Io{`b#Vz2OsnT>T#3{qi>7{Q5TE{`wwY|N1UJuK$GZ*L)(|fcIFt{YN(L zUQ0o34tI3EjeG6d^7nRsXXNBjT)2Lo+uPkHb9o3!vUaHR(RgX2>;W|-^e)1+Fp8j> z6xxN`8J_vNv5jmvv5DW0sg2SJPF*_8!9!cvy8Z`_?%u$b^^3#|3^y6pPu<--F`TBXjTKP2Jeg2%ta=uyl9AAI(Jl}lw5?_4u zA|Ji|EFZu9qM@;Iw&{RP=XL~nx#R2MVnF3V{rVU_?|E`W-ZJ?X6 z26Tw<#wNra_t-$Z;(~Dx_htUFg)Dh=F`c@$<(_-~PTRZMFj(sN)XDAaKe&$Xe|nE! z)_%-qKfKO&Yu{nb)|Gs{>Mg!s_cp&unSWXTE*m9m+wQN;$C+=X{bhU1#5v>4uL9H( zJS8#8aN4U+l`byb49{*-Z629@%4nE6$k3tbe4)S2sGHS7-jHIvW8G!*e;6CvdvJ5= zikE{OiJ{@x+|`!XUs}%38^7a|uU}=~`uDgg^>ul4GvCJqapQ%@*z*3<{P5dbto;2g zR&D->U%q>T4WGQhfi+)q`pho6dbF4R)P}C^ooL(Xb~<;y3vOQKp?}|J!1B2tJVZcq z5<#-|=*PsYg-yiGkad4nHHp*ZIIR@~SFk*BYB}-K%ZZ*L^RGzElp^A%l^7sbL0qL^ zQLx;%DUPlMo}`bh#IY#IfaPkvtv(Y1D&h=S-aLO8t~udk%Q#Ju_18AVpH2xLjC^vo z`EXr6rNuZX?vmn3#f(1KWcm=)BbnqOC5At|Vew#=e!Co(vS7UHBN_VqWZFdCOaEua z8L-^8%-2|z_j`IQb_KpT76&kP`CMb6etU=ws<4WXvsFeyb0``%HWr#k|~O{zPD1)R6N+yYE3Rud|yxU z7qn8aDD8>@brUDRNXMGrKSJHOss$LKHY=2ZXb2sC9{ znW<~N)^oL3SNRh(m$f)q*2Pp2b@Hh^^Gd~%D(kq?u&8yp9#cg!MB)df6E`542z8{^ z7;ot4{AFLI^k1KfG8`kij{@6?v2n)1XHG^YsmUn@09CNu0=^YASCITx(XjvOzFw;+ z7_MSyUD7meD`;+6k?TF{+PbH}v>p?Z5)JTb0k;}%J*VZ<@LPd!JzCcmaBam`xizkp zt^$J!@M@SP8c&~B5K+_6a}Bf7(C74?K6@*`tYQJrdQ`Ajj~4i?fTW6^Yna|^1td%V zOv5VIt)h8a`C4)Gc}?GXUXKcJDoCoJr(RoSvF_`+mA95dfl<9@-M7-xc$&7AmvwH{ z|E=|{*V?vPK8D>YxQGJft(@p;!7lo=h`zHCwOkiT zxL@*@>xj8kgw0i&lWJ3zqz8JD{7^IL54RYAJbX?iK{HDUnJGHkACxfxlL|;(P*1w7 zH7TZkB|SN+<-7v&Dhimlo@=<&**vM6x%DK9==&&_e2nC&q7*Ayj_`Sv#;Ix8f+|Ah zR}#EHr3!VHsS>pO|7fG4k)6l9U&ulc3I7gj=N*&H=kUk*qd4Cg8 zOM4S361KFNh^4)VULv~j5-HmQQja1D56HVeDDNZZX>y*rM2<^pNx!d#^u?m@Evh1Y zK{;vj%gCBrLB8x~N+*?5IiXzk)Fm{IDx%NuJo*pKVd&sYhWATheBUJI_D^F@Z4{69 zOyGt3c;g6iP2WO(&JN}BfJ(N?KIX?TC)P&0u{Ok!ZINzl3w2^wpgp^MZP@MAg#+GQ zIO@}llRn)!?$w!N?j1NE(4DjX9l03TnM=NHxoH0nu6O$<*mg92?oRml@l#L;pOlud z_l4)+&|c2$-NC*M>$raM#D9ykT#wf;?B(L+-5k7ml6^O>a^ezPR*dcVO%c(SPD$L0 zr#W>^p1*OD)7KAk@#0QNaJ`g8L@lxp?iV@O%8;SPzvs>yr=2HHpOWk^aP(TMoRD*6 zgHVT`iU-~}Et#E#tH-Z#`uGtzybhio$IoG1`60UuHXbqH`VQISpS*OFD`%ukC$EY~ z9%s~X=xIaeeE14dPAT&-xqm`2&vQr?a($J(OJ?w1oHxHD#K5a7MBe7Z*i?S>k78>~ zBHu*$@?*Ro>!N*GCwlbS7*94Nc(W$lnXf$V$wSwmiuAuCaym7ePjUZy(8Ef zQNefFBj7`+@8c)AbnY-$uAb%8<#Qaqc8McbE^}IO&&z*+ouueJ4f8&FcXbw&r1qY-uK6wjP zyasQ-505+wFFyj0&*q#g>brwH%$FoymGBoHgr}ClEAPOIU%`)3LE3<#kR7{!9ACtg zaQ(h_rGrVBT4I0tEFX!&w5nxnE2w^AE2rOilAi;@VZu`BloC&(u}|LbtGC!aaU@#? zjbLlCZ#-%g~o&TjU*L`8+9xXQKUhG9{Gf^OATi zBbkpA;&|JsBd4>RS?|<_J%P3y4EA83mmRxhqp;cEnH{N#ydN6NvjMTJNG{~V;xeAd z2;X}?`ESft&qoMr!&^D?lnbK>GPjz|ZSvCeh1E|+xAot5-1US{K=BkaF; zmE#v~N=KAzugPusw`<>Cw(r=)A?XjNcdq65s!zH8%O~*D2k`mp(k>5kb?Pv7ROIk$ zj1QZmo!J>`%O3x3?3W4bsB=foI&|TtgAItnO1Ey%sS|YU0`?Bz?F+ts+;nzgfA?;z zadBf+coe@E7P5EH0FEu1!=*QtOIv(yezkCR`)W=c-pKwFo7s1DH>=KUBztTXGgm&w z+@GH%dR8T&qHw0qmj!ry1qIW3G4c6@WVKY1-BTv>o;9SEln|DZid$#|9o#&))6s>_ z{(<-<#*>(lKzw|t`B}M*O$XfF9C32AH5PpxyLKT#6q1GiUWQ$;7j`iL*d+(iJuR3{ zseuGG=NO*yh~Y)Vj4m@ExdP-$En?_J%z1^eCf8&3?0O0o^fE^U%@Ze<;@S{R+SHmq zEzgtG0(?>>`RYJqVkH@pPH4Y$y5@Q^Z{?$`VJAOb+ss#|SEEic^yf_5Z=PWH^%Ly5 zbd((@cC%ssCVt+thA(&j#E1KT;GLsC@b;;ndHd|oynp5wK05UypC0*+?{|O0w%@*I z?ITNARaVIMAaBk%wdb1c9b9s5$DVLEHjVAY$M;R-#ed(&gO5GHoTUqx@bFv)KR1V= zFV11yGxHep@N`DrKc3!``_VFE5DnA%;#M4HHr+w8a0ZRZH=DEs1%}7wktEk~Lqz$L z#WiMlA<>3pr81uI5NGbbqYX|D?QnAGLqpJUxb}f@EA|(JdTU!|Z47 zr+knoI>Q|L->0AcVso>(_P-f zA=#IELhVRs%%)&)C8Yx^sU0dxS^r9ME7A#y^5Z#h9JArv;0@YL&1%UYt&5?kq5l8VyJ&$L5(CKJ|}f?H`Y z!Lk_+Q75{U5yUj5QZcTUna|APwXa`h-L4;5wf=Lymi70oS03l>H=pLs51wYlXV0_Z z^X0tu@zcEg(c`@K=~KME@@ZaK`3%pz^C+)>`4TJFe9XsdKH{x!-{wQQ{ zVsI{Lql@vW4kv4TB~DWRZJchC&Fx9vS^Wix#p$^Cx$@*w4|D9$cGms!8DFe?g>75E zXxe*E@h9$GS&fBn6U z0m=0^eDDBnT))f@vgZkm2%v4ZcDTy^>t3fW_$G!K>vp%eKx19*86Qkn)AzgM;N!#t zk3Yz3D_-G^6)*AW$~W16U?VHueU6t`JkIAouHgF(pRnSa7x-@L$Gra4Graoc6TI=w z)6$Ml^7hxy@%6fQ_-_4syz$vHrcFOxw~}2awzK2#W{#fN%de}y;pbJ~Qr%P~W3dx= zxpt&%L?d-m`jOmHgnMoXfA?rh^W4EKd}}Fo@h;qM_jlH8|55fl`v{NpF?1|^QoG?MFqKK=yYVWiRvO0=`NL<&6G(cim?kxv+|@{KnqP>$!Yg;+)yTslDsD z#wlsNGc0;~5h+E9Or1MH(zwW#E2jvLmwF5AMAe+$G6xnAJ4WVJS<{tXD`cFE*O{`8 z8Gu~Iv&@@GQ)HbJiJK<#{WOUy5{k^}_jDiX<`2TX zG=h+xsivP*%;`t%!hyzlsDj|bmQSI5x+5O-;S63riLgOw*jM<|^Wh;ll>6gT7ftbu zo{WBOHVq4h&`$P!RWth1#-|+vmyV-ToHId{abyiCqh@k5gC7`6lI)NCiz6u*C5rZ- z61++y$sS#8xXTr^cau4yaGvaQWDQhaas|o@7BtBEUiAmniUQ;H1{BYoS7juBL6wAQ zc(nn{ixxMKzfjlhN&|qa6VQZ7MF#MW8k0l(_yUUV>m~JHO8QLM6aH~ut=H9Z{ZIN8 z1(;ItL4&s%Be zeG8z}a}CpbdaY%!!Za_dEPAeaS@~%^O;^KJG)(i-a0}p609AocE3O{@t8!ZR^k~U{ zR(1_j(LAlX(Qp+#*LKpnx5}fytOC0Ra4oN(u&9iZk}@*VGO4Mkq^`D_roPRT_Y^&( zLfWFQ^z(uGi_=O{2Fo5%{X7gPB(gc3sQ#J64V64b7a6CuQA2YHl6B6nPZGY;rl*FFU4FI(EO(C&;vOd( z!&{yx{kFMpi=kmDC~W=Ep!K44YJtwTT4gIhZdsGx3Tj(`wF2N42(G;3O2eX}=PI`X z<$7Hy>6c6TDrM4^nuext_|JPanrm%i3k0{obE|9?xUNSP3qZHx=(E~aEYY&+yJ@(_ zzZERkexLxj0^tgd>$zHvD-DZ^p6BN4uL@cLbv^2}{`y2M&P()TQkCc`=~*O1#gP;f zLwrKCph8jlmmv_;lUMp}ND(ixR>Y2-0NPVcc z30HtUeQ9s=j;)sE@|@PO)JKfTtHxM;hlxbpS7$`)TI*cfAznfCIqGOt${>1vjQ#>Z zBwBgY->OXIXvj^UDT*!_(JNqJNP?`tp;w4{fT;0NmQUo1NC z{nZ3MP)*Q7wFED#GZL_@n$QO;NLo@s=HfDP7OV4d>4WntsF_zzuh|v!n^D1_am9?3 zd10*VZzjrqb!xvHX7tHomQvt0q_Lzrfk!H1dAux^XG@}ap&)`+^Fw(vH<)*F{P`fu zhxe0Q_&&>v&%?U1HpZS!Vcl8hb~i_Y?K$MBzhHOdgj*MmI(6Wpr!AL72fJwBkxSj% zgHzX5aa8Fn=UwEe(n-!caHI3TxYF%!oV9Pm8P_&k_rC*z~Xn&j{P^Tvi~|9yov#!6QT_6n!ZTrdn0$K+W9mP;OI zF1Ld3SI(bAdCV0oS0|r0Zd{YJc5~yE3A_{Aji2+Y;kT1;RLgpSvlp&%{`^fYOMC^* zubsKh#dFs=A!R&y={nan?~|8A6fBqclBQa&vvUW>WgxG16I6+C{Ggp0=)YQy#HG3@g0fx$NBX)B(6TEarK#(B<@pB!HX+6^z5gw zUEb&1IWC_%Ec@>>Tt9M3$|>6B>C4|IY)+BfeTzYCLQR!a+?1lBJcXU#NYUn+?O=Ad@pIqpi^${U*3fWhj2K> zg-=2~;nn3ZqM09DWWXv#%5v!-zwDRJAm!X~0`|%IMx}O<^ww^L4KheIZ5gO14<9xh zJqF>HzN(Zf$F8=9o-!=e;^}NhZA;Zg+vpJu-pGMr6a=MLcN z#T8F~4m!EBuDb(k-8|TroWil5jquPDTz%icX6Pz zZC9dF6Ir(WN$i3=xyQ9D_M(U@$MVPrXYk^xkBAyn_$OGdG%O0($Bz@`RYcDdCzKl{ zI&NH%C}*PJ&2Kc4D+^!FoF2IKiY0zRnX%F>T+rM6lv}~_qPa~J&gn(f;{Ie!uED7+ zh-Wse;JFQNQ#r2>$wLb$p4>pq^u9FD8ODhFCo|*U3%GyzG9G^8NgjRwc^+E1ocq3d zj>X?U&wal<$AdpT%Ol@D&QqT+_!-V{g326ED5SBQHP2(hnZxkuRR$sV`sR-L)(EanEX2?_0~} z6I)qza4l(l^6{>S#IIKpo=x!t56Qx#B_5ZiXnY4I6EGx=gem1j>qmx3b)wwX6F$6{ z;KBI@Fi)9OPuP$`1CA?r?$bLR=b9MvaUx@iY>dWK8cLb0X+4d@&W?q?c=k@B@}Z$b zj4q~ASs;HG$5oLsK|feDN;}jVtMa5V zRpd=;rKqW&H<*~7*+v0wnL3DR()MvV@x~ctywp*_=sHTKN?a*-^tcK_B%k21MMNq` z`83%SO|2nuYL%g2QNUcmW(zF;E1+$G+7_67D=_|_$$u8ty4HKQ#{JJk!5y`R)G{e= z`Cq|u14yz_!!pr9jCZca46;u1N>B=7ZOzuNPbH4FCFl2Bw)n!T4Ri@FW zsf6T|5aWz6wJ@2qvP?2-3vr3@p>vQU9er&H&50qYBn_t^S9~M=@eTJQEjNwaq8yS_ z6NrwDASfizNMLXPcecCB&}GdZ-R=V4aaz1Qz6+hcP1Ce zTvMDxdOV$NNh7>hvMA^IgjPk9*(~Ef z#+kC7Im}%!mZeLkV()M_c0L{PN!DMigd4y@G{0YeQBUYaE&hnPBL=xX4 z6{jRGnOh2os7xV4>b7!VJ%LK?_Qtck@b(J?$X+A4B!xD2wxM`%4cSAg$QfPBU2%@) zmpE*(m-nWtZRRF=s7>dQg_sRW^Z*aRfCd8UGZ4y;4aUSj>T>R zbV&9z$eu!4?#SVNT)&||7d^?=Z5w&@t(STD$z|r37oD`vOCR@+55XqL4M$n))Vka| zF_b&(J4k;`q`Qn29UoqSo_zY%hsc&&Eu6Sm;5K`hx zbaj~Y?I3AeKjJGQNUn}1M*3N7RUA%n?xa-%c-*sC3%dFs?#p-P<`26HbzS#Q_J5R0Q(1F$b{KI>E z^6PtiwDu!5s-sd-a(-CzCHs$V=jrDjk@r>JbSF|rl^7?{`oUX&b>lxWhrrP}#820c zisdB9{Hk2!YCRnN{x0SJ0F})w2rBOKM22nYyFSkc@Ct+Zr zp+bonkdJFwn2d=s20SsIj+xHnPpf74%hPbF4kn-_fx$0MZsjZQ5h3$*v*9dnUNVx1 zrVInh&v@fO?u~L_zyo7w7h#KQroZ_R)W-cT5*xF~8d!o`hCg9d3FM8aBB^gaLA8nI z`SjuCW(?%as4+l!;liF|&60Ij)-1hNt8%sYwt#ZADsL5~VJZJZDvd?BKBo>j^|^9& z(l(=#(#5?DAf6@XgncVbDveMH37qHv{ zzb(LAX;*F)%Yxhj$SsiEif;krDt`s4EihQGtvGsafyUM|mguzwmg~8ub!+;1ek(Yy zVOBmWnzog<1wvc-TV+$x`&tGCe>DxOObQ-aK(fZsxEjX-mi3+mIBU2Ca_c=kTF>7a z_FsYJdQ`FUQ?b&u;%Iye$iDS?tE>uoYWjMvVOAPep4PJ}R@qdn@>yk6Fx3K2HQ!rB z-%;yM<7%2J3eYO>s`=FPXr!vTp8EO*ie(?)v#y@nnkpKadr;g%^opu1QktZ%_AfNQ z>PQ+UbIed#vqqJhc`Hu(u%Q+DgI*|lSf25x6g(iEfc|Otwxkk1OxEy$+4%HI#Jx6_ z&_0>QQLl>5FYd)rIOnzk<~kp#b$RC)FYXjw(E`iwcI^HqSl-mHh5X_Y@(cdspLZa{0fzEv!XaSJS0EAzinvD_+}_N`#K1&(X|YPeMfz1DE+ zo^`HrD~PYxT24!}+}chGmg}_zqU*K3w`EnXz_?nHDAQ~2pFkra>R{sFYm9soW=D+`GV7ZE+SD7n1;ph^Y z9-qMP94CKzGs&VO$1jk3w}R#Ri=sc?ul4vJK>4krz_#AE%A>R_VX~eCPc0@y*5zw<#h>d;iSE!V^Et0UyT8UpXHAz+CdAE-6wD#7I6);z;@VGfWNtiA5B9bCuhT`N8Nz%1!aV@d; zR};Hf^vgw}TP>(CR^OTPW$m0>M*fUKil*mNI=w*lP5IPJ&8Kd19(5CQ=`}u!VdHWb zGdhd$Bhr~PG>w^q(wN^jl_gEdJl2rR6XkI%FN)>0+$i48isFOR2tJX0(`N~y=fwu{ zL#z+KM0>I((vuD0?raHlWqVMoMflzTTMqbl=b%p~j*FZVIo9p(T(Q3sJiBnE(?7Ur zcQ=tzXzwDe+xG5I zY%5^C`{s4_+_=g9>o+-i<>sG&wDOE!x_F*TS59)~#u3imko44w{G_CHT(qi_inZS0 z=6Sd#$tpXjq;ye@Wi!;&CpYSN4ia67Ra4OCc^Fg?+!Uef`I9 z{gl*)RK{WbNFe#2l6y)Sb6gTqYxTp&<@yL5lYA9)KPj0UKP{CfqG5+6{!w{O;~tZH z2M)qH2|Fk0?w6OAXo_)OIw@&r-JTGg<~*fb`!xLY z5j^)Or&2T778uIS#};$x$5+|A?sfiYxz)^J3F0uSs0Vf7@0LjTyqe7=KPi1jEb+V6$|XpSHkG8I&jG{Gcdv%GY#$ zKi94v6ou|Q>#rSS_qFp}lTLYN+aYNr^?-YU>(b%>gR}esN3UKnv@Gn}&C@ygQZ8wW zqlYD*>faQAXx>-X}^e(88SV4X}1 zE5GE%LyvN3&`>sHWbuug8#@C1*z4iMVW%#fa_Yzx_l|}>1rM3PlylrhCc3Wwl1WXZ zvrK}WWdiHgMZ)bl@8HT|H(!49^yRy-aDJ^UXYageTz>BrSoH;0Hm%~|rVZ@gzJp!6 z_Q=R^^f+U>FE|K z@2{u%k^WT50+TsVHgW0xxF@tK{w~2jxCZzT5E(&mbS(bik%Yv=ktB*req|x4`6<|W zInYtw(bmh6POf%z@UZ7Dr|z=ZEa1V{pXDD89l6t^8xAqPjDBz$BbQ9!$!}gaKT`}H zl54ohqem70DKVoJKo{j}Ql+shSFk)`LaXJNI8L9nb z11ySjSaTi$y|Zv>h&Nz$Nbfij8Y5+M6+%;a5M#@NctSR~-+KG7%hrukE*_i;^5v&c zCziP1L5=gjNbu^2o4ccIa((II6@g>0q$Ty|74Ci6$A~D@{TAYW?T)i z<7>&B+1vcAEO=l6DU%w=nA}M0hze{=!trWIA!$qvk%Nm#8&^y6$a1RY^~1d?5}%$4 zl!`*1Fs6*iq4}gwt2aQpTF0bHJ*gFY>bOcG`)3lH(lDv#emPRlWn@gK zCtbp_C-fj$6#BaPLmB$WRMwx{$&mSDh{{i3(xR!1o<5qVS3E;zvnX4mY7J+3;Xz}y1B{|apXXY$_#%VQ>$8GuK5 z)DW2sji;b@v2oTJTb)d1?|e~gvsm)> zL##fvo@vj|WZdJE`RT+uGNn$Q`Th<1-8WXocp1J$36zg*#xcnspPX>+4e5@5UJOyW z*_71v;Ni!Y@zWbmGsU|t9|v~hRCo~U!-AMm7(-3(R5Dtk2&(fXs&@i${jv<;9o0L7 zG#Lw?C1C_q#Nu5PPE<__MT08I5rzA{=O5&u7nZT$;RVL(H&*iN7->sXOFF5;iwp%z zcuN|I!wQHVlucOQG~6meDV!+dR1|FAEI&$QUYfCR3|lsTPfVgOw>#X1OR5)%J=2Xf zeQaGkQMK|O^|6H4#}LsYmJFFQ^rzxJl~Km=SVXT(xsE1%KpDABrFcjCkyMaKpOL-s ziSouR+?6h}zUTBWrD$vqBAPR~E5VVJQDt~m#k4vvQ;Mp-1q4dH+etYR%F{{6iDTmA z5%~Bx5E9`l#%4NRJ z!LL5i_%X=uSITQ2zQRodRG%kZ=8m?`_mCvz_pXUC^Lon2VpC`FBMR|rP9%I#j+x6E z7Y@ZW*_)KoB(9mC#EHl{9wo}jzoc9NF&?zF`zLoQ=WORT*n6}mIL4izXb(B>NJqQ7 z=;nN{0iSJMJ8@6v+wlr=#o5!IfCyj8Ym52!vyU12ng<_ykPdd8u=AFF8{|PpPdhy0 zgRqhKP7&U8_I03(k0YHu?6CK7CL}%_drwE6c=1Wul3ixkk)4F6hSABh6TazwB-STW zG^&(>(K5I7iX*XKGHFt0=|g1R9hfP7A&r#YX=Dw^m18=^GSB8ozo;EtgJ+m42hZ)5 zR4;P)>QPc^v-pSmy(IR|qkL+!=>uVnNo31B>s1^~dOubEnn-KOCT~a~aSe&MCAdnR zpX17@gS_?lzYSlzemp50T}?*+3{rEvm|7CUzf;0^&eM}e62gg2vmtzNB%w{Agq8V| zA$`BNI)$=7%vus>)EGrp zfeHN}oHV(WUPUEA=G8b6rC(97{8kzk`SJ;zvDIwwNN&@iTELTWR0q#>HZP? zU6j+jku|tx2hp-%7ReZ;#eik7FxkT*}1e_3PH>RT&}X@^;|51LkCK<*4#r;=qYRnF7`Nk4hKet4HOBwqYjd5=HhB~6xj;19VKEVnGn zlg1Yt%ks2|<)lxlFh`|fQ7hbA!SWF4=l>O0Zoux8RAX7LV0lVXvH@L_3?Fza7=9}N zt{}Pcm8%m^%i7!k?tk1@(eT!L|GRbhtpK+Iu6k`b0M#%H7`NhCAhwG2oSy5m7PX57 zcI!R8w(_(O<&_^xPshPd91WGOs_RfJz7ApC01Iu zil(PWjjzvZ+EzVVb*$%BUYd`lWtF?4rk={GIvN|Bs4SPU+0c_J(X*=RE6EkzB{(aJ z(6U4sa|MQjJaM?}`G(3qwXf2w$eKSio9N-$#E#4*Ui1*<;#UA&!^4MU;@>Zo5ShF6 zXjc)0Q$-j-O)13m%a(O9h2Z)W{HkQml|FATbAdxvh~X{o66?)90ruSOYlrI}V0mXZ zM`ANlXz1NUPC+5Ld9CfN^{Ve?0nZ95>-nt!^nV7H>$y^`sHg?GMaiPq7A=bvZgG^W zQ%`mLX^8^le-$fz6+Ktcyc8t20Pw$-$9l#pzx57QyJ~w`0J)z32Z-KEucBgs<(3mq zJ=WH%rG14tSF3V8>N6TQTk5T_vYLd{3=*T`NsW&uCN_fb%xI&xC|IrzJ|mR^WNyv> zNU&Tjz!lgwjy7+xEZ@Y5RU~cGGq-=&}Mbe2|tYEgh^CHm!MWPp0 z5w)Pwh*F=ZWw~0BE5(Y^t>ipDkp7=8Wah>f82-&tL&@SfPWH32D~wgSQm|-QwGLwz zH5jUwaJde-zm9+h>hN7!hv(87+?Lhg{7BWG;`(p}ZjV&rF5>ZUCEgF$;JrlRFKLkH zdJ^gGD;J%+a6>J?9XkIZ9Ys2UZ9A}6KXr1i>)owZ;ogoC-d2th<}UYrBZM2_=W+pPhYsg`SaKR z6n$R7as}a)VM1{~rDVQ%;SaF<^cjrzPNh&eA{i<0d~>awf5}b77!~VQ5dX><4&4yB ze$D{)nzmy6YDlg?`LXNA*)4xNMD}pnP@m}gDR6!6;0{Ui6gRF(epjx+D#>i~O*nj+ zGe;%=(-L;(CYR3N;OvxeaD;PbugddqQOa}ayyPL}RDfJ9;*VdFHn=2pd*cebu3hKq1q&>X{~rXFpFAXS z_poEyP`(kxgQu3j+s|^fD1!^3vGD#%_~L!3v@LK@8gGYG{LurjZH*i^z}9c2;(vhO zS3zYDw)%v?hwn)Ib*90&B=Pobl>0kj|4q&-2z~Jjw%%XC$H`LGCtsFyjsMKu5W!YYA3paE;k~dZK1>SX(-eQciIa&TB81-~GFTIx!n+an z{FrRZPOm%I6X^lZz94fWHqm+H+FYxYbY@9KIS0tS`q9on45I&HJXGM=Z zP#*7VmqnqHdQ)(H+wYv2G>{*ny?Niqm+!Jl`K-P#=bm~2ew26rbcKwHv8aF$=tuS6HjmnQAZ?Aga7`NdK{2c_+fa^kuS z)~lzb)18xNPMEf2|7Om<@FbtN)Ji)`UGM%5e)|x9SiyybQ#jbS7wfY#_%2u`O=m~8 zxVduL*N3Z~9^7z}NzJ~Sh)iUT?ZH(iG@0ZaZsWS`Kfy!pxpn87OE)gL+H%g@l@pTA z!RRQqCMR-r%qVzt8GQALwDlTp>{!du9jn;4XFWTQY?DdqAe)aJVuMUnYxeGB_4e(o z*|L@Ozi;994O`f`c{}@e?&Z+F{hT~~g5URTVf3O&%zyO}=B-#p#f&;?=JX)4A%<{K zzU*V2=@MvzYm_(f`6&cMhY}hcPE<@Z;o;$Ud3oXP>PBREglsltGh8K#P+>NM zXhRowC+>B!r=5!fx7l^3pm#mP7fz#7kPGUVaP&hn7`9|0Q=Xd3glFd%C!4{8vWXm_ z7Ul&;T7mOIBL*lRTSB}jT?&@Rjx8{vO0hb%s(yH=0Z~1gp{M>9+XDAx+vP0h2lFnpXBMi2p(Qy;zW!nBg#+} z6cas6HuV#~(Y=-*e((l0u zjD2zrxqZtB%a0*6HG`ACs7wpJ7k*=+p*mPb#mB6UI2pJ2Jt zuc&BSEA5Gj0?ulEs8lQpTw4J5t-$&J25$dF{!d`}t>>29n!aUOZh_@mCbcLxGPR6| z8I`RvP1-_4oqZ}`u9Pe>6N)L8z8XKcfP#gic=XN3*!R?Qek_jSW0@Q0hI=w-@&G2i z_c-^hc!aUbCgM|*#BB-Abk6a^r8)+i$|xLb;&3jFVDuAH`S*K|P~4ctN1s2()-9hg zb8;U>53OR-*j_yL_#A%tA}#@L_(uld8{~th zp9cZbzXOB)aQAEl%mYFL35$s!A})r`wxYnUyB}Ze{}%5& zKkBD9vFYY6!fKOPvH5d)FB(NeeHM19L6nW|gMFCPV~jt(`61ZE+hY^zV3ei#4=v%f z=bmJGZ6430%Um2B%k& zT#G`9@10BbfKmeUA}HxsPC{{lu>c-BW0V1YyC*pl*(ZgpG3DmhE()l{4b3yuQOe_- zJVu^vOdxG&A?{f|ln*Rno2>7jefb(o9-BoQ`+s4V=1ojv1~EV9#~Al#9ri&X{5cME!8bGY}&exuHD-bnJD!cXh(cg z4nch~jBfhdxhD)e3-Z5VI#`zE` zdlUx+&An|1O%9`rC@o0^$&8sXhWEetkoe3*9K9ueguemH9YeiDJh2USGt$A!miF#8 z_{E3f9UX|HpDT8rj^tJp@XlxNQ`TIKPh0?PY;Ge@f9@}HcE)g7o5skxG(z5ER4%bY zGe{VoOYVen!_gk6Z83xHlz+N zA-p-w)Jx{*5-R63Qa!5|eP!-WYRRE&Y6JNbtMI4_C0Z23&HF`ZkiPKT{R>Hq3ZaeN z?Z#@~PuAJMVn4h-k2<%<&#W@@x`O4&GQV1M9txOSV7ZaW zg~q|B1(qwfxq{^ZeG&~=o;kkSaF&mHb{3tI-ToJ_TzzF28Wx#9QU+ESu-qXhn9I&$oQI=O^lC4dBk8uJoMQAD1*=dd(a_ zXlX3vqv|P=Iomfkl;p;23Wrq698yBE%q1xb+KEKVc#rL$Lz>i!0_AF1UUFZP0n3$s zrEpOX!&hFosE(q=^>VB+6fC*(Dhz0@$AWp)lq~2$*`i()&aNX})~xV>DHP19BW75p zjKdsK#}|<}Hs9PYS+x2wTpfJI_D?bnK7)J487GPA;4^nX1)r?_#?Y`R@34a9%2}S7nr0k)DnOWE_{J0e z1jH2#zZEpsaLdB{);PC<<`y`9D?qNmuO$k`THy-9s#tNYdlrbTqUY9g3S?RoAX;7v zFxEI4rs>?8mnBwu77(h>spz$aYnYyETm=#p^tJL<(R&u)ZCP(yV6g&?Dpr^!nvSNS zqUTn)1yWo2Sfc4$Af`TJfznzwy{|{>T;pjvnx~4MTj^;Yn!Z(DtBhK1jc4U&rDxTN z6>gQ+DyNE`YkFE2TK^iydT)J3(^eqX^TYV=)dvdqG9e4TI8n9exSUR~n5Rn{D zP0t>NYh8KEwGU{W=(|{8xgIUcZngMUAX>vUOhwPFYqcI%OLB{++@f4jDi)<&xfM*e z!~)Y*niV|n-TbFzxdoOh2(Ecppt*|Xry#dlzTZmIqH(SGdS8Dfplzi`t6i=3v-+H- zrQo?*h$}#@;J0OEZh_|(HH!k~)wNaftojH@m;Rvq`Z;7uzfjKdxMW!uV`Pt&kU&Ia z2r+pHRL>bi=DgkpERUF1OU#^VL;ay(xq{~ZQ^4~0B@G5Fw`f?RL>KP+%v82;%KY;8 z{|_uzNz^n&j0N`Mnm>W^$oc9}vx49mvags|^`}!#Ekph@q8EOCA2T<-$k?AABkOTl z*JhQIw6uxLNBfy$;*v%Z9%v*|-XlVuQLsEz-XUm79f1$1)DrNZ$dW389;hVre%a&S zC;H#w3gQ=+k+ewm1Pf*T`4a>$C4ZXeQ?e(hn3zxXxEvZrXVGUwCIg10GjvEQBV}JQ zwqFtx`X(^BC7zj0F)XYN<)KQ^>C1w7yd;ok3j=v2*PnN@{8*Xl%eV2KtcrH$_b_*M z2D)&-&xs>mj-2#x;I!y9CuLloaHvHzFf?d0+=S_Uz{1wtZYXc7YT7 z|L?(a#YoSq75M3!aP$(&^l<9RNseCEII>Sv3K0puskSc1TSci&)Iq0Oi66dxj$>RE zxyH%s*Ewx0za`CcSGaIi;>pqAuoth0v>MH-v8-BuUpsf&;DJ|8p5?~zi(K1%hRX*J zN@`mrwS8Q^Ag^))E+{a5`5cFCp5*Y2|rO{+08C4aQNzV zuAP+x&Yb4P&C8s>eujM~cXLjij_#NDkaU%z`n*Dv7o^?Xd8$%G{@N*NAInYX|PukurDJX@N^NI8zerPG|*y;>S~J?vZu2c;aRqzp$7 z!l6B;k~w@x;%M}0$0sg^uYNOMNjP>uI@oT`9+W|*976g94C%fz!= z6ybgD9XaT5H)mv`y5VQb4R4tQJw=>4aiPO)GC8(u{Q{_yp`%QOGQr{8f$L89a>k`I z8yvc@%3CI~s311xr?P8EBj+BLzVM~g-;N)p4u9hOwjVgW<$Dfn|AixaHgIh377ofp zw0F}w4s2S@p)IS8m*NBaHgVw4cJ>|I!Jhrw*tK^Xd-iT;|AAc`KXp(B?J3spUdPmj zrc*VthoM?g>+yiJNIatg@QDl}Fe;qvd{M@t;z^82A~Yb3%;a>cOUq?5SwebR3XxHv zM8<>?pAtt=MFr_O1=zcI(6O5x-Rzy|(AAcEyV-JkhmI7~RM0YZsBw5^8{y8v*B++d zq7l6H`^PL__m0^-hRFt0t(T*R7ZNpG6etC*6(Ao|EK+DBc|s`}Q>#QO$($w|pScaj zp;h6cKBUf+jm!8FnwL)^cAO}clQd2(S<~ytpV45f%f0KPS^C5COnc{k!uq6Arj#MF zxlNfY8{J7+B#x7fwJ3I3Q)|ha)lB}}z7&g8&gezU#9Af|DdFMzbl%SlW3{yXK36+V z+qUPbwEZ5Jdw9XSBLjWAk{IkkKuiRI38_ZB!^3e4^)v6@G1P&(JiBqbZD+c4cfixh z3sJS0~{r;oWzXWuL$MpckEuRqC?Tdm52`sNZPwIDoz#nA4~?U4Mjr+&9nFk4?x$hlAd03mP$%h>PL=q5MKK&w%#Wwm%c8KK_2;*+ z`t(M=+V?Zx9a+N%JHF=SweR!nuW!?D={Qzw{hCL=eA&=ADCI+&uD4+ussYjuslloj9QmlG%QN7q88-gQ_BgLa#>(` z{HYI=(0U znhTgdb1<*1c!F^=N8l9fOn6Q#|LAtN`Ka^Z4=YJ2OgG?!vzIeY?v93bB`PX{;NU=< zU0v|>_QKQG2k$_C0wTlc>SRxM2OGko!;Pa~XAc*`C0viOGSB-2%G?sy??1_^W9#TMXCT$%>-qV_DkeNRnP%y~UmW~_ z+~JkHzTp%4Eg5HkF}H#k8mEmWG9?2$FE4^iV{piF!Y-~O4xt?wI$|K7y!R2kDjTTr z3*@;FAASySG#k-xWL);|n{50CM96#Pj^pR8U$SfeYCib-b^h*tw*m9Q8$~g1l4lwd2v-yYAV*^>kN)4FV z#_x727WU6BdCeS{}iJZCu9)JE(epvMl9x~tSF9VVXiBdJZ z1piS*c#SN;b66gJLt5)hImZ*E{^CaD5^edb1(dx zXP;e$gG)!cd3K;o>NH2{J4rvP4#+aRv1+*=^SKF#{gTpg*usQ71tOqypsaB*RwOeDM56VwLLH` zlsg^U5}XlERDK+Jb^5ESbew(M362TJFFFL*P;UZLqv-1Eh<&IB_qcZ9$#-8QIzNT> zF5U2vIQBlSxcGY#ot8jx&uT)`;tW+wn@)ctsVSHAp=D%_tH8Z3oQR>B#z|t_xI$^W z48!-FG*;#<=_C4Usfw9BN$8VC;m}fob3^bD#ZD<%Wq5zqbkYYG8CsTz{u%Utej@kgyBaIs-s5`k-aF4zpO=om%+*Te;@>|T zzcB^aRru3;co~apb9hho2XD&QZyK14@33&n!BMOQqFSy$gLkA1EtTJd3L;7D_8spma8aOo;X?7uBpYu zil|k&kttFy(_8N=SRN$f)4t4~H0dXH`TmS}dIlYnT>m$)TqzGSht-lcxC-aoaBMRC z8S~tHIwZJLG*OiLLB+IBbftFTU^=FGFy^KCv~l?d%@2*?Uy)tOmwC6>(qZ_?__8nd zW$Fj_aaW2BzB1;NA|-ijk+Ccf?VZBA2fh|%>XiAgy!Pr|8s`n6L%2OF)_*MFqHx|k z$n#&lVtys#mf~ZM?xL_~^(`W2U?~Z`vPh6I>y{VH!=FEI_D>}XdKt@d1;*8)TxnGl zELUstl&OV=g2l2dS8MW&nZ=|{FO+yiWX~)kZ)PQVGpZ??RV(YS?0u$H^5lkBnfCrd z?*IM?20u5>0O$F#)@I4tmM|il()m3pkY`e)PpW15pM2$i0n1esELZDti?7_GVNnZQ z{rIC`c}%}V1C|Fh#1hq%{wG-e@tUuRO^-*7G88P&OineH<(cW~pf8`eq{ROP__o9V zxIjn00?kz{kX+9dC{x-N1>gTevi}qdELKqfQpLJffL4Jz4YNRQy|&J+c$$s{cxzk> zMAmZ)^tIxu=sioU=QR9QaM%KYt!o8>_1r3hrmN3cX=oe`R{&LkVGEE}(Q^wZw}43N zzE!4M!!$3e+?MFIrf=QXJhdM5S-oe8#!=BYx0XjmudR2n#LD;9@@cr0zs6Uw%Aof& zty=+jeNI7C1ypZM*W$X?a|K#^H8-_dIM<0DQCUmR9*tC#l+vTBhT@_EiBm;+uPTcA zRuNt$dQd|e9mY0Z5X4Qk%fr8Hl0RIDoRsh=qu`R${fpitiqFZ^#D@;8|xZW30 zkX*x+)7uLBlXgYUHLgCRyycpP=Aree`B-`AQSVu0vchi#$~9cuN!!b`g-9y^-pXyS z@$|m7n{}@5s`nLq*EB4e6%~uCTmfxl*zySe{cNd-tSNV_BXY z8;gH{w*kv5X7(pX_B#=C>Ik1(^FJ0WPk5lG;Vd@}GG|M1?Z%hWYji0C zh8HtzP!VJM7c#MLA=CQgGP^O21wGKK+)M)5>x1kV?R@p^t3Z)XMYNtz#D zCHwMYf;Yd$co-*`>m!}{J;K@CrckJZwkz<@Zb)G%D z4{-G0|2I$OvazImJ(3y1}^%V0xPI<9>L^spukq9&>BWmjIe+Q6 zu{c*O+IT8Gb(+Ixj( z%B5Bdd$mTtdg>C_&R^r$MXB&JQozms)4+0RgzNjH60}~=9)YVO>wn;vK8?I18$NdJ zfM0*&i)WtX=8=Q)lG0laZ)aX^5}zc-^IdodpT~sqZLmA10^B(5>CQ%<2tMLxyDmaeo^WTwlrPFL( z!)rBZtaf(cihmgA)6-$zO!(*nctZy7`!aA>ZiG+1k#}D!ol^(OQLY`3d{6D<#&4g& z_bXu4C-Aw%|6rx$A6Yj=lCi0#4lZz9SY^)Kl14>{i5`jZ*g?%-j^O%Hp{x!ZHZ&6eHn zcI@(XVt1$)n-jx1K70@tmn?#J-;jyxYuNY$mp6UOvF$&wckj>aKD>?{$2PG2$R@Vz z-@umba=rC84)5H~*?qe?w|xVrrH+qm`IWs}SFwBhTABNP6WPelJ->74@NTy6+Q2XC zzT=hmmeX%+Z^ClIv5RuXKPQZUj3`_p18@xSqq~nAiMiQKnLCHvydomPqDf6iF+YFJ z7bPV*hlH_T6dMp)3EqryVhAsmxlo zn19-~GZZXsgKfDjq^og~WnUDCPm^p!hvX73i(%}@Vq!)X7@#~w7RY3EB00X)0Oe_u zE6AQvOO_~f8KS6V>S8)y9aB{ss1j=SaB%n>E1Lac`!fD zowp<1`CZ1^NiSz^I@@ts+IOdSCsqV>V35zfguC5~ZJ-CPqSOT@=i(ccL~v{jc0Ts} z!~QnfIQ)a#q`$Otv7@V#H%<<|xZ5~!*KPlzgQV3t&WFx<;XJnG3tW0;;@psdLrpT> zsuFPOlSB9B47xRE;XI%S$EF;-<>=BP*DdL|^_R_wf~NEO@$}9w`0(roCcXPGPp)~7 zg`YmlCx=(_^~sHVc4!Un?fjnp%O;V~Cyz0YPG$A+^}P7)t4w`zCXasb1WVt0j3w_p z!lNsn;ju5DXW=``C>kdl^bzH3yuOQfwyb2{>q~fT&AYtt(_3Z%WktV-o}ua5X#DU*uz+sN0%p(IjD@>vC^*NYRH<| zi;US#Bu%d)aYmhSDykAA{UJ{Jg7T*uj_^s9hPPZnY8B)3bBf%T^Jr1hW2VWy>C*NJ zi2orL7=Ek#pTKgmj_%F`h6m&6?@gP3{mm#L8Yd(y*l?LEIH6YPE^f~F`uot$zB{h&E_es{ zkdT^4SG#W9+qpe9c3nwLiRZ-^pCUCQk@mLt5}g@il$D}hWjF>q(@8dwNpk)CYftg% zSMM6D;P{MiX5Kf2WiLL&e%Xc$UOa}yFFwG_U%hUukrR4kF!KI!^qAO-`f0tH{OoKp z`xP+rg+-K4Y9eKDCC+(K)QlfOU{pLl5fOOGT-Yha9?t?7A`1M7Pl{yfv{^I`9YaJ& zFf(!@c{j$DtKnX(alV(?g~9X~nnUv7OhYY_t{-&9SKv1=8>iY>V|nV7A3%KnY~uQ6 zl0C4DPQi}k^(x0FPSP)o#3$W@{Bh-?K&KPf7)yAIg4~i`{|sZfrXLZL$5)Dy9z*(= zGF_Hj&35oCX=|5cy4#P6WeGND3ZO4MXB#fOi`+=p67Y#-Ioj)Z6`{9RNn$ZhnEs0@8LVP z43FUjcn-?Oe^4%AQdV_>rXY8O0uN(~h?*#E(<6@L5fx+%ETv*lEu*Fnh%cKRn<3`pBt1jEJFGGES<<8diu)qARH~#|)b|fWSyE z{G?n;GZZLmuYIT|b`oYE5+6NYPoKf&42I7WKn9`8?Qe|y|w zeQ}KNASg4E)T(UC8mmakO~)lr#)s_1?se{pz07Uyu>r=a+#@cKQ41y$ni+>fh>V>e zFT5gyxW}%utPjDQm9hQOM{m+r_6uFZTnzn|XL%HfqhwwgmQC=06v`jyOXbr3e^8JW zlQOxAv`IDO&1^81jM>uO0i_}2$a-KKYEMo>9&dc{7X79Urn@MFclvdrVa`CJ`(~K< zDWeOiSky##zZCK()=@sAkMZlF>+9Va4%`{liP7_iQC*iy@7fX>!!Ed{1Hj9L&WJ-pXkv+7Srdj>53+P5nMhM|4 z0nC4R218~3@fJnUt1!s;ZSe1%MC#N^Qltziv!pDdyeG6h!VELkvIAjEnJ))NMA(e(R zxNEXEW1gF9fUEp*J@77%p>wJy%@2&CdyXG14~?ZwkgWGlPUX&6TMDMuGyaXa1j_gd z8<0lCpmf}OgwycI5Xu%cn-5lPY}y!VrF2pDQwJB(d(m*iA73)6o^G-a8~e}{UiDqo1OAS!2b5e`~V-qH6IITR$y1twyrIZ*aEpV z?yb*R_bmWb#R8o5o|U#QER^9164ZF3R3S3(Nr}geu ze)_D2|FujSu40wJ0#7Z_R7KA%Kve-#z1B1|4?SAoxt2-eS>U_gQ?bDEQn}ZE@GyGy z=|`VFeW@<1qDM`wu`F+F>Ote6CbD`K;UnYGry>@oiU>R!;_&O6Lih4Ooa$uX&=7-P zQyd}9$%OVwAh<_7fpxJ2sR4`VHUSdmR1sqM%0262jb9Ddk`TPhqVOz<#3?5Pn~Xr( z$9r&3q%-$My3s-OjJpFI_?zr~Zg=U7TXc}DE4FlYwkISu%7EpCMI}^K*P8m!_tQF1 zuvzOvMZs{j_*Rfwfo03u+XAi?*zVoZ#{lCNH@Rg+ZdsNq7;XXOmgTt~Ezn$_)B4r) zEU>&4z?OQHczyb|nEP5T1rTp?vHMN?jTCVq^ytbCI z8hNh1o|396a*B$~v94FIR)D{*nu^L2$}5Vgu8}&Zmij0uqFCCnyj<#~tc22183Xw; zR(NiaTuiWUtZdS)$Ab7~CG96wuh z&DpIKVG8QTizuM1&M8&?1eir`1-umuSLzW<6xdehnF_YwN=x!r;N3jC@P8F`h-ryl zYg*Cww*uozmlAhht&!M2B<{f;gwHD{a<=G6Geu{THFVI6)7Zi>GN(#e<~0(&xEGO& zn~1)zmk|ZHt@6aG^UeiT#4o58sce;n`LQ5 zL>)mZbyxP(3JOI3$)8kC!GtpEX7`}if+nhEP479OM0Ah>T4a3~FuH(YvNnt!n#UyB z+s*Em%fg=NEUii5iLzvt7bfspPCP3_M|dwanvasg`CRrBUncqRWxN;P#<=rilsl`! zUD+UesqG=o?Dco#u&+HQJ?uE=X2V72?p$;1$~F7W+>|{SqMH~Ioy72WJ9Ooy+`r+{ zg=?;zxGHkVwLKSH@8!H(Th6+x+`~DKb|Mn)-Ho$e-8tjkofC3?#Jekpe7my8uPeL! zyRtpFJDWqhvmv58Ya_a`DzY0tM|I`L=&t+_ZOiwuPJ9>V!Z&ele3jtI=gB^NnC8n{ zS^m73A0qD^#v}Fd%qk1z;URgN9WK zCN6LMjcYr$ac27#j&I$}(Oo+@c5olZjvnODp#$vSw~He?x5_iSIB?%1yc3_x#*%tO zVT7Mn!v0@5c5Ds%E^cMl=^gAmx|>5s&g$dk-CzbdGT3h@2lg%z*>@;Pg3T z;QK^Drlh+?$|)Mbg)5xBe3CO)S^;GRdrw|DXQ+@5Uc>N`D~NsV{7EifJYr}?P)zmo z1x{SJ%o(K}QCgCdQly*LL>F$g7Qb@t5~t6el4z$4ws-aXMQ)tFB+n_JdPR;`<@$;N z%+=wig62xAqR*+ptXi7yQeQk=G646b)0a7V?HI?dpG9$N1C%RBubk)?l#~1@H_nNi zJ;{ZOXN*<(Whv%$DVM<%MXsFs<68YSo;t@Fea9Q;I3b$R_VfFZ=yK}@CvKb-P3a6L zt{s=UIA%T~==)zkd4h||aB=oH$1k1Ygk*5?Tx;0XFdrTaSbp{xSC5`B zmger;+S}9{L$-AqAPtM4@EADw*3b|z?&tyqIl63zwVEg}t{I|gJ z>k@wB)J-m(y3XaBQn?r9rGHz;*EN;AUo4$%!*^_+KY{0~a^a)*%s{xgZ?ojFhjU+j zD+5G2`gfnfr>{eOE<0j^;H4EZST;&JU&6Zg<@`e_k93Jk(r_ntArEq1CjIqc!CcF) zfsvzN=pd-8XH#GpXKPy|Uy1kICV8hFQu87^CC>wUTCLo7?v#P30J{u~t-E2z0cm|{ zqLUJ~{cD)qn=Q$)+*t6M#FdsiAuYK5M_6$mTm9N`)YFR-K4ENd@nBm>C|d#o*y-oR z9uHf7kBWn5SHWhfiz7d?c6bUKV_aG7&`BnnAl62Pv&uhI;s6SD9Fy)cIy7aK1|>+dE~lZHw_V>|g^n zHk|8b!%=%@cDQ-+TTn2olatucqlRO1rocNdN&EcB&2_(WNhY<6(s|Fx1b1rZCXVd- zoqZy^c5Q665I-QYe+RqwZD-Hk9qie?UG8sZzsRB8TRA9`(%xO0*|}?z$QE|&-oh@K z1o!UT#%@V-<;U-_VZ*Ov7pCGI=pf3!GoCUTJ7xM9XKl)zmodDO${BsBpEHEtuOHyE z?LX6FRBu8PLrF@FAuTzElvq(>q;0E9@@TB9prN*kl+;Y_?QBb%zunFqZ9CDviyiH{ z+R)k2iSAzRxJ$bYn>&>*VP3Qib)iGNH{G&Auq%$lxjK%B5yeD^5*0Z@6seH~#Hm+# zQT~(1in2AX#3)q-vl|TmU)`fa4QFY@xO^%fA7XxXoj4(jjHv~L4NE6?VJ}g%dl5gg z4}oK4<1lj|@uHL_%X9uB?JvF(+D|L{_RN0!s6Jd*IyRYZ=h zA$R^De&8TUqiRJtujP&3K4G%eVCR7ny={h6;{VaBWXlQ*u8j}HFC7pK?r!Tuk3desVkySa}~ z_x;4T2UpWHV;~I^dNX0^6n;Ckg%3A;PSw~(l6vJZkXfDulYmB9$ih&q#mX%s+J5TYNWLP#2VrzR+BxunT(kYroSXA5H_pHI2={b zJVg7=)M^5TXA?K0R@y#aHip$it2MV$o){@1QWSYhq9-dz{(rVS4>JgG00BkHLb zQb$Hr4w13}jgT>}KShlS3nei@6hl7+!9(%#_r^EK&sdU&$Al3U5sZ(YC*5qi5*Zy~ zfO1c7529is&9wsKq0;yD8Cy~EoZOx93kfikPDzf@7oH?8Bf;<@x4HXo zgeOPh8R~6lSvuNxpsPzK3M#Vs$K7)OpKWmVwjrx1m9%o1&(i#GNcP4(+>6fcHY7Ke zkkqr7$jmrWO42EjF%Tw-ZeCNiD83nn;v&2$6UV%8Dkl%XBQ^xj_+T8;LkwrAizu&3 z4OG#yihiR9Q9ElG>G%mIX5}!<#iBp6vDWFw|gAq=;xQp+1&s4c znM*?lWg1I31>QpkWSRSFsUADHkd&dN6w5r>G2D)n=3Js{Qz#uH%JuZV{L8#Jwc;Oa2uG3|A<0DMi(1e7Q5<50;QbZEuyTBFDG?My_7SLxFJO*Uz=nPY-44P zO!Q{>{EZUdm(>s%-Va3D^FEUo@fh}pRzf_X?SF3mZFw!o_7S}j$ zdXMQxVqOYSsj=93I1rmA^Qos3?cBTL6zfNNLkaO!*>v)ABs@P6zqAN^Q^N_$h{iiH z1h0f({8Ga4iVMOaM5$Ih@s@tmGIlU|^`+Pbx*1Ul7Ip6F8tsp5usdD-opF%0&pkHK zh)aa80nMGmeejA3;M4C`8Y}$JtVp^j&^=7%nf_S>_f5vDF-jELO7n}S_|ei9vQ8=J zs2`7$Cd%43Q502~^AwQH9#d*K#nlH!cwUTo-=d!7boRE#F3gP{llxIIxrz9JIh4+C zGR_+_X4Q~Cr;#jm)+~y1uO-9qEDGUYZg-PYok2xi0g1^G*ty9VFN!ygm;)M9WZe!k zocgtO@w}B2%ZjuhhF1quFffYb@tFoZEf`-($(Sk%Wqlg|)Ko*A6PO#qoM-0p+3HUj zHlztx9~7?4cb^lI`J^dx3N5eYIsrcA3aq94R#M5&G)UueRUXI2?W znpsZrtO{A{l%FTOR)T5e!~1 ziU!%+r~}}g9HI9^LuA}!P`$V(nNtcVf3PR{_t%pDKppu@dXPC=+C%Df@DtqzI=vl9Af5&OItrgjV|T03+vgy0lq%5 zhAr22Gw#VLWXKwU|3!PDo1p^BGM`!EftYMdPSgX{+e90>28- zTIuM01(q%FT*EYfy>G=)(Q^&AfMZQhk9tp!8m?g$_-ldndf$34jbn*kD{yQ9s+M)N z#?>-u96i^xG+af?VAX}*x4>rW89iz|O;^vYcd*jXa6M|?D*CKdUX8E!6);usRL`|c z3aVOVQ_(yX4A-z*#VU)Hhn{P=#(QQxnD{N^&k%99A`k&Z`IEZt=;ajcETwkiUrx)?m`k{#UQTmuPkL81(x<0?v zzDQL`1$h}Vo^oVdWfYQ{l0$qac|(i|UEEuYpLJ zmt!AnBu0)Fx43eH$1SKOW?nThb7hTN)Podx*2w%iQs+wkDhk@q6_GhU{()-ZmQ)e* zKo!wTDv1(_ykB$tYbS_@=k&BE&)rL2zgL+<|Vxd zUMxD+1C2z>`Vk>zid@_ZzNvIm)0OzQj+QsxwqHlu*7X;Rly z3aOk_K)vW-O(XIcHLi?tqO(mNkjvEGSirpF~*IJfp+ZhS8Hzvj`%oo!cd^t8LsaWZrwQU)s>@OojBszkt6P% zIOf)g6YiZk<=%y}?p-;=D#^ybSre?CnO;{EI} z-YAMRJm-&8Mzgp+j@iwLOzoe__`zw68lK6pk(mq`mCaz;D-4!>-B8)94<1*{z_BIf z!$B{R`q2ec4bP=Y^xGceDrlNiLyr+<^cFq;6nhyrtsjpqoe39?aB9zHPVL?zvW=6w zwsUs>K8|kR&aqv4IJ##q$M){y$btPFK6HS?hYxb-$bOC--j6za-1)_~EFU|CAD2E3 z->-r#ieaAM$nR@7c4#LDkL(uN%fZ9@L=K1?V!x3i9N2$^qlZs$?BG$(95@8~4jAk5 z>A6`LHj1N%C9NY|J9m)tmkx6B%3%&&KgMp^1?{_WmJ^qhF6A1Rm2&0GMJ}IJ>+thj zKXsXFr<6|R8kf#o_kX^Or>~8qs%c6}flr;-8{v>-(!S&Z{E&P8Up^)^iOr_e>qNKBHwlbK#=Y$7O{) zjX%%hm#&Fik@IVuym*Dfr_U*l&Z&daHdhtEKi_KPymcq@lGEVi$^Q-1{(mL^J+NFE z*`@sY@~4$t{*-jC-#74mSs@?f#lhZR;lt;7O_Uwx&4JCzUA{~5l00@vC)^_O_wImo zUqW3rYs08@Kyp|lzJ4qsmi99W7JXcW8 zwiU0yu}z#FTEsWuQr=g-lQPIyl&ZOObPs&{C~M<7aUnwnQNM9q9WtCVV}^2KRDT%P zmm9I}taEVY=CZX?W@+66pK)k(6ni|ofh?vBo4}!=P(AQzooWfFBVmg3jlI-0MImu>ImTE})Eo0seMow@4VStet3($JmbZuT7T zaAl{zFB>94xhR{GYcprSOUtDWq@8|SV}1g0?)TLk-n52&JGZiX_fGcg+4aAOhV9z5 zgS~rq|0%cLvqZu3-FvpPQzpsnd$zGn`o<2KEO+a(J9lvM;C?=N|7|{a_f2Ax!*L3* z$2QD?l;&)*M_1D4vC-5&Jj^J~d9!;`wx~Z}U)aEFn?I#__8?rN+)2!dkWG1y{iGqo!q@~^$noAs~c@?y7AA>9dHT{V8HB2bPo5TW3&&Q zQv&Fa5k#llFl@@B4M(+F6-JFNBz8=(u_{-K^3?IAq)pJD3D=V%xZEL zHR3%unbL>*k}*0Cf+~Ab0jiN)}BZd~hxIW(3mriD`^` zX*L0MkrasHT{WwY!B0(*=W~f0TuR>9dWw}FG&hvFqO48x>B8?h(fnrLj#D=Ga?!pc zdu;AuZ3z+Wbq5j`24qTIdbz9 zn@;ZJr-K`4nLCQ25%s*YVI`v;oWKj8zR1HbJjlEUrt!n-&w1j7hsY>T;el6{a^IT| z8;TXuD9Syu2`!2txHQ(# z3lxv6W7&sK8%w%g6Z%j#sETm8H|Rd;gH!sD+P{$SUg@GxL=xPbF700{8?c@RG*?k; z>XZpJqIg%Ed#Mv^2^y43fKph@Y9L{HEg6e?leVy#xLGyElH1Ush(t~;HS!-;=4we^ z@+S!XUrEG-LIaFj*Oo=O0n?{x`jv!DttNb$=2vSZYO0)1sxqSd>ndt78!gvSldFwH zPpL7M=w8E8NuAS!{22q8I({JU=g07Qusxq-2eT+Yj8T*NQZcy?HREci99Kowm`Y+t zh_Wm18!~UO7O3WW6;uZ1{hiX?dv?Xa=H09Qa-GP z6xpz5_bZ`fa209QIfNvH80wX@)I<_uq6zf%!9mss4;kcm??2=Hp?GAyHvO%UaUGwhNsdx^r*$PR4R@^1Nx3 z_pIXXuI&gG9qxvjm9ZETF#>g&rTqrBEta6cgA!grqY*|Vn1F=4loXUb_KfgQ=Avm^E{~P z8BEsjG-K83*DnhXSc)Y@CE z*20w1LY-a?&NaW(3GSas=)i2lwHiJk+r&|8?8LzZ#u;gxtOK_NcEY0|l&&crroSW( zEaa{zTLU<2A4(ilMEevsl7^MiF2&W1&G@0kM7QLUJEE4fmQuQeyAoQGL{z!VNh$v1 zkEk=e&+*a^!-p5+**62{mQ=h4W#QU8neG)~MgpXqo-Jua%J_~ST~1){bRt@$oQ>&p zO?1PjAdIBu9OLA$bW|NBqw5H%h!a)sAgKe2jOB3D(0rLE(+yCrWs8=1Dt%ZLxufcF zNe{+5OX{aAlZ28?JVO15N{%zXk_d_pGobaPhvrf~s3#poA?p_4LPA*Co!c-^cdcUydEWVbhDwWzY}%idedv} z5VB={P!KnMVzIHt&YUaC_+&{_=9ZdSEqG=Ia=YVQBo-x+S(=V(pflMuS^VARU(`-$ zBDgLA_v&y`r&P-}uAHX|BY0WH(#*0Tnx+3{P0A*DMyUbIi$+zDBzKDsjmpxGfbE3X`;Z-P=50=%9gbJNy8F1q`=UysAYNESO-IW;+h*w7g5Ih z-#-SIoIsNL=94wF9H%UQb3Ng?x!e_DL(}5n_{bimTdF55OUIy`=jtf*&PW@ENqVG8-=*;6%`Uk$Aj)v$I>9~$TOW95#o`C#pb(%;JI zEo-1-uq&Uf`G(V6X7APGOnhV>Wuuz$D~u&?cs=2@8Ke)WAZtK5(RCSQwv^zP9nQ2T z=J3wikIb*UCcQkD${9VWU(ig;BLig5R4VP0NBZ0nik9^xd_txH%N4Yq`_4lg<2=hh zepT|k$gKC5;oFp8xa=Edw~!}eef{YTJo&|PzB{>=(J#&+LqAxLC}q^E3ust0)HpAG zfBi}ZE*wdY^npCtM`_v$lt$jJE*i)ssS)@v0DxV8Xf1$6aV z<61znURyx71rS@$>pcad^<3lYwF0gdV61ZMGkUII_^p7tKBGqqIM#CuT(-(%i4~^h zv&yXD3Jhzwg2Ni7X=|9Kb!)k;_tJQJU&Xpsuvmd+6}`5~VwFdq)%Y4upV9l)a|$pk z(5}}SPmh|8g4BAh@m2JBD_oz`YfZ<>+lp(&(W8Rg7Km?!TcX#uhG{%YtT3z08c)k< zf$$0_t61?Z$`6gNb*A~M!^(=D4YUj!PI+|=g@wh`%28=p)InrbQ!T|UHAGaV5!#Sp z{QWq}TIyc`%0~<34Zp<{{9w4V z0^e2iTI)~2cPqXgH6Kk|oqzTnIKZT-qIs$4xkcepRaHfEZ4a8O>kVk$)T0;mb&Ybb zj$#pYv|dyzI++}c<(OY7^GaD2#TC`^E+VDn)YVEEtIPTS*n8{fIF59E*t8$I_u5N z{e9p4?YVz^=j@sDoa(NwuCA`GDR}zr=grQdHjqkfSdiqj)}UvY!4~BX`d`Kl_8Upm zXCykPO(#>oVWIz99Q`NbQpL7TYlcckV?F!aNzfy=vkGZ*D-k!p1ZEl|bqm?bIv@Il z`7je=y9)@kHeE1Co?CjD$R3msF)#Y3r8!%Fvz0hoX|pxCO2UdF0sZPS=vS6Nx1v~p zwY(WD&%&1FrlrLKG0RE>tV{n1-e>D^)yiBbSLQ>pG6#wk)Lto6Qm9&<1N{oNe$PhS z;sW7cg1;tee|!e^;ULm!&0_3KL(JS9@uhYwTY-1ce|JtMvM9`&k%D4c>r~J>sd`2- zYNk3dX^I0a9f_DcEeTVn*fG7;ip~Z-rqddHR)rFCisk6elVNds7*-{Q;K39b9&<$C zDQhsEHwNMrtsmY{`{6B>A3l*!z;?xW^vXt{H*5s<2i=83enWB8=MJ3q9E!7S5Xq9Y zG(WmJVFa#v4JVAmC9gr*k^$Nu2pEksv`+629E0P5qj8kNLqTJ(KiGxxbj6+sckH0` z)Hc}!{3LV7_c9M`rts?s4}2Lh9$zax@D<^6wWp9fc~9escWK_a$rgmSoMCt+F$~YA zMBvHvNIaSujfb+M@nEhJ59BFvZ-EN;l+hZw(ux(;aaclg?e0lV%%=5d`{ZOa()dTACC|$dPPnZLX$?zlh%NE?Idj`kF3d$#cNQXOoQ~+pK@_Fomn)I{Y*y96 zzN8v)^U8!YtbKX`wxAC+i(7?XnltD}-;rMIJ+ueC`}Sf_?`|A9bQJq~_Y3UrJAecG z4&uN8wkSU+ti$&o86?XO{<00Hw(iEZPrk&NU46K)|1kFd^eYCA9K*5RJ{;Z8QY-rf z$ot|&+tN47f9`8mgfu}yBb0{PFAL1N6`2AaG|1tdF48c}q2JpimS^n*R zLzXk7{eL0L`MK@ehh;P|5-%XA!@>Svac$LNoL1;@e)xD`+?YYladyh-bvxj4^Pu*W zuM6#u$0ZL>ob?IB;gAq)SIY2HiVeLTwK)Imz4RS$le`vx!uA_T#(+^5#`qt;(sK{|I6{cI|X6B`!~W|BFhEQzH29T{`!-!EdTI> zO<25ofpC~tv!DU%-g_7ifBzEfT}5y#9JJa^TwI0JMYZU8X9F#q>)>q(5f*Q@lo*h>M{oIQ6Z@6YRAZE ze~dFmz||g&VKJe&%NB|;X$okjWI)XpMyyfZL5tq${JC|uaL~!p2F8xT&(XEK$f8A8 zP>m4@i%XGxZ-cNxE1<=ygVH%^vER71Ls&95FPnzC`BRYJR)d;(Q;eVZK6}nI$QFgZ<$h=nGGOZ@Bq+V!ZDJc!mUEJni!*l*8R! zs9sz#a>DrE$?{uA-Gy;J?ie!k7K{n@LZC%~1&`eWS8F6jSVG~RriE*|1_2dz_*L35 zJY9}aIcoS++cBZk0+(E!Aj#beO$e?_r25Q5O3x%re|8Nm(3?=w)qv_b%~<^RRcKr= z1#!j6n7U>T^68%QXV&1UFJ4ATXC>MePr=+(v(UAu18dhW#oQ&+F=cKup8xbk-228x zw5;z!I4xv7vz1UxN<>UYu8{uFPtFvUGy0lDbUxUP)i2y9Br&=-EJAiuzOY`N|IlJQ zPkq^=?>~)oFRjOlM_1vMk6*_9&)g^Sf8vwpkTZoQhGp@{>?}o6MngA+jlEP5Yg$-?^_vUa+rGYdLutA^P$0qQD%X*NxQX66b@S+;!V zP}@OyT?dZSPtOvcM8+*IMdXx3Sf-X@+T<#HoM*?!(VqCgA;-Z-mSVxeDX3XC6}eM# zP&B(3v2@SMCVtK-lt2A9+Bh7%4$FWT+cRODnjuKU7^pNT^FkMl&r6tFmEonxHnQV9=|DWx1cPHzFe=5fTv&xkdq9j6sm) z(d_g$It(MJ?Xvbb6Xa^G3bLpOC{%JpM25qU{tGfiq#((|q9YI*6)vpGP4QNYbmN8J zND&6f!?Aen3gndKVVt)sf}%rESY3?UhTkd>80L>9t9mFOAB-A%7jC?H2o^7!k97~M z#*iC^;C9!Wg>%LzYcyO!CP1GSkJmnZA1fbNi>fITku$v#Z|?jEAN}$!e%SXV?tc9N zcqPgZo*#qym7PLXBS0S}UQ+ocsNqKa-6&Hy#^{3KW(Y;%q%64U++Zo!Ah$w|&b(-B zj1R?^QGVDW^TL}N4=hOuMr^GSA(NA!txkcLEgZH<4!Fd6(SEFWDXFCYuA)2^vCWxq z(6dZz%ZIuu4zfxE^t1qxH^w5o)&w231-2FrrFbUGW2U6hB3y&060;yf<+R`)qxFQX zIte!h-i7GW81V@>Yn?N(t|Scp$M?jUC{YdQmIN+TWi6LHp!(RgL#1QYBF;Y7Le+?cAV>OLE%~=Sia+;@R3d?!^%sr^Y zfXEselbTXtp?bD7X2I1Qg1`hNZt)#0BydbAv2dq;Hd3n)3uCtQZd*DVnlu~6MtCE_ zu0=5Q!5+#WL_3W_OPnpj`RfBFyqQD~wJ0Hr(+cvN<9#$?SoX-h80POPd~{T$aBuO-)AJ^b91- z%ob$1aFY0&Wx1@*D4Z~+&MiXP%tFyN-BDg}7Bs1tGtF1A3FE^8M5kEZprahJ{mO&hv!yWS0D>snCv@HBYjMhJaw z*PL)_%TA;%t3mR@a-?>bBXL%N_}XX9TO08BXV2n;ogd@bkDoYpMTH(&3ks0CvILIq4A>WE!M-d9=I(TqJu(H+6K%+xU4~bGd+)BL6VtCWwx+p@IHe{9)gSVwR zm&$W}8jj<<*czOPYw0*|GvUp|_VwrSKA*?Oug9OIVKSNXWrCcq&*^xdrARovbl*(c zrc-=DWrdLZNK4B=ZgvhbGtyv7h($(mwiq))le7rP&|*TS8sjtN@G3UIEl&-PJPq73 zl<>^bz%NG+zkC`m@=XXRG}D~eiqNvyLE^mBhOiQwIL<`5SGE@3nHqSe@{71gjMRtY zE_ncM3-`t?K_0lp-wii=yWo}yV}(|E2#r-tmJg%#luD-+_s5P)#k1h&K=;H}<4k-r zQOyLlWC<>j)l6`wQr&YJ$zq)2Ipkx!Ey=D(X%i*u)GTT6;;sEIHp=!K8WSC%~)9p^{OgpR#!v0rW&%!Rz zQkrsTXgoF1d5-0E)DKgg&#Oirt*ugO(y-v}**Mg{2etK?0JT6$zi6O7w|!y^W=*o8 ztImvW>W^2@eDYqJS8m8RU?Yu(PbJCme0(HcFoob%O#t531YwgZ5bsBM;9J>f{1ko{ zehwRk9TCIPD;tG_QDbp5avY9FjK+!3k?0R51P#O4K!X2J4A5NSyf0%o&iV~nfS>jq zE5b8=<0#EIoC$Qr>0nnJ4jhYp!J~zB_pjlj@I&NiY?hD4*NQRtM(KjDB3uTEZ(1{b zs`kc5dVjnV6Ckv`pLK@d(bRCP&kV=ixzSiwEXTq!CFWPDFsE9D8TDGs>WD}Cw0N|& z$D?724b`m{l(m>q+-61L)Hq~MrG9{pr%sPY(oFil&8EI~P6~~4G{@|rIq=zhURi*c6-BTuD?#kiQpC~o=C2WA7nBMkDdVzIsFoFr zFAikX&LWl+{$|}z&wLHdiI$YYw7M3-Q&ZtpXG2^MwTt#_e1rX{SkXr7>?Jsh(>QQ^ z{~%%Bw+FlT?!wW-$8d1}AwiTgc$9pu-J z9l+HS2XXP#VGQ&S%8Fd-{}29eaQW0RTswITI8Hcvg6fxW__vVvDgOK+wpc!bvwMC4 z&L5|E+TZmv@b#xyLE{Gdq5Lyq`+o!f9$9{Zt;yLW{#)SZ4{_zSzXNNR;unJguX&Ha zvFupHm#IIMBh;KJuW0)5|NXHPRWSrh464+4iM?!;ys+VlwKJJs0KRtxNA zi*%~oUaHt{zXrBan$4e4NZY%=1P*)$?D&BG1e@u>&>w_lTDDVM@Ao*~kd95-U|QwpICXIVIK7>&^$K?9YVngg1Ne!B`3LYFbsAR&*qgvV$#Irj z`6F4*M7bc#`>7m#KcgqzOwVCAm1`^TYE}zAb za|f}N%E1;vGoDz4*2m@xlFhoH1m?MgFn1L}*G`j@o_fe=k{4i)g2t(X#;S%|7X`H{ z3PzKLChJzj#K%Bw)WZ^&0KJJOg2CY!I%+KL8Z!=Ky*%OK=Y!Gyo)|9+Liwy#43GAM zyDbVHP8Eh*LNPQp3?A7UVg1N*0Zf(~rqSZPGYjTfG{Kn74yxEORViX=0mizeHd>6a zzAY2ysf#ON?aW5*qKWWJRbY(T6C*=uLg{fQM!DUI@g5`L;WY*~-+2SPLOhX>orrZ$ zK8WYvdjkvaTZLIG7NL1T7pmsYMBTipsBO)|s%bgs4Er12j$*kWdfxOO6rX4X`qLyp zhF2p96{Tp1i$S38c#QKIFRW&L3Eq^(E5L`~CqmC4e}M_X{(>wY?d2{=a)uzzJ;w{; z{I=07Gcg{wyN-lQm@oVcGAw@TenHl`*dh^Lk^uig8`YHoBa@>rJSh@x{CQ`MLm;Ha z3AbE5Lh6&Cno1M8=1c@vB_OIM35L3KBsCX8LG3%eJ|F576SP@2n2Hl&ETiM44phvW zgxTxnqNKGLTDt;zYc%BQAOy)g5p51fOr90f?wf!}uP#nM>- zTW2AfHq60Wy`Q6Gb}b60lp@-pM0jkZurOz`rIZ%`arnd!3Pun3*&=o<(hzLT6lB`) zVWt&t`;Ee@T0gv4ON+;B8;m6mgge8K-j)I9j6xwz6V2MwT{L;`U;-%}I{Gi@r&GBo ze|C&(?#P0@GY9v6{v?*Yb)V3lp80sU_yj+u+K!~AOr%ZDr7&BN<#~-INX$<{lqwSb z0p19r_8cA-0E7%=3PAqZ85=sjT!M&CIECbJ9?^k2D)CfU(OHMZ^9fiu@GAhkLl^{c1j zRT`^SKCuj+Zu9~A~yn+ye0 zDsbCMd9bHnh0HV~UbCeQ?atgu3@!l~oSlNGN+aa-|I^mdB5Wc%H>UsVBrBpDY%oyYrfOjapVYrLQ+%xr z+C~R#lQUpzNf#usn>7%{b8B%+#0Wve8(P@%nA%g5lg@F%*pZG%mR@P1d?v+-ZT<>D z)#MPeF6=;5GcjHura2YbS|>F1iHIz>3COGLh$yu{-#~4P;#uP5R;?RiS~CS%&SbQZ zN}+gmfSBA-3VTxy0+N)F=fogycC~O^meg57|IZXeHzy;6t{F<#j+~r=5SC-1`%<$m z_vAE0G$o2JN7zBCe4=ykMOaG)qRVXJ1%s+Q4!UaU@3Pdw>OFH#r6BnerssntyO=Bw zE;k88*Cjwp_hf8J7iIHtM#C>&4p&;_8FCXaWY~=e(nJVptg!*^LN0~-Tz5qvq8tW< z+Ef@5?j`mEOi}RCgu+J`E(mfa&za;F>7xS%omR_y1z|ox5hU`8h}8&koUP5780TXg zGU@K63K7R7tMyQdH>cZ>R-J({(e4OJjYjJ166#N>uWEG&oo*%?nJACtzND3&1%FM_ z;t%!hqe zHcZo#X*|tB@{%&d(Rdp-Jrl_@3*eV5!w~OVacjU(3>o(qxGFsnQ(}iQ*Mz*em8iPA z6|po<^UIvndMoDSDeypII3A_3V=<+1&U8SvFcs<452aIkOZ(~b_?APTgzWBzrvxJ`f%gyOaZopV+j@}%$X=> z85ZjTx`&1N;(R9FS%$^GNGYU){IZooK83%QkjQculRxTLw$pY5;u zORJH&ycV_@IpXU*KS#wfQm!Vk(?8FO#8$=I|Z&&%xV$pJUe3i(qR`LR?!4 za(arOsMia9@`R;1(9BMNaegWsON)hGcvRtw*zn(B>vRqZgR^`+mmKva}G$Xp$3^~njEagtT_5FLovfP>AC#DFpJU)ra{F`Mt6Uj_qv(-04BAz*pNo0voWs+1Pm3f=fFr@RP^EizZ&mpI0 zVwgke94Q}ZoAcu|4BnO??Q>erPa?;qe3|%`uFd&K;Nw!cn3(2J%8SpJ?nff6CGh_B z#4+#xSsDh{3qy*Nh;Qk>IOJ<^8a^(SOS&&UE}g^RZN4sp_oeGf_0M49TC(`&{3K#r zI(|JNF2zgvO2;^q!0{Z%`Eb4rwk(&(az4&+To!gj$!UdFHa`!#K9l8{MJ!8FCrH=4 zoLm&-QG2#qkzSIG*rF78S)=H`FT-d@I7TEzz$IIO;mKh%9}mZvBpF;&qT!LD5?1EE zc?MyD9#m`*Bss@1NzPzWot^A6+|m?qO^g;V=7(uQaC@XLZl?LfP5$F?laC8-q`A#a zZliE3tv~%~PIjluXhE2(3_3wL8)D3`+T#$f}06yj+2OP z$qJm03t5!k$Z}4@`EY)GoC$E=mn_4XaOeCuULwmmj?a~dao(4%C7sX5q;!0KL0J(p zi|N^xq#?639k~@*$SI+=o0o#joMhzYrJ3VV@Uy=>kGQx^1M6JjcmfO0OG-jD}U3(@PY0lW*nuW<_ z37B7%h9#w`n4fIH!xj11|ImH7hvqU5(meM`OAwy32H|CMAYRw|;T^3%K2`_dOH}~A ziS))#G|$;V^PF9w-q;u9iDO}YI1%QL{yfU?khH8O_>?X zE6kW*ZN`kc7&KOCQB!X~S)&;RlVgxQ)rO4eu}GT{hospw7jC!F7?}iPH?86LxhyS$ zUdZ6k+kxi_HC*q_!q^8=;krH(6E#k`VJY<8Wi;n0Mee$(u+bdxXPiLU(iY6VXFmF`p2Wcu2eALxKJ@MH{TH%a zSdUxyAi!}-f0B;<2mf;% zC(ttoJxkE@poa|5^Ah1<0vlqpugSwZfwPom_hyRQF66zxnKu>N9$HJskNqjJ{l9^K zk1RiQ80QwR#s@|lp4KSvnj#8^Og0=<>#_-HzYl!)B=E)4IA0ozUnxDFd;@s%8{oy)Dc$FU?+HKS@Ta?|Vy;rzSdaWYoPL3h z|FVZFZy&A<9HD|zVb9Qg&`q(f&9x(EaAMaXVZjeNjkR;GUcQF2Cn(K@i{dj47NkFX zY8S3vp>)UlfUiEl&Qv45(8z#KegaPO3yw25d+-u`W0=uY;`AMGprZ(940>E%{SK9j%knY4nWn+7+6ln@tEkMBu9xnm_dBZVuYlJd#6^o9zbJEn zUoYV3l>uy#$nukaPL{J23qQ2q$#QBa=BrWhn7qImOy1^|X5A^rq%8?y7zIO}u?f4#jyMM&KeLJvw z&vs!M&K=gF1JnUgM{#HmVdqio-$e_Lz5D)@1ZVu2Mfo3bJz37yj`xBQc1fiKN1;MX(|g;n7Oyj8+7OMPk_KaTqz?9pn9cG1_Ya?wa6& zaS;J1ozeU|S?*1B$C~9XNlJv259;gcCMOGmkI8Z-9}TpaXCjcn*0*7eG?}4zCVX;M z)C(-7o}l8j#B?iqSr^ z6Vnzfz`}Lw@WJNI_~5gT@YS2oVe`sa=xZ;+hkiHWqKclk&&`0#U(r8qD88RC9#1M2 z$Z#2p+lH`i@{Jhh6$r0DnkY~3hRXzZ!UVW_dceio3$8wFRqg{fss}fJKa8Wek?w97 z=IVmGT*qOUn=6L950d3~{Wb}n5K8HSyx>OdZRUN;@K@ha7;llm%`Qi9K25qa3>cTJ z6vVktfd%6;wD2vl!Zf`Y6ABH8XrzVbR2p#GsQx^JfqzUm zv^iF&^K4+f^4QvRBvhy3V`}?9AN&#DZT}M6_I{7ueLrI0>Tw)A+lzjj!Ho6u#pmcT zly~}~I;h*yA#bJy;G!A?R#*`=(TS9<3ZVzf7GdcVv*D@mMpk_e;)@)Jij9IX&4|j@ zGPKTYz$ah5gMtFKO0vT(i0ah+Rw$fG3=J3#PnxVLGxgBq#i0Ai66sI7~ z|BNix%*hbAo&^6hNW}P`66Q10g#$V>O;Wji8mX-sXtHYPO#eL;?U_O?O^TQtXJT91 znFjsLEa)kZs2K^!eV`d3g>jhQISE+Vg|DJK@okD8>zpd=-1Y@lzq|pC$^@jfW(ey( zeyJ7KmIzsUl5lLwq&+)5RZUNUvYjo>lZCWG!km0edtnJay|4w(?RX0hefu=#zqkU5 zG9&a=v2ap;`qDV)3u9r;r-`FoD=f!-{X7vB8G%SyIOK9U!lNQ#j*WrQW=4cO97=UG zY_TR`UCxV)7_0ervRtWF{7#k&opV{JkY8c4Jc9a*__Rd&kGSL35qIMDQA07-+XHi# zEkaRsg|HOo^nu~Q@bvQ%q`cmshM&JD6!Hj!hXo=&){L-VKPV_&h}&4GM-N5V*xQg^ zpNWxFZ?V)rz5ML6=vuM>;SL>AI?IJM=zXuP#}9`$qvw&uh)7Yv&l!cxDWwQBgd>Rh zIDdTv{LRtuwkY6Yi^hmVCB~;|kvX{x!SOQKCsUi6VnxIh6%uQru-XxYPgFtJ?LPwB zrdh|q!Z%h=*(Q#Z5U)FfjLhQ~7BjKkE z6_(_q!o3h0r-7$747d4GUrgR>HNz!;4eGG>(`qq}O*p*4+twmCV2 z*17GeFgDY(qkD|5i4k8M@R-T+WC^n}k-nf1aWsC$wWY$|nu+W=RYG4pzBwDZsw5=Q z+^TGOiy-1P6KO1^HfE>uQWq7%Fx4q!f0($;qy-s&p~d8AQd>y*ncsuNjqC@6f|B)r!ak4y02boK5XjMdgp6J}EFmA^LP~ zzcF>ma5iNjy3mMN>K~chPUtQaggKMlEXTqGIcusjS#F{Jn+b9g#W7flO(M&gD34i? zO^eW6#4j!s=cccyf_zdeg3Gj`E&J!F(D~#N3^RD5xO1L^_^6&c|tPfl`U`M@eiNDnrH7p<+N%zi&8Lg_GEP3vxxc? zx`!INpUPBBh?Svb-8|S^@*vB%i2oKl`8B9rGFiwVS*fo{V6vRXK9-@0 zrE!-XdUBj;TB?Yb!0~K-&+*2N6qu=97^ppJt1V(ol9wBW%uiIFUTBsxSuWGdkdd2) zP85Sm!*_xZlXNl3x;}&VB?6nbCGuO!ODZFWQeI40OZoG*w10j6(msRt`F!a*QaqQ5iEJjcr97^` z25)o7b;xNrUb+{?_35OvOq4S*&U)pXH7M|I9_~e=3R}cgD3=Jk^=|sG1suC_K3K5P?iWYu}hH8U^RrxKUp12`k zJpSr44uAC=gTK0u!VRt?aHGozc+))V*3rYoT0v>j3kRPDYYc4E))`EeGf6BF#!P54 zIW1Xvvs?-j<5E~%UnfviS1ZVDCa{?(=W}^mBELBwKA*{L-j)b;iGb&HoF}J|$a9Hk z=Y7tb_x}h%loRqw3XoQug=9gPXCSXE8wG`#$jwScK}M>O`m8LZdlaY+fJZi6n z>9FU~_*F#hrkdus*|A8?rT;@wqCi?c{im~RG|x06KE(ukvJsX94V>u~#3dPEcWRNC zYJw$Bf%rrt98Pw=OY5jOBVv+hY>ihzS71fX{0hV`D1eUoPWh5d$d(aS(tLeoCKM~P zgg&@pbpd?W7Qy4*GI$ca?kR)M+A@kOL%DzW#wHz&cbcW; zLd)E`stC3f)Nd}y5?=x(FU&?Jjb}MDwiQr+Svfru6Q^dPna0v7%^8^1kbxQX>6k@W zQQ^Q-nF{f)KHli}@xfVNU!3#w#%a$9IOF4mGl9N17BB%vgS~Ko+UKso@z@&Rf?tAN z@l&u1zVmm%7XI2gI24;h!>~D0hOcR^|Ak(G4~%lW8550{X)gVoLxCq!G5$TebBjuR{B`7X&!!NQCr%u91%c4|DPr^KNx)rLu_7F1@$pfKA^|6LQ3 z3ruhp)3Ys$fwkHQWwjDfwQ@w(L?faq5+P*~2q+4LZ+;NGvIC)MFhM=h40SE1H6psg zfXFf(B1$v}WoNzRRw3Ogo0x>iNy!MWOQJQc9X>@icu_luZpaacnwU#zav-bAr8GH% zp!IW1J3YJhbea=o3*#h#>3OhC&xLgw&0pFwVQQoCcM2mH1__h%Xgtn_iRN2II@dIl z;t2X#`Lw3X6|$YmY1uT_DTAKox@n6hA(7^FmR3qvmx^C-7!#MaqjT9z9J_Et5aog} zKe$g=m$MAZ?-u2RLkA8EqWq6!`GGxqaAN-f9P8VMvqz8N)R7}N)Z2>_lvV8aP8haYYrrR@ydXN$qQIPHJ%e}Q{w?Q(bgAnu9NQ5+%GK-&h~Z8u;Atw+{m#$tYg3Nx$` zSe%M^>Kd*bp$cMh_b8S5_(f{imw?MxaA5C#;2O}o{|Jt<7gf-yw7>220QO$I zjNY>Ypw!s6lkz*xWhd|rUZiUr*$(WWay+^bAIUuNbFvxuc^j_u9mcrmoTmHyCt1$qxa7?9>>tQ-wlD{O z!qB@7%j4A4XsEu<5%zygWqpP2WdqLDRNx(52tHE>;Am7B&IShIz<3Yrwdru`sYSq* zpK%6MUpR*&*G}W$*`w$?M4i>1T{y6F4-W6>!^z!;sYx8ffnWDy@6Y?N>(_nQx&07! z?>>q>eaEo3ci*3q;*$J|B)9V49cQv!BFvdA-$~mHe!Ix$9oWAYd-v@`@8P{Tc;OIL z?QZeO@uUqiG5wX5FwZTf#bzlI7S|$qNj>sbPDbJ4W@z&5h>Tam?1({9Y67w{X`-C$ zfWcxETCagB8G08ZHJo*U(6L*XqF09Lg406m^vk15Nj=>1IFG6Ty7no*(t33+i;-e6hXGH*YdJ|H$ z2q?6`B~1zMA`?cZ)8v~bPGOUhpr(OY-IPufg9KXO*5QTk-o~?EyoMi6ZpW8Le!|x$ zx8jEjd$Hl8r?KLhwYcwv`|<4CPvYrU9!5D$Kn*cbD6F7GX`USkWlk)4?rxN?XcZC( zJh-c;WC-b#$i_rrT{Fxch~@|9V(r@xH*@aj9y;;U_+;h9ZOp>;tEy4UyMnU9`Bc2gdn{P;PvubnB# z`pyUDVeX?#uQrwI|0-W~+e$zPTbgX$EO^|n{3_2F& zeCJRbXR>EO4kD(-A)+-7+1-tpHnA9cCg$VIFgLsyHXdJh*5cX6)}pGb0rJEsm`Y=y zYe|EgrHi`qp`Tv}-P~Mp9lj=COW97(e_Dzl@nh%aA$4IH{io}Mv_n{l7TUU4XliX> zXKHTo0SL`dV}dCV6O{fKAL0RbUw5Hf&Y!)91k+?wqk+bt7nW8`cC$8rXm}9f6Rb!} zPlU;25KcX#pa6qVgmP_bqjp56H#KJ5D(@BQ))=53gd#M(4?+d@&ha5B7A zf$&!cBhVa$kT?~BtV(!VXn41t5tH7urSK+WTESAb^kck(r zBSI%&bc8oTD9+bNV-=I*Y+bGkhr22mZpt7*sB;{*6DHKz@|+29Cd1jXoGr{*uUy(@ zy>mZZggDL?G@Lm>3OPa zEl|{0prmbnj%;BbNoiwR?1TiwQu|@jGigSl_$okM=Y*9>@972NdFrT*Fwvd4s00q` zhoUDMVVzF>RTK3I&GCYiXG`Ju={d-lTaK*xmB{U>p*EHSOIsR}<`lp{*W~mG)Ti1T zV^G^1gQfWze5h9AS(6$`4SLABVv#!8iOk6vh@!qI@&0BMENw*D!Uoi>nu?tHHMBno zrT4VLxu6IsOUq%OpD)OA3GB?1^~xD6$HF8z%dar$%U0&5x!K}nBa`LExfw!+g)PhZ z1%qT+9#pCkFPiv83tN_tit$A`&21*w!!T0gDJ;v`L2hbC5mY5M1g0u5LOTHsYp4HC zma}EKdwi%E|0GABtXW=n?{wU#7>%MeO(?&AGR9|x2`zcnEa#V%>C0=8zO)*}celdU zo{f-P4PN^7ZG7Lq6+39`z2}Ad5NHTSLO~Kf{`G6@yL24AS5IL1a}S6wA!OO~zbSXX zF||nOB`3BQB5g()jFnD=r)hBa>ks0A_a4KHM;D>#{u$yWiIc9g=#ACbf}MEd)JOON zzasOVYVk55WmzTcv-7d+tq1Vr*DphzW)#}xwf9XEb1(bUOzfu^wkmI1*d$*1RZJ;C z*FCfG1vzcPv4MS>`2g4{kQR}kY4)-k`1D3>4+ z<`P+MX?DUy{gImb3AQYcEHolI-vDbxqL5*Up#Kh&|qc$8i!7E|p6n)g_W# z0;l2hoJP79$4g{6=goB^5$v1?ljH2rlP${m+}}xb+RrYe|5Z*73JQybWqEdb2C_4= zkeEjGl0*F=tqt6aVbphoVmOWKL+yiv`E3?I+(G@pUABJ`=3{7%#w0is=S+w*d47G! z$2biiAMK0;`y{%9)SBIG5aTq3=t^EfYwFz1lvU^rf~B$vo?K9}P&3iFU$l#j$B%D;%NUrgy(gFGVx z1!?Ih&CEt+Za#{$vT41RiS%6R;|enoTbPcRk_^O`X9@B=Bahl{juXk5ad4(t1(Gsi zk&;F0msB&X4lNQhtcXq23M8Z&1z8^JG*BHT2G88HUiB1Q_Sl3yc6;McH`*cLh*Kl$B>-tf`b z?LQp7enW94$`gH_cVNfZzu`#mc=U#OV|#c2b`W;Tg2eXE;Y_Xv;0H|zzSITdn*=$2 z%r#?sZ4wT37Gq#VGp;?*iK{f1#!F8DufGbs_crj=r@*!!fc-mw<9h~qrn9}k1q!bo z1aJt~2$u;L2kz9ICCn5eK?KXlx92OCp!8)VKZ%iL-?H5mv5sF zZ(tApL2JLa1omJPg_|gR550Kd{ARp#?mN7EdNW=*wHdD-{|2uf{TiE7QONmdR}@0 z^PhhdJKSNT)rnTxZeBA}NNCoqXh+qm>8M)WN$U~9 z+8HRno42P4A0YXQ>X1IK0!~^d#CFoSNppJ3w0s&{3&h+ykj6vZ#5BaU<{_oM1d}MA zo!1VdZN&_9E}elR1BZkJ3rn#u5zf}-OqR1DrXa})hYue47qWccVRqKphyD9{arEE; zoH%kACyyS%5w;dTzmMV$Dbq|A8bGesIwX1 zH#OAo`VZr~CmuupkKf{WKU;eq$5HN#*cs)SUw|F&V}EN2K8!U1FK(g=p)TjrQT%#( zEB0R4hh1lm;m{RoznAEg^ZistYSjHyxZ@Xbi5o0!UOPzfXD_4w=y6=d6;KJ$cXBVz zT{(tp7pV-#=^^aij4!6tV@qWbwq~SauQLfJQ*y9FZN)DNGd>FR#|IJPfP1FVbq-L+ zcn$*tls^;n?>vPs1Ksg+s0RJcGVFF1U~6g)eok}XSS~>kfbT;haOLkGQ(ayF4t|X< zX`%RCuq%$pW!ROHfE_iZ_@cTDpVOeZFEIw+MMdI+n0%4`#H9gjyY?Gde(Im(`1NEt z6X=o*iy+I7({tN*1ovoSfS;)zkL|<2xjw4fU#Whmah;?(zOozG{yxq>uoC+#Yw?55 zf%lCLe7mrl4*eqD#+^BR9v4qv#KmI+IJcVyfS>o{^p-xH`SAd4AH=EcM{s=aNgO_W z278X5!B59o6Y?;=+}DSl2loHBWO-lT-rvdc>j`s-C}-^J`=@pJe<90zcMHq*9lL+U zu0y-A=X5WArG;Ah%rew$=tRe>D-pl2iWZ+Gh+9w%D-DFHbL&vPs14~2#jxijqO^)8 zI0ZE5JDo7=bqJS5z$ZKyeo7fa^%}?xdSTrY7#@yWh7S`K)UN*C!m50jpBwJ*ACI!G z7L3&d39{TLNdw0cp3h{QeD-W7EGy&<#MPQR1+8No9x6lNh z7VnvJtAushTRT3+?kk7jqmIB>e;-7tm2hzx3y<+*;7JorwKfc0J?(hl$-A+9LpPdd z*JA3d8mzyk8{fVA^5Fl9KVw-r8(+!XuwU+tgWe->$#V=YP`OX&XhIS~3+f0ji;T;?buizkf1_cVDoWasGqbGP^ z6icyqxQdX8!Z8!vaNEdX!ja)EqwhkrMTfkGN(>7ekK6pmAvi&c8~jG&#-OnnLyPO7 z8b1uz2V$%x95*T4F(hgnT+-winiz&5IydNOfYnURLF~*@sOwX(D0aT3D5{Y=UWaA)=a+V4`a=AyY7~4jVss3Y9Z!@yP3sVDp}Dap>YfY}&jD zuYLX+Ry@2yIEqUyaNw1PJy!yclc;w}c`0UqD@X4%K)5(h)Wz38Ax+5#E)Gh&gm@Ziaw-UM3XtGK9Wwd`}^kyzvlZp2M;5t|8c} z3dD2t%-<+Wh1cktajW-GgvW*;pC(WlG_hi`oSldUv?dI`450EUJ5vUokxok)v|OJ~ z|0e>=IWTd=dbOshDNwV1b*%-R&n?8VP4^24g0UJej0_nsK0%E(D4;iLU^W?qWw}nL zLzGg1z_1{UaT^D@CK?LW;Fl%_qZ(@Z-?2ka)+uMgoWX>7lqy;{_+$wdCd!#KXBn2@ z=x_|V`jaTyk0z)h!k~!= zN1%rraujl`HOHdXZvri#%(zQQ_u%ddm6tDudyGce!YPQIUQ83;7x2#BPw>X~ucLYv z^>YQW2#k$D?vyg|lE6n70zaD^A$B#wjdJ10(Z#~nVk+3@)xafR3;m2dM7Jd(q&Y@d ztK^oOF)dwzC*nh~#TbkO)MtDj;fwB6HFOEoH)cEFof$7Qht;JzC~9TUcj#f7nJ8W| zh1FBvR-OSxL#nX&W~ZF&xHYQYK4=}?oFpVk0*Vaci;kpOrHGrHjfA#b;fRneJ;#{5 zkVunjmQ~>wj!c3JUGiop!m7+dr<@U0AB)I3n;@vAG)nr9Fj>uC_C(ZDe1k&}%`9cY zWnhw;32L@3w@%H%s8~PolF}oIo^`PiI`$vXkR&W~VrS5zabluy%**m9A-Oup%VSZw zc8bVL*_tdY+*v=JUk32?<<(ZG*!d{mFBAQIeFDD_Rnfh(F27+)I>IR(TjyH2{;7Ov zi)-Lns77$LMMw^@9y`mhNMt$R2SYh2QIttrn<%W@!!ooeo!5ZzYHAyyE(nW@hMyq} zp6Xyih#<$uM*1SyrV^yMt2{uE=K0>6Mz~^d$;cu5iQ)b8bgfPUa@;`@JUv96wv>v zE(XyxW+n(_6tEmd3s9%1eP<(G26pcxUpHocx zMKr!=3afHma~zD5?TDEgk9g|Gbd%!*0j_GKKEF8uruI}=Ix=CKo{gCH3|heDi1y@| zTOiJl=}1P_(sCqqCZV9+hIu6he5uf3lS++(N)43l1~{8zku*6O#svj1EUBR9nvVFk zJY>x%L;ivqBrmQM`klG=P7)g9R_e#t*%(W*unY@39J^kIMIy@?*UPXl5zJ0LwKI~1 z6pKWbv*vq1u}XX?;YMwi9dnM04Mg?wHn>w?%4B)#y4k{#oQ(&x<#yrZmUYW(S5CoQ z8g~@-OcZ4K__$!y(VTX)#Sc>->BcRJacEpW8#gJ(2(r9pV+Teg`ocCV8xsl?qMc{2 zn1mFXTV*Y&qyL2*@)9d1u5PDA^mN?+`bNxLI~xhbPMFeS@Y9j)=)HItebD?uG?bOF;eqpY7xezluo1SYr+8SDcgk zJ6Xj=|fUUP>!% z^Z63VE9J)_@ALKfn!GJpMPE-Qb2{mqKSIi%&*8Fg9G8LbOUj4SNTl)g1hSMblfx3E zGG2dN%9FP_Pl>SRG<=SfFCUlEN%7a0Njk=9rQ^IW-oKvo zmiGUcmaos-*AwuZjzcEUnJBNQszhaV)$iwV`3ip{dvl9fySrepTp4u#DOAQJwqnkL zJu?Z0tayx32Z%ZMu$U0sLH|o8$Zt0I;7)50?u-e>Fk2W##6@7FT_!?ldsIA)DNeb- z=!B@>5bKHsXq5c?h=Pmf# z2wEQ)waBd~5fUTGndwNR`c0wxku1I$Oma&^IFs8PGSSThHK%9tnw@=e9B*@aiO}XW z9G^jT$lH8AZ*zJMrMwx^xqoJr&c~QAm$oHhogtllDOBjJ&5pLKn^T4l>6Y!&A0=`vy;tRbeKBT$f zI~Gs8Zu7*e4sSf?@WP|^@pvxXA5UfY;vUN=tj+R6TW%mK3W8CUABw7?aM}(S ztwUv39cmXgqjqtN_!5c7-l`Sts9edIhEf_2iyxeU;=j*A`6F{s_1HYrKehmkPxPSa z@g6ik)`P{HHVQ0y_aQ8NZxB82KZNf0HlpXJw6?812(htFXf&fr&C$8IHT z!zt{f{arXq$4*mt2D=66e;Rvfo3V$sdkF_=n{j}^%-$XWK6aMEvlOxs=n--5F1q$! z3inVsc3eGzrp41Rf9(RCxO7YyLo#8`mgP*AvkZ$wmNQW{NXZ|0g< zx_95cUK~5d#QFgoII!=(kmUc0L3x*fvlp>%cOMS)?gg%1!r^_p(9hh;wX?W%=J0hm z`Wuep(&>|gQ@F+?DRYtk!T%UscM?S0sR7_5gE`O(xYkeM#jCh5a1r|tAHms6mxPRU z|CI}%BRFvKnBYbKjM)C)z`sS7vy91^QwMRG{uHMPTlW4a-pt_gWgMpld*aMVoIFEE zPM^Wm6K5#?8jfB%hrSE_!pi%^i37OUzY93K8$Wb3;6c3(7vKJrD(*avT%gG}{izSo zpY7N4Cvk}1>z%ubs~1k=0*ky~x`NA8p*VIPIC>5kxQ6qGj#C4_jKe1mqW45ERp=R< z7}$#|1ABmTgx>G)W>GpeS#|hat-^N^a(w3>i9L!~d>?7R2hmZ$vZ<8r6I?v8L)`Dc z1IKA}>-Zh$VzGDgS8SVc_*ZN^Uu(g-)D+Xq?;2EP12cP?do+6cN|4;aKZav;N z>VYR-q%?HSPjs(8?*{0>Dot60=wv( z*S@53zKv7gZO4_97jfzAHBeRI;^6^7j34`PA5Q&x2WIESaRghbvF_r|jXEkO!LKL9IgUFnDNc(2BUyf+_y0_mA2`^HU41*S_h>J+ zo!o_A&hHVLuci02q4DW%@rjSIlO`@p8j&!o94VcZs9rP$H8Y!0GO-NBCHZi~S`Zx^ zf*>CsgoK46Oc{+}jS>MYyI?XRJ~M6#}w!!drY)McnUXITIuNIg)W!9t?Bxp`DvA2y=6H8PpwFaLg-5Dos?1 z7d1kjZA6eQ5&@L%K!Vnq~gz@gK80+qiF&>^6=jjbsZ(jiyFCUEcoPaSCJTTN{oUkb8 zmk3Odk8pPx^la}sMmRbA%gr|lhoENeauVI+o(xJi(BZ~Xiz z4%5HB7BW+!Gnz8o*^_y|P{CgSxU-bQv^7FJNc9kZJ-V^%ZXc=H)dnK22ia~jdQ zxD88Rya$^Oe+}2PNc_bx9;)_CC_6F*ajtJj6*{m96Ekq%%Ny|UYY$_|`o-v3J0G>v zYAEk)K?)R4DMQVSI;?$iEx!2WQ*XH(uO6(Z@*CALt_EvloJRaZK6qq082A|Ql zV93b7z+34KTUjjZ9R-jzr6K_NKnA~ldA-oPQ`0>P`ITwOB4jIfCd$=Qlc1dJfPQMS zaFA>6pnGVFM`Udb^pg|u$;B=B^2$~;KQJ4f))07T0+Bbd2pL6L2$2ONG&ERPjkB{d zb}GeWH(Q3!o<9rII;SE%BMFhR5E!X{W=nF`DrZY@SyY4|y4kASJHQ7TlTJvhu%l0I z=WJEZax2{4*}>-+FLz9v-vxVW5^fza6z)D=@CgclO0O0qyqDJmm}r3*85RsB6Y{}< zFe>HH%OjBz5P*j@X0+1(P?Hb}H>)p7k`i!k`!0O`)7L2NX+v0f9A51ESZKAsx8r>* zdu$ovOC4Y>=K2M#@YV*y#~22mSUG&H(bT7f!7nOEkf(mBdgwY!aa)!gQPke~V@^VWI-NT#iXkhs)>~UZ)x~mn3NBxFpH3_x!Fl( zbe&zupm4d^dOWJaiZQW%7#|;muzVdRB!HG) z7Y=&aF(7NQv$Zrkgk;Nh6U)Wav$N9}$|DhBr6zHl!DKzZH075DTpsf@)<7;oFqf}| z#)xTIh@^Al=a(Xa?t@>7@jkx@;Pd$<0~6(g7V-|rYpC5frXxJxgwRYav_-KPt?)!> zf&$~BJ;nIJWH}SstWiEPjQa5?KiujwMp&1#JPTWuGcoRMl)={=B^<#9$EgKj&T%Z$ z5+0`!Bse<;l}PbGbF?7IId8UJ=l#)?KNIM@A7WKvbfh<;a;?H5-<9f&`>uqZazsr| zfK2%2ND>y`syZta6-Gpt=_xcJy2>n`XGDbo>S`0TbtdR1@rw;J6q91bi!pZY$_{{| znw?NhNfy37^wcM?uC$)=*EQQ~zdD|D^#RL60mzp%{66kj>8Zw2-Zk}$6b z+O|Y$uNEP{VrX+9t}_LRGm~k)5QmP+7<{EL;?rmi8VXdfHfa&pY=M=o!(W9N7L*`{ z+G)}1sYq_lg`*`CmYxFG*H$5YZJp3fXZaNKOls@1G6msno0luV5-cJlNHQ$e`FXH* z=Obo5rCFFK$a3}cMB(6*^T}9QP3>WjEay+6*|NO-(H^)_A5pi8t;vH0S>EyB0*p2J z3cYgvU$K69P?{2zOIt7|#!rytk%eZs*+bC0p-Wh%&v?-yml}EzH!$ zoC^wt{0bB0HX3i42fXEI$P%hlB}P*<9v;{Q1HQ;JeTp-E_#zxmy}P+F8I zD9uA!D$QrCF@h{-&GLlgG&oXIVYFBUAGgy! zZ!7{*6$KxZPCy}?(HF%#boq1bI&*fwAHs{0S?e*lfR1OX~PCCZq zFXzK)IOO}{V^UhFT-WC%l|v$*84_X6X{2jOWjV)7q&0&{Y)O)Z^I~$Gw;7UkIfuM25#mgc^R|=+=f~i5QvQ-Pxde$Y z7i4>J8B%k~kdjl5^xR5h6;@N8w9d;aKw2hUGp7(~={d;FD@I;!F*4I~k)4{4B08ri zr-Jqik)B#a&#eU6nS_jDWTX}#BPj>ziP^|V%tTQJ-D6S~N;0WVoax9-NJU{%I?}E2 z$hRkvJ%(HV5;n z^0AEi?|ZVNupz@A8`J&qaGF0JOY*~$4qrTP_r=SxzIe;#k9TP-`B3kJkJVoIl;$5_ z$UX6Ov==ry@k1nq@-f(=9Er*EG-_%)8oMsBi2=#u)5ZaYY@|Dds-f%r{@dEJBtLOW)>oB zem;V`a}c^92VwKF5k5PU)<$Uvr?EjuP0~Cjsx?XYXkvLy25)nmvMCv{tyzd`q_L$j z1LjF-Fg2tN`m3R_Qa?ExQM4aP2yY_LTs4&D9wDun2%emUV47aG=E-<7OtL+RRfl-<*TvUSr?a?dn0 zJ-QI>&#pw(y))3Xu?L+`u0r$r1#mRvVe!W0ID>vcmhU~Z2m226{R>$x5#?-Y{%2%) z??Fm`XdjNBJch$Z58=>}gE)Hph#=iL-Jg@>gE(}6((XTuV||BkaBm+@9XpB(=g$cL zcvo-%y~lUs_{F0*cIhaNTqayPE^zqrNeWNl$i=fbcK#xc4_y8a{tcWscNwP${bw)Z z%$ch=d-^Jc0K1AjJpdd%dld)HUBL+^$gcrE^`FCzi&w$ldYq*Czn;+k-^9N~mR~u2 z3YX8E!oazHoV-9y{yghzUliwDIDG}@&Rin^7yIe1jx#$>`)9ATgeCa^<#q4^75Nfq`zq*P3hdiYPwO<5?=n3>eo}OAw0r&(-N%ug6u%v3kDS3- zCh%DUot=knp**)!LOT5%Rr486Pc7iuu^)lmUjW;BfxV}w(a`m%tQQ8(ul6uzTM@?4V9+&w&Hj+1H2NeXJqXi{9Q|>b%&g z=NMHv;_s7JGJV#jc%%-P?Y5@F|hyjGun~9((rh5@h+-6Faf}@;)R^D@67B z>6rZNBH^4dX>KL57dD`5#S}EI?Lz&cb|jb5prr^yP@pd&g94xo4TCB?0+A6ighfXp zRINmqUW1rKTBM{T!Z#vB=;{sg8ZU_QA-DYnLq^{Mbxu5ryP7as9{}HECA^a4(A3aC zOoLWfaSY<870{wRU3~h_&OQy(|Eb%hq=8o1o`r<@l}MRi4NX-d#%g_WSNa3Kfba@-RvegJEHRCR4Fx(2YkToa6(21@!VQbD=>8s5PA)~T#vh3V@mNlApZ@eA_MPj+XWKqS z#nf`)3@&S8Hf)7)a8@LN9fE2z3@{W}p)QR@;`Acn0Ffml1o768Ae>#QX;H54%7J!H z&hIiTj6ag)5(#eLPy6R&iG7aeeYV)Jn*&)LnO6ey9GZl-#6vfY7RgI1pqZKk zRhv^tu(19$>tM5XITPe+n*7Dk#4m1oCKkPOFCO^jX&CC05S42}>CB0UFG_}Ih!4V} z!w?b@1eq)x0n~7Wi9awSI^@bE@SqrX^6F%=syt&v&AHc?SLSE1cd~`*WX7t zy>;_)hr7>&-yGliz?=FKcYiP8+>|zANdZm@9RQxbt+t<+)+QT8KcA85tgWjk3%J1=tbByh>TGpC^{Hn zRwb;RsA`=sPNGFXRlLynHa1f`u5lo|)GD^Q zpNySM?YA;P=x^I5rot;W1hI7~@Q4kDqn-N8iB1IPX%IIh3-Ssp!ix+DFVI6%ZAV0* z0l_(H#J14_fzl`{Z7|aRSh5V)x6%Tl+#(2i{sfdAcdF{0!kK3*wKH>L8q`!acSo48 zuw`e5ff*_o>u6y$F&WXd4g{B3;Gju=V768`TMkH9LRMfxa%V9uTn0&ZeQT-+UE=*Q z&gO%tJT3GUHmC&|AB(tY`G~5b|M#3S@xp-16-9LwFC1PLAZ{kLcUq)q*dZy67lx@c zHc5s5@1;$29fV(09 zE)hQPR0hK}%1?l;!+GqANYD!@7S=G2a2fx={GVM2nXyY>6HouM^TN zoK~_@=ks}=^I$7=-ew(ihKD+Y@}RLLQ3a2bCuLLbS zRh&V6&rHt2uBNPPv%qsgg{Vdt|< zmh<_k3-Vy?a3F3*JhGF6@rmAwt(FALNs%MHJQ|4|^i26nnx+I;=anI_HI4EqME2w& z4e-%|n8{2W1Wvqd?FY+=rXIZLlF?9@lHBumEKbx={5xU5_d=gF(8;8<2B z9DFLL(|?Hia^d8Y@?pzzp8~niEa$Hx0;%24dS*Fpkc|{yK(VI&P=y<&Khz^E$ul}j zp`kXyWVw%1hC&)2$6EZ+c;8I;rztSb8i2_U&BI8u4>o-H9PZM2pmOyT43Q1P#EqSp z_vTu-((_4LPzu-d2(hTnUD<%j`#aG5_j&XmG-1u#520jEEh@U|Y3wp0sg&BTT>)84 zB)qB31)IVVlW)gZxhHZuDqyarai=y3&h|n%!n`<2z0{nAoYJTMhWJ?z9a4;A-JK@vTKj46e}33qIn1KG37 zkkM6woUT$l_T@9E@0p0xG%-JmQ|P~T1Q%%`zH-ANv{GOB)O%0kt)Jh+mUBDs)c0=) zr`s_dX-J^4#yP(Li3?~h*-c|HwI6om$xc3bJAFwxVrOLu2cN9L&xoHx&$>NTIQZ1p z+Jt4fzMdWV#tY4IRgM{Ne7gy1n;LOWo3JcrV~7O10~wjwNY0=-iHn2XIcOoyB(y}1 zGkBZ9lple)Yu5#dbQOXo46 zEP?m02ghAsKHir0Ie$)beK|RvuO~qwo%#AqE=$*uh-N;Qw>gb;O^#=9IwqI-m~;+< zuO+49^O;;`0$R$S$!R9F`9Ap=?@M_~kkWEq9CDnLk7WIQJt2Pmd0ZZeIG4zChLoO< za~@2zbNM*_kDBEi@^L1`*|8^we4OK$IOlzd;1vXMYAT!w4rHdLAuA(u&}n38K1`WT zxM{<2hs+y8)&97P=Bc+UeQ>AJ7q>-wVT2(V!}UQJrVA91wxx8p%Dr%#!W(y}d`0|7 zV~BuAukynUUZV%eaUWOQ>@^NI(%heQ%KtWg6mItzhZ{!Sg|Ree8gj=i`0HJ_!Q_ZT zYC#Un2^8jKBZ-~?YnD5>t*Cb&6BnM_SI?&nbL_5vxC)0YNc`Du8v_xceWg(HqJm-9>HyV@U z33gg@@JnRtZ-`m+-^09+))I>dJvlJ+(E5kQP=*Y(X+2y3-K3Fawc`vJtt2<}`%x#d!!@l84a6xd>jI|2snHnql49 zh@k5;WZgN4qH9OdwHdOxnIe>T=R(nwClF2Bk-r^N3V&3CM7;pjg#fL`|BIQO@SZ#_MvfGHa!d4`DM^_71KF1mM*D7^fY=t zw1${V>t)s~XT5SJ%b6$_B=`P9LbF_wVG;OEhJ^|714s7@>^scb=!q@eI`^)hE~KRc6Ugo%>_BEOSnL3=;RYrfqeaeOXAx6$;Qb`M{x2YO@=Q}qo!-J1vXdO>48CT zMIOI+5l1dv#Gxyfaro+G9KCi0{g*FMSufyH{{XHWrH6IoIQowt!`V~)xW?DwhtyAH zp?l)XAEcrjp`sq8?NevZ;W+&<`luZHX#Xhl;dGpN^8EI`F!-TdqJ&*I`WV4(PMM)a-$RPCxl>^!ULBB#{xdXaL#oI&II3u zgNgurX3*k(nq)OP)1cE?G0raxuCD&@ck_cPFa#F05*kx90yIHlQ9CBm8>9Wa1xfA^ z7z9^eKaBVD7h2>@mXBvSnz5qoEpVnn?JD`@xpFBFiA>r$&)hi?0e7P z%}-y&BTwItmtTDx_dT!-EgiM!TGomA>$_30U=lRd2||X&Jx>LDPbJbX<98Fd|?Bc7EZ>*C2h#+D220yo@s3g)W!77i((;5Qi;#I zvuZQZIHv)1(`&Hco_TN-#3RxsLwZ#jo__xsEPG@*YG&7A>hcb3{Kvys`RrOWFP(z6 zyJrXuXD0O6;UGIhy3xYo-Z}krwiLnmp-f;-j6HEuf)El7=Q)T7r=#K$5jM z6XgtvKxYXSCd(xPowqq1ljb4KHer3hvL?!^82DyK!z(KSQMB;aw+%XJ46BbpV5JdJ zlWdUHS`l7l6c(YO#Tw|TE!wALAf}z3=~P+>*Q8-aaRyDa!|`pvSbS}i;oB)ym|kCm ztol487uZoUr5Jg$Yw4M$K{1Kyu_aY#RI|K-xg!JdT{QWnkgdoaU4=rkm$kMn)6x+; zElW6KGqcrhJ=K4MLx7!68mkjgKDzng?Ly*DD-Cf&uZ0};OB+n%2FIY zaR~bk>_tj)0$j$8#L%I43QO{kuwVp-2K`Q!hed@8-Ey`lXZQyD3n!oavdJUB8zaV# z5igB=!UJ*N;~NpGqP7+2ExxYsqB5|2OK@Z`B9$`e%o>dM7%Lo#1_t>cAkY&T=}GV# zG6e5iomlJR4XtV%;wmlZp5BP=wq`hTl919;ii|lmqWv4I97w27L0&s8pr=~LKGJY%B~6cY`(A_97g8adRChbPJq+>(aSItNU-u?RJU35)U2 zbPY641sH(uECpd*7$H@BPPc@B0tq=^x%e{Nyb7rOM&y3=>WZL-X_q z%+tX=Sw^8A;}b&Rl@bkARXn_sqD1+Ob;(dy*x~Jv3HcW3CI4ux$6$y}K(>-UoHOxAuOBNy}RC)v@n|vq0~Z zC}CY4PGbU-+luOVXeTDaGKCgzbiREiE!LXS5M6Dj|4boL=2pNql@^2qYYSW5)8eKz z8?n6KmIG5W^#c^2&|V-kpQDSd2u{^Nk!!*5NH_SHLj_sxN()_YmPCmTgr6oHTTk}k z!(YF~jjnfL!z)h+(tKoyhakV1><+Xkg&d22tP)=4NQ_qnA<&}u-4Q5jnadmovCYId z6XI-{&Llb$=S-+`de%L6iT1~cNG}9u8WCJz#OTB@1X16hr-c#Au&`x0lhdxr0Vr5f zg@T?6$nup4rhaD1qg{xuvcTBvq#~=5hlvR>ZtFkwZKk`J|@dOvO?fr zK>zI$8R{Nu#l7pM;*FRXd>pODLX|H%s?C`F%v8k8r~Z=qL6+)@o>hc^dMC;|tC2IA z7TDDH2F*>R{xtn}i*iAd(>B92i^AENLZXUgShSs~2&gp(%X0n9bVN-_fQ=TvY*ijL z)ec2_0#wtSFicMs8t6e~TF58b5ZjSM|FuA28Sa@RL(c3f1kzk$l-3Ki%clrSa<(dG zvYfxv2+!7G;+hWJBpZd|MGa8Ve8ra*+Oe1b0RQw!L_t*k6Vsnq46o!!RIizeJ2Y-+ zesB(Mh#G;02WMgNyZ2*AW`t|0Em9k?WZGcOkH^s9v1na03sG4HD2l8o?3skHJR_79abm1vt8znS z0!;Kj8%BLXBIRc(Pr~qUS4>?qQ^>qbUOOEt{&7F@x~cE$%op-Lg)18A|B;Qh^>a|% zRfCxPSn(Ua33%wOjrerOCwTqym$7=|61?#C6KI}23HLp_ zj>hv=#8oH5P~m{Q%!cg6l}KA$1_!kbCd+e{R||4Hp(|Gq=p3)(m$x%A1#xcc%s_Ha zF^z==q|7U%`Jh3N<=Sd1wPP!^Rdy(g%rF$i2?w8%hDccBW8iee3$i@UW=BeDx**Hr z5)%>U_@~^8M3hTpIg`yyDD!a!Z!_V{M6g7@C=t<|hC|+$2yhNLUn!pBIM3_B@tlUwm&(EEnYfnnygrW4;dtKW zcm|i1!SPba$0ZV+>xTE4gk}Pp$!8|3IbI^BIgZb}p7>^P9t_^*yd|QW(@60WDK6zF zT~|8J;C;^f`r{I$eLl|h!DW^98PYX*n~8FkVvz`QCd%33ocAT7oQdS*qNipFq#Vj=Ypu6eq=@!kK_tXA&kR zIWZ|I9`y-kOtcx$WHX{YE(Tq3Hq5uiV3EOu)w&q0)0nVPWyWJl6P{7T;6=F!FGrd1 zx=e-lBg62eA{?K~gYk_fgvKy$d`N4%&Gs;SVD!Y>dN;y&Y|@R#d)o2%Oy!2Jiwsy-uE%Pc`!BCEVBtg)x*Ls{ z*J#2lT0cy0%*NEFBDA#>qh)e28fcDR*ItZ@>BT6XS&VGzyVK_sA#r{Y>j5lRrbtPl}YUMAq97Uv>*aSr8?ClI}awdL~>y=)K>i?S(gt~f`wbdanMS(Jki z+UB(SZkj*N%YbD*OS)yk!uu3TV4oWJpY9c$;{!0CO$!6%dDz5DhGvRop_B?q4ZESo}L@|zue zGMFg89{&@voSlC%NzP>X;r$12_~0R&J$oAG&YwpAnG-m7VUXKozlCg^%LciFMEM}0 z%NQif2TAn*;C~LTzw5y-Aq1~^ig1#^{v{c#OmgxZuAVxN%csu^o_TeceF7^}7;pnCF0#bUuF(!VQ>>ad9KSKpLgIyQTV$anJICuFX zaPjh>{`je@R9WYN{s9UH-#9Sgd*UJ!%Exfz>Jc2g#yaL_aN_(RDbIvFTd-d_bq!Zf zUJ*n*%a@!veTwdd-w++c`HM$!`Qi~=y|5qG2KsJ?*1z0+U8p9bTtS=1+l6+ubkSOOki7c1uj={&c zK5+5`uwxG%u_pq%_EBLE2_31Q2>qA%rNvoM$81?X_;P{jg8uxRAKjDyztIsL19cFm z&z{7d{kyTVcRThT*iBh(!|wgt30tvu-&X3#enDT~Z`k)Ug%scW?~&!bdv^+OK6?n) zljSVkvU}GyoIHILTlf5mJ^g#J<hfrwJeZ&r+K6__MsSWNAiFt%q4!kmd-c5sog zpdL}hc8pN_;LcDtxX=XCE7Bjn5drXt@WI?Q^UyNC1szK|Xp&Kln$~hW{OCP+>!pYB z!sFlI+4)?|_f#Wg6*A;hqdcZR@6z)MmzdP*|8s**| zaPjqkcZfec0zEOxV+?K|eFuh)xeFs)h6`ext;qlKw;}MNItz;mfz572Zb3TAs|t~j zXhmI91v2xK(cCc+6DL=rvZ(~AMYPx|aA3)O3-Rs#?}cMHwnFvJ)50T9gP=OQ(6kr5_4xq7OwUggiapZ@Y?eE91}c<6=o*!bkVsB0*Oit3_j zQXyV^=NY{A%^SFX(<69%%j?Kr*-Q)KN*FuyV4G7SEICW()??*ktMPsBcldVum++H$ zA~w}5q*gxN{yC=I(}nT{4T5x2RM>@vaCBL$*w>WAp>TRRirdRDofi5peenu@IPxRb zzxp6tBF7`QIUgVI_!R42dH|CawxH*crFi3~cktLJ&*AY;pT}Mt$HLdv38@Ngb299+ zsooZpA-=l|ijEW*Xp+H1IYT1Kb#p14lO>391{2{-f-?cm(kc>h&V;!{mUGDa9M9XF zmi57t7nb6keV<^{ws-Nucdy~aEwABq+J5w_XVLw_Ds=pP4(iuT!GoVXj;~H`LHguu zl+3Ka6CXc`4X4<^Dr`wMVJA)4KcWTKo}PBx(>)CG z-`L<3*2mV?R4A!!XzOUPKdlhviK)n*QUO)65gsAlkn7|^dz=aIF|IBMiUJ{xcCF0!)zmg#-u*7M5d?8`KDpg$N0j zp{}D4ZPuV`Wj88Y>fz$=j*8|QT)-t1)s|w&EkiKWWf+2@17Wc1VNbEaH`EJD@9v>7 z@i->gWAK*Vj7_mIm{J)JRbmJ-)6B?7w7{9;MA?i6*y=L`S!yhgM^vT;arMc_n^p!t zeIUxIzi^NA8+7DoSHU+;53ejEd=li4$pRtsn}DQ@1O&xX-_?;1@2WVAPF*1B}WPt1U`Aq&olndsWk zgObiF@v=!*90zS#91@#ygv>*9wh_@;dekm%6&9e4%iA&I!3B7d{^xu=I7tCD_4V@n z7)0b4;1Ng9Ezc;v`U%U@!JoqM)*vcdEOce@B2*RG=sfCY(lm%j*CRAVC5Y$HbRE1> z6mWM&Vti}_#_0VJTb%}POBnoU3<;rYdD!Ur3xZw-ml%H>#uoMNpMm6!d*>mSmB2;VeS~_JqEY945jCj zhpk8UV9EN`uw*-FzHtt1i)V=!zf5@F;qM}d@=-ExxT%AMl{xRTRXJOcv&K0~xG*u! zA(QJI&tPJl!Q1RabXc&v2uDVF!#Sk{Ug-*WW~qei41X2lSD_VOg+x>vVQEXoyqA{Z zcgfDT9q?& z1hyP!r=hAwJM@#C2q{;?K5J0RT-{`crp1BSnYn~~1eH-+68ia0p{vg?;W$lLrB+y? zk4y8#g7;VA>tA2ReI^y&*Xi+oS{#0Pcpknz_dZm!;-IUG6<@;Cn?x4kM?%Ih6F4u{dlk%E4_+}}DW%(GZKZ?62!7Cv`w9D$HlQG8VgPhrw zLJOR?L#d7N{3s|>4O>$Nyptk@vrl_l4vLpF!X=K{RYE8#R<+>{9gR^vHJJ6>61c<% zqHtM*uwwVjh=Oxg3A7WFkTtgo0V#5n&6|kMb#w8_j?eMTyU*ahC)VMeFW$yO&uqYF zTRy?e<+H>m)lYx)JPJB1F-GkvUM{nbg4kyM%sd^r^J?IjoP{JRi-Y#FJ4z7ZR3aoU z8rH%DI4V-nvaB6XeflDDJ1g+$*DoQxs{+L%ivIKSGwFKx#`SQYU2~sUlIl4BYtaI_jTGpmC_swsb1$dYVKZz+ac-EvZHt zjf3`1DkHVKq&fM57&lToWSJEkwHakYtT@gNJrld~gbu%h#ysm3n*UXpXl~+wvED8m zd@9SV)IZS}SLP5hEKHVL?B?Gs%dIgsIGjmvre?sNlq4K{N>=0&Bw|`3yCuTvc(UcArO;Nu*}B(9XNMBMW+>ADnFGKF0UJW#err4MVy<6ZnKb8+NnD9APe~b+Ut#jLC@&uc1qCRsEJtcdKFup)5lQoLeLnS5xzv|tCP1Iz zgf`6%LryZxG`?GlX%e|^<+5{)e`y5BsQNTk>e5x&gmJ_aft-yI^vM?;qy5?ljIyP zISl2pNO^G@z8>erX{3AwNlxj-u|jGyMX3~*iqfKFRAwijDZ`GLgoP<_Se{_PN|O%v z=ykYHqs4G77?glF^${M{_WHpn*P4Txwro^Q$rTPfOFQXaX&lX) zLv=krAL$DUk+QG=i8O8{E}?bGvSP#&?90m$x2yuOOUq$hS_aFKQp7B#wbi2He_{#k zGnSPK7?zemx2yz)#l?tOSPW|qhjboob7-b>%oGlu|KErDCB;y$D1>rl{vcN5L9vWN zf?^4^d&XjRa7v(aw3NS=@|D2EcI1j8gs&<<#L7V;JZgCXtERjw zAYWPuIn|Yh%BWjH>$=~dUz#IeSjNs)bD`=vK^Kl#6ISvxLi+Cmg}DqgZ)&HsnmKFQhaCwwjNiHEQt8Gz8EZ zlV2LJb-b4DS+$U!JJqA@?gq%`Q{B?~u4Vaj;agB5%lGyTO0gW+cTkY!9R7|2tV4c4 zNUTUQEdL!j{@;=068@DeKk_eR`I!r6apLSLoVs*c@O*=uCWnJKdEwmeIB{W+Zo%Q%bCRVvli}wflt)fp1XVh4{1SzPldMW|1s6^as+4frKO?sPH}G$g zq zKYIxSCn@h^1H$_IGFKX1he>HBeK~#q#ldSZIe+L1mFL10Q1OJ^3s)dpabG=kQIwep z`SYjgI%kj2xrcG?!a)q2-%r=?rLynArBnOp0i4CP6PI!Eh-Ck_*iUf72VCr{IZX9k`UouF;nmo&*)c15x%XQKQx-8+-y*W+Kv@)LBCtvm2! zoE_M^o37V~U+KbM6OLV_Jn4_mSe_kJ8#&-CMB{|OxI z-GRP6Td{xtPU^UR6(qU9{$B)`F#jk1eX?9Q_}sS}y?v}vz7xA>Un0u)5?IgtI9r1r z?#01#2k`0cFY)N-&tu-ptHmOc^*ARu!o}zH6Pz;mr>hWM6boaS6PBVxMA?+k#~a0` zu(1vs^j1Ah*ffyGXrYXy_^f1DGZWz^3&4;ux57oi*50%LE>9I!a~_UJ_@*nxC-I8f z1O(;lp>0SOI=qUBgP-R!QO;VmswP?(GpW~>iG6{RXcN1i}d!R4I`+H)nx2v!s|LYw$;KsXd z!d>I;#L%&K;O3!!#jtU=!#mg=TC*H_ixQy`zVP;?`@Hk7@bDM`r7{?mmAPn{T#eH5 zOms}2g!1Yf;dt|j7dPNC`tjQ5uVS3u8$OvTFex5XX@gHi47|$CxHBmPUd0B;YT|{Q z16x^oB+7(TLUvC*LP{-2o>7Vi-gy-Db0?v&As=alPK%MIJa5Cu z=<&Gwy+=^GrVSC*aqugn1@5du@tmfupN~~fuf<2deuDRCaT}%!MnX;;UjF1|yuSG@ zG||GmbYY_)Ork37&^4qAqTW7*CLlG5NS|6L7X1y&rr@D>9~Wf!nitm5f&KsK6o4tZh922eg6;aIJ*neR&=0i)hyie z$O=){jk79YD2ztQ%seFI$D=?IikE`MW3%5Ve5?)to?3^8RxdzfS1UT_w;&-a24m=% zc$&hH)>w!~K6wrge)2TdeeejT{kfs+9JZM?2h!oc4Hd^E}Sst#Ug&i&6yaT)t7~~6s zUIllzvGDZt5Dq<=Bxfg|3YA<~n)`6ZAuuvjXqVqMdMI22 zJh0}Gbx15shYyqDNftzyqG&%2kuh=vse+MLlZ({iG#C>N=v*`%6)mOkm-}JE%vQXv z)#61(IOdnzvEu&eSh;QvEhL@jnBRe_=@StYCr9<77A$^t4W>Uh7qQLhh;K?qh%Exm zb6er72!XdI0^XKrjI&1IHcJp(ZQ;=9WY7ouBR?ep{!zYgO_SqRM<{aUHbR+ZL8vMM z8mkVW`Uup`s72@URy;DR0^g|oaUyU$jw$?TA?J@=xj%-F8-@t#BO+wMkeh=MsP{y0 zyiAbF?2o|P7=Zw*9063;3C2(aCMXe}qKBIy5VABqf*lG(Br4&i_J*4F+gEm?ZAm)} z*)dRNnBY$7I8B&CiRe^4WKK2aKClo!9^Z!f8x~{ZTTkG}lRMz7&4fSQqbya2@MH}_ zlhjaTTZNNJZ>tQ^nK5EtTM&=f>I_7r8pJk}%<7z2#FQq(R*?pCNfP2~vS^G*f~77K z;aO&w%hTYj&qY#g4q^%u;H=IP*Gs6+g1N$pxH{^CCS~H)AK$^ow;x5<+PQf2&ByW9 zPand=5CSWW7jZS2h@VJ{|BedS=)9a+bx5C9DXzhg=f}d!CKJ~!q34h>wH!%}1wy+q zzCI7JEY(z(Bf|KG0ytX=>AG3ampG9#wGugP<`vA zr4BLE(h*P~M|iOsEgPocr>onL+f{`1pFD!6e|=RrNHw-5BYt|0urSv*Cqhe$cU40I zji)pwcT)e=o+9+e+0m~g$)sv=3Lgecfa@kF!ZK};0FRrQCB8t(TUIB0h-CNFz()OQ z>YNI(oj98o_MJH}w}1>?bAp2d#iU!g-2h>f8Ect;t9Q|snq_vOzKyEK#f zq!^g%>HpSD+tkm;)10ERvkXbJkhZO%h3ULOi*hE(C8FFio616cwsmd}5*8Lg(MJ99 zv}D|s;)@}wI}p(vi~J4LA1fYe`4)%p##r9^ak=ZLJfY$&u6t=OHjfj-2*V ztbgqx#L$1tC(;wQj`|zY^ONw@OOGO%+DwQl2#M4#ldIB%p7;b)pm_1c{dnH|TJe>J zESLU|Wi}c!^HEB1t6#n!GuJJ^{Pj!m&>K%+bQt``Nu%_S`yreexIFPvgV< zm+r>KuU|mP;zlvvZa)4K);@C&X07VP>)*bL$3J=k+3op)EKi)AiQ)y-D5SpZ|6%Vx zz@og?wQ=0DcY5rN-g_C!3@|VZ0|N{lhN1V~K?OlUL%P|euHI(7@4DZId(GLShiPMO8 zPqr*)&2lEo`GC*(6eINU@ra2xTa_~zElF}FkR{11iDOAVbGRg~`JRd6;UqI(Gng3W z^uzO#F6YIr%%AgP!dAv-KQ2d-xiWuFC&_8{lVmxk;k4|}@nqRt9$(9J!_#v-2B&2| zNf>jUd@XTfd|58XWyo^*S`yeyI!l6E#^t;?y^P1CA_F znvCfvEi6K1X&K7O%1~KL@7_&yFqTo=no<gL1q#YakeX>iqLIdvTn4v6YK${k&Lp=as2SWgNp>?a zF2VOqXmc17;!I#O$<1M$k0jsOUlQapui?bE{NTVY*F##8^EJENzcLTbo8wA3mh{|o z$tvl9h z-LNLY4Qr!32>w_VuEFYv81#i|u|yYvSrIDCND4zwy%AFz6Hwk3kDS>FFm}^#v^NRK zi|F^cn10iX>9@Tk2Z@VI5VxcXu}dnik-z28E;f_NAxlf4?yo@5@^UB%fdl36AF6== z%1S6!Rl;v|75vv#L9xCHerwsU9DXay;5S$bzX96A&@(c4pbTnC7fJ{pp!b*M6^K|? z4jq9B@q|UCNM2}0;xMp3!?37CAeQQRBbXT03=}{;n1_%RxdOohbiF(e!Tq^VFUv=0 ze}O>QvchX9zK&3Wiu_dlMS>h>@;G#$RFKJ<{t`jP3zC1SnZ%Ewei4!*R6j-})hm2a zu^{2Ysjr5E$$2$B`x$&4O8GEC`ppPtOLMkJ@5@2RGTPhqGZ9UDyJgu3qxTL$o|7B8 zC<9?j=>2SI2DD2v5z$A_9*Ps$pM$7=vn74_(sFSKxpsM#fM!_*B!PeioYcLxI|Bn9-xbMtrAeRJj&L1Aw z|7Y^&j}&LmnVxKaT%$7$<%` zg44fH9k2dO>PUUU19j@$MNwxa=l(3O)ob@mrrIPojx!({hqTs~{IBbsY^cz4W?gCAE$Ov z+m8H9bvZ@X$MN%bdvS2@*ZA?kcldt4v@HJ`EW@&I|F`&Y-?upU!?!q0iyA{%h2Mk( z|5x#!k>!UE{2=6CUf=UFKKSB2YtSKJ4v{<+N4G|WeH2m z$-yod>tlqlf_Kr9^&Jvd=+2XRRJ5C1p;PW64>}HQi4i<3taDcO`1uR@AV2sl^jB=Tb@lLj|wsC}&r6a~#+rU*70JlKefIHY=q9cV- z9xNv@+G-q}e4KIX7_(&vW3v4?1crG-8y$pjy$Y$O7=&nip^phc@1j|F`Q;~R;-A5V zGlwv=yayZC_Ti}~?!%)GZ^X_gw(!4P;8&c$$Dh8AIsG%BFos}+_b8$9>sqXZ-&ES9 zSLonDn^2cBozV78nQuN!gry%8v>AaM2p=|zz?`XP16Q1E7WY6jf1LQ%D%RUD)?Z%02$7d2w(HbMg^BI|qTZDd(3m zHUCRLzhnubJm;EDIbm*wK-gT?B{xf}@Zl~(R%K?=b&GPgIA?O4$#Qwm1UZxCoF;}| zvg#k0gE#j7Sy;s1_xuBR;@zk5)(`LFg}=X!`(A$-8(+L15AJy!-=6;-E4B@xw7D2v zOFOXcz7^=`nu?@M9g@o=8h7XClqX&{VC^f-js?B`k>zwQ1P)&Q2VrIr8fF@8ad}-@&F=w&UJ6AHvqR z9>caY;Fc(}vD z&IS>2dhweJqK$}xet!w^(U>rP6kJ@K!~vgdRW8YLCfR-Icjx5p40m5ovqid}w>Tg) zJT?;EDnCrLvlQC=hU_GCuk1zPlybO-dW*yE9F@-0Uu$q0=P_qx4}78&Fcc&T>wAVa zONUTnIF5YsCN3?Qhqn{;h#WHlX{mm&QB1%eEdNMt@I!WaHkREtgwIZWjdu@zgpW>t zj^cr-h@O@XPrWayXV$=3=?O1gFnp7>LSy{a5c*B4o#9LCL!gH}s&kC+^>e}q=ev-( ztQqdPdbq`hAXpm=4^J0(1bM?vOKTEsyh8k}P%&}@{;YDuPc%N?c-Ue?WDqiZU10F? zM1Ye$6dqP^Q&_^CHgEQ{4tTQWwbC69!CvBH;3S2EuzYsc2f!-G1(O5qsjhyoSJOHj z=l~C`7ixuEQ7;OnmB2R06=S@u;Gp(^Yq$?4dD9x?WsN$TH*JeLu<7wF*zo9PJoMsY z)Q^D}?_~uSipP0#I(NMij^Vzjm@^ex+N_TBu!L`XC|n~0;1R8Yb+Ee#pR9C&ZK#(3 zA53YZ_QbdVM~n_|z&NFo_((e0&k=XokB2L@YqGaJ)z=B*d~M(nPh~_Z5Re*%4Nq^u z${nlm(C&xv^qyys+gJ)4m76Hbfy!~v`N5j{W~9Pa zIGA&yuRVO?)bNZA7W&~Vr{hTVc8ONP%@6{28YiVm59=^5(H`H}5ctKap^VcAnK3uD zkN7wg92E*rl@B)VxED{n{0zdA^%&Z^4rML1@YboIOwb}GKUEys8kLufu*^6?db7p3 z%BV+DO&-Fs;}Knwj*yI4ah+OUh~(OQBv$7lp(;nj;rqCXEJWnf9L`IEt~eFWi9ztr z(;}ocNgVLXABP5 zlL#q-DCcKtFs=Q3*lTcOJUwTPB3#uN2W5i+!SsAEAKppp9Jx%&v+gt>)R;w^{s?*o zvourg{2F1=%m-?ly2_B$ULdTfBU{p7Y4n7($s0BqKG^i}!}#pzd)PFi1h185;;+FW z_;Fe#cD=O<1^3drPtW(Lx^%de()+;7QlwOxP%u3Ynl@T*+x19TTp+Z{C1Ebfa<(dG zupCR;@(SqZ=fb5b44p3xV#cmzf+*($KGSI9n$Ta2gubHdn&k!SriepM!%_|d#uxNa$OY2GbZzZB1X_zLFUyHxyVh)Z&yH~{UD zzdVm)^lp(_lMYLtNpJ~vz%7$UU?DwU7f@ZlxcV)U=zXDWYd2c%nTz~6<;a73YUk&8da4DMuVK%CbP-1wru04TNW&5{hEAxOOu6z$;&ctlknVetro4 zrD4dJUj%&%t>GORNb1Z&czrB%4RJ`OIm~2v5WTl3izBaFmhbxTCBztG5T9Z|JiVty z>mw0wNI*)eQIO@jSb85#Fzb~MC$)!@%EQTO4rgMW59MU37D=4T^qfYL${d&dC24(Q z-oxW^UR(zIN%EP~GJ(rwu)hqK<#T!L$N929r(y6l`*Apf^OKNuV8}GG-oHhb%eJ#S zoFtb7G>6Hwl5}S9J^M?NT3TyM0-7NSa&|eMyqEF#p3@Eo`*U1b&;N`pXIIvj^W%Cj z_?qL&Yfj7MO3QI3%{e`j;_SzeL^;cUFrm)GZgE8k3d@Q_`b<*>%8N@-U0#9mQnSW( zPHB9FcDmV+_b2F=ebYVS2maYk-&p&-VKE6cBw;`ya!=@Zr_XGpS|b;_j# z%W$$>65;GhqMXCnUueEXwAWB70$>(5}`k$%IA_ zv6+H|)h(mv?ozWZc;cc0Bol;II6aS8=bE2G`h__{sv~AuA)@;W&E#nRH4GF&H&l%9 zp)!Q7szvbXI;aUDbR9BOgU~_3ifV)}uZE_t5)sR)pkw)szG_4h^h>J{P0#A6C6(mQ z;Y{|L33Q3bJ~PagCuAJ(6ZU_#LHY$%s!z<)(L6oWu;ryRJZBe>nn{m%*RjH~f~Bz;_vc z$S9+7D#eG4@ID$_YHL(qKJ?Td>7%GqZh+V!H@d)fP z^n7snHAF9@ccUexh@4Mzi^ei~K_TK6mBYBA0a4wBFm&XjwZC0hmLL52$NxZ<^8ugN z^~zb2<y;lq`X5Pf2}y=uC&h09Ce`;HK7fNi9mf7c2PxmfICthOE}c6s zj9P!?(WmNR*6X8p}V>}FD1T8}d!E{SvQ z6t+T_BKaZ?#pMaf=`WwWh%4tV0p}^N3+E{O433{UA;@w*w3D@iIBz!1m*ug>4HLgV zUpY#h%AIH?g1Pfqc7!e4k6k@WI8SxIjN_NCQ0M-_*;86-+u2LFL}@Nu`5x!4{D3o8 z4&da~!#GKKoxXAy=Pw_@#q&piQ^(CDISZ5@zDz%o%Q$i2GLBxligTxci)ScrCg!gm zqw1d!brc7H9_4aQ;q#SfIhM7h)#=K+#r z`EV(g>ts3CYu`6ml^##!eMezG(nLFr{g>H#o%-_ddCKDq4*hbH{Ey=xxNpqk!G{*` zScne+$0(nZv^X3;furAlhXdbzgC7rkZ?+oWzZc)}_5SaN9rC#k2fsJF|EmXl4wqn& zGAxoT-~ZiS9NPCC{`%2-c;We{v1-!*Vsc{O7UKh-j9}avFkbxIYcegmtZ7-WavG8r zR||=aw59bZSu+zJ+2L@E^M{kp7Xb;Oh{>lH{=zgtATY_}ZwQ0CE)YJ3P(+r{=3!b1 zZSaba&{mAZS@aO%gX`*(;Zv?hL|YbZ;1i*&ixaXLd>CU;bBg%a^WdqeNMBTgo+nme z$0yI@iBDd}wl|(YW@9np^HUL?5DB$DOb~AVK>_en1|lRR1XHT&QJtTUIn8yre|abF z>nOo4+E{*7mVo!1$KrysEnvfN!c`{^eCO$n7kxai!rLB=K2At+^MuCD7eTHb@b~tB zPp~h%!WD20@q}Z53mn|-;ppK28&4-p@^ZvvA9vXLc*4oi4K`Nxm}GAUSCt=J1AH;T z(F)`2Eilo^QV`{LPP$tVKACFtni$#@qy`v_1$>d%!!;2?Hw^Ko_mTlxgMo zI)Cy-M62`o;RPw^Sig<^*0~K%=t~2 z7;KHshnB&&Gzwl7dMKtO!KGRc|CUs^R7MF>J91_YVrJ&TE?83l-+P8+B0O4O`wN7+y-N`|JRWyfN~ z%qxZ;%_+7fkC>MaReL(3SVQg_Ngld@PiW7*rc+MnrWYqdcsI+fWC#MBt;yNKoQZNK z!<$OVi(Xual8tS6ao?Zt;#YgH>x(z>+P**IjYEIIj*p*1-_skh@X?jn z@bZJ`eQ*HU+*o8c<)M412fahxLRx3dz02^%Cr{%2uXf}9hc}=%&xotjtMMcK)?Ns- z2cEhYxoMGtEPrCxgZSzA_xOD8-!Q$al{QyKeDdwbf>2(%eFd7Abs(iK13TV)0`Khm z0IPOx!j89gV(Y7q;OUQdW5=JKM&Bc=@c4%>pl(SEJ~{m@c7OAh7zaK;Za7))5y)~Y zUI+|PA|NCP_O8xw_xFZAJ_cTXp72$8B3iG7FZ~wm>}(LKQ47MHrCXRZclUG?WIO*( znI!iKR6s%ZA=*%AVs!9QD#YQQ6YM90C6%`AdI$|&Q{k%*Kv-G?e4+!;wrm#WtzUpq z?&IJb?vBVp0~Co$D3Vo(t4e{cC>Ax@dOV^F!jnPXD03YNKeyXpYD%SzPCZP8>8PnM zL(9DBc<8l9vFLv4>%;FOdwByiQ&OOa3lw24N*^d_vlWmM1=qL`SVVXVi*Hj&Dmtl7 zvuD)9(t0Gezws#SX+DqeodBC?e<81=3RWUeuZEM_2NP*+aCDl0Wcxd@+G`RH`Mcn> z!WHj^DzL=U7W&)%fLIR~=mLG<>E#3q4{KUa?BK~(?MhE!;qIjgfQ#Cf-~*3{0C?#9 zprEzEGr|{lSl@;5t`lMHV};TwMOe792h+Nn%?BMjjE7UO7reCrv}U=%C)5x6)EJDh z8HdTvmIB^t1@5#OEe;I!iBwUYy<3r&V;ttOscUZYuVT{8h*wGx|XUQamBV5A$1PRUgvee0Br7KjaQRX^O9ImGa zm0|1aj0kF@Q?NJeL%d*3Wlp5_O!9XX#Jx4G-K5qFNjXsRFgho!F*##7%}D4bvy>NMoXVVWA+)r3?#SvkZ%FP6iCU z`3UbcB8;GHO+erK_n~a-OaynN2(p|B3*M+3Xrmc5KT8nrOqK`MM?=*RBhEu{GzE$S zssoCn#PcYxy9TaFfpAYTYx{?k&^$`?LsfqZ5}LDxb$RW|nb1@x;tz^(!Xmq2T_?ur zoW$83ISXpQhf0r+bVlmTJQUG=c!dGhF>XS_C8V6z(Sk^9c;i9zZ0m=%$bhn0RhTn4 z2YEHQVzY9U*6o7g477Jn!|b`OIDY;RKKSxo*!$a|W5sOopH<<7F-V)9hctTrCADOc zOPlb@ctMm$(KFII!~ys3ei+}L*pJo)Gf`Myg!zLDFtl|wruELi>L>2SiYGUtVQ>~Q zXO#&{b^d7R80w5CXgyo7at_o6KUBAuqH$pZK05O$bd5rl=YVPvV3_j zNpA+%hr#t`FcB^NIUdKCY2-bJF$vA2v?RN4B*i%&j>j&CF{B@Z?>Q|K*9=Z0>m}33 zeEFWi_nc;UKGJ`9T)yTo*&ePZlj1V1v?^y;)`5v~Cd~!GTT+0$V)NmpY*}7bRE&y} zQWWG}lcXuk7v#37nDVHsKoZqEIxZf@)O3ndi0m9Qxy20=%Z7Ubvh$`?Gerv?Q10J72S# zRY2ty=b^A97ghP$XiBGduA~GkO-#hv*f?y|MPj2yiw)u7SQVkgvZx4j)BEF0gAP;U zqfncuM}2A{DpTT6k{FAkK~NUA6(5>{x{7 z#UZkQ){bKO4VGpiwlEonvQ%hG;)J}EadDNfzGm5z(7_S}tt=A=5!TaYayqiF6wwRw z=^2%c*hM+?49Z2^k~|oe<{_?+{Fmh;et98c`wI|5*No_Xa+lNnU=d=5D4)S9gb&j5 z;~KOpss$njsu8)IuKCc%J~JuKR>e}zgb~5=Br7VQ9^^Wj5w^mN@PRUD32fmlt-NnU zL?26zn2BxOl3YPbcJT=m1R_~K58r1o9Y)z;}y81 z5PnOG;onz+fMul!?5F4CKn2yc{5nFZkJ-9hxwJ@tui1|+=(+#+BY~l>5OK?jgv&&@ ze$h3uTu9{<38@#BcZsI5q}&UWTCBKYp0pgZS|XTb7&2@=L5ZAhq;_v6Hhrs7Mp1sI0ljW>pB9t<&{C|inX9D-!nO{MdLNlB-WcVOX z4(CR&1PGJdQo4lw%)~Eim|rrJ%12HC$4*eX(}LJOd6hcv(s5iqeG(UspAhA6IxhS0 zm2)_HnespPE7g(pYs@0=Y>Lk==gZ>nobPpWeZt8zmvQ3kWpc0LG;7^3!F|H4an9jq z&z{GH)8}!KejFE0UBT%y7x6RI`PjwdIQGjaoV-LGaq?~7yL1&lQ#MDb*{7-R&YwSvpRSyz!KbpX z5#mgOGkMN(EPUAKaI#$VHw~I3)CJM~{SR10FG)Ch7?)2T$H~iAaOUJC&};*~<2GJ3 zA9PB6#~&Spa6bLWxnKF7KSmroe^Qjmhm3xIU_UKbw0Ipjh<)Gh7hm`G{Xo}*ANC!> zcZ9wB58<2rM}+(Rz8`K%g8!@FgFWTpp5OdnKHyV)S-eJ;A13#c58uPRo7N&TKNVIU zlkrE}+YnwHjphxrF?CZXiUt~yG`|?}3rmnPSdZjYjfm}|2ldJ}(3TsKNSi5LV-{@FR0wHIg}x&nAyZP} zR~rY%ykOdBXCs6UIPB&!>A^#rtAP3hVe#Cuc|KOYum$}OuR&`c)op48aw_wYmPao& zCfZQYiz9CsVh!=oM#aG0KL~n#3{rztm=>bI+F&>A_O-^509#yg9t&9A4LD4~B~K^( zUEz*x-fo!cVuu)KD|nOZtx&?%ClIclUT~o}E z_5m1Dv`_>&BRo0)8ofWB+x-x>KfE40pSlm9e)cw=e|9@Qes4Fvq3bPc7i074g;?0t zi0<|p^et$?J?nb$?9-d^%F8>@+*JkNR3-j~0|=;$g=cvbtP9kzrcJ3!Z8TIfObDBi zDGuUf=^L9ge|Q(`kl0;@xOwy<*p`LvhnAzVrylLgJMi!e+p+(rud(I9wOF~S4+Zr( zh{%o<|B2A^@PN>14Q*r###C|WUQ8#wAk8j>XK57TI|{Ml#Vx2_HXQ|2FD6>nymY_N z!;Wvw6X9M35#lgDRcR~|nseYn^MeoZOY5x?_2Yy6d?}81UbxVDjcv&i2L!SkKO+zN z=~<%uuxUo|0f4pbgIbIT?W7ln1;vQyDL_~^y%6;lLEW7V|4ySI$|YIOQY?}zXQG_J zFL_d4C5m2r8Imk#BAv-{cI82!98XHLB==Xr*js~~MNKgF)WOineM&EE4XIF3yA56R zGTmN`@J17I=(iK!kcFwsW?}h*tB_fjkKVQ2`10_da2`M4voGGm!kjcb>28I;(foZk zCIIJltU_T{EUIQV;>~xS$N39KaP;Q`c=)mHnA6#cZQD2F!Dn}15sg)2cMBYYUD2|r z9WQ+R3SRm2Eo^<^LHy~vkMYr=Px17JFJtXf_u}zCzksC=uEbxDe}iW}eNAZDr*)PJ z?d-smaCoQ{aAm@f5916}2niOSKz{^;1;LOUFUWEyXFF)aLl7L~4`*jbXm#O&FlX{u zYL;_aCd^rSg~5cmDl8bGdaaOQVaxLIc9Rfc)Z^h-A4lF4dU4N*hKcIIR^QQuae^>% z)VU*lY7WBk^-$1!iK|N$gpq%y8pc>ZJP_fJ$5rlFYYazPgcIg&?S^4`HuT9+NT*HH z^sW{>@#YhF@U@4r=jew>UR)_Y(s{%vFlF{s_=X3;IoKcL{9Q0X=>pdv4}>RbFt~L9 zXK@N8Q}Xbq&-aM)5GHtA!Zt1dBUO%=?Ck`f&_Fna_(K^JL2Y)%p50I4%||z5ijNJR zq;=#QZ(AI7wZPX@zvuIf*tL8qhI*IbmfJ@nJ|hW_zqC_GHL+xqv%e<-B7(%n3fCYn z*in7FwSI68a;Ix2)OOUNwP!juJ+ux3G~Vm(Uy05|9Y`z56ofmE8*9FEeqJgcjGQnM z4(<+c^L2xVpNH^MM{D2_#mv;1a(EcIM|fW9bn6F-HbGG2(N!}s5sO!v^X3wH3kId(VTD37FM`PU9_R4wJ&H2 zt;fwqu@=X77D7A4D6GTdTC>D~uKeF)QM6vhcNB<^q>&x8iKRS3W@bV;-H42VI)t~T zA!{*hz$hJm{QEc8k+4uZ(^}Pz$tnkUB`T@>G?Xu$Dy+-dqCIUyN*CDDZbp7^YX#?{Q%o(&pyDG`kY%v+AKM%Yd}X<-(R_IvlgqiuMr=KZW%cOK7KBUjSENXj5=CB1Cdvfj-pz6RvCiO zyl^_bEu0bB;2wzqh^OaAN^=&Bt+|Mn%8w=$J>tz*_J;{`ZxUT;3xRu!ak(cW?;n=>rlF+24($qC|Xj5 z{DtM>Alj_%BADjni|d$a$p|Xb;;+AaiLQrw5mKRpeo7+pddm>mNbhhp(Zb~eK11m` ztSS!b61|XNdG)hB*U9pj=qN#!8)D*+m_+kCIStVX2||X2$!8{$nOv4&5}Cn7wj{$j zjwHwV9g+!1c4d5ahZEvVLNhp>B)BD^&8|$ZkBJs(_+F5mbj{^3AuNe-NnSJfT9(WC z+(?u&IGp3L-*B-1@ciU8mn-ug?#HAny9_308L}Rd5a&3<<%Zu8GO&=wygKf;z)4*98Z=bNqkPnWiesRellOK z16!U8Vz?+zfa{u(ZW3fUBP)a2Z8D*#tQ@IaCZ#E>sX;+uF-*n`f%J6qyh%+p z|2G7eE!sw|m@A3q|3u(6aa-lQVX~Zwb3v?gd#*tc_0-1UV1oKaa6Bf%88Xdq!kzOK z9|NfWBso4jTpr}f#JD8KIS{y|DXsl9*v z1np5nXg?9KxEP8h#lj6-REnV9Qt~%TX7E9cY+=kY8WH`p4_Q$P-C&u3cAx~|%UQNW z%9s?2dyW&eg4RH~j-oV?l$H@e;S%ALFY8)|FE27<1kgDYVBKpt6Swp(d~^ z5jJQBOMrwe&lgY++zb?-o|$3&Wxom5B^NR%H-M#6I7~&)TO~oYjCI5-5G+tG^u$>z zg+DBqVb=K$qjoSt`>AZkwetTxo*C-pWnj4#c`fUsp?tMe9)mwvu!IWBwn)G0{!|A6 z))%KT)Jv(K`l#Qy4g}U?4_=x_WfTg1cD@$(OrkTHPW>*&CT>MJ;%FS%VxGZT^NG|R z{*Qqu8pnvCe}{IkgiuO-PvsCagXXrYDGkfi@W%~Fz6Y^<4eP`Y(sO^1KPb>VqA_D= z83Qy=C{Ea7dKaR!d;lvS?rIpSgoH5_u;#PdxcRZYm#3-)bkpo zWw`(o+eazRkpqGVXM+6LkN@aO{AXl2Tb3XA`7pU=viyutdbo%)r&#UbvfwFMPg^KS z5Tr&qpU248th3E=e#d_uS5939j{Ry@;W+*)E}p(BjF8ReU7F9Rlu|5wZY8UMFvrW| zA$aEh(=se9u8yBi06%<Gli#dY&X(S1&t4Uz zI+NzZ$#S!0H0zB^!rZJo&V;W#%~V*3|9o2Hf9B#T9KL!IKV3d1z8>HL`BOe@z0T>` zU8b0Y6w zD2z|eWy|&xmyh7|C#f%*1_eZ$D|g97`0I3&n&NtAzm zfbir0I$6H=+b{9$Ucz@@39|f~AI#R}(z2Y%^1r?RF7`8-zVCB9_2!f4SUVT9?(fBv zdpc3Lya8Fus*tjz0QP4GKBWeacc&4Qbl3dl01PyJ@gPIbNGf)rPtUw{Z z!VA8xD_0yE$?_i2t@M&Srv`Q1&6v{JjN%GDpod;|b7=EVFF(5I7-*uXTwN4`Lc0@^4U_D~3yc0QfA|Dzw+tXGIuLGtHVBFI6@>Yh z-+qLrp4pC}RSWU*D^K9f*Pp`PuRp*~N4~=QZ$FQBUVjpwe)KBdc+)Wi#Mv@W!MVcZAd@!7)D+fm2i9MVn8X;xGiYnc&xu0ROspq3i8k76ls< z_1BU*gtui1qIz)GX6$_bIXwQ>lUV=gdZZO4BRoNkl!8RmchzI%&h^;#&f|FQ`?rwT zPA?U8GzM*1NbaGRn5i@u2w~GRgmljbm-nLo`FrsEw{PLS6Q5%6N`+faDB{|31!11rNiUF1Mi^*5FxkWZauzcy zS6EW&J9C9Txo?93s#d!1p_i}O83^slgl-|dWGtkY%*FIFxgZxs^)|C!jPY%5hXN#}*Oq?@W&If?nXX%$3*x*x7ZDwK zh@^fAX~{%za|X1t=(;rvp4D;isECDjdLF!sVxX-vA+pAV?yUpp+pz|Vx2(Xf_nyPE zZ#;mE!YHW2d@+wU1Ao>9;`?A%ysmb|#T~0Lr@a=f1M~3suI+g2@hxbYQj2hH2-HCe z+C=FQm8QqEo>sK?&p~W{5?Ytc!oc=5c=(N{(AM9D#rF@PZ~JOYU*3hfg)Nx7X(_rl zFU8ttwqnMbZbVk3pk!VH(x(&(i3(?>2fXPw6r>A*A|wz#LH-ET1PhCBCSKKHLGW;Q zMp|+lygi)ZO>;jyJPd(Ms0a8#tqw*|aKJU~axVmHf)E%I03W4~&_d@k4}2(p3;Nyg z2c?+oc&vSNBj&B`MNB~)Vv7?n$_Dlf&XzD~UT-8=a9!dH0d``4hILE}Fq z75*uqXq+<*K3b(9fE~j9p-zoLbb=1bATPAcn~JkcSW({`zH|sdk^Zppvc?G8yYb>T zA7IISt1y9n=S(8o`nY1l`qlXRUp~avd)MKwyBuJY$TDKfL-QcSZM6@vuNd-m(M5*AYbcH%zgZS(O*!w!*{+;(D zIxQNlbEeZe<%!t~Ib%@DK6y&dizZ)DCt_aiyAt@^bexU()_v3f*#ojM4Yr$-c zvKRv=Ust#(z2F$&EK+|}#@Q`sojViGRECqM6F&I-BaEYZd4?*4+=*M5 zg7R>KjgLLNf@vM~am47!cf&7C1qVM5I0bl#@|YC&)T)H*7UGNdzxfoF9_F>Rc6t*G zv{`ob_Y!hGzG@Y`X+C;u)NrM1Cd&Eag@-m+)Q`z`CfF4bDvYzAB=qsUDPNXex%big zvFD?A@Yqw2AT!5^_dfcQxPI{Q?Rfn8o!I^MOL+dRm+;yLd+^Mj-OwaO;qyb^VqnV} z@m%0}6P1;Sk36j-F9x3nYw#DPKj!54Aa6z_s#i85V{SFZ)0`V&F%Gxbj>I^hu^2IW z1l^B7*`>GU%|Pjb zT6m`fqMY(G&B#Z?z;whlq@!==YWStAQ9P#_X$@J(omzn2b-hr>1k-QM8P<*yq0@)p z%dh_ePj5ST&>G?3VTt0#0u)UvLSyeV6m*m!V|oEX3-m~tnu)4KjnEcHp_*RqrI+wI(EGMIGi=E zD49}#fsKohTato>LvyfTZ8vs(`XU;J+R(OjzL1{bb1)u$?m^YBAw=mW0EW0KJgxQ zeEbO9Qax#2tC2G|A5nD%=&zCGTDsQM&@-K$|7=zN^50%VTt*xcQsWRG7me7cNa!P@ zppTA4lpz6;21J7I1Pt$7?a+T zwB~CL=XwmUrv%?~m?XAkKgc{J3C`d+>~c7RuQ_jy!{BRqxTmlZCqK@EWm?Lv5x8tw zo?C2gBkPuzl~7nwu^`TwaLp|&LR?A;l8xyops>QiVq}`Kkj|udOafBllaZQ0eM$G3 zX;jaQ9OP%^2{*@NCehhHBh@6_?DQ<*&n|}*<`*Cy4fkyd_aV2N$AG{jHIwJ;@;#H)Oky*+&7?Pj$#k|lXA5v9v^gI8Gm*`G z!r`2r!SOh)B;XlLcC*WInFwb{GG6A%;X=lS(#iVBIGmoZt7{rikXMc3LRyOpYmr@0 z1{3vnR#^!$$_rpDqwz1H`N}Aw`BF%~hk`7a3aG6GZ1rD=6z&fi`vjVw?50s488dT` zlx9LgVk(l7(~)k>MowlCvNNa;QgdNS&PHZ3&8IZ#hm;(Y7-_E17-rBIB&5b8xiB5Y zT@5hKqdoBAYUr2MKs!)_Fk$^&iwN2m>jxU3Ur`6Mj<)$QOF@X<0JidGvXn_-CTkf? z)@tb)#$4+vfU?_k|^p}l@hKb#S^*bMepF0X>$iYoXIm=Q?#%Hj!== zt%8=~vp&3T5u-$K7Yr@ci?zO)IOj4##KD;b=7TipJ%Y!I_0E-S)je2Z?q9Z`Uy=>= z;w(x-??*HSEUOZ^I2Z90KVg8@0rC^?8vR8`=%aC3MDYfxO+%EYIMkHN=%+pM@NB?VUrBWzqCTc;p>aM$eY&y|L4)N`4iqC`c^(33T$C&F1aZz|B5+OWhChy|m*ydA zWjQo7KltNI45bgC_n)BY$(VP~A{;$`SRC*exZkY%#V`G`X?MSacwEV;sQxg4$| z*ZcDMW5Shra$Ig7w}bPzM0ID#{^7j2?Z2EgL*zpceZ}`@j{gU+HatUUmVf;Xda`qX zgEVGT7cjB@6O~C5j`iPpGVza{!D9M+$}E3e;7Q0|#ZF&ji}F)AbLkvS(9_ue;{ic{ z|M=sNLU!dw{IH*}j~2H5jD3RC{%6>`_Zxioomtm>-#(Ud`CeSJ-**(ok}p4e`;{Qf zzyAI!e6w#azP+Yf{=>K5;0VP%#wR52-;1Bl9>S-`zChl*Dip13M(L&*!lFEd9yF|r z#TsTw8=B}rUJ2!b0>skGK+f7Wm=@JRQ;~#(YI*@FHKKl26H2F)p>g(94DHy6!N)eE z=l&tew*fx+k(iv|1E;(&1k*;|w@Qzg**Wm5ih`=%AT(6{Ya*eUo(f%CIx-f~gR(VE z$Y-c2-j=Uk#Opu(4Ih2~33fj5Fe>R~vL?3(MVWa>NirguUQQ#DQ=le9MQTu_u)#8w z9i9*Mz!!mTIOA#y*joZN7J%Jk9Px3$ZeJVB^PY?>Z)=44yCYB;0+o_B(}8jD57EIl zC`4G#vNf%@zn8F{b@TUtv%&)|3ST&SQ+wRK;N<2B2RAoZyEqC9@;fcZVU(2xtX!NC zpb5hSTPs-F+rrk_9(K;Qm}oT~caOUrt2YkdZ(n|h_4f_I+1m!n2w$jl3VP9t#k=pn zjz=DS0QYa(fJYwNicOnWVrcbJeDuj%LX+w$=(qGM|5wFPa%o=T3=SXt2Cu*QEVezh z1v#B%7$4&%$a33Em9Wrvuhhf0KHh9~JtGq#)6<1qiCs>x_;A72g=}pe(?%}>b=g7( z_*T17P$g*)krj*N%1p$Sr-|{7uggSeSsZ-xBA~2{69hXGY$7cnZs&UWck>&0@aAG}6PpNKc#NRHzE0gbu4ujt0ig5^>NZlNWr* zY;r5TJml+O>MB9zT-M6XLu@P6qmy1BY3^uea$D$SqAe9_KFF>+7t!;W{Kxs-wJtI)G{F?PQEDAMy|k(jPSS#=2p$_w#+m@mHf zwZlg=pC2+tU=F>sm(6cM`;rc{&YFUP!feFF>(MvZi)UWliPt`U6OX^~96ARVpkR6x z((3bIs7ObAO_mtj&_aVKTT@J%@Ol$Msl5DI6^N-!Lt>Q)`Hi%(sm?=4Oqj4}W({st zOen$==ywqoAYkw11f4;L;Lt#LdAh*Q%MGS@148|L5fbPJg_k?Rf|bxmXb?>IAu2zF zGLh-!3Qc%0+&rD24D~}ehvr#$)H}Z{prZ z9)gF{IMjMu;$yWpPPp6Sl&b^YcA|A@_oG6S$3EmoiD53-5 zA0LR|Ttn7dZQP(mE1`+b50^*5ORpGpU?joI_)$ zN5!-{eEP#z=owfHPioI3XB()Z!eHa=g7Hq)_~zIF+%ah+Jp5gu0A@j%zKhkMV{RKN z>dVo$W;q(#r^4FHSy+2}XoBDxri4?70*=A77KV7kB}@UgaDTXK{RQzGk`f7fKkCB> z6>QvW#TZvKmBZ52QV{+YURFX%#!XFYs>%fcT0d;rz5&J61sF?fv_pWmAhvxXLxkkX zWDh$*a69|CqNtKKRgqyxPEW$>O{+21W|EN3(HRplndYHaSSW009{NN^z?UujwLyX` zcT#$b4+Ff87nJ5h6&wKnKwlWM(lNnm683!buJ}k$*H}T%*iZ1pQxC%3(+*EO{V<-~ z^%!1x`$c^A-REeTJss<}ZN$pWYw*@b?+ERFeUbrFX0{+MJ%QS5htkG!9KCQ{Z0>^- zqr}G-wrIBxRUjx?k8z&%qR-f}o#kKrbb+EDBGR;Q4|Bs9&+&NfZ@V#8ZH?$DMkLc( z5=3jbvQ&qHo(e46If%#JdmNQ>Dp1^Bgn>tfF!!GMLfhFbGX$aaDM*`Dg0yJ`xWj2Q zf)YbVJ-5TXhC8(NFDe4$YYqoKA9#Uz|jqNfbn>PN2W&^V4&>B506S+n$o(v1d zpJ{yW&vM72)^N<+Fb&xYr(mSLJr*t>#2CA=h)4>-+kbu*(Z*o-rYX>TUne43k`P5} zv7QfM?n)KXD$$Fw5#5`ExP>`LBsZScbUkenBj*|s*<*r!A>A*gwY)c7{OddaD|`xV zg6p?+V0^M8qS{jtP!$3H@^G|0*n_f_Q!s677rk?o;qFK)@$L~nGYfV}UhvJ=pn20A zxTPy$Yw*C7wH*j4)x$#Pg82^*KwT1p6nZwL%`6fJR^Q?~9!?1g%-Y<8wAL)7Of#Wz zfYz|;c--ze3c)$l_SKzm(|aPRG8Hkj?zS$PF8XrBZ6m}XpJQ0w>7mVtjtzr@vjy%L z`$x=J&<3SJiT4kDjQLxZivQ|LYREuJLppQ?^!zM{#N4%ANU2OjT6r=ixlD$a${U_O z&h);t19RrJAuBHt3XMCo8Q~asVl_6tu}$cyTk2i#(${;C)s%yx#yoT^Xhl>)7&dQT zi^Z!K;DvXdgNdFA#nVd>mmeqApKN-Lu>b2HzKq@#^Wfxb4?kKnRgr;s?9Ioa$n=9- z7QGjx(Rz{V1Ha-x*d*CwgyIjF`9KHu9N&Y~nJFlsIdhl)ZTQ>ykFfKj9SAgfA$@8R zj4f#hE)0Rbp59C9;^3F7MtCXpHMRMXHy%ffDHgGb(TLVZAX*n8$nx0OSQrwM5Kr%b zQh%ID=HXyJ4wIy^B+&U<63~JSkEiD%At52*I`}>=E)E8R;kqAN_A;3%!T0RXBqxJO zO-Xk0eOg)?j7BPh;_e_qNi0h+ zsXUy37bJ1EnS_<$>`G!;hDj2fA>%UmUgjYQYR-dQCaAd%e9y!#L#Ac&o25{s)i?Wb zJed!NGvu{Q%lS%zet5pJ9voki@*FNDSU3)c@qIa4Kvz`?5}nCi2H#g!SD~t^3Zud`ElNS%^x2a?8j*fi>NG9HeF% zk(8c-^c)&*Y6Fw)OujP-&;MyGE!Fv>0sEzCels0NKH;diYXNadZs6o(0lQ`I;3@1!mzkfXnzZ9WG26v=Mb5H&!1@a2?Wf01w_`JSMoYql1*~WhcDec17;;_vdAU_^3f~k%2BY^~4;+sKr zW6N?zpZSA=nNX-%`dM1b^ELaig}L8A;ZGbE5jjW zScY4cGwFT!;Gvu1x+VHQ!HjF>8%jOBohl-v#B`n$bB;W%F z_6aik#~=4!C%69@ZY0NVgdoMQk>$g|e%})g?)?V)_kNA<_I@SE@~`&q6%YqKP#A|F zVnY47Am_boNP-+A5@z)>YrH}XE!B?Ne1Ft@gN8WoLE1tdwrdg$MPF2Dp)&ou% zN@!?P#1>xK))YaEt6LJG?Z`l6dj=w!X!9|<5ZbO>xHcFtZRZNquAYPZDdqH%lY}aI z;bP?GW+Of|QRpToCd47z5Qiz65Nr-|z?%UU_(oxkxbK;4NQJQ5+TCPA7<&nt#? zu9+;?cjgOAbJiPQ`p7yw_NNyx@Zfq3J+>L^pWTibtLGzzHq8ay^~me4L-o*1-1pJb zC|Euf33KTMj?%KmJd^Im`IW*teCW+>xc@KDpl(eEHofx*c6|ISHoU$aA;r-!&MXA$ zuKMMK3nDzAFcSKvbhxDlnGaK&o-2q5m*fD%G#CY$ZtS3qR(n2@+H=fg`RrUVcfx0+ zBBqC4W;)ZMz4mYW47Nbzf6ot}n}N`70=-NyL9UvYF5K|m9E8o!f`%Z7a<&kkoq_1C z9K_7YMbz9}XlX+qHa{03JsdX|njXTOEJ4bLOi!WsSxD@wK+0e(^z>T^q4ITe=_QNm z7d^KKhPlN;;%3udpThfBzeDenYq00oUorU1CK#&IQQzBw!5wR`>B%jq>8KOLZ$)DP zHf&vqf%SuEPl>~B4{IC_bixNJ7u=)whcR7;aT-r#Hx(d0BbGKn85ml<96kMA&?JWm znT`RPSN+@8qO`Lf#hrCnzH<{^`Thg+KfMWSUfPB&e|j7u-yO``mgr@1?7VZZheGpXf;jr?uhlk1w-hp0F2Kynv-y6{y zHN0q^`}=vrKfnk2=m^BcMWBOdGexS zRMNT^R+|dXR4uA{XJD+q9YTy+(T}cvF7WnofhjE>xOxu21w8k{Q#gL{gdn(FLluJb zv)ZR18^+1ia*`|y*v-NC`E&+U9Smbi?=XZ}vO;An$ils@<( z+kgkkQt{Z<xWi&B>=Z7-g4umW}Tv_qIa1c70`G-ur4uJ(YXw>8u$;cy6Y!XGC55pR6-3O@eg&-lyV zKSXeB1ofW^HUS=jh@=ER-l(i%>%bhiDm(>Q?j0ElhmZjH z=_6sSpmkH_NB4ek4OhWeA1c~9+0g=7x#_5_ErqL-Eh4pQG`BRt!gez5efR<7l;xp& zK?glgKf~4s)?&mTM&P{<-oWxzi}CJX-p0P4en4D$Jl5a80WZGsB6h#N8;&$i3zqc4 z+0_Xe%FmQz#I%`HVejb(U2?RLv9VWrQC|gMBF!axTGM@F!eHa?ih$@4s+Th+IE{xN z{RYBfgWwbD4xK3+6g!{AJb1T3&^?g?Ui5CqUDkCJ69|dGzd}dK$XZ5!Yiv?0geq7SMXT zkk;-cw4QgTAhs_DsYCq1pVqZmNyuGU1;>0}Xxriu+z@7?TTryB5v`BR zN7~{Nc$SBvYHceNMH*NdT#-QUI!)_l3Bp`i7$N%Jzz2Ya*r0t=4_p)cpec(N{}sg& zW7c|i1ZIb!sHXx2b4p>acftGz79pZUkI)<~1|M66_Mr|0Bm_WV@JIf%0^~L3;;FZu z#K-$ShEJF$di%POoMynXp@rD`*u6;3Pr?LG3p6a4iqwWIXp3SIRhEFJzGhU+twwyQ z0kcpLzfV)l{#Scf!uo8o^OY+%@TTL?uVSS>b@ko_`po zqBQubz383A8{u)Gu=TLQtp1tEqvvJ?y)$Oh^R-!h5{k8Q7%l1cdV;nRk8YE3iMMz0Fy({D*Fh`Amv=F?%?;}K| z(Yr#TPLSm>ky^y)qXo&#GJGt-!X&t~0++-%U$Y;FG2}gy%k;e5~J=yiho8rdyLd6^H#m*hD6aoEks^5K56Ex!dORT*rt z&5%U71cynoTN2g`Nm{d?3?B{|S6*{mCS#eDm2vo*%j9bgXWSTHlGyCegg0MHKfagg z`C5i^I=<%mvpYNwzLw-T*N@xFakwrF4wIJUOc)FDo9@|_eoUxy9hrn?a+%X}J-A#M zN0uS;WpEuh9YeO6{biduzHBq6=X_WWM)n(DbN&ntm;EHuaX8n9>&q^a-EvGhj!esW z@x6@4>9|djDCds?*9r47whZSF2GxSRmZY{Mxs93Br@a3vEJ9jFrXb5D2`))*CexWL z=d?GH`f)!qxb1u|`<45F+sR?F|F~Zm{2P|n9FODhyx@-;avV4< z`*FTJCuDebP999@*)U~LKFO&_%%HtRCan|Y>B#S?N6P#PME90JyOfDnGYP6;!gLw! zm&uQz>njr4-~U~(6pN5!87PI0)=vhL?DAUP4=3K`y$ByH6NIgld*S*qhD*NO=qK+5 z5le0QXZQzV`6jq7r}94pu7kY3vCQFNzlGs#xhbyo$!~%C=%0c6{l>l@?k~qjjuAuN zbC|5h@bO`2ma?^bff#2d%cED6o9D}NGg;36EzM+k&*sI#vi#8TgMuvIci;yzVZM(^ z@P9wtbGQtPv@B-~C%*qXU`zF*M~@1ZiTE4I@|%&SzvKTuF#_k#;^)0z^ved090raN*pmIiIsAO&Ag)|BYsa%T`TtF_TwY6}{CfDmK$h?O>hC!4&6n8w zEx9Lt!25^(DkLsU%j=Q3b_(KpixJaXfY@sXmZ%r;p&qm-FRMc2f)a!^o8X+LLM3h9 zirXp#X{0wsI+o@yu(_VCM^u=T_#SU&o3=R zW?2q&C5cdHYG6oEp^i3$8-hadigy6^D%^0~+ZJct>~P-M0cV_?@uRC7_ISEtv!4qZ z6gDub>=CJSMwrqQ8f5^2RH5*q^sdTac&n7~@%Q@&qFj>YZa!XcRd@@T1hyu(bh3wq zvpps|*q)S%o`98W`tkl>-^S2} ze)y|BuaP7kV)JR^VhI~(YfN&OjJqa}#Aw?wh@}3#!+IpfxlF>X)_39#yOHGHj=LO2 z!dhVsrywWz=zI{C5dnRD8f=XL@G6SHU3w?@R>r`)CKjGm(NHy~A$U6VHMud}CD+OF zn65&^&Zd6tt;LsD597=82k^q*-o#TMy^QBSe+#?6dK;VGcm$i@ejICF+kt_X@584! zjJPg(pf{(Bf8!5rOGo^IQlWzzLmS+bIi*5ZJg`I$bwwOPE91q#|2rr7!!RX75aROR z**OmDkh^6B3ybo|hBRSm?w21Sv}08z(Za$~Q=5SJnK_7R;X_HO%;_nDv}R&Ebe2(& z<&j<2FeghOVr~|+^Y{Qy)+OgdJTrxK3cGxWXUMEHgm-0#c!DgSn+N@zT*}LAEzbJp zd?=`f5I#Ro9HheK#da6K&{GKgygY)XV?^QScDVEW40=)JEG55M_1_Wb>Al(&_`HP{71_x6j!m0$Vu8<>`$$1V>m z98x;r4R0%~4D&!vVLa{%c1F>R3RF$6#K4;6IC1_sUjFlLO!AzBz_?&M^x6}6`p++7 z^%M7?XjZkbFx~mrm+-;qFOfaF0_$Jhj{Yas;fpIjV9oRQLX{bg$YKK`@?(%%l?BIO zcPMC1I!E|In;#FKq)@mUR0z#AAhL+YBP{}9=}`zt&>)C@du$c%t#E~3kT-%OLl7FP zK|F0Tl5$d@P0$H2acannLs+~90lGkVhIv7orh~WE7anw-S;L1aC8DZl8iMm;F+SJ< z_OS}MC#qm>N(e?qTP2*L z{b8+k5qj@-UN*3$-{H)eQvqDY{sVi3wAH;2-G@I;xD(2_2tn#HY3!v_BQP->6P4Du z+jR^o8f$QsQa$qc)0jDLF2*^JMM#J>YQikBG1vm1xLe|sw;MjRn2awn({NgU+?`4EwiTLsh6ICg{zIQEO$_O!&S}FD@u51Rq&><_R$B!D^ew7Rm7p9 zkpZywwS_V&5Y4mcd6E(ZHRW&bZUygP4~%sh2Y-DaEPQQXsjx**teWQTOStF3P59vR z_i;C^k2e19P{!+EMfGP%6H8x5ELy!7yWV&Pz7!T2sYZEOAsk(7G5OlL5Ihc6el!-r z{%}yznysUG8R88al{>k#u2R1-(N|VU8}8gxr~w^?8>-;!;fUqyR-mG(66-dv z!s~lpzyl9&79Vy#{Or%DZK=WQ^m}~ez1J|(ax^NZRU@M)3+Jw$L&LOsw9IUVE-D-i zO||s<%tCcjl{g^O$)F`Akxu!^3;ww~7TjPyY=t>ejUS%_**f`Qh*@}XL!wIw5Y zh6#o_6__%&5l>WR7sW0@s1Ig zy}lEgnrM`*Y(mPyBE-zk78>N?-6q8K6(VYW24d)*t;*TDJZVWT5|;5HYB`8mnk@+P zq`@MX)>I&|KOgBU%20jZbcDCX!#>9g73-#8Qj#Mw7nfn`{j*UpRFA$lHlS*A8`2k- zLQx)p?8Q|`?JB?+oh?Etqp{$L0ZfdfXKYpoWZxe zdI)z|-HvxY+Jg~)9D%J5--G3w`Z3C345su>hi#}cO6JyzF*ekuA+0$ZnQi$9&IrMb z6>Z3B%7A~gFJ64-1^j&OC}wrF;H8(IfI8R{v*%91hWnQzAl3_0mrp_K`k83n(2lBQ zP1yLty>L=HV&TeedLP`2tnzex@#Ck+B=?<9_t2UhjSD!7AJ6Q=x5vJMXNVitZd*mq zo^nC3uYYh2o_+Hvp{?Gvx(m78dD!xot*BgGjnp0!vKHnbdr>aRhAI#B#oI!%sS2FKKnn#4wXl{rHa-@ToU4f45xdxIOjC%GI`En89BKyW#?S)cdoOX3)~jj$Lz{^BHPVvmVL`(B#j_)}RyBwdxI8R;+csxxRl;#>)&gUR7Sst53>p+DG1@jw_x}cJtKSj_iE;L*E z_M3@jCd>KY#@J=0|I1|ga8g`iI5~df{f%V#a3WR`xWkFp;Uw;LBKF!nhy4R_d=m^O z#&3oj$>|$$vpk36W@(0Fc$^!{{8!WeQ(Wtl8~bK>AN?~(0{pl9qgGZRa>y*XGaT&4 zVX_{wJXsIc!2egs@} za(^I~(*2JA8GQTwZ(|>g!Ra%?lKiJHJ_Rmc#HHgu;WEp_oHuKto5^zXzl`v|k}y&J zzmqJN1o&^^Ix&6|@FAXuzWeq!$@0D5e*K$dd3t{x(pNXaAS76Fuao7h@yvS9u}dnU zq74jdh%@1q-CT?@t`jiEVLW#K=|#Nz`Fq&?_HI1(!eiL>*jC)PbpsxHU^AZIxdSgh z^BA6aYC9fy^d7{QB*80Hh43b}&P|8!)Fi0q<{)4u6O9={mpW-iK4NGypT4LGPapm( z-Z{4)FMj?Dnf)e2&DyT!0LL->v30QuG$#S+VXYe({)6Yzp zvsJmRn=>Xm*kYocwXi5>jI*^AWcetI$(U$w2cIAn##&iovh6j(oZ?zoO~mMNcVXqa zL433C@7S_qBh=ABf-Db+@I_FRQs@vn`MF}0-FQrNw}!?Tg+-f}V}g$jY}M|t2y%pF zuoET*+R(K<93wnnLmO#vALayy6n|JG`M@nN45JNh2&j!0I^{mK287Mbx=xm}Ww~Xx z3cl5`!m^yn@|?vDc=WF?V&&7DvEcqe3_P(B5C8c&JoDx2Soz}p=zMS)Du-quXK4f0 zf3#Cb>S$)t25F$)tanS}XXq*tvMl=m$+6E-*;#|p zPNT4G*M0c$`~mEE{&BP!d4d46P;8jlxY>Wv&qDhN!I&bLdcQmcL8Edwz#k-&W z8L$22Rk+byP$q|B=X<-b=lc(^c-x@(s1%f=L;J@0SoGK`Oj*^5$Nu&LHooy7-aPmL z+BbAVQ=~`teM_+AwH|VY%}z^wDGT?P0F-Vl+36`QEMf_(shU_NI*zxI23Uz zMCQdHl-d=ZtA~Gv7W%qO*ccSBj#D7A-h|?XQ;zVv>EKZsfTWpv z80RJ-jK$Lo2WQ$SoM7eS07aw2Q4 zq{r0eY9tyBn9|;a9nUrQeEZXJK8ki_we4#RCW6X6sZfXS2>e`sI{7EkK4 z+b711r;~F?< zn%`=obw3N40~JE9B&H`F0nJ({>O&A(8;<$gdJvivfRyZL^emVu`hNSPTQJ6MG$tyn z(RJ@a1Qkcpx~)X!!ZH|X?K90V(i&leVNMkq=TF7fnk+nR2*6u0uGmwpM{#x_>@_a1 zqi1r@(thz_Va1xo=$KV6KD@7dY9$irT_9@-Z3f%Zpy^_Z@&ZAYvko~+s~8q!39>wC zVJ?!F<_WSqdQm1K78sE{MC%fPEz6B7OOdy(4i%fHA$@5PtW2)Lvb^i5#TXlF2W@jA z=It85?5F#XH&iFw_}SSQ9c72Qbu$o7&rOzONt~ID;w23jAK?K1T&>VB*ObS>KPMc! zzk3JCEqNH>e5a6S$?BjDZb>9!>Jnj^nTv{rweU#tMf1>1#8o9hTMz}07;oJ3+!oZ% ztH;cN4y4liOnPl5?tSWBv~^EM-wf4gWUOB79fJ^6<1_H&x*O2yL2{Oy>0Qvk~d*Kz~gp6tFsO_uA zs+Tt4=`VKSsgIwbH986ktp_qnlM$1p$JXcXM_j%EFa7mpOmH8MzaIJo^yZ5_U%rL$ zZsTz8vs)06u7xr|g>{dt74h6cT`_${D@vD^W8+8nBB!qahS^ETrHy_}d%SSj(!73s z18fp)u=$;h_zIsPB;OyIv<7>|+v9Ji-pBeERw1e?N*rQqn39B))+~6WD3DCg0hVDI zZdo3!3rBR6UXbN6v2lowGwYH|>6IJ7VJyYM;Clv#%k)fUGASwZkR&JPE7S44BrfH>3};sop~KVg zJ?G6}5|~M0NfgU+I82hO!^v{ahwmj(E=gudjPpH%<1jcqr{OknUvb}Y9}Vx*;eEz+ z7@nuhgUe^|{qQn49z&AY?8oh4vb?swP7vji#OL%Jhr>BO$7R3aeZytRK9%`$J(vua zc}a;GCdoNJ*>(m?pGeDbCcJM1`%AK066#EpSJu`EYjl}bT9!+~o&BU`Ip0gdT@vN# zS=qu;UDlWTN6rOyW&d&edtMvZ&zMeg z_!?QBkeG}FQ;HzV6RR>&xS&yx<@yE1|A8!L(o$NMM=Yg%!ao5M>;DY$U{EH$rFFR^ z#yRXiBg-WzE5StVaN_mG`{9Hzhy4R_d=qE}DE&XdjpX!=xLKaVakDhTF+9$Hhb)(A zeiK4|#SAHZG8{Md??1zhL^*?r@!?kG64J8#dS6}}6FE*i_6#29e@2!seqcF%x_A@^ zj_t?ZAHOxr@3QRfHOunhn&m7F%wU<8eTRM!xETTdU%~HW`S18wG2-m;l?4X_8$zCMMU#Qx|dh zndQlW?~m zm7#WoO^grhE_`(MYdrDQt7v~<2?pPI z0E2tBq5Fk3=-#~+LCq=fs*OfiX9gm>^I%xW8r_M|(gruAF%_!n1QaZrilB-(_!UG# zQi!B;+$@m{D4HYKW%k{tz)oMxCQNRf1IVi)f@xV@EOOZSP0_ z&b26>Q-kolSR^&(3DVimNWZZ(8pF~QBsb;5IJF4IX$8ohUV`8Z9efjm;T<1{gsL>8 zH|4-LL5a}pNJP~b;hPtU5uT&Pc?Y32NthVr2ImBSRP|25_E&abN_P_$ukAtmq86-w zWHp)>O~bCgJdafm_8~Vf6!YVJ@mY{BURJxKvONw#^E1$T&j1o@X+3M8`7%w1_zpc( zbxH)bB|t-C6xm4gh04~}q(NP3fLEeY5c&>24oFCg#j)duu&{3dUf%OE>Sjz8#NJpJ z2l&P4aHqW$>;wJb5)p)v!L&AndI%EN%fSwLsfieQ*9cg+j)kRaJgoKOG0AoWW(8W} zZ!zJx?5@Pm7EXA{!v<6AZi9=>Ex6l#0w#JnVv?69CU^(HP7?)(=vYh$4a68f2Y82j z!P#LXmUPr%=ceVT%1K6dcN=ocbMSBDZow#raj>WLY^42I@!u$x-nK|9%Ru|m*=U;E zEG(8~_!y@NnCwaG3dOVYu@_|dqP{M?^WN)%EPwc!M`7h|C-l$RvfPo@Q9GrNIMkD+ zSXir^!B*v*=LFaBu%P<0e*TNEKaJM*dOY;ly@*ZH;SZxmz)s zRU5<@4alr25Ck+^)HCdr?wIIfL+PF266yw9g^f5DV)@W~Y}>vLoiiJ-as4tF3}Hx0 zjmF)R@1V7NEYLNSldprhc02;|kkAZ;W=aMrdj*to>Zz5a@<6w&PJ; zUkC>pqtef6GlvL%Qy15LBXn*nF56Nvgh?$;-$eC#{_R+I` zUOFOXCn2or|VN}C2Js3WD zVQ|e<(HgHtNOmy%vx4DC^^Gcy$JC@CYz%k9JHd{4g`QiLah~u9aS#V!Z``&Wo%3d4 z)0QC`mu}oXX#`@bXe@h*kUWpqX|t4846VPxoykZUEEksM(er4Xoo7NEZ4l!Z<_H3v ziE?#!G7QV;{eiJG2ZklImd{QR@k-V;Aa+hVobvpTOly0_qEc9;y3=(5ns>|-M0sj& z5sHTzp=(aY*k}jTZ|Z=yF%gpuF3?XkqPVXSA?5TuDv3hNhPm+0pnlf7MVgTJ@ZqhWT1LM zJ$C=?MJ!l5AG4Rt#EOke@$4&)pt3Ftz5O#Vx4#wsF&;D~I!sy7gr$!y!~E?FF?-`| zy!gorSiWU3=B#MPgRee_Rk!)XlF)%gR9qoTdt;ePGxQ=;;U2f>Su2tj(#7pDSAPc z^O+b?x=2Bm$HgZiE-6`9j{j$1;*1G2Ce5W~Ig@2frb=>L65)I;WL^kdjwH#4$79l( z32SMQ&ey}ieiCfC&VHN^Lz3x|SZ57ujw8u(&YL0QNur#~9iCo>aa;ZwxSiZ~zUF>l zFyYI@A-8`x@yn0|IEM>D@ftWThsk&{t|V^RWdf6lOzF=ArHsev`C1a4GOi?lIb4<@ z2~!!D2~LhD<1@L+B&#Gq*`KdD9)qtXfy&nm&WG>Wl|-@3o5Lj$E8}rpWWUHZa#`Gu z+bX9wQzfNtScJ@IA+8KTgYJxtNnC z8rzKAe;~^Z+4LKs=P{GzEW;ABuoO~;g~?ZTnFNobeFEcu7g;XJZ%LT{t7Q4j2wJ|s zPP$&ZmiG*K&tb!f>ziRXF@7`LNKW5~n-bK+aI-YS!F7<=H>MdL_FEWU)=hB}vRw8P zV|c&*XBckfeV#JC5K}!e0rW zf&72Dh(njI{Eq)29KL+@H*x&pC7d{VNLZ6IQGWKPBRF^ZXZ-T(B^*Eb^DwJ&Gg&SK z^Uwb8CCmRa3@6N`e!0BgM`4mI|NgtLg=D~&`@R*BWciQZel0Z1_xOG;-U^gmt(|uM~&pJ@>|Q*njE(9(`#i z9w%&mU>%-#Vmo#|vK3p_uE36a*5cLYcH)KS9>d1_R^x%^b|7y?Ic@57P?i`F)l4rY zvx*SeoGGl z*xCr9+{(cYwoYbDw3>hwtC!>N-+h6BwabLoJ0Fl0pz}vSlnP^V-!T~BJrcKuTEQws z0ha;|l=X>1hQ+Ho27yyk5Z;j^tji<23NX>+f1NDXwq_z>b`i4XRSKPO;|v-T+L*^r z&p}vi61)o|kTAChK~0H>?8t_;gAZ4umy3>canL1OR|mBj&05`E#V~Zzi^~)vO!KRu zDA5b)9wx|b;(ej5OGVuDT=*A839{Ue=9P9zIvmnfFwQ9#BzYLkfvBk&P**1ilAIAz z6%Q|JlRwp2Ka1wd3?qVDQv_Kb*p>|S>y&gsvh%Seoaw z7eP;bl2nlbw}=3w1i0cUZwq{>u)tqq6j&ba27RiU#ykuettC(;g(5sv4^w3}VvFNp zs7XfYf_fx1=OVSWKuFjmG-rzgQ&|cpcA5!>>6t?Nn6Fbhs11!t$n7pe>pfkV_h=ve z7V{C*K$~vb7$_SP#6hsSu3VvYubz=kFJxJWq_zjvB_Mr41(xjIga`ielsL$htuB*V zXx*sIfKNsQyiHm}R;R#5%EkzVkK@`f@^4S!P@ zya?mMUEpF2!7a+ku!!-5vAr0XGl~&i5|4=NNSLb9u@i{y?fXo}JhPxB_So%&*y9${@-pI^+<7a*nWcelhg5*3C{xE(FCV9HzF8aNX7&{uazCIY^=8O>z z6LFin6>ROTpi>9J!DcLc1Ds&tH34=}ju;>3fbju$!RS93S621mM~^^UaPY<@of?n3 zO+w=e0*40AK#FO~r*xPaYWR^p5fqkG4to=P<#S$Z|#U1JkSB;<0D|euE z)K%#OCqG-9y>bk%zx5niT5G6oXQ2x5!JQLt!zi24uu?c-#N<0M+0RKFjM}lZ2amq+ z6f(>5afj_V>PJfobA+|h88%8s-0e6DBdza5yfF%=&KyKTT@jw%xgCScdtqfe0gm2I z@Q)0FYp@U82p*w+@YDvtKG+RTq3*B^v=?M~LS{6j{}G!u^kZs63DxTiUU=a#IJ#I0 zO=cH=H`sVm-EJL$(RP-U#tkFJ+$la1*!z3HG0+R6>?h*i#@&uPCy&A{qi@9@@A?B$ zGm^!jwW;ZeNHHZLt0WtL9Ca%uIMNzUd0F^4BQRD6dzG)SDj(}=LwUQvn&pc^d{Nz8 zfthn#P*jyItnpuc?+#sx)l8c?&S1;~)19wT)&C>>~mcfJ~Xcg;vBE2tVb`~RJ zW`U4oiKAz#b*Mc`+e;CftB0{95sTN%MKP^o<O&=r|0FgNE9q9 zLLqJREesZT@Z$%BB#VW19J1&g!YX_+exSd(5A?m*fKMjA7;Hr@$?@UV=8_y|uw^-eubCuf5=|1|OhgYSrX^X< z*NhvWTPaBrN1PMC5bJG_nJ()n3aU`kEaXAkT=j-8d znDl01n@MkJWzP4K3}*{)Cd(^oY6X}KXA+#_a5!6#^R*<$Iqq<>ToUF?mUCY0vSm3- zx-jGz$bMjOn`B!gA)0G#BHSL4B58fXpmf z!>-A&#O0)1C(D!QJvnw!8HSVPOs0k}DS&Qaz8SQxF^TzGi0r35^*_Ol`*EFzldzHimiHVsoEX0uZX}=otGFpaJq$NXGaSR~aATT(rGCTPa#P%- zPb85o`}3dSx8mODFYj;k=Yv2cSw4KMhL81sg)IMm-*1rp&F0>?Q(} zM*`LpaMZ&MFM2p)zK=Bu{Ou7Des3g6xY`68c!zjD4LPBAr<0PTidx!HRC{nZ-dggvi zj_}5<{#LMx^M`F(FeWGaW30goqhma9SELKZCHTO-Fao}%QEiI2MoMQ1;%CsyKy#KLFymYE5LTTebj<@xqv2JcML=aV zqC0Y+p-sPXY7#=)jPP$x5QKeTM;er~(-GXohkG&so+C8Kc@8roW~3v!Gh1BqVVsSYvoa}mdfgicRHL>tZRjtr>lW8qgE4%6IX#J6Qq`>5}#;t*bw z098Q*{8IxFQVRCXNH z*%1gU)+4&Xh`81q0k+5wtw}^oTNboaSVAdN=)H&384x}t3Eo9&xaI^Rxsx_5J;m@X z)55Ptk3?!`-24*wHpC!up1EIw+i5;5E`hQwP4pGF*|@Y4MXOsd<$-xfruK-rLce3y zBn~b%ARsSF$eP5|XFyk;EDjPiPRm2rh6U()Pogamyx^$G!slodPK0@z(OK|`{A+|0J&eU(3N=|ZoDvKL)hD~FUPw>q+v5;1Gm_?PG(vj$kk~Q z;9?3Aau-fIPlP6EP}N)|UOZVJ{_HOoF^bliKaL-RTPKajh+A)gm6s>R+B;yxU3X!` zgmJjt(H4%hJ~%j7(7G@lci7*FfJ7DUR!qVO$2)}8@7!56!0`ikKPCpB+1TS3FL&&7 zvc_i1F({sNJ3Q^~#u#rK+~MzsaUoi`hQ`22rG|Ti3U@h;g0VP;-ZGA2aeEye-MEsj zFN*^y$2(Z!5999;gzkt@e}sjH9Y)(v#2AN37->6RxFc>KAuQwXv>Jm+ZZ^1$)=s`> zE9y}bZpWW!Eq`X$<3dhr|Ia_-ZmJWLzE%oX*!p`3=^0CL_^6k#D))#8r26^7QRxa- zl_PvZUFn_Y6droy9&FjNN|5DFu2vXnaVPGypgy`|1a5brz9V;}lO-n6I)10+1pHwf z)nm*pnC$C-@!r<347A6cj-xSR;=kdJ$+u!b|7=|Onk>Z zyt3zcWEG_0+?7-K`p2)};O~lYo|drDc*9Cd^GoT3$zg7=k5ItVpu$9dM_8(y;Sw1D z%P@D`;$?xm6jr#^Z8UDNyPfJi3Ojc{j9o82hIu`0xcuu$y!*F380l~~?r&#ucMN?cnY;5-kDN_^ZD+J`eOktNVEP+x!ue zEJtDMV-I2R(nWaksfY2xo~IFN42E^2J?hp@M_zvoH1vFlTUdaErTjjSMe9y35_|KI z+?$US@@H3CmPak2wY)D6`o;9jSxW2pycD5Xp0%47Yf-syJ@SK4GT10ScJjI%-y67z}n~U zLGFxVjG^_QU}h<;g+nxsUZ|K|15;fVjCGl48|;L>g#Y^}3pP4;1QkYMXi+6`QV%Q%jM7U_KElL z*ym59VRbW7DNX&VX((P?iN-Z8$eve-oZe!X7UrUIQv*uYRzp8K5qT@i=sBAtu1nX| zAZ~6d;<}PiNSpp-nsb(Mmg3OQhd+4`{@K1z7X}N>@*`B=)=eGop?4Y9fY%kp;;DC^ z6_(|ORC@kjBg-Qrbb>7B13nFjW=nAf6Xe4o{iR+xyOKng7S@7HzeY|oZY0JT!^3X| zCbOBeX7XAR*ux3#^z`)Wh|@aKDihmw9qHU(0)zZDDeq!PiU{|1&T-D8ctk z95N)CE=g<#U(0xs4CZ^jmc%g=nKy#{C3(rjr;NwMrc5j2ah}qT)385Z%R1gz9}eeu zoK~ij!Kal0DS)MSr zL>%zRvW!fU3!?TKSuQQh|5wTK;e@!nX6y2(YX^VIFviWua!K^wNX)VyhyAaT<^LIO zMo|Cn#PBlyr^#|jSP$>Z{|v*)Z>dLqqyO;x8~vFq7r0h7gX{9IlI4954hqe3mSOqs z;9haKCm-O+ShvApg$MMUVBlzX)kH6!82v^S>_)T0na~P+NAHt=JXK~`>Fy!yf>^(O4y_ZU~-~2TysMO0q$8E3A=o?kYZtioGr?kG}q3`6_(}l zfKRq8kD8eS{}LU%Xmgssq)tdyXr`nfaz-Z9Ey?0x95g){A#JJ9b!7{SYW0jXaj0eJ zOd||E#RzIlfn&BB@ieDmXXFXen+b14UIetXv5#pqA-FgO-q{-X)8?M7cv+6cuP6#m zMwKAd+2TB;B3{U~WX`R;uGhPcQk7LcNe2=#1Ai9{AjQ zBK{oaiggABVvK5djnQH3bWsl&gLV6Y|KIRYB}{RgUtD*_iM#nIudv z(;q`3rxt0`I`Y9GVtTRG+7~W_?P($rG&<}{EzqEKs+Ck@Ld zsy3apj$#eTi&WU~MPqpVi+7l}eIZp{)r6!5;T_>dc6l;c#R;V3M&TFfL27Z5wzph7 zx{{I0C$Qy#eKgGS&ht~p@?Jp}pR2Xx z4^MZ#O^oG6A7^SjE%5WV$1Ko`!D@YS4vWP-Gy>-cf30cVHM^BBzdOl{3GM2=;%99F zz~0@HewL;Tu(KpAHG!zi6#U~NvGQ~wFd>@ov_w3@g9uKFB`7fl#{h4vycmk_o_rlw4_kT-G@+MiABHNwfMio2Crk$S=?3+K2dFxf znD$oTHkhciCUz>$!i3(oy%}iRhih-y#i`S;Gh<38-+g|Ld+xZFtNNIzep^wXHnnoN zsr1Du&=1ET9}T6w6T-0xaKXXXnU;}_eEIbU?Ao@LcaFZuKYqDLmKvjhL;7ml2^LFe0xL`AcKK5qxwH=~AMD(*9pf$_gR3Ao+8pi$uJD517i{JSb zk04Lg{$7|mS!#IS&(T7guW<@jZBt`rt;SA1V)Rkv#Aha`JU_B<$xL?b-NYaK#L5jT zG)V7bKZJokwphn_V;_JQ@0`TwebaF+4t-7`bx_Ws94&9d?n9Z4=q{{Pp_aPpfnftyw;C*BmlN7jgLG*Eq+gTJt%!E}0d# zt|g>AlJT3SFmlxx(%Q0Edc#VsO+I7iJUSM2a`4Pyj(&NJw5Dt-#@8}?`vS6B3-o$d zF6&}J6r1ndNmy|#`C}@nnbpRE8`tO$q4H0mRrhSy2fd1Ut(5jWX6{|A*T&Q~^*%MZ z8qaiZs;AVl^MPH|t2J%sAcr735?n~Q6K19FuOv>cWfC$$M!Ld z+%rziTP4LSs;OApK;70hvKAIox4Bh4dvj^p+MzYg%a>JCq~>nqwoc4a%vf>nG9J6| zDE`I1G%jewyTFg*oS|d&7(%PmJ6cT&kG}o{SrwUN6{Y`^8J3KU41K_7M$W%!kc&pS z*e4eezY%U|lM5)%%+AuTVU9(v1yT#37EN-2@FJp7Zh&%$?j}yY z=x)GpaRqQo8l(K4;M|a&pj_5?!=}067ftla%1SNb7XbL*5rKpT^c4}HXowMSfJGzB zfVgsPKuSX-tpOwrm@Dax{01zRIB_Md)Gw|PFKLZ>B+LkxvZX#L(}2EGhQLv|mON69 zQNF}WUL%c&q>(s*uHqWyi%6TL90Qh%->6$$xt8*!ToLh0nX!WCH$?J@EA`0yO1x2@#0ez-C$0KF zVYWbQ5d(A^8sP%Rd&V0gz+2Mv1mdDOE+X*;AQ$cN%eBhIEiSJhzqsU5TaEic+A3ov zu8gU)Q~E1u#Fa6Sei-SDdqn&q5-(*MV=4LMTE<$^$?spn<+`f6md1u*)YLXoSXA;) zu)JY$7kTqrNL$>b%`(QWswZ}hdN!?X($F$vRkz*pw9Cw@TrO7vkL8mNB% z1HW7pxyWzd{h&nLf0G}7xTx~{z~{gIE&m(x)h|D2Q!C&9*nN;^PqQmMHOep7D({Bn z-O>}5i+kb1ISsSL)uvJ|1K*d6K=1!Z43jHY60uqS(dmLxQHfE6r6m)Tok4hJHqnu3WJY9> z8cWWDb7AGxPzUVunQy`HY-cq7V5Tl;@*0%S9VJZbB(pv(?Mrm_nRN z0x4S9q~~2AX#A97{UA=7T}kAm0>Z}UD!ZMHH}-Aj>Ee!ip-H^#5d*Oo*SnB!e24F9q;03eUM|q@FFtDR1%^##t{u_ zzUtEntxlqPPCK#9S%lZ7;FhQ6bXX?YldCD5)kL)FpB(s^GPOeA!(u|kb8I^C3v2Yp zp7?oHM9nDCA79edhF@!t&#%!3bqWm5TA^M(#0<-_CT*Kv{$?q#JVC`}tZpZLRh#-9 zsPJX2)NLBi&Bq_*`5%sP-O+n!+c=Sec}=9vtR_=!@HH%7UQfJwaY?mqg6wxj&Yr*E<8&YjvX@aK-h zcWZm>6~onhJ;}8MkyQ zZ8JwvF#@C=ciz9*42HLJ?0*ET4UcvxkGG+5*8E0D@UJa#;oyd-m-=_-Z@II z!B=TBEGEh|bG6f2=`P`c`XE>V_^y!w8kXC6IcUxF_s_h=J~h^N-+L1WpM8Rg+HwY3 z55dH=4+Gq-7#iS2e=i#>Lfq)>WU9kVz18zV$q-)$2KqbD+shgg*P#sYu~cm|!@|Xk z#VhBsdhH_KfBz^CJ$yGdF6InUzcs5cdoo5AkULd9V;475xS3czMLEX?U>oU;S&$1ZF@D&nxp0p1 zz&1080nrZhbGwRMmw`O)>BEQNG3@uUrQFPfP!DsCfABt2rcLF`@4jNp>`ok_Y#A78 zMv;0R&AM$lQvMQEE2bK_C8mYn~@m0_1(dvDtc1nY`SuVE9r>&o<-NdR?mhM}r;dyRH z5!I6#C|1wH)M2@_E$JerE)~;Adsf`Gi7}gJ;F9jow4Dn{Y0c9If2I!0Be*n%x;f2C z)H{?~{})}qlnwW8rhUn9>Ss5S-jTtU2e(l_w~@{bU36?5&Cp~^X56{}Up43U7JTJ>CeWq@EU%_O zjlGBf^P-j2?hkfq-13i7(abY6a;wplLP(E`2&ehDBG z5H2F1P@uVCdc*+a21GYB&jnid)F>B_Eg~>n!o=+f&BZU_;uoMT*9OQIzoZx7EpY<9 zCCtcUh+G?hy=QtOkGN8v0CDk)c6xPnwZ1k0yOGDxlr_Mhh(JLBixMWF(1;V5C}U)R zasyf$@X-Ln2AmYXz(^ynh=fUc1O7^R;$ALBdZ}B|3fMJZujG+91C+|O5oWYi>XkN1 zdZ|xD{E|lis(@5!i{vxvFu<_UPDv}S)GH$CjCzgoBuv_7z+)*-#=&TlQHL=OQisuh zqdf6T`QjRBjl2?W0AESlbL=Ec{6?IFi5UHn_K0hkOfmW+u9PdTq!;)te!17BETdl% zE}H4mKe;x_mNKM1X`{gFo={srx0qlN`{bfIE_2U(|rBEX_x;`xTt1M(hbSPWP$ zX+HS$f|e@*@Sbuhj}jwHptvEQe){R9urI#&;u0kP=_lc3SB9p4%l|*c-heM9?<-sMbdov^RJg|X#Xw$-^%B|{Hi~2TnUnQgYs@zZp`PUIsFrq%e?+? z!*a1ne*V<)O9ydpJXk=z><%lx=7>N27U zNsGWgJD$X}Br;NxNlr~6TKR+15(r62BswyNjEE$1LXt@Kk0#VVl7R470^(DYBoP!H zbqSUmz`Q3c_XzaE$=gGNa)IDlo7~Mw%K&S0EL|P7y<4xaAe{ZZb-ZYoJE(XO8z(yr z%+2hrFn6-iW)o~Y9kBFp)Ca=ZxZC64<)rQ1It03tTA9b@+YewHuO)V#NMimjN+`{?IM2}P(z8MYL zF1crMG>(~p_!LExF`^XDtWfOYJh6&$#WBu{z`Q7uoAYo^_9Ln~4NDbXHbuRlwB+HF z8$oPcCVu%*WREPzCnuEn`V2x!V)4xlBf2()QQb>1v&u9uuiZ15&?)NPRri+I9v48KCWmn@uGeYeBuvc7s6LDKNbD@p zq^=`naU&rU3$)phQTykz{DEyuy=E~ZHcqB?@o>^7mXV;wRenEGZ`!IR0%xeP*wjJl z(psXYs}1t9MiM3$56B|gYOv5wWi=dPceA2q@Y^t|LqJMIgBxhAJWlr^Zh&)(59{?VrudU%pN2+>so3>;~Td;S6tn^&Wd4zJ@1` zJw9?5V?{4=1<_R>vphw?qo)f5G|)t>N=~) zYRKmHLw7NL^%OGO@(HVmr)%9brXEXg6jz z1X4aJmDFkF#7!zEU(I9QO!YgMUqIaAVr`Q?VPPZLGi$X;oTRQ|GA2}L(=Kzi&S&lJ zRorsV^&C3#1h?IOeYX~JKNAf@tzB)^Z`&1f2Wt&mEo|)R+uH(H&rq(iv0|`~y7n~3 z#J(Sn$)ODO^`cLITWqa-*}DA(n%ai5WW`KeOiWlgxEB|K{rS<&g3$SkAW1Yk23xF{aL+hpB@LCPOUgXJN%qJ9|v+9T;F~ zMPD;>23lET?x@x%S2rx3U39#N$)LepHDsvv_cOPk_mF{j`Z)9W)AzDxzq-%oPEvUX z)6Z%U=4zcS%xW}sBdO`@jZTj=jbNAsLq?ZX-4eW)L8Z(zrZ@l8ewAOb}YCK6r`4p&)Z9%nKQ%bXm%}*w~LH%9|;)yF( zYjScRL+uCf%O78{W7|p|fB1Iz$M@J-560HPl<3qb_T6zU{p`#b;^;_davJX8;W(@H zIy@@_Gj~TuO_{*jP3u^?WC6!sf0f7YyPu@UD0-_gwz9G!EG9;OEKMoMp{TKjrZFRF zn>?2GDdUukp>5)5n#QVUV|Efr`KelaJUA+d_fNjXiIZ=$W5+t~y!!_Id=v95Vz$O5 z(1XtD6Bw%cY#-#KHOqYyBN*glMX>6-gO3xv2AHU^-ok?q-p&m->|yM$F(wI)_6wGQ@@Yd6KS3_lIk(Ts2HncQaja3a$8CWR_lSO!(hJt z;d3TW?gD-$DAXPR7jNih{9~WQ{8&QLX=(lS{~-qt^N{88oj`^{6#5sU?y5 zJ7&?#+=T51)^g&^>l{6HgcX}q|Av^TK3M33SY`gDjSUkcL_JHn8w=$#k}bgz|ovUD%F@fC|R_07855;;n@4{5uX>0WsoT`jY&+uZZYNZ z517t$BDyk3m|8^fvK9*DaOP>Hf8HuxtwLSCXCFNu-uOVY`8BKe; z7=Ha^rrx)drafcHT~%97E?H{PX8MyvOR_Cj^3r$iCs@zLwsWz?F&cZne0XFgj&|!u#SzlZeYUN ziOkqEUCmiFiPZ^|b*cB6S*=u#t76+7+tk{g%A{3ONT^8C=P%6JG7oq4TwHz4I*Qcu zvT|$<(>Kh*M?K@`?_Pp^tSdnU5v;mp6Suu|9~F}u)SA}7SXD-7QH(ZQb@q>swfUO~ z8>i5`u$9QVSVpfO$Beymc=emtx&HZExaW=gXkFCKhI=>RlIgDAAspFv^d|KVkceY_ z02LeC7L^@MrKMzbtv1Ob8t0X38mL-bPs-#BZNogVD+#YsFV^3? zmb|ffzZMc|kL$_0u^ zoM@FBkX*D%dupI-E%fZ{OTb)Q<63~W!0eu2TtKz~s>N@BYjJyOiA!1m=;HnrB$qhJ zBVk6kQLcb;f#db{^*WysCL(@Gf2mB>H{(Nr^xpur0uBZG3OF=iqPPYmH9(`}HQ=Iz z8IV@44Oha9ctZp@%6JN#6p?rlqYgu)45>rXN?RqLv{ zaHC!c|BpoS7%ql;;#h2|2uLyWW8K^!r&{(KY?Qd-1dOwm&51(u81~%PjD_`Tx(7J9`#>IdY1M7 zhV&eZp5t~o-2N-+nf6Ms{7R--B>Ymn{|PJ??eh4Q^<=62rQBC?&ls>gX=a7CS^o8J zUvmD_bJ}#Ifbfq${fP5tyX}_$4a@(Qe-$wiklIsvLe+l)t5*<-m%}2z|KV@>-x7i0 z-Eh47Ujc?DxdF*9pVNPu!+!x-{=v!P8kV0v^*+bXysts|J7Uo)hQZ<(|jx=D~yabHm+NbL|~_*?sd4wqCo1%~x+>%Ykid-La7k>sPUH!wFA{!!IEL?}S9WV`K4)iXbd3jJSvhQsSdYOHCjw zA)Kg`7~&G*2@j1Rz&8y4plH0~Qt?m8BrrNg!}6Zm?w+%?b_J1;lP9Bs92b6aOetR3yKadOZHehNUByaLzFU2HLT zbHv8e2}`GL05{my9G74p5(?AVd;d+?M0jDN#@#`UiG5ly)@ealrHce;aBhwE6WU%&a7KirS>D>?FK1m)KDSM7L*?F|M4z%6Lp%`*Qc2PtY`P z6t=M*_+^K)@8KJ``jHzcXjAh#dlb{x%%-@#oI9Som&k%RcHeh3UdaJ$yL%rg^*Q*Y zhfzIo7{02HbGI$VF~W`7@l7gi4CSM$n6ZAg)^<#+P1ApU9~fXk{{VA}Cf3lpYK*pL z9y7j>oCQt#o(>+Dr)`aUkIf=)L#MVqp0;8b8Ow)hC?2Q!BwF&??zp-aQ|G7+>C$#> z*F8e@y=>hWwaFi)wX{nYwzK#7+j#opSGfC~$C-KcGJQC1(SlZT7Y-wLg?a&A-Adxp zT4Lvx5illQ!{ma+jl^{2XtM{tRgt8OE+nimS;O(dne`-&E+V8Ul~gsJ{+WLGC;3p; zUPV(}5YL3Uaz4O@H=;e*li*82oF|EGYNM`14pNNIior+S8}6}g1QmqgoE@NTy^ARu zDObR6{faKUD`T`4e%h1@;wP18(>2MnDhX8MBIaju*R<Q|DHaGN(efU9``0 zmo;fXE?Vb#%bUqplC`K#r%ReurtT;CAkf6b>lgCW*~4tRb0<%{caXQgd7mfWf0j4D zI>ymYUuWaZ8>t^FAhL@4pSYPbAH2@0mDAa{W+t;IwX%QnQck{nkd2FHaP-B;x#s#U zRJWJVI;ELw9=)DL2Ug&a;E8`x6e+_C32)9IOsz`^(`pHsP)hvlI{h(dyz)Pz?w9A2 zyjfcv#E5YzWKJt1T;2bflZwfhm{0VKT*BuR5H+V#-2*jxTrwtcH6bX(ogsrv@N&1qRLqE&_s7(F5N38m7-TV!euMjHh;D9fj>TXbh7PskDmzO| z><8;}2+Z6p8Q^Avb7VM<-r)=x>Vci5F9H7H46q!?U=tHkl-v;P%IOdQ`T_G42}R zzz@HC&VqT9c=g4nID7If4Y~)L_9Z4Qmg^t96%(sL*m!y286JgaWF)?^F$AS1;}q=6 zlJ%>pZK|WJw2+-!Hqx#(_zvb44C>b(6ID*XL4);y&DLt|HgmM5kJ-R(=xvA^12G{p z$aV+=tp;FWHlF!CqF-(B@1UzT%36cl$)!0^NS8*rF!m#rp2k}O9YlaZdiIb z5uKBw?Z7*DIpXT&%$@h#$bI+S!s5jkJ1O0`X;L9P+}Od zSqY>Rq-i%eH4^_+^&HENAviCd(9BrEQo^;VihuAcb7oKD#~;3-|A5}OdAr~f6G(7& zG`k+Vj_SE;eXL8suR4lSwe}azsHACmI~D2~(J-rlyAI#3P0%D}L@;scNZLl!5*X>H z`zLnp1(^4@H)n{GHMXiBL)3jCV<-052M5~I$6MWBoKQ-H+MN>b;S(zt6BGagz-?T!%)+dqMZU0qaf9YNU!wXs}MOUbHc zhV7g{%(!go)~ffMDMbuTb70J#X(Wuyz*{~4is#hOv1J?+ubxfG{5mQYsq!ZjVwz~j zv!B1H)*v}Z)rRYzypDC(uja_{L(E-2lRbBB$1c>G5wlu3^xo4rhT2fmRZenQ0&_Ra z;_CbM5uF!7zJ^30@pow9Z40*gyn>C|I7E|8tcli8N+z+)d$HP zme2ehi}24-Yr^hjT=)1*ID|V>JiLN{^iZySMc( zEFXOHg4O$01{D)3$sL|YNNE`3woPWt{%M#*51{S3DYRcdm4=<2WXvxle@Qv@+uCW^ z+D_$$CaO0yYwhszHT4>R%XQVpW(~*172D(zr{h=DP_nY7`+8l2hU6mRFIZkl&cYJ) z3`(O!&6gbbS-!ZEaeK#OmuW}F$TXVOSXZg{6BAbxeOPMN=mPz&c=z-7X;_|=6|Z4= zT2ee&8JXRnIIlp%a)IDtPDP-&KrjKa0?frPapE_`Fv-#rp7+!uzXYK3xMR5fJ8gNmrdqPzMGKwn@Q6Q?JeQSV9aYZDJxRPF61F#y`;ur8}z)7QA5u<)7 zPe8GRNxP&BsY@WJ#2alj@=1DWj{&76o%khO!~mm4Ta5fhoVao=(sL{%z0rrBeult;!2pbN$w{DxEkflwMfqo6cQ(GlQNAu4A3p%#@I<(2{+m!bs1u$G3pV2 z&$f$5oY5X*oaEk?YpGk}C7o!b8y^BB%xIT!ZD^AlAX@`$RT&!6{|U;a57H*-uZZ|1T*lUDw~T|tNngb;d5w7K zt5Jr;$+e8Hj7QHolDx)T3LvkltfRO@&1IsiNt1(wIHsOvVBtL`m<<#I2@Ev?b}If3P3hUKF#Kh!qM1%!*4m9wYM z{SC|imVYTRF`&2x-+uyC1FrUzo93Cn-{ z7tt)gaQeh0&GO4(x!5c}e_YAAlYH>?Io|%}I1MYhC|uD&*^Y7KZ5pZVt_duc13vTC zw5yGidQgojqHKQu3i`l$y-rE%d8BRcf|8} zb|@dHjWtdVU}FXLX8i7M$;W|qyq(~~T?u|Hj`n6)VkqfJF$5)v{pKv9QgR84&%h@- z4zGv^Lc&6c4htqeB!Jj3KSBf+B!&>29I5U221dr<9}%z8C*d2DNN{v4VNsF)&J>Hl zat+KQ!?Xz&F~uU#TtK;)TX7Ha!`#^(Ggk*~hQ&=?+k3lfST1(W<*-jH2hl3G)Ar6C zeLVEv{w-V_80=`nP-i<0&czv!v9XF`^;O5<|+`61ck37Q6s8nfRJ4|(ep!s2J(`oBz0ciG-oeKG>r~7|6@QW3<~&|F z`w}1X8M`08ngPM)#J6XWKE9N|mSn2ekHM`qk@$Hv8jOa{C?#@s1rgKLSWGM=YGM&h zTPHDc*Gwi|zl8b?6DU+K#g%Kvs6MNglj+sOj4P&UStsLm&*SCq-sPG@w{icwPjdU4 z50gK=p7^oF`h!FCv@)%+E+$LT7O9QQrqPrxYa?NFE(s&E39C&Yu{nbskL>5#=Wf9@ zUEL#z9`p+|$G0#X_Y7a$qn&UJuqG%Wm}!NnJmqi4HxaJ98|lW5FlS10qwvZMr%jEu ztB(!AVcyueS>he*j(xa2;pGYV7DV8l8Hin?Cswhp*e1G@INoLJstP-#_$4r!$NfE+8Dvd)c_0-N)!eCmxj2|(rqcRY+GBE6FHB7P)5m5oLsT34 z3?0BARpvm`LG&5eSIdB*0~u^SM9UD1p$xS&)j+oQfIjpeG60jly|9*lyI7mjSG7ah z(_0{U9}_H`tmtn&Ses$#m@%H3(H&}R2H_CuLr7)<-fI1IjrJ!ZCxLi%zpmS}o&lEq zx$nU{*u7^9OP9{2mujnMmdi&4Yd1S>V#+bd3tK-oeE_Ddhm$@8S^jY|&~m8$cg;{o z3k{2VTlB%yaR`%Vk7MuEn;A8-fvfj!VZofq^ipL?KRm;H*nHz2`lxYn36g*G_~RWJ ziKkkt`#W0ex)O6zRR4zJ@8?O7mpjpc0XVDq7&4$gLx-w4k#X#I6@3Tw(d`^Cw4WNU zftcD3#@g8e2M=2u)bq~X-G%|Cs!bLH7&z!Eh79S0hpQdl?sg0w+*^(P0EXDB@l|6d zKzYXU1tb(^GQi0O--IZvyq$3l^2R?ZNPj4CQT@N?zMF}U38uNB91Dwq`hFU0GXztC z(GElPebm=(u)gj!w6`|@BIa8xoGkTu7jh`Hxvv9O0nXj_)d%&$(Zi97s#3zkf+#A? zrGLLZYTk$F16`9Uvf2OSEx2a|5u?^4SuZn27bt%U`D)!P8dpZ$?++nQlw*Zo5A!|Q<%ST zHcuXXl-r-UmAcV2n7R#R{egAF7sL^p7lU_<4-uJ>%vd>-K6ZT=yJZ5zLQEF)KpqIOv;YY*+F{rc%t?;1t(o-PfwYc>y~ z>&7WG?ifz{{xRAWSS|ov?2xzY?$lDdrIm*59W?J6N!9u$s@67YGb;kjMYCK)OtFXv zWEYbxVi!MUdbUo}x^*~dQ?qDN8~^YY^_$Igr+s-ljq2GuB-(;e8zz$6o=IYTI=4P^ zhlb@TIf*1Cs{1BEt?Q|2-EcdvKp*fa5L~py#T9TYeu3Zu4l}YcwJUL=bu01W%Jn5+ z-UDPC8rudS7f@}48<70+>&wFgehcgtSIRJ8`IUgVh+$f#CoDJ05D_pgpuDQ8irU&* z4bVjdrb}Ldeg;f5V4wkQ4R9*qJ%O$fZoo)!1w8hIk_M2Ju%3`s(i&z^Nqy2DiIcpN)+om)OVSu^>{-6iKM9w7QlEqy>5V=}8w{vw z7DNpHYlqb*XVh+#@b(i-{XTFR0- zB(L}-tz3)WNGpD0?xkGu%Y7|*BwoUdI;0;)JH_qUzQR&9Zq+qfTU-FPp*1cdegWG? zyZ~`YBY<7v1(pj4mv9538~G(%V0h2+B;K$9M?tv0T`uur=B4MH82u8Fwi#iPMnu}* zb6kwEl5mNaej4c{pK*U1<0tvVFJby4Q-!LlqL!lKat+J#%8Mu+R{c+~Toi8%ST69^ zfaPMZyr<1_1DG42+z^4~0ysr8Sgr+>M=q?;&|CoMl>qpEM+^Y_Kb4+f`bx0e2>YLk z0O`xiH?Die{ZFMQ_`Z@DVE(T}&#RLEyTDvv_?5KCdzP&sc#m{q-`p6Jo^|SUf5P&l zHBH2d$vJfo$;TMEXY#j?B7Rw|hUH7IUd=bZf2D1fpZ)kuw>|O?&vWL~*}u)O{4M`d zV$u`53OqHyxIk9{uwv%pDaNA}uwGS?0xXTxwZ*0gGk)10O1AtWXuMi$bsV6@h5j7kb6FxZ3mgb40` z;0_KQd5T-^x{jOfzfNnGUwi#7ZrHz_n|JTx#_ikLzhx8Kx2$E&mgQ`@eiIW{j%Vbe zcE+g<@8~(zjGkJ=l(u+w)P(S0o;PpBdGM9L8#p?HjXgLx@S(R8PsDk1by+kss$!@v zi6Xx^g_Oc9;?;&Dqp*U!47DjqQyZqN0;*=q;e!EzlP;Cp!i?STe-L zMjx2xAvVk1oHP`d!$3uIQJ}flF}HDZ)neu5f|-glRbir$?h@#Qqn|t0Ud{}5wkEZz zkj=MWgL_&yw(~ex|C=9uzS?<}8fKPL>)+`Sl zldsLN1b5|WST367<|RRdjaD1Nh3erxty;tKkdc{K7YArt|j#b3K_m=94q#(WzQW4s2X0&mg}~&YS&s4^OI;D-^NY%+{n`}K1FPD zBu_r~DD#)jrgdZ!$4-(>Yh4q!w&LF(s=fz$638?85P5d89A+;$6kDhtv77efai{9Z|C7-kF(;= zO=PMzi|LW1xwV8(DmrW+WrI2s=o{#_W8TAtySgOju%pDe`pgYXTQ-K~t}<4xo6ep0?B&P{4>4C`yf?GAEhb)F=va5-7}9^O_SwR&EUW1#uJ=h)IB08tRJFhE#39 zs&m!mv4;AxTsoR6wCSnQGbb@&=>lf0SV>ZB3TAzVU@>$Ec8*q<3^l>c+Jq+St9UIx zjq^^PeCOoFg+M063*XetkU}@c-L8jdr+e54eYBMaN*)9Ka z8M9zIV;9WAA=HnA(j0OcE68pv)soj#Mu8HO!M(8eb|f+`9BVssY^=?&x3gl%&;j%t z+-<_f#H_D|`~B^PGRV%9p>}4NS({^OK2)XYkDaTX4jW)S2uoLMtX-|BYADekXS34d z$jOMuSFMlz`uAd>`2f9^-}uurm zrqw`VcG8SPjte))s^G2NV$t z)BYN;OPdGVnsSxp06piTNiO{s?Q;775B(9;J;;mxru{It8iKpKEgr5mWUGF~#)j&# z?;~?%J%E7@Lm1>Zl&j2p(@(X3utk3j>W2*Nt3Pa9rRGq=CEY+LGi?1_uyS|6%*Fy& z^}GoQ4#dgP9ygcnL#F#%55>~ondR4Rp|7tMi7h$gjwz>Xay|KDDkvITMa%5r44c|U zY*r+m{*L0zP^j*b)D30=tK?z9dZ2(+OM8O^_F%G zecP^?K-}%VR z(&yU>c{nW@1?P`k}=aquyn(G`l{dgzMFTd_oa~(s5Pc-Yzw{-UhKJH zHy**xx}Ns&by&C$Cay4=oTgm;4-K~vXDr=JiAf2?HNc*mAGn6l++dm(4I_VUB~@ES zQnP!s8ovpQxOyTrYP_0vjv{SNp?2lEaCr@NTRN!UI-J%$YTZ`h6>4lns@0~ycttHW zYa6LpSxedSY7N819E)hFi-r6%-npk^SeQ~m{Tz{%C%{g z+#G!^u-t&>0>&lGfaDUc^YsAV;y0kR_yt@WVx+nJTG9)=7m@Iu+TuoeMwv!B5d)wL zD3^SaM$$_@Lt|aSde$px4Tx@NmP?-nlnMYeJ_Hz=vj&hBzhRoj2$%E%8f82LItpAA zpeUeG!UZf!xB)GDf=hvr;!1i$B)ya=V$>lbX(i6kfEST?X_sjJN}DB2%9gr}cyW8e zQ7KpQ813r`K#hLMwb5QFPtqCX8sX9&10EaYh+oPz+TJr?&w50}-?L4UPVyQe*D^Ln zeo13MTq#%57-dNRd#05*qfJJ=5-)x!N9vULo@tFX8slKJ$(SFh+ZYc?Ys49IDw^Jg z_O}7N4InOY;))p1TgeYn&kq^4b5^5%U89MwPqOE>pRF= z*RJ7t?#fn@rc@H%l1}Tw(Uf$Q;q2!?NVpGves0v&m2v3M6TJM!VQzWoMy|VaKQ~;v zi(B{Y;IjE*BB=D+0?!L^FJ_qZQ_=-N8w*_{N0e;O(xp&&9sE*g6-j zaslVot}a-+yJF)Z+LdmYySrc}ao%oNcsgS3<3canp(Iupu;!M1cw|Lkn-tg$%2R{2 z-Ey1E5UpKqouT|0fmmnyV_y)g5BLE8mw=j449P-MtS-W{98#b?E-u&q}I9PD-;G^2zyLYSF7^cwBP{H=?>v46n z&X+j6nr+4w(a}Tq3|0bg1 z{JH+NJ-q(z5jO2yNnK+B`)}AnP@)erHqE4bW+NuyW`vE+BV%a`{^N3poK{NQ)H2eh zSJAk96px>Ij;D?v|^39K*uypM_w(sAdM)4x=o_~|-mSPUQ@*odCaf|BP7QT7>eoiHX@Qsfx=fXTV zH@1aqR?lX^#)TYw?m;@5%lYEMNvhOXfArP+Y}m7c#jEG>)S<^1-qnhF>hR19kF#O- zT8iol_<`?v`}23P4tFHDG?ua%OMC#&N;^&sDxCU+aK3ClJeQt3D`i+mlyw!yET$Q!=UJ z$|#=ILg}1VBAT*r&JD%2FapoYc)T0Za4L@_s6LDIoG@m^+HzyO6SqgYF(b?Yk0L*Y zw#4F+ABbD7@|XHDq&xtJf(TslB5=$L#6HW1zCJ^F;*F;``{hYCZ(qr}6?6FP)Z4sw zPHsR2icHRgH zRr4O8?U%o;*4oLYCX7h1W5fE18k%idx0?H|zljyorm$#QC*!A8F=kc`lco=2;*?g# zjc=l}tCrDSb##qu&~DrCa%$^xXc|^TeM26@+DmC`R~y0BVmgLbD7Talb)O9}ze)qr z0p@*i^>?S2Xb`|0NE`$WQs5NOQ5pe;eWJFPzn@C}14EdSS+FxFrPGfx$qee9`ZQ5w2 zPVHjMm^Nn3n!ruh?@`aS)ofg|jIHZd(AH9`HPXdQiD-@sFkQT9HT7NX`pk@s>QWj; zw^Pq_xqdmp|2A8h$1$^C9TZIfPuX*HSMP% zy_FhENo(n7#$da_^s-QO%g2cRS24)SoPGoPV{dDRt+fq~_D*>FtNY%;Mw`F6<=F>` zC{M>xt&=9seX)pe#3|krhgeSrd70xC<*WN4b0!}J`u9wB{=1HFm~ru>X)@KcKc*@KeeC5H!Qz_ZSd1NImofVw@3lx;6vS!0VUVYdpb*7cZQ8cEA zaeJmyy?G@0YveqNYHByPQ@pZ{GIgE1xPqn~of?SCwLo(b2@_~uvZ`K-#N{uk)Udo# zjd$77Dh ztkE{hi`6?vVrx3(6Kc8r*}F(9NhPB|NqVw2!y>R;!{*$4GIP64sibFST+${N04^|G zAglq&dxCO9E`{g)Gb}ftwgIoTsgpn9wE?n4#4mXyt%mn1pM)D4M#JYh+Ip!lp*yy7ZLc~6PRla^gr#C z3+NP)cnK5ve?qhTa>#nQ7=ZS#q$ha31a5o4@+$%8o?_(rEBU``hUH3S_LQD&`5%dT zj{Oxd7rD}y^%Mc$e+A1$M0;Gs2$MO{_mWZHpZ&Oe-V9hSb1Y_9dcyL;on6`tOTzRr zmS4M8!}1S4zn~BK6j-i-`MD4H?32&`hUI_Dzl@j&aMhwg`IV&Gj7LvRv<$pu|1m!<`|7#CO-Yqge-SW?X+z<`Q|3zT=<(lPUhUNIl_c?juea;_$PunaP zSbpKFv%K~7`_wNVO~LYZ%D0Wxusm;Fn}*~9%tgbzaKlJ)7Pk`CmPz^4CdMwAfP;@6 z9^MXkcsLLm$NJGFNCtvBxD&I7x-edjLrZrZ@|&C8j-V=<$yS)?^^ zV>?nAt~P3G>T-D?KZiF$;`ur-f*(9B_`_`gIGOQ>vn^lxdhoj1T;E!p$jX*%7R+yD z{Gt)mch!nk`NQEB$BLzI5Og5NQ#RlK0cPXq(tJ<(}>T^A|WdqPcJ{5 z?OasxR(M+45a8rUh_@RNp+3aMg%KGYL3ngGFgIYihylw3qr&kC4bryDy+Z;u2p3Q; zrdVt}U9oU?&~|A9;-m124AENUl1A*7cZ<6gTX#1N%SE%?!rcXPb#0;I2dX}sdAl&w z(}_N=HiQ?av*xz_*d+&H8s~#WasXC;f^w@YCFwz!r;E+<5NvZpH7s|pipH-o3Gb$) zZoB0pv$Po&L#sS~dKDQ9nzb30pb=_wHm^y449S>Pug#9wl!lNoze&$|`rIaxXV#HA zqk*hh%|x^pV3Fj*kx!0s%QN>efBh0R@7;oxy#-mhY5HJ50pwB9!AzSzo+V4>Fk$Qn zl48TT7^_8qzI-ih0FK)l(T3lUinKy45!NJ~)>}X=j#L?ua^!s;g zBG}8B&8rrZpBB%8nG<>Jq1)*i)r6&aZ#HdS%41L5MQ(N+Q2}n)484lCjve7AE^_;e z_u^3+LG;)noa$q>9dhY=?)(<5On?nh5{+nKQ@VX2y&O%wI4=f6RJ7&6#V2E4LiHg9qMtoFzA|*XDGxCf5)< zu9&FFN@kQ0Kev+Pg|(zCQggq!p0q{v+MlwZJ4_Blm4i}KR9yT*m3Mv>>C2iZUNe%I z$t6UL&m(MnZg<`#4TMh4C2UF_2{Y9uM3p7x50b~_QZl`g=7qz^9-c+vsC<$eQ)yY$ zLHn99%({6wS+nbi=*sQ>n4|8`rganXERWWpJbPRPfCGjH)i0jDa#)G%< z+L>2L%#6|yHQ3Xh6m>t|wQmdGo_UMcp1Gfw4&K9yhm;(-ha-pY;@M|z<=~Sy@XXWK z^TfexdF0{UoPO~kPCk1-7v6cE=bpHO%(QR@4l%(a&`zxt&SVuOb4tx!fSW5rh77@E z@Ku<&TjJqm%dNA=vp3L_w}X87-o=sM{oFX86%G&WhacbL$eF{e-o1f^3+C{_k>~jK z?L!=XZV#`%b1N^sdKa&}_7JbX{s^zX`55oK^AyM4eVU_3ALiLZckteO&*=D9Uwx1l zU%sCcC!XWe&)?GSORqe{*WaDvo#U^ta?N55nQh$cy5Y9PAm(gXPFiI#CZe6}=SpvT zGY!kdZn?=o6RxrytYNL#ueNb@(B@ujY^<=evtiJX{+L<~Wq_qB%dDTaOD$eq-c9vM#m}?U*wt*g8_r(2} zSoX&+E)efX50cdLBBeA5+W;%N<__nK>f`B;UQ^G&=lTBY6MXyGyPP}z0_RS@%%`8d z$B7HC@$8XxD&hSA0RQw!L_t*hdHuyldH3ZfIra8o&c63D$KO26YcD*;i-#ZOM}^IO($7BkAt(Ka0~V%IXi)glSXs@J-4!NxBN3~H7i!lXYsPx zjG5F)=eQ1|@lXLcXlr`8!y`i2c=_Vo)j zEZ=bd7Ut}oNA094;>)5q`1+&jxj#hB`&o{kdWo^)8aaRA4ZOT9`Qsm7aNYHr*}P>D z|KJ-^Gt_UGZ>g%y;qH5{XZPOqG^ja{gKN#L`|;UVXL#$~=UKLHCg(nSlfmXDI(*3N1YD&iQuX*@aeDhVEwMC{}&GUgUhsK!cU(rt5S-qEQK z^=#ZWf?>NxYqw?RC@pfxr??U>hk(|u`8QZzzM@8JmkSs#UQyj`!+cd8+4G8YT>H*W znpC+(^GYb5TY^)*3qA#2>X}^MZL{3xDw>y$Aa7g=Im3&%>+rp#7N=-?{MlJ)`hZU{ z!=hnvUI7_7-LO?O$S;TG0?EWRK(PUmdzxhtF~GBk_ytCb$hE+01C(nptwj9BbW2^UaqBW`yN!tXLOJ4;98vPT$fKm~O zGx~fvJeN56&>&FJ0E_}24Tvo8u_vUKGy*9FfQty2lr$m+kd-t>86pCCrHxXb0YD8% zZp2GFr4ES`G4hJYwb5?5HriXtqW0G2Q*$EaKKiC^Ny?FqBRZ;YY1lJD|%iYw(yn9PxsAtK`} z?UQ*j>g!pyi_{|2(`?V79noLPf*?;-WDwt^v|T3~h7+j!Rl2k0BB# zBIzW*Xq{_F{^tRpM!StRO8Z2NF);i_-z7}a8GR5}!bQX{BK{B6{~cJ~Gyj$3{{&e69|7|#0rH+AV{8EOo?zU7;~DBbBwal-CES<~sYB|F zTitM}AD7RI0n5`jw&?>tFNfu^OR9;RTEhBUxAHyTU4rET!aw=!WA)DZA)kNx#ow^} zZ~2!IlV85;hN^}}xd2qrGB?D4kLxB|>SI;F}ubCR=XPH^IEHz+@L`hDI% z@gB$Df0ql#Ra;KH&%Zz5vqNnt$5XhfoszX38kT3Ng*aP1$ji5PQK>ehah=&Dw`DVR z<1AteVzKwO#XrQCgv1z32lZ#l)CoLt_;K!h^iJ-&^+xWw?pp5Hy_Y?kHn3#VQl{-# zz?j`L^@g;jA(oX*>D-eU!@1-{E)2B+7cV8Y;AX*Z9(H^f-0|}4$XIO3k^GllLp}}|t`QsN7q+QV%7jrCP znng^m*m(>5cECG47?%Ja9VVt)#Po`VqaAkcZYqxl_DV#%+|0=VQ%8GkhDBicU}sw# zL;N%_w+--#VR!j+pJJ6mYKmCnmZIk;Z_!>VYydzECEfa z__d_qH!PLlk=YuS2aV3vBDTwuXV)=A?60<~&6XNhfsq+=8c0@~RDtLcpSwi8$jxge zX-XBTlWNGHpg%F`kF+yP3{0&D{LR zO?=5kERx-|t@S{;hgILi9=T{i*UazW#gAX*h0{kk_W3(J`2N!*k1A%#om(iI)5^lz zHnRNAtwhzPGI#%SZhih9MlBsr*Yb%RcZs<%iumH%$U-}j?HVSD9$G&(1Q&d7vke( z&A5@R)Yw{ZHa?7tUUnRFx8b>hWa1so=$z25HD2>mqxD!M#00W!`*OmgJh}G3PD=8# zdF;NsIrsiMtXwz`KTl_NY+c8-*X?1|h9$TKI@8ouk4vN*^R_RdVP-1>{4E$5ZBN)} z_4}AyK*F3#4an0MH;}rpj>P%Z8lWdFs3Bun6RArYG$A<%>3Agen@~1UXziccO^G8s*sFT7uZ4}KNPS&IbI;XX;zBPv% z)BJfc+?^-Olj&I0O!TrAHK%H`H&eZIE>P`X*g*d5CJLuFk~^i2{0TLj`S}8a?E4cK z>4m?)GcGoR2y(SyW@j@mJ$5I@jy%Sj&p*T)FFnj#uRX@mmmc7Vx(8lR^72b}aq!5E zy!Y-SJbULZP8@oG<8M4m=kRJgT+N7!_QBa@Fkb%F1V*^AYTW`n9Bi=@fN5=}HMUL6 z2C#VQ7{-Qsa!-69=RNH}t%Ii>25_Pzj`MeHA}PV0p$=vY96W%sm}o8>d6Y9J@8#(u z+j!x%TR3#&79M}BQGAgi&TC=>NOtn>oh56tVD#XtwoZ2RHXn#{xF4&p z*@cN|FKhxG=x^Vbq3%QI=g=FQ0CRrgYYofSsOMH~O*)A&9^7{QCf)Y?WQ*B~C zT z9nQS>nz{#{;icyv~-}qK-hCb3T_LuKINt3C#VyYhg#S9a}QO-5!o{NoFp90%~_7sr`2 zv4xEr=JCm=@8je=M30GwrzJPvvWxrfzn;iwUw&0%nVcG~-qBv=`kS_^=jV9Nsrm17 zRW~fJEYDESg~jR}@ffku{`~gS7i6bIaq8`tx$(d@Vk7-Sg=ka90Fc1jz;S$<@zcY~~1rG$5-k}ydFc%K^2&9M)NWF1@7hL2>>Eqo{9?7fmr=5~Lao7t+Gcs`*mNT6BWPLNLizM6 zOuTzDaoco?##N9|lgjfaULdtFmF%J{wWef}o|Zy}dao0hEU-LNz26D&H9)xlFgff~ zOsvSYVV*_6tfY}}!z_!0OBw;sJ>j*8lrPZQFr^}4Mmht2i(kOCZcA>i)<72<;sVR% zTJjj0=a-9-#{lC!p}fRPxrRo$QKzJrHl(Gc={U(NbxD7vf6^c6uZZ+Z0IH0QjEP(e zG!%d+pwNgDSMnP0Q9z;rXC=-6yaFP{Z$M&!km5=jBTn*3cu$ZiFjgR?gd5OP+9R-c z_S`w#cE|1iWM)IkH$bO|q?0^GnD~vfQm0%C1ebUNrpmSSRr)7>X^*&4uaqHqC7t*s zpTrq{sZU&KucVV}>7$Xx5J@9t7=4!h8n(fWaS~VRmNrVbq?hs}y~IhGMth}9DNE9e zNE)L(B9g{vm*kZ;Nw_gK(pT||$b3qi0n3dxO1Uz2BGMk28$I?-&9t<4X#3*=x&>fs zh+W^HMZyGZi%Ax74Q+A5z1-}I0mkK8%IOK&jdBdrFLF4jF-Fox5%C-2Abz90#=IMI zAbtrq!em^e&yr8Z%NPT>_XU zNzb~jB>x1yuOL?{v!`4F`F{d)u@Nq&Pr6~by51<`q1wDjNsn>41kBa5FlAGRmekF| zNmG(4A4oQKkhY;+yKTK_q@dD{*S>M2vp?^Sr2ix2j(xL(Spkuw2Zr#4N7T z=ZkH-XODU(`B5M6DX?5X`Db5z%7+&|`dhR7Z~2!Jlixo1ogY8_RlU5z7vEgu;@4`k z@cSS9tlS^J`9>uYSpExq{i_zk#0Ovh0AF3?m+!yjd$qy%TmEg_dk5i2OkO~KXJ)DcmCvG$_M98^6`mNe0Jh2pPW3)$EVNn z!P#?a1AU&4&YtJ9GZ(mc{xd##_Y7Zu@EOP6dWYj@&+_>X-*e)F3!FNAmh&f1a^ch| z&Yn5N$+Ks8|NI%=J9nCsr%!1!EFYXWsqL1ZIsHBtzC6#dZ%$FSY?KD0Rh!3AvS66n z_O4?jPGyn}JEbtNG) zgB2S$@ahY%@cMHv@#rmgaoaUlvu)1?7O$C3eN!rvt7F-d9mLad9$W~t=O<5d{^33l zT!(_2GaoxR@m5kew-!XPazrkzWAkWTJ(8NWV@VocO?X2dewhhcdpkBMj?B~~a*`6X zMtOR20;#FVT9Q?GVscWqc6m}V@yRJ9q@CFHk3{{yVzsrV2y{5 zw+7{sN1%C7Sg1C`BEUQ#Bv{7@Fc-gfpg%5N9;*L7c>4Qd@9K=Xz%Nf%{31iOi57w6 zj$ZDUToD26V!vFQWO45y9%7os8MjbBZOX;m+ljF3B$i*j1?zB6h6KCl13sOz!m-Qf zHo@Xj7==?&6m|vS8kW14$7+};rYStD)pboA_GRIu&u$=ObiRhg-8RT;F)j4PXIK&? zD~1y{v6$>d&4f-W#(hK@@v~~RR(bB+7K-Pn7r9Yt<1o3I%JI!arjcn5fqkebM-v11rBVLZthDYT7jr)$D!MvPJ~1*tK#469X}x-?o_>(pj1Rc#8> z>1c1JAU})7h8iNmgQzZ7FR3}{OrJJUy}VY@*iy~%RSR))v1HDiN#tfEF{-VRCG%&} z+FVCqkPpjNFJ=9X%|xZd5D@68=C=DV*QV-XRxO{$y^r2TXifx4?fC=`&mvF$*)YFG zYdlx29nHfZJjdL93)yndHts+13^hwTdFHD(XkI;z%}-p*W9MHWp*5d%ckkx?Uq9rv zuiodD!}s#csTWy(-6kG9_6()t)r)XjDbT^=n-(&B#&GiLb0}*r#MaZ4 zMXP6V?<2P`Vaf=sYzONDau+O|O>|5+QPH7Ho7IJ{p95_*Y7;SNFz3`g{*|{q#{yiq zH!YgLA$`=i4kO6ljmFv{rc51+e~_md^EUi~T&SwAAT=vRZG7q(HM)cRf-G&LfB5hw zR;*k|$A|`8+-u$bDNAZEiI`zAByDLU#hbc_ol${9T_m~7TFF_eUg8%tkgnp=mNpYTt4zc6 z)Ol(SW>*nEE}w+X99q|mW7ygWG^ufy166ZoHE5gh2S-u04#F-@oh=PzB&@yhHyg4Lg`G8;l{*Bj)&XvXq*lC^$|FBq!3h-LZlM;$AxQq ztdd}S+9HW)%^{_wl&aAUxP`dl9pZ@v5!?;U-Hm!G|# zXCJ>^n`C+C=+jyw`OQ}!n0 zFKebv>7<|_Lu*aFDO<%L7H z^Xe=2@bJTXdFiElcSVpKdFFl-;`T`P5Gck2E<G3@E)C1}n_%X-cImD}C zs^;}ac<246c;V%Hc=45cdH48}y!YNyyzoi|>2l;VL zUUkpB$TLsf%DeA8%lUJ!a`d$)lzWt?p16}&UVM!Ajy=!Wg3_3+a-rkFWIqPoB6T~cB8+#7YF;> zV&Xgq>o9k1`lWGn6Tho_KPlLc#4&GtWoPk2aW5M zY#dI;lpN~TwotIR8jE6A@|IL;b0S%b%c)cw+oIL=cVd@#3mmg1EeJ(@P7;fCO0RI3x8XEJpnIq9QU$AgIp*g`> z>Y2>CWdWmhjiqzv7;2W)QaZm(!|w8h6*Q~Oe4X0dXUxo{R&DyT<`!xbECS1`)VpNz zjBL{9&5d+b>5)*5Vbys(6L6X_u~q2OmSh)BL~QDFCw?8kdt4WAtEV? z?8019(vmeiPEJnNP+437#|HQoS2WB;1Q-e=GXSyyJSDs*Ko=7v0;&Z>8vxt@=LVpb zcrmRa;c_i*Qj&WARPh3>jWmX~xx^c0Q=}XTmupF5gvp_uQf6J9de$kwgo~u4r0Byt zrA$LoQ&Y7FxR-JaS3tRFvP*r&;h$2Mv`fMT+zWu0!$GBP$tP*#U{J$cOk-oC9xnli z0xAVCioYk6lqQ6yPak$lQz^)yb+gt99IeBvMyT zXeuIgNc~3Jqz-9|)GJV2;IYI>e1-AFHD_@z8aFYz*V#=ih$Jmg;i zG9MDxKD^`7wNZzN)M)@}k+zO@okm3b5+{DiZOMmuDDq-{p|x?i>R z+8l~Vbxj?WRW(#psyeGxThz6P_~ql6q!kVDhQ?+c-ZHFB+ZvZVP0hp9I;{Fsrpi}w zlBTS@Qpbs3^2)Uw>M3c&l{`(2t(25j>hkN_ny4AsM8SwE>K2Yt`{L2sW_i-8=59^k zKcT9I;3`a;V%gZOA#Ol&1Bx3W;s22cR5#M~1nv?haXr&sE@>OO&3p(H7jSF9R`E-i z#P#$W@LWK!XgQ0<^OZEJ{|(yyvl$m7%t)u@PuSa2dP3;S;q>KlrTjhRN&vj4^eoE= zGwS}&Bt}W}nkMC{ylT9Yl`G?(rurzLI%$Jy|E4CAceD|;se#b7YM-=CjpdHvx}FI2 zEKJxmoaC*Yq^oCRhLW^RBS~H(A4odL+SEzjwlU;wA4}%e(Il$0Nn1t|w6dPCbuDBb zm`JR0yT?|InR;i5U(-O!CiUFh*hK8=8dBCbc7t;@KXQNNY#vVT=1x*qs`gE*V8wOo zv>BF9zxjl7pPbe9$_1Ez^3kXIfKL(eYxxs!8?gMsCo1iqVgFMRi2m7UpJ`XFzyJPw z4a*H^ekEx7xBUN8O!x^de)0=neEXByYQT4DbNBVfAMlS~e&Cm1f8e{Hf8^p%Kl8_T zzw+zFU-|0SpOyT`@85sNKg4{;kKc0fXOZvzcK;7_zyAI!HTR$K%@1Gm<#(TR`obwr zoPD1&ADrgox#OJs=&X`6S9Cx4@T|5s{>d5To>dFo`LinDSpM1{epMTET&pzet3#WPQ_Z*ZDO@pvn(b4_TckFYE88j9ASPJa$WL3c||E3rim_+ES@!rxvhn)EsW>(lu%v|_vQ;< z2maw<0j~Y|&9fKZcn{s?D-*aSA~>$%Ln; z5R;xvQd%l$sflDH#E}{sO;Tb!Nht!#Q?v*y7m=_OmDX?*k`f6C3&qph3nv$69G#tT zaB{@T&K7qSCXl?R&2oLnXK09a{elAV4-Udt_1n$M6Hi|sy!?Ezb8*7fxf_ZHM26ww z>!l&Nz;QX)Q_Qf)wLo$S6A{0JiCDQRadX1l&5?ojR+zcl;}sXmmYWY?7T}6YatL;D z{y3zDV42{@(0Fg`bHZ^ciNm!t9j7tWPDfBcI@5S%kD^;!+($+=Mc`TT+M^ zUqr(6Dw1YaVObieVR`X#^^!EXRNE*Iol?S}@*tw7Rg%ASIB{LYe$TSi(=26<}JRjf8<;c705DoPkRW&{-~E-odC@~V6# zg|rQ?XX=dc>V>$BO`F%M7u6ybE}BDKZ6%!@>SeV!kD0TkFnYoWq7%dEnmC+-;taK+ zY9=o`h32{nMh|bLu3EJvI*itl?NknH#8K?W`?(Pk>dT_pQ(3=kAsr2s+SYk~O*SDV zvBZrjB58gdfl~^}Q7_A`6mJZ9{i!@eW8(!OyD51c!sfkE-iW?GhyrE-?~ z4a{hxeaU!2%MyvIOs95gJIk-x$P;fL;;DC@=ZyA`7|mT3JFxdfw7ZEF=ze^;uB+thz=pQBn59DJKEHyd9=G1Cn7`m z!png-0-U)oE1saCeW`A!B0R)f+i_3NOT#}hK#!@IMXD2c67G**s2^!+tWwewRJfDc z5aiK3tV(UdC;vE3vN*r*NtKJE1|}Z#m1=OXE`YBD<)b z>{adLsevf>bove6c=0Koe)LZ6xM4SImd#+z>ggP~ZY@t8yocA`e2%9MJ%Wq79Tpb-^*;cz zlOq^%l?jfPeR=k&`?TpNF?S;WEa_uwi^&jEmTcclSY{YL)+WsJ>dQN6?))a_IM|wS zA;ODWLwrc+brng$Dvera7cQU8N1wjLGl%za@a3C$TZWCK>FgD~qe05@9);vz$l!zM3Y{2WIoEBX%ZMSrXQ z^miCa^UTrYjHt#e!X4)nwRU8NlTehxh>7j|@yA7d@TRwiBSQ!E#@WG~vXTsLx^XKX zefT=Zjy=wyL$~nqOSkj(TMuyT?FY60g~K=T@(Z`}@{!wk{@I&(;<0OaO-`^c`v%wnv&X}Y6`o(9M^y`hOleM;eZXf8%rWMKRR@hov(c8p?$nXgDoA&3uV~2PE zVL_h0;ki3`@z7no@ya7Suj)Pc`0YIT@Xb8?#2vhR_+egq;Sr7h0r(f1r8>t99iMe#cHd+vMY}em2F1v2@!y{8A$DPK_Y6FbVIh z2)(BH=S1Nc;lcIy-oWmwx8mYxfu*_!VnRF#_O`>rX)w3lx|6f#U*)qe-cj@VBtQLd znuAZ=#D&u@YmNKopM99)Z$8Nf??1}tryt<+4-fL?#Sh_|Z+X!#lJ9)|I3Ml6B1;o; zB78A1Gv#Zwp^FakCM6@B-S_Muye^Tr(fMT0si$I58(SaP&8-J-<tW| zv}_th+{8?+>D;iYk@}SlgpEqXuH1{*$r)6tO>WW3YO2*cOvBC*l&!5NaAXW6E9@;*uAJU5Yo+)hW0q`(hvB$j)1~ zvtaEU>f6h?|KVGSj`ip4*|)K>?#J47^Vqp-730RY@ak(%5f<*wV`~0JjaKWjpB-O+ zbCv-EP5AEO1+@l;Q(2Y8!DsKo#9CD_sp&PwlcA!0XMrL`kw_>jsv*;wq10#l{2QJhV@Hl67BEI(Sr|> zmlVc`#!{9pnyf#V{KS{o1Y45YlFGF&-pugL`=eS zwU6v()06wy_tK5*dj4A0Kfa9{-ny0R-@J(ze}09+*+tYWtzqOg_1s%rq2{cB>UB+8 zM5|m(uoSPV(Xc#qRxTNH3p6axUr<8zs(NjPMPPYgLl7~oag5nIRv$d-p5aN^*h-wE z+(@s?JQ?%#rYa+ix#y2asj=W=^6h9we!0*$FBs-4Znz_5$Ty;V6!1cc>=u+ z04@+)t_4_&UqE$FSgz~;6KqR<36r$aP6LvQD`gqwOZ%lvf!cB{@ltj|LV}Jnw8te} z@`x+2Tf)SZw31Fl$`>#$5L~XM9s%hB$;B0sFahL}PDHfeC0tSK1J;AnwNjkZfG}2$=!+;?Y*0W89NF5@QSMo@hk=_`;D~ZHOA0)leej~kv zNqa8OBVv?m^eT$gYI znoGUnN*W`t0m-E1;e0lNRY(z7fh%qa6e6M^MXYg&k2JM7=X z^7U$r1eR}6?k+WUdpd~SuF|ToxD9Ilw+<(N&p7h;P9|kjCoyUtl(?#mye(?)xMv!* zaxTcOsT6G-Lz>zLWvm-X=BCjkZyZVL_Aw;w7(>vqS`yVf$~<(>p&DORzDVNwI@P8> zVY!IFa@DS!O(VNu`3f~3)2di{^=iKS<#VlBE(d&`yKq*+aDn8aP5w75|6Bf5#N@j# zy0ywbym*mMfBsf$TV4G2L$zVKsBhv=fBTwGfBlYce*B&IL~UD(tt<`ReB{ z`SR!Qlzh*ZKmGW(`+uPO?Qg&G)h|Er-S5Bg^{+o_n0@M#4>o%YA;rUa%^6C*j{OkfpPrk*m zk5BOC`S(;E7dU_V)L+8#(}-wzW{M@;O8 z(#yq+p!6^*JBt`Ku9zv+@vMsT*~zB1=*U3=btfDvr$LbaK-($xKZnH8GCVgjiCPBqYRX z5H3)>rwAZVO;5Yzm(7+ybOGkBVj9KCQA6_~=4M#i+i3tUusk9rS_5*?Bo}}#kX#N* z6JXvGmWv1|7hoBNX5%xpQf%(3~;i+ zB{GPco_r9qKo9zO+F~CcgllFr_Nif*C-`BL9)d+`AXkMsVd7`WfEZVLh1t+6!VasP zKw?G};@OZ$#OMNICX{MW9y7U&_-W-DW_mWo>klL;(<}9%ml;c28C({K>oBzeT+l+n zoE8eF)KfS{ZJs)7iOEYMCNrMmTD9paFQBQdnS#y#W4ausmO_8}cziw8`C?;;2|NitPF7C3AWO1uHv9oL5Wy zyc+#?*8Ek&DP1{2AByTy9E@{8AYm=(1lFs0?JA~Z?l67WYV3$S62=rG2dR$OIg7kG zO*mCV;8q(;{=!xYmv)dkvzFpD!%1FTNx_UVCaZhuhN2wKMLF_XqBWC7rR#%6bEh?u zH@!*QLQk1fO7wy(V&-IPGeZSqo0za@682t}>NjjbP^7zB13c(Ez=Ua2hI9VR>wNLi zaZVh2k!$vBptd|4A6IM42Ag1G+6Q0t`}Fm(A~wOBoV*0O#ZIQq8=EEF$>2BUQ_85l`-OV+7S7~6jcjHoS z*|VM-cdyo3=5HT;l;@wni(_v;Lq=L8jy7f_#l(;j7e`-JUVd&OVp_x0ye|XI`qIa| z4<=^4sh>K6v|*+6QsZM9=8S2O1B0B0FmcW}E?jt@ek!k=U*YfLiiK%kLexDwy0ebs z?;qy5=WgerhxYO8!5ew~=)J1$hj{JPyS3?>*N@)M(N`bf$l*IU{M;S-u+;b8JH+_0 z%~~Vh%gYHnTMKp1rZHgXK;C@sZMB9vYFKXL0WtanQX?_IfM`9UZ z!}Jx?xbE%)8kUDec;l(=eP2&IZC*zX_&jm!2oK(UE$_bZ9PhmT498x3f`gBV`IYOq z{iZGK-LaH?J63SVt-E;VtwX%^#vyIDJSr*xTU%58Zy0YMcU)Z@7&>GClg4%FwX2u9 zXH16lqIpUuk;Q5FXU1rgHR^7~@{p2GzaOmmVadGTVV4y3#`&XBMbq}g_W9!WaNU6yup(dBykyWI1l-hKZN@4c(q^xkvoe))nk@4v|758cD# z58R=~@o~p}A%~P^B4(j(8RTP6;q$^gQL$OoqLsDiqW&(0x$3w$}aGr+#M} z)-9yCFol!HU!|X#i^I=7M5($5f&!fRYkkK?1y zPHJ29VqT>nCxIpNCUM=KjrcoRs&X%C_mk6aGk@k-^{ffw_=Pv=Wo<&|k}lTWwUvrF z&G=Tu>VuP`TJrEIiz9NFdWJ6=NyP&79=K>2vu|C>oZFT$^X7$AEp1Tm1|{5m_I_sF zI*+N>O`~md2d!I&Q?Rg<;d{quTjdQ~+qL0r=>(RSE-cp? z>Y*)Rgf&D^yReS>`Ax*D_mF=lC+Icctr2E`SOav+wYUPV1&oRqAltYWfGQ$+ z1WpSam2k;xe7uk{{v(n4MS8+y1GY+ClE#4J5-xQ~I-@_5UR+6IgiBhZFGfGaZ)l}U zIwOsgDS3=^5+~tCesLvEM6RVSqaLF!Bi;xzt|d;cC7-lU%94H=0NUtR&oV@ea*VuE zpAl!Y(a0lZ7;_?hkuYPPdX{DQdycKNLrk^En8>w2axrNlWl0^PRc`cI@(380K1iJ8 zHOevS?ODgAajjDBWm@DS0=et|1mFhz77=Z5BfSC41%S)7;TK3QjlP%bdr zfZqR^^aSOX1M~k#3|KC(Rm6bW#n}}LpN6Z#g?zR?URCw~HR5T$%XeR#=8G@S@coaU^V9cVs`uir`SrW6y8-#HpYqcW zpYZ#4pYV@wzEtw{-|~N`{PFcy{QAY`+Ar?sr%v+m`|oM@ljHC6)!8%uft=#23#a(v z!f`(R@VMGrzRw3Az0ZXY-&2d7lJoEK#kmuFdHy8deR`gg?;Yjh51;YUo6qsd_aE`* z@uQqSeL}^4 z=N8jABZoTq+w|&Y+BS|SqcM-*h#=A0a7vEAL2Y<#lS6RNjl(rB4vR#821L1GogRRBvKNEm zT^X9}%8V+~XVqx48|h1i5i_$2yXr`stD>k{ zJW|{1%O9y;K*u&QY{GDsZ(hlS=@UrKOr@}_2xku$QZmvRJ-&;!j#h2AJik!QUwtKw zO;toh`Qzzrr_GB*Mf(yLA4qIm08tU%YLgp-*jkN`3D)p8$k&~$^aQ%bbZAZVruG^p zOzULYtTAfC7)x<}3fUBHPZBfZNJ@@o=eG59b++gO z=|WP2Np8p@adZ)BbL)tlQbNF}bn@raX?wW$zj8OXK64Y}H%uj_A&urmoy@yt1=l=x zJ2Q7LX55AuJbC5_HypZ~t@j^b?d?0b<%RosJ_N@5 z;UDWmVs1Ri`HAF|XA+wlL1B3|HBDutsWuiArK=4>zS^WGsLgK*8QD=()}_;1;^}P@;K6SI;RFpTjCxwyi<*c>oGgIQIsVpMDBu{ISM??n^6&pl+N-WVyQQFPO zP9i!kl#noQwJFY08|Zws@lV3eVF;Gi{TSKR$kaKbY3L~9vFGlga%7p-EYJAUUbujA z(JW7%Q$zZKI&DVfKZ50Hi)wY6sHvqCuIRwMA(rx0BgtQ+HVreYH9!~b^5g~eTC2Qx z-6+abeB77*|4ZHgNEfD6wDn)-hy_D7POG3 z`jNW4gv3R~WXx!!U_vvGy!@$RuFc#TWxDTP5t&7Y6{r2VTo$v z5pKQdY6hrz6Rq&zAYXz5ys@=1<;CX@s!e!)w`RH7RaA8~Y+1XQ zHOppkoVtdHUmhA3)1(bqoXB$z8-2Wf5qC?0uO%=`k4

    e~7R_tr+TGJRbNmU;UU&~K zoMW2Ge>y6d3%*vo5amLLTKny-2eW&}dWuWa$t_9Z=(!j1%@5HU?owDBcIgzBqr>fPV?qbM2t%%Zb~K-Z=A-MYbKJvxSGoKt>i2!Cu>0|Sqs&>#E#*# z?dziRnhDIke;MPhoz5L+9->XX$Bf@SgKbalXU)Ca@GpyGP=qyo1BPM~=ZbG$FfK_R zm$6Lf~j1)XA`C> z>|3>IwjbP^1KZZJaMlF<0pvF>VxrcEwAxH^hnJ{(Ks}R(Ws}feK;npE{SO?U@)-Tm zIJ!NP@RnrKCKNLB=Ecmpa~Z?b2EBb-7x#Sd5MBExGWo{oOucy~^X^;B=mX=a7l1Ig zP@7+=-q8GivG*51dfeK=HtMq>3}&WbW@aXPc*bLU%*@Qp%*@Qp%*@Qp%(0!sq33F8 zBA?kl&d&b-@7BHFsmfHXQnz49t?pMXJ-ud$^x;)V9a@=$K55$0JW0*%V!M`C^UDe( zbx$FyUq#%iyK7jU*{y=MEYIptNn4gzZdsLzjViNt*9LsU{fSR5r;QzC{wBa!;IH^D ze{T&Qmt!%W8#ns8t^L6Q{tunBoy!|p@E^2$CMLDDkA5SW?-y= zzXC-i6o4wn0#^mH3NV#2|4t;Y5h-KZCH0Cf5s8=3KxWZv>X*C{=7!3-<0KT3YnNxk zz;ekap|txw*i~^RUdl=t5ji&JQeN7cTgQj(m1BuBdd#&+oYZCdTH+=AP)s{S1n^6} z=2~;-5nZBJ`a-Pujb77NBIeqRNFKSD0?CaPxs)*6^qNqv*_4%Yxh|v4VPsWT@X=oph@7X+lyT*(AF9dsr?&RsgX8Re|Lqp@VbaxyXm0 zT%h-dfcs-2c|Rr}%bQ!Y8x|$G;r54OEX>V$ZXo_4O#d_a7%Vry`eU&CLzw+B$(_fP z*FM43`$Qyn-aivlXKo;F;yxz6O8yL%`wXvy=g=&CN2+5L=RL3@v196yJfSHOeN^7g z*|@7UcgbWgz6rG^uaW{`wtVAXmQUS^kU!9pf}yt9X9e?#e<{41Boo?6t*fVWC8Bpt zVusZtaDZw{pNa$yQtK^Mx4?40!C5-|Phk0@w-31U`1W70{4e>xTJn7N<~7g0d#?RG z{`~e4@6H|v^$_yrsgh^v_#xbT0yovMh#ad2nA`W&`5h&<;MR@5A%9$bH})T zdM|fxpW*(4OWeD5nY-7ot7hcD^2>K}fVqL?;^O7*)yv$zb&dNk?{VR~8&vAsNN@0& zJgymG1Jxj`Bw9@f;)c{FZg_p-Ml>LHbQ9vnG$Uq2Q{o0UB57b_()u?huA_R<)Gvp3 zy?DY}X5dgU1h2FJHOY6TQGgZGTuX7(xirt+%YwHRZ|w5()+#?glq$%pQYE=-YtNxT zU#4Y6)1_HCs&`LR3#)X3`>2WP*cv1atwmx7^%4v7BEZFsRPS&yyrW3+k02&6l#n2? z9QP+UG=MN|X&m?-j2l=kmgW-50!fbj0{nF-izX3oUmvV(ZL}+vl4Z+KRE4E2Ei@cA zmgVAtMJ&z#43?L&vd{qB+Qm`BaRK8ctaCQ_lyiaRaxSo3V7i>k#-9SrH7qYylrKw{ z)bfo*8S>j%Qqs$XPsLVpV_nv{j<&9Fi}s;Tn}(dadX@ph24Ul9t0(XU3KhiN!z*W^o)k})u5B5l7W}es zm(9h*+U?y>k5%}Rdv{Os;Qm?lQ`p79ee0PybtGd(^r3m<8g%X0j59~~vTNH~PMlZC#j3HBxBTsWElxstJRS18L>LY1Ob6%^Ip_HYI`DjcU`NZ4>@p;By@PTnI@B z!NJW&`#K*ms5?#DHo!T|nbM(lM7PSstwA*DLmCp?I+^|}MlfgBJcbJxUonw++vYKT z^%NHETh6R)^L03R{S10c=|}s~U8&QvG0)UBtvR`su&VJ?>R5+<^F}gh<9wP9XiJr5 z6^W}5ij$ueUZE~{2fN@G=BZuL*g4yfoK{Xv$}=@kOHPi|R(^i|_GF}ot3|s95iyP= zmh+-oVl)H80=OUO%HuNMa8dn^##k04$;pzi$RNFuZAhRO;o|xxIZo?~jSrz>b{eq> z;duGFsD-Z|K7P(PJ6oy+b`aUw$@-&(tGku@Ex3_gJ%yl1Pa3qW!Qu0}afx!~8{ZNH zv`EpeQNlV_(6C%K!xT3x;^Y0#V0r8SHDT{oiSm7GVVUhmLXT={kx`3sy=xHDs~Y77 z*3m9n#D}?9nkV$Cj!Vrj3P)MvQYjGMIoIxqXl`FW zqn_`roH@LShqq2}>i9Ob*i6#k>mLQb;B!?bPl12XX-F5Eb!kd*hr(F+mBrV)1S{Is z=1}=Cesyu-r$YI;UFs{YB)h}G+1xp?oS&aur(v~^m zKcD3Pgknx*C|6J2^QwthM0pZeC7z-_Rur%)M2pUiY1y(aMGAa|mxm4Ce3b`#+u|Ak z)~J@u%NN%;p!)Ity;H1NJ)N#y8jzY2L~M)~p&?EL1vpZ-b_P=?4`JTi(QMtah!@YV zQo7{VeEE4Ef&<(M3GvaE(gMA=?%INrj|-m{{#tLMY3b{zVRe<-AdDXVX^C#o!YDKx&5d6Fx@o=%m%gvUE5KpqR$}wtKFJ8aA#nVTZDVXnXlrH)O z7A3yLvUCCdktYu`rjF4rb!4Md-ym=DeDyc1ylff0XcBpf{gc00e?=aituy6eWs%fvZPhQp>wAd3-kx9Nq;#zG0slw>MZ7tKfM9;-p`+|x_ww_*sb zC$wkbk!AFqH<%(m>i6qjgyP=Cu#2$AC&`PzG(UopeDH~O!6~3DrS0=#3{#a2lBaY7Po9Vvaxpj>W2lnkkMoKL5QDDcG)qJL&m#rID==QY?R)vIfK{EBu}Bg^XmRxim0?%Lx(WDYiBI-f6euC$MuJ-*~?~- zl%0URmlYQ-9MK0@LTK#s$59!D1C3AGXpMQI;EzvDh zS&w*MLe+Q>UMrE(>N<->*kPaQi-Wp$c`gctTjHd~Pq%6TG@8(wN&{9MXa$^9$n`%%7M2C+SpH7plbEam#9lQf`$wk(hA7)N5y zRCSLN$?Q`Bm#VJVr#n)$Uo|Rr%~oSfFg|H&u9g~1NJ<#TE}tYIDu{BaiSI$U0Am5Z zVIetgQM7e;T#lu0q0VeSe_dIZqDUc@(BQ!@^UOz;G$EG#kyV2r40hYjg`2mOW?PNIhQ;F z$OVjxNI6qh+_nfb7g%n9u0T(Lt{P(g9w(tdRe`Mrt_lb>uvPLK04j4s0k;O^8hxV2 z08#^{4S<#K--+ZG5eO^#4OlkuQjgIm?T~ZRM#*Q|BI)Luj9w{c;I64d(#*9o9FHB5@*;Zt|IWh?JH7kWkW1 zeR5qAFV|%BOI>o!;&R3KDVIEQZt9X_$uGyIpXFG}n$SEOa%}F0#C=#_Zm4bKLs%{# zTS5WiHEPz@`LnC2G2{0<296t`F8M`=Sd$xzbBPzIF6X8m4ce1b-&D-eT`nV;$aFOZ z)JdmWzh?hpS+3#m@EoWtKvk^D{~atBP#z^4J?4Vje}L{sEr`Tj^uTmHWa%ZFAZY+`L9CpS=a zDBb-l60hbHDWjUGwMPwX)ceX>%?s?}eF(~qr$*PtbQs->wnMv8w`)@^A(i6rN)06- zJC6MRR#?k_Jh!hwm0_)wo@PW0u0dd*N(A;->#QNN!KkWda27rTGqp>WKZ51KZ8GRR zeIQSMc*MP@cmHz3@|XNyEqT6s^@87i{gEHkV)KWa7vcF+xOkBX)hg32G>E|oNsNj~ zV`4O6&sk>!~b8P7yD5tBB@xz)EHLNM|V_T9ivN^GX>yb6OIkhLZ zQ;VW%YBA+cmFB6msuj=RL_e1L+H>2<2Gl~GB46^|r+Ij1^(9a2zU8Jv5l(p6uqoV+ z$rWO0+p;2+`&1)(P`Y|4rr|y?k=XHdNEue2z?um-c{-607)E)IU=ln+iSn0)Mg)OT z;RHm6XkZ=~{DoKelrM0^i0p$Y8 zMfB#Lf8vJ4%E3;|qri2iNSLfSn`{!+#Gd;V`JsN%m? z@p-=boG(ij<`cEh{jzK^@_hL>{$4yUpO-DnXO@Nd!nz1w+ZE>v+oBZmu)--ZhzeaB zP^P>mU-*{dZ=OZ9&vN&AaX8kB#HD_$2Ic;3b6l=CH;l%*W-xYj!tidU7Mxuw656FQ z5#6c~+f7aW+GJsu7Jze-KcQK%lyvoQX(_COSO^w*Xf<_H0MxTA7TWJr=iU4@!mD;*=FgXp0mAnyN*Ky3V01Mp3av z1sb%gN*mR873-(5a@TU&^le4urj@AMp$?T>WHV#!EM{+-$G{mw*mZdyD-N!s?TD_d zJH4H4m-n;x)(Pr%Ye>ZgNi116l{H)Da_HoCy7g*ei{js8NHM zHDe6@`n07@>*_S9mr7t@S=_w}Vo~aESm*sG)e3yUMW+&c?@*ZQUKUKSEljO2AKcs> z`9}Sg3Vib!4o>#?hX&&1?W`8Yu~f=VA|lFHLvcSpCtO_AvuIOHExx^J(4Yz}TGiF= zD7^h0C}mxc=%ipe^lruG18XQ>r#$&XEC^APF72kIeTIhR5k0br>{*$Bt{Hy{%M%9F z)EmY6w@kveYM{0ZjcA*r&$os8P4}&VPdjz3ohvAvRfz6d8Si>A>c03>zI`R!tAyc_ z9fC`hQ0>3mB1Qe?DhJ_IHI!1R9@u3EkkD=oOLbC_%v^tv`p2Tm-=>BWjbaO+cBNso+M_oo*n^LUEp=;F)UHMx)R^Yx>OisLg|Mtd6-{k!gCueIF zmmeG3vXm@cjBg5jt?s`AO`F!`*r9EF|KbK0PHa`r?h3szVp3|D`d#NCZ`nfpt?-xp zqr{g~Yh8=@$_eWDb4rCfW2q+8b4PUNTK}#bFH;5|`SSbp~O9{sW5^{dwM+uvf>+;p=@qfD z!4y(`A(p`cB7IUru#0vlxKbo}Z3@zNR8KbVT+O%N{#{?cfYQ%C$)oz|toCDn<4TUM ztn@gFs4*bW*G0qlLV3Tyx{SI;^*(U4EyWkAjE9RQy}P&O&W$r{+q^{k!q4}49==lJ z=C~1kc=hbIx|iQmpwJhTwJlCDH5SP-Eb=?v-DK|dD{A6?Ct}KZ6B=wqWVjP8S~leFsUvXf94pkj>IV;d9y(aiNkk}D7fw_6sRZ3Sx1e%`awNnAvS!6x{lV?fzRiRNx~a0^tX@8c zykGqnr;qHy(V{r<Q=)x-&g$h;1&hd^Ez+VI4U&E z#39(0<43pgh5Bv1efM}pBoaGkP9 zfNJBjTmx$3Qso0!Zmh>8&bV=rb4e3muJah{^q3s$Z3CK(2>6!JSeDDN_6>x2!xmcA;nm~5}+>%$)U*ZLpOT2;QBDuk>oExBNK&OCD5pyoE)c{rz193G3RU*1fX!J@s5s4R&Yx4e) zyoahvq)nnHHxQOMV_j|1rHlYsqhF3ij1Ci;G6v|1h_$r9U}K3bZIyVFN3Pvmx0E-1 zm0Pd0K|;wVZ8d!&dCm1moTN$HXLx=rO0B+6=9GAA|cE6Gv ze2e6U-y$Zj$e+P-1Ed938`v%KA;|tC`4C`#D7kfhOg^S7H!RPc{-O9O$qmcpdP0V( z{+H_Yx7Jhq(as+^{_CcUazU))1cm^ppqB?{o9P4Q}7P^%pGvOa8BvJU@N+ z65jp5FE1Xz^T%-UDyMt)WqF$xaOJ}97UU1%`XjZ-RdQR&U3GrfNQ=*M zV_BXyt~rTg>k~h+w%*_~Wkh2#2Q?wRcSDkt#H-`5F)i>L-H4E}jVL#+F{wjpkl0gA zj0RSu-H6&uPy_b1>^Lq5`S9G*f?tajhLVNAA}^HvN*#a66Z?Yf3$bEqmN%_h#8Rp)#1On4@19LAQ?;KYwN(7jfvM7s%jkR{cBCc3GeSI`I7ZFhY zM;m-v+S_U%Zs}yNVYz^DNLl4_*Tx^G)%Z&^s+#bdBa@#QQ3G8Bq( zz`s!0DgJQ?oErCGj%B2)-Be4 zd5<36rmaXn|2hwmabB!mGmGDTeZr5gZn1psL}rd3%$9YF=+>>322%pZ-9p@P3G+ZU z)(lMy!`jn^UL$()mhbu2z5tHpyhv!Jo~_1ef!MtU(M=L*I=DH_dpDx@P}P6)Mr)tB zD>uv|JkE!z_0s7%q%-9!#WHo#1jf!8Nn*9~%vnE&F$>2Lk{Qk@b#0wS_n`l*;q(~S zlL>PNs-N!~Hg22G!DE{kJ$3-DZgy%Co`{XLCC>H^B*a8AuwQrP&K##dB0RWv61dN= zzg*||@ueKzw~(ESr*XVzd+z#J^StbroOdkDp{!{7)vBN^_jhex&D|T9xN_|>lV?o9 z+NP9R@Fu9mLyDU8m&d`eBpz;-L`8U0w{`_;)ks$hfN-^#QHvloITK4;&mc#9BHfw3 zY%&`Tt|PNqMGA)HxM7Lynyq2EY|bf`;^KzIzf1bRh2;@FvIuCGqFt^y)(j`z+!*RwA%jq6Y6`_3qO!4&O%cBy`T!A3p@RCv~kve1{}r+b0vL^t7y(!eMod zS3OFxB*}{|P0FdVnYgQKiBRo~X_HJqXH~X~lD4X@rim=xHcR{cK6YXQhYqgc!Tr-3 zL>)P>g+lp0!OpsrcAeqkY>$hp1D<|f*f`m#XRrt*%9g~+x(s>qeMNx+`LI*J_mId? z4blamjvd*Tz1x=P%_H~iSj2^MJ4r|k;M4qnqm)Zo4afdb{2OAcrs|DGKexz7iC`y+ zx|e0xh+e!su#wx1EA!Cbg6D4d>i1EtXaOSCIAmA4h<+9YO>En`nB6;9{SR0! zZL8d-KII!%p;VYFWx`!>RP}yU<||rvYpU|UV)l%YWLGMWo4OWx_AXsG48OhN;QmeI z`}S|zLfhK9D0X(Gv>$SD6H>TPUP=@%jHN{>Y*f3875f@bFB>{{Y@+&o2YJ8Bqk*}= zf1$Dd!~739t*`9C9%YTrMKe@)ZA9Vq5wi(NTyJS(X2zgi3)>exBVLH+t) zuzUYH^%~yGv&UChwPYHnkM7jhm=Ni&!LwM7J33lY)~ckskHxXHwjf`DynOQ6KUE)o zO`(E$aj>`6A0Zs=ENNJ$8vA!_;_{gzESWo*L%Y^<^6+-9UpPjMYH1WG_9b~#yCW(^ z<5u1Wn@DFoll^pDdaY!hy}8Sco2Oa5a*lqset7+Wts9qeUXOj-`SPx4s6K>6Z_zs6-rR;7y|3ZV4dNCN3}q_vV3qW=fvoFgLua? zZmY5B=O5KvR^8t_*G_Qa$PRw_<)z+p!p5#7-rhOxvq}~zfPLvwxRtP`^tbtQ(n1_b zOApr@Sq26B(xP^@njfjLZpvU@IotA7_2rc+scPP<<~2OT*0&^enpR}f!BzNI4kcf3 zXj|PbNz(fV28nrN+>DtT?-x#AeAjL^%>yEgl+w1(o1I}LD!HCfv=&j~Kefl(_XOB7z=+lsiV>{5cMLJ6t45mwm>P(;1 zpFw@v(4}2H=1dz#@2*W5(5sb>n>e~RlgIX@TZaaW7}SYTL%J|_cz1o=qf;ZMPZ>&I zwa}h0X(-(WcA#UgmioURdUtHfFqN-QH+8K|YIA+fGKN>mV$;MCv{vouFt#0YW)GuQ zg&1bf97V0#nRM&Yl$q0p)38<==Z9D6Xx@e~%aIaygeW0KUal27zX9*Gm(axD1-kV{^H<&wvwOBtzO#K3uh=Q972d}4hraiYVtS@KG{q#4&M zCN%C^Odf&fnVFf|>RzCyfK36n0!$6`G!WIC8!#*J0$UAqmC!&{Q^u4x=Tc7c2rv~8 zE%5^9P1!#ZsoUr=fK}QnZ4q!Qanf#M#ctXsfcC@oN;?b;7BSZXI~5 zucS-7NfTHu`Q_N8ODOe9U6N1oNIi0H>NWi#X(q3!!^BHy^h&xBbB#vix{V%ly;4SC zwzyJ}_K8Sa46rsIEJRG3a@Ui)4oMTek}kg^sZaEpYZX{7eI(~5uY|@T-SnAp-y&@> zb&41uZmhrscIUP>mpBoL6HqRI+gOkr=q>PEEY7P{uc<+~#7Q2}X<)hJ6KZM->sVfzeCpR$9ts{5d z55>T80oewW8!>>}z;fBt)4*~A(ghBid3;;vKLpu-B)RkDhTY=J zT;xNYA4+ar|8HTr&&Oc7N(&rb72jb>hkB2B^vTfoC39j6yqYFZIL-mT>}ZD09Lq|z zHrsRb0GoDhV$Q<3Oq(&8*|TS|aM4^QPo2cdbt_n~Y>{>;*0e(_vg%~3Ibk;WTuS5H zB!%d{wMZV>n3zE|3F=#s(7{#Iy;b*TP-Wc?kw1dv{bvv5#m~=p_~LKcQjyJyn;1ZwIgV>0_TCSzc8(nqx=VpLQ7M%Tw%y)c4@RwQ*$7WH~((z-)3!|Q~zHr|!9o>n}! zDg`BqLXmt>=xcr}`3*nX7UHg5K@J6!VMav{I<<}_ZEyvG$J8WnL_I==)YTJ?1l5Kl z^%98dSCguPTjEwe7+djI9uY-YR4jpNG2vD&2K$6?Y}De(H7tOT;6P&3LL<;WKm&1s z;JHOWx!K^;ER@6@i?6?*ULZ(V*3v?|Uor4oMBun@V1NeZ0?5U>TsHd@v2n2fmjG!& zmcIPrue_vXjup9BjtdxSHTs2W;J(wFp!~`jJF-$=3gF7}7kAn3ie+ z+P)?g+t#E~v+8(9`Vg5A!L->^S+Q~nrAn2cN#ll0pFWj|6DKls$N+{8?8bn;?daa6 zF(;2~O%Z)OcK&!iDfJ~qyh`CyF$|Z?0Q_o35~r>&xm5-oMzyE+sLpin-vUqX zG6V+LF@5SVI<%|L^cf?lSv!*wW%4q3R4ziaHcw^3tiS+_#p+ zJC-wk;bC5^}lUcoPGTV19VcPVOSX&e)DlC}NMT=6ZNHGGuJs8}thw6vPY+g5; zOXs$7?9fs+Zy2v+EC+YY=D@P)+#f%L8?Gh!)wwV?+)MCXw67LZH$ypR=cSa`?b{wryU-`Lp{pL@A#bO6#`u)pJ`MS3g?< zW4wvZ2&dQR9=uV{PDYDL{M|J_K26FK+BRKVf(tMgpXK6)ML_wV!SaZ1YC$xlA<4aJ zvhmR&E^wbCzg*=Mci8{i6?Xi5fkWKp7!TR{(>eD2dYQA_?m8FA7k~y{j9vdm-$yWv*gwe7G2%Kt`Ju)x|C#1m_7X}2b0*nGG6_v5!+EMs@tUz+O-0H-LvrRm`+HG za!gr1oa?vta_ra|?PGi2-j)3F(-WFDtVWT7U*ceEft{@-_V#LQaLw7rKsNJr^m4~L z(4Ueei{s+rgq@uoc4~ZxQww(stI~LS+S9*}eB@Z5#@`+6-?@;}CpS^QQI-bLg>8$G zC*LRJDew)oJG90j%#%W{CHO{-mt}pd=`*qiPcI$hw~aH{5n6_4PM?A8XMA7cQy%-f z(x*^C67uCI*xmwHS8H6{9C2`S!_vWn5|+*sC~isqLd7Xwv=~0_j)eO=@r@c=qJr$% zv0*mnPHbY=)`j}NKX&h0!HbtSwU6&_3Vz1lzWE2=mMu(!UTrBG=1!3SHGakUl2AXL zJfG)b(70aOclC**TR3xSH_xBm;M9rT{QT}I*RP(?mgEA;#WLK&q8JusOHj5<3BAE( zv7&`3R;(Ch%9O!I^{tgvF$xv>9B0Q;^zPY)qX)OLY|%8fZCS22*SvD|IB(xQp{#ug zZMj{@t{BDLt;lX&k9_WBu}}8HTaA5UT`sUZyIDo9K0M3bgB#eoZ5cbaEmzmNi?=WC zuxjy4zWg+g-VE5mLG_!P1J({USUcM5{VKGpEqgnh)L37lglsY@n}b^5rN(V{dmGj* zpU;Nn^EiEY2P+p&;mnckYAicNw=OMm#_&(_kXR>$G9fltL^u$j#-CC?WoXj59+z$& z*Xq0A^W^p!uASP&;q5EAbaI!vw~P7l%|rEmbEJ$K6AP66R{y8M#I@6~jCR1k zRs>F!eekXyL14ouLh6L#6l+8KAx*h-|EL;spYg++Tim*Gj6-`isPi}M-Md*^+!rfZ z2p?Z}3grJrwW$Q|ws!bhs&`~r8=ao7*cbQ*yQ=rD55Xb+B*%p?e^ggEx06fick)JE z%f(1<*t!6Iy+di|{3N6Wvi;~fB5KEx*0nl$LrU|le{p7SokP8jwOO-o8O_w3B&1O+ zQC-t$vaA~;&(0#Ye>z^RLNz3>GN~c){VPy;LVXR(Wn<6y-svRv${@UDEG}y9F?`i1 ztir9;vr~e^>;$|*-D%poF8)EbbnV`dg^S0kMXq|E4Qh|=FjTG8Z~CrSN(YE=yF;&&1B?|cFdg8kA6KHvp_9g`zU=&=8t69z}EEa zQjg_}#?V?lmm5}3rDL0Fj33p7F~d7DuzxFN%^a%Uqn%hZa|FZtwPosrK8&B(o8c3> zss;C8<_zu3iY_gg78lQ+?wuGnwj(Y3*JRGzevD9av<>TLF=g67h74|}+B{mlXIe0K z`anhvYRjA{{aLkWEQ9+t=ivTT3>wm&zJuB^U}QIX4eP}6EerU8R~){ym%Fd8vu^JS zYBaCHzVmx{{ObcXCfW0))t9s!)`F~d6&SH*1esDq36H~qztJ<>flQHKL9d^Rw24`0!h8pd$>m`75i7hxrz&ZwF1cQQ-zvp zKKfslf2VQ(X4LLfkCa+z%v-$>uMi)i%f;$>oc`~@U^S*ECTdtNfLK7a0P#P9Vwbm>Eh7x*b6uv6ft0jmbg8hvss`pmhM7m;HrYk=#YiR6`b zn6^lq)F-;69TMhlw}G>AE^t>uDQ7^i=#jP=-MMv&7(E8Y%dv?!*J#p3m(gqTO1!j3 z^h(>Lti(%tZhev_=b~52oBIDqB##l%AtG&&Hi#aHH~lSf0;kQjNxJll0CEX)_obwn zK9M*nFCQ{w-6Z`e$D&t$H|Dy`hYtDhVakdg^T9>p#X?`wq|T4Qa?w-icla%#fNX)- z0=y0M7AP*zTh43OQR~y+Ey!gej|TtZhD9K;z;Xf60;&xx|3BT}Q(Uze3v?-G%Kj&A zT(k?8p*fb~(yp*kwX_&mE^Q7UU0cI(0l{)^@|ir6X5>RCuCMv`xZLp{!g2$p{|sh- zOhVK|0rIk4Pgpjr#5d4=?| zxJwD?l0|`7JN#?Lvi8JQ?V|MJT)uz%55p_>Z*t@AHE!L#!u5MO;lo>3 zczoj$k8WP#{_RWLx_5#5H_q|X#S3uyB7@^n;nW4byK;^PH_!9%`n8Y3a^r?YHu!ve zTh(*@vi4bi{?&CV^r}zVuqLEVY)SN(xpz0*_$|hrIBhm*pq>ftj*@k=J9Tr4@ zT4V%7MdKM8jbr&}?2;mJN{GNaDwL?eAfo*Pi4Kp@6Mkb^E{iIG=SF0KWvq+jSRlFN z6DxB|Yby=E#SghymkR_JNG`Bk+_1QKxWC`*Q$V?hamON7=mN^i*jQ;7EKc4Y8jc%l za)IOm)g%-VNNymTKy%4cq;wG)H?6_3ZmH$f%PSgcG-z3c0`A3esThWJsvkBP0k~9;z`0fwUX9D++#pU{mb*7A zuQy?IZJvOA{RrHe#pAAyt!e~OJk5jX_LZqRuo-d9GD&JyiCUc-kW@XHa#`g_%}QkQ zlyQt5Gh9QGtn?H*b!&H z{&-t0_Qx}C@<1jH>!$RKWb3BIOr1Vbe>6z1k&JVwE5%&P@M+1fu@7_Ovoc>(%-e#X zD$)2<3MZhZS{%2`AiAMi*tE`~dA}yiTRV-8JsaWZT!ga4zhK*j1q|)qkzs?okXII=q;P6T9k7 z4Hqw*M5$tVRi9+jtX>^jHfTuy?p^56vLWM!^<@5xp`1Ckh6|_HvUFiTwrm*9mX)J9 zx@sopdw1ZrOL6rZ`ii^WrTDdfYo6@cz_P`&ShHvbSI->gx*8i2Q{wsb(>(b5I?$>~ z75ME5=T2^8<&ufanmULXQ-`o+^Fr+#{hNGwC{X+}D%MWJGt3451V1i5yUdCEr!}+{ z7bs#`9?~X_z&5EGmIri5C%ShP^*dFQ>)&B{aIXqlLV8xvusmEzWKXqF?O&7F?p3Ha zu>&W#NvDMa$?8{+%7Yt|J+e6&BbrcgTuZ7???jDh9cebNH%(`Br@`2E3|upg-YZ7Z zYvo9Kt{O$pHKXaiR>}G?^w=;~OaJXt7uhmkvGu;MoejraJ!zXa zKe43?;_q&yEq?7?ow0WF!p=7Y8}A@WJGiLv%?by5D-xpo2ynNcYQtG@m1fH>&aEB}I#WMc%?+P~5hp_6=UOeG_a{xzge8xFm-VTsel%N_@(IF+I5d z;2g&eZ{qlo&FtN^TJJ~j`o$e>5iT1WihC0ecPAVjY}BzemX?+pke4o9mXf8)P@-gM zij^pig?djoIH_^8OaaO#1T%7IPp)1%%$}XAIC*>rhmUOG?t}B>E%q6o7yc*ttqb$5 zO;H;4X-^?ZI?|CcVQT!3al#?Ofhx@^aO?3omMov5LHSv= z$lA1K4o}p(y>Y{;y01zUFQocQwZ+y_-7i~weY|w&z+L}H+BZe}zg(+m27Yjd2dQIz#f0Yn?YlPulCk&rP zQG_;+C%ASH!P&la9M+t7Jk^%v7tZeD!L2hqe|%kUP+6fuc|5&buye4+!@~`4FAu!k zl{mTL@8C|5yEjhGwpcoc>j2u$h??{44` zSca5};jG=Wl#I5ONobp;$AtocrRX=UAAQHGcgW#2j9EH@X5-tEKBOisSNA4+W>X^i zrV!96MvXx!WR9*y>hLNAc8npeUphe@qKW8Ip3N_IvG45>0_%oy_{mX9`IRKE#W%PI zIjQ?@$^3;=*tU5Ar;e^?)7t5*S~{NnyOywS)kJn}o2`BmcbPb*JqP#9Q|aSbGOwR{ zS4?2ujBadJy{auyRd_!r#5T1VcYgCXX&abOr151iPHu#Vd_9usdt@zmOslw*MV&*=~S3X zjni?9S972!3$|R_h-;=3OV2H$`cO4@>y|`=X-(<2t}nGGH_{t=Ms_WyH&~79ld7%E zQwCMkuspD37?}erk=ZYch?bFf)%GT)MI4FklC;nAzghi*Iz8$WtmXwxyEkXa#^r>m z`JQa>DOTk&&kGC;)L>Zlt}&2X0JzNYa$AiH2$%Vu92+Zg0q2rOfS-uO8|ZAT#O2%o zZmCB=wOD%_U@gE|>XbOiFVNZF-(SOM$s;0gT3pl#{1(7%fVPB^F6AYZG!aRY@*+~F zi0BnpDFW36f*VV7iI?&Mx=s5elsXL*7ZFG<CHW=2V#SKOUp2J+9b}5t zu!ulT0h$KN8ZmHH%19mozH%%;)RZys)SOEh5u?KZUlEhfNbYiy{$V)*v2yREUIV3# zNSsLSIBA=RxfYX8^vJnDU4h3^k7<*{n>OdJ&*+wPbN!|cfybtt0m%k3i;moSB$Rs0 zHRhHN>l64aeImN$*_Ak{PtGO3^t+Uic&St34b(Pi(oP8lSW77PSMIm?BscBLUBBp( zz7;)ER`g0*?&~&fmpXFaLphfI6p>>oD|scK^tFVhoswU`x3K~jxGiv8EWdMGg$vj= z7UyCeUOq8diyR9mmo&*&uDoiuikCQXt0H<#y2J}$7r1V$)wPv*MrBnlh1j?Rf@8w9 zWx4p6mJL2XgykP|!xE7jUjGie4Kx?mEHR_&zK7-lKt)VGf#JC!yAer~{8H|Z{Gn?Z zRXYcm{~OpX*5n3kn>cg+p_`SDN$zqc?qBo_SI4Sf%!Zt~f%ks`t8;_xKN8U;d2>T@ zk&nfFC?D!Ey5846th$x})wem?`PM#y!k>-b%VcaKbB2GpWVmM`A~lxFtsC0uxP zg|nB>bLrA0E?>UP#q$?9aqKwzcI{^4+I6g4x{NuqX0vI-M#hgH&&t)S=+UdEcI%o} zu>!68cfmO;9LvgqM08bS?$}oNsI`n|msAqQHzZ(SWx__)#D8#Q4bH{VJW@RqDL z?mI3&y3K|AH@Ncn4i_KX{I?>|T!6WR7arz>;#>T_>}Y)Z8aM7;(F5|eJD2$W(iJ#! znV~TmaOxsYuU+KU?aSP~arNI?mWvyfN4IWp^TrkJvs^a#%umUm#>xa z!)g&bxE4`E0**}AFgR>~7UI5Vp<(h^u6*Q<(Z zPeW4sHK5kOHrR!E;ujJ`NN6~rYT@Fq78&m4V{tAYgJ(h%0g++E28I&v7eZucSdPWf zM?kr;FqcJ=ESBWh$4~s6|2Hf*8+M8t7O@uh_V>dtC{SCJ3osXVEOIOxehMU)yaL#Z zmoB9@_$*jF$2YlvaDit6#f>W#<90nH-MO?D@w@=d`y=0mfUbSNMm-5s$ z>OM46i>9X8q*P0$TzU+(>t!=x!Z3PvYfsryg-M7Fqhe+fanT_pCWKQtD~3vHaa$`p zj^P7avwh=Cc5a@@+GV5Iwtf<;mkejY%s#AHG@R87hp~C(1X|Qfq}bPas8u11=5^Aj zUn7y$s@|5(E7GD>Wm>hZ%)UK~;g>s{J-UvCY9T*$R1cQT9mCf3^BF#(2gwzpNUx!; zDaHqfP&Z2Z*pS`2Hg&o;!8y^7;2Lp+)>Vs^PHOU6FP^A+<*3{~n>K@6(xHC~YBo+M zDAYk+kB|O$_cqOH(6e(>bxncT+Z1MC|4vMvGK^Pm@AEU?(RXM!Y+OpyYiL(?9pA={ zr&rj1U^T-=wqom+smzqfI>-6*y$8_wZn(>UL=4Y!?&@uTGz+;K0)_uU$DdF5<+bZN<;Zmk$S zu)A6$Cz4e;mEOJE)2C+(MhY+?5!5yfzjmoa^r%Eg&x-$ISuU_V zw`IA&^7!6WwVRY`BU`ZN%~={x>O`#47vHHeaXr*Tzf%Q*x~Tj;vI*>%L3pPu?LXeN zS_sKq)MBG$Dq%`OTcv7XAFS$^HUzZGk%(@UiRoU2@QxMmRnMzz)G3<)Hk{Cb4fl3Y ze@tT{JEdXUDjlCBALa(Tao*FO(_Up+mf}NJ+jN{eXAsdQiI`SNM0TrzU&l&#bxg#& zQ4qssb>;NA^_)Ami6ckWaOLuT4Q;>pRNP`Xy$9v4zq@1-sH#D^68SC5-Um)jP8zN{ zySU-6#vL~gXAR4%WhZd<_(m?AT+fL^E7W9q8|^yQ(bn02FYpPU7AeR-^OqpAPGc+s zT`1;Olw!7DQO4#=TB>|kZyw_0k>%XpG>NA@>u@{Vfj8F0c~`0wkL_GoZ(~nmbsp_l z0$=-5+NZjUpFeg1Ay{|^Qp(K>OJ^5c+?)yacO$^fisI^bS2Zb+t0%T{Wam=0Z<@#c zed31YIVDPctN**Duw_vV%d=Y6!#dKJlA*5JvfMi@gnt(O2R(SdlOF#-YwmwyHgjI6FJ){&944))3m>L5-t!PFPymQM!x;g^J|I-NS+C z=s;|(i_*A3B~BjOsy9R3xNbJbk8R?~^D7i9`wd?f{X}mtTEL+sP5N~tpQi;5X#v=z z`rub3Li;;*47K6Hog*AQwS{9xH|h^zCk}4pz^*lvF8(cc)+MmEDvhg~BeqU<*sAu~ zy1C-$?ym2xlbie}k-KWA{I`Gu7G=un4Z44bwt;NrR6Tspgpqx;ry>C7HNgFN*{ zrlm_2!^hVHFHd(3qyyA_^z`(^+tUkgZ*S~v?bI`7rD3^+Whnv!ymfz_Jg|{lXZL99 z@*}%faq949UZ}AtB-EXvWxgeUnXf79TZZnFd*PMkk5|<|eCmed(O_xqe8^6^?QJ%29s${xRdn4Ay@69bIfSEO&Er!_(aZUk@L`)N|(N>P4`Z zH=gR5clB^o{phSWy>?XhU-nc833KGmni;&z%2aa%Yc5+A;CW*;hk1P!D~m4>Kj(AT zPp4>L8S0K`MYX|A2(A;$&Wk%4J!`1mgn9Cs@hrcvj?sr^5YZH;_ttE_dwQPpCpU8C+!j_Z9nHHp7nnD_7kjr)=lH>e>KU4$(wDP)>qHLkovFj^ z8^^PG{TTJ^kJ90`P2;u5@%q&xG*Dl;bP&rI56~jVE0zpo$%4MjpWTBw)4MZod?!|o z>dg8nJ()YVClh9OWY(-MEL+l-VZ-ZkYVi;*ko zw0IyxhBaj6%Arbke!Oo3im^``}%NO=#vC_GE`4Bd&9mi(%uG)KGDTmZt;??VG zyn1n2y=Ncs=EYT>KDx+nKR?wUsisaFL8B(sa8z@-igl96Z~X;j14__qMmM4xg_G7H znF@U>kk~C*Z}eGnVgss-sjb1dZ1R~szK*som(4xJZ@Ks^kMEvD$AGU%lk(EG-0hPzQ;+#bVA68y`B0w`i4%R&Po@sj528noP55DX zqhHdc+{fz7onLeq=qw+CB+US9(IIURk#lK_`G8>RFaTT91XN4BKx=8g#G5wdZiB=b zT>`yDzr;(N(Jl3f4mmdMm1BuBb&41(b`f)I%Ifn9IX=V%Xp0zYaIyXth%TYT3*L0#;V-p%^jaREoyX~ zKZWHY5@+({&TG>Co%|Urmp;iY22#t~{zEYRF);x9kL1r_`Jc&$pxo#(;ybjOhUFUk z>ub#sV_ELnH-orIO^6@a5bstglq}~;v*DdMaQ!G(A71C&g|l3~c!{f*uW;qkWiFgM z&+((j*uQrlJGbvp@9?FpSh0c`GiI=Q?HXpzo~5}$XmljmP3jQSxDpOk!trmBPS&Va zME9?aZ}%)>$27=s2{TfyR|Zweu`(Z=t)GLW@r~ZYa@pYXKZWH2wlx5Mtnxp;`xh+# zOa6Z@oD^Gs@N&ou+FWxXIvI1NY_bQM1?xz?0{M~DQefa}FzxqiFFW%{Mt>F7t z{30$qwDtL4^1o8Pd%?_qh`m}aC5sYkhCwe`Pc1&orHs*;ga2_BWLB#W?78C2|_LjUIR zEKLvOxQ`2WY;1U9W6f*3()?ia4L?|a&fBuzaMz(I`vYuPkmSjLIuW#Ll|`6diobFJ<^skAh6^wkST3$u1dxmSm7wSdT>ZS? zyJKk_y*)o?qSN3vb z&r&w6nZ(9b6Et``uya1;l6`PV@WeLRSHp7I=+h#_3-9^~8iIQ_OVY61u5P5ZD);M< zt~XnhFt}?)f;(nuALkKGGPLjWjuZPZeZy>;bZru5dlD1ns1|fSG-{N@y0sI5d%Sybo_Uk{Fl}Tv zZDlTQO#1d~Lr9D})f!eLAkH6;C?ATeMSa6Qtr@v;3i*A?P$I$}>qJlNQoJb@ZHHr` z2X09oH0jfbz7u=UzHbw?5Vuwn=V(Tc>Or@zjp^7){VvkNu(K~rkKU~~aAY%Yetg8a zt4G!SEyY)b{=w7*6R6*+7Ae`~h)(ol(xh%|**J-ni$}6!^IS#_>VSRO0%Rse(7st+ zTGX#bqgq+itCmVeVjzv{CeyQXO?4d;*s^XM+t!U@%i^INTsVm{U0QJ0sR%z=e#s4| z{5)$@l`?tqke(b#MqB`?>RM~nszB$iEojuBlJ5JF1KV)>!Y+>NT+HOrT^KW@JyXW^ zV#}tv967vRTeFr=5698ZhLSGDvGBE`c9;5ChB@J+o*R!Ek=n9cV7Y&*WDT>$4U1To ze+bJz=7z<<@+!ldvF-VB>Wpr!eTs{(aRJ=2sb^TPD%wIPq+2B-yJzdVTx*1p(p{{= zD-iX&M0Cm|v~wmQT`~#knn_@n41C+FcC}9-s9g#^&Eg4enMiQ+^3)vBjIB=&(0qDZ z)$Vw#o2B5N62#l(L4qFmgPuN*Am-SwX0KgJX&TDrmn@KfiFX5 zb>`UV)f_&yk`t#kaq!Rv{_DT;XjeMEUaok0xZ&>Zj*F|i8VB5PaC5=V(-jAAcm2^z zEXxH1dwct0X=S4)!uC#TTq#>n!}15Wj&T0OI!+#5sbP7W_O-Ot<`>1k~V6m#l^)1SJiiJ?w)w6_K3K6cw^_} zs>V<|ikB&&A#C}?Xsj&@6BX{k?yXBXdSH$EJ?!?h2)B^72Iyu`Dl05jP83 z4C%(V>Njt%-buD;zIay(#X8cSLJoPkbnh5@53S+kiOpPsyBE$A_&H*V?PcvcA@s8J05jid3Z z6GTLVaO`3%7&x;hPk+A7iL=|)yyGNiPwiHEUK1Z5sy9CM@ODx4+w1)*1mJr(yA$La zsKL39YO|mEP5An#--BNO7EaFko`!^Y5gOsnw(cgv9v~dmt$M;~YdYANA(2qKkTaq%W7R^`pAbGf2 zIQB@ST>lKck!0rR8pQTZ!=aH6tygv zvsM*WESb$|buU*e7|X+(M|gbu7?)3PQP+K+WTX=MSJN{KiJ!K2pEY>kHL9b05r`z#cazuGGqeBTKn=X&z_pE#dZ~Z5%tc zfTPFe!EYBhePX_9!&>fMTfcvgv1xd3f}#t~}XCm>oZvyD}` zKye9;rMZMM7nC?-DQkeafN~MB6gL3cSa}P0HXvT$wZt3Cb4eGG{03wT^cD~;d8Mqx zNf~j6k{gzbNEw0E5=tJa--yIZdC_A;&gFUqj7uH^&?S^MNGRoU=au?JP}*q9ydJ%UyKL@mpFO8JO$ zW!Wx{-*Hwf+>Ao4DMdJa^tdlRtyy zxvj}_L+Jk$Xq$Y0B)I|i$I?I4_o4hdP_EN|w=Dk8F%mWO}A^1tN&f0F0LPrvZ$`*-~K>=itE z&D`)xaP_%bXFTP_&o8u9`On||!1u3z;@x*Y!Sfto{`Rc^^Vj?;zOP^WCI4&X<##!L z=wH27_x2^rNsK>X45yWF{Tmm7C-!k1U>^7_($!}1FcuXFXz z6@ET{4US!9a%cs$Sh~!Ms~5R>=dxND{p$vwxncRu>q;(MR13lD+`4&HJ)RG_^yU^7 z`!pm)El$!#H6>+0Z4w8mm$!O>28~uP!O>L+8C{X^(U~L+PoZkxczU*oU_-J$*S(y1 zSJDCsm*m$nrFmytf;X1=cxIbVyN@^!Y{T>nZ@Q|5c&)B#g4(Ytnc~`IKs`bR*3!F9 zyNs%a_o%8GmM8Sj*8f)IJ20Ej5p{`BZK*W41vcSs+UIGxzz|Y{B1sC4CMqIU`!5fT zj8Y4wND=}gNbnEWuw1NTa*NpvN)}hf%G_9=%c4t;WfM^GPitVggaXUOvfQ{~5m+w& zG9{4QxL+~nVrA;?>#g0e2nZM8BB8if5fLyhE>{GK3qUVirlf}GUcmu`#m8vtcuyZ! z>eozX?9fhRCI&Eld>^iy*~!M0)3jgV?dxZ;V8%eEj_=O+ksVpKV1x?Wt8kdMe(TY% z30{f5EIYGRTUa_~g^Plp+AA<&W)h-sq7q)ERdFSQ{u3p-&EhJAI-Na*6 z=FauQ96z|44XY+;t7+N%Z0)j<8kEnP(uFn4hOuhl5Ejks!_wIU*tvcRFYg{zi~IXZ z)S~@|n>ma3UvKl^{$WlWU&)aJi?wAR@2)ddUHjCLomsPRESpx(V94P1gvYp1zjbxW zS4Y#W{jHLkCmI|@-r`V7?tS9lm%m0wrL(CrwrB`8oC8LYD@NElLu)(zz)7PRH~KC zq)9#WzufOseJEDM(9lJbvC>QNb{mKcnsFR^LQ*GR|Iu)}b zsaYk4_DwT*apw?wHcVs6DAiA+x-fBcR}Sr6&bF=UI;Rf6)z1yBwdWSb0P)Uy@cO-<-}RVB1{6(akqMMa-##P?Sd{0^CV!_G>w80l1j$j&(u)}_LK zgYs^f1SpBC1rmOHq(YPTKs9?m#;yW;HQt~UyHc6PsXE3SNC(_=w{CDS;2P~chJhuf?1vxoO8A1*U}ceDP5MG-gXR7&s)tBUy)e0 z5MeG38m`*-_+a7VOKE2pJr+4T*%IRGOo)e#cE$4e+EI?}TgidlOWC<|q5Azj!^yQ2 zpMU#z3YIO*Cq=&2u-r8<9Q$&C*v0$dlO9ST`~0-;-B`U}4(tD<*s(3g?>WCdr&O`8 zadj?>yNj)MzvAR*uVK0LotwM28c%(3_x8iZ(+7JOcdQ*9bN;i(+Jdm~Kmz?-u_*m5 zNA|Dbz%JEihgT{6^LhIGJf&^F<wZ$ysWTOXMYM$ckEPu*|@6l-9=n;$cND! zV6NNio^$U@mMEq--t_abr$^UjTvlVB_=5pDO@)=nkJ zSNbdL0&VF#y&vwXpM0u@5YeK%{w;Xc3?iygG)@UN8kRr$;Ti{zZQ#Pi{hT_!LygVf zsb|{~2WKn%0=#i>wO8%*)NUu79Gtb4xmc1*n|xjD2~_>*=BMg)^T67{O5J-a%9jsg zLWjn%ehJ5X?0D^5h|7)z;N)(CO6MgdIgs_o)@WB*R_UI2)`}peX$t9T>}%Pr5l7T- za_zxobf43kwEk5|9Z{3&vs)0=Cxx2Rn`lrT*j~*Ex|PGPT_k=Tq8NH~BIC}?X28xd z?0R#AIVYAfWcf&JLhP{jwZkjWlaSB=Mh_dHeY`K5KZd7wPjOg{nQxz6POJ7@Sjqj{Te)?8oq9HxaOdhuE}fps+vhvEdumiO&XZ*Oq>@;=t6>wkIYH2nO8C)ZB0dj4efURp}MT3LFN=zwrn z?H(#1)rYb26*611}53Zh<>q?FhD z&FFbuM1+RJaWOf5!UaYP{1!+k@LK@6hU&iqbO|M1prZgoIX0H&I)8MuhQ|^bzvOZ* zx+PAavVdx-SJDJZ3#>Ml;sT(h4aO>5fVGs7bb--Q&RBpO0B)eT)FE}rvFJ2u5+|X= z8E7wcNPdYIk$R0D$!{#m4HTDii8tp)r-;d~+phY`z*_^$4FLTRaEeHrhykh+3K%s& zSMr$9Kv7!IX7jE9+PIkZtgVGehG8Ka-++nn{v6! zxxF3Bh5M2F-RF?C41 z(Ix37kJK$`^6X2SM5kDmOZZ3iOBo|lPSQ-h5@+g`V~LYCnEaAY+GE;aHUQ1t79-LR z01-0`N&A4%@ACN8%Q1Iq{>}1pv5#y=gP}l96PJ# z&&LmO@#1+6%f%Io$b}0RICJhSCr_W^_{kF-JbZ{{t5z~|?i?mhpT?#g+o)2j24!un zaSrmPnwn2WHLHweia()k)R>{xQNcZ{5Y)dK0RyY(`)Xjh_$`;`A~!7WKVvXYet7hU zuspYQxq;gc9^KcVT>O^jhTi{gzsUg zjZ60~@$303YQc1wxd9ol{~|xALHgdUi`=_*g*(@-aqGs-_pn^#hARK(u)H}*{c4la zuNG+oYf@gl0K>+qfq7gS<%gH2S=T70R`q9pgewmmt@){RX?`nR5=xhVGR0I_lwV4g zWe*~!kQ6vPb#YtEUVd2q)hC~t-5J9AWIN_lY z|HGnOfVue>Tmj?)#!b3dmm4c{dq;=&8+Hn`5fCnJSHy3*z;FTPVo@%Z<+S?TBJ45@#zIt`9%JZ1#&(D)uDFUZBcLHj}}X z8(6(_1#bR!luHU`_N)<{JH3OY3&yZ|*(7F7?a%D#{aCql3=8HAX42U1Oc>prInxJf zU$2|iO=j)NF|1iWlC>)YB2U(qd25!AVCABrtX({UEvv?}eeD!xj_<~@S%a7}sV7V3 z4rc!Be$1WIj}^;Duw&~q_~iz?yT+_BotQJW8*3JhX8p>^j2_jM_#|IyHp(O>HJtL5 z6Dj3sMTgP7=%m_LIMkM?7MXZdizKy64csaP;+q{x>v0|EJh3ayhqRzk|AzFM(w*S~ z_K&TkS-&QfuaiJ@)ksnrBr##xc*ZXsN1sW(=`^AvGuO;u*vz5S?^KWUdTC5sIh8T$ ze9Gj0tXeWge<;|yeLfpkPi4`ZVcN?4(cR2}R{=u{MJzUHQVUT)V-qKaz?Tx80Jbss57oEVue~vEs{Nn z2(qAW$Lf6l@EE7|EM(fK4!Te0P3zD0O>O2zHSODj&8&` z$sg--9ynDF!CyTmu5}}EZxl;t2eItV(i?mRbj{GPJhXS^_pm&ycMdQQ>7GHD!0c`n zwFSAra@m-(*67wmwXdN4m`C-fLby!)dZ^!bpDJn+SXrNYwJ486jS#&lXk3qMVtZy2 ztwidKRQbaDRw1l^)g0-g+M((ZfG$?&G2JQ=(ke;A^6lRpq2BaX1b0d$tWzDDb!*Mo z^jHprxbw`qAUDID=-M=cUK=OUchfN38-x+lxjsHED&o^24)4ak^cdHI^Vha>>cTcI zUpq+C7S$;R^97z<=Q^>>{_g$@x?PcRry!^Bairbx6mIN zY;9EN?yCDn+|!7NKX4b-pW+)_+@45Zma($d8>5DW2Wj|QAn$*1<@_G~;c5Tw1#I6s zhv%=(W8sjG&kE-upLIS;`Pk5YTz~TUsxdaz535u!9MgQUi+7^1OFphYJfz;Ry8W^-sjI6k z&W@$&+^GTAuIzt*?WYg!VD*xD{6pPSf#r@-?vx6%qjaRwSKghn!B$jmnZ?bgXW6xP z1>3gF=h*%=ym)XHdy9PfS@ZDCc^BBIcdVPYs#m>t?3|p{d&pn+nTWiP9NnChIAHH$ zr}A3i?rEo9!=J+sch&to%Rcp-9NM#vm(OpIo*Ap%um~)-53-}*jQ)6L_~KhFRE>>^ zg#8Z7!|H|Op5j7}@tt`5<8=+okEwUTg|qwk?U$E)`Q?9MV_ya@A9cS}y#nn8mb*H; z{r*wL32Rp?eAT-zNVVC?GY}i^0NtNJBmlyFm>%zHtt)+hCR!u+$4=^J!?{Dd^2jzXi4UTx@4%u zY@>OtsX4hJnIo%FcV;uaxuE)Q_n<=VBY?NN{2pA<@C4 zXCyOg`ULjvSf$=olew&(VS&f;Zr!+gGS43#SI2kMv%QYFGkS39$Rd?@3cI&W;MCFi zoIEldon=rI{MUw66y%|#rIqfGZWJl$?k-tkWfzuSq#L9gq`RA?yOCJBVd?JX-Tym$ zg8jlU!_4`eb6?jTgq*b<*L%K|r|Aw|U9j+o5Wj++ZBbJIlAul*W9A#<6sZ-PTRKDO zqRqe6gSJ7JYj%+oX@i5U>Vgd(UtA!HJNMDahi#ncG>Q2ao;L(g%2_{*{p6=QM|-Fc zPx^4;cA?7!b-9s2_mM4`lju!(1>(65zSLUW7mg9u=I%YXS_{SA<9=IODKamzs6nVO}{5uBexr0yzQ4v zd!xjV>-N!EdX}!#O&~+FwMe*>l5koCLB*G;Qlf7-1Xnw0wSw!kno~SS`_Sey*xtCk zX?sU$%Se&=cfIQOPoI`IgmjM|5-@i0*Q{SPk(2#mH#2GKu&{Pl5JTnSE1=IlUg*1~kVNwd%cb&<66_{RJ;}}A8~(R+%ur#EF6j1UN>Nd21!J-jbF%)?{8aV(?1dnKOoH8vbx`s4^ILvu#~1cYR7A0uPaenDkE=?_CpkN5JcP#6tzT z)#HdwDcV&p3QKCRz>T$5vYt=TtUZ{N12O|?UUXNAu{9rRdy32i#IW!NKduV>N+0U={NJ%?;G(h)?jKZQs?*^coTfbb6=f(ic{ArRk&1`&ex8|t= z6Hi1px=?%&4T8^?eAZM5iSvGB&(f)oHl@Ml+yzUT$1k5uj>6v2=&%tig#Z*{SC2c) z24JRkShhU!lumcN3Ny9&y7YU27N=A(KZQVpTqmHmlLTKweAXLS5@ zfG47Xb=pma_a(PH#dDh0sW9bzA-cq4Ws3h*S<=OcouBO=-e$T4#1fo(Flug1LhVs9 z-XEWeK<>K^Pv^So+dwHi@@!hhw2r@jZe}*A`;^@rT>poLBXl<2W)C;%oQ6~&tvXA~ zix@amz@Dd2yIpI8|4rMuNLHc+Pj7C1S5eGTT^XgjH&lJC5t%pVc>+FDmJ1nnG&R?ptR;qY)vs%l zZH0sGK;BJ3s6|ozGZgfad+i|t+%`#I{Wx~sOY+zdC@X|`YtBgV0~i|G_;X(fZU_JZQQC*q7s zjYU#;hx@od7BVrD)6_!Tn3*56sbguX&cJ^cdtN)Ga|M4vr~KY9)>Z!P711E&cV1<> zwty6Y2KCszj5=Lsh$tE*l~p%l6scni%s1EPcJKaPzdAp>AfKAt3VcnY6=6NHAg8eS zB}|p2j|*AKggQz&bdFLYaJ7r+QE@!$@aFy+*gG}~7Hsy;yQXP(JJNsv(?@3_rgYlf z-w03F4W892PR+x>uS*gl5Wzz*%O{2UveYqlI0K9*V!#JspL*WWRvCzBIBZ)_Xy)I6 zdm$H07}}8zW+(ZABF)}`+&hq8$o`RIgVkOuc*QvIaQp76btH2xg2Y^?%Bare`S7cq zj<~!yiz&kEy*&0OT1n9dP5e2?(WgE8V)OLf2rz`vhfV$L=LbLQSXX2j)2CWnDYN^+ z5GR}}>Tw^0sTT`EmR*N(Qi_e$U4y>3M6WX3rgw(8zeqG6Yl5PhhZW~QOYY>9UARF8 zvsfxO=C;%M3N`x}%e;^?7dP6l=DjxFjG~hjZti{@#rl&b1$F0BH5d|nqN}=t+rTlA zUQ;Ms#Rh|l$X)kH`#X<*s#a8FhL7bde`6H>wsfl$q1@obMzYj`$E{Rub$aaB$oHPE z*xbukPrJKLmr*RDbx%BpW=HeoNUS9#w%8bUvfS+*jb=#0CXN zF{YR(@9hT$n=5Wck^?y(0hjY$AvNle&`86BUptqOF?-#iq9c|@PsDrU5=cPeZJH@% zLYi~sT7)7~#v;*rq`q#wV7!$?h^K~{5KS4|8N{VqNy57l5Jn0swHq=6s*~dMSHJaG zJlh=;Jo;w&Fyq$VeO@ppNHiffd=bywv5Eox3R#qn!@BBW?vv?0|6Te^#C+-JEbMc` z2_<6fnUH(|7NcKm|9Jha8{|T4>nUPb*-+EfFB6fMu|g_@@p~p=@fe_Rbq~ZXG%nSU zJMyLF(TIRu_X@NC39Tc`%vU4b$QK%t8pMsdSMoSl;~p8_* zTflX$_~BldQ`@}t6}W0Q;eqX@PGiqZKuB-n&>&&GyZP7A{_E>w!Y8mG_$Pxff9dv# zneMX`rQJ6JM#6oGz4vH`Lmnn%dlCquc-PbWlzP_H7E^Wx?D9>IE2HrjOUfVdOogUR zK^4ME$C0jRw}s})Pi>Bnn}5_NpL}-D4+T90irOmk;w;fyJjw5*Me%`|#_*Yoer!9F zo5*-~zXdJ(ePqj+G|aT>tRa83_Vuk5DxQjHcqKjJy$xQFa@hx8K;TBgp~5WJ5!~RC zUPj3Q(KDEC&_w%kcVQSQPYs)Nz4IupcPnzqZ+({7I^OpI{>f}M;%60ML$7V1pZ>aR z9QBF(4bAE4O-E-vfzQ6zT=lmv27&`^q*X0Wx1qCqZcRFQU*z7M$EK5v?h=|8^41D! z2J+G601eOIC0I;ntJ;ZG2Kp7$S1X9337;Hh4abO0r%i?r#ghKaoEs&ooqDdMBXGe$-+$&dsP$RLJ<3 z_|Op9J&x1pW=T~LRiWM`uQtNC~hz-0%Fb8Ozm+LVe8Y=5zpf^ey2 zALiRkNeI7e6dJGv@bD5>{#TjnBx|E(praVy2~UOqh$s@A^XAiLG$>Wmtu7WOO{HAu z(^9g$612(HV~g<*ikkA=ca#bX_-_?we*-#-<@irEhJG~R^v2=q$cK-3$KeR)n zo){N@9Xe2D6GR>+Heu@|pB6&=*VZXmmQpbBUs|d;E>o<2P_4StK-Fbd?jV@aQp_&X zADKhHQ}B?Yt(agkD_6cGGn|x>PF$i2!MBB6h{!*I92S^5^dc40IzUVe{rSK=I|r^C zz5NdqlUnMTcWbmqgz0eGncKwrA5a@VodtPA>X`A%g3H+8>6f-h9(V(lPQ-9k6+My@ zB?G673Mz`d-a`$S7xO{7H2)f&%ep&=BeIp9WYe}{oyrQ#c#&-2kPJg_tR8ome>2JS z$A7-(t$;m63gmJh9gCHiINN(WP^zZ`6hb^_|EZCDXUzKhq$0AjmEZEa0>wJb^unF8 zNs}Bte~D=hz$SVVXZSH184~CJcPIIgjq^d=2SJ6h*wniSC$+8K3LuNyQkO z@g=izNx8MaOoq3o%tr7BZ6lZc<{Jm`*6tiwLnCCHm3S;|`*6PI1Tm7#ou=l>^T1bUp*(MRsQ)%nShhV8&@DM21SnMB@nOo!&scishnDD6pNJ~87`vo+oT%$ z|4vk8+Nj^Bv#afEvpZ31>*_?PMFE|8Fwd86QHMhGo0`nb^JSb0*Jt*ESIY4sZlfHl zts6%-9Bvm+Ea}h4PhS2vpI3N$b`LjjxaJ(6usDkYm)l3Lgl8L{*0A}HjkG}*INka# zptaldMgFGpG2m*`SP3%70>1k%3TUu?|0GWib@Ne=8b9A2auaZj99$3ib%=@MkiOB? z4PI(|cGQ8YQ^+s1FRy_;S+1%plt)g5XmN_9uEgSZ|Ivq3@pjF9*y(fwzDCg9<$eFm zn31{qV;kX7(jo#L=r?S5B*$j%_5IHjvoKLM3}Rz(Geish#kbyFf+wco*$k(Km>6c? zBZ;yAAHM@!zTDSbC}e+@3SRGt0@U-A*2SXX%HZOW_yL_TR{&=lWVn9DI<&7p3(jnKza8lvGI$Q)M_wa(2Ahz1tM^EGdui{x zxUgWl%tq5H7s%w=x5@84%}b5uxS0q#*5^eK^7DvQPzb&}`1Q6F+Yj|zJ0>rr6&4R& zg2Uc0VQ-4Q+WvwRn|!Xb%G@LAi#-n+ADi`ZVDI5VgU=Ccw%UGNh^RE}>x-%=3BT9J zP3wr<@l%KJbpDig9to-gt9VhN>svVW`QOvHv)CpbOL4Q7D{mVV`*Yl~>zRpVkN?r4 zRzR5iuQhIp)af1p@z(2E5twQGfyt@cHBJv8E4IuZfZmV1XW`Z};ho5RN3=6bUzNr4 zrz6{kwG2UWwXnNoVJpyX2WWegWUQ9SOSk$bElWbU#nriLsWEo~LO!q>xPxS%NqZi3 zy>xgQ#1FK?Clc!QXBAD4HdNE*YGj8GnM9NLVL05@mq00_~DdsFJ zyuu}Q(aooQb+ClwK9=pbSaf^2Bg2S)Ga(vk<5pMEia)tw3|M{jpZ^;1MD*8Y4Id)c zM({+vrxcY2Z|;1D^x?-=`JzP_*AZ&H)pXJ^DHNS`wZ@(jc?6iI!k8&19ZiX+nQOM8 zUTjc6+*T1D&WY*YOypy6BYoDP`%`j<27(#O7&4Bo*A_~(fF8rtHzrr`lgbwIf}L=c zr@G&gsXKc(n8FPlW?{wF-S>k?RYO|NqV?JSHKnUpMnsqlC)m!KkCklLSJ!W@&Hi&M zS}nC0H$l4&4%V=(lS79F;Yk|acc&?Z9;~oi)*J2dU?iz@sK$f_y3u^1{wqSvigTi! z{EJumJuA*}Lb+*^j{h)f8gGAt<>G<*G|6h@?pU!WPF>-L_FGYwO*kD&J0&6du4ZyD z6n^HA?r)y{YZ4XC;P%T94{i3d=`Z^Y)RNxcq$piznhX|yQ_^q>LzTz>BTbSiIr~~V zw)s#j6*{T!;c3g)Dk6K-WPkP(S6*S5)MB=9q?(;=o^-D_ta^2KG%$#7z@jIxs8)Z5 z;$)l4zphN)sQ~r1Hl(jTnaXe5$+DrDUmrO;o=jk|>T-o~v^}F8x9dxVo&3bLw=C^@ zYmGykCX)W^yt;pWijv>O2caa??ib7U{28zmdfDAs)p&3JK22}@nF4$%hGMM@G{2mC z-n!dpzb*c*`mB3PCdQN!6qheYAoq&_SWOk6_NFrUCL0_jy`*-h3^eSRH)LsYKYH8y zpO=zE5wHjtohe9k*SMz@NHw&DAU>craH+RwN`FT&oIu-Kjrn|yy%4&{CJ_P7pp2_! z42Y@_w){c#7yQt-)Ch@57fz_MnPP<;>2&}_`X=ec-7vhf*oH5*9@3hZ7ftaAf18^z z@>PlXYlVE~VGG9gA_Kof-?AF_4$_b{f*hzSGFJapF3k?B0>k%__WQ&{(*9P@T4DUE z$Qfj8JLejf{j^isek|P9>eZyLCNY%mPgBM;5eA%AKCEO~prU4XZ;mPjaV~G(QS}KiRslnQxZor8PVM&g)Mw*H#r3zIyx#YbLJC=gGdm zb>~T63K}PHL_-nh2^NzE`t$lAkeNEX!CGP_wn3G*{s; zXkAL;b`i4G9yee2j)qd3;j2Q5z!lOcI0QFNmN0p?+X-cHfjbmMM$7jpq{@}?H)AZyL% zMGs;S@W#{OII|x?0~Ulh2?cSCna)NCiip?zS>2!6E^naX_u${S>U0wkYlt3ZnE7?F zgbMWp1=pZ$gDwt1V9a zr=aVP9YCQ_IST7(ugUH2$`-fgGDa19)Jgh}09<$>XK68{Tg}Bx5)fHjRyOpq_k>Qe z%&bynO*bj5v4&Al@sqcd4PnbL^;eySsLVJtJqQJ%hJR(m{buj&HQ-hHpG|E8lr@kb zyACZup>;GGsK| z$?ZB%;dnJPn0yCy8>E;mxiNYoUoPkLA7-LRjCM~g15#lz?u*R3Z0qIP#~4f81W~Ij z>BJ5h?};hsVCRU7m~nH4`;5?Bg&PrB!OYe+YRWc=^aU&h`>A z4ni413SUr@Qonf9dZP|w{Tsvj3zm0KdEy$xst~8AkD5T*TZX|0ya;gu$4+WIp5lC> zOdr4zSGL$##KtY(K+HU{3}9_f)WNu=qYO;k=z7nyGqydTOJ_Znwz0K`|39ZA4MP-Y z_trErU2LrU38vc&AmQE~%LSAH+{LujMrTDgByISz(Z+P6=d1$MRA)-O;H{*8j~6Rb zn%lili+Jaevw8+P%5b+(F89xC&Wu)%Y-A)Gjh}~gb_Ri5?0BCUJ`2A>=E%po7f&{y zWyMhY#pC{ek)A1=!GLtIxSX_YCZ13hHEp9p2g%#hh%S9e=!+v?{R z{QGotgZH8_xS7V2&c37Uc6H43KevmExR^EqJS01R0*;SXaguM|eRwVd?2t8aUR8R( zT;JRq@5E_0w`<$GUL99WKIrU?PCRWag9#agK>P80h}{ufn;==GbT#?{!)%#EuB#ug z+|vE18|tG;L~dD(ID_H+7Cef>`ANE>c5{BbSah=9Wl~$YP6=s6>R&B6@XjeefSu%> ztQL#8l{^jFW}fdq2e0gihfvxetu5Z3sWgI5Z1$tLQ<>tAr{S|es`DJccxuCVBlsnB z#r0xEl=tIu+u#$@Q0aOQgMG5p)Dz)B+z2(ss&%ROb#l#1xvBzsY93>m+2W`$+JwW? zuq2Rgl)f|TS%IhBHx=dS0o)8E#Dr)JQ6;t9XPyf_OhWtAVrO82oNJ&VcK(?+x{GBcs^n zK!36ZayB>3YRDz+Yy@h-biromi0ZJ~O_d@C2;JLF8Z1=S2DF^J&2 zqJ}?D2hQX!6-oolR8u>UquPnFU*+ekV5-SK1n|JiG2X%%7}1^~oE9LVsD?I^-Pg#c zQ{cLuye4Dv{S_B(R?oh-WW;9ydQ$N^*;Cc5C_RZ=DSv!ClH!*DaaPvvz%Bv;A|;jY z{t17AWwXE0pkHb>KcavPstY~8;+m5FMV4;WR294;@WDg=SAH)YiimG|)NgU@HDev6 zYrkbdzI2d@y)GqL9`{MM}7dT&nN8jEbUpbuf@xc*_IjHkKf>-gq< z2N}TrTqI-vBiCbnhLf`YenNmRxHC^zL}_%RRyg4|JK<$Ju{1;`YHGuk};CeDu%|TB%!L7!F)A9!cGA3VUNOw5j zrUIkasWN*LmKb3*x_`#1&l88hK&u9wNz7D`_NEE8>ePD*$Y66=uWmQl>4`*+%J%_u z+ANMGu94&!WX!C0^7BHlWJGJ-ho>q= z9`wpO<r1cg^u&EGthH)vA9%2jQ^zm*`{!WRK9Kfm(A`@&)l}_p z0vqz7=d~^yIYQb!xLwz18EyPD)3zRIZ*&Z28gFvzo^Ns_I!FvR?+;8~u>AchJr5(O z(xLY~A1fth#aPD;F^@o|cpjO&)s6a%&40s*QP#If4sq)ET!|{y2HB!TlT~8!kq*?Q zM$Gj^&#u#vpNrKk-{{lh|6|tGPe7{nX{)U*ePNo&d{1eE#JL^yy%v483!kZI&HJO2 zud+Kl_RF8zE{Y=^2J^N1i^SR@R`NviQ-@|htA}|H)B5V=;VucK|Eo_Hm{u9LFNP_x z%(nBL0SrFKLma#D%8!E@4bXSfA~PpB+J+-m&;KeFd-gkt%Gq(|p}G}~>( zy*Y;T;y%$E@ey8kht&N229=B5$gG*nVQruY zJzdED#BnqP8l2Av(3;_4(~DCX{^IK1v>)Z=Zf2BUsrOe}t@KvARF5l_g;=?8_2|b{ z+L-C;3Sn@(jc&;!0rMGe09+umpu?Jn~F~-Jb-0>A(j~@dL<8Y$fb1Yo6)20P>S;dy?9`MmxJM$CU z`K9CuG{SaVOQ$cq_qrU$GFN)q3@-#de&0*LFoaEGm|c0@H`CNypARh%<_0ivII@U{ z092GAVE}Gq`Q8c&m~g271IxjrfRO&51fuS|;h-kZt5;~(6=o;p2m>)k|C%5iWTo1j z2oA*5VXmmHTKTevts7@t1DIXn?|1`~Cl{~LjPN>e%4}614-E7Ae1*-N^||%cFSqhs zC7;Vl;CUq80pzam;CL_pTPnHtE&I$p3D$d1ua;Q(SzNk4QME@u2%BndAg5p3W-^-| za%{<%dtBuF7Yo__GV#FY509Fv6v>SyLF?!+~{vKy}SRF0m?&8;7&~SD;NQiyB zntR!%dZJ0?`6$YmbKfz=fwbr>Ro=SZ?JE|OQ@2!|SJCLS?sOSykQui8LjSLiVUCO} zEL+IoA^YyWdmM$AeOc?~jA8gqn#L@@f}uLa6*gIoJI~qC)RlL*1|{4esxFn|n3k38 zy-dYq?V(XrFB*}WRK#oJegZm4Hu9SO8F)v_+0u;0N6m-?d0|ysh5^-LTu z-%b(|gF*@WIm%VTj^dYu+G2wGwLmY^0EbM&-iV7Iv+3~tbnZm7hUpWh!&i|o*e_0A z%=(dyhbb~QSGOS4Z5Y48#>A*$iyJiV30B~^8EVJe?1QpMe|Fi2eQY>4WY0^PKF5)8 z0buKrH)?GhsLEk+yW1iM8X2tLc1Dm3R|ez+L1JP^mF++TSxlxq8p?lPHr5ry1ki%? zR-BeaWPyeIQ>;n;lybRP<+2BK6mn#0A(!i#wW(>}3ALdT^eb$Vm(rPLK1SBxP|~W? zt7Pk`bFAM1u!dJ9W&5Mi(_uh^s+9^BB;xv{_sZ6Rg1#a*Rb(6L%@~saGaBSLLazQ((o$X3 z`)a#)6HdG95o0v7toCu{_(NdEJJ12o5vO}Zl87|zSgq>!%U~lpZlrB5A=5t&_NFBn~6uQErZEiitORtKmV36ijQieWFgQF7AfCM|C~Zw>^&!M0J8*Be(!wEC~qIP_mEgd(@x( zO7_7hEyxhm2FUJwn}~_#o;GUYN#@)dDVgu_X3Z2tmc?@GIPm@Bc_qX@lF%6S^roub@yBPx<_CcRIUz{s!29DlOD5oosNaA7yt z7)n+*5b+4T*ctn20^OfRk4zUB^2tG~)4UtJuoiUsR`!HVWw8?TEkwPJS4i@yi;nwE|Dh~EaUWR${VqW!s;J@~mLG^%STL;PaCfrDW8kB11SS}vVI^_% zpe2aI%1rOdglD~j5H8QJ5>_{#yU9z=$#tM7H@8v4{cE>D=l?II!5_RhM61hneTZB& zT2Tid+bV=&{3c6WyNeQep)_i_^)YUH38Bgm@uO%uHNsGR{UyGAlE4!|XCE(Xnk!LOT3uNc zM1HltP;9Q6TSOLX8r97dYhGEj)%?J4z1ilXa+4VxR$EDE+lP@Mos)iRAr&Y%}D48?5JnMU!a>%F!a zA_0kCc8lc+o+T-LNtrdOEE1MB#h9Z={dYJhbA-kZg5I?-u_IcWqv!%STrXrJW+l0_ zo_(TjNfR66B?!uSo)w8zD5AU1|LyZR)vwwQ;3g`aPEbg~@Ps zT8{m1lZW)R9p35r8pBtH5?u6&1~eb_iEc(Pks=_gE-;5hoEY-?+)FrvU)1`<3~ z{M7gxM2zDy>d*uoC?LOO+Ix5V-V+bmNWwB(TAr+4WTr!g!ot0;m#Pjg#O77N;^j0N z?s{u3%raVLrIxtQyd;swRa=)En1`+zfpuF1vV<1v_yAd+M~D&aa3yo9I+HKP#Z@m8 zWf8`f?@Mb?x@0Aik6EDOev5%M0nZ0VROgTf$(&nJH-R!xoX z;9l`UR-Zq8w4}evw)-t1f5Mf1e=Nj=^1x-xd~~1feML&^ zg`!RDe3NCqdtWc+u;JLD?of)GS)e7+BHxJRq`w%CZ605%YPst>!Og85|KwN_(V#0c z|DVTNPrgIt&b*5VUU-e3;7}j{J@R9&t6AE9#8*jT%za_==>e=9`tpxFT2O>u{bgs7 zIwLzE{7~qv>B1yg4p9bR-58Q4ml{p$z*k*%R-CWGCi z4*b*w&%!6}cYTCzOVlwq06V0asV~cGSkTK3;~+uFe6x7ZZk5OHh^*k(^FKVJCDqN# zXL{I7gn6$o)J|7CgN>{J@Y0whV*Wns?6p9U`^G9~Xk$6sJP5%Ex$^sEPZD4Yd%x7o zs4dEnA!=SHDfr}V6MWNQ@lBeK&Pf5|NcW6tGPscmur9#*?xfApAIJ9Fz+co`7j?3u zbv7QIwxTrwCXD;Fd3pQk`{@FB&+%b%bri3McFobLRf3&C&w`{)xCTbcSPkmNKjyf9 zxQca>;@v@cc*5BMS}U_-@q3&l99{_#v{tg}(Eq;Bf|3Bkf9PF{s-Ny@Cx4mAK-vXl zZWL)aZ4Sa*D)OBu;i^Ko^`5pCmVDm#8xKL8CQPskFR+}H*De1>Ba66+& zbI_#CcQSSZ;eqw3MdS?xt>M@pUw2qKI088F*V);*cY2x}43>93dc0GSNw>w)IW>BnugG%spD(;@MsGNaVsh4^W5E1#P50IQOv>FPIG(U8U_xaxtQ zhed{He@Lqt&_mEVGOvWgn2C_tQ;sd?hen}(28i$_f?XZe1n)o^Zh}Fsj&k;s(igb- z>0bFz67npiRLmvpVwE~0U4`>J+aA}gioIN07?N7xXQjQkEHj#VJ(E;?r^=I0kuD{< z`kyTs7^_hKzubD>e7*GldS-BX89Fk;lF@3rwW28JI}q|7Ol*U_)7f9*F`-*w%*JM< zTOI$qRd&_$B}8;p+L9J65Cs%0*a-wJR$Z-u9JVP;U$XL$9-*Z0k!8E(Du0kSTToMc z7UU%@eW^&d|04~HK4zIcC+_0fm{KOrlLol9sEL%@**GHHR;|X$&DU>P_wshO<=a}qA&*yt7!Dpj&+fl0~$3m=xs_T>x{2*7`4S3qQuQ0hlYr>_M z{5;Hs>F&<@{b@trTrH_mIYgsE_g(ud<0C4b^Olf3syms8In;)Rx~baBgOAf4!;6{` z>FCb;T7B^47>8Cho>&3>=@yoDi$8ve;+~%0E1>p8=7#YcB`*{-;_CEvX+E|!uS6CD zKg{!!R6si4LP9%A6klP>DTV6@#0?iKHsNrTSg!|=-sGf=p4%_ZoafxLH@OPg-b{2& z>b2sV)hxZnaiK~RZK*TXaC0q!6j`fvG?R+~taO8zHNCTq8^$a$#D)TB^xf+01qHXQ zOn!dP0K5=AkoGLRjNEUw<4$p8+{Z4)h_qrjZZ2{=kDFnyiuFZyAIPa+Y*ibAld3I6 zo?9jFJUYgC(&hs*$WW(j45^xdBoaZ+t#V1RKia)=_F61Iv1vKw9feY2E^_<$90YP% zpLiPJrP-`-2b97{T-_JBfGf0-REtBYvo{)<@Z!reX9SUr9)fC`RBdcT0OCrL%CA8E za1Z&yQMR*PH@Y+`$MDccf3;Mx5%?brY@SNrTok`_pwHU`bxbGX$bP8#vh`~gE5#;m zX*hMDy)jvTXR6WFk|wdbA=(Yhpv?hPHBCioib{xFF7BnrR`hz8^$!?V1fpTfWT5H! zq}g^S4cl*5&?Vuqs^ze`7U+M;+K{u-Tjr(!1_3um!r3pHsT`$ij@#15nR@;BS4dvJ zEnRuv%Uhl+D#HM7a#un;zfY!CxZo8Cmbv-mIu6m}vn}23qJP_qs@hr2JRDU}B?Ly} z9%t=8Nqmb(Us7k7`AKiYMy{)omUKk+vm<~eg>6rEBW?R_WJI^ePujC7b-9e0v^ZV+ z!c-IAui>A|3TpEfTaI}&F52AEu=1~1-ye}?&9md!kV*f@w6YUvM7QR!j)~dFCni+3 zkR?#fiuMl*#5Lsb{rkbYi>90BRiWgvcqlg2yX!p_<#Oi%mi8|M7oOB_2s>R9cMWcDvTEav2A|dxfz%XMy=Y4|3wk{!`&uxE1L634;XZ* zJe0sWSWplTat_vmJUahmwhWPN`AHSVayDrsN8<=$yV|??dL!TRN{6EDhj1=7vfFEt z9)0QnUwd-@DYh1mzC1(wJY?7ThexhR$kZY;wW)hr?$iUF^N@i23!Tzz{>*SJCvH;$ z54Bo`m~@PE*X0BA(d01E#3JKU^d+dQLGk8bvm(qOkq|u=vY%ZrHH`ell8K`EcApY< zc!^sMs%btt(c0iMbdd!MR4hq~o;C90x@%)Jj)1 zrZh2Ry!7-&@XXS_!mpBS3I=k-sfEX1y{<3|d9KL#Cy+hU)RwXaKQ4&$^q6w&-0th* z=>CZ6jk27fU-7mlnabJ0gFB{wl49D+Y}zcNldb;uGRP(-Y2{O^F4lee+mR_#>i3oS zrzZ9{RnAzB6yY!2cRBU9REY8OxcI*$WjrRwqN+y~3`Gz{^}DS^VdfF}>kVcFVpWqV zoOf`kzYUj)vqH0`&5hY!s+cwWEzI< znLY4>nXD#%FCs){xxvJi7T(_(67(?l%>|Z>q0R(MV}aju^+|xO=0_ zodq~%xlwBuVg!@j!f1OWUOuhSDH;Xf<@&hsE;3!bKQMjqqX_7B$GA**P7Piul!4w^ zOFmCg(D&KZIT$`>ccJM~`p4!-<3WRJntM$o3wMP(byKXUs@WRQ&QrjfVIG4{n%09{ zo4CoLy9Ef6vW_>!DqbI@intl%UQ>boS(7w*pVWx7l=y&fo1mv_KJ-GLW-Crs+g}QP zwUo*>XJ=E7#ve>hs$s>vU?jZAKQofDdh0TOx^L41u9`t|@wW{9WKNjawDkXJtK6<7 z|Hz$LQO-O+yrM8F8kMyl{i$4S{X7x4c!xYS3|Xq{sNr!JN1=Bky(=y6gnLFAGfzkaP`9f zJkFz)PmGKB2v66SX|O82nTIwtSJ=cvz5DuifJ~z=J^Ju+;y3rJg%0umfuCRXM%`(o zDM#z6h^t{7C7!IRmoBiSTt%&x1l*Jmd%E6*YgdH1-Q5#b7`Lq>O8B?hJ->Z*#LdhQ z+nma=E^gToc~&X4No;pB9!Vtzx)tnu8QzDhaapUK6TvMMR|wiSp1R3Z$TW;ZeS&aY zHBNmuZZcm6PtTp1GBb)CJa^d`O3$CvJ>NR@GhW1-W4PqWGy)B#tIoYS(!0$gM7`mg645D z82cgaTpVom)^q_I&Ce=#7r>$xH-Z&+35OMR(8Py z%?>~_*;UG#i5;p`o-bMKg%fd+I1c)Wue@cf-UUye5ZnoQp(zo3E$hH zpB3y8L-m~UUnl_T00WAB4K1>T^A_&=XtnN4H!Hnl86s2zml`u$QU1PK9C}9uOe5}t zO@2*<^7kKqi8T2a*3j$3;FNM$-Z4Sc-*`fRvA`;M=AY>d+D zD8f>(D2(~_P15fS=d`bTmcm8cMI`<$YBS#9iS*wJVk2nV92%+_89{igH{;4mr@zqs zht1DHw09d@2chXN);jD9j@L7M3+tdaZO+JV{?`{9AC(gP%4vdgwr=QMN*JGeolsq& zsX^jCy)!Q(`@&{6m(lQ2QuE7i1ofLi7LwVl>X6s)k%&SEQw7VKW(~elMJyV8W_V#| zLp-zDv6XUvme(FXn7}wmJJ&Z6m-ky4kB+ABWMnf} z@7Dd~DPy=ayPM$Y<4Bj?goM-r$SNrK?ssQwt_#>qc82zH*~rF+=xB6nAa8_SMlCM_ z(e3mKERe9Ny+Oyl;qZK=2i;;lyJ>%*U@kDFuUrv-uGN%PxL(mr^PYz&Ptj_4s3~o^ zIfENE3-Y`HVIS&U!dk%-DJzW->iI;Mjsj1m6Qi!;`R@68cOm_mu?Z8mVLr$2Js$Yv zWD>HT?;(`+j~W*YtOl%%Km(Fh>8yo8MC7Psl?_FpSK?2Dy!NNqx~kK|_`f!M4>*NU z%I&T#@W$KAkf~?=6F37=|1qwP6Lz*Vx3-tTz-%~GlICGdi|8yYMi3@ z>-q3by{(l_ef}u5J)B@vwAPwr7~Y6HkH~Pdd=3)L5N-3JNS$shOU9c-EseQJ;tw&Rs6q3Fqb$k>r^-8N$8Hai{Xr+09QrEDtID?(0 zO`5c4KO!IN9iS@lWB$U|Vkj}_lvzYc`-14?GyaWoM~+9j%G?z(oLLkQd*50VAxV$I zh@n%h+N8xGLpoxcI?vz)es>e*ryZ=#wWd}J1HrF-$&v;_E=k;pk&e6PxV%u0(_I3nj<o;PTGrzh-#9?X-ch}btz0U$s2seWSXpUwd^emhYCe^qNkD+8c3(CdddedwEcQ|k z5F)%?Xnb>pR@?b))D7+x;b^~B_O&%qQV+C!Z-h-Dx7l&5xilm)xF-p_eJ*KVJ3<5& zHK9B7)$N)Zr!ODVxA1cLQ?XnWsbM)JC2gCXZvtAtV-vqEcfMofkwgg<4vEC zJf=DO( ze_wC5XJ9#e-+?~dh##k0hl5{FkO#9<%PaM50##FEM0l!)U}9AOzBT-z{(--I zNuYGwiKf&}aaxq8d#FomS)9L=e3=XUtE;EasK%VVoe@u+;d&n$%GZ>hjvI(dxVPGX zqWvY(abrN~ikymi^AUF}L!c-6a(O}M>+zoPkhdIfqR=$f7lum1_cQ2Pu6&R#eEO(#;<%_*_3hQche)UYz^~+{Ez^fYHTsu5#O_DN79_)6{s{KHRLN#qBSEluH zJ`2*BFBE%+_H)~2D^uEtvTeH5>UVk>w}a78MVs~5^SL~xy)n|N$9I>wGz1RXueTrS2g&Yn=}=o2r#P2aN~ ze4tuc(z4yRO%tt45QSM4T`jyWH!$eGn*x-#R|eW@&p2M}2d?7W5kyN0*L<0=p$>9c z8CvQ{C(|EjZPOKgrBP02@E!ZH1*0IsV23mp`SC zUQ2Ct$t@$iBCz`C2L?^U{U+ghbCMG=(ak##)j_6>jrmc672$FHy1G%v6p3pA z6a5eV7(Ke*SxVs~*2|GhLYor!&^r=&npxJ>5>~8V=cr|FO}&P_QrT-?(RQRuzsyl>ov;{G214?*z0@k_jfOL}o7T(4IztL&KTCQKwuTp4@)TF)>(Xc_ho@M=c)%_y!9O-q5 zEANQp(V@7MDc4e;l&O!O)FQx^beCI(>?=L0pfvb&nhD3M*j%P|94>d|5W}@!ty_wW)Z&*waWr%k+R{sUkBWO z7WdzkvUUD<#C<~J-=VwoNAI7MEfD>8t@7X7E$+WVbYC%nGr2Vl=k=k2T1Q2y^=W2) z7Ma&FxOwdgc{y3!yndOpXHKwh-yU}EQS0F&hd6rv9H%a4aPagQZsy--vkG6fejRN) zcf`P?u6Axtr8-rJY14puYCUb0=tV%!WK!q!C1|v|7wQ}7IZ@pYRln;bbsuN7Q0;7j z|Fl#h=C;9WT#^RMf0;Lw7oVPRSM4oCM6>*M?oA#Q6{vMh?!SZb{Lf(g{)4=K!1BC* z!Sa8}|Ep3?4(Jq*m|#IYtg|EC;O;f$f1|(WO&dR?ONSf0oUl23W3HbA93)(!=|^YINis-#SwD*2%C-luQh z^X7$0Tl@)1KJw)CTONJ|SE`gpD#?9b<)4GhLvTgO+dQd^ zcQ1=6RpmT;rt&{|%QML@u)I|Dp`?UoZ{P7$_34d3bYal1-fPhML+J~Z?ghnS!~5+U z-j=@St!l>`mG)h!YLmd}C#sr9A9(Tft;+kB(q|>A&+mBou2jA7MVh>RTgsa^?s?C)M>=D$9$HCA@t9j87%+dH+nc zK{fq(vATY8PetbQ^vx6Az87$QU**lw2)T4mH2q6ee|W5J!b>&qPgS1^UhwAe8$OnN z;N3G-&l`2E+V|phA@8`$EwvGUv3d=!mv04C7tc$%eg7u6)w7V9{fN7d-f_JkhpR&y4}cs-xTY7%|?zJRk&&(m~Z5`+6UW_9mIqzBt@-Pwp|=5_gGPz!2Rg_@Ok zU$+v)#+4~Dt;#i*x@@aw&(!vQv>F~o*z_d4W;euRmYTfPhexyBHsSLELjRAuzL=1o zs_F4%MZ$t*aUrl=ee|Q$$02D#TUt)+f^C!wb^#6qMhB=xTrlBEBEsdsrC@?X{P7F+ z#V6PYzd$dwf$}EYUrej`U?1dzMQ8xlA%WUKprPKu1i5(;7~qF#P(cp43-V^bl+pB@GL#=3Yg5HfwX2>J)kCeQ z8E&IV1s@YC`kG=G>8KrUS3AxH<0igXwhY0dMKIfy4e?gj(L-7=?Z66FW~8(5#6}L@J;S&ald0b(juvg>*s*aT*%$V*b?HeJOj_EMU*dX{4vmV*BO^99%Yn z1ItIVe$ymYseIeg7I0wWQnsy_&gK{mtZ^B=G_zN}7t7GVFjDd$KUQNUC=@g51uOtG7 zsAq9>D?&!7MeL9i!iF>@W^_v;M>Z#NR8yixewN4)soEiuViH8mkHk!Gui5N&?pIH< zmpx$pI2N5)MayBWY1}!1S#ySHQ2f%Ftr{#B5WaEEG&ZfB&aN%4W8a4s(#$dUzpHPb7Z8Hc!a z=@1#mwy1!M6KSMNY<2>wYC zgfvTF`tHp_?L+AW&!J`EYZcr2H5FKDoQ^V-Fl9o(J!Hgj1_NR{T| z*ffa10gbfufj#1JP4%b$tU>C__JSLauCn218aprTV(+cPq>OBfQ&WFp1~wtAZ+)6g z=}HE7m~d>N_B@9S?Lgzf?HJUn9!u((Q(#wthbG^#CBl}$ErW?4kc98(CIpR0)PT9z zTo33U&%o(@)O>k?OV^Lnx|3)o`Qz?oPqpe5v9+_*4*E1PHq^wzT+IPtKIUY^Z5$feBv9Nf27JHYYH^ZT@E+K`%6 zD`BkKF=|g)td1RmZ@V&vx#*nH;mH4XqH&n2zMw^K}u}ks8vWc2s+ehHp zDnzq;-G5RqO|x9y^MeP{IDc*r>ATlrVpa_YH4bw4q-JWx$rd|z7ftin-1hUlDdt5) zBi~M4JBV#_%es^=|92vzeDL`9)2M(>{TGk1sP9Mp) z-~CP9O9KpQ*TKob88dVF2dN8gUf!D4ySari#wK+zHLa<>4K?|jx>pSn!`PQD2QVHb z?{#|zEsdd)B{ki>(?jvDN`@iMr93_ z*Q!;4pddF=o5!l z50ADX1gm#h4)_e{5<%OkUHHkRBJ+04S8Ky(Jb04L`m}|7c=MQBH_r3^%`;+S!!R|g zs~vP|tL~ePl{G%@-gtR)VVMZyqpebU#iW-NpVrt2Nv6cXCcs@F0VW=heHBxmUdp4|x9g zBF7FcRo}14+|Aj`4LK8yw1K3!6E1cpke>FXq%mRo;usoVmD3mARE`7glrQ>{9Mz ztRY90bL(UpCw47U{ZngVC69|TIJ$2c&*T>cpC0o({~Foq`OY|Xkkm$T7@O9>J;;fu z7SY73&HS3o%{X`PW7+LZ{E|MJ*l}uuKeHK4W;LVLqK-t3O(bx*N;@@$1huh`ozR%3 z^E*&8$&9Kob!k7ZJ00eBr`M7JSl745BHotJu2D1_--_tI_3-ZyKt1(c={&9*OSdi8 zY~RPm#uFYCNvK~KG2!(zd*x+exelTQ_z4^qaHqpafqfDu@L9qoOhgBE5-xcpy@0$w z!ciS?i-=#>64zn2p06yh)$>YO5+<(HCuzmi{W`$Zp{Cw8xz?eov`vSWaxJ1?OProo z>XSIBOAnX!NqKsD@k@Iot)5Rb>!mFMtp$Qg`}OupIr@0WwVp>rZ?A;wY4rX`xLoUF zBd+e3w0gY2QXSCi<>=!jVLE8l{Sq$eqz-Wqt_$% zPJa%{ij<}2m9pfWkuW`v#7R1N)}<`{xi35ZQlF%k`={3<*LwM7<&W)^Ykk~g%mi?Y zHn~9T22D~l(V@1)3Dg$2tpo0|uv~}W0@Nj~4#XvG!xZ%`_y;W4^NR+$TuWZbBd|Ow zGERf#VhSc8GKBDk^)y)Ca9Dd{Mymb7KWvt3@bw?CTwu7qk1Y$!%YyR%w?qfyIt=%p zs=}vzwq-5=T?gcU2FgVQ5KEuR+A-H5wfJ=au3zh*S;7Q1>(_eNzeDH$8Z4JI|4)kE z9`Q^2_5SJYFAK|M4F3qr{ie6Vb8IS&7xt%aeNU|7z1ea00Jk6JvS;5ejvhP6nX@Oj zlyOe8Ren(p_q=*leSa@=_MM!~yu#!;vo&7e;pc^!jRjSVtJ7vgcift( z^;LogVFOZVG^;nk<67Y|tO4GWTjHzgcT?^0pVd;eCzXKdYL7avEk0vE!}0;Mf8o)a zhZ-oq_vjA!59GYM+dO=b&z;=c|0yhgpwj7Z{Lkc%aQu%VY5oPv|0VwwDOdDP?2eaw z)-Eo%$D9a{&zj|rizzNu!LOn813bA4Z(j%#f5e-|M?h>1c4)~?pJ=WRS;(`@*SvqJ z*04pzO726kDz8vw%6$m8^Hc%3DojaX4)0ZAA79<$#q%8XK$d>ibbg{LyZcy)swAg~ zS9kN(;uplM$@@2IE36tKwz(gFct+8O2kK$I$+HuiS>sq%i{!xI6^@a|a&?_Lz~=~)r)pBGX5^0DgoGu}Ua z$;T)14}*`CKKTf$O9IP3K2mK_`Q)DiZyvwm#miR|y?dgzCU<%G=`PRTJkk!zEP7k4 znUvw$CDPp8Ip`70i-~hohf2tM@lf^qv8q#z(IX|#N_qSEqgwdCB2g)77pgkg+r*0OLKUp@{p@CsXt!6qvT;BMNi*S zBHaFI0q;r+c=5iNf>Jf^Z;!Bdc6$y)#Bw&iBixev`jo7PH@RJ0$i=Mt+f$G(uN>!*_8ERCa*r*z} z?dx#d&y-b(4h-w+PqR_=2$|gw*9A>+o81CW^-&I<+?-Igm%n1Zm(rG)iswBZAb1C6EX|UxIyoaSimvI@AY?Fh3mCCQ3W}DL5E!Uk|)hxJQI9 zPGMd+hI*;ZpC7(1p14^$U}0vinPCx;L)8R|m$g$auv|3B1@!2!T*4)7Eu*?rtzDA} zHLGbh%EdmpfO63^7gx-z)DTT`3lnNunSM6CVrHlTb8%~`G}Y=FVQ6JZ9Sd_R7}umx z_qGh2GnUF8CRFq`rf#$Yl>$sPU~ZuN)q}065n_W)vJWmT!f|XJfpe#NIChNDV7XC> zH>S<}uxt~8ZHEY)y2aqyGY*fwN%#zGsDZ_Rp^fqWrGchl9zL`=1J+MtO!^{vEgj9U zHIqs1)rim{n3qKbC;Sh?)~31%O_9lOS_J0bJ8eS(=7k0;#d6bhrbfnIF?EC zCNOW^0_-DPF$}WBt6elcJ(CC=oJ!CzwLttu^}T<6%}#gtkQ5F4h74^)#PAdilxrgJ ze0)oyrnJFlcte85ss+mA)+9~qNbK;YB&o9en+DRRUn+Cv4bwEs1(u5|Hq}L|e9QWo z8aNkVzGwSF4UVr{F^RRyCu*izBy9JNg>2ihfPHB*$Xq>!^KHT@vaH3YI#o1SUf3jr zGqZZC^2TxKz-o>k*}~x+E7`ho1{>B)f^ndQu_Uzd)RXbdC z`SP)h9@h&8cXL8wgK-Y_;78+1)N(bVT#YYqX{6qjX8s!V7SkpI%l-Q&Yp~pRpxQjB z=R}^7h_Nj-crF^?@e|rH<>U&sJvzmZ?K8B4`2=96&g{XVx7TR3co0^t{PF8pj}c48 zk@M�|s@)%h{4ZUnd$iiDSW<`D8x3MQGO~oYXTaTJ7~mw#L6@7`ZQVn7e8^o%*$+ zMc2j*oYa>U`&O{w>=vx!oC)udh;N4|QYUm$Juaem+Gsp_#u7N7CDFZ8XwxN_8S!R3 zbgD|B;rHwguwZnGFL49n@fh8JfMH@%CKjJx;tA>(&$y+d$bEE`hAryh>}A2vRlcT5 z^&hEF@jKeIR+|VPcPdxwgQbNrwl?O}s#S?fmA2xQiE`6 z;!j|QXk6;M(PB_jF5NlK&D>K=7~hBJ5Em>Bt1!54cfv#bsi@lIWNnO7wQp!q=}QjQ zs=;eBGv1lh;-ys`@~n+mZBmthpUcr)E%487PvhzBYaBX}&co-qj2Y5{j!hF7F{l^E zkMCE{&l~ER)xyx$fG?_l&0h_^q4SIZ_;rrOG}(o)-pP2k3dTP*fN=|karO2o4j$RW zk)u1fe*G*NS5DEqRb&3H`sU=}qQP-vHCLLdxwEbuR%vI4i-)IX_q|S?I+&RnAg_$6}o1 zjeVOaY?`TOyLkv9?bJrMfe%Z!%q1iHC}%J2;a1LRt*o0jPV@G45q4@^zWe%bxQjU$ zu?22tqx~bquyzg1O$@LyuZwZrsuf-n^#Vm+D@Y{~NWvOz==+R6W>$fDXZ!MHmy=I)IG4W9&P=j??FNa`;dh z5AI#&cJ?`(-7WdK+7B42@34cb9X@`Z)T~_%6B8p`T%0s5d^un=IVqNa01vFJ>QYh7 zcl8@Y@b3L19z49t`3w6fd~lsB=MVDu!A(BCeZrJ!Bd~Ed<7cz-d6s#@0095=NklT@L6Gg(kPx7^Y`Zzn;;_Kej`}&0T#Loz(sI(9G@F*sE`-aTWFKSLDZ^|HhLi z_b9xRP2TNH9+s%J>l;<>Z*w_QORYEDt;n{n!5mK`?qA(bVBZh|XEdY9Z+(aw)q-tB zXXrS$KOrrHNa>fv@(as}8V{z#kz)#WDXt$~dJvI;0pn21!ooKnT z8%-9rrQfz;jMz1vUQ7D1n#Nqv0*qgqZBZt;&u>9GR8|2(N zt^s5*|8?rvYOZB$BYoRU%?!)cj5KnxwsHT?9&XAR*`*eGr2dn zbMxvZ&8~TV?rtreh;Hlrv%T}JS~>TWKl|uX9$wkZ<;*mWXRhT^?oKkUZso@5G@jhp zuPJ2Q%-qbCTbsCfdn1LHR>P5HydI_ITUQIN#QMXwd0fA;g5?J$vj6xJopyF>XKWzrR2rvtFH`+f>t?lpzkU56rw^{;_2U~V>@nFF4shncRx-~V zqG`iu8aIidZMPIm#a`?FMeNAkrS4TYUDv2@@bYfNj7cPQPAfu(MiV_c0lN-v#7}HQ z%B)tzj%`T2F%59(=*zeM73sXVH(h^I`DSzXj59t{}VCP^W zx<%4rNJ|!^EyQ1~<-`n&!155^P@+Pki3kfPIyPK` zhz>Hv75J(9C7%vrbug-rp#V^Q3`NARL(;MkTEg_SGVVH@mpCa)&nM|c^f)P_EXF`XDW&5YQGByIQBVts(e`tgY@YaF24$E~Bz^#j1>kwQQ z3733QhU68Ea{=Ufe({Uw>7>puHJ>CTHqdOE2S%y)FgZ#y!=fMXDQ7#0=}-;sPW=pA z1&C|PUP?4GqyGa?uIKw_@@ILM??sOjCj~fNIIehjgM^7K;)P*zJL7qoXp5VxdlN>vBnuAAAuyfCT z6?TT>XV0>6*G~M^x2mqSDULoa+9Cf9)jG1ngg#g`@Yc?b5(Tb^@on)R+YE;xNgAk^ zHi%7l4VF(%A#j@7i_TH|($R?o4oYCq+#x(Hz4uwGyin|w-{Ee4u671q-kqHPF)Y`$ z&HtH5nt#Faf60GE%8AWxIfzm{F{meogMY!CGS;qq1r3FhLR5g zy^nxeFkZGU&sHlFUd~<$qS!5(%>{)#*}9CJer+jLFB83bLgy~fp#>k?x8QxJPB5S^ z4DC(HfUdk4(4QB*`ausR?Ycpy?v!*OL+J6DIZJZ(9l9&zEYc( zhnIP??l+FwI&&!`8m^sJi{+=heE0cK&(|fzl*&Hx`i01aQM;}Bn8`T6}JbJ73RnxS8|Bgb$-gp7( zwdIN0us!`$LJ_5W5~_adGMoK<+3Oa_gAtQdzGBT($|tqCfAgx4H*X)R%}+7UOJDNv z#dDRvgr}lCuPS}^QVr+x_nJ8v-iV!*+iF9o=>=QY@u5UbCa+X| zs%c_OzVQA{Rl_UQCQv!GaVae=;Mu3wJb$U~;fr)m_X_5inLQ_+yLk-MC9(&RxztDdfbnLe1{@e;1Ztzpvtp9&qE{ zZEoJnA^W}x%gf@!dYN{lM= zsqW8Es{&L}Qn3=$sKI?3BX);cF}kA{O@{>&J6Q78)>*nD7~x>*1QK78^nGpK$d-4;-CBy|JxnKDj$~@g7(Q zIN}-VO+cvH2n4H5iAYG0rd=Kw7NlvHdk6Rs8W2K2KoBm$0oaH5;uz|KTbK_45x)3G z`)bhCEy9Dy08b+Pz3>e2!8ynmH#ZNQY#lY5<#kPrF)%jLOsj|%xo&nv`~t>xb1dT5 z0lH|Si)MMn>Q(u^as{f^t&Nejg$B*VX1Ty}aRrvwwp4Z4SZLbjVunRvxwsNusa74T z8P>(b!H#m@{uS@U2*$6R!%t3isOoQyL6ki;!mP1q;DvkJNSvF8VOie?i$pK&!)?~c z7t>UK4U*Ss=uX|no>;XG#<6R(2FV2sd-hGjqhEq%huZg-2AX&dO2o5&B0l{a5-_ka zu3hS>ved?@cLVJpxa7_WjGEGyUE7zEn|X+xt7mBka_-(Rn=R|6v3AV_($-JbY-jIM zoAqtGeq+nd#cbKUkX>mDIJ$NL=hn~T@ZvG-oza&obB2?(dJ5_5C$f5-9N;;Z?P+t_ zwrVC@S54E(6j&}=NEJyuSp z%w0B%`77tL=j>i0Tf|@%;edPV2)uhF5|CuO;K` zHumpQ{a-&*(;VNhdaCBiwSaN~=%R5h09`cA1(v6+nabA9^M8lsXIq6*Xi*aks`5y^ zmk%2SaW`!Ohj-6r-J0pFT&BufIh#$(rm`h%Do6G&B7Ms&^|{#vpKg+sxsh2@+p%xg zbarn0e2=Ej987Y|ATunJ-SF;KkAQy38Z6gL)BMs< z1Ll5%m8(Qxxj^%P!Hwv!Y$%%xPjFt%*prSd(GKH_`6Y$sb9!_9Q??dw)xwXUPH{|F zHI==mc41^v6&ur`YP%KTH@Fyl%N3(2KL+{+aW!W4!PU5^ch0hb zC+@96a8LEt+I9WWMP@D^4GsK!s!srnO}*RQ61yH@{k=H%}y{7fAa6I?ufFtxJ9#?eKMsgs&JKWmnY2`mSDTa4<|#I#mr zoGj`v>X#lGpv}v<$br4<$hfdyy;obfpPRwmI~i1}@-;u#{+=IAE8^N9kilzbV5i2+ zx>XRC&DA{LGyn(HHphA{%uk!c^A80qRr9E~kDaQg0`}GhESxu4eaTB{(KMMa|EBIw z^@>;+*2Kb~2JUv21bI4PXIhI&-~WZW>Rk!-cck#%RSiOmjq!706$+ z%Fnb;X{_G8_nJNQAJuoXhL;ghJ=MJ0HW=p=4B zg~6S<8R^IM@?Y~@^=XfvJvlq(6EQ3TpE)VS&1|Rr!lzf-c$Q>tX2YdToP2VEjRiY# z9~6Rd8$04BH>P*mP=@ZBfK?kODkU1wY*9xB>>f?$wEj#wH;<+ZJ1}tj2o_#iM*A5Z zS${r_@D{-wJeSVvPfu}nHdmX->+DTm%k7&dxp(Kh2F&l?KCRZvV#E9)H!^oqn17Pv zhn8_Cdq0^MH*w?gW^!(9C;RFa<=@Dy8{4>@wOw;>UfV*})y=c6oyquO0Y#VkP;RTglAY!rAMaxNG|MDJkE~BjpZS6$ATs*jwZ3)etixgfcOnv}gJc~Fiilqzsen6y zfRawYvjAiP^-CQ(5SMEKhWfP*v;WvWJ&)8U^_Hz$&nNDm ziNxt`638zAUm(Bur5tf3PA^N^B(9_rkvO@Qwn+a)1bFITQ$&EK4sUhPDWZc^Nw33R z-7k3r@`|eiZpkBKt&g`3!1a83y^>%2Qnr3yB(2!S7LjuQm|y%-kHB-OORrZ<%ZRJz z(c3NM%e^TJbfpX_OX?F>Pb;qE718sGh+hwrGW4?aw&`(t-Qt&W%Z`m)OPq+_ZV{U#|6biRks|b?VQvT$g>e^|tD1^gKGu7SZ1c{n^mtX$T9o`mW7 z_4Z1*gh`zE^?pkqbkX}PegW13uLX7sz!tw~my2e&4#EEnl$RA9stX*K^l~lfbU3b; ztHX1-7Qbk;i)OjN@hnA$wgE8&*I98^y`nX{Li4bh@|@?Y}T(u{yVT-&-2ejulxU$=yhsZC)j=D zFb9qt<@o7y96xb}{RfV4DdP&;({~dUA4@HBwVv~J;fpHYV&(5Z-|0h$>640yTK9*j zJ!Q=JcK8iXC2&GZTt_z2V7WYVuIjt$KcfZSs=a|z)VFYEE4+uReN4YtM*TLL`^9-0 zC>N^+qE#-yTtN8)f#d%PEY}YFeDE2Ji`f+s{rb<~_#Z{m{R@`=Oa3eJ@38#QXIQ>8 z&=+ps;9c=E9=;b7BcFIsP^#J37PHrHA6-)E_VO&ziYpdhaXdKyGA@56vI5Ls6?1dZ z1U5SuaNo~?i*>70q&9M;mZm&5s6&y7E%(eFxNdI3bz3tst*y9dXiTo!l-@Ts6Ia6;gIn{&9+3Mjg<;j~; zp1v-Hmr4rn!_{MOK3#3NcfnaD=XWZ3-g?_a9ApQ(*V&tPubxN+4ZUe*7CXKJH*rRW;h3T|@yS`N?dJfz^R*c8v?$*l*J zUVp^L%zU0@=X3tiBThd3pTY8*_X@b0bxS>V1!}k+b0_Z>xp%YFEzhC&@O}=D8%nAC zr1(V!WNxEiMn7)G2XMJgRZ8j_fUzMMRp7nhkG!w*Gj9wkQDR)1TnAGQsSm=;W}dVf z6+_^RM7(CI$yP$RtiHNd@FEXiZq64N`G)P5=SAJv(yTNaX~Hp|;qOw|tg+_iot+tOyR zO(6Nsd8}SFK|9EE%a-|U+q#II8-Hc@y1DFAX-_Yo#%;CvPD`!F>elg`Up$(lJLj-& z{X{mbp3IJQvs8Jr*}i55+c(T4ZOvp&t9_g2*q%0@ zsgwKDp|e^fr-tJZ;7EKEwP8sLW7D2AT6Av8ph>^r5$CNP6zkq99N+GV1P^LL$Pj_! zDTEJgM$E7ln(b@RDi0angou%!VYyrf4rxg6h$aM&Rg2(JO*CL0DhJZ4bgpfJwDD;^ zq$PtU_hRn+;T+kwf^#P}{%&@qEF>2|F5!E3EYe(o<>^}&Xd38Zw|v{idF&ThzG^gQ zS_D&QRs-r*p*x3J>h@>E9FPlR4qYTC^8%>>XbKE;b z5Zq5a7d=12a{Z7``KL0OpiVE&m6%sDch8U4b^ax} z^DvBD>R|3t7bEK$SlB67<&BE+)9kFDKE8(wXAW@f@(HeF9O3en!(6(&pJOMska2Mj zr+m=SEy*w|tt=^N>)K3g1*w>aGotkj$z-IL=excbcucPkG4<;4xNC{=y z{#DeBcfz!(2QFPg@#qw;+2nSu@2edmdnGqR`woaL`KlGarEc}|+So1obvlm=Zn1E| zWSs1bFsoIO>fip2N?(?v+IN4Y=1+gaQ;qdZHHSPcyvC)o>6|{XLxcA%n#F0LyqenV zRQU1lSew=NW-#=FP0$cU%tx)+}oZYN7vpCh&{cuzF-A2XNs__F$ z7ER&(n}=!*a$l`$9@4H&Bdtw8sP

    {g^&xn3@Y-F{pnJ96fC?b~VMjQ4ni0c4C|A zg?HBoJk)sk^;B-B5CXc!X#ZrGvwZ;%-rU91rWWq57P#A)QuT)~aI;p=k}B_A$s;v4 zFQHcD@3e7rvoXfg)keK9W|*pPU8Nts;wSZ71$bF$CSe{IW%KfBKJOmf*TDK$2H)_- zPv!7bX%2|>x1Kr1QO=7BYu2KqQ|wQciLDw&+AR|X>Ey} z-3+JUVVHJurdmTI8mKkHn7xzfzjXv=t?a4Q$W+Z!vGm?Ll+j10kvzRAtrvEo-|E41 zp3|Ml8>f=gIf2nLhB0yaND|d|cJjobY~Q?s4{ybGx2*ZpTJ)p*Wb*URCJXZ~aO>Iu zE}Yt^7OnY8)B^o|j#>+=$z(0 zdwiZ3k1z1z=|xJPW$@n)#^vj~$j&*)oojn3%2sQ7wZ47*BAW-wfFAMszM%6QP(@?sv?oR8)9cVPWrELuqAF2h_qWc1M4=1;!#nko~CE8%#*qQbV`_OKFF9N%T6Q|Z9DQayP)jtNmj(&u8 z4x!bERxI4|8&SzIG)ZYnOn9uOT^^yHAFafjzKXpK==aDcS?n;`n=|tpOV6XTE zkV<)a9|SZ?dvwStqC-p(9af6yZI=E>yClE3l1^MnQ?_s7m;Oq69fnH%dfWAW$+h06 zKY~tiC7s?bJ&)8UuJluf)H=YHd~z+KLt#my*C`@?$uH$fS&~P>#ns19+ElhJdOE#6 zJx;Dun>GEtehHJZrM>z;AoS-$;`DO$c1W3e9&zPb!lgbLLrEv$QnvV|90`|nQkJBZ ze(2@MwO&ryFnug^(c`3E5h+XR)W=!!NVtT_wcZ{P@ry{jUZ0*`(n=crp6MdbfrQI* zBkzJ-%d;bH*}O7dQnr+-_fxM|(&%lLYyBA&zvR)|qPI&Q1GyGhE^u3Hj*FJLh;Dye zKkQRLxBzYu@&6H`3s@Id((7dj6qmBZ6)>&?auGdF(kCXUauOSmlB)Iu_2UUl2*#$>Kt z&*uDv%ZwR2UgH!sjO$R-Lam9N%y5eIWYCEdofI)|JGWT{W%p(CO_} zJH!M|Q#_}nYKN2t$URW^BuKR_dU{K|hsERHJBCRsr)scVOt56%yP+NMDW+I*Zf8?i z@Zdj%JT3mn!&h&4 zDk|_VmE6hYbX*wMJsr4VYsW2ndv3bfazkyV?$}zAV{6MbM<=d2xT{UNH+fc`+_G~~ z;zYis8yB4Yd9q{`Vxp$-aUP}bAE}K*5%10&gndfVPr=TMu;U!;Is7?n?+N8U1G`n& zj-#+(A^DDu=PfJ7xVl@A$LDKQyW(`-cK&8x)yOO%9ebmI^46j=1H?Iko8K_E-!qrmz(?Mkw1DR zuV$#t#lw%hD^fRIwEx9c`olxy^{K~gdq=K$MX7z$ecqQo=D~eA^x-1KIk}YFxkW+# zY3@EaPwqW6G2MQ|`>XkyJjf{|_pX|xa{v3VJo|1D*;jLUlvl*lf+F(dC(rk<@izA| zujkKaPiQFYS`F)F@w8nM*KG`VSfe7J>Qo1#8kAQ3j*rF_cx6f{dZsM)kDYt1Gieslp z+`7kVTIB-EgN8Q2t6w5+ed07o?mt8{%ab+Da*sjDxb{!NZBTszhJUt89oQ#{fR2&0 zAKih;zmDMO@l6!mIm_O(xumb1#m;pz*tmK!YgdkA-MT5PT|1Ta0?;?iWmnofEzOQq zQ`x+F0w))Y=0W%Fq>Fn4t zOVchF^Da;FPeSQUj&1*y)pJH@=|r=9`qY7R>zPVwn>ZS@Ou*UC0cUSJR%}{I$3ATs zHG3o>DdAW~I^oe;Jr~{8!lGXTO`|+;U;{#bX{-TW0mPz7E^s__SYyprxk#9R^D*+z zo#vmPRrTCD^^Vqnde5ap*?;#aryrbQ`>}OQnbu#^D3^mf1%``8xoDB=fLu4lA|mEj z1f&Zj7mzMt+c(bR;QAR{SviVR%>pSfRqtlq>O3*3!u=#a4VH^$xtME7-?4(78y2#8 z<#hJ#TENb2GuW|pCOO%A)TDHqqX*}+VrhSNZJW%N4dYm|atss4_ar9T9d92SwYdmm z)cJj| z=@6pX8V~55NW?EqXgaGWN8Vkh!{WiXsPdw_*Jql#UvpQ?#MrbN-k!Gj`8eR=Wluum z71iH#-;}+Sf0C{F+*ZF;ZThybt`k*st%hX9BI}s4A1ci z1P@6jXka1%gAxcElti-;Eos_6m7h$1#Ma-E%0@pE5bjRR+CR~=R~zo^!_2wr`983kEjyQJ+VKWvRn(kN2Xk9P zYSgVly`)G^UpS?Kaw{84?0uXt2(lq@cxz3=-lcsQL46W5a~X|CG-vX!`$IY`AHR}ANnS^=E8~mgF`LfD4n!SJb#(|98I)^Hu zro^b{!MTM$zHNhP*ei+2i-vLi_E9XXDpN;|v6u;|t-dK=ee(s|cW&dvspGh-`S#oI zztQYm*Q`}lv+r(WV?y;RKk>u2f5FGYp5gtwapUX}9^5$3^ZXlJI<;2=v6X-N3srym zE43?sO-lVp-o1H5wHiNAzRnMPWAqa(Ms;P(_63+X^;Pqp2VT7+)W)G6-W}At-YSx` zliTS(ZV+Gp^p$ofX01x)u~D0qieLX#d#2?3eD3^SE}q-Xx`k7jKC~Ajd$ncWgu(3I zu!yrqHC7;g9-IYza? z+KwDE3tppprX33^<#ZVtsg{_ zWIyW1dD1Y>gXZcTY12HCmdzvR+%BH}YJM6qxE;fXwrA{!&P zQ1IkBMUSs(-|{z4vb2Tq>*5@>=}>Fg4{G!A_LVG$b!wk;ujG>QgQ>L!ecdHUN1Uc(=3mu7fyJrm_GS;o8@Iihvm9oAfZ4%aV1QL z%R0aln5TnE370ei4|TXJX(Yccl22R#g5pZNh=iAgf>NFiLd7p>^?D^kwLRuij<} zmoRCov{^*&yZ8l&>f@@1Nx!8{QodfUlqcor?JZk}h#oI~$*)6JJx*LHNAi|UBlQcI zl{QFv2@}7FKE9Gx7YUPRLD#6)(@HvNtJJ0UQO~3IN$Qn!5~tTE;d&hsUN)cjr9D!o z-airX>uLTN{%0cnmU48cUABA?z2AQny&qD4*>rlJb&)ZYG~$;!^z@Qe`mFa;#!KSF zFX`l7lx;`ZI?C3smoI(M)9L+{bbr+R*8Sp2oUS!4*COH&YWnPsF^mo^XN7_D*de7a{rDhM_m^^gzFcf;5=-f zM}e;mH%yIT$`ZKp04`rs^;|{mUf}8lP%i-|j=<32lsLL^As_*5nQ*M8H$>X=r zd9B)1DhFZ~t9Cri=IzqiQw-cB{vW~eg8R?Ozo{m=tlK=ib5mVs^6J!X-t_9r zMPo}I)eGZckQ?`mtMkgBD%7a~YJ*R;pZR21nb!j4%&KtSu_l|sEtu5Ki|)Tf(qxQU zXpB{h-mxu+8`nxZ5!y{n;`Vde;yJS&apT+5aBMrGC$u7DQcHp-wjgLi^Zy_cRyHnh zy!v>LYl^?xB#HQqlmFy?KEXS9Vk=@Nb|7U!SIi=vvG8-mE8Gw7KwpAGgS11PA|fIP z3JSo>-&+&!z(D*0qwrPYEk8*O^CK$6jkq935`*nX@w20&tqpDM?TPbo(`@|;Ecf>I z#>CT!T5h(OIM`^ATr|v0tt~YmE}&d~US1ZI>#$tJ!p`QiM!J~^bxe$?P_2pv%O$^P zme(>h(p=Fl7jrBk0?Y-L>ms0BM9i>QIy>>bDx+&g@ zc6s{R8EjiSjkGlrS+{mF8%2BiALdl#0MH$)C$nqq6!xs2r2RtXg0nBz{UbO&wIBP^ zXRvbRa8}Dgzdte83U zv$>YFbC@x05WV}gq)nHGB&5b*?QThYN<9{?o==0;iS!!PlYoZ7)bcaKr+qa3JreQj zTOaQ}N%;0o&;YMr_c+`-MrhjNGA5#3E`IHLSYvH0e06)}Q`+F%Cx)=0jp@651m|8{ z=F0O-R_$D<9q@Vl;A%22?9`xnS*>!>9v4_H*8)c5S^&Bn@+sj0)#aZIhg96v6{9$v z8bDDQSe~D##%}Qt4yDi1%(d*;Z4=^(ukOmEoe2rAIINk(OI?Eqiq=V zx;J2ox?jgK4$-z_3LYLd)Tr?zUwlw)IA-hlQP@AAo zY^-WyYh4Eu)2i6Ines?YzFv(2a7_&)_LpX~n$?&6&ok)!>i`Xw#|&+){er?_UJ-ZJsXa9-S96qz2Bd6D~X~%pv?_9u% zi`zMVVH=0eY@x^CcGR}2LUogh{8Zyx?7eI#`B+TP0X-=9w{kRV-JI%XwWu9nK|s$0 zLi#r#uz!*o{{-AShS6qvR~GDF#J7fjrB9%{qhvmT8HG-CLiehgRh z!`I)H(@f0Ns9uR$HLLL5w|}Qs&n{}geT$11PqKLNT%yz*?qqL9jcVUxQ1d6kgWVZD zq8A6!*O7DWG0D6|9kgs=i4e@;}Ge>#>?p>4pST0Zc%u42*IO;A3dh_;+Ls| zs8IU{OwHCHLk@Z5%IToh85M4!IXjP;mJ;*;fv5`q)M?FYe=2Q4T?7rZ^bZ z;U{(9DynDB&9OYKtNn$0cD59kuTF`n4d)YsnZB+Ee)AKFnbw463%U|Aq9NTkjUsVM zb7E(=Aa;Fc+~+3KazjtLZR|(X@K|cZ)*)q98%?|Xx2&}|b@j!(wFA93{=(oLW9YcJ z2ixwZ(_~~*W^bR(RP}8dJ!?4i>WAUu?}DqVE%9+tG*4|vqx$i*Yu$|KuppW?N~CLt zR&;EeN?e2=j@Aa$j|(O`)Sbvc7sCAQ2@h~kaUR;QAVPy(2nlo|HpZ98Fn63CjkIUj z!_AyPKYRRr?eO)o#>>MJ4_7l>olS6cGRED}kcM$S__`b77i3Lfm;?4s280DT(JU&M zV6}dTaJ9$Iyf&e+zBu?==sCzqr;S!n-<+n)=f$ z!keaQy%QDYO`~RsB-W3jg>u_BPh|3_UhLSqnECTY(XCAr26kyfx8{xL*ReI-Tcwhk z5Y2?)1Br=Hbvl_66zfGmvNuUR5}0>jJ{{(CA!TxN>Q8A#)A?O!x2!M8YMqy)zLi}T z^wL1Nds7d3%k$`~KtfzH;o;###YGYsA4x#yXA>i3HOd9%iHKi- zx3~iDbU>%Wa)EskE_{3CQ0(P6KIOW8U+ zlrYh9*6WpWC9W(~7Kp2tE9K~ANtndx>BVi@yqQ*qxRORdxWIDBBk_70b*@7zmoRCg-cAv{FEVCw z&&8E{r{8=19*OApM#|FLENR6ojii;bBwp%~_Da9?`yhEl1S0Egm-Kp=J{D!iMDJJG zFma_^z5RMRaivW0|4}5p)TOse@2@`AdK+}n`zn3=qm&&BUF2HND`})mz28!=v`zft zO1O-_q?2|@-7~i5FVI_{wLomq5O3VH+3%X;O`0|T z9hU2`Tf+Yc%O#J*3oI9KF0fqepqGW^I+T~|vann<%R|GWNUpE$f0O!}X1Pn8AE~3e zXg15k#<#+Ma*NMkc-m(;EO1;Dy+r;9%Y&x1)ZG6nEY|`1Ka)SpQ&x0XuETJFv{a9xA;$iwC?|BqC@Ndr$ld4*|tfzv|sD58bc8uHP+f# zsyKgbJXG9_X1GpCA?Vi*nmHEVscMfhuP0$++u+hUhFUQ$c(+N$rBN)kyqx&A>J|C7 zpMRjDL2YW8ny9su+P_#?;N_M2_3O{Dyx<-y0=(f?Hl-zRc<}xM@18t_H-(hGzNOq; zm_3<87Pf2&h^KVtVcvf#;eKfzYG=WV&Ff&_UeuGS%6rbcV&%R#3)j|i*u5&py=-CU zA-MBYg+GCkLOwhz)J(p-7VY$Vs*d49xn|?YG4F7=Tg0mm#oU#jm40~qIX>?JWL<~M zbXYK$B7>TIu&Z@Rt zJE*RA!)fI|CT3YSz}{tCRh!)Njy615wh)T*dComvf5?RVeOzc3#5tqdJhgKp%hH33 z%01;`#Ssq+4tUse(A}BiF3wzZv?9m37Prj5=YdTP?pd31!_t|{j=mgpu;;kH2Zz;W zVSj)J8+_f^>F>%pR}-@BEyyzUfGKNKf7Q6WRKrzN%%dl7DOFq3;y3WNQ2AcJQ1|Q{ zT;0Jw4>Qsoy?DO*D%>bmc@C4=*PruNo)jkxQDdSq-7Dt9yZ5Sq`|#)@xm^;uZd#lB zK5G2(?x?#gB@)f9vz%3%4HSbLC!^^55ou zUJg0;9&l5Q`HceQzki#e90BSN|Cg{lE5C>vc}3*q6_S7B7Vir0lCL(=9N0*{M*t;N zjCfVM4)0A3c&#>6uWJ7cbt*yi@=)nV<*!DmnK74KE%`OUfu5Z`NgkmVSX0!(UVZEn zC$=VLbW1`fw9!Dh-Q3pL&S`_^$N>D+W=J*^Awj_e z1_t8q?~kw8X;hn_fUq!vLSymv3)MDFAyGc~huG54&x$GTZY*>2VYX)wo!mUMpX575 z`D&2e*Vh*psFhjG*gz8vnk&&Y%f&QHbwgvS)HUE|gIZL# zHNi6}f<^n%_|m4Tc93VSC_CyVxM0@M3-d(;S!L4&WT)V{J+O3`j z$vt|;Yf#v`f0CvdEFzlap8exBt#Sdwfx{Z$KU~R3^)XiW&~<1Me###(qOoR*B)Dfi ze);tmX0M#U-u)}NczT;=uUxdtw=A2;meo_(xMm8Q(`K?KeK|`PjAiG_nH=A-kj<;d zskGxcw|Wwn`gY=)nJb0S4LC687gp_BRzGj9cc(hs|4@hFfrYRh{cbw_#r?GbTViqhMr9tv*m(n#5 zzGm5k-))qOCb=#Wri*}bU3PC-$bmJ}xUq5!N0K~vW>p7jRpGgDHEu_`a(ksJf5&vv zcP?hv_T}u}yqLXW7k=9ucJ7?T)-5y0&fd-2S69@%n9kx~`*2{-EKRd~+2UbLo!FDu zdY&|_A4Zq%%~-Z-He;sr<7)0P=B}H>&#qPQ>KKW2s(O|>MrhjQ&Rx`|YD6>bpDbdE zC1iASLdU2v8QW6RFc*L>+7Q9RQndLYcwj?1FB``3H`nR8bT|ov)L6BMV9amhIGc5f zExXq-Y*b%TnkO)0-XyZ}GPzZ7lgM`Jx$KpwEk1+#s7+J%hHN~#nRPo>(z<b&jUquvXf_({;Ss=&N~bXRtMe z=5=^pw;E?WjOo$IOSLzWutCY1jdcIPi3ANvAWFR-EhcniT-r3^yCq}lZ9;tWC^qg| z!I=yD*{|l(z5CX2DRVy?w$0~6#x{;!-omCs3)ypaHQSFZVcU_VY(Kh;^wVqEdv+tc z&TM4U;nl2G-@(S68ZvD9P_hee(tB8MD%7gT!4n5Ke&!h7(E)0%v(il2$gdr|dezf@ z;o#IUh%hzwX_;H;HohyB&3~eNwJ-U({NI>5c{s-pr>pzFj>8AHa_ES_`d`_(e*=dO zZ{zBTEo9FdLY9{yFO9wdiywJZz8sJ3EVvRKLEg#*gt(jV)%WH2v06F4Q)TAf&!*t{ zead}Nj%GbtXwcU@+L4I94e(R*iFs2`yt_x@-7!SnqgX~Q8ce5wsZ^=+6$XYCv9~eC z!mNg73%z6e6ty_N#-aTiIdd|d%NGxD_3~jZoK5H4$!%OdznhC^c5?dIX3n45&gIj4 zxOgg^jI;YOsQn{#>y*dPs1kK*{e+cSO{!J;hFiBTVe4$lx7EI)rn@0Az0?@B4#Tx; z6z;v$H(*FTT)GBf)xw9s?nw+>GLgR1M)FPN@;EuEIlQhRPG)A<7}lnJ%lhQxp67b* zNp0ND9NWn01M4_(U@a#PujjzNm87Tt#^K}Z$h>)g{U_FQnC|yaDxNsYqVc5$gdYpo!PwE+c>GNR3+Mu~X|LZ!cGj>(t;|)xOeak4Rg;N_|_Z;2i2sqrS}hK2+gY-3Ciio$@%niI+c&Ia@Ah>(DazyY>4O|Sr0&n*UF_Jp zmOXnmtLJ|^D^@IE-){AspFhgx4J){M^(?>6o65X-Q`o;}3+vV_yPR>F33QUs^Lp%^7`LHez(ouC(sdn*O7Q(7jt12KDN}uzo#h+bmhl#j!MLR*(7# z5j3n9O{+!?Xx}u2f!({(u2~AJmM)@8mo|)@Jd&gqag1Fwj=nSdu`_!Q_0_!Jc|k9l zOlwQKCH-jmYfndEJM5{GN z1GS!v99f^(VTpwI4X44_288zy#lNc`k-Z{lIlKjH4z0sG+?S+=4QPHE* z@|aMf5~2u?`D`{qq%4RNASmlbfubUkN8oB%kuV+dm4$se@DnKu7j+0I@K3G%pj5QQ1z1bG#Oe9P)vxvTN_x>2*Ui7^aJH=f zkJsW#KB+_e(q=te%F){)@#2?w9bQYDWDKMa5+`9I(l-%Fr}tSz9~1pr;-qX{vtIH@ zyk3v=N$X^`)$>c7v{9a0 zNiVL1>uL17`tz^%L0mn*TuXZK>*Y&Y$tPiYSyH})=_1#XPU58xx+|jBBmI#wCA|)^ z1$^ta%5@knt^jUbB#nr`b6s?;a`C6OXsH2qf#9N9F6LOIOo8bF-SsjBl!rw{Yx$z1 z;z_Qr-k16fHO+E?<^D|~X)v@M@nhTlu30XCRkVD?6$q}IVF^(CWC7!40k#gxMa2KV zlCt^!Gtu+tWsCe71lO-6?vK}hOs_*_t$+Uj*k$3e4we6zlui3*qL=y4q-_0vCIaL| zbeJz9;d*}kx@?$!Epd9-KNHa^_f%u*r9}G&g9_74v3N{Y`C%IvPTy+j2qwj1`Ssn{a7thHwwuC#eCoq81JqPll zu#~4_59HN3xV(tNZsj@UZ_nFf7kK&P1Fzqf^5penp1dnjx!;n*Ctkm}&&RQY$#k^i zoE+MDuYgA-`P_SdkGEOJ_%*_pO-^2%b#dmFcXe)=mE*1Hw>+y_fydS%Tr>^hn6(#s z{eyTgb26OW%Y$T3&bb-!Xv`$lulu}y`GBXd^5Btb_v43re3`@RlAG}Kt_sUmV{ja< zZsx4JDW}{Vd9iwpkZK-(xT{{CE2@m`WH+27 zQ{n1*%|!D3jJRo46*@GBbg`X&297BAuu6A$9~|1F(yKC#?}QnHxa(?3b{!j-z5?zR z@c8Ky-hBFmm@dEbKuoNNb~wDeFP;+K-M_5zZl`$eLQq|xSjmNX+#l>umYqGX8}xt& zuTX=o?zI}@XPIhjPjIu58Yi`>eCeg``O&kgZ};HVRXDhbGh_R)Cf=95L6+={aN)w- z1r%M&yI;hOhmXltc?;At_w3q5mF6V*YV(zEVht5* zLzT)lvzpPV;NiC;wg z{u9+lS^)Y4HR+F4AE7Z#@ENB*$f|soVab|3I1Q|iNYTtObX_nUm-<222D)MG=Ac1w zu~8{zSb~CrG_3}K<-Wmz_=kq#7Z`?LP$+?6{+jk|xQ8KqJZ#x(=gk2NA0|3`)7Z-$ zwczJnX?_jNIiHjz<9MGx5aslL4&JG$Z7dzwv#l_V@y0|)E|EY3C zeyCVpgXL0|0CO?NB0yb$x#X2{1(b^ob2;Qw*DjaqT4v@LSXxlk%vgivqFFvSeKlX% zR-<~bDkE04A=w?vCcc_|GuxCv>{5fYgFfZJPnV9-ICYG~p<@JMg2lN@^k-<^Ctic( zA|8EWHCQg1<^G~gJ}3e2!HM{dXn^nNMtF=!CSY_5foc;QKCBU;y<-{r+Ysiio}_7( zUpTdu9jm5mHp@5sHkM5*C$WCzMD2jeotqZ1Vc9g&SI=Zm+H}%Z59i?OkzAhGhtmns zT(kC|s99?ct{TUR-BZ}GVWLVmmBSlmuz&3|_N<$!*({d>KG&=I1eR}DJBf{JCvrPe zz2k3lxo}`53n%tt_lCKot(dN9miHf|HtO9P)38kMVVn&kq^*RPzcX^;yn7mf0= zB4K}o=mN_Rt(nHnm18)Z=*}|>_0IkQmW$2uT|0hb=eA`UEZ?)~S4{(d$Bvn7TtA8I z8@qV(^0H>De9?j)?BA{G+c1vhONKLgWM^75kEU7kIQk6e$c*`8={vL|=dup+%e3Bn zZTllOYCiVq9Ia`Ek4T?G^5l+;Ik*t#o-u@sY>MxYM!5A$z@<;zXLzo{MAKaCnMaOn zPVg^{Xfd}Bdmo>p!<>GEcT*d@ZVi~bX+9@!oM7L{U1VgP;pW{dWaegY?#3AoT{uWg z$NIQ-izR53+K}|FPgu8P=4@KPfs6Y&k#U%_*G_QZ)>$=Gzo5~8medTkBx*n^;R91i zoY09wuW!(9-at*WT(p3KRJ&XztIcZ9Al64Yk!x8;&2v?_;bg#&R<6Vj3MXpp9>v$l5*Yc>duz zS8iYCOvY(qQsbx{Xijk7M8bzO#-mq^W_rTDV<3)g{pmEfH)~F(F=OpidJgHxs&(@z zEV@PJyf0$kAYt%SxVfU%E9KLvfoyT@@M2+2xtiwE;)Qzj|)hM?49&9U7@a|P;OX=Gn&#<{G5wghZ~{M={fu)%HAl9O&@|oU@LRif z{&;l>$E}$+{bu)K`L16zKy2@1NcF1UVrgEDI<G&UNwrNN`H3^zIGeGH z(-(JeOtmxj-WjzPIL)0cKrC`m&C<{s>RD2X3d_8 ziH#wyQJ(lV4Ws$QZn$?2$48!b^$n1JGK37Rk6*ty%o@2eHf=HovkviZYP`ipy0eWD zM%91D(W)**4{nlm^9;B0&hqf_RrVfR%faJoxt@251LxDZsMZ|!t{hWqlr!ABdyE^m z_fz!ridv86F`-{C%?yj1pEFf0D`M_enHZCA`P8-zAI%)p+QgERbt|!SL?W%G#}hv# zk%&q4X}zdBP1KqrdRi($vlAI#5J_AB1=ka&CuItCB zLzC#UWr%tXg87T**NojeksWt;F*SV}t52_C`-Lq`UNV6J#ra`e_^R_PsjM zfA9cW#fGw^MJ!v?*go!lYX(wQv$wNZWQ34{v|qeJ`FG-+I)5hI7tzDrwr4em+3X0h}b*PE8Z+H<1l z0?9*~(qME8TF>c0ocd1o+dP)WQ`%8i?2#wgGkMoc)?M7d{QdKpv~@Ce4IF7XsVylJ zThL))FG7dJlRT|8jb^kVX>@&}2S(9gY%*c}LI~_0Kuq6AT90YN)-&7Hdd-u13Go^% zkFS?ZV!~$t8&>Z#FpsGB8PEwB7x<@xZ2@s|tphv}f#y2glQcS1EGrTwqJzD%;bp;} zv_ay_h6@DLA)>?!2-P8JS&%EDmm}%*Ydyc7SBI?PFPl%Ub=a!6LGnm?5k0NM>#m5T z5z((DPKTFz9eVr4FLg_OdbxTZ^gc;hdS1B}SHk|-C*5CG^l(Y5hw1H;a`g86vHyBq zdU`#t9{xuu8~4X@^nOSi^ma&@GM;kJWgH}2!X%IQ%f{*Lm2iodF)CZ0)S(0DvQoBO zJ)KC|vc#2VS+7I#$#W|rerZQpzqCoxi|FY@q@1!M=_QT42m1RW`Smu5D`iPuNh8-X zF488wPW^q5yt=<^8^kYdmOja~lq=VI9TF~ON?QbS3ji08E#O;32is)k#*8YP@H*A#!$SqNa8vcw}oFI>ceqA_}{vk+?OlhiB6`eAK!yrd?xF`*kF? zV-tKDhhrutRl{wtYOK~{z13VZsWlDfcOzs{a{~WyZ{@y}ZJUUX5?|FGf#o67Kg05* z`JM4r>s^86zsw%WgOaqJZ41t!d)?|@}5^EpD2ED3yS5S&2un!AQwywxalpBI1A*^eK|z)`3+DLbFPmu z=iSu?V#9V7{*kw@KfsIAaA*S8ZNA~IryU$u`Q$KAc^IGG=VS3>UcG+CL(!Rjo()4g zkZoUwTlJzL?>5D+?@=O#yB}R)iI*J*Y~8tOW5<1)Z+T`@j#5jJiaaoJ<+_nCH|%}b z>*Pei)Uj~&IE68y;cZ00*m;_nmS=oWb-hvj`Ka0;{|tD=yH_Q=e+Qr5slkxLkMa&{ z=1@*Ly7O-NPI&l|7o|@$u+FW$WHs<1*T#bPDJ>x94m`cb$Jf_+|K=(mU)@w?i%AnT zZiQF0!$mK+TXNOP3Wkh;+*~!jDouf^r&#_$@lf?m^{@DW%BSM?F5#3zZLS!r^s^SK zxO@uK2;BYnl>FBv^6v+DujEAu>TRa@`FlP-SB)=JWxaUCV-=iNB=#E*a;~EVw_MG6 zp45oIt#yqN1nKyOKA*nl$LfdlM$cw`Uc3g7t;ZaZ!cWYE6 z+t!leIm`KQ?LI}hYNEPxo5#0rP;?_xU1$G~VEOe&kGXy?kD~jz6rDQ^mkx0}Hh|nZ zwfSUFix-CFd1CSd_iKK|!`k2R%G!YEj;3Tf7_cqCf(fmHX|FcS4MsO0W_oi%=C&hn zUMGTPb|z?AXZ7)Ehx^nvxK3@M9X1g-p&>D9W7A-ST5OK0Pso@QyvM3ZeVqF6PZDkM zR``xrA08#*51H0Zlb|VWwCmuhZ3&;*Q9Hy!K)TzoWX&dYy!!Ygj%lZzLT(o9h+~ik z;qlR$eZkkh|LfmnV3&tfe3YYL;y#4(Mba%zo+7crZL+x=t zt5lxvEBwrNKmADc+O@QUKgAS_XqW4D%_X1YuVbmou{Qq?rdcGcN?k*0Tbff@)m_1? zwg$`R?^#P_Z!-+*xoDc@24a`Iz6a)weXwd0fL*f?+}cFp*{PnUS?uXx&euIalD8{Oub};9b_0vBC-&M2Om$s1fv>9w(J%;TYMsjK8 z2=Y3&l&opghmK0sL|}PY&2rto zzBYaXk{GmREEir}VbjSCEL=C8Wy>aLu>8vT9qilrn`X0IY?14xSN;gf%fj;QX|pvg z@x!a9k+otpM-tt6ZdOZ!<EfS|64qz-J&_}?aywtqe6bIx)0?ghrJoJx%Va}tNPCb&;S&2&r0 z#lzY8=sd0G_Q$Jh%xBH)A;~yTYD~g_XqF{=amCJvH?=Er*QPoXQygj1CzN{q8W21v z1>d1b_zaIDY*b@{e@WKta>oyBOrwEn9%~dphe2&vw{saUKNV8+Du<{>e#Ewxjg%W9 z?fr@G8%0F-VCwaVAhJscA?*THzXJ&E7)n@|aKbuA64o)2)L|`2>e&$A1_A89e2^78 zma}rpa(3+BibJ412Epb8_lhNSaDCi+M&dOf4zK>PxOR;opu5@#_fVVg?#XJ7ZppfB zODHb={14t6S!Y?dbrEwnjHOYZSeo=~N{7KcY1+Lt?K(D~Ukh*MMAhZE)tBH=n^)z( z;DcFR_Sde;fs|MVHVviUpq6Y*Tg3Fq!^ygNjy(r9(Qi~w4BQPc47Q-@M71dIS&yi( zEwE_gN0gXw>J~+taqYNRc#h#S2TsUgDC1KY&5T_oI`1Y%hRcavZCJp4! zwKK#dMC0ycPpG%2X1-?GvN`NNvWbmH)-q|yXjbp|m6coPuzLGE)};UXf3f!$z_aa( zoH+W~@MXhKnL2lZJYRhoHD(ASr;p$dP5)w;uCdiVn%WhQ@@Q<^`rt3?@QPFG$tla@ zfBfn1sMqudKKgGT(Yi1P-aqEYmv^{$ZZC%pu4n(DwH!UQnR_qJ^6;I$<9BlS(q^tc zI>MdjCuMJPh%K`Ayn1(?`_C_M>gF+7`@WL*$!A7?z5DQ#m#-ht+@c{?ZmqEJvBn|6 zlZ1ZxxX8NhTONl`pLm&L0mfywe!b%fm9@?>%Y&P;v(t|)PHq;4*&HX?Z_b}P(U@rC@3872 z4C>XJq{t|$Dk>Pzzb}Oy+R(P7i14&{;&RhSDafHmj}G+7k6?O`E62ZX$%*f*S(}+c zmsoEiU9BX&2(Oe#!gI5Ti%cLhCY6G$9O6^r2ucaTGtL)lR~sYj;A(GBYECK%=?SFd zrIOh$n}Tj_Nb8)#ii7KzwQDi5TV>e#iA>qQkPcJJNRxMJ`lz;8$olYQU_H9b?7@*A zPmw>O4Hvmeg}jrzJNlDWl}(WB8S^K1B&csR!2=Tr8yHVW&rtljh`fEm@ho!1t*tY@ z?Y&4SO=SM|`Ph3q;;*1uXf#pbaU{g27{Hisu&e>0egsE^7$BW$imS;LbxlCr1pG|R zawYXEfTuv60(Y9%Bop*g(sZTT=^9qhPk}xYKr{hG6O1*%Ms+o80)oN&a6Z8X`RZWeiJx0`87`KQGWF+SgUC&zgfTLHS?JDn)x+N`P9|2l{C%FV*>AH z-I}JPVNKV1&3tCq>^H4P^O|`yy*8QgX8V*(`Ai-y&*W9VlF6%nm0d~mm}$yy%B!St zW?g1JQ#R$*{N|XOWtn01n|aOpewk*`IWn%OQTv#rW!nn_Ur+te&q5LmeoPs=l2Ft?-I?@?|3 ze~*5d?>`Hc*IZipuVz_HpxliAH{kJ4V6zF78*TjsF#W$vwafpnP;CI*EYr}u{z>D! zb{(~OYxDm#QWGcELsAV=Q!GZ`Y2Qj2j)UbqF(eMF!7!B>73eB#{DpgM96ts81Z^CVZ}SDHcn#pIFA9zumy4<$7B1(Qf2&!3>DGC}42y#0H*Z`s=syC> zZ{EEAZ%nHEl70;!uT6gg%l}6IS^DVdb9nbe!EyzpuQ4dV1+K{<;m$jWf6rSvg79P) z99+Nwwxvf`--ao~=qBzbr{e)|=QE=(J99Zsf^PS{* zb)A>9Cc}btFl`o$E|LRFFz0{xh$psRLysXaX*tZD57WoOzV+y3q<4LraH_#qJnk`0 z%7cd@(!~$2dG_=zA0EBu-NRQrfB2e*YU=#$k34;UMcTie?N%*0*vJ7!Nqy(v^X8F$ zRk$bqt(*;W;B5W+JW9xdTX(tl?g^KrL(a?Q`igYQP3{`Rv&(R5FB_XTlht7d&}#M`Vz8zkJGrC)eP?NmxIb%@$vC-pUS!j)J$3IPvs6*WcXaM_%*( z_A}ldJ}>1SgUc6re@$(&NU>M0a_9OL9?OtCfB8hlWetzY{5f3bV~C4`W4opCr{Tm> z9?k8=D_I;5eDRM^_Y0o?=_{^(>(0fdk({XS!C6aBPCL4C*`gWmzWba93iOYk%d5jz zxqALG=P#V*;ki@1xNwI17ynPd^4px01?}{Wi?UdqkvX#yW{zf?MSbr5@D=ZW_?#u16co=8r7@OE^qh)Up1)v zGg$s*gL?e#>o54nuRq2n!iTZz=JK^y3&S>f{U|#cB{PTj(BS3BH7YKFzNcMPt5V{z)G zzse@TQt!YM;pzhEp& z<_>1b^m2AC>ciO)owyq8!`_CCIbE2}fsy5`SvHK>i-xdh+5pzgsbbaqp)8!ypB3U) z&GOo2Skz|ug4qMPcw)6Yzn3|@c^1>EOMeE-XHKuAVn|n#b7Z5O8ERaD_;t&#aR_!G zG$RDdKCXi-2XOVwTIr{gtXnyhF|vtM(0uWNflQm)o64#Z!XiD0N(jL((wlmgb?85?AG zDr++%mJ>qEDJ`jg)3UH?y zuG%yAES1AXzf4wK-%k5+-Dw$Ni$$;v9*J@wi}S`hz!sNCH++-)#r41;)CJclPwIL$ zC$MJ*zP&T>=oCvxNeVtWp=6fk8k&sdqk9wGF^S){{ESu!ZlqRrz$P~U+x#H%#+9<= z*+~i}mEqVS6c3Tbs%sD}WPJ)Q4rXMW3p-jVSpEm@H2e#rBbt!i+Jmr83XaRBw>$#7 zp7I>^ik9(CHOvorc9a8qhiIAwT2MT+tGrR~@=9K|SD&A!p=({-Q(W=Pb;mi+S)M&l z?DC!PXy+y5V~}S@KfH^A@ahRy9pr>r>aeF@Bw+aOqNGrpTsisPW;=seKSG1^yI` zE@q8tKA+mm%8hf_duR>M-&|$afn{vnJ)fhe*05#wEDoPq$&qtw*mHa-+m9|{_nB2} zJGGpR;@@&|1?vti?W7pB2Ci!m0y#h`pGLQP@&^*qKtn#)vdOMMwmCBgvK~(fB zW#Q84G;wHvOPnh)G8Y1~{qRlmz$e`Ue<{x=&l`^%H(ayjy_4roNT*PO<&fi(?Sn(C zBdMKJu#xAoj^+0(-?WGe7mjh^(s8EAv+0uLW&E;2?czIj3#ERZgCUzkTVD!Cc4FO` zO_Yu3Ny&h2K^Pmx`iG4HqfI_XXY)NPRE|@__X;K zIH&rMJ-o=U)$b|u%C~PKZapG#=o%>NS`-!qu0-{eLt30YLnaU8!u8`EJGP58tLAaw z&{ihP{&f88;S8GCn~F)jSh8mpi}%iA_O{8)+%c2oBJcVgv)OfUK5GuoWbU2`tU0}i zt!LJA;>)Ux}moLnmhIIra@kFk|t!a zll^2$zOIY96I2$AZHBdsV=yksjxz3!gvHgTzOM8rqnALd8f z&TU9ci)X-)ezff%<#g-7+y&B~oeRjxOQwBC1=j~qT2@5Gpx%`ADrV5&K2%l@pmm#U zViN$(Kr+9==_F;09#_qf%6_zNm&3$KqvV~{hmvj`=`HiHdubbbB+qrMm#opY*!nvXn;nN| zm=B@JVWhRsB(J!T`1~Z&i!w>&(YK z-_bn9j?S}s(0}z%M(mhCZlKC^yp zk122M{?{~927Q***0^Cm{3l>sT_pv;71&lVT*C@>E5L06_Zgm!o3z2z z0RL;qsao2kp!`s2gOGydYKBF@bdTyZTx7n5jV-{oT+Z^c&+IX-H}_uOGHjM#xpR># z*De}1$rUJ9&GK6}Zq|?iiVI0vZJXtW9rGJE{wn<%fL@!F=Wk&7-{?O>AH7$tAS6nb%;+cW#JUkBk3oySSXA4xe+vx)JO=CNe+g z^^N1adw+o^?=QlQ-8}Sb%H6tOLYMJyO5}OgAtxo%m2POyvHNJFnjI^v55$|MVfxpFQI3+sE8}cC`j9-!PR; z7Tk5?yh$rwG`Hqr-G-dDYQ>3`jkwpMt^sKA^%vav_-igY$Mc|b74ODRmGNCC z^{jyTLpfRR4;*Rm4X>v!;lYU;vY_4P|V*@~ump zyCyPU+Q;eiSk5%A%j?G9^X#jC;YE`_@vQFec=`L^@cy$ez`>cbNnv#BA)B+ovXSVQ zL}FzDNn<+^GqEfF<2vF!rUSuaIuSp%gqZ%V4Xw0T**F+B%&XD}7@kJx2suQJ%p`bd z76C(Y49(M!>HqTh=wquk?0mDSd6j z$-34Iw`@UzO+#GVtZC`(f^|SJcHV(FI=JHL;E0=(1r`?d_|xZq;`d*C!XLi;ls|v- zg<)I#^B=zBlkdOgPhWp-Xn=qG?U(%XCx7C9{^@u8nN-XCyT(oUPRjV_FF)gde)VUZ z<^|Fs+Z&5~A48-3XP{h2O|KXr zd51un7kC+9l2u24TzW(p8suv8%)VPF&OM`y%R=1cK439WPs&rvwYR!ku07sWi70da{C)L%g-EMCX3Y- z4s4jtl%d@WGc2g_?U=XVoR&wvM ztg#=?vSGzg##ZMWp!t%8gPA(DFC#|xA~h$5Cf1GlvdMQigt`%w9l>YT-_kh95+CWK z=7~w=j?6N$<3!+Kxl1^%ICK(dWEGs0cO#;4Y!6bHuhUuyM_5Z+(K$#!eu0$6l;$E7DU9U*2dWX=wSmr`S z60W6@xOSEUbPs7)tP@>_6?5d)Va`1{%fyxA`R7Kz#V*;299hTw%c8I=^2Vh!824^U zp?IndL3y^k%OVZ(P{6xbo~xn|ygP)^D5M2>vX-tsyqfZ1-Es7@qK?hicxC$#R2+qC zQ4mh@>{)j3qgh)o!(@`qQ|k;*0@_9pkP$$)AzfItZ4u+94rT4e1$69Hz(;jHqET#1 z?9$z_P4UFPL%huUC|NJu@XxTLf2JcdoxkE@Bbifwk$1qCpK$euFIno`m=2a-v0>sM z##MA<)x2>mm^+FkD<|`D{ePiRKr$;-?TxDUp9qd(}y!|);J2f6tMO17Q(Wl_@@Sc#3sqp z0Lxotd(kS-OZqL$Ff-Ls);rY%)60!hhP1~!I|SE2XC_P<&e@X(7(ad}Yql&WI3pCt zWN*TXlksgEibtWWiv{v-X%~Q3rx0Te^wvu-rQJSKwo8Ez5#8blD~cwmIF&~3jrgqj z=hDulvcG%InRAC(e_$Q9(T=#Z3B*9<(=$f-UwBUAHW}E+^ynVi0PAsUE2U$^_Mg{ z*JX}6lmy8^FNN=unvyjlpRE4bbnM@Td#|o>>DqC&ZePX4>nADh(~*=8i3Dc{ViReF zLxMG~=}!2z@gcl>EHT~ViI%=gDG4E_XNWx0K1B72CbB${wB7|25A05mhZ}=?cc*+r zH@0t{#*A=pHZ`on19_LeuKxwQ9qKZ_D1ge%JxE+wKt^>216K?rVoW+glQJk=*B$Sw zFbWs7XTqf^gilB!dsz`_a|($bm%`BFW3cLC&wuy)4TJVo(`8u+gLVvI%ge0{-#UzS z*VnTD;U3nUTt%h4cZ#dKP$th|PEk6!9WzMDmqTb`AnC0W$?ud&N^T5;M)W4XeHuOb zb~NnOuUJ2qth`tjEt|@6c}EW&-it2X3Q5d}ps-yUQ)Z85^Y#_YT{4A!@=O&;+TIN(jFrH~L7i1lEPxdk1pFXLw#eo0;s|_NW^fQnrq~Km{kkI7SII|oREL1SCHfU|~nY^{h%%glNhe;Zzq&!+z?Kmx8 zL1isp<5eCFE8uB@kQ#6LRc6hjai$z5X`BgOYJLT*m9!ttGR$<-uW7YG&)Vs=`OJ8; z4l|$Dqg1;bm0!nC>(;Q@22*~M*W@?TOfuVJ_E+uk(R8g(`^)S%vn=&%owa$*c5AvR z>o4P#)USE8E=||4lKQp0+GU#as5aG>QS<#;o7B~K<=3$CYd$lNrtA2d@wG{LOqtDJ zQfQnx78G3zr)}Az1FvKMsch@&9G*^4h$=M!%M)HvLCndF?n2oBU?H z2`n4!`@aw@|0OW~%RIHizXq0@alc0TOL?2Bbb}m+%3fFcMNOi(Nx!%bPQbY`0oUPD z?{Fz+xRg0u`cvLzs?qLNnQq*>7BVWIpkdkg56!5d$}B^{N-ynHFg9z> zi=g-90X%wtkGoHA8KzjSUcY33;R=+i&GNs2<$t69Tj(S1zkr9&gdW19`wa5;gsYd} z{!?DQc*gxlM|rkuE*o35;!5KdJo2%EZt0v$59d^BG`C|T*;KbKhplX2%vgB!l1sOr z@bEUgy^CR9V6`;w=Top z?HsbS=2U%KC>aVDAMozVU4FcK&(J96vG6^S7V4#&Po&@1PGxuV?>X>8a~L*F%6`D( zXZQK=MA9GKf>rBS?;F6fKmI)@TQ=ZoP6s%3g%|H0@j^droZif-f;gT>hj6P|3r>Cd zJ$LIi<;Rv5T=?`ePBm`Do;vk;=x7N(cHH~oV_v(;n6Eo11M{38PaNXu*{wXju!2{s zE4koYhm#f!Vc8ZQoxI2OdoMUGi^|z6XSj0Z)c+A!e)jrJE?m0E-CGyABx$cUEo58M zhCKeE4nNlaiU*(k4;j0EciZ?C?ODIYvs*4IO~7u&+xi*Lv7` zIbh}CiM?kq4lV&W+BoCk?0}1_13|_Ta1fA zn>VIjOG#_d!~o2{Y1oLb8#UmczW9{i)%}8?yd=h~n@f`jXBtF`?Ad-;|D;W8Ul@Wz zL6`xS+hzx1ndOURzCYG&0rB-eIXwk+C+s;7-Q100~ z7H0)Zx`*M?GXhurNmqF!PMrhr?ktc$-m_F11%U3TL z#iDuD%$;4yQt>aGTgjYR!)-2=vp?*+M{6kqB&Ittywni-4<8G!HsX>B)$lGYRXHL2$neQpR*LOt9F> zT=3|fjC&v1T$jfiV7YBcWR3lD)hh2LhlehaL=DJc)%6{0y}6g&cMfvy)n$%9KEvLd zhvk)Zha*qUvi9sYcHB73rT4elb@dSY@1J7FlhbT@bb>8+j<8+QmLJ)`YBk+*WFw0Y zuVbQKx_I*-Q}!)m!mdS35}LYu30tloWbf0nWQ{J7c^hGvmay#>f_2YW0=q`iC&!QF z9*ucY=eInn`_C-$`hn6^SK>M(;@%?@o8FPM>=R6j9)Wnsp~I<1B#tuogSyLlRuIgv zC8OANZ7*k^pJVUsgTxdkW0~qgSYJ7abPva_G#IB|5jd2FVBb9$o8kbhisf1C>M#8h zXgpi`OAYJR-n2+@AfPCm#Ih7-Zl1w>rFGNsO?1N}%af39F}N4W!Bpmq38; zW_uA>5{*xEbIQY;vDd9WPa1#D^WXhFZ@>8q*BqO$Da?sk9n;B)^kC-5zHC@Ijb*DQ z;~HvBqktyT7qPf>i=s(8A8g8EaFl1nqC=3ODU&|D6P|@(PND@1x(LIt38YC)zMq;a(CX>y|6tvaTC*Mdo;-yt`xNy&Bpng5k@CV;$6r z8OtZ|ipO$*y3MqeQ?ZYB!6m~F|Kd1Ygin8Aqixh*8F}`OrbS0*631ubQ0PK_RRP_H zcVX|TZM^#NArGJ5Z+SV#V1_bGO1j*QnrELnh`R1B&dFsxJt}JR%mj~Z}3Jt$z`=|fF zoe>>Ks|+G-O-G{2!e}!*m+0|X1WrgJYe73AM#j=^VS6eLRLbEokb(^*#7@f~dqEr8 zuIxh6)J$4+vFA5|zmxZw7xQnvk`cZL#dJ-(2Ltsr6jAwV%y<7jf+T7S3JY z!c-@!GsOfkI!KwPs}B4 zN`dSHLr5E+OISq|;R7N`8kR`RKzVoc3n8MP>`gj38en;7w;)n_C$Zzwb}Zek@Cgba zI4B%{zYzRQ`QsU*oiXjWc=7GR!#jD=EL$^~-pZ z%y=!^j5Foayh)*s)}ykUb!k}B&Gwk-zvNNB_KlXWu7Zq1CYfM*ZPGk?si&H6QGP>PycW=|fVuK%UM*YeQ@^HZp3smeVq#?- zik13P;t5Cy!!I*}gx&=PSpFZGVX3WIZi3||{WAP(^lJclZPGG+t(>2EegeO11K?)Z z1j|i-Z8G^yV7WHfTpKK}4KDvzsCN1P75e|?1)nBZZd;v!lepS1?rLU5`qe|yTx8#% zAhz9*IBY884A9(tR3>i2GYqg?fpyQyB)sH3r{K4{_+6z=x2iO}M&}SPv8~9R_OmRW zqp}E^m`{Mb16_v3W7#Lf0Lop4NxOzhUrRk&mwjbCPExM|=C#3c_v$npE8+T;4yDhYx?OUhI#v70|p2C~`Fs+D7 z-+aQ^Z!KWgUDWLP(?@st@Z)`H&vo>&$Ok?Rxlr#@o|I02^YHHFTOPc5z`N%U;n{t7 zb%!@1^W(Q~c=-Mi&))5ob}ZmR<1e`TO;e~|4VR^hUcKS*>noDBl2ZwG9BW#iSH9t} zXdA2&+Pn&O=;fYz+2=agBJR3{FntIQ?0(?7YPV-(!OG3B_ZV#3Dtzl}XtVHcSShp& z2A6QnvN1=$Zv~_0OS_*S(i)mv4Bf>4gPs>3l)SGXVp^Y}G4 z&mZOf?E}1gu$?z+hHFTh{qlSG+P*rnVrJCIm20X zaSLNMPor$!U{Z&7Fg6Dv<>`cVPbI8PEPx-igin`e2^Jl(@^Z3_ZxOoin78NjYfhX}m8C*of!FOL%0@C?ks zqbQOeLM^H5)0{>gEwJ>oGcIs)bhO9A+1&uky*zyJ6moX=z}C$bD;H;MU2F*ow5Pzn z2`d{~aIl39GprlZ&h{%@JieuY`wv)oJ7ec6d7b3NWFLr~y$epBPB^)>ph5Gm_@96L zM*|H1?PnkVtTC<{4egD`4J0 z{Ph|&G{AE6vd_jXYc32m0rUDTni{T}Vfo~{?~ThnfA`Iod}Yy)RE1Y32@CnCD{)R8BXI5d9n$b%uS-frn%a@K}+v=&z9n;4! z!?J98C2JRrVcDXQEL=F8h0Dh>cTp8f7WL=w)H3d7M{=}j9S%D+<7&@b*3T5~^AUiyDyH^f!G>wXw+Y8C)|Np zkbZV6iohY$oBRQ7a13{#O=&jU53gm(hFO#h>dHrd`fvDmPr*kvR1B@5_@V9bY$pfJl5~9JJ)zHD^}-R%-8GNF za|iLM%_lSuYleRtIY@VqwXC&2jslNkT--W_8fh_oa)dvY zrondnx%t<0uj<2%7q=NQc_>l&anyBdTyyzomJjY7Wz8#!p_ROI?DZpIpCpu-J!>3ym9&H1ODo&z9RcAtS!`XUl3$NZhWa;ubIEOe9)*%KzS%Y;h z+LVRhGB6tV0g>421%{Prv`Vw5%Y<$O7lu+bubNq#<}hjb6eg~mjAN_|f3p6RlmXcU zl}2G%;6|j3X{(NIIQI<3t*^X)`^k7#X5c?i)~@1E<1*&ZUWueuWRlP$iH|=2h@EFQ zaqsOlUdf!Dwq`2cnf?THh$5m_IsrXXh?Krou-rrDy00AYgNMt3v8yXl1LNp9uNRr6 zDF#rhn(49&<;jl^$m=fs6l{ZcUI3rCevL7p$f+}R)5b`MxB5ZIZ!K37T zG9rS|NtpzV%_UgYhmg)0)cy2RM)WG@%)JwwxV)8a;f@UX{`Wj?{w=S+_!sUs{D$K> z0SsQz3C~HfWDZIurb{qMQwoTgnMeBcJQ7AFQo6c3!;g=`wK|xzRUJr}olWA5OuFyr zL%UU7=(D#1r!qIbN&J>^C&%O1(UGr1Wj~PbM7=^`!TU5A&jZT|xHpOF3SV@^(=T0fj)&o?k@|77EG(>+)AvGw?N7Hwa`ii4|} zwsR&UHjHNSo+*^i?aAyTbC|Y&Dkam48NRlP0gL(?G%{5P#-foi-bve_zjLBeqs(0Ba(3~^CfkB z7I9T^#0-umdO!pby+erX8%$_#e_T7-8(?{07eAs)BH46iBaLhuX z$#WUvk8ij?AwL0?3gRmGW`c+c04h+ZfS|f2C}@&~HQogCOd!z&6BY1NJ_Y!+OcTgd zuusG4YS>KEI@MKv6HwK#%4U|Kd47$|dd>2bG_0~|`mceGW|?L_O*7kBJ5Kw>EW@nN z^qU_T6d1l*g1!%Q54%Jmu3gtw+ny zbd^ELluunHbKGi^DW8^QlIBq|>s1~NYnsWgVYAJqyk>pMqkgkI^=lrD*S4DT;@3#q zpk&r>_Pf@lcK~RbDTBso9q#{}Fpt#&&#&6L5E&+Jp>)v$i_QB7|(jiR8pX|KFC zSZflU35@?5{S7St z8~tbKBkt4!%Y~}t<-z3(yncR<2k%r{`zqYI$mP5;-n1`=aY8e@!svVms?Y6j{+^5W z_2J+a$$y;}&u;Pd{VRC(7Oq``^V@jcE}lpA8iH>;Tz?IBU%;&kQtoNEE#=Fk=9-!; zInI+vXAU;|jHg3}NM4D12yY+!2v48#^43+w!+G~!{$E=Ub9(cnUR~bX1i_k%7#D{= zc*)xvm!%G=`}SEL2Dac#(=WN#YpiU@-|^InLMmd-oNDe z`v?5^em`7V$fc%VaJz03s9J*BXTSI3TONIoGOw)WM4}yg>U_nmmiC-!WXaKHt=MhZ zh%I*YSm)4$b@t8KWYda0mJPVn>SM0`@IQD`|6}ep_>L1zny}l(hNafcSnFlWI%i8Z zyI8Z*t~opHnsBk%7u;$19hbhhm%0~7#jiQ@TCX^L&SUQLL@ybAEq%9h3YVj;x!<@R z=f0DAeLP|PT$onOL64{@PmG<&V;v%%3p z`t1#`q+5@iJ;n7qCwOyjCoksp<#gkZIsM(Y$O(n_hwjUCc+QP;*ST`)GIuV^LUZZj zzX8k7-um~!@==~OVEO&?HDLM8t5bN={fha`D^xTxr^n8*Ua{iFD#& zr$jys>kjiLz&088Bl~!I;-j;rOAjh-ELQf64EB*&OlHPhM2kxgle*e%g^KLL+ORw%`;l=Gt-@jB2UJIGLZ5|W1%wf#>=~OKr&!9!47`%8i6$?kw zYvvHTjO#_`u{|lDK8OMHhZ}K404(w5&5;P@5RKJ}^R*#s+Z zSK;@<(;*Oddp~TQTygYq!Op!U-#7l8|Mr{zm%snrKl6`&{2l-B`+wm#fBL;)UPVbS z@civ3e>VJT&;0ww4QOIzK}&lZTG&||V7Z00l>v}9YSx@)7A*~}azoSHsuj&FEeycC ziA4*VwrXkkRoh$v^zR$g-iI2gfZ8V-8q6|RIwPU#9dUTG$yCfRl9*OvuC*miEeRYHS zrV`vQ&A8xAZJl{`k0PK~0wFzxdc_giC&{o^u0Tyv?_{Q~8qKQB(^$QH47+7a7f$ZW z%GpC$JaaJ17Ys8%;n_1QnK7rD*>eW6W=<%_D>ykY zI;sN+19AxJ5P@H|KY7I|tX@0S0L%C7Siov&qk`nCmyR|r^;{+@6b5`?7XXRgGr(vPo=OK2>NUE0!u) zK7j3ONAdiotV^#?uxf5UMi0podB(7Q)fi^Z97NT~o@BO7p{0in-pO+4Y@f-@eQWV- z6Hk*^H{9BUVU_8LZJwVocig*16VgA^_%(=ShoG8EJbNZ$+ckoGd0(u3eT=D>*AXW5 z*mVjs?3z1v3a50*P*z;s#=N5|SbTI9W2Iku%d~9hY5ZSxn2K{y!`H;*<<|;W5aC8Xs4ifDz<&1 zY1KOvt3Hvm=q}Gzk8u14q~Y8-jF#!{%e+ZxXHlS&Si(xiOfpweS zQCRc{p+#|k0g&5E*tx%KsQbklV5?rhqu_l+RW@NVw*qAT1a=O`E7ymFl6aDfD>?=0*zlfxR*s^q4v+^+0we7)i~3B>4Cl&*SbGIyD>c-i8^iLm=+CSg8 zl-9Mqw6#!V>k=a}MjK{W9OYSW-r5`Ic0tTKxQN7}cm|K}$MyqjnY>^egQr&V4>BiW z`?SWseI(8zi~eFl$xbhbEeXY$=_&{B@-&J@mJlIpum1k- zHBY#5=PbU-emEq#6W%igi?-f)%K^JZS6`a8cO^^?Rap}{7$#ogd!^!>=0S(5BBpJa z&Vrqb8L@B-UpdslD#npEqdVc$+6UXVUYwRUa-baeJo-l)m(ePD4UCtyDhaF30md&E z0%g7=Rb)^yse~p0jVT}7P2SxPWZQR#SsSPGx$T#D=J}J*KO6t3b&#&6hPI+K$u#*)oWTl zBmEB_ajM~G(C|y1e*Y=EJR7lb{}7@k$g|xugcx}ylg4I~y|5EWQ?rQ~9nYWxgIW1* zEh+Q!Nm@`q-inSyj89=@Vd3_P^cdEfq0@V?V$XC&&F)Rr)KdD%x<6`GFD5S@ z#PF#-7&EK40iF*URm6Z{?HDX>)#%Ptk1sadvVl32%Um8cr3WMB9oVrn!3YnLvF+Y3 zlXfMsl=Mlbb!S=cx~EavuYlCNU4e+pDTI*=<7^JH02v zrj!xa+Lyp=H!}Lf;a%uNa@PR*l_%57x&e2Z*>U`v@9FFFEeV;8am#2)%a|5~<%HrL z=Z!_EHLiIwzp`CumTZZ2mK}A&>JcMlg>(Rd}}d#b2J2F9N@zZd_w}tQkPapjfhJbs%(jGA@0BNSvHU;>0X` z`-c)$6)*E9h}g<_(nrfXxIDCwc<4r))1QlxodnU-JVG|fM!%8OTR~wKt z^Zhbx)>S)iZO~9NNY zIYJGMV(n-DfEo}tDEO!G71<1%_mZv`#Tw}W(tklRMj6|2C!UX|J!Ad>|ylX zDdb!sdm#xM0J#Fw;u@D{4otwIBEbN+4Y2yJxxWChl~jw`bhS*AlwZjN%9ZEe1IvvI zFl*T*|21&g1dY{IO>2!aKMJU;VKe^MT(z(L?~%#-*T|IRuTgD2Q-19iQ{()X?WtX+ z$^X|#?T_14r(r)V-Owzr0n2MN%T;4s!E!Z|Vwgw~a#bzxYW)CF^AW^*L?#~cK69^* z#ic41$DuJe4^PB(teh9e=ioXn8(Yb*WG{IYELZJxElV}Y6&zR7D^5~|)}b2ara6|H z^mvg|+w!lP<-Y{WyA1Enji*-(d*$b^pW(u#vxauLg5^qo1IzzL|F_UbJbYE7>iyt} zVTNTukPF;8$-8H_dHVVxPwrhn{u#EmxqJgYNciDS7}b+I4Zh$+(=TA!aJYU+_#VRj zn{eb9Y&-(Hg|^S&eU1mO>VE@a$*@iGZ#n_1*1+MtuzUraI|FMLz@qWo_qO1GMFXyt z4i!150l;6v(;we+{@FclycWOOSeFAHGlq){KXB>$7O+p4MLcf55&5(&*9{xk*MlrL z-t;S;mn-=G0C@^{_*xEQZ|?Bmy^tKr?!3Lrqc?APr59tqI4XQAIn|;r=Nh)+{qRLn zmi)ba$?KO_;N&XK2HSA9ZbKegIB=kOBeq)AWwUi1Hrdo=y-fpF+qPthodauZT5`hX z&s=W!cRcywFWmh8OAfaDfxTYVta5403b$q~w{6HO$EM74YRCrH23%gU{?? z;7Zh*%z32k(zq*J?ukyjrnJ#&aK>koj{|+~fQBaPkoEP9Nv> znNvKyaF%;lE^+;aE|{0OeD?~M?_V|O+TE+hP04E4>bj)ezI($6U%4$jl6LvtHO}3> z#E~nf*mLF}htD78$b~~3y?FR%((vK)2RU@^0Q*nx<>b}loWFgRy(f1|8&C7#%{}6> zVzBXUg?ExGE-_BHM}^=UpNwa8EH*wqv~aP<-q{I%Cm+1++_7_a!oklGcW*1)+${~Q zhg4@5#x`xt?pCeXZ|TI$M$Ku{v>}m>7I=6&VCC(It&cl4Zmu{uI^*KvhMTuL&c3b^ zXG;rv3!1iSjsB;x*^Dp0{(=S~ z>u)~(9rZ068@BSIvl9tQiNGbw7w1SH+~fU?o7tV>eQ}J_3+BABjq$=J+Ed6It7s1_ zqMWdZcfmT@1N(I0$?(N4-O~tLCb<||skO;I!^Q08 zPoWXB2QhEqF!pSo#;(=lST?&qi|6)d{+#}-m++iv6|7h=mX&kIvV7`5cF!thM_XTR zw)~chExzSIzf9II=*yDX6)c-Gl=ZVK**Le7)r*E2VE9twQqa*XnJHn3Up8k5D;8F< zcG*al&KtsVq3!D?!kY{1-Y|s;Rh?Nnd$7SbYjSULF_zHMRO6Qt!F|#R>6cAdMGm2Za}A(ZU8SHw*#uT(85CS0Jdze(nQxH# zmEwoDBXmF(er2+$?vqJKk7S~x+^(a$vTDOL)~_7Tfn5rgk7nuoYUa%xfL?&A;Qx~O zmC{yibCsbjzjDbi!`1MTMI#Lp5nC6G=kDk-4mo{q{2GLBe{Yy$Iql=frO89suy7Ph zmW*N1qEW1wJB)R6hq7W(CCe8NX3LstUfkINZ;!KJa(8Bo>&)g=BaObCGh-k#g+DPX z6t{4B&SJgr&WU8*jYGusYfqy@5A528VE>b?do`!xR2*fPUr}->jx;X#wCf@Vs=nz| z?U~8&y|dZ%_6)zWE9E%UE;n?HzOy4x01-nu5uLQa+o9;K1SA*hwK&!LxWSbNH5w^y9;D+9F^t{}CVK(T2b zfMsictlIiv+0GxEPQloBi!d~h9fa)5YP65-OT&I94LkLSFw7jel}8zXrn_oocL~9{ zLjZOKURY*2(<0f9Ch=Cdx0l12$l+HSV|?WDkpB1V9)nkDtl`%<)mDy@Ijmrqe0(&xOhtS`tY_M>+U*mi4EnKh}K%u`Cb6 zva7VaLlT}H(}*d}G(g^V!@AIETsK^^ycxc3JWI~5<@eY(aP7tVSWhTxXv$C6{KDH&f*)w0o?e0z~UJAFfZ|7@cy zk7DVk9{N!s8Y}5XV-9zg@o5`u*i_benANX<3vVt{J%1QmE^L?W&@(>z_U{SqoIqr+ zEJF_ch-Q*Q_Zm{avy7W}51AKw0c(3Xh)Y{C2j=6N=E>aM^JV9Ams5{U8E$;HRIC!6 zNFJ1rL)!oYkk()IsO#M$hJ>Mc_;d;*qI)8(V(n-ZX+yth16d|>w%_;x)N!nbO@uw2 zMt3K)ODt9yE?nk5EpuIo8lsOSc^qNVh6$S|QQx~B zA%#J#Il7!<_YbjT?*i(1{2=nW(_wUH0=q^LEYEZJz%+vUClk~!fv|q@_>}|^CUbVr zqupfoOJmfEVVr&@`xMzRtvt3I?_3`oGhK-7D+k2lQ2cvE5haJqfPwKOPHIEM=xlrk z#S&aC=@l^s00=?%zPKMfx{#>q0^+LL$=>Teu5mIiW{&2GY(~%AJID07fc>e9j9I^V0sihv2jEyE?a1{B|I+8dvo7`y~h@O^??H~_E-kiYj3!@3Giloi_ z4iqeDPu!Gbx@_uB;nH?w&dq1Y;c8khY|pTR!RNAB$4#)mUJ=Qf9~Zsq!`Q@j$cTQAS>THH56Pq`+o zxWzm1zm`$@k(;u^yv7IVu@ABld?Wq#qvU^Qgl`%CH{!lF`0n!j!&RQVyUbgOfBoZi zUWxzV(^CfDORjR^?tZR5Im*Ec>t)M*KxiK`SB+xnwke!>cz_`@doq6IFt%S?#l)?B z=)0gJeHRX3Z0}ASu=V6@gJ!JosmF|NK6H^ocgBz`!xnnml6?HTMjB&f+s#+jcA2AH z1LgS)GRUKYFIJhd7b9)AGmAyi)GZtw!Sftv~IL^YLq(Pa?JUO36DJ^M| zZHZ%NPuk4uLf*^{gjB{+Fs~DN((h5DQc0eiXT*h9Cz3cOljvcIB#q4?WlR?SJ%R}? zlR4ER2+v|K5-St%mGvf|eIQ#eZQ~0$dt|rEHGnez0C|@DgA64G2X9xR)8g>(@iqWE z1?v=yGl4=AkW_Ha1o_l8!ABDiR8qh4sbAAf@KocqEEB{u0Yl}}@=ajU1P9G@vkXl$ z=%T(tuo9ba=XqLRkPCngZ! zCw=Y{NJ?ZpK5kxQre_fuRReq~Fc}>aCp^;EK0zc!Cy^MHNQl3*DM$U6iriCpKBdAQ|sFVwAHUbxPIhF&CH^pZ9Bu&G$qv(SI|5rA<+oyoHVu3 z6jx-O$K zXwg3stHE)2O~}K#LiUQ|a*R3}^$a%hwj2Y)o~w5B&lgt?QO)&ugX|43UiNR5HGQLLwiR($ z4~Q{bGtDIBQ8F*XR5F3_|0<~sas}Vj?^2nJr}V3W;9kQs3>)D(e&z+7I##Mxu4DK! zNt@hc-=pL%W2H9EweMX=)R6X{_P0Sl$^3IU!msl}^XhnNd0Lmsp?*)1!AKWgr$GsZ zi5I1?iEWHuwR)AsP%^5_0L#?`i)xl%ynN1}%a<+~Hp~Abu>88(Hvf01#!Sm!r|Z|R z8z8y5w{G1sK=PL_U-DFybH)8N(DZNg|DW{HyC-kq(Hpq;1RmU_U$7J0KFRwh_jsY; z@%xv&exUZa-^#}M4Ue83hD#ecY-7RchK;$=ItTV|hgYxRwa}p*ERKm_v1=$REp6G* z?0<5;)!*~3-ltst{ihsk6~G$X5Y{`nvdpSE>ztigXJ^TpMt|Xy^_N_4_8F&aoAYkM z0yz7U_h+B+^wtYGBEII%kB@l%Lc#E7aOVOHFXLu|Kl7|rW0<-a=4@hneh)^=3*_wd z(ZX}c0Lu@z_==~!2EzHf@bo2*Uq0ooUaI;2G53Fb$i3GOdG_)H@1Ln1ms4BcH~yW7QAu~h7$+jqV&l{aW4p+6aRTB{=o6-Q?cQ%Y3+hTH3LcCtbZcU(b%G(Vb*W zPs>417M(XQc>h8gbbBY)3xhfN_4gdJ43N6t^BB1C4(>j>!;hy{@?lgvF4g%XSDQDN zb{yi#nVUS4_T9U5jB7WZbN2ibZeF_iGgyA^#(w~opZWmulx|(Q!tJY9xphqzL|IVvG6*GIP>n_Pr?8o(Kj*n}`J&-! zoG!#?PM_rHkpmn&u$x1Nb{TZ|aE<@q!JX`vIlXV+Hg@jZ$hK|k*tKgD8#k_G&z>zt ze9M*%`M&NaL?!tW7~@Sqj2z?>GVqI)m#SX~*6yx2xw+!!?1{INJC5$o23YRsXM>x& z1+k8Hl*kERueWTXWCN?4RB=`N#78!PwvG;lITZ!CTUfR-?2+3@xk^@cw#H?is#UI< z>dh@}sMoj|bsMTyxoViVl6)34Y}$-gR+hMXdeF3aGc1L_PMz=g;)~C4aIoV~AOD`L z!Yt;mUTA!%I41LW*`^gNSi6`d8<#VG{Ss!cUcjt13z)fjKGRmsW9rJeOkO#MDJ$kM zY2{1?&8{{ys{2hJLiwbA6pt#WU1eu-`?e*sS3ddu+mk<_oe|FI+nVg&t&RAM@_fVA za8f}e`6Y5lX&XsQuS}9E3dkMQno0AkSukfP+n0}JznWv2H;~oKt5~#XFiV#VW9Gzu z%$qovwX?>seac{tk8H=&~V)B3Y;Mt=hgUpi+H>z9t=_`Ze4uRu1h8q4I7C2U18^lrLRS`4d<^l$A@WShcj;pk>R( zFnifFHZPdS!;z&NxBH5B-~I!9{mEl)V$T&z zhOlPIK<-~#3vZ6Gcv=~=CKR(_xyT@Ws$lt)X%*zOmCbad3s!-)M0HMM+ualR6s6E2 z-49P`mq+(FgWO8vaP3~Bh3{MvZIFHEaKZ=W;#?F?RKILWW)EQB%hL?sFbT&TIRN&Q zzUh@hkn~OIyg@8Dxf=iWk&M|oo$InK1 zRvli)#*-TvHfK0nPwr*&~Si?L|@A#UuvM2)> zH(ggLLoZKs6W6UrB!0c+z$g5{{Zb5oGEjfLpclrL$N|4gC|=!S4DzYvdP={m?Q!?6 zkpz~@0i;tHzA`QfCR^os{TyzR?u=_!wT&K$ea|@TN=5cg;kdO6HJ;~?E+SKxK&-p_ zVp;A^U?(R^6RcS3+Kk)ZH-x`@XY|dzR&|(a@d<@4UlWt#j(x5hRvFI3_DLnGo2-i^ z0l1X=;@CeJr~c76^;FX&X?S-@Cx2uyeHT^Yn&-!VZ~j~Ag}0<(v=yKF{D5Pd00Zb( zz~5Evf{Wa)T_bQSmVPRcJ`>W955@-w?GFiiN}D}9hT+~O2sfEGxkKCGoTHbZ#?oa* zZ@v#}PUL`09NGsN0J}}6P{XdielSqr+gtct+63d-HjKo+IrNq1Z}p|EbeYtXksBr( zzkK-Gry&vDlMN7GWl=dyu-qh#Q_>GFD!YR7ex0MpscJ`@Jp0RJo}YYmmW@}oapuQM zMtqATM}lMx(KdLfR(^*de9IH$`A8zVA{!r(ulM3gnnqh2A1b?!?Jnzg6(bgorrqF9 zSVhP?ZE8PqD%;{9<9teryiTd6;Oa$rgsnqyqDnKQJI ze{A;8WcJTy{lyKeKevwY>&D@l?nYQq1WA39?a750M7q-ld6Sdx%680QSa`P>1)p>4@<7r|D0Ff z|Ali+{>0K;D~48wlQ=Yz?0H>CsLYab@`#_GhxgP-%Fk3V{K^>8CuWg4I+c{k=|oM4 zrStj{(r0HAHz~!iX`VeRpC0SW8FhFJt!K2R|JpwET-<}==^g1izdL2qJ27ZM8MAjy zpvSoO^qJCy1-m9wHnxMTEhCw~bt3)7bz#=((QH4lf;lV48kg6u+cB5r8>g{m%N#cC zn8$%5D>;2`BS%ljd^od_Gv~K(=E7EP-#^0j+lRRO@C5I<&Bg0`dH&`quRq*0Y?ik=3?hCPiMv(Nrp?hMUf=iX6_-!g)8w~jGzTz_&Vb!N`< z^%Sh=POqI+l&={`+2X$RT{(z~byfey-)2$~-RAeC%j{A*&Fp4S!T9#156h)|Nk0}{ zUrBUTGAWbth#QkZ;rz~IPH$s?;yJV0lQbcRh+#>FYl7vmqtgkilDRS>h1g*-_he2- z^@}5#$uM9Oow^V%-Hv-qBNB^^jkNi#0u3k(Y5H^2Wq_FgXdga;bG zHq`x<0&xl?nxLVQ0)D>)^AzAy;Lim5)Ng`^CLpN5o`QKMxTk(CThlb3lKQnS6WrAL zG^~CT_%!orn(}G7nMdO_-PEvFKwCjrfpm>i?O2U7^Q)^M zxt60Kxf!p1Bag}$5lCok5aID5gvUw0MN8Ww6)>;S?hObD$1h0Q9u|q0pY&aDjroj} zGCaY=;&C(ezXFaA(8SP^!Fz|J(EC@Q$cTQdj~@nZI6QC9zMSKhDYEZEpmoN z7~pAiR6OqPo`!9EduNv#kX**ZBPbYe8MBaxXsIiZn9vv^gTsl4_*anGoCiu~xOTjb zmyVq|ei~FG5v>Yu%Wi|7g z9{~)ozZO7ll7>wXUBU09v~)6a2M4UEHkP$J&) z4vd*zM8mGKzmoM!fomo8`;N}RaZrK*iW{29!rQ7>cn$FS6EJJtH_AwB)mNUwDQ&SF z5KY7KAUr4J(Lh|UiTSvU&ZK#N*@ukHHUM=6Viic$dB)fQzT2H>jYdW@7j zJ!QW#J|8Q2M=P+cV6AD=LjiaNu@xv+AYJ3MZuP6Hptk3jY{ONM+jl~~0ir9=uHdiT z5Xn1G`akxw;C3n?SM& zjH_QiCYWI*6D+R{m>b&n{|?m##(#~>@i5281gW(zwSP^pTuH+Q$gLpxPh`f`j@P^< z)#mxNa?EJqLzyuihq=QwxmH0LhV z(8UYq49)Tz*RI!);yFq;E^|%j%FRm#{SqAiCH)#eUYq^~mj8|Zv-HuMC+~UxT<|8!Z4rmBQ=+BDhSPy zwajs8$SxNuX`WerkJwosL{)(=%9`|VY!cO4f)?6}*+f@hH#aP~H=(=l<9PatFh8spy&1C9G;p;> zwaIs!Zej^LPjUD3O+H*c&x`YN3_f#<%jfTL`_k3_Be4A9#mn5jevP{~Z*b#^ERI6z z*SISe&U5Y3MT4$izVvgtnr=~`TuA|NCG%%HCYkXHj9=1kR zY-jJ@tv{23;R=i^NWNpo1`Zt9VSwZcm}}aRBYO9?E&feJCIpgT)h^v<~Zk|qfy1L=w;Yrf~H#r>H(W_-s7B+6oE(cpySu|rrvqp4m z+L$YP;JxIT~>aq8l3J%`Irytfk?%b#yW|^=6(1jT-Xl=bzC^wb7e5 zrA3QoG-}iUdwW|JFPU$A1wL}}5L6qO z``LYBpFulL>}BV%J#0U|i=C%;%OP6ab9>o!evi;T!`1N4bGzAoMrkM8PVZvtsqI2L z*>Z9ln@?dJ>d2CoZk*$lza%}5t7S9^U`ZZ%& zwtNJO7mi^0{86l&HJp`GhH`4wFiy3LW2>w`2U>i>owniZkhwp1UIhz5T;EXOpo4e2}$(DI>6R2ZL;X-Mr>08ac>iY zZ?W`INdmsz#4Sz2Pd^OwOe3gw2El#gKwF+lLS`U0*E1WR4$+1!YVY<@6b$RaN||dD)=gvn z?j?*{HH95l4;mMGW|S9_Ro>drBu^>HF)n#rvVRS|rwk^&G@tEP4zT^weg@4MLBFY$ zY&y4t4JS9#u75`=XN+dYty2UJXoF>k021WzP?6UFFCZ8OBrY2${ zBwW*8{ix#BRSv0rGmQ^QdJ$=G&s4m+#uzs5RYv_af?n|a^9L9qy%bhS`%%Gt+wM_@ zt6?XjPa+MIQfgwwUC5(d7#1n6I2!k2_!(w`v>)_BWBt{Gb(aw1qlR6H9T|0`*{UW%;ar{=4?iX({X zlZs`!GeI&|_8D%ph_f;5vDb@gNsCNp!Uv`s!JW6_09vC9~Su@w4dIC zW=VF~WVqs#E$d3EH=eRC#dJ%fZcuZQ2NqzJ>5ff-7yUMkrbWIR0Tt4wUJ@@4HMD>z>Gz@u#WabwAZ17{Nkj8U8P$fi zbIb7?kVH_WJl|F6q)li?P(QUHol4tjU9ih@;WOW_iI6s@RA$mBt~vGMni14Dmh_2j zNtxQ7%z0gj7@vo$9Eby|69^a(+dGg(uL$e-Sofg48=)jOH8 zIsHiQpG!>F1jfob5$WB8P4Vs=Y4{i3*Z+bm_5Q%psCta52o`z6NuOUt>iD+AkI5l* zskqCs$=TG7;n&B}Z+iuumlhjlSJLNa(`SEw@|F~mIy;L|=f}}{Sx1W3mooG~HQiTr zXUMh+dM)cguSMM$zjHWawp7w@UJ1Kytz_!PAuQZGmIJreGIK)}8;;Im@A>7-SyRo* z?UOlpel;sMPh`)rCG0x5fNi^Hv-iMagLdqk#lb_1*}h|@?04q;OvjF`V*jD#%wIH| zE!*d?Wce6&>{-mVT?<*ZY9gDq&1KQDu`FFNmRWNvS+sN%3zm#z_WUYlFRW(9!YWp7 znZ~%;1F4!^&a~yj={cf^0Ta8^e{v~3Minu0+bD`Br%S)Kp?GR{O3U)NJ#hr9tebM8 z+1D&<{s&f$%AsOf2d1naNAZ-NW$r?;m4!eTni=|b|bOmZi*p~I}MSCE?Rm*6NBx5(g*ZSZI$=7cYV&F1b93 zU6*$7L(4jJE$u=^S|;f!*@TBg^V{G33BRB~JpFxf^YSz<@>DR-1o;#sR5HOn6Uh4| zu&02X2`(zt4l9oWf+o0V@|fkQ->gUTn3}k?>sG$n;H8oYB${BNg4rgZts2v+8EyjL zrlz^3YuE(96%bcoT(!70pXO0M4J#?H#%n$k9M^DdK;59|D1sxTzUW}WVnYdy2{lZy zs8+cG^;IGIVEqxvlLQ-xfiCLM3 z3^7uMUeuqHo=Z+vKFLYxM8w1s8J9>-ZaxLA3n?gULqbxb0a~iox&odFDK)mHVq@)x>GhBgoFOkznWLC}L*yLoxe2i+d zrzIs57Z+!Mx3$Mj$5O|s_8c+imI-ug*qj&Uc-97qHBIxIAhyY;d9^;1G~S#e%4_ng zED9!T*euKBG3!$vGpuDOpDC|dpDDYNmZ9_7`9Yvxl| z)69NUzZs|L+E&xAGHZF-mnL|vz_!jg9d}dH+yu=P>`qKgGv_(elpN)q8233#N)S)ov#lYx2o^-sr9-h=+tS$N4B zXxB^jgT15h9GHklKiOvuOscu$Q{IiCV+(QU6N62;%>U|4BW%?}o)htFy5F!Ye5x`C z8`m0py(g+t&6MRCW?cNmwUc#KO{l0D5e0dD#^sk{MG|v@fwkZRi7w)Mr0di zUNn!pti>Mk9#>KmFkZ5j2aYeqZ%iJx{bLP&_Ys*!nQB@^{c0M;qMz)MsuXOG!*_IU zP2B_IiJ8>}?~&Qm@9cwnbvo94qiH3355u&KP_xotJcec9KQ^C6-2)8Zylz)dekk_A zWq1l+V{@eJ$e%UgHQfZi6%z53h=9h0=H0aj=^4j!k0C{ct8(97~`p?ow zFQ2{V&9hhh_~^a??pFG{!PP7L_yAO~oO_Spg{GZ_$H(}wqAja`_zNdIgJ8-MNq^4$ zXYaW7=$&ME15Yl%wpnof7@XS*D|&Ia)!*^x>pw%!3fOZRPM(+aqj2*eTskDK0;zg2 z<_sQu{~J#I@G;M)jDtHjc=z;<)PKX!5@+iI9#;-votGm!T)yN)^Z$oe-+#o5@BTYm zzW$QcjqEvO(^q_W_>2## zR{i9)khJsk22M3^Xn^I6UIw?{bNj_T-hQ|Y7guvEusK&7HQ_;QuE_P4YigeTy|BG~ z%k!7dc=Y-i=Xq-Y+#FuP5xW*VZyF2*BjM~L&P$%x(znmAOPw!;ev~eM`GIE-g@3~o zR=4_+GZxm+e}Vy)-xaamJQo4=L%{K%(ktHIx^x?}#+<*C6hUvES=}Jy?apY!$dR%VkBJGgEetgBv8#{S_NBZu- z4DJ@Eao^IKeGP4SzWpfYPG6Bm-s07{(_B7wp1arXap%(I|0A&c+O-=7_wbxggDuXj9B{O-$JWUjM_*@LWMk&)<%g%c58mG1IQu!^n+&%kuuzlBNwhAejzIoRsHtpPK&_?Oc^*cAPZr3`Y zHLTsaR%o^1YFOjf?_Mjk-f%bU*}%rV>)E_t$~v%#tp~TVQzqc3nKkc3H-Exd=jG;k7Kl6Ho1Bl6IV>3dd>(&%pcAC zbu(GHdaAT%1P694G3>a{mHttC4?$uUK4Tzg$hSsJ8jyd4mmif#jRFawc0A zPU6vs5{}z`PK{>yZ@B%P)vN>)e2lw`|OxQAuowpCO{P=oCFQ3Rx zdH-}AUyehzKMB2ZIQQW?T}GDTpBu`o9Se-~kdAQ#71fY``)Jw^FJbNJ%}ic1jYT_` zvUuNWrf!-ieZH8kBYRRfu#*9vN3=^Mu{eu$r?(p*x~6SBw~MqM`Q-FzXZUwqKET{< z3rO#lO{XDctUA9Br>?T;Er}+sG=%Q)mYi^I%A;>S;km3gd#&rzBi)`%*@UKy>P*b2 zVtf=d9Uz;3A$9eDtk;lGxgnUeR_ewr|PFdUbgH#qZ$T-*KQEiwzboR%wOMqdjrbV7Nt|DKcaUp1u(RbQkdTFK!iW|UqnfS|VKz*yy zC@f0CvFtAL$)?|4`p&*2%CLj4?Nh*9ZRqQzpLzjwNUt=S$op6Uc$aQ5hCO{3=||gc z;n<2y&D#6Yq_vl!4enhYZ+wJM&^)BK98iiv2`JNFjKtF@)zQ!vSB-CnE>c(baKm1G zZL+E5Z{EQNtImPgbPB|-V*nxjQw{s&(K0VwMFusYW0U8JWr3%RQ8-?`;;`uGN23Ba z-1@{}T^vkMRhDtNvR}U>A_vRCyL*(8*Ct!?rMc5M)()q_K)hr=sO|mcIj$718e&{7 z+Nz5$erl&w4xpYDu>_Bh`7&nWHD-gFckz>heKgiT*+BP~gQB+_s?(>m$E_qt#xjtILCM6)K|i>^ z+L!kwd14z{FD)m0TrPg2((xXp2f_qG#-$N5DiOb`XhKIPi5rVwWen*v+mSW1J)v^I zjg>>AOOZE@h3@!DKdPp>ZL%GC`M#`b9mJ*U^SncsSlgqqGt_UJ=UOQqZ z6p%QjHR(&+k-VaSfXU%>*w&5i8+%i+cNqCg+LO1eH5JDzX}_)$xl7tG{@N7dvd`{Y zd(mgd0J^OyWzv~Rta-SSl6jrk{Ae9}pKoQtwxO~;Jjs@ev$@V*?r?~!uXl0&@g`n# zmUH(u^633x-gAL_&-Ti@=z{D@Px1EsDe+%2!m=qAy2g(mF7e_0Mc%$S$IBO*evQ|! z&-3BK72dwRDB;^YeQ}oC_YNEWS8uNH{MC8hywP%GfA{XOHNf)lp|U=UnqE^GXY2wu+w-GM6aEuaVFTP z@mfZ0GJ!(%o8Y6mrr*q~=~|WvmaAWZz}lc=Z8FO+=qD|2byc%mfo~HWH-T^^1z9WpnfLU0Z8#xGjNEH;8*X{VN} z{Aw@VoEz$@tV$-}TN?;A=a;%VcABPRUpu{angYTmzowf!=KRol)HO-t&HT!1%AN`%8Xsk1GLr~Mi^5UXPWLt<>wsKif9GA1hW8Lzr-o-6KzTq_ z1_6~Bxb=!Peog2u?`Vf|nL{HA@E@9C{Mu0W4f@N&*op0pUnsiwm%a4RY`iLx@$8>$ z@T(hGokh63xAhJj|LPoC%DdNjV6p*#TlS1Hz-#Niv9v6g=WtlI#6{paG_wX^A1?BV zOrAs1Y0%yi-|B1wjJGO}qFIT|l`*Zc5`ORDIR=1k-8;qr(>*1Rg6MVwWUnaoSd@n2 zJ0jbtx3TOCtb0b|H!_ESQ3b|jmk#}euQJt$_ZgmL#5)d%$EH^dUey`KC8pjIuVB3b z>$ZI*enb{NqiQtkl}tcb!SY{%(CAh8txstQU69Q`0H@<4qSf^ zC+-=SgDSZFR*j9nJS{wn+3)rh7wR{Gi7VjhbKXCG&XX6{2u?2;$gxjXB!%kKAeXXFh!LXI|B}gQ1J0 z{#R1I$Z=idI(bI+`xkiV?aZl0jd<8=1YCRp&pz}dEgmp^R^okfP{@3{8j4R57dM4Y!b9!lJ6?md@&Ruq5x zBKA1`zy(_c%ZEwZRjXZOdn_4L`~Tj3k^Pn4cgj;?e|Pnq#LIZ?lySHwMGD)ECsNkK z?VK-*W`7fB9z}PTHc8%xA9(XX>U}Jk@2}@#dsnXhP=`wm?M2R;aOwc>R!E&&#=)3= zoO5*IdR=Rdxkm8x)I|8V>8X#PO@7iFv#$7&t z?tcNwYx9_3xe1W#f@*@{CSYy?<+}LR=F#xQ3uice>L{m99^vGP!yG?$kYh&=aP-Lj z8W8=^UJf1H!@j*c3|C3hl>dv*KgOn&C4p|TX>*aymWL;SexAnW-BmW<3Sg_b6n9@o z9K9W|b@#x{&XZJ24~Dh0=SY(}oNM(RlWZH((Y6uE){Tg8u{N~OTevyU*xQX(vQcgz zoBLKS4mf+b;I10w>Q}Jb)dd$1cf;(8uWbB0Wn-ve1-YkX%i$Xq8rhac1YhHW5we6 z9NoK%OQ()=P~x_3Si`QZ8`-mcGn>}0V&}GvY!}+LbpukN0@##OA}w2}>**RXNRY9n3ww(h9W{NK863Ck8uWBsmGEZ(w+ zM`~VNn9%9zyAr8?r6UmHm@Cv1n8YbEZ}@edZWuO&`aqNh4T4xtbL-D_J^QKMLnjY%@bm$89NNjYLlS>*yYYcwi@4j4Y-jtCU4~}< z7V&R7yqOILH?r}N^x>h+25ma9kq!ISbKuNA_MF(o&ZFB6+H-s-`%dm=%l?flTQiTz zlPZi0M~@v`YXJY#CiZ9ktSZC5YS~zpFCHcRJDep8hO>Bn6^rH#6}M8t)rJjn1aSpLmFap&7VaM-OC*QTl|oC$2$FpYKVrm$tnC^pO=$}$Ds7Yvd*hH~%5 z7Fm=o%9spd=7cgs%!?taQz{Xi zk_c^|NMPF-{0gJ-Es#TPK@@)CdS->5-3vn!(AJ z!)j3yQSB3G=_}84S}=J%ls6Tta7XOo+_8yq#V;?Mwu3q`ZS72ki(E6;%w*E)8FU-f zmx`Gq=sjr&J;n}T%KCYvl;qK|vXr$awv*kn9cAMNvisUmW^P%`mh<~K`rtg};|DNt z)pUAK7)Z7B;rxRe2ttnyl(tGM{IteU!oY=5)$4 zaVwESdbfDIy33}&EEzwE_v@8LK(BQCd#4+~vsaHKe0n6~+cTBG-Wde;%_K;*?j_x? zuNibvb5LlTn_2v=P zGn?>oiR+h+TSby#N78;^IANuMv~BIfusAQa$-CrrgHPd;|H1w5f6IxcpR?Mc4xu#U*U+BU4-VFyBWRHCjYUzYVcMp7 z$6zeFMqt|`4(lGV*p!LeQx91Qa)^t^qDKtPyG0slc4hH6DtKKQXI#|jq#$|MSoAVb zmkz3BFLP1a+%n$}y|C1}V;Gi2LY+gg=@yP<*AVLFIP*=aEiF69VYfUE&+>SKEDF7` zY~yQO&})F>#o;v{H_BoRvpcrkq>S!0Wc3qSmj0_>56XJjb(X`T9*+G7q~KVr;Bz$g zMS-YIcr}F+)L#yLaxk{;5`Wc3D+K2OQFsiF!Le^B&i%us?*fgV zgU3v0OU|590}S`?FLOaCc}!aaAn&rG0(X(!y?3k}&NFe5gRUOF><7l-I5-ZMLGc8R z%J>P0PbWyyk|wt$c62VDy(4k#5lq75He@d-A#8jup_B6Q8k0`*ej)fx$|7idisYC6 zt_&k!WUROmcnk?AVOlN;Q*wx#m`VEd0y3xMQ@pH<&Qi|u+pFj@y9@os7BIeZAPbzn z;Z2k8c>3jU*=6%F^V>R+J2;r6#choXwBl#CCt+S5VN>I2(!-MGW%hUu45iPWp=8W2 zAa;5(UAC2yy|j?zx!DXnQBCTcY>L(w({*DHGNxxU^4KWWy;w`()I3J-8^(;|6PdJk zIHz83V&&0MoOrmLOX5HEa3v@1F6Ai)Id^|G_h0Yi9VfVXf1|9iCwTs1kL*?Vi~lrl zULEG?qy2n%dxlrfPw?*b8QGVf=7snbJU2n}H*e3$fpS0l_b+DS#;FE?{#^FS*RJj2 z?%jjJbCa_dHuLJOg6}uEdS|a}bI-H;*fPe?>c^uWFR*Ou6nRfAI!gLGnK8?n`9v5Td$=kla0%H3ydC>}gM7L7rj4Bhoh#n(J0(Lz6r% zRsnBUoSiKR4e}%;P~QKt*LIP8w|lTBE+L+HM*CwQ;D(dG8v&6a1_-X;bU=U~_Kpt5 zFE|^tY-WJhiG}GTx5*TL5Y6pc8o&As3l~}B3=ke9Yq^s>J|3=kNgcjHB5Rl*?jiD? zakr(ZQ!6Z8Z14&8G4fejwZKjIm2{t2bVZyHy7Jk2?#evQ}kUjpGKzs?DBKAQ7N`F~lyYL_dYS)THl z^{C$jq0PKzJJhf9*aW=QuK>8V&E%;ar+%|;^=q67n44x;%zRp&hRr@QNo6qQG|Sff z8fW&8wpV$7?z36|w`zlH*whd=L3Ev`>T0^C>8}kGIM;cqK)HhE%CCMCC|BTJ!=}c$ z`pvLeu921yM|4^O32ie8Elk2KClvj)WpMv&d@C|>?wf#hnLIDUb7M>_9an<`L@WaLc)gT8fM}2l6F-f2p*hem^0M-aMZL*z`%5DI?DUJ zB$9?%G9P7M;@K;SfWg9BCHuD#1z4BLUSqiIBgeKk?xTsB+y!^3TNNVwsDNH>Ujxj44FLb&q1r(CFX{gmV7Zz8%X&<(+_56w&@fl9+-->Tqfp5BLRxhX#-%un zUX%KB|IKY~KD@@|+ZPO=TuCt-L!10>VENzZ{}TG>#WQ&M{0*<3)qv$=J>B5UP2KbI z;)(2ie|#f;*$}T9&(UBDp4)v7zD_W1D$HEO&EmFPY@NsP#15;d6aq#>BCw_d$ z`IqNl-&7X0`ZIg#H-|;L;ob-14$kYw^+B(A$Omq|y1`4%!jT1>vue(zdKR$a5VE7@ z)m>Esf642K6Ij%sIs2Myweh`mqj8EdbYy$-ne1aF?b!NX@S z6=9Ei&w%@{@b2zwJeO*oJa1OoG`Nt8;_hux)uB6HZ#t@o^`_=q(pE{kaULasJ<-^? zEgrl309DfNi&EERNxLjB7Z=Lq{i0H?^P==yDNwu*7rK6ed!I_b4W9-yNuOMA64_fK zcSqa{z%|K#?Y2NV{n$?^?fMnUI{XN%+Xmcxqe$_$59FfmiHDly51uIk{pDkcyH$oG zPQ8Ie`=u>F^8@Y`ybzBbDX~3}-?b<11Wo|zrDN^^ucb=de+k@9S7iCEZk=(nr=5&b zCCcYd$AP|ofzj?qG+3A;_lu4w|Ir-xCM(~kfJzHT)=P%&jt2NxrI>A;J(7k2R-p0lPt?jMR z#nlNNWYOH))>6u_Q44N6dnwaK%BIG*ovkvzLYG?QB*_Vq;GMg7Q-^b^Lpl5O{$PGZ zvsX^-a^~Sdo;=W#WI6q2R@N%MOSi80=G#{IvCR*%@N`0MZnpfWTt}Jo2a$OG4APPk zpwCK2c47h&j~_+C(Zk3%e^$lir>7w8+-YQ|C4E3vdJ;0z68{EC38xfN5~aN4b1E)7 zBUzE`y4(!qXTFbtW$M!tk$(OJa&@UVlYSCsl8zxg)AnUJxMexcu9}0U4fBxaW{Jz+{D8{V-=Sp55bRz%6lbootmxX=%wqn=zfAnm|r z+*vUmr9JhT|7HpCrvV|-yd+6OkHyp?M|)=zyaGMqe&zX_(q9%*t zvA%GcBrlBf2El%O0NkgCt8|A6l3(H}=P@G!t`p_OZ;U@Yc_8L=c>&>Jm(xi82g7qp zIDBSA!+oYKy5&WT+C+U8_`-3v4?-plz@!mgI1p%ytKGiBi_iZR&%gUUUUY4RTV2{9 z&7upYM%lw>qFjfx(R|hrIL#R?Weu0M2El5q3#=#G!*PzhBrgg_-^u=PT@r_Zo5sU& zK{RaVMZj~-2zj}RgVlU_5t=72Li596xgY`-@=|6lFJ%4XMXT>@d0~=t8-bm?L^{lg zfWz!?b&dcx5V#@WJ%5lQ&AD;Fcy3&{E{K7Pfb~+l++v2mBFVdqbW+;=E>b>UW?iK| z2dTqjaWrhG;XYAbkT;ApnQal!Ry|2<4VKit5}3btiB9oOXg}H>Jtn#<8K*^I=r`31 z{U*tn%S)w=yp){cBg8pmb5WaH)2CRrxCR$wO z<8X8H5PW8 zBGG-BFD%vs!g)i8r1`;N*#Pw4EHBm@g5^a#00FxO!E0+62JVQ4=emIi*c67K%@J5t zybi+piu)*#1Enu+<-`tDAtm>bTRk;nB zWn0m3>kO_xOhH-gKHPhhjtiGg$xG;2Jbjdd>sQX>&aG^`d{%)+kBstiSb^uys_^(x z8D2Nnax&bZOJHOjjF8Has;KzZ{SM4TUu(fg(%^+q;AS4Uv@ff1OWy%1qr zBQQ5}K4zxQM#$zcj5s_BqmGVI{%J`w5WX!EfikY4G8X=82O?@m4B}6YSBI$jZwf|) zjLiU<1969jW7x6L=)c+*ej9^S91;9e1Uy!H!*i7nyw?RNH)vZpqIbq2cx4!T=lQ~4 zo=wh^WDPjo1zuA<5HTYN35HYXY1UPl;Oo_)C(Jrq;M+fakAM2rKf}jU%J%eur>BX0 zBSA;a1L^ZXRP#ZtUp`=Tw(8S z0~dEYSX=jjS+6eW+oKcu^yz~B-Y&3kGDkmWGdKmhp_g+%Sa`_$g{)US0^HHZs`q&H890vo`M9_-XS*8*j#IGA-u?WmzW2pYyOK!A)r7F=e%RtL0_7CQq`Q z(B>)A8LyS4%`?`;c4_mAF56FNZP5sDEuPm(w`D#JS{|k`pH|M#%VoM2*2>ZPl64VU z+j&j&GhJ&pNpF(aB(UkH1~|bu65gDTbeT?an_zm|=Z$0cx@8KS<<>or!MV=ITkY^u!drLnM{7pe&H9+PCPI#Yf} zw~j;Ccn^8T4#Rh`R){+=2a61Qt%ulQ@Zouwp0x%3TjEuoUQ>MFzIK=*v>lhn z!gci!MR0qp8?L_c>oV3|nZ@flet@deYxQvTMP-k1{gq~Y?}^^Z-*JSq^7E@o%JM7B zu46pK?=ATPVI%7{o4MhznjNZ48Jf?MHOp*SuPhEzq&YRBNtRo$2vLN&BFa~pG|M&O zn|_k#Jj7HTk|}=LHUA~T+(eq2%&q(qK1PtYghrHWn&d6X^Z$3q@|GImEzwd|^M9-y zhFKq#7ifRpY>BMnrEYC=fd_liZK+vKvb>x8Mq0``e*Uf{xcB-NZalcE4)~-A7Mfyd zsIOH#%|FQUf8f6genkTH?Spq{es~{va1C4SEg-96rEPuxizw3naZOrj>%}=tn=IQy(z?<8EZXeQne}>%7 zU4gVB;LbDLz4HW*Z%KX6-{HlBH+XzQ8u91~ka_}_Tlc`#ulfP!qz#vWmzQ4vkKY0X zdfeZ&3ow=gw=MuTGk|?lQ1Qus$F(j}_Eon34PM@O0NOdn{j0zwS?oLZMQz*faewY= zDen;;zkY*@Z(riZYhK?Aym;P>hfiKhSc-V}7Pm==Ur$9|A6ck(>W)_%k0?U@%IlkW z{H_kTl7QNP-ni8I2Q+t=b`A;$hJ~3hoUVjrA@v}BJf4po3=Fo#i#Go^@Wmg29zB5A zKs=o?1dk^U#j^>6@pfViUQdX@?Xg4gRu*IMcSlpJKcS*sYhdRAY0E2R4u>|%-#mJO zS5NQb>5Kcg{rZ*k%Qfkz1=#(?ucWP3crj%=-rbe%c`pB+C!%bcIdt7y<96s!ph@~g z%6afmy65Rj;9)8%Cs?Dr^*6Xovb^Flt}kDTv%No;vHBE-PG&In^To}flYo<_@ceo$ z8XnXmuc;Un4=$qW@fDO^t&xY=e~v7_c3mD+?+@K+#>#!-`;Ady~QS1IK-$jjtieDV38U}a?iJ9}A(+4YB? zrM#Tj@}N5OR%V#dts9EIZI4?&v`2oo@3FPdcL?kLEu73c z!qT!E`q=hUcFH?A*rL5Gcso1Tp{MxG9jp}z@8D=HF97u0DibW$j*iOw3dwSUev;_a zd?7JTXv8@EG|@so33Iw6)k%(%EGJP;4fD=jyC{;pZTohxw6?&mT|031?rqgi#$rA4 z^RkefbWR2^&mlK8301`gR1_8%%WTHItG@hiN!i^bYpzG2WSAT4W+g@_-$zt&M>E+NT z97OJkqd1>%7H1RAAm!8vq@Oy3q%(UYybEW}?^N#bBU^C#=yseqv=t{0Z&UuG`>8#? z71^oB@%U~N_U%}WU0au{wBrZ2;QXmQ$VxeeisCF73v*GBn}w9~XOSy?V93uwzVt^? zL7s}&pv%cr@p)P4$dP`^Vn0bAFr1Z{g3OE*<+2QJG|=Tn17%Z_&Z>T6f3sipxtTI< z**J6jpwxQ=XHV_Km5WB4Jhn}d=f{t1!p@(T;J{wfX26j{>u~h&dS$=egmnssk8H-C zBinI)*IHa#Gz!KppWyYE@~r#j-*D&KPZU|+xOFiS53a_cqf*u}S!f?#CE=CIKKh>B z3y_wy4KJTkgYh~J?p}l~Yo;p`IVbk7$NryIVC&iiSg~jtc5YvT@=85&4Vfq?(Lq;O0nmNpC@fNonIAFYYFXY&Ez|}T?#)HrP7oPs&x7jERC%d<<+y4TQyTi5qJV`zbEyJIW0#F9ufAf?+u|NWD;z$hVjttk6%weQAGP(kv$j%8OzkY$pf7VM+*`r-Xvq zUEEX{xL_zeW^fZB1pQ~nz}7J9QxJXzzTYmpZJIrf%Hlg~LH!*l54p ze#Ss}E{RcOIS&!_UpE5w^5SSWF9ePY!(lgjAnf0ReuAG^Yp(a&A#h$SFDY|Phq+RF zoN3PUL*TbEPF|7+E3+zA69>R^QG_zJLK$j@hwq$#PNN*qb*wW2H;zRAWzue`oA%HB zQ|QSH~reD~$i>eKGdLyqaEO~BpibdOhf4Qc!cd3hjHhZB5cnDSS}1i$H}g6-!fDk zMCK;0y}Y2>$xEo`rZ`oP&!!=8kQcKy!!7VD+fQ)jl^&iO2BH7v!5DOUHXJuZ!+LEv z>^H@r$3ic7Z5;&9bzyK`9su7hG4S3RjsBY=5VCIsythSSz?N`?>=^>P#U2>2E)X*^ z=fZM^Eh4u^W6bWM7&gZp2S&T#TAMF{PkxJs?f#4mmmjcfl^>?%%!b#2p@>eLi9tuk z!hW7Jz8~5ipGJO*@O`6j>SY$f_QxS~Uo>Xw7GhY!cnmo;2AePM!mu;(7@sx+TQ2Ov zq~z(?b$K7gotl6-sdHpCUWmPQyRb5SAOycT;iyA;07)$HNENc>1&$?@*5yFRSpnxfah~SL4yMGQ57* zC~gJrJ}!}!`~{p#-l9nJC$DR9U*cb)2|M;L#L1*BkkzxYPkuII7t-}daPZtlR9?-+ z;gqd7m%krrr6;jJWeZX(Pb0y26i4&-U~l?X9M0Q|6(?4q@NT}exdi(&7GUv#G003> zj^rqJR9JMvosOTv==c?mC5^$vjPY2IunfoQ5-@DvSd2a`;lgFg?)!?0by#d%iP*!# zFg<%N#wAUG@8%%HCr-w|pTZEnH&)q!ryH^>3X#(9Ob^`?i?F?e;JqmbgOAH|^UyF1 z*f0=L2ZthXM4!`~LuQ7S%c%-DB#esu6aZJ`sIztZ1YD-}| zzz(g<+roF8{H~4&f?KEu+IIaO=H}gGO?pyZULVQ&^fXe=9>va`8!%*4G=B5>ukl&e zuVEMFrt!sZYjPb|!J%7O9>BC{}V*?w1 z2iW^N!ot%MJ*<1c&e>j(#w|gDS0jEo)*L^MBga%5d%B!+^b;-Tls3);<0z}mNtUI} z6>Y9^Q-=1{wK_SbxjwrOU8ZFT<4AHl2741pSOteb|B|Cy}iY-z2;_H<`vT<6GJ)XP9{y zM?VR1O?zC^G}lOXjd*7~^D@k`eM5sVaBvs~j*P^Z?yCo6IbV~FtSxYx2W5nKh2wXM-a}zewc$ZRmpb|qBZsF9GT&3{9xKerMugg0C z@42z?niB)vt9ooKIE>I0qZN{F8nDxN3ahgAz-~eS7Nq@z8u=x%lJ$|(yeN1qAF93< z4A?v#<}-qjjZ2u4yb*f&&G23`3M-2a!yr%pEHtXG?KV`OL4ky`aZ!=iokqK3dC3tB zJ-P^er^~u#VHB)oePp{J5I^uw0wv+!Fz3ccgK;50W9 zm3V+7H}lYLkUeInZAJ2nN}PXM2DgQ==swI7EAkIvjo}#jj`K&acyBB>9K@>9W3ZeR zB=v9!=xsc}xS{O=LwKPSh3j*k)KEkUB1q_{?A zGu+a2OiQ#Rxix5Hc}v1vlhb51|HsN<-6Y6)*lW*uzUZ@1*0RzDYL(kbI?b@qrAE2^ zsz?QzVbL_p=j~jq$Z~3y^N>#xEo>-fpe45+ID zZI$0?ekjZ2M!a}uz@=GnNc!?$@YwDfTfcA1O_BY?_9G-ru6k!4t@?k@S~%OA{o@RLEPr<-wZI#V5avd23whDx8cXzId+bHeG z!xhgSDC*J*R~9dqI_}}oo0qu!_Brmpe2T}lNEA75QW%pLdZ~rMO`h1U~wtqrp*RN2}@pBZn{SsGO ze}&uKIzivP8{Vv54_tXDVPJsUs zT9V)`Npg)8C;6_WQNCrm$xm{gpZ(OLsj)_Bj?-nB@mH@jDKee7CJ*U5x34L({P+L< zYnYk!g`=x109|D9XeSF%TX$K!+QQn?3YG)xVd3rob9*OvTi9Ys_s%%c?gu<U2M6?Wbwdwl7j(0=g@r7BtsG>LOcN}2=E`N5 zwi2ymv1n;;BFSm?h1%;R!aH^Asx-?v-Fo#_gnFkgot62O zIrC=Y(v^$2bLSQc3i6Sglc5ONoa}TI8uF2qnQ9_(C7y(NuB4?Uo<&A-f{G(DQ_d^1 zEG;$5Te>Eg2=KhL6h)Tjr>81nJU7)8pPiieo)|aDQjY1ABMLIpp_4Xc=cFMgpW5hY zD9lbnMMfsd(=(w@&Oni&5W4ar=xU0PSD1#n@@&+los#*UgnQA!a-X+Fb(b!{x}~^O zdIGgK3vjV87gzH1xL93>nz~w4S67-$^;GCkUXg{eigZ+zr=zqu9ku28Qf2`z)E41l ztr2B~8PI1ZqSBa+%HkX(pFN0*qHL5J(vdGOL6oC>URELux@<*k>+`Y|8BTILTdt2A z1^HR&Y7>F3Av+UAx!EYr%Tb`eFo*r0`9Y3ge-P{&_7!E=hs;w^s8?~6uPQEtQJ;sR zf;2^#U%60@lSg;r=%Fn#J|~pR15A$`-1q?`&JXTegMGVKV)u?^*uG;Ww(sAHv)fkT z%G?ns?D#vp`r^Nt$ntNfS>6NH>*wO6EQogOT8!O$m*LFbIZpG0(>#%k8eC*k}3P<*CL2YFrYO9P&>%O$C5Lr3tD61|- zL2*8G#(YJf>y0|4VV@^2v)Q^#WzvS`dyHiUg^Wy@Klzy`DK#i_OUkBxNe&9@3`oyU zl9%8N)YKFsA>k;DrFk$`7NEG+fSj^yJ?1!M(9grOr-6GY6FUzijiHXLso4r z3hHxlO`m{kc=P;|2zx=Y2-T`(Z8QQA;1_od{` ztjR$}b+$smMVb4Op5LTbpr6QXkb3HMNUtkEs??cWlZW$_*~%vVxzY@UvnA;t+|$LW zIId5`!JN~|%*>W^d$I1+4s1!@hs{a5vF_|oSb1U-R-N38)u*;#@u4-Cxnq&Sv~BY- zcFk0U$(!dOe(f|2kr%s>OU7Z$ywMoBU?gIejY0UTc!aEoNASXt2%9?#S zz|;t3_J!I{_B3lUvOl83Y_Qs)BXs@R;(nWN@b=5U0N;Iv2W>xvzSC#eZPf;`P95Rk z(+}o>PB4q;4~uY5^bL1Z2UPYOYzOl=H$~`o54T6>U~6;@m1ph{YU+EUbEpk^#krzK ztfa>{p_`yP{Q~;CMmw6^Cd?+UaSpH?;ihc3^Kj3;!N-*6WUm>CRL=~tKO z0dSfgs7$Q5&Iv`&5sv6L)&pLPqtI=zJ>2Jpz)9LdJLhgw2Eu2)ybR9{h37nZ5tsHk z$jhwPQj_L6&9#t}r`Z>Gd0BT~Os(EHcrA;7=i*RAZW)D;jl)(G7kjkxV`h>`T8OQX=x z@mt`N-vQtMMb?gg!S=f=J+(bC8@WfOZgMm9E6d}$H2&OYU=;%m< z9~g|#eS;9Zdl33>2tw%I!5FYH7|ttw5O;hm0=7rNZH+%d_Q;&rB6Cl|>Pv(5f$-fL zu1xgUOm&9;vS19|Ib8080dSk;j&PZ8BiD??k-VemVciSA{p1g5_4yBI+o}^j`OW9} zr~mdFSX(*4v%ilbi!~CCa`>WHH}z}bYvRk35{IT z;z;_j9@b4TjbIyCE=f;KiwnNFdx+?-(BeAK`O;^(%|3GZJOSuvzAx_epBsdW} zXt0W7T4YoVqGJZBvZz)5bE2F?x>gU%W1N$lCmi3yLDu4GJ?`nHWO;2tA%O@E2~e8h z?d2ZzALxoX^T(lrzjf#L;oyE*+Z^2{>xT?%Ed^z<@AA1`zC^RdLIUA{o8Zr{Sp)=Zg9>}w{!ah4WJt6ZB8 z94F2J64vYsqUHRes}bDvb4;~)!f_^89_N`h-pogEJ}@uK8yFO*<_Y7N#`2h^)uGL6 zmP>-0(<(&k=ZTtYV%dQUaj4fC0GvQH8PxF8yME|Fis=u znOBP^cpW^jmGRm=LO=VG=_JKTY}2%gMuL+dC%H{RyCs=UEplp$Gfd)}am=TY;+m|c zP0l!$&v?4bOMB;x=NA=TK>>&!Hx$7W;xKyUbcDgte4#6*W?<~@0DP6#%_cz9f|DwWjNU+YsM>i_|~T<_SGh#Qhtd-){lerv>dQGVbBVt1GyFDh-cT?gp~cfa(I^dIL})a(A0W_8lJGd4`9tn{oHWBiwp+ z2an!90j|{m8|I;`Zx7^Jg#iW6s6dD}v;uPX6`s77piIiQ^5DYVQXqXdO8Rs}R`1?; zU0shGv@#+~`D-NJU)}{?+`_fjcW~qR1@RXH2WF$D!(UL>qYF?Xb=~6uozKzy_zvDl zn{hi2CEvhSxTS-Ti`d>>DmAL8K?DeL}2sq?YONZHSUXLsK!;vCIQa{Xsf)Aa{j z`k@oB_JnH0i(At0TXMZsDY)uxhO1w;!?n-bqo`Xur1xzj5Leos-n%Q#_w9$H=B_wx zW&wS-KjU_fKjQWue~+g>wnyQQ-=f%}2lC9iAg5PH7|nXX(7g?^JN_AkJ-$X+kM>Ax z*9OTxp18k#i(LE-sZ;v;;ah3s8{B$zUw(=n$P0>G@71#?AMh3GJO2?i-QA@BZsLgy zt}co845JWiw{lENS{BrC)fDk1a3{W!=1LBaJ7T0l=TcRuV2RP z%V{zV@^HPb0nL|g0~gEjcK1dUb?AY@j^@Cz1UxP-!R?DpxPIf(f7%SorOSU`dt4*H z|3872B)SHgV$nbw<_-1L$}|h@aaUKBp`zTV;W@F*ek&P^Z~uUjHh;nN?(N{#t1FzX`oO}x zw~55Iv_>y0d-Sk!Ku=3M^s%;6WVn^RrLtvCSUOn3!qG;N=$5kRvvqca9sRa8A8e9q zgt&INCkb;cjf6SFG|QsQut+)=+teg)_1(9Kj*UTqL8lJztg5O&UT&t+CfDU>qd=Df zeSQ}5bJCHUm1@#lrWP~9E%3ocd1lH7m&g=(=E-<(MujFj{Pgq>Vam~;ot2@?lhEdOVPOtR^*N}>$wgVV4u%{93W`gS zURDf!eK~S;Niz3}@F@2@uxBgkI(I?c4?n`-W)EbYl5tN)#bpEPaS(_qjgz>s?u`n)7TG7552~bU7r^#mzGH5kbE`GYf_+NqZmG(%C;mUPgwBGvwwf6z1i@SWtkn!a|fA zi&0TrjIv?_D&=LavOFIZWqHc2t}H-ZO(7cVi*cc`1Q(l11xE1~OI#u9YxUAcxu}wt z&9d@b5j`gS0MGsMjSo92}h1?M8csB zNEA>*{gB|~iLLU4zlSFe8*ymwYV6p&7{~T)!by1{%}G9ms-hfJ7Rp!}a+OVdZZ2?R zf&G>*eqBM10{xt)1m`R_cZforT)Ti8`+6DEmdMY`L}q>}G7Hj>m!FP&fj*a;FR3!W zlaZB`g!J5Gq{uju{3cQbw3(knlQy}jCi6CV>B@$_vZK#=Nc-~wn#*At54mNSw!v(c+Kh+f> zuSSQQS{-uh3Ka6{^$Ph71_f&EGo5~F=j$&>zV|3>G@z(Xhl09%q&MW@d{eFRHPqYJi$C%J7+FqeYw4FlFC_9+NIHGTqEqX`TqF1<;Kz;`z ztkEaZPQ~|-aQARabdRtRc^mYJ6?sL@J4u;#sxGTRPOv0-Kgbd0u_XK*&{xXs6Kjut zan1sXk8^>g?slznw--}Ccb^GV){ zl&1+9%ZZYA;sDr9@m5;$t}_DQHZu_Jvxp$L(nhQJon{YI2bkK=4p2lswefjSsn z2EOmJ=j&Y18cKZ zA@^=7_80wxf_v$*OuYcZ?KI?HJ&zlxmUUt+t~Zz9rNqAyJZvtq*GL^NYmil$fTGLU zNG&~!V|n{_MeaOC=i@jM# zpu3@yxN@AX-3tAaWEk!xWBQ6nly9Gm@>ajW?Y6&1T4+Zc+Y~8%ItphVXJgd4nV6Wp z5c5mcz;}B%re-g|r0ltfIWh`Ua_3|CnThb)8iKJ&)8V%x0^$3IV#t|s2;3P1|DBPD zJvthJdj=tB?-0o^FYrG_DbqXtJ7d+?1O($9SNW+g3}~LmX6XR9tR1Liy|zZcdt(GT z4(SE=1-^*dHbfEUu5$+DUrdJ5sCnp(BvYf6)qEl9L zHG-T3x@M|Hvw`m7LG5yHczBUeB)Le^(L_f21r9`LR2ZCPZ5J5ggTT=K66Y+hLPglV zXE~0Z*n*$7Ey1bNJCTrf1l_ILWA>`4u=lryTaY{loqD2UkMA*ZbQBWK9+dZ1eun)B ziHS#1TVDbPA6tCq*h!favmfkk$DUj_C1hv{xB}q730RGN~DVXxunCGwR|dm z-{uo|jS4{E^l0_$Z*S89t^p1hJ9!Aot93Y+a1g0!Cy<_b8hegzMc`mR{OdRW2Jeyb zI}szl6QS~3;Aer(Zawgqj$gpq)fV=S4ob;|<7R7br^0keK65T1SD5n>eSnH0EWPZDIYCBiIh6Yw}DZ7^W=CVwh=cE6H+Rx7IH0S{T*{ zZJJvlsZF9=Bg9FV|2&Oh2N#*c9-fL=*T`?06w)-&NuIL|lIxlo7s@b=`Dp{4`JD!M zC=)E9lZGH}fjrx04}sr;A@Eobt2E2|Zx{))c~aK)cx4CNc76!XJt@V4jP2+%Qu=Ua z1XjuOx?X-M#_X7bm^I@uV(SbH**FDz%g-rueJ3wuVe$Db&^@n3A6YA$x|og02bL&} za?9cUF=gLk6o8!G8n)Y&f1 z^P}Z=+#h-J`xCrzywddUFvLlvhi#p#$n&iYiHa;gcHf|g^IcanP=q@;{j3yz>&K#_ ztW^S6jYh)#Vs%ar4>nzyzaQg{EJeRDUdWW+D4yH1Bx@HY9$$g(LtQa&6k8SR5U@jgg=UV+I;>)^CF8um-W6|9$q3QRW3EtU^d(8zCU zm{XISV3_1M$?}%O_{Z=uZSt1*7(w0=B*lNOO|FsH^pm)5NpLgVGR}UjT;F^AoHQps zMxryXR<@R|g|)J&O>WQf#HA?~lH}|^ds#!dZKNIgf$D(IX`5!_&dVFP`S6;uS+0ok zOAU&z`S}5#8d-kj+C^NtenH`51o{pMR-d;X4AK5)PJDW1KRiPkI&i|1E>Me!)^(jGaEgCOg75dfOs0uLTH z?E>gQJPApiyw43Aif#b4gs?Av9Qjk1OA`0Y*&)8tQ=ZBA`fxcrnIRBsFyNiF@_tpc)W21QiB4KF=`rK7FFZc)4TFgbOWzm>H*_6RQCBj8e07k zkAo*k_%)u(rQLZU*Y+S2HDjz%(dJKh;qNbHUzR>>R_C?ijf~XwQ>Yqhj_PmQqo&&c z;AS(PKYfNvkE&61zY4jHji_j9#EYwWc(P><9=7d;8=px(?>vcSeF+}dHsE$s6K-Gl zKbtHk0p1cM%j@f^P+LPApdI9?kRjop!9;9I*;$#2^d|Y8kuK$>rXW2nMTIjn(v+K(NfRXL zAHsAqGc%Eu!-FxU97CqGI}^nP*(f79oL7LHTs^Xj%aB%93SD)H+**aWm~k4&O+a;I z5N@{Xg6i*n#FZs8@US`?HJ6G}cePe-b0h8>D{-Z~3UxKLFkWbY;bJXHH0j9#Q7-J7bqAF(&pkKRFv~D+j3M^l&Os%WsAS21T~e# zsH`kPbwv@XstQq8U5wh=B6(a%e+ZOYUxfPFLR8o2QBzfbiYfz2Dob&vq(GhvD^VxU zSw)tA@vnH&<};Mr^~9T`L#Qb@2Sd?$7>W~7LlW4Kf-++U3XN$fEJ~HK4N9B+)bSnC z)-+U=27^Rkus7!4%NTbioTNN{S?6V$%fH1MgJPv~WiX`oGf zlGr+fq#LqflzPeva!@K`V$?|-iEmv7a`b}2Oa;mo=%xGuDPLrah56z)Z6X!qN%`U` zLSI~#&rK!XD@ zz;}N}aT{^B&cns*v(k2Hk3LE)P|OdKhIcu|C%q;YDb;yMDVOo7$VOx83A|gf5SO}l z#?4QE4e-#`l3KzQ=q;)D5%pTuUgV-#B+fstz_VeqoCh*>ZKaq~xD@H`U+%^R)|J9ikO-y?8xBnD23K;Xo1 z1dI=bUwklpM+d@Z)IdexxDWM)>#zZE9_j_BA)as;(jWGN-AzP#oa)rM z>qvXpgv)PMgf03;*{cl!lJg1@?ipr{?m-sl63|cixe?G?;(JBfDbl}NxHWo2+NzBM zv%yXZ=I=p5pQOJAS9$Su9_It6cyBn2^-{1KJK#OMVLQ?XHY0ptJ<=DJ0*g_;FdyRs z3&}^Dt!88TDhATfDX}pF)Y>wXFGp|*FSy@{P-nqw)vy1 zbG}AgY)@E^lHYG0ur^@;JVv>~ce)P-E)12I`bZ2AxJ>hbUAzkdB+h2M6Ku!3B4Ak< z>?gayeYOvL76rk2oIM6_9*T(7QSg}Rf!MXNh@>XGlr?$BB*e-K{e(^Nn15gnCW$+D z*L18uu?%y!PR53#i*PjaCmc)NilfP!ky&^I83wr*bO%v&Ap@lsQe=*wMP9{86g4KI z?v@Uh9vabj*MRb?S*VdUbj=+DcAQ>^L#f-bOV;S=WoK|CeJ2VpWno|H4xB1Dihb$3 zup@CRwx8dE1DSh}R+FrdP;n09*Nnre6RVJYIU9!x4&ijgS!_w!hNSv5ncsVHNOugm z*UsQnF!N5w>p_Vh)YQ&{GpJ@TVB~ZjD6f?ji8r z9Ep(K!{NVe5PUXAo6PWRic)5I`mdM%l`#DSHbkg&%6V;!R5Ek*Yhgewe%1B=#t-40 z;k_(KUjAL-JgYza76&74^$28NEr4T?CkDv+-Pw({vir+A%OAFm{be2J1ZQs_lX(SS zlc@?4avE8#K_lo0jU*(A$MqVCJ&gb)!N+u_wIm1`uMvBU)AACUpJi*rqee7pVdiH( zjU?2FL`{Z-bxWeWC1I|`lLXgDa%zJUv_&2q5{AH_5alPRWv|&USDN7x$2=s>8K-HW z|4lvpy%k|jxDTMMXOjjmwR~yQIV>gu5pm&g^>)I5fi4(5c@Qq$DaVty*Kk~(p9wPm za&>31b?-|2>Ysmw!X_R3274>Qyqo-X^s?xP;Ugn(A%OwN6sxw=Mx|cCA21$1aGGXKdu+k?VbceA(%944oK@x=W?<9#w&3CwAe)nY}2G-?pF;f%uni{!J0()=@67igrQoU>kJw z=!wsJw30dGs)*)}oja*(an-wRy=j=I7jFyf(iG`dhX^L(BFuow6;2`+3hP1*76EqL(|Z=TZYmzEjl+c>eut}H z$V=L)Q=qx^=7&<$y~k2!6&gl+;&S`eKv10Y-z&xS-(#I`1dX|xf#k9ws!C)iQa;OOrPfuYu@-4v+TzCd9Z=o97hV=5prj!WrA-y6 zYpBP~@)}&z72$G8iP|(VT&#!gQawuQt5I53gi?J5iu2^9Dg7L>($6boXCxvgGf8PB z=gal~KS60G>#~up%R)|Gro4bxnZ6ec2v{PGMUyu(Y z&8-l|B9xVtpt7>uWKyQ45|z~zsHcs%deb4dRn?{HFx#qXqlrMT6@OK+$Q4SSB2?Fs zKsSn8DCs24OHf^3hX>{I?B2Nwb-lmE%g_G_`0Rh+aqG`fV$}oB6Aqvv=L~exzXgTK zs4hrDjf|18C=>d^O!c{OZf+uy6OSS%>zvYbFD;V!moIYVMT)dG=F{}dUx{yx2q$4q z6Fi#PpTZoPsu6ifBT8tpMr4U1>6=37CquRgDv$JSVNpJcigk*Ztu_{-PWp+ckv^+1 z8l>-dV5%O4R%UG~ix?;UBKhgk><#B(nO>*-TDm4% zVJJqKt`sE&B`7Q;@t%qbx$d(3Ou7GbsFyasK6n6mJv!t07oPxM{|-&x{|+yv4#DjV z=~KDCxG_Z1z9>)b$y}NH1WnCIe2F1fg|+yPxwKzzvSBa%D)%|b{33lWiVb;cBS38i zh~FS_1u|C^^n5<#!cdr}2zN!g=coS-a`Vy@bn=YQ(zUn`$WK95PNFhrlUk6BjWqxy0tSC#_s81@+Mnb6$8QDp=pLPnDMn>cEH=hDu z{t@`gzp71}=Rf`d4c6`OVEbHL&pV3p{6v&j6eG)^M?qPsv?1$5o3(2p*lw-ubeYZr za&zRK)nu}A`6WO)(sZdvm207!Az`+kZo15Mn%l`LmiEegrwx6j$uGz*rHy?lr;M8k zQg*RC`;79;6n}b2Dw2znkx+CVnN``ysL4_$b<(RdkzSRBw5klGSBPJbS1V&smk(V% zHS~4JugODBr94wgr5}xH%CEvwj*@LCQ091Owuh#8a%*ytC%?-?PIb-)P@Z7f%*VJa zZe)~8-6d&AElxp7Q8JQ>l8{(<9tnksI9Hf}Glm45Hk`#t{TW60A2*y)I8ksKCv>N9 zJof~SrQUQ+7p|waL+P@xw{r) z*7gOMzICnw{fvuWJy~Jws!15Law0}8ACHmC#$m+Lcnn`M76T`QDUj&*9~Yv?ejkDN z*dTa~34;5uV7LwqhV$S+IK&0OHqIZ`alWt|>CJmaikGujjb~i zUho{_1?yoRupTi0{?mDWfDb}=D6Fj4JjVMVV#y#3nBot=nbOwjf#^Tk2ch##+R9N2 zq7XSh5@EAK;T7+V=y`E)k+!%>yMiZ%A#`#CLMDVFWLyvij`D-w5KlzL2O?bjk)!-E zd`bjj#snaGgfAw|ABNG>BQbnx2x8)W5hd*yF+Bp47Z1ny`GXNVDG1?X{Sh}M3?AVQ z@QHJWuUvc3NFO)_TO(kkH-eKhhU5vbGGF5R74qh9hp?V1)_m zCSmY`p@^Oxiy7NyVZniA>I;p@>!)GSuF06RJ{F@k4@3NsX$apl7PD3kLXwX;s@r{m z2OYjasck!~n>hgU&(6S*0~0Xx_)JVoU4p3HqcQg6Obk0R8N&`u!qk+-7=Cy%;tq_* zl*EOI-50Oo$DW>rL3`s7vv({;9GRlxWA~0nJUZoE{FbU(%%u{K0b9~^ua3IE=o{Qci9pOG(`e4&A_$&=U;0o#gWl@M)HW){X z&cZ#y7v3SkaCGy6nWYn~?Pc7ZJYeDC0{a0n-aaOC7C$F6HISGiX-9IdWthYt<490y zc{IXLBmEesk$jZb2ttiyq>Pq_@h!0y=Ip9AK*n}2OXv8;3Z!Mkv zkkD|YSx%5RCrFl)6eq#XJj~0umPEQ%A6=G1&2vpNmn0+YLWe{}AuuW&o&nw%H)A{; zyzJ1SZ);3kFa|qMZa~A`GTdvvguLPeRA10x$ixVAwrPt=E5~Enx+(CHd%v4~C)j%S z!<+@Zt1B<7vMa(Rw*^X!R`SuqHnHwZ3ceGxP@0$p9YV$h^0>^`v-b(f6t9{K=P7YcDC zaW7)0#^BH0KZ9MYE6k!C)R#Y9gUs=beH;9?{U71x@2N;(o;AdACaKLaV;sj`Be1y< z!+FASV>)Fu(pwvA#u3`QA?Vk%$(c_plX5JNex?zezpSg}9M;O?oYJ(!wRzOCE-jDN zK24@&y9kE0`Omq^xva@*Wm1Oe+J*uB+T3Rww03CsLCdn3m)E3SBhy%}7N^~(Y%}X6 znN6+npOf7hr~$4Hp_REw8OCvrk|-yrMXt$eWH`%XJm)dVbS<6)JL4H9e1itUzP}6l zx>}=~t2shv3`5X@5eQl}8n&~7)d8E`rwmYb%iY!tLf`4W=r`2|eJ6UuZC)h2m&D04 zYcM***r5Ny7}!l6h;BojFkn$E9A^ZpFgJ{c?U|*%yy7A3JjgR@%S09LJR<~gTPDMO zW*D5N(0rR**UI5=m>nw5-}wmKJPvudtZ?MM4sOfi6ecCEh1=3W=rzF$Lk`I^b^mNw zP76>6at=GP0HaPUfz9j?bwFvqY5o{=a1O?tSq>f+YP%pDJtups130bcgkbNLG}Ph| z_FPQC0D0z`Px8h3vSSEbKL!?){V?|U667jlW!K@gdNk{*DO`{u)l z8%TXxiO>z>5w(4q$TuPNZ4J7Om;2~FSx%eVG%2Ey<%HRapbs|7NsRYh8l<$z>5?pO zNuvJ}K1PtY#K#EomY^ngOR`)e!8P)_CE5Kk{5_(aXql!#BiIQ|j`g*~{|;Gx-*Cx`Dgzq|E0JB>e%JUp~RR`61se`{DsA@C-NKNFP)mLxyE5-0EWoOkIhGml~9U{;lWl zaPJ9lMe<#dF1_6>`QBZZJWp`>`8|n~{&-x1`*EJA@7x*&>j6N$wEvC_!s{DS_c@e> z^u>+#U*LMz9zag5v>Tue`lmOf!H*kJJJKI@Uw?~t?qM>fuT@*GN|RpGX8gTtKw&Cg zA31>g2am{gHRI{+$GB5>5x1Kzi_r2auVYNNpce7L`%|KlOs{iv?q@rDzdyy>mOieWerDbdwCIZK;IB^ z^a<(4eltlNx!tWNBNvGTBjBSct;vTAa$sLmscI)PNgV ziGW@fSV5jB>)Z}a-?zo1L4)w(Vlk3rei~|PQC3=w>s7V5T3mul(g)PK);Cr|*Hn+< znp%{WmMTKGgxb70$;iu2Q6Nc9S0lqoW-{)Vz`kHVeT*z;*hJ)IfrR;oO@;SRB)X(2 z6Ery@m-{m_F8R62)_h^1ULI9?6c!s`EGd@6 z6{xMNKt-idP=v~=5=Ejbg1oj^xm6_C>l$&-$c@gGsP6s^UVQp5z^DI)``>*Eecvv4 ze(n$|a;OEJ2%SC^<#}l+SDMx`?t+Yr^J*SdmKji_&qjL6S!AT1lm3&wmFrXlZhnp; z#x+fGLfLKC<$fT0HKJT2$4f+pD3g9D6qEYjsDVz{_SC-Yp7%929Vmm1Mn zR)VJTQib~R5=D%c$@rI5m!P6n`bWSGg_?3BYNbC(me)z1TFFZ^RFt8yvK&oS70P8A zWf;#m4NPmSs76h3Evk&wC@(LNKFCB(86bh$??`{L=>e*nJxE$)B+ zdpwBp!gHB-G)+?_?XN7%M};8|<@#I&`WdgK{XLY+9MMpr*P+}%V!uG4Qszy0u^wge zEGRA1DdLZQq%FSyZaDCZ18zVtTr4ib z{Mvz=6l^~Ubb=cI8o5rbe zq#!XrNs;*<1KUSewe@|Q)mH>9!7mDmy_jg*k9?4}oB$VdiY-uh|OIuILb?nbe5S+sSd4}!JIfeaM zC$TT{1P){#6ZaT)W*x`DJu6W;Z4mNX^IV!g;Z3VQLf`#+=q5+wr){&a;^-=@Kez@P z_KCZ9B^GR(kEz=hV$q>>SiE~VW^bO0#k-bb#>Uy0vwa~}9bboeyBA^Z-o==@c_!xW znvW@)reWpL71(roJr?Yoi$%NUVb-P@;x0q&;|sVei{m5NC$VhTDjd%_tu{Ck_2-df zIFB@0ucj9!A-^I6rHuv1FHcu!x?O?#8%A7xRE?&)WhktZu`EwQNmDNBZp(A)PASgk zpFnn5GIFZqerU``+0|m{w@jSQJArcrr%`&f1O*rLIGS+;+fM(44Tsiagz3N&jMLIce3SGh z3C?tyP+=O0ZVe>HNt#oWoN0t+f<;Sb8q3hiCvi^Abdr~hCs|1%GB7+8LD3Ny7#)h> zL1Bm(5sm0^G3e#e6Z1FC!TO_XFl*yf9Ld-Nz0CP!!%2*uHw+%JZm&B_CU&3b(!oloA zIBz(M(^*Hc{m4cfO5CIFmH9gspo>>8xX1g$cV;9!CIumS;V`w)6*)N)hg0_}!aPlX z4*O1T$LZYTh?o?C4z69`I?`L2*5cPSU4kv}ncWZgryu?oY&{&*SoAYDQv^BZh&Gmt zXILY6wfWU@{5jUzcycZ0j=fJ!1^^m^J<_Rq0LveNxK&q-*Wy^UMuTk(0_awLRXAYTGk|{2ksaT=hZQ=T^tIFc?03JBpd@) z4}tHhp|G7X5N-=2VJFWk63L-k$H94CggU6(aZVT<=Y@U3vxt>hN)=r7`f{FalxwrVFMbXxC(z&kBIc@Gq}6RTH$>&@GtCcXa|XhBWt<=u*7BV0H#F zG3L}Vv>9Tf%JYzCx7k#GxX3fwV){UMN*>>Jqu?dabEZ4XbKGiXkRt5c4YI|kBMTL& z-fxl*eAW%e*2c3~Q*{)fyC*1H<@U=XOhh@cQrfdJ_yaUTTqDZ~`Ze<`|4;ZBLEaMP zQs>_T+oWli(@&zhC4o(HTMH8{N$-z^HMAtYTb4<=kCEjq^C-FZpeYuT`<EJpTJ9bB1S69GrN7^aPeE>Xr zbRW-NHAy>CaM}4Q+-mjT0e@d${T5*VPGH{#V8>!$_iA9*F7cm`v~$4LQt}!03 z+kS~l-+m8lIHt(*J1^g%=HV5*c~%cRt;d_ExA5TR1H2`9FPBP^8V_Cr_a5TyP_iKg5p5Nheh>sL>OR9c>H_~74Zc1M~ zszb>TZ(M297H|y&s-!X*;)l1TnKI^2Y25tvP3f>(c=WIy_wfW(udbo=Mm?&o*Q4fE z74BY01*&(T(x(G1wY9=s_i;dJ6K>wVhN?^DXt-L5>zC^Pe~v6~Nt)B;VH1>L-e*rA zurk*?b_o(o3ByP?JFGU z{T;^i=?b?#{m|Fk4!y0ZY2*MaD=S!A+Q899UI6V}m1}2Xue8do9L!+l)CbnieHB@5 z?PP7rW9yH~wT*RSBl zjccf@t5N1Z($bSa8_?7!r)K$I$#IfiCW1&Kj!1av4Y}$-MMe6)CqQ#0Ennnx1=)%q z*KC%P9M-hcHB&D1lQdU0&`BQuf}5j=@?>T6oMoBfGmxF5Q-pa&F6~AqAum5snX;h9 zEs5g%vI?XX7sF6lff{{2-ex7qJ-!wCHs9b@&n_tM-WfQ!2iF@)kWyEIvI{p*S}J2+ zRgJ5)<+xOBGDT9-SOr6U9ZIX}P*Glks`6q~l@%y5P%r&LP1t-A*d(&$x->BE?}3`K z)XvY5_G@7OF}@`j*D_sgMo2t2GL${;_g?^LcDrfbrGVPMMLLDTVrgqxAxbKZD6J_q zp{h)2m@A^Zs!G|Y*T6WE=9Nm*oFIvA0!ed{=M`1uD6Oc)EkhBSH!VkX_iyp)^ZyBa z{u|u==2PVM=z!+rlc>=pLtmJ#%z{+ua#59+r%c4;iJzM!)KadH{-g#o$CdMZLb&Q=c8DslQEWZc>U5BoRie9E|&gRkaCGKNheBVe5j?a=5K+xBypua zqNK1uX?xd|7|~c-il(wM1rpq4r9~*KFsj2uD`Y;X4FdK>c?qh^jHoItMuo8u<;4c& zGF&5R1k-CPN>Nu?rcf{a^*5-jMy)(gYs%|TUS&XaRSqtfh6DI#iZ$BSDYy5}HMkaVgGMCQ%6b%OxMR>`AJ(B-UG^#31teJhg#E zFs#y~9^N~8gN$LJjB61$xJ=}`BHU#>Ic_DnnJCZAQsY=I{ZT68&hoekl%h8vv$O=~ zvd-alafbY!Z^8{bbKL#*FL?R&@9_NF-{8@A{|guX_&@O~!Vgc*?M6lRX*3q-QI#$A zXQZP*9gLd>T}J8$KZ~ zuvo5orpoh&_tJ+i1N1q{)D927<)$X(xyh-XKR<(Nx43+MYi06FA?+Ej$#JtQGc!Su zD6&b)o_|K3`!L7}KgK8S2%GV+Sk zp_BP(FlMSvj`PJb7vwjmpsG-9M(E1&MJ^k;<$21)4>tu83X^eOFLR?h2gkFHi!0Bu zOU2T@bI2^=rbiM|^%+RkrQ=BAaU48%1c`E8$@!@`o_rj~&L73;v=ca(B}(Ri~);o==x6Wx-P z`{S!slNZ_4qnJ=_JOP_FF%nN+^3h7zwS;g zDz24dx7>pVQx2*xBQk2UWqJJo7jBf{(77F$yk$B0doc+U`8Z@W=0@zdL(=&2O&)2!sf=nV~ihsCIupRW;DDf z4utoFAQko;>ks!a-f$o73#XA@a315MG<*rC(cW+vIRJLUJz+D{9kkC+*K0}$T;u)T zp9f&8?DP|saV~Hi>M7;)hg-ZC>_*6XY_J{d200*NMih3R-wVIU0J!z{gte8utQDm6WH|{ujmTpfp^v$aPH3b!T@vhC8eJ0Q8hNe} z=p@$z19`aQdye~#dvGrQECx>< zj1KNS@MAzG$|Gx}?87*eaS;2`_F==xjTkg%ii!E8V2)FSNO~v1ixj& z;l3;m7Cfh8Sp*zbM8bXDAb6~ag~OsySkCl=%aRCK%#!QcG+b#>o6VBz+b{y=v;7ot z?X_VjoR&nwVM!SJPV<57!eC|hoMDSu0dQU#0oSF`f=HOn@KgESRt`d6acw27>-7HU zJf%N+%<@K`+5Yg{I22x+M#6DvILv1H!+L(8+7xB|c2Zy039fKj8U^Q-(J-GI2*>48 z_p&HhEC@v3IRWY#cwniETmxOZW#J+dt>i4`1$~h3GSN-N_mk_eoFA+-!+TBlQ3rLh zer_80Z5xX|)4kv(^5&A}v?xsVOWzsZ=seCDtw-7_LRTH?xzYrs#Z7X2RT#`xhAL>p z_%GpO1bIt*j394`j}hc8p^@c;MwV;Dx8|p-nMi3#jQ>2WK_k6e<|7!^WImR!Wn4?L z+)CP}k>w7nqdt)3_A~r3W6NBnS$^qOlOoG$ulyfm`9JVq5x;u+gaq?D;Q9l>HEeL| zC2kQOy}E=u?=CCt=ISjIaKNP_63o6prTHglH2ZgC{_rm->-RPCyZ#PU=3nA%pffNg z9ynV9T#@pwTnA)<{j`4%JTm(c&*#noni_$Jb-*JY#(4v{d_~H?EA`RNcRsLuJZ|=B zjr)$)fI(y~KLc*Ql5}cQ-^bgh*U%g`zJi;_#+zIv`6lbU&7G$N938cLRz;kk=v;wD!SO9`dbIod}EHL z9vyM1{h#pav)|%*r|x*Se4i@!;Y;8aUgIsby5C$^hiKj>m;YG$PdsmF8s?$2?VdE? z;axm<^+>MmB5)}cWxf7_o1cFVc!mKr6(S>jb63(Y3q&03|3_DW8&y!Y&Z+T!OZxHj zTHG@0h>NY;;_2j7(ho0yXSYPY2JdE#L}iCosOr=PZvl`U~gJ9F5%S;E%C0(PF3ui)pIlIHj zzCRr8JmKKz`hhGbDQ<3Ug}xT%iX`vUt*bJ-!nE((v_{9SU9fHE4m^GN0#9B%modAn z`na^z2tBn*%S#nOT2x%1h}WV*og&I}MkR?Xr6sD%R>U}oAVuW9Cy6zZ z{R26kWdcbll1&=&GE@Hsnp{gTJ~tx;IqAs?^eg!+sWU4d*#c^%=j0?woe3z)Peidk zQ`ucl%E?7ZeIpFU5;Wyz0@B9DKrb|Y{V8s>ZG}1?d2Si9P*IW({e_FDx%3dlWlgFt zc+h22jZWMGMJ^Xt)u61b4i%*}sH`YaCQ4|gqo^?dgP96NfVUvbTN2|R17&|sursXE zrC*iId$Rm*@SZHs&z5n>$yA_umTc)SYTc8BruKQUQI8@)aft!O3TjA~qP(u$1bG(K z*4Lr7wiY!tHK?wxR-}1FMTK0yq;o!0S1K)Y4V)h&&qO6@b$mr{{aRY&5c~zNF9RkdDD^guhURJC? zKM8-Pw**c4d_Yw#DoZa&Ki8u~=2&@EHZB@-(O6W3;__OQmsa7iT)Q!9AZ~vp{rc%Y zE)^MjJ0`}7Tc!UCD2HJwvQmW zufAT8XO%MXlmFK*6zFIEN_oz(U2GGHeCE+i+3?w*k=2^%8g4LhBa!zu&EKdp-{(;q zZ<0pMd2T|I*yg>i-S2!hXkYm7elL)+^Q1hUdtfqWWqKy?JOi35%1=v|XJ(2z^jF36 zo{~KL>V%u3*&@#`d+4e!RwR$f%oEQ`kn7GfZNf1h?^C+!P~G=o)epSCq;GgF{H^%# z%#t?qD;b*U`tYTUJR_N(8+k-Vmg%gE^vo2bWhNml!(_6nWxUCRSE{s=n*>sh+{fxm zBuP_km-sAk)gikKlhBuXTe_w%a>SK<+80eGWFjjoLm^Z8Cta>RU9LMru7yYynG|`B zq-II`xVa&D34Z02mX?By^c<8*+a6^dfFaldw?6wd@Y$bn|FdsUWo?VA$M?(cR07h| z6V%26H*q<}$#M$WV32#xAoom4W-=1f&Z~BEGlc!luNlOjfb)G=EdCQn$~cG9$;Xh8eg;R*>{puH5aBMRc?O2KhKP|?b&GRv9<6MR5>tefJpb@d?-@iZXtsLNJBWpJYR}&!^ z8+9DB+5y0lk_GDPNI)QxR#%O%`6K| zt`M45I>~Z^`RP)lJTyEEettgi_xD9WfFJw^iX63+LxT_)6Nb>C(dqz1TYp!KUNi|I zlcLbUwHy2<1Y_#oveFr|OLtW9@zZbr-YY!Vw2aKOM0Z}p0=p$==66H4X9>6i8 z8IqR7F2_qFwi%`j$6cErjMK)Ser>*x)aE>(9Onw_Ahh|S&0W?-Qkeue>tGt=G$NgT zO@{KUgJG>)&Q;E5O;&3YU2V>@%^F!xFio5DT6-x=mt|@9gcjFQhV?RyuGUtjX?e6b z&80Rx$#Y&G<5&hsa1z)gwW$S8!rRl^bQS?!YKqgwI5o-#4IPHCsAxr=lOP{9YV_Zb zRUa$yh# zY#t7)MZr>rzap$jUiX+j0A5>0C?ei!K@hALhrnh@DExPigU9A!=qq)(Z5amZl@V}Q z6N7Fuy7!d#lUQizbeCgZh+E+XT7#7B0jiwDlp9S!?ca?P{6m5jB-F`cq(gU#}AxU7$ZqtxGXwvUqW+%jCrw42}zN0D=o zHe1Y*Fw0v5fAHX<)MwUCTi&YyBKPSs) zZk>nQFRtV2-Aib^R;S2vlHuf9$l3gZEdK}otKe6+U%kWQ=P!T)-3%w~?Qz`J3Wpu~Vz*Nd?6dBHvpubm-n}0( z%)UjH)fZ^|%YVa#_O0=H!(rg^TReFNypZky&C=Yzjw^TW;d=8M+ny?cQDKLIB< z14p(3TMkJ2KD?ea3dIhcapBugjccA(c+$QTE`Hk!I8z`u z`5RR6@J?m_{GQZZi2KLq!0_!q;l_9Wj>lpCz^WC%_T9j~eNx^wsaNXTEA2Qa{km7` z-7VO72v{R&8y5m|q5zveqVdyzLVk}xH1Dj$qssfZa8VvU*D7)KauIG_to}cmEN@AU zQ-hqKpG5i3$#UksclWl6|MV|^LSOUlu<_~*$NrY^w)aDbVR?Ms{ zv2yJiT)%xwX_G&D^-}psmS2=>y1-2Xxu%MWG87u}LCs{kB>hO>m|!xs&{DHpf#gR% zZDgB3f?N^oBwF5+OawJDi9)&=X&<1YCcC`k69ri*3VM0jZwbcbXCxsnJyC&v#_6&% zkeiW@Y=XpkPBIMgB3_)A2%}Egrq4r4P992Y8(=Id#ryxO_}c^%u}d8;pR_s1{s zX4MS5Hm0Mh(15C@TPUr$14H>ml+;#;Ux%uiEYwtIqq4$?%JLdimo}oZtlmT@R~b=C zZSB$m6RB662ScGrQ&xj!qTyqp2?uUC=;RtTXy#j#$qKm!lDqk|r%b!bwDT zD-B^An4PEny=!X?tjWhgE#et*bmj)_Posi(`6>nCZKD|1u&H!oK~X`Sn2z7@!v z(#hPS`5oyOqx4-#uDCgA%16E3}3))NPSQ!fQQ7rY87Zssa+R#u^hQ`uzG?bO2 z_Wgzd4>2_gN~+3~Ha<5Act|QyTUV+2qoS%*;;C(4`oT|)^cqPgs=3k70xDkmyOeXS zvK~cs1t_V>L{mvF8jZy;RMexmyc#!T4mVC2h1;$E9r)~D@b0T$qo(JNxOsdJYGwYZ zd0D}}Gl7S;wj}Hs{w471h`LIn(oiRA%8L}L$_tfQobqzR2hzGs{G}ED5z0&r>nSm9 z6jYX)>ek${Vv#E;M7go>gG=*HrA2xei%Eu?K%$yvUldVaD&WI`&ay0)t$p!fBA)prinx+qq6l`GgHjgDrMx1u-$VN{g!5Eu z4`pc!pZsyej# z#AQCVh1b9Xf%$a`O*-)l6^>z^JTo=$`Kh2b3rNb7^q1=pKgW~L8>7_CGYB~5#o5w^ zlme8ersGQHK2%K#z*T-(^XEUwocj*-o%-SCj-4=O$nTQO3D&`br#aqf(s$?6(vX!Z zWv5FU)7Ul{qXIqjI&tNh#4jiK^$j;exCy|`2W|+Y$!{Qk2T1z!9!fZO24_y6RDH>C zYRY*eoF96chPa``!LHb#KXLKp@+nIo@w6h94pxR_sEJ>Nd zN=i6^wB&PA{z(OXU63T<3v8qmwq&4BBL+^DRM1DVs0YNW}a1Fnw&~IrP6Xra+I5HkUlJx zdH+7lO^76&)LSHJ#w?^1rc2$@$7Ryr0{V>?%8*x8fW(3nB+GjU{Y;~5PDMVFi&AmU za2_Y+Iuc8zFYD8gUX_IGGWmTkO2eed@$l>K1y>tK__%n%%dI~K^!LC3zy5IYbcCD7 zUu`av+@ni^P$MoiLXRXK2}Tl)8c|0XjVx!F(1<`1ek2n$vauyW*b+3Yp^@KOotjIq zPS!zaWFqA?GEpPNHSKT>TD+!7uEjG<&`*M#WVn__Qd}d+X`?(SI8?=H8t057NzQme zX(kV(ZF6tQ;{`vuLH_Uy3xr=(Fnps!5Iu1?+@t*9H9QytCq=?kItI^)*H_QWV z0?p7n$R56t12K30JPaE#9DU9Dsj;!Nwo*hn32klcwDHqOZH^tsl5?Qt*b~~EVH)$1 zBxXL&CvL8A&JfH;Xl2u-oMxJZWpTa|Ok(I&|xlS!}y2FQ$#K<@k zct6CB83C&RS9BX_hrp#H;kiWS;tW5N&Fv*2a9bY(i-rDhT@wYzr6F)x9jP>ad(QJ! z=rr8}eHRT>WGY>fpst&Ts5JAX!RRs9=L4bYv28ed&-X*0d47ugBq8d)Whflh#i0EZ zSM-#62olK}VN307CBHrn&a0weKF=Ta%firWrk5g5y|<4-*D3BWTR0GQD4ZlbU6AmNqladBY&|nBxtn^|5F>(Fv}b2CFd9cVU2PAM2;AgS4m50)K=a znF^1MgJ8Zu-oqCUME}i$;7CGzQGnDJgzj?(z-DzAtk#5?Y?H4xfh2i9iKnaCEGO~Z zk~Ftk9Rce#k$*#se+(ZZ!2fqZ5?dq7>2FC~)9)z#L6#_t&Bwjhw{Yvxb!Cc$W>_v=X;OTRBFO(i zmj46)MewUTuU_HNizjG)bQ8FD1sfc#fW}LJ1m93~`en0(8-R5?fy6AJp#->d1-Ski zxb_^lFa8%zlC~YkEjpvVn-!|Q?tmtouzVC&`ANr!KS6Ae9{Q)&SyQ9G`MB4dO z%DRK*d(!`9r;sNv|JU1ehOwKoT+d6~f7XoZ=4L#9C~}YF`kLkXuAD=*^;c5v7s%=H z9rWhipz9$0)vh(FdPx7bZ-cUSX1Lhh1=X#4p`m>r)cjz9lGc4-H0yz)9$(_h5C4Lu zF5jRiY$8zf2)Aplqp_(Lw{BM8N|O#ZFIVB(i z!Bz1;X{Z3I^jK$a26@}X{e}kAU%968eT*d6@G*kCC4Nqb|2=$+EN>(c-qe6gGRFyJ zaz(DMwy6en4b|#eFErJCkfX_x>Z%HS`pGA-GVhIEwjI#VvJ2e1+9R@qGbVR2!@e$U zak1?uc+%mwsO$bY4tDwuL)vtKo%C_P_Lk_~*%CcE_CULK?a-!c2YlPP4ZiEp7HvCs z6m-Uq?b@PMn^uBv(79g+bTR9QZgOw+l)2KUPcQWC(Fgsco?e~$O1Pggxze?JH>Ek= zrCV3!{?PhI{OPk#)#A=rUIw+#^Y{^}YN}DwP>*`K)|$Fn)YqFpTjk31MwLlZmfF1} z4fyg+?MS8d_?`@>tC?ld4g}PoG$eHGHy!W+K9WPL>;T zL`LxU$a1}unVX)C90AEeE8yh z&Ac;UOvNR638vYVrl#8{G+uSU(f~xv_)Yj?ISXYS)wT*%+sIR%8`c9F? zG)Gct1P=`)ac&~d4GQ!tEzw_q(nQaZc4z+;nyqg3G06^1Q&VYcN<2vjrC};in-e7D z@}<8?;E`+-KM6m66`;nBn(u^BkCL(?6QNscBD-lug@iZf1W9sU6Nz&kaH>dj0n=1^ zZIz_U+<6ZZ>05*PrfaxYREFlY%TU?rTfF@2-;{0bN8fyb{I2rc%}qg5iOioOYSZSR zB!|d@URNaHBIxzfu41Dii1KsuKzs0&m6eJ_&(HrWQBESTCDBHbjMuLECjYNCu(^># zb1OXHvQ+w)wx#K(MyE2pQYd}(p1e1~q{UuoG@`DwOp)Y`o* z&wv`aUn-#Z70fiL>FjO0mU!JeX z@{)4BbMsM_o{PqcO5_^zP;JaYbLMH34fMdxA6wz|pMHzx&!q1< zv_j(_e~$|5K6r9&r{q74;*xBom0MaQ_pU+els=?=e{SHA$mW+coLf3wn#ks=b}8~& zuS1EsI%tlwZb81Cdj<)8F5_B*qCv znv+20vzPJjWhkp1aLbJ)YL({~=oI11Lye6EvhK;3a!Gj0vr(UsiGmDqxdD|=vY9YQ znbNQMI%ya0N1DVT886QaDa%-3Du?nUrVAyVrjs-|Md-5540)cXb0bvlzieul%eAwO zl%<@sNfF`V=e^7gFLe*+BEx5d?&GtqG7l=_N6jf=FE8y)O-LqVam z!+^5~=0uK+m)6gG=4DI2axU=s$um1h-t(&kwlOBkL zLw>V4UwE)I58>vfEH&k69*smf&7~zLomIbE{C(qBCTXeXk(6*s#>4cLMN0BH^;JMt zb}}+`=Wz7Q9<|oU$jZe2^T&{=m-|ibi2~^dLrOYsolU^a;c>Xs@khLrzODb^3tZp1 zN`6|7DpPE!+1W_QNgtJFlKC7)4R_SAAepDu06OhQ6h z0+J;!{b!O-3(g=hLrXh{6A33&nDXaR&mxVR6}hP@%y?@5^UQ$rIp=UT`xH*3AHk{g zqsr`#v8({IW=@6w0B^Y2Iw8o*U-`XA?0M15iGxypAYn%mPb2g+Fiav)OV`LirjgL2 zOCnE`*GN4Qmm~?9MN~hsbx;HD^AXGJv1F5@hwSoO@o}}Gd~IQ(6ETVAMSH!vB zVF;cSgSdrbF?dlt ze5XXiYJ?ZuriH^c-XGl}?BOy#2;Ng7U=t_TJt_c>gQXuv`om?I54_@o5j)I5-Q zZB8*C=ODj!B?+$))vSw9q_KecC`*!AD_bMVSr+p!j$xKdvYdYAA()?XoReDJA0xZz zYVGD+WZM|WHgHZb57X&V3!H7BpLr=uFdxIb9?Fs^=a&kUWjx!WX_0H?vFxCb;18Pt z%7l!+xWOTc)FwGj4RC^{R3c*sDWaRES7b21l3>_x7zEeNL(zS{AIz7Az-DbUdd~AhzhxmROt}tI-Ibi< z`az)9c>nDq75VD6WvH^(-EpQToVN^t)7ByAw<1K5$-Nc@n26)0!7y7Ks7P!3Rgtii zI!T~XQAX3d7HISsvMWCrh0ggCgW%Z#ePF9Y}ZArx*awS zQuTM4BXeo{2smzvQ}Rsjy?CH1qsIc7n>$9L-DDSOODG)IhD*BwV812|j_abN9U*Yq z7z2ytL5e6>Wciwizah&tSc^Q(_%Gof zWcfevpTVzQK7EGf$21@E06aW$z5KwU>4Ny5;`!58c=hZy@c5R59|5-o4{iXD1j^*d zLzAZWr4m3EyrrWCAkVQ;Me@9&Qal$n(7hICX&;_pmTpr+u3*J7cmW54a zfFGK?O{no7fSLeLH2J!t!FK>EWN}m!7=ogRFyQbmKwfGaqkNFw=|_}yZjHun-@(}a zdl+mz@oMcpX#)@6d@jwpiO0=1@$QYZ@op^=LkHqi9}7I2xEL^A0~+rFmu~{kp5p1f z8+gk@Js;3)iR8a3d9KK{*H>Yir6smoIpFqBhk!b2lfMM6N!|w}qo3fB^u?2x&A9XW z32wf5gxhZ(;!g8J+<$!^k6+%$v**$`B(3jC|I`?PUD7`xu{hP!3Q659k=xxC8J+te z#k?od%sN5ewFAoAc0tp(z0vT4ISgI;A<4WSuFst!?WzV|TnDa~0ym0rXZi@eUv z9JOoK;KkL8c!rm_`1}^0yt;!oudd_e;~L;emDHVvrdcDg-?A%?_2~?~l{t!g_JF=^ zTaTyM`?P^1vO#M1kU#da* zl^RrBszyzH1sWRV`mSF>O=B%etIKi!{(W4lsKZZ7R$;=Jkytci8g|W|hpm1A(78II zvcuQ7^yz=Y^)8>_jM+EX6YPNvBPV12uz8plJqNRfOvTvvVHg}Ag>h5kF>dmBjGGXT z`0--}<1l{WI82%{5tFA*z?k@v7&~s1#En(qnKP$j-kiBuIDZiqEm({>bLL>~{5e>> zcp;W7Ta0=0=3xH9dDy*sC$e+1@cQ*jnXV6U>(&h!pNmS1yzxSVBL7K}(^fg5k>%7b zFDom7(O87yVtJV_GN4eALngvUX$;ECy3)Lp7hDnw8d?&z8mUu|Lk;sR1(G|8NP3?} zQk?{`W@be*ufi8~`e|}SnOpfgP-aN7vQQ{5+I-p1)}L30Nmgg(pgP@%62oPb>uPaJ z+Wq>c6=-bt1)j9~9LCOH;PHY9cv6sRvi+>=bl0M~rU6xT^@<#>t}B;ti6SIxYbsDz zBmGrVFa1^b*G&ecAzY#CSd)ZQL}iJ=q|r?xR{SN@zLog$3Zs&tOMD;-TM&v2lT1|c z@3n^iMqWUIl3=+N<)tFe16d7<^rfF>bxIf~VQNNmOgXk3V~({Vyldq8XktZN6KICz zueQrc5)<0o(B%GRzSPQnBK`4D>U*(tHflS434Hfk;IsdM7hivdQfihLX5wOnPH79% zR0t2zB(Z2T(!@yx3?wKG1^)pW*<~{S@E@UwI7Os!KAKF~5Q?NBflf`#ESVqTY8wzt z*ESxsFCnzPrY5v9t0K>+nu=0|s>)K;{~E#E5*iuIyc`o1S7oy8PM2YhnL0f67r;%6 zVtKw0)bi&>6*avZ1SGF7N_%eU^YM81Pbg^jH6GJ$`B%Tkz1Cl$VZw0SrTL(0nQv0o zmEua=Hk9MC^efw)-&lg23neJ3llE4ZsJf+8E%WlrKLEe~AHe5-#_hIW zA=|GHZY6J)dgQrd%*RDzrJxo$`Gv?Sq-mNeG!z%1svra9g(-4xCBaaVgxoTjJ7scT zOFx$vmA1U~Jt)7(r;@E}xfB(~gKWE|7@+|)GINk%HobtyyBKG!td74hBz zB-rU{#5?a5lN?EGDf7Kee-gBmrEALjA6?V)TlfC?O~Tw1*3zj}O|n`&(# zH}TgtlDL0gj=FYJI{hS&`K(bJaM>xSk>8wgqx? zQAgreo@+X}XAAT+`&Fcf`?5lLW^I)}eH|iobDhApkl1J6ag&Gr&amdT z1kDoBY!Sh+$TI41yhewU)jH^;yfU3YufsLzYaBa-99g%bbtgRkp%oG=z5)u4qb8#W zXOoJMcd-)bwHZjsJp^NEGVY7&xC5*1AT1SBM$!5M1di%T;- z+#K4!Zx5X8?BVL@qz;7d@8%A#{sZ9R>Ho-L# zTC)?b<#Tj$QSwY90j-hRB&4-`B&i7%ey`;^z}KV^>+0zx=#TzBCQ{Ga-(>c|eE=c( zmdow>+$>#pbXPlKTT55Odt=aclGp;IwY;Xr^%MP zpD%*KLP0y^v`0QLBp3m~LDE*X*GKtDSPl#dP@oAG&1QK>R0N_14?;jhD7=IHk&>T@ z<4I?5GVLr*rJuvmq?0(9cpO`g?ZTGhyRli^^+&d2^?@x|zHcK|>@{KC!EIQxXET=l zv=)oEtir-gD-;%NT#nfrmtfNRxfs804#usWjj^j|V(iN47_(v;#w?qvFnr+z44D^? zL9<6AX68sl&lrKoX~PgUc`$+}N&6;7A#idG!luR{V(MT-PKiU<#25sQ4Tt}z5crG? zhUc&VMe;iil0J{~hC}QC*hIR+HpmrWL!vP%ek>+TnXLMc=MnJ>Q+{2_FI3r|8rY|v zB*IA?OCP&5=VG=$o=EyrqY!eA87;ILGU{KWInY7lYM?V96UJd86WnVxZ(@JW2S7$Y^zsgbt3u|BJo%0F$FQ*Zuk5 z=iYmQk8!}{j1W14$(SS|2@n}f&KZ-Pv+;4Zu}!uOw!t|aCxWt8n{-1Pis zaNP@^!c{MP4441#5nTG*1GxB^kKmH0@4-b+--oMS{3I^@$;Yt#hYw+i_|JRt9xQs| zZY+7~UgN*;2M=P|v-cZ6!xxL@}*W;w`-hdOneJzgu+Lbu<2}vt)XFPoyPJ8l}`81~xc0YBCfyaxV zmU9vAK6&%}%4h;;f_S>B@>Su4-CSXQ>i4DI-@C!M>Obl6>u|!iuHGzM<4*qW_4weo zuQBnb%Q+d&vY3`17}Pas)j{c)?h?6I6pz)vNbVCqHgMC^Gv%7-o-5@q zmh&uIbA1cx?TUA+JT^a*1&R6&k&wm zvJ7ZyGVpwOVhF=iofw+x#=!WjXcLAehcG(Pi?Q(`%nkPg{cXT-2QbhMv}J+j4A9vM z$U|&aq!$WrR7*+Cc_1%on662VOzBM^Y$wT|mTU1vL@^oYi(A_W)UOq-2G*?u zR@MS5+`#$};7I^UX_w9%FxiUEo*)K$C0vftCvEkMpCI$)$I!f?8q;!qY?{X4P>)>8 zFy>|kFh0opBG)n|b>;_+mK2bc^U5Rvt5%A5UO8SX?y6OC&h=6UIsWTkfmdD;ztpFC z10WMaB*G^DL{kJkO(Ar2CeYHAK&~T#md*%TJ7VZ)O{0adoTgaX+U54Pqch)(F1g2D z*?19_N2B=ec^3o0B>Ho47M%QX2s_Kzg7edU}j>x(I z=Bies>Gmtocfd}VJbVvSop~6>|MC;Ga}z_F)G)BT2#;+z%rHBgVtXkpx6>$OCY)v) zQfxc6A={E|sOhZ@CL%*J1^V4O$^g8Ui>UG-E>!F-rx%o&S zVf>&FO{Xy!@?zp!UqJHcy?_IEH0DC4_uUgAt}G`kkGqkLc#(^7(@eQ1A=aBKqGM7A zsSDe`f(-mGQ;_X5uObjqctdETeuA5F&_>w+tsLIk;8#KKmQ-yy5l!v@(w?v}?cV6fIFMJEplMlzlKDz=7 z_5*g_5#77J3z1XyMeyM((Yo&U$cA0Wc;vhd9t0yvctbJx8{NqGyhyt?An93!p#L>^ zf-6xMu0lho9s!?RyElS>$88{^!tZiv9D$^*`EUcIi;z-f0A;B^)%Z#>kh3H^T>E4@ ztdh$6Z#yr`Wq-|nT*KLKGaaF-{abR94RoEPzgr$NeWl-Nd0BS8cT#peG)(Hb|q=KdM<{sPo?-6~VC%|B7S7hV{nAJnhv}YgdcAX035otyqcIUU}8H)m1Vc zk^B4HGtc7mQ%}PM%g#5t?wV_H(S^&+@s*cffh$U@sR^$My%mh}n2=lTbW==6pstXd zY3&U$6^JW9r_Nn;9u}Xs6pI!w!8zwH#(6ToYDn%BjbTw(Gsj&PqViU~gz zjw`tQ@O3mhK{FLs&x2LMN(HkDetFDz8*nl&AuhotGF#=(p?tgx{_H6YhEBe%y2aM{xH? z?lYzr*&YPjG|PC-d5h=UkZnvLZXmO?o%(I~%=ToQf^)VV!wJb*CV@Ba13yyGWm>{* zrXkSgc_;-g{TP2PF{4)7%(IpVS=YfZDh2*23 zApOSM?ld6%68Y^h-8DBA&9*GR{8C(h*KN4$w(D@oy*J^kTQ9@aUw#nhe(ZXj_t{%< z?&ojDIbXODXMgENob%XCIQPpp;=KR735&mSGtT|mtvFkB?l*47qHo@T^S*r-mVNhL zod3Q1aKZOKf{UMi2p2u|;Jhw*=3!j++@rYShabZg&wm_O|Ll{v>SrIrl`nl<^if># zB9A|6{0v|E^gUQcvn$WsYh3!zfA$_+_=Ed#@$(Phq8A>*B|muxm;Uro_loYu*-zeKp!y=(7=K2N!tKQH=zanXPxH7#6tc$?^#?r?IsrS=&n3dmWN!e#f z8g&`YmEm0FuP)Q^qXXU3AHT6=H{ID~IZUVdnUCet&kqAM!$Xk0_`5e6sC}LSba4r~ z&-wOsIP+WA;%w?W@;piSd6J*7n=YaFdCy3@J#)KRm9LPT(46sA#{-Xc98DD(j zKMkkgN^)`vh2;d{T=`uN$IIme$Za_Ra$DPB`F3rqb{HL(hhuC6(*q;m#*&YpzYLHE z7Xt%klgfeVF7!|LqJLtO2nGn7mD7@k$8A%C$V~L0X{sOH7)SryIJ!sr(KFa958R;H z5OHj%=+aLOj21N{>BffpFh0~L@%?56Z131Gy2ppHabi?7jK0ZXjEoNe)5Dl(&lK%| zQ=QzvlbckI10%DT8y!RMNDn%vy3m7O3F^YcU;)NtOe|V7Ei)`>M<*~kGK7w)5#(lu zP!P9W&M`PMRy@z_C@?dMiF^uZ&ttBTmVC4U-i5LL4ou7S4b6_Dd9+{JWfC*PwD&$H z@x>MTlcOUT9UsEbq+Fl0$;SQ`@o&VY>3(2hqoivqt~T$?VN*vM)1z&e8tIhlkhrcc z372#|axbLZv6&gPU=neRAuAn9UXGh)H%hqFXGYR=b^}dvewxdnz4q1_X$x_sIwL*u zLm!z$XL|=G#^svkrm<;k5Ys)jdfsbq6?$L?bz6yKxa0N!R9=M z@&ybxwPG;Wiq3czEs-?Z(=F)hko()wheEztI+?U6iH=r@Zz&)x9b7^>sX{Y>Isa@X zkJctBFB`+Acog4Ub}5+)4+Awgs|pTj_pv|p>-%UB5b!>`bA`UlZ;$bJa!_`i`jd~am0 zmfw;Lc4xC8j7Xbww|1kyxknz~esuJ-BfnAVNBdm7W?nnnpd@`65O#A_IJI#jJ9z%- zQ1Q=+iZ6>+lULL7MMDTqs7Y5LIsFum6_!)8&0(0FUw34{8+-!_lU$pJ*ty_&iZ56^bjR@5E;C08)R9%mm=bwY; zxWh1d$i8S@xI5zaT!~rNt7s0o%=NxiSg!G!Mx|*9u35gGLyv8sZKvTerS(xr&UED} zzejZKymU1k%eL#N@mfz?`mE@6GEA>Y!{{3OLk+JymFy31T4; zL?J2nB0=*eyk2RuR8q=KBE_;Rh<40XTty$@_3--HCL*r*C#0Q+uO)D;koFC5rv!pj z1hKG*VINUnD=xp=4t|G>1Lt33!3kucGFZ zql+t~_k0gV_S@O~)z(ziYjO|0@TDVY^F`3(j-a))vb;VYLQRuQ_|sBPne1n!%_y_# zT|`JuVE%StIj^1RSZ|7cZBw?5rs1)M+wls>%ON=-qONeI7(Wlm^{)UVe=_7kGT=5Q zXcGPqLV&$Px@32FF{T3K#-nU?9v>&`Hf+s9Q=jT6(Y3WCj@dnT? zF`u(UIF9Q2Is^35o_b{5Rfzc3!XH>`Ae_%%k01e`SDr)G)$e+PY*?Y^bK2?XC(zcu%nqlRN7Gl5rnS$f<>?2nEvf{*RSM6yRj>Ew zK6s?hTb~J_Iwk#SD2%jU`i_{q-`v$0aBsl$3(p|E@CXd-zdu?}+YgDG&coE2TI765 ztPRv)L#hUeB+WBbnT>+^eh7plzw`%b`7I^=@*GF&;EG7Q@we-dzQX_d2Wm>exed@c z?y-Tn*$kFuXsXs>z1ie-t#Q|^UWwJKR$%R#RmMCF{{rfFzx_4NIQ>+dbm9p(;rL^5 z-L+SnRpm>UEH)y;>9@cyz{VR$r9r( zTC~WdJ?pHq%!*p((KIYe!{{d{y!`UZO?eDwyuwAA#UQXIRNrj1xkyc;5VRA@(@#*Z zCRUh-P@k~>63Mq*@=zB`9L3`cB!0<~Wpd67D9;ahII)%YKN^bvH)SlvZH9uA?pwg#a{ z7@mONY~H&@#+%&CcYUKgLk%^?t&#qyMta)pT^3Z=Guc*0`#$M#i42 z8rETT{knN~b>n)htX+dwYgXZvsug&7!wS5*VI^Lv7K#6_>tDfZHLqbs?FwUSe^vde zdC^bN&c52$r|8$PYHtnVnc`pg(Nx~OAGyz%5n)>%|G^XRp|j33ezqs=mz%$0ARxc& zQsXk6nix^jCJa|IC5&Ufa~Cf%F4O3}V7W}s`{N|uKZ^HMO|vkZWil`QG@HUQ)C>#D z=ehMcU>&p`Ov^Mhy~1>K>F4uJ5rPwd^I7NbhvILG;xT_q3eV~4?}E<<>ta@z^J9&O z_0wmI(&viL7@s>nTQ}c&i;i zXj+9PTxeE>=2g^oIge?&g=Skc9nHAVUOE4=gEq|>e)rw?nrr9Bk_$g9_x0uvPpg*f)!^XJ7h3_IceFmv6wiU%df~zIrpx`^L>!@{QZDuyW#73S=RbZI zmVE10IldFizkfF_e)1!@@OyXRg74lfad((-x)*-$9ut4j6ZaYSvS;qcrO(`pOP;#V zxK}*)AU^#3L%90+M{)HF51aVQp1sd(lzPPv?#GoscnDYhNYec15nRRiA3bC?K)vJ# z4~RY@#}69!qG#p&Pv4CzfBYz}c!6mi#Kq6aJ$m|Hod4vVSoXwSSo;0jO}OS~{Ke1R zKku>}re`^Hmva+RDfgmh@10Lq9>4sV`%Jv1(|XaR|AMFPF&n6w^FMVbmj3V_ocqJO zaPG5r;Oyt_z~Ud=g+)KQ+qmca;7;Q*oU7C|p6O{~hIwc<=aL^k0NR_Ud6h-q<0h=v z8qrSv8DG5`i@tM{G5vGxOCQAzzxV_`{F8@q@l$u<;;-B?56j6mlxvW6kby8vIY=cr z0diYTfZW!0SiW7`svQWuZCL(Y8B7^i-mfdmyD&W2i{Y_N7#@YmG(I+jnc*?Bs+tRB z)0jmPGbmsaTEt(Nom@gj`pxxu;)8OYx=){DvM0aHF^r9CG5fYB~-`!O}V zQLeuWa`osTWFPCt;0!^zs7KUSgyyqDV+NSB?FOa>F)IJ06-9&czqILGulWEmHY?}C zh=h+y=$Mo>f_|w}@8~$XM6F{}$WBg4yUxNtGmezBOGer_Jlu&ExgS%QHuu2XfX-55 z$!#-@E*kBf!GuIl&dKp6R&fHY1AXX{dp9QKj7ka3<9*W3V~9%4QWBDs+5`q#5a=o( z-Q9_7M<&Wcog4SdNB}AqDR91-Yd&Ha(VQ|Q`neHA<>dXs566PTN+LI6uOg1qg*m- zR+~qqzM)LS*wo4watP-V$cTR`>H*fjhTLV#;ooytY&z*U^dEneF_VK8e*ppw=Gyte zAR%r{6wf9RNu}VE2_fx5D}W@pCg7%cTrLH)3M(mw6MRxUHfB~zW$LHP#P zIy5w_MYL)I;_KyHwI1=iOq$WU_2{_uMr02>08>XF3ID=a)Qa_@pc^BQ}d{pPVbktvD0~Z%=|V;XL_xt=Fu`VoqZjYhH060{V1)M`gzVu z&xF=#K8&`@Gg%CWyqNg<=a4vJ4`9K&=V5vH82Jq}t~Ic{B^5@Cq$e=XB&3c6{ahAh*}v=sDy7%pQLz#`fJA zJqPTG_zA~h_UZ4TGqM^rp%w53YK>VP7eAy(`=q@dW9B95uSU?n0U=*4Lf(2r+#X}& zob}NFuw#@ zE2$jLmP-M-N&!3L2y82rr$AR>?^~6YS4rjP-8{U}e3VJaZ#CreW1yiCli&FYf`>^z zc<|1^UhhKw;00*E>uyZRJ1^|1K_Kl$L%8@}O!@0e<367L-SNF z?*_DmYJhbwqxpjKk=b`|v>m%Q+$SwW-?PtP(CddMumSba8tK#I_a$S3lrJE^AzyLj za6*2gQRzdZuM8xlzEaPGSH@nhh`DbH#hs*a9P4m#fZC8JFgMV=YMrqoPj~&gRam!n zb;*{y^x2KIX7kk>uD=>rUU3R&ps2UopLHp zJ@sUqa~6U5d1mD~-LpP)riov44x#zEIB(HnoO|xsCf%85o?+Y%edu(YaoXuP>#Pr9 z$>Q@&zQyM*GVw8GD+$~)(rvy6M{sizv~e$FD6y~IG#v(G*kXPo&V zoN>mP#wFA?aFT$0`GqDOA*_i%;|!Dj^wUqr$tRwIlTJDbr=NO;@t=C~X*l786L9X? ziwxXfvUsV1{mYgVLH^S7mKnc+_=NThJHH6}2}}t$2}23|2~O!}JYm0qyUUjwfJ>;U z5S8gD1?}9Bk!3&f(MQogIADNsZ-1ZJlclYr9o(-aA!G4GPR42ZG?F6vV+7FR(ofTi z9Iq2fYdGC#DrQVFa?^BQ)F;odJhu^fhQ+0y;r^J!g}rcx+{QGRE9f%&W6%1LfA|2YhZH;Y%4T3_k#DK1gx2tI^- zygV)Q^Za~fn3nl?4oU&Ff^*h|0ABBNIInAsPjuW0UjNqK6khq$iE6NGqZ@TtIBX0J24ej^eaSKkr zWC?z~{uMm^=bz#0zj+Q{`SnwH>=)n17hd`{KKqkz;4?3L1)urRf8tX=`Z7NJg}ZRo z7w~tcgy% zeaU9h@Z)b;WOVFJ=iulY&ccz`eaPsT8_&iux15WU?!5q~d}KLJz5gPd_Q1u)J^8*1 zP56oToR6b!ImhVeThGNYw=FU{_V&d%?vC?}K6u{+IO+c7#y$3~B{=5J^Kkq<%Wwh# z|J_S*#-o?xRDJ}IG$%hG=Xm&16L$I|m*JELm*e!0UW!v5A^hh@06DL?r#^ZKPXE|t zIOF4&Z>A4@;tHJk$t#Vx2{5(zOE=)$FI{i6=&>8jiv1;Dx!Jh%^CJO27@YB$t8nJ$ zt~TkGe)Sey_{}?T(YNn1X>BoX+1GBx`Cq>c7kuM(lZLwF@q2LTckjjJ-~R}%c;bFs z_0)q#S3mQx(KXLLf@`096xaXoW4Pf*AIFW)e*!nX@JU?xwo=e-1fWA;m$vN$+$QC{FAu)r;p&8A3uWYe)=fx{M{FD+b=(j z8(;i5u6^NQT>0Gnxb%s;aKX24#iftkiZ4I;b@P|;y}jMwLcpG$F0<%wTTHM}PJrB& z6Ck&>9hPs`wrYpj;UUb?tVFMFrvm@Q2e#{O4b6mkZI3XG-!QmOs1U}_wrgF_e?p1|bzjQD3kGbz*E-Pj~Q zK8y`xth3G3f26+~{oP#{A05Ng#4IL;r!X}+hl#m4^iRkSV`c(F!@Y9;esmQQz~lf% zJ91K9j}hBpW_%EnQzPgf=|k5rO6)TlPS{!UB+(u^gs_L2m3HC_hVGreL~u3Vpz%_m1`QA#vI$BM{dFhzgY0Y zMmMJAM~(rx?(P{(c8p@CN74_^VoK^T(Km*=aYEX7YIF$G!-JR_>c{k8 zKPE=|&@&hWE^cxDRi{_ z{a|^g)O{$LLSG_5eRV zn&g@qUPa5j*CW4hKTPbm54v{W9UZ5fhNg!<3b@=DjmFTPO(5MILa0>+)tzC418cx}D z(evB&(DT^o)wS~|@YZ{6hm}7Qnuhr)O~Wu_`#hV&P|$<1uYLycLw5rXAT0kk%b(@-Qc9S?bqwm&5UL5thdiyx-Ek29{@vHqVm*xo<_=hhX%l&mb3RFssLN(ob*EkfVJwa!tzSM z+z#84oS-kH}O0v_GUlUiB2mRIZ z`}M*j_pD9Y3cq+Bfs+me4wk-f*LR`&!2OX~ej#RFdl^|z4MHh58l&<)l=oiTFVFB6 zV7WqT9_#rv%m&>WXXksXQb@k7qWKlwm%|B|>#>sv6y4Itx#gIk+&uFluDDNof=CdS z%h<^kb0L##z_@1>roZ(Vg2x_?)`Ry#=Ewt(zU?~9to}2aqcYZrxDavs5Ug?|?~9p_ zSq%vj#m7JXQGD{_pD^yn9{ngDe)vH=^uU97 z@WK0W=k0gkjyrC{?YG{B8*aD`S6y)>F1h3)Tzc^(xa`u4jeFq*%dm`)e#v4iUv@s0 z%lL{m+7~Z62j_g~Onm5!({TF9r{Kg79*++mdmN5E<|rJ0^f5SAbn=NO;n-u3#nDF| zg`8BZ& zeuncSz~M(8VOCtXcXk-FZ!I!+;U>;pq(XlxBjXskN9nALM`WBIm$6A$?g!t?1mX-Q zAlG!6T-tzj`uUf2YSzrW>tdz%DL;5~3?T1!&K=CYHl_Eyy83R6@%O@yM)F?axR-xT z$&God)~>+%HLsbCao4PT8S7TRYTT8yiU0B+jk|Ki%f-!qI_%tO~A}}h7p+a zuK>6Ln~Z|8hnbYNpa`h9G6QI+t;9I310|>@hXCCu>{3`|4gJ}#T7qRXH-rQ`K zpq$cGJtrU zj5nYm*$7u5i2CLr>IwnWHu+JL_hCcUgQ|?%h+%g4`m_sc67^UmW26<4YP=S$!pqUM z_-kYh{t{k|KZjOrre8Py8NYG;#fZm0ul)mFs{S2b-0)kYul(w}`0B5}hp+wS`}q2A zpTIYM_oNa14FAH5-@xa8`gMHv$6qyY|Krbn5syCoIXwL2XYkMypT><}x(7FZ`99q6 z#k+C!XKuq)pSs1k*L?PNbIi?gFL>Z8vw<#k{{2@P@%Y?(F2U)ypO2GoTY?jBS&ZXv zJO{^Icc#&CH=J$!45vPL^CF`YZaUY9amU?sPH}~P>0BoT&edJ=CaofIO2>-2k<gu9mF_&b;2=)0HTq|aZ02@AFh7pL0t39{kZPghjGIXAIA01J%VeW`Uo!n&RzKMV|U`EKmNj)j_vE~F|3KJ z$@$muW`j=$I9@I%KyJ$kklWf0%eQM=wF3bvfjRm_J)6UFniZkl?U~Vj%nSlE1HkOi z6y}Bq!KaL7hbDljO-0+yLz4y;V`$pILsS4h~>yW)c&Vk`L1cB4ZP6p!b>; z_m>!cf5>H$0gTn(D9F-r{#1tk+rX-DMWMW>Es?jmb&CFtYQsO5jjmF1E`ISIIS`lHG&(Hhk79Cq0uwXSm?8L=>z->LE}B;97k{T5_j5IQpR`A(L{3S4Cec4K zj-jzhj7c8)2c=C%q&=s{C$MRfE6_`J>7^c00n81^IR~XZr>7;&2u5k1Ws3D3LRWhW zI$N61BOT4gmKGGUIb_orGq_A~)pAEGntD2s?dd>Mdo%j;d5oo-M6Kw{cF3fl6NTmu zwCCH6&GOC`Lg^^RQxVAQU^7_W@pp&iSq#R~=uM`OZO$OtUWDabJ>HW{V<4W!P;(2K zWMCX?P9V{lM!XP{LAD3^m>-*>jc9-DeyrZ_KY&9PV0xEbv2p){&~w%GK%E~m$tG+} zNSkqGN{dVmH+tae3&G!=L9Wn+mP`*ask{M?<Foo<4v!SX&QcZ7{ z&GIzd7UP+RdDYa1nqpC4u2R54Il*!bbBZ(ZTY=@e;@nAQQ%6Z#<64hunMk|qS0lfw z5$V-FR5f}ed@Xuize7|8EaOKm#N_UKA-M2x%zX3P7^q!~RJajl^TI8_a&5y(()QH$ zqBJkd({MXXj~PxsT|1p!4<4&DpDo@meI{52)7jTz!*|W2=cBa#l-~bxY27qE!|0l@ zOb){V55~UoX~YiM71&>X3nf?{I{FCAuKO#RVy?|#c}^yo>`yAeas}l@7%t~5#g~J0 zt~583(bDFaoPd@?YBOoIWG1tgY~bq@UY@^P<$35boabh}?7F;Bat$%Lrl_=WIA>sa zOeWfqR6r)&0b`DZ8=}s58qoZaTai0zZ(zS2F}wGUNE~q>x*q!!+JbfPr~Sqrc~hvk zdYp9#q>AD(ZIhS7@=&tq>O{Yiv>htRO!&oRS{sJ*m|=QsOJOtxxpCjUL3N@nBwGJK6e;?7aK7`!PI|Bsf zySz`@b1xM3+zFW*&&Sxx7mzNj!}`QpV`_yfTNB3o&m4;&M+2=A-iL zD*!K-4a*gnYxtI6`I`~zWc%N2d76&k+m?p2k5<3Ja?MM>4QZWZgJ~xb&@!DuUkz73 z0lLc0r}5?IE0>+$Np_iAlAce+u;O0^RLT3pgL?6&8ft)7|A6!*i!ruvcX__vgRun% zAbIl177p8l^vUNxu@< z9FB9WV{41Byk;G02saHZFN*$J2{)$UM6bR2XA?$1&hZNW8iDXUDE$C8nC5SYza{e= z$Zw1b2xwZ)Y+PQuVg9$Lzd8Cjj^bbCF^%RkzeRDiKVTZ>*S!WbA6@pL>{Hb(_TNQ- zYr70DzIXY4jheo@X#R|5%Zl&0OhVqrQF%|uy<#7nkTE{ZtkI=E67ZWk>Bhi>{;apF zj*BMhitxW=@10ut+6rU$oi1&`zxwhk#{cqP{)#{S*B^~u`RmJA@#p=au{E*&t)$so6RPXVbc!%uSDq8PGau74 z4PBP0tLF`*zw%16TAY88z`s=BYI0p+&W%4cjF6mvm7u1I2+XP5@3wPVv~7TDjpS+dgU_0c-i$h)yR(THjpztPW+oP_)hDUbB!Zqy}QCcZY_hz;=u)MvbC%=yuf z^`R!|GGZ9TV_%EBKbnFjjfS&4mQ|ft z@Snf<9v=JI<9PI`FW})PK8KHd=aabeYmeZT$L`1VpSv4Zf9iHz^@&??;e*#;*@IVO z$^BPh@qJg|oVzc@*>_!nv+lgu=(JnT$Ei0j!^t-;!HL%|#_`vjgJVB@7LLC1LpbV+ zGjQe|7vV#9<~B%0FD4Ra9GT z)U7ELcPsAh?q1wmq@g&)9RkIQySuwfDS;LZTA)B7IK^FpdvN{p{paGGaqjj-#=h7Y zd$0A*HRrR=7yw@``T?8S9VFX-AK%4{_ix_jhsmEx8hJ9~bRAJrdfhG#=HrYVQQl4> zi{A8Bl)~Ick<{J(DQ9l{{Wd;OlVlvPOWpbV$F$7JCR7w=nYEp-Z5rYs6Ua3FvQW`> zjw!O$$77lVE$YFC^tefJ-yL5YT-MaOoib!uTu6~Hq{n4TEw+^!i(E6pjhyQ)js6`k z685OM7$w7aAiKd0gzkV|g5nCRMt|U2q?y(IqEivfs)WkQNg1KYkQlZp!3P$b0hy?^ zpZ1=(@g?5DxTGTFZ*3GLE0qTKb|gJWiLf=sb0nX21@<$-iIT_$BleYm+?JbGR)l}z zjE4~Xn0R{I{{4%_TwPX-I3R1nPO`9bqx9$pPH(a~kyDE_v|Co=)}_hY)cG<3Hl8V@`;PY6;9E4jF~V_3kO1Ty(6l(bBj| zO<~QFV06K_rCsJpF@Xr`mZ=@0NX9@NkmLI$2Y)-P{s4K>6N-VW=zkx%9b9Y(m6Vk$ zu$8C8q`1H4E10II@f(&qizI5u#r~=67Sm|LvM4nH87=`GTnO7Mm8Uoz`YACybocSH zY#7TcBr`$w66w~6LfZtoBI?FGdIBMy4mG%f~loclCh8U6Cw z8~A2SJsYX^U614eM!4cjiY86XQo)rVY6T-h{E_mwo93EKuN@-^yn{o9hFYYHM6Yu3 z+~mU%`k8lf0J`uTt2VnxCcTx7#u_H;PfJf-=DvAYejPgYo>frsOENMQ+mv1AiZQXK zUEsco?UWfSZBZ=UY>rYTPn1=MvAQnYLqoj*kcl{pN8T4bmLgrZR^CXKPmy^M++gYH zO_zuT`J?8}jM;oButTStJdh7)?QB~v@6_YS-7c_U(EG+Drr5K@J1-|T5Yis17JHr= z=7+OCM%&FUZ@P2{soyiIJ8CHb(l{hRAI=8u3>-UuD0#Ohdb5)pEm?b z^a3OHwYEm;atG-->%HreV+I@=ze~0-2VZlG_+QtT-r6Shew$m%mh$nwI%~n~i{n8s zHI4bRB=pzHtd-3L$+{&6JF}J1S;m=XB$3BeTW#6sjL_uS&0?<=wy@c9{L5!l{OIfC zgk^>)F62x8uD*RX7xuir*HWoW(#IZD2D2B&FQ_M2=lxUE_5GJMvqA4YMkBm(=~IUp zEW}t+bByPHU+SriY&JKz&_`?xs7hFPyO)Bd-H0v300-{xwJ!{w^G6*;E0PW6L@J82 zrg^Ca@_)^^sOBm|Hhqsh#M!8_+LbD>`xOnebUE=482astKATW$hhzDW-ux?jm5~X# zoBD=?+6h>?HL;WO4=Q)*dKb{`5Uyj&Xc=f#8d$DDh1MrOpby2jFLQ$nh9ujegOZrn zt-(;?w=Cuyed+W631ynD{XpamqD_p7VB-)iCVZFsa%`j(M&b7cr|-oLk`$_ON>ms^ z@!wy=SLBkpH{eKxkY5En5ZZ|ys%&f^1+SKK-L5M>oCYZ`TYM|q?mbHWd@JccOpJCf zOuI`@ic5Q(*1fzJ#j_z4q(p-zOuy+Wo60e!h|%Lrd-`_J89u)wuHcQ=xf_t4#_=YQ zOGo4tK!{5v*l77F*a!|)mcrw? zawScPI-j_r;>pS*i&0P8NKVa#2-fsT-FxEahN$6m$Fj+uqNbA)iIVLb7~j<)&lGub zcO_p$c0IPLt08D2sa-?r`(^XMER?UtQTD+`n~2OC&mLFKWlC6VNQh`il>LTBd~LH2 zA=lz#2lVZ(5Wh5EL#JQHN6j&Z7$X6m2XIpC1R$!}(X993x<2PzHuzh&6Yr3*qH&K! z-D3I50P)W3kuYrjM;cJ^tG=TKWxun2T_85a+z;97rHpEmo~3fjK&~imh=t*xuA~j= zt^ekswZkg=)FI$wvkjB*55hVV>y?MYX`3Vc0qj}y4KZnfZE>;=A%bIw7@Es0S0<08 zpjcG9#*mwcoSQuM)3kR3kHzDo@e}J1U-{FT+EDnBvB^Xa;)XJAyT944_2?w0WmICO zjVHvotg33Ly0sNh`2)!Y_T1YmN2qismqp8%H&zM)X`NPd#+7~qqh6k#-;cH>ZPO>p zjV{DkVnrVKs4B<|kyElvyACRTw?YJm$HTS=xX0D zi4YjEyJ`^q1j!q4eLKeK_pj&CXoDt4J1_Mn&MQjP^`9dQKNgf%NCik&$=nZPw!OYQ zy6qLTZf6>~^hw>WL~zu1Qf8TH%`igTdyxeLtTgX`a5XV84A(Ro8S`c+1eH3tA6JHG zh{`)2UFK>s%zeQkYNNU=k(Yb>;1^|K+HOeGiom$&*uSXj;#asB$#-oLKo&T{#xhp5 z-JI`nle5c1I&Lj>PlA>D!a4k{C0+fM0F2|1lI~tqwzUCgbTz?W`Av1D4vAX@H-@2YC<07eB$j9hnCv_^s%*xWd^D?Xq3?uqjvRw<@Ny z?St0_Caoy7R)s3wU;7P_UeK?wkG<;$9I#{+<$~m}*Pd*#RhL&ip1Ncr!3{8A7vbKob zH>91;AKQ%jlt8=5DLo7>TatD7+w~KVAM>tD#ZLw!(=mhG>-&mKI4-INiSI1?9q;5< zIqm{ZAa^EXW*5tcJ=t!N&koNt7kwN(zi)$JNd6}*>jPPV=h*(I;Q9@i%nQ5ptFC*{ zgOLAj#L#&RjXyq3(5c7Z^S>mYCuGTotEvmQ+}MY-{zxi)c{k*C)=D#IvhIV{8gL?Q z{0i-GAG2)T{ywoD36b_d;(oaM+IDV9GkBRaBJlLH*8N}z)UTLi9DzyGjsXZfL|M5l zNZLB;dFD3#{!H~Le2%n5>BG1_w7oRnIFw@y+X#rT(~^$>=7I}yjuM>fAm>?}m1v;n z7d%2^sHAA{&;$$T#ISqO;znaoC1!xY^M2tLhRf6yQM;`Y7M}2iKMBKptuQyK0=JVmyq z?6_zpSzdmBeEAtUnLu*BR}cEAk%*?sGxMZ?R7lAMTYRFXMK(oH;<)+D{*TWYG7_TL z@uOraQj=2Ay+7%$w6MQyAEPbtC4K@gd5so3x(qhW<~QAoiahP81%jmo@F+=Cmnt=p zQcVweMZ$61!MzT9qB87Q78*-w6qPtvx8ySd1G6VHz!{d&L)b@m*d@J-%gbZmYZ5RmtaPq)aO4-@A(Zt$oz5}wmpjbqm2z0)df>Mw>a5ScG{klUZR!M z&zv7lgo5<(llD^LZDYgED|zXuE(wlf`<8Q4y`0j#PTuRb!?O?NY}k{;YKLmT3=nr~ zuecevXEPR#*Zv-6m82BJTs(G2qu+9uk1%+;3;MItvOrW;#~ehck`W4wkVwZK2J5IL zIjgwH#&uW-7-+F^?p@58`v&x*2xNbEG2JdbEP}>HY%?A?WErruZa9{e$Sk zD(UjJ*`)7pQ&!0bcPzbG2EA2U!m{`r(Jm?j&`G(o!CEG#{PLu9)b3B%FUd-afF>qU2URZ5 zM5nOypuGNkL_qDvUATVzvN8FL2R@gK2hRfWLtfQnay!S5SJWSXn6 zthg#>0zZTZn#}NIK4?9(GDbj!c>&d$i}oC%XIY_cG|*Qh*XkKoQ;7)nM>PBGwIja;}oRWsHe zzyYe!%_`xd5onief`6|L;D9L5|At;M}mY+ z+p@}V__cFNd!Zl?c;;sor~&wevfuZ@@6S)w2z_ud(ke@RmaI z`6}&h+`BvC^=V@0e8JM}k4Vq`SO2qbN!v$euk6yW9PLdLR9uG9xXOiw7ZO>yfqy^TUW@D$hWI;vi-ZySS=)-e# zKd#VZp?T4VBHkkI=eO{^$K1RZSQ7iiNI&-qJ1pzFZg|gM_si_L_j%ouGOwO!fB%YQ z4owu>C51cgE5q!Tiyo2u_vKeGi|uBLJ`_+~0hwd~haLlxNnrjWj@_^N(tt^iuTp?5 z!onF(Y`~5O@k^9F(lY^g5RdMde2%{Tjhz>1OxmY1Y=mqY?iW*U{CX zZ?F>4FV_gZt30-QPFN7)T0!e!78vZ1!Y8(Or)MO$3oX5|@wNG5?VlDu&sI6#l&?&Z z+sNvc_&NEP=q*uCPLM|rzwcZd583m5<+P|w9&b{+UUfKyfO7cRRwYwm(10B4 z#B(oc(U@&=im&JxJzv4SV^aEP2EpYw2+^J_)}Da6%xZL}%xJ#)bdGJ_0aT=PQ)8mX zWh*<+tthr~=awh1{p#DOG}1Vba6!FDE7)wWPO+;VCm{rd@D!ay27|PX=L_YGTX%b5 z-s?!mW-~TNL#Y?BY2D|T`9Bq({?!eBk8HM?m6m()BQyJ8qu&!<`-;6m!j}*!fc=VS z9@aBgE&f5Ie(3|!VPArhWaXhX)-;}DI0xO?fF47qJ-D#EbNvgDYKmNN(3+ZO6Qs~3 zR!Mp`G2$x4b9Txs^Q0-=mREsmhf6vu2yS5hoG^=?lV!Wpj!CUoRet7zO)Fw3TeR5f z`mdUz%Z}!Z7xSywgq6&{^>xQ!vB#?3-avtge=pxt|G#c5EkJ5e5VidwIMJoka}y}b z90@nHW&hDk@csh)L1M`;fGrKK*_+%+b_a{?AFJ^2PP5^g(7Q+dp(5~Z*qNSi8&q!x zr*MxZdc~@p8c6IaEi-BT@f;PI#9rEoeDaB<@Q97{8v|DkwpX;T>PSr~^n`S8Gt6X@ z7Y?p$=;5=^c!>%bthmiA;L>DxmMNyO3CL?maM{~3tycPu#T4=8U1*57eyK>0a@Q!k zw?Vb7z-Hb-l?k14FD&!nE}U8L+MD*NQxB?fp`V+{w>6knlNgO}Rg-8XSvC|DnzLRS zZX#R$5)4vV^3Ymx1C~C%)K+|Amh~O$x8YK9 z3Jwcb0q#kj_lWwh4u-IrLd13x{a`GgSI^nH--bL7jud?TvozDHOKu&;7?aM?E=aBt zCwatXa}l4q7aA8>d4h7SEpk4SQI<1u&*t)(jR{bx3gV9ZmS{qmvB#xN`*3@)XTDRN z#@l$-WA1-OH5qs(&HC3IrPh&;Fzt;J2>XCJ_h-tR@Xnn^&C6ddT6CP&gF7n`8Ulth zTQ+fc9jQc_>%m-KbI`AlHr=++>m_kA!G9nH!PEE8W`SW?0Kqy}-n?%p-{*^u02A~chtj0! zk74rON*fzplQ39T@(+(*vlB)3Q~{1L(Yrm`5v-;ia<&52hOT2?3GD3!?oM2<$M2*z z>it4JnIEY^dp{?dxu$`~9+~~V9iY+v2S>^xR2;)A@H8%WZc?B?8yA#M&4!nO5Hg2) zDho?_M0h+yJH8D1vq~bDqcK_N7o66jC(Sah`4Rk5t?}1V46JRh(D*d-nWs;+=Q9;`I(k6u z5c1OjNwtiPna1fYw|P>~z<$WL-yVG_vM1!_0nPmQt_pcq%@;(yE@hv)wC~cndV#UK z25pNhCmEd@Z;M}5rGGmMJ##2b+KkxdJWC{m1>AKiZy7wd&nRDwpKI4-ai{Bt|0mJ&=V>#XIyM{U!mUl16jbtf1*B=?{ zhctLn4=VAejU)|^sJvbqYi1^rwuRk;2Bqt zTw-fE(8m-cf^g0+_QsRA#7a`dgKEH=SEkhZS-RZHX*1?=iuGAf<$)^jN=?NqGew%4 z%q;1&xo2QOKB?5c_sws78d;au*Mx-=z?%|Qax+I+{uvGjxw@)%2|vl(wq|#ckO3^V zQqv?ImS`wYYL#d71L9PP7`)`ILm;9myy)XG7XPR*Nn%HY=FXxd>%QI5*XM|@gg6hhBTgo>b?>z<`7t<@5&bd){uJUGgYt0JGd_nxd zos4Oqx4YMp7!du#J+bRty(_}h`5$IchhH6kTAYwGPz%JnV@#lr-cx2v%luCI`b0`0 z$1e99qKL9GD%p~Qg{2L|A3m~2`^SLqVmx7+NYiXaqb{myAwEQ*FtOJB4-#~HKXRlr7yKqR-y8?;OJ9xP4w4IWu|e$yX7gr z4_C0(fpy7kXEg1Dvqbm9D#(3gOGOKKrY-q4ek%%FYED$M_I8rmQP;1?p!;Q(?WoTY zDs*`}A#4P`6neU@4;l=5o)6l@4Z1@Ld|Y1N%IbMyGWEYueA-u*=@Xcc3}Y$sCs=>l z6}hO<4!|gSecFS|UD_KI>vt%p9cR)jU*}Ekj%{V)I!?jM3!Zx;K(&*yWv^9dI}o?# zsz3as=)Q8nvRR&{J(QwM6;+lfP3^tn%k$~S=Oj>f;MFzmNShST_Sc*v8*3acmv1di zcbfkS$ICkEkSLayrlzJHg8dxR$_X!gj0VI6U~Z#psXXHo2YZxxFr&u(A4FPOza!iW z>YVrOvOHRvbCQGM%}4}mdF#_e+}q$`cZ zWM-zAbnRRjjFPW3`DrpQs5C2eG<|cQI4Y&oq-H1Yr9n$0G@nFum zJ>rwWb2~%S7iX9#4R?>9(0pOAKOp>dc?{jki^)TFRkeYc3K#*ap>giGzvm#>2IGN)oS zl!;mYnWW&KsFv)=$BQW@!K#X=7<6t%Dn1u6-c?YL=}B;ns<{uT2iM!#vO7NKO!cUU z#Dr|>{r-P$n9Nb)eEfg)r#%K{N6G?9<*<^j)Qw4OP{r4a!7rt76=or(Ce@&D$_=$L zQk)T_Iqhk#6)s()>`F2zfBo0}qeno14dLiT3AJzXH(tRdhP|`?g-PDQinZ^W>`g(=H#jpyotjv=%Y7U79iWfwi)^*ej1u&nqgWYQy_~5>5M?aZq8}id9Ou{ ze9u4ir7sQZ`Hn5F9}bOl&KmBb#vHs0y)_O+`2`(5t>WV1jx>8(_?M44U^@4JeEH%} zgoLMKHm7j@gHf1wVj~f9ky3M*Tm3+{EJJ3iqP?vRJ}5!7K{Zly5IBKcqW3G8$Cv!n z!is(vlHe1U2rj8Hji12zVppmzUQdL<#pl_?v=c#)k!43op=bhh`bSVWKbXmCh>7lN zZ?#kL*%+Gd;;7hOz%xbJ&L~Of@Y{|Ks>&-s&k7yL8=>G+u9OgbBY zes_XQnG@I8|9$F-&DX$@ukVT-d_WQSX=ipzu9LJDl7P96di=<<(6-TK*X1I%G}jsL zLl0l*k&rGE=hh&)zl)GFU$yZWb-cw)v8V4#OG?X$q%61UvQfpRVWkOtuo4Jz&dA*M z)S_-IgnoGzT0_sQExM4j$u1cB4fJI;lmT`ya2Aq=;lMqp1`v<(uPwbURM zrU*Hvs?0|;l#uzrq=y-t-kp~-6t7o+##t*zsWMIMqRbQd$tgKfDp1oxVI~l1^RB9; zCiwO12X6kL8?LPp7(M50-t3VffQ8h>EKavGa&c4ZLuYC}-CauzhddbHe1$|XsO2be zmW~vpIBgcyf`Xe%(T2#4?aG;CAY0fhiw9Of5~p|xPgs8-GR!JU%v^yxx)B*e5Tn_?YaR*ks#D6!0Cv2c^hxOkU zvGr(Fs?+>nNG&Xue0Ni<^-w9E8_Ql{pSsRHMy;6Iys&Q;*X!y}SOcGS)I^*O{_TAY z*}1p1c-rexhyW+?(<2{hUrJv84Fr2x?pn*cZ|fieBX+Rh ztkQIlIG~Z!6(v&uBxxEVR>9kx`tOM%$$4SKGI7EVCP{zh*-dk2p)7(@0l5`9DXN9| zXetxR>$x*^bjCrwM_wjp4dMpj5b}Qj3U^&V<4?!22j5w}nNQu{M-Wbd2LftsW450Z zgPkEL8$@)iu@jF^ji#B}{pdZ!*~`#@(Q@k36Oylwq6$!Od zF5|x?!9eyH?Frma`-IrOJNK^9Cp>TB2K&m=ABd<6cZlY5=YFg!7rQUo{bZxyS+yH{ zaUj+h^toj+eo2XhpUGg25oUzLzdO~Dwj&zK+tp4! zerdoBnFr=*&)~-r`a3RvfWNJS&Z?F1sRp2stqRAIe-mw&O?p-NaUMar7S6k7-I)q9 zuhX4O@ExLN18(}t0x}3r+`n*NX2mOpxH!#5K2A-zA<LfA)|Rl?n^VDSfc1ngobfl8OlGYdBtNXj-U@kmr*9QBf_MQA|+p_~ooz8O0R1 z@K5oGr7k9+6vuuYCpRkP$XucUd-OVPe|kdrFj>ShZY5zi)n|p>AuG!|s*_#h%Sg8K z!8`ka=0XPGM7)~yuLQQtv6~f9;i#4rdrwt^p#{Ozg0ARRZ-yBu^F+%66IiUvF~9Jz z{uD@wcG6XekAQTbgo0$+6hQo3_i-b!HPc`YF= z+)CMreIX%|_7kBEvvG+e|0}}4iFAA< zjlNnBU+X(js5sO;)dUBcKB(%)-DmJkF$#3Y%VCMg|C9TT2jcm?{&uM^E4R)E5W=eL zRjNH=>_#Vnq<84HT?^ zNEmdJ0e9$lM5d&kEjCkcA=})3OnouuEpQB(kx}NqL+}T2{O0E~K~7r}Ju*}`7kEDH zzcP3O7M!qYkfcYNj&2H)bbiqg%!SdXejR39v1MLJ@u#?)B5imf_Q@&;zd$|{YVh}} z$E6LpliPp2Y2{sMcr%uwq{^fAh#&iqoVIQ+&G`&RN>QZ51nG^lrFkHFD+N*4FsXZT2i8hn^6Fh%LTb zosy$e_c)iU&mSq~hyiFGP&d`9`5$}ij${)*jGPr@P9g=gL|)4U*A_^5V!Vd*z1kd} z4~Ykr?w2wYX}fK%YxC@z!|M$1`9Fc~jwrU~Kq>xA7xHge4;o(BZcDEQJ+T3GTCD5srw>j6WV9 zBmpC&O;S2iI0O|?hmWmVSxZuM3<6oqe?tY_>EjHJVN=J8cN+Y^$ z6P9bb#4`fM&t6o=O`K`gbta8{DoKEPKmEdqthkmN^(_w*?iZW*u7LZ3nmdY81CdPS z#REC<`_BaF55y^$O+1&l2 z-Meiaio2cS%vJE()tK8}Mm6@NemeJVr;VVagQCvF8)sgBGHgRQc|R{)lYnYS%F)A0!*eZz8lOH zHRpBFO7a{rN8eV})1_M&h6C2#vK2?V9Dv&>aAMY350@5fRuY`2Q3#Y<^ES7zPO@`93yF+aIKqB1LY@Cu6umrSu;C6$yu46awN@ypC$ zCnCx-Bu6z>Pi@W%(ZfaftGMi*<(+~waV*O(O}O%e0sDD}^0%He?KTgS9H$#rG)hAc z8c$a$G|XTElP3+x-5OiX>m9GsU^N_vsg0ef+8<{x^h~QX_>Gr;Dq`vacumR|XjiIy zI34yjayjp9ZrrUEOJ2%H1EffH^RKS5D1itBUYy{{FKyzeA0)x!vZFc4ptt%gFwcgAXj8xL4| zOkqbSc_C0OosG}%0gVn+PHY=yG8Eo zu!@um#;Rbgh)9Ba`cxPtDsyb0Y~{$ww9BX;so zv%ePrr8Pd|sj!Hz@)->whM0q~wtr^!&aU6<;micmV0f?Ug+oz0tI!~~%R|2}bBKck zEA!iWZNG6RB-)5oNy0Swe`~AW3-*`hS+n7_Znja^z7~W+p~?P66&oF?$4y!dk|c=? zBpHrsjQHxxcw=DvF=2QpA}?tG|F4=1fvS0n4K_W1XMlAq^7z6vdwDy+PVC8?h}s8% zUqaq{1u3Xu>4!#DPKE|+bY`@%uEC)SFYN?>iLmC+2D4b^ogD4%0E2F!40xnkOzzy7 z*ur;wPgz`+buX;Q8IOVJD(C!@H(uS>H%)h?I#~@r=~VX%v;<4pK18g|_9()XT|-|N zo+rU>JZ=I?$IU!8w@VcF@;D0fVIr1;*DO0_wfJ@h5ye+xCvWWIlyK+TD|kjCH!+Dy z?3ubu3_uncR(r4C{-S?a)=A?KM&pSZ&%L36Gt&dUM!%(KC~-&Xyu?BGd%q8|{{zn? z^nUw?ILf^f+4+je5Oo@}QYsJvm@BSmmn#gAIqV14y(XFaGM(4CXY8a8{l{F;$NB4A zLzY>}_U?d(F@T?OA|SkB#nv1wLn=F{ZNUB9lNaQ7s^|d+y3aaJJ|^%me7id(m9Qge zqHK@}r4c6#>vDRb?a*Ixl#Z=f;y=qmh+cyR9+*lkLL?h4a3=gP7bkinn}} z;h|C?yw#@qf1k(u1BaSo?&3}Wf??aRLzvlV_sb8DGIf}Sd;iBsu*skXzVp`^=wQ|^ z51-_Kt?7)1fCfmZ#RO3k^oMy=z(#{p2H-&W;@;eX2stEgcT7;HIHrI*u_u}DQQnW0 zt}ocMPS4J%kkMC`#bd)#$+E87-7+aY zTX7CcH(rh6XTqL8;*4109~>z{10~`Q^!<5&`K?0pzdguqfuk0Kz4Y5Q0w~#piG=Y( zI;z`M5MJt9GwWbKRhtT5MmymoFZG}$TFbrmNW*_~^Q6wzHShJWAAIZ98(d8F^($`J zR6{^@mu?g{Iv5cgs=YsbZPa{6yVwSP`osK%@ZP#+W8sHq#*<(pB z*miEYQBUGMAh&6>-zSiC6BQ4X&ceHgN_ZpTzspLM#lgs80Ogaj7#j3y@^*$paQ4Hu zBNBzJaxu`980dXJdH5nhoXra%gue+52uWN2y5px(Os?u7u8h?q*+_vHcW0j8w7n)T zhE?yhLgp^@CAGz9y;B)zTlGwBz)mVIVZb!grGW+8takVA`ckuAFW)w`ZOt_uvcd6= zwx+!``V(1+vr*gQjz%nwf{=Y+fH6^dkgB>H$hcqD6Jn;CcY(!W49m)L9LfWm(K)_D z&h068)uN;GXjIX9(99uJgt_l5V+<&UX_65ZWnLW!gD1Fv>qft(E8kvBzYCvV3DN@9 zwSDhy8|kj<>OvbaTApN>u=nt@XEH0T+(a{CqTes1 z$6IJUZS!a6CtH$@y|;PHzMOx<50(=TA2)l(;4uYaZ^V^xWyq>)M|GZ?o*frlY4u;y zv+@Lj_u_uAa8dcHiNF5n+{sP-TfRc74Th7e7}}2|uPFUUg{j;S-2MhG`20SNF7m>t z?0yyfjV)K25d9U3ZwJZdsprZeUE;s+72tgGXhQ_lsV}~bG(v(Bnb{eo{+wt*7R#`X za@KrXN!h^GsZR^hpSR&>3-dSmtmX5ip1g|ad$#@#lWaGc#yTQv{ac98_}=%>^=tOf zQ~j+u20FsORwoWuFPBj&`F@;{x9dm?9wJRN4J5fT0W?dsFPPWTIr{@veapX9+cbX=mYw3SWR>7f?%+Z)_31y;y2JA9B3|Kkq zZ%Az-fR?uByL6=Z(sJ}s)TtgG<2?S$zi}C|bt>8AHh1OS^P7 zH+{Q#CdtV&PZ8WAPi~Y8f)^^+a45c&H9^ttpw+MnzULlPYOvZEf!S;O|3TEX(o4q`K@ z4^;8a<-c&y*_z^#SCDTct^{5`jSmgR5LN72m2_Mpc27G0TnKRQ!-@xvgvTX>Hkh69}nu3!@Xpoi^aouJv@=S4+xb(j}&@E{-T38 zzFD1NUI;i##9)S`x28{0e)B>jjb}rV$(^Y3uHnmPO-^{Ap^QI*Mml1YJODA;b&X33 z>MX!0~Q!QQ@goBYZ|0%<|UXEaqB(rd-3WA#$D?BFDhElbm;@ReP8C$EDVyTwN& z(&aM*K`J2W7VZj4xG*i*4>?}ufNHY`3D>{b=B1z6Eq4_kZ~&6#fjvfH&~!M82iD&n z3PhS5FmtL3w#U7Zs5D{BcOKI(AJ`ihzE-0l9i$wvk1gW67_q%Le&V0-+$C$l!&_>&je z;CewgjQk+imRrw16RzU8RnByJ-9x!2CLVG+A0!nk0u&_SBw*}8;>1RiYM=p#V;Y_D z-sQ&*P*Nq0-9|E-J#pAcBn?8Jp~|4e%dJ-4_R(Ub?Mfgqkhotze$Uru{myuCSL$DW z%!~t2$o4({?%{X4SXsa(h%2(jiS);P6D12S?vs5E z5g<<2i*$xpW3#Cc0O5G$z=+s+ibIA0Fh6ysHLWeZGZa>onHaWo7D*^8qCx#sZ%Fs` zo3rUvy-9zk#sn}+h4XgQDV{wrQh&4bv~?EC13j zB=ODMPl5_W3#+~|`I3%%zCG?Nl63tU5LbJxNkJT2yU?*@PuN3DVYGxrS+zX7&H_nz+Hx5*#l2Dtsf)@-w^(qr53Dtgon6s>^D2$h<`R5Kl)zQR} z&}~R+OY-=Lia4)scS}j8#k{sPNZ0s)XevF^ayRRdJqwA3i z|En0rd7gLE_b_b`+Q_30myNZUnajz&sEwg+@HZqwmoDU=5m5+H)QL4xUVVSxNYMMA zkMF;Zl0g0ZNi~$Li&JHrm_m&KIPP!;2t?p7@lN>G%0`-3mz}_9ba65gntLlFPOhGj z-@SgSu2_0NB3I1bmh2dHIetFygL0cwJv_ZFBK(hz7w`dOW0?Ob6P_HC(3n9sIl})Q zL}oGJ(8eGqkh1S+oOCYVO4n)*FyEBUUibgvCStztS(YDH$GwO$^f@;)!Xo1D1Ww)zd?i zbnj$GP3>xL4JM2b)!h{nQ1VVYr$^Rl&U*#rLXd^TMUN^#-+v%pQ$Xd zL(iR^r{pcu?+zTKQ$s=LYPt51T>yPGY=%p2 z2E(tT!Qb&0>{ZGt?7;aWK9LJ|!lQB+^bI)cjVl%XixQkNA&n~%nl3#}Jg~q~|NHB3 z&gHjfl3)srvs+V7PDwONvpXE6x%M$wJNMHoN@mu4o&`o9aV#M9{e{|p19Rc9ZR@SG zS>1;&g3LXCX`)VQE2L@AN+;*0GH*uuBdO9-kst+~M+Mkui!dhmbM(~h)VE|YJ2NNo z4OuK|H-y6pX`Hm6z&Fk%4sK=J<=PJ>uEr0TxqfU*@_Qp+lj1+GPRk%GqVNNf-;B{C zL*E+Sj9k)FW(g7~XYCTl#~_R0sO8ct)N?l5Yvc_z1!-JlTQt?wc_r(|m)Wu8d?%{c zSzdwqCUBggxwxsJQ591?6NrkO8z-`bx+4v#Z+hj&WCbSZ_-Ng^Xkg;IWW`K`QBTPG zRoaqnbJ_>&E48sTcUJA|tfc1#Rtj)*a~Zh6537p}#&DI8313O4Nz;WE9B;u&t^2f4 zq*}4JDe?L~UMIRf5PQZg<8ul3yt#~k)^rj_dJ&C;+E%Q~i{cx=T3(L=>oalEO#qz2 z9($nQez|Nv3x4laNk?Rp-RDJp6bnRNcsnfo;S(>Y!MLIUY^>p`-v5~y#%4V4gM4Bn z(Ep{LziI@KIYWdmCuvEpPBs$j&vW@QW+jFcsd{K3EybThgnzB;W3x*8mC#huyeus ze*E!JY{zcNGcwvuA_JL!bJUR?ze;}~%Nif?FM)TBiF4O*4AM>>j`1*4q?b*20VMkr7 z?-uvG*oWBi8&;YGio$L_mH8XR;lHYtfE!mOS;*M3f{_3FSINhdxI4`{X^>$hm7Zoh z**2l@r9881hI-0I65{BS65>;{VEl1}r>|dCq*@p${*%~~m%rqmH28P4C`w#?!B`cL z-;GMT_=u#ATJ#NNVihPM?K?GaHvu8p&LiRJ-QEi#)#mI%ncy}_q~SD)r{OV;+?z0p z+{@$|oY~_c(Dy1LhHnp4&N?VEYWbVqyIsX?5PxQ7Fny`WRKOq(*^j}T=+iB&;t^H9 zEQ;7ukTLLj7uck?Qlazm%i3q_3G+PNVG&ryGT!rd|M5E}DYJWpr#4Sn2UZe~S?HN@ z(?Z)ip_F?s0lL|jk%~etFqS3d4E(Dn({Y9PWIha>;nvQBaSz>c8*|%p|Msqq^GUR3 zKDp)L%;55Kso634BpF!x4+RcoGEFR;CO zU%E%3FROsT**CFiN^H7tK-fx}7_uw2FxQFebW6ka`OAo3;3Bw^%PjTV(^iH0#Z{`n z`PDS;rtih;#un^6yy^P3e5}X&MJ!MKGT`>f;2=KA2=WMmE=LF!>BX?rM*rWEelJmd#FX%`3teRnS znh{@EWMFON1wImdpO7G?xLw0HXuy29S;q~VH%s~ncx5F#b!c47lKB@MuVGpmNR~Yk zK7gL-QCu_aXp@iqi>)Q0U@&vl#;cQXqox1k@}$WqEmJqpH1_MiNBi|4oct^Dt3`9a z%zihVKkyb-Fuuxh8sh$~g-n;5WLm`E$HSm|VoilIfaoFUHZ=rVcd)fvhyl6ZgM>pV zn+TG1Ig`QykvB1>)>RD(-FbVy^q;nJQ~`-IDHPFb<)`1tS=LMD)~B@8$kCn3GiQeK z%*L4W#;G1e`E@_JUs3;TZ8}NJUV4_=m)S9YEA7L4-p9kcTPsg*7-lf;YVNDc8EYKP z@jpy`RX~(c*Dl>1(%s!9NJ_V)bcb|Ecc=6a64EG2H$x6Rgn%-14A-~Ag*J*_u z_s3Fk)R9&RvOO=*wf`W{z4L;Ew}A}8-oT#;JCl1}hLS%W3Xy-ah}Jjfk*B5GMszmv z#}JOUf^Wx9%^+_!V|8a>=wliNxbu$7DA!RQvBQOG>#zC?G}YGggwu|;<5f}oWxcB( zg5Luf4s8d)q01>~_XCoP*tc!ofWdl&6MuP>^`ObuF644zn(r5_R#l;%K(qfm5v#9^ zK0>O>oaj?<&}O;&YPE9Ff6(R%jBlsiZDo1oBtID&ud8O@AVsFbCFbeUbyIza0f*>L zZytOnkGuICu2-;2iLaG!%OTeE9eCE3$nT^BOYQ|ngd@|=-|+SgcdSZEh{@D=Wht_$ zoH7U7cNVxa#fa2)DOm4trr3)cg>!xRQIT$D+E5|O?^+R7*9EaP#WA{DqJ5?Z_Vxo0 zAl@xF_ag9sYrarB*?ZmkRpoXmGTuOG{j1>J=iGSbj-)Du322721~k*Fgk~>C`si=K zT@Uyyf@FQCl4?ImBVUGTvc_^sncMK?wJZIsGL(sos_{%eLiwe2z*(r~?R zPAVgmj8h8E5}0i+ss+46SFWs*GMCvUqrjEj=hr-bjrM7mCoQi>_6sAz)_#@Lb(eN{ z5I&`f9Bq6-lYh=Uo^q&#yb_y$?zNGeoXkrRXd=&s{CkN|%`AN90`Pq+52VLz7wa%s zdH6tFw5{fc3Pbsea=U6N3p!F0ou`;FIC*UNLYKd2;<)E6%avzHyMO3NFl9;tc44o73e)@kWyj4s8 zF_ddjxU`c&6Nud!*PZ<6h7#0eHJMW(q`0&2hNoXi*Hq>w;|F)Xx)1IjNE25w(M_7m zuy}VW%LTade&^7Ae_V#^71@fkbcxorD%I6Ue;X1R-L+-^(lDB9YruO)mh+YFH^+0P z2?u8R-ux`|BWVPlM7yuuULGB8g^&ouDcL&3ma@v8mR7ww3YfjZ%y|y1yi^&rW|q0# zR)gOLz15X%rfcmByaU5@c6j*MOZYs4__X>tPx1N zi*4T3BWLnaZL_`-JXZ<$neDCmj4*QFMVO_kN(k7ewhj~>C7T9VOO#fqfqW5cEc^^j z*qo(lzUxS}?X)pJNNIQ|n3o$Hqn%RkK1^ZxAnS0$$5z9n*|mENT{y1{M2$I@|GGx3 zn7i$MGyo%XIfM~RkqXOc(?tEPCBR+Sp84&PelE)R{56d+=$L_g56XpB+;LQi^OfwSDRO`R15UHN#ZV44)-+aD1xK&Iic z59#6b(~v;C_3e#}vi9o~Jc@&M5&I+uW4lb%l|)R68n2xAI`;kk;(oJ8anOddah)ib zYl&wA$5nC+4bDvf&oxX<@Kd?JvJT`1uR)J0@%}m`p--Y0snqFp&EkyMZ?8Pu+8#&+ zAvVlt<*lB`@Q3{DO`!H;KEJ&YSY@9H|4z8&iejBF1)cXk0}aDK!eZ%3^vwHA+>1#T4`6l;LZz(&p(o1^s0dZlT$QC)l_GqO{X+3V*T! zuD+z9fdkVp!FOK3whzca#K5X3%oa$UA{ZhaH>i7-BYp9LAo;{cA$c6XNueHL1R4MN zmGZZs;rW=*L|fvWR6=mF``c44qjm4!62qiz8lZ=%j)uOL6~zO2AOrBxnPQt{F}q90$^B6XQ&gvZ__e1h8g$8W|FGX?Xcx>ni%80 z@s-LYl(s^saVprjwhzmtw1V3*%3qnN3Ziy3Og&g#TWjPZ( z=eQJpZDUO*q$nhF)fa7v+xHzwh+2^|bbcbk7)w>nj>zVztFvO2!oROf%eqzD?(B?` zq9zU3_>-T0q)|bTsvg$q5Eozh$@kDPfZIZNBSWPs^+3#-r3lFvFzlWAH6^jya$ZMj z!P{6=hT1b$qO{X;xrmpc%d(g-ZiV;6Md*!;piUR8ptiv|{IiYtyzX$$(QwEf=q*R; z#COKDiA#bU;fw8w3#*jFz_117V*kMK;Vjs5WYGpJOJF|RN`o0ZEll6^R55E6*}&p7SB)V^f;|oG zPAh~4Fz>-dv?<=revKT04->1ad*8x%qiz0a=I(UCD~_TT{InB1^Y{!61@)%zKB!+G zR#^fX1x6Pg1X3!5c0wp*&g-`(17u;%_|D^wlX;0@#c6-}L!+>}r zGHgLsR_a^NLg9gY;+C_-ow;c`G0z{nm0h%;+NJh+v%A%NZ=I3Wr6W#ae9?_fm_?t( zj7QGrGwJy~hq9H{h1p4_mK_MD5qZMgrzgQ155=0`NM%yDqBhTJqwm8W_mFL?5Q;FH zmV;#LAuXg-lh+9bs#&ez`DY5;m>`{J1FGk|16->Gtmjy1czztXx`9R(w07FamXo9^ zRhOIJFYB!?usZYQ@6T?`uDYAKL85rL4jGNVV0ghcxvjR*nPju!&ir-1JsW+~1WR+~SeC%z^tE$Jg z?Iek_KNsTV`(5ga#B`^xN`WKRqpP5i3%2Q~C^cJGd5VUWoqBM7)1Dw7gEk1vd;)&$ z__i7pC~^4l;7O@b?`%@tk?%vUR!@h5|Dhs$`;@;h4CEl3`zTyFq?sraEANA)$)k@} zG`F>v_5SKr&}^YoMhBkrh?XykJ!9Lc(Sg(vd&)^W)BVk@WxqghnQdB8`kOyaEi$+C zcG=N#`9mU(_Fw2B%iJfw3bjehDLVL5WHXRyn~A=tqOp8P8kY4AbS9Do*d6C4UZH9` z8?$)Px3J{<^x=9T*n+o=$~Oj{feQm{uxZ@BPW28-m0^v1$W< za8gOv3LpRYMjg;cngh{(N@<>{{MdF@KXTFWxKs*nq*Y;ffQ|t+JEVMx7v>bYdqk_5 z8`YJwD7g82^5X1+?Qt%jjVx=7+q;tQIQO6J%Rc8K2Gu@JdoR7Rvv2y!1qPSiwvELd zdT1)jYUL=L^u>xI?|7sa^6^3#7;#i89!DON1O_tGF)aig`gxC*PV3PZdQ*1g(2>wj z;}6YWP{ntV55zC&@>@z;AiuiyK!Po~BWQ z_qP>SB}UNcnwj96yKIlf2FV)VE3BfL#H%1_u?~1m@tW##cd9$|DS3m1C zbbR~8mIZ}9>pm5BP>DC7HrB6Zx_W-I4p+}}&E4{)MT+K8oquLZy5SrQ-gSxKGe&P; zwXFk+oHfR^k_SV@#)?CP9j?P<8dmxcv85x1wjOM+zj~B%EhQL4a&|y(#trh`w^M2U z<=v$;QwdC}bvuIIyyy9_iB22nZev0B&Yf<%I0CUzSapze8XEC1H5O6EGseNgkTwA~ z>XLNp#F(7I@*qUCZn85fq`HCKXtJBf)NPgFo@ELbI(O}^&HWw39vkE(j6pznxl(;A zr%xNo9p{&EGc&k0>-}rp>1q2Z@9IZv--kCQE3Y*ugmVUew>^@Vs8tO2eKeNdsMaSK z#m+|DujJper6K+1@}ANm_s0(2Dc9C6D-p~+9p+qDnO7e`>;631VV4;WRc;Q@Amf7u zn}3*&9Zi7ynchX=O~-2tWt z-djG{##QNtSKjid%J8-jrGN#dD$YR)rpYb2*#n*+(=kJ1zpP!ZyZn+WKW`q`<4-#+ zpIH%zqei1JnNga5n}M&}`P0I$i?*Tt==4H&N5|^O-JP8sa#~u^I$~kCI8N(ilcdA^ zMXG?DZunq~fR$}X=Cy0@bd!)>{J56>3-D_u$p^R(h{^mCz^?jZW>K4&DEB^@4x4e^ z7ode3v z@Ar|yEmFNasHyZmgO0qH_(NRgq+ZOeB@_cD{E`MZs z*SMpDDf;2jB}_-~!9Gbnv*e8F{02VYQv18}huF4pO=H0XAl$GbfFQ9#!?ThX1x~Sul|*3azQfQ_-d>Wlx34TOi-g zfn~ZM#%vPpwafH^Y}J_%no>v5JX8LZ7S`fp*#8~Lu0-L>`cCb@=1pJpW0}v-R!AK@ z=?zrnuf7pJq;(*^X}KloOm`)7Nj_rcLQwZ3a)U~Kj#z0C8gI(l` zvp*pK!Yoyz=51>tEhf#pTa@dEn(pl($?cD{=%J)#?}i5a(W2Ef|GE}qdHvh%Y>3rU zP>Z=2DjMD@{^C<8xk&?dW^PIJQf_$Ubi!(N!WC&qpHC~?o=~_nSUj@ksvC_cx4$S0 z$7wZc9fzBbY{&Qb!cbA=6lLPDx(yYO8|_gIKQNBEbQF20dvi8R_324fLY&kY?iO~l zApp2r&ZQ183PYrw`GFeV+((v9Y%Cwz7SiTgviBgcfdWKBUQAr7`r?@X#V;-Mz)fq7XN z#iU9r)}ncJ%&3cSlB3~Pd$C?xkyU4?S)EOOeY7px)MZRNdoVOKFc9mgotY|gWlk_} zgtuPG-KFVh#MXS)Z8PkBr`Au4%jJDLi!kOq%e$9P-*()b|7(WkXZ);P_hSIoUh7W; z(7R+c#$gZdiT2>y{mJ`h(!Nn3H{Yl_0imap9vSy?Up2G06;(6#6~(IJ>?{Ci0+-gHd8Yh}rv7<&U;JuXhlyULF-uW=vydLvPUimI;N>f%u7f*8>M! z+Vm6_kzG0nf1hzoqG`q;qg(FAj*}KccWk{ZDs^AX7+QF!UUOMhO@KDOyPiK84hb5k z!5;SX#eOswO;6X~7@rB*SBKjcN>LpGmoUWJZ`n2IT5JgcXFU%N4I#_`SyRJlc({>f zBD=}u$ygQEXZSKAO`cqNXog!F7iUQiAzXIEutYm3N~}4lvFg4fdkzegn}aH(%EEzh zvZCa~XfhkWv=;=t5d1E(M|5wpVx(U^ar!E(u8BxU`C2g*W|#XNx?)WiO1I5|rQo+2 zsYALLiW#{Zj-q=H)p5{Ooz$#@gc(QI417f?@|!xjJ#73^XoJG;`*nk2=#7o{S-8T6 z+?m30x;dfL5wk|fi)0>7M@9HI`Oq;`e~mhI)_wu`oBN=*81KqyZ+G7e8hl6j=G9K+ zRsU<8?WxR?^`bK8WMr?i{x(;%jiewq9wHDQCiSX+zM7aK(q4!?&xNZJ5 z+&z`s5d$7i6d1i^g)#qfNB%CJXJ|4k*vbj65AwZ=Jh+FAHgFuu**<+MTl$pnxMwCU zJlcGYGMHc|RB15hfwIJjx|!1=Vr*ey(K)f@-Y*qdY4^uhpatdWFFZd=)FLd& z6Q5=1lAFA9J{DBCd#BMAa`4}NWscO&Ybd(4ffUbB-N1WFt=z}&|(;y*R;C$Nefn?HI%-`tYA8B z70#t?=*-NE+sq%u`qD}r=Nt&nPC9bS2z58bnlPa3ZGFTFhLdqUSvWjun0ZF=f`#tD z_WPBE6V<{YF3XhMkV|%UKJ+~eBVJqOUj0u(o6n~3Eg^Ac;y)3^WhV`fC1xIEfLwT^ z@0o7^KC;LOtVVbr{_3_%|C!?=uiZA@L3OElK+;N@?qqaD*Fz9V#fM~*N{(^=lgYk)ECPgSQ(O2YfW^7^CAVRf zV+JrJg;Il+;TAlDMd?O0in1>%wU1)Lwqd4AhSNzvG+QV?xUV=t#;+FCGct3o(vTPD zK#GArSt8{9F|Ok#=>-P0o7e>~)3?raM3HgP4K3B=V zW-3qX9G#ND;}gl0rEz+pchnBtI)sL691c~^dArt3**;Lift8}F-~81NuGQ^3DT1)? z4h56NsE0myqrV3Ik-Onk##SoU>p(K1QDAQqkQ&gwyPU2yMla2@9cbK_Sy*~4S=lGU zJ)^u^pxz)Qr&A1Ylmt2Ig_)M3m@vNUYrxj4Yjx^*{%}RzMlc`Tqh0*>=F3a}&7l7_ zlGX3C+35{s?r5tn(!@L|^g#%Nu$#nUEa;6I`};H_atD<7k8OiMEOJQHa= z?TsE_)+w7;P`0WbwoADSLxO*9=k$WL^|)z;l`879q`41aOe^%>s!vjkmOA%hYWE7* z3B;#*e_l!u!0oJ>4{4m2Mta+@P$CS`f*U>hV*#!aNlJ*#c5;c*$`-oyhujxz?f{vQ z>kZ7}9kQ~^_8A5W6MTq97#JPg2x7!6%Ums1Ni( z&-r=Ae_bj^#vr$xTm|RCsK4I*b%$^>WeqjB^SKdfLe5aYR5?_Av|89)meHv7h;`6#X=^{tA4&YYppINLtP{RZG0oDI!h6vfz_fM@pegFm6{rf|C zEo9V|CwUZlQn_z+cmD{Vm`>r$JKCww-Mg!DtIw3$>!onv?+6@y{pdwhpXD|aY*h_u zfZK7faQGT_{D?5COkeyo-*n=O)gjUYFvZISR|dMufamym>NABcS=`hqlN$6+^x=qQ zJxH2v$3UwA0+8QQYZ_?Inpi@y-}g^yH?RQg={Zfkeq9uA4TZc@HIYsOTX&lK1r~v4 zN}vCcHJ;f%NOHfhK^Ckeo=h`w>)@p6L2tjsuERL@I=M?OHx%d{BRO9b%)u*pnf=eC zdZ=3MtnAlBxZ|PvcKFB70I*_)9cD9*z?tqpuZDzw1Sa^bP0? zaM=&(j8#!1w(+pBTc{T7_c3wrC%;e2_n_?u40y}SqC!o{G{4-YywlCUjYAqkk9NY+ zu@**U8jDjPV#}Hc7<0WM0l+#tiP)0f=cnMuQ1btM$W1rx!Z3e0#iefGtGanacvnr0 z^?2;%dv8Qv=o=j_m|w9(9gcQlo&VMw>h3ex0d+8P?SIs&h1U-JkxV=+oUkvXF~sZR z_`7mr0s_ykTqxypn>3;JpDDspq6Gps!%3{~io31h-BcO27%K4GTw=vev@(fH|KAZ-!5StcCMR<6C#gHm-OlriFF_E(bj#05Pddn3I?(yh44K2z0L z>!}%$1kDU-Ry8Q!n*p$x(1K2&522fLy^#2u`%7HgfL3Ehkl3iKv(Q)C3|4 zTCpzBn*UJXtz%KV02h-j)6W4G-j|j~y^XCP**TV?gnx)HXDsqMUEh;K-6*TiGdK0D zJF58VWp>z6!C2uoz4ESh< z(>}k_08zz?<5HFLVUd6a3e5#ALOEKhjsvDZwzwOwoR_5FfI7;C7Chz(?*5-zzK#Jm z(D)Nzy4~FHUs=e13VkIO3Wa;Yow0L!WDHn;#t~kgA8W7Fb(&HOpx~ZqCwFtr{M4#L z;veGf_Nu)TwZ|KGsRI8EvTh3cbJU>yerfR8S_J5o&Gp(#(uMg(a{dlpyyMH0z;g~C zLa6H70<(hyH#tt?T*PUr|5xxYEZh*jUpW=f#jriS^l$0916G|JuS~lpR^!}Ot+IX= z{^X^>qd&SSA3st~=5rNgWLDWlOPIAoiuC>U{ZlG4Xk_TEazAPZr2GY2INt}M;jFlS zJ@|{`hB-lZh=Ayi7e3~v-{;lx4nh^*vmwX0r4rN%jGu)aI8weQ^L*zn>6^~9tmN;O zdi3D=F~493QIwOg&#i>Kd&bcTDmi(m4V;*-DQN(TKyU)q5{iQ8S@CcEt=fxH?~)RG zo~Qa@jU~MikvbJ{DIag7D4`pG%-an%ITpjaB8(3PN8YuKQAG4nJUv+jDzOHK^nM0m z?v@h)nAvYYpYaECp+5QYxqMt|3`Bp+B~8+v&q7H{ZSe-Ko`dtI^x0mW#vNn?m%o5Z zG9Pr}HGaCVx}I!_7f4B0Y{RhL?5>5wYpqZp$} zlaV{J=S1G^Egb^*?`?P)#(1Yme%ptso-&{X%5GL8i#Ho1w9R zhcE7Tn0a5HQDLQ=0YF@*&eBE%#UxaIX;^W*wqs^}dmsjwt@VdBoNA*Z8z}yhPm+ai_ zmu{-uX@|n~d$X{=i+~~{^PV;y^Ahv8g;`9>l{sG%nVh&wGt<{%;Gd#4LEZ3l^Qt!6 zz@oM)*lQt;vv{~FZ$__p1Ji8f3;gJB#Lxo&H^Q#!HU(nkYIklrT5dc~N1XC&YVY_T z4egO#saWBG6mA)S>Tmj=;v~(pcqIA$b^LqqC7kd5``$^SV4A}7h37XMUv#wk4;C={ zKUjb_m7nBSYWG|)#}8cKe-<79?uT8suqVp9ynA$R5phgrHHHbdGZuwornC$Dt32*8 za?`nI<;Din>|rSP2C!{E0O^by{;{_E-Ote0nV#{BqYi!>Ax4^X;^lApR;M4i%CqJI z21ft?&d?{s4dLGtkrnyOujaU|QfZ4O&5|i7pfQFbz)Re1>}jzY0Vn?k@Df|Pe_(&E z*l;l%A_BC>CONQg&!RkzqnHVH{;i6_7!o{5_aGkR0wGs9`!q6{v|MFO(is7fy?e`M3ioS<6$YD{gR@zKcZ+(_c z5@eKVj^ACZ^>_Xj<|upC_~CgS0L!k{ld%qjGXy=m3EtcxXq@y(aBI`F)5TfdGTb9E zw5Y6ba(ieE&lY+pzh*(c{hnZdA;lsg2j^|0!AW{AG*+D*vkg+=a<{NB;a5@Tdr1wz zjn4}8VoWn32yWv_I4{Q(!qnmHRUP?j?sWZ&&ywYLi^v&$s`u4htxlJQObQLO31z=e z#L}fQaTsW@sbcl4FB=mZfI9cJxNPvdv3JyV&XrcbcehmRre7iMXi+vGEQtzF87Wix zRV4UKNnr@pXdyNPq?Qs6rGiJI=xdxc>8xYNm-*MeZncJZ(*g3B^$B4l?(inq|FxaxVYE_bCsqaPG{vT`*6}ZeL#%dMN=8RMWm_lUR3( zkqh=0ev#VtV%WYW4{v?6h~7fea1B8HakCNg47x`0yAx|hgx(H@Zc3jqr#v23!|H04 zY_n^J-khTw^G;=vx@FF@BESI>LC zaWL7NZOPfyca*d!;d`K%_a&Jr-*2ki(y{>}ImeD-Rk`U*d9tOO7dxoWwLq;+l)GJd zN)Fu?e~gN1@WxN(=of2)fAPb8!v7ufaU)ioNg|dHPeR%(X8I&h!kQV$*E3xSG?xNN z)jU*1V|dASPF^o=QMQZZ?CW7n+r~ouOyE&7e<9+I9Z&6s7sY)B7w;GU%OIlxyks4n zEOWP8-!4?Zoip9wr;LBoE--wT(xsmIq1qx+J!>&WX$n2j^wx5}Uz%gRa2spuLlj1j{=O2tov zVSds8|K--f*cIcH8NQyb(&42wAz3)wmxAKcEMn37DErX!!gML>3nr55eEtzdJ?j`^ zK}0}0w7#S3QntO0b-h#)ExBOw_J{xOAs8br!TBVzRcs7LtfW6qP z*SAJ?pVsgdW?m3_o;RhqJqSfAcbuI6$g-N}#Y2C|&~T?IuOona0%iVuj`mcSWZ9v> z>GV19uY^Y+R;-affYKVbVnF<=#=T%I@|DY{gEy!2%w#2q-$N-vach54e^>64iShIA ze{91TZGIS!tnrox^Q)Q)c9oE4{naWu$#DTjxP%f1@G z_WDL?ePADv1z$7Lgyl5x+P-iYycK%BS~lf=F+iY{hg-BZTQ@jwYHdJ&r3c zj*UE5n%zdDp<>OQIixk=&V}$wcryCJTZi^sxEJxCQRDV9Jk54PB0mQTTMdXtY@T&o zv*s)wuE6&zX72rBYP9TNr+Twu3X0mH$G;d<#uhFScMDc@iTGkA&lyy z@B$8y-d?y8@wB$~H_IsAMleMnzZ&zndNX%=rhHr=#NWM@cA%}ixvs-^_8`UBDJ6CB z@(fqt+>u@piu!Qdf;`kfC*psFrnOw+YmYKoxgXr0e}IC&gyTWlhsHOeIBuB(6vVg{f1NPJyY>LA83`Zsm_Dpe9{E>&H{ zp{*>SHNRs2r}d*BtT-EV($|`F^Y|la2K2wdK7aeW&l$uBkcRd$fMH;Ur(&QBwcC`c zudri7W4Z#_(FP+QNVGF(<-3B@K^$URPF!RkbISYBoy~A(r|4a-UFoPvwdR zh>wQ9OxTS6gx)X{Y~R$%_1b?0{dS_ApVW(KjzmuHbD^n43yRw+^Dj)Rl_u+stbbN5 z)q-wI>GP_WR?Sg`u*Ig6@*HH}Z*vpgsJqu{K5&%OHfV1rCf#rB>5v}iT(U}4uQ3Kx zd3YMTXVzv<)DcWml7Q4Ak~OVKyjA$k{tJlo{RP|PRmrDo^WCtMKJ2~g5U~QdZjHDk zkbv05sEmbL;k8M6qRBvB2?pEKx#O<1L)6$%<&#aIZL#7&GckfuUzCGn>b=O1D&4*+ zxN6~K!LE8gbSHH4&8*Kmts8yNIwon8gs+2XMAvI(Ehz+{hbPH~`G<%%aHEkhNyflm zaK`ZN4L|v(vLZ-&VyQ@pFdYvp|J5BXsc7^2Q|2e!bK@;>^ZUDpCF+pAKo0u)igxVz zBKpoGIEe76oFIvj4s(1+6hV7BzDpjV&UMvwZb|R6Y_I_ahqKtAw=g`}o{7xLW}tTu zG&JN6_br`89|*ri?6(ZZ>@c+AhRXSez6nxzhbGtXE80_v3YQ_BBWbg+p|Ez!8BqCO z19o9Z&+uQl*`W7~1w*X2`z&NP$3pqxQpdZgUUcIIbnp1Hl1&WNStP#ipn)V|?i?1SEFjWrnDGut`iIv%+Hk_G8mA0h<#T&M z$;a6)iP+kWPqoZEa9))g!spRx4EW8Z<*OZ zXXy8`5@*Z+3CyIbtaGxmbJ2K0-k9`h#h38wb>!2go$qICs2Ij|f6QwQn(aEbqdqg6 zdh=P)M;c}K^qf9F z&j{TVt-&R5XQvNpT(s0y zz?35&y|`cQ=*s?XQ+dJ)k`F+)NZjiI6jzXSw2)`wgHNBn*pcd7o3NwdqM(-CM32Q7oBU>-jD|_%dr*W0(ParBv=40QDyen8PEB=fJ>#%)~xsn^TV9h<~~+X zXP{c}c~hH8xpWxGQON_2+RbWeKA5-kW~g$pD|4Mt%sc`L<{KU4vPeF63`2rjcL#qb z8OczQNvZfOFW8U{lVa$vCJwyytzR>v{rZalW(}xg8CFX5V(hH2q&{QQ8ZyuwJ{I5J zK91{XDORWi;tvlgqy{T` zv|g2?y61>Tnz8UsyC)F$`zsX6))BFJ%4Dc81QU26b*hoKcbW;U7`O*M-<%OcrDSW;@*X*d<%;t2L?-3fW(S!)@z$AWEING9*hl4g$i z(w1_pE1h`izq&ClD|WUK7f!qDT=WfXgiB15%5&p$_Mc;{8kxmsLEsgda5~y% zOxwFl=_>;pN`i78ld(mdp&5{;DUh~TS{AbRl3~$SI(M_1#JEKbd;dsRXj5@lv38|{ zmQ%J`GK&rtHH<`*<9~TL?QRTMt6U5^#YZ%z{45ir%XK`Sj9jhcH*QnV+@;WZ;z)GYl&x_zId9 zV#RVMt|Vzytzs*nLi;Tw_Q`-P_7B~Q^f$f`2G6w|v81OZu2EqYm+sG zR3Ck-`4*RJUAaL&on1mHipQ~c{QwsJ<@*5o20<&WA|CzX`Sc7kD+4If*1B=j7bSL_ z!_0a_6T~A;V?kry0^fAPL~S~gIN?V&Q#cnheM?`rFau&BLt#joRax@q#g_>DyJ>`w zufLd83t=7CkqC^Qxc$wlhxqBjPu;A5)62_G!R)hiV+$?WD*ALXbYFrB{+{uiZZ&>3 zj(kXDW>j-BP`6Q(z=p2XL}_*2z|v}XPb!`5ka1JpV}@0+O2l!pL+K^rDrKH*D?C=? zv+6?x4D0)ll5=J7T_6@wsky6BgFFw7*O4!1iwXx?0X2qB+pkDwIop5o&Z#fjTNhi1 zN?9+zYTG#=Ykx>gZlu0_ znor5`*$;CXzqTGpz;U=w`3PM>N3wyYZa%)1wdV$Vggyk;@YJH;B6X@U?5m z^I1bSm2&&LxHDY}%|Xte@%hL-PK*Yk8ELL>wGz6_Wn25R?4CC_WisCMG!+h8)s=AS z2!*WkeF5+2xs~0@%#L}F0sXpI!QORNjX>2K{LxRK;JeoTk7NjBmMCU^9G-uhbpsAt z(@eQ@WjMz#!v>_Z5H@hX@zaj(kb-wm4(1mz%>VcxVY@c3;(fGc9oqxa;Ohm&I5$UJ z*rr(tenbhlrRwKwWKY&793y}6 ztDU`Q^IL{6wbkvV_VLM`bgAn+Lp%n?Z7r20K9XlR3{Ee>e-0U9FQgk{bzlNdB5_TL z%Kh-k+F;a;R>Nj3t-4%RnuK(B8oI%k)ac91(I+pv_kLZxY3QX`^-qTaa~=eaoN1Jz zpTrxDQ|qg!$g~y$2?USn?Scfg6NBK*(_2-}q0$O^`wU}b|(z6p#E#%RlJ^N3y%DV zgwa^jNzU_i$aZ3Pwd2hH>ZJ3g+>VUGwLQOgiFGwG7P$eCS`qyt;rGsSZ!7=UbRF)z zT^jkbb%xN3yc*0mS09LL0+}2ArS9?8cdKt`FS!ogy@L=6u8Vov@j!!ZOxlVb@-CTbA}FQ% zayTD~<-%WEYW%+V>%4LRNAlQg?3CB5ZXf6Sb8cndm8LvLJrd9jDD0^AXK()Ln#c@l zT?p;B_Vt*?;8V1?I2{N~{}X|`z}uz2Iv=I1VS`-v{G5o#-iW%!vcK8Xq^$SGCBn(2 zg8qs!&2-km%y5~8KS~=}%W!;?AsmC%xXl!Dq+CgoCFDRYP^hJ`ZdiiC zPLG3q!+S+CNs8-wTXS?sbzSei?|Qs>vHbEp$92BxQYXKC6NU*k#Ij$LXEIVU;7TSv zHvA&TY19Kr zMFR_w^$a(cGI%d6?N*r^G-8$3Ms2Qr2i+TQWFn z!JcYhi`q5%KKlpZ_t0n1*vmm`UhnhZx>CtQy?pS72u9d5S%fm4jer=I+pb*259^B1 z50c8r9_NSlhZ2l2`Se0*Ek%k8WntD8R=P4lRmo7%p8c#lZnHI#sw$)pFNW9TfW9!k zPkq<+#@)|on`P<|N4(1CWwi}gb(mqW;U=)&p>F}SnZ`^fbFT^Y8!K2@9 zCq}6)lbV7nEh|pq|990fC>rG(h8H|NKNWtJ`miXzJ!CJ^Ti|Xc9tbr0C2SApoIA?L z<&<4nY@d?m@8>5FPs}KBZ>X|6M%G)Nhe`dX(vD_~%Hl#fiP+Mm3&Jk`&i*^FDq_t% zA&FV)T^`_%+H?X%F(~%U2y^${4?JeriaUaXu083b`2Z#RuHt+E8IT0T=8oQn3l`M( zQn%&%L73g>LtX-9lvch)HfgbIHen93h6wgg{6}Jf4`2A0H?b{cx7^MmeRif6?HYIf z(2Wd!oEe=1Lf>g7C z2+m0!22vy;$fPrGfBVGBPE!R33XhXAij^+JX2>^?e0hJh=M$)T-v|yX)atYPKWu$v zRFq-cEg&K--Hnn%HxklFHv`fk-QC?K(%s!4-QC^YEu8}loYD7P-}%m3=MQUs!t*fu z-q()nW(=}F?!;t;Ocd^aMy`kNA@e|f7IIne7hL$7HCpHxB8)OBJFtVVG!wc3Xt<2= z>+$|GNh5Hg58*&QP+>w6+7qp`i2=MLdez?TGeFW~7|8GQF4iRb4*`w)%i>4I6>o%D zee_+(lk9jU?2MeF*NJXUs~j9oV}iTq?_Ata*A1Ab&x)FeU>c|)ZN?gXyY#6sqV8&# zT3u#M75!><6@GnV05U@s5m{l)shLWg$V(l|j{inBhQ1sLTu!?tCYp7f)i;lrgQv0| zWWFir41nD4WV%*OYVmw5pydF)!1SuWRcJBYcEu~xd1%#@B!I+ssp`3X_=d8w`3i>v z^d%(>PLZ1eiW@r+?b-7jX)>yPO8PfnP*jG~X$_*|nsD*W_FoHAy;GOgTO%E)>0uUs z!CKeFtk|YVr9{UF{&ta#)j-mQyU?l=a3G5t9#w2N-=Exi0NH-%ig}q(WkAn{=yFS* zf1B5n*nWOIRczD5qn!L<26@9*O=4t%(xPT6!%z0iLUA(^vwJd;8`_hJPYpJPYjP&0 z*Z&r^FKiEEv=(h@DS7;dV)i}l%uu-fU68o3AP38|7i495DO$}LV}={%h!45oEpc|C)T3Cvr-`XJ48=5mVNbcB?`J(OjLv;}D%&7d85AwSpG!+;{$;fcWo2G*>3h8o~URQ1<9R)j)_`^&)8RjlkI_0RAWua7c)(R-=Ema(rp2K5bKtvEA9OA_qk;8V0{1ZiSn?TYOmySE)tyM|Xn)g#5%KdXNWvi{vTl7a=0e;jVp;_Ir)6j0|bHD4UVg%Gs!#~#|AFEyxOXssi zTZpJU3fpfheVLIC1nPK$?&L#(6V;LvK4Djmm=MNl8iw}e1&z~dZY3xaI3b8JZ~4x6 z5W}E3X*BQ54OkU)^wLW`-E_nFJL^pgpmhaaYI*tK8^M@+xJ9?sP{!i%EXKTH%Wyd! zlgH`(weO;^?8vC}@+jFV;WUW7JexWZ$>U)1GGRZ}8mT5dNQ5ctD>+xVk~5Y!Be|t$ zT4I1<3HwX|6lF8ZqoIUfY##7sT~PGdsj7FU16QHb2d9t;WU|z>Z(shW6LI$W;ho^a zg`eP~h$rM>=DBYcO&7YvNV_&8r_11Y2d{7%c8w_V7>L?`>*U^$PY*52MO?J&>t9Bh zG^$yfC{!59FW!vQ|HK#FTd<3V2pUAgR2~dZ<|ZL8XsuqyYKR77O1*7s7q5Hcb5?mV z+73I^*sa$~w%sNGUru8T&X%C(Y9(@3De>yWV_mLyB(QNtKukoBOk_$8(Vsv!C)Y)( zKnNUaA?_b)0vctJqQx%kdWA#}GvkE)R|Fx#ehOhv54Aw>eFamV%glUN|76dTEG`9T zg^>Bm#V7hl;(#!Hpi^}Jbrbi$neE>n;R`m(MclQk&Thp7080;*KJ7PY3Er*f{5(eS zze$2n+5DxJS*K&_UMV=xMdIrVo|`x4@xx$(WQ}?|6?l(FH_qGRv)o#AYoSh(aiXzu z?_hxo=TH;IG1Ke{{TGCNI|^qa$gKF?NWfg@?4EotL@B0;x!rbbC$Fb? zG3%S{y1JU0sb2En$_O0_7Lw@#;jIBf-u#x}RcWZ|ssZz6-uG3V?eWU$Zq>7P_B|(o zq}Nubvb)r!zPRn*u1-8@ddKl6!pt@j#=NN28nw*V5}hb(&)>?y2UR(jwMqI1Ppj45 zXB@!whk!1INeH1sQ&!grNO5_CwSDB~v_d%xgAWR$7*m6yBSzuWZuu&y1%xV~yf_IhElrcexR>CGx$y1DhvKS~ki}=bzY7}|<~cLu z=`~{NHAoj~fE8HbsE=b_tdKP!#u<){SwAF9PnZ1-bHThItaw4RL^H>JX7FoCqj37^ zAUOP)ZZWpsq(Pri%v3{HH97H6i7!$A-+K-Csqf<7YnQU;_4CR|v6tyXuOcyYR)6+i9g}lrjzkf->S-sQ+a{Fxt zaNXWA%vmDIjtcj0=xE3p0uLS)0l_%T-pG&Ox3H9?4lK604MHw$xIdd8_zq#F@25LV z$e)h6pg-k~J=i5pAmY`-$<1M$Z@n?| z8Mq^A9lSdLx`6wVCLVS&E?650+smy*Fp!*t<`c`zf|bpq)CF7+U63*O@dp~q=Q(N0 z9fZ>5#4fHQI{7DRv8Va0Klv>{uxrhw!@rVE%1{hv7ldvUNpwB8$RLY*ygycsHmod~ znu#0r#FJ(g_D@kG@GdWQFV-u!HM%8`^#KoU=G_($LZ1?q7CY~uiL*4t1xJzdnJTI1&M)jKo@cTdWFm=y`AEQK-9-8)BS&`W|<2HJV+f# z^kx19`%dM63InT}5UgGg{X~||meBVGX2$5F^f$oontdazSy^(sDMQyI1USVEYU+zM zO>Ls@Opy`@-azu-L#OZDmCH9s_7==h(5-(yyYAM}_b#Trz*uJR9?q`^$!Wl^%scyy zXnk!|8!&2)4pSmrS9-VZ{}BuM=;Nfsz3(rbaZJl0F71jbb-(*MatP2F zeO;w#0s@YKuREJL-p>_X^XglD^SChT0wGQCXWuJ@t|omxC>MOPpWx2@fq+!c`@>av z9>#0zX2kn*6}M5!oV^|Xr;}!^uHDMB1PP?mTRXXG5LR%%Z9|x@U9l|uyfLsmnuu<) z!T0<_19Rg}U?NNv%|+O`@u1kc{WQCmiluHJ!_9~KlDtHc55JKwhx7sMZ!SN*<}DQ3 z&(tinykgNtmKoY_d4Ip&a@C}}p%GICq$-PwmG#t_OJa>mP7mt#XPZbvlxyGpG=sd! z@b0D>Yg(JI@yo|Hb6(i_q!-GlDtwyL=;|nep?zB-!3hQ>9#8%cNh2fH$&-1>vj~_4 zfC71}I>sKNdg34#C&EPio@z(a21c!jm4SJumP$&p9=^dvMT!v(V#R@Mc6O{gvmr7?hp0jwr&mbN&Gu+bI$x1c+VI*H#`O{E`oaT=K+qkj z;a;1TlR&2fajB~~u)!~OBM#~3W{CZ;^Mb|{Vv~!u){#$7b^z}y zWz+V{&s_z453VGM_xvBnPpkYqCNsEsZc$)&KjtPAhzvWj$Q={tlc`15!CNNhO_eLw zG@C4pQOZtI7~;((83tN>OJ}YOpEqA>&o0Ccp-Ufh(0tioXgSkgE2B70?5DednXeIk zDA)U>&vP4D7*c)P{jq1whxn3Wr7H^Uhnw>$PfnUP57}iS(Fes!8nzF&-{z zl6?T^C$gItMMvCd>S=oAntd2cV~WS{z^Q*g%B5ZPfGZpjiaDgZvs2s`v_C!~e*=+% zKFf8T7wI-Z*8NtzwF$QIkpxDvLEuhDF=)0OEvZoI%~K(~n6;7@_fMxcr>!e(el29a zXKXd!2>9u+&}5&9Vy-z;)#>>q=YaG>5q-?=!Sb~$nmK4EG~&i+Mwj}STFlN(`{_&# z;6uR^hetA)vXh0NAt9jlUP|EbcfKhDIR9<=pkP1{x46fg54>}xmk&iut@%+HyYfN! zpUa@KbCN?byS3}w3Zi-H%|zNcPmy}z|AG?2^G|hgU5VJQvnWf}_&)eD(tA zaQ*Z`7jjJg-hnoejdhJJVPnMJJOW!sqvLmbZCeXOqK8wdfk}s3hqksU;A)rr&=kWZ z(8}88%A*9@YV3mT@X239A?cPWNin-#-0<9=zrC~Ww4XLH9L3` z1Z+Dt*t({7zxQT(71%OP>hc~|U3%HNfZhb5qN!9bCwCh;3I7hl8f}k`P|Bl`X&ZYY z9&=kSY6p^pr23>owGygqt3$$`WiqeEf%`D!a9*$rGLA5W+E1Z7VVC*1P#URxlvzGr(lA9 zSmP5DrdT62)lsxxwdihih7dIyTs}q@S7+D}xHDj{Oh?ShlSS^_horEoB{?%Ht@`>* zKEgwZ%fsKuG%=@@1394#!r%8q9PL$5buoWvz=UuO)O}E5mgy#Y%QZU-MaKP5RqNc8 z{zD4>z;D3cO&-9cg#Z5bUAd+n81LH9^Ysqi&zwvhQGBa7OWQ+VOFE z-JF`SMx18RgefBq1wa>~lG_@gCb5a*JGSkQAyLbg7#3O2@N^d~n6f(SKFead)qwZ1q=pIDbdB)Iw=#D8GSd_tvf4oIXfuDU$A<5QZO49vKC zK}#fgfh*LtqaOcqkDv^of6fXBvS1Pc)eHKAd|tRyQvztHF>)u1YH{qNKX5kgm>b&O z?N&$a&e;t1iD%KyimY6U3PxkreBK;2X#U}WcXv8>uj>9vta9yU-pfwG5S5-J@lAfK zkE_FfFQx;gtWg(93j_e@J~A;sKqSf675N>}Yp7J-JK3lK-O*EUb;&9`3Ze56VojTj zA#B9HWy5FYI=nD@ywa&;kzJGFd5^+UEW770DmfKF$oEwo+j;Umc*pk5$%&DhW=zi3 zHPfaxbcFGF*uBK;BZc(@-KZUBv02HhImlUfTo6@GokV(?`+S9L?z$fx_pmjJE^?H2 z)Il6^UrExt7HxC&<*Yn({IAs#?n7n7=T?cBVs{uhc4&F6w3~&r1G^xB$+R;-{{G0j z+npLhzc3((1~K)U+>3|UA0OL*-kBH1fB9DxUe+2=EJ@Ghhm~sR;mzFeXHRcUz(v14 z8^A((6lfCb8Wwb8LUr0Va1En|`@_zE)yNKYUGx386hhn`o#s3|<~-|4{q@&IC# zS#=#>%*7600U#4KBb;?7>_i3bmLJ52iTA=v&P9-|_hosKtTko6*HqPq+|pveBYXax zU1%@ip#XJ7wBq&_XH<1t1>5X7Xt|x0CPU|y-Hx$VPe)k630+NQE`pQpGpT#VN+})` z50ZqA5AGi@L}6|ytFFG#0Ioh*>TT{Pcb?lHLCihs*9)KbZH7Q=jUG8S|EDNb%UmJ_ zpG&&r{1{HoekI25j-7lmZeo@Pr%OY#((4!dq+Hv^b75|LF;;94^XZ(LF&Z%>)`|)| z#~D8upfDT0D`Vi6mI-}crxd8x+c+|pSn%nf^YLmUe3-tfe+LCuKh`Qq*N&FTW+|lS z%}sFO)Qv8J!P_X6Q!1JDxHmGBr4y4pRPGRaP#F?1vP@GB3pl&J8LxdL5gW%p~gKIpryAGqudwK zx)}`Tdf`d=(+iE`fhK&#RerBt#MB!>#PK8MT(Ii8m@->GRaS};s{7J+eF6C10#AMs zGVorryA>MI4`u>(>i4~JitDVR@}3UJUWAwv_vZGq`Il<)WRoo_&P*cKaH$!2kIiRI zJltaqt`povf8vz6TM`?K`NJY*xq0?ztTT5|h3jsnh-HaP9B~Y2bq)B~;Le7?T{S*1 zuYVqV7vE^qvL1SqTXuAzm^#p!&RE?^82eWC7qf3Es|H3IJA8#-(S9vcs_5t_W&}_A zS7izftbH+~1jkcVmecZomc$E8*RidzKfVBl-RAc3h#8@j*0~h z$}Se!tu^$;xOdDGRs~a{goVEO%ZkMLTsk=8jFK`~3MN9-tS?CWGXD}6#m})l4OrQ# zIj#Q>g^A5QZ#F3M1On6!{gu8(BYg?=?$#K%koQ1i)#>a6jHWEnW&#G~ij89eX5$C# z<%nIZ(9D&j)(GLjwldv`EinDRvN<;CvRCUUaLd92q5$wb;4A*Y=CyZk! zBoVulfL%%T7Y^oBo+Xl z(`Hg=oUx<@q{69b=6;LZ@7salJosT}AGV_JjT$$P$g7B;Tu(HSLm72q$T+K1eIoM>In~#M z%tzwES!3g7x^gK@av3dPg14PBSG=^!V2@c1U-8PGO&)LqXH;5%nKgW?$Ol!Lse`!b z+ub^HuZK+sT6~bAxXR9VyiXML(3K2ae7qMmuSq< z=FVEvu~&O#9n{gq6Jy-79qz);OGS3;!eSZ;mjL1mPp!t$MeGXhAGM3oo5_Y0C-94~5mPbfDWsQg<$ z)mP6USG$#3$e6e*NMnqK9TE|@QoM+wEnLTWt=|eHQT{R(gmt|RE_mkcq zyC*vc>6yF`Y?0a}tXpAD7hmYpoAz{P*e*RSb-b{V-BEEao(X^3e>4O@>Sux|O#I;# ztK$o^k{TY=W`&tEeF+>wUN=~3h`S!2tnvf(&Mpf}+T1hNlpAImk8uZY+)2MIahU9g z+9MqH9vE{^?lk~2IRHK|;ChxhciT)c6k%G{q(EYCbp<<47?>j|rZ zz_S-Qph11nX1mCP+NpAi86JXn$OO{A0l6~5OEV^M088C0E_4od0%~M;wI^81gbS;h zHK7rt;HAEJ2!#(L3V2SU(vdiFM{aZq4756~M~e z0YetumwKhFzuN!T^%$&%0_JkWb?_m08{$pHx}9Uwu9U*CQ&v4ZKjal+OZf2cMAPAn zHdA7%<8b^T+nEV%b!Pl|1Dv_aAU<+DfEuj@}%}of*1_x zP!))?cImXQDSGI?v^f|AOmcp`m!UNuv1R@9pDF1!qAX^Adgn||61qjVdIJIfuvP3Y z=-`7MTgej#H{)ijp(+s%z_~n|yAXfVZ6dg+9yn3f+jx-V$77&YyJA>57}o5BIBV#j ze>YciYtnfqrepj%W@KUa{?s9YyXJRz6zH>K8T*l#s?37vCCwtUVo8>AUvRp~*WmqH zmg_cE>l~d7p$gWhA3-q|G>e4rre7V4THvYEXp*kK?g(M&+z6*P9lu{%djNNh3&Lyp zKzH3IR5imnaCM+P>XM3{GQA>V4oXZjaItW;`%8tvttt`6u|uE4i?~le_aH|s()C&| zZcjsv5{gM(eTgn=0d8c;cMg>XM~MV)BJtO>NrB?G6;^9$ad5_@(QTkKy7CX-1qYXG zf-VdauEUUyHr8!vFWY>ewY(8*=Q+BFU7$O`o7><6AMpblfk<~bk#^vq3i~(G-^PyX ztOWW{jXy*zmWLX=j!>Q?>E_X}&1rDtKIXaKRCF1)#jc1gwVb#)+CUa{9e`4_#&Y)^rAMu0Q5e z&L-wI#DUfS&YzU)yjCwX#J)RoOf3g^C_!1vWrTI0p9xa1{$(Nl2V=Et$V0eE=n8JYaYGw|f^E6x(@$nCY!tgavz1sMWwmA*c4Uru-W zx-4dJJ3mMG$wSi3$Gu0c2r`PA^^OE*e5-_w`fim?CTwPeH?;4tHxy=P(VE&(1V5lJ zfd+$Y_ThGxdGx<8VO1++2Ax+g&11F!*-c`#Dv3;3)@qeRVWRtFtkUeaE%>>KB94TC zjkEql`{d}}!lLrMoHMq!-A5@b$<2Ylb$Xe8%SCDFm>#zy@8r(6*2@hL<6Kqidud!< zzbN{G@mGjXsSVg*I-gh9dzJV8C>>@)nemEqEhfdr7D$#AD3ZLg!Ezl|#BOIi@331m z^}8>V<=Roc*79S!38wavEpDMzv98tXC-r`NoIy|(%$}5sfHy^-{X~q9$~W$BpU&)z z0HsMAn4{yc3E#MaDy~kBM7lP8Fcuh|tL<0kmzq-Fgilx=s~gviA`Kxp@K6LK-6oaj0^Y14 zz5g)(WfW6qtU@GXPV_dx!d zHOt4Tv|D}PY1sa_FV~}^pC^H|&lUM^>o!!^^UmCu^-(|EpC0=OUD%7+&L9EqDtF=z zuZQnBZ}Yl_)7Oe)+@VSWg)eZtB>RfUdh^=(yo>`a0vH(>zumE|3xb(fmXSwOc-GbI z`s!1pw9>ujI6Z3n?ZqLQCY}S{c`GLNN9||41A*tm;x$J$+htWpU7fEF`#fFq5NNn@ zGWFa7`)2glZtHc-35T6Go(0mhzIT+my;9)K@FA*|F>ikAKlhIP@^>cwU62KthuKvH zX%p)*t_-@8Z&|FYkq)WSmE_q?0u@L!4fJc0Lv;DA$!<^hj$6K(feN;T`czK#~}SaEygX?}JW_{A3Laj*)i^X<8~> zvXiK;Q9CM*sRf5#eY(zeT|lL(0}iwE`oi{lYEkciv=3;9XZUobqwzbRc~yU!yAgMB ztROJ?O~q;cTFQs=i`*v<>&%Iu&<>BJS%aFk#&6~}bt(dKR??1*VCt}Op`AMpz^P&cm#b94M1zM(SuCWHNBkl z8q*h!OD2*+L0;rjL_EY_|&?#2!%FH*ma#ZACmbW(GV38 z^QQ6a6>&6w7QG5jdVV#mGC}BGyCk{_$irzd=y#j1R-83`$*GM6y#+iEY!R z`FNy_1&NzW`gu@4i9xRIUVNH-?j7BQ98#0mO4&yG>WCA6m~PaAj<}y@PeXbow}D~@ zWfWB<$Adx2+n46vtX3&f=B}i-n6n2%dYwmny&sb9JEaY ze3Poa1d)Hk6%n?ExWKD*=)MvZDJ;_VFYfO2i>rS@*WQP|5&K}-(o3G_y5;Y=zit3ME`?qXCkt$0$CI1$4WqE#OM|y* zD}B&+pRJqfIR2pMHXT&Feusf~(M0(8(%$vR+(30=Yk|%>PC#*@Jbw;YQPj@oS4CvO z2bro1$4Y#m%hRaLRSd%&Qq3GOfb?=+O(^8DRTXEGyp?V%AQ7TRj+&PA{%g-woU&03 zz=ivJfF|P)<-wY(=9s*j+SQ|1ZRkIpSWTB7{4A<^M(Vl98sDfy1>Y{FK|`B*Yzci~ z_pqgm`xZDgz$|gOWNgyc?$m!-+#n9H_8>E{QkTdcucy>eU%P8q{9_ zErPhY-Z!dCPn(@ck*NBh977=UQE&Ca*TfO+JEY{C`>N@XOwC~Lzdl%rL8CjP*xBFz zjM+r*Qf9_k6>vUK$5DHZ_yY<~Cov&*(o-eclq{l&h@}C+E$78v!cH5l(fG9@m)Gye zpV8}94uDjk6Jx*Q#!=lC$QFhaf6`x#o(3XR%W+7;n7TBQ!q6!u}8)URIdjfqOMs&y;!G_7Ns z*1)2Vj?cR#m4>G@c)a26kOfSB{G)5)xXyzbuqG_&L09&S0p^@R;;F;gnUL_{aNe)+ zy!brcLk~i)+I4&KR3t?vq%_;xaMirwDrT*LYi zmOo6wGM+H~9djb87k-@2jmOm69Wf*xWd8Wf)Vp)Xm0Nd#6TfkbvsI=m+RYm-;ZM%@ zhuW5JjNGiol-?@mV#D~$2|nGR^1SLOJ$P30mn6c2%$1A1gJoH|y3Jv+55}KsbL)FU z_NZ7Y^(G=Zt-@PO%0x^}fuMN)Xhjz-_}>~QUjT{Ec?42!AroxX4k6V%FDO`Vv+_Ci zv-`IKc`nPUliddixCRG>-W<2Q(z?Zq$)Y@d3r1; zT~^2Z#i2V7l0)7RTjS1$T4xHq2#l;#-x75%D}aOfJ3NcBZD2OPBE3QG zau*TG&JF0(*zSQ+bT-&raMbyl1|{Yd>cuc&(oK$2i!;WI2LEWsyEZJO1pJ3 z2AO5GBF+%zmQ-Zs*m`FwZ~LypiY46=f=4M=pf^g0#5vTh@3dQnPm+i3=NTsH$-z*In{ z7KHQ37c4o?E1fPj=2P>YSJRAhuX;&vuz>A%{XlWQ>-^`#MPb)DE@3*CW>HKHL}iA> zV#}C}KDHNViYk-?NAQlqDh1?KfrqL+&_|8ah58U?mEwN@i4q$|G$apf*KFd#Sco25 zWUfP-_@Qe1E01YAm#g$#smUK zI^E!vu}Z91JE#1+@}`eL<#3Kawn*`VlZMGstqk(ZDG5`CYJXx8Of~dht4s%-vUXJK zW|GU$eNUI9)Q=6;-gud)MTRCFwXiGutjhg|42Z^b!bvfXW90hlk{G30|pzK>~kDaZRH`^IW9XFAK%qmE3)82tU z(gkopC1MsPi+ z;mvysTzLb_;&Exs)a7{Xzwf)LwwsMI?ReHs7I;B1)xj8KKrt-*NUxrK$m^Tt6!^ID zT`?2=haZ4n%nrkklehV-S8|&jQ5-{`=+S*^bIlwN=NxH{xl{T%j;i- z>=JhDB%hUjtrkkl>& zr;gISa+&s3x(B1v}oNg|Nc0 z%tGM$cF;a8Y(w<2Fan#9qnZIot`A{~u3mE=3!sw~Ig-78gnZ2?T^@*+%RVziZ?{wc=)y$rD3RUW z3W}Xo;eSqrzt5f9Pg4wWM5#DY@CnbIWV^95D!|6=%fiMLWBGX}Nz*w7KIr%v&*^|u=UW2`*BB|@@Y%gfWf9GLTitZgkPE3*l_CBX0XYWKU?a;GCRn6%86zc9jw7D=W5Z>-uOHv-g=aF8Z+Y-T z3*@u>9Iw6%AHpcmo%2k_5xHa5B3JvEE4=6;jPiZtyFbP1^}6^|zv5JATY!QC+7T*W zFFL)5)hxyV7M}K^hae}nN{Azz937<$+3#|wg!K0|e4CiH0QUn2RAh4>Ign=Ji zVEPs9l$!nUQixbJNxo4=#Fvnt9t}0a**l{SdlDEPD;nL48+_{ zSYRHl^=j6}r}@cT>l=Si^_5;{0yF)@jO!$Ba$|0!TxapcK6?n_yk7NQ>OvAy585z) zd;}I4LD1!Aoj429)`MZsoxaRo@RYm--5yr?W_(ibho)|R4Ji_{(z>hBSVg?G=o7`L z0|XcQkoJnU50xmyYzH~zbHaDQmm6>;%waOg*$(C=1oCtm=2f1dSW$Jo@3SgbnImDT z93UH)AIrEeuhSI0rUfk5?cXmj6*Y8T!_Dd3n{SPh4kGMAQL%m07Z~fo7ZBYAv{w-& zT?Q#kz;ceu@{ziKy}{}!toi=Rj7M!-*5g9-w?VbTM*w#Tx+dh-K?JJ22me%WBECT*_28r%x#J=T?6bBD6+7)+@)fBD z>DD8&MyEg91epgXJ;>#$^k6QJ|zeU$c2Tr~-^+YBnCId4u>@n<`^h*7AK-xyXlTX#v z?*Z?CywEaC28QN{)Jar!2F*8-#)g%C^T%|YhiSmH68&7u9M!q$iY3z|WSRLjhY_QB z^r4&MmIs<21g|BA_?e>v`IpG$a0mqUkkno2z9qb8RZ;TR; zjgX3mH&ojf^6X;hJB-33Lo43vscc6i+0-WaslA%-66``uzr;}(QqksfVa#PyRmN3f zOYnMNg=_v8<|yL&zdW=61!yL@^&!ntKeZVe(d62)Wc!ig*$^wqhxwA$sp6=*3XI?4 z(AGR3@$!z^Ko!8IZ5-D{ZMe6yDxs^l7dXye4~EmEB5VdZS|QW5KTlnI=ECQXD#)sm z=pmsR>=AWBM9+npkBQ0f_f@ZW79HMopliMKDJRs3 z*lx-9)(`wrIe4`$_Aw;kSxhEX6hKav|kUK|e&oYU3SNE%FQ;d}nP z?ggT`Vutbbs6JCT0;EfFFS4YO>f?>0Ht6g`3Gq#xp!7+lWI!a*>ZDxngi%nG#j9WM zI9`v_Obd|KvWUhD$GCBFcTKoQ^cm>8VjJqX(fiYi!mKcsW#DH`v=WG<+vuK*_oEj| zhR=%x`-Kmb5LHwz`c$3BMR889WbZ)~0^3uj7F)m3WQs)r2L;y@|Ke4YQS?w>3&;^J z>`#-a!w>E+;fA{sEa?RPKMwmmc&ijQr)RfhSw0tv9|GbJf7MVtF2`Y(wZHeYruykP z$b4Rdk266Z6HXXLTEn`wx%SEY6&=8LiywdP#_;1o*DvllGhn>z4ZFd*1+m+TOYe+H zFtDU|^Q(Xd@~+B+{f2}pJ=q}$uWorxhCnED#O8Cqlrzq&s$E;wg;xz9`IMII%hH16 zG+q)yY@S^x7l_?VXPejZzzo@9IDqDDQ8)Phmlx2jzaH59#M9-pm?r{w8DN6i-GoDZ z!DRKh8XQ`GelR_WFC0yyoPF-fbqV`s$Wul4;NcV7>sb}CACm;xbMRl$NOfrg$quH( z9TG#t<^XfMMh{maGaY8k$fFR3Aa|<66;K{Fns{iVP*!E2fc+ckWJVqE8wA1sK*_3j zAa2MOT&xeAQiFifjrX<(Q*qCI^H=P`2Y)&$AFd;W8U7kAv8O=@GX33yq87fbgqAd@ zq^DZdk1!=qWd~FHAL{k@gnF_W{>V5-AXn!m9ht|s?j{ORXi0ZKSHpq$-7c-QRruP$ClY}8-RoMHNh@%3@r z*g5F`B-Vki9l~Z!vxM)|trE-h&)lW;=2NFmt@c)xhh$_ZzD$dH=R((s9nTdhM5-w= zR_5sdMfaOR=BtR_U4QniOsfpBjGZ}SL?YamYd3lAHFt+kg&wJgs`wQn-W?=QYIFv| z5zi(19Rv@uhL&sfT~0wz;eRN%OuP{7gkPV86z-F9Eg->)2)eNWbm}Q7clyz?Blmdk zVMtslP0y|vTrZw-ZiBBs-rExU^~p;xddD{JOS2U!LuL5`lmdJ31MS7-ettk#uY&B3`2i_5{r5-@ z!yMYxV@Z2&?0h6WqP2_MR8~Q0dNCeL;u!e6N2H zBj8I*?RU-Y6)KKn9vcuO4vozgWPbGu8D-P=e5S@QJnD*lP&jzP?OiLf z_9(LLEEd(7;xb&5x$C^(KAvPV!7oTPEGoy&dSpU`GD+RLZj~~IPdlml_!FlYOS&|f z{sC=tv|`4tGWZBI>Pn(*@}-~Tx39YA(~uG|rn`+(jrcw!d!(o2j-jJJW{`I9eJBXl z=3wybVzq~Oj-=E=6EzobS7#Xu8O)D^E*<5|ZTF*u-m!(fEQy4sD~jsC49>)CZTz8p zERE|9JvRV+JD%c~Q}XzHERcc3wM`J{Jh5gcL4EyhovnYf#HX76Sus7$*}fV^w)|*f zPa^QtJ(Vnpuy<&PyvDB-Yp~$!L|Vj2N?_O60}`Y-^+9Ads2Lk))a|{)0!f~I6uHTa z(@7EJ7WE{KpG5LqLnwKAq@r=Ybn8(2%4kC#OvZQ9og2*Dcd4;g(;O z-U3lj9I+5jf|yud$G6ElZkrz|<2|GIoTd9w7FojvJc5I5rFpbW;dwBUFF48YzBEG7eV?I=`jzN$D&+ERaTDR9 zm$ciGQQ9kP0M^`Ny@>r7bifkaZ?9v=$oa5_Gt#NvfBl#JV>j%E{^!_)=tOju7w>7S zrD`-OAfbT^oRn9x{|!kJYw0RtgDMA}P1aj+QQE5Q-FIi6*x*L+* zSU8|bk1i(K8R)~6IcQs2jvJag!JHd~el8CSF|_hVA#|{qaPHltGBAXra*Ts}DN>dQQ;CPZ)7l#Qo0 zWo1LpStzVsTur7QH>|0ST;3s)6QA`}g-eH_qTqZ$&sowCaD<+wK*uv z(Ph4;U$$k?>r%5^+GDI}QxkR@7$Q0-f`lZgVa9%}`L}|bf5aDh(EwzGowwRneJU|l z4q9GUiWoV9#jaUt6+I(e09-!=df7Eexzn$9%Ka+L_Pb9s;(L_Q+s^@B` z88B6hcW8=j!U+Pm=C|GICP@OnOUc7kQ)$#qm9#1mbJnWVwiHs;Dv*<2koGr>+|ca( z`9i&~nzNeRFM^xc|0VDtL<)02HQ&oi;0H^Jn1M6Mv*id1v}@|K)tTcoTG4f9ss0MH zH6ZO9!PwO^pVaFLE~~yfW1=`om7JL3XIwUQ<6J0xuTqD=9^U>N4&fjMR}~(j&#f&Z z9(XJGDwdPss{OR{@Ry2xQUTunT*Q#1ikS&X{Y)c{gBVLG>KHOWnD#_vsHz22C3G$b z>7~D*#PuE)%aII3l@i60TvN7|G>q5IWp}-Ej~(DZob)CN=~aO_#X?uSmW>Y^VpI6! z-{p%5xj-$zE?lLMSfN)lhnAUky{`LuS?x=bh=^Y_l0d8IPfW(=8}s#S(=g8A7B}+j z>lo;;seVPu5OU5E@_`5p)`nnMq?{k9m4*;pukfr5;p`YM?wXUxIo%!7pshg!{@PC1 z7G04pG- z2;VpIYDafr>TNk0srYpGD|YRO#~9Gcw%c6em(NC7&DINFO9@ZQK+Ohg@j^4U#{#Qz zANmxYB;S?uY;=ebgE9QRd2bhE)a^!r6SJ=xXnh=C$OAV{5MVv!L>aT49^6JqR!u}l zd1t&!mN?kq7qtm?V%N2QckrO=i^(O3Yr&-xIN*evbJL;@qx<-Q%nNUN`dOdU744oI z>9U;^J`k8W+LPZ=%9CQ!2F(0;1VTC1K(WMg{(2D)bCLp;*)Pa>(zBQZb`A=2QgX7$%>c*z z-7+^m2y++JG)f*z6f$r=@g*66Qe0agiUB2&N_m%rv3%mURf@)bv ze=(%E=SJrUVI&|d;s&C>99sXaX?*#+_6IVQm0q^v{?8;<(Qn_NF)>!jkk{HAxezAC zF2|VbWk6DQ>ae7h+MRod$U?l2GmUeg&dm04Yy##EQK1B;|C%i=8$Q067!e&JG>R~M z*pnrb7#s%tq=0KSq}5AbDoYzu&fJjBHB+*A@cxjNX-f z!(Nb)`)~5~lC6 z9*638i{$jAI4Gz0(g?G#^L4@3`EKktC=U4`9SdlDFdvOY?|jlp?y+0~Alb?x+7-Swof+*| z*l8*niD6NU^`N7FZpZ5&%khT}TZ0)A375e>$|l=hx-U?dDlO!RiA%HJjF&tFet#JJ zplo!17eaPy2n~8zA(OeOav5iXW`O#8q(4c&{o_!{NKg#H9VvXE()YzKYRK+i`4oJJ z!23i_KYw!DXweG~funsvtm2ogv`7_pCKHDXCPq~>n8a=1S9IVV4-j@$ z=z$+qx{T))KBtl658E{3F4))7wF+~5-s0?mT@;J;wX&oksC8irE{0opX^T5$EAr!0=9+Aos zx1N%T3I`ns-+mAZst5VS3;G4Ifyb-jv8?G9m5OeQJ~Lb&6o{Xu%ex?tEF)7jDb(oz z!l@DKBiV>&51v0~kV?AmLmH{qB!q>2`mqPGat54aVFO9?9wp~2ld1$%3LYC^=|C6J zxQG5fx$(r})I5nMVGrYPw2H97Qv#=vWWtWyAGC~uC!{fRU&+jwQL1e&)!9Csuh+%n}sYtsoG9%aa`b zbWPFSw!;8kIkPHVyR#}i_7wz_w<5DYmczZAz3o_gA_{uhZ-{=}CHO_;lWQu|H@UIH zStVUIpBOJUNC#ss{mXP1t9T`x1S;JAI1b@^7odeA9?@spM4J^Sy1=RE01n^?E}TdV z;TU;_$s~pCcNSKy+f=}nyXSe24cPT@cR{0R^D|i20RHV~R znN|2sw0X9Sk*|TbZTJo><@I0Ww*z)%{fA4USI%I}CFDa+H>zgr9&#_ZQh^<_lVGLM{LmfeBp2WN={wVK*cZyz%h)}bG3epheru3&%-9Y8=BT3meF5sCg&QXs z=dfNVZexbj|B&#$z#`7-4I<;#Xn(uj2^Lar@`;qq9!dxpL<7HxQeU)!DWUTcZee>bZcKGxQ&dlr3?J|>M#qDJt*Gi~w z(`5wSi{$x$Yb&Ymr4dW71!@?BxR(UN@gY~yM(aoF+k%BZ*q*>%Ts;o-O)v;xbzzqk>GS!+#(-&- z+V>TQ4K8c&IMj@59mS4dXY!-TF-?5y=f!vE*C^_=U+e`%K|9{pr<$5N;xflQnKn75BLO9nvY>9;Et6NN`4gD{k@awl?|-;D0ff1 zn1uqBq7ru=vuKUme7J+eUT$e@QqYl-9p@mixt~#{=JHmM3H)^C)#r10GX%vnfZS0I zNAd?GO`Kw3LLmDe?kNC3GQN)*xo4(OQ4R7JnqA5EQ29+ta3p#6BE;e{c(TLa$(Dk= zckzd0CCCAJ=s=P+?G7VflDuOPYv$;~N=0xagk;rqi)E>lylsQdXG$%fX-9OCxx$49Zu23`7tHAI(#2B_{e9KgTK`I}k7OBrbsyn=JeM9Gm#I?ZOz?exX)+ z>I+cQzhbFsd42qTlo5=};>HYOX@{FhXan4JweIIfcAp=R6KKqv2rmW$ZooQmKwSK( z@3t!LV_6y}j~pzEKMI;*TfRZbe|OCqf?TuWumW)Vt4;L5d%wNJzk_EEtMt#)m7c=+ zT*!4Vr0ILL#aLb*>5uzv&-bhs$v+)IQrKGmO-C_M3qto*3a)a}L$=_A>)-cR3Hox{ zK?zX%IdYbN5W)XJ03qzt;?})aZi#G$k;F`~q5y3QIeiI`+>VER?sKZE81dBarT-~M zqcQ)%Qwb!+@!M|U*Si1L&D}~AkLy_ChtHd?f4l%Ry=1f;S~BEmeG~OO@Y?;{ey`mT zO=LDr?-7hQTC&)7V(eZefHAnNu~hUQATTc>5pLdVT-hXeST9}v#d z?qKFE|BIivCR_Va1Eld9ATgD}C=A@PSh z+Z3sWd1lAAdd2{oI`npB+-z4K)Ie!KeW)(JTVeb>$U{64uNePO1Ze6AvS4fY(KtZ6|cqhfDCOoNJ3^wR`!~-O+6eitptK-+8p_N@!H; zrQG(-U5aZvitqI*-+6-24dSMA*N$C=*JH{V{oodEEEGx?)$X&WT_0_}7TBKaM&W)- za?U1mxn=8#EBG?Yg}EJbnpu7P#rG~siR=?a>mKtHQ=Bmth38|+`G#v-^x(CJ*EU%N z6uS1};k8*-0WDa4;C))r?)M%dId8Bn0A*IMJu zrF1&jyx&ki>3)8Fe!jc&Tn&s`dp23Vy>Z>tvsm+7bHEgoG=BWMwE9z_HD>Uty!kBp zcJ)V;qPEwjt}SJIgJ7}zvWsaq?b^A7*G*bQ2kqMB=cjv^dByhu_jbKv^-`}Gs<6R+ z`-CUxITp3m?YbP={#@0tZu>eSa2I~t2JpR!oLk2|^@cs;<*w_i4Q==t*-tO=Cu4v7 z9;df9wocdEcoQ4>|1IBz$K;Ya&9Zkq4@Z1@QJ%hkSMDyxo=Cj@uGm6feV(H>{hcb> z&tBF#<_lf`bz723!~&751E3DvE*}`qw&j4a8)`3dxA1GuQA+ztu-XaY0{e!9@nAl6 z4H@?fMP-FDU<6_itD(ef@gPXHMa;gvg?n|1Ufcq$@>YQ)}ap#x~rh%XPGLi3PuJ_Oij2F_|M6kjCS{X_G zFVY5smb|n4`X$cCQ(TS_SX-ydgsJyc-A61cg@Ok2fWwfqT?$0-;a zRvqJD&?!%fY0Oy5f-tVJ@~{pnn+h8ksl-oPvr)&^(7*9`bX}Q`)_cLGmFTWp^Yh1v zl9d@&Wdm=gJ1FY^`+EKY8ro9}T)8N_U*)L)>FXsyXAKjcQW{U6U*Gku`QVtzze%I- zsG*l9Ni2Fh<(#UM+BbXgmmXBV5))p-UBwZ89j94ZI%?=15w-W@o}89o&)(1;j+VgV zJGZb8X~vcvF{yqK6h64Xfoa4jZc{F_SMi%SUcsUUH6<0Qf zTe@<{+!pAVEUPMH7ZCFPo;879(6#}5mFjHNqsG#P}(L{{-apd=Gro*C^lu3l znqPPCm{u*@2H0saqdF7d24amE;@_(wN#ul=e}(=ghs4noMg0B*f{ZxtdsySR7?JDc zMTq>Nq3NAbrn54rp(g;0luSc&HOk9@rwh!cRs1-H?&c(HRm}Fh0(XsHu1)6Kc)Ou+ z*V1g}`ImIXA#sQBpU6T}HK0nxYIJ1`dD6HJ7A3?L)w?L}s*-urST<7DJ$_aZf~mys zm{n|z`5*BaC<9OHF6r%4(+3Jg4y?MZyQTxQ@sNc*v=euoJm=;~2Xl%hE*Cdh1?%$m zvgPdW7j`Xssk}?$(F$uB$E&G3J_>kJJi_3Dt)wL^p45>ohdUh;6-L<{B2kK{cv!T5 z0W|Q*Z@74+kgn|4vOI-v_2cUjOhaU)c^bBqj|S%lRd4t1yqvg0=JO5a((+BouphObuwNQEPtIsNz($zg_9H&qw&U zj&!!}`)a$te9NI_fLdz&L2o`F7a+IH3VPKhbep!WF>>DTtXJ_Ar>*gp2v0<^KhjUj~Jjxp%C0u zp=)gZC+l@#UO}mQcAZuK?Xfuw+$hB*{;s)5gCo`o7$Z9(M~7hZgCiC#21U>AMsO%n zRj;#Gz@o^;c4u&v&ly}P44=lhR7&oJMG~cW_tq(GX>a549qqo`(VMu_H)QOaPY{{g zXloC5D>6f&u%UY;EpDkDK_@H{r}oC5+LGki4%hQk?RC_cMsbVL>fb9UPV(xcD}^$) zu;!u<85UdBZ}q$`ax7^n@;xtE*M^Qkd>vj$w3wt=XWr}8<@|SVKv879q33wKm;xbN z6feGa!xgWRwHT{WsCDh4-hIP)>n2ln4(7RaVB5DE0!$#d8E28BGG29vecEwyNh)B- z)6Z>ou!~h0=7fnQ`qYPIqSBwFNy<#@#>y8KWRop?d;jwK7<~5^7Br1`eX%TDekKOC z-N}^doU{BmVtG>zgCDZ}Nzng!B5NajpWsWZa`0&WlP3&E0NUBlT?Nz0=A5B~ZyGHPniiB-hQKzc6)!bQEBeyYGA$edX1X_2o zd-U6VE=3-rx(7|NU;viTK;b*Q@a*4@1Nsqu%-1HU$Egpq&HKRX{gR9wr8++!+dva~ zVRzfdujssz)&Dt?!rVQ5y#`w#a&Ou%kba32oKctzi&OHb;N&CHJ%+3PMT13eY7`Ez+HiL8)&X;Adu ze+Ly^j3pM;nhdV_LjPhJsh%@Cgz#xJ{1e7@6y z+0=AC!c=-lnApcv6lmbs%J8sYZkuqvF%$ee4-M-#GO!ChX9C(?BkE;LZ zZPA3JduFzZ9BHK`P=LLMH2IF`$99C%qPAs;bZT3%{U-S#~3g9!F|Wt>5$%Dq(i za|u7pWtxZJpLs!hT$Mbnfg>k~m3BB9DhWT&c z&`CxJMnnY7ZUYTlv)Bebq1yKydWMrp6eorBj;;rOHG-viokAnaJXzz!-fhyE9MOAc zdM`0(?8pGf&M*=ql=H$yNz>HLSzyU5LkG%xKjwI?X{5i_JXZdfpQdeE)UWBO;wXLJ;Qi4E2MzQTg>0e^Pbvap=S+$$& zHN9$&g?&BKs1O*axWut9>eVFvat(ixhZQkO#a|IwxQvzJ8g{b`i2Qn&{&{&8oYZyk z%&6Ybd#L>J%v@PFvxV^rPW?7KmLk`p6~v6s}Gnu5*99Cuwkwj#JT4xOrKO z((n-e#%O6DzSx#jyep5R_U0qlL+@~hYH^x?F;*?<(XBB=#vFt9+PxV(mZ0)wF4s%f zgB+EK@T-E=`vEFPrbCob;BSI^p3=!05!FI#?JN61p)XDc-PN)bg4V^BF^gfoZW|N^ z$yZ8CSy78>JYW1bRgVN2u6|w)KACj(;CYXa@q%`(3D~cIwFlHqT_Vn(ux_B1+gw8? zc2s2HRzcfB&w?0wx5VJr8w!-@dffp^tE9wSHp6(qQcb%A?_^)rjSGN9>&0wgi;fy- z#ISa7eCdi!*m@a5Ynp{OmPJkxjYB&B!6O38WGPsD2c6+6b)37$?oSIt1>tF$dN|w) z5`|3}K{;-tDlKfh%hAiV4>}~j-2fiw(-(BP*wI>AHy!|K!lvc_Q1YKK3L!lzydbBY zvrS(R@79q5YTxs!kz4Zx6FHLBNWf1ug_a9jgP)t^U#zqnAWMl8{KMNiweN{5-lLV! ztYmyc#8;3E&v2iUppWZR9qo+QL;QSY!dslfk&b_BICvXy{8uLa;>vrPZlwOikp9?+ z^Wb(e{~YMRB$h5=EQK4}PDYg}sDB0IU_uWkBAIeW%g@Na0cRPJck<8J@|NYqc|zQ}41SWi!^gS)K7i&(uRfO`i%w&N>q8v3V? zJ5zG#InmNr z+z=y_(9L7HB49caD6&@+Rn_=c+0$W-Dc=*GGkmrV;rghGf5oVYC5f8O zlpYh1s^YGS3!0gdaODoZ&!PmrC+i#T7j}Y1DmCYclV!uW3Ng^m6fOy1fJ%mAUr{Nv zE#l?}%et-ai8bCH+`d&kt->>7oJh(EWq2*m;U1zuc)cL%5MkaHTa_@aEyK_Y;9Ang z6;#y4*qgK}k)E`Qm~MjFB!DqR{G%c&Q_8#PHyJKo5hfpE-B;;uw~G&56Twvjz8g2= z>d}v7`n?-`K6tywTwB}WMxMl%EmbDG@K`GIXZ+mP?y-%#A^rEK z;&Vpvi|*&2EiPr#-|4tSS8AuXC!GxRbD5|55W2XLCQ)6(5i`Dp20%C6q`YYdsYrIR z2!MoHTv+wCf`lZ9(1P2)ABL$SI^R}_6Mq&+Dv-YHgVneRgseiC9tv~A{(q{$Cs7tS<$dg2IWRFvH!0SC~1>$n%sU343m0Eg2CElXcRRW$*2F~ z43yo4&T5zYx2Lq_@(j-#4@dv}!OsWR)ZK;f^?2Dxc~cZOI{$;#4i$}(^*S3=!GpE$?zHuh0^S)|ptCz_x9Ug4n^b+V2h6H@ zoPcU9!xNYH|FkHlB^8{djX2lVg97@0hQ@p$nNJSv505(-Au@1xAsb?})aYV(Udr@6 zN=!+^qcLO^-AP*Lm|aGUPnczEZ42ugFrH=$z6r(12hoh{CHF0FBE}JEWaL`WX*s5K z*#aTnf5OZ1K=q(}Hg7{XU5{T4G<3E>gFlj(N>y6k&Gseirx;jZbLwr#=NU|71U}U9 zFi?|~pNU-LF@bI6vpfy`!az|2Ng#P(72(?;TR4b~? zjtzMkuws3j;p;9)X;6pu0Vew%-z}yjvhX`C8(N98X%;aqM7Af53|45pmwV&=cWfLXbZU<~RewxuFo*U7!(l)UMg1E8 zOnO!n_@OfM;%n2_;o6}@Ag_jngkhXO#o%cyV~~foI<@%`_!sZ#uzW%vlr#QZk!9XpA)ZBXg{9o27^k z^+*wX(NZ1zb)26NeHt5`l>V(ZiP=%QpY&z06IILN`GfIN$H_>jXm_KxOT5NtY2(0a1j-Xn#znQ98S6M-Aig2j+Gc1Rn0{yz=*pCes zcdzb%X4e~$<=LMQlFCs7tEl3wqmb@7p1c4}=E#(+Ti+mw=6E$ccKCc7*Gh4TR#H zV2Clrk9a-|zN~Jt9Km1ZNTZE7p%T&;sjN*d&Kx62lM)=qBX3_sN-x7Q;)D3R z=qJ|VW}mvF@)m3hP!ibNU|SYdSs23b zpvcWsM46H8C?M{`V@8jp)`jJp_Im=8+MHDU_vSwWCcQ-pn+I3qA+qKjg>S&(3AV+W zk*ZHv%JjkNdFwZOzE7Y<@ZmcTIg*f|cK?Cy+l?Hdmz+eQ2hJ)UU5%;_p z!W_@kk*U`Fo6()9sdKCqN57|Pr!|KF`D@lG6pN^je_BGVewTlW9;Ef$$pwuZc26hl z>!~cc;f-dseN!UYp(kCM89SnOI%YjILaOq)qO|fk(2MoCj5p=W5lP_=e)ZxN=VF^wBSi@o1MAO3D;;k-P{|Ghrv=_0V_5kS}@SW zf#NjlK?qQcSy4!P2Sp3AZjx<2A*C@=(hbcOh{TKLgchYqLX=-HT4SDd5Sazqtul1k zFX-}|;cUHl<&C- z)kEcqOe@*}d3-(yQvBa9q8|<1rzy}-&i&zDzbmqGxVa!Mum*k$h2gsl#<}~AAgPv( zG`)FMknfCL_Z+*E&1|D}UZ}WsWzZLaj2d{e#}mBW1(eEuunRrU8S))Q>^frn?|H@<;|yucF?TwW~Q>IG# zYkO~FFGhM{AbA*!u1?2)-R_VpEjc(@?VsBs6pe)TCf)Ku-0)ycKmEmSFWJYwJ_8n7 zF5GzRRlC+Aeco`DP5oYi1B-QjEC>Iu`!?>Mlcf>kLQp|oJ`8`y($Z2xU!TAx^~5dR zlx7X4`4+5s6Da0y{b8!APNsMR7}}%%fVSO|oT~nNtlF%lD&z)$wmTFH2wx@<3F#Y_ zrZhDAZH9B4em1P82mr_%8gC)!u72@!1UNG4mX<3(OuXSo?whc364dC7D3fs=t$2e* z3+R9RAz~OKrBSDySV@I0KcEIu?tcc!8``JKH3JPSeE=o0QyMFY(5~6vg_m7VsJrp; z6FM0Z#$~cf@&=VBtGOTa>Gpa?FmGtzbZ4=r}F zGT|5zy-uAnNU>6{a$TgeFTACVcE}>I!|_2Sf|$lF&pll4;uv7TfjqlJ2Ik;RWT|77 zbl$+PYtdRsF7He!4(C_`@}8qEYoP=#;uY^O?}{)uvWbl|P+P^bY16^ihby#&J}A*J zsZG@oVMKN_y8a=5jwz`LROcdK{7NWJVUs}PQiDGo#(Ox+y(kPQV^uibH>f5w7{~!# z6-5leUbCEfXI6?u!#JPj7FXVh(OTKrFIw1t*vv8fy4gp5)9>Sf!Ba?U-^?a@>PiNWE6+IkC+1qg7bh24d4Ztsc6T2~+rrr3juRUr{F7#{V+E7DONxMwt<*h*Ik>!z)t2 z0xEyL{FnWZSK(97f*@G!E9bBZlyWgFjktfm`s$3VIIU!==Czz^DVnz1?z4!W}paA>6rF*DT2-OH3ZM;!r(B)_?f1r&6hZFZy#UQi*BfZ4CKlul5 zg}%GNPHc ztePuoF~w3BzZH13ddMfgFZ^0Krb>T|YP(5n7?vI-?I9?`K~ot@4APuJ4L6&-9HKG( z>!CDXc#0qnzNfsGonq&!z~GxvH#CT06{qg-Dx>eYU=oTLgB`XhS4SnUtklh`$=#+g z?~p>MNQvJv<^c}_TUeP?P#6jyL3ue!kB6!fX%9N->CgO!KY~O;xg~jBlxh{%rh{e*fukhsH+ry>EwDpsiCMs`wAF>pMPQ>kOv9q z4Y-5r-i!OKM7-dDy71edRN!s$9DDe$f~yNv=I$)7QV_VA3beTuaWQ|x68_M_tIRlF z#p>DN;#b7)fiQN(CVS69{>s~Sx61c}8Z$F_D0@99arB_$9Pgxgi`M=k3-aE*n|oZw zh@U;|L&96z078pt^$Wo;O-z^3{HG$TSpCuSb#sm&Q}0?8#6|NamiyI1t*HS~BhQ|A z^eBUb5fQ?2#Bk&ha=?n~$S9@4+(kTEw-Y3pM#o=H^_u~S`Mw%}XXs1NB_|o7m7j=_ zu!86!1C^~J(P!!DYG@{(Wb}pPuPUZ}-s>d()|xB$&#JFK`4GnlvFocA)LfLe7jWN0 zi%ugDcz!A`T;H?15Q*OA!cON`=bkK0U zuZO0cCawL0XFEv#8vKd&`aS(}6_bqkBL4?l!(FH1xdP7m@cMQCGRcG zUKBaaQY5&%8V?bj8?-wRY`_h!;&|eOc@Zl57SC<7_Z7WKwG-JP)zcW}3IxYcq0xQ7 zwStXovt;@q3|kVsII$cQb$PWqFy9K2hryy=B9xkq3t9F?-~;J}*{Pc5uyL+*$n4>B z&4vfZAAt#SMt&y({k8`rn3P_xry`!cu%gX#n)L^gAC@6|`Y>2#x#)?U?VCulFP{?p zOgt(t&@Em;9Ie9l;~HRR#<-11tuHep6A>4p3~g0bXZ(Se7-*oY{} z8A=rSUKUqgm-;&#q=&EX$e2fFM2Iil{xV|QmlwXpKAn7=$h$2fh?YG~Cgi#pj0KFa z8R~kt-aoxk2)%^6b^(Tg*{08?{{=YzTYI3-3coWV+1!|3F zme2~UT$ZDt`{oPQw7e*lp^`*v&T5bq@gT$s4-te9WJ#XBDXV-dpBe zTj}>OAYBTqt74n$7&Lr4bQF`gnu?vT>jBS`Vh`DObHGTXdhM-SeH$h>tg_0eqO147 z^f!eCEC)&3WEx{Ov^PO1Q3aUCr1n0~hMIG*MQy6#PQ}jkSfve4cMgl_&VSI?Pya%u zYZ!DWh76XtDxDBk^&2Hi5;|w+X>ANG=VT|zSd0p(@;EllG6SAcLrx%C z%3fNS=o}bg+oF><@U1S$Ay1kkAnCVE+(;W?rVb%0FWn%L3+CC-yoTYWi|AeA(e3%cZ4{8ty#ixdI;0>cZm?rheQDgPiBQy zC&~j|fbmonikW+=-DizU6;DH5$W*v1*K+#vjWBa?sBCk_SJa`>#uiHbC^^P=+tmS) zat~)~nV8n!ihMLBNm(W&`Ly1FEvPjLqEvjJ-k@^g_L?V$xH4>x?Q5PzrsT>_qZFmS z8FGB7@*7!0P{M~xt3e(vaY+$Iv2LgJN-4wnOOqBO)Vzv`<@a_BJ@swyV8uDZaLw{_ZKdQgenW z)}k-4;c*uHOv3I(C|GHRcjbgj`WU2SN_A9q!Cjt=4pqBK&|5Y z{RLM6r}voFHMe`KEmS3&2!%@m3D0gbbzgzw?mwQ2((1d@P@F%x3sL4B8(V|p%u4&C zjCx6XCG}o$AhIoTMnM~h1#0o(LIVX&fmgu(xSbZ9imZjgWMVHN*&W$VhKNo~Nu>q} z`c>}b{7@(Qh)lCgB?raneiql*MF?J7&oPV)^{(ND<`NdwQEv*Vw4(S?x8!g4fr z0?25dkI0x>qOdAiFgf{m0BIoW%oii2S)oX<9jQ5Oa4igf+SuPn^Le^~-G*GV#;;`+ z0WFMXg&nlf(N%&~sT;mIRn@&K$05dpp2Z_^AI0=0%Wxkm`O$rgra~2Yk}a4I zxyeEh^qw0t+>!zy`Pq9lTOwyw8~_T-zz95t{?eGEi6~6g$kF^?ucB|f=VK))cQR8s zVE-e4-<;Hpe-&$vChoRPYr61|D)dG*Q6R3-Qv_4wgZKirrh}kq{C!0$?wnP^#=CK& zR`MbRo*5&P&VyTx>7q1z@;?px384_aAO0?=k|TIHv8IA)-=QWdlR1@i?<>kjRfI^X!5xAMHbCA+w+ zF(@8P`Gx!_gRZ3JgZ}EN>htf1$GK5M@mjti3MvtfW%73At0>z|N;fs=Afgdpi|R$B z*GDR^L>cyzWjTzuO7R(rJ2Ok}I0oBsaEI9My_wv_R;u>`(W-em5^)rl#7}2NObJlb zO_1`0^cv~+2CrS90x6zo@f^&z3ztXlu)LaVz1nfgDM9zcdo@nS6Wf>W4C>^F5EIWc zwnuy3Cv_z0!v>=(X7ZZCC`-X!lmm|+i{$~aYF&kzUD(8Hk&Tp*3mARez6_4kY2DLR z_Euh(d~~mS`u^906h9u9!|gW1NPZmYMJ5f|e80JAfP<1_KQlrW$Jvd!ix_4az{cnF zun6+5RWf2DylxJg35n?KyW%yYtUcMi5$T0`o(LgT+weiNefM)Cgo-zN_?wz41)fv> zQ43KO_Bww)djZFz&lHv@6ecgZl>5}QYA zYH+CjQ-jpZM}5! zV1D_z+3`R?@;S)25-o(AE7v{=x~nmldCS>)2~RAFI*l=jez2mFD>z^yHCC(eZ2F6_ zJ8ghzAzg!rS@#Ch%<7ikM-nl_OiwFY&}Par$+~RL3|yk*YhR?_2uC*M?tggfX_b>U zm3d3in(_8@f^pz6)RXqVKFe?Q zuduYZp9EU;=LR&X@AI~IM*0(M40v(+WRV_)l$8Fk(pTtyEauzdv)Lt>)KxnyimyTB z&QuO-qaXY9ylE=*-!O3%p2r8%Wd8X=UuE`uHYdG4hcd>%JfgI}8~I&D|EI9Y&G`?% z2|KW~x9T20NIeO95V_}Wav{JH?|Yc$`bLQ;afQFG+RNNsK4k0ZXkwPX;zkdj*%qs* zrG+kFe>9Y+RzW_?(ILA5{!xsKYjR zTYd&H);Tqb0*rwdu$CtXb=qNvi7IF@<%)uAR3VE;xAVz^pau+HJE(g#4pL9_K-*@HOKDzyS)u0c8%VmhZ??7BUeETU*e@XK=MR}ojB+=YiR z{I!K_i)s#y92Ot>UwYgd4sUR6%^8V1!dKitEx0&D+hW!z7bBwM2mZrYpOTGC?YRlF z9mv=u6rhyMI&P+wm`azmn2p)v^3J8;r$p`{&wa( zGNY&9)ScpGm+Z6?>GTh7#^X+g;`}20um~a}ngyJN*~45_ zdGI|H71XMnjq*XIsG11iF)Hf}jx9D*Ew(H4{mgWT^mEPtb+eJA`UAP5))ibU`s5VAmBU`nXoHq+zp`#^`Ymd2jnt`w82EW=ESh~ z9J1zNW8cQQ{3^APZ~(>T-XS!#!YP z4Z15}1}zS;DG#*U1%kD_g2k91g85&IAoPU>y%ix8@8>}+`gxcYF8+(D=~2G~KPQuM zUjeH$leOl10wlL`*4Wi?l}Qr9r)Pz6RWRfGr6JPM(Ype-!#D_>%?W^1h5|=D~Ic&eCjhRVCm|Pt-@N zu>4oid#g}7Oi=gaS$JVH@9f`?g13=eZ*nBZIqnr^!V4Qg4CxCs*II@#JVdenq%wLx zHfP6YlM{#MSi5PI_tSsYT}stYn(+|RN8%pVJ9{5lG`ThNJNy&H4BN!!q&M;DLbTHqKuN( zwrZL9a**(bhV#^5NIg>;1=42}E1xYsjaL(#{>jVVL)6hE*=N$*Mf_Up-4{A{HmKr! zKe9)6H8sr61IyMrWVDvM6dVUKvO5ld8JcM2uP71kkb-F+AK@e0(1{dqM=ACOWBIQzXy>fpuO5!M8@gGQS zZkm+NqPvnLj zo@6(_MB!;;5Q`Nb0jGt!Hy$NKV{09MJIAV6_!Q*<=u~Zv3WDY7(>^AQs9u3`{wB>B z#E@wE2R?KB7Fixc-r$lvC~y=vOM0_&j%Tq&eYWuPefY*b1aD<4q}H~3hFpx9gH>#Y zd?>QBp^!plDON>O%-qHNz05a7S(5;vr5o}bAAXrLlSJ}+ai<9D_?l2mKq==6fU$>3 z0B(dhzn(&3a)*MlP=CDj`Ysrr+F!Jnk{^dG--9Cm(Fr`=n|reZn`~v$qRN1Q3aUjI z(-kq@8WhhU!Rr&Q^`2;?9`E5DI&ku#$y8MZ^$uYy#!gy8uRbZO-YkC|YTGYR;QcQj z83g^ynrX>>K|UwU`Fyw73B~*i33D{zS!~ALKVzTv_3X4sK!JHKXhE1peq1vn5$oH} z8RAC`KG>t-wq1WYAHRDyK<@JiAP>*&KSw5Pe{kJ`-KL=&9%`QfsG1Ir=3;ma;4}S? zm91X+$pdNG62?ZV?LG{eLFsir%MG%@){0aj7E#|9`wI5PW^{@R7}N3bp$@%a&#Gpq zZeMvTVEt742a34c@OpLW{_2ElZ;sKLq?)%^={~>GYqma7@OU6q7Zpm)vDzknVL&G(?;Cu5#0y%zK0Vu+ zYr%#3JY!bI-yYmMM>{iKfg9+?m?PYEIX>fF{cXTfB#%_duPS9Y+vgv>HvhTD23#$} z%3_V#Imhf{D_1Zg2%o58ZatmXb6e*ONc!yZwm^RFuwXguvcQ$UH9^#a1=GQ}$^J!6 zLpW?#WQz&&Pg6Mm2xN+5Z`Sf@PML!X(_JneMRLtR#NIO)_as7}Ictr5) z>*i{6Go}0oH5dVDXGzHRFRgsX3OYVsYz7v>V;)*tQHzxL-H>+iknWv!=hdR z&FbTUrK?q=xiC2Y%G+te++Z`lw9~eo+z;JX2`uv8SJ0oc&p#mc#_SN{o#^1weuvTD zLPdkr1C=G@ELpA!Zof_0s^!8I7KM-Y?k6y;#((oii8iPr-TW8 zLJV<68aJ-qU#69=%Vnr$KbD|pH&D1J&@hIEhl!*NG0=Jn=_VG0J~V6ed2JqOK^5!h(#Tni40;l9)m<+(h)SE{U48pI97J;EUbLAXq%?T;icp#xRVg z+=mm#ezfm>cn)j%dY|WEn?PhaL`bQ zf97S*wlBZ*oJ5fhwI{7RB2G6SZo=+|-+1ZL@2?5-jLN&&iiePA%mWVluD{_p$vX?N z`Ml2?^Tm<$edMY->kxwQ^k?Clu&J{kryLtP${IVYL_JJoQ9a4@s-$>UYXc{}^L+Ht zsHz5NQx;frumF@+R*&Txa3i4V6pW>I7p!+JsEY!D>baOJ);gd)(Xs9iEvUj{SSi?= zPIACM?p4*PawBHb4Rw(yHAx~_$zT2t0MbA$zrC16t>C~ZN3gkX(FYx`tgcsbG|5iW zGf3@H)_Nv#imuq$lQ+s_A)7buGk!?^+?MpAU!xD< zCOvCa8vCpkX0?|15v@rd*CB7dO5-W7+U+=j5UbfnHk&?SQzN?Vz@lpf8WX&z0l(Zv zA!?&qXrmS~O{xctrD0DDpYXeAhFt^{-mkHll`85b`WRu6ou1JqjYoCAL-%Kb((9la zke^?s`1E`iDetl`;NuE$dV|lNaL#`z5K(#gF9S3`=*I@U&p^1d+r&=i}9<`DQ6rA7VOs-tYt{U*PflS5l8qh{2RFZsxnsV{p)c+@Af zxdP1ppS}M8v#Yq$h2eR=|C{Hgx#O9!O$OyGb(GW!-L0GhIU6uwzyyO$GGM?&n_$3X z5JD(`0s>`}V@sWL&VBmioO68tchynbJ#ym3#ODUA1cETD7Y4IBcum z!2UT4uy5{7@O^v`w)$4eZ4K(W>QGIZt7-2>Biog7G^W~8m{eAKv#Mv_)>w;x_ zEKwPaa;=N~?P(}Mx6~PyG8c`_sA}z>SzeExYS}4ZL|qN(yt)Xn^8I*cPBvxUAs8AO zP~XrBU1JBlC3Vl&p-vXnzPfzH~K z=&Y23A8SxoUyiCKzPq`U?Ukdcrbg9e7LaV+il%auw3ecnP}U;#wI!fkhoi0asvdbq zWeIvJPNJdiq^b{ng4c?r%tUP?x+^Fb%1fcGIHeBkY^*K8DbCr6CgQ%j8ugXcD$Ba6 zrW)n7l`2!bw60o#1jB13m|R8R7^JSb)VMAq{wwOLP*>T2x{5ZGR(GSKigK&G9Bt*N zP|tBo&2??*eza}<04*Opi`rGMs0`84${G~2FEVB+Z6S5K+sY`XN~H#RIl4;ZdZo(# zKG{@(6U`N`Iix#Py z&i)?mD8hlRqnx9osID(!8&VUU&#+BtSF+D#EX~E#xu-f{E;)f<(N3&dJ_|Vf74&RR z>atf0j`{8~zPpHcQSYv5LUUyk`$pa3y3lgONI*`nA*$pEB`qsuew$+ec zpsQ;`b7LE7TG}ZyJ8_b__;5!9j<%6MI>?XR4QQjBk=;OzhxZ~*J_Kpa`0iS4zx94> z|HYH&I#Gu1wjR{9_Ocy4+Ulsos%h(18epi_s9iyF=7iMUK6{Yb-lR9;?dzaZN@0B+ zsB$jUBdt=(g?g-oHcdZ}cbs|cOz3;|>!9x*!9{}dNFoq8q=q?5l5^x1#^Cy;ylzq9Xp z|Go?a17)-Khcj*dZwr0x$h-QFs}K4It_OmFY~ubf&@zms8ZgkpKz|tMnZG3TEux$)4Akbgfq~lW z4+G)kOz68$0_Q%TPsIoagXM#8Cj6HVmVdCc5a{kvWmL`#mb+ph7*c+il77{O3YOc_ zAmvy7P=Hw4lFZ+N|kIjji9>@dQPa8wJd-Hf^g*P->UhXAb((U2MTgoFL_ zs8T4Vlowif{!pI99gZUCk>ckB6(F~O7A1TitpoNKA!0DW5ecc1>9%AXmWT_+q!~SI zr5n94BupHz6JZ+t2d=sfdne5SKG?2;rmO@PG0#ux=x8v=p?=VA40B$y^GHzYiD~+80f4gw8O2F!##W9 z>D43L#qqZj*RAbp(STkHLUc+zt&Q+EYvFIRBhW*<>jUUA+EiJGb_%H;eHSd+T0(vL zki~8bQVndYicn)ktTl*UBbzg&VCpie`o!*bqbdob)6;1%)2TCQ(5bV*EVb1;Eim?W z@tJyPT=g*7n-F9_<82zm>a_?r=;38w-9|ku#vT|j}8WciT&1Ubm%l_6&QLosvMA% z-ZA!eu#X+2jcyn;q+hK~LATa{POVcxht7=-tye+2?vK!SO@41Nxanv*QKPe~Ah2XS zH?Y5@W*tu0bSScEP)BH$`uPSUnoKs7*!_e68jXIm8f>bpNxi8Nt@>7UYorc0B?IS8 zGPqlN&8X8`QDr2U%&5^D(9%n}(b+>sRx+aL?De*zP1m97vrB-w!C*m|*@hyki+yuL z)9Hh`)k~ba(W$YcS{AJ=7BrE5#%pC-P*- zjHYHYs@gmXnp+L1?PNP??+&-ufwUDlTZiE zwY8y!_>}BULtQy+)x|JXRij5ThGpzh@4Tf5olU2psjY>+x)#>zB3NopK+F5v8tYKs z+>)*%e!3>IJlj*#hW1t?>Z+SyV4KORL-^hFagdtu5-e|~TsG9y!GGd7-kdfAIIx2_ zI7U9&i};#1sEgMEpYH@V?f^d9%J0;RTL_%3DmaKsM0J|?0+TsLO!cn z>rvZUrLxH-*e99v-PKYuq7F3@sO~Ps$*xjJ8HtXXbd7SUU*14yY>*n?QYxYatrd+b zu&NGCtUG<6Vr>N)YHHOXp+)WWC~2)#K})>^TC1wis_K9@Dv*F{XJr)(rR6Xdm%va` zq7Eais3ZO*a9!U>ARq9%1kaCgEK6gBBo2JYd`Dje%5#R~CD<$V(yJRPQPy0^_N#D0vb&pFc)dksPD>_! zJMR@-^p>ZywB-;;DHEa=8rq6c-B`?iNpLz{9;ddh5|wPTlK8LTSewgeQ`LYQq<`*Q!t1B_Q?WWv76YA8F=XND#My?N&9lqPV#kr#f0u)Y*&^oed}< zRFTK3h^z9d6KHNY23zf61h;<%?L!aZXht6PO`VCv{_W_gK7wM-#qloLg&;M`B`_@q zUsj``NoviPssnMQe!2vz`=GL|{twXq`k7Eh+pL)VKh=>2`7Yy;T@cd0Gso0iCjn~7 zC~rqYT_?v#IU@DcrAB!R`K6h7Yas8|)WA?x0ZT<0?2=$mUaG)aQ3_)fZOY1GcuGp) zE;|WxT@myR$G;Y|bw|Gzdh7W~{ORgXz*JMjIX(qPWeFU7uPlt|Ytjn~9i+_;;;^}m z{MsaPs0iAolh8FDheJo+uG|gNq0fP`1Bf5n1M7jUFjpT%PxC3tm~yld-@3XQwqFA~ z+qKt_4;xRSxA_>`p$z*opldGrvmpKWbD(1%{v7CAPAd3gd*AN;eb0X#^uN#0dP>0` zub+a6ylf_ZY>m~h@Y6s(kuyh!uPuvMt zECOGc<8^aPoFW-uIBbV8+6_;%i*v)V(>O&1p^D%2W&}wGfq;W}aKjmp163vCo(&LR z_J|jbF#BrdJM>0uy8JSrs}m`g3wF|)JmdGtwjJLeYFvF=2=dv8$H{?_9?hIXzXh*f zz8vx5L$cif{C3a1pgp3SFhERg#9U-#(} zRtP4){_`8Yr|;9rcAcb4M=%9zI1EeD!LiUNflYmvF?yq%lL+aZV>h^(Iq9;1)Q!jU z^N1@uQUME6K^J+#r*JqBZu>wKo`9?v_Xl+?;D=#(i7u*6A1bF zx1BP}9z>EtN=h`jqf#o0MDG=OliryU@rQX^g0x9FMqWtpd3Eq_(1L_l&@$$M;aubu4}*al^ii*)XEBSqYV0+g$iuX2d6D%WIV z-#CF%rb>3i*b*MLNBsLKw?Y=gEv-oU$d7)?GZ(?jw(R`PW<(%N8jW*a<2FPo!{C(b zl$$Ps$BHERC_#Qo1!NZvWuQFoq)hV?f_emFCIq9l^zUwIm$cxb90_Upn;wC<75;>s zpLX@>J^eirwIj}VBS8H5i9bKb%sEd6!iWW<2!-PaMC3E77EsRyA|c|}!^x0ZR`MQw zE7q@^M|s_WsFgGvOCsU(BF^`_B4MR(LSZZ7L95bHB7@C*)IbzFVsUt4lqux-aIBl{ ziL9o~7WrT&$bxDp!2dW`UdjqHN;Jo+#j((t($Vn+7GDl{NtCe8xH zsb7B6AQ>_tN_i6w#^8>-VMIMeYc=PD_ZVb;_~{_-wVVqhKjY-TSS7IM9kfpvimpld zz*p2sP6OvbbQ%5>x{*SL1imS%iEY_r^{yxN{(0 z5Bb|mnxHHpFZ)P8CXUw{^C0Hs7#)H`sf!j-bS3g9#Lgrr;fWZL^iPvY0Jh>Gj%3eOX#pGm4pU9j?1aW z77L_p691jIpm*44^kx(S&3wkhXNY@8#6{al@Zg0$6@)n+Rp+?K&b1)rn!G0-ZK?6+I#RymN|Mjmt#4?&J6?h%?L4n&5Lc2jPjdR8Sja1I0lem9~X$_uBT zI3isUf6k;&o%a%?Y$Ul6-=hCXfA%)4xq@_2Tg5pR-ig9Zd&?JbkhFXhlYBNznhS|d zDDs|m3Fjf^bTWj@tBvq!BMA@QWE7654<^bnH|2#KsO}+-<6iQC$hVF*=$?NWNAI|syh#41o|B{sIY&qA zUDY0Sk?4jXWt)I2;vvpCj!1z0Oxv;USbz{xpYnI#^)o-6F)!tL+NKcQDX+V-a#0HmhexyCYgVI?x@}-G9t|#a?7Y2gy^r!sY zL+GXau+ZLfke|;MIL8X4gq?|Uk#>TTg9gej6J?o;`oct9n)th$e^cMV&ihRA9N$fQ z8*a){2j!fHc49ASrH8h&jn|y~&3W2(G*iEs*tUt!SmZa_vu@hSE`HL__*!uB-mirg zzE{T2zS#)_eLC1zCt<)({_bQO(pKO59PE#Poi?(-pS<&1!q<&MuG!dkGx2HQ919o; zW`fMSmY^e8MQ;;mXDblfiL$_xAl-@lB;EEMs5TG`q<6m!4Af?S_`3VP>GNm$q-VlF z&wLx`Z?B3yD{c0-Z_j++nJ`eB{b8VIz76#6%Rtb-|9xZlHZagT&jh)zzm4A?R|Ac? zKlDBGb#A%xBKT!W+3SQ zO#k`se|;brsIC6cA1?#JKyCJi{(U(c7^uzuFwisoVW4OF!$8mUhk-Xt{m?wAai- zbixGS+@ZkOOr++{LDOaP(DsvS(Q(;I7*<>X@3ptUcInkHE?)`F_1EF}E!Sc9-8W;~ z12?h1G;;lP`29^VKKUpPP0Yc`NmGH3R@3;TajL7N@yXu>x{K+E(5UzFnU4K5j7xx$ zZS2!B7{}!SZ>|Fx=`gf#?45K3OmqS?MKo$_`HYQ*t~iDv*h2h0+y&1ozd=<_A$l_A z!F>H)bQ)TLU@uaizmBh_XQFJ}60~Jqj#J~uqH<;yj%MefWcD2F&l`sJWw~e?G7`-f zO+;hfTpXJ`9jB({VgJ<0*j8A8kEi5g+v1yHTf3cxJRPJU+xDJB<>ObOep)VcqsBoq z=0dcOy#!Sga?z4IAI6N?XdID+lT+!S@8$R;z~<>i{pu(1@scq(wt#qf{~bCmCWI1n z&gs9K%wmw!Q8vdo-*F@;@ErW-jnk;NHNySc3pg-gI(E-khRy>AVW;C92-5+V;3WO@ zpg+auynK&~j-NP`5~*<$XC|y($obavAmMPR16?Ipu7V@M?oAXDG?lygp;$k+u3@DU%q+B9y6Bf*vY{#|h|@ zC}oD9{qs7Nqo*81(g^h8Jky!hk-s!_AbaV!>PTx^I%DwV%fBs@ZF&>0^Y3Qzzr4@L zYZ~@NWSy4%(-3cMyr!e0+M?n6h(ig6_K^SD_^vMAt7lsd$`UX8(p^sAXD8p;!fSfA z*(-fvpSAq7@LroZ;*=jwf{FKN2?psGLB`)L{XE^*Zt1H8F65KfWHCr^)ya0`x&$y< zswvCZuK@eyW?$P%c^~o7O4(-QyQ~Bo-{Iyn65x=)ro5w9`oVrmprMoPv~s+idj3Y} z<#!!H7BLOPftKy6z>UZc@^*~#8Vf<=vcikFn*V`lD!DGuib&*B6xk@Rtbc#GFT8;$ejC(i6iH+w+GG#P-wVnu`~q>rNx zS%-pFiBk?K|s;lN_P{SVps8+mA?td;*nhzIS9_v;No>B!9n2ngi4s;b0Pk1 zr)+Mfe5`53p^``gh3dDLHJvMf9PPjINQNMRAtLZuv~)Y z(ynA)OGc#1PO7cJzRRw{iD|QOVC)1OoRN* zub_8X283JbDAGwS-4Co=hnC5+P?J3ky^r2akFo(J_uPom8!t!o;w8}CeiM$}vIq?i zU5VOjrXzIgGH5f#!8kq}ktH{vbM{Jf-f%OjZ@n6oKf4@7cP+)Kn^t1qk8Z^A*WM$J z{BY9U2`A`GwpIaaH=%vPTpSyohqYHW_Fo zVbe>9UYC#H#2nzqzW_e?1lYI{_+k_A={jKBm%vv?fnAlvrG|c&krUL&`8WveU9-`B z;rWPNJQC5&5in*BL)GZ9s2(>N9pj0gu^A|uOJ{e_7j)X`MEaVMIPpHdS~ddByw`KX zj{uX8{$zwM8+}{9WaWv|&Oa=16$rNR54VTTXU_?=U9%XynbXm>;A+SsNKk@hk-v7Z zJg5TRN!hJH2lM@TmyurS=zB~mqg;Z*5^(Da2g@Z; zE;2y?u@t;c7eetMlCdCQwFsdh+1!Y=_uhfm=Hz14yexdOm^`y|CRQ)a$A?P`uxjZn ztXe)7?=GSxgGW%VCw=bWGSFW0Y7p~4z@cI=~IhLvTY{7KApPP-fg|o0}$r60F zVj0#fV?P$p!N-f|;ZuHJw{Q+VT{IV;@ozbd_QS%Nczb3Z-dRwH53g8`S642>)AMKJ z#TB#h`;~>*bopFtS~wM3XXRqu{3&?v=0$kv#`$>V(m8mO?S8a$AwIlxAzry+4qjeD zxjB1T`hZxJanWuj>GIMhzbLv3ar zjt(1-#<@#SN?JHHmA_4y04r&#dF%z~9Ca>Q1tw2GUH&xe&d9`mKGT#t51o@2pfY0$ zs`B%3Z1!~Q<=pNnEX39;FNdeOBd=fmozba=uO0!0x{G#F11yfL& zosH`8qu`q`65)$4LG;2bcr)^GB4;EH=Z!_pxGWsMa02#a72@#pSB6Z%8uH>#`yirV&Kh6}J+jv*|Evq(T$g2mDif{(hjO%4V2y5Wc= z5f`NJrxcZOA{l{`Hkgq%m}H_Oz)6v$c#C91v5UM{7MV;*D-2;R>Ai@k>k!Zzw&ANy$5aqP6i)2Nf z+mq~Q8{3z|+6{7Dz7u2zqTDC_G0AWI`)olLTx9`Oz|1j;Zj<&MVD#!w~EF||3WUgf)SQb$g@V+iWcRx^z()`p2{y0W~ zUg?Yc&SwQ^>!sf#*ZF(5!0CJBT?X3eMp^ikd*!~f1sVT$fq~lmzXUROUBpWl{Uq6C zt0DA|FS-a#q#J>9&JE|=Ut9{q)}1)=qX&Q@+VYei3G$dMBoCxp2VoEfVGssk5C&lo z{ubaLJhNP$O+&gJwn?W|K)y>bkDfc6N6Ua}x_;FSGyrRW=8E)zg{6c;N9c?n1L}{{ zA>RkQ@G5-su7LaI+kpdn5U)7|XWdaGDKk>80`NG=&m*P4VSXMZl(J26&Ru2% zt=$MX#rf)j@445pJ8v#dK6pP+S&V)2mgB^vdC*S128|Qu;$Zd!9Gx%>;i=Qn`5zZR zGi4g8vhz@#I}646^Ra10E+F)`OSNDfavhk9k;*?UqT!( zIz?};LD~EpQUB&Abf9STu73yH^QOY}^LK#;Iy!+Sq!R3JiucCoJXlX*@5)>h&6*Ev z{)&zj4dx&nA<4v|gYWfw5TZXHrVr*N=+puQ=f+Y7)152OHN6mc;FrLzjl?POS1fp9 z`^A;SNfiP|>10LxNYIf@(J__``SR-)LUYkbXh#(QHD-i6z3daaL|;8_BmoeONmER1 zWp^dnk6<(B=@XPs8VdWkY~a4fh-Vj_yC}R7j|$lSHG<``tywaxRbWUm(9CXZD7b=7 zB%M~bRc(b$?IR*(N zN`P823#BYcfMXTBNY;^TafgfZ-eSS0f*TX@BpG|^uv~d=VBCHaNC(O#U@zJ1lG&K< zM|$y$ec@-4e@iI=hu@*H`lNITY8z1W?pyfkrROORswrP68_eVf8y!ar`N%}Da1NzZ ziv%F#ZwYKjAVvZ&lC>?)woSw5#Oaj3$u}m_s)b{f9WAo6MaC^b86Ek_ema<9<-IC6 z!|z63)AKhCpOc`Ml!lV;UHq+^?~&k&^vB2R(w<#|xTOOLmlhFsFMI|%vQjR^&fnyI z2?81Uyiw>+-pOljEmB_gQL_8}Y)i5zt?a90aCdUNdh&~obEJ{?^EW%+DgAU%=IYtL z1cirgXKc&eZg|_HEBI5rFkUdSTar}8<g&fmTWeZ{t28p1<+hD62`Haz&&>W&pZO#!*}wz`_TG}JK*}w zQ!xDEK4|a18@<2$1$uw=5LzF;ADYL13H@VFqw~3!(mN9D)GOi*Qe z{tzrDO}KrOAqhCc6x?1LRxPG3Xs6yVHd1H33CE~QU>Q9IzI7an1OS!3;&TzwjqGyR z_X(W$T@U0PEus+vdLu39go!{EPaxH%Goix)xD&J?5-vqc zem-O6xUBq?1GP0_8?*r}JP|vBJ}3No(yXlIYWa*O#5O{(1oeo-j7Y{^AgRDhHIQQC zDc&0J$6@wT2T)5{q9z1l=|x?y?2JgV50sI~IGdDmB(mi+6@-J@Tn8t*_*4hqpy3O< zy*{-#A)+fG<_u+=fi$S&-6qM&j`@&GMbYEvh9hc0fHdq6xX{3Nha_@uDS_$kB`}P? z82V|{)$QycNj>58Q64%G=DQ-i&ub(PQk8jS&WNAZWD0H6+THNNl(fSh*23oNB#!j3 zv5!XH)kFOjAokn|(g;LsLW37&dGaD*a=k>7<^BR-#!|8g)mH4m(^+sDB+ zoaD#4I_!G*5xjlrWop6g^~Fo^#-gQoYr!&nIOkG)Qg}H&n|TG+7B0g(i{{|{FSUqPUb?QpO zW$eqPST+Arj%S4$>+cpW#4EIUKDzcg;1uPzWVTE2KNeC84sv!5wIlILqL!Twl11*J z4K9l;&3h=* zWsGVEf|vKmj*znfS=Eu+kX~u$Y(Q|%HU?_@{|1QOlbxAyDSzfrAaY7d{`@V^z9wAl*6$gD?n#FbIP%2!rsq0RQm8a;Zn$2hyID zUJ%D#vd&fA&p;4i2~hU^we-9n^F1p^Wysl;2MjGcj8judDd+DY78AC8mXF^NE{zw%a z6}BUFPxqVxw$XVx#y)I01{9S6uf2=luo=MP?*QBP11BVqU&-H205wHGC9l=;-u=6Q zt$TrD_N$kOqStL^-%U{?x>80&6C9`1=-$hFJ#-8V9N*r}*fysSnqPg)KGWb0)~amoOb7D)+ela|-5=c^)JIufRoM$QRBDGv&(nJISn;k*3iEY>skbt{Hh1g6qN*WOPVWa$!AiJJ) z-ARze0|_|0NcWPpsRBMm;*5Qh^AS25P6v(&5)hK>QOXoLxQKB)a;^bsKQ2*1DJXB@ zcqKc`$hM@Mi3Ap;UbIDm(fnHi;&N6%FR$x)uQ0TQZHW9Lu2lJ)gp19}`1o8!ElRGv z3;X9^i^%#fB?_r(?Mg|TxP@&<`3MUkM3Axuy_5|_C8$|;6OPWin(eYLQocdzr%PZ! zYH=I+UW?EH`z%hm5-u_ae4pS}YHmxgUV^~^2aLP6;lrD5;k(#bQ4q-x+#VaEamiBs z%LdCoT$E3J)BY#H^1g+kVEB*0^0-HWG?e`|H}wkpPkp1ZAw>pDW~r1L(Q*Dvl(U)= zpo#FiRfuLUL+4n^zNdaizMvj4kS1FAn}PS)__wx>GXDtYhtJERjG1`Q5Uhf4&UriW zBekz33wG~ksK}oNO(x||G4ZG){v_CBGLFPR?;Wm zD`k6hq%AA^-C9GvbO24`C!s8RF7P?~V3HcnVO8Et7NeXTq9vA6b&v)Vn94wm;V zp8fe?`TL7!l19>HZloQ^n_aY zZsI^vw|&%shc>`Gek6K_j6}oj4-r>Vr=K6}OPu%kW1Z0X%VA5k!;2uv+efw~4O)VT z$>NRhFLfMzR_MtWCOH>{t=kd_xMNntB#4_}zp1-IBDYAo4r>e%#d03nBAgSci)`su zS@v!_alom!*^}@k;_xL!$7m6h+Qdn(%Az-hJSrR7K{*j2?MGb>L|jJFpAN~e77^+? zSF{u6xDFOL`7a^j13pg@L3dQ)+RZ*owQ)zB^9QK`uI2BXLy3Y@)+VhM36oP4kQQvG zpu2A&dMBNao|!`1#2rOWjPfQSCBhPV$~ulC7(le1?eRf7`BU)F8TG@>M9a18*!f|-XGg7xcLSbk#w;(3^#kXPaFHM76S=-ewU1M4ZnBtcY$_7n|znw$-4&jr-%KKMMlYd{zDe~w}c)( z+a~Yln7TO@8Jmn(&V}h>|Jo_XcJ0NNx7`ICq#fxbex!t#$4yn{P5o-gi*m%0iNdD#1tJz%QkJD9Z!1Eduf>`k3~X#Qp_T zY~PNrHz5w{=WdS_+*T`(L*Dkjk7Ay$$6H! zjmn|~`HToe2lYZ&gdgVv%?5l}u$%~Ysxm)=WmpDb5C&lo24N5e;cprK!OO5nJ5qY# zG|&K*0Eo&~r9mzAtfiK$GuVSzh)#mD0r6v-fbAavU#$by{T|r57TCzY*S(qk`{@VK zS&#$$k^&RvB-}MUHqw_3*ISZX3V>=zU z76gxPqXX8;huKy;9WjGMAc!Xu-z|sJnROr*>Cg~|x;pm30jt#fmF$nTZ(;ki$uPd~ z8J}YZ9CYpvam@RU0&BJa_g)QM;RxWaJAh9%0DHD`Z2VmFJAPk}*jA3Ux{MAO4QKjP zDS2_QhK}AERIeO{y4)GSn;YqHndszOpbzL^3Ya0aUc&)8Q?4j5n2ye>1k2^nvA6`K+Duqi zcp1k|y!%}$sAh?$aX1iezX|jO%hNdiW3W73KRKp?_z6dvM|c-v5?t2k@Xi(2Kph%q zAUy<~a7WXJ!HNSdht^q1hvrxs9HbSOY*qIWUkM+_Y=O_KK}xbk+bV$LN7DfXq99K8 zN`^_dq`yQ`0;?fdEg?9F6ARmo#hv79@?RzIujaE-`&I%!K?jT>JvyT8=tT$n+QmLs zlg{@6rG#}K0}nn1{PY*VZ(mE-!Y)2STpD1vJE0FoVN`{FIR~;}cZARGuLKV89Xk)F zdHqBw-`NB-Y0@%80=f}8>SPy5G9y>30Gkyt=#nnzQf4H=5@0f7=iDpsRpC{@LAFP^ zOH8N$p356j9;w*)Nz5BI;hYVw;&}!$?ht2z49dVZ@x(R&*x;} zAQ2$Hh7l*u{QkHqAtL%vEv_8dgu^o?p(=;-Llt3uBFz8ZG)fb(9m9wpi1 zQ8D>a(v(>QIokO@4QE~sc$7?LSDdubT!cfDGjM47JnG0(BnXcRluK=Lsky8cq9T6y z;=Kq(dk_zBjAsVR$w%KLSS~VK;xDpT^!8G|Pg~3Pbin=jDwxNNgmq*FVxN*%s179~ zR_ad6p|uhy1@#PCkD_S&_o1JWi+vKn(UFiPFy@UQo+2d&*>e#3Jjr3>>Aj-BS*c(nJ5e`aVneEq; z539&qqWh^IBV-IyFadMYi(rh;k*}kY!C%RD8oDX|sRu<;NLH*I3Mzp~J=;3TzI;yG zWZfs~U~Lqas9-C(2>If%TYo;v#&f?u#t z9Ee{Q=NzZd`rv%jPCXYD3#qHkA+h1rX#eQQPqG6>4oCMIlpc!v>`2L>yDq+)5chg$ zr?|<#ZqjytaH_?P80RPMbFx2u;8qYPq=Y9FFQ)aFoM|9(Mahg{Kn3>YK6S{iBoFX? z{-96Q#h1gIDPVYwc#{L5&lXPerN~{$(w6${GFDiLKiQ!pI_AI;yt9n*p;PFAlP`yJ z3LjZ1$H?1m;xs_wH^<%3Cae@4&)mPJ>#5sf*>hE8}%*K$y+o3^FRU{GTf zyZdZFI3;Zt>0rx4vW9gXY-3q5(?3VW*=qO zi!93bm4_4CK;}ovM5!}lR0+ScxBtZVkew7F`_Bð6y;+yCD~-}y3PKP!7IA%{7q z&w){bPIxLL5;3M0?h=v+Q{9a(SKLT`*CFH~C>wg<_6K1Q24N5eVGssk5dPZm4;?I* z=fw~f$6P*Dxr92&6`>>8TY}PiuE(~?qi|}$WNgnKj%|gxIIwgM z4$Pl{1GBPla!xi5P8p8yR@kG%_L;`q|p*f(biwiQf3$Ma9p z(dE17!-|6!q7g1x>Qx&*hP#Fiv}`fwe^FkR-JzYHAbS!4dyZ7ffLP@LY@0Fz&GW87 z>&;KGe+k6sv}*%Cwnv9Wwvq2!hqtd@h_Yw-yOc2q#F3!GBZ-{Kv!|n|Te}{{uXfWx zBA&#lO=w_|GAi=owXdOQdM*sltfo^>r}FcUaA5W%oSHfxrJ4CSIrbc!8uxuv=jP(% zv;ypzH;dz(hT~I)qI}v29G#tml+-uxu+l*G!|tUM8f*ZxTTnLd0yIyU2E4U{j++mf zR60w=N{?5zwI|}r&W7JEoed#LcPki`xom;sy5-P}8jZHRg+N&gQf`NGj%3(zt7NkW z=$LW5$!=ix$1vv4LCdf#1fG2u(EEJ6VEN-vw0t3uW@0Ek`1b5#pSf0)*7bjWXrvmh+gXQ9Q zi(?&?!{&%`2OVRZjWWgU#qXD_fXYOak{@&qJ&6drA5uYb$ttxYB{`bv(?pu|AOWcp zETx1b;2rYo5b^e)W!rjeTd)KNuDltZ`gYiD9z>m_N1GL~XaJs2Kn0a0nbjBzs(Sx{ zt*i0H+$q>vkPq7`@)haOm2kt95_eRjgBCv533Tp!8I_M-t7K8<NDw+uDIv(Par1BNAwP+d3;hq5MM@AwHg zF*zS?x88-w=bMQGi>igJC-1cTqUiB?IUi0WDKiriICVB5x#k0Wl{pojAKk|}B;R?h zaM*}9%C>}+_c}e~#fYLKgefEJI`sbLH#jzpe7$8aX~KYns#i@%Te67Bw<*5QCfWWH zXrZi+219TpgX*Bcgvd}S0~M4-MUgq2ryecV-f#!!%Y(31k0j?Q%xA*E^hxMv3x5(U z_w);vQ=s$(%Z0`z5G*@E`UlHh;S@S!K6L=5#BWK8s-l6cVLHNbgi?N?AmXtGsM(K= zxf!U-TZY~nAEm4&;)xCmX``8V>17+PxEAr+z4-LXLVPke7md$9K{-oYN8+$kcJxyJ zb@075%2mG{mM8}m7H`0|oD0w}mAuv9gD(<7bHt07j`V7FpbAZ-Wxl`YW6Jn3XvkR# z9PUz!yPYl@jHL3$SSMQ8&m{jsOA#t&=Hj3%f__!R`6Nvf2ePV?^pf8KiL`!==nxG{ zu-u{Kn+leb=cH84*9XhH|5LDBep8G_9(`vi^}N2418ak9odr)^VYjw%cZv`0?lObB zJ1tO(6>o8OEABEtfx(?Zad&s8XmO{=;0}j3`I0wZ&Pnz^*xA|7x}R%Z_vsk62|)0} zEpGCrPo{Te?76P- z6+oRmS&r@Ww~~NM>=7nvf4AUq(%^pGyI;(o+=uW=bor{rX#vxE$t$XvZj!BJ`sS*| zdQ=qoPrZ{lQ3TjH?eZIo0{NlD*RiK1ep3)ujA4lO*zkeuNt)r~)B*lUNek)HBP__F z1C9QHS3|cNCYCpK$9xa~7|%w15j{Crkd{$_N#$xVY9`yOdPXxqE7|U^wK(FT0*5ki zf4(>F$EAIk!HRNbTX#ngsOl|iVZB)14Yd|^#FMLobpj?VEyq>5jKpV=I}S-5sthF1 zR4Q)jyXT|6vGgeu&a_5oTcMmAtNMNzlPVqdh?|lXj(!}%Z|Ej%!v71tarSgTp%}%+ z-b-L5X6%wt)u)-?;g);wYDY7IhnT8 z@f(7-HY~Btm=G2H7s)p=@Xvy@i!>#Cm;D(%Rw$55Z+rKs9u8n5gV zgQYgIZ@IHRIbITBy791*!~QJG|ykxXuhlkrrL(HdA|X5Zcd z7WpF`cAVE)(AiXLSO=C#`Y2p;8p82%6!>o$_S7G^)1QV#5sjfK=|aGy{sRp>w@;L{ zj_e2P^1y-4@GXt>)K4)kkyoowM9kBh+va4^l*gu~(4}BrNO>$)KwuwFp7E0aHjlZ3@_R8S zwQ7R+ds8?@Dt0dw#{YXZxSplo!IVsy(>~XS6iGI@24<2lVB+LL0{gWjHn~AptliO} zM#J`f?N|-xcNXaDYIo2Y)OI}>8uX((4_@IcZ?4@3JD&Gbj=lN9lI<6P+L+90X`l2*s5BjuJZ2|{MWkWD}CMRE23-n9wR-oOO z!ktTZfWvYKykXSc-UMT~zFp#`h!Ui%EV@eJxsuYDif%K2b_WbPv-tz4SvbztC7QsH#ed`Xww zOT~=!r%KrGZ$;n}!B zV^%$mqJS?muBlpDN{@QBOCU4gbiS-e?hgt}P@U_hXO4MM6fF(O9^QP)Yf+u&EbMw6 z;#SHz9DKurs^lX_5BCV)#~yC=l|+IPWhjd$cTZGEPWxivK;uz=EO^$@K&Qj3XU${e z?cJm1M9`XU zrL9IV1PGo#?6O0C^1&66=yyNHDuCwpLUi17&0(|Ig8v;cI(~a~Js}Oiy)`!qiIQ#k zhU?&Ps|T1I9jxI_o&h%yhY3@_*LR#W#d+q&TsP3%UYtAfIEawS8^TQG18hmJ)R%Zp zjUB)CaPduLMr5O!O>=*(0G(9r#kB#kE)}@q^dLE=v(+h=N(Qo4_e?|A1kX(zp)QsJ z&@1GiB%aYS(%g<S|jMeyER7_V4CR&eZ?#SVv2BMElj>9-UR`}P&Xaj4Y}+jP z<37CNj1(32ywF30C*xzUW@JRhw!>mu2PeH&?|CX(3brP5#SB#q7kXL_6M=MmPGa;z z%Y9xO^+@jsVOZo`;8fYuiP3<1uP%+T#f)zG3(C~USA$+g{xN3wUYqQH=&8SE*|V!q zQ@y9p(o}j)2*~ z#;t(1-$p_C2AuL&QOu>8Q0aN&XVDP*X4EB#7sep>au&ViBWZ)`rcFFR2Jl0tZVnwq zq-R{FdB*QQCzU~W6FxK9yjU4d+MCZaJM$CIGbCv^yr1DA@WKb%bMcx$SH4kR;91Ah zpB8fPEBFUwE?%&Q`@oqmCOu>=bVt+u9FOnyD^QJNRA!fsl*Etyl=?R^|4&<_vRdl?hiCD0^t(eB z6G-Y*7cE3tV94tS_nHPGZ zTn<6_SY7tMM1!i{b!DOgZWmJ0_k_&pPe*qrzC!6A?Ae9iv4`wGW6PrlyYHs)Pds1- zsS;Tc_w1bLXkqF63N@wKkI!2OKH{TIH(m?ePW`r({FrHE5Kmq=5>HO<%O>+{%eDG1 zN83j!rA`mxYhT8rAJ5DdCH9#{?~;3~q7yVX5nlnBKKJ{t_RVHup2NBRv){(kWJdcA z3RMWH_lht+q^p0vQ$*zqQV0paH_p56{X!Yysrq|tk{W2OLwF{2q8#I_Qz_F-vkSZI zw$I4WUR~I(gPzn*ZSl=|NGnV>G72HQjPSWvOls30K&k74v6gz|DXaGq!BzDJ)<7mS zfn;~nX{E{DL{rmVyb zL^w{}T%Jv1Ny(R_gdlVLpCh^X5^HIb{^1(92K2vfaqUW8<`ngPRzU=5s zZ%cB8IA{Q`*~A5pEO2!9XgkLeWY}*tmL?=-#pKNsmiK-6Yo`HEaNti{E9{Vur%J{@ z{l2}T$tp7xY$b6+zxWYd5Cv+_J_$7>A1 zF+$DbwO+~Fvv`0JV@|I#++`C2y2aCPUO8mYPxqBSy|`YV5y$!{ zCIuq9(shqTC^M2mG2d>WM;25j0qD7JJnoXuVV%Fc{zqvYqzZ1-W) zN&|cD-&C%brjkCndbEW+EwCDiAmK^RSJRm;u=UcN*mLyKc~j%PBl`MFV#4^smMR0O!El?u z)=GUZVJnOigDOLb3S9gdGB_S#gZqYPex`+YJQP%WZPA@%WQJ$WS#3u{;7(c|z3XjX zBh2=F6n*HF2}5^3ysa&khy_e`e?IS0)DO!6T8M~qp1vOtdDovSkJOQ_RfMv zs|$Gq8r6z(b{v4$?SnxY)Ye+qaVg~Z8_EwSX4&jPwdUIEQv>cKYm zI`gW-lKPY8^SdeoTaoxq=9;i-DmfBfukfCeZ?NOZrL;{1HR@pPixAQ-^Vu;5YSf=& z_p%40!Pfy;sqelZ-(-`PO?4<+8?xAE75~G$NhclJ+C2ijp%<7qP3a(Y_at>7G$Gq% zAyOik50`N`znh3M-@8}C)!d@*?w4TM_ibNn;nIRvj^$XxIk{W`A2yKXMONl8vetqe zPp_zNqYWo?CVIC)Swp~CXf$DD`px_$;gF|n z?;n%=QPECbju7eT2Bn&RCkE33%>wmPdD3)06ZUpJWws}vl{&qe)AA{0{)HNIb<+py zTyA7uzf_15z4<9^_s9-#z&)DF(r66(zJGdr`b8&;7uORi*uEb=R4&Oj>UG!H=QM^! zJct=;DTQ?U!`SoT*^1?R&PcqkF3b(16pFnCsmm z88>xvy}8U<#h?aXJ%_YkO0dpnkGx0V6-E`L4MY%Dupk1%XWO_`8MG&f^a;ceVy)$V z(^qEq7rZG_A4N%=gr8kZkVkA5&2z0bfIF-`WL_j^i53rxIMj}3YgT+`d7O60 zhxik-aP2eolZ|8XlN1C&XdT9h24occFe}I`$Y6$(fr%7>94EM@j;b^Cr=(ptcIx^J znQViz4e%xLx=p9s;6`*Upr;IOJtrH!r%U}tHwA3AvFCM^_L*+;39g=K=d3h?s3(sX zf`sjs4#tc2QJB(#?El_ggnF?KMcHB$KDgqp(xnr3ke;Mu1=P_*&M zdk8_nYa!VTMg?Z8swFj%Q;X2fIHk?dAq{?0q_64$xe!`xa!OS1qQmJsIWipgt8DBI zskLS}*Z6jf6hsfIPg5SU1LC^Fk&qD(!Mm%WyF(XGSeORP}TCcs52byqeob7>)&-$gLIpNx@ z4sy-W)*F^6g3Pi zS_i*Y&qyjO6_aGuDMVoX+(2{~MKaSv|ISi6dW)15dEG`o#Acn~vP$*GY!^dbF(Y~C zD7g$lB{tsEo%DeNlzo!cLqbD|&MC7wy_}#_WD;M8|L)Cl=o{3(n$M2{gt5TFp`!R6 zm;fckp5Q!suWChC@seREANs6{wB@bD>5+F61zLSBM&M?H)BTb@4;Yc*`G;rF<{>gy zQTK=vMC4VV;(94gy3kl3I0%4x6-V*nMhvl^{@vwqyYL+ss~{gUbMEG<3ENEW%P=W1 zipz!TLuMV7g1~e=j|ZAr9=PRo_v6B3ikZDc_Wkte`UQQRTXm*C{b}PSjT9f|$~>u$ zxv#_;zwetXRDKh-$Of!42f1{z9`Pi{ohXF-3yPB7 zAz2dAe(S^c+ZR5<7`99 z5`05o7c>rQ%}mWZYBbRF6}4DAQ{of3qj6soM;|)R2w7<=aRp5Zvrk=*VYquNIrX}Gn-68ctq zl04|Dzq<8uhBLlWoA7bj`QmGUg8SJetKM9@t>VF`ij+`hSNa~-fnV=r_pLsmg^aEj zyJo{A)!sJ!+@C}!O=_Wtz!_XzM_~5z8=}WL_EwuSq8rMAHr8%3Xbg|ffrG|a1Ia^k zUrDYjn`ddg=lekSZ~ksf;=u1GZ;J<(#5pO_!L2=Nk9NSE)?bo{Z}>230?sBhw_l zM#0fL^AI5PvI1r$=p?S+?yc3d;1GT z&Q4t<(&1lZ9QYfjkVl8LHZC<*nU@y)yd3p4FEHpcZM2?@+WT#ip;5$f%mq`H4}W$1 z)X!&yWtm9LAx1iDwaolvk*9|zAu$h{(YnFjo6WvLShO)JL__?8J&*W2-aFrU6*6^l zMX@5GL>GrYJN}^pk<>qZ}`F80Mo4#ljP{z_fumm zFFWf9f}V(^c^|t9{w3v2Pj;o=ssJ}8MiTKXoE@tWZV<1BOuKSGB0eI2TY&wzHXM?m zUmHVC2U3E*C^24;m7T<<mR(gdG2}`k))zyS`L+Vhd*Q1 zqwgl7hm##tF=@Z71X;C_v-4V$wcr7OHga$wvmH%@qs*j`Bh#be`F$=$QFgpiE$q#? zPxKNpP+?9+MDx>VUa8s$n`K%``rsI9PjrgwcJY^w$emhNqj`G}-hg2gaZEye^=ceS z#bsF&3-O}yjHO76Sctr47#(ur$TO)HPfqiWM|^}!B62=snKC_;#Kp0qs6W}f{SGQ$ zhwx5hE`L1rY(luR=_^Hq3us;NQkRKxo|#Ok^%k3T=l9Yah0b6pIE#Erg8*4-!xs;9S~akKf@?$ZY|~&GL5@6xAFbR= z$#q31mZ}p(%IL{gmncrZH$7zRj;Me{S)n80yF{ zjxul^5#slOL`#6(?hOqK@w^rXJZRjiUTg3RQ*oQKc<{XVH7XQxVx~o}S@^v~xi<7r z8a6KawwNs@>V?)_`sY13^d$FW+iua6_9hw-$IvA1izYX!M&%FfD)c5*@=7R2(eefN(a(Y zXQm?7TnuH*7}xRp-?yZjmGLtWFLpfafbN>+>}Je`~tAF2@=|hg8SBgPZreBH#~` za(_yrXOcxxZ?yOGZ3m@JCetIdd3n6f&0XV3;Wxmxu9!f|b>?K#u04U=KDxcslpljV zbGUgstzP_UsvP~X9C5Y1sqi3t8U?!o9*jQCR z((kHja1wE@+GRk;R*#GPAKK8?@GQC}&z+QxF|WOK{yS?J$3clc zQ9*4@aaC11K@t?z&Rxnx9QW9c%BB7#xL=i%MwT(1f{AkXzK>7pdrFP7s`?j62YubK)nRR6gKfia=|=~e*g%CHw_&Y@4$$<6uTI>;VY^M+rHPt6LAl>942WizZ8>>-K?vF%|z(2}hyQCgV54TIN zR>{w^G295h7~yDFWg+W{x&UU*?JXGcSDX{-vSiZWvF}n+O6)(64`XK@oc|rQD<%Y) zrNBR67=e742?~{3XcY7+6h`3Wb!t~*By<@!hPsyB$E#$8_B8b6@o2R?(~{u#S^TRQ zCOx~d@j3ToBRuqu^6&IMrkW&VJBV0+M9w4WRdjPNGd~J`CaWzZ=d_A>N#tP@Rn-#> z5J;cF1U_r(H`!?v0Rav6HI>|?ifR< z^l(M(r7#+vaPz~dwi;gzmGDt{)0hjem3UAf^1UUBQVPpbwHe2QC>iU{aUB~@eZ4?Q zX47J{N^W%XH%D$P-;Dm$!>*n;aNV6oM#=wPk+acHLDY%0)e?s?z6%3l3-fJkNi1hZ z+fw1>)SYp995~}a1K_2l;BGds`62O( z`XTwvTW*UZT8zgVT)6Htab^j7A;pNq%*l*UgY$cxIAz?_<&fz_edH3C4^k)7&zRJr zxtVMy*uS)0@n_Ng5z@=MSsj%}hzhl4O<+}6o8Q}ZCu4775cGZc)wo0~AQ2{H8m$K? zUgR2{xzXiID#|~&sGv^ z%NcEy7lOQ{5p~HRJ3~iL6&&?0lAG;u9_1xqyL)~=AA2bwj%AU*Lo@6wOU!p|G7Mff z_trg9vxG+jMnS_1R;G}92b4G=U@7}EVm+P}gcWWF2agqUO zWZMvOZ%V`EooNx4XczZDd`U0HMBeY{f5o#q7PFTUQ25;UZWKR2kd8UIxqR^0YUn46dpq zamUoYX9X|)u`(ya1zO+@wjQzI!wAFkJdeLj_3b%S-#5 zNBb`H<&iF9*zk-HDKb}3vdfPhy3D-R<cJIxU;n)myq%U^C)Qq@2SU|{T7_7Ate@+FZqSlKyKNu%vOCUI5Kc}n|Zsb$GjEVW-*I)IAI+G+CmKGOYWb9r?Sa>r*cKRn(geNHewaD0)l> z>uZLyw3SWSVC%mS3gOiY6ezk)*9cGqVKI+7-sUjj`N&}j5r{(HM*!i2kM0K#W`zx| z3xYL)3wmhp;zC?5?N?wz6x}^&l$+5F*DVF~oE-(CxU1^`fBvDEz?NjY&^t0SM*&Sr zg~MfqvlkvZ(!L_PdfaqE(!mRcESJZ@Zau-(;J~?Ki!>%cg5oI}nE@Y)@&Iv2o>k|r zy*H>eGDrs*<=X!2kYlDWrqi@ioQYdz%-zGoQzsPtW9}XZrD%D17x%*=xjr|vy z{Le-~-a9HsS9a2yfb6UnPaKO!1x_NsV&%hM|BYdYJ}8~T`{8uaDE>B_ zQhH7syWn;)q$EdbuF4;CqCh?Ophn*7RC8YBitCuN1^EX170|lj57So_fc_>e*zNsM z%)59({`sQmC_?6lt$z;Ir?U^ApNa!n8_CAV;K-3^#tVGOfzq>gB6GE}IP*AWVDfh4 zTuAZAz1{UdUi}Rdy8OL+{ZIGg)DeIjdGrV(FjG^xq`-KEvYMOxvKPLTlk-CrvCc$9 z6E)`tLqnz~-*@XkWu;__vP(aSHRg<=Ycw|UZq6!cyIZg6_E(Mz1pr_p!mLg%U+g)kRTbb)jbbSMr?PtMpY(pdh~Cn>+Q1w9Aa&nre5=+DRs?;h8&KuT#S*FBQM_ zP3&~VxZJ<{E6tW`d5LJ-O!v}U!%+!{(>hr#L!R9%O8vSYd8H2~Ib5`}QLif--FKD! zw{!lbVy&=4&%7WP1BN!lqzJjBX*AU#xN8@;>ibwOWZP<_EaXnevF)KAdw))ix^?G7B-z0f653XtPmh1%B%`v)hv_t!Q3DH#}C$ z{~ZuC)NCARNvV8`OhA0iRUP%5-P$EKB!Ir1xx1BM*d))Sq(T6mdj{Ya;P`N%-crS$1ah*e2KTh_y#kv%j_%hU``O8ex;l+Afqdx zq?{FOHlou!6eDeTM$jKgh0KL4jlwwaqxkRae4gDA-n`nuxz8^hsuHUW%jV4Tx$Jg? z;1HvGQH};+A%3x?>xMVG+P+qfj%?B4pYdN}=+rC>UrjW>WSC79e2TR@5KqT%#-nVP(>$se#M(%X$%rsf)Q7$ksawJMtw-qmXCXn^N6)h zkH~1Un@d{pkI-u%gjmS@Gp+eY&(EeuS0@pezjr$UU?{)V8 zkZ-`#ZIPB5qZ>RduUp{TD^ow-4Cc{0jCQeNm-_Z1ZJkK2k3V#={53a>r}@1Cq=9us zTmSU59#+jx-n^g5_0^H?d1_AJ5R;jltzmGjX}3=jz`th>D;&r2N>7BB<16mOa$=ME zrjM2TG6Q!w2tgixpt>2TUTcSI;AJ#57-aGkGi`&N4W0_M-x4h+4kc11PjXmCf0@5B znX(dBr!e1$5X?&T&JZduv`-ZCn0LZh#Yq<X5M|Vc7jS&1t9BRNIFd`M|96+X$p$7*W}BaKBwv$<$V;jlc#pqi5@p zRcujg{~dawH|@p7cZ=9X`N`Lx*nqsY_%~2A`BG6^;PU+-3z{LBrebP)V_Gak0MBBJ z?yAl@O;a^9u)8k8tqSIwf`)FM|4Fb{jih5^-73N@=SRO>@Y%HNC^&NXanN4x`nh2R zL*G4VcWD~_q~4ptmbmQo=b1r1VaI5%aCivU9Crr`*fN#o|z(BBjyIW zdZOJYi@uK$wURtTs`G81(6AZ5K$L`I1Q^F_bD4H!s~Ou_Gi5xCr>(kU9D1{1HIV^I+c`6C>h!`6h5$Sa zW^q?d+H-0|1k7WoGf9bggfd5TqJOj)jsBidhSjxcq0KA9tNPEoM>vL$Uq=D)`N_9A zi9hQUNTl>NP=!8XI_c|1CXC%si(W(UsVx#4tfIxSQku#BKMFIz@ID+XRoU^E16jU# zSb4V>Ro+TMWyCg0Go2YLX`Y!hZ^zSzzq&Pnzb`I5PitHnt#cUSvjjh z=~^mO5GW+e)q8LEjsb+3;);=Z3$MNwH;app>kE#{TdrD3yCe|seX_Eo{=bvC9AZ5%GT+nBMM)KoO^Rw=rMq_UrOzok*m#q@l zj6;pHM;Q4MqmXHKk6FcC&x~J(8W(Fwoh2o~LR9N*5#cP`2S123MNN^QukN3pD4N@o z(&>AaP_)EAHqOKG032%qb~(I`-IDfHu;-Np$0r;FmK!OqX2Tn(S7tEQ zGCZ7Y2fo-s($Qby`~aNBsu@jBcmOe{G&)fmEZX}A-oy4^I2LsrgRiIu+vaDUVAbpx zTH2vp>we-7>N(L-PexR+L%3iVTupk5go{0D+e~3J+0cW0`)w2msXzDaL^A?1VVri6 z`>pC&Pb8%wEMO(h+=YIFNJcQrR*UTfPp6=-2ur0vy8Ig`T#=~wJxly5Abc!0PD`HZ zMPuLjqwXdRHMJzmKQFKIea~NVFF`9&m6~%1&qP=fy~@Bd>(n#SR+mJo>Mz!5v*{r? ziRH$biSA%tF@Av}P#Bkv{7Q_GTm@7^aZ$cjxPhsj=QQeNolf=cdLiZv&9W7j)Her3 zmE*pJZ5~FOWQ)dLhCL_LGck&=-8kecq75-&2#|qj?QmNI#Dv`NbhZ%Wnc=@-7yRNvzL5^=c6{OtBILxg9cNoh!^dC;3zG@v zxzAz<1zchr)snn6RPF4Im6&d1+~H!=1E-h~=)%nRUPv3+t)w8JU`rsIBk0M$J)$<^ zd`|1E1rp)efVRo#r{OL+^w5O(2R1RF>Y3G*hTrVv#44no78bS8wjXitu8}kFz!*Wy z7kjA=kx5wMp%F_@1iSTOC(?Ly2WeDjWWizUAbTp|%O@CJH38_gi;bZr} z=ODl~3xrP3*`Z33E~EF22OoKZNcjaAMxH{SQ4dwbBvsNdN6{zRH)2 z%ERpQ_dw|LSoxQ*!7$ZO)}=T1xH5{BDkCZFGayv^j97kB+IgV^W&aD}L@6AESd3(d zA<2V+&c28)46J0fVIlU>20noOvvC(ZfAXaKP<@#M|HT-0DNHlM;${egrP_IZVjp>t z{j0n>ZNiJ+A;&9qb>yS+S=zXj0e!pRxXjdjbZ*P5Sy+}* zxh`df@Js4%Hg%uZGU?lbxslZKZ!UbT8NR@n*L1lM_N6CA-=Y@w#EXB;6wrfE5J2k~ z6!5j?q?D*hl(zyN(XL}&8Lj2tcsoad$ifGzg(sAueLyo!eix1?o-2*!JChz75`Az1#uzq4t^ZXqkUT$G0<|3ex#FZ<0vbtT&O2o z1I}sqD-wDKa31_Qe8BNypy{!n)$E-VyzK=nN+`FO-{K&n8dd#`tF2IJu4;{S?Qvi8 z#kKh~rx`W-=RE&;Q9XbA_o_+2k(Z9h)%VWTu;T{Gg44dHP47o)&);2e6GX8g-)Hu? z#9r7y#t-ZuN?(|@cyYA{jRM!W2&G?H?j%lR(OxDPEjT;k1Z;~WvzOY7(urGPtn>#t z3MSX@7%62?=JQp!Nz1tS>9$*RgtFpi$0GQZ-i=zdad~Qsv5@m03xzAORH&!UMnAr? zb>WYoJc!EryADqhvH&N^7>P8?XgQI;jp<8{{H)ECjT-|pACD6P`-0uuPbP6haq95{ zI9Ae)^nFbY{8w_3gl#R$2-KYOAs1T1A!TpoC1sgAaf86c+DA@MSuBrA-$P9uHpQ=5 zK`k{p8sW`hPAy)eBwM=gMi!IN?9{K}OuG8_w@Jy6!ZfA_qZ4O%I}{fT+;HiX)|$EE z1d|S7)1B#uY_22fX+<*K%!MJTb2#UvAW&LF@USe2B1yT^h1Vk|a~V3_!N+?cvDq?! zeJt10r2E&2`kR;fOdHN2P=h%xP|8?pU&ifyh~KCi$YB#u*!WNN-G2o+#svQv@-HjE zN{+HNyR+6{He4W+=Jw3{2k&lM+oAccN?U7dLg-{gpY|ES4s;U^)FLf4baSOSbhNh7 z8Ed@0om;#{kpB26NE`6Ipy#u)e5)TP^u23wa$M?iK+q<^;E%whMt4kzIcj)Egcm#1 z>!^^ib!%=eJ#NOtVxt$2&Ut#%)=qL_BD%)Rh=JUWv|8&&bK8frw17CY<;TY!ABB1k z+P|x?SLIgK-eTl4{Qs*2rJNb@k9GXX1C`!y-Z4#mL26h2 zv6dYe^IAM^g~p?bo07>>(EO2zuz8R+N~Iqj@pg zL({l-bnvcFc&HqCKv$15s}uBz$jS5l|2v*6O{0jO$VG05ob`!JTy=Ud=CEjImjGGg zTgHlla!#ex(+L1-k1Sh)6A>?4Bqc0 zC^c-yv%s5%2p|#gy3F_vRSA*UX1IJ${+vz9o+P}mEwla>XgMq1!+Sx~T&((T`Ms)P zzYEB>U(xt!6%+0>9%`M=N7~4kL!)l3Ws zbezl8N{!La<%~{al8F8k@_qIvkZ_a#GD#RKzT!+F*KRG@dJKqNskL)|*T$rK5g_B$$o+RWbs_3bSM*vp6}{=OE^*w695`hEPKdIf^l=8d zT{~{(J#Dt!F+xSI(S;~{FcyqOQ4jFDWUdeHx_u5#QQnSaH>0bBIR0(0zoAtYj$Lcu z)UKM!V+eG`F9Oezuu8MUuhH;q+#-<4!#Yfq*tP#_~S-FI!rB!pyVCdm>14^yMEf7r@S$GPt#ct=XX zkHbi!5TjX0EXeMOlvqA4*#Ftt#2EP~==_gTD$8D|dE?4`M`mleE%I^QV7|+3NxeXpIPp{&8)cBCZ6p?JMou(#oqU|tnSltm&v zLi;O%^|mUd%PmR%1ds-KFBwdt8^k<5kV?`r<=dt8&td=E~QJOWgp z@LA!nOc9&3yQW@J<~)$dvHCQ&E0p;zK$7=X#Du`9`}gR(;5wqIa%y{b9^J`$L2CuQ zw$w-^s{wWZ-`VtOM$|UMuSS5@X-tVPo*e1m-}!~ZZGk;9i^H(IgTTXky=A1aT6AF& zNUi7IL`)=^GsI)50n29#A}aH)!giZFJ>NyH~_;C@qCnCmh!comLqQd?O;ho3hTlJ}=D%LRug3 zdWq++I%HeCm_~=YQCFnoOU8SDlc3LB?6MZ>@@{{kF+h9B9Cd;0iX6O4i&hl$tH_2jhBfRCLg_Kf2!s2#+oIfK=TC9w|*y-3> zQG|O!iNzuzA4bKGB4^mpftU4GI@2YOMN4m`>-`8m;6Y!FQuNBb;9;TnO9deb&fQA=p~ZEuEgGT&edkG7`~tYmbgUuF?0p_^J$Jkti(T9 zCG#lCGJ6v&b^2ICIz5+0(vJ|VORxTv_i>hlAN7N>BcBS%f^OYknh_lEKRh<$Hof4z zdYiIevf^kPzhcdL=aPO(L4AtYXR+*@->2xoVeGFS0+fhqrw9Ud0aGuesmSNZ{&&JA zKL8c#Yntl*smOkx8l`_@6jPN8bQtImRxcy3B%{=ItVs7?5J8aNFD5u7zs9;uChHI# zb7{;xfkitNV2X3W(c75LOywuR~Ar(saNhHcCHtKvyBsZnpT@kZR5Q@-x{IW>Wc918y7391BC?z zg~>Exy3)dx!9qaE&q-H_*0l87n*BC)Wl16O591Wa|L_YL^U7$}8Sexsb47<<#~#o= zZ8<(lLd2Vra|kD?hkP3Eqg{w;n*OhYK`pxu95J2_Zl7U{D7Q1c9)~0js-3bb~VI0wlt0yjodNuyH_MF6i6AM3x^i{6`+%HZBD|a>mx0U zp%=RBeeZUAf|%vuOJ!!Ha*!*aM-h#8Gk`=AvG9{lehK|OJ2;n12Z%jhkdi*Nr->Cj z4airsTk&Nzeg<*04?1NWZnlZoFa3aB!VQ{H|Iyh7M}Gc{#dzKtk0hF9!kkJx+xwJE z=J<7-saaq~ac0JGy%7uZfka4$3)v7`Ja|2gQu%@Slu>fcbEvz=TLaexyb=)DFV5%8ExgLVXv!6nP* zeMfofidRD)qI4Vy3Qu}bXO!frYmF<|dh~VMEc06zp%Z?918)AZ;mxpo6^^0h32Zao z?a*9;qn0TurmOVLni{TY)0r51U+QdG4%?l>F0DLd=RJU7{4O-~S%}83XTgI&ZxQ*RW$@2eG* z6^O^KuJ`x0BpWkE@>YKMfT~wC#sH4=J?hEGdksi;wc@GwA>>x{XZR~VlqTQ}9Jj4G zTPglYiSh|Lwv7UR}&CUlVJ zHq@2XLhsc*cn?Ae@^#iI6^eUD{+u9tpXd9mmgEssj&oVd1?M&faoZvv= z4Y`tI?94#WT0`=^WWHY19^6xt8LB|-{)Jtmo~7ij^lYqz_$1Qa^z@-VxmZe=FReC2 ztux*A>a|K!+>PmkQ&gUGzI)AR1ZXFB8gDP@wl7m}>5Kh{`Ud~#@Dq2lzfZ&1P z&f>0%yL`A?Ab4I6B9W7c{uMQH4iLB&mCNVm0DBrrJ^98w`e+4hZ~FuG|}TzmC+gO z2>*zadS8=AY$@P#G0L73BItDhb7JCAAjyVPhz)SxoC zYu~5#N)6`=VTxeXFo483&3}T0T(^47RdbxV{@6cr4FY| z7(w7EM?(rS55jJ~Yn+B>Y=<~!mp3XGp8f7a9BKN=ti3ioN8gBN9i1N0cm!!-1xs`{ zR?s7UzQqni{5TLlu2x61z*Nn-^sSTDPJ&;)S4IeKLBzuE7hg*)hqwcp$46w)Q3oCB zdT(uRnjiY>z;(jDWS>godJ*@S$(+y?VZk;bj}fH=`Ij3*|9ktooWjJD&yMTYrq~=r zjGCM|_c82y ze{O*I4aL}DM5X)!JW&>5L>ytyRkQOSmcKhU*$)M8JFTP+hS}@P@t$IpZH7%&rupA6 zFI!NG;1;EhN!vcKxeU24j!X*(9tiWQrzG$1o7l^WJ}BwO;LcV`{vJTlRML(}C)Ub6 z?>2t|h&X=BtoIG{8J(1xeu^wRbgt$!;l=p8Wn~YU4I3=5q+k<4d;4(VRU8w4{M(o) z+s8qJ?h+6*|`J8^gfX3Au0A1@)|m8WGBYcb!E@E@JI?;~L;RpC1%!mzA_4s*^&2)!OGQ zavb#Uztm|$C#`(uFn6GqTH^(t;5$Yp`-d~-nTB(q-+5HxiUlBhIAzOOTiS(qNk`8e zuT{a+xmR+DaJA+oIJf~Q&;Q(l&$o&yF^ zDZ{r8zjkcMG6aZa=C+GMaH~yvJea8Uz5H&4=#+n`3dAo6%HWMA4IdjlFKHKPRV9%%=uvKUMgsCR@iyI@B zvkRK!PKZFU`{DU{Nu&`Ah+?)y6+QAd@}}C+lEalVE07&tXQ{$qZBt?y;{istQIwvJdXR0ebBFh^T^YkQXS1!p~VnoB?eG0c|+#A~#g;o#Kc z&O2UGuzDdSURy1E?$B|~qdE0uz`BaM7_-;>iuP@!pfsDGyu0z3Zh9g%<18*HxG*&T zE6qQyXM^E%%(;RGtwxi@{L}a~Me`9L;`9pAsY+$vuuijs=Iqb|ZnL3HAfG+SNa%jP z$pXsR7+FjUyx`GqF_&JRY3>7VG7>(_*WS_j1x^`;)DPNcAf%KWfDkT%&+@u_9z{iv`<=6hZEeRwllJDq z#3AY#y1oERRU5RMJc~V3cHVxsBi9G|A-5`Osr#_BA}=*S;PS<4u_LGE=A*VR}@dW<`)Un7=aUo+dDoQQfOw&U_o<+mnuZ%iM3X51Z= z7OWb+?uG;YFMAk4#&<^`@zkpCw8cba1bY({BML~ zSEe)EISV5NsGo^y{yAaTh}h`hX8XQwllVj}O)d|j4sZqRtK+6ecasys-Dby91o7?a z%_*g$w?XJV`Vq7wB~P*Y&ZV6=pIslRkL)@qY8bJ5z^(@ zMy5zBXbtv+1%v(!bsFRVn!Zj?f|7yg07#0Ld_mS3|MvT4L8%cRn$uDVSeVR}I_)O+ zw47Y-Vgt?lfo!E}MCMX&XJ=W<|DTtCm2x+vUp5%iPPW=zXr~A>ValM zPsaT1lD|%`p`*kbnl9-02IGS0P&Z=EiH#Y9c8p=aO;&CgT7%i~;|rj6LT1wGg!iVI z8ZS_Ud6)i@kD$BS2Kugm`O>#8#^j*~FEYQ^BzK5jP2MB55Er`y?qjF07mKEaVQWjb zG|L6M1#AGbm;^&MksWp8aXXzH4<1k>7Le5O6ShX9!S(Z>lYziYPNB`r37=&Fpbf{; zbH7#Ed=_!&-VW|KY!m%=@H@|R57W_T!E|c~W8~TFk3k~9ots`KDrwaT%7hI|y*rr~ zlBr+4h9B-Y5t6#*Zoj?H5@Zm#AFfoDE41qkQYMMHdQtLE*-dp6dXitp<`vuqsf&3Q z%!x>U!mgc%V&kaR4I;0sW4peBn1pGEd1{TQzzi)SVJmk?GU!$T!`KXiAp%;Wu%3n< zQ0ZhRl!8NbJ-IBd7J{}1No+UdlEdfEOZ@z(*}w}pE4PC8P#FO}6XNPd9O_77Y%fyP zH{y}Q7|H8Q?}=fpF0W2m%MStV%68&XlTI1_1dd!0gjZ|+T=SD>i|ihc<+?=Bps#`w zGWj4Am|3U*2`Gg$5-{#M!kk4RVUAWSdzcDRH4*a0G>A@F%PY<7NT`=09U-8doVu!> z8M+eE6ilv`hE)r!MZ7i20iblZ39n!k_WsS7`r^srIgy1h8Rb=Km=R8!kQ@d`NK>HP z(&O)LdQfvwt@e5%62Gg>?B8gi}I-@;5cb~xTHgaRdAX^=%6MQO^x zbb^g1Nl|&brfW=pO6{G z-<@)r9A|=DtEhV3+Lku$bKn^|Gp5@$!M>DpNCC|#S|DF3Kl(9e4Yr9)Qx{jjs=5vo z6^&~!x9_oCPiLG)zPH3=&5wkc>D&_{_jM0gV`8ls$?#4~EXVCJ-s^wzl*@J=ck7pb zK<^I1V5&~?%`{jqVYa>UuJDxRh^>7iR{`J)O1&ghSQ3T^GLtKp#nRA!c%m%{fN$!` z5yL-YP{wB&(~>#%*f@Czo%Y6hgbH2xrd(hy2H6*F<KP6^6d%PNhSKONKpZtixV4{5cuY_2;0HCzoes%DEpiyUS}Qr+7wK9w=$$Po+sP((Q2I11Yn zxE@XneDqiwd*5q}_>ItxjM6bqG+*L=T2G>MzYjm-4BptxW z4@Hch923%q71qO%^|;I=dOsssXx%;&3C6;USEFk0|BIk=+9T##ohe%xBAYL8jErm{ zZ#4QpgPufOK`HGR+G>y=FAr6&n8{dmI;hR6U(PH!Tq*w~$kbw84K7 z@8 z1{u=CT``)x@X8`eBKqmS{Oie^+dl)KJgA^DdYx z2I!u2GlVaS%)d`3#eUm! ze!_tU^?S?x*N+rSWtoTj4Y7Ye#Rv!Sj4ljflUKK&l#7tn;_{eh-Pf7##hrDRkAZ)Q zf5=BuV!k{(!A>`&+Kk)2>*v3r@BtgHCFuH>prhO@-|a?qP98aB0cyu)v-@H+9D-by zH|&@4-}z-LS|r@4VH+m9#spCQfo_I2Yu6w1S{u$7_HbUJe z@ZcH}Xa>kFb|HNxb{Y*6u-?@@Q4xMI+AD)s-&d@`rq&kjs zZ%?=Cb%Y(Y_0BpAiSkKf&?mcw8@yzd{NF`pS_RC`V#3en6Qa6v=%`6BBfuJi@gk$F^r%bP>Jfdleg z2x~y&v5gx}iH(r*Ml4)~4G<1_yN*#!?MeiW;Z5l6vm@d?=@Vc&A$@ws22w7@75l|@ z!a))7usplvd8a%=IU-VU0NNDPYKdm@U?Lsl2EyiC(mBS7717NjUgkP}{(CMx5~Qhg zCJLo;5V&x2ir9L}*q8Y3B{dbYR&Nk)pe)r{y_M7N-Kb9f%65Gdw4z>5Oxa>k0@_9p ze)#f?nnYae8L2#*M`{a#mFfN#0$qiqf5rzHY+KU%s`R+OvMm+I!cyc$@sTj?Bu))4 z<4DYe9KZom2zz+x5Zx_Bt_l3vhuv;CbS1&nbM=o{hd(wrm$TLV3<$Vl{QOO3Cj*31 zC)d6Cdt!xQUO6v-dKf=^ueby#p9HU#-n+hrghkVcL`_N_rQ~!yp62AeUauPY++b__ z-V=Fu`k;u2wZd2CY!n9eD5ARDa-QeOOdsk&74tRt&3m=bdIQVZV?1CK{x}C%v zQ5(rS4JGxL#;=!1u-88U5pF7E;a4y0g<{;vWEGZ)j*+%h;9eZt3%Y%*=g3VLz8RTd z0DTvqvQ4o!8OHe1b(jdFka?j#t-9HSl%B%#$Yrhe;m#U}Klh1IE8lm=qclsB*rrgJ z+A4&+MK8(u!V}c#&Z^AzpZ^N+UO2h68lNv3##l!JsOK<|*?n#Ay;6#)l^gM^2X4To zXyny=q#6$oVdY@XZ%D6P0=h-0gMp>SnNP@L7WigO?a134-y_b1Dn_!8ScXuMOodaY zn{9emlZ@-+8?)PXZsq}gM>$5e7l+K~Qsgw?9B@NhbxmA$lQ09qLNtg8;3c9{@`}wn z>o|5$B!PC5fX0^51uFP%)Z-4++-?iG5mcnv6r|rO+{suT$d%Pe>%qQ1Xlb&$j`qP= zP`YcpZ}hubc9;IsV1~w*b5W-RmBQluEo1U?mSEfm?jb1X!B2-kU`G$T_{`v1>^ee% ztfl79xR`Q;uq!b)jR)l!U*Zz}s;BB<&}&Ba1JFec0JP+6k1gAI98rinNM1dA5P@eN zeNV}!FZAXBfuT;+&$Ya}Z=y*uQ<|G7{>iYcoP!rSi@CgYSo(V*st29a0^53@>MlC# ze-gQif?6Qny!%l-dBme?pv&^9 zOZ&Xae7gt)qZnXFw!_Hd+wYXdo!$OE zaCp;hrh<60U$q{2G37ihwQN}fQrV(!NcLyxX7d)zT=b~q(*)2z+RH*L@h6i?@;V!R zR18*0`H$V9zex({eTe56$PW=V|N489K7BWh2DACLjm)HoR=&tCOfV0)i`$MUX0+$7 zLFz1(++Ze{Ecn7fVQMJ=E~n0c4SD4IvIy43ozUFPvVcq4`)5U}fE^j=@;%+j-!rT< z)`6@xKqA=?xi#sX>P1N6=4*)_QorEizf%XN7f7(}omjWqHKh0xyciGGa;EqV)W$+s z2H-hTwY+@SJdBZI%Xoi%zTK+|N|N&afEx5J4SSQxVhTq^bpIPESIAba&Ofm0xzx}O ze_p5n^?=Fgjr3_KfzNMhp9dl$!cRznqba>9g81VQKAa1M%lv5NmjccyLN+ndw`bvv zZlmY_(;P|lmKxe^K zt9KP_G0|V^7nKAZRxTsKL-a}<(7QK>w}wUL#~nXN^NGYYb_13M(NMO3uFOIY#2T&a zD7pkOf?W}PVrIGRz-)W0b@J}BQ297<{ghSZM@G}z56w!vGcH#vM|h~Ure_2X_LKIi zKLl{}`3pDq?|5k{mZM`b6+vb*@(nXo$}+2x>o$?m^f5s&@R2h+g}`@vbMESE`p%*IkV=u3(m?G$7WOTgYk&0WxVu zl_JCVyN@Y%W2kvo`&qaI4FkDlkiI=6Clml@{}btPZo4#1m}2Q3er!2Wl|KOE)SUM$ z;|OWAuC{%3;LFC;+W4A zl?0bbmPsmf=+moUG4jFxd0CF~n)265QJN+&rMGb2RzR2^Gt1-v#;t9HtImD~W18%Y zy8Q~5;07rJ^Qv~vM@ii2$8S1*W^BSk z{K`IegLb>RojBEMYSI4Vx%J=lmd-YAmEi2p{`{qs`2Lu! zk{|h;>1>@xtD0K~lw~|r4OGG}AN^N@CGfM?`jhn8J+;y05f3GF{~sK%u`RMP3Y#gX zohfVDDkVY1rY;L)QcRX|c5cSqoINQd;K4BQU5jyqa5HKrq_L;nJ^LBod;bNMT`JWwN zle3+r#lN5J@XMwD(R5GGCt-5?DkHWYIM&{VGUQqbMVK4pyUK63=;l&>R&1MZ>p;LjjT;@rRq!6d~?M&_%pIJg<{6qcun~~yohQ>vzhuhyrWF8pjajf#X+-GoY z>Zogj9%w?wxFYf$ffq=Mn1%u3t_%Q%--)4jNS<<(N=aIs5Rp5n&~70o7;pYHWX*aO zL8^UrZ{?0z{m>L^!U8*O0%45{Xi;h<50iSWit3-sp*Fx{V1vSi`u=d3M%RqK$1I z@FESjC;g3oI7aS5O?`hYIXLw`;=`2g4tvLH8I%^D$Zp?F6&b^?r_hohBR?X;{BNJ8 z^Hip?CiaD3PSgpvBU2DYpg!cT7XJ0}1)0UJmGC?NMxX{ihxDV;?KIB?4(NBZ^mVke zs?#P88D|?*NpbAJ1@Wk=H{^8c%u=;g=hN?>&a3AKQ-L3RZ;hH84XZOJ@8L(~{TwsE zv&xyH-MM)9H+6&7K$>FUkQ%~e_M@Zs+!qUmgIv#R?k$BHQhE|LSHykR`&v^=FI@6^ z!4|CeUe^6DHg16cDrtk;uCwCz1SECLn`ToOY8|A)D3(!D4}4t= zk{-$DZc-?Y23liyeEh?F#;B`x-VqhrFMyve#pRk%nwsdi&Qb9>?yjQYY8t7@DJtiwa zhTvW(9nwnnT}wsWXCuU6?FCnx(uV?FMJ#&eFh}aRt}6fJ__O-&dNcn%oKW={ZF|{# z>iVwA*n1nDSL_Aj=Y;G70!``BD$BO~8N-1OM%Hdh%``-kPt-0V4(~^JjcQKh|UgVU{!V#77p8Be3 z`Oy|Ah~L8p?AXM~3XaU=>Eik7Vg00IA9OGlQ);bd5gRpip7g|LPNFzL1j{Fwp2>qG zjVDKym-#*6+n>zd$}Hyz<29~@s@mgOy;jPL#{iDkI>OfaM@ZF|#Z2dM!38~M`fM|D zZ$9!1@xEr_j^C8C&&RU0S-TO-@tybDyo!_&N9>m{t(J57=t?;oF)vaq{g+GK(h_5PUIud{4VX>evX)$TGyD+{#ScCKE+oWt=kpYo_nivUCp;mI%sL1|=xV z0fH=&l(hl1lR^7l#dp2M#EJgot%`mo%`}HOeP+oKC(5&2qlJ+}$l^$@Q1&8WE!Sc| z{dsDnjyKW691})ED&Sy;7yU*K0L~Wwdl;KQ285y8Hq+$8(1_!WzOYR&p$v(0pB|Sk znnuDD2J}lxXlV)1C)!3Z!3=@rxY56`1pLP67(6Bj%ZRAc5Nw!#!TzDLvRRKSdMgXq zCtiA!0GYzr{0Va}4lbo(=&i`PTP%y_H`g_4=CIJ9OXUOXRr}%ELfl3mon21HnB+W! z+Syu=L}uR=)iJf4xb{6o+8^Md_d}X5+eWN1BiYKP>y~hmGE2Dd5mv*6^4u9Z73Dm# z6e>=>8y&)_-a~V{8TxO8 z_f{XKiUAM%h{HCn5oa30*+c%$iAVqz?BC#52gsrxu+L^;W1TL9hA*L&MOL*GOZlV$ zWv~~m&`Puj#%}%Erk5T#McHId*JSep=1WfR+e@w^+oi?Xry{4CcO3u4T*c+k-kefW zi?|bgb3QEa+15O3I&u$Q^zIRC$UCf{tv0^mRB9nOtAI`M?iX!LDB*`5KV6QUm(%2g z|6z}qV!PW^$VB_ft6ix#EFZzF#rc$nio`tW$nqzQW@4Gs>Wvp}%r_7}Qa0cBLb1ZY zo%=VVzd9IGe#8UwAEOr5&8}4iz*4w{Q3>wC6K$pGo;867`2IsxJp^H56=3r>Gcw(A zFkO=`LK*nVHz(|Y+4JbcZgra%he};aM%04EcM-z6OKbf6NJwdPc!d4*>qgQjFfx&V!xvoA;wMonKm5`oz!x`M)~Ph z>tRQ$@|F}J`lXHjD~^6gx$uX~f|+O$^DW;Tqz$!3VE@J@T?_30lUq+7m+%U2VO4iC z`cKY+VBebK_p)*Y#fHj9po=+WIQ=_9uH^)Fmmw4CJ*fa;VF3q~UMq(Cla5Vh4V1#5 za_DX7=}_Yc;#iGyI}f9<=1!sEp)4p{n3(+igIvG@W(`rp&wHq4sNP_i^IOs9OXd5_ zvRDlp|CcP_!8fSdgvD~)L$Tz>!Bl;r*fTt0sRps1(OzoSIC*KqkLeAVBinvO_8eII zYw;NMAunrJy9SR!ot+%jL_Zbm`oHed{dsr$B8PRk5Z}u7f%;3s!#N6V1u|Ta8Ug*Ph zBCh)8HBwd2duZMX09vabFG10=-e9V?+;b`QWlfH&=xTS!cJDun_A}DnmyUHtRZsZU79?Ts&p=aCie2TFIq2y+i7L zq_BbgHh|MgJcyNzfIW*VCIxy$p>mYWc2N?(iPDkI3qt-SM`IuzNYKUpYm2flg>EQW z=n<^0wpe+Dsc|ew1B2T_t}$Qpk8I_K^A_&HzlgS}8boV*LBwd>0cgf7iI#Syk0+#N z6;Wx>GT~KK0mWR%>F5um`8{L{(M#={er4{jF7>hJEzhgUm4h!Ab%#>|CsK|arupUgS)#%Gh?&r2TNb*5l7bl;&Qali8c^*zHKV@(p2k}^}wYNx=1)uYG2&Z zTp~*dPPk|VaF-q@NvUUWa|J*$u9vrIu`{{x$!RTny`@`|YAN%^Wv_v8EFs0vWJLm6 zl$2IF=@y(Uoec{=_l0AN1%MGBlSN8@vXVF!qo*f)?o~?3d62RldzOfM`r`}3g)(L#e9oTJsS;PP$r4d;XtXk)a-FP^gWy70)v($X_GoYz+)c7a zC>A!r1v@QZC)`uzCk^SI#BWDzZ{`ce&&$u4nO%*0*|D3$eB%GyK>8GcdaowLrWUO} zx-ZE+$Tv{??8y=_e3}8bm3ZMZix)Q7q9lOd)opqsMgQx0*uM!v7kj#51_PJJP-M#g9NV(?ejRszUmdi*`!*e(`f7055IzBERUoP(_JW zouK-PiDXrkC1HHhf6vK%p$K`5KjyyfP z6K0iRHqHCQ7nKUbG`{`P+gtED6{-E6m|S>XAKV92G3m`4>~bYWHyok+UHc zL8>8KxZb=QKBqJq{A_3SdK2D?af{xy*ZP?1vud&vBv1fPia$`0+_x7-w!#Y?P=<~J zde{(0<-ym%%S+3CVt5npBIwpLV(Fpm7KdMgm}DP}9`PBe-M5)Rys0oQt;b!{-PR`h zt*h~!r)mO-u`-}DI8DxU^f?rKESKEHs*&JD3t4pHi^(h+Ku5@0 zX$8YD-lor(>04TUfJ2*6%+jC?qpf<|Cjnj-f|F$uI(@BcBGbZbU+z@5ve51Gdb~7! zX*exZFXpM7kK191`zkxgqASUId@fFr1uEJ7l|;0;o4E%Eu%x9~3wUF7>k+-!+$Mds z2JC~_@LkfWV2^*Wt^Zt7MHjw-`hzJ*lyNvFAx*fM_Q~0}rm1N3FQgd^Oc3cPU}{Yv zXsa-}$ot|!9bv&|I`Rn1mWoje<*dK*q*X0UE}{H>xa5qDh|*8jwkMMn=WmZmgJ}Te z)?YQnX8|>}Ek1(HBjtK~=)h-x5}F0MX)%gaQ@*wB5?VAleagu*NIh*YAB98Ri^YL? zMq6vf^De`q**k6H0Y~wm7Ii68NsY`9V%J@HvDZ(B;b5~wdHh`>(tVzE+ zZxnHW%PzuB`*Bds^-wL4pFyi*^%9skjV+ zqbO&mmC$;+)!WtENJ?oT1IEsRhK1)8-0^o*8FR*^{>ldR6%xCbW_h-snNN-R*JA|8 zi8QjSDA|lG@DZh6@xMrY#M@8tCY7RUYS*J@1_LS^^)<{3 zd`{TvqcYJ3bBT}0g)?lgZvW^ug`V$8N_G5Tq20GUSVMxvEFSjTCcwLBN5gU&n(==RBZx#&us;E5y_47&@WOcg!5Ek@#*J%_Zb@_zc$;fpM*2#7D4qKwBDv94 z_9C8iT2&D30XeAJdCk`%n}=+9Gb?l|A9qUlNp&t(glx1}NoH{NF&FP|2+wBM^QXqn zP;2?Xb03KAS->7l%&9fA{|inULLl1lUNo`@6mjl@Ck~m2kV9`y zgVpTGWOQ;u(?7r_?_G6RZHLYe(R;rPTW*y>2V_SqeM_tpoh8uCCH4Wi7{Od=Ez%mF;~ENaFq);Q=$H%j4_ z7cqK@d@-%L_^`0#7ylDfQ5A_fTL!aZaFQktwVq9tPq7?0zvRk&ziD%_9i3&N5Lzu| z8PDW$Eo@o(Z$c(5;%YgSLi+qawIgi@mfG^tpruJF`dmW&q;w=t7e;X5*WJL)0*&t; z0?%Fmwb*PSJITk2W((mfs3qALsn;`}tK%fxnu~N&%iFm;(88sf&@Y^;>(dGlf9AS1 zc6g)eWkQa(jc%DjN_%i6GHt*p2kf858Re}^;XA0cM02P~KXD%!!F*BV=2<HK)1J?$!R%UNt{ez>qPr90BqR&R=k zd`ro5oiQAHsJiJ#=5&$k%xL9#|IxwM(!gAVp=k~+$=$9Q{t*AhRU}3Z9f04q5FSskRZxPmOoB{lX zvbRx|4rrtiL&GKMjv>j}9I_?~D0EBXqN~5{@*`VN)7It0e2~*IS1|wMC3xC1wn@9Q z<^eao#fsA+4!F|KGC6h_wBTn+`GqbRo~vYBIL-ukPAhaoIoarl)$T=$uh>3)FIgD- zP2f9{nsNI)(aTWP0waCJ`+I2MdCUR9g(Yl{UkKI6ui=BZlDSi6F`!fW@xD=A6o$d@ zwXxVx+Sy(v1@(?VJGIrV=%%O#_j6l|Cz)p`?w!n!1--dbI$ zF@q>`{!Y&gv)y<6vqo$F3yG{#f~leJ)|@b((B>4sUpLafmI=EKS^ZVSb{RW$$7{1U ztMp-P)IP*TThk{i{4ko#L?5O+r0KC}I*TrUJ#Q;RJ0O(tS2pZ2(N;9=xriO&_UIz~AqZaz!J2jk*mte>Ge2*`}}Uf ztUb}K7Hg0?=CN~_Ho%s7Rm%2;Nmx`8!9a|`y&iq?+Cnd?b7R8r4ZXhL&`o9O_r8!Y z&O9FAW$mm|iJXz(JK|F<=tE?vNYGAZT$+Yy!B%{fl0&?=&@kUxQS2<;ktL#PD(#@2 zMa+^0Pm<*XC`>BNjl2Kq&6&0qv2DO;-&cCQCXb&n@*66o(g&P~Uo_mkIokgSG zd=0ytI!prg*$~(khm$h5nFID^ij2btk2L{tYK3&qidwW?HL&3&m6DUyklaK?M4kA+ ziQr`~2er2ZfNUNvtzC@BmZWSM2@3g;Cy?h{Cza0n!sdoTo*Ea(hFrKE!rQAS^h`py}P! z4dBcUEO6rc$r5AqE`h7_mlx_=c+Vd!#r} z2VlBBn5*>wNT2K+*6gBLRvN84_C*$4f z*nD{8Z_??lr{ozIP|pM(wwt*6LNxMeWqk9 zm*?-knk*NAcmEN?R@-$u*3*~bw$V3v@2SbKEAX>eWxfUTis?3|bUso2He=yaT*K65 zBoF%vi`f$su)9suUY58EpW)8Rrm+{wO_+eaCy+;qVQ$=+1&xIeo%{npcgyVf$vp}O~ zW1#W+KR>$8ngN(&Cf(fd)2r9XZs%p>qx36X5ZW7Zx@?TJ$v&A4DIcmxWTo^)XrsmI z6?sBFKY^@nG1#_m>^MDv#!sH~>33O%%p}&~xJhpUalP?RK(if#I6E-w zrzDGRtuhk6LN%c!kVRkJosf@>B(^0ysc2rw;d#B@%0lI&R$u1r#64Dh{ahz{iWrz1 zejE5H+gxkdE4haE>=q1wqPuk%9lN>fzh?>^eQBWUlRcX&ZZ`GjlSEeR7%79MB%}f| z47Xm|1FV@B&xQ!@j8n@>tD3Pw(G{ecnb z1s3>Bb6sUU2ss-&-*3f-2}{3kD(Lq>fRgaF)aQAHm=`#||A}woYH#dzm4kI(cyLiN zKrAg&vrvUevk+poMh^CduAAjT=6f*@c|x6HluXzWko*h#px~cZoK}oyOrrs!`X~~c zyU*@ACivthC^}RDb~23TghbNl9<5vh7U^ZX^cU)A)oj-`ySaJv-3@_!jPUzlC{bMK1cbDo&>BGYv{-65%pepz9+A4C_9X3zZPyzY3>Er)M5$e?k)r3hr{B=iTCcb{llQQOxX3~u5PbTgQ z~ z8*=Us-PkNZnbosBN4eAsNi*_gCiW@@ZS<=YVO-B1TN_5lJR?pIKiPLBxLJ;^T6~%5 z(o$B^mn=on-mj}?{R5VH&ci2Pl49JDEs?r!I(id!|JpFsjJf%Yh5oC9^mM~LQiARg@gI5o_(?DpV|u=F0;O6oqh4?T@vt^O|9 znv>^9x@Vt<<#76JL2+%p|N#3pWIvvh> z>YHVrB~>m`rGn26LRVr$DiW6&!DGo$sYj#zIeCju(MS3S`AQG;^XM`*#jz0-(WK_TYQ zr_X4^6eSw?u`*F6Tb!ZTa^Pd{DdR}O=z_M%!2K4gvj^6xuXa!k$^{yA*8J}dG6wj^ zcY8_>y29Us#gYRE;e*wk^oCRIg#)uA-nU5k;M|{lCMdJYvIE1>l##y-uVCwZzzHu> zL_fenIE}8Lk;t5oRtA)-Y5J}C;wxR4%)AuqJ8pig$boa6`pwAY+Pye`GQJ~C8$)0q zTfPqH6rnNH;9T<_xjRK-bHM@NB=knnZq*#Zo}t@Nh}{fNQsHcJ@tYtmQ+PW(O^C=| zdApGZQy8zuhgV{#jFI4=-3*^vBNEf%8dFH(4OeOcs2Jae!g-oMCQr*to9#;dLbREZ zeAn-n6EPv=jp$G$h9={RiCfRS8J+}=`4#Y<7cF$iAu#b*^0XqT#%6^EP!B-H;@y(w zkP=CerxqXNPmjIYgifN7z{}h-ylJ@02c`~$lqEK_g*K!?Vp6!oLe9U9=xC6fBn-!X z?BH5Z2oh!WmLJh|DsdIt#E&ZmQw|b{6K(Ul{2X*zQUTzJz_JP;oJ8w;FRJCEu&a-0 z$nCXYDPHW|&P4B}GI9Wa{S@2!APqQS7iV=*BfM9neU&B##*xp#N3loKVf_Y7)Vyk& zBl=w)bn@E{#=HY*cn(<#IeeDy#iCU zx`K{>E1Y`~yY9^kY=<1q(z!OT9NG35%ho>q2b`W4teW%_F%|9u0qhYQ+*Eovb@}M; zRsOu^HlC@M(dDkYO=tb)oOf@0_hj$a7uvnwmGn7nFl`WutA}4(#pP3co>)I0HYuM_ z{hZymaGThT3~%@LJP+v>W#C%gagCZYxTj`=_!*phSBEv|PavTvs(pQ#j* zV1D$K-`pV78YB6}po&BfsNNu=ihDGg??XO z|AoK5eS1LJv`*IVRWU@~X5iE-EHNdI_=!%BW%&;oR@RLTE=PH)x!DLoUW=s+#)A|_ z(d8T6giG%P%CJ=#!inKYig4L~Q|X`l!u$|E)^r`t@@Z-Y=T13)ZaEL$GVe1oh}nvg z!Z80OC#>im*|}wLyVUaq1Nu{Gic?0u{_t!O3~R1UUh2J zdeXJ_&kO*zse)yFb)xGDA06MX#bu4MSEkFH%dNEpQQN)Fd!b=SQULv&nt}zm-JSmz zI7Zy!&0(ZZDJe}Q;IZkTPTySA~ECo z2Z+4kdlb|UwZ{lb8Ux<;D?&DkA0f88pM-!jVs|?yc+t*l^&3->1!2Y4la)wSzl|CP zN;jf(Oh8ymfb}48r_}lLp|Q?B5nCEBa$dj9Wbb#w*}nX)V4}m>cr+Tx7NY9R)6nUh zc6~YZob3Ef90U(XbO3F9Hw;iZdX%LADr=CKLq>!s`$>wp9_;; z)yj5u>aUY#_1y~LmX$MIJplej8$eIEEeAdSi>DR2POkze%Mk-qre&wlw)N^xsl^JPf>F zMOTTJ1fq!QNb3G(Y+;O*d3>67SO+0)&I{m#jkryP3cM~C;c;*SayrOtztIY~GF+h? z-X@yYcwQLIF<(L`DHu)SRrFhobgcUlga5TY&bKD+eTV}@>1su#06t);V1-QKYYc2 zM%whx4)~Uet6;v>#^Ozq8z1clobzm=MZp+0z zolHd`XlcJGdm;1StEv~M<|@%#wGOi5-=y&diUrT}pRF}#0ydSI(H9z=#RYdPPM4h# zJvby)|3GY@>+iQedC{N0{sfYbxmgynVp>|$uBZsXUNiHki8=6&ML%AAfsvu45hR(* z=7XbXLew3c#qzz7+3h;&p%Hc@ZIPW0>-ew(fIy0*V$zf2j7HB*z5XSlX6s50>%P!{ zLq*Al5!NSr0BfsjZsm!V1&JHfjeVujI&Y!d+;(L6Znf7K(N?zD40aJ~8nsUZZ+;^u z*lR<|H)Jog% z&9OQ_yCN~$o;ohD*0E_%co=cpngj7L4I@qP=7KOxn-`;5Y$;OwkRaC_Hp`#kA$CEm z1kcxVGhUdxnXN~zTVirZ9?VqorQX7I6LHkO6-Hzi!RWP~S$v#hfwT~!CC;7AHGR7* zJ)x(5%K7_g_%JziKN>hCo)C6G> zxkHh?V@ki~8ZQZk+qPfRJjXiWqvmPnCn{oYBx>wA@&CG9kBuo4ll4CG3n?%Zla^Hq z^4ZhojircL{|@S6@eO*x7L%G>Q)625;;Al4zwNs|M3qAv_5D`M zqdCX3Ofny74(XCnh!9_L@*oi6YT-albtp!CCn~Y@OWiklaL~@Jk*=N>?S9t?7OXH>BWlVv+ zd5+yA9Lousb7rL)*P*C%0540Ef4>(8xK0kFft}mt#-9WjtwKPdiCeehb`yQ#&QN&e+I8^EN zzITEvvfB55P<2*OZH4W&#)G>QcemmY+})vQkV28-1S>AZ-6`&r;#P`V@d6D{+}+)R zp8R9%^PjWFSU0(ht#7^Wob#E}ZidDJSProKK*eW5FNz2DlWbn(ZohLz%_J@aH`!-Q zovjkmhfuUsZ5owsoL!lVvM|)L1;sI;Ms?T!Xiv6z(HXDT4FMbPn$^BVO^)$=Cl$aw zW-_pt$UQU^d_nc+3B>k_qe!5n$CkR7CMd$%?p((yaL-__>?k1&Haq10N&M6Ld^vd6 zCe_571}VTtmYFl#G3s~6_w`YlX>;w?J1y1%LbMinCS}`SAFL6r58n;;g>}*iZS(A0 z?PSXRmCM@am8p-l7Uv0!c)9GQK9mxkjc`nI(2eo`2Bs~3qDC@o2+{iLE3~!wcdJ@7 z-mKfUf+|6)AY1IlYf{eyLll2MtFx5Tuh&M0qF^)NWz#|W$1HjQ*B-$;r$n9dmbpvs zRfVHFT9@LYlKRv-0%HI@DWSOYoT>!d7fY}w{l<3Fk5t|iT@{q+-UD2R)?R4|j^Jfk-%EPwwOi(s3!9D&gKVyURgb)1z;B8Pr#Tpr+W4P{0oH59Lto*77Z4 zc!Ef0vzLvowiY@W2Gw$=+OuDZau3(uS9-H1d{7S8Qc9wd9{ai+(qpGPH{=zu=R5$J*A=ftc zX*pi4yddZ%d^ALjunaQ=lk%YFZC4cAY`8k+1IZ25MThE|J~*)~*b%ILAzEVAZLKam zJEZ{$PubBXj+;I1@NL}A|MlEEwCmi!A0rQHN)^g!)pc=o3V>>RV38uM_=tY`>SaKG zTF)7yR^epCOqmzD`Ym{17;U^%?MJ&Sm*ve5`0>$>DX!924-Z=6vI*tv-`j3YXdEIh z9TshZ5hGQjEH(JkTqJae;fA)qNV}%i(7pd@&E7pBUof8HW(s~{IS!m`OPzwC%(8}P ztzqGOF`;Rr8~4Ns6C6)>X3lNMp+Sv7f@=CJzy5f7$4P*rFrJmX;Il~?G4*H9AnL01 zMC9bhgTUuub=jlxinutt0JZdAdl%Gqm`^|Azr)!-orSq#Q^p9&JJy*E--DD^{iy`w zg>i4e2|M1UPFcP> zBeGsvQQvbv6!yK`;KXvxfrNpfexcV2)OaYemqEht(Pe7A+t#}bZ9@YA(i|qWp~;5y z?^Kf5>~=R?IXvj*u!5478TQNFB8+;+exwtaU;>l=D4Y;c`bC{lve}0%W{PwhcE0od zecGzx_b`C873uo?eT~XuVJ2&DfgvMK+zzNj(a71D5UBkV2=j2gB^2mq!~GjmC*?_G z?!~{>R1-{fS;li~T0Q3ZH8?MDYt1C0ycP2Who4Ztbp`Z&>-7chVjVXeXXw^jA51~1 z;@1;2s@oqBW-(tyPOcBr1ZVzg?r1+8Aa{DJ5t;QIageo_?i-AU4A#M)ivw1I$d}kF zET{gY2Cv?v9I`|6Iu8A3zM-~k4Ps38H?r5+tmdZP36?%ojij) zAmZ6n309P8&EEJBAE{>j<@~!eOII7=px|`!3~>p#+(V%3BMKKh_SINt?(tH*k{DF+ z#84P{!h^~QfEDJlLh(zZ%&Oa@&@M(JfU1(?INF;YdRO9_a2~lq3xErv3#u+}YRv;1 zcM)I4Q};rTC|ynYF^;jJ1}9`<@1kR!kpz(*V9|4_DcU#6pO7Bu2gp7YlO5K* zjfOKlX)IS|0OydAjKkv1)ty?}q!O@yC7hg~MU}GCP<~pykK*%quju-f?oT&EPjW>{ zZih9-74>?sKKK>umJa|28$g%gh}D{6DYm%?7d+nsSQ9@#x!4`%^} zZz-C%ohP3?D8Ur%d$0)m0?z>%KVkPe1?DgeP=#_=s?Ux@J@{?s=Y*+-hg}B?5a!Zm*Hpb)q8cQ{^+q8 z=5Ot3wD3KJPPe(rhmD7DyY@%1$%$BsAW>+DC-{eFayH!5--Z zR`GdP6lfk4J3(R^{cj%>Hx(GflmYUmSmFkfJMEiC{jG9AtO4cf;?Mg)_NRi3=KsG=5_k#W>|R;tB;DvHfmnB9*TQgt-=3XZ=;8lQFl- z7KfYab`X&&w@+D0O|&uZ$+X>@5_0oaQFoGKFG$POSX^ro7n9?F$x|q}+~FION1;9Z zEUzfSZ0+u-DR&{ixPDC}p^$>vl>My|Hou1M$tm)Wnztzs*~KzkQ!qQBn+rx5=2z*6 zC4Oc8q!A}auUsodnoS4qLx6Xsh-R6xX!>w`#=}dol*1OjS}yUAqKO)z;e;nmEO1g2 z)0wN@7yy3ew5NA^Fl~4jDRjE!($0~=zdc)tzuPmv>$g=T_DME}eb)3jBwdI3Yk+f1 z4UW85agwGRRe$aq?$#!qFlAZ|#g=@?5v|-pL}S#!t4>)xt6d50x8OwgviM9SsDdB2 z-m2ZDkCd`3_os#YVu z+PW#_OaWTnB}jm-#}g13Qm{wCy9OT(F>K`Z<_5?hG?IM4VCR%aXmI zpjseQ4m%vR#awv!XQfG7!q8}wb7OQHAH9;v_8>XL?QbGP!k5GG-03gAGH3wc!Q(;# zJs4>?AQLBrJ;WihlVeA|`@|0KUX|D`=S@!2PSBP}74ec(bReE3cps5R!9Co#$><3D zjCq8TfDEe`5gWMIkzO^4E4EJX*E4=Zkm0j8SAQV#+_1rpS`WJ7A{)k1xGlU?S|9rY zPS(6emRlu!=k&Gb8qhrTC_>TPL2t@;AD16-N?)b5>>}Ar(Mau;NEU$=IXRr&Bz&KH z)jTlBm~>jcjQ4y(3nQAUk4%kqP6K^vnuA);rB1Ha7+-S)V(f~IAb zPMcT5OPYF=$HrRA%unM89$aufHoGBZg#Ao&&r&RA{ly#3YiP!`tMfnClRskchXL_D6H$7-G%Ky`#vgP$w@T)kw)+vf!Pk?>T(9D; zugFoWu9R~ta)8f7@e9_RUay-Tj^Fs8df6h|)^apve>3UVNH~V&FR%WBRMD))z~`%X@8 zyu<#PA4vQ`KQ6TOGwO5&wKUbH|JTZKe-z}Mb#=R-7g~R}KVsE6-ohzCzPJm`VK;Q@ zup0&F?&lZe&erwdTdN^D{?ANg3KM%i4;{tZ0zC~t2FXtBfM`~^PQd92!jt8>^bLf$-fhUVnwkf%rG%;2 z-VoW}stT7(0xRK1rJZD=dvi9p%a46Gy0frZrDOTxwfWMJ&kOaa;*a!Ags3nTxxHz8 zZBF7~xd;HJOd*Dl9VuREy7Y%D35NLqt#nxYsdw&S13E%r+OP!i9ZiLLp*3D#O^()Q zI&)MwRlrD)GGg4l*He-*N%9|E9IaZuQG_5anlrpCbr8*8b`242W9$M!(+3x3`*)}O zz_kl$@qOjPimU$m_GA*=Zy&{H6Bz}!5;N7L8gwi0`k!U&b=vj4bB)^p8qKuXmg2y! z4JVsCr!>_G-OzBd0cqoF<{MYu?8WjrY(|elR^yTv-D9e7;obNvT)pWKuP2Lq&3*e|z@JxV|MKE^kk*_sRGmQja-guQ|*x)By3 zudv%Sjag?@jcOZZt{%%{>(9UF%e(tFfw)?>$&^R*Y@{`LqLXxrVWCl&dKZl?&nQf7 zKN0T!F4Zf)n#60hL%RJPE{ILEUyub6;Yrk;=NAhKZ%7(Gs~YTMi^l)*J}167cKej` zvJByrQu33a{7b2alfC>`^y<3-gB=RDqk)D_BdajCB~`S%PfFzaXErY}#rk7$p>tU} zC~Lt4XxLxrLd>Y4xoUGc$1vFZ#j#;bbjqi$G*S6~qR{SXt>c|g9s9vlsw)-3&6G^K zKY?g*{~npTh&&5@)(aYZR}49F`l04c8O=EK`O_#)an==qjEN&>sh#O*-bOiLf$|x; zXZNAI{7;4?^Lj^Lm4*^6@*N~Sdpx?8#YrwUltC(sC0KrwNKZ^620uiRPVIb8@EnbN zP<{a7!?!nr6m5P7W$|16Iz({@o0cYLK9^HwZd}Q+XU>m&gwQ7gpXe;eZ`*V}vx*mJ zFgLUHcMuIWP5nO8ChAR{(zW@;Mf?yTXYb>WD)CCUX08{VuKP&)-k;{Z2SaC=0!;R= z!aj?feQDKF@CN6m4cuWnQt+bv+JfJx9Q1jbZn_-0t*}~ciyZJ;qTr8z7ZuS^(r{h6 zU4K2M+HmrRpy6a`{O`l=zNyX0Y`Qh_q{EWtDoi66yuv-TOhq4Gi>)A;_+&yEr9Gw1 z{(@Ma3tk0ebd1bz!u79d5W3S6hGnRS+995<#6m=Dc*!E%KrXJbm#i`8EJ?%GLCrez zzbqo_tc93CX=elN3#pPi_x5~cN_iyPxy!=p{dbTS(nE&?1=k1ogIqb#$@no31JO&~ zT&MHbmo9kD&rj_43!acPw~Ev`<9~2}gqkdf>=@WlX}-4K zf0~~DMAx2vY+`?Ku~cUF{gDLe@eTDbB(iXGBO3OQ0!X%`$EBX|grUg&-@7BNeG4Mq z&r$dFOV%M2{-nlw4P<%?+I)rfz|rr~15d0yu=7LK@FM&DF4VrVF_n0Y^uP!0bR5qm zGv(TS`&@*-8_p~Bc&nA?maP;!G4k?i_rQ)Vbxb(TofVmA#g_v@o1W^yJCiiJS?2LU zaEc*IMc4M;WpJMrxWvpf2N7nMVUHC{btNaTv&QWt5ekWGkI|>6Z>MKdA?KEPD%^!D#bb3VFWYz(}-XhWx~%W6FB5s{8hm&#bfhqmMEi0ZVAK7Uk) zyVy(xH3s^Mdr*YNFpZLL@T*toTQo-->m%rr4KtA`C8QSxOv_=giigv6BE4s6=SaUI z#nl1-uv&62M@F&B-{~DXcz3KjsT%<$n}Jtz{!^84vCQx!Sr&X1n(8byEvQ`|LEOgGA$ zyHutaekVpr;Bg4Inc~v|?Ey?{uVPMw|4_TZ=Yg&)i*yg?vJ%&h_ZD+ECf%z_ts|ji z5F%tb$@gTcmOPA9*j!z%yMWV%w_WeKhmepXHuA-@U5x3U2GBgTDoNh>(8{sna=MfC zgyji;zkM%75{lO;CIQ7eHTxY^}{PoB5``Ef4S(v_(Ak?M%YPab!(9| z*EZYZh=7mxg~=E31uC|ln8rB5xOoGSMczjYCsaaIRSF4T?;Ec}Kqhi(kE7x&Hj98m zdQHl!g3dT6#mW8%ctEd2Cql?(32tSz4CpPa-gZRGV=6nghM;0o_NS%j3;xyk2RYNc zJs&?~622kh0^1L%&XfFUpQ zqX=W-Q2l#OB=5PB{n)ysM|XjGEApq&b@K16W`RVa%<5rJiLFW03+5md3MHD|5@)3u za+g}!bFBHTD$9}vzu!JzVVSV9@u|V~AMl2-mvap%R@I6e8u?s1xLO*YuF{H*Va8LE zyQ^qA27QCM*-u<8@k)Do950NZvi-DBDSP4Htt!w|W^$qdWYsBc0~W@ln}SW-Ir;#M zu{`B%JS|WP`LvoyQ03DfzU1agS*bL-ypmD;tM(V&&2sn*RQun74gtv$nG&HxRs4*B zuUw1sO)5@hK~D>2!4A>W9~e64$a)2gUi92M7$4b!@UG=;s{1 z!qSIRU;U9JpC);f%b$YvL-yuSDmgchy;2-Gl8LT8^#I5U+ihAH zaAgpG%#a!P4+W`2{hTI5!D?FU(EHZJiub;zv_)_)j!KvOaRQ;N+DpK>#nvZvot*O1 zj?~RU2k|wi%J5NJtZbbhJKo^@`Szvj{79t5Vb1QKZ1xy7q(UBJG+w}YA}_{$r%JQ0 zQ_zF**-;wUjA6Hos(1YH=2NfueWCLTA@~QE*HoBkWV===_TSyg6t|YLKs$BZnu(!s zu1U=1t#9d1PlTo#!C??@zo7~Ewbzt@!oZ0U z;WF{8GS0nX=amZwfL?`dPS$Q z)E)Spg13`RAa46LrsS1Dl15>P6t$`Rxq-F4+P1wt8HZl$r9Ye} zrrzYNy8imwyKYOorUFU(OUtT{ZXcBBr(KTs?Fxk9K>GcqU3!RaSG6=dbGVl!uVe3_TzQ5jUb7>qJd=_qF5rS0%$9ZY7{=bd`EX! zKUzSh&4!l;`N044O6$>-DYIQ@zg&FkJS|CJk57atARKqK8MhrTBuu_H23`fp?r)`b zPv}WcB1(-EynNU0!80=fPimm72n*l0IMzqeG4ESeAO?rfjRphei+fuxR2^HL23Ja$ zLa^s>)ltwPAJU_LKEHqbWFUOs&T=J+u#7~3=GYL-do@4bcZCbRcCcuZdaVoFMd00_ z#}V_w0`6lDUIm5)Pqj{qsAkXL0Y9E8dk#>a%Y^#32tW`!++#X`A%Jta^Q1TU`32eF zGXG(tuk?9x710iH{WXNE#K#9}as4Bw9=SVGY=JvEq9 zbfk*HDtTgu1?Vvwu+yR@lcObi@r)p`U9s}lo@iCB$EE!E&Fm0y@CNGCdu3{B0c|Y^ zDsz=C4D;7VtcDUEcDP92uNc{px#H&Sh2fF&p|2w1^i4`5LVRxMHU@30{hOA4>Henn zG-r?%$D7HmKQT*OTdq^s4wbd6qKKai?1`}Lh5M=)uW&!oU?^#aBseL7&?hPB3_>{g z=Wi>8B_sLG^G>k;=}6bG?Lfna*^i{BvmR};AmHFYqj7zFy0OZMS+9p#UsXpqa#uF`L9%eIkT(AT{~jrkdPQ- za0>Ub@Xz}-g@ar^2#+tJvG7@~Y=!H}iAyG3O@RNfiZuSsZhWoK#>R@+_m_z4ZERFA~tClEGU+GYTbCL1in{g3-<)Uc64x=mL1IAA~5 z*IgNKD}PG5VW7Q%;HZq_P;%!YFBq-{1^73X`iPU{xV_OYKyXWEeUM|DqSp-MXqy|}J{ z^Pb7nCmo0nVl!TGnj&O2`LNV+c|^CR3XD^&1B@iBZe1`C&l3pew zKpxA{TIKo1>9nV3GHkl-3%-xzrcCXpS$RCkpzZT)>Z{29e9;e`@dpmv@S=hUeiHKc zXfxV=2g$vUzKxL>x2`3TU2F}jH><5hHV=ls6GQ-Z>49;51RnHBUi6tekNHdCJ554` z8RK1gzt)}5Q{Y) zD0s{=^pRm7>-t=bS7n!}KKJK7?0{8S>}<)^+l+0XNg0H z6!X4I9L;X%Up^Gw@iA%$6+CSv9#Hw=W=AFok2lL%)wl~2*VXSC%!U3 zV9c}r<4Ny(d}vom5wUk@3&&0Y?3E^v7!l0x-;;eR3Y>M^arTMvQVV{$qf6T`l^51L zH;sufdLx=_03alGTKwTi)vU}^+rXkNXzepO;OR8M4?5P-Mn3cr#S7ZTJ0XJ-_$ZzL z#D2H9W6Y1CT>bG)fIjQ~75gDMrzwUCiF}hI11DMA*X3Mi-DuCJ<}b!UI#9v2&fV`4 zXnUmV4q)&f1I0&yq(E}Rd01;H+4QHu21F>+p>@&>RBFDY19f*DgPKvcEPEOjPU}I%a;vr$V1(KTaU2gD^7Z)Ve1pt z>deBCAHKtSwZ@**$qx(+xeJ0n)LWzA`Oy7W4>;9uNWt)w%KbMwv4noNl?%Uko6|Lo zDxI_`H%PviwNX`s^3Z9!!brm#ot6 zr>vn>m?hY96pruRXa;T`g`9r1O3LF$P>-a*bUYKl{>-6Qs5>A+k24+uo-X;U5q|Kz zr-mMqr6U#Wnd-L<`D`)qRIjh!C+dhoSMl06Ta>mCvp29MS>j|W*^Etz*{Q@_B|7Y_ zQ{7-aeI%!@Le>4(F#gYG(1-rOy>dYn)}I_hzaFm$|^#hz75cKPX3ax99G)Z zb6v>`LElfk9bQSnqZ|;u)3NOZb9~85c-65Wcw76KH_026Xo$^6$M{PO&4+$gIz}Qx z0?&2!pPDVGt*c4f9$^;4d@G_{p{_VOh;QQOT#ASZDb`8IZUP;j=LwO|3X<4Xa! z9QbBmZ(323+vW3V&2+kpgi%v_QR`Q2ij7-A^xV8nC~}4(mN?c!T{lDZcUK~U-6^`Z z)^zm0|6-Q-=lPg)Qm%LReHWCYPlI(@k~2=~MsqZB`ZNNL+3F=G<25`;X)>%DZ$yXt zf>aB>Ylw5VXT>{$h7PSF2YX}w%rl>2J4jSdb@!<2NdPKD^p}kZ_;JklM*}LOhC$th z%5O!g+8{JhUXfbGN-iXcKvGpr2?UcwQIut3%J_{MgfRzYYF;@GdnsMbwXJVKC>)ti zwi-|$Vd`4p{BNyEz`B{-7+u)fO{+Lil~!Gx1f9QlqfA0o>&-JDggYTW?q8}VoM6g) z=T0WVDYyNnVL^V*?BKaqN%%Crmr>^LvRzF5!XXq0f=4%V{|v<+rDiogzUBKD1bpfV zW0XT?NTo9VA#N&^u7Pvuwc{*8-La=3@4Bn7lQv1WiZ~3wvDlt{2?5k0opr+~lGLM~ zP{g0|FLip{T^&Y(2nFJakZ0y30T76H*E6c&qXv@E<~txPpkGO1{lpSOmMTN9wh(pb$Lrexow8 zEnj}3PZ;@z-BYKphj?+U8ntpkau->xwyLjV1{IjH9BvMS@c1*i-flZa9czk7=S|+pCC)n!-ziHf z4!pnHm#AGNMEv%3FW+AhnpAQ_BmcrJnr{P_DN@2-OqI6wg#twXiuKAP30U)wo@%lL zT~StuLw-?Q`f(3E_DL#u5)EIzem)xKxEdSQWCHI!@9`H2X*?o()BUo;Zwz}Z+O3cb zkGxqHv!VFRq!w275j~V>=C7^*LC9#T7R3z);o}=-g7i+6qP@4f*x*OJe61)6H7aRp zPtE|+ngGjML^=mGczKZD#pDVs$s*GD|4~=E_jdtU85k@)*d8}77GIK3@`DjrqUqzc z!E(a3^0BnV^ambSP&4z=tct>QqEA*tFPtNu&6GBX6OKxu$J-{4PPc`QV`k zOtxJnu05TCKs1SyRnt6#s1K}iMubJs#_lt%-&Q=fI#gMgPK)8=KXo0Hgb|cmlIijn z64|55Lm!ROz6u&LI2oG%u%n1~G!?qI_9NSDPf~>Yb+8CIDZ> z>_7J2bWf8M)$ZSPtU(|B1K$2~lmJFjvB>LfR^VpmN^VLxb+R(o?FtD>SE(nWGH=E8qC!Kv5$|7Tx{P(lB^)EM zurv7SP`LK-uj%COauAy+CYk60>S{UM z6N{Gj=&`Ftc2qWeWZ_GU!{UB$GAL8fRqO;~(J(oyy_rzF<6>G2XtdT7vWpN?irD?_ z=i4v;d5gB*$)EK&pi8)C6@BSp>KK_BWKXeRjU!%Ff&s4xGX$`Fm6?yFe?4xosQ1eKp2*X5=XEZZA zc1pLIL{+nDZi!4GIkX`m+Ss;w(LJL z7^Hh&E{bW`?Q?|LEOvz?svfS`O=3tfznfmo-2c|Xn7yfzs#r-2`HAJT%~<_T6m0@S zv;S$^ws`wYQJuOZk7|W#iCz~ z(xGni-nW*-DHAac5R;UNMUBeuU?ZlFt75Q#HVVxjmLEADTC}He6qh2GUBUJ+_j;Fg z3C_w-IA141lg_HZ2wr18FpAQguibPo%OHAz?h`TYn^3*!Mn|-okj3Mgx=q3hOf)1* zJ+lk0AerJURl7?v4=y`r>V?ec^ezhhn;;}a#P~oaJdk^d?9e3E~If`TPG|y_EQeORM zJaFrTQ=d~H7+BGZm|5^B8DiRQ&GnE@$lqI^f3&urH~e*854{ zP~>A;daXPNO{ZsBu<&q)=O7PCF1H^qw_S~HF|Xs;{(|7xvBlxc7Gn^yNF8vRF*XM+fQBq=>BJUHYPYTtuw|zIOP`Z8KCs|8ytKT6!rLitZ zIHpCPxlr*SpAOg*2f{hUhY&PWy-6{Yr%=7Tk^2us(D+V>$JT`9VPWzubZa&PU(I(Trd@No6L4sRL5xzw$i~GItpw<4y@Pt$xxhu@3*zYac zPRx$(^Ana_f|c9ZTU`_m6=JTx$X_+lfjya`H0E#L@2{KrMgXveSVfi8+VMQ(j2@A? znC8+Dm2Q^*C1V9}N&3{UjA1+pB~^2eVIqv%mzpH|08uoL`HMe_SD`u!GPx`S=S(8E)=t~^jjrg zHm`+(InqNA$|!xz+VWGL#M8mreMii}qQNUz{ITmi@7#8=71ktv)J%jmpBps<-y?sX zBptQl+XC+nQE-U`2~B3?ZEMv&?Wrr}dl8bcqgV{*vRRvzl$>1Ae4Dz42*anZN`!mXPI}NiZ@{C`OZe`m*Yc;@2kn!y}ITKKDVdWLq3R{?qutYW&G?klgVv zb2{NIi;Y+25bW*>)3@ZjlNqlB7Xiv9A>8%@YrVvGah$2lv==wA&*EVeRfVYZo3Y@4c=^Q@3;JS|DZJlmvx|Cx7>_#*!O0qw^OhVFgQWrHPNzeh1zm>j7owMl~I5C>!Ou-|hUDkUlgNFEN^b5KpP9tH4QK zG332J?Q^f`gYbLG&PGHgui~Y=uRHd*rIu8sS$KsC&s)CrwX;UX=w#+uIAO|R zC9;vNFL0$%miaYgzM=$HDb1@2*>OFd0O0TDa$_|bX{#rq14J54tx~txAFf#zD{s?l zHF5ybJ#D{|2^{j;A?oGGZ0uKo#U?c5hic-fbgL6KgRRYPr5*nA1tK-@JvVaiT&REr z$LVzAVK!?X%)!!+ozDZqExZchRTvdc0^cR>P#yF9>FTw~Q!SAeT~6HM<(fn4M^jdTu{l z{P@f0BHxn%NNB(MHh)1WNpu#QsBnBaY%y%KZ?Q~(L$`azLo(W){y{khXU9d8M>ZvS zZ;a<`h1|&5MHZ;`GU~}zg+Ea$s4qpZ%rv_+kN%KK>YRfR?zTA)07>-v zO0J^YnAl^UiDf?ur# zhZZ%z&cnNyC5r1e;{g(+E<;V?s&Cnt#rLOI?04$I_n)mcS6tqAKBWf6D)$hTn)4mD z#@;L|Jvwa&d!+`lEBCb2(Yh~cyHfI_HsI~VCkn!;cRBJ$a$WJY(Dl3J>FpTHw_&myr1@t zo{a9C>P>?`FfGLOF9~g!@{@|o20A35JaI|l`0Vomg=%_%b1k3AFUAP!3%XFTO0eae z{<%7KU3gp-P`2seQneol3Turt)4%kaYl#PtIVw^huLM!&F#r|D{K!f%S(m&|Kgyl8 zqdRR!4hVT6^bhAs+s0rUrFDWBx^zU7Umvh%6JOB!>9LUlgAgyCReK|+XrYVSC-Wes z*G;t>7!@TQ@Cx{lNQr&VDKvxTU`=WNpo9Y*Mjn%&o)UQvtK}$k5Hce$tlho}ycGSC zV^#t`(4G80^T(c~{3;$g^Tr+0=5=Icj*iW>OmL~J_DeX2FP*f<)5}E)^G6l)VpYP* z7&Sd%Wh>Mnov5^=D4Xw-DHpnC;+OBm&@jI1ms-%V<5JK(g*ql`38k0)Mak?%4LSE` zVj$h~sAxhZiFIv)mGRa6QP(pk{xP+F>(7)Wm*j+MD*ZM6ssnXb30xj~qk>=oc0T$D z9LfkX_EDD~h>qW_BG`U7-%MP{`@#602w$G6Ku~lC?X-|A_jI4$J z)pL2#NVS#FbFJFRYn|sfUqdydF4G*SMugl~G*LkcqV?Y5Zy zt2KDlm9oe{gzF?2Bp`V*!aU z28@DPG`*|@j*ZhrrtcqC?mP|1QY}zm{m2_Odvs?LSj-9#8&1+0$0q72Y2Ho^2iof@ zZX{|H8?`MAn)@m?Grc*KD4$=8I{7&8mAHUSfu^4J1Sa6JC|Age0__Lw1ZX!F03zMV z*gd`U7m!h&l2l zu_KH>SYs%8=gX2N*_$MC1_?rx%^ONak0;Bm9ALih>w566QIUTxaDZ9^5Go;hTqfbL z93lWNx0=u04&iPs-Z_$2CUMd#2V)7c>AvRSeeeDTtH}0wM)6_7Quw&g$K>8B>`LLv zIp4Kcqc=1Q(73{QI+G@ob}~&BRQAjIm&7%u9x%1)%JOfCvyL`!7R&IyU# z{@gD}z(_S@=YZ_?NT*{4NQOSKp?MR^!;$VU57tA^`Kyi=sd3-#VcWZUbCq-Xmt&3c zKeWFIhd1KdA?fjM_M7k0_C_GFBqXjAO)W(`IH4zhzHHGILW{Rv3i_@nVi0_=3?(8R zVhgTS$#rhZ|3LKkA1jhJ+HoD>Bz)e%NNg0f_S=8o+cI4&0*vh@rsq`6679N3QmChQ zyG~0hBYXbVa_nyI0xQ$rlbQ=@b&ye(MD{~-qN|TNy8kH8B&!Q~hIUcPor>zVyJ|U$F65i46QFM}ER>S3?mT1wZ~DkZ(r= zof7_ZB){)2mt(;%n1fyz)n`X~vM7gtx1;^L;K~@R*GX*fHi?&eizOcYTUt*?@|Sz* z6S606JF+*c4gIBnll)MIezPUPLAXzjq6H?27oNj~{QiW-K>}%Bv`)YejBf+EOpeC! zAbsMO&{U-!=h(nODe{z3zYnnYt_w4zfJ7jxEF9e=w}3O8^;e=D&bzh=2Mvkaq#%%K zR%v9}{`RburJz->`!ZE$V|^oLM&^IdiE#<-z`qu4#d|xbIS1mP-=rDW_VRaV2O0EC zaMBjRz3$-3Op3KE3g_1hwye9xMs}$E(wYg9@Av%f175`Do!;XcL?-4jI?Y|sS*?wBSskLkv*D|db!rTQ1W_cjT1$G?73*ur1M2p)@e*9DRn z=5Av&m>Ec*m}q}NB)A~iS&-A7-c@hFoc4H>C-}#CVN!;3b5;U2k0A=Eh?;>lY!}2x zy!oONi?0Ln??d+1*Bf2JcDEp%6icpvl*HAzyDue>51zP!&sXM~dHjHhFk2dlCrp0q zN*SR%$fu__RL@9Fsrz&8!kIsU4}nbNWjLe?1i<7G$d`b9k<^l=yPg-!Xn3m)N}lN3 zIN7HWRyzuD7}uWJ^7^~w!_kI$i7)(9`;qS5vi#)O0HY?Ke%PPL`$FH9sZ9!BI3OVY zcRno)5U|HTJCPT6b~pghzclf9-K)6JtPDNB&xACr%Vf_$%eVJR=}$|+9Q71vPF#oX z60jm{PP2l6JJVc(9v@w)Ja?8LzsI0^3z6kS`K0m2HT->^0v=xu`PXqK)&eNSM+!f# z9EE5xgTh*NG`K>4qA*%Hr>+sG>`3Gyfcow9lAbCd>!8CUd#ZTEh&5Xes3Bi<{UWFR z$Qe?YphCi{P=~YyU#e;!ND^M4qDJmG={j;@8s%O)^8Oz=-bl^32vJM59@}hKN}f+d zkOP<}O_9bZSf~agc=3bSALwVzf< z#sm^ua2C#;D11d{+S2!)KvSEu_pjj=G@K&q{noyI(K^Q?QDPwf0sh3f(U`ogB%NR1 z%m$(&Rljpsr+u=+4dVDL<%;O*z}Z}!f6EGIs=YLZk??LmW82`SSqJ&17s0K z8fE<7eK5Bgltrm?V&N)=YkmmP-nrPnsno49$~pD5-0tqK^APjntFX#tCuDtn?lskk zA)Kd*-qq1v|4=5GQdPx#4&?X^Fy)-y*6Ac{D2#)^aE-&1SpHYvk}PGz zB0LDz?e=sQWI^Y<6uS3q?Ret5gr#ZJzJDEW;-? zUvPg!vMx`EI2Y;(cbVhZh@UsCyQ!T28yt(W6>coIU0O2j;W-Z{D(p2`nI{Maj@|Aq zN*01wv^)|eiG4P#2z~nxw%YecJ0>Ecbbg{%O*FOV<^_x;G5dD^AF9qODz0eTwzvkj z1P|^6cMA|4g1ZwWI27*g?(P;`f;%L*6WpOF3U?^<)oHiAci;KjpZjmEHRl+;OFabR zG+?~33UkH7E!}h(y$zdEi|Zc^jqH$kfANKapJb|6w^_R7>Iqo$Ka=^^9(7-S0Vuy= zbi*STSsi^m<@aSXF&8<3 zqz;%8nO?Cc)ba))uP5zqy;$o5ud~n9Aq`iV>WoCUD5WXE?iR++@U6<*3VmH-NZEst zv*jpO8;4DvuGZlRE;c;wNY|$d4?k~bky@}m24CLp2f5uXu97EzK@$7XXl=(gP6IMF z>5v;T+YSLGkj`MPtvIY4bvZ6!{BO)!jcwcSKYMd;6_Y?`EyVN%xfJ+1S?&O>X`z#u z`9`IPqgll7_=SvLf-viCgzTlG7{4~KzeZ6ZC`o-Ja|ybNCSPa-FuTk||JslFJC=yI zp|4n&vK7%^j2}P*6Pl^^ogrB$)`BBkmhES(Q4rdwlim0qacZH9g&&bibN1-D*oHMF zhjcPO>CAE^WR|Shu2ECXB0*-d^Lwm}$7B%-*)jPn@l zQ^L}Cm5!JL3NN|9Cx|u$^0DnIVd8NS-acvwR}508)@K(g@B7S1mxtS-xzzxCyCJ#~ zzgY`@Cd(4rTT;8q%t(9JBWzI@_Sx2$?jy;B>M#c{9DCDo-D1SKG8MDcNz)b1Iyjyb zXk-76hFt*%mT}ytI1Fk`iIZE@NYa20mrFU~Q_A;Y+?Yi-q8RBTN#(KSoD#05Vna_Z9D;+LBtgCz=wX$}W}~5SvNAQk z|FS}ft}5}y+GD2MUBKQ+74f60bzI<&Xb}AQd3&6oj8xFalWDrb3B&zGjsd&OC#un_ zQ0$%9YCxIy4(LPYwdh-UsIU$Hsu5L25%m6}QX>AAlFyCPR4Rh|*)__HN`XxN>4)SZ zVy;-33F=`j=`h@Pvqb?_X|s7oUe)lVkGO9zAT}%U`tNJe*eaG>qvf>=!bmh9T;A}c zQ!7t4k|=Xe)#-~bnGiK6C6S7@u6(L|?xADrxqUtJMeVV+M`f5s=-!^Ui3{xk= z`Os~kTHG!mcShGXL0Q74M1%5o-po_9(QuQ)!59%-)0CdcQ|E(MoueRl@vC5KV!2=u zji49WxW_bywffMXJyrej1m(4+1T6=Et)v!Z`!Tmo;aBC}A;?|l>P2G5kYr&`{<7y} zIQlkGULR)qLr{0PD9bh!al10+q!Db?&6N1dP_!1pu5&^XJUwi@ zW|1yZ$jvYKiO&1h@L(1BYxTv`wB7>5A+r0=FU=N#It(qr zQG6`*c)V2Ix=pya4<_Wh-QUBfqIlx9yI~EFkAU4zEuS3?#eeda^3Md6q%EOcAuk7P zvYPxY?tXaY)R~4<o(YC7&rnx&DW&zj1DOn;;178 zv|0mZ#LVBLmfySwD!8JpK&mP$`jDOoW~uCy1wzzJ@*go-52UYzRqg6R6g zX}DJH9IrSj1C;d@2eu!u$7AjXC+X(Lu6n*wotiiOY^IxkD9m| zY#(8Ej&B-VZUGHK=-^%8 zH(p#;o^Bfsu9<|~J1c?9&(ub&mWqAOJrR(w#GhgNBu?6$j~+L@`ja1QDC`RDX1_Vr z!stORu=4w})#LwUFR&rD{&rQ;sPu-pcReijz_rgsjS2io@p4}J$%@^rLW>W%>zLlr z2~53tO$zTt)qwMOvuaJ@3iI=U0#*2TE>@D;icAXK;pWH=nJ7X~^i}_Sz2Znu6^vK# zlM+e$=hlX68*Wn3kFD@-ULZiJu~!U1X`;QG^V#8=<|H-!t@jz;ihy50i{_*hc&$RN z>%%f--B{DZPz~rVLRAcc&5f}}(S9#)vKkS|YB)LL5vXF^JU&m`Z&j_kj9HlTx-3Wv zD0w{Rs;qzE<4%C`wQo-8$K>M_U!gbDn^B)z_G1v?{AJSm9M@0&B}|ftm5|d2agXE5 zH3g6v$W*eSDEW4MRN$o4?wVB(p=P4EAZCH7TPSUsI*s79waD{Avyz1CgV0j~e7@DY zb;JtT^*gY*FfLFwxitncoy25IGsG%k4Lv<2W8B2+|C?qN{0A=5=F))nSU$kOENTag zO}nX~ZWkmzD{-!gnZ;!!9*GXW^0fILp_E$Tu=lV4aR2Lr!4E5_aJW}S6E{^F^VbYn ztw`&j+2yYL^3NK!+WFxJjAfX(KT_Cbo-6ze(JX1|WGJ`A8qr0WSkyZ|O9rOAl@7>H z@G0@oGZnUR$G&{^H42Q5AI!eIQja!=nqA zO-BrXz&P|=Y9+*%(UB$aIkwHb$5>vJ+EQ3bUfkp9$N6$?Ofzzvcxvgb^izK>`*&wZ z-GIxTAxxRe;jx;yA$J8HOR_moiqMJfQ<{3N5+Wovp_}MShr(G0xpDzsZ!uM0H%%0b z<}u@S^P}26m>EtHF;J@c^RI!xv4s;l`1VI*zSGNwM|oxS1b-|mNDVLU!+Zr+VshQ$ zVGh-uFzqpyKichr9HBif8vl9MW#fg&KU(p1Ddw0NM&rFtu-$8k_%k18zrj`Ba>AJe z3&1-t4QkW7o=PiFFx!W(HM1R-C>}6$`LI`Q5DmDLr7{ry##xgTTuEZFmJAilu~p*T z7iX9YH)$lOf&=oZVO?a?M*3dCf-R8wvEIayLCZr=WDKe8TQvG|eR_rd1j)=q@ILq$ zHYF@>R3vlWlB+7mxYAg`sL0O;d@T!LIG>HMZ~ys0d4kFg8_8`fUjM+f`7yE<-$oDcnQiJ zKs_8nZ|!S^Nw|fesq|N7j~3QQ`UHc1w_l%hr-MW&LWQJ-VujV_A=Tv99p_h0iS@kf z5_d^ljsEjh{ohutYKDwPwn-SV3>+z*;g2y3;^X$|O@}T&9c4NRqV)yDUf7!(>&T2i ztyE?-^}YD(G6^Gp{Y!RqoSM>}YJz5*Oj|4T5}9}@dqIBP0`@S!W-=3oi5ydA_?+#! zaNZZn=*aYL@#|vV1Zn!b@p1^s!#C4v99P75o|pq^9pMUkRrF0z8}22q`R+!h69O?> z(6yQigxnk64VHx%Cq9oyhL}hFVJXz`xRqigsxuPy!oQ;*Ay@g^?*E-knlp8-JBtgQ zB_RNV1w`XZ#!_K#A1s*Klvu;8W^=Yso-d}L=kzM^nsK@1BI>SKCBA-?gc6sD`S2NU z&S}*8Rxv*|d=7qA&&vd2rNO+AWx;4I}<;9O%>50`2?_OpGxZEJvTEL>V z?PAE_{#oK#AC?sjW!W-AO|i^n5i2ULUmL5$^8CvwF$a#l)dtIebZ&jd#>?vvXja(w z)}L$!foBo1!{;{imqN!vV#u;C^TMCsBcWWdb>pG= zU#|`2KasjUM3soumz@m(GL^1si~2L0a3jO;i6qw~_{e0T>Hf%t)xp9XPS|h+1PvGz z(dUfnm%z#^9bx?n>&gl^rChxDixBNu&JMB8a11zdddJI?RCdIl$gaycL_hpL@8rH# zzI_x@7X6U(?kCnhGL0yj?AHdz!-dt~+4vq`t}w>6McOotvLP=mg>hJ3uC{|zFwRa3L`4wiMjx@fEWIB_q$OkIa~W z*h`;Qf^&!L(%oxe3LMMNuu6QPCyc?Cxsh^YLAS|}dV~@}Cpfb7=C1?<8UroYh#3+HbpCrGcGXm=$q_K5?s#0W(?d!nw~h$2DJR@jIKfO#g;cP z`SuCUcNSc@f5L+^BYhp~a&P&S5pT1OLBVx5m5Smn%(@cq<6)CTP(g9EOM-f~PQfvs z3HLhw&Sz{TMw~&q->_pd&dgMD{n?~;n3$+ki$MmfCKN<|WOO)7x z#tu`;uy(YLkpz-Q7k0}gWd>7$p(@{r(ZPc%^zSE(PuP>lADmbcRSQd>N}Y8IlQlKA zmnB?bPd>w*dbN!)lT**2c)pRSRA5-s7S2oIr@Yso955J^p^z?`o~s?zn{-eaAi|)} z;$qhw?TaQFo)PDx=y^z1IsgrpT)n^f@hFy(w)?}DXo)%y0S7JTEu7ez#&7IkL$Y0= zp|SIlRX-vY?J=pI$k0wmO^oZ_J~2=V%7fhRPM2rHAK;<+H_2ngEXsd@-|aDvx&-WE zXFQ6jAW1l40B$D;o~8(;zWWo)7gSI9Am_ zgTL0JgLPaBF&GXyN~Udig-Cc7_=Mr@aFFm?`bB{XeFSJK_Rz2JUqsuDy$B~%1Yiru zT+zO-Pj6El#1_Lwhqm8c#XYL^cim@!t&144OOfyPFX7piLfpwR`4i zf$dgeeYPGL$2=z-m-P-pg|dT~%UeNgB1+j$GO8I?>p{sxt4n!0uFGeh=7+*NWoo4y>O5!CJ)K#cY9Hf~hL2~t9Rp?(@n7v~bGg_o@ zNu{FpXQR-AUZV%MGN>mIQy+lcZMWoZh(F|A*hmyll2&O-@)MQQb8R*`gr%~Q$rCXi zY6o2AjVty5DzUK9_7cMWlQ@e+N|qRRWB$p?|HcXce0tiwad+BA@n<7sF~cZE)8*|TPZ{`Hc|NOLzXUDnSH>S5Pp-8%mQwjFs#gSzY! z)*2-ndVZnR$CD?}S{WcbLy7Zwsa*CypNAGjER=$_<}2!qUVyT7UZUWt%tCulyidn> z-C1}+K%8kq3LUlvvb-rzO(I`GR;ZTa-~>uKWNN{bW(@InwPCXV8L!|`yfQ69U>`!) z@AI9&E`+|HqYmwN$WzH~;+w2WcFb@Rh#G?OW3e7_5O&5^#dNdXxX@c(tVQ&Nem?Ua z&K{*;JM05k?K^gm+VkjPQ9H4px`}?)8R>;pWiR0K)<+Ry$7vyq#&6d+&nU;^i%oo2 zz;+xREgq zBiThVZfqf$*dd}c^{dsY#or=}Zm3`aEIq=$P?d7b{%nq+pphk*xNOQbrx&H1mFRL6 zp|X@JF4_G$z6*(|Nv6|ZA4C4S)(4-J=QOzggEF`ir!OB zepbfBFL~18i9PnS^@bqbpcO@-e0mT$MmeO<2<&40?A*hUB}BP5>inj3{N7^%!5d++ z68Is`xb)x8n1l%|QH+>ke4tYmIUZt0BUR>8G1bWih7-_wg;8U8E1cEJFkU4=m~1ZH z`%#_)pzjnO6*@Uv2mq-ajfL&1;zzItwu%YIB$Vf2KKMD#HY8-Cr)Gm+mO{z?9!<|X zf5#l9!O$}`Z(1N^!514~%yW^@|+g zl${NlD-#?i$2FdH0&o!@{%^TbfJWF~nlICxB$Q}Y>63<3L7gO5ia-QTZ*s(O z9NSR#GtR&qo>_F1*U*Olh5bUaBhZd0kuK#A2;&Fk_$eV9yd=2^ z4e7Ywc6d6jMfEESMWqDu5l3uN?CI3BNYQ*4IU1g3b{Mo(2bDBfFcRSjaY7LG3@YGK zM^X!(f@tKDxFuj^uc*+#2*rr4IL#%mGY@-1;E19pGwF|Nx{2x8^svA^z7{64(=0avduMbzJXARbNn(`WwydP4HpsU(_!m+tGLnT>bXNsxe415n z@V~F>f2y?<6_W5CjMMW}qVXirzI0$Z&9_5qWC69iB7@2?r|}X7<~cMYTbVIa6#V`o z8dv7uZcA@!D)daar|Fet+#wwYisbcU-Z$5gd0s&Kt<%VFk3@y;e9zM$vfKo=B)Q$phrlr@k^OoC)6Ns5V7Zex+TVN|DbO;J5{kf`KCXt9^t~1pi ze%@&KvUMqD)KyzIpRcb6oXQA>#hyFjT(05u?~jm;3D|yK@WNQpnWd6`O?Kv`{QbsN zqw6XBYeZRQ;c?em%nS#u-tNG_d9b8b=W0~o(d9*DR=}AunaCKW`vudBI@*9H2IhzQ zek@Rg;g~z9KpM<}cF=?J-02K&$F~{AdNUJxazCQ_^Wke{8c3c)SS4X?!tb5Fwx;?*$9@k1)2caKwHH=PxOcAgJwm#0*9Uip|Me5)PGpQR>= zXj!~uCj_3c@EF6jbj?Y;f-L$fW2oli-2M=UT6`a|p#kGt2bM)~PCBdRmE^hm)!QXdGVc)^ zqIrDmi4w^jx<^QEsdC$l<_xoG{!ahaFCdd?6kHqSD(jW-JV{1l$o*E$CEqMfUJ)0> z7M}qK37J_L3vu`Fe9TAHFcD!p#u7rFo4!XogJ|A=W*MM+U7b7VB;KB~}(opz&ZN6)&V#op!Uu(0 z3Ap028vHExlij*?txHWWk9sZkGf~?gO~?N{D%Pn^E49WbO)czmnPHBQ?yBg&R_1dS z^k2P0b4XAKaH-3s9U&H+*%#=7$H<5si^*M(SS>#i7%y*&;XW;ZdP28QbZk>ryByP6 zm=n)T7Kc(RK_mwL?(-E8d^9?s4F6cIb^6hTdnvALq1TRtbt$w;b;q1HQy6e0SAB3;e~_$MOo2F zN#li;^RIw~GA6-tuw5QPz8a-}R3r?QhMdbq>+VFr*81xKdLs1dkZ%s25OVzY<0|&3Fb)rP zx>HscEOwidYb%|R9rx*aq&K(O;1+tvzf|>zfU9AaU2ReCJGmAP3hg1E#<^>aIgyh@ zK2GR>=_=2MW7&pZS;@y8{fY4u!8nH7t>H4z1`*+cm5L(HyypCa!R&7?!)x&FUo7*q>SeQKCC~P69%$F zDyY4;@qEj399MP^;m+9f8aKy57yH8<`z<7?%{mzm_D|SKLo(3BEL8H6*ImRyFuMNx zWcGgX)w&Oi#QlE$fbtGDwd;70AJ^wHOX&Wv@yZ#!yd8fKRZ+6POr0otN`v6og%R)b zZgJS~T;7$m(TuU`i@j@x(3*+di2I`?GeV@S*GcbT_YPWTF+fM45|UR{(+kjl8nWAh z=x*$B`5!xA`qMWUTpWGXEL%;CJ%Ko4q+4;xGBz223+yC>U0EP2bMoaks;%&c_-XjY zY@=T3h7W7FJCL@ZNZv zKV^n41RN*cw(W5x=}O;p?JNrVXfBqT$c~qNQ$vcf*=&Rv>wE@K{|Hbu_zgoJX~(`ywuPu>8&x+Z<6vsGL?dU zA{f2le4x%?r;^#?oLgum@BU)k?}6+l=4P8@i@W^!s)N^hq45J%=>pWnaJ)0^-Q8+Z z{-Y}#;2p^8&MTuIDyC2_kdV!e$1zxx5?!hEZSL#Z!Jkzde{=dNH%_({iEOtyOLt01 z2y4>28)MBvMT`bslecnx6j8i8xle+t5M0-7^~vRrHUoZiNVw1-lH*sz$E45I@-50oPx`3 zRl{FOYDvR#^IR3^8tQfx6(Pog{Pd^hlLI`gc8|eah0X99L%Gd0w;UtMw^Y(yY?**0 zK&qD^TQwyTS=T~$Qvgn#NT(DRpC%nk{D1G(Bd$Y` zCu%iV2zA)R)x@*<1wTc}*Wymy50ccB1j&cY&LPd1Rur3_!s&Iy)f8ajByD#5?d-TEC(fWFL3)SvCanLGfJwQSoQ1J=o@1+wAm z&*7MLYk-5q^)88O=lxfFHW8Bi?E=&p3=pOJ0aO5P#ITF8NIA8=Fp@5}CB>;f?!&%V)u48$7R%#qc(2KC@9D z2!bye4{H(+eC$+AJR^PcPNW)Ur!B#ge*vg@YEDN~>xrMLjZzAovrLf|jFE~< z32KWmW}^zoSu?}6F-V9tISe&A)k&YmQeimfzH_U2<4D6Z{fLaKD?;xqY_foHm2S%+ zUA}E*S^b9;bX3><411fZcH4L4^sA+)NJ2QZd1MR@M+C$FMSI~Ol5wrjuK5cRJ15c8<#6=6UV8( zh28O^|L~?&LkjdZ@+~$$>x6;S&w=c|tCqp3h(Mt0%rAn5MAQ>W+ay1J3E<6~H$x#b znt9^5p5?OrA_i7lMo8V4qL*|NK8`RG#&Dv(_@4LV!%*ej{B1}7)B{ZY<@28lI0|;; z{QYf5;h{bV?qPw}8y15mScNGasjKo5j4NCALJqT ze#acdT5!WB`ao-QPb;?UWVqcMAw|i7A4j}}bkUPR#U1?G83!;L`~6aV=Ig-KU`DW& zEl99#Ng7_4w9x1?iQnyxf9Er!?CZ1z@qC+I)e-g){+W;)lpZt$Rqo-6W(j?AoXUzO zFsC=aJEfkzeo~Nauhec{+&9G<$!NQl12rv4XFPw=Ve7G7HA%;KxTA8?>~EKorrp`d z4c_%Gxiwzw@K*7)VJiSOZ%@C)P#ca?mfR_1{8$PQf4@xG!)(?R*rPr!jiJeqS1nPx^qi*hmRCL(FM5zK?Mspx zr8^)zj(PtEgDv|A9t#6e>O^eDEmaF?GsFzD@NT|uBQhX&x_-MRnx+Jym1Hsz*K}29 zaum8609L2oywZAOY$J|vigSmrM+quDLZd;9>Me};JoN^UEfX}O@f=>v=+Y#Os>4wO zVFi)P@!YIZ1(G}BvtSmWas^GXkL%OS9Y zxQK;n1v5amc6917I4Krj!q@WGMv2?zklzA1z@_mhpTL!v{@~F2Fpw2gct$1}ID?MQ z_VbLAXF-7e+D`pz1-wHpwVb6vBuMzrsO)ysv5qP_SBf52?2NO^Fdr z)Z9M$V58**F3zs{(_G|swtg=OyYwv1Oi4<8dy}+9==q5S#vMnR=rw62n;S+WUKpu< z6#Zm(Ish$P>4$GA%*f6(QEV@vQ9V#wx>MU*PuoF;i!C|_oz~~WA4*Wc)FsYZ=Hl*} z6WYQENO}*HVxSM6BV@1|3pPtXlpO@8Pecb#BDBoFHBpb&#|(CYmPoz1 z0;KwuvEnzOyGK>TL7V$XCH_VPy_r0?7h2@8XE$JM74n21%~tz!RpwU%ei@AcBy(B@ zN)^G%Ue9WPd=6y$A*^8ATgpWhvT!9lWRr=NkcR4?4EKt4;`@)ghkFz=*lC}gK2U_- zt40+1zrdXCG_TWP^_QzYmpF{0*!}t#SWovsdWfeFK35;-s$QmW)(*({hP3wfW!wWR zy#kCta3n>bQxJcYoeRWl-AARIIDZjo*tqN{CfQe(y1_XbpD;=C&8MfRFqh5Q*b&9k z{4`4c=qPYXs-9ct-I}w1B2INu>Ud#}`Vm>HbiNQX$PT(n3FtbM9b`~Xn)K$1d2j{S9M+a-h#PJv1R;@bcIvWU_1WNS5-IY zEQM}=BHHv3a41`&`-ONa0#ouNv7qD(^p0`mEZOMuB3@HX8hw|-)aY;x@D;E`OQ-Nh zIL`ONKPsDisd#%Sq00FLF+g$E;1#sBuubZoTSE+L@`wbd(CzNfljtk`h>8D zo2U`Kx+!P68w_g;GAWPv zkdRKJ2}<^JT(HNEK@F+sCk44}BCCaOE92YR&0-`=a1SDpbwxvs`%O0jg!g}zzIp$f zE7w6~@gu&IM1mnQggHIDxg#CHV>kP^BY&{vGh&CYCJyDxCZZxHDOo9MRONN|utS6K z0bo6a`qBHQzw<=STOI|96xI$`2tVRyz#?EeaI2%^J2*ZQ!3}R2KghTB%a)NR4X8Ef zr5I12G1S}(p+o>7+6F)yQpg*w?eWFBght$d@9C2QK%F%L`|zDK>`O32nDY$|E&8dv zn^Li75lHXooe0#S8g;>#ETXOTp|8AYHnkAu!0#bcN+mL=7*Jcwy1w-L#St{NM)|LY z3yk7pdVO}|G5$T@WtKptkjN`KZ|NW9`hh}Lv0Ufwk0hp8b#0!ero5NdxR-+^;Ps-k z&AsHRkj8u#>HE~3P>O_NV0UqdT;K8=eS>g>-FNqXqlVlkkx9rivkn_cQ8S_Abb<0G zFs(gAnaSd|{Xo~YXEjwD4ZF4K$S1lNcCN(qKFbvcDQ zwKCyRR2N&c53kNd$o@k`R5sr-w)1#e^`_*S%`0qeB8@$39J5jB*;mcd7A-kr1cxsQUyWi%K``QkM+A^dA zNsS`=R*L4^hGdsYj%?412c;yZi-@{fRV)_l+K1gtk|2gNJT2zaF0SKH>a8$-HF zKGq7P2C}@RB7l6{Jn=K$g9Vb3WgrW1IG+A;FL0pfG;4Ps#$rGN8LQrS*PVcVwt&tB# zr(*|fUYk+ExqkhR4q|%`gD@>Zzcq&rv?>xuIEPO3b3`k%p~_Wj;S1skYYcvy0{ywd zZK?lxvRu>T6{xjZOB;3yHJtyt`ThjeVLSAVB|#qgU4kaGGBt=rI)wF(n4q4w{Y4ZV z?8lS1XQlWPC*g0sDpw+{S%+5g`|2%P!=wRiYQYDwFQX8R!n}qtDasf{$}k=7uZ!+`R-C(?a^{M{*uAz{3S_`*1}Pw4jUDl z@h9SA4BOx$ZDF?SRcqjS??e!f|IkQjS%*dHpIo*TeZXY&0!-1x~>vmm-uMR9jlZ)$JKd=?Xf z+1ZnNkXa*mFWq23f}dm%yYNYpW?yFg9%JQt*1WQJ*S%%KSxE1q6V?sumAp29pQ8Qg zYYP@d{5ce>>B=q+q6kQsdN7Qs;SE_EEU= z+;BHW^25tHTpQe=Z_QCZzvaw*7i0)? zv6VyX+@0veW^Au4_N6n^UN!WtY(|Jh`}-{l3oWx^l5r>+bDaMx&Kv8d1VjN*bv~u@ zR_*mbFTX-5yCUCX`1;aG$C8Wth|61m$a3F~+5yTVy?RuY^4Ne6NOb$5t5Q#ruQ3kO z9SzXd!_}rUcX6PPe&JJ?Tn|BbJ~*U~$3NL?hWnMq`6sYX9<;m~55lT2YUZQyw0WpIi`8fb_;$eq%oamHLr|wQN2X76qz(`QbsJAa1{Hg&(l-=kqA_=C5?}rog;;udqe*&xBGdyw6?TM$OP16li%qKRaC^Blf0}=YvyUu# zMDw~-f6Pn^?2ai#_Pl*dNsSVbc04zqtmyj?o2@c{BE~M76qx`6w6iY=-uIPWDUY%P z`B?BY7Zm!%2!kXa2u4AuE*R5JXIh53Ou$1stYd3^=ldi!=ZzZu92NoOZE7E)o3(r} zcgLFBT7~%AehK0Gw-~zhq=Y-G1%Ldj41gHo zvba#z$V}(Tk9Jvec?$iKJUNn5{6pbJ{}j%e5=_TQYW9xNlcMfMV}&G#LEw4QL~Y#*3X++I{tI3I^K}7 zQQzOmOYC{U@!lpLJbP^$DBbU(d8USoe=a(~+$Z6ATK?`lI!Trp2B_V#BOU4X%m(E= zfdKlUjOzjz|73SM2Oq>TVH*%n()9#r%x(VCqbLrpPO5u z+*~P(x%%@jqiE$11Yi6p!|G25=B#Owd8LZ4wg^;!*KM z0+wgH6*-tz1{t?k+q=A?CBn5eG98wh5rJe^RW1+A9!&|HpBya$9&6Yz)s?kHPWD}u z4*5frhm$```Ss|yg5qQu#^Dl>*OXQ zmI#Lw7!L8)7(gLl#@@Oz7iF6f`cXiZ0HaD8tN{Z&WK2OlX?&j4lGONg1T z+aoDdwu|4%d@tF($A^MJ5mRTH(qKFJK_j66)%Q`rJ^o`%cBAi#T!U#$s&(2_7@!VioBo`(21mT?ocPURR z;1y``j(e0IQeMB^McD3(^3YHwg>~ehr~&4LR0@Q#L{#GX#Pgbi|<+#+JI;8DZCR&i~F2s=4U#_@caXW zZh-+0cT$H!wu&tVHk(UChgh#1t_peQ@Sfk?9A3Bdqn0A=bJ3+uC9k&^tmlj#Se=ySyz!xZ_j$_*UXhld zoC|4u-f>?nUxB(ZhN9umbVIuE2Dav+pBr)wIbFr?qzR(FpgCob9v~j`6djzlUWcrk z=_+R+$0w8JNn;rx&L^2O96O-bRaqLAohQXP+7HjZ?P(nF1lZ9H-*K~vXW#unxA`SZ zk$i>kB5@yM&n#s;0FOE)S2W5|wnLdmg;)pMLQrUZO&-Vd2kh3|#TFXP*sjJ1D91xN z=n!>2=Dv8-fZg)lk^-VTSBy#A>2c0Tp&`cW+ZaA7>ky$%u*lnH9syr`ni&xk7_aT& zER0i*yF)Z=0wdmIvM_WE(el&g25oo)J^#w}ti|Tn3^n9&{+{h=^p825Q!<>`RZV}1 zv^ce8#Eo2BAlT4PQ z*FUE-X36~nu^1Zo0IK+}Z0|!GR8`v@4>^fsCyQ)|f7S~J$SSLJqGw@DTpcDwm|n&1 zuJHJvbRxf@OshVd4z)0Ki-5ied-IcBt|@T`ujadAU4qdcefPfD<#Hrox>NU+NUAB$ z_Lco619CwPhZTK4k5Jnp&N6hbmnu;lNNGqa|g zBeuYmxvzvet+%oTkC`HA6)ZFs$O{2O8ihwyt--#AHHg|3S{7Jbaami2;D{vUxwnK*QCRZb5JdBPu_r2~ z|BR2hUi}+}JerLg`10ElZ{_ku`HG^>km-hL6Kd_oLDF98k_+~)j=xrSw-(N)Y7^=K ze?z=mlP@%`4Mp^$+OX>P9#SrkgXKJJc4@i?XZUm;a&B&WG#?aVYUZJWK$Tx-%Y^ZN zb8cjEyr29RKKkk?gvn1)bOw z(>jqJmh8hZH}U;>uAtpCW;PknUYl$Vui#(j1GxursA!h)r3YrBuXp#>?TdliTMyNx zU{&{3!@{e|=fqeiMb!g9$D)Kq79Ui+$!V1wl_+C3?3xK-lB}y1)is@LzX06y z{tN`9Tm1wM)9j@lf~Y5C6V&L;`D2 z>;@g%M@4FLv>d~a(x|{~J{+2iFJObaNF;4O0-MVuqj5LqOXD#f}R;Xo#n|_=QP+V%&EwxF&xhMA*<4bD%#!dkH{w>1mcdbcn> zRpZSZb*{Abdu=H2C+u>3q(++&p5V18SfV?zmqK1|iTRIK+&t9F{pM4iMj{(kv90j3 z0vXrNwxw!F|F$3ea;KMu=w^3?%mX9)A>J-eQAXcyV*LlS@#TZ5?ZIbIX2NOHHEv_Q z&l7;XNEk4^Aydhc?Mnpc6R6-GFM$~3E!+k9n4LO0ujNhUG`wK-4b_cM9IQT zP5rhVhz=O*{xv3&G<$f0d@t6D_|$bZ^oJ`;>^YF`_=RTtAA)_8R=Mq&2b$j^d`1>sp?;r5d}+sP$antQM$k-Ts0UiOLaJoD%M^p$j~V?PT|QSg!yX@Fr2 zbcyy(xRxgT9Ch!E)1vF%JL${Z!WXLbj_z%_w9B;$R3{KIUiP9`I8<=MhuEbJrOq7a z@{Cvt-2KbTFX?tO3T@>*QLzazH%ib>^Y~6QC2{1T_Q2Rv<+z#4^#y_msebD$e>(Fs zgdDFj<(w~%yVbU9_h{Z1Zb)Q>3Ev4Rbp3LXQ`Y^ro+?cesh-dMevPaFVgdg0O|8f; zadq#IN>S%L=sjRvm7A6mLvM!l6(I?IzL`fF(@VC`D`fgUbIN~=dK~z{-%-flS$Kp_ z>2GPXW%5hNJ*8A6_UEsmC^&m5A@HJ>9Vi@0Z2#06b`v8xla6$IPc@kV#L!kY9w1PE zc^>SKro)NWWB!ilnHKLJ5RHja&v*!|uk*P++3%3=sY{(g&tgRgdF>HQx zHi11m!$sO6@rI#-69t4lDjllMRVpD}kn|V)!O-JVYy1p&)I+BJ?DMC&+|$2GD9~QzYSN~sAhS(^h=jD z=5Fu+vitpe!$)BMd7J#%`_ch@CZhx(m<)S6D12Wuy8eKkStP$S76b2u5(CEM~~?`U$p@V5dy$;n3MAP1g< zh%w(>E~)64rMX9sqw&V8f*bf}mO!MuNx+(VQF~XAn9=7VloM-CDY$!uG~B)X^93L| zcN@Ceol3JBR3`B#b_CBt^R{O>%|NUzyWtdL;XKsp)qi8|%-Pg+vk;lds-_#F=(PH_ zaIk|O+P_n+Coi_z%`{g{Pz)?{^wFc+ho0v!VqPd2PBhf)XtlU?^}jO$o0w=RbY$5 zCrM0KNgRG&Y|#6(yu=O2EwLxy9;e=CN6tlA7-dXJ3?pWYGFX!-rh|eIuzvFocsg8L zK}A@(zro^wo*P8Qb(7rK=y0W*^64N)?cH(ZoGOZd&abNfrt9`4(4O@BzcU*8lLU3)5|EUII0b$y#Gt1H^MeY8F| zn)!!Rbp~JosdRKj1xJlp2{_4ldadipUzy=%IApgr2kG0P1)w#E4I<4v%g|*zFWBbA zvu=}B&h!k&e{a)J-Q7Jhoww;qp8*G0X<8)Ic4QkzS6-9fTaat{}7HUDr(`a2-VA|Kr6A@Swc(mmj*u(LyWA zMdAWn`e78&Vz>~oM~|h)5yaVOwJD_>GtJnS<_5wf4M?|Cb8N_NlLd2jV;?C&wtNBM z1od&JZL$HnFVySEdD=3{dgt)3KG2ud?$?9xD0l3YMa>d^Anxtp_@w zz$b2dLGCL<)BLz>3xrLh9GFv_xDc&TGSRf$MvTl&fr%S4P@Pgw-wnCE&=p1lyWmSZ zOb&1yq0fp2?vatux(#0WM~T{_N)79uy68Lv!yK5b9r^pyLzZEJ(_LrEg`>ABD~2#1d?s#((bkGgKF zeh$4sRNlsAo)%mRw@oew6H9V2kdG*r4gjVJ`ZlkQIrE{{^PgRD-a)Z&$w@p43=hm^ z#2-yaYfQbqRzTZW?u0dG%}6#!$p4 z0cCSs&*-M%k2nWdi#^%z$Wn={%kx1ktFpICc@shh5W}lVBN(3z-Op%o>=s$-01hB- zZ_-345E_=#qY4v6;%`L4#5Uw=qXbdQHgB$aXtl(Bh*vT`zT2;Q`qfVVBmomY_*Sdu z__DZ-MT?I=ktBBe#wuV(F^Ds3sD5@!_cyx$+mJ#6$kDf3?zLU@Qc!kfO+WE(n?iEB zs8rgjkt?Jto_e5Wa zPKM4}`#s(G1h&CCy49C-^RJj61ozlJ#O3)g*Lc^!V1@0kv+hMf* z>F0c{UMp`)+t&nZeJ=%FG8{$g(`$mXBFd+fWu7M0CO}J7d-|Sqx1-{O%Y|9~vo{I^ zLP%YPBp(tECLbJlx)Z8~o~L+az^3tc?mzU*v+-e8yxK{Cl5h!DZO-bcp0{%KYbOJg zzuoPnSQny=Q#Zk5RyHDz*!rzfFc-QeQ1^pldZGvU)EJT{20S2S4c-O@HwrOi!$P3eUl)~ zNm!o@LRw+qiZYHQC*S4xJQo*=GBo?5w@(=SdPjI5@)= z%EMA{Q@vQ_I7&%PWB&7icvaIA8ywb%#c(*ylGLg-A^rmMY>tr7XRZoBoipi!$5_}kWZsCJSziAGm2lxh5 ztF^J<&7av2_nM%#7rv>t-Wy_M*1+t=I3``p$(gyqK6|^{ra>KUo(bhmHo$5{7Nqp^ zz?&C;{zG_jx;BfDms-Wt29YKhF8+Jd@{i{BdoJi`eZrfs6G-ApD`}H^cBrymmSqsL zML0G&dZs_}TCD;((;)S{=lo~L(28RTW)CAdn`CPLuBlO9Vd%w8wMn) zdimfH1M`1vJWaA}CphrM?N?LgzrcfB;bX()1+4$teRzY>dFBPNHOTn@3aZvcHDelk z7Vm0==>Kc`G4vg93YK|$)8?M(^~xz@cOt=l6|gt8MdM47hIdO+OUaKByr}{$uNdwv zS0j1vxbQCwye<7#SsW!LWpmy8M6JmCV5;MY&}c-2Y+tQC;_*WvE#zA9#}3y^Vw%wM zZrsjME^mVC5gLm--HXZS6tPwqR27&7*Y!W|8p}ED^?lLqM0{G7g+`+L`f1WW+xrI8 zb92hs^r!JvK3jVQ z7+9~S#854Ic#*f&H!{c_x4mr~$p8Gg-|c*Lva?feZn%H6C0%-ceLh(`OY|OYTl7AT zc-Jn7s`=3z%L*+=TF^!rCzk#3j6s`Xl(JCI1sA#50?w)+#+#@6%m$}m@ib)apyMD{ zZh-^787hGD znWD401p&WPa*qKtz!6UOdnQ8GMhMV9&LshB)H^k%LzsP6A?+joik`k3dh9at*AHF2ALE^44Njjgs*+sPRozPvz01^q@~bN5sD5?U zUAv*nIb1k${TKi&P9Yi($-Z^^@=cDp*IjvA*N zcGLeg+KN|TR^Xeaj9^TajPlx5l#jV3*p0E-o&3%agSDlrW-ByBs_6Xsi|;oF&^tV8t<-yJ?vnDts>q$v%fM!)Tfx%JGr02 z1Ry+=6-sFVOd*uv?z`S(X**yPYet%gIRGwHWHY)Oh^YkC*^GuFpzIyIk;+nw99JE4 z#lIpbljqKmb1|JFKqiz1@jeKLNy+W7Xt1X?TO8PfJ)ZV%s1$ObA1@m5kz!Mw9X9j& z`%j4ZF?u=V1qBpLyvWt~Vh?A7j7?e!zt42_{9!C6CfSB?LUr8C^c~HIIdc)u(?Mg( za3>CjAD1&<2+?v}iIi!tojUk)+=HHrgkx?|B^g{-rU&p#x>j71*uRRCC&-k257qgn zYF<)MLCjL~KpXi8?mzdxUPQZIysvXY!l{%LVFvflJ4QiA(~jBBNVCptM}bYPLWZh^ z8lUKs<`$j=5#R`STTYnpqW!)S>Lo zsmkl&OxIckiH=lNDFQLLakhZU9X8Rqt6=m-K_5}@a(``KbCLZv#`8H+nT#7|vI6-t z6qv?Nf~D(%Q#=0QA}69;H{SG}V=r>gYL_%gMnA3Gs(W{~fq65E=;PvWf!_GRPFdOn zpBZ*Nr8m*(^=})t6&=U8QPt3ICg1C|`MT=O=LLPTAwi1qw%MiwHeHH%2#vI}NzRw( z<<7&`%kEW9NBA!Kr@#Y+DDbFk>IWCGfX%P*WrO6EG_y)Ye-xWy%)c|w+{RXksJgv# zUIhy52r|6I#hMi|wn+=;I^qG-WA$EhBv2GUz(1;W&qplPx?HFm*nbWmKA6S#m49;^ z5EysrdoGzCLVBEu83wk$-W2IfaxH3gkvJWu3C}`_(F^F`80(O@%{DaN>y$vlTg6^N zu&w2Y1caZMGv9fE9&bYZ3t4sxvy62vvbFa7)eOeme95kl=c>$LB>ubnRidT!%fU)l zPo!7T50EO)dsW!SM|4r2E$`B{J&|WuAI$R@UUeRC51a`$H%4eXpN)?Dc6q6V7;g)V zK@UZr#{Zsqcx<5mfcs{Gr`H>^1^W}oYLrQ+wyLRNpJZc@`DvJ_CV(q@Qz589MRe=N z=PBwB)gYLuEicw5az4RC)QF>&041Hc3g+j&8lF3w0`kwkcp62@?*=6!Kca){@<+t# zSeJfbO4pZRMzJ3k9d`{mF70@QZ&~loVq}Lu$|L}D_x03-wc!Y{G;q;Wb*UhG&Ua*HRg<}Es3cPtD<_)cwgNG$FS^~r@0(~ zqyC&(qi5lnpqtB)Bf6~cUn|AcE!E`OnMDL`2@a{^D^OSLK0tnSP!{qclcXd*Wy0@yWu z=+4qUj*(tR0PWw$Nk0^`RoTJh{`#IX2`5qyx-i#y)}Blfvv7h!+|0Xi_Nd$#N~;KO zyhJWPN|`3g7tyMh<=9N=yOhf8<`)`IsTyGT+sxS+|eSxUSA>YgK7I=x9wGfsZG_iLvN|6&Z~&}^^qRKmG0$6o8YQz->6 zYIp@Wl0QGpxEzIP^>f**p+30(=B$HrN_KubgjOKUq=`}C6B+3J@9pjHQN5-&B`;yD zzXzlUX?qTzbxqc)N;2A6J}y2_l%?7{6la)OW@0dVR+}KbML!yYsHD7*7bLzku!Z2a zu2NpAl_p_K?hYT1ByDf4o>WsKOLfX7mjM1-)ZH?qDpjDi5Z1zdQ5_Bb5kq|~P0)hF zvB&A261Cx^e&EjcrRge1Iz>Iwb&xX*{-oM}UOIG^?)KTh{lSuPu^|xLYeZFdw%>O* z{*V~AC+Nb^`jW)BcetkN!3!dN8?AFX9Ike@&@-0ndb>N$yYFi}wEKjz&-El=67q;s zAN9!2KPHSyVNU7qx`_wfi33guTMEy9ADdI5iWCT;2_`X932oVNO$yz#%7CM{JfYqn zytc{YM)ipHg&W>6Xod8DonC1~^GKYd@xae8*A1F=E;sS4x7SHOu8Vvy6F5E1s(jcR ztLA_xr6Ah!^V8rYY=Ky@d}W_$pdl9IZMX5V&oS+3p19P4fDl%B#31Oq;a!MfNV81I36@-rR5bjtk9_I$@ zGTQY4#z#FJ7b<;zzU*zDjo6?@ZgV~=fn}2(K7&Pi*3cG79iz4BpnL?mA4TLP89=F( z?2W0P{&|JTw8Sc2s!G+qXNi=imH!J1m8ur~-yrbWK(9YlO*(F~MnkyCgqby;@b1rd z8e=nmL{-csqWPjUYO|??S^)s0YJ!R&_CD7my~B)aC083R1!s2P;@fq^9^bhC3<+X5 zLAlG!BgP<9V7q7a?0rT41dV;3ROi)j*Ne@+BYp9o;z-3rwxN{MBE64Xp8B&yEsy4TIR?XPz^ESe(A=d$i%{DDo!HeZj%T$K@N zV@?Yn_b)SxJBw$xb{eNrcbm!4rkN?z9y4oOb{aYIm-AgZ4P5Zxg3_ew_9syO_X)JN z8puA^*WpFD!)TBs53+daU5PCoMz(z4f<;Ji6_S*=lX zqdr=zH`@xurS=gyi21b7y4E}*g97cXsHe-%p|Vyu$6qd;fJ{dz|3!NN<&quhR`xf_ zRdyTF^i|}&G6u4D>rd~3F{yLGe?KES4}5}U<0z$V*hC{-79Dvkm_xXZt-A}9igo0w zVy@L$EiBo11a!lw@&MTm$Per>m@)Dt8r}FRRmSKkRuI}gnb*7N7}Yi+^Hv!+{o`n9 z?CueKjmCj>IlPy>Y8L3hk9+gK^i~^RanX2TuQa-ox!TdEN2+v>0%f}(oAUJ%Y-~wd z6bf)}!is2`fb#A>lq<*p&kOJ{Pua|V9UXRy=EkEvXJeZQgns%sqR_31ycw;Xkn`T*tu$wUE=OS-_Z(5F+;@k(sE35yBHZ8m z3}|=A^h}b$9)q8PHv(|{;Y$%+coo5}@Teod1O;#UtUI2}3_%>d!lxHni%|Zpo0a1Z zPUK~%os7*i$&IojS>?arUFIV`8v~ZxL2qIDHS`y&ZqQ z2k;YbQS!SD4@yng69c_19fvAoL~Y4w z+*yid+pG4na|68n<|yQ+)glF!g1nWt5uozBp=cUo{9MVFqbhrgF{&DPbi2ogVzi>l z81)-m^^NP@89~{%=Ii7<_+8p)ddOS| zE}mS3_>iFH`Q0U!x0s}PQ;!R4Ax)q`*y&5&VDB0KG$T+;X7}xHs4=4QUk6QA97$L8 zWE{&Pa|AvYf?N4BzGa?ZS%l{6rBVfG(A>KiJtukVW2a)Y>+KIPp$$V9-{ZH!YclWu zjWzBwgqYkw0ZBDcrPvvh&(flwfuQC}Y}126>)3`ASzIAkwMwks6p~t@lJ?jAKM;&N zXNEz8<-%Ig2U}^L|Ds23v7KNzGQ!%@nax&V=E6tyV?INVEfS+iCl6N)Luh*Vs^v3V zD758Rv5cv^s5}|i$q`*G$hS6>k7Pt+qHjEoDmrQ!UW`2vcN|zC6d~X z3nxU2U~>Q-HBG3SDA;Q!Tp=c^$uDON*nC*BzG6iG4oJ?4D&De$Eue5k%XLYrR@oib z^*7)2I_VQvde*qM z>KM~DCEaj@m4$J*qW<__>ri@?a!zv!qO^qgU^O1f>=*#V^(ei>nttTBvoYLw}*QyMNH&`V+VdrHYOM zJd&6Iz!>3NQ7<`L-g%^5HJGtb&idY2J?i7>o^iNPa-)oDC!-y%zMM>uQ3(Qa9L6qm ziT600bIP6=B3lmUNd#17r?vm)_3$&CT(f8>XM~MNh31%VCC8D1KP^P3`)AO{KygA} zn?GHDn6lJVL1x(CJn|S(TCGCfG+t`AI*tx_9CmGglgIMXYBBLBG>ZJKE9SB~jw*Q?(u!EGPBeac&F5#~ zGNsDmSI55;ly^g}uv!2u2F-bXGsst6i|&R|Lk6fH?jzr6lUgFqnDLL#d!Z~H1Q;w3 zQl3PK0NgzO<%)VNPzn8iE}M?u+f839&(&xZT_E;eE)08qB>TFBB7R=*?gf^qs+4G( zE2Aeg(p!UA(p%r`}qw-9h#jD3sTA3LC*-plF?%o&PI{M;^ zbAad+#&Au3%@A48%8=J)I-4*D@IP5LsMbB3eWKQ0VHl|SnGc1?AT@RIqGY>8Y0m7{ z@K(E{xiNv8>j2};er^x&hN_m(v-en$I&zy(c6}y=zRIo---YIJY)@p%V4TP7twvOe zzb44rxz9#a07RKdE{1N4Ff$s71FU68MZd6Xi$r#PS#c}MYyX#bL3T#Wph6l`MlT)+ z1779IQfbUzveeoHw|`Y_BvPWrxE-@j2%o3#jN-{^+=0ciO*#?H(juUUah?qeqU6l6 z_Af2cUJP{gv4x!Uk-unwE5m{3Kl*>U@G%TsF%E$jj%9VX^L@U#U}+^Rco7{xXo(nO zyD5q!+9sJ$Eg0zulBD%fqQlDz{YXu9%X2DJ|AJ%atJguIVn9((&L`?tyV-D%rIh*) z%6b5i*5&Jkf~c-pBPl`s;{wsiqAnT8Vr1?V?zD(1yM69xX^{K6AW`Updylv?b39<= zqmi73GG%mf;hWxb7Jw1r4}B$Yi(seGaoC|1yd`%;DTLMrQ0yw8JtC=aW60EJ=y#1A6ge~iK{)I}gI8HWd(5fEyNrWww;!tWZ+#kLxqAmChEa-XOmpixdwz zoS$6jVR<2Lu7<;aXuuoTz1LIU(|?Orp2?giEy^_$5dNkP*I6{>b@d2|m{68W`jKD; zaK-(B3dZA&5f4>FVT=ku^geM_tBGT_B41@q_+PL=I;wxS{{r;Ibm~l*uO-fh8eabO z?Kx3-Li>*SU=XH69gvt8)AxH*rNg>rv}e!=0PLQ~>OOgC(3h4c9+e1C>2{`9?igay z`*jdeW*E07aDBgJ?Qs@B=HYeT<;SjK8O(8*JkX`E8+eLcT98$eXEre~Hah}0=GMy5 zVHGl~VeQogl;d4*;#C3{Ue)S90^e)!rUmw9tf_52Yfd^kpbGT^MhV?4PI9LBwQn^& z_mYaHdg-X%2%n;6T)#j8aRT(BTQnM8_Drn>Vu4N4w|9d4#!Cz3B0poq2lrb@wZ4sj z()4q@_q_VBh!^<4G&F^xt-P4SgVBs%Iym)JIu2x)Q4l(st2g^qW`TOP&~W$Luqn)( zKJ4k7u9erC^mgn9!{I8hgEs~hZy9aLjU*-p?P?Wu$>EJB?!#+r`WOr!U$!wZ9MR%7 zf=o1hk2l}s5?dYvMx95YIyEHSO%HYlHrRYje{^|WiPlN?rS4%jFwuKC1{$-KdWz}f z%LZM71-_);tZ+laeA|j^gr}@zYSrZW4f&r=xScS7c&6~j9E^QwkWbdg>hrI zM-sPv6_P@Yv{0*chpj(kNO_I)amH-Esi$>&QmJ~hh!)UXdBs2!61X`m!&|xjXDnOz zb5cn;xD?>7H*HG|YhAMWtjBS)Hze>)+3GbL0gK_Ch(mk*t7XEN4K2y#FjK=s<6ARq zjXXR{bAj`^GeI-*o)U^dIQN#{oK?9|Qx~IHG7TDW0-_cx_;5gf(t0M4rdTON7$5}`tnlj=# z9{!??$f(}`(PkwmmzlX$Ni2Bw?lDY&N%;$$Y#KiM=~LcBC%2n>`LD0x$KQu4sYJ9_ zFDreW3Ha0d`MrQ27X3|^YpJMKAE-}~%V3SD9vh6JqVA*)n{W`AWO2)OA>Q3DsR8Ee z8`DFOh02-t1~$`)RJ~54n$8=s@lDc179{|RzleP2qEl+g;~FQrl?1yRG=tt7`mR1r zU)5FB9?4W%@*}?aQjywABgwjAzO9h|e!XtqFaCgQ(@qwt71HTu6F=KY+Du|n!#C@c zzRbIV;kEWE$(;7^(EZ~HA5*O<-jyP;uS0NixqNhp;C7=OBg?C)F{#&Ii&W4}Krg_F z_=?Twww!vg`bTYhQb3>2e=s5c4~QY(hoY2Z?P`@Pi-nP(6%Vlx(4+51ZT&Nf{)G?7Zd5Cu8PURACCZYcP3jntEWl0T zbCapge4)bWIY0S9jd6YrZmb201+YFw@HLj0`+L1gqLhcmERY5L_>Z@<#WP_N&#HDX z#WBidlI!$=qm=STGPfP05wSNqG3gN-%WNK5a$Rc*V+)>Xrj6XXmp=N5v~0a)%wHud4nR?8!|c0e-R0n9ac4H zne1b8s$X>s2gVH!U*2jM5B;k-osA>(Hy5a0hK)B-n{cHDC~ZDsT_XrTqZjRxPgjsb z*^A%0Vl-(CwyT>h7s=L@Q5-&cu(4KDn6-)cL46~)0T1rAih6QjV+=do<^Jb(@|@6Z z1y)^67XPh*$g0EGZp9+}QcXc_$+R<>W)`U1!H2Bh1S zW=+LNS`JTy{z82`bzV!>+&BgS&?;7kb}I_mwfkoEj(*!@h1vzVPMiA;wPV?AdG)ys zHi8LFM}3w?>z%<7+>s_MXk+H9tOYE|YgDrJ*8lmlKfA7GT}klHj{78Bmzy7jvFW^3 z>=`UT2dWy*n1&wx4F|$*ZHS5!&ww z{Oc@e>!Z@KZAQB6M$RZR?9;RwaJ3M`4tID}p8dYvJ2Je_;=dPE9De=9%sKDO*$iY4 zbHhDO6|yj?eIugzsIKLxE%ItIFI0g^a#Is0dj1@RO1(&0@7W5Pg1}|GxgAjGelf_y z66eMPWBa@R+NxV;wk~@PU9}igG*~v{<`PBXiT@|=6RPl7V~}YsZ`ByA{F6b9r8Rh3v^|&$5B!goSxHaaiVfFepHr! ziPM8dq!_cE<_^6>Y@(od(hlep$|tl#)**i{YUo_RnR0pGvqy4X=|&>?YRGz5^@E-d zS=p0mgk?A7G)DiqQ?!$XiKP<|<)*9kKP(0_9~PZZq{-~y2)J$}6b(V%V*;8n196bZ zlw^bRN4}bhUYeKEfYJGfg~E?zbSgXsHMp=zl)K6&p8C(WxwF$Od50IvJCAq+cn z?gKS4_N2*@R30o=!;_W82;Eh5utgErPd-><$~TnHB2I$FP+NGyxc)Cohzjo*dGe^M zY$fv42!`CA=qPCc`ID%BjLz6`MmuQKYXGr^dedVz5O4REozAU9s6%l(5qY@V;1W>G zBr+#yw=u=IozX2uQtKP&oNg|H(p(J5-CO#wXVSEF_=BRz72tRk&|9D~TSA%4c1)>4 z(@Bv$)|0^tJr#H|^V-EeqIsvmJRdy_FaL6$%X@b6cLLUCC|;l8z;n8RGrd`taQstx z?2ljnR!)DqCjs<`pSa7sr7AT4s=>2zg{agZtM9%%4ex&|cF1`Uj4QhBVK zJnPrFXJfJ3aKarlX%Ouz1H|K?@ufB4sW43IC$R0-JFGL*kX_SY2_f_4^n@^5J~~ox zt{A~+vimXv@8o~<5kc1`8-9#K+ph-5VyDnVfEw7A&u!&!4gH<`72E98I@K_q7!C@8 zl&TjTo5T|+6%$6gwpii{j^;qzN;?r_LPn#-^-xq5Q8Lknoty@)04sw8WlxOj`Ad)8 zSXG$M{@93EyYZxF>)hp4zGmf}<_i)qW|RUa0RGZIYAfD(UDr`4LZTJ-WOL|WgA8Fg z?KWl)db7@Wor~z~ue;Z*SF0n!CYB_YA~@{U+HPEb=F~2tYZVB;EEX<$h!iKdw%gDT zAnM!A25bR4AqthQ&&_=*5;S3xN#VMt3yj*C6@92J!}rdk)YZD^^1PY*{)$O#W(}H1 zmd*HycNenX+Se41$a!B6So@Bhbq1R=s@zQoy3^5hKT(_(hWg`X4*kdxd@|!z(jYXQ z9a3@7s*Y81UYf5XKV($uh!`+OzcbwuSZh0M_ot$Nj!HOC@t=Kl?PAeeO7@)Uw>Duu z0owa$!Z?D)@5r$Kx4n>MiYV)MaklbQY&=U+VRdW?$N zo0Gn7b;<^SWhpcf?dgpA(_=PLgYt})G3W17*>okawaeQVnR|+$WgaHf+bi`i^$RF0 z9EKxHJG=^&d(X+7{odFrN-fu6pDKvEW}*ok`j=Bx>U$E!r1KCC?c((oSQ^N#C+s`y zQU(qeK9O;RMxpQ*q$F)9+T@)yd>;jU@?^Gl%b>fH3vQJnEGguaylR314|g9i-Do^X z`7=BTGz^extsW=y9=EynhP@;1IRzDigM5v*KYPsP%h<`Q)wjERkXfBk&-?MBxK|-#~7T==PI*`35KtYUfq8Q`9Oe)^NAK;@x_sU$`XT1yHFoL)M$Rbjo{Y^ z%D?gpFUdJ{ID;82M$TESd@hFL-@K;Jg_{8bb#Y-o!>H71_5+)>#a#BoG%vq=9$k{d9G)(W>WqP?OjFJ2PNSOWn4+8o93uJ_2j_>UEaDWN|0$0 ze&N##JXVkWw}Xl)%@zGdoOMyf{K?ct6#1(4E=9`k5MCg)f;naxnzq=pd-C3MP5n0Z zs@dpfnOT$0VW_Q0u%*Cly6u2jj~|LiV~E_EcT~W z`_q3w{xq4q6N+42wn1w;#1ez8Je&T*e7=Xv))$z#4|6>pMdT$Qs_T#*w{s{Dudk2g z{_f9&7Wb`#4Vg3ZB;cNFtNmX4f>P)$MKo#nHh{|C6$scATWK&|l4j51r?lSv)mLBy zSRbK>zCVvN9iO8I&GAyOYYcgtUFg+j`7mgxTvwc)Kmy%ZY{R7Hg=$cT|B*R;Hy9`^ z=0lrTOqLz^w-x(ggW8_u`iMR)?tW9o!~SSOj=8`&ix9u%h=*<{!!wDI(X5Nu!Ze2; zSAFlzB}?2V|KF{U`rXZA$elt`NvqJ#`W%A*`DU3&rSYIcE8pWQK@|y=O`AsT1MSTA1h#=fTaA&Y1r(mX8mVc^!|2`WN-&Bg^G3htR~%Mfa!axZ+Ary-)E_l z8wxQLsY{WWu;gwVk`I>sij}=>Tbjj33?C7q_Hacb2WvN$hV)FWzC+_9)o=T(YFl_8 zrUMD?+47Z?U;lxtG1vkciSF3_;N} z;Lyn2O>sEyhtkoiy$z}cTpDrRfuEdY9^uD^>qdJ!%>We}-X`+F( zMuHouV11jcNc+pPi~z1@;RFT>tpP#~A zO%ne53-(szaz*w+)e!#7&-oZ>j2ZiA=xEgwQ@R&T(1v-5ipAT%4c|Y<->R2X8Ci)_ zW(8CV`%ysrdujtKjk~HSpNi({>;(5@RJnTvUIuY}Wv|)zOX7w$CJ}u(#gy|9`Sj}k zV3BfBIHehP$WfKGnUWVR0Z0AED^0~_4Pk%~XS=sVJ(a7VTg;Z$-H}^Tax(03Kz1Q0 zRn>x9YETs#yZH*hoDl!2-t39s=G^|n5T8%-)RD@W+mcA~aoTWz%%+&l)k#Je_~CVF zY7@Rk#-?E=SUs>#&!2GHBTa=qaYyj*5~Yn&V6~BKrPlY$TpXqmbXOvB=@0$c$`{N$ z`+YpW-Fg)60*)Fy*MfCZim=Mg+joVGW6p6@VVTbC3w>ZLFkwtjs%75Ul6vx4uiup@ zh_{)MG60s-ZK$M;et#=0RW3!SYV2{M?QS10g(SGw{76?kkQu0}9x(AjL%QkW z2Qp8-0FVEZDKpjWoJDkaq;%Yd-8@LQ4%+82X&SYEy|3@O%% z@ym9~NiU6byEYAl4>ES`F9E(dBjUFW!dE^;nf{Qp{r|W^|JyAQPC9MUlug3hRvVt6 z%KjsmFcuA%p8o^qCZWof=Fy8b|!Y! zF=k=5+?28lt;IbD+rG5On7(4d0@O4RrzLGxblw+elZM<;_haHKid=Cc)xZOG&7B%rP{`)asV8}6850YvHmP8o!Qa5 z9sF#PCMTw4nO%YBK9Yv#a@8?bU?{NVpc8_QBRA<=mP|vOEopn;MQ={)-R#My(}QsMKGu;Pm`;j$pp$ZSv0azLR} zt?QV_L^9B2^}>u=ZEW zu6OOtU`9#AeSe--t&;av1VvuyhA2~4!WdU6;HV(7(sG!YVKiGQd{OZ*FnK;WqG&QK zX~+`zTjq130yVtQPP3MrTT7d|pCfh|5O5J{%D?T(%t_Eew;PF~U9SGC|GVr1_fmW8 zLqkKTQmj;thCt8(L}4|*y#MS9K~``5+I=+b3zcQz=+?+12}+e=T9xeC&k=Fbn^xLb zA`<;|Ii79QuVB$JuWw61l7}_f8?@#^h63CMFBrHoBh`ODVvQP{5I7Hd_NMShcy>#2 z4xCAIpWT6?>#5pWVuid=>y_@=Bjz6b_ieZCnd#cY91kS3H2$gyNH6TTy=c+z+^JFS z8k~@-v_3bQj&v>B^%4~S5oaDqtV=?+%4Z8t{QI0A{Fgj+F!2y|#glwF6c^xqt-JP5 zY5L`CB7LE8+T8HY)Ejzh&9nNN1VY-4rP5EyZFMtaCH?B3EU9Ws_}>uCC%IAVwDK>? z7K_B%OP`xQ9%;7IJQtf6oX_jY|4yboYq0Gc1>sccn%wkpB&f%4PA#)L@^qi-uj9{PV58%7L1?eb&}Fp}h`T;j8nRbpgTF8zXnc^#T>N{gSe3*Na8xvk4O?r?utj8jr7Jz=v6jkSzqe;s>Sr+y0th#>mEKs+gUa!gMWeaM87S&ChAFv#u2 zvCEbMSndkG1+3Zo9G(9+Z|RQM4Q%@C4ZHqe(x)snBySFU(B$e!;^mY)oO>1x&5dKECtW@e`Ru`O6tb^oxIRuLM)MA>A)QL$LZGPQLQS%W?In z*DRoW!Z|2QACB6^Os~d`WiC1(wGSVbvqSF(LX_b$-8W~ zcAQ*!I24+uB|g(cl|^to%^90yTsar+s+WN6MIYcyE!4IS55K%V9Znej5tCGR{ZCsYB@c( zEW^Ls-cbqYM`d&uW;>kA)TUrDXeWItevWO()CtyMZiBzaOcTMDAv`$%15$WacclkI z{TQ2vgWe%jkpZ_gTby+2$|94XY_4#MXy8+ns`5Nf1hrB*$0XCMm$h7N*B`&7Stoi< z=Gw5?K;-Z;1#j51%Ltn!DdU8<`Lop~3FfI7{;4_A6+!|B0^dj3^1mrf%sb6sF5Z5< z-BW!SnZLqGWZ#0TqCycuva5(@2jPGz-bNMrU#(>Oh+?*0vO?1v{9EAA6W-AtHekqF zxIDd|Ye^B>ab=s&|7zIfQ&{~DrUwpn?!|2g_z|ZYw3_euwu)A#S#8-?Vu>To zrBJ2+u~b9o0UO|Ixa;hN;;(7?&EL zT0vn?=lu>VyBSr5S@su=qlTd>z4EKb?VEw5a*hwhS7YHYGoI+;b!2K`C}=i>o3-00 z!Fp>U77>j?q4>@gyDi z?9z_VfBf}QJC?~jCz|G9>Umu(ly4$vd_F&&m~XhMyW`Pth|b(#{|Ldu>qw^ZD;svS z91A3|54wlJH`T-J@YE2Jki*zF%#Cy*go}G&xP_`cXP|I|1zihy@+xv;dwBCKE-9Zg zBGKI@B#MIOFt!4`+tudx=()e87nr{QH^Ra8qX zmR?)%zccR2v@P?zWE&)MRDI<`C!^5}YB4e!I*}CPE7DMosIV-^^|(AvBOAR`Ia>w! zVn@8skl)g|H_3#Od2f^K#r5IIr&%=Rx`;8<-3NyQu=C?2n&Q4gSCEZmu7Za7#<*P1I7I$l0$HCV~`^K~X|2A2Bj?=GHNF@%<$Sp(m5hUFpk z@vRCeTW5~#Sc>#|e%ve8A5;7sEDTd~XPfC0%i!iR(o-wQ;z16GMkftEthoWUy)J5- z0GtXS`?cyKbZGBmq1SfD8;9QWN|`3t9=br^wedJ>U!C{fwg>QqR)Ev+>jpkIKEaSu ze@21SZgiit;cR#b`Sq)?gFvpGCgHx-w><)0c2-sJbTt)KDi6N<8!=0aFybTO+qb)a zM{tBcOEVE65)#fwGix9vQmmuo=QyV0%?Zo`WXVe4=GS0P_8Mf6)1$|xBlT~Vou0_nyyL$e@2W#?z{ z)!;%xfNRIV=Ibr+6PE(XPaQ3F?3D_|pl_`8x~(F0Yz3(?;KNc6b-wl0>ol4++Yx^u z20vUnyh^wgHX2vKsbO3&g=wJfF|Q2S7Tx>M!DEGTX&xG$mEw$cf zAGmdTXuMu|?BTn@Bf##ANu0w)9IM0!t3=3-s}w^JX-+NQ&#qRyGm_4JUBbG1^`vD^ zc0V?2)4=1s&~)@UjpM(pAAoP5utL7q%%RZFWe1#+ibW4U&z;k*nz|GErTdV-8YeyQ z2g9GM6=s+_RZJ_jZ!7&hB&x3=zz-=MHqvcZuY(8d(u`ZUaE9is58b{U`&rb zlp=w69Mp$O*-2d~J=k@K@S%pa?VKKbam&|7^`u7Xmn$t{xT?pQYbcKunm6|)->QCx z+8}5`&rH#QY)sZP#|?+8;!sCkhr+lI5Q9`!1WX?#gb9jo>^=P@$BbPpBiu zOHD}rYN{tP)_|h*@CcX+`pUS(tyQfouTbBvDu1S>)yb^|n#lax%Jmu#$cL*a0Tuu@ zPAZ@dG@R1Ms^Ka?_c&41`i*pkW^fy?50)009LSnZkoc*-ctsV}{r4OJBfo3{k+}bWm=Y2Y?*s9ExC*ujh7|&JNbd;1@KRw;wlY` z3>{3%a-jlQ=wND$?WUUWN;IhbA{0P!%}z2yWq7#ZMX|icmxcu1qLDtKHHS6tg%-Sd z#?|2YvijK31%_Ck(}92dbN`H!vp#)nEyNY@?qHd>qBNTKQkXJ6d1o@$cpJUMSL{2% zZ$aoYV5?)$SyYUuN9dQA)gUIi+BekLIy(+MKUCYU7mNkp#NF}5l>GB{_S*Y7Dhu9c zle?T7jlz_y=)G(6KA}UWtqC}ukf{rrWj)E}h#XEYhr;xqopHN7s)aT@4;{CdAVEhi zJ>lpF+wmW1JO^BpYQ-QftD>wX`pz0X$=;t&unL}g+w9r!`xy;LADK!HW0~PG7?J*| zdT?M_lQ`-8!Om`hZdTdM?sVC6XnwIDp1I@ikbfC^e=;n>RH>@x%r!}j!%Fj-a5z&r zb+v?f#qh@56v_Xvq)C>M*MnPSM+b=4}$;3?a9$Q15)JU_NPdnU8F%2_bEZ@6(+)1o&(Q zq_$YhKH7H${GYMz^Wp7qFqe8%(#~oCL^>mh>V}qm>Jflea^S--E)3vt1z^Mg_aU^WDt~B7(v6s&6ew*EfJ%8Eoy}x)s0i zKs^(QlYMftiqdvOoU9y4`wvG@OC!xx zvJ*)UNk(`6!M(&Ge3>^TnRgng{32n(eYIE;*Y$vFV(*hMVT_|EPl-=LRbQMSKuXpt zz3pY7lJf(?u_U@%A}w+%QQU60c>~%my9@hBj!ajP4D2>l>^ZK{@H#V&9tiW#t6nEl z|KoDl$xS*;*afMni)=KKn&o~#bC9z?<5zWF-Uu%P*t>aWd{lA3SzI`fsUWuZg;lNA zY0jh)Bmi+K&kI`Po_YaHz-=Q!mn=2b2iU+m^t@PUO1r{U&L1=u9Fxu(H~ zmEhHdS9b_X_ltXY6ZCls#J`2-dF$UyjamfUGpHS~HlA=Ehrq3I>EHVLksEzx`G59S zMacbaIFTY3n6;d?ru$RqIE-^Dv|-BUbIH@75(F;1WIRA*aVXEaZ?r?;?oNnit!;aL zZQTt2bE@TN9KUQ^vegZ|p6H=*Lvf41$x5;tN$AD%-|hbv`L4HfJN3(c#%q)oL*n>1 z?|n#?Ou4o6-Xc$$2Z z+$*K-@<}MXmhZbCxRl$%`Xmc`uZIqzmqV71W+zWinLe^r;4?&6u$gJ}@aXg;f^McL zLthGBj21= zoqEtWqCv!zi}rzw<3VSOE2_U`<5f2gSPwb6ZKe!3+5f&ioz(XAw>STwTBzxNsLoYN zq@N?=X_wVcm;$9;$qJt3=-MozJ~X)zuX-p-_$u)SPjX~*=hj_2$tLmGsoVzC>~VZE zb~)<~d~vTD4pH_fv4P-R(Ob@?AF`03JzO6#Fa;_J)7wS(d^haOxJJ>^Ghh!g0sgmQ zd59KOO0gEF5#0+16y0;$P@ZVVONY{>^shTBvgX(x3KH153?@dGFCVe%Rb@sC;)H4h z1ur*-p>`0ORLqFT=VY^!bP-E?j-GaxryiShNztTCSpPy(E}CUAdcEJLU28&~Xi%Cu zF1pnX%S*BoFJ6lbfd9f0Q<`&dTQ8H^;8NRQfqmqScdUn(CT))(INH(|3)RForE5c) z?>*3M$=*oIa#s@9tjX+P`w*Gun8jAHX*WfqWURm_M?Y39WX;vn47&qy8-Z=A9|{X|cKE&D2hL3g(@Nyj zk=w$0FI(5|-u%9}=b3-e>$?Zr>mxLV<4cyB{C0#3u|$E<#?o6Ib<)PWe+ue+*FI|& zcE}sVyqK3!-=Z~)rHs~x^NzBFaQQ#8xEl!iy)l6wc&hpt2(N_|w5gTL95qMWaT;F< z0GiGUS}lez$uf>U5R^AMZrs`>(fcX{cbvxSAFHv5$tLN|v#{fyG5e+#kd_VB-;x*_ zbF@b`7o!Pce`YqNk3?t>NDHP0?igH7f}rY&uDqW*yh9{^O(*sSvSU}%p>Cc8=qhEf zXf`?t3_6z8VA!CRdaVDA>rsr6MyN64v2HkrHKi`J)K(3OLCnlKbcmm9Gb@lT2$Rg- zLn*?XsgB;z#&B%;jST}bPmiF&OV>e&SD%P-R%wZWU(JhcVK8Zf*Tu;;V&@t|rbiSn zz8)wi1*pFrl4gT34t+3$xQbu<3DjKp%Dt;j*a=mpWcimT65DG+`&P_OdYDi20xbKN zGhb@$+LXk91ppsdb+b%kRd8R(8Nmf&M}PLeP&MoKPIt>lM$|F2-0#F|m84(cTP=o^ zID%y8-^N`KSt4wJSht_qQ&SR#<*PGDPc^Np>tP)0+ImKj>||EQsaJ#hi-3waQ#yp4 zaA>oUo=i*lx&tmH>~x{jJx)P28=jiF{AdrDWPwfbrH@v1;-;nF22S3v1Px=?eH9rZ zf=M04e|>o7A!mNMey>I9+x+NEy!{YKog|p zXK(G58dEt$lQ?3)#KNU5`GyK+O5OjH&GCSTaUx@l{5bI$Q=GHk%d9Tm;)i)Udu872 z=|#8tKLo?ihbONmCG?P@5LH=d^DC`Rqj|8ux{gNtSP0{#Os+glV@14pxt?gfs_57) zMwQo5Apw!?5f<=(EFelKRg9rfV6wk%!?r133au^Pw!~Skq>Zw9g)68WutY~(vFy#D za42sAKXY_L?((4~li%M(c=wZuGSX$@NSOO%OdlFDhw5L95C`Tp8|Gc2@m=(4r0W&t zQA|Nbf$_y_X^KwaD2k@QG5B+ha$|W_k9T7RIOvB=tq!Z_G#v>_1-NZWg=K%r*q!WL z`l$91!_h>CFZv2uWuwTv0i?a{PTE^};=*w(_WX(?PH#0MSwStC5-DSyu8&ho(n{8}?x&D4T6`AC*d=MwDwgm`p2bog&`vr3j1{cBO~vhl zGkq9~rxXRuZY0&QS+oft@F--eJrLuiFCm+4%zV$fRNT&j!hVts_*P93`*dUZ4J;T- z884v*MIE{ zBh2Sz_6XmVP}|&xDE<>dR)5EH2WtE}ors(3hu}CP@S)d#8;Qa1OxKnQ`h7%4L+S=L z!k*y4y&l+A=C#BmHx9}DH+5W_qBl@)PFEvfIzG} zj!EXQ<}I&Mgj;?Up1WeY60b9(jLTH-O;)yvS0prUnLUiBimaozjMJGc43?WVl|C{T z(ZZF{P7T^`jetq6!gMKCebH(9baZ;X4JqbS$wGhxT;pSiwEC1T3kB?^Lnjx8vo0k) zu__@C2SOzaQRCMZi$&$()?u2W27Gp%f=$yJ|8@_(m@*FAORVRRfBP!p6>=8YD>p;fFPzno!Tfh2=50lcz{fBa-@%Cf2gf91ug^7LuJH(H?Mqw~_0uRy))g z-AgB=u0;Ep!_t^TmaDRH(HhVF&xUDCLNww`&Kh&4tkQZyx9U{3Q*PE9!x2 zB`5aAv>dO6Szv^b=PHY%-utoac3<{<=Wsc8$zHtoe-Ik~+cAIb{hTevrIe`RGhLJw z~bql$d1%Z!BCEV##vI8bcqz{0og>+;cCrP))BshLKZsd}v@ zP0@|GeT@pJ7@=fEsw2yiso|9LP$Yema0R#wRA$w8kpMejvSNFV6j?Kp9#sfpHcyMT z*ub^Qu*dKtFk-@J7>1jyK3Mn&y+GMNai1Lt7k?l5b9*w;ot_DzkBmnB@WRnrYbATm z@!l=<*pIp$bb9;RFE!vZs9H&(+Zi=#$@|0_G#eAm0yAGz$TZ0=Wt;?E@zZq*H4vk(H ze#nAeUrm5a`s|6;W;gO&L0mH1f{oX;WTLtm#O3kStuvOv9(mEz@>=l^P7Q zI2bgXo5h?igSIju0xh(|A1~l0bavhF`;-Kx`BqH5!s3QGD>{rH-$G4`BNwS=9VSRJWmW*D3MixLF-2*Md?wEF4-Z!yegO!*}eHp zd;fb;0{bv6rnwk@mUE$}GAJewWZcF!^ey!moYYF~(B!FC0g@auPm`|CJoL!veYdEW z%+y5!=S-HZVt5REc?*0QYHyG?XJrYU+(|3C@!v(g@lIhvPKvw{4{;hVRd`;FElAo# zi1pmPcWjrd-GC`xJV@1!wx#yTn0gx=p+a%HNEk!n%LHE;}`I3$NG%mSO5$% zxK4!PkT>%OU#knahKe{v2v&>MCo@L^b(4`-mQuWbiIUvsk3FW;54gue@HCG)hASC< zJK-!>Di=xIN&k9stV-m44*wv7V>uy!O@1g6Oug0?$DXLD(hN)*;%YX)ol;k7cz^O$LO=vsod!dE?Ke5&S9PNMYU-wK}v(#+)q$X8H7w&kg;W2ra z%!~(lh(V6zg6e#$>DbKS~~B(iM>6cM6Iq$57l=f#QSsRXFO!%sVyu51ObD4LXo19hJlOZRZU5cn19m1!c#L(6{6Ac1}!h05naw200oI4eNID}>E6uD}KV8h)%pqmCQJ zi>tZe!)_}=Q)$WZY5A>Phqv^E3Lp_g%^bRF{pH45z*A$2E)A)5VpP3dpj24HMOLeI zrJ42qtBatK;%!8YD!!~^wa)BXpfdYA%7g;imuYg_Vo5=zypw(v1~};I+)dxsoSQI; zNw)g9EBZ4eM!b_ojbyIMu48i##~Xo0(5)@$gfqEXBo$b4H0IfWAuXyroMS#!D2SSE z{xWJUIw~OfnFPj)A^y64Nc;Lsb;1*5gq!KHpV1#xCm*l3=3Qx&;+~eaZ`TxqxL@eT zmPqwF6^#Z}g}4}lE!bFf-}Y6$c^8RgJDs5m%H`aIUy{xkTp?Y5n1;Pw7kISS>f3Bx zA2=n^k84EGvw4jxM%J(buY0(ZXeX9PdhU%{W9r6^CPV>tu6kP^e0}j?njiP_U>KOU+oG!d_opvAKHW|p1k_zBcE#c!Mj0V+{XBi`Nq2oTy%4tMJ=b!3`T#Kueh~5_=U}@>T*bV$v?E(sIuX z(jP1X!qig#wmGaPB$nkMc=cM<8MhN7k_`qY)r;c+9ZDttYnxz}%pk*}?|(==HWYD817UB+nP_{j z4MRs0T$xFOC}F^jY*-TB%W-bFAj-U*aiyfOg27);eC_q|J7x0?eZ59-2oBe9)=sN3 z^DO=>;09iq&2%a#bEn$8iOkslA*H!Ug^8TxRKjU|bqTmmVjz4+86jxvaEdB0DL!qs z%yghjD@q`@qKK+T2DfR}0R{@m0sji{6~EDeFAGHK#~Q{dX_n8C_Y>R^rHT{6xvs^t zjK$2MTe4jUIl{Gnm?&R!0J|Og@@yUo{#ls&@w?zy z6E;uj@o_%f(%S(6o$G8qbkAKlgHPHK^ zeb;g5ZMV+m;`)#M!cPZb$H_A)DK~DPeU3MqiMl_RXOVH9N5JMH>U>*ur1WmopZBg3 z{BP!ZB11KPNbL<-e(v?_#@#WvsBgmZ|5SDT&NHH zf#EPd7;)GfhCN;PoLV$B?zV>bV#l1d)zD9u#6PB~UkUBHbWhI%#mcC%w1p|EtCFA2|R;5Xf)V zie-~lj52rk+!2na^CKT{A>AQC!@C;kr6i1n-XP(-P+y8;BxAk*YaOC-xj4o6 zP?y67Pj4i6cPc)CeV^~`Jhym0AwIW`MZ68doe z9P2B1is%smEc{Lg7?Cfk+mqG0PxDDCbCJmS@rvrD!no%V)Bqdq2cbLn&z_)sx4QE| z+B`3d<;BR=*CPKZlXMT=4C)7;lj7t+>0heM>f<3n`wz?#etrz~ewwg0#|6YQia45j zK1}%voTF6Y0;!fI5{(wnXpA80#6<>JO z%v0T#O}pwDw8R}EqwwhLrTyr^J4xOrpP=Du_%~m*+gzqM1iL z%_0mz{^GV=_<{o5a(@` zIOG-01V{n>9>0{W3<|8KyN3>IU_?oDz*C{* z(6(@9&?QCw+q!Hc=3n^uB-M z!0UrcoF&+Y{@OywKQ0dl>-PKoXhFWUFwpS%j&gR`y?zl4T$FfH>MLj{#;^ZZ4KwR7 zl>hB>c?l!qFLZes#$P-rv12ooJsj*1xd@2sB?6q=dEUu-(rO`=&R1VX-4@>rc6L(+ zdL%*}X6w9iyIju~B%Kxb6p}b@TkWgS z`X&b_y0J=hfA^oGL9CXN_{^a_ICrVC=_gnuj5=Aqddyw=+@JrqNl3W#pWyqB{Lm?v zQM5pPXK+AffSPRn$z7lO(Xe^JRgMR41xs7P#Dg8*h0Dv&8h->VQaGJVZns&(%i>*T zNYN>K-WxAJp$&cq#jx)kfaC`ZRz==THOs$$H#{LQ~WC5BH5$<3vZ*njp*jr=8L zlaj7V!b*~Q%sf2ip5zSAfI>+SXIQns+y6tMNJ;k-LpvxeLl5kG>(;pLK(T}NjwAC} zkZ}}HqHyGmrYL|@%}COZu5yAGK}{LU6|st^rKetLo-{_CzMKYQ+xc7)JiFvxCX9G& zQZgnL7|KL5=uyeEDRx9UtbSdV%mOjB<#h7VmG2l7cl+|3LnKsqW+kEuZ8*!)VBOj`ySqit z_@eWsAFPz?zWo&{g{PkdUluFHScFSe01pzk-JS-EvXB5^)c@_HN*e1zEU!X-7?BGr zvcRKXbQlk$wiJOq+S)+C&7v*O|CQAQ*gq5T%!jC$?0Gf)NH|5^oh}6xo)OBiN_%Ot zg=^G^ro!Qk^9fT?vfwt;-xItab!AF=<8X>D^dI7~q&0~G6d}z?2l~6gKkT4uIt={9 zLkyVQl&Hr2-9?ZQ#{_pZs_{|9MJ^x4Ci;xI(h?Y59fwVgb|O=NzK3zvzWk}y(fKlD zHP-t+L|f;Vx$$3a0{CVPgkl)39$zOZ)i20hW#6N2oOtz8%O$Zpz9@2{O`85{lbz$7 z{)I}-0HtiVVq6HwCoHq)1ZN)Bx0`YP$bAr>6~r*<2Fb~6%-Ke}Mm$z4v~YG>stPDl zx?jskxKCAMA<7ms#((WO3{S$#mtdI|Kk_D-7O3fR)l<&+n&)6m7ylxmF8#sO4~K62 zZ=SkPgh4qI zxa{VCz{1@xMZoWnwuJbNOGN9UB<$Kwn6d#T#em%RV~(c#r; zbv`J(V_cX`0*sSlBMNysviZtIeTC735@EuRd>1-Sh;|=f%r(bex<7Vj>T7;)>3?ir zycsh;0RiJ6LW2p)KvQR$tr%cp*a*ad;y|`DUV_;S}7fA-(nTWs3-e71l)%zu^dLTupCyiB>#8;lqY`SqTiP6R;Nd%nXz7g>b{JcjrZ6( zn{T658D;V!xnprp<^*Trj`e0YxJK`*eM5Nfj66=3nrwHjJ}GS@_Rt)B5&rH9LHsE> zL3{_$0<69W7n$|gE#o>71P4q#BnLUa3Cvj}7H!?hmvUJ`w8=!f_@lie{1)+Fo7gz} zha$VAQ}`t((T5{SbZ5)2+AVluKrhAo~9qOMefsI}~XX1$XSJ97;Jvkg&A_=H`^JhHelCLN>ZZKYOJEtwpX^V9`) zd1hhu6{_MBW$EM0!R<01eExid7Q(Ox1hHf)GBakl3M;DNo@7*=GhpWrTYya}G*S$XXy;O(kUqv-Q*(QOQAgCD9BFr|7!L~L2i>XS%mCeSk<7A_ zNaPW5R}R-FcxfzOxx#YWbQHiib;a8+eZ2H>;B7nej{7dxnrE-$8-HYkh6Kl{MUNnh z9GVcHR(0~e%HQ7}MFBeE{&s}e@5uEvz^P+6F{t&?^{?txn$g);e#d_lBwvZB6$ z$y^CxG0~GYgDfTdfVjCndtpV4me^qs=>eK6-_uKFb+p)BaK_AjAj=$ml6!JJ_up_U z7HnH$p;~{BTK-Z{k0a%@bic=^y_wFjU?Hx4Zk?;3-UNp)}FMh$4>mPaO5rU%7UB52trtOkIP+9Q)2ckb*1 zO}|<(x(zw=v>j%-~Eg{hb_U#yDI(LoMxr>`S zTaInJR6oo|70OIf%gj>y&+FhsMrqZGoTIyCfgEbgF&ZuEH;Aj2iDPY1gB9${63=gXVmYtUVU&I}uApP+WR=O|!&YBiV|+Ee7CDBFyxJamYe>{Hm^J2e`*I>Af9<_GLhQQCW)6T=SX?Ux z-||%=y~_NLnure4rGvTTkdlE2j!#E7Y{Lzx4*0SW3{vXkJKef4T=WyjmA z#vYU85@Yq3=etw>FG3_2`+`O6Z?wz7Y@I&;2? z+n7nTIgauKKdsuOQ3iUvXtAD0in-WX($sf1?duzyKD}2Ji^&+&J@m(PWeL|oR<9u1 zr1)O^baW|T{N&1?pZfNDTlKpsa!`3Oghcl()b%b*L!Bz$pXs=|ZdA03W_i!4FbVz~ zpjA%P)Fm=RPgn{=t#7V5i`3G`AY_`A&>a5vh zXd7=TrJ^D`cw-f`%YW|3YQ4uvJM*g33#zO<$G+W%_Zz4jjpVXXn%Y5#@v>9?2d#v&7M$84 z(nZtY8g*(BZDnoHqH7hT+*F>@l$O$M+W6G=L6gAcr0ex1Du_mve3RmB+{+0;9Z}mh zP23;#7sYNKsA}q219_LWe888(>D!YQ8u9ysCw}`P5-2CK-cE&Y34!NjPWMnU?XiK_ zQAoI2=`RzhSL3`zdJ=7| zi%fK)0qulEtuIAPU#h7cG!->Z{+`{+U$g$?w}r5=qvBqTfvqd9e;CNmEC$lfw3YE2G{`6@P~^K}NLuts4Bo^CkWq z@vxv)Xr)2i(C;L;-M{z4!nNZDn{1tO)D;`ZOuml3GB#9QjBZ~TS86^cNWPw2EL$Gw zz%AiH2k)LzUPp)sJSddc8mIU5F^xw7ogcLd=$k#uFKecdLaW5JysW+k@tqRi^=(=E zn|;j{k%Hbop>lRe04_|51{!zN2&GbUsEIfIka8})|2chRYOLHI0bL-QPsAvmkj*tu zd#jrp#jHLxL6C3JUDU}{y5Kf1U5y(QcHQ)dfb%oYi4feW&eWaP{$rl)6=&z!A^ zlf#gqv7N4SI||}6!%`?Q>SH)OnmRZNTMf~iHeWCuGR^p+t)f-X zK;r!&A0|(~7cfp93Bz|s)nHg6)b|iUYy~q(2;-B$WL`C9e$x6*Mr2IgiEj8d(l|1XR;4HJC0Y^P^ zxc`#0hTBS`$|zk|bi8N2%~Po~El8?jxT@{zPha4M#AVOKPkiH2KELqNP7E4W;DQd$ zo+w5ir8}rqq0yu(=1$~zU6@4AvEdkT!thY2Uz7iHE}3Gz3$7%Rj5(kxSn2~H?@M3w zG;F>y*E$MLHDDdBh}qEG{e?NAL;KLSnTbj#rGhd?ijb6|5gF3njT%n)$cDwBS=?4WOrt3X#&1^Nc zji>x!>u*fUnd8!4{;8WH5AI#kCxiOVHepk!=F{9IuQQ)sQ;Vh~m2PlO z#ccCyNK!+34HTZQ0vR9T9L37B7>?ZrH|u7TrByuFuL|w;fI#gD$-aEhb*X}`t0F;@ zRe@@i5%Wwjk{N}Xn1pvx(tbn3+$13*_wN}%1h64Mt0J}OWu-D>;h?0^xW~#g)vsZU zF*b+dh7szvjzPBHTC3q(Maio(VUFhDLAjajlNDEFQzIh3J-}-5tTDa_AZ6Xej-5|S zB%oFSN^C4^EA~9fIw>pw9Xk>x=%{n`R9(p($_L!w{^wYcQ;oE{0vZ7UY0~^ z2GHOIGxl`x7BlFCUSL(Kh7b1{@ta`lmB^=C=xA7^P@YQh9@}RtIoc>#!*JYA{qVrL zp^|+zyKM)E=qF3B5bmcEc*I<|I^q2J+z5j9o6lsLtIie-EMmy*eoPeecRT$Oyuzrq z=cSX)R+b#!h$++m3XJ9pU)RB?LmjW$CZ$jbqdRSXeRuf^?%ES z%Axv#CX#3R+skEB9gmSy@3oqQRwsH3jH@R77>cr5m12C#G&!gF8+np^tNgWoYwxg+ zYAiV|?Ul0H_T8Y!Cfqd~*;B^VP$MI#;`WGzcA5>}(6bNsuu#X{U>((%qg)%NzWGnq zAG>(*Qjg~E6~?>IPI-=6P?(=kKn@g9RP%A(0L7gO-x|qeBmjT7a$LWN1u4%kd^4gU zwSf$vRVyR^g;Cf4K$kq-@;CZK)jV@%q}pRxtt-nLYF}r)l6gJVF63$NGYSTHKpg*$ zagednsLnoQ#2RkXsXuFHRzGUfiFYaHwvYJsaF^(KTBqhX+3WbndfUT@ob}ryV_MYf zfl~kb?ci2Rt^!g8(v!c5g(@Y&$X4l!x*=p*}Do=NZ6uUo*0$VKXQd>P`pNNno z1P|XqlTYj}J2oG-@ zE!pFtKJ&wtm~)vyOeaq?;EEJz{3?maa2ML^H9QeXi+5b@jjT0sJs8E$7`ihN`KQKl zjTPEQG)Q0wDwqI1Bpk}rI4XsJ|#W=0EjHCo#JjzKStEwBP z2FkD}J9UQfcQVqWmNWY=f-GqwQ!0MklfPQYhsN1%)!%N}5;RsUV){-paYm&$(`U?a zWr{FsZ8LXGAsnn~u?SN;A`tE|gQBLb9>~XhA)gJ@eg&_)N4)7)=jMi^o&?x@DrOnd1aVzE^;K|NQ^F3ebkD4f+J2-l_Md4s^(5@cPS_9(P9%tEW%reZ{NGFT?aJ^OS2wVKU?!0*yM8nd$B)3GkbEu@XQM1As zHRj7oQ2`3PV}WaY3jM`+^12rqA$BoT)j2c}b2!{9h=@eBvh3YLIUbmGUVJ zsr+rSq{%Bby?TPI@!^*#O<;;v8Ei9@OKE~Vz*nW#ZPJJ1tq^G(Z4;ZY;4TCZ_v3}D zt`}yQj6A(x@7qCZ|Cgk$5#udAsQ1tC(YF1q{m#321u@h;n<;h1r1gPeH3p(6RhsjU zQI6hMpm$Kgg+i?W>%!0(k!Wd*lpXHul|9k8J*a`n_%*{v@1fo@RG2>F;TQa1qFJXu z^KsUhq*_kKgQ@*1%WL&6sQu%CSD}ND6do?OD|&sA9rnihZ)4*b zy-oU|S_>e09LP#LtaQ9dBCW1ZPHG=``m#Fgo-6M)Rk=wFgodwv?=U7^EUvPP=>eOg z84?zvfUBK2PB$ulHV9_iqf+-jEZNU0!ukt9LIa^KGvFsUXHQ#B3ZlJ&%?RkvL8o5e zdCE3drqUr1uNzPH>>G>DQI2UwcV|Y#>mD}?qsxbQZ + + 3 + + rt-thread + + ARM + + 1 + + C-SPY + 2 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + Release + + ARM + + 0 + + C-SPY + 2 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 0 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 0 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 0 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 0 + + + + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 0 + + + + + + + + STLINK_ID + 2 + + 4 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 0 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 0 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 6 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/bsp/yichip/yc3122-pos/project.ewp b/bsp/yichip/yc3122-pos/project.ewp new file mode 100644 index 0000000000..e7ec1c8622 --- /dev/null +++ b/bsp/yichip/yc3122-pos/project.ewp @@ -0,0 +1,2303 @@ + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + Applications + + $PROJ_DIR$\applications\main.c + + + + Compiler + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\cctype.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\cstdio.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\cstdlib.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\cstring.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\ctime.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\common\cwchar.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\environ.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_close.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_lseek.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_mem.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_open.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_read.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_remove.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscall_write.c + + + $PROJ_DIR$\..\..\..\components\libc\compilers\dlib\syscalls.c + + + + CPU + + $PROJ_DIR$\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m0\context_iar.S + + + $PROJ_DIR$\..\..\..\libcpu\arm\cortex-m0\cpuport.c + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\pipe.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\ringbuffer.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\waitqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c + + + $PROJ_DIR$\..\..\..\components\drivers\mtd\mtd_nor.c + + + $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c + + + $PROJ_DIR$\..\..\..\components\drivers\spi\sfud\src\sfud.c + + + $PROJ_DIR$\..\..\..\components\drivers\spi\sfud\src\sfud_sfdp.c + + + $PROJ_DIR$\..\..\..\components\drivers\spi\spi_core.c + + + $PROJ_DIR$\..\..\..\components\drivers\spi\spi_dev.c + + + $PROJ_DIR$\..\..\..\components\drivers\spi\spi_flash_sfud.c + + + + Drivers + + $PROJ_DIR$\drivers\drv_gpio.c + + + $PROJ_DIR$\drivers\drv_uart.c + + + $PROJ_DIR$\drivers\board.c + + + + Finsh + + $PROJ_DIR$\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\components\finsh\msh.c + + + $PROJ_DIR$\..\..\..\components\finsh\msh_parse.c + + + $PROJ_DIR$\..\..\..\components\finsh\cmd.c + + + + Kernel + + $PROJ_DIR$\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\src\device.c + + + $PROJ_DIR$\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\src\memheap.c + + + $PROJ_DIR$\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\src\scheduler_up.c + + + $PROJ_DIR$\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\src\timer.c + + + + Libraries + + $PROJ_DIR$\Libraries\core\system.c + + + $PROJ_DIR$\Libraries\sdk\yc_wdt.c + + + $PROJ_DIR$\Libraries\sdk\yc_exti.c + + + $PROJ_DIR$\Libraries\sdk\yc_uart.c + + + $PROJ_DIR$\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\iar\startup_yc3122.s + + + $PROJ_DIR$\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\system_yc3122.c + + + $PROJ_DIR$\Libraries\sdk\yc_gpio.c + + + + POSIX + + diff --git a/bsp/yichip/yc3122-pos/project.eww b/bsp/yichip/yc3122-pos/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/yichip/yc3122-pos/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/yichip/yc3122-pos/project.uvoptx b/bsp/yichip/yc3122-pos/project.uvoptx new file mode 100644 index 0000000000..e797693691 --- /dev/null +++ b/bsp/yichip/yc3122-pos/project.uvoptx @@ -0,0 +1,925 @@ + + + + 1.0 + +

    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + 0 + JL2CM3 + -U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN0 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Applications + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Compiler + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscall_mem.c + syscall_mem.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscalls.c + syscalls.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cctype.c + cctype.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cstdio.c + cstdio.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cstdlib.c + cstdlib.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cstring.c + cstring.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\ctime.c + ctime.c + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\cwchar.c + cwchar.c + 0 + 0 + + + + + CPU + 0 + 0 + 0 + 0 + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 3 + 12 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + context_rvds.S + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + cpuport.c + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 4 + 14 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\completion.c + completion.c + 0 + 0 + + + 4 + 15 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\dataqueue.c + dataqueue.c + 0 + 0 + + + 4 + 16 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\pipe.c + pipe.c + 0 + 0 + + + 4 + 17 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 4 + 18 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 4 + 19 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\waitqueue.c + waitqueue.c + 0 + 0 + + + 4 + 20 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\workqueue.c + workqueue.c + 0 + 0 + + + 4 + 21 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 4 + 22 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\mtd\mtd_nor.c + mtd_nor.c + 0 + 0 + + + 4 + 23 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 4 + 24 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\spi\sfud\src\sfud.c + sfud.c + 0 + 0 + + + 4 + 25 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\spi\sfud\src\sfud_sfdp.c + sfud_sfdp.c + 0 + 0 + + + 4 + 26 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\spi\spi_core.c + spi_core.c + 0 + 0 + + + 4 + 27 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\spi\spi_dev.c + spi_dev.c + 0 + 0 + + + 4 + 28 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\spi\spi_flash_sfud.c + spi_flash_sfud.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 5 + 29 + 1 + 0 + 0 + 0 + drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 5 + 30 + 1 + 0 + 0 + 0 + drivers\drv_uart.c + drv_uart.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + drivers\board.c + board.c + 0 + 0 + + + + + Finsh + 0 + 0 + 0 + 0 + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh_parse.c + msh_parse.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 7 + 36 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 7 + 37 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 7 + 38 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 7 + 39 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 7 + 40 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 7 + 41 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 7 + 42 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 7 + 43 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 7 + 44 + 1 + 0 + 0 + 0 + ..\..\..\src\memheap.c + memheap.c + 0 + 0 + + + 7 + 45 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 7 + 46 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 7 + 47 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler_up.c + scheduler_up.c + 0 + 0 + + + 7 + 48 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 7 + 49 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + + + Libraries + 0 + 0 + 0 + 0 + + 8 + 50 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_exti.c + yc_exti.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_wdt.c + yc_wdt.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + Libraries\core\system.c + system.c + 0 + 0 + + + 8 + 53 + 2 + 0 + 0 + 0 + Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\arm\startup_yc3122.s + startup_yc3122.s + 0 + 0 + + + 8 + 54 + 4 + 0 + 0 + 0 + Libraries\sdk\yc_qspi.lib + sdk_yc_qspi.lib + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\system_yc3122.c + system_yc3122.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_gpio.c + yc_gpio.c + 0 + 0 + + + 8 + 57 + 1 + 0 + 0 + 0 + Libraries\sdk\yc_uart.c + yc_uart.c + 0 + 0 + + + + diff --git a/bsp/yichip/yc3122-pos/project.uvprojx b/bsp/yichip/yc3122-pos/project.uvprojx new file mode 100644 index 0000000000..55eac00d80 --- /dev/null +++ b/bsp/yichip/yc3122-pos/project.uvprojx @@ -0,0 +1,1482 @@ + + + + 2.1 + +
    ### uVision Project, (C) Keil Software
    + + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 1 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf.exe --text -a -c --output=@L_asm.txt "!L" + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + __STDC_LIMIT_MACROS, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __USE_YC_M0__, __RTTHREAD__ + + Libraries\CMSIS\Include;Libraries;..\..\..\components\finsh;..\..\..\components\drivers\include;drivers;applications;Libraries\sdk;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\stdio;..\..\..\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m0;Libraries\core;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\libcpu\arm\common;drivers\ports;..\..\..\components\libc\compilers\common\extension;.;Libraries\CMSIS\Device\YICHIP\YC3122\Include;..\..\..\components\libc\posix\ipc;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\spi\sfud\inc + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\drivers\linker_scripts\link.sct + + + + + + + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + Compiler + + + syscall_mem.c + 1 + ..\..\..\components\libc\compilers\armlibc\syscall_mem.c + + + syscalls.c + 1 + ..\..\..\components\libc\compilers\armlibc\syscalls.c + + + cctype.c + 1 + ..\..\..\components\libc\compilers\common\cctype.c + + + cstdio.c + 1 + ..\..\..\components\libc\compilers\common\cstdio.c + + + cstdlib.c + 1 + ..\..\..\components\libc\compilers\common\cstdlib.c + + + cstring.c + 1 + ..\..\..\components\libc\compilers\common\cstring.c + + + ctime.c + 1 + ..\..\..\components\libc\compilers\common\ctime.c + + + cwchar.c + 1 + ..\..\..\components\libc\compilers\common\cwchar.c + + + + + CPU + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m0\context_rvds.S + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m0\cpuport.c + + + + + DeviceDrivers + + + completion.c + 1 + ..\..\..\components\drivers\ipc\completion.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + dataqueue.c + 1 + ..\..\..\components\drivers\ipc\dataqueue.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + pipe.c + 1 + ..\..\..\components\drivers\ipc\pipe.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\ipc\ringblk_buf.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + ringbuffer.c + 1 + ..\..\..\components\drivers\ipc\ringbuffer.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + waitqueue.c + 1 + ..\..\..\components\drivers\ipc\waitqueue.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + workqueue.c + 1 + ..\..\..\components\drivers\ipc\workqueue.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + mtd_nor.c + 1 + ..\..\..\components\drivers\mtd\mtd_nor.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + sfud.c + 1 + ..\..\..\components\drivers\spi\sfud\src\sfud.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + sfud_sfdp.c + 1 + ..\..\..\components\drivers\spi\sfud\src\sfud_sfdp.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + spi_core.c + 1 + ..\..\..\components\drivers\spi\spi_core.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + spi_dev.c + 1 + ..\..\..\components\drivers\spi\spi_dev.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + spi_flash_sfud.c + 1 + ..\..\..\components\drivers\spi\spi_flash_sfud.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + --c99 + + + + + + + + + + + + Drivers + + + drv_gpio.c + 1 + drivers\drv_gpio.c + + + drv_uart.c + 1 + drivers\drv_uart.c + + + board.c + 1 + drivers\board.c + + + + + Finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + msh_parse.c + 1 + ..\..\..\components\finsh\msh_parse.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + components.c + 1 + ..\..\..\src\components.c + + + device.c + 1 + ..\..\..\src\device.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + memheap.c + 1 + ..\..\..\src\memheap.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + object.c + 1 + ..\..\..\src\object.c + + + scheduler_up.c + 1 + ..\..\..\src\scheduler_up.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + + + Libraries + + + yc_exti.c + 1 + Libraries\sdk\yc_exti.c + + + yc_wdt.c + 1 + Libraries\sdk\yc_wdt.c + + + system.c + 1 + Libraries\core\system.c + + + startup_yc3122.s + 2 + Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\arm\startup_yc3122.s + + + sdk_yc_qspi.lib + 4 + Libraries\sdk\yc_qspi.lib + + + system_yc3122.c + 1 + Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\system_yc3122.c + + + yc_gpio.c + 1 + Libraries\sdk\yc_gpio.c + + + yc_uart.c + 1 + Libraries\sdk\yc_uart.c + + + + + + + + + + + + + +     diff --git a/bsp/yichip/yc3122-pos/rtconfig.h b/bsp/yichip/yc3122-pos/rtconfig.h new file mode 100644 index 0000000000..f01ba442f2 --- /dev/null +++ b/bsp/yichip/yc3122-pos/rtconfig.h @@ -0,0 +1,239 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 8 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 100 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_MEMHEAP +#define RT_MEMHEAP_FAST_MODE +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x50001 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 +#define RT_USING_MSH +#define RT_USING_FINSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* DFS: device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_UNAMED_PIPE_NUMBER 64 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN +#define RT_USING_MTD_NOR +#define RT_USING_SPI +#define RT_USING_SFUD +#define RT_SFUD_USING_SFDP +#define RT_SFUD_USING_FLASH_INFO_TABLE +#define RT_SFUD_SPI_MAX_HZ 50000000 + +/* Using USB */ + + +/* C/C++ and POSIX layer */ + +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + + +/* Network */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + +/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ + + +/* XML: Extensible Markup Language */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + +/* sensors drivers */ + + +/* touch drivers */ + + +/* Kendryte SDK */ + + +/* AI packages */ + + +/* Signal Processing and Control Algorithm Packages */ + + +/* miscellaneous packages */ + +/* project laboratory */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Arduino libraries */ + + +/* Projects */ + + +/* Sensors */ + + +/* Display */ + + +/* Timing */ + + +/* Data Processing */ + + +/* Data Storage */ + +/* Communication */ + + +/* Device Control */ + + +/* Other */ + + +/* Signal IO */ + + +/* Uncategorized */ + +#define SOC_YC3122 + +/* Hardware Drivers Config */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO + +/* UART Drivers */ + +#define BSP_USING_UART0 + +#endif diff --git a/bsp/yichip/yc3122-pos/rtconfig.py b/bsp/yichip/yc3122-pos/rtconfig.py new file mode 100644 index 0000000000..94f16842ad --- /dev/null +++ b/bsp/yichip/yc3122-pos/rtconfig.py @@ -0,0 +1,152 @@ +# BSP Note: For TI EK-TM4C1294XL Tiva C Series Connected LancuhPad (REV D) + +import os +import sys +# toolchains options +ARCH='arm' +CPU='cortex-m0' +CROSS_TOOL='gcc' + +# device options +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = 'C:\gcc-arm-none-eabi-7-2018-q2-update-win32' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = 'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iccarm' + EXEC_PATH = 'C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.2' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + CXX = PREFIX + 'g++' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M0 ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "drivers\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf.exe --text -a -c --output=@L_asm.txt "!L" \nfromelf -z $TARGET' + +elif PLATFORM == 'iccarm': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M0' + CFLAGS += ' -e' + CFLAGS += ' --fpu=None' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M0' + AFLAGS += ' --fpu None' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "drivers/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/yichip/yc3122-pos/template.ewp b/bsp/yichip/yc3122-pos/template.ewp new file mode 100644 index 0000000000..2ff75d9abc --- /dev/null +++ b/bsp/yichip/yc3122-pos/template.ewp @@ -0,0 +1,2032 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 29 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 29 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/yichip/yc3122-pos/template.eww b/bsp/yichip/yc3122-pos/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/yichip/yc3122-pos/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/yichip/yc3122-pos/template.uvopt b/bsp/yichip/yc3122-pos/template.uvopt new file mode 100644 index 0000000000..0e93bee143 --- /dev/null +++ b/bsp/yichip/yc3122-pos/template.uvopt @@ -0,0 +1,184 @@ + + + + 1.0 + +
    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 25000000 + + 1 + 1 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 255 + + + 0 + Datasheet + DATASHTS\ST\STM32F4xx\DM00053488.pdf + + + 1 + Reference Manual + DATASHTS\ST\STM32F4xx\DM00031020.pdf + + + 2 + Technical Reference Manual + datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF + + + 3 + Generic User Guide + datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 1 + 0 + 0 + 0 + 6 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + JL2CM3 + -U20090928 -O207 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000 + + + 0 + UL2CM3 + UL2CM3(-O207 -S0 -C0 -FO7 -FN1 -FC800 -FD20000000 -FF0STM32F4xx_1024 -FL0100000 -FS08000000 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + +     diff --git a/bsp/yichip/yc3122-pos/template.uvoptx b/bsp/yichip/yc3122-pos/template.uvoptx new file mode 100644 index 0000000000..3534243b9f --- /dev/null +++ b/bsp/yichip/yc3122-pos/template.uvoptx @@ -0,0 +1,177 @@ + + + + 1.0 + +
    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + + Segger\JL2CM3.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + 0 + JL2CM3 + -U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN0 + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + +     diff --git a/bsp/yichip/yc3122-pos/template.uvprojx b/bsp/yichip/yc3122-pos/template.uvprojx new file mode 100644 index 0000000000..2fbbb683ae --- /dev/null +++ b/bsp/yichip/yc3122-pos/template.uvprojx @@ -0,0 +1,390 @@ + + + + 2.1 + +
    ### uVision Project, (C) Keil Software
    + + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 1 + 1 + 1 + .\build\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf.exe --text -a -c --output=@L_asm.txt "!L" + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 0 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 1 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x40000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + .\drivers\linker_scripts\link.sct + + + + + + + + + + + + + + + + + +

    uWZ+{siN;h%O($P%Zw{~TEITy%6Y3`t~!MvS|gc14N-R1P|83^8xg4q4}2;WWD z+v!`pGlSY%9uoIcdGE?Y#MVrNZp%i<_Us34*!CQR?#My-j$ENN9JwnWK@=}yCtdF; z5b-!XZhr|Pc55|@1GX~#TB>l_A3@JxH+V;;FaR08Cl_HmbA_MN4&6odMQKIu%SYVd zGDIFMMAZHwL>;0!JyMRiN6Qd%umoZI^8P72{;_f-JvLk1=ihNSYb=kXUt!Rk0do%X z*_rxJ!1%*N2bPZn&2>QbAHiuIsLaCG|KEb;BZbr8I0?_pM*PziBA(bh;EjWaqq=X9xHbowG`@!|PC-CrqB!lu z$|>PAF7vl0h5An7KI&K0uakBc2se)Ua^!Am6Z>dPK2Ri1kSI1KBVbP+{C8x-i{{Fl z2l=8%*ySp)_T9bsr1NKJHY5wGroaPQ?rNMq9KOqvTf3b351V7#}bKLE?wz^4!O5gk~rlRpCEI{(P9 zhk@e%N=DMOJWL)2kdKsyf#f5F%PfH2DR@7P4>ZPxY{sIw z@6bCo18+WwQ?VM<2CDF-jV0<=EXUv{p8|Kg(aCzlO+y&$BzK6C>m8*2LB(;8abSSq z#O8kXv;eOi!f_utehkP3&URp+rxUg4LSN4yn0mX7*)6)7Fhq5SyEmzZK2ZckhGc%vXKxcPh_-|6Q=W_8xPVHvv~J;H{t_pq2`( zrA^R-)ZFU_^Ivy&F(^GC0PyB}b@w%$hXlaOyDnO-ajn(ZyS*Jkn3hCnk<;&6xvh~f zzc_=)%%iOXnY$<*2GQ9_C4;>T`VMxsi=z)ruhQDrkCs8EU}->i9~2cb$V0jm^f{QFxJVyx!&mUm~Lc>2~!O) zX}X~h-8F;dEF7Q1I6iBYPdB1414E3OGzCUhmV$=Gkle{LjUIsIp1!IFVEHsF)BkH4 z76!_7VEHr~GXa*fflrpn76w?cYaN#DSuYHHGH1EI+6IP!PJ*-ie*%^>P|n)r?6Q&1 z=@IV2$R`{4WEvL7Sz+*Ak_6Y{V4+nWR+);tt+Vm=>GyGQunIpm|ArNhuEU?d`zzi( z{x|&T^SAN(hp$3S1Gcr)3ZMV@IToy%3q$Lvh)E8FqoX;dPn(E0-h3NN*0090gB!4% z7QS!qtHiYf%kg!fH$L=m#iyx>c%>`{JC_t<$DXB_TbYfR)BsF2AB)(6Si}@3!boZf zLoX{>`@2D%8Unij54Z+~4+;ZeOtqp(_Y>OXYY(r%vwwXG3pUNg<9|8^NsLtRqp~(7 zYyR3MdI_-HD#}%8S2AEOv@Y4mYK&YM_;m8Hc|gOW@N|R1%L7uGhXBhZ44Bgbo`sEo zdedTD<>CyrtBZ*1>E#MnsSBLsE^w2%iueqaE2SQAwzGnP{$v=@g5JQ+7z=l=fqT4< z0G|w$mM{x(f>D5-Fu=&X!#4LRK$zDzaCs_}^P}LiC=NagW8hgDh>}MafozB5^~WFd`X46Wr*vv>02FCiu0}x0T@7iC6Ji^N;uy*HLzKF_?SXG}=jU*3Jlb zz$kA+c$bCYhpzKD{P8pJFN=gU)d!9d62bY*8oSKvlImm-h+3~aKLQ@_vLP>gji zY(vG~O3XjB4C`Oqj*M0LSp3*(d@SafK$@N?V^Pwv1nYDcSft;OtB^N=$)AH|EyP`PmlHXhu9LoXb~j$^yA z=c)ZT@Z4eHKluC+?0xzGwm-HDn~rRw-><^vC${0htA}y)tz$U$rzeFx`u5{E^5$dW z-i~K?WA_XDu=BY+LOAYo@4tw*zx@lI|M+!0^Uv?&I&hfJ2lH zyH8Nur#^UD#Cz_O*YV=#Z{ejc-p0#czJp_bdqK#P@4bxYK6(Q$efADs`|7Xw+sRMx z*@f@%UDdC6@0ZW<_0^O3=GxDA=lg%)bDChExOo~ceDVff{Paz{d+I|Rd-oZ9c;<5) zulfn^{rWLZH=V<0=f1*+zkP~xcP`;tXBB>`K82Sk51*X=93TGtF-~0n3140P4!3AQ z_VCl|7rzqnOUqfDY&?x?1GjLh`3z2yoawxQ z3;i`X-**c?wqC?nb*J!U{V5!8`5ixXUB+qp2L0ZD1E)GK;Fpf`INe2gxmSaWeb;fi z;{ratava~@`WZj6eUy7m_~gnD_@(tKe(R{lX_`cTUGp2hYxo_fJ1KtG75sSn3~ta8 z<%?U#ai*UZNYwXEbeyGUT@V{RmuS|+n>sgX!FQRa=RdUmPVuhc!oUrDTYnN?-27hr z{&>UB`1$U6oCiH;_!_>w^SjV|`L*o|E_B|+>6U9~rn0D^IbIjr>*>FPmf<$sMGvlZ z+(1n~b2i_m`DO#YzxgwMX*x@(vfUk;>{EGM?ykZ~-rTAC4Ij|B{f_@@2`ym{&`c=l^*Ghe=nzn=a8@BI26-oN-6Uisp(H?W3zHlj9WiFV%qDM9M~ za-{4lLp=Rfq)GYB+Eb3m<;e(|AC1V$cm$P)!6)CJ`dXU+nR$aDFg^f^AQ>#3Eg;oM zU}9wmJ4Xw#;mkm}o5Ts$4wmpxcwnMF&2^2ZW7^DVu(G!hfH(u=Op(U+LdW z=v??)&FM^;J`Uq2JpwaJLjlAyl^PrEX03HcCmT39+riD#$;=OX>! zEMy#=gS=x4kbYz~@}F9SjK?UPu35u4@5xH!Jh>1#k1r60AIo1_B{XA8Us!?S7nY;s z`Q^et>*dv$_39e&8#WA?Ns>js;|-(y=awS>nZ?MY-*eg-6i1}_^db?S%kmU`7oS>) zm`6(y`$U=0CKuEMdolzd%z(K7g8!2oWS~{c6VC2P&{zi;vy2Sai4Ig2!12GJVHv5Z zt^3W$G)8Kcvv6FYX?$PfnB)H|(ShY`;FI5(X;>I6cP>@Ie|dtS>tL`v`Pdx9Jys#K z@pWK1)3C6CPxf=(M&|Qh<&{NupM}Bigu~^cZvLoQZZk`Tv?u5OM;exgf#o_sgW3NR zu$(o^{q}HK1%k6&O6B17SUzM&iv(C6u!-8u+H874(?5ab z8h+RNU^yE@6`(WK>mLDg9Vq^v!18|upg#;4f0#TBARj4z1jqjpf!?{RY}F8Ql|q4+hx)w8&> zeI-6ty5KiIZ+t~->o0=C@I^=v{$Xo`s{v~KA`Jw#9l~$HN_?tt#+8COXxp$AT{P#y zqia#^9ttcz1h7_k%P;ul&AIq%_6+>27>DNE2;lVZVBOyOhTEvSK-Wzdftz2Gya#;r zC|Z2H@r#=b)gOL@TiyLMmjxOJL33Q7x$zp%T@Bp$1-GFwjY_(?d7g?*ive zYd0U7{};h>Hh?*J_YPI+CA>kEhPry-HXkw28ogu?n>DP5JGA`cZG&1G6lOLVYJ~u6 zS*uzL5>uiSpM^nN)~s%$m%Bp+%fiMdnUVzU^y3arm(tYzo;9O;84z#Kg65sf^W7`% zb+ds?3h(Z#6AhB7PMAi8L0~~L)YeYV?iWBXgXK)!!XUhs66H2;hX^2I9- zg|;|rl(Xiz-k1qO>wN5_X(F8Cv39wksin{~XTY5O46rj;Zfa#KG|R_KnTDCxR+w&T z@=sv7MB^>Ma$|ez|1nt3!r=J7GVnRU!sG#1F5=PkL|Vu&SU!~&Jj_|Xc;_07w>Q9a zFG~TIGlhdepd+RSI{Zhl+%Qt|05Iok<}7FJa^@^&OW?Bn5QHzz5Qa`Pt25!TAO`mN zekj~CAM2jlgkx_Ufp3%o8}_flU%q-9fBNPf9D3~_LbJnAx+I^P;SHo^1tTse6p7_Y z@Qk5}$SaRg-|xbf#}C2PM}^RY7?hS3;?IvC#NSsh#Pj}MIH7UFpCndDchrZOksflh z!tu?w@4`343k7qsvH9R8xcW(ifz#mhXgvDb69`TXN9Fp3n6q*gLK6M4{m3Rr{9O^1 z8wu}tZ>)cE6C!5E!zj>3XtS|#LFO&zW6fb})5Ib-Y(=urE{|A|goLHEAWl+Y?arlG zyK5P|!#oj?>NqV9sl% z8BmmlB5GwiO~O+UwLA^}bE6S3F9!3UT!rUf&G|tjQMrq8fZlS{00Mt9r*snkCk!tC^%CwR_Zifd?P20;EBe<|sWB|5 zjk_m!!#z#`3x5Yp^D>5!(h^p5t!FVBkJyYCeTXSF^h_Ut9gTGkk)A^1mfN*mxQ7s1 z8uu)yZyKqsF)P{5-oHpZt;Gi@$4G!?c_lZa&gkFFa-nXs%51gD3Sb`!VGT_uIf& zS9$K9NZ)7bOD}zZ^l^wIj^QW~>iZOB7no&}b&EM(UdVa=Y6n7@7r+NX@f$Qh$hH>MWVomH5z zdODu}>5FKYPMhn-Tr^B>M#tRIqPf3t#}drjx=`GudsfJy3(MkN%P@n!SL2sWLg%6` zEO~4x)_!FTwtjmX_WW=!p8EOIci;c=DIe z;)n156u&?D7CyguK<28?dk^9FC*Hw(7eB=(eTVSL&BOTflDDJ*rpfuR(mch~XD-@7Vz{?+=X9En z(`XzIMCF1u(cpKdJ{V&3#>frhP&BoQ#)S(e@0u+d@l3xm{jvF&xMQY-^U8>Ti_Tqm zziU=^!n;T<_7T|T0UOC=1DWhH?Gw{LvG8H3Yg!0m>DoIt20nSQh;6jMuZYH6wL#|8 zs7ABU%lMZi$YDT8wH|>Lw0z$yzOv=vo~aiO3N8CI^xP`NQAS6FQ9=7K1@t9ewK+m)8bH z6SX<5b0ZTYkzSLH6k2-?OQAJWu}Wxtyep~AYt`_pi-Si+6b9x}o27eUfWz0>ekNB6 zNAskG=1ZmkVwdle@3$Y{r?_HJnlFZC2RZwI;&C5w8ZN2S{%j1E`pU)1ZBN2!vhcN$ z+DY=DFq{_qNgi}h;+7u{x55Z`6h^|cgyySK`ks}>z_Tby{9W_HFf5NNz;c%U05e}J zpgFq?g0ug_ag?wu{qy8!oR^X>`~M?husnT7GYX%eJSo4TEp5VCZkU)UhgCd}Fb#_W zma}HL(k2X+7i=S!+vy=u>cr*gpI`s-voKg*xufd=Sk9c~43-;b7mI<aVR zUG1V(Zrj-+K)H3-aHQ=Xfed=a;Ap{)(Ws<8OkF|Wh?TSk-azAZ=O`!Oy1pL8n_Hlt zl8GOjeg$v#y^peGEkZ%X2Kbr2#J;l02{cn%J7|2_HaEz)DSC3W^Z}2D)HO9?Z@|8; z0cqr4q_eAMCHZ>!8YYUS1w8OM(BvPn;Z1kTw z%lm`nmeo|YM}XzddeJ@g*Z(V6-rv7J7~VhZqvTNld4K5-j6W>gE_^Uiu!ZIVY7_qD z0CSdqg!AZlei8CEj;227gk$SSq*6Os>HV>huyIetmV;w!vl#qjH=WwudGNx1jY!>6 zkBps7bX||E$0+W$IyiRGKJM93NZC>a^WsvW>$!aI0?u4M?&KOjasa0e?8AlQC(wQL z7yy|-X1`7xIgDcrnBND>84y>%^7BWI;L721xOn6e&K|#jOO-bXHVhO zsS`MN{3tFQK8(vpj^fgh<2ZBd7|veo#))ee@%fqkIDYOUoWArq4xBrMgBLEK`(_WW z-nxVvS5M*2^>d=k${646`(XLgMWw)jqk^#s?K9JyoP}U>$8H=)&&~b7nNRV-&S!Dz zt3L$;aHsaYLjfotEAAfn2;ZqF!>bKraCpu}^zC^G_|A8MkAH&?S53lqQXRmv&jX*n z23$J;9HhKH`vmBw`y;R6Ep-O|YHWkhe%!i&%YXhJzS~)e6Ejv&SSm{oaF{{R-m7?P z`2_sQ;*XP7AAD-{$A`usydCO^Lp3$Pd!IY`i*W;Y?_I{VOUHpbj4gKK-q{nt(R0Ah z|AgO-UxIVr`We-?8#nIu;!@8AT&1?VdA$cWu3g5>-Yd8zwh`~(-o+cD*o>Y-zzgf} ziCK&HlZt`AoB{4$r%~01J2!6P?)e_4g7Vc1IDPRHZZhu;gOrSm-lS?VJlT6sXkRYf zyohVP7jTQxzD0FA)prkq)_?XMUM`}xI(Pa3nEme-7v=-MaqSXt=nK5a95BqueZCtP zZ(T+=Rh(&2#5kukkQ2~mt!vgQ7tQkfoIb1(&D`Gtk~3J|!@%q_p&ja#0&!@#f;XcsMOrYE^`8dq+e6yV$m5;JIiQSuZpUI6|pasqPa8s*V@T;$fZ zbGUc?26|3YXI%%5Q@#`%hi;z1$-AdTD_p>G){ZA}(#$vwk2?KsN<(wIFzC(zz7s5` zgsyf|d!EJBn+%v!{rdP&f={t--q*OlBV6pPan5;&272FRYNKx4z2*eVxh(`Nze{~~ zo8MY$4+hJxos_h>?Wy^k+U!&g?kCF3S^rDtxns~nXpqNq{BszZlujN! zg0n{tlN`dS6QASQiBECh%*Qx*>Jywe`Z-P?*@u(+_sQws$0zp-pVW1FA^z~;TW|^Y zfi}a2RJ|3s$?3>4IZ%*ngWhErEG`4FroI|__aO-K@ewX^2FRJWoI!EsFlQiqh?lQ` z=3YUeqGj$85bOlV>7FTD7({1bjdD-FK#@Tnw4wJ8M5HDj?g9P+nlo4)9CIHmci0f3 zrp;5ZKYSzq29|%B>lW&yUSY}>0mnmVqZHyNt^no{p>PXxhVuvyf@f%;6DSX74cZV) zTQv{U)-Ax0SRVlbn1+SHa{nCK%ss-ur(e$BgXNwSjy1}ef+eEbCVb`LwW$J@>)LYQ zXv-HZX=m0^drG#v6GSJYSKAx1ZRGXXZ`B*LEyNX`T`5HZH)1?aNWsT8dx({+GzFEx?-} z{Sg{#0-pZH)2M7LLt{%dHf>#nL|XzTEF2FckJ!RcgRFAI}KxEIi9)mV33E2&~Soh>wjF{blhDnXcXvjirdYtfqrw`AE zxzQm8>iDPYDI@db=l^Wv&Qxzl`_fK$>HQGth(SqLIn;RxNUo*#r6CPD6DpD1oPoH? z6y%SuMB&&<{P^8p;Kf(IfyaLG6zXO)p>Sjo);+gQ=vN;5-ecJH@@{C0^;9o2Ol=tg zMuZk8AgV$yfCO^~Ghc3OSu!*fCb7r}l}&}{qzL(0x5=Otuw0iAheRz&Qk-a#IfXXy zNh;`R18K66xcMFze~Xc;oClc<1uR_}=?JgT9vLqp_tJv2v_{Zf-g+ zggYYPXimphUwsLkOU7WriV29eMox|U85%@ukH2CjW9;qXog72uow zlWWtY{zDUd5Rn-#E*~~o>oTCFaTZDMgrznex(X|d_36TCoK)*TJk4=&gdMuS0g{*^;K zNrEL&Tvc+MJP(ZzhhJO}+~a)3cqRXWfDM28P(FM(=5Go^s6z#Jt)G;iU2kIuLTu4e zw}6yzc<2M+nnd3n3hQr;g|9VA=6Eivhan7J9EM!JcTEb$(4+uyhv@<_EHOy9xn06t z;S%M6fhs=?Qv1Rs(i1KrL&(nyuG%0BiKj3@gWwYC>UoR9FJ^T7bujp;&|I)wX=g%2+H zkb(~=B6AX?&skhzh9RXP0|VkbV61aMTW*G*B?_VGl$Ir0XtzS?`^84A3oU1tiq4{wL%vB*M zPc4UoLrs2AS0;lE&IS~y;hIi;lopPFoH)wcNcBlTh&3KT$*~v~R!GLi)BbdB;va)DXqhG?rADaAHq)aD?yA|3Y13|Q!!nv|0)&-q)y zt~y;K^GrgXMt%jvhS6eaO%P)xnF8Ts3qojCtkAIxGy1_rJqSLIaIqV} zyyydUKJc)HQai*Ts?2~vMt?-mT$p>ZDSn(YG_9i^{a12FbHZVOv;( zjHUHZb*4fyE*(~$e`c1zv7j0`OB;|jyIeG+U37zB9-D^=kI#jsp4vh+0Hrf(g?oFD z!4qEgK+Jq<5zQwKIS5<&(pn@prP6qDLDTY)nDp3OxFouX!C)87V4c%yIO#C<_n+r%wpjSZ`?2*c?)O*PTzv^l_P~- zrh?+utm{Jk<_V}+HA)Pfa+s<$ooL)VQ8XOOmyHmqUNssG>&J=Iucx)r_6ZpI*fflK zd^%l^NAUCk^m) zfhkQV^e5@LsnF7#WwILuERT$%aX*;BavFo~0}v4xihu}j4D%U?ctZ@5%<)LewIE&> zE%ryW$tnbf`@%QaQ)HOeAovD(BO*2oLBYOoSW}Q=w;_wx#+GC))G?t53-%F-qV=rX z-~muYL_imxfP`53rqO!9Y)pd9tP{iC8chTYrg(&DLSQN~qh?x@9FR1w8HM)UlhL$u zENZuPqMoE}??jA!eh#L7eX+>o7Z+jtbMr9yD+@5~#U+^j)g|OE#-!)wW871-zTRYj@Ubm`gFS7x9^^Uk(5r?(-fA{ zm`L%*K06Pclx_!w;r?&gF_HS2`iX?^8@7z4z8!;_4cw1Bu1M&^~O-5KL(~1O>PAYR{YuTVX(aaH3Q=u zUJ1isbAO;*0mT(jo-3N?oCe2zSeu-~ayY*JGEu2kTOUB-j$bO8<`}jE6)-(vHTD*5G@^*F#&}!MxEMP4Enj&Xi19a1}@a>bo z!YkMQB6LUtCxCDY8`7n`(sr~Wd3_}^C_mP2XDSpnI-0qq z9i|lwoHJ2C_x-`+o_R_kaE<=?{!QN*)Ht`wN5RY_L;!$k)<)xV%YhLVZYe9{H6; z$lo-I-j6X<&r!nf&NMd8LkQ~oEl$9kjUlIRsS`JITLblHGctBG3P5h#Tm$pwDi}AE z)0nD%oPyK0g5+z6Pq(%xrj31;n`j~?1ZF<5@&_~$rwnB?FW=stD?Ck`11d1)N|E61aNr7LMIMMeZ5$xPtS4{Rp^z6DQ6dLm%xCd#|3w-BU*Z zmJ1a3BZ_$HE^y>BaFqNmeTMG0zK=ss?gifc3n(xypZkRJJWIkBIuB5u@8H0M1$ec1 z9KLw@RorCjo)_ua5sFX$_>7XFVzNFmV}qY>nu$NyLU76vg%1p&c*m;2p_U5Z`KN(1 zS4l47`q?jV_xd4F<4_q-x znO&vIv%$^_*QuOW#h5CtQenQf4R6xE?8DLyDi?*nO#RV&3O5CJyhd$v9lcjB;!@8= z^xn9Jdl#uqC?8zBhdv6@bNL?bQ1dX}d9C*n`mS8Zt?Rd`Sd`Bd%5UHM_-bj6v`>FP z``;-pOtsS2a{)NEA5WAP0H>(|&d~s&GO;!|*b?lOD>!%UgzyUC=54CjOcw$Rjo;xH(D>B@QBx((c6mH8_q=X%h4;go>ZeSGM_ha%KAeciWl@e~ChzgwIa zhrdRNoMoQzGq`<$%0lgWkNWj&PcP0=qxSV(!u4}!(bG*2I1V@R>9e>=#XNWGF3#UR zgG+ag;L_E@xWy+WckbXUmFd*&^SDZXd`fZi64m!wFYcc0rtJ7o;5v=lJ{+TPmwWnf ztB1;a@hEWP5}3c}CTDfM7uWiFX)sZrQr*rl;r*SfxXha9y*F{2#?{T2n{MG&R2kXr!b)I)Y4b9()l1lxn^E?4&&5*zpow7n)lR^ ztZ~j@J0C2t#y&q6Eq{v7AU?i`!-_y)o~AQY}XL2&g8hKGMB-26i@%sUW+ zJpC}l(;q{;1LS^~FNL9S?8?25zX0T}-rn#Iq;!0J;o;{;n}cu!(E>k0rJ@Z&FuX&8 z5fvAQWP7SeRDwomT0&xD;1Lo8_b@ih849n+F!)A>i|Z2+2G5Al2mZ>vXD9>XK@yLz zS@;>#uXuz6IJwZn11Jt_oBLtGwv}j`J5DqN1MF(}XQ<)rpv``EywI@tWhWpYH&I;o zv{-mJR0zmRLQrus0*ed?DK*KpqG7Ip=FxR&P}kXEY0gGUode1BX~>;eg|b=A$Rqc^ zK6?#|_bkKKuWrM{B@^((cOJ)AfA%6~tec7Fe)1KRkFG#gb%t#Ei>k6Qa`FhwSUD5R zcdka~oN>Y{tukux+&5mt@Ge?7l@&pyjl-fvvoN8p7R9lln3t4*9~si{swEqbrKF%e z(hv3sSJ+cRk)Elc4WAkb$x(>WMItOI65)nes0BpT!IY2$y*iFIb4k!xk`R}oMW8A~ zG(-d9g5eeK4`aC>qNu2YH_>#?7MMU2iocS2fuy^i&spdjbaGe#?|4I z6Mw}EKY1RLS4~4vX9WyZsgg$XGTOYZ9E+Nz9jII0f%;Xn_?=OO&h4{MG?PC3ouvZY z<&G{x+oCZjn?j4V_5xT(netMbb;_{v!S+Gk1fH^KYLZUm1k{R0DD6gvf2tz zF|i&6qszr8CsRl;9fy5*KC-&Xg}2p6aSg+>V4`%bqY7Z4J}jG5ho5}>8~pC%U+|MJ zUd7|TeF^q4#gZ=r#cYHzeL|_w)3C;5>*7(^^@GPyKfMWKS583d+;-S#JS=)_DHcDz z3~9}oSoW1QLTO{CG#E5VpHv3N8(uyACv>bIiy!X)B}Q(WB9sA4+rz&^(2Ph&;k+iy zeSQ@!GtS`9y;Jz*r>~-p>Y6vQRDe!ZMm!?PO|nKHyWC7m8d`W!*dAQMORszl!D*4G zn$e8m%f}+2ECmIl%An2CBeOIe*7RfyAKQlKfA%fRrFSMS*NiYnBJw+HU}?-jSQdkR z2ADf&{7{{AqcTvqloq3lYM_~z4%?z~=x604c@DM1;%WiJljoF(tD9Yn#Oe9MX`VoC zBJ-NlGv+yG;cNCwo{|q+M><;PHRI^L!eXT;0GW42tWSxXZX?QKSxwa zJmTw2c<1ImZ27Negcm-kH4~8)M#NR8LQ`!;JdIOTxd|~e->{oN?~RVel&&tFuB}j) znGs9#kE%390Cffx*{EZDMJiM!Hfo~ZB1JOmv2u|0ChH-c%|N4Us zLdGGptpwh&f$)h5qIn}6kp?wllj9Mti$%CLT3o)5rSZ)33%fCfI7B7KAzH6SSh5P{ z`V6?50^w^5mtQsLYn?_K(?;Zrkw!~PmK<=UG-b%aRT8xo`|E0K(msaTOxQb0kgPL5D92l!< zeyGeuLNT>Tt_kslHs~udV5u*Ft+5a(wRzB%*b$RsLPUlRLp1^LHijWIH4cMSUWiQB zLSJS>&WLic(GZtsgbyv0St~s%BS8#RhS7H@DkD+is;J##O3YMeN|(wTL1hcd(!$FY zgRne3!t)K%7g0qf3`h(>a#OBoua`_`1DOtZ7{lRbia zg!1NlU3EJAEHN085J2r>g^S)FVKm+X3X|wtmkj@cMES*3Tw^*kG>-+B7!Y2OBG0^Y z;^CPci-006f=ZI$mm7xxMnAaO!{D76ErvuRD`>uH&49Ww75;@91eGNrurv{2wI=u! zYcPb3VU}v)V)jE)XC5MJ%)0#7x4 z`=k8e9_^2z;ojo)x;<&*}6(nKZqJ1zp%pC)QhhbodtH^-h zAs7_uhM`d&6y62HG~~t%!>}Z8Xs9g`Yx!N!iDBJfscQmUbE4r{q(Vf41p%x{U1NZL zQVCRJXnc(?gqE(g6KUR{Yu$t*7{?U|4b|s3iRO)6LSdG-ypiS=s`C_wYOY1S2ZGjau&4H*idj4bW`($4r5qO2=pTznDyLZXls*&r@VSjJ%+F8 z!a$>!97asuGf#|1^I^oyrp!qb&B1`sl{yb`kQt#Ymle0M!6e3qidEldd6bs=We1A?V=kDcSj(?OK7|%4MT7y z<)7q+eK!ukEyfi?Lk7c9YC|H;39dndG1$iimJB_r8%xDFXDE#`0nF13@Srg^#Ah%9 zqWm$y%>_}a0C-aP$QW-JOwmZTL?frr1XnK?#A^Hyrwzt1TI2Z#yCN*g2SezZwbfbE z+|Qr2##JcEO-Fi~9&z+e`iBpM2fg1zD1MZR*4{&1=-Zxzgm^6?!y^zL5d=eu8YMI@ z+jF$Aq^gll49N`-Q=bS>zqv{B;<|Bt*zMmg z4A%E=1Lax&Hc_sXdzSuf&7vGma2UQHYk`!*DHr>n=KeT@%;rI+7XYU+MX|e`8-EU|W zZEr;w%uZX?OnFdW?;4L>wnIP?JvI$n{`xh%frAfdR8lwIrzK%vn#!wy))_lGVBgdV z>-r`M!+Eo|Ia9DOjZ79jW6kmu8XM*(MnOy08N0^7GOtF!^8M(RL*3FXV_;w30_)~B zF^b9UCGE^=;kqlL`1J?O z*{~-cB5=Ff7gnQWZ9D#oqiBC(7V_87_*hHhgpDk3VsM@Te`mQluF{Y8&CRfFAlcaH z%!l3^7WPlw#M1~&;}nK=hv$yrvkOP@#pP4DaN{a&^j*VU26cO`;@stK+`}#0ICm1D^fnZi z14rrlY&XdnFi^@0tBmil!fVfsZYT4@wTnV0&2|{C-e8&*y6<7-REo#I`y~d3NknP4 zTbLs5_E5T)&eC&M7(Oe?t~V~7A^!`wed`QvoIilOpM8qkAAf<~Gn98<4}~Z9Jjt0$ zRGvQEymSk_jFz*1_YvUzH-W#BeDpT(`TM}(FQ^{JfD4rGwX33-%nHh^fXn4pa7tD( zX66e~>J_Epi{wxB6WsE=gys6&W8j)Ky)RI>bChN;mFe7Roc{iI@Us~+@T=L&fR7JS zS$lE)^a*-SW$U|vzSF01kEy!v({?lC1}hRXtHzD1PAY0v5I%nO9IjLQGu6$7?&DM* zsu$CSpE!tJrTLUEm8Tz|{qGc)6L(nyn<{+d3p`VNA1v>_jw{>`tWJ8KDn}jPhbv-i zlKF7Z%}6-430I14MM<2JV9JlaJ2!BZPh)y+;QU#7%BL^adnx=`p;0+anKDT`^UvJ9 zN-nG2-=(^rx(;eH%8wfTDs|q?)3|w?I;p!4J?HLGyn8r*=ML`OrZj0V-?&PR-+jM> zC=PSzoV%M_1)C2{Ho^($w^;5ceNd8_i*!@CXbOH!w;qfcQ`!CtyC< z>poykehj2DxXxi&!`wR{SOD>`m>2=cJ^lUR6GV$?UtbJ#b(Lp+At3^m8!Q$n6NhC# z2F$%eg5ebwBA_^f-VByI!Ef4tlOKcO%5&vj@e=?&I0!yrq415M1^#`o+#{SeFcEZ zT;k*`XDSvp^vPg(OuYk|#&p=)^U*MGgm8b2T{{&8T@@(kEW@k&-o(pqejh)7@0VD( zb1}Y4*WEaWw~zb3%Qt?F5#vW9J~HWDAn5X3EC|oz;j0)?_y85Ed6MR0*NU(L%Mr zTCF8B=%YKf6s2>T2YCML|8I8=g zBB6Om?vWJvWe-&xvC;MYIO-JeEdZ9&O?bNJMC7A!@O1$)k@8er<{{(w~^&%4M>_}muz%eohNmWLST|FL4pIU~mP#!P6`VBamGBIw=BrJYrrSM7r_>*6uct#zP zTO3HCIB9GQZc2q{hmyj$u#ys*9@4O7ga$&uT;b^pXzd7_+B@+M6^IN zJ9E%VZSmXBe^c}5Eikud;PrFwV()8TM<{FXSKFa$ zp)uH;E!x_w!L2SfA*R59s5}Nbb%@NRF<5Rze5o06B`G3&&EcZ+^#X`$N>XX;+o8(0 zAS_)6e@h(v%xVN!;}K}nAfY4;`pPWmDl!q9XGW+aNy5eCrU;lGk!KWeGOEys=pxF$ zn8A397zR!#PldXW!jXhI5)fCABJ?A{Ruz2p;fP7oBA(`y7?VbT@i5jHPmD&0HVP4X zm4M?av-W`>UnixT5O34T^8jrGl|2O>rXbN?XCPcn^Db*Z^T8QwLyP7+y~Bx>Rsk|u z<6d22kZ^KMWs5JiK~-QzbgmKFvNTv4sefy8#4je#B%mw%Czd-9k)?;XDO%{B;;8;Z z)q!x+&^Ik1RIUd`(|3zR@gEf9Co(wJAH!G^p2B%(!^Cxs4~CCE5@Ggu5eCc|EKe$- z^3XiUZN)}snYM*Na?hj?_!%RG%7yO(EV0u5L0L&qm)j9jLj6%-LU_Ir-l_C$B7Z-J z20r#U1Y~I8k`MqxV;)>WhrrZQhyd!7n0)FlswdYmmae%CqH?G|?@Mr6g4CJo%lEp< z4ES5s7_14DLjxB>kbvcZY>T6q+9oF+F}103%|JPW%aB+K9*+tK<_#=||A_ z)zuP-2pZqPSv0mvtx_k};t#VXAi3CqKwUK4qXXa@Piqy{H1{5YXiE|d*{MjcE<)Mx zdK9!&qo}!(?h8;mrWqBZXnt+05<0T{#$x0(mx#;rNEyu+`f@W$$JNNMk65GMKRp^@ z`C5eWfdB*frHOFMQ^Bo31^?<~c$6i;l_a7g13@FH9-Wy8AD4^h33-SapNCkwk00eg z(#Uii!v(Z&9*;zte>9yoq|7ft@B}j=7GxuFbvevSD-h74gJE`&%tgAnH18~_f@%uQ zS<~rzx}Y3si>hItRSK7+fykU(gsFRHL0{tp%**CAqGDm2P_THXM_}q>3+OvlB=<9( zTnx*|TrmzhYWs9lEgwn!?SazeBapwi1*x+uk-4NA#hYkTy{K5+wkIdSI;RlzyT+hk zbpvX)jYQdoR+OzDjI;Vr?7BR=1#Nc>@ZT)}ds1GjirsqH;+K$`>}mN`00!t^l#c z@%ZH0X9!60ho9O9S(OfG={@rd83wn&!7!z2kz1Tj-`PaG_J?25cIyVV?b(E(-h)K5 ze3;)*_=b8Qp5_6S+8>@?E*Lz-1!h|ebjhLk)hpk^L0aoQ@$?4x2M>YEKoups zN$P*K_NTK<{74#4?o6twsLK3bbtMf@4Y%Dpxe4ncAvt`&i^J zszK(0GSuztL@~D)x8;^`sMyendx^4uDR<|L2K^5IMA&1&BZ)FpWhbD3xWX!N+ zudGMzs%DZFWK%f)l>`Gm{L3vCzGj2h{0l7ov;r}J&4#c03)}cenvf0cxJ(hIFk?v= zn*mK%I@F`-+cqjy=*?m}tOBw}w9$OT;Cp=%YSwgM%-$LD>k9@3ncti#BOL1*QTEh$ zFvUgI?sl*dOwq#JRExZ=jVRpKEF#*@+nnHYe^G$eM?LE=Uk1`Devblg*^lEXz;FMs z{e{E!&+FlI7<}dffV|zq#gJy@&QTco)HJBtO`;gUhYD24<_OMg*7@&4fWqrh?nP_KDnlF+=kWcUb2{e%}6Qvc95sKbO>=E&a7+S&~G4i}0D z1uQSv+Jd~zO#;$$-T0t^>%?Idt$e=ccHnEJz5b_QIj5~?^K%&XQ^L#jePEn{ZwAb{ zoGh$u{jUfEj|@PvC}6n)gfr01*9utPU%t%$%R~X>1t2D2@RPN<>#4u9=^cz6lZLMz z{sn$<`7N>Yz{Zc+&I8+iV0#V~8%LpJ<46?H+|9-$v$u4JWY9dFxqeqhcDyzIEb9>qy7$5W^L>K+TH9jz--yj^Z7a{fgUgXNu1%%gA9Xr!)d7OAUEl?^Wgc zk@yHF(D}?9l+ZlP8t1HyFNYbMonSdj#%2b}osvpv+BR@|wg{;1@<$(Vb(EzP=UKndM@;=nAb-7%bm^>T?`Cxeteq9}q3_BS*>o60rQ#>BAzd zajs~cE240i3y=Ak<6kOgP9GPVmhQ7B@%j1V*mvoa*zLQ0{W|V3o$=M{xO?v=zS#FM zL>u<%6>M*62hP*8eV+;7dFT2iTqF0|jjR6_x98?H^xp0vaRTxeuAaxa%V%+!@@2); z{))4Ya(gacK+l!)xPIlLV3X`G)G58!1gpE=_pg=XQSNnednk{4w|jB-#&z7dcpi5z zT>_~6SbP5JfkPyRA)xB@K3q9|jKNS)=D2q0JZ|6V!_^x-B)#an&Ya}8L^=7^wcEJf zdmEQ--ez5C9P7P+6PKCqhT>8`Vc#d9fq>P8MRMTqC|vX3Auh-7(ZFD&{`1fA-RwLn z1QqJs6 zzjK8)?LD}B=MJvlrMh)r5N+@q_fFtk9}V!UOo)FEw|nn`Ey$ju&bv%Y!4nsHaP9Uz zobNe{?mH)N2uJb7?PD}p?$UsuyzT&(Z{0!P1t;H96kWb2;CQN;Usw<$2}an+b0x5XGl(7xl3hZl)n#myU&ZZ`7NsSEh@+DOIL8W z_Y|&OK8n8HJLv5r;h!noK8-#aU<|O|rk4smd^$segTmu{FAWfClq=nG62$TPs7!2# zlxbD?l;-Xg3U~3I$la@a($p=3{ZSqBpOXJASbpxv3E?b1a+dn+>`~mHmyf~nfv$t0 zO->fh@`u54^PoZ4QBf&id3+FUa>Jtp_*Nyc=1edKd3e)?V3_#xJ&U`45ZwF%9|+&G zxC|PK!S3z?kTU?zn&s?SVeW_HR?>V2&- z55RJTvpl#!FT!BCPi8#4N&NZe=ycC6gXM}aXwHCnSfvH3#tflh`PyH8jK5y{0{ict z!1w?93p6bliH>FC@RxJ^$?L{jC*H+|7dGQ7KYszg{_qv7esT@csvRh5FGk(iI!s(N z36mC2MtZ43+?Cr`;rZ{qfIi&94}SAwR1L4i%m4L#y1$J-e)KkuUO9~oPi%uR#|E7t z2KfmA7^e@%4x1I<&Mw3^((Y@q$9`} zfe3vxl2dhJA;V_ zc#Y=!tN6>A5Ao@xeaNWKg*r14VKx;qJ4(^AW-3g>ixHb?z?tjk@Y%i(@aboN#beLy z#?VlA0gH!korS!2)GlnmPxk#BJASbn>QW7C9T{+p&ZB3i z@ci$;3v+9ZXhAa=9hIGk$aD=tY)mZ@2|r^ve3QfAt*1Fo7c7TWEa7Pk#A-x4nXiK^ z(eN`wAjG61QNueS3)&%$_(tH^oB5okf9e#!= zxM_mnWe67locX&I&^J6a9uam8f|8>sZXA5IA#i7^l5lqf>LcJw@jRk@5Xc6JBLm=B*a5#N<0$%rS8GjD7b3_ z=sFy+*-2E67^re|LL0;F6J&{$db8_qqB7`15tT+t{LhK1C>1n z@maKSPt{VJM8YGEz7Zt8iBw->EW*rj6fT+KP#!j|v=O^esfi-d_9PMZ54SL7M-t*P zjY!Bbi_7siy+A`WwQI2C6QGZhyg3hkrb^cf|F(}d3@$XEdTB!78tX6DKDr2m+BEQ_ z_6)Hn$S)(Jvy(-m-QTQ2kS$&$klH^oQ!fCThb|m0{sTqZJtoHpRbC3BvJ41K(@MAi zi&})^E5d2`Q9H3Fd{UVM!KoSyqd6eNp@B=ZI|9-v4vD`*B@`}9<-*s&SsI~d3CT_n zVSo1HXJRPZ9*fvK`gStyizyubwn*VVcQXXShx#ZiHvyjH=a;2|UnY$qcICTEW18km zuS^xfiVcV;PDVtb9zod}_@q*QQkty&9$#pNw$O$U3)PFpvnJDoq-+a(RUvTk9SXN_ zU%2?W!6Pz|+Ga3~GZG(Hx*i1AP;Yq01POJ^&`?h&g^Tw<;fHte8${vgn&v{*$Q>Lu zl+trSD2=HYYLj8{-oj_k2Qo}e6H}Uu&>}qo^65P-Cbx*%rzi>GOs&;yLtwL2fb+QV z`Ou6nK7>wEElj`KdTU$>A48$ zv_Lzz2&(BcA5F=EeMKGOXkN~qZmhUQaS9fin2_1cd2Alm+x}XIOYsU&;&Ok)_V>6JqydLR`%2BkoNkDSG&RvzOE$e?)IX& z`*S{7i>r}A^C`z;zw!<3a?jUUi)$rJ_L4eD(=osDe%j6V)Bk&yLEJ)mp1-UHxl5{$ zy{JMYhw{i?RD~=`H*;P&vgcL7F|8Qoi<*!-y&QRyOHnzu9;xl=_~7a%h_Xf_${2~9 zs!YTrN5VB=2!{9$M1(4cBm~)cX*f$8#5=Sen>Bw1+=jo#a#LtTVkEix(;(J|o^Cmzv}Q7|SZqO>3v zo-`Kk$xiG%e)EU#$+!%m`PF5B3u2;}ekBPkDMi8rF26U``ckSC2sR<}T-f!usJTS>J~GofA;Fx(zwY z8d1J+l-yTsWgvYx3fHuvcE?zhZXSW64b+$9mTw)2l1OlQtlTf#JqG%tpF-Q(qzOD0t)b5!eR36NI&Cl3XuKBqVhy6Hg z;}cUPP4+8U-;N>K!RXjK4Wpi#1@B5VZ1XEn_xL0+{F$<>@&Qnry`$v;P|GwR1>0$? z?s9^^4}+`!6H$OyMHH}>pD_UZC;*r5Ic$I6SBd*@ScMMdVa<05x3gV%i*vain_5t@ zgZ3UzPDSi+qtLLhhCUxi)ITvvZ7J=}i$tUmzHu99|t&GP;rIhXfe5eCND&Zdn%QI;1%%^uXZBY%rd*(I#^75a>@G=``u2@0sIlmUU3u=+Ipa$s+ zYhYho0}IWO<|WnQW-M<)`jQ5bjHQjpT~7V8g2o8TvKFCoDOyGSy`1u+wD?z}Nn^6G z{SPnVZTh+~_{zYt0xGks0ML&Dnfv>(rn!Ahy@2KV%}q$6cT~N$4s5hCeQ7gB?wu`Q z`KZU{(0noyHvUF!ZWHcqZVSvMfM?krhox$x5^bXK>GIbH{nbwZL2RJ74S<#x|!e!0|Rv!k-83^aN{}*8SRocTH zzkC=6PJe+zr}pFUiGu=kA3J{NUjoa&3@HDffaUwn9moFrVEL`y>$uBc`L*k~b-P!T zTygahK;>9l+lae=c*}X;eG=DuF5|+D9#NkCceqz>-@@hF%-wxM+^ctPltAd;N zrH@t?!tT*`g;ompXg}VEgB2fYisxP+!Ih6x32@Y z&Z6(wyHtbYxXTt_@7~5W=H0n-3wO>jT?y6h#$DXGa1~d3PT|sx(>Q(cw1CQNOcR$* z;&#vHxN+lvkh$Nb4#Q=N(|sDZE?uDH?odb4QjNJ=?oq*R9H(X58R`T|>*g(7ptAIE zqf@wEdI4_IAivpn1J`fe#pRys=;^yBzeo^+pV!Xd=6kiK zas2!h9H;PSsP$PR9@ps^TUWipb?Bvz>ch>8oZD6O^q#@BKGs&J`rbT;>o>d6*V}_T z*LvwO^(OQ6^qr$NIV&eB^0S5B)3`$m)f-o@3Wqxz0bo9LCkOlAz;bSvyI0T4NzbD? z=07F>7hpMCEoQL%;F%)=mh+@G*nKDx3VU-*6P@kapViU{S(eK7rDu-rQ;9PYt^0+xG)1`1ftR4lAj&S3fAP%q5duo#Uq zMhjTZn&nKx;*+UH0Bz*`a%tnwzyOJF7H!n;gXIc;ISXr;D`2@o$HLm>43_Ihd|=HsX_(PQ>(8 z(=m75JWN|Y9pmPY$Lc+6Fl*IZtlYVVwpqRO2J~U?H=ag%WiHCw>o9ZG0u;4Xi{v(z z!BS*Hdbt5vsbOfPjooss4lg;1@YU>c%r#q45*LHC)FkNBlAyCY!E&3;sac+4vx-)^ zF4ZhN@{XJgnC%v!_+UOwqr-%`>lY%wy;KbRWsWIB`Ro>y&uT=;lp0LhJPl9&@Nqo% z?Oj;3d?HqEoP&AGC*koIcVffd)%gCa-@}4Ui%{8Bht9?0Fni}h{MYBd#i&)|vE!$Y z;q$u((7ApbtSt^WhG*gXfBq4U-aL#iE`5&oPrr*rdlth|XG7-bLO8~ej4wgjgd${4 zC_~P~QsEl6wq}ZPOmkbd(6#6r9ndwT3BP!Jl^Fp!Y5~L*u$ma!b~G;=iTVYtuuyxjK{@`lK*^$JWX-8V_S||D%x^))#0o5Wemy?xJ0gbg zj@>+o)T#^w>cd3CylKgJMAm0xaAqP}m(QYa&OO|wkNyq%4m|nX6Hr^U7`tvRTudPt zkVW&6Jp{$eMx$fXbQzN|4mF}JVF=KAVrbL=)KGq{^I9-e>k6;b0Ax)mL0qdD;Y|k7 zdgG0SeqlNEODYjFo5sV+I;YmS7^KQTR2R*Y)AI!^XP33h`vc{C&(B!+n&Yu%T*nhL zun*_(jYB^G7D4I0$1l$P4l94M8SmWs2!HB%7r#9ADiUf8NUTi8C)W>R*Y}^qz!(pN z+2Y`)@`GobAH3uI;iYEE2rmo@9R`=6!6Hl-;j0ORUqTQ95jc*oLw zOmo~oe^)2)=jwtXK^_RwL?AdJQVbmXt0_E*cQno4q23r8>?vUe_)$I{1280v#)R6R z(hsAw!vzHQQU}0C6(F4Ao{>KAi13COr({h>cNYYzgAk_S!%7MlPUQ&mgI{DI0%Jnp z8xeq^er{s?jsYLm!sPo9bvVK`Q3!|*mN*jod3Sh}~;5G;`MBT41 zmnjgQDrXz{#0QBxB-{fo{)4GL9teyNL$omtVM)>OQ&IXcly+PwwL`e@^GE1o;U4be z)YkMGNcHg*Be%Y>K?tID;$I-KmNL6c=fPUb{O#bdF1|xBAjlnVQU2l|pp6vQHPR0Q zDR1^?x(^QH5fgwxA@n^Zm;L<{!r@K%1SLg@HuRtn4|*0T6e3I+!tprlz)%l($A`dA z8;+3VSVWlP;Yn@mn?U6V_d;B{0cE4=;Tr9SVNnba50-H5u>k_kdul@kfFB&=E3O;0 z5d-zEae)HPdnAOwT^$Jj;8x#3z#SQ-x!QKlMehkBE#@kAWEMNACq)4-0gMSGcbjl^sNF=N3YJ73PUyLDUC9 zZWtOk1i{q)ZsG2TOVvV`YlKViP(-Gx<-mv!ZkV5*%g6@|5jjq3o9HtBm01cxYK(}Y zxl=!}5XqB^q3z6uc4WHnjPJ(@p{g>rrlNd)Jrdh($Xi?o^Q>Z67gQj6Oe*p>42N!J z0TO2B!?LuR=BP5-%rcPB2<`ItBvyeW%fWFK0?WcBo>+CyX;FG~}R#pg&4~ARdP+Hp# zlV4#CqB)hno6T)h*IWmNxDOJWA8feOEx-ewB#|*R-}nth0KNZ#!ER8ofjJv?|eIQ3$8&*vJT2t$G|f@*)26{wv5Uvtj_v zgRF%K`(S)q?JLZ?cAk=6l5oeI%3k9_|-U%~McA7ky#rO>3u!c=V)dl+J5 zdugkDmmL!d(6Fill}npZz1qnKpE|PyRhvgsAJ!nM!;HvwGxces0Oje6s$rX3hQjsK zw+yhXYCzVCI^?XW7lVGeYpH$LQTuObM&ZUb;VmxNI*OzN#al*-TeiIu6+2nF#AUwY z@*Sha<@?HAV@bxKXxk{{Z*6z-_HG%D!mT4wxSi73KKg-Mux$kLH;)jvY*!a5A0LP6 z$0rI%%b-4kt9Eam7_k7Lq8KlkFMC13qp90=K9G*d21vF=WC9F~o1t?cU z@s}_=hKpu-{vJwib1SNLjs9<%;3@u z|AjCx{4h|ifaRq-x&%<=Uv519;dk&Z4q@3(w_)V&sc2X?8snatBlZH=uE5A=W@E(D zv(QHU)cV{k41Z=88n%o_?fNmOTuJZ7vNlw#Xh+Sekra0f8rOG;{fdgkt!P}+iP{w% z7`|aVn%9iM^M836ul4>_fLsMcRsiMxAT#?b;IneC0MiT}+g8>79atW>t{zsJPaI2{ zgsYsv@)5gdilI_AQmTOEN*iz*3UK{*X_MQ(OkXCf9o|2#Qf~GW&GGwwioYTpUgA*x z|Elx{$ypD>p*Kg4m2etI^Fsm_HPMo1eo;H`k=430App1P3_3;u7x z^24VO;K<2C0%jjSarmEtmb1bvgXI@4o&|6V z7g+hW=PEX}wgc~f2pm2r_$4l0z`e_t{%yiIA-h5g!g=_vh#O1_2=E>&J2Xf60||KLZs2kN{Ne+CYboTQ2zI!+a$LDYL3y=RocM2$g%9;g0F9sDT`z!T(8_eVdW zJP!c}Den{4(Q}i$`84OkRb2Y%PjThI@p=gI{d7t|5gDE{$3;e%~c@oG~M@XX`Dr=Q`-lP>|^eFONM;+(!9#PST}-@Hr3 zx^Rs;`vxvw>ZZ=_6N9AZFW#a)x`j(OFXKY*U8mfjLD6>!J=bnh$KS^7%RR#Ne)--> zoVt5djJ;jBcOIANV{z%$=eXQ+Qo!dcy=-{&K4-abh_lhoJ5IiECby>yAJsAcDfz#k zVL5sDu+XqDZ#n<8gC`$XZ+Fq+w&*PamTS_}{thhPSxK87mx0g(1tTOX3V~sfLZdQZ zs2f}c4#dD=wD_m{p&s5C>gfqrFJGZnVUBXqA`cD|zXttNY3Gy zdPQ$G!HehQ&Wsg}|(M(QXSaNJ3yiq5$WLus<9AWMLpZAYY3h=5oFN zlXU*6I&-^*mKmXLN*8X|^*?$X-+b?9c;OGjsX%sn5z?D;k=>Gy z^3E#cHs!;ZZ^VchBgCj?d3zZe$2Fm(sTfV;n^7^M5=G6$;#b$zgt7A{V)F9YSpW2P zEZw~h*^MR8<=J2^%@obXAVVZl3Uo-z(;&;HLa9CmT_yt-JF>9Enu*C;Gg^|2C^eao zYEOYa(~P8S8w{B?q^6OirXs5#589MuBtE%hCy+jXqZ0| zHS_7?J&`t~U8VTSZ(hLk^;0onPCJ^Zo|9&c!1sUtB8sZB5E|!?lEwnO_=B%t?>F~i z?NjUV){(a{dT}Q*o3qe3s|oY>%){5-_!<^Ju?Phnxp?|VPoM`E@Y)Bz!keGHg4aKP z73y3S(nsYYV{AUs#udUgHdl;B=1eR`W@o+=sBO;@niHl;VGVB9Jl8g*!qkyXaf-#T zroJs*!s%NaLIWe*6?qj)XRfKPn5_78|9Vg@oE<$}bl- zO50p%L~L3(^to}+=BN>!6^rcAMX)w!z|xX|q-tv8Ix8}}ilM1V5x|0f3aTvi6- zSySFIzU+ZfJ6m%e5@>9MQ=h7mV-TAVDMmcC@iBjs1UBp$Pkp6CK`UEMTj*3qlMLu#~5veoCwGX8RVB6ggmMs=~x|E737?DyA=6jK(fnuumL? z5W5!9#TJAWCc{AG9kp@_V$%~Oz2G<>m z*iV4+Sw-+4VH7Q$u9uf#_AfRgqQi{&Kiq&-|Fsj_UU>p(WAl($Z9vJy3R;q0fls_2 zykdMXB*+yilNup$A&AmOB04b&Au5`;g4{94Yaj-D4}z=zFoeg4iG;<4%JbmZAQ8R} zRfixT+#iEkt9Gyp+W9#nP(-LB5KQx;Pp}W%{U{H2C!Ih* zOpqAcjHK}q9v^|gXqww2{1Frxh_KjDaozpg=zBo@H^>EE{vHU64uL8m22qq|2wjJ$ z!l({0P#fYAp^1Wfpr`yYh0`DGJ(SXp7J49d{VBarHRl&CZip&Wc=TQU>AS-qC&lv) z^^)>%{eohGg&&y9#dT(iD6YR}uotxx)tk!2ZJ?%iC5F=EYoB0mDpxSILyVN4-DoNo z16^DP2BO4Yr=q!vzC%=BMH8O2-hHD2;StKftCzDLo`d9Bs3uZ`!|*-F<9ojLrM6{o zmO)!ClLxhX2(>4JxvXi=Zjd@m>}hcPh(s0qscwUPhf?|j;S=E}hY$YIfg-~K+~`|I zV_6rAR91q_u#60u(qMQQRc78t;f4WRF@ zCx(Sko!CFvX$Qfd+auf?K`I*0`e>>WZV^9#)N6m)_6gG*z>#9Jw(t8kK z2t%+bQhrr4D3Zd&(|0^B00YC^1b}B=`v48S1Jn)-j`P7#WKt~j4wJP1U>`U5g!8xG z4^fF~#L^r%)Q|eWeV_=p7aN~t1GBLPHI&jH3y#c@ra$A3G1>N#7xaX{G0-)X68aW zzZmIjnxLCggshc~sMtJ8w5nOdoQ(?)-#!^JbtxF;2&M01A?jC*7GtXkwPsAGZ>yQU zdoJNFnD@eJ*vA%8ykTfu(}fvdSq>Mq3)1J5qh{-9p;l>qY!Vza=drXuJq@domF87X{-weIngd7%yU{$r2QoCz4)$_|SBMY7X^t8~^L2P^Fk)zo z40WTiPUC$b&l>|>;7em_0J#z2!5HA;0v``g#K*)z6{$v`e+c4K@dAjm(Qf87AL2=I zLY(td1kJ6kw62bgiib5h4aspvXd^U8(ddy%YiOH30S>cP(hrLELIQnfgRBvVDbymE z)=oprv}RAG_pv+?fq5|)mg@{v5FQ2LlP$1`XQrY)`% zgOLo1Gf2*oyPjli9kSL?yVErTo`qY7qi9<@inosxH-GbR(Q?k))FuFK_WEWLN@GI{ zNfUB6wu*n@R;S@dHmE3?y=+i%2ZNs@1*Bwu1}z!jEn-85tQEbzO#ng$H#uDC-Y&F# zWtM2SyJ%?*u(cDNUtNG<jYL?-igtedFJ!-#;AR_fJO&^KiKSqLfJimj&qkCt$g5YQE60le*J|HFZck&B|jL$pPG)2C#EB5LY5q;H9Rp<45@NizYHwr zy!zL#KWN^+E&8`tfB%2hehOI5^;Vv7SmpjvKsj@jvlQ-ij=_H#{@9{l)gOsa0Um^jW2K(pObt>@-g{+MDhX2 zCpeAc^nE%_a)wr?r)mFnmae-Wl5_XvxP-WbljI(w^nY{u_o9HJ(5omwG6TyDSf}5o zF;T#4g^GpmSy=1Zy0S*H=dYWxceQMtME zKLVCB4a>t|`I)mP{zqW>{}d=^QNZ%E-6wId`#26=I3?7|43^)zd~X^M2@4;2b^w=pF1|G7tFa5C5~AF9UDAgYQ?=;&<&MsWE;5T)T~XH)(8Kxq{PI&jU9p4AY!kx`5lg*Xa5T zZeBZ$Gd-7a?+!gX@h0AyRe|r>B7nW?fj54OZx>bJLS{3t>t*0G>bP6I694?Uv$)BY zLGRt5dQ)egrMgoRI7aExb1^h}_A0#;BR1>$R)aV0_gw$4VItUe^{&*AEXy%-^qh=x^(fv zS$Oz)A<1MCu-t4+eI!_(HE;m@2M!d?@Bu@H3aITeU?7Hg&}Nfd2E6@(Na(qLaEQ2k z&)~SXKW()ASsQ(z0Oafra&v<^F;ReVrd?5KwF0Np0+uVBlS+&+fiop=WuU*3cC z5rxPZRf>+qW3l|{wOIbxD$Lz9A5)f3!IG_u@x<5n;`R4_i(mZyr+Ddy&tvuWmH5hc zp2c^6^)gm&Ux7_eY{YN>@(Px3UxmlM`4qnS>mP`b(j8xa5r&FJHp^ zZF68LH=%h(JtnUikIHeSc>Fs%@ZpKKvG4qcIMVY4wtjshhQtp+-uNP9PcA{mz{AmF{Oncl}TqZn;uqm*%Z z1_bHC5O0Ztp87GxsuSa!hNO5HX=7|4Nz!RV`(JBdL#>HOHY7r?bNVw_t~Dk=V@g0m zGT&1?Go@orf-0Wv5zt0lIGK=V9~9J27?Ve9`F7r#|IF0992Aa>iF+ z{F-T4@#GpzUo#WScP&TPym6SZelF~_SqRHWf`6VBetC9;@ZIGc>9z6@GOZgw$yfR;fY3j7pSF zt47nTR%o*m1rYWL_k_`|$1tx!@>BnKZM0}GY7%MQj0r|axF5nI0}vJKe8vYIG3qcx zL8gv8o8f$3;sRzhGYoARiSX z0DUAq<9j!6R}A$UiUn7g;N^^z%S5C$`(y&F)u$0mnkBW>laM*50Nr+dD%Z8&>Nm!!w^Je z<~dHQi<5(dpcn?_>H82BBtXBbzq=d&802n?lu@(HEBO;Cxyhrb6reBGoS zBB@?{5D`N4_4IQ`5Y^FZUpe>~;xm-K)fAWV|J&l=zSOB$wy ziZDcCXvi=D<{6~-4EI8qHXO0ZaqtZD!2s$9{)GbnG9gwUC&KN|?Hr>~(HbLw$`dBS z6m)X%LJ~}U$_FWWi;l)&oYX}$hp7$>aAstt%Glts!tKhUH)`d*2&MOcfm1##@}hCU z2LgO(!v`2_Pb9`nSK}RT$8*ej-waXTr@Ah~eud zfHlnB(?U_bWCZHgjD}0R3u-oY2+y~L%2CW3-z4#4QemD|2-ECB=w{@?y08q6g=I3<_L&my4sePLi+!1NV$A`HZ`AG_?IySkpj@v|CO<`s$N zvVh@q&(8!f?<_@DB2V551QRmizj9!PR{TLTDb1q50F@#{)w>U1{y>Ex(@e zqOm&AcL2q8g>RH6twY^toDM)FAFPDB!QFQ-T)hX&yTO3Fudg>^XnpMI=?(t?nr|pQ zHpcB6;YC7e`?(;i)Gh~&{0=f`9uyo3i<#E%Iy3Yt9n#3nNHU?oMr#?GQ}Xg`@C+OR zjXe(Yb}d2v_(}|4Jpm2NM+*&4&EgSgUDbt2kIh9)jR670YIHs^M+^ZnSk81T43u;K zNS~~25OFN46p%b?O%1ZwQXj6TK3iQ0`$`%Mt1FPTu@)KY$bUmUvNtw~wsPir>hrbK z$7`vt=^1NwvoT4g<0#rOTwK0qf7b9$-`oWI=6cvRveb%e-9Y1PZ8eftm4T@{*obBB z9tI;@k+!7?shjG=WsuXps#c6lvi7u#!xPOPB&7QFjG|RcH+?Py+lfR=4Mbvi;m`mRGMZ!_LvGBE0-$%8V;;*#N!)>HU zf3TeIm2^2g-#-cf?=K9Z|07{gT;VEL0B!|1XP~=3Xs&38EB8v6erlD2LxgQWuq^@>(O6zb?{?Z>Le;6odW33E! zD`0un%BBZk`MBp7h&_paHx0|o?SC`y$(-f?Q?R^0Nd7QT&S~_&e^?kSKXV@}KXmpu zj-GddA;QV=<|NZYVzp)<6>MOCMtOQRL75v-e z>Ec2>Q&NOyON-_D$-;aQ_Ishc3|}cM#PbDTE-w}pKadv+DNa9mzNiRK7d|@Qe?^`s zF2IvzMIuj^6-ybPrSzW3%fnZTOYoiQ8ho>&Qu5}!_}LQ$d3dgp%3V`|?L|4*TA7b6 zRk_$%o{z^%sJ>LLrwge~3(N3WaRoM0{hn@X!P=s1?5;1v)`CntM`6$J*#aEhFG|yo z!ZrUL;=-UfSVjKW7kIKX2RL~gIMWR_N_pn?Oo;+a4UeAq0yy+G&TN^1)APD;d-V=nn6VZ;a~I;~+&Q>4WuD0O=`+zY zeKxL7U4-k?7U0?px}Px}H>Q%`#D%yrX#=jz+JK95XW;Ct@#tBw1U;LdrVgbS?))v> z=($F9xP}vVZ{Y})^a!ru)V(XX#3cKV=$QYM{9l0OtXa-r`4=Y+2v~mUVz(^jS+m?s z3+so$a?9Ys0+weF7=U29j?*T<)7wiH^KI?J@&3mj;koC(LL0{ch*hf)O~P(uYz)F9 zBM=Z0Oq&SW==*qM)VOijymKck4u=5dtTE0&I0NborZYVY`!R5zK`$|b<*aSa6fLY- z?i&*c&zJ~!M2EwjHo9(+q2jWzAK$a9gyDPFh!AlFNN2;KVW9$+v-nXwe--)DM)y%* zIct_PIL?4L8z>9R(;^^SgP>e3!ix+DXG5M0mXkjN=OM*<5$0G8FEa{IuBxX^acee= z?fJq#+`eoas-`ugdU^|Lr?sGU?nsPU*oEPt%S6|_30SgY4W9nt zOUP;{MtVIhf(vXg<=T*8PeyvG4$0|yB;_O{xxfrto&{N{Cgda~qRLB?RU!iW%q-o)y^@E`*6_Gg_q>so$ z)0{T^=Y7QIzIZI^+e(mKWWk88I+WMtprSq(l??@0v~ngU%p8TzsqI*{aRGkx z+wb6ezxoDdu9%FyFKx%_y-Ts?>E%eRF=NJ>iTK{@-@w5upW>Up{VHP8Bat;SM>s|^ zr_BI^8^f4_i zKEfY9e+A$F>(7M#CAvf}{OC*rlRdrygAKF^&rgtN?9VhYX`_qa=q!e%Jr{{}sfaC0 zru!1a)0kodhGF(tc*XleWl^785X~2@bE1=6YK%b?<%vCe+<2QebQFFU6ILaMK6=?`5FhWz8jTJBM z!o=0{;3&^U_3&D>jcdoe)e8}8PeQ|VTC^{p3V&-f5=zXdp3;Kyu3B`hn1r}u1IlJM z%C7{XDw5E+ZX7I=iZC!M7-btqqh#Y~(bzE0D;Gna40JO;Fl&#qcDQ*#g@EI%QO?iO zmN>P|jk8Of!1&yp?l z-kyzMV=%m;J)ot&jfx8qgR9I-9~$O|2-b2|G2j~oO+vH?^V=%I_uPk(Q9%+uEZiSa z(ZNEmqfJmFhUUd^n)}$*#K+1n4OFp_h@^QkEHn_&G$+Q={24`aCW~4{<3bw;U6Mus zW*$=vI5WT;9uXwKVQfq|g^P58;?ZF;_EfPENJ*ymg8UOTvEm;Z9)w_yL)WpCmWIZn zDj^ne^qc|mWRp$~armB}tK(x36CaIeN{iz#u+M-$yDUN{M50MhQQ2Yz*k@tjpAP_- z?^hAN=U-d&7p1)6VSxw@@fW|S$Pfeucq1s#N9w?JVSffmqbQvas&`O$AOb@D1;F?4 zbw@O{i9It_4gvT8fXg1Gj+Agdf!^>A@PcoU55);Ya5%MHOf*6ws2`%E6H{It(5}b0Y)gx&-KGuI2IN>*p!1hvzW4j#Wp=IOg%plvmNZXoTA$ zpemv9TF=yMDNwiBWX??N%tqYsG}`!{!kA4{VW_s?nO{DSi?r?>KEDHRoq7*b_squu zTtEqJl-1+Y#h7Q@v>a$=7l>xLesMW`Mj27Cs}rFU>_X4N#y@S#YLK_SO^hnKXa@@Q zRpW;7VrOHJ#UD+pyHGK=87`47h^t7(jK>#2-;j#I$v&9#>~d%uYyzf_+dT_yTgHoq zIa8G^{Lw}@W|yIGIn$ps2}MWp%zPwG&kXI@ne_$S$jEiWfkm8N}-+VK+YOUb7>i}R#hW=bq$59cp#2tG(Xcb77m|A z!T>pIr?Vz{8nxF0Abv?TGHHG`OwL8dyh>Om7YJCcrFDX)(F9es4u3fNt{hHBCdJ6% z#~_~}80I}peyQW;F%&-3=boPK@bGYhmyaigxeb*y@-QzCTHgjZsis_A;1cKpFO3%> zZIOseS0gCN7k+Ub7#vJt>3hqEHUpR|pTp8P^AGdK5RYNkVW_D8=NllfIpx%VQuFfO!2|j47N52NS(c~S%7fG&DhZ>fVg=*_4(FDxn~2N{lhWPEru<3jzrFu;V9Zc_1G~Q zF6kc7P0qs1mscRDE?y2yDmHhZ@yQ7&-#uD@Ue*{cc(N1Odz@gXfTlbC9*kw_55WF2 zQNURSW0h<6|1z*#dCuXLI7(U^p5rNT6;Ylm!a)B&Gw{h^IdiyYZQ}Gh1c>IiIhz`h zzqRE782+#*pm=|K(KKf;mjUrdf#P50|FAp^kUuP}ot?U_3C3krNL}4P|1{Mj|EszLms66jabx8Z(R6MaY6 z5O2Rbi~z2|J;lk3jylexX)@A73= z0kxI;e8MF8)O^nPum`{fN{xcU=XGq8bA zKFs)c8~9`!PnYhU!_kWevG3$(4>-#i%>JK(<$ni+pFQzU!EzQ(^Gx?i96oy#$IhP+ zu$-~5-mBL{!<-draql*8`=)3y-(zj=^W6a3ZtT4RDhzP)-zcZgfGXk?zCLyOZ~kZ5 zpYG581L5+2nK1u1+o*gv&wo`oE^DT987?{x5^#pn*>HsO7X86TPKc;B3gx9tYJYct{#qa7bVWQT*DQ5F(1`2|0((3 zg5{?V&?I)`h|sVwSk5#omoJ?Yu$(!|zYHwjRYjYT0RxZ_7>FUmh9Za?EH1Q$~oU>mTJv(&lIA|)v+{KFpELUh*SS#Jl$497J z7#z1}WudsT5~-P)Li@r%Ive=(i;aR8ZF0X1EFTt5>GbpK|I8;QQowRwD!UJbWAP{d z0CmKF1IrZ}mVnH-2b|@iO`ewsf7+k~<|GJM&IZTWp8<6a!vHx0-gS}Uc#D9%dq$9?b!L`HoW-q3wZm} zw{hw2Wqf?%3#{I|5$m4Vf{IZMFcqdjZPFkwGYuIQ6RdWUJlas_+k}@^mt&Eil4qsc zkZ-r4IMt3KTPkvFR;1Z2ux40c&a}efu)$_eg+0}Z6jL%X>{j8*_MlB8(;viI)bLFT zMCOPh*xPcE-kvMGn3LB|!iqhMF>ziennu!wHIFv+K=_#wnW9>65(7BK{Fs&Id*O_5$qqSyL$!;awAI(RHj_S6&f%smZ=nIV;( zV;a1&A_e5JOelb9e7PeORM2H_cTXq__}3$`x7 znY-svF}W4$GAkkrjc`n;qOp;O$mUcy=F_5oejQSm(MDon72;;*BZC%>3^;iWPo(=C z=;jrQ0Z-N@XYicCa^?+WV4cBo);ec^+%&5M$uo*zm|h6e^dh9pE`@zwr5IJpr3I~K za-IO_{Mkw434vFOiq$t9K@-k9{}Yn{G5fa z8QA1!eAvQeVGuc*HKa)xY-X^Wg~uG1kq=}-g8d$V(Ht*M%^-WYfZhy@G7!$90O9O1 zxF{Oz3{vY88BFJ2Q*hb1>k@BAN!G*7%2bIf@p8HTcsHjWgS*AN)#y0e1%A`)lg67C(pO`N7+JD3#TZ>f$TL1EXk+vBbns`s#4R#ZiCKnDe8s z{{HUbujPXrYV&ydezVO4Hb9&huYyJuEr2;6+yu}XWSHw9tXR1OLx&BN_T+KGW5Z%I zNtrBGJ;EY%rqy(5!^w1|K!fY`}8_BN?sJ((ieB^+DU7cP--#on>E;-VyNT+XM zQewOu*6=&T2T}ZPdAJXSzn_;JF7Y!4(^;5;L!F_9zQzbsn?nw3Rl_L_nLG38+K!KL z5^bx;BB|1X{Woc2NbC7ITjvWUQ=mNpzr6GoX8mv-R9$IEo>fG1Q9U#>@`R4XxP;bA zYa8L;nIf)ZT{9Br6~nZsLNxmLC)$oVRd7iSK+4zxEc(u7`tIpvu3=ETa$XDk91#f4 zj>WjGGmt{xRWDnJXq#I`WMgoO4@PX6fXbC^80_$esx3wMtXp?YM9!jGSm%@?W{ef# zqfAJgo`bZNwW7&uTTu<`sw$Y5mLX?tlW3PSC5s~2s~a9jDuda}d7f-S{`wYivsTrM zU)s_Nl<>xXMJ22Yi=duh6_A{Pa0bfxnrS~6Kv(V=Sm*F844~(&tP{<0rf6ZXoasZD z28JnQEVGNC>2e@zK{YfZ?J#sw{d4L4ucI+hqsJSk-WIStA~70qw3Zs+F;FO0+PQFY|E#0MX3=n1u7(zCnA~F4|-ZlR8OlwVo5v- zX#HWUHo?W;<-TEA68fem(S9v4JqZcvG)}8%O-b=nXf0Aj-_^_}8%$+75lf{JF5v?( zG};yM_5`63;`!99*TWDMi?pO96wvz4Zq*?)HUK%bxu~7eimtUY#JFx`kq*nhwuRO{ zX_&HmfviI!OZAxa_xf$teDq&e#1k;iN zIM!Aoe_JDRw>Khlb1fVjs4q6w-UrKR9FQ;|p1G+`{MpUfO5=h2oIrW~eW1L-=}&2; zZ=tYT$)D29-PMA;-L1&k*(`qcjnyc9Y83MKv>|g_gM{U99ESba&EC}x3yqI*;V~bN z%AK9?sE86HuhYJ<1Rf>fNS#xHrY9z#{>kwu+TjGEb9RqF>Lx1J_WusXD&VUESpPFo zfLbLDC9cq&+z+EXe^?l>Wl=!f{&5w6w|}{m^d#*)^n6zv3Lonbs+pQSW6=5ROvI10 zpkzfWQfHRJJcs$)rz3YO#~CeYlswiceB~vqIZb+I0@=1j|?Jns*d^F8}B7ku4Q zQ_%jx9Ju5LqH)heO#a#us7I$lJ;sKXXQs+82slrt7B;27lMhjbKLE?KXpAZKXJA_a z%Q;T*-qHVSu$^q>-dk`&u?r*|~4`cF{Z80vpe-Yv^5EPj%l&eYt`9?!M$~ zpfcST$3|-RC&nR_+S#>gn*}Uq8Wsl27yV!x4%3%X0n3@&JALOUq;7AQb`+SAg<=1uSO@7Y56Z zoj!__-6wGE`c?GaxQ?Ey*PJ#N@7zYu#f!MWoY}W-0X^49t^(bsoKzy0nOB^Jf!lwh z%N*qFUZuR*HX_?dym$`xu3f>M>z8n+=g}^6h2OYxPI$y`UAutW*DgPJe(yS``7h@G zWiFTJ@6@N}C!e_B{*q<{M`0xmo?I3XE3v%}Ze|Z-;aT++lJUP_x`>5kTqeeXN z4$ik_;R9U=@YFWC{~Y-ABjAG%fR}#=d`@9MJdU33bGUNnBJT8lN}cpN-WnB;Uz!Kw z_^8q7UAP8kW{gG8!m;R`-G%G3$Dw<{M4VnY72We^hy=_+rjR zd_HF-E^nBHPlo5>_q5QxIBquOPXpyF8xie8Zw~|JeInfWH|U=I9`2O?r2I3moUgx3 zjvYFP6JHz@&GG{@iLrrC2Fq{VypBO`Ly%&(i-AuD%i|q(0n6k3d|;zZI~(|PxVS*& z<3k&R5Dax4MjOvieD4R}r^%`hU;D<_;qB`~8_@(r$HvfxHe7)77*(tQ<^F*I80zkZ zH~;h&&d_AGar<`B7H6QG!Epx3qvGP^p22bEDQCWNMYEiN^aq;dkzo(0RhVXlWmrfc z1_%1VH8e>4nY&z}XW?rJNB%yvN%o?2n6F&XEN2=PugD-V*fwv=a^Wmz&GH~eywI?C zXQ%`a56sgdsw`PFVZ)1Q!%>)skOD1&^AiwsUqZ+)v?vLY6-LC>r$XDDj>MJ>7}|4S zA5{chu>~>o{;BL5G)-v1_=OXZSD%lz39V=tRfnl_C*XTO`6k}`;E#Ca)t}<6w_b(S zngo*}4&%nO;k|cW$NTTSfxWxe<2&E^3T9LIm%sM{X3v|9?Rz(3^X_#xdj1e-YQk54 z_!8Fd*@Wtm4X_lX$xqZ-L)<|drowawim7dLGt!Wnm5PKsD`JYQP!(F`+LCTTMydrl zRx`3JDX^!ez>;Q0UO_JO$p%==Cgf#h!eLE8Xppaf6r1;M!j2brAu^RVXf+P#DlE`a zTeUA3iAifF;@9u}9G{>30Du1Qcldb!pKi}txKQ;*y#2R1yv4he-CSgTWLqnL*Fd95fNS0ctVi)K{|P|iOm zHBBpoeiD^+d^VEDWg~?(phu)3r7IVv&O8`KWYQ`C^xp}qI7x_iYC-RTV#a3z=%bg7vsZ&f5qyJOA#3233rb{ z0+e=*9f{xn;Wf-#I7`4WKGo3Q5&3xb#Wet}KvKUrdutySK0X&C){jBn z9LjTU6>QT=F~}Au#z^C{67Zwnd>1QL%)yv3!_hf;9HNYg(B-Eib9gmOEk#HhSBt{M zqmi+M7K=+;U|v#78;Ay&SJonSMg}4#)B7=>>bj&vjOVe2xP5Vr2m|CS41_xt*CK9Q z2C|nn2sq9^adphEf_`!y(&#>&?h`vRg$ki^H7)YT<-kbyg>!0XELe~|z7Sa>^H4XX z7U9VuFlOrD$g#kbl8A)3XvC``1fk?8--dZ;OG7PIepduXMZKHpkP0V!(ljVirFC73^sFK5mc7Q z=m-Hj{b{ZrG-RLvoe7B=*z8uMXVUwtiWWdLQKv;Kz zJL%<((2yXE8{dgpbEnDSBvU^yxXmsD;NE`j0)q2cV1vJ`b*|8aFwo6&v?hTK_(sVA znzxS|wKt_3767Kt;Wl6(o`nzD_@2XadvF-`JVGT<=WPTV#|Qxf%=UY>Ki zaXK7No2Ztsd^q9!^+GUo2^wlAmDDLdUX2iPgMtF!N9zqQFArKXL`q-BX=ohN_nTcl zl;B^@1P8by&8DaKfyP5*paArIXvBv@+*b^0%Yg-rD?W5#jeZl2B|dQR_xD9`a3J+p z91;@PD6*E~$BHpU9%Fnc!u3tzUpQ##J#lprpge`%!DN~@c)Y4q^d3b;2++>u<*}vJ zYG9%7q=wSv^cjrj=b=>BIIbtT#?)k)kF0I!awr?uYK3W1F^n`{MYg9Rs6H9*(b~Oe zb`vJhru4T5|A2kHNASj>w`d*SgXCH}Uc2&+@cde5m7sdt7+B|(!?w6ew9GTt(uRB) zeG}#uA#xJUZ|i8IPWP!R>csG8>XI5X?U)30n;o9H(I{Tff_YzCOKTae&}+4?9*3Ga zEf|vIh2V^6Ox`t@=Eronn*1?g=WJT*#KXntiLsB*Lh8gK49y5c*|HXtu4sjYzPGGh z&c+^@_N9O}-qxj+(9bUrklePq8mX)izO+h!Zw9~_9A}p`$Q7|OpZNXf$}@JE^So$N zD_yfTbCn2#;VcYinP`9u{0CSf_4~*ZtKn!`iWc#7{vGHhqVxk;4FmF7AuBBVsP{d&3TKXO?r!~xU zs{fJ#WNoPfgXM+0X^gBXMfzs?Zf>A>Bz&E*r50%$>HA5-*N#oqa?LK^XKkZ#vYo~W zxqQ!Qahe&MY6O7K+17x(9Zlk&y|o@id)g!~mV#X^BKbR;Me=sGpycVXuy1DYz8Uq; zP7**obz!N{2x+_QnE2v+c$P-U;Ys!GE|l%+MA5F%Lj91xdz65u474(!ssOI+D!{68 zuYlBwJRFwYqCKPJnF9VQ&p4bS3Q)^oSd_FBe-Srg)eaeaoR6REl z1$!y(t~O+?Ye4z-4vctW3L=|zLczhB<%yGX(e(5*pB6K$ycFaQ2_FPBn*-> zr+LwCrp|HloGbk14>ZfO{4oCOi&3>!+x*8mQT)`n2b3)A&w#d~Wv+ncEF4}DCA{*y|1-W<0CtuKAUTZ# z7CVWJ+S0PKOlXDaE?JIoya4-3<`usA_nrZI79Ei>rKV5@S^psez|zlc8r zz4x`c|6hfHW7aI^cab&A^)!wRG+r1iH_xpW&GIjB1})pB2n`EsmMb(Y+#cLMqFGOM z`Z8f4{2z$|iu1KnF1}_zex_)a_Xo-Op8X|kKVbaJgxgsG#}(k5uURWTV_Sy++eKSx zPFmR{bU6%`PyFiQ2L?X#Hq+SH>I}>6E`304#NfEnKg?gQ0OownX^QqaeYd&YvbS^~ zjn)qgmX|*<3HCKju+6G?pjocaurOGD;OIU9$`2g;9H&k)UCK$EJ##{6Qy45i$r|UU z*a+y6zXQG%&|Kj$XX*d^QF7w+5u7=90w)+WKl?YZ{A$lN^!4=#MtA$_HQc#+1$P;w zzH*V|JaG9u-CxAjzAM5QapC6m|DU**sH|7|oJzOUU;W#2B|KA5pSyh--FGhI;;qZlmTbe3pWV2|cxfN5_TI#$zMD9A z^Cr&R?!)OjEZ0T4Z&N?@J{s5jcZkbb0N1bH6piwy%d3Ecr+~xVxX^PC2XEiRL7b+) z!#IEAec;?@z>b%2Ywg#7cfX(k(~UFJ8t|*MDB#WCfLa0vFMWpF%$suN81TxQ_^4&WweuwD3=%KAI}xiblGm#cuMzY4rhdGGsx z%JdPn#oNG(j#|{9;$vyKPaF+a!{e|2^p z#lJ@F2Hd%POMr2ub8(sE5)YvN-YNe{`ByZ{zf2SZpQn!=6&jWUrw`+L&n5KrUd4c6 zgJ7`Gg56;KI|H98A1_#k3=yzA!^H(r9v(uc;_k^jd#eea?RVp`oH-&K&0PI-P*`%v&Bxi+m41 zKLkWZ2xmFdsVE?Le?Xi;at6&AFlTU_{rU@YmV1STz%w`q9<(`T&T`+#&<6%ShlF`! z$*#4cSw2)l8+ThQf^!mtr<|!)SQs1+%}Wq~oP`1Nh!Q+sT+638= z)S3zX@N6WH$c1%GF>)qUL7kb1FkLuyys#5h?Uf>hwfV@c$ilRF6R~yodc5|=f8n*? z{Q|GQ{tLYO?wc^`)dH5+RTbjBw_n5ezwQ}Bad{t%9$445*_NKDluIok?*mIK9^S*S|SMnzgCa?{h1l4nPJ zQ7Y9V4YB2ENGi0$l4}=^)@+AOB+HQsqtO6ss?DicZqOqy(}6Ub34@2x#%{1v6Urws z07YXe5u3-ns~woWc@`R`)nn818xflvAz{=>VOY6#4i+w%3{65Xf&+&@rwztak8i;1 zzx@F|`0ML<^Y=ePb6Y7wBHZB>I2gvvBurjC5s9UVV)V0adMye@7b3aF1T9JW#6sbK z)pVsJzAF=|(Nrhe@akv-$y6)J9T`y9n}w^KdB>TjoDFv}NY0=Di@GQYnIj9JD>Guk zx+(bTZ@-SmfBY0uYw4XROcGvKO#{bGLwqfzRb@m%tx16L#A+inB}vc}X`snf!%=I+ zoDEa)Uw`@@K0Emi-aGjhEO~yNjE|^tBa(;bAgL)GMsoFy=>nK1)YygFwFtuyd0Pp zQhP6|6s>Xw%2}(NDOeP+Jbg*s|Hs~2z{z!7TfbwAhnbnVr+XTPnMcE>b1F@uKHxFm!$?NEBr@SPiV!{<{;eM1)35^O-@+ve}cPF(EL3*;>GYHKI%n8Wp zNz6P`(@Zd#_3Ai;m)uTBsyuV)6&@L?WHSQ8g5d1oBJ~Ya@f0%ivXrcbqnndj@8Ro- zaA~iwXx80ZO&M@6R@$kcI0pt(q5{nvK%!SQB~6T$Bo%0n^Ymh-$8~CkNexQqjR^_{ z6O0GQbA}$$JSTzjoCyo^SIaIAwrZK%V5BF`x4v+|@)h>1o-NGPJh!eyTj z*mms(W0D@axOmym7s37kvX8X6%m?{NdjFECIq>%jBR>zcA61m~1x;V(-p(!TVdr_78=&O?gDpnh$_ZJzXicd=K{nCs|W zPe~{Kf!bz|LVOh@r~C`SIDfTdH0cza*CoZOK5HF(kTOeNj*j*U zDtGRDy8_i5>k0`i3TST!FL9VzEDNb2n(&osRXs>nQ8 z@0{#3Pl&qpzvUIAFZsbLYHoxRo|i)G0V-m&{EPYh);}Dbz&VjxRaWn zhKQ_a#PV5DC+`W3CPWX+LG;jk1ocUSpWHLQm6y+^MMII=w@}HL9hLj}v`up{e$6x- zlso)4@^0@}8;kM3pO1ULdj_#XGU446uL3So(kW=51*Yj0NEly;@R3>Y?45+<85L@f zFMdn`@}@Un(B>&>z?jl1h2!f~FwfNf1+ek3LDP&r=qb-uSF|GQ^71AP*fr^tPqGA!w1N|g+Yp>GBP%cAhZrR{JIbwyBI2+|7Dm8N}R zSpm{AEGp2sS*|1YYX&}#jg3aU^fCSlkMB#AE)3R(Afh?~ZJXLK_`ZQ?UfYP)bxoN0 z!elJ{<6JCxZ7$|NKLhvt^$sk2ZVm!Ve9#KD%2lw($5oP!sH%nfUSEE z#AWI*=ia4ow}i<1L%DajTB^I``7T;E%n z^3-1YOI>RX*3voxSemw;(3TLJ`*4~26UNdsczZLzrD^N6d^)D>xSnOwfG=S(K{=-! z^iNqT%bTR^ceJVNQu8d=WLS)&ix4qb-X}MYP}5ZM-NFu(Q+yO%IkGs+X{N~=dLAyw}SHA<4oRa<(6*Oskz=&2znM^FS1B>Zkh7&9IzafVfrlNRaD;^U2b- z1n0>s8<8yKXBtBFn@w9!aI3($m;&Y3J(Fn)#9m)Vkgj05q}PDC)j0p_MyUL2raxh>2>PWR*lzz>Sk7|XYCjscY2M_TY3py~aUF>NmT7QY z4GzdWjq^9da>_-PE@)M-eCWf|QM6F{>~+m@dY{vioNfMJ4a=!nt_Ap{49nJCKP%9^ zW9JqH%lGfIg7W`rSiVne*Zv*YcX*HFyHf%AGiOfW3_X+eC`JDJ$(`v&z!*J zGX&252`<=@;EQ*Sad<7;g4gp+cqcanpQRS!PsMe(`qf7`y8nCN z%t@*HR(#xGlsw{b<(@YHIh^`Az(tNA?ZD+zyK(gVaU4A>7titYxP1IHE}l9d7tao9 zgKwn)*+$Y}3<7ZcuQ+|rD14QjfCK#oNqe4^^iZ-kC(oZ(9gLkp!SZ9)i}6+`=HF%i zSy+B>+b%G`=g)EjV}Q?-Ck`uE-r2S*;`DkI;4?YNf~fRV1`(;8+y38qKCWl z4Os3J$Zc-u?CpSA8x|{A-YL`>PKH1Q%L&OTx8hw8r##DpiW5|z#jtWcqN+?cfM-%` z4wBk(6$GW}WLejqi=^IpFb^z2{;+D~x0K+i*Pg`jtH&^D-UQ@UWW$`Bj9E*kWBl|{ z_|pfk93m ze~+27$6?L7h42e>llF5*aHKy*Pac6spMD5M)rCl~#3Lp-7D?$=Se})YfxL_i6sM%4 z(42}~3&FS<`n(iG7pEYk+@dU|&RrQSaAaO2pjd zb1-}DTq`UeSb@4pZK#{rjH*#}7_)3NTE;eG^o(JsZZ1LFfI9TV&>nzHlOzEtr6zgX%GIcq@v_QsEQeDE0A%F;|D05w(ach!%@QM1B-ZV|8Mww-H|F9W7w zg{YV*FS6|!C>vLcf?;K_@wGuWpB`u((HoPN&4Nd~KjP&W-pQee&renX@Fp*u1Us)D zN`tkoUp4wlpU7<~MEk742+t2kQF}7x%&NznT;2-bMRzjJpP!Piwi4Oqf+WU zu`UNO@lGi2lZm$JjdL-@KGPzVfo^xOtm4&SFc}Sm7fE0R^cLRh~T2sz;tWr4s4Ws!_S3KSKMM z(LK)>(f!lZPn!c85|t#-;LQ{8&E+jhjwYi|E*|;I6R4S3kJyR?6b~;$dRr!fGee}` zgdwvs9U+MU=;72!4SG;BoSw-9)3N$krN7)ZpbbS8MaU}5LP&Io3Yh8S>7>j}?q?qU z9*BsKQ07Us+9y((pC~H9-Zg07V z(py_I<+Uwkqvx-GNC12SeGwTSjVQ6ak^-30EeHq;QqLErBWxrbrx!bei_&YI06jg! zqP%wbs~5c?LBV&za|RY=nnYc!g7Jj!KEXan%}G`A8u}EyY7Yhjr6dC9*%nMg^9_+_ zgu4U$LjACC#X_uHw;bklqY8}4K?VY62E=4=OlnkfncFzX!0iT0lG3l%n{`N(ya~&L z29doFF|$+J@=kqQYf4P?p1Gp8&}t2)>>k z2=MWSo0B67b8{pg={MnFl6NqCJlxfGE^{A$KOYr5P@j?nKdGBnpr6HPw~$Nn9k-vQrgEjED_a5+@w& zaB#9!_o34ABDl-3EONf7`%ajhl4(I~e3a^gu3j!yO?%mwdgZ1xqmqtFlsdRNc7dmB z4@8CeB3;gZrqnG$&ac0ZD-8O01^wy4?&s@?{Jbpn>jw5E_Ah->A~NLNhQEvo3Y2pb z9f{ze0Jyt3AvY&O4G?f3ftD?yvKNV5=@|-A3Kw_&ri{zeY7~KBkTzvpGX_QVv{npRJr0=zi(wPm z73E{tUW*rc7y)QzN`X5Kk>oq_!?|4ug2ss;Rc^@9UVRQcW4q zlae4b&T}2*K{#bF&y?w9Di|o23C1~3&GL@GoB=+0pQlzet-51g`%&_pD8WW-9c{tF=7zzbN`D(Bv z!H|f6qyU6e1>*5N4`Ie@ld$H~C7AvCBn*9|51!fgFdpA_4;H^Q6ANFPj+gd7jo)v1 z6i@#22y6mvV4Knnn?BiqySHq_ocE?;!n=J6_(ZxQFwh+_a=+56fwTZ5rp3co7l@((Rj8fX4qy@{1G*n zaL+t^d43DNySfYS9QX{?vw9zf-b%MT zV}7*)o9TWs#T+$=`_g} zO@<{~LGL=`EtTn#8Z|9gUXQ{R4QiUdtPaJintowLD;sZE!78cW9c{>7Z`JNjm;H-Y zx1nm|02C8UNq@1i*rIS@6Q;ku5;poyC|ufxrhCVrU}bNqQ$32Vdu`JQq6ugTVhL3# zSHks#tz7O1WiaF^RUroEMEX_&8;x3-T4jR|@QlDW>bpb7yaEJ&PP3hI^9 zvX?ZV=h{B#eb*=z;4^1x4U&fEsb9u1_-Vn~ekfSqSAk;Yt!b9u%9H$7))AD`wDtA( zj<$N18@i$2gOf1ezKIBGGr%;l7`2;*C|IuAZZ);MrH-o!-L0UUM&Qmmv3_h@wj0aG zWvy+rcGudasNlqgGCp_nrK}kD;@mrZ;Q4K;T zjwElJEM`)Kg{R(3ON?r5eZ zQV)5a5SGVEe~g!Y%mAMnEFb^GVlcpG^O{k}oZF;iSTtD9`m=rhv#^}r;aWL0&vDLk z9k)?RMq9`Hxc(P;+yahwG?q_;L8~f7S@>FP=H30RI2!l>6Q)&wtkF zS%2Z|F=-R4o%<(EOMmA45ozN?%FdlTgbQMq&m56*S-tjYTK%;BPF*;L;}?(N*dP>B8Rq9S1Tet^rT0Bk)jM#1)-z_G7^b3Z~+?MoMN;wpn_ zeutk18t`da58$0Y0H1$|-_;i2(X1qVY)Zr-qaG)sW3eYL24Ch_@O)k>eqUFE(+_O` zzIq&=Hm2Z{%qHNy!?-MmJS2w%q(G;C#>GRQ;PU=Yfg^ixb=%Lfal4e|6X54R0pGj< z{P7v!&wm77e^KUT`NPkF_umCxy&u;G6kwYv5Li1OcvH52@RrysvR%@>`9AQ1ET1_l z$2kHVmwIg9fp5$8_|O=Mi+8-KVEMU2=WtX`=E*CErCcYlMM}0!?C3?=?L2To+Te_w zuyZH3;o7NvID7Cku28dQ&l}h)F9lzwM&d}nfwFvFNgN$Je+`E&oyY#G{Mm+FY;plo znuR|(xYddIciBIJ<5C;m2JJ(6ALJjvvC6%je-BAB%+3^ei{( zQxKhzhNSE?1laXJqK%D$?e?nh5??nljXcVAy6!NPUiho0m?5%Q64FsL#So^wBXmfL!|E9gx* z6+&`5FUiBx4ffuWw=8qogP!G*j_bR-yP~UyE4sP4D6{i$hb@DpdAj~WhQ;2`U3r#I zTQgtDu+X!dn&n>EQ3{s(5m=V!5J5m%V?lhqv`?=r1u#wR`7rh=P?ju4U{0e4FhMzi zxv_r{vIohBaghnO-aX(P=!AsycvQ7kpk;6`%w9GF_dK>4XXQfvVfVLq?J3;<;0D}z&nhfjIvwloT!!Uq7pi{# z?bfeQ*IJELcdkTmY!FiNEC^4GKvJ3k#&jc6GE zLW+zCEHNUy(1?WWWTdAgBim$z$&`#ZU83>;Brwm(NCkC?>A~39u@h`uZi8d2J0gp8 z@XHKGo_zG1>QXU!=_q`@=QHd-vkO^87L?WG;=@nm`o>9IJhvAm`AN`4d!n{H6?3Nz z!T6DF7(J>L^$o=c40VIv5~JYl%12jY$f6P0`25}Y-Mdeq@9e=)@+cJsB=yNgY~LKj z4#+{&fLuiMPDfM=a1QkR;Cv9#nNkd7m z3Y4@|!ru^q08~n;ndXnN=uh zO~jpZ`(bWo0)D4A;LEI1e36ug4-+!+bgTitFU-e?D1S^UvtY2C?@5D8(bO{$OBN4D z|8XsHj$#l~s#jX@VKqh=N0y>seyh?VH_xtyZb~ss*F6u-TvqPDI7j=2o99n@N`x|4LP_%s7F9a zFdh{j33nei1w((__5;pbJdK6R7F_o_cTh4DK|uk^gO=X23A%U%%jwNMXW?8Nk(Z`F zy!<@8(;ghz%b@9~bB<6Qpa)4yWD!Z`|#6K>L*oPd+SiD?Me z>9x+FkG3wh_;JUNxFmn&wdHD=L5SH794H_(Cqxg64Z8u;3Cu6cAAe18dp8?-PT49? z`!H!sf@Z>TLh)eA+XVZ-PV$&OXDTjUJC76cf@#ymMtP!BdWG^T1mx6l*QSK!^iKZy z`)}}y)V-`IUx9VPbEYR)H|P_P6d$9`CE+*Er6zWDrO{P4}!Fed8|=?71{CJY`mek7jy!;_dYbF%73S^1er&q-5#iRlTE83dIc{v3qiGh^2Lnb>^a zooMUV3S+9gdx)iGrC5W$Mq7iw5=;}$^A`Y_nI?=F+6R-y50mnTD|nue5CH=RJ>(w8 zV61LZ{`j~kWnH`6rebdJ*9`1SgyZRHDM(C+Q*tnIv2x#*zU<;`kHUf+6ZlMadBblxD0Aa4}I2+b;>QtRo4s$p$O2ItX_geD;FWVC>yoSwQBH+gEhQf8Kg0< zst}R6i3lxBK-!=(RL>iTqFKF>J+%oL6Y7vKAYTRR8oYV}@&@-r)wo`A->ZbBH5)Zk z+Y#SjLH5uhqz%qP@q{X53@=1t?-c0zrK4neJtA9@mDjm>l-xrnlp%ItIwJa*kv_E& zd2iEQH!FvO|VQXLGt)Q1*++J zoG>m2d5fhCvk0=~UOB@G%(G@)hvPEkvI5sr%M`?B@Xedk5pWY~5_%JeXHl|cHuJN> zaR%??GN(MQw%$C+I&U1G57UGKm?svhbs8k6SGkEA@Z(F7LhWXGwk0w4MpLr9%cUZ; zJOBuUPQ;S;W?=I-EAjN+`|-lz$FT6NX_)oW1Wb5x1fJjXBy3`B zaJ$I{cYkvyCcH5c)BZdb%RiotNly>O>UZYh(Qh{6(H}PB{_i(n=G#+n=T95(@Qw#C z|K(XK5U6*oDmW)P)^e)r7*;O(@#f8)nHfeR&2(y zXGV{*AoO`~5_;V?R(Y7yqnQAe@U&!8e+5}J*xeD>G7U`wwcMsjuMlW!9^jg1In!xg z>l*OZ^3+U&y1!=HKFmkUkDxbUMzPY_<{$xsq-M!EDqG!-wmU~4uqj^NZK{-HAz^v# zox^_t%b6d~B|Xb2r}B?X(<;}z$u(Hc^+l`uD$jMBl8K_yV)syM8feNl;eL4S+tYdrKY+8O=dvl)an73MY9gN=$%Qf%v zj$r&&MsIQgbAsEFdxjui`VZkZA-Lvg-qCJ`;2kAev^1Qjas6+>a=+D$laAQB8l%Ok(C$EilPBQowkH)dMgUS)RU7@{lwg zJ^Zz0{sKUg&mknIah}^1V3+A{!SWHy#wZyU!g9*6Y}xapg5{J%A@ts}n>yvY6)3+I zEWa6&-)y&nrUO530S+7kzB_^|kNgS8`%DK$ z&BC5plkvrp894XG8?yZ{PLOV&+J&RD`{FgDAMo5uz|phV`t8TKOqrEW-U9C1h!4yu z*xPpi@Zp~U`B>WZ)wfdl<8qu&@Lg>_KG!7!?|lHA-ikB(J_Y_F`@K!5{j%gC>ltwL z(pBJ^9PZd*TwwIn(?@XW_-Ww6C1BsrN(24aWU?;HqYhb}dyeJ>&xaUqudkp8V zO4>6AaA~)sJ$n&2au$~3vKzrwNN2<$cl0-Ih3BpaM&*vJz&eReC3T-b$e zm(O9x#cMcq;uki4Zl$3MiO_5JasE&%)Lo22{~ag18` za@gJ1F3QdK1op@cm?xPR;{WZM<+p<5nh};C+P)jxe)vIomQ#l1__2d>t}emd*Yg*! zJSH<;!SX@P_xCQvb#orsQ0X}dIq=&lX??j$S^?wPE-$)l^}W2hkwhL&s?>7Cq~gT&@c#5bkG z(4Gr@TaJR6#(o7z?wgOKcIz@VsB@YM(Z!=XY<(S&TAG3OQGL-kxEV86%*OBk_$+=r zxCI~m_$fZ$_BVX;^XGW?Z||d~Up?Y8bVw<(ps`;KUVi%-T!!>Vu_I^qVA0w+m^^PB zmfW!bgU0v6)Dh---Bt}#u6+3CnUR#Hhbe=w+@idpD6NuZCJ0YP zj@hW7IK2>)GLsRXWl*NeFu;&1=OV>`$hauzk`2ht&O}OzSpgvG+7j5b4Q)gJDT5JL ztVei(e2n!iLc!p2)QoS!)Q!`W49oaAqY;@H1m6%B3>e&i`|n+ahaXst3{w~a+&dxD z7=~Gs2V&;r!5BNH9mS>Tuy?*q`hXXrWZRIL!&H#Smp*wFPrv^x#x9$PkZd_mX`v__ zTaN^KT@NULZeS7g{R?2~Td020p3zo_w8k8i52-;x-!i1svt0!mxT5R?=MW1$JoAx`j*^^;}k-=R+E9_9?YNDny2dBa`j4^M+!4}|EZ zAO&K>b7Byg7pJ_;!}DShoE5IT)q^ehFad4F~2NmlOTbm~RN%~KHhFbP7 zh(}bF1tFz+6=0U@bB0zcZS(jR%KBufpGNCivXI`V5b4di2r!2z$rL-E?#O4r)V_7_ z4WJHhI2iDeAZgK}S(rC}I&2*}LvM^zK|SM=Bk|P_pCZ}Jzcmi zi47^i8$Y~*Pq%$3eRLQq`!pcP6b;YBU>M3W5Sf`EANBqiHDe^+`Sfj^#~CcXbCC-8 zIdqY{{Pr(FU~vrER}4ng)M_-2EywB&lW=v{XLxUjG9&EF6SLgCq1sK`82{@Xgijcw^h2;gueQM?U^NTITgfYX3Y;zHc@T;yCVo>tS>a?SUTtJrF4E zkz|fn8qAdPpf@Z%cZS}O>K=h zfANfZ@gaDojx!--ScKJ6m|nd;ex3?w(~CPYIt+jP=zaXO<$Fw-CfAwl6BQ}_Nh~}p z#44Q;B7Oe)Jhi1Cc<6p9*H!$yV+)+zouM-(DbMoQqJpmFs2$5ET$BRqno_~ z#m*j%YM$QK4z70UC!B|l?o;w1J*!HTObB(}DOo~2cWS&--#aQcOzD2lnmY~WFP+8- zIgYJESEUEf^0I77i#*Ur0dJ+d9whgNV0o{SdK@~uPyG^r9`SLpkxHI{;G6>iTu&J! zrlz>`yIfHMdtryT5h`VUXY>(wRPdG`iYernXyD6>Ls zdg|3vDutfp1kzr$o@fiPH%Dc%Lg91SITu6PyYTfCE>&1tn6dnz8)%_RieiYUF|w6pw9uG z-#zh=s>?n1->Kwo*zPQ^rpwPdux=T04Vx``B57w1+KY#u> ze0^OJ8yl*Em{OaaeT1@O?fqL-9U`Q^xJkJ=fN@zYEjLw3bcD!#H&*Vmfzd(o?%{;o z$^tk<$U91$Cn785**mlf2Dz`r%liT4+5*dT*e}oY{tHJSM&{=}v=|dNPDkC;W-R{0 zI*hw-CT2V`55w1wLDQTz%za`J7CyTibDms;MSoa<#V@SJgP%W%Wv{Nspp9eDxU@g! zzqA@pZF?1WfBraz-aA=&Df8D={Z@{KXLgA49=A<&MUMm*nPm!A6N0BqDN`_=U_5vO$mdUM3jZ)8%=bfNxHH2aiZMB&5jwRi2yS@zTFdF>=2M zL2h0e3JWt;fKLv%P|k<4XPvv)AT86ZepwNiJ<>uHLsJBi#&hVmyk9vk@FE_le{X zBoygUKe;!G$26d9vOK4T^~96ky^dY-9J>3x-{D93^7-Sw4^cI{4W%=Bp=MD(L^LPE zp}-%*ADWIBd47hr8c?yMH}dB;B4>_OQYU+1gBom3Ur>Wgd9J1`s#2hop4^#BYLT|E zN*U(~)9Hmy)8O0#kz1!WB&_=p(1pv(}~s%Nvzv z`^{5ryKzo22DsGYW??uMl=wSw-9g^g&uXSB4h>kU{Q(2@k*=v)aRS@3A+ioxh|Rd>oTvw@Qy%Svs-P`KsoKVU^y*imGn1hQ<`P9Y+u)`%(9j+ zT++z&*DQ_4UncckD*fkr@K0q+q#a}(je$TjmP-3by37^))r8eDmP=X1l)T8QRt1(d z@Z1q56Egpr(X-q3oDYtUp^G|zITQ7~Ng)nK_M zouk3>j>hep{T3{zquS9c2XAPW|GfJLrCF|E_WoViz02xdZVm3a(<;I8-vG;x?AnPF zd-mY$nNv7<=`0RX3;fdGVL25b=*3L=5z2)S)^gps)0c4O%(ed!JA3+?9RC_Foch;{ z`!bJP<^9jtsk7H`{M;{%PQkxr9n*4umgDk?Yq)q4Vw_ry>#m4hJ$?;1W;M=p9k*M{ ze+6gHTH`HW);59DZ|?-7CdH5#^Fu( z0ecSN0;NQxgMT@o2rm;dzx9zK!l(D`0M71}G+zVny^PoNiP+b#zg52F#A#gJeFE5j z9QfjWd|s7PHf+g!xt|>_5?1R zlW&g8IDFLX zGHuxv`}az27i3}o5vlW+I8hmlJqAx;?H{D>vi`s^oH@M{m(Op(nTv8^UAc(;(o~mO z2o5lCq(eS>PaN5eQzuR;1s0r=^~XQP(e(rHgFXmnn)?8|FWm&ok6|B);Q zEdMQ|49l_I`?3AUAF)ktOgj$m#<8OZq#-WD!%sfs6BA)fFy8Pi*XN`o*wG&PPMs7i z&+60#!7lFTZ11GtxPN#QJOYB@6%-0PH&3;`o0EKaNg6H_l+y^#oxFVE?CqyK&k4l4 z+S@A+bI#MVoboFnQBi81vMYh%;R@cH($m#?f^~YGJ9&G-+1CfIezFfu=AC@J)zsDB z56&{rsTY6Z9v+6E=qLoo#vn8<79rQoKQaPdp@DD@@>8DWO0V4A0X8mOF=F0C)QoJ0 zL%c71GNKhMXK+t?l~Ze)5-brtlxW?bP3{MTJk(Dvsx3mxnBIuUi$_3q6wEC-NRT#5s?}>@y2cV`r9cfaxK#$I7tjNI1MH6tRlz-F41!(JCjbLeqfCz7dCxxQ4wHzbo zjmDC@mSO2VOJOKBBfuDpl0h{n7*d7Q0p&;?A~r}q*83E|)GJSUURx?NU@EpCB2D^& zB@zLKF!&?}z$Y#MzVZGDNC-xtE(rdy0q~0OM0#lk#?Ky$LE{FYZK%8;_RK+`d>nhk z`oSqu`gXWG93wo`ynUDp>_VMkAK?ne7*Dt+dc!k00G{SRtEB|ND^;$O)DSq!djGsQ zIGF22!~K7sY3v&rCnz%m@LI_;EkOl_UAcBXl11NEud+gh6?~0Ogds zi65Sigb@XZA61Bi(M7PxOKVuW1t}v-kT6777247t;4AL*!hPT2$+82!j>yVh6h{E2bN|&9o1fdmrG%g&90c$6q*SrA; zNDo3!>0@IDR$`DP8m|uNiw9%k@S!OaUql=5V@xvkrDkHg#exr_!|>-E12*MEVO^sc zt#REjt||sa7DqHT$78^>GUN{g_`B2$vt77A|LhBs*ydj4)KGtV3X7Xo)wXBEDXeLCMVd$cU99VPcFv$C%;nH zw`+DVUf%T{iYC>;CP=P#vj>7prEeC+!Y;-ImY%7IHb=>Q(5eR=7e!f*2nCKcZE!+M zP6<#6xd|-esVN>8c>_)ofK#)XklJY0E6wO0wp~=vOikj1fi$_SNmZyoin0&AaS5+& z?YhF=p}U&WBRVdE@IFLIhR_q5auy-Mfy&#Q0TkmBVwKl912p;t_<~yE)D5SGI3X+b zq~jB!)$wT5D4)MzHkK}1s5GWoMwWwMn!4tM(n^*^jG&ty-jqII@KOS9LSnAtl%U&1 z?&b9MG|N4U+T-*FrdKjStUW#HrM;*>P5o^K`6Pr^Kw9o&aq*GT7Vc6;1{-y}q4Tc= zwq%)T3?RvJ5#sZlupK#l<<%GP*4wWuX&JUJ(`o|)oHF1gp)Z49QpcO+Xl-j$$2FOg z6ey?M2SGW5kJ6Zq#(6tAca$2*%1lwRC@#)+NRV?(08UMDN@8)I9@g}b?%GA_>h6T< zsxq{;G$;tn`Vo%v7Yho4OTD?TAzAJ@Qf_W%9&PPS=-;nR>5d0W{aAL^!P(V8)tizm zJeOQHnv&3OKyS>RGadDfHA-s7$;IBV%+$V zD&VLpi`1QE;rZb_1B+5x#m(IwzH-la^znP~&?B4W+{<;6k|gcLzUw1x?XLoJ@|R8= z#Ne+0x^=xBoA2D9-f?K%x^|W}l71gx)qvL}#!H)oD$jCimaF=UQOBLI{L-aUYM{~C zxjW+H>N-G3)2d*kfo1n(euZb_L!VoSgteeLgb!SHRr245mKCNbOe&i`?h;<0xuIH6kKA5;dc15m_9IfV?ooG#KGm z91a(=JA!h95mpp|fSe#@+5L0jYLRo9;S0}nc^|U4!#&Fv4yhi>Y@$2KJ*XRQPqK%H z?AtKAFIpB1LbpU01ms2_zS;;!d6ybk_)qmb4L5pkq9bFRQIw0>&K#aT0J_O<($a#pngR^6wa+1=_3BWncn^TAUx%Fzwbxg};Zp)rYBP_RW<1)8r&8Sgn zIAwm^&h?gwgya=SpImaoQYXsuieBYo@|Cnm(y%OKOelwGSRPCRWx016Qv2t?+&cr2 z<+1qW;AgN8u!SKr0ddK4ZR$gzGejXg${#5yiAYS0M4vuQcg21Z)fk5F`LHHgc3uH&|j09?z1ketV+J~%zqHCWy;FKwTW^W3hb z(YA4!`EW{jOqfid&+QCONzZb^a%z^BtZYTg#$h*LIp19(hh+Xjvs{yMVOtijYf~Wn zx2z*Dr+&Et8=TuyDXb$@@ro z*rrUwx@mQ!v8>uQmB;n=@3^eBnP%FyTcy#?A=h)B$IzfR%cmKa|5;d0uuWi2Sk8G9 z%e<~#1^lGPxdy#ELUEb~#&7mCr*T<><{j7H3YIenDJ?~=qm&g5vTqYo3C&kE!n{J( zuaW(J#nky&Chb8mPCzb3P)<{DTr7Rbby&WFgBj9aR<+AHl)A{W@{V5JrY!X)(5wMv z&0G6crX*D6$-Uw_EKl6f3fbN%> z)3NLw>!R(eJm3lTWnKg19qXmR?_V<|H6v4&^VeWGfp-4#-b%BaGAxAUgCCrV{CRT! zTf_kitB1G-#%c5#|F3}MgBA?Kk;?~^XZh9xKPk`hpXL3H5-OBo*+r+!-BwV3D_E|{ zt^A)ra?SP}+=Xq2c3|I;T{yaPCr;gf<>wVFr+NfoITauX#;K!y;L2$nx_nxBHIv<) zJa^?f2*$sCO5l9v3>5G_d;0%;O5jaljequdH&1zd3S^u-`}ZmHv%>IOPdlbRC1t;G z(rV{Uv0N;ZwOlMCfjGhVl@nJKDA!;)LHhp)EZ=wWEH0fq0POn#n@TMJy~5A$$N38< zuxH1&xbW?}z#pH)l^K)pQGNmNyWayxrB-y|-}@~N$qVB*MWMipZvfA}2fXP0ytfBOJf zFbAK7OI_yQ4IDTDa_pJ8jEk3#;?mjeICEZ(ed#LpNe8*W%#O%s&&hK*bM^$z;Jn;UWfyglW#;H#u~%LU ze$oZvQgc6G#}%Bq?!?ZBu7|ErcSkZ{8y-Fn%CX$)#QeMLKMTu`?A(hj-+iZG`OYJI zaP-K2X@tx04)jGtT%3aCnr1m+d62jlVmG+> z2Eo-Y7@Zwl(aqUISr1n)*tz?_(aT?@RcU+!;O^rO4?jO;^e!hD@8RU6bkFHo&h_*v zXITs>DKMs`DbI33bxO4;uk_FmHT4S*Qy@JgHb!ZjbISb*%DE2#IR^lu^+|})=@6Bq zlMmN81J9aslbbv6dg9fR3- zEyemj+=rMVBT9xeVDO>|s2JITl;$ENR%M`iTyM0^9D)IJhGNXJu^78_JZgs3A+MzX zPrUOKW~`r$hLOE+*K_w`2XOw;2G|v zJhTalW6G1^o*oQcoduO+8!%+iFf4gs37&ra3Cx^75uLi(pt34k>5?~A=b#`n4ha#i z7|>dRKfU%CPRql1`;N~sVoYCHvJw%l3qevwB8E;Lf(M^}2zNhm4<3Et5e%9%6uMkJ zERt8jz$zrxWGYYXh;lOma$@0UjzEAR1i^_R2#5(#Fx)4`A71i->k;7%k5F&8g}B2t z$OEpyZg3CwgoBTR(zo^s@kAG=u5j{kRLkAmdLSSn6dqB2a0&B*TZ9i>#O#7y&^^Er z-GgL5`8d5@KB(=Y-C-N+2HSXdIO^p(F#5sX;Da9Vo^Uka8C<^onHE3Y6!X{ zc)&R&*xKhZBM??$LfXKdh;7V7Sd|%hW9t!IlZ=pBgOU#+EH}63!Q3kwA(>Hfd^_}( zezHl<{pLqDD(!k|*w;0bVabwNc>C>_@YxsdE6vg{X^SLtEZ+Ic8+h&Q7x2d0&!OLd zMpRc9z|EsOTBP4hUojOC`Eg2X+%&idx*-Kf9Gr`UA-M{aCk)F+;z%nbPaIRM%rLq{ zZO<6n6WODCBEFZLfBE=sp4l5y@0f*Ucdf>X&Fe5_>1^1zc2gSSlwewceRu=z*)$h9 zWU^^ z$)tJ|jj2)cKv7w-2u%t>cx*5dDVO2yt{^pm9swld3lPu}#u93~xH>4nOiygCBg`aV z*5);N6M8PwS*N8M*ifiOKKM*O_o;qT^-a6f;< zhJ+$IC>Y^^frtzaMzq|sqr&9caB)`PywmMA%In<5#s+B_sfdUQM{sD63KU9xYC?0u zeu7j610`(i((QHyUg@z+_)m{y0&;3yb4rhQ29WgjaZ&O@UF9C);Mi5_?WdqA*Abd> zyN9Qvf~Y~k-iV9}LXtj4L2p7=f?#TQ)03J;ILh^e%RzzC$FfqPON>E}?w!;+dK)tx z;WXQx(3gV`EH^zyx$H&R7%3xN4{LwPlWA#$_uP|RE>Z8%AtCT6o z8jzRkIInGwjFIw*g@pSdG=lIv6i#xkDUm|?6up!&l#pJ^N=s>aV0~q#V?8<{$_?v%B`Nk$gf_>;#@O7gt+2 zICN3o+g`Gcp4@@5p3)Iq$KaiDlroWY{I!gSpOcb};xsNX0)Zjkh>4dzo4ZVsxR$;L!AXyNK+r##mw!NM{{ zg$F3f7jF+oWM`OEnM|ex)z?@Ko<}DSJ9XU#$uq`3+y{m<9YW%Qky4lrmnb=3*-3~i zOGivuD&i{BkWif_*L*6Ht5Wgv>8+T!d=i>QH6k=E7{iy2#E_LEF#D+`nETXXj95Ji zlQ&Mn!bcWh!Nc>h`k7T&^XzI&SU(=ipI(6>%Z6g{lS^^$yALSO^OY~H!-lu+!lrlb z#gqqUWBH34Fnrxa~i25Y>S4Ja$as`IoHvvs6`=W4G zHENf)qHWV)CEL+_$51q`8-%9ygVDNaxLQX!2!gxXRsB#S`_Ssw3{dH4b*uZMdPN^p zFYkxSrF~Gbq>q|bFYk|<6|zmHRm=LS_0(?HmK)X#LG8)`=()JJO4oBy3n~^j-!Lwh zE$D@kd5tKZ+kmV|6-XUbB+srgB=^fi#vs1ir6Im13E!Uj4)%fFkx^_$q9qdXrf?)0 z!Vwi0fRvPYFt*J7_pHaob4M{_#st-uH{Z2R^&$R}D@>mAp6T6j=LZY1?A6Jb|J)cg z%@`4dt`-~Yz!&%$?_t@S(=qb?KA86V(Rk>qyVYQ-O_UAp|7H`Gd^{b~-WZJWkN3gY z`+MWgw-&;YFkQCa`N;|ld!ipEygC|p{j>>H3wx@49sO((;_Zj3f--#h^~bn?(=e1I zBOpBtPV&r*>y?gP%SIq$R0Vpk8imxsh43wkfUY$SrIQ;F-l#`lZ9EF5)*@?sC5GQS z4aULw@UM#aPpv*tA*e`z!F=~cRzu)7th3#yezGbKQ1 z4EUPAqFI4kt}j^GqUN>j)YayCreWHg#Fqlhu=FzdD16R z+GlwqO79$?@>Bp-j!n3&0d5-0($PAWNt*Mq-J^Ebn8HWM;VsF4gD0%=l+D{g#^CL=Qr#hNwW03 zV=xMrw<{Tzmb*qP&vFLUWkA)sJBP|KtnI_HYBDT@wW-!7 zoWFUQ?WmcyUdvB2Z5z|G-L!PfUxVTr7{3{qbNX9GU2;Ng0&@a!LR?NYFY{Xg@?V4G zn*Fn|Jaw70*OEFlc$L1WRt-F;0Sz$*CnZ29Jl6nvN7L3>q^@Q;50qpv$~rATD2vDFKBiwQ%W_@mH&`uEuC=5!vcH_))SE#0KZ4|%b%f<{%j$2ya)aDwG+3_5uylmw zl!;+Gu#NsJV0lLf-qE;?d1&*$@QS~_uLi$=&29zDJ4&-qbDTh%0X{S3c~!QsO-Z*6 zxNj1&<@=*>soW!$wkrK`4UBh$<(juSw{ckm=**Mt^^air!1+U!XZgO{|?I!T!-aXPM*IG%g?KT zll!lnR>oh`QVxXEQ|D=nMfmTZT7zZ&>(hVsIJcT|e>(kAl7>^Zhc>ka_Wb+w=Is|x zb4nwJJg){K7_5^q9gkf+iQ{4?FPuz7z~$4L$-XL|>ryO||E;*@e}~!Z#VH&; zz7yE<4c1p>0Y`tpg_GNG0B5mVq2Rs1-oF6LXXArpGtRBQAJ}Y`0mTE@YCMy%Cr2)VJj^6kq_#~_;{ESO;%W*mZD&JgqsU2 zJ$hhWxqL*}$cMdyGi+Twlu?SsrfUzl`1mWYaZ0k#x;nZj<2>b8=vht=b0yE>?hadL zN4R=>%15OeI`!xVdsk<8%f~C1J^g(V5=Fi8B$x>7EhhMf2CMZ^3G%@~C>|As(CBDY zUIqZwTP(_w%x2|*POwhhbHa5(b9$*0z!T2thavYpgrE_;p6GIRvpeafr%}!F?}3fI%~dqO4y9-umuca7bv&>7AIib~elv=}Mb2 zuelg8>2WY*=wZ$)PfSkNcZ68RCrbGlt@ie|i=leE2dN>hlmD=7i?Pd_3~-TD<c?LN8+o5}aEp898Lqc7K($TLUHxk(mbuj1Uz?5x4 zNp&Ig8F5ORwMSGZI3;&O+td;`de~rU9}5Nr-i~>WHuy@;_qM1ooR5#jQ6CQ+5A(<2 zm|z@|XWuu*aJ&@fjpy@Y@j$r_3o8;awKW|hhZUi5cp*y1l%Qy8Epn&VAZ=VRGA3H} z%lVUj{p>O%&6RuO>?-8VszLsQ3Y1T)N0EGd7R`|ly_vPp4a-&fx6}(xA6EtQs0yTy zua&keMCODV7zP!7mWR4=@?u<>j(`|Hxqta7cpDbzhe)|cGO#2eHenqC<9Yc z!XnVuORcx>-bLjR8sLk#un;7KN2u}y$-S2A7=$uDIzmmkKRtH|A6p@eBS@)NzF2|`~>FoGH3lbK*9186jK@{I7H5AC_U1HVdvNdj!xaIFg(mp z!Cr!X1VjA$g#*o2E(bAZ^4T zon56&Yzult({o(&T&IUSz4BA!{!i(X@Tg!VgW}-aL&0KtdJ{m?1E2eG5QSizdf)7W zkr83)Jp1{wjog*~HwRewYXhd`dIs8LaMA<@ew8xQLp(*U$H>S)H6;`e4fTbGhtwt9 zUj-p#u+F4}NTix|@N~0>$qeUCP(COwE(THZzQJEpa36a56X^3iaezSeEuI58htx)=2fjHu z9-ZV}s8>U!n&#%FqO7z4j0@rC@2O-t*rp7!&495C1le8AGi6u;^byExC`NwoDx^1+ zAh&NNa{Ki}MpFTDq~uqO@=oKD?2VS0{gBW(QW7+VFKs4kfByZJB-$cJNE2wdcuFmlsu zc;-gJIVBJ?A76ps@&wpKcEO}a<{+^x1@;-9=#t{3^tNrx_UMu40h<_^x7aICW~1v2 zo1`wVG4`;oGux^4U9;WMDZ>S~rOCc24r*T;gQSnYUGkUxlesMG_1C8+sguQ3(z;ov z$&Toh?upw{-En)G2YTd6{j+`5aru?34~i&DBR1#lzEg&+ZD+3 zH(Rd7q6j!zyx^T34DU?2Z{^VqN82+2hf#)?v=`!!ho`7Cid-YAk$uENonD za1cM>^K0*5_H*Mf^{G*q_uMo*^2NQ@cZfI}-22T2Onq%Q20z+_rLRrL`v+f^{<0m0 zT6qtTwo$s}Ghd&8G0zUgnvYhZeMOtf*TvrvvGNW)cF0g%x^fcR5B-RMM5%v*CmN>p zL11~jiuY2#cz}9lH!kRp${8(im3|c<{cgm4Q`N7eETfCjZ=<|#&1^*fP2*8GtxmP+ zgr^ojHzWtHJ;PBvuNQhQ>w|&?y%abvTh@l0`SLtm+M)uqa+<%W0fkGNQM#fP<*WLr zY1zu&s94t*#Zu^3R>`m| zZa~S(b|u-v>+Z4dp2Hu0eiZ}OjYQW}XEkV5zN%dTbGBo~nr3w#DVM{66qcF!vA#6c zldxQa+MLolZohf?#yPp(ZZy_WGcL2f+^+4frRThMZZ$B@@^zGC`A1f8=Kuw+32zC^ z3AMRQ@A8fTK7S36-we^YOxVu-X&uwv3YIHCzNFp?%{lNS+gUH_*(;Cp6%9AcBG<{y z%O*J|2DzRH!wJ7>x^>r=*Eb_}RXyTXHy~lHte0io9W6-Q(2V$XO-NYNsC3P51<47N zHLvVnGlFE}{AyJ#yv$i^=<~+mFLTv#=-K7r5gwVELnXXXzCD^^QsS+mL3Qo;Dg=CJ({Z zxnr+Zk=SiljP$EcOUuClaFiuY~Ncxwz7U~2SODLSvLX}>*cS$0m8`G3-H1*08<>QjlD@mZ zS^!3Rlqd9(cC1fP=`shEp=JJ13|~JLbDvm^X%8&M)Vt@SW^^x<_AWjeQZ9sWVKEn0E@^Rx2?v7(8tdmfpV% zm4j+v7w&}M)NrhQ@(zqyItiXSe?(=;2T`6838^}zKh7YZ=1dbz872j~b#ks_jqymZ z=oC2SdP{~`1!OZ*$J}Co!J?P#i3&0s)035#D1Uy>;C}QBWe_~d!}N&of(JdXYBOPJ zFGAzAeyAALfL@c^P}H{=eWtXddT1pcdHrEL_WC1OdH+)6)nvgV)EWIpwPDJfv8ZjS zKtO~qd_%nu8WVz;q!?u6XJGWiu^2aH0)~$riKg~u6qXkwJvS5jG!tTsiHJ2xJuFFx zm$K3lrQAtoF_T`IDb1|vWywfUbu*@#RJ{zAWTnZToMODOtT!jAeHhS9pPZzo0a1bQ z3X_j*e^=Og+M|bu9c<-e*h!Y%=#?HI>*eFLn~wuJdH2BWUftESldmm0`^v|?Ygaf& z1t7>62OqiTIfi?~KHLj-kzVK#DSc7z55J5k_~*qa7~xYKhp07n(paZ0GF;To;KPF-V+*z;wlo$F;oUKR#aQ6{c3j>02`+u| zDh@xq244-R#-}+td|{5nCn3%_X^z5?a1R_0al@GyUmS?>!jDOQct151&lbdDW3?Xh zn^Q5aUnT|&%|XM+EL4rjl4~{xxs!7cvN#96%kvO7uK<}-3Q<44C+bF*qlh}@Gb^E= zQvu!7GGvS{LGGwB7zY(2Yl3`y46lG;Kp`UP%t#$viu@5Z$Qx9F#_{qY)|8KovUE8Q z0qR!(3^EuR;DtcBHxgn;gaji&?sv($L}a8`;AqP%k|vJ53E>u!4fn5LbHnK3*^;>p?wzb$lrc^~qVzFiD@3s8hh6eN6qLLGtIXEjWn50TBM0 zg4*T;{rt5Be|5og&pyR-!v4TtAMlq1l#iiYP*!%TRhme(we|e)`eFO?8lv;ft7D> z#+1kBVd@j}v0COI{_^*D{BO@-^E>z9u0KDBxlb;EQJyQ=gNqSSnt&d$PICY1g{+ob z#K?1}ZekPK7WPNsgeoO1Ma^nztap<8qn$Yv(;iuc$chx$gxO=&i+95%Mb2TWAKI4= zN9)od7_f0HO6NAC<&F`kT+t6Ts|TXjnjxrL(ibhOhhX9p^U$!Yzgn)I--d=I{ZKZu z5#_U*P%)<&wF`TrdD#H8uNs0rYlflknh^@<*39pZirKwUHlr0K)0$B_y#+mIwX1bB z&THF>rZk~oQUmfP)FF3#Ei41`kvY5+=|hW=+&>4#0r^UL#LzDn5%op{mdm}iLXVJA z9U@ERJ)k}VA-S=LDoDhZvpe7t~Bt$1!1L`tJIs?Np){8-&=Tj#R#gE^8fajmR zNBV9M-h1Z{(g)?a>SK@KSQiB5+Tq2$_hZ~s%~#*^%LGi?N zto-vr48N~GHvD-tUik4D<+X2Pw86U1mSEy5BQfc@k+}c;jkxdS4VbZdENtv-klsH5 zn?GHS$uEwQ?W6JNR}Z1@oIdE`-9_GeeWcI3qot)9Uw-yJR;-wVPL4K6%uPUiPa}FS z8VbLXCx zU4-u0UKsK4bcDAi!!Fxfo!k1Q{nYsks)<96JQD|Q8jF^dgHb%YQTo6j^u2Qon%53S zxQ9rMPD?o9fGRW(hp?5WL0kzuI`Jp#nhs1NA`*qrC-iKp9HrI2uhHe zwW?mpi)5^-Q`79VjmTZwjO^77pdPsj6uPiVNxYQZ(MNenYaY*(K+!z0HPB4xTe7jA zg5eb#2Prw3@L_3it&haeho`}}E*9PmacI7KjFhpj(lIAkri@1R9nyYl2rBEW`ruNI zf_2SG!i2`-{v*=>vnFezfoN{4e`u64mXF&C*0rnk1fQI0>1f=p$)PA zTgk8txPLtS>SL5=IpeKF56edVT_b;?Sx$(o>Bg(Ft)L`HFJ(-_x)D$q9vzRNrQv)>d6ip1aZWoza4nq%ztg#V-KZf>OXa?|uoUhiW|94Fn6%q} zFj;@|J~Voe-@HtZ@|#Ty{;9mnuX~!C*R~*KecKJQtZTKdThpe3glfiR%j#AY_%nHV zlUm1l6*yFu4a*v#U)rFI&^bk>EK8EKXUy_?#4Tw=>WX&gMwMXnLv!&nj-YAf*oyCQPzCrb zUet!{g}sozMEcV*<|A#nOwNk}?s5+08sa*dn!gE_)2Q=KFZ7IM(nrOzSN2xG+_Inn z=7|+(oz)+^&+Wpt!<1n89=rE!Q84_-fxXzbYrAsV+`V@fb|2WK;P!r*?%%f)`}b_c zzTI1_(k%ZXET`?2^al^`!$CR5;r;u-0H0^i%NOryPS2^Bg7khqcjmleb;{vY?C;qJUj zP!2_UDvq54b~E-T@$%u%fSJSar9qDicfX)yNN`o`%t7pGH{wTwEAWT+fFDi*r+xx1 zi+%eg@bgZ|_h-pyE3i|h2aW<;B;)OefS+E$cMU1{%+dn9wih^g90#sYAxhF6{|J~r z79S_4;QM)Z%kkw{C->pU2bSQ%tP#M7MzLyq73qwF3Gu*yF~FF4z?=oZopXSfHsAw8 zFn(^TljBLZ7(qF` z%L&Ve&6}WLd8cp}xTS`}DK!M%Me*<|PC#VS-(fj}c@mZ>gt^!a^w=dUkg)5ELLXLKtT-?a$o)tUHm|JV52fp4(ksZH4U z^xa4-Oh(hlRs`w85NC>4U|gS~SCHJ0%HW-UH?HTj<2G$wQkovA`Duuh4@Ck1z4Q;0 zDOvrD-I!v*^u_Zrd&5eU43r0SV-d0k)*`CH48N>M42B6?Bx#DH-X?Ea_=5r===0rKbGdEXEsVG)op+LbD=Z7iNd5{*`#@^~dn`N3SC^)(=?)Qm0Hko_zWt96Td0 z7dVF?b2$7H17Rsi!KOzy;w(<%(Am9eup=PW8)>Cxl=Lo@d;2N;dH08KHhROvh$5_@$POt zjxGe-&mTfyY7!jcLNH|ZL^<9W6qaYh(djk>1;~9Nz)AKCM^(QD{B-UR+;x!{IBvK+ z8!n-uxk3%h44fe!jV+l<{wA^@8jF6n3PTo-R)JVY%^!oG4}6ErB0bvr7Na;d2*tjg zFe<_c&sL@5$KE~hxjq=jj1f5OV~RfaKA6 z$QV(qq-;{gRU>{-0n*0Rpy!;v82iuy_!Y$=p)L)X?L{c+Q-+j^GGjS1l#EDpsL}$bw=`ut2sP<_OsNWb^D3|#MyUzCfY1fW47fhrx-6PkyF zNu8r2K(BR9ZF_W6=Hl##@L;K5kknJAeqNsN_w+K=aB<7axNY0rR>sPY?I6ki)vH04a?3tvOQTxmY)(tnj8*;p;BX<`2_|B z!d=cQj}aaoE@kybh@5YKfBzfnJv`)^khCmULPCN9<@_}Of2F`aPH4_wF)#)I&vCkx zh2Wgt=^RMmFE0qs*$+4fM2RB?*Y%h4$zMUFNqTDe8%;0x=fV7c@wYk*d%zg&y# zJAB89Pf0{(Z9aUHgHb)K5r)bXlnt&%R!afm%jEf0Wx==Sen#&(0}+%L4v#cHBvcz< zY)(N~NfbhhBbC>9X8#=I4VU{$d6c|+nBm_u5^jY-a4QZ*j~s7!^py6fiH1vA2pkKg z9c0W{=+Gh`dr6FC)lZduCeNZ%} z0)5tvfMskUY)lTQUo7(jtI)$3jN9WqG5U@<@Xd^ZW0E%}ZkjF63SZbnN?Q&tfnQlP zY;&X!%CQ4mjOdi<0oS5ncoc^ybC>z9De_KO5C{(`zg@ZqLTcg=R28G@@d!s!l>cWg=o)(h%L8sE z`2E&R*!;J-xa;$|*!apEJo@^21jW0;riY}-w8Lx1Uc%Gcp2WI8t;5rwKLZ;d8{BTR z!BhJl#63UVfjd82ho?S#6wki(7@m3M5jY2Tkv^frUoXCaRUa+D+P^Ht(_cLaeW?z< z5ngHlEG8jPo)`X7P8%e|%5@Uzju3;~-}7S;UuVSRhvy(n-Yty%Gco?b8OR@3ft)er zN~=7$(E#6C9Y#MfAGQVl$e&fOf_nB^KMW;vnov5o7iIqRB`zrIVjEhO7kBR3CUsmMpC0Yhz*($KiUGlT)T+J+wM;s^y`1cPnTvmc6!@vf?%EC|=QW1C~>>oUlB0M6QD6d8_*< z5Kbsf4|wXvQw}9#Df6+ya>7S~aeCr2E$6w7pq$2K4VE)K1E;pG9gME=-SFe7udwa# z7x?1qH*oUw&+j=&@yBU^iF#SIZ%S|hrU|iAo3*$P1 za7|+6w~T3j%Wjot$9y}2a89|bfpP-z--6}J!+c2{%+esAg!>O#r411x7>WZ(V&0xT!oCM-{zV}<44;Q)p_Is=7^+mvT{?y5e>T+>I= zx2rZV(3_lI_VgzI2e6#p<%H$wOQj$3*FYV>A4Q9 zOatWC?aajv%fDo5|7-u>G@Enh4gtpx06X?!Q(;eF&t71cEX%(OrvT|vz~%3OiG%S| zd;(70|9f0Lcm^kN4d?fMfiu&~@u}GZc`v@1mcvY6)0iON@c|$BD}dLx04FbC&z0kHYdQ=Z`wEyp41Y_G#@^{GC9M?X zDCzxn;M7)N>)XJOFJNn1Ha^NLlKkJnwcST>^2k0Z`(J?1p23^uIDA%C1^jdb*N$Dl zzH2A3^AcU+r9Q`{&O0UT(Ze`dg%lXUp|TB7fvhfovWuWgAVFAc@fzEHBK#=gzw``INCB2ICKn$FUbXU z?gXx$l0-)&zr&L5sM!An0X}br<%~Q`5YDNl7xi1PeBaMIv2)7~{IF*SwjJGvQ>Q8F zei;FgVTh6sN<(xK^zjBI!xC*uM67%)Cdmf@VR)MwyrN z(FyXB9V;K&l7^;&!^!fkAUQqCqvPY`gCJgkavD9$xt{BomLBGmcL|pCgykN={;-pe zZ(A`+u+X~rIAX}Gv1pz+2wkJx;gKGxV7XUe96XES5!00Z3s_DNp3stsc(It4j9(bN z%L&T~)R~rnKr@DvBXej^MAcgmT4g|3r2$2wYEe155xpn&LGKaGc=PS&uygC*u;ZuC z@yZL2;gLr-AvKel-GLZCV>sUa(;u*F`YXrrC71L5L|HUFAb8AUhGECCOs)p;?=PqM;S?A>L0x z@;hI?3u9MKKi>X1a-dt^t$p_ zz>q-+b^1hQNd{@FWVV47rfUH9KncIFoF4f!4jw3Pd_9B4hQTi)0G=T}aPW49qmK)m ze5GIcyTMUDpzVE}Ve93HuAcU|-OUc3F=4O|@PbYE+Yysyz?`*jTgu&JCSoU0`SSg?nBE9I}F8lkAG%`Xt1)rzy{JL+?za^(%nBE(L*UVQ`Q4ghQ|c z>IT-L*Wd>A@g1Ek`+D2LoSTeMGe#o2u>jpdoe*FQRl!aRnhLP~k#$(QX%U2OMDpenkw<= zOHU#t%b@!FD=+;Hef!nG(X$&$T6*HykKaUiju8b7<@n=AZz5jGepd4QWc&N*H>nvu zNp7%lu)*rbR-ar%!>V~~># zo=%OzSJ^sj(Ffshlo!s1x#LQ(JFW(~<5H*>&V_m7M5HecMF(P6OeDTfjKPQI7`&Jp zgUyvOSkNmD6ZkvXff;|peI=S)}L*6PlW?WJX?47#9!`Dp#@4zsB1;%~ko=GsvbOg4Zev(gQ zklfS#VC&FT?%APgIXEIvK%rMKy}gweyq~8U5FpglJc2o;5pr^%fDp4Y^}A!krJla3ED2IC29Z== z+@S#q;6{Zrt&}go8&1x)NJ@@Z^rDdrQ3u#0h&jxWKkifjZeH zUM^}o2Nl>>O43BykY43nPhd{1aOJHo?Zm+b?nemD?F8ilD9+$^b`OC4{ zcezaCeca8%Ro&NlTyEp962j&E#zmg>VRC*rFwcHPfX!u2UECa{+!3&~@20%L;}fD) zA7emMYMHa#lxlI4^TNST3<~5;c zmV9Ji-zRrkJu)X$DKBiB1V^+j7%b0gGh%BD7`b_pl8;K8P=;Q24oAd*G}xHDP%^1E zlKYgXcO&1N7_55kZurW*%2%F26E@C7SaE`q4oPfIN5#xG7>5=hV|+Ez$5kL>Y?(a2 zQlKA@h1?01sG8S?>~TGjIi^f4=S{3q%ju&^U>Q~b3!gbdk)8<2^lfmt^! zv3~~Q`lKSd&5XzvBf^^W2x-u%0cD?xD0r1eDDze@HW~r4jxgR&*16;dh)F*xlkH-h zcgXOCeX86qvqRt^&s?`Ox%Z|9Ai7M45BGc~&&M$6(&CX_kcpbQYS`P`!`{{oUFE&D zyS)E&m#KX>8w?##1$TM2eEIq7NHs^Gle`}VL^vWW#~sm)a^I+s_vdIEOj_R`_dK;q zy*n{3N_Sl+secwm-8&ljBZ^=f>7br#kqse88J&drZ_UE*zPTTB@0wx#C7;|6y1Lq+ z@4Q;v^T`^_esuzt{&6lwZy1i-y>CNUT(F9FkZg&T>!KSH5YaJL*QSpSAo0x-#ZZw#eu3{l`m>T!^(lE zTHIU7j&;xQK)(&65Z7vgO@IwN3xY6k?MMt*GXl*E`k->Uyu&T(gW?(WD4Ztmy>na8 zb9OJ}PpVSZbFTE&rG1e$v0VC@9jew2Qj#DHC}^BpWA!j!TBkI}vzON@V4f{TSWZYz zSZ-NSjnq}OYMGwp+)g8~&R^Y#;yd~(cueR@0IdOPPEGSG)l`GaoN`;y1}U@bS0?8w zNS^WW12Zx2j~n3An1GZZqi?g|bnG$38-Nsvu1at)em%NiutOaV&SPGHU{y~Eq@kbW8872B`= zj8C?`gY5@D$L=G4!`7o;N?(jct@NqlWrWbJNL|~C4AyN;8wyuRTdcMY7<2^VHz2so z6P|YjeVPBi0?Rd1vL=gbWm=E;z2xOu(A)5$CP8@=CJmNb z?bfh-@FUYvu!sXn|2bGrP_AsT%!^Tug|IwjVWWcOgO`t%ua(2tduk_k9onkoRrc-P zhC_RI-GJr0_U{(kc>|X3+q(k?_iX#8VEKWAdw$dY7nc98{j+9s;p{O5jR}u86m@{* zd#=g)E7*T=J8c8&15&=mA?SnPU5SFSK`rL zIruoE1Ruv1;LWU_cr&LAADYtf=j;l+F<~R{^Fc}b5g$sX0y$bt^2tEN${VjxL{qFLf5| zZyzc9p1=XA*QxU-aD}j(kv<8`8BX?u^(P*;Ix+t)`z=`B5tRQHET?Drk8;!6er!KZ zpP@$0W%$WQrY6Ipd6vhe=#k*-34?q9tSu`;cBf8=^6)@+dk5t$-c>#l_8mHmvllO6 z)7|&L&dC{xhGfJfBqBUI24PY30GAKVh)DPa1uHM~^_w>0^o28c|HHp3Srx)fN?*|H zH@hH5c_{1U<1;=RH}9S810U+H;ZGuLxPgDv&dxN&$9yq%%Nc-ta2a zOlZOQ6_YSS`r%(cc~g0l|K-oG;KBRXVZov)2nctVa}kNYBU=N`l-AHI$^UV9P` zJ-iq~GA9c9(qv@S zXG52#gFerI+^RgZ4{OJ?1=F!?!*a}DHXptE$U{COMGdO>$gy}XdCrq9X4QYvv$ItH z;rVBOAQ)#KVOmdLAJr$^ygZc=q7agIgyx#pD(gVt!a#(CE(}UY@Dm#!qk@?d)Wqv$ zYD!d+Et*sf;W;(V1z%Ons@Vdz2RBz5aIHv|FlQ4vy^fS6i2 zA8m5YNPmpTjYU{SB*Ic6kXDffk7y6r2iUP%Fo?^S8%K zpZpQA1r~G;c1K}r6&`rzK}078W7C~WFn!8kY}xt=Znv{RggFwgef>VVg?XTQNE6=r z;!h~*m8YI{o1a)A&yqcuwrnKa!)-BT@i^4=tyCU$a~4d(GrzwdZ@v0BK7IEO@;o|; zK|=<@#mfW9h6G$Wu?KN3HkeqPgnL@DaKE(it2v?g#Nvk?30^o6L169*_&Eb|KH=>l z7J#e%!8j2Xh+VOP_}UPNchdv$bWt!~%nQZ0a&3GQABPt*lCZcw6=h>H5ji~z;Zw2^ zIV~SClM0YLvl4L=3K20X8~KY{@dJ*cN4_5{qe_uJyabtpOWP%B$Yd-wE!aZt#ing?FTv3byMJCigIzdWL(zBg6x4 zK_2i5@PVT%WwIO*6dnx9TzUF=DQHL#=;ZDQS1)IocToVft6gUW$$O|@cLXc2N{~vh zNjOg9I!+0bIrZ}QP|%jJoZH-eT-AENU>~?iUSY9e2#*VgvmA$jp761Ak51@j-&N9i zC@9Wf5)r6-6G)2@u+yA9oK$*y#~!#%t|58}6SRj#1k1JTqaZuMCxJUP!#PhcVtUCF z$TI$bPq4SrlIE{t2);GB6b+ISZq9Hh|N+?o4a zZ|}t9c(^jCslPki<$l7cgR7nLe&v*PB}}(>u~h*q>9I}t&H)jgn}BeC)h2Gft|~4A z^XMXV=Qfs&?P2wl_k^88cXeOX?vn)3?w)RHnfFo$Cwm33c~8}VHKDfp1%c!d6(6bk z4)bO|;W=QxVqar@Xq;ysW4~jaouq9zU}NjlL;6&h?C+}rO|$=Ml5Qc9q0)!L)qpw& zf7q`n=f=T!O1m+whxBtlIe*SlPj_iI_9rfTNI6`jzZ06X|0{qlWp!|}l{$E-e#Jo= z&a-c-YsJGEI(x%cL%7z(B_MX*dPL)x@TWX!6Cc}h=MrdGf-xg3TGB`{4aRoiIh38l!KUJ1jP zeB{ijN6%ILQMO_LGH29d(ET%D6WvV(cw{UL0^{oW?Z}^A2gA4`<<(icaX5k+&9F`J zNAKlh5K)ng+oBxNInog$R!meVOnb`|H=eD4HehW(G zG@xKc4RWVeB44Gt^ll#*T-~JgXrf_tYcj%a;K$H&1L3FkB$%3x1 zaks(zdnRJteM{iz(p|ywq*@(vN9UvGl(zz&O}=$U0Xm zD8G$P3SDe4d~rKo*!ny4+t`2!kB*e*hZ8z^+NeOYx};cne+iLy8GmG^CL%A-3@7hy z$gR&(?+$e{+u)e#qxw~^p ztYp|Iqf)u39TOg(3zNJT*k^fT(W~o_DenXPHNfb*C!=6&PlQ*;!y`WsepS&oG~)S7 z2QGV-S?43$O$ci-D0vst_!8J;yJOhXbJ26%K;^xizpCv9EYDh2gUsc%P%wOT!!KZY z%E}s~udKCtny;)w)(Y82L30L+>~%x3q$6Y|bf%6o0W`O9ncK8=rJMSr>47n5xMLV> z5;~(@$~f`GrRZGfi-5jH4FAJim}gfieRV6OCTODeZ@mKM^m5Nz_aEW-&BkNW2)CJ! z2E)0`a?rS5d5X(C!MRpern^<19bq{^IknuC2KcgG=zrfh17GA~{dvyk^{{8JFoDUb?siKBXbp@cJFti|yEc z>Kpme-;WiKEP$iI5p~P^qI7j1PS=$9W!GlUgAh*MNCPSbi%|uEBC8(ZY4t z?O%cA8t}dqEdOV$<9@d?4sfJMT|4eWNX~WEZNDwU@@t@6gXQ!rPZlFAkCW>;X<4)K zEH}tKYSI%+{;!ASzm|`xo7m0e(3bxW%>NF{Q)kzrXh93UmFs8F!_$y2&pAzoMUz}f zmg|+UTmkXx>;4&7p0bF)uHiM$dt~n$uzcvsu?m*&Il1EoEZ@6pD-Q12sbpC8?jruwVo5 z{c+$DdHFFMmx~7n#om7%UsaakLvs%B?l)2g;K13-zy-=R>`kiJatLQv79-35hpKP!{IY>h%=H-^4h<08a_)(#lH4YvfoMUzkE>%*Atji zyPVQ1jQmQoYMKAfSw~pT;0F76bK1FGO)16lk6<}vSg2V}SWeIKlc(hTNn?A-M{jUs zq=My|XE|YcqI_UdhJ~;^r*mf{`1#@XuHBT}3ZeOXfBg{Big^94x8WZgf;gRgT*SsH z@AIIra5W7K4O3p`lxcbHrI%IuAGdCUZ(sm&3JR5shQVx6-oOOyR^S<}fVedef^nrA;@yPQJqqLzIeo;O!r0HNtPJr2@M@EVXX{jcp&~w_52xC%$nx>hh zOtRfVw=o|z1LUJTUyf6hiu%5dD5@@j zSBMW>z1^Xca?q=r;DcbCMo3OT&hyUx!Sl^u6KGJJ{eVVLPDvhaXTRwP!s$uQDIqzH z^BPDe>>&UmM5lM6ww5rxrM@0XA!r!Zju+p30p_$gOqo0opMCtQN?%lwuDtnP{pwwG z33W!@m}b2B&6|kL3d3{nJc47Fx5|C_M~t4*hTsTC%vn4UgGb3nTdo;X5AnqLP7Urk=tG`@F_HxY8m*_`B>icE-5_{)DnzpH-Nt z^6-~>1xE+K!%y!0Znn?@Zc?Y)POeMJ-FV1x_$#PHV=P>Kom3mJJj|C~$-xmpR;U{6 ztBjuStRDeCfj&Kn3H3Pu;V##^lJ4-6dy*H+A8*Tn3j2RKTb7I z=uX{lm$s7gEp=irVh*}Fc{)iO2CDNHlN2NE8-yOtJ=DMiw{viU^D&9h3f}t5xpJ2C z!gIv(a$iE@pqLPJceRCEfCsudbX78GVG+Sfr<-2Yw@G{O{AynQtOEx*9Niog#CCAC zx8^72;p+}NXUR+I&w&rtgUbYb{$c*=7df5nI;*lexI3uw@)rbz)?CN?CyiR)tSj%U zl;dJu*k7X(qtrGAVCFLO)b?S11mT|YTvu@1%UPx6HiB|jsh_*_GY)L>8RI19opokf z?xzN4q>elZ(mRARqhfGx}k~lCelAHDKHMop|t#hw$~0 z@8Fdh2zgsY`O@AIL56(L8m9Mzab_jVGb&-6Ci7FukwREL zqZ+BQk8x_L3ZAH&Qi`wk<_!=c!5?U|s2oriDZ)QEx<)b`) zav{SgH2dh3|ciFy1G=jB>N(^BnboO4#RB$UE!Y+f)Dn;dlGDO!0;r3V?tbS+_7A~KS+hku}8&%6ES4t zV2piW1iCU%s-2C}@+X|{)WrtV){np+zIzDmYicp?x#?=K+b7mb$#yYLKxnv^y!%BU zB*+bBb1VX)y-?g0)s~zjY&!GBgielI32NFZZ>=U<|)| zqRKyKS~Uu0)gxz06;j8RAZ1K3GABx3n^uFwL7A{I^uX{(XTYylB5bnU(0J!aWY2F@ z+TnT2dm(38Ju;WnB4ZgLc%us7NdTO-ssWj6d)+XCVWrV6+Zhy8$%rhIG|L-rfO7MK zDz#4YGS|GewE&0&)ATA=wyrNSrH>7IYzDfO$g^f(D*8M)3BGNKxV^v=P4|pcK}vhB z@2i4QW-gIyXKAg{EziHB%~}>Y#?3IhqY;8@UhQ1gyu-PU!5K9u&M8gvI_Gw#)7E#i zn_)S%)Y*;&OPhWH%Om<&{%KgQG{t2*J;n*c=~+%G7S3~>ww{oZ+nBasbvx=d4nfwG zp6H~v#Up=x1YaNf46B}4f=&^)qjE+)Dwj#Rm2Ch|u=C$-%zFbG$apfT{N??PrqykRZp3U)2Qta%rdK?MNC~^8X6Y z@>}JlfpQI&cT7X$x{k1%fV(3sXMoRv4^2hh0_oHL1+bh`2KVd;%PGTR9AAzhE5=~o zmHpUxY%6vi+=6}kwqdt?M-i4E5c^+P{=fEri`g8wd={5a9tXDX!KR{8;P77H*a7Jb zmsA2=+68QV9hcFwMw;NA_uYj5Gw#96@Ng*aGgz(;vH;3G-*{V|-IIRqce%OIY) zTk`xAIPw8-LhR2EVMlH{zU;pU`0)bp+3WbEREPJnD}Z-@R5C1wFC53YtA~N3U*OX6 zf%r>W2u{sj2K;;yIC~ZEzWR!6J0kf>dAEL#?;9HMr70hH^Go2sHS9Zm8P~4t26nxV ztHTE2)3|it`R|p>`Psu~aP~6&&ky0^r2|x%!PbjcaY8N(9N300YcueXCDt0?bI&!L zIeQ6*E?vS!dW;j8pRj6{pW{WswmEYJrzFkcOJ{ND>P75351cRf9yf_gF%{kX)SpE*n<6E+n5t7qlTeG0+n-63E zA|&@KgsGo=gbgl7?yxH44X;MYgeK)#PERX(p686JM#ZES3|KG%HN)!g#kNoI>9_CW zo%dhH=U=^t4?cYp*=4DS%ZNey$Y#9z;VbxI%O`m6 z>*pdiB?|2$T2R|pK8*A9c;TJrkyetbf;lE#hvkIc1mVh?oFH6Gd5#m3i*dW*|6%Vh z;Nv*9b#HjgmSr(B!)Q=58qtVH%*+gyEHKE-%nWhjaN;mCI^-~;V~Uv>W451fty0=s z+sE0-J@KLlC z=aQqh6MVx05p2@ICd?D@?YW3-Nkw>b0%F>d;gskBGv!c378|kb@f8@oa4hm$3ZY0) z2~a-&?gdCINf#54+Iu?+c%jrQ#a9OGG03t#DVeE4mz+Jw*|VJQKZ9`A!so9EcwI8~ zDCZ^D0|w>%l7(Ne^!6fWSk6n{W-!jiK)g3VXHd>?osHwM=PG-tiir#5J@8zm2@&v| zCjbqL()W0ohbjcvVfex@hG9@&i$TH*tRH*t`nkc(*@gza{UNg&3`cbE&SGLm_6)XhVi@ZL?;vjhU>QcTJPAW< z_CjWm?C$G~A-02H?`jPP4_geSb2(ETWe;hg`Rv0llUS?VQvg-=qGf3cORFJpadQ;1 zOzerv5*GZ7u%w01KvxC`uV@DE>`}~~!wk*)4e2YE46`{O0;n^ z7{MATy_kkMOm@-Jhd~NCWkSE zW}p_G7%lYr8JaU#=JPR-W?;=gT=I}+=sSSQh#`8P!F>d9A8giNfNzGle14A05Sh~v zu$Ei!Z=AEx8VGei^v)OA^j^AIh8b62*z-UZ@QCI{8|- zu5kH;$A)8w{ZKKPG`ERE?S_hctLb-1yiD=;6xSfWIN&^yIr9Ca`@;aA!9K%pewn~v zov(?1Cm8JWiywa3z%LIt9RblP9gffO7_9RbKP;Q&$}c{sp0V+Mj?2#jr^)%?ml~X3 zZtuB$XKiz?&(ho~EZ4%C<^19yL>>Seiy=aa#m;IdcoJFGJm+VF?;n>l9}^fB1izFJ zytd~(JoV#?xNGABcPhZ63)l*Gl~#8HXXVNnTVNHj941fG9*u4R)?@@dC*SGgmNtX-j7R1#N-~2a|Y!M z)|I1^C~hVU)c)wEO!X1|fG$F^a}kpkz#ifaJ9k8jxI*hR%7TP&TRxLjtXl-javL*QFGXUI6rxIm1viw;2Vqn~^`O0fqC1p=41DQYf!! zQ}e0)EJW7KVr0)M5z9;}6AsItSApC)Wg;wnS^>q+Me?K^m?l#BOvr|5Oa@ZNXCrk| zF4Cw>q-FY)Lg8(mGp!6Ml>DgiLa@Hp=ElLo}-_PwudTIm)h!<~x$Zw*4U_&D0MSkLopbx))3sa|! zLqAzx@s&hMT`CGEl%i@z3oI2bJzt^Gv(8`TRnDovh ztnWq!)s3=6O-LG>i{Nq{8drD1pZX09%3JRmB_vmrO-3Q>lQy$VoR1}3ikCEriC-&L zwqf;`k05Sb4hFC`HEUx_?NJpO@iCJ&iN34 znDWGV<1mpAT5=e#b3S<=AHz$w-q8JaSk9B6CN3&N()^NJusnW3KKyIL|CS63hchr| zsTI~Em$b|8B)!669G^jY(()PkTPER}Nt3v2ECMWQTy|`*v@~k^Otbq?-(}C0M@q&>rkR#EzUju>9CTUjNUq z{IBdESpJXwU6bv-c?FkPLuA)J+?$*R96kh`IwriK_u@Rx;y2*P2ROfE7``!h11%ju zSu?&4kHqz+8tnA5$DSA?u=z6R0GwYq6R##|fsO9~#}DJo&BMTjt-zOWVxvNh4{PTE z+bQmEA7gh_5_ajbftR)cM=#>c?<~SX@y~vX%k)rvW^~7;nR9`!_W}34j8|K_0eWC? zayPK$3%rw&g71vEzz5sFb8BuEzJsTLV?P12red?)0NnFBaPS&VQQDVS5B==odATM4H&60;?8;4?ynI#2t{l2~N|XtQ?*UH& z`a5l(pr+*%4qUy2OYEh7`WqZrF$&-4bU0SsE++V7FLjn+VdL3#c{bfsSN@;nS$^d* zH4M~HFeGO%e&q1MzXi*W?LK%5mh%Lk49juzDqMWM;3t<0Sgs6G!7n^az;gC1SN{Ra z*|VG{_+-e<9^)*#!p6Xy;W=xVv&Xq)9B-(#jey{+Y0hS0V~_rW%^~YQh>jZyS>FK^ z&Yr+77(CQUtg~6$vz&^v2)B23gQF{Z4tw;-vd{oU(k+*a!`OycTHNw1=WT|nl5RD_ z@<5FmeiY{H=hZX8r=zU^<#ygKFn6=T*!h#uFrgiT{cPb7<}1K2>vA$M4=#*`viM)H zTvfr7d&Ub>RR7Dg4av7)d3a+QV%w-Q-ky(yHX68%EE0O<{)Gm3=Y|Sx^Q5i<)Xbtz zWOFvM8*|V;X&9b-LRceBTiAg#sj4h1r zH!r3Atm(_^dY%xJ;;D2B0Ww%Z!4MsW#MA^B<01r*vhbimaYHWFy#9cgAWPqvgt+cp z#Er_L!D&9y$L8blub#%Q=XT)hJ>TMso!_8gOcRzryb?d{+l|<83yM!`ruepYz0nK0aRX_wx}NyurbAZihi~h!lQfuSwCwtv1ExBJMSKiX_nR);%+HC%A#`PvF_P>ao;Nsqi$jo z?87`DbMJ?NfmX2Ax}dL@85~005MCGqLxB;l;odL{w1%zD4Nei>@JXWkmLHAC+BEp2 zY2lX@3Qb826uIHh=0~AsQX?j=q&h#gUevF;akVJwDi*rA@xw9@TxNi0u@=^u{)nV| zsOiXnrY(&I)TzRBZRxjQIZLv{jLm~_WCmSdn#)V7tTZR4DvUwvM9b}k2Z!9{gUb*<#W6_FPICz+Tt8Sja znIk{r#^nRpb9f6Bu__EvIO2=TyC92pf^CZt8X6orj88=HtSsoJviD&!3c6y^(iDv` zRR+u|(c%7dCB6&~#DNe`oCnzECF{jz;hsO`V7RSz`?lSYc7EKRjMn81B39A zF$A@ZT0~5UhJSqslx+rtcE&(IA`Yv*dH`E+Kxn( zG-)VLD9TWfCq!gVS_Z0CmO~H`sTY$YGAvYt1d2%$Ih-d*)Q73T6G{dveCeE?uyq(J zAUu0{GmvLU?;Xf5Zdn7|SzHgFH(2gN>D$4_-wkF%`@zPZo}a-o*gILmk;qllN3hx-gDv~R*4a{|$C|(vc4p#S&YrgL4R#mh- zd}Xg^hTIH{86q&_A{EL+1bW%%U|e+|HrIK0hY8H5@2;>!hovEmc#Ez%Lk@QWK-XMK0hE6dcd zUOInCWsC_I`tvN0!|}|94iLYMtSzrl2EvZobOn{a58WqTh8wivx>;6-C42b1EQiID zcFKI|-g%Sx_klwk-TMd!A+2GoO`sm{S?Kb^G3$Z(`04m&-2duB7&fI1doS+C^atnT z^P5``+z}5=cPirNmLYU}2GrxzVVIUD0C~iW0^wQCUghj@&K~8lQwtD7OZG;OpH&3a z=pbGD@jCAdET(=$IrVER^-x!Z2~&~r zw!BO$Oj&6V-sIlda`@&_e=$daplk({d7hGtfmF}8{`xt(M>Pqr^8kexV)J7WO68k5IvFx688+|#2Bzc~ z4DQ=sq?J^egz_ns!sAhW?cxun+xfx7p4k2T$^fiyo z#mhf!K=pzGtay6?EagLB=VL9NkH7%>EeK}WBx-l5-BVKjy*2L8WN48$z6@oHn#Dxj zJZWdz>{8fddO_P7i>72?-_%<1@#CYk%rp4M?leR6u`W5!xS-zY(RAw z3Kun?Y)Lap7dJuM7y~n-11gse6B_0YDPEZR!a^8E@YiRV$e2@!y7i;b@z@jr-5c-g z7RKQOipZ zv9t(=#RUjoQi#YUMZzK$=EE>IN5EqVATuPFk59S<%NZ`Sr#bIq*%kICXYkBWo#8Z3 zt{E|}NC4xO=cgfRdLCS=RA}BX9yRxL!Xe)uT6#8<=^hoXZARW*O-NbMK6Uq*=}YoBJLvi z9MPVLs&(y1UBa5=J@PA&tEz74ma{C21n(sf&P!3A6jy@iyzCvPcRcnw|1&5q!SCC{ zZ@1fFIB!ed<`Nv|C4+HZGAL&adp_2Xup8i`;QzDpj?9G2M^G`gFW_Fuv`lJPxcQi|HuB0$qrw; zj%#Pn0lW6%ep3pl)(G!yhUGh{qkRb#D94^_I6Zp`UXNA)ufI)c9-w0>y~95O-)+PuwHjZJSOILO^KIUUUy6;`8=4Nh z^b2t0GEQDRk5f1aT=*7esKfGktQD?xwgDU7!22P|cq%>@R}O6jF8>B>dl%m|72$LC zO#g5*Zk)YFdA^Ek=U9LJS76;jd`|siU}Y{uq_T88X^FzaQ6s--pYW4&wJqJ=*2Gynb;H z@H<`SsS}jeVc_VeI7N-?Pg)gDRSpC8vnM=jo>Mw!&fv=V|7SgD7k@whUtl@QuP`i^ zyv+X-EI+>Ikbvbp!RIYlj%#oa@D&q$8Wc33kZTYS84gvn9$F8VTN8Ym1`UF*wY7lY zE*_rfGhm?b9G4_n7>rABoV~~yj`LFTFlSG3hUE;t&8=)PaEJx$oY;%pjgGSu;SMhD z!Z?hL_cJhOaL(zl2D${s*(8s0_9AB}Zf<2s$2kcvVhNV>M33xY9-xpTnAZK(D!BN2 z3s}x(M+1L*8n`nopR#NgTBeMEnZF$zbTp9GdB80$7%uU2o?I%Eq8?bTE{%b@A`Y6W z1ZZj!g|Yk!dzrKRih$*H$p~+tL2YY}@GNI3mYC)Y_~+@N|HHG~(3Fa#k%g$9I~*yk zxiD3yqH_LV&?IORcc?cyC>DhUOg3OZF&dU@qy~-}(}P zwfO^kBvmBOaW>v&I4eqI=8V*%Naf#_p72t%B#G1$S9u6+RdSr3AZr-PV?(URpMJm|Ucw!6Noo=Pv_T^$(U13lHX^n^GVbX1r8-Er>h37k502vwCORQJ5$;qC;M5@E2X z(aFUZBszL#`6U;FZ-$8s5U<|2h)N<|PtwMrr1q*4Y8fS!|`j(6XA1B(~ULr|bE1`p~d zKsp~2s#PGIU&JZ>5gn})F9AF}9nmqO1?$$Y#MIdn1*jLW+}A~Tddow6q1P**;7N4d z>|kSKCcyHQ+{Bd(7@I)i>*=QMZ{V)hDGga(P11R>f$y!!U@m@;b|(sB~T zO8_}tpHk^d&oGr6m4S}S$;Vl&+uIDrq)8+3UCPV;rJ_naGgLMY;44@gR zv6u9y38QfE*a1u!KNfOo2kq#0QlnOimwYTu#b3?1`*^_8&Pp6JaPR=ETD1aeRMlPvv^nvy{EAx(I; za(te=l)d2D!&~Ib-U<&razEbP_$F+rUF5HocrJ~oXoGlhAiVYI94uGE9^(wz`6Vt( zfraWQ-#%_);!oaYIM2pmtjo^Oo+os5_i*Zw4NHy_UbbA{lTzZuOAiL_4AEIHo`FA4 z+G@v|<^G-+Ibt~OUbhN0)n$+e`-zEP8HBTbJnO9UR}BopS)ZO^Ilm0x39orBkNAXW zq@*T@m(6@W{)&R-fP8em=u2%+_^>!+Oe#VQwU;@QXkc0wi^55jD4kMGefR@NY)r#5 zpS?(Z>$CJLehP`@$++kFdujbViWWB^v^x!{3#y?VlO}+;k=l}osd+F=&Vgc-3A%9^ z!jn95LN+v=Nl>)KLEn{(*a^7^8)-ts*mM{t=0e*=eUQ#n@q#mRTD6#zQC$)VeMvN& zBHgInqqLh61>E`+!5k4 z?cDl&44=}0<2O#@<&R%SsL6orhC)33K0Sjgr(ynm3-QXAuVdxYYq9?Ihp^;HYPTme zpmK5(8s>DMZOIt4E*pzR>gQC=8IJOq!^m1tHnScj)2mT1u>#rSijX~~SS%U(=1nX` zR(Fw*edA?DcRo_Pa*;4R4KYp0h-#p|R9ynXsU6od5 z;L63r$jOWn-sInX^8uO~O2i8|-(XL~7gC=wo7$y9KOvR!?T(MoI=mX)UF}pK?ci>3 zM)5@I56-BAoyNIGvwV;Yrp6>Bw#A@wMiI;d`l4@t8PeloVbgbj@MeGT#TB^!z2yRy z&wpvUkoR#7b`o`zpFeMIyX0=vmIhJZ$`AH|)-W}sAai^PB05q~xwZr0iDa?|bpdKD8Jj{#k9)`@-^&(A%sSHs64lL&-pSL&gmbQ7HB)h`-lj2LTTslTN zj`PlOgwb)mVR_=b;#;shZhRhmtHTgHJYK+Z(~5clzKv8~0zm)a#UHo0LO^Q?iZg_i zwt2}~=Dg0~Yyy)10ngbBz4+mgFwQB0%rFS`4~$0fvPOh7L?DXVq}*k6&c*DZ-2;Go zdzLdWj#*l93yQNb6lYK_X_Sky<$LuPP;<#tdm!E%P^0vuC))XvR^d_kdr<%Z?8LbIGF_?+^>vj0!O^4{^;IE;_E z9hOJ(ms7XF^8Z~K7Q@^UVGPTS3;87*J2qUyC%DM{w8qz9I$gI?oUqY zf#t_e2rX`w2|0ds8*uU)yh(%IgUS$WkJRJXunJ)Jr?|Lm0)En}ffvb^ zu588r^||;UT885^06pj#itj_yaqW?3ar*pkxK2X=?0pIEWd-5QmHQ*Bp`*b7i|A6d0I^QPX16qFY74X@Y6z6eV zpHhWAG`KraSWOpn6gWfIbc(&s&*IwIE4Y0ADz2Zo`p5eJ-G}Y=2|gK=@7cXmz;Rwm zaGckB8;2d(vll1#9l@R*yM<@@zO%<}!E#p`EPMF*LG7;;n&mvfXApb#I@#Tt;L}K* zaz7gz0n6E=oS`^_at7o);U~j!US~kg`#7E?t-^9D49o|aGt8y|t)mO=w-H|C48$c* za^C0U<|%+VZ}UDE4{tcTdx_%%F8KLg5kU2RnBcIQw|Q+0R1&b6YP*bWQ6<>y(ig_ zkmp4rBqsu1DQW~{g(0*eQFxoPmN{EkV>-ecGY~sGABwU#Xe*PD)LsZ(c_PBAQxM;n ziHxoyc%>>3TAcvjd_7{i@{lo^I=mwaP%hA$e8);XPMoY;htj#5;OsllYxQ!!@M zBxH0HqHIbXDrYsLbaE}~=eD6@S_9%6Qc*gw4s)MahN<_@!#IjRb^RQ%tQb$7(KJ00 zt1}Rm6OF9;0+hB@BBLq?n|}EW&un}FSv7h1bjz2p@Up@CKWu_ACms*IynzP0U8wJF z#>B-_Mc7O9ELjJ-;+>y9MOH&GmTg#v#SgDRXhszLlQk%uT#u-B8lbl(3rUW!5$OnN zG(y#2MD>zZ-2MJT*m+?eRzG?dqB7zH5VrBOhquBHLAnsg^$NN_3gL;(-i_wgLowLG z3`4BUVP#_p8#`+O!lem2C0%j}kTW!wmc8Xy*yCKX-umMb5SP|_1M=RGoW0E17>b9G zDXC8JvbXU*$ut_3faQ_V5eSbo2yb)NU03Nf&_su!&(MMBZ)Ju7)e2G5fB%Q#Nq^as$4PH zUPkAV(KBEUxiJ9N!Ir3*-hkzA-VMJ(H57ComBSLCXib5#H4R#_(6)5whf}?3&lH~J z49a;DP|rdo+|&J`FA2lEyC&nrnQb_Katn5D{tzcl{Dd|4&!TfW;@uxN!k?b4h{AX@ zPH4s}A3TfgJHHUH{NSFiaQ^%bd`$UN#RTA^?VmuIsYOm_HeUYvDZKo_gE)5jdtAD( z8AlI%4%|3^XiDql_n(8QJPm_&UgQ%8VB#orO)hHS?jiip}$P&blDnjC@d@&JS`iKk^wZx*a!GLj< z8Z0gd#1pBW_&C}T`&5>=a~I0Y_LTo8^tt;$vZuE1-1oK!krVqC*r=Q=R_eopQZWxYDz5X#aNV9G^gSbsloakK_khMAN07>g`XLu_?dEyp7ADiR(zB}YL}_UzG_)@+T7xJ<2((Hc`1v>p zjp6CjyK(Kt8EoG6HMJ||2;n@*{RAwIqHE#nXIN})HAH}87iT;1$?5fL7xDaaPr~2N z6JdI_CGP{`-|P3|nGc`FvPTwT z?XxSe_^}0;_vC!cer6tY^-+juk4JP@5-JuoAfhD>@xxOv^YOVjPWit7t%u;MbI0CG z`>55ph^fn_i5I;e{rCw^TtABdLoi<3^eXK;i;sW&5QCftA}mFZ6ZDs_Q<0<=bC`sf z)Ce-E5J={qNd18XIee3-Z;%lRWo|fvGeZ%SrWHUtqAUT%nq)**nh;h>ZDmQE*bXa> z70VdvcNwTJ7FU~w$npdvHe@2Zvls=VE0Nw_fQ0%C#MDw-T$2i86))3as?SDF8@2ys zX^1T}Av`@AhBPA%UpfXixifU}l+P%wkhAJPco3|ut&x}zC!RT;$g>~SpVg~o;JIhl zLBS?hgXsqiqDg_|Q{ zM5=(-Lz3KJmFA7gHSIz^rDFAP6fS8*U|l$5kydEFZw&PjqLDZ;A1PCdg?D-N%HcxZ zrH{c9BR5QiUm4Zma0{VFo;acwQ)S63r!K>-Z&@^3-Vs71xM zG|MHJ%z(K!jPC83Ep78Le2%CEMFM^bTTzA7<<$b-XD_aTYM2pb367ZX!dz&F$6=t! z3AGP*3!U}Y1*OQiyG6iaJ|A0eh%G^GK8LiQjq@etO)~a)=Y9H_*#h(%X6Fhi7WRUd z^2za}<9W&F;PWv!=9dO6OT#iOnagX?{LmP9lqy6W@Tv$!U~4RLR=2>opa(GWH8XUM zo|{KyL1{1Pf#82;l1F)O<8aBtJmaorq^zigEYViT>eN5f4absT7$#(hi9LA|SBB-0 zlvf723|<-hGBA!_+~XwE_t3yfV?*(kECNHW3TIQss{k~1J@P%go84wJmj|I7qPrur>;ma}HL zhP|cdSBMEdr@gd-diSSLu(%ZoOX_>PswvF~ItRbtVtJp4MLpnIg3oNd0k#CDd+(2; zy2}<#^;g>WXC}ez-swo&cY@%(<4JMv6p#1y*q2E;}-;fK=E)|XX_2hh1WT?`3%Wfvs^c;PLuJfdks{> zaCO-vY*xGDj6NC%^szWnSAp+yqj0V)65ET7_-XYTVE-Xt&o_9#AQ~T~Cjg&(j;oh| z-8?_$6&e^{+=J80vavO(9}WdN;iQfRC-dpJZM*0=8g%UWkk0=iPPWD4yVPiaJ9%ps z;ozhR*izbw3sdI-KR=C+MkV3{8X)0;$8hPuPTaTd+9)x(+82>3d>*O8$5G*U&lrUdj1kzR3&nTF zL~Jso<5g8SKFd(ydy_BrgaqPx!*F2lQQ$NUUfHw!>{;=Uo%{W|0OmYV=*0{FcOSOf zVL3~$FbL- zloR{o{&T$x=GeBn@b4jP1VY%d0&K~9LLC(OOWja`jg}sj@P%g#w4y0oh zAwq_QWoN8iC~Z&5nnSRKJr6ImO8 z1Y!8xG4M8qAgLxB$#uEV<-|adYCu_c1A>x5#eR>-AQW~{N4_>k#9O#wHI!-LSoOmF zu-15^b^ZhdrWoKB9W1=>71(X`MkidzLdGXYX=0p5(PR6qjIlZ@V3ov;D8Y@<6I%>}{^rst~Hz3e$!0 z1fY6^MTbL4?UJ|LAAQXSVu*v4faX@N_K;chhnb^=faOD-tYFWY)B$cnyWPxgh?p$Y z+20jWS+NMqh(zbCZcJM}3u=>&2F86b$a5(Axtl@eK3EKtosE9t>j&F7KUgRFLs63; zzIuqLH6gt%A9ufcKP>ΝRfbsB9@lOJ^lseB&{E`O^oujMGS}h(}&m0UrM13A(Q; z=vxz!I=uqw)>L5>ijAQ$Mz{$fu zV%v_7@y^Fjp^vo;Pk!(;0_Zt%HTYuW{BGR)^jaK0vmJZ(d;#1%j9<5Yh!3bf%jsI4 z`{HF7t4v56mWubbyoT35eiWCk?!f+CAK}v3EjV`UCm3Rb@xsS1p?q8e28B4HZOJ%% zy!$h3IsOCA-`s<9SGMBR<;}41k|Dh!0`L9wDlCJ|5ndL9)XpL#kj0Fk4&%rYgpV$Q zzPkvzF$D-6mn%#)DGR|d7KXw` z%0q%dcq|9{cp}9Z0}Z7Up;5ty+AaH`Lxe}6RuPQctW+`KE<;k`h3xJqyr0?oHkj%f zd(pCPG=ozHdkxK1LZ&6b6fI;;7y^5EI|#WJ2G#DAcMl&sdVXv$VM-UqOlX5XA{a3V zIw9-A(kSdP>l@%Myl3S~Ke6rM?IhslnDJexsjm=mBck;}B8BB%1fUP}Ky(DPkwKmU z&a=FWDI*q-K6O93#l{m@L)B#R5J)4#+D=#y$5h7su!#L*N_i3O~v}gI1NAetUQlQcq_ATN$FW z_W7*YQ?c&u6(}ms6%&TCCpt^Wu(vYk2`((}@gnV%{=M->#t_dYh(AmBWw!yeV_oiA4h zAv{ixvW9XjTe}pwc^Q6oE{--xOOAzx`eAyiQ*p*{QC|XreW*@&!IYT<{}68s8Z5*9 z{X2l`zat_-0|o782+z=-zpzlUzCE3s9+ zHmJnC;V%|AE&hVRmCBeQ|7Ra>#JST)P?DdCSn5M27!62Ei$^d$AA!0+gi)EAvJzn7 zFa&ZE;zrtH5KE+G>He&Q6Q}8nlt-rs%nU=rdp3fdZ zOiKz3l}5b1IE1IBJt+;Z=h)*w@sFS2qi;Vz z^T;}+6`L^7t}luj@^RqYUi$r$!Cm8yU}G?R!u{ZBpx^6AKjG2s8SO93CpHL9IxjLG zIO~1k7Eb*J>Z`EvI)^!idc!>;5cV2R5ytBr<`pf6OPHUC!|T4W)Q2<5;X!>Eub2=@ zUqSJyKC8XpsHSrp%1I1U1p?V#RG``@M zR_smAFWLt5lflAVhBd3^iS~-W5K&QE<`?6I0UGjix2f32Ajz+Wo;M6KR6u4 z^D{7ZLl=f9sV~6CQa-rd_YQQ1k@~ac)j6naDui{Q6=LcVkv*kMd~v{_JgAfU78BDD zGd&ks3#-Lsi-QuJ1O%V?)+)Fcs{|Zp8J64ywaA)VB|OFbs_9vnT!^-ZCcw2oj?7sV zC|XdD@}(^(S=5O1sU?tU1`GI|Ij0hid4b4VNOfRVxv0A=u@Xef$kFMr$@D>3SF)Hi zGn6R!V zrXYTDF3i&1Q2*FCWUXmJ&fUY1y1GGlg-d|^b`akCywd*L<4CeA>6)Ztr0ZkPc;QvPvK*!*6#|yCX1QxoFtX-U!>39QWtRy>_jDj}S*`FA=Q3lD z^u#69wydN)E$#6X|1-NKxpG^WZW*~KC9Za+@p5Z3t zR{-IaJu)o9o0_%-jHYY)GrJv>OD64?V7FvkFC^o7(mSj-1ZV4g42Smy?rgooZq<`N zObTb{+f~Py{9Au{SJd85V}+TX7WG^BNJmutq@Q zP&&@AjLK>OjjRx#r%{NL^5agn3kVdU=*JEN7G8c-TTJ>pwirr7$+hv)s723Ss<$kA4qW zvpjA|4Ye&T!m~Vbd>)z>bWjiFB=(=#jhzR#;>eLbIJAG4kYV{d6MX&y%m1P(2dZyod5~5+{oa@Iz=g@IB>Y4_*Ah z-{@Mu!j`6Be5CJ(AJY@?Q&A;;C@;g->T2vNtis;Ha{N}3haF{E*j-$J-9^Rtt+*V! zic0ZYb{5XoHsfGvJHAWJ$FG$M_&UiKU%5HrcySe#>oH27uIbEKT&BW4a_tHZT)!?R z4?T7H3NHL#e%Sug1fT3>-dl#{c00ItpP1lt?{9ms^XNhBKX)9bPSf?`8oU_{s#MSg zYoSx=A&-gvFR+|7%Yz(x!1y5Zp#qdMIOhpC8H7tRED|JVXwJs*8FVvTXJfB)X|hk= zmL~J$xV$aFbxwniWv_Ie2$U!Jlw>s+fJ>lUGWIa%i5^+gnjtEKbq1uolr+m3mIu&t z;O6gh%d_0c+YMIEJ+QoSWD6!Nm! z9xr_NHkLkr4;trt9@ z`P(<~+E4Fb$%}VET@j18kp+n9E=1Be>P)nxA+|jSA%zi0?<_>cv?jd0^JBcT_cK(@ zZ^yeQzQg2KR=~G58v4!*WX!5XL{}D4Cr~GTWFdk}BB3phL*Ec<*hYFGt~m>iQGST6 z&xA5B3Yx+g1H9oGME8@7*WG*=lDkvgVfh|gv1G4tM`w!f;tU5TN7&Q0{SxSpIJ&m;bx*gkM2a*Mg~T%KwlCQff6~ zVp2m?Bmxvc0-9UeTcf|lU<|SyD!yuvnf1j`7h9M++rYw=uHC~)yi9QRafiL9qliDi zYLJj=aZ`9ABu0z&sUxuViF=S-n%?7q<}?U0*FkVFc*7~$7em8bh32bw0S)5HjY1|U zq#zuH-IZAQ$P$EQ8Zcr0XiS_n0=10=7(1~Q*Kr!3{j?FDIu~RQ&%(TC7QrdS2lAQ- z_*I2N)0QHPC-)2;&N3`L#_QVlWCS{tV{;8?1b89gMY^;-x|3!qIq+_I_%7xdQ9C*#m zhR@tA_{~d4;M{ch&QFKKyi7RH%|!6DWTcOZ!NkfiJe91(7L7lS26^H)tt&Q%I%BiO z1>c3aAqUZVCH5483UC;GS~&X^xSXSE*f5qlCBygSLec5ngaKTVD$B(xK4x7 z*T)J20~|0o$bp_;d&pb{3qAailRMFm(sU1Ufk&{bNV5;6<>YINp;U*Qd~K-iQT?=% zQJXjjS!E`K#!}r5^@eMJlQ@>W9W7nV;owE>yN4AloQ7hcO+Nvq>pN_y#%)uT3+nKCp2a0tXLEc*Dve}Z|7*y^D=_W)5lSG@k=jR0_C1UN51a>naDHe zM@!|w@mSV}wc@!>IFco1B_Jj_0v6VTFl1;S;n5uwxn&31hX9D#Rs6!$9ZbmjQ_xaRQKgE4``wqmYoBh{E9|Lh?gZ7lq{U`AF!_ zM*PSO#CD}2x{b~;qYC?JAR5(@go0_+$fou)t~Cw%>Nq$h_@a1b9XzsvV4LhIj?J82 zhWPQhNS;yzmqNMl_+`+@-sCakvf*8(!EPGbvJ4teTKVbu@9@+0U-9FWU-0~vSF!Ys z)sW|E@WA_zV8zobg{QNnQ-8en)|1Gk{((Ny7b$rWsA$a*ZScb%Jb*V3ZA4@j)xQ=a z0xPueFI3^X%fDdy6Lay{=TGApPT_|WoAKc5kKi1&Upr3j#EBaxsSW-Db5_m855Ikf z-;Qpj;mUE0oiz$e)-S|98hE>e^myK@6V(Vb2E#v!etY8;!rPoZ&E-idT591N9fH6( zE#!&RMYPz$50fC$A7#Z_x-RG>%N#neZhyJj&p%3 z+=YJ2XX3GM*WlSb_ha=Z3-J8b4Osu?8u9g$xv>vkJhTD#ezzQRU!07WKY0p^mQBaf zWi#km(qs7iO5F45Vl>}ZiMj7gN6V6CScll4pH)9NQU5^^9*A%%UvBGku}av}?=Ro` z)XBvtSlNQGNtwb^I+3LSCTAdOVg}0Bv>lbT^d(%B181IOhbzK6O^9!4% z`^SiS#~R~x>qZD*o-wl=*>kFdtP1Opvy6&GvO9)9JQ1qq81##_Mb+94jCpR3fbD&Z zwnE2z^fR+yp6rIuwgi+cZ5GfyV@e4s7BxYpGoy1>BX(jYLfWFlM4AlDGgsCkdtH-| zPGKObo}K~a(>kYF14lM5t&F{3o zcY1d+_8@2Q&HCip1;xU6UBK`^_WhX&XiRljn&9(xSU&Z|<@gx~kTJUsG1N}<_ALMJ zz;d?R!S!F6lpe3Myb2qyOXri~-F}|ld644tj{C3U%MruUGxN%YW_kS7B5bCSLgn2f zkUWo`wRu#B7SeSs?(sqoC*yLEWLI?a`DFv;NzyQ9P)_^Uqns^z5uIZ$&riVZ3AaQ1 z)ygn2!6(D=e>}_ovH!Q2?AT@C+SxO}fuFD@GXgkzjO=&ZIDJ!im*d1C;KD)R_r1WC z1HhI|z}wH`BV8oEOUl9J`yT@K?8TAGm#H&Lf6ko+_EUUH^7rjWasB#DT>1S3aQGMC z*fv^HI=|BTcbo8QO$lC(G66sA#OceIs99n_e;)YsGwh%a>$hqbTzGUX9rqis{R=!z zgNJYFyjvBa_*Nf;Uy}6rBs2uuvr=$=WIgckD&WgcDUE%U5jw~ASMY626n@pl0e5Wx zzTJUi$%XhrlSu27kK=TG^ibf)&-k!Pg^g+Mz}M|1RK;)x;P-Tj|{7_vIH!bJ2?qB&QP17ID>A6-vfu3i!g@ZYz)mArZZIM{Sx%< z0qOPvhO=Bs|G{Pgj&eHv1`QOTyvIw}Q!IO6ya&AedNijcSk7MKL4Ux=-f}ApO|9+i z#IYP-0;asrD}as*2@z5(o!EI?^{y=B&S=1trx8}{3Atly5LT85n+R{jHRr)6O$Q6TC&H`K5Z{syuM{l`DX%W^AxLa3 z6x+FD>kyJ}L`-82Ld%linxKHGy#yZVVF;~GNAierXi5`NGOY#aqe>Conh8ZkjPR1@ z>xt^fMefvkagDX9(3Fg}ldjy|*zO z=Yewwzr6XQPO|Zf8m_1O<%6f6mzcCPkOttgfqh}&Xd~oUdV_LHH~Stvb2|%IINORZ zA8eiN1zeYz_oKnO+bwPL?20_Be0U9pO>BqEuAlJG3rr1#mChA1uL1DSH$Yw)3%itH zD5~QSS`i2TR26dDi_kHv6P;6rp`;-PO1%$^@oLz)4TLh<58d-SFlpUHL^mcNup|^Q zW3r)ZHwhrlCg6CR38AeF&P~t^?=f9xD&!3@P*q2xW6fwh@cMl)ZTun5t)2E6&hJBTbvM0kk_qZd!WthF;SYEmnhMeN1jy7RpMKm^~hGA2r3SWc=;ngI6JeBH$XH34> zkmifk1wmL+8iGZ|AsAn!g(lMj%4R*H#+VQ_HW}e#QxG{J9Z?gr5IHUb>b7{~vsd1{ zW_)t|8=S;h%)DnNrmmQTMfWbi;s+LC9xdmtpD%#a&&PhnCp*8ur@Owy2RlB+f(^@1 zJEa8~!}5_gvK(a->QP0{Xzk24R848diYM0M=YyM3-`$93Ha>?>w|tIq3&&yXg0ZOV zszlAGYUI>sqo6q-la@}z(uWpd)8-HG?E6pQ>5Wg|xsP7J)K$|_IkFlVwONQQq_V5d zK*fkEl+*F6o>+qyKY1Asz4i#6dhZ!L_VyDZuljTY3L5iKQlF3F>Ku%pH5#3h+R!nz z9S^#51Z3$HzaN1nbH z>mON-4bR?>CtrCKru=v$7bGCH*o4^J7-UpZnNmH7%!3V zS9Z~$H$N6JInjtCOQd6BGb0g4ZB<@%Ce~1X_~p&w`xc^m-e^o;HBCqsrIaQ^X9|TX zPAQg(m=NSQt_Qq*TD#k2!O4(l>lwwCLJa( z7>{wYM`Pl=v6#MOGU__3pp8{R9v%Q6wFf=lJmIeuT!S2;ik2h4CL1l|n;}n7B0Miz zfLGrLf4C}K;6icK#t?A~zaa2Zx6f7K};rWALxphf+WNiq#&g-3syc3(3`?B$cf?(l%bDBKlHWii^28-;S%74fKWg9 zsJxI@m4np6WO#{$v8|^(ihY#6 zr*99Km#h!%=a)6nY2l)*`#IA2?fSrnewTT_qq{ZzUJSSu-@>j(n!?rFUVNRvlhSh9 zQSo{VrhJQd{blH9E`yzit$2AeK)lcxf&sKX*qYL!eDoh86M&v4kY$k1FE#j!35M); zZgfw4>|yRfXC7%xC7qCtZ%uj(&}?%f~@xEki?l8E#UWvux!w-1p!jeDclfsOu_1 zVrc~Zj?1C04MSKb-NUvxQyMj*024!NU?U>E9yVY53BT@)vzW8#XE zP|{k4zV`j8jZQ^QZ8p*?(!}|aiV~@9n~EVGLtrm=gtN*OjtXZuD4pS=b%%@215R2u zVXk^_xa#}`==Kbk3+U}(U}FF-hgXE0_5}%0?xgXBn?69mZwIQUyx&>tD_}aqb+2dz zJR&K+un@RV8V*#a?Uh~#iVH(XoB_50UT~Guef0N&JWPwr)K9kZu>3=}+#A8V5Ev8V z#c#XGWP*jI89w>s9bCI|5(oGHD&$y}Et@0s`}vDAE2@*e$zFJT%l+thvIeWant?|? zS&I15V8rFhvFGZy*oM!r_>+lf-%yLm&yB{jKRhNh;{z*Q@#MjKG3$fzxa;%9m~r12 ze6#%{{EowT{j(>K-W7$FpUlRzcgAAPcgykE_m9F*6aj}ICj`;hizkV9mpkCWC)Z)u z@h$l6;tsebd82qqGmO*n5HW*nRxV-}6hk#85n0P>5IH_gc$cTmEP*V{9HH%rLVkt4 z%bg2?g>E?mbM_MFbq)P?*=G1))RQydm=kadcxTM65MM*^B%s#G9%#O2H1w?r7!YHR z_D3e6XlWBF*0hU>JXOPD(emIp*k}2P7eQ4k+E7k)K7VE@KFH0XL_5>#!`a4ro( z&HY_sqRQ;m^&;;Kg(K$Xi%C0KZ=0bp17-%vk})iofcfnvforzj;93IJ>|LF_stTrM z7;1DX-bqQFWIG>)K zg;Xb&RNaE*YyzH>F(|*2XE}p%$-7)XyNKEisy_?3&8ZWfTk+hS7JNOu9akP%1AMg+`0;bfJe~i<2|CXa;Ou@J zJFyr0&+fzitGnpfojCT;QoNfKg%344oXf1hkpL6U6t@FAw}3KB$6lgq+JV=~tbXMTC?>FMj?>|7*m?qrw(!)a6 zaxv}CA6Wxcb~Hi@<54@K6Hk5l2F!vT;h(6%w0jm{{HmGIq(z{lvl3tL`Wg?v@d!fm zBH)q`0ORm%@C+E*GK9xDTg$qM7`0(8x*nU0k8bS1tdAdnhJLhE zUFr1Wl?&t80wjztM$)JvOnrJO9{c7MjJ4&^2kFGlkE^;p_XU`rF>j(op z{Cr^T=m>jPS2%lmf?u+5{pr!VXDxhd*zgM!M+X7P8JP2uz07-ik@vh*p#e458PA@V zDqL@R8`m4@1q;7CkwAEFK+X_cp$ZX`b4vT~1j;2?ekVvSnUd<(trs{U!BpP@#TN}M z0mSF$$@EwfLm#PwgS!I;S`C5BtREbF-7wI>QrHj|Te0kGH5h~GS+VnUg}sL>hC1|k zmoxNXsTKxK3~NmJsaW~wS`42)5>8qV$ejCQh|(V3sVdmV`@<&Q4<5N%xMV8foI=-7 z5Qfy&Y-lq>kyV?H{F)35@1}uMYavEXX~FP`4QQHNi{Ok9cx444c627(OI485Kvpw6 z5!$vygtnS!FwE;FXj+q?ZcBoaOvgI)&2doF8IeJC`q7OWP|;R^{fB?W_dmRkL#KYl zvioKusXP&{eD@aAIYvZQq+;xfskry0`>_1px%l>{ck%O<5An#;tI##2896O^c<94t zMSV=7=VkN7ZD^%>_Q97gQQLI_KmPna-u&=+40aog2i|`cIo1BLR z`wnh;5xd`g7GsB1!PUtUMxzFAZ+sR(N@rvgM4@(g7HX)&T|fiIyp{;$wMHO!csTOf z4an;ZLw=V51sz5dx22${2o5}<~6+g>2vt_+t={U+M@&0d{@bu@;;>90c$FtwQf+wlmU*GaR zKG^#O-rw^%zB=(UzCHab-rV*f?SBoAfBwR)eQV!%K*Zm4;A`x-vKQYS_#P*39>=Dw zALE+?-{H5*d-3pxPvMQNAK;5)KjN+JABnUN;S||%{BYza9KLY`N3I;g)}y~-@0p$W zX2%!Ub9NVgJGmWS?feqo@B0qBf8T@e5B`9izwZ{;xbq@)&?${Q*ALRxO)za8|eiH!Cn6yA}To*`CWZD4=85 zww>L9?dN{O)-&62miFDrj!@bhXY<+ZR3>Ne!=>No$n%t&^CB<1DLsyNoX&af)-gOa z9H+D{P&#L@o8tU@ZVz@`JA`c)4^V0s z$*4akj=7Azmk(k4+1)sJy(jfUH;!V@rTt=i>**aLjMop}JVrgxbCiz@_>Ark$C-Ke z9K1u%Dc_I7boNhnevX~zcVXL!t=LZY_0yj|#NHD-@cB<4(b)j;Kn}moV%_7bvG&O| zc>U`)aPa04y!Fd_*hXcr@ArLp>$BJK-q-Ko!|&e1r$2APYxIo2^5Kj4;M>c3dYPEhhbCN(LHx8mOs1_BW8@m zs)tshd-^DG%-EUT7(06mhEHh2wB^%r*OPZ+{(XxvY56p&2X~`m^*GclX+`JyiJ180 z9L#-n1s1%q8na$qj`iO@iJeq7!F3VPbtDN7@sbs-LRO_92iflZ1hN*2~3V`>p5KQ|vG z3mTxSi$n3W8mxJ3J%SU0#g|3}m1&s2d=d_w*-CBD8boBO#TPCcKHq?FN-K!kFZLwX zw#FlRL>kg26+zz^N5A`dNTj|?1+~pG?*T||r2ayx7JXa?ATU;r8S7@FxU&>V)E~(m zmM_|MwzT?86nB-Oa!d`fnsbpkEKj`5E$Av0%Z!#>WVPlapN`FHD@DezVx%?}A+5QP z;+7$&y&QQR)znT`BC#eHsZ9kimZc-UIumh~SqLvm6wAmGljxHLBvJo1S%<(BJ^WL2 z2uL*`C_Ms-Y$Jk`4UnhMx+xr9;YtC`J$3Y3u2Iz_F?Ud^XWeNW9<(MG2`R$82xG|)_l4aiOtF4r9)su5Q3ru5t$i=V;5OZ{uCBG zwh*e)FhtRBd-!DP+b^wxdP*8JQ&SPQfcm1dsQ)>Yes8B0pnTOZF{!6znkRfKLecT) zWC62n(!B*FH;&B`Uga#w!g4Ae)K_3Hbcfsk1UE#Yf!0|TsOzz*h#Qp&JClc~Gu*FW zFZAXI#-ea(laLg0$O}X$)qPIOI?W5=?Iu(%9fr)w#VDRz3lpVdmF$YTb)8VP#lW>p zfzo^0VOmfwKy1RoawIRW0c&6Lgnn^kd~JzKDiJ-Gf$zV(w=gZOGXfMj4=$_$1GUZ?J zy;^vJ^Ev)Iu)Oy^DNQNA5-jI!5tq-gtmNM`%h|J>VL8jNsOWj-2|n}Iwjy>BUH6I_ zus6DZ&|D{$(mIu+PgESEgeZ%;$A-k`j9IubDNExRHCa0!NU*x!Zae+JAM zmh(Odj{N2lorEs zEqg{UsJx|FPCY@S&Y&_}Q2pP6<#!6}4X~x~KePXT!*T}Tl4p6`oHCeZmI+v1epe?_ z=2PAK3(sVvdfM0jw)09Gdm{SdW{5^28N4n$E)$=%i z@g%OZ#LCUH*neghF5Nr$^flhh$-@UaBfbd?!yZi{zH?LKoo-1`W6_QHSg-RqC$+8m!^`9^mW|;Ob?ZKXwvFkDbEF zD_3Yhb(4lvH)wes`)*vug==&XG#Ea*b_Tvk2*Z~FN*qdR1@3u`(%y^nG>E&-uJwn` zVeh^3v3=Ea9DVy!T-|$#PJI@qE?&lot2b!ydKEk9{5xo^WT-B)Rw z@=durNM&{8(gn)L&-m@jN3dB7j1@XA=wMQ^*-5fmm;q&t z&l-tG-hU3(DmSDyLui1i9hC)bXF4)x*CBUSJ@oY^ zz8b^cV92CX9VT!(Sb+x44+J z(}BW!$*>4e-piZ(PQbi3G?$EFIoAuWBmBaIp?HW=e#>}UrBOmd^`G^{dqeX70?Ii) z)gQ^&gS@wK9b*en^nh~7{NzCbmV5bo_jt4i`UtJy@YrynUCvT0>{UL%-U5AWhhVS^ zJu5D@802ULb0?N$q4M!`6&m|ywiW`Gvkj)W{VfLwV6KVRVZ~!y*QUZ!?g*LJVECk| zVHW0s{yImv=V)MS3V@L@~fV>VViFdu6kS&ZfP&%^RZ7r{XF zGB`(xvVzES;F&K)0zP7AI9qp&{e}tP}0CQcvw8_^Fxp{u@uz{hU2bR z*TdXn5V|L|3XjEur?o zyO3X(4qcW3_kZv-e^XoBN>8qCxwlMr!GgQ|om~cq|X`vc#jCUPWwOp3u}E zzhDApj&H|?S>u4CyMW_+@Xng0$WjNRFhY$_pM4NnVZIn!pN`g|NVJrMVR%(I+NyQJ zT5I)atEVMdTY~`|bx{~y9gnUW6Y852(b|-N*`={qMEROg9)Yp72DCRB(9ohsO^Z$} z+Z)0uECN--BT?2Gj@FhKjHEJaZ;3};O*ks5^r#yagVs?g7~Y+RmQE9Lixg<3^hdNL zBP-e+1yLU8$TwhGLk2<}WGIgb!ib_cXzXQB({{Sf4JMT%d@N+hjP!;{?~0sQf0U-H zkrN*PQ-lXnqrDLm?+@R&0ECo8Bcw1A0hFe>-UYItq3}*uLFP9Ic1CaLYZIWWiiKUA zH$2nmIVp)ia6u@1s6GT1=@3*JhQJa7+%kjVlp2VDVjYxKM)($J;GU&`p*abjIV!kj z1W}w25kI^o1v1KS|9~Nshae0IwniVnAuu+ki7#kE%A#SL;0NyPE50tz{_xAxh;)?2 zQHZEdf?H}Z-07O+g<)_{34*#L5`Jm)Jm={J;0xyXl+U0n4Wg(`4a^ILW1=5C(nFvq zjYLqsPI%+`q$^;qvx8Hd5A34dpezbUWL*M+>ABIAMnG2)gP>du(nb`J?D3{)Ru8j_IGnvLkHIQXYfdq#P5pgLo0PKH0_pUYpSFwVw$tXgv}Au);mV|VAB2b5m}jph>Ao^rQet4`6I;F z3i;iYFty~MjE=9L-Hy)X;}Mb_hIvn}5c@g2W=1Q<+%*k3qsuVkiACsIJq8ojPsgl> z=3vU*)6p`m3HLsKHq6ssOvj(c9D=e{i;GG`g)JhA|*UR#It?>!=pS^xTjxa+xl z@G?uIz4aKDJ+=~$z567d`}jqyd1f8%efa^be)=vfd2~6Z-!%(Qy!W*DT7j2*%rhUq zgeNz>h=<>P0*}7?6kh)7O}z8-hxqijukg$9ZTR8vW^6sZlX{M4v5f|V+fVPpuJbgA zyM7!$AK5~!(phXiu^nIS{hoT37jfwF5xo1&MjX0y7$PwhzNf*OR4Nf(oL8YX2T zc2*&Bme#>IG95CF8R}QIBd}ZtnSLlrmbVB<&c~$AsSuNX^08_2s}MOZ3;I#iub}-5 z(4(l0@vYLrtwbrnX3CT@#B^lfsUKg(!yi3?=RbZ9jIaRo>om4~>NRJc$(GDKmG`su?ERT2j? z-=X5gk%htzo^gS2ilF`+Efw_KI)-~fof|HeL1`NC46AYs2rY;b&$N>26C1DdWSmiz z^bC|zeI|>npgvkvD*cY6iDgn#F4Bh=BfdThDZ>h2YR(h;IGmSxqbulnD@QIZx&CuM zD6Oj$S)(h3BSFc;W;!+p$xTJbYAr`$SFMn^N~y}FdwCg4A6O#3K=4udAS6sF95BM8 zqo6m0AtF*QCYfa!Asd?kh>WEDUQS3#jD<#{!4PM2_~!;<&5x_m{&E9Gz1oBoAI^Y% zRL>V-EQ2G{$k6#(Ev9YiM*GuESo6s;xaK&(zH}(&em@ywKW;<)26*!M_t zQF|iO%CO|S85r^QFpPMk6KlU(N6&B~26&pmL+1l`od@;l{V-{MH%3k$j<$KjvGlFG z5H=zOriB$yO-_Y&dM2V479e$H6@ojBV&cl;6-_XVFbVJPocT3yr{5;lFmJhkEHuNY zy{QSq$fstA7dt%pXXoQng{%t8wJ-#C%%?t7Q*_Uyo>PjDGp!6wt2$v8WrwO|tq827 z`=1jaWL;VxnTXnZM#3VE>H*bFPH$kWgQ)X)v#KBqpx?L2g#wtns#>dU5M^X6JGZW%XyMcPOmrImP`t} zQy$qQ=@mX++GZdwr6YNgv++9b=WAgg&%iit1wHTVUA~|MSyUzs_m8^eS*~b_g`zX* zmS%bK>Usg2Sqna4aS5H1^017d`(GQ&uiOsN`K3kvGWxAqT#J554k*9B3*`@wf_aI* zfaPgx8pVC$7ad89>0C>wJSZIo$PyeDpqj4ruS^2vw*zxNUb5aWTe3TaOWVA!H!QzX zoZGkmOE}#JaXpk534%+YT!Q4iLAhj7Jci&B{Fch3xAm4`VQ|jI;S9~gsXj=a;dcV& zf7g10^4o!V@3ik^l1BOMu$;qq-|c|Bw+U!W*C5HTNU%I=VHLtgWn;!GtMJW@oiI(U zK;)cq=ogW($NC>KEd282?|PQ^4(n~VgY4T)N{`p?B*XGo>E7ua93~wfy}U-i^4R%Q zr{`7B?|tRJ!ScU5!KVbzIjr{tpMNF8(z2*a^lc8D-Gg0+w&Cc}y*MIZ_+A`6xbJ@( zmLEBK;6ED2`3IK&V}HkFCoeHAKMCyr66-T`z~K|X(W^Ln0XT96*n9jWZZhlLf40X9 z`{+^Nr*C_tR8Abn<*Qe4;`ejF<=;Uy4LE%jH%?x~sgvh%O6du|aaq{c0aPgD( zaP5sJ02*lEt*3y^l+JIvfs+i#fqf@_$F6If#C71@c{=IuxOxUSMw@$Z4ZksXzjhhd z4j;jZZ98#|C(gV9T%=sco2P|$*SRY_57GHcS8?Xj z4IDX3*G8wjN_pTiJ4>-Rx7fXf>>w_my9ws;{7_xENPDlJ$MI`taP0zn!=J$A3uph! zP5Ga+znb8a*Cp?A36}FZhwb0J2gm3d8J6#$25tM%p2kUn<#OuKN2m+}ma}I$!*Z>M z%Pm-*VPOFuD=YLHH29XximXpx;Z4rcEV6$6;S&%DmQZ0x?&if380;fI)-Eiqfd$_LdWDFeSQOC#uW+)mbj65D4RVDbDmj&V>Cp6 z?U(oP@^^1x{F-TquS}ynnV`vzgeETlp$&8%Mft{&4s9qk3Z_WOx{oJ2|_;#?~G#uI^%;;kX3K zdux_k+uMn+5_$vk-p1bK5-8_&t{+@q_=O3}_DHb2Hvnf?uGMM&3oO4Kl=s-5Lvl8* zXMxHPQP+GZ4PQEzjbF}q1^6I8;Cys zLtz!+Atw2>Fw!%b5rU!do^Z~PBe63VFK>PuGas0RXE!~CuYUUkQN+vjH$rJ!`}#K>aKQ1Q+qi|YiRHsdlMkCs? zgD|Nq40n&n#ne14X5@!sR)G<7OA;|XkIo&hz>LCJ%&9P8Rcir8(X+XrArljeV=yL< z@?IE)ZnAM@u^3w#gQ|jX6pSoFNL?bbrqx5HrFv6r5E|*SU^DSmOMG{M(4f~gB_Vlo zDNGZJplL}IUkdQo1pc*=!UK)JB;c1M;iK4-HSG_1o+Jb{7!fxyAFjn}gpEk0^+I@8 z>JZwIg1E8yu!?krMVJ#3hG)SgHAvLO%xTpybY&uZWHy59W1(qHhH*p=jGfu=%u>QG z#uLHWTKK0b;27Z!TRpW2ksiqJE<<3t3U(20(9^wPz|U4NwHAg(6J&vd5X0BzDMR+O z8mMaH5I#H|K4p5?rTM|TPy;ocFM-*%-vFm>m{NO^M2mWyi-Z%>7$ zDINyOTX>rZk?m=)h@Tl+I^tOG99>7Pj=f+9tTeA<0Kbb2#M5 z>GvR2l(TE00t%{Q5yO&T8kq}axdB7M9iX5(W0T;C*wI-~Hzx=P;!F3Ua%%Gn z!VuP&is+6UA<^Vp5)Lm4)3l_(qc9ALhD3xi+%FDCSW7zP*Bvs2HH@vY=NpGHK300M#*m`O;5gkJ#b4kU7cVWC|ARPRT*=&Ql?Z>QO*}79oXX z^z8AZh8nuR(ZvzMgV`s}8-=5a>GvlQ`4h_N+Op|>CQ=&dFxDgsIOw2rM<&(z@S<3R z(KC@uzg29$@p5Djr!vpbLrcF~QKbn`(eIifT}Qu7^m|!u60nsmyetWZk^}^$>EIe2 z06&u&wi-79EzN`NMPB-Q4Ta3U4`j{*AafZ=zw_=G>|+VbAbS|Hqp2P0i#~S!VCH6y zw2BP)=zPV*idH^02u(G>+}9drzE<#z@JGe?dRSBa9T;i{Lwyob=vh-xdl5oyhq68z z-sPcmkFS4;ZdSS#E3Mw<_3#; zudIkfSbaQFyK=`hVlf zk=T}n*yc3E56eKts3H`OuSCJP3gnC~K^C=LQS~W^raBixb&ZYJqZ(3$@p@1m)#I`l z$f+K(S_(WJ_st6AA*9t zp-=|F-#-vu8h_}i4Da5y9xX4`V!`**Fz3y27`46u%U_s*dp=r(Y443h*V_%~c&!PG zznzZ-8|T6$-wB};m6-AUcvQZWhoxJmW61~8P&6qOW^x&pzB(N(50+u^Pt!5_gW;I< z^>jSG>q$g6$H7+Zgpfq)`x^aV<~Dfu9XW}GIW5R}+NSsm#|KZWXBUdvc6YyyB(K$O1Hz@};`F^N-WQ@=SXH9I=k}Bb4 z&d@bwS&#fl;-U(~FY58OW)E%2B-ngAobC z7s-0(jg8|;P@KbgUD_|DBgN%=Y+6hG`W0mYmS?Z5L(_xZ0+y%E;K^1a|80U#36=}p zce>`kJHcmfST0Gj2v|<{qF`w~3KrI4P?94m?)!IGF6o)`y-Hrx6JMN$Nrb_U0}mPor{}Qx4t2GBLqt`0^@5&M*F3u>5vV%_h$Khuvv^Z|fcR zP9~j8Iv?BZ$M@cr!Z`lzusmr2wIOq>1S~IG+aX{%dz(kiqhlC?^UH!ijDff?Ugt7k znEr=Jp5<(RHNj`|!cO|_IQ4H6d>%fq8%Or<`9Ctj=k0L(cH=nz!190W@0je$S(XT4 zSpFl{WJUo;8J7PJ4*&habzDAu4%bhd1{etcb^sIrT-cA(hqvSE)iXGL@f?1?b_G{Y zur$eeO6vx$AG#)BGdp%)JADNgj-SDeD=dzF1~{_~IQ27d|&Wr>54hygjmK#5K0w<3i6Ri8n70TKP3Oqyy96ra? z8aF6SdIBho-+=SK0{gbmwNV%)edNL!I@cK-y>Sy4u3pCVBi~b=`FwON{kwMT94;TG za-sZRJNG*-TslQ|g0AT-uAgK5@k_XT{;Ie}R&(L&W&VBW#2!ljAjCweM^Dqkcb%Qf z#YCPA%THcCOG%!=_45?@Y)^XZU4G^K@BiaV)=D zdH4vtL*y{T#|fDeXCH64diTI=_U>ifX;*g_YCL!0`02e^wRRD-;UNf*(IGvb20)2X zh%!YZIX4x$m@ot=1K=z7g};Km%YES;;3do_&{ueabDAz*e|QcD`1N>?tCd2+W2mjQ z0O?AdR!DzvID<^~?iCY!YSeJ`_k*pQGaS9#;pE{aCQxJ4-2>7RH5mp?J$f5*jGs2P8RD_}tRpJxh(lK?Iux>7z=Z-|l*hZwa7NT@q6H*#; zQAXPnR?k4&oNi28I~%Q&TT#|kj;Z&|f^Vvl2A47LEYKl<2CF_bMghpRotX$5l`BBG zx+4Q&V`)&`l>u)Wj0Sh6K---S^@t1@CltXng*u3%3y@9&&5Y3u!n2S_w)DBXkkej_ z)TSH+C##XxoR7qYOyrE9&USOQ0OL+kJ_svGK>p}zA=BcMq(bAI5%5daAShjr;&Jsz zY|IhsR$4dYj;^8sZ9QBQm56W5ModjQv{^I&&NZU6s|rQ!W0*gE27{gRITPOCVx?0@;;%9%`z~{ z@12c@U$_fvDE{XMzr}m|zd_lYb|E+PD-PoG13zHXmd|kCQ+H$8Jqz*ZOAq0dFW(ej z4jHSm;jZ+;GmqW{Z2ksI^V6}uG#3xol;M%a8oW7mEb!xp*zxMU$WmLQt0EHZwUHRs z5{24f2Gq0~P)F;{jYbTsPe5B;0$S=~(Lw|Ew&n4OMTUu`v6w<-mEbcJF+Kw^t0@EBc~Je5=C|F(wC5;8d=LVN9kthGDvCTp?sZgJ2Qoi3n=z%oFJuEenIPB?*yZ^Py-pK|4GZ0X5Nx z9aA9SwpD^RymHmh(S0xvbHtEPd)QNbX7HFvZJujlAcZ-ic76w9+p>{7x)_ly>FBGq zL;R?G$o%^uYdQ@?M`a_dGY#J5)SjjJBD$N}#(EJ0f|lH@&$C4Y0bsC8NxGwXV~sjq=jR80K5v+0_=-?Qdx3Y z`!z%&q%{uuj%4_hhazEYE`ln;C{IJ78GzDo`Wu{K7VUv-ektSC7m>rWkvXLX5p-`gRIZUN$w;H? zWiR}+&Mfo`91Q0uS5!`^h0M1vhG?km(pX@K-VT;A&Qxaxz#`fOPH}!16kCU={5tzMP0{&w{Z%lj=hz zj5OE}rRQEw_cVG+KEftuAb{Ef6Ah9>C#4}|Y&?v!@&vfdo>@WlE>=KGmb+lN6ER^b@0{&Hc@q*ML+aL1!NKw~Za)J=vk_i7o zHGFdDceY56@R~UA1d{G_zXk?dP&wMuy|5F{Z+{K_W<~H9EoSs=_J>Skg+X*qncqMR z4z+_UcnJCgm|>{i9xf^Va7hmoFMozaIl-3N3;v?TuTU$#Xz|Kb!X+yh?pbnp=BvbZ zaG62u)6~Wwl-lnQs_(p%mxoh%r;G5wa)Wr$6xx_1Ohfy%4T;dxy1FU`al><syx7$&_w64PEBg-s`4$Ks9CF!9|EO#FBR+Fx%% z%d?GmXvYK8Cdv^tD*}_g>_*+|#TfNL6UMyQiV07*FJV#(LjFy{T?81r!_ zhP~Q^W#6tu>eMV0Pp?GFVhX=+B083LVd7mAu1!A&UmIE4+?1mA~&VqH0AGIqwlr3mL(X48*WN&dRlRH`;950Ts&Gtk4hRMQ% zy=-Nxm{e5V5-T9RM?nZyef$6lW>uhKQ3LYlRKhed7lY#+kiV!FSyb0$@wO;i-+|P{ zRl>WQfh)uF$EPkS5gz8r z%gV*XmqMO|_w(@#qh{oaJQyeEq3W(qSfzSWTdu;aw^pKWqCLEt4M?H=Ji#Rc;<$w+ zLQ9>`@o(VwkMpwkI=?KFjPshjya(h8PV+1TWO(}*a-5>r<&$+8dhJ~Rw>%Q}~MK352*U7Rhw@a+_HVKgPx^Yq2zZrY_ z=Ps*9{*pQj_yd+#J~RsEMSjry0n6E|TzHgIIWpW7X;B$7K#rtx=XHkue`b6SZU^R4 zdGfI=g(B&PvzgY^{+s<3Ebk4;rL-iIpg1pkr_Jje7R#RbYwHoen$E+(oAM}uaNg$d z+htjLgK{C!(#!4y%NdIEKGrFhwxu||VR>(0-W!Jhm4&aUfMNN+j$=>uNXj#BOKI|c zDGmd0-YHaC!ETIkBw$o5?V^-ORk7XJs0$tG|8uKR-srjH0N;BiUt^_7l?5{1C7Cs-#m`pCw2(U@&gBV zWB;BV*uVQX9AMpYcFsKXFJOM)&|Vxov`2WKv;70h|FQomli}hOoZqnnICm1WvQu$k z)5pN!W5Dqfz>&kisUyIdLlCkj=MUk=rMoGOk>>j2q`@{S%SND)+?a!bwiR~i*P?LWJej0 zAEAf5Uti?7xno+Q31I`xU^~bP)=plqaP+`HI~R0Lna=Mju$#(gfQu8X{Jmfw{PHdwT>HTgCx;=42B|qQ2#Ho9I9iRM2qpZq zL2wK7grm1JT)bW2?&AtiKM&!Z%U-$+AbEmF;Tay_E4KZVaskRMooJBd=N)4a`!MLd&~p(I`xRVmanMw;E-$hQlvckNz}Bw}|wBQ=%NsreLwOkMV_$ z(g-V!MRaX4v}G~EvnjMT5#h~gaLZQ1I3iETuf&e0AGJ}r@NJBTdQ>*Trj0>H|$Itt}!0z5K{7!be=Q(fp4r5(&DK4+yzRmFh6|_y)uF%rJotBcM5bx*w zGMM-E_YwI_NJ$j(LW3;Kgl@j2ldUk;Cm(Dx6#cEtgblPY7ZNP|1q4I#fffTX*lI9_ z*qg)L$pTg$RF3|R@HPa(Co&LAo}l|bsRaW9tYM?`fXsI&oZ|v8*x(Gy7%v1BM_}4h zi!tfZxu}@kjQc-*5-)Cj3p1Wth@u&_2&tetUZ_F{L&BCg1UE(_pe{nd#n9o&6qbO% z`e+0-#lna7dDKV1uO%LSO;nGlo`$xkA*wSADWeLJ+?I``rgY@C7ocHEBWfo%AgMV6 z;WbGx3v-5X7}cZhGITB+ ztXwq<_dhug$ZV91DnM#y3KAwIBXV2}Vn@Uyc|@uJdGW(j5Z)C|9daFX zV^xTn5QfAtaY!7Q2-9d2QYIuLetZm!BSVqiVL(A=JW9H9kk^@yl=dvdQCTF6PD1>Y zcm$0JhPGRQq7f!Ec4VWXISIML4&m$1;`(sM0MO8Wu?g|Yc3R$A0gdI@M_Z|sxA`cZCNO&Nt zVtTR?AWf`I~m<=8l3&rpR0m=ER0|vXo1HH|Jf3{5;ravVRT(wr}>3X?ARR2 zkA;XQ^Xm)Ks651WW(sd|E*Aw)x=8UEfU6s0kTgCYW=2OCyI2-u2vl{^$e&FE@UeOD zE!84xc9rnJ_oxg-%;W-iH$)(;J42L#p(_=s(@J5V?hETAFGO{u3n17}XN&X+We96B z;s3|pdxzI?Rc+tLRaWo4_bwgj=rkSa=p6Oldv8{=WUE-kwk#L9_m)lykOX)VAO#2^ zKtdoPA%ry2dz_v)Jx=HT)>`ry;nyKN5AS<@57(7H*0pE$^qIZ)?ERZH_e!T{7gKK( z`0SY}bJKlN$=QHi*|} z)`m(t7qk2c5Z9X_A42qWANbyex9P>}Jf1%U^wD#tWpM*mMD=Eh@iW)cy^8EI!Lc9| zu^m|`nd^W`?Fw~IE;80tBBeJEn!W<0kCY>8yautYnG)z(6}}w)<;ken-Xk9dQhV|Q z5EqPAqHwGR*=tIu4X~hy>R#-IrN3&QZ;39O(tHMvxW&6n;F zuXfJ2jdX^ktw4h8x+HqTE!h{2aUQUVaDqFvYra`gSbby?zIky7ETQ-5R0Gn->3ruJ zkvx(M(`>bPg=cK7Ldqo7f$4ncHx(m#jX`vzGd7f=c)nR+BwjmX(rkNlm@;$0rmZ=$v#S71!|bPm+BC5T#MhMMXxf4s4*Eyl`JXEg2X zhOOQm@ofgw@9RZ;PX?Boz2q+u{@9aD?Y(~)%P)l?t}zX@1#8zq%S(<``$~1%*#=_W4^{OgO{)~(3G*iDs3mx^XB1@BD=*UKN z9=$)ylTbwUB(j&bUy}*VB)wCns7?-=-AEJ8F@>y%K42B}kbomf)Di`AVd3 zEl2uX8S-{F&^sv`evPrP()tX}*;vQiIX?i};cQG@w+&$pi3qBRMeil+kh8Ip+M`ko zU9$l}Ey?2bJ#_sX{2QrX-<*n$_hr9sP9Oy#&WD&imlCk;M2T{OYlT>dw_-Dlh zUC5woWN&KAz6GevKv{vv44N6HGH7L>%+u^mop-!LQuZ2WW1Vp8-Uj3xXh7b<7Li?H zV{py;DeJ$k?#{d&PlnlpN|t;gL>cA8Lc> zdY=KU)?>}cJWz+My|r{a_GE8F?mnu|hgc4#Wnuqk;5mN)P>l7^1^S=4CO&Vz1_9pt z>R>w3fGpZKZznP=SB%4_CK?6Xn&e%TN_DB?qCxR2*X^niKrHvfxVAxd+Bb}3J zf4vy*ljmjMXY#(z7@&)n|K3)pvc1sqoiVgsF#(5)a3oFSqUdNj-PLF370|7~YsIpUbqJJJaR?(;!!$>U|5$Ln(5nRz2EW3bFA=P!ohi2)qQ4u@iJwe zjqi~Xurp;h-E*q9>h0B3&%01`q!;(%C6pfSMczItn>(nE>{@`|vOhW|%dn)gDe5wE@e5?&E_{`JPP zzzP^&tW(a$%fE%?-`c-wDsjo?AenExfzKa)1Q+-90}uZdc=09R)Z4(z&jYWLz40vY zHrXkbO*vz4zX-hfGC+mwTl){R*IuV*OV9r8_weP*FW{>;SPP!=AHNS@-Stc0*$1dB z+(BjGL4172O}K5_6n?d73a4+n8F+}w$RGa*JpEU^^oLu4=l_aN9{)4&7L}WqoD8qy?x>0=MQ~O4(5*@#l-w} z*!%my*4GP;0lskdWhm+)(kq^xp75q^JYAizYwLRa`WM&Y!V^2;>+b}OF%gj|kqAwR zhDS^=mV3KmrLQ~e{N3Rc=mk%P<>7wt4`*oZ1Mfgzkx%gr3x-cI4MD#K0#iN?^H1NC?~m0|el*#D#;e8#+e&&^|SYB_S?w z(u87piXUvv5%4TYL13*O;WY4zsWl?Jf(Bp(w7|>b3JsE*%}DFYMM7Ja450OE%aJ%(fQ;ED zs2RWvnvYcFPbM9fp{=NRiM9jR~da z695-~Pw|>&bN2HRbMg0YU%W2wlh2WtCs8@% zJl-GY^ZBv#OB&U)6?Q8n@U6Y8BOKhEB(-(6mjIybd2Z+KBrx5@+eKhG%do6seRB^o zPkT7{Il?*A9X7u92+~F(xloI_OLn1Ys#|oOSH-x)ImH*Anc-MU1AbMk1MCg{SgD~w ze2N>qb0gtw4icSdmYxW$NkV*wQ9K9J2C~JIR?B}i^yNZBa ze{Ef+{I;J|tU;J1O0;W@ZC2E5>O@p^3Mw{KA-g{x`nn=STBw{FlhHEX37=$7#1_OO zv`UYlq9kaXZoxy-km#omQl6D}!!BInvjYO_xADXF=j@ zIx;tAEr9W%Qdrhf9iMK2ZnhCgb0vt_l7aAjM#RpWkTq6<{JwHz_2(gNBpVSMEC|`0 zkK`?l2p=khb-n|Ju|hZ+?CJWAsM)w0PHE8y$~K^AeJ3(DR0t@moUBFTMjCX_^dM%i z1pXWH5V$c1mMyi&T3d>gRtttl8?eWki0@GyPfYVfU}+qRH#ET3{S}oYJg>? zMqqjJU=Gy7`CwTchNZDX+3;>uBdR|O>JfVWBY7ePl1AsJIb#gPQz(y9{bZ@64A6N! z-iE!(brUpzp)$fiwt(6)r~FVXHFzL@V?FG%{N;QqcXW!Ew{}edOcUj@ZrXSWbkh|J zz&zCz&AW%-pbwz390{+CXm}Z-k=I9qwdx#rXd}?GV*=)`GOSASM&o=xRK6-S?OKh@ z;X*{zQyJLbi@2_IM6~OWN&973&cC6nVwa(c+ESKbVeMtUe=NVkP&s*BF%s9(Jy~r* z(dGtZaG<)p5Cm4lp<=EXHaa&%*QZiBG7Ef+Y}G{n zYjXwICei+4hb)MsW5lho3P9n%2ZGylP$fAC0Jo0UVugX);c_*~w{;_Lsu2kt7GzJ< zA+5gl=_aTmhEfXr1qq`frouilDq0 z*r$3*>T3yypEW{KHZOV?^Pe)o1&IjCPe5Q^0P#Q$zdS+;lMq#&hFGfm;YDi1(|azi zQZFe(a@J^9*O;JdvLbIywSe-Dox`y7mBGyr3=_QzOU4>eM(;+B!C|NNM(3^(f#<3y zNAw?DFM!@5*;@i9>*}*mKh*(GZ4g|ke-LD*`yK5FXCao zsSJr*OOZ%zSIjs)*RfnGs|8fnOHnvlCi`ig?-EabF2fv;B7bYMd^~e53Wr-^gv2BW zDvB4qe_u-|e9gfK$fCYhek9^b<0U9`WIny~=-EY5|A^xU#FlB~qeD17vuJ9Y5~$yl+G0e}wq}^OR-ds-YLknQGgmEg4w)Ov zQFEkM0tWK66z*4m{m;2F523JT$<0`P>s9|H7J;(Wn(qe2G@(6Onj|Q=IQHlf%-_8Qn{J=N)<0~(`d_ZW!H2iw z@|TX`%9l@|@46O@{d@qkcTD2)7cWL|w?A@rS!ugN0?=oEw+>Uck6`>aL)h?#G35%&%$1|Q=yHy5pj zVb21fX76u?)7AsE$URt(!b6P<(k}-WK)GUzfjJ+WrCmhMh0d9cLAl7N(D^e^PCrc7 zO8e$(FFM?Y&dbN(T^%K`JfKM}(2+gMt%o~cr1NLk%y62)ea8M;0n$9rUfOK3&oiK0 zng3^&dxY-A-WI4V?r6AlE!r<1hhup-k|(JC9_x~OpMJOzhBL>1b}k(M@0tR_6;Q62lE2u_2g~_`f$4BN(hsyEbql?> z4s_tpcnx(IkHAdraRI#-+4$bDgbLp;-j45shR#2Q19(!OLPyWTxP!_W8G~~6#OFY% ziS(XL-9z=}B5DIJ8bJ1mK3Mj5!n&s&X*4bw*)@uHzkCa?oO)>imY;kM&%gML$o;Ym z@GB=@Ua&L3oB=m`m!Eu{(l@>tmY)mC&jse+!t!tJUp3WNpMH!tpMMs3?KQBr_-i-) z5+`a}u+LnG6FH^0IJ*RwoUzNSCAd7R3|EqUFOyPBAuh|!#DxV0T%2$CHvLaa^RsZk zl#B1xcHxrJYV6O<#AW$b{Fm8;+mh9IMsLCs;c<99S&x@BCj2R0jT_TaaZ`Q{ZmKB8 zwH5g|SggmPstg>f$iPJq?7peN`oX+)$6B1-aN$l8@;^3kt%$ zk>s`#(cY`z?YR=G98_>{S^_7R6d>OUm&`8o|7>+7bqJR1P32F7k_`a z1_r_@8t%FOG*#g&NK@aCD;qWN4#Nw1QK*b75Iqg`%k@zMN|+LJVho}~`U#yaRXHwr9IT~CAS4YZGO zO2?~c;Jg}BKiY@EOJ_xvg&}<3p$R-Xcb+podHr=LOp{xKv~8&Eh@wV<1x z6EB0+giV!{y?5e)wjKX~|ih?lgTr!!W%J7Br1o!nb3P|N@515&IJ!AWpj$f^2eGe%MKk-54AIcuv0fGv%3 z5b)GA-GS@xxe4=E?m=)y6zmhJY@~Q2s5n*tF-tOdrNv;+_piYHFFz&0`C7&skwSII zJueQ06Et9@vRtJN#*soJF6}78srR44lb^keJD#`?vls1xx5Wq9>vP0A&bqk)hKU-g zQx%BWK-V#oDZimJ^fj%oMcQ~7lBdi_-jI&eX*1F{lnO*oAEg1^FxAJ=N~mWFk+PAu z$%bKF0Sp6`&=1r>Gu#CAXdU7v3K27&MW#n8t)m~NIy=$;<7^93w$veVONn$;HG|a{ zzi@gf1{48+;1oS|!IhfY8_FK5{g_A2LXIOXlw zdpUDcEwp1LFwil)E8?I^b&_*gs&j*9QKWplU|9+U+_Tqn-aHKs))tC{&?=oT8g}$c z@LE-*6Z|q`;g=DQs_`xaTauAfVTQ4_5UL1AG;QmLizygkWyvU>u9qN$`~fI+kjm;v zo_Kn5YNqy7rFKB|whr3oa?udyz=wLeH=2wf_;w zpyf73518qk8K$$2Geda3W|mBeSZzYqRvP%vR?+>)M*dbRuXGM+YpAYt80pxKNbR+X z+>Cv?ABv`%k=$m157o`6hIE8-0MWJO;vKFY$wA_fMYN;YV_Zk~nu9l5Hqtf3s3b6+ zLyo^#89o27rWBD=($jhggBFDKm=MuzLU?ZmB6}E!=ZN{YYbEAD0zXfBuJLs4iL{NL z_M5)BRz4o(ZEAvTdH@odGm*2tUV?CH`wCG&?;G>FD)EMAaGu24)Dv~c8mWXcy$_@7 z4B#NtOX3`$3R)u4EUaC>Jl=_(lZ{NPqHLiGTY;sqw2qewOJeL7rXyETd0#2(+9Z3z zAI@oK0h1zs;TP9r9F6i9W zErFc_@*+{Nz6SA)dUPBbM(@#4wCx!}|KUlr%@3n{=Q<4TpFqc!e$&%6 zal8SwYim$ReT$00N|g6kp}4OCd0i#QYNhk2%|u$69?_XG2s6@qu+o6={3Pms=%CI^ zLtbGf3^^La*Qd)nCZgFu?;$I+^lmXxJ!I*SgifQx(lCt|!#>wv>Ok?17G!R$lz^t% z_0%p=d&{Yj?j?KU^D^_MDrpzF&RaLt$j2-L?StiS_%D<6@e-sCQ5~oH&GphaT7>km zVyVk|Y7_YbLheKrEF&!SREd1*bD4*V#B!*=mf4pt!A<#336`_T>diytWIf8pYmhfk zj8bajqFUonwx=8=yGzh=Q4`kw*AO=SauV0PbUA+h!H;pp(--1mhUs@~M(7^P{su%gs}b9thR%yd zP_m;51>5VqNpOv{8-1Ee+y9&QP4&D9undHr}{b-k+*82U*V0 zeDnuf5YwTT{J9(U!NKe!WxeI_fWY+L%O;RFR|Chw0Q7%vJ@rAdVPEWzwky}6<%%_^ zJkf>BZRM!Euv2PP zjTb17Wtnmhunv36Sub>gb(D zee~ICaRAtM`-Qj%&m)c6d*k*xkt$)htUufa^**|W!>woKT>cS&{~ew$&Oe`>3%~!{ zb_R~0)et{p=Y!_w!g4k<*USA>?hke#f!bmY=y@MbqW;7h`Gc`&ce}{3uyaPnJdIK2 z7d}RC&`$o~pgq(srlYoqz0CD=Pjz&UwPXy*6ZSM9Zcja8cGV)3-VbrxtC4d-KRpL3 zhwG~_yk`vWef2h8edpv^SpLFG&*HULUzXT-i(xrSvIqo!?InTbZ0Ex9b4>x_=fZLY zqJIm^zqNnWRIj|Y5RmahDkz^k|2**FY2eLwfEQl_-ue)D;dS77vggR2eG_5etdF6eP`#XwLn zD%{;s5gd%7=tzV+*&@K%7BLb2aPe3PHy=BAdON_)%?^&MmcvG+f-RZHDm!@CI>W=x z4XzIEaCC5ky^|;GTzz5Z5eR$tAgo&H4@a9&IIIkTi(LeK-4o&I5)BX6C0{z>GLVygn^0FQ(K7|P7Z zEXzi;CKizitjQe+zW{Ie_<6$3+Z9fp3m(!oZVqA$%pJVlVdv?JRqoD|=Y&Ln zu9)IM&g*f?9^wqgd4HV8>nIRhSyut#i{}}J^R~RM0@vAin)BKC_zEoN^UN>ILv%t6 zY#dgJSGi&g%^8*}z?@}R*rVLe)ea6`PH^;g#!9zUP&qDJ0Or1q@Qn||3O{?e#ZviC z3`F%vGd5l{FVZ?H|COTkyEM)j?xqmY&SgmpcXJqAOo51`vYXJ94o$ZOX+2g6JQvff z7uksvmgeZBv^NKuzC0w*I`KUgB(EtzY=1VwI!%b_v&wwhaFGOP%$=x#d9XyJ6nb{A z!L@h)1iyXyE*!r8LXiVXZOlSgv08$VvL|TETpvo-)Z)(P?!kR8KY%AbdJcbh@jes| zRU@`SCqYR&X>eRY<$dGD2k;uc!q5Kld))rSUD*Hqy|9U~NAYZz{OJ*^@rNbC2`5T3 z1(v_?^8I+?)06n!lYhqVpT19EoTgU`x3W+eH&!E(J?2@;VlE$sEjcjHmWYmO7Rw|| zR6;vxg?7qJ9mWD=PSSvOqLuPHVO&pjbfy`a*>VYtmbxh)Mj9AoZ0-MXpIz#2lIVV_T5Q?|9iX;omC}hvpizG}AL+FtrL^m3+O79Kp+A6pjgJF~C1wTtX zLb6j}YAr!TUK-qWVQ@_gL3Ei8)f+p(K_~eShRQ8%2yaM%b!Gva#rBxwTG)$SrFC8K zERS4H`=&N}q!?*K`3qk5>xvM^Ue{}~#S@kFz)j;NDA+{LBW}5XG{aCHR58n->9-s*+a1qa<9QQ&gK) zj-?qZM*J{6x3zR#W9&_yFV8ue&dsAC3Es^q2<|W~dUJp{MzdJws@i>q0HPn|k-JMf0{^ z@horK(T~P0-IA`ma03R9OrUGe8kz6dHHgmLL$ZF}NDbBhHq_2`qiRD38aDTe4BEh< zN%Za;L-(F_SiOH7ZSzBD+R}&4dD_R;0W@yvk+gPW7lw~*5YO?h-D^>^p%c|J9pY8a ze;_bOFBqv6c^8%cQUT@mDLx3vPefQ=q5yBd^l+?`{4|tAr|@`dl?JG#GAyX1svj`(?zV&1$lux^a6NI@iiiOt3>!;PM*Aq3EJww76^{SpFzQEW|E?;utZzVMb_8;|@-Ruy zp><0a?mT%nHeNP|x``GvZx}?+_6ZE^m_q$nH_H3!(LXzg^}8p~P3>XtR3~~SJ1{Wa zjp4ZgOzxV%#)BKM>Ci@OI4~o2;b*57OpeUky zk+;1O+1u)2*-|ZD&{>ZIOVsLf|+&cTQaw>K};jWxM2Q@dw81IYP< zm|`s7lrv551L}k6seR=SY1YwFvU2$V#~q<~UDF>v@8Ym>o7l@uaQUXhVA+*%y zCiiHOI-o;Da}*+5qN%^=56@C}#C63`9Sw(9nLF&WSHY)(+WasTV%ppk9O9GWs>PPmk225c>}!z*|WTKe=9OJ()Dkrx_7h((Ss(e z`^h%yo6>!mDMjz)<5*&FLPD1w9Vdq1RT2ufqF{7ivJSNeyOF)Q3T>CJML;JNh~X<{B(2`nfug`&L;sJ*BchD}tTcGn1KX0WWlW%l?!3&;;OpVa|Z zU^&Ct#jyNbIL*e>oX5*}f68)(<%)NC;js=BAMQlQcgA6B^+UO0^=ci&z~`Y`v>b_-oIe1q0Yx< z@U0wA@pL~ImMiD@55W8!P<}4ZR+gV{oyBr0i?><4eDQkclVM?C{m)?eH!VLGj-PAF zKEBTWU09xaxL$yH>i!y}?WHz!PwfIQr{~7|VpyI`>uRW6vg`+YmNW29p?0EheK1x}!N_yswxM zE7TK(3vqI&Z^C`f@t^Jz&2k;R7diN)d3UowV)L;s(e7sNY6X-p)+^^cmSka_^2K2M ze0E*{zR37`|CuQs^XD_s68{ER&R+HGji0rL>h&I~|GQf87o0@pK^hxOS5RNSL)sP& z{As24VAl4Av(ha59Fn)!B5}SJYD!bL)go<6Ei_vfjPvwV?==Tnp`$d7Qqw`&--T=F zo|jAD|8;xD{|{Ks_Qvb4ig)?TFP#)v&eIIb8E!9z4#5 zS4_o$EkkKY#A6g)}xi`#(VA-s{H#haRNycOY!PyAK^VQxT- z9}w+>XQEv2S6v|9Xte@chJk~7f#2K#ur$lVj{uMSRb+i?;$xBI<_b-CIMP$nU`$Jg zQAaPTkR&+S`NP9G9L`Qbu=ntXdr%mhJpJL|>;-?HP=tDiz}L|mz7C%7arA_TqX%4_ z-Qei%4qG30tnhQk@*qzv3-yL=ObAp#URc6V)Zbq`(7o(D5V*=45w?DawDm!xy$@pC zf)MQ&ijaUnc>8+6J05&rNF3xHQ>AUs0?;1SH{;s>`tU-49Cc@Lgeq&|3BSuTlSB<$0E=;aZvm_j0wEf4u<#P3iEh*CVJU1A)yZxRk^rw$p<2(Mo|1 zy1`=P%}^(Nq83SA+438ENKG2lefczS%0y&W7P7Zc$8D}f^vM~HGbB%*D2HyQ7RF7~ zL7A$7iS>BbmC;~I3;hTUo;SB6YqT2GTYIqj*d%U!`5yfGwfoSva|l0t@aGu4c=Lih zOLG=7dyA0Xl`nxo11&KK&Q72-4&nJ~B$gYIP?nDH+!RFQrHW3uuEvVs^jIY3&_Jxf zgwT{IM5v<>pBj(g2)e)SPVn$@g$LbFS8sO-oNDXgBp)Ljd_2y6m|$4GLSXQMZn?9M zr+nB@VEJN?awU)_YnC$93n-7_J!4^S+e*^EB^|&yUm8v=rnN=EC8OH#vV`U^^cy7oGA&u-wMY z4l0LbSmLxC%e`pYc^LvzBC#^i5z7M{kXWdf;IgZ?jzHzE65U+ZE@uGbsHK5=CWG=| zkwXb8Nk9PqMqitTgcg&)^2Ck|r1V$>WQNtJB98JUC|Yk0l2_*-adox?1N5y<7Ef~y z7|34b2~>Vrf+ejjOEhR3XFIXyhexpEs(sjTrKd+%%yr+jLgw0sjundIWSIGV3;UCD%G{5we?6?-;Vf=ZHSw#NA$*g zM9ff!e{&`xwo~VQYYlv7D&exW2rks=51h?K(tIII8%vNeQ;oRE1_X}RAaJq-;TsB( zHdloFoix~3Q;rqsA<{0C?{0@GK?PNX7YZ+12cLl)EX@mpewNyg!{t!#%tmmJ8X22w z5KnDG^jNt-p7fz?lx%5{Yx3JtgJo79Y^zGgz9KDx5}gD9bFj$F$x894PFceq)^;t~Jca{)lDQOzi9R_?t}ujV z?{ni+nRuY{peC8-*=w1BIcs6_y(rn)0acnaJc^@WTvsC6!7lk>$ef^ZF(~bpMKY(OzdbE5U2c(O44g27hxLs@8YH+Yl+{WsH=-jWtu9a7goocYYKa z_V*)WyjbPpMxvuA3_d@B-qGX<_Qaj;Gd&07W1Os~ZhUEaGDzzPo z=Nhq8=YrsxMC5Ozcg$)t4C|@fj1|!!ldffwuAQY~XgZb7FS3uG8x6Sl;}IKA^E$ko z%Y>TlMf#dDH0~Hg*-RUiO;yglyiDgOdQt#N?e`Tt-#Oq)fyfo1b&h&h|tWi+K zIEZICORccSIO{*Nw>W!{yXgI3t9BR9@|B4$62z6g$rZ11_C)7t_5ycG^M|9xPo}vY zW1aD3u`U9)*;{;hoGXia`pY$*!R_IYb)42e^o2(e2WgIZuCe{_{t+_byiz_59$ckuZ zco{-aG1i3ExjyPs1jz?WPg5A|b=3Z5N22rS1e|ii;9Hf1wo4{NLL_>?3^NU6O>@;E z-;h360nes5sylfwF!-ITLB^&^diR&ZKxL98cT%WKFl=1&y^XLjdkHY_xpW*^GZhk? zv1DiK0$ktLgs{qZgcU?0K<|SjE4}mRx}5@+p}aj8zVWW~PEnzDO%=v>(R;&Ig;m~5 zp~+2!9rfc@_<6!9)F1u{5%7x(fp<9d{UW>&O#RKENKZ0%ghzWJRvm;?V>Ap|iAc95 z!(dgzXd$zvA~-&f`f={?3-o|L^$YzILlLJ-fId1Jfo@I+p#JPi4$kVg1WQ9!!7tJS zChCXysC}qj`y+p_1hM6ba837tezjF(t@s0xc5M#TPikAHs9&?8SlV0DrZdxI{Beov zE&tiUUgaF5THyG)LNUuUwe>Ww8_8cVs?Yof344~a^pc6%$rP$b9RI*T%lHFXCgm|W z*Y{f`P3bZre|;q?=bB*b&q3yzd=yffrRmB*G1bEys%z%8xyW5#jEoWL53b3eI!^U> z#7ytaBv|QPlRc4-{OMwZRmY%Y6SdJ@MpSHXf|lCbbb6nd={=M&mIM8;nd-kD@ja=C zYNz|Wp4+8jN^_}9)C$aIi6-l&YVp43j|OZRo64#GSO(K(Dofj{VcuRNK{2_k>FA#E zJnL-phn3v(X`dmsUtaqIi|ZcIv1dibKn> z0ns&gl|(c8ZR3_ z_ReZ#@2Wu|dt);&-`6N!=A1HUX5cK)`EbiWXqhv-U2F<0S3o-(Pb;vT;W$q-#O8bk z<_bV(y>8a&uBQ9p-<%BJ#zaj0d>;(-oR?*L%7=)i%hsUgqCPp#1&#GOVL8WVV9)Yzg5@leqa2Gw%8rPis6~6!CFLBj#KgSi%+>Fbgz6qB;eWTcgkN;Tg_+!`M&_mZ^ z@1MVmUH4vroqxIlyY9OZ^Y?rQd+z@(W^X@%9d})ZLx280cHVgjrf%Mc>)*Ho_uv`i zQ#;2R-r0K>Jk_(0b_;xFE%g5luv`J=i@nU1{C@_^S)#_Ulm9g7hIwZb3J-RP%-HV1M>Tezh6kKUUcxRd*Z+Np9RQ$IIq zgtnt`NgDMVOdIIkKz(%n!;;5wqr1jLhJ|7I^RGRFmtKBe?0m4Cfwll}vX@?aK}-SR zUuWOK@^9_`mZ?4k@W2y~;{A_5!e?K6ic{~rLH0U6|LQb8!{>PO^LO#u7w_VguinE+ zvRA(R0Iz=W5#IRhG~WF5Q@s7jXW!a?sGa)cG(P(L9h`dTZrn3Gf}ckv;PLP%yd4>W zS3(@|UbH>Fh_eS`Y=DsE_$*)vKBNKTd#OHnfd(1((Lm-esT$m#sK*OUow%#C3h(bb z1l;!*wD|g=A}|QKA=Gh-Nkn$C7N&R|{2ct@vdjY!-tlm^4}p_sB<#GRu-q{SD;)yh z?iL0QmteTqdBMZU2c9n8aB=p4qpKSnyj@}APXporXDkhJ#xaa%d_{<>=-)bPL*SVe zi-5uu_?KwlS)2s#@&!p2hUN^+{cGqx(L9@HWh%U@(-7R8fuJT6+$&SyU8_Y%o0;;` z5!;Y5r;kqYo!|+9$aP-$#p=_oV z3AIM3Te1*Sqn7}S?4=i9V}yTBym-Djr3J!8!$$W!C5Y}t7y?YOh_oalNEd|!OB$jK z35ZCEhCatAu-wtj0d@{HlDg9UboO)=z$?Jl)e);aTm+DdN4dK*Y#F4xQA%d-;VPcx zEWyH3EF9QVkzQe~at7vXiU&ETi(xs#amC|Y$x}Sb*@Ij07-v|`b}lSeJivKg@d9V? z&C58Cmnkruy~h=~m2>A6(5`@T&S&`*-Y1^}p9`!hO86v%V5#>iIE1^yCB_GF zd1(U6Ie4qed#MDjTNUpvUX%=y+|q*)Q>jHjK|BHr6A)XkhqgOM0u3g&n-SlZF3>!w zGZX5LEEoqEnw3x)D}{DV5h7ZR2yRFdaGpL&gYe-Jq;@Unm799=Q8HeKsf#z`hxgoo zAK&wH0pK}3<*-fg5?KOsUpc%pqu^->LqTsPrjE|xfmi>EAKdX{jO>{dNuc^i-P!@;=33-W<)U=bgn~^bq^~z3bvQ$G-Yx4&P&8G6vgtfj zOlG5MG#|NZ>3DOk)H!ZP>RcIe<_giVsTiH>a*>!Bf`OTKRCZY460Jf=zCCSkf_cz{ zpzqu7mT-|5${6PlAZ0QT$e5}`@pgv4t5CM36{@&Z0<5hQl@eq$fu18n zeu3pYh@ffKW9JV7?3vEbgoEHNOLrHIWAk_^R4H}~zK8kVTIM^;9 zhwoY5Y@K`rU=LXSbHK*riNcKyA`=r_l>`%&#Y|ep8t~eQav3b8j1(b*&cAR+Cvvwo z!!p|_A29TE&o%4lSu+Hr!IW{bO8%(G7%D@_R15Og*3x^U1WvjD7tWsZ0rz^arPo-4|7i0yL|P5b!geX8pFq@B<>}k$kEkLk;IAhV~K%1w~`>5@NOBe0#d&soR3YPwy(Hp6n>Ugf_`V0rcW zR%jctV4vuTr4bHj+tM%dVYvzNmlgwZhUY<+7#Le}Wc^Tjw}xcL$p_2CN&~_Qli@_| z6-(5tzHka&rE%~mk3lJw1OAmP=qG=;ph*JKxMCjKi#|L%^fiJ=fS@ylFD}>Qiigi8_N?{%Y!rb9?$iUcnWr8>yLe>vU&TTF)mF|9fY*vlWBLTZ!1!6x}H zjX3_xrq2v@ZzgoqKJc-%R3DRj_@i>N$i*1f&Fw?s%lgg8#32)j$ z^INEI${>7i%fj@ga)IU9TWUmpg+JP4?Whx|&dZxFUL!i@EVt5s)g=6DW2t@4!T681 zAhvy=)8xRE}%*bqW~gzaTiMC&O`;WXax8g^ml?iWfP9Z}uwprgz=UPj|~Q zhU&a7dzcSiJ_S3oH@YuehxI?)h7}ne$lqLt?#o7Dp*FQ}z7Fk|tbuE35VqfOl-@aX zZ#EWU&pj7X{V5WiZU)UcdmCV(_oxKy+`j;y6$s9doIS6__SK8AN3(G^-N!Rf`dnDf zdAy9_I8UGJ@y*M4K4V8MTCSQv{UswFFt2w-)s!Z1@x0Kcvj9`&VO&Mz-I-P^F3&~a7g~HQ#{KT!*TPwN5wGw2@I3y6=Ws8c#UJsE!0mfz z`d-Ro2^IE|{u8ao(|1$eAITO{o_`*X;B7pNw`lnbcmS{BF`B-Qrhkve@gz>+_(MOW z_hJL`_Rw?KLFIE#GnE^97A!x)fO;QY^BG|NcL2^Ho34>;asK)2e1QDFV~at#0>u{t z^KXLXti@h?`6x`(-m(l0$C-JY?!irO{vKC8_ETK);E!<8Uw(iS_g#%6_k0%z?!E&1 z{_q{_xog38-Ek>)-+n3f{Q6?-zV$-v`uTC}xcMly-gFq7Z$6AIw;o6L6*FkRl=@ZQ zoyFV@2QhKw9HuUtg|#ggqubWvoiE-L&2on29Ke%d`RlK}A~Gx|Uwlb`Im7bTD34*c z0?S`~_4%^^{OjyoP_CE)%)f=@-`c-wst?~k4SWTB{?VuS@dEWz^SS9tI3x11BAr^0q!^*v;rT*FUP3}6}}8q0ii2^V0*x46~6Rw#NWaL@pgb8-iwLBXPPve z3=YT3k#Tq~G9C|y$KkHv78N5Vfl5&i{g3Gf+Gtw%tWRxGeuCl*8lUiLO;fX*x^^Ck}Ib1Y8vEF$B$C~>Qova&_Jpu2LW|yi0jEl?&ek)r)r@d zEfcMB?PRs+m0RbiQ@*W3^v%uF^a7oz5m=tHfjW(2)d;Rkg}XIEeu+=%$VNg_22$Fs z5@0lYUA6og&w)jCUHOz(hhiGkmrS&va;6h4+lJ7)djcKX*P?c^8zn=HXd3H*I@f?u zZ7hOQB9WM$0<}pa`sA#o&4DUc+S`bv2t(f$PLxNs%*jqnMawy5c+Muv9BjpS@a^K| z0axz@ukv$&xf0-$Wmeb}IL_dljR869nX~bFiu?*gX`W_4{!Or)p*9->ZDso0JOz#` z`HSZjSkA`NybZ&0PWfE;Jb1mZh|sg}p0CAZq35DY#nM&Fv4Za3*THg@XHoJw&(^~M z%bjho)OjVAx~+mkkQ-DUtE3(+^|8kis{5|7zR;FsV*ZN#a7yyU(r_oZr}0OS0P)&( zO7Rs~1 z3`<)He*fJ4xc7wz@ze*@al(5jA8A2Eu@;&Z3*sA7khP`|JAZHqbrC_`yw~u znG;p$xo{d)Yb!7{kcatU8thM$pk=HC1*6r-o~%a^4cZGfmC&HF1lgO*MCUwzt_6h~ zY4AH*fL()De0Mk-7Y`Y6uv?GabU%)?7T}uBD%{jli<{f>@x7KTTsl#YzSa4tnrlD> zb>a)hjOgx9!Or>^OeZUCu(-CBXr z=>&vrOn_zD0>f%EO8537Y_tfG+o^q+EkVP&I;;q?Mcia9il*vNZmYueZRHr>)-7J) z>C@$iUY#MHDcXr*=+@J-n<|yxT2m)!enUAD$MZ%1k+mlI_t@0w5+sl2i+4H0Z-&L} zF`d4CL2^Vf_N3O26^ZvXAB!beSks*M&j6miTUhdj0W^D@ySX=pq!AX?@OoWol+$eXJZk5Kmd4y{WOkjxt9?&feTjd4XtP9i*Y;pp4FUfOUE zbtwFF(Xe)xA$@f*mZiEOxjP5h8)=}wz6v?B)K*T_U`d)gD&{!Arwww(D+Nd~jAmHQ zUiEz5VXM=TJ>MijFZ~*mQLwXByz3b@@Hw$|w7TDd$R-U`sScv|U$%_~#A^$|Uf|a4 z4YV%~qDeNAEx!-5XE=YTN$fHqYi%*odT2k9OVD+A4FXD{VQ2Idc(00CA)faYJG(@Z zg(Y-2*lx;dD-t@)qCcOyI#)d6jYGxqkxP~2v;f;vToFU>6b{nFAGP@1!ZJ$nUF?-k zWqO7NmUPYh!InRGu|B$fq(oBFScTMq!VN6~!n21eMb0Fnw;1)aJy@CKA)ekWEy8k1 zs<2g5UsEIqCxd6v7Z0blT^EQ|$sX`9g}^4s9V-**y`1VT(~fDrk~-`B>HgcpN$ZCt zF^=%c43l+OM#n)z?*n5f+_Zt>q3xRyAyAqFZ?d^l9viRYtPPOk`B|dnPa1~ZY^+i4 zZ;cU;be`t*QX0%?oLeoP=q$gI)@+rJh^%|gk}O%POQG^qp>S;-h7V1lbNi5JZ8J0v z&r6i)uK6_r#@QH_GZ6RG2g`ES_GS-rUY`Sg^17qPHllCu7%T&264ce!;DhmNc3?%O z4-)&WDBIhEtj)C|$HE_I_?L5r<>vW%_;sX8${OTcj*K&9$lg*XQast4szr{3AtDD) zT%vVCQnv}k)ZSRAZst=RE8SQpZDr3~2R^`?czqVrF%1QCCZaXoA_6yda>%w95UOa~0 z<6~HTVqDUeeFJFP(}(thgOv87Zbv6t_xGco>Ua8J9*k6<8IW^ZRJy52WX)oz|Hc;E zoPor4v&1>j59Ukzl1Xg{ds?%GJwxWSHQdJ4$lov44YeW(72Rb(Y+t%qc()c|U1^Bu z(TN3jX%N_&4EO3tgm!8WLgg%=DG^~E8cBIRe$)!1qN`GYlL+t)$5%#uoRl~NtMI2pQ8%^Uh#|`DK$J!P=xeqQ#vHZIMKCK7a7ht*BRRVl=TrnZAoIk!4pXm8USk96%48xV^Z)89c7zy_r=Q?SS#TBe6al7`E%D- zroYaVZNAR_U09xSpyn(r*PaRRslf8o{R;s;4HtAGmV*UTU1M!+?mHfR;95LJ?;3WX zkRakL%SZiXPC1}B2SHC+&;7w1#H^wI6V-#LHCZCplDxhU>d7KWlc$OiN9{ZBGl5d} zmge;t8go$c%HsntP&>q)*Bn%oL3!%7YFLhSg9BYEuv~%TZ0ExBe`e`@vy{gv{)GJzcc z0RQw!L_t&@A$u4v<3X~Aa1u}9Z9GFGr|0NdJcl=E`ZdaX1y9iO$H|_@yR!accpXoY zy-f2@eDN&ap>*eEJFsqU4c-7!L9M?2>~(?VFTDP&1n*>6&YI;fzVO_?4a*fMer~=3 z(Z7Y|-`c-ws*g{9j?X^*3h%%D9=`hI3w-|3X}tT!TX_Gycks8reTffFe~kA(`55nh z`U$06NIu7>AAXK6-}@WBdiP6w_1pM0DCho(6F74YV}z|$vzD}R7fSw(o=I}ix* z$5$avct2_--iuj|&%>7kG}wc`J((*IyoR zUfy^!Bm{4!B;mo>aNLy|gP-YQu-DHPV@@h`xvhX+wG7G2+>q+vi&%S4_}MtZ*To%P zUS62ODg~J9)|De|q!gBEdVvp@if4Iny$;bdAPTHa6L0gfUDS!)Or5~3ZAjlp zo%bmk_|YILb3+5tY1+DxI*Vt3yM@xUp<;oTzQqYhTU~&%xlYlW%^R-+>zQ*vQDc8G z3a6T&>7ouxs}&go70|ThA+atKDGe56bd(^wrxKa%v~GPa%(VrG&!i51h8mIDI3(zk z5uO++o?+sl=4gxMwkx1oxm3WflnD=4@gf&E&e9@hK)Jwk+m%qQT7jkZ3t-*e)foVht zuW@CY#q+!#PxHEb4Bj_`blwjiS2-pFe9q@{mh(x7fhEr>pxlOo<J6>4EX_;IEr-fMGA&DR#_|*o0q-pH5?!vrjvpSPF4{-9`^CRd7wtpzY#+t)Xm_|7 zBd|1<>V6`Futo5dHZh$RRxt0~_LE5f~@ za-*{6sX}OeG@SBc;A{zpSA;#vbwRkSu>kqbDg?zi({^;9lKkY)mZ-`&1Q!P*tTF-7 z)oF+*OhOv1zrV_e3#zr4ZqlN%HU$Y)sR*L_7h02qklHACS5sN64VB-`W9pKSP!fi+ zOkZ56_s5;tk+><-4?nSn;U_uC_*u3AzoYi+k6JD6Nr}PFb&>c<#i z8oxBp(jx51$m=KpK=m`_0?YMtwFv0cBV%iW=wb8kpB!*9eX0^=ySw0!8w}@yFyw5g zgPqwAwse16kMJ-2nXqiAL`ZWAQt2A<=Ne?4sAiqOM%K^vu|!e1wuMuQKRp{G+BdF& zuQm#PWDfDZ;zi6KdsquRyvc~-ZCx-;RHA^|Rh8Nqbvt^Yim^q`Xa&rpWulRuHo723 z6FZuZFuD({ZOsEc2Il;sf#qc~H!f(PGx%2NoCTQ2w(03T;42!(mhm#VHyi*pn+9^c zZA75)_j^#Hj*TU`0ITML7yESB0*mdhaA4oKptnl79w@N6`CH6~e(jodl{ck9UDx z67?ryUB#1|Qy1E|Ly{MkM>)Y&11k4IDgH-NjRtYimf|5gSg^_ZG)__sNdWTJGuw<248sPMPlOGoz#Zf z!KXR_wMT{|s4CY_^OidKfECoEgLQ8U636op+Gj*2>y56ba!6LRt5sld{+9X$4|BaU zI*t#EbOpo3%I&m#vI50Z)rc)mKu)I>Po8=h?|gX@kG*gYKB1QR{>OfY=idA)KKSBw zy!F8g_#58Goxi^sJGW0@+vahwr_RyCM-brSjoOM*oP6dn{OzN+@YtVziSGeWQ8}Wz7?!fb( zy@0U1XoQu-!nB6!!+I+Jo63;0ts1#Is2?<6PVHhT-KS#eHx@A;OR=yiFkR6uXNaA9tP{l-_rW+{jfU@xhzEags~Qn)sq)dqsUQH!LuT7 zvkVId_zY-Li-vU3(H_w(&twRHL8ky|2IU;!lVQ0c#lj{4p5_%`{!Ny(zjYzNr_}>Z z-x(EH&H+9dmX}_*`Ws<+HiKt6A3h%2VvlmZzVktH2L6gEFq&SZ4Y}}YiBEwbD#r77xW{S z%5l!I9>i=cM#hm2(Jfa%Im@oFDX^R+S&UTo&j-jC+xYNQ@wsB4jB>BlSo5FT?mAGt46;sM^?!$3A%qN3T1Ep-lsL z^OIKvmcRJMa|v*CzwrFC{|77=Z}8Vo{>!kOrB==b<_aWNBwD_O<=@)BVyc%u z{TMHQdKzzk`58W6D5pWw8B^3Q>H{sz4JIX?UF zLn>77;54oOZTcUUeoW8qU3#YPo(4WAd*x~1&Rg+9OD$fA48iB&LHJvQ4?Ycb#)pwE zcstS!?<+0O;9CWPR#C|7(Dv>YGPfdBKLl>iMczoJ1UQvC2?uq{qUIO5$< zJA6n3&JW_;@m7R0PQ|+8gCrlk6d#C(HELYt<%I)o&Y1CZM#(Z2Qplp+RB&-t!QRhC z;J3=#4k{mKEcc<^C+T91sU6>|yjfh$9DmS3UN+231? zr+K-eRqhcILi53t@-#zqZ>;omLSbV$ruJ=t%54RTyKB)n(JcWjv)W5hzOEGw8~ZSD zXal--kHgSj1W!{Gg7egftI9xBnE~pCY)oIV7aOlW1a)&RQd;uRxoX+T*omo@EyWT$TR8jrKxMlMOC4kB&k_Of*6xBM=P^ii0&j z8zE6)XYV0Jk9rMLAJ)3?w1Sfy5|KV8#;;FS@Hp!@`cmunDO zmWqJFL0ufutrglA5!`5?iupxf$^sgpJCOd8h*VoJX|YI;H;TyGoEfT#x(_DszK0=w4le{H{vmx0fTYvjTa& z)yVCyfu+A18T}=QZBRqolZApcRQ9`Dkyf3L%;tQQ4wfNrxC}-r-vu)*XdS9TSBVD4 zt1Xx<)S$E}3%cGygf~#Q6S`^>a_X{BsSU%`8OgXYBOX_@XQQb! z4%#!pdt*CHqQe^A7Kh-bC`31>Ah9YD8Ku!^O?Jawnh2bX4a5_=P~4X2iQ6qHxWk%` zyL1NpS*ORn$E48_@-M>AC-dhKjH%^u{7EoF+@9`^1z z6Htje-5DFGt(q(q&25$uVK{7_EQgVUgbr8*mNQ6a4|eu0H_`eGhG+94*dn2M(o2lI|l>v#mkL4S(#FL$6dsu^+DT$_qt!wHjHYmGCZ(mp?izV>Q%n*P?2BFY?znNSj`|u?>dRg(#Y8Lj8Q7 z82>54F$wr@qRN?el&)`x!H@FgH&=5 zOO_gGnBhQ~LulUANAJR3bkDCv@9r^lY~?_jLs-3Q4DH+2pk=lnty>0VdH2qBXqy{E z{e~_yZ|z?Qyt!*crdd*jrBT)#osoR@@a7<$9I%t6QaDhjVy$%iu5C2Exev`7dnAx% z-DErZ_l}`w=LpJ28^v3jjrY%*<7}*lJBVYL2z~) z%w0v;cJ%?df2p*M4fU-Yk~~o}*@~*k7K9WefTge;sh)>aB%|xZ1XNmg`G}Lhy&c(G zn^3g7bK!&5I_eM2RzOFCWDX?E`sK!r74pY|p6V`Zm{;!W5}k6Evsgyuux@WRJn};j zR2hfv6YG#QQUw2;Q2gjm*Wo?9jop`R#RWe&jNd$P3m$##A^h%<-{6IJpTezo--Hi8 ze-qEY_y}sN^YF$iPhsn(X*k>2z{kZAj>}a@itqzIdJV5Wb~hgV!wq=yk2m7!dvC#Hhp>xL2h>6T0I*;mit&bw~FGbbOxTOXaoCwL#voqi5o z+gHQW9DuyZ3TTG1kwI->-h8dV@{HL+=%%vi9_1oybFt`m=g!ti0OZ?0c~E4NxV>U2 zBi8iKnkYkPU9!~KRq39{USEOO7TtnI`EZ_SZfl0ENL^z=To3j4I5=Hv3erZh5!)2G4mY=v{O1X4p(k}`z`r6^rui?Fh{ja;!-S<@ zIH)#H2UbzvqLbR41`QIsa}iQ!L`+*2{Hs!^kJl)_;B#z(KBYJ_#3`i}GUs6O0-%KaUpQ@$$86Un{l*nHC-BzEfIUKk`& zDz*E2#EX37>RGuT9N2U4su={(F-LAd2Z+nveIPVs8_?szR~tw*3-Zn}eJF@{@azI+l&<6TN7> zbO;6enV8o6o}Vv(hK~79hH!Q_kxsUgZif z=Y27JS3I8?fU`Gy)p5EPN4sI7_po104Ax(_4Q6@|I}}ixbIBSB`dN6a3)=ZA6wvu` z@J~f+z2tZoijH^6x$yZiFz54KEW@%GmNTqoSZ+K(*GKvJ2b$4!#W?Kq{pdb*!LyqB zv}Xc*nh!8&ZijAHl>q6C{k1UesXFV?t$1~_F{oBdj&TN{vt$dK0@8Wi;tTtcN##YA z<%Tw@7c9eKUm6O{bfLg<@!&tBSFXVF^!+u+*t=lz0f5hkj?ep4&O`AgUwl4i?=?+x zJ{!Yp1%N96n<2O5c*j{d{?AMS>Hky9q~m7LeiXRP^NaHYXwyAlGte_sAh`n1mF*OO zuH-Am+i=SHyiaAn%6bYQ|2i|!{Zc^s{{hSoHHr)i8^dzNvt0DbX}RVg2LNqeFe>lt z$(^;oO+LU}^w5v+o6jGTfRl!8wb0VLOS7d)V7G32Ez-7DL%q2IsdJS`rF@nfNuxGg zN9_s+=~U9x9ku^pybha|_d%&)_ad+DgRL+eqW%yW>!)iEwjhn_C&Tftv-1J+f3$yu z-{;!-0QzE60Js3}Gf_WS{YuSc$pm+|%PpgK+M9)D0sr+1HuR|0&pXZiClK7*HDTma^;z4GdUz522MZGqfmN`TMBVElh# z-@@{5?O!$3y8zz&{1d$T!Fzb^y;C^#;rsaDlMiwFi%;;$-#)=xr{BYypOBqqfc^pA z|KKBh{N8DN`pyDmegDJv@Xp7l$lm!j{ZC7&Vff(Vzu`2Mfk!`l1Mkvc;iHoe0C)ca zr@CA4T2cbu2?)eHe%^Rj9fQv+^6*r?0r%$U@!M=2?l2|bp#&eilH!N=Go$cMdMKWW za>5HV$a^lr9X4(Bq78- z5rOXU2=IwTfL{#!{iER@6bWy?V7Phv!NbQFsTwUZGc%#pq`}eF4j~~S0?QYJ@^gW? z0?HLw&hT6T=n5=ffaL!O%Xu9eFK09kv?I5!1cp)zwqLv-&EwtJe(64Z=ay^n<9lww zub=!QzH{4;B>m}MevPq1v+y%UBRpG;qzW2H)mriM$9|9Bz4QPIhU#(Qt=Hg&M{dW> zkKKuo;#ByQaUet!4YCTMU0Ws|`Ox&{i#K_}`UXka;#PEH9DE%Gmb0fhYngXU4q$NG1XLa?u{6*@pt(b=H=L*r z+fbcf8tIHxN#1ZVQ2j86i@9WkN{~KIS8062?6iIopw8}$tAe3)*lGf?l#ah5${p_NAPFMNUgjL6(M1;u zR|B1kB^>@VIQGs9MSvw0fo45?jR~S@9+4dd4^seCTB`5akpQ1~giNs7|X9*l3VH zJwobJ5!Rv>E!LO@JrXKXkX{mx&IB*~H6b4Fg@xf+Y7eicHuPeB1P#oj%d6e3e4kM!4bfV+Uy1*O=G`8O?k`fZ&bCF5lOxm9ka8f%_D!{yGz6~maJG{$c zk-w1xTsk78mY&hhHl(i0L)HEs_}3*$a6S%d#6drO3!|vq`Jr&MPCzAp01BYC*+&zB z-r2QOrsCn7&VfK(5Jk_oZoVI?SO;W{)nep|ZB$0>(XnqBsz8-^)8vj-BB|Rfn&z>? zRwPXn$gjWh+wW+e+zo5V-nK)6CsxI{ zVinbU+bF81{Fg?c4V=M1@xv)G618V-L!NECso&#%g3y=IfHTbw%0XTF|dDvu9@y}vbW?HuBoAWyBr>Ly~dVoG;ZudR59J# z2zn3FvtiGDmrQ!z70GBjv=*uaJA^gssc%q;j2RmIZmf~tuGynJb(-qorgA6&KXv@E zi|Q|Xm^0)wQoX7@*ejal%MGp~U16W;jezo4k^At=p|(7c-Ww4su!4i9I@5EfXCIjr z1y||^W;a@qM(tFbJ`%^N|C3=>i%g1_vkg|MR0#5PKtZMk_B8#yW83k;iw_7WfARjG zF4gosXyI8(x{+fEzVB{Iob5{YB9ztBylQPbrG1eGH2AK|qoZ9(wCRtf715 zlN$d&I9uQ^d&1|?bLEeI9OHu9vhtnn z;J6H|kFKY-BxQiwQCgq>Oi}k2(0LZi--G-yrF2IdzW>b4Na!~qXRZ>uu^i-WrSigo zO*a%He`mb}H)U;X-DDx+`WFHV>n4hjv7tgfKIU(2fSH52O_s_>7A>`9SsN+^n8&Zq z5KzwBZM^jmE_m|41eTlUYel;}V`~+xbc~#x4dNxu$H||k>FxDY{<`5?8HM;x9cFLb zji{Cs@epUP@xm<)qBYJzJ6SGpfklI8e|6%S%>l7D+_V$b``ZPW*Bor4cSaqSo1Jj{{>w$4C9E?ABiGHM zU{?duCURliRD!PWPatJ77bQnK#JgOPI1%u?e*rr4G(&F&(+W&i;5h?v2ILvLYGi(~ zr?~>s*+X5ts}C=Desg}|ffkel;%af@rmtQzQ>$kviqz&4gl?wp+ zV7&nIb3Mp;p9-)R7){I1wZ-e5h2<7^v|c&!53s!Cf?he#e+J7%TIS5Y6qEB?1joZ{2gv_Bwit|`&%OzkvngO(0p5$3E9)zHiYeO~=>90%DtT=G zH()vEF(g+&xt@)l*FS^h)_rY=8O*}P5B>+^aH#wEZgLvpHn9B?#^%KLu;ELZZ+U01G= zf&ZCn;p^mm%DTJhxl_F|?4b6Z+C9^bhJP@Yq~Yc2`8uS~x|%c7skFX!4?QnxXX55- zkWBkbq~j#ebKpGv_6F&n-}cEvn7L*bx;FIS)aP&D<+oqN( zy5+BZ3(LQ?|0SmS?7fdgs~jJF3UKu#$RIM@NA+QuO(^lT2wqvMJ3{NtQsFgMdJx46~0gh<8Mi!csIZm zAB6tMIa9{&D;@C^DpDEABv zJUgwxas`wt(+VtC@>~LV-M_CD?xX0qno_0u-*U!S7%A3yS;e zaQ(fvhzDMDol!i+SzFvZNu9~DD)A=QuPvtmQW*`za%CWtyOBCdl&19;Lfcme!(hpR z(R#c-n~?*9o-qmPNyZwqY>Az$V{4H#sViGFdevPyh^*0xZn>n*nMiE6Af_b)$z8dK zYcV6KH5=g-It1n=BDy#YzJ@4-TaplCQ6t`x0(EAZc#|imry^Dp5C4c@xcGX&!_P}# zIS1$T3SdujS9k{oLTxnAI^j^+tc0zb>sd(7#@^-ZCC#8*F=tQrvob6a&@(&?L1Cc? z2niM$7KY*s#}z3S1(++aT=6Pj496D(a!%P4&+x_2o97h|as_y^Da(}gm3+l`UBwo! zf38BMk+f^=6^6HPuoR>g|XdSG>RWJ{h zOMpdfy%m}5MaUVfM!{GU3MN~SzrI=iW+)tOMAiCsln&FNYN!r16Yb)q+Oc~bs%LwV zJ6?yZbp_CLn_=vzL{2XaGJEPMtw3R4F-%l2 zA+sSBxs~a#G~^(R>Rv=v2s(pp@j#vdA8S(ZKw=Co8f!*Mek5}0b?BHZNA+krR!?MO zs@00I_)y$vOvfKnQt^Z~3HLTx(bb*;Q=b8OJq2({^%juhR}~F^Ljav$E{qosBXfHl zT8+Lq(UXU=K`S&<#iDo2DF>TWPq1EOAyQd#Ws&i6PI;NKo^G1js5R7{4ChEt&kZ;1 z#nHR2ME#x~v>hHo#+m|*U%ds_J%1}=JBr-#!B%bXF$%z;G9jF=VhkZ zTH1fE1eYw|(+#`qKrGR_qiAyz*wZ|yK1HNUSl?W<(bv&=pMhMtQ#A-FOTe-u7u3ym ziCo9>P^v?5zHpBZM8!}GmIOH~-bv%npTpx(}+hwqu3H z3o-TSsN2>D3)QRW8UxZg^W;yC%z-kbwq+x0s6uqb6YESc^%NnizYN&}^v-C{gRUVP zdNOUD1)3T&^tBck>uJ6+6Dh@d9QwftTyXuR7}z|FyyhYlx0XsE?tzU%sHFE;d?B^} z)l|>RjfgJPAfe147FVJ}Qbjr@{$EKGr(q$?VA-P=8+yM z;GFfvIiEedd0xp2%8i%xSgSlXUyZKK{pj0144Vii=xQ>tGRhfSuiA_6{o(qB;Nc;w z&dRQ^Bn(4%dyTIcLvNcz4*}pDxRX85S+kry$Qji0x(w4fFsRCJ2`VOA#XFsWJ)aK) z^Mq=nc%obT%c&i!lzom~xEX;taWc(dKfSX+JlgqM`1<(cfQ!Z-{#lX8=*&mY?h*K8 zgu%lQBzaq}-iMhhcfj35*G%P4-EPIqkM_gf91MGFD4LIsA$Kbc{HID0*qMfsL)}Q< zT!qMi4CL-^5n#@8ET-8izV^s%c;wPm zc-;Elz2aHU?MKFFF|3mn$eFAZZ}OBLvq&fLpB^cl8PNA-!#csiHA|33+ndKr1ojrr z)|~<9^iJ%dc5X`p{A%LpeW8bX(1J}r+mDSm?}KSQwQcl#(nc(l79f3s`hb(g0^E(% zUg*~4qhM=;Y{S61XnT{a&l=Xejc#2wS+0Cw%bKo*VYH0er6Q4~`thr`A!XQ%%o*w@ z(skx;uRzkU38|x5ux_gm?RMi#k$~)q1KqG}u9dbsht8iRX!zp+x1)u0FY-4p#9rX( z;vKEvcoh7BlI65!ZaIMCkNyC0YqOBey5+kY1(sWO&^wr>OAdA*Yg-M<4|d82i>4C; zXgIPOZbiX}Xi7%!CF{V!QCVZ01I-RxIgQHQ9pXXG&n~1PS>QJZPfexwRPFvAk!0z; zY(fImvSbU(w4{#}!KWe`n{L`Cy8QiDOkugn6&89o&HijRY_i-?vAY?oFCRt8d@bq^ z(Roc5BBVJE{Z~yOYa_L3dEOZM;Ra-GDnY2v=Y^gKLK6?3vDait#$)g?^OYfqUqF9c@DPQHJaby6L%l8c<00kN<{X z{qUTvwP?F^E#d|<;87QcvLn5yy<`|^{LzEXEB{cd7*F&5+1s4G$_3QZIWC6fi;bZ& zYnCgpoCAoS3(NV>vWklak+F}#GqpEoV7U_D^L!wDu`SM5VD@4wqI<2t@)kOF>t&;G zC<_x<&YI=l1j`iLDt> z2is&_4yvk{aSuHQvh>{xX&R-vy>ws6v^1@!)Udw|+WoCa+TB3+sdWLE^9KuB&R*y2 z$a2T0k6_cad$4*_p9J_k`PK_~^2NvS!b{HzEa%{!Z@hj6lz$7$zqS7bruyprkAaUr zrOxMPz^V6vH{J%`BKzPy;M0%r#RqTEif`flPu{{ipPs_0&rVVLF4=o{|MUm==tC+r zAAIqx{Ri6nAANz>Pk)AI-+dP!0eFR;@yj2+fM=e%3wZHi;Lh8C-3Re}O*?KfT7X~O z3jFn6eEKvEP)0XJLsHNB7_EGp`JEy zc2U9JeL0-`oFsT;Mu8P+=1eSiaDuC^KRkl|4#*W)em+pX7?v-VVNqZ?8_Th{1ug7L zf#pR_6)1176_Dr~AB?g2N$kF4Kgv6+am_71!tU=J#K7jY*mva-ly+6)ra%4?nnEM= zkyxvip>}7#I7q2i6{2YAG{srrb1kI_s`L{YYb6UI)T>dBjqp-mxsH&g=MVDVYw z{g?(ykU@iEV_y+6hRTpJLdTii?hITmS17B zadU#Bm%AA2nll7;bZ5_W7r1$Oibr`^RHR6-FfiwN2I36H8IZH&ieid~x#CrRE*$4+ zhSy4}z;XqED|RmUR^a!!rYt+x6iBWd>s(mQ)11$yKz!aG%dkYnMqdeA$$1}X;? zoFcrj%-<0!Lg@ZSdqU-J3soRlr~_0nE?A!AB|81f)!tabkSUt;9TzOt>Hn~$N$%oZ zzKR3(X?(CU)mx0c&7F)v@HfXGAS)K$SkwOY8j6hszEMf|&Jm*n6Q<#c|Kxg?tcq%*;Kg&%( zgWeS}C2{cPpuA04h^aFpxJZMr5+f3uN|Dk+^|Q5*)=R)&V)b}BFcx>!6<~cyA`04! zNb1i;G}W_6s)yda=?Ll0Kx%Cc(i)3t;M<1!=~m3@qw&j_5WM6cf)|VOk;~w)G+yc> z|6-rFr-srJH1wC^*2@nAkNgqWM~C3`=otJpCIXi?nDO${zeag$9{jVykuq$7D%%b5 z-6j<5?Sc1}a%eY}V0(K8wpJvgpvNTMsEYx(0?M^BbWLaS8N3NFr&N|tQ2zKC`Ig}v zkzk2morypG?QuMSXQ1u1;DNtAh54Hf;m-H($334viZ$Qcgp@To$lcZ`!7$_2SQk9U zCrW5ve~0CZp?NCpH+@qL9V1VIs4^61{c_KeXc*QOV~NoV39GY_vxx@A)9hVYE*|U* zc^H^?9v(sO(NTmJ#^aW!e}{elbsPc4NbJ1oFj#)*w#V+m=)p}`8cuDECJ5Gn8q{oF z4GvQ2qzizSo^#D~3!F3_&~;>?jGlpYrV8z8kpo&z9S87zF7EW1VNbSkTcOSSJkKkoYUbPeRKRJe5U%VTAhbHhU zKE#$E?t^8pM5JJ9wsuf^T?m(~K)6{$(SLjfs(5M-^Z{@)hl@;-raedMmQN1Vt=u>S z=EcL0%0C+i+>9!dOqe^0#Z0XQuymD5;8afY`>Rp5wn?mXq!C3!b;#?h z5-S|6Maf#qTh}O3C#(t10W%p!vkVN+_wE}LFwMb3dA?+nA8(TaRXXo`VP0i?qw&;VBFqna1GJX$%~h5=p43 z@63xXIeV0|2l>eHjdGv(9x>ErV9y|&ok9Ng_p7$y6-x`J9{i9eJ=OU1tb=ZgLyx7CsH!~a?s64FTz^6Jt1ePRW z*ccEl^i+Gh=)|aDjwq5`^{~g0|1~S$b(S1sW zZnafn2dFzt2&sri(S{ntwdzIxJ+(JW;5oNF8KXrKr+}qH*h5@RZNP>1UyG4zHzTYm zRiJw6P$sM!is?NRMaQ)wbudfv1@zN-aa+S4=Ntetx;+h*yW5bxu?*f7VW{2TB>{f( zXPZU3iO-uM^6jVp4DDKKTi0cwd`}}P_BF$}J{JYst5LkO0oE;CZmPxjBTD{!vw-rt zgMHFQv3EUxK;Sl%|9;_V)^LyS$q>)=qWKn)n3}j@7cP42IwY*MAbUr>0CJXLVb5}g z=LP#)QFO2!8FQ7WJ>Ey{KGpxNwJ6)w0@g22?#mF5@USN8^=JVF-fiWAUSxeh$M}E^M+rFn0YMG-KJ~WnOu#TQtl$04RHw zXYF3l8fQ?>5-JRs8GMTeH|4YOv;xf)FLT8dsLm$yw7qE$-LE4o$uH89Or37{`I z+>VN)T_``&4W9<;Lk?!3{qj+y()(puwl}Je_Mze85tJQUkcweY&K~d#;Th_)$?*^T zBP^HTpl6J|uN7F%9|0JacV0dQyFA~su$-mX*t6WUw@GAJSVl!;O%BpE{R^<1D-tdL%oMQxb+#CcpU=(((*He z#?NQ}Dl8XJehw^8p=WkJSk3{^FMHrexZ~4@7Bt8AHlBsz;ss77u$<~#3YBf~7^m$S z2ro7U-s%HQVhoJWmnxuKG2TuA%)H|6-G*cL-_k&z)=yiD#JodaJJLvrO~ zg2=K^`yqC)b-@;G&)c4b=6k7}?OCvl-Bh0Uwo|**LF=}Ohq>-hJJJrciWG}+7qutb zX&ZVc-t)<$*naIk49*VV-7nud>sfyCl@|nD6_e@6qR7%hf?-NGK$DdP zm8TbMLqp*b5(u}@fV1Wr;t!W#KR5^Zit#iX=kvT{fHxfcy#$8KI%hP?*%+L=1};E# zUXNjUMMs@Tu@p6xqkFs`W82naa_0Ha$W)BylUmGBw`3u$D;Fsp*`imT+?kC;npSt`LDN+LeNQpe^;rn9CLpQA2xFBM ziP;)>M*4~D3VS~XhSB}=aueAVuK*wTh6Tf$o{i{^ySpGVDG|CXGXf){uS*0DLh(SC*Y`KWqvJSB}f)qQG(mm@CV8o~PN9Js~AgV0l`) z4w00yr@j*4lLL7&DCdt7e9u_YhCej?qd6={vUoU(B+CjnTdeYQfW4119Q|D38srJD za6ehDFUZ8^gY)pE`t2A>#|d%Ak^o0I#|OYe6E4yx0a@_~$Vq~KUNQm;Qbd}E|2W{3 zgW4(BnG6Ff!cC?F;P-sygDN^wC@q91;6^>N^<=W$&}9$wa}@p@r6-+&%xpLOdPJ(qNFziY8rqu{8mf?1WuKRlmi2C zwlpQ5p*cpC`I0MHPQ#E4ePYvRlJ9tKRAT$?Q8HdooCxjKjnOi8~^+p zsOUbgi185VpS+Pe@epQ-5{Cp2q}CYFNbT;@SUVW|b416O;ZkHzI+90nC18?fjPA)~ ziDgdiPDBZc{IQ z_SEks5az?5K94Kz`Y#0J#==Z(dG1&>3McDPPVWT2qFDJL)vH1T zm{Dm;AZ8NBkyjRG5TNO|5%Q!DMvfebA zT_U|(Q-dUE@5)#@FS2D(Zcv3gi*Y`mgDRZbv_yu=bUd0~5$_?>%j4V;kR1<)RDW5% zG{zOGDCdRsC{;yJJq&X|SXM0F!3X&6udYE-aT?yFCmNlbB*BCK^3LNDNR*$WYubX0 z%K+3sE5C|FcaecojPn?1^Ydl^&hy*`uy%V=tw}uD*;taLV5C;^8LG3VI0JlDh>gg` zFbwDQSSE(sGgXAWJU@o)ydJl6497X3DeI&2u~_P5mD&?IYbsH;zDa_b9{Jg&2+fO! zliC~JwEozMS$a-k(gynF(L06OzM5^T;b;n$595s-AaP$O)Kun@$gDdWF${P!49fJ4$yR%kxgwz&QOU!@|w9$#MT>O zp+1IhZVc278PGRauNNE^zj_Dh^o~f0^MTU}YP){(V|@1Z(|GUX!}#Kz zXVKk|homq!gm|w)482zZz3mYl?gOJX4vExW*4J1>#^sjpQd{=sQ#kqf?`RzJBI@Yf z5NxkPhL;K_hO22@^B3yx-jDC;ih#( z;#qDO$`je7;mf9}&NX4z&yOOtD-&%822iuTUE*cTT)Q1rb8Vvio;h4B-siRRT}U4; zz{r)eh-uYPoi~aG`Ho+nz_wo=mHFbiMsyw@Lgr{5X0F?gB5D^awzXjMPxnbohJj0` zQM;=L`oVk&D4N=9MoO;<>%KRQ#{Hehr*0 zou=Ok{n`R)TRAR;ncDod*KNZUPv0my=-E`(Sb8OEzE-3{SdxX!O79%QY?<8qibGwr zU4=-}419MA-sKS@J2Um;orr8rgI8H3Ixbu*Ugm6Tuh}e;EbKwfdgd%c!(g2?$=M5i z^aoqyV~0w;3S&RqD%-Gp3$NRBqz`Q;h7jGVM%RTy*!GKkP-$$?|DCnyIMIjVEme{h zQrYk*4aQAx{sz&V8u-*iV)tDaB5SS!rH9&)zpqK8SV~WHqu_AcSvW3IEbL`|ph=AL z6)4X0;yF&Hfb?@gxnkD+^~gEI+t5B4M3dzlY!vTsmRI4RpWW9^!@V{Z{>{mlyX_ca zdrYv)_DB8kLDXF`gu)|qo`+gde2mJ(8IN-IX6JqUE1u0eh2;#UmF<*#Wtn1&_kHd%w#8uleD;46mYeobo!HwZ zjsxHM%a8CohUN1dRFk1}GhH9c#p0Pi!#%g&dI7y22HEZZvk zp?b}BK0vgH}7M6c&|7%S3DZaovAHI$MkG;Q+uj9Plz2R+? zEoNrs4bs*YGcz+wmSoGa$d;LzA$B-vk_MVIX;Mg=Hqf-;rcD|~Gc#kHT+do-dmP2b zDV*ndKcC+@Z~nOU&^`C?Ju}}~`&y@t?gvgDHG=Y^M?hx}aQql`_ZdYe6^?NCfKhaE z$@l}Ty+7&yMDg+4^_lUb$T2$Zdk+Kee*k>`3C{2Q5PLrT8@~GB4O~3F7a#ofWgPzE zQ=Hhh2NzDCz~TM-u=DFL@yREj;EON5z|q6UsJi_)cHj`cy?hmVwVGaL0uim(AXFWU z@YqO%CTd_G?hciwIlY8V!WdT*IJsED)7}j3Ruf@AQH7z_O5oZFTA#0wY&Q;RCMpz; zSD|5y3cd7Fw1Bi};zaz+!V*t7+TnwoBz#qtjen#X@N#4@-qh>xPC`6hOGv_N+4*=N z%77&yYSg=Xp)@=a+3|@IS*~)j$3#CbSa=%&xdO=*P|mQMr9g8Q19CH02N45vo^I*N z(dO(?PA}6gRL0e4)52vY*ju2YqYfDrdGL!0#>lGq=$hFLuLy4hL*FQ(&>>jM8m%>-S`a721vmPqviSSGd zfe*d#`4np4o)-?6oKU#rhr_K{4VMx%JSw8#Umq`#WZL#j=vp%n)s`ud;K{wk5*f}) z>Y*1u_8sreM=VVP5%E(H6GO z_HgoW5ifa5Iz|l3ZCsrsqFhJEb&|C$R1-{KVe25Ue1fHgz;aIX$q~`kE_7Vzyin$I z_H?KE+{ALl+uu*bb}SAq&Z5!L!%$)7Ge4VL5|x z)>x}a7;j@Lu$(>2$I^8=&e}x4IYV=m#YDIUdBc#IfWVk=NeF7;=LBcd*1Ka;j5|#9ZZ|b4+D*or#(2QY;0c=~e>h}>z&&3B z&*Es2SBV}zWd`xX=YLj&Rm2*tTbff5)|xJU`+*Hf2&#>TXFdb-1c6hrEtv?diWgtz zz}f^vbfh4>O)m-8Vp>X&+(8e74Mm8qNkdFsg23{W1@!VUvkHZ+S!kej*jAN}Ik`F% zG^8SR2EFu8D?|2-O5{$dDjN%iw72v-QT_?pmy_PeAq5JY>$Im*9a` zy{3@Bd*v9tpI>7eRhFqD}&yc>$}2x}owP58Z+SxDLicLod%E zE6d@vx*X9{6R4R^tQg z#Xs;R27fjme>nITEPZx8osNwTLnmrYq%X^co8Dim?jAl*P7G=o2c<@&j$ z2p^#3P}#I)^-%X^Lo+=axyu@1lHv}}3O)4G3Tay>irrMj+HM53#3FTesYD*KJ%YM9 z9y1?Whyyr@nRhQhibb!|IA0QAX!U!7OUK=d_}M);qE~S-PoRB`BHIjNBPD62+a{ zTZNLLMr6|YlQXRnIeoQsJ~p6exS7heqGF^S6*JpV*h}}l_ENlk@FUu5SLnXA6)%7C z2JZju&ym+!igPqBy*?l1gDq%UGM(174-Jc^p>4$gT9@~ue&JL!F7A~C*h)W7=YH)m9*|eD{_8 z=vq9D_SZ3#&^8{xaXJ%^A+W6DDMM?9;~X*02|d{= zh3!^2Vw@p2cR6C5Bf`zJ&Jxkik?uSX+eopGIorrE1RuO>kwm1cTvTEey@~C4sF>e|iCPC(#e1TBUJIW4>?H)`sWB$N434p0P?yCbueZYJCm-o3 z(dec+XR+03+c<9Z;%k>yLx7hd(kU4Y>&nrT~mJWD!#0W4?rx)I| zCG;GyxJn|-i|M769VfOXZuD&8Tckxu zK@`?Kz6GjDDmnws;moPspqCEp`|4fk?*8;G;JefK_QFAgc-z2|p8eeHCc(~pEbQq% z6h!T*2R)0~+uI^6GKlW&R#>>C4>6(cSlrtRTs(}kyWYo@Lm%QiN1E?^2N(YS8yxxY z8C?AQISI^oBryPQ#YNyZX;GM3k$|k$G{iMf8&|7GN?$J2U34#@c8T`|?*kS`*c;{) zA&!(Vk}r^!l`>L-1iF?T3Ip(mQ*WVYX#--WWeO~3E0(1Ge54E(;`h{+J@)Z)`17g1 zVdSx;_{a6n@$20$V#RZt@hNuWfj1vVbZZLI=^heTp~Lh0{(@icc?BQRw2gnhpXw+^ z_M9rL{KIxE{_SSO_2tP&-oKuC2fy9>C;aj7tGM&^pW*d$@8NHkKgFgO@5dgTp}G$t zy}uM`RBuvm4*DOMgMB!P&#B%IsGY4|)`qpeyAvN=--Qh?+(q|_JpB3O+w|;5ZBSDT zp8V`N^#5!&-p3c{+&)8KKYz@uSlN#Cf4&bxPp^=K%M8I|sr~JHcs`1$ZJqw$T$CsI9snUBxiunmMWakvw+%q?sC+4Y<~_t z6Buqrn6uSN`rI;!F3(?DCy;z%k^?rre!swTjzFLG@N879YemzxF8J3)Ab)WMmcOt; zY_Qh8vIVspTTr^P26da-QM9ZYW8%#5@E1?ZzYQYk{y6*jRY<38$X-(`k=`6#&Ys{5 z#Ti5kDBs+06O40L0pT3c&7R~eF3a#*EL^Cc;W?M(G7QDDH&b^5&9{cV&1w2Zn!c5m zLv^QaHGs&p0~9FajR>PwWD1?GsE(Pb+k<+hR~zMb&l5Pi1S;^ zva+_e)3(hBe>5!5T4RLe5B}pxymr|L%Ng9pZ=iMD zXtWMt0L(TbEQY%b&0{uDyL>|m_-2hB|6`K*1&kX3vjU45I^PP%Z`JJq`Dhsd^p9yY ztiG*A!Ex5DV4U~MXpM&D>}Rg*vmcbtPF^^H^CVoq1YEv=vv0qN-_Bovt%W7nl9h)Yc?GyDw}86bpC|oy-xQ6@&%*YC z%%AjspmyYE;(@|EJV3|wm*v&isEfnn1(kTBx(NrL`jvbTIdb3&965gwyN~X{mtTK| zPyg{Aj_ux$Q%6qVz=1>fde3g`IkXRlP8`GDg9mW^yKnIwz4pY$#~~mf0FjZA2nq^9 zq(+S>eYAK+TiP0}F)VCs;q2lGlZlqFv2}u#wF6XR#>2(cU7+O{l?t|2rf{&F1Q+v( zaGg9Bo+e}9KWRL|EhZt_&J-?G#)HJ(<;i1JsI#7oK6e)^3Jk!?a1HLFb9iNPI=VG_ zG{(lGAR!Skv3jViEijn@xYzeETmj-r^f&`=9#+KTOkM0T+1XCIJlzP$T}5V2PBh+8 z%5jkwG(=;s2J*%+8Ro5Lr9w#{M;+(SK}vY8+ea5n_QJvIbRIzI%aM@d&*7>|^;Jfux2K=PD)#IaGanPR8H zRx05wsRGK`t|hE45y4fl2(5}kWL?rtX==ak=V)YNUV=AqCN{A#*j4e%tOQaW^f?N@z4}&4u zAW+zu0lA9<9Nb()49eMm+}yz)e&JzI#~R?`>w~c-rWilj9A?(Ee=Rst+Dbq<`;}X{ zI>OeCj-R8QM3_7Kcp@My1U^9lH$gc^mvdA(izCb#HZvqwyvh|j7C!$NKJ#>jS8I&Q-%qCzW zo#zbA9sKEh=5yTJ0h7J#U>->4yfYn}KnK{z1i&>V0xqdxuul$#O;R9ilY`)#9S%p5 zQ&t!pGef1z<6Lqg;F=o=+fFEs4g0zwb4lF%|%9k zA>w;7#kxS#nG8)&n!sgFfXR^EFj#=tfda$~G;iKzcno^7mYM(t4eBhH3fY^p4 zq|YdTDr_R6Xd4n{6(Wh&Cz{qvf#saMDzq;hlI)ZA87E1NpI?T+&IIuWPMuRGwgw!j z8B!aI$!b@`*5;va<09y*vyjtOEeVv{m-ZtdTZ>=3^E>$GsKxu5lXOndIl!0yRYBK+ zQ&un>(*iLz)E25hOV}s+i&c`!XEJPKeV}rm0F~z?SZducK8V_fP=>4#|OxVG*gWmYz)34Gfvz~Vrv_gWwe)Q^f1rEk?(R1W~(KV+&-S}JJhbYqy*D+ zPZ`JkJdXQW%5?TV56jV_w7UX@Q%d1T`?7R;HGGnSkkeU=)Yd$>CkMhWI}*VKQSi^# z!mmJ!;L;fJZ`ah)eX=SMT^oi4W-|bfYsnU?7LE*O;LR2*T!w)-&(9I&32nKkU(zj+ z;%v#n-tX*f&bBM_A6_HLLfNOB%d@o%*Ud0~=c|&=bB@g3_NRv=0V^jeHs^ny zP#YCcs1^H_%&sEL+OZHeT36WVJ)ka&6JYL}tCiy&M8m}kS}-}u31M_@Rc!1;_VPNY z2eOc`s2s`5s}Vi75dPDXk+Y!%5p*qw_N5`HhtA=p)rjm(L()i*`1%J|MPqEFg?N@* z8(d+V;DLr!J@6~niOrjHUYI2R=5>rLjm6-`+0-tX;H?k;ijO~h1Alq(8Js@)6~4Q4 z6ekXRhHoz(fiBdGp8Lkb)5!`h_Lc~t`*2to9ZPyPbawNGUm)Edd}(`i!D8u>l%S^e zH5e;<+JS?+aqY|Zap1Mz;lQ7t!KDxXgadCpjw}2Ah`b~VY$yuFJ02d`8J~oCHEGD6 zl7aM|43safMcT{)#LuGkV=x0zbErL;lMmgzLKqg5N{$5nz{S@sf3Olya!!&uzY;!G zYP@vjZvu+rXXJ|g3fr!5R5^bf`^9I!m4C=g)Y~9uq#O^u|4T_MZJ*?U`~LbEWJ#!&CayILMKf#g@Y_#f+O`2q(pcc{7d}K{YbJU( z&%zO$!-`*Sg1Xv(x6izX%<1{iHW=`a%OBxW?8Lg?-hsgf7U08gcMDu!@$4P=MNn z-2chb&`eE6=Hd!uEvrWIl5+7ZPgqhWz??xZC;zOzZ@T!INA%M^THlPKb^bT9FnVt|3x zjicTbSgzQ>NdLw?&+9q5|8}taRyfW8do(=19RUAtq(Jc>(`cBj!0plFl6gI-|5jM8M2Rcqm3b5? z^(pgnKbMcCbAk2$Ygo>H<)dLaM{z5#oO2-jOo8RpZg4_Ro|d$Mwqd;y2s88*aL#ae z1F!oHI}wrs!5RK4P+8GU2(9P_SmuP6O43V)#0hlH@iGkp&wpIE2jrvmJ&3-Y{+IQ+ zRW~5{Xiz>HeBUbB#!=gpxR&-CiMuS`CKm5UE-&RqErZ40<=>ZUru|Q4R#JPjmd+!3 zR$$+9wqS{(WofCrj=E7a58Jb3tfFHyvjlHn{1}TLUL`gx>{-6=*lv7%;0qi+dO#w} z*@opOSpJj#CrNbyS8?g$8Q}N<;DdkQi~H}x%L^Cb;8V{5C(Z-A4+Fan0(t(|({Yzt=(T(m1Yzwf{z4qswxcLpLPlN&9HpP0>7iNZfz3 z&OJ2D;^{QJpT|-EK^k|Em+=LSBk}b8qvyLJ?pMUaJU@$vc|8u(JS=5BZ>~4hdGNCv z;(i*>%jETu{u|TjWkAX*^U8YMSO$+%>gQ=vH_v-R+|T=pw_6#nEdPI}%gg@sW8llL zs7uQ~dJ=f`ZG5?L2VS4O7{`9|Tb$bWDgN@_%lPc*P8>LM0y{tZ3Wq=6jgxy1V%O(i zV(0F!ap2e?>_2)CAASC@_}HJnasjc42{!?GM1&f8y#Wbv$p{Jvg@c_l9IPE-Z{rGk zM_*XkdBK{xldRpKnq-5Cc5X0nr2Yve^ioJK?{>Br@9czeE{+)EU`N9iP}!K1Cc(_j z5|eGlQk@gw=V*ZtOB1LkPlRFeWW%Ca)#iy z1LX=7S0c<=499ugBq!UOz}(!~5f&~q4|Po)?P(fAbSEh@&ejao-7P5ZsFR4>2~K9P z@^OHvs|B2cX&YTE;27zHF>cl{4|Ky=cPqHZgwXa)gv!|rDhJwr2kNKon;hT>JGD0^ z`8&W-M=!_0u5gI^CpQAV`Dz4|M$2EH8E$(NYv5BJE%2KCN&_nm&@`n& z*OHEi`XqtoQO)V!t2IMlyP-2jBFx!~Jae!Tnf>%aNXnQ|j`aR=q>)l-eEL8I3TM{Q zi&Ysa7qp>Zq#lKH8&SQY2l;avQMs%~A{HB$^`UK9KMK36Q8Beqyvl>3LlJJE^$iV# zle;r4?W|zuY=1KnoFmIQ`Kp<{9ir%53ZipKHF*-oPNHLOV!y1Kx@)e&wU?l+^y8ICg~XYcaS{^iPa2GEKh zxMG8%z-z^eJUlYuwy^wm2|hXTrUJtiJC@PYM}za*fpT8PXc_HTjO)bx4E}ureGwcH zf*=yZ^2lh7c$agM&+!(MU_$3VcPG*?e`xqVQR*b>pDa*)qK%o9nP6>7``HX;j+PQl zZt2G7zm0qha`1H%SZ?cO^yoKpvw?-DJ)Q64VHM;mb}Vx4M*G1%IRc&;TCrjA$c=_a zeiYmbqv2MhgIj@CK)As0LLHsET6mV|=-kyHuqGbSo%u-Wt3cWyy~vSLhp0PLh5Xs| z$Q!9a#!Pwv9WDd=@FvbIL+VH+vgg(!XQWzeC$a}=-s${LiaZ#4auMHGh{T~{q|Pdk z$iKAd^bp)pf#~LJq)jVC-e8H*eq#>3AkAq&DP0eBbPa85Ovkd?6qM7okxb`*<^Y}l zGpdm^H4EwNk4?+f&!(5ig{7!03BiZ@KpYHn$FG~TXln?f<>euMVLb|FwV-fD6>{h$ zK4o?`l2%qBW@Rz-i&Ifv>Vdz-`e3)e4fb>;VS9}a2D^3W8O%g~XD){8GtpOWz|@Wm zlnfU^JCcK-73@8mirE=9cs0=hN3~Aa*^q!?df^CMoFfS$v*(l}bT|Q_^OERgG8c)n z>7~Bf2gz+gs4jEChD0}loHe?t5LY59@$H2pU%pXzxcDyw(qh^#B?QNYg#Ct zEQ&#GcPhgAQ{|=GzbjT?M)XLo0Cdezra&i_0P|r6gn*x2S0u5|zo` zy`0>WEeqJnfd9(Rf8*x_pApm2#F~T?JsD{KadJ5Z&bomdiO5#Z%oRn_zShhxLSSEp z*s(;!Z zPGaa=90A8PKR6_NBfqZ--m$?FCF`3+*KM8wGd9kbWR(^X&TxtGMdREK0p{a;Cc`bs z7a`Oh^S=&M9xCW*`#2#WC&lBaOx~8LKK`hXhd5eShUffIfQNZn^z4p=SELCrkEu>WNWLEN4cP*56X_b#Hq!B`O+fPW5=lZD zQJaJ~T0d=F8bZtCZ+3&|*v7Z!A+$6O>Z)Y;WKtVemVoe*I2h>s<7CZ|l}QLFF~Bol z3vU|c{(wRn&W?mnjt*hPu_U^7YtrBpA1FyXz0)G)LxOu!DAc712%vU=m*qj@*yhDE zQ%&<~WSElzduMCml@%%D8Fag*hQTQ*5Dp1}Vh_WzGI$9zH;;A~n-$9#PdFwAVqBOV z>=Ni+N#jj*u2RlA)*EI~ZkVif5sMa0kpY&WbgvJzhI^bJ#`~DTGRy&%kxnpS%N9Cr zlc*j}rpW-?T<0Q*JNe@S+plo6xOa90-Q#-2Q=IKzqU+Pd4u_|)eGPk%^EPmD(7;0d z4cnC|Xj(o^%CO&g@yrH+;B4crcs}hhqtqf)n_OR4ABOphO&ei?s-86y~Pu)S~f@Oc`nlsR}VH(E9 zSRiIAmuY!}EDFVFR!_{2}7h>i%6XwA>ms1g+;*0-wn~} zdP&ro5wAryJx`qe`FAb61iQwd82D-L5Pk>lRQQI0bzfe9Puq8_(wLAQQE1lX9_7-Owmb7_g z5~2V6iPw=czY4K*oiZ$spPo%^ZUqwPdSx4_XLkP)Z(RNmeLtIvcfR=)&wTv?rtX-D zPrloQ%7snxPo{{vSU6_*;tvO2!?Rz%i2MHb3q0`mr{Gx{A<^Z_pWlX6FYKT;l6}y# z@zSw3@XQy_Z+@ym~1kms?zIEA}keGIX!S%_*#m5;^Cez{&E*|)!P zuSA%y{mpi?tm?%c9K!>zKOrAHUO)LRq8j6o(3y@m&c27go_bf31ar=V&v1a+k2v@h z>#*qQ&DikQ2chq$`(%GEGU(iiq4w)@9LC-M_&MJE<^u#aXrZ5$ir24vAkp0nvr}f5 zB5!Fu2A^7rJKuj4>YfC;&r~6MMU^BCOSNB7ad0 zx*nJ%K;1z1mBQr>V&$^@Puq|=w*>Zdo-FwFN|ddtNAn%sV#!jrvIZ;vxE`j-*0}rc z52E#s9;DAMz`$d3ku|Rvw)q}-;q2=uTwMo~EJw`y<2uybGgZ9H*`|aoPZ)s5t)l1X zP4(gzE)nO{Wxw&n74(d~u2%fRCBmDgF}!AQ&GRwD=JDL+#GyGG>yW;t5{aBRb9FgV zHdNoVNa1b_)t9oi7WtdoQM|bm^>_72vRDof;Dn~`b!r4nO+ec6DpcIngTn1bxXyq+ zXM3yBo1E$qsJ)?5AU7u!HLRk0D2e^b^KFctt+|^t4m``uDJ$qsV^<%UL|$nBbGj&^oa-KnB_AU;HcH}7R@{bWx&~SiO=Waco|Ah<&^AU=8^+K)k*1}sX-3?v61;xtBP@J) zC3+T4!^x}1#e(ItU7w0)`Mv|Ye;k&RjIi9O+X3+ZMgq%^9r^EJ`Az*0sQ#q?d!;&b z6_8NieV^m0rV1R}eh2W?PT=$fd~=p29=%LD51cuJ>+EfQ_AGGr6zMQB4$`=N#(GXrJzOVm z3(qgxbQIs7r+K)pGo%wVoki<=_2My{yK({-FVnndNxZHnX}wR;vd-?Od3KTZ0Ox7H zoI6X)yNqwnU6y{{S2#=4&QO`tRQ4pzbArb6dK|y89NO-Smrjvr+G(1`b)Pv;bzBtT zG;b@7W65~lXI$<^UH^5L*8d`Psgb~0s_X0poZh<^mp}O!c>QhMRhWlwzkZh*tAFCl zLtoc{l?Zat0M^5hCi9>t#;Onoy#=d=fq_H`C_#nQyei;Qt`2z0*1V*V5 zWr%?;#sI&dP*~eL!Q9Foc8(q}vv!1qEyGe5SlGM5jQS^8IbfW*4aS&Rz{JK5lWgr_ zYVQbB2ParK(Mzr~m3MX#O|r2TUusKh3s_rQ!okW4&Q{iNqprI(buBF5Lh^KQM6^bY zgoHRGrlyEZ2Lo2NO|f!wfwjA<_>JEx2H{3)72|YH;K|~Cv0HJn6PY{PQxfGraP{_tyD#l8It~-eCPOuGJSLi( z(ljeNM~o5Ws!8Kv>EZx$Iu5pOj<9p*vL^5e@{?$FhVb@uOdOr<;Og!IFCTaKQk@(< z&QSbjvQKX>>GCi~p|ig^DAs>YJUlb8Ep24{h zo`)mkh8U3FlqOuPXIP^l`0b9<~(``?4y^ZIW_Pq)gZaANUSH)W|SappcENH<;b2@h1}Uy;t!iS zT!P5P6hzSZtnW!dbax_>>E+qbR{;NM#Ymdlg0#j2B$Qz2q^n43EookOzV{PzplOBz|(TH7`joiUJWcQ^ZcEo^~g>guj zpMsQGnaJwPMdg$XEbPm}(lA?`4pZZ6oem3z%aO3S5Q#H0kUyA(x~^OlPF`L@f!6GD&lp(w`1**tNu*(ZVR&Tl3T(~6o!9wi> zU3miP=S`6$ptfo^xElP>vY-dKQ_3XKtd-84+UIm?n~O1CYmdA+wMd^?hP2^Qv02EQ zUyGc%)kq&H7v(LiL+-p9nZ_!hbGvw914y0eJ{8d|nbLN1yUmf(VHI%_EzRwBN_P?6N9dT;CL^jL z4KdA`Vq?V6mZ5u0BOSAbbOE~T!<{|7g7!nD*py`Tlq0jd1Q}g)oplupSQopI!8&9Q zRwId~#n5sMQwoqo`+(=mo6f41y4da|f2bA(!wtwCu0{F0c9hO(M)8PoTiHH^6LeOL zu$@XHsuy*lbbc!;7qp{cRWCZ$52AVP3{)@eLfL{gR4nR1@!V!Kt?83-&FlJ6FuM_z zOQy&$M|d|a=@Hc}=tR|=R#eYzL-W$9n6hR-?tT5+=3(HD`RHCZB;)$F%)yMUbJ4SY zSfbiFDnGO=5rg+E6`LtlfCZ`-_8^(I-z3t7?vENYt>~AoO{^c>GQwa@=RziJcm1*+ z@jmBmQ`aQHHr^Z7v7TsMGXsW}EZD?(A&K@CpED+E2RNk!$g!EWZH^4PWrV;Y)&rr` zCOW4E!ph(w(dWD`8N9QXI`1#`LuacOEhn6v-zK>mxNdb#BKq#02UVyU5~dfTa9J~Q zmewI=rqN0%adCxsN5?KKMo2$j>v7P}%|_~qGGwo;7XR{`B{gW=G7YwwUXpya^Ugu2 zv=(v=rO&B^t}7i$RJT`dD8lJ{TXFAl`M1FrU%vxAIoeZ})$Q z^B=#81Ft-Z(|>yod;a#RKC{aa zI0N)sbNgP#ga7;` zYS&Fc$?_&Vv-d^$P^h0u?Pg~(=03L;t6siSaw@Rx2uD-LQJc8(kK3rNDnixTcFcNm zx#U`4ptR;sJJ56QEWC%W@yfY(X`QQa?*~t!bw@82{bs$`q%8T(Mu~vm@X9^Z4i)2t zW3NNgo`{H+IQ;&|U-7{EPvQgY!upr*#?L=_4s@ij;`dvz8z=Ge&wed7Cmgk%K<&6= zi7#IJ?mhHAF%!#PS&w(|F&_Bhas2t}J9r;op_!J;z??rcEP8$;?tJfINhF%Jq#T9o z>X5Ol0`ZFq1TH5oD;7YWx~d#0E9pF3S%&l#mB?6Cfy`CZUaYD?!<{|ITwI3AjqM0* z(IJ0%E$!P8*yMV`yEY61kIhH&a1JU~HKF_7e)!i!!Zynl>tDPBW1`J4^3-y%YT@I? zi9yq56(gu28XNv{7qaJ&`@K@v)FNed4U%d5`2#ycb&d#Uz%JUr9_VbL!jb9> z*XwC|15K+(HZ7;*j!qPAX_JrCHpTwv`Pm$~&p4L^qk^7Y>S!NjZfHi<)>i12(R0cA zD&+sH2kK?{h*?*Hl83sGwxtFs8`*k=uC+TF=-Gvyr>O4K#pUv`Vtj(V*sz!v`5}B( zE^_Xf3OxhJV&U9Bp5GZ!eNo)nQDwD=P1rj;8yDFgC*((X;9Llmwqfz-xrHMj$INoMHR= z8pP1@V`!PN)X(6Xfwv+aj-z?G%V1iGAXgx_Qbrk8%5oVcvRo-Y8jLH$JWUz*uQa;+ z?dtniQr3~XJk0B8U`S5G={wqf0Lc|_u0)r!MuT#R`lfxwV$lAdNP+6N6GQZ<4b{-o zaaJHbpKk^__WV)9u%#9eYf7NsTnF7+s*6GJQqJ{~h{wMA175lEp$zlC7W5%49q#QJdBQunwF_uO?9lM>tZRLU$e^bx2s=Z*`w<*W61!{TtA1yrw(EFq1^() z*|+@I(Zgc%tJtv|I&csN4;ppg(0=SYY?K1f|95qe>OOk(sMLGp$Prw)Z~>PuU&i_K z=cRi)X!?`>|5K_%*MM&>UKLpWi_%Qsx6c5(cj3x);Lv3Nr@jMDUc_MM_A-^Bd3Yh0E?mTw3+Hj^;(1)WbQTv#=PsX> z@i;{bqGepXa2;naU8Q+0({y9GvscdG$n`Tg{OuW>x_XxCVmQq6T*kL&u99fwPkx8% zXRpd%IgVXFC6hTLz;|!Yl%Mh=}1=@zI7mVU{JA36U zPSf(ZpUWA`o~LybYyQPp;$m)$2G$I(L!w)d|{W z(z%P*aFXk#eJ1O{e+&69yS)Fee{%_^&K$>Cs{hp0Z}HW!!#MWU=fG=k;-TDZfL>ru z?tK?K4}LDNe9x}^I3lq8OPv1ta~%45Cw6}EB@XP_jpK(8;pmYA_zu@lT2_eg$Pk38 zLlCYFgC-^#YJC(u1A}2^=YWY8b^^z399?1U-~vlKCs^1rI5*17+8(A>cG5MsaS-wN zTgzG5JBzFxjIy$KqB1ni&JO0bwy<$>g0-Wg0N98qEn*Vm5u2Py(`_Viq@}YFhBGi9 z4Z{^Fuw0q0h~YVlA-TDWtpIaVM_Y+3H^OpzjB})i#s6X6MMQ3{It znvvF82HPlKI3)PeOLznvlBl2Lkr@L2LMN`;kBb5qIFe2+E)&uZeBN5J#q)$+V>Iu{K-4`{OE2J)Rw_L z$Oq9$@p3-!abZ|)Py5)B_bKf&WtjWfLWM!PskJ4>m`uRfNfR;2(p*3~!*Y&{R+&$N z1sw;rVX<;H0&`Ai=@sB3u-ul8jh%xn9Gq<7O7(hqy9q4!^JA-(00H8PO$+z?(l`Y+ z2Zn|S><-tc1&{}ahlvD$GZYVx6i}{60p&ji%R_FF0>b~5ZUy8@KPw<4^adyozM=1d zIj_G)uN6xc?*K12dpN6b_5*0DAEbhhIZ1T+7wa z()nnc!PXIBlIYSaFG{*@g^>a}JxbMx>S91qF42skO^IU5Vw>Ryt5k3Jlxk2ozd@w$ z%#^>k=g+1WN;=nbMk*24lPeL-NyF*T_r}36Ee+vQGU44*3jJ_Ba@tc+T^xip^ddd8 zMvb_Zc!c(sBCNj}F0JVZTU-Rgib8}mYGI#b2mewp)Tg@P(?~xY2=~U5?Xf7Y^F#EM z7zEBpg=SVZqGsm`{FTIx3(9C*E=v1SFg@KBZ^by_M8G6m2$+a3JyrO7oD<$o^uZ?) z-q;u6kFP@<@cU#xESX0yJ#*=$lU@$XhtklS?|`4@IO3gXJG@mLjp}wC4799#y3X^b z=OJMxN0n2%GLi=EjC7<9m7sKL0eYJgu}bHPogS|ETpNrnE1D58-GJD^WMoZGMQuk0 z^12J)KDQa_nYCC{nSeEAIuv#%3KWkV%8+RF_(dfG%X!-vj_XEpsGqiRPM&mmn8)*U z{;M=60ZmzCjAo6WTZ~v5j_gZENKcY<6)_xFx(v(NUpbtHBL*@NHjswMVOrL_d}!w7 zA#`R20{hbtJeVQSJbY$0B8E7Moz`P8SE95flDj__sq-okJtG(S%bK8ywuW`KuK;S( zL>C0r#h_?u6LJ^OOU86MR=wHK_T?acPMJihn`V2%K0N@Xvl}rc*aF^}p)ikh1lxC1 z3^&6wAxMC^Z%P>SmFZ}lKNaHxs2z&+M{Gk5a{6na3YrX6xEai1o!~;}yk|iuoHFU0 zO>~oSCUhJp=xi`fV}FgzO=Ohg$x-^w&XB&=y*1Eu2;{wMRFR|g^ zeg^rb5e^b1&E+^zLQy`i6>V$# zvEb2l0^NB&K89s<&-TiRkPqB!^I}c=HLTnqNkUa2=13bVN8Vz3xu$C*XC=K9(>2N0 zu6A}75|@=Cn}N`he7fF}=sHeE=+s1HF0G+9<@keLvU*Z_MRc>hm0^7r54=&MiR z#9yDpS1;d(6T6>BaxOiS6}n@7b`YM9^ThsuG5AnB0mJolP0mO};BXm2=FkiMa5d5f zifKQjP@9wv!@L}6uh@f`b1|gM%|qs*LZmM#L(;rr_%v$p^ua&Te0hkTnu56L8FCLv z9mqx8)HKBQrXzvcA8k)E{F`(L?x41HI0qh;;V4<&C=t&b{XF%75!7w$f}xk%Gny}I zS~>!o^pZazj_O+c`%RetyYlpOnqcF{OJC~%MI&{qx)O@4d3-*>2d;0UdH1)pO;~dw&qB2_Hbw05{C0^ zcfz(MJdHtf@sfJ%cY^g#t*t@&%5o$xD?u7Z5HBqfK%Ts!^rljlmm+ONnUrH_ z&ilV&Ydf-*S5h4%urBaGcy}CTKC^_LAza{D9fFZxE=D>XvrM|TFz`;Ldx%e25bl2W z5vU?2%J$T4>5(XOJ_Z0kLBPHlvrFMo9*jB9EJq^UYg`I_u;#@r$fJ97?b=3Irr2WD zAJ$>ZU$)D~p@%+t3Y~Y&Kp7p6=B+&_T2cdtTrb@F{$p}JSQmI<2CYNIj&6yNk6%_U zQO}w=xyWAEAc;-+zRC789G$JEds)D=1hJxFfX+aj0eQl5+9xFL&)m?6+%2sVd9NsI zW0Q<$IIf7HIsiI=9 zUk{=gKyGb76dhNF;;Cz?zV)Ys!$h zv09Y6t_lTr^&oL&Eym@#qmGVk$HQ|lF~>t9%X7DO+ycvM{ufxDu)g*t;q2Fi%s){VR#VHz?O^$6 zV9t@{N_6>XfX?FaqvyY!ZUy9{#ju>gwSMFGWjVs1VLAU}A$ChO)O6fqw$>tQT@B*a zQ@Q1}2%z@p(Vc(7OIJQb(h53$bUnnf)-fEWd)Fp<#;5a5NAu|DSh8+~<_fIldRfYN zMLa+2*73J0ZXj#xwXaYj zPT=sh?{Mr2ZNj$~aq^o}kmz=a{$}vcu$d#c4-5EaFwOJwdf*I0coKC5uG4y)lyxz} z{_AIr;s|wt?3YLvui?@;;Og1yv@d9XTs(}cmk!guIYH}o4d*V<;;Bk5cj590T)cAF zDB5=yE?hTGr}gK$xL)2DN4_zNhZ&^vvQA&&ePjIiAnSPIqU=*%Z~j2R+w#BD<^B6D z)qDQbaa_J+gz>u$AHwM`zW`o)3y)@J1E0QuGrQl#t^-C`zIzWfP&@bG*w&(#A2+Jd*bBZfEh6<^+oz{kP?X2l3YFPw>aRZ{g?f{07!B zUNDVtL1;lNQX7jTLFupl`Ueazp9_007l|kj*J(rw9OsB~1(J)OJsls8Dre7eTW3cB z<*EteB)XhIxrv3Dz;d<>;UttMw&t*Qqw~VvMl4*yv}$+-_`%-U3AT<7u%qMQ;A9V1 zS66s>dBD%dmtM5};N#~jKKdL@&f{0HPA1cv}0hQ74reWJOANZDOVW4xKeRpHJ>AL7jgT6N&>M2ol zjU*$yBLiMjiV)sI=YLBIdRk(!vQ~@1vM?AL3{Vf0Lf2J_@a8Ne&n-ggNEVzE9TA-E z3w>=Qvi&At7afmNbRIq5n2hGCa3pl3B5Zm-bVDW3jg%pBP6f1!8lhRzf!NuNsOhi5 zaHbCLQJZj(j>&-%1Adtoh{er%bT{ZRl&8n4;v}pqjmP4aY}5_XOT-L%xfm)(C2ik8 zx;LIo^~2vaK6tG>9r;Zu2pz0I($sn+cUB>4dI7=)X+I2g!TMY2>(nto9X45_z<_O9nc+tAX4OU`Jc?`DE{wr*YMdU!bB=(G> z7h{R`o@umKVH*|!+Wl#WA-{pCyb4;Maj};m?gO)q$v)`L&aj*lRmEsY4ho2Zn#K* zInQI487N-heLLpSIj)j_-!LQ&&5uIU!Y;VR2f!rARwBKVnsU*(atKyBPfQ55hpsm5 zhJ95nwcX`n6O`1GkA$vVYQGD`Iw+Ic;fxuj)E1XWmxozAoZ3t0Tu+fCo#g24bUIHn zyNZ$4Q6PTl1sv_&S%i!Zn%Rb^=Gb{ZZk<4Wn zx-z8YE=Quvd{stis%iczqoS*mjjEwzT^=Wq%t7S_NyMvZPDglsGJ-3qj#4^*Na}LB z?nqoVq|5;Sl4$r9M~QrkbP@qC%B6Ol?s*=m!Ej0R7cX!I%Z|zZBD(}10nglZ&IlH8 z?35lP<7^Ur1e#BZcELogBg|s>qktPM^wbu`dc!7;?#&GDsmqovZ0Ew`*|J3yWCfL< znfQIPtqadLk&d%pz8=%IE|7?EOTD+)&~Q{a4?CxXqHInF3Wl1X^0$)d-J9mZF)3K4 z^D@{HrEAkniRR}#1XT+=1a9+(2?pdGdCrmjJdMZkbO!spKUE&%1gP^d7$0tn;*mxv z&mR_eyOrb0A3Rh6W|EM!X=Sg#a{k!Cb}m*_=i~@G`Da?s9ka!^pFa+@-7_S~XZd<& zh{v!zaC$tV=4QdLFb}bd@{zN?7I|wLkT9nZp&ju8bfbIHBr;c}Ge^;iCRk*6!93Mn zJh!8$4b1N6$P@B+~i^4^9h@YN=s3~;KO-Yfc^1OvLVoep?NbT~U z@4=cs-wi`A9h?3fWX`WZ*}67px>Jz1q!zi0>3-0cjhy+Fl5fGQB3!JbLYocZ(aq)K zhx3uWuu9;tetH)27uBL_ZHFW$t=rg*m(RW{%gUr}V7sU6d6i->!|TB7!~eF4rtQg~ zZ8J>GMA70pTK`PsF07#YOA6G};!(x`Y;Gn(rs$BiklM77Y#0VI5Zjl5)S*J8&n&^} z7q{b)ubzW`I1`EU3z4z1N+QZRiky>T#xE;H67{n+2`l-AxJ=s0N@JAy${IA@H$!Y$ zN;kKoVoN6+$^#M78H*WDE~NdO3hO*ibUiSP;*||Zq5DkB_Gt*HRU@75A?yBf4^)9F zNf0{a{+TFTQit+YEfQ6(ikghIFKtEgV77b&XJB5vx*m1wn&_Fr7lV(?!kQPhKovF) zzxez))U0kn5$)Hu?Y$Cd9^4d#d;a;jM7>+&x?|wkWvIQsPvEz9ZXT*0=tI`pTBIy5 zM=afkxy!@+?<~zorg)vR)rw-v!oK1;TbsqtoFm93*(Xg?#AQ=x9v0iWhzB|CKkjGo zbgrjxd%Gm{OkY(a9_DsAe&~5OXW*3)@; zM<)_i)L=rsCz>A~LC@n0VOrpW7GJ|DhydoaQFq*px#O8h$1L<3B zSZ;;bKQ{iyG`g<;Wef4>SQ?n?_l|lLGd4h=(p;+Ej$EmB|;3QkL9J>x2y($2iVeOUk*TkOX zoAV6D&j81%dyFKu9wdh5XU|Hcv;xf)G2s0km>Z+f8Qh+{W)$}uLAkNqrHe*DuE;pf z80BpQ#l}eYW8a*|ejLRC9Fr*SlUKgOUYy6_?@j^dP8ioqBG|8yj)~36;p^wI_q(e& ze$^OhEz?f&^lP|&#u&NHb)CL^jiz5SMzNnVmg9cj4;RmWhbvU|RTA%yZ!R3eHy4iz zIKO(1_Srd_PLgPD2INIGxu`ziTg zV2qUK{mvgNc$jtis_|pOf7|7HX$5il04Yle-(SEQ9A#{m%wZ9;PK2X;G@@Z zVduNpv;T8^d2law?m39PyQ!hs^%V~7{sKq#?Zf`vdvJLFz8}DHjw}xf@fT1Y85IFt zYz(vpJ-mZMVd3C}$<~grcJh$Oa)#fNENny!!5ND4IELX0Bv&HH6=1GFb7eY5lPlr~ zbB-uyP|jj-uE27REN58GaF+e8ZQP6iToD6s2IOq1!s6ju#nZnRm%9;FZg2eqSk6`~ z`rJ%p)Rw_E#0#$aK)4zL;Gm-ycda|D)gG`6^@M{u5Vqm;aLSYx`3^$!O=51Ssn2Hp!0qEE=jFNfHVzH9kTP%P)aT>j3&8|n< zP^Bnkr~;|Ol}MghiPVv5daQfklE3RH0V#GQZ;KZMf$zPoQJ%5L^-ik}x#r%5QQ1(~rQ?$(HuN(F(`TiH?`Ot-x>wu zkG&aH&Y*m}=_G;WoPctSr7_W@rHdUVTA7R2d1891%*)I89+o@8&CLy7US0yreSO)F zJWyb`B8KD~kP;gOhZF z>*C;DriDvxFk+@;!8*kYfmPHFm8fNWNJA`=`%7Tx$wzcgCiK%15!o39{gf1hx2MBr zN-;t^3z5~7glSFjSXvT}kxI4Lu*A^yl)}-Yy%k8BmIi&R4$iT5$Y@VR77Z8Dweh82 z5Kj4p;FX4KOskJWW?u<3v*=-bqy~{Q>4kb`F+%26B4l1YA_uCFGqn^Q$>DfIt-8f!tM1)SoAQ-i z&Gc-fFQ|sTFBfKM9&jlNLF}{~SWrLPNi=VpLG5A{!a9A9dR=q?$JH`9LHrgFYEjegeJPmeH#`fMjH4NJF6ePD4A}~)6yBKeHX45s17ly#% zD1=nTAh=WypF*~^Qp3MQ3)l1@IHmi;B`pvxnSl~X?wS=O!<^8OBZ)Z@*)LBck@XC0Z#^o4} z^Dx74mIBoorgPiRaF>%*iZ42CGXr@}Jk3g^bCn@I+j+5_Nc@z1QDP4r)2Ss$r)!IW ze$Lb~6!zC3f1pNeU3eN>)uc@?6J_+4A$vw83I=P%-@9yPqlhg=*z>z$ZYydQPeJXX zDH3VT!)(pM_ebvXeT*$y*zSbO@i>mWu3OwAYFIiA&8udhea#@+*A1a{&43KErfpw< z8Fw#1*Oob=-W?0kvUU)8!wnKmZl?3VyoWcyBU24iKF&Ehv0ZV`h{R-#8!G2_2{c#v z&^;|*kKub)!Yw^QK033vI!A}|y0QI?%6lUEcFadyTMm^s5nGj64=k5`%n|0i?re9) z^9XlG?pdzCJ>7;KNBot+`x(wd=ku^~yIHh@7bTX$5i zX@^~wH=GLtQL?-Rs$dgDQCrFp>~*u6vGvid0?T*rc@N)R_zJl21y1jOS73R6Pc7V? z=^k!t2LAwWgogg`9vKow_rNf=WbrlHviSQUEGz{6VSWfv`@r5(g_4X2ETVJe%%?Bn z!rRZ{#4C^D;OmcJ-WHzy#E|8X+2 z2noZ5Fm$JZEmgR^;Am9=<_oCZTAT~r;yk1;uSM>%I)t_-;Gxf+MJ}}=QFQN!YEMQ` zjTT|`^xWH)Ah{O|Q#oNUwO!N(a&887R|@>A>E2r#1x-s5yvrk?Zcc=zJqfYhMtJU4 z6e<=eQFOoI@f-hqzu2az+mhj1tr0LENy`pzjYHBPwPziPNFFMHc1p60=k4G~>G&Br z;-${uoD(}TNM|b)t~0dJAdsGyH}J?pJpTD_Wto{HWs;J8Cv{VeT`lWPdeo?MCtP zIt125;;Eg#LH)*dj5nBL`x|#-=3{f{StAuewPEPJZx{=oSxMKe3J?AB7wElb2$?er z(R23zbW;*xlkJW>{`L^sA7E>u38=km8XA5!fZ{tkp_`qH+zkx^{uz|#ZDgC2cIjqs zs7LYkcEsJ-7Yxda@9aeJ-BXZvN2|bc-Y*Qqc{=YK-d~(Vl%co+#}z=%8V$@DmKSVk zL+zb?@NbTVMV=ozADK(%a~)I>V`Tkme%5bHGP=G7G0W+CSXYMht?Y+R`+p0q)7{O8 z-dKUC4eUc+D^@aX56*&lrUy#acEGAAP&~^swzMOKwku&<3sUc*{_Rb0?9z(ocM^Y8 zVNl9om6Wil7Kxh~TG!BUH6oYh2{=vLLF=)N#?i73>q|xKm7ckc_R+E`i7an=XcoF3 zTOhF9Fs~SS+dA>@V0rACDzRZ8by1)C zEkAlbW!k?IZ&&!@0tC*@qJ2rvbF>Y-UObIq`AtYob=?k_>sFP^zX8~Kg~7Q}p7$va z|2rw=ZzrRddA-1L1+Me4;p5K7Jcgc4b?YmB0LznBH6VCu8Xn*M(#^>7*j3fHjV#x$ zt^T*LT$XQ$Yp|Ac8&W5*JZ)|@KKO1g);zUMVEM62Cj^#rWclvBUt{O)FU7Nb z-`?Fn!SbKj*^v@{=U)()Ee!XTB3iFOl}Njl3_!_x;>4f$+S}C%-u+u$^^`wvD%s zA^cU2YCq5W?!W6w{nWj7;yAu#Sbp{j_U%82OA=ZBHl9q+06usfm%n}&`}co=uMX|Q zuDyq_XYWDMSJ=Dv3xVVcEI)eifY`7wEH5iBLO_u3zlG%ty%~y6wzRz&S} zrHmgf9>?P8rdGC8hmCYCY#k(;oI$yRo11`hP8!L}XIReBAH-xT|m-+<*xWcdVp8}Tb=rB#+9zoiy-!Cr8pmpLc37wpyUaE|hZr@Xe;c^dysiX&d6z_yYns!LJ3ULk78$tPUxL^{ddM6qLp*yD&#XZ1qDJH_ zY(U2RTBOoVEMq|(auzotW26R2(~9uSM}NZmXTQMH@B9`A>4bmm&0nKrb_??8CA(|e zTy$<2!mmGj1uyUa8#X_GKi)t0HS+svkk(#;wANyzH5Oscrlol1mER$+x`>ViZA(N5 zv{5=(*;vEc-cJ0;Z-wO?J?>90$_&!kqnsnl8Im(BA2->=XvtzWNnrU{3$_v&hspMq z0?;|KoUL~FnA}0hmQ}vVBd(y4q`w~;{H$tgsUT= z(P^chEmb&SEsLkKczQ$xb;E<@g*_}h==*L218t4~H!38O>W&CPPMv3f zhH_#~W1>zPe?$I(emA8g8|D7d2}c?Bvz3e=N5hYjQjV`dU9=i%ZMbxULj4e_4Mj?N z0<ctPlCwAwsJXi>COTPQyel0~KSwyl1i?Ei8tz$9M$ht4drXM)#e@VO zI2LKdibb(uvCIjCQ)vVoi)sH(Nv9Y36u1?tVV@o>u-r7-6Sj%|@_~p!c)=Wcu4)kH5S#!B7bTg!g}aMZdxTW2j~T?D*-XBIyj^_ z!7bMZu0{T6%nZc=tpV2}Lg7t;$#H8hJ$ zkw$8-)Z)|RIGl{u;h%MBSXCc|s*yY-F04TM>^c-K?LhLq|i%u>ih!K zO-sh2SbMyl=!=6|KYUc4f)Pe+^?Uo~XqyZ6g%V9q|8rpUrtTMRZ z)AVS8CiqsUlOY(_7@|0 zW;wMRRY;jtL2VE1&!JNBj!zgY5qlg?x|%+VKh{-Bx%4^J$XrM-Xd|VFrhT8fpc?+I ziHI30MAFevV#eDZb?_i83E4p>94>X?~w31MQbGv7wlpOkB%)# zT*Ur_Z8aE_N+flhw@fpOaFC>qwmQ1+Xc*o3|lz@Su9*Q z@|eW^raEU@9xs#bxinp|VPSu4p3Yrmx{SMFal-TQ@~t?LCW-A}cpXeb?ZlRahuLa{ zEl${$g_qCk;T-D&D>ZF*2-}j;azd#~+sxBBQkZ#J9vB8`i1A2 zNb_>yO@ruzz&=XG*U4v@OpzJ>RvaXjq{4b7u=qkYQ5o;2QDWD!mK zEinid1|L|*`@h^ zvbEw{o-wToY|)}}n<(QLm@XuI4c%G;INHI5oDn$-Z6l?v0h&l7KQKDNC7yEo4= zMw9!SirvcmpRW}V&c~m-48QA^cFV^TE~nJV;^{;8E)j2Z9?y~GY}>*gO+pK!F!!FN zP`RjRSso~z-z3SBC&W1j0509wDftybrl%ryK@svdw<2zFkwlqu?g8~+n!wJC1!c%t zR4G81;d0}qsggL9ub~ubbIjvtJL7$j+L(>|fAyfi@^}9BCw%y~-{Qm9pTe7edIbBv zd;=}Dx$ttcLZF{J^fB5Susl>gUMmU=GbXYQ3JO3(a5zGOXuLKA0TJHtaGi|WA_FS3 zLvZoyS8(!`M{$bkKJmscaCG;JNbib)u3d-ffjrEwOU8?dVb~oRh<$Vqf6Wk#^|Zd- z{i!HfSc1$&RrCy0fV3H9)Gkn)HoqJx3#eUNRE(G;{3c#G@ityR`%k=Z_%*zE>}~w+&|j#`Tln?h3(dHF%y@z;m&i_iXmd*68i%YMBTefQ79(_g)a$3OWk7W{HO7XNAk z1|M30o_l9v-qWiv_m?Ztv7;XgezgYO_Y7m!6H77Wu0a$mtU<%ZZUNPWi)vA}yb0+u zi>1GEc?-&yHbLDSk1T4}DwZ|l@85iewk^|9w4fHH)E07H4^D8*-Iyt90>`jW&Ly3bGJn7W#pe4 zn;Ve3sb1`kGS<>Pay{MSM{7e3GB?#BdrJdywl*T~j%K9M`1lniVpqcc-aMYmuuVzw znhF`0wV4xz(mq{H`|id#2Ji)2Ix+2;6_{M;0~KxO@bA{qJu(NXs0k?A+K$rg9mwC( zjJRb*VuMm}cPpZnh7`7Y1Y{te$G~YiAYkK}ETipS>f&$?b;VEq|cNGB4(42j%UHfAYvM39N4Hd>H_6_u`K#JK^ zF2fAV4NEGZ%5p*NeFJEJXf{l8JteX{|BfmD5iDn*%o2D^Wk*A3?q@j7@S817SW475 zPh%;tTv`8HBg>U~MvKQO)BcriEq`l$qs!h-yiH+?=z1KXXK4OM5DoMCDG}zQ;q~o+ zIRkIrf1}57KbIG{ePi5@X>|R!>c4^IM$d9O7ONT%GA;f8I#_2?e zPmt=uxo?4sSHym0M_Dp(;xk;ncm#V+pTmV~Fh-UiH~NTk#PgMNG|bSLqpVLFEkTq- zlnlnX99w*_Zbpe;;7Dns6dMx-3Nt)rixP&+;xWz%Lc^v!Z ztcZcRSfp?QO->kk@&s^%%FFtm6&sdwS4eE!V>gTio!vGX!Ty4o)(9?l8_>JxYr^D$txE`2n1g z$a%$Y-3Y<|yRJa}^CxlTSgc~x~8II{fT*{~?Udo%zy!fzu$ zXJD>?bOoG`maP+8uNduDSc)Bsy{oH$au+Wz>1Rt1hU5%U8Qe3BwRWN9IoJ#IW*Bbm zYK%0ub*K7nh{rK3S0K3=l{dAw`(6$y%w5f3Ij~k)~;T3JjS<(dEv>fQBWJ_du=ej{mT|0#8VR|5J$if(3 z3pmkwc;;#(x|}24xC}$}SN6VxJAVHVT;c-|UJ!?j)?(BRcHr|9d$457D!2!E(eZFY zTtY0p=mx>g&dwP5?QD!NXIQR8ne)dCPVC9HD;!16T?XX}IOjy4V@ypj!E!RjSx&+j z^NE;XZHn<0rt%Sl?OUwuXn)!}3M_Yac7=xrN0j@+-#5Sr%e{Qz;^G1)IuD$joW!QZ z(UJOTn8&-gIZO1pyQeW4o#C`vt(K^9jwsjZG>D7{K?K8bQfOG9i2K8Dz;d=d84b%7 zQ0^b%2ftw7A3*ZaV4NeuS;}-p3S9plvKxW90?kg6o3Tw|b@-FO}BJsmO0!5ovFZ7|-! zLZZsYI$8)UXR+Oi0?QecTe{f_ET7UlVT`MU_AFh&XhdrwO>muM^ z8wy=>f+Vo@YRpGia{=<|l2JwTt}lx|cE)9D4H-;ggH5BfhIykgx;M=W5 zPKqnup>yqkPXKyFcalzpb4}6ppgN!^sxOW&3-kFAI+Sb^{80e{dY>_*I}QKKJ&< zS6R{6lIV?cT1U4g1ME9u;6&@CZq^~DBN0Jec}Sw;urk93cNK-Au_F_)UHOP^&xT=2 z9ulS&$^MAzrZ$BX)s}^r&Rpr|X^Il36(eDKF$~kFTz?S^eMKl;)rp9X46%a>qUCdf z)tKpp&~~#$RJK6(#G!KO@&`cvS4{l$Jn$YCAQ{B61q)laBzERYm!r8QqI=Xhwg=&H9NEoX z9?xw)N1d}ZOJX;bC2`a^izCR{1}43ox^4N0t4oKzDp`_^8fsD{+MYii#L_;|RwN*? zE(6hJ2~ZctKwT0mwk!;BIl7%A*R_pl2(L+$2zUQNokY;H{OP*$%Z`*td9UwU!{%`VzU`t1#V zu%~+&!*ErA6;y%N7#HD$i8{BNDw{tAB_nO(OU}tXXWhSA`Z;nuuqajl`S>up2hnji zH0MzpQ4N*1nM9#a-8vU)YQxx8g+B)H2M3NE=i|vxoTJ})pDG_Q7cJK5nW&b4d=$kew}U#`sLeq6b&OKRW_W;t}tN z^!`%RukXbegB>D!(&akJq8D9GnitxaCdmhrmsg5iMBJP_#LUbR&usRh&KNF2EX~7_ z)m5uI8pw(E6zzW<6}HZaoP0vn4l z2&a3LmnU6wV#5-G;E*r`hO$EBUtW?=gzkNj;aUU+go?GBFFjuc&@)taau8a}^*H_U z?{V8yDZlODEpMYv=!gzhC^RRF>!8i{tnRyJ`3| z{T|2HIEweb`x0+o`xx(j`x(u90B>FW2yb5b5Ub3m|6%;|+plTfJ-G89 zk3mQ0RLX*KNrK5AW@6`2TePAUX{&1FgD`{g#HE!+P`;S@my{uyj)91dQN^9T2%46H z%+-x(d1wR)R9F6*7L;%4hG~u`>h9>ptY=qaavD7YRz;%qt^x7W4`|d2EN5$+=-v#h zef4f?^Q|!L!P)4#Z&0GktJgN8lIk^2vB!(2UZZD%NO%!(;0Pl_lk{78f_aV z%r(r<6=2TEOxepjXJeiGgCk{4h4_0jDCeY>47nMEv$#KZThmQgp17(^#xY1|sLo)V z$EDExT!vve_bbC3HO`bzL2*xA($2#~WqKTj7x7kIZ@1C|=iz)aCU^ zUR{sGb@gI>!tgfpt`5Ynt3krr8i`Ej@jT2jT5(jvXCwuY%kvSxxmrA|^&86&wXqb@ zo5}>BGc1o;Tn<&bqa^rbSU*0?P5uS)pTP3bk?jnU6)BP94AB`%GhAj+o^faUO%TrW zu@r!<0Dp$iTz)jPR^ax33b_^iSo#07p0w?)vJIN$C1S%9N17?umz=JSyDIV+Klk?~&zl{DV?uLbrj=VYA>!xdQ0HY|U-^w0k*Y*-Xn zt|awT;CLKu%fEx=qrvsb z{L*z{)?!U^`XY{ha~6lbJue9-zd6H6KN&J#rH9xS0rBK98FC+ zefjDQUBg*A85#Coxp)dV%l0B{-@@MD9Kn87gwsab6SgSf`3_&dj04|Ylyzb4#YG&s zeqI1DPLd8^lt_4vYG)|UP@OGa*x#IiHhYkZ5Bd3PvhHjd!;#jU9Fzg{q3=!!jAnq( z-s2pJ&Jo?mzGX;#RFax<6g$ox6}Zm{KE+anEnBV_qviRdff1II7^awjIJEaG?4|}~_r9Z}VELEg zE5)#U|L$GlTYlv5{+qCzqgwwHSgu&9F#MiqW`*&SEd-J)Abm7UzZIzSd~D_7=;jGG zZ$G&E_`}u97fv1?H-R}vmNP78`<3|AWJJfuinRwvAltgR-UQ@!9`3OBr1?nP&l(NO z8I(`9v;CoLt&G5&rm=0yWM|qo2U`K9jv1zhO$O(K#fT%N z%&9^Ky$l+LOAyqWB*2{`s+<%2;GY?RupBK66-h{KEkMn@PL$4RMf&tg0X#8vX&4(| zAyJL&#h%t)gye=iB-Ui3bz~}D_}eSEXJ) z1HQig2nq-m1$g_z+tUjsT>k_W#*Z6=vEx)2JBCDE9_I1p4CyD2hmEx*eEmET5guxU z;vw{+9uYzcMnpsa!a@URoWD_F0pg z4gNu%&_;(LuP_7K@7jdIl3coOL&cUw9jAeVmy=kmOm?xtID1p^DIe!T*QvYB&B$^k z!KVVuZzlM(p9GbQIV>YQ;gTEyr_@MT#sy-6-b-M)Ns^yfu-F$w!X`iTW`a+L;xIUs zgwqSIP9n?Itr@UMq3td;z^}-F_|8JOa}wL~807RRTR*{2BRTy^=y*P8!L!A5oze*l9?> z*3aLNjXcd-tcLsf9gi@>B97pT0(!673Md9xej_^JFS!8FzlCVCf1syR+e z_k?&4n9}gr2rG;Ux5OkpwI7MpZs+((vf{M4m53WIl1OxIf3Aq(IE!I9`U5$K*YSR{Y1&zW0|h{kw~kFtTTB^g;mWze^$i4}srFCUTJ4A^re zihi8d9#M3jmd$O(c-l5@KZ6URkkFKcrp4VDA7CwzmOm(3Yuzy+kfW)o?bFizE1C8~ zTBO)mF|f6c@_<`nhzvW^_2QfmAj9q{A@E2Jlkz?}kz%vqo=)RQ-szzNgMHJ(5RgU3 zI9n}JY*<(U1v>Z@Xhm$@!qAifG}py`;N11jj(|r-=*{VYh17=7b;q9K>`$((Nfs-X z$hu^@PLc#@vqcL}XAknoVuJv1Z87!dN6Y;qA}UIqjC2&$XK%VOBeFg{~yseByBnO2U5g;P*D(k%Hj%7z(PK z7^E{qZ&=oc!r^A9Tqhu;EKdHV#ju;LRoF^}y~bzWzYO}O42i7I>93Lx6dYmBA7EzO zxj;Trum?HM!%^fMY0m!U49U3+N1=0qPqt*?evUS0IKJvv+wt7zuh6yUC6W6o-^sFX zYUi}ULhT68^kBL+y{K*zqz{&fh06FuCq#6opk{k73fHyC2POuV9MK!pn+V%7Uqnt# zKy+`KBsSEx#3O%B1=9Kp5IZGPK3wt#B>wop&jtFTB&^)A2CDHYeEjj-xIph4@4WmN z&K>>$*Us(6!}n}}o%vX(`9A4qOz_E2JSaF6oXlDhT89Q36&!+);79}nhQf#LzkXq! z@b$4mpw|REe$QMSdG{Hd`Taw<{=#E8_3VQ<_wh>z&hUm)agZc5Pbi7O)D$fq)`el0 zj~9;m*yAsH8*IyWMpa`7G%Znxr+Z5Lj9R4hRUoss5P5W+=S)jS8Yy9FCiGJ|DRddM zof&xX)Ia3kOQ8)3)IMY&Z=~jC?g7q2P&m5|iQRc9oLi5anN_G>-ie}lO(mdczOFIxp`?z#L9kS_}E`3IU^k-1J zRlJ}U#S7~Y*PVgvnbfZJ<{*on^AdZqkUE{#fu8qLXj{q_HqyLhh-yqk(cD@L(0=>F z{=Y&~N7r$E9Lnc6pm<)LbPHzFwKQCT+?lj5`ihV_Py#(Yb8@Z)-o~nBZD`xnhq^VL z=(%ect($u>W%~dc*LS1yj(#k7a*a&SpH(COVEFkzpT)g@e?mYtM|u~oYLbr+oG_MQ zcjn4^WUp>Q)~W_%ub_Rhg0^!xjayzP<+wkYt-q+h?%p9P*DUs21#8<;xQ4FrduO8k z{t-BrhM{rW47A@p6M>DfVym_6_uEjgxDFNT+9fe9Te5J{)CJG2g?XwAWlQ) zMUCYDN1o-k!t&7(<}3!xY}2AZaR%YsW$3KT$55JwmHBvBDWgnN%CnSV1!(^(-LAYc z%+p4fy`7Wo1(XgC{dAb6#V`%@dlwr1K`BxfU@2z53&S0Bixl$*? za{gBV!*V{x99gd4QUmp>3K-V%IZ}TUmjChM`x06He|myXhT#e*S715A@c*x1IqOy! zu8dcp_^s1#S5M3uS{D-cE8~^z_%T>6QRP&QZCDH|sNGuHC<#8_x%34VJh%!oSIrSv zzW>;Mi7elLaF4+91N-;>WW(~4{zpm0_9Qrd4A}D}wr9ryr*`4nODAyUI&e(B8I2>%_~G$as#tXJCHXm^4&C^<`sHQikjoE__G(^SaE(`-nj~uMbDr zpSyAb7cX;U`3VsN^yAlfd#E1TZ|rk^>hg7}kA2mR9}@ms@%mi6coJvN9mDx=uj3G{ z_lHOK;>7;1fp_1^WG-Ii zPVQa;%$+^F#e&7c&Q6kin%UThB?m{9CuO8bm%#w*Koq~Mho2AJ{QcnK=PPpZ@rHw! zr$BNB=nTmfSk6)997#UO*5;-dmQS*=gsGkN&FFM(V%qSGp=b*W_20b&I(M>P)!}PK`GOq)37Ia|gim6zOu8#Vz~CjQ!&}s0v3Tb zDDR_}l&&%q4mBW;);+7I6ahJE`OCjYQXm@UccF3a6jTqkV&RUJ_|2PtLS1hQJi~n9 z9~p?41Osw&vk?=mhn0mToM=BY;O69>d`uXMGc4yspBzQbu$;#U93MAEyvupKGHs0M z1bOjhSgtY|FZK8Y1;E_eN`Scy9V7NC_wew5zrR01`2{;D7=gZi@S)>uGLh;NSZ)O6 zV^lYQIceNj6)Y_#!Hkw+Z)Yh9$2f{Sz~2j=9?tOcbU`F-Q$z&&rurc?)K|pdT!H10 z{ITd3Sk4jU49a~1y+=ie-#)tB%f}PmzFsn{jQ8>LhNrj3&4_oFr>8q@qnn8Py}W4} zDLW?}DX9tY_HmPS@elAqY+RHmFvyG6jn*g74S^xvQ0qdlc*z`mhbvgOaTPp$T*Zz> zV^G7<+gU(3!}2i>rbhb}PurUbK5z9bXWdNjX=fsl<*sp|V#8t;8z>1rC&qYVY>XGi z$1}jt8l%heLnX3&a=H(!^8zKoC;OHgrWQiql_!a1`5z7L*%}0u#R*(uaKI{^(}ds( z1DrF01Tc&Vx0Xb=wkf^>&Do+Tq&g1TmUIELj+sI5q-E;cvJqOD2;U+t0?Nav-VmtE zqv4aILvUjW{EAYLlA}SK*LZBNj6<2f3H%ehXuV<)+>k3a4RPgqWYV=4O$uvELFSTr z)D}nKy+{oXdk5ez*#`6{dLgw^i?AjGbPfFRDHQqT5y&soAfY@4;bj~pZa`_gA3h7# z<6J-tUMft*jJ!zXG^D`LmWSMyD%4JGLFtro6m=A$xHT6Uoq2S97a^l574sv!@o}61 zR|2)z85fVC`g9}@)($aX3B|8xsQ1 zUJ;GrUV0ImI~AUN#R%%oLQzu&8d?jH-dTx)>MX3y4#T|_dek>&B6C_5wFULmCNv>; zMjbMy(n~CjD;R8)aV4`_Q8v3>#Qi)jf1rU>hwSM*Z?%9}_Pl0T%LyoZx6Z*wSNGsc z9L61gd; zTe#?l3lTl5NTi*a2hDJ<*x4{FkL=G8h4)bVH>(60^Q&pza{)VRVm)aFu@U@~~Mrm+_F{$)R-5Bq`%roJ84F<08o&*|udum@Ou7 zB1)gh7~^9KlOVeOLhWD{W)IVFdrS(m6U!1Vs|vD^C}ZwtOBdGoP#Y23nXr`!Tb8gU zu?39UQMyV$PZui}1Fd_E8zx7)2$1FNolMIy4WfDitue;KMD88t0oE|_HiOD(EL4tT zFu`*&EQ4%CKU={9&3BKmi^-2uHv2$eJ4JM8HG;$()&ZZwTF-kJ7^ zi#fGzHZb?6d%2G-R4#OHaiw+ix1-}m?QU`e5}FE8yRcX6R~UlVESidRI`37qt>G2P zlJryYEDtV;mtltIJlwWs7_lw+k}Q-Hd@g=sqiiQbZMIBNc}=+KTh3ACoVb%c$2qc| zBhcBRg<(2d;cx^wNBpbY$BIo2+pBO{?q|yt_B&S+pehmR4B5FJ{?NVffmN`Kbb>wY zSBB+*Mf@Q}1C^%=hOTVnEogv4QLy+L7p!SP()>yR=A2+xGnkF=sYy^pn@Hlu$mSTN z^yVPFHxD7@I;8aE%LmNZ)+|^?d%!0x9Lw%mi{AM&=-JN-|NQ6cz!iG={o*xTKf4pB z4}F4tU;YDr?zV7uvOy5tX9N7bZ+!f{@h_?yQRPO3!pAodenFx1Ea!#L2w!-*Ooa7B z6^`wE8He8aB~CqeAHI9;=Q#D~J;2AWL!T8&*K#s+ojLOHq`ov0cVs8yD_s~ag}Gy& z)*8P_u*Q@;7if#=URxat_v&QHl@VI3Lu4V{5A*5%o)ZXvl51WNCMCN=rL)2BkG?H7 zU;OVS(>NE5)7Zcw-VJ6k^eh_d3cF-)SSNVEL__CP2we-I=1@h@{WHpuu30)4L+Rcb z<0>BtRRNPRDauJKnp8nlj^#5En|^;EcD(!uUAr`Yz$7}S=w2IT1DkkfItNs+Npgjm z!Jej%#aNBG$S%zT_NgA2tha?JmG#OEq;tm{wlt4@k_WW)@pMmihC{L^atF)sDR#p- z%}2!J0y)1&UI@Y}qviep;G{C z={mZ1tZhT-8l%c?bQy*-7;n6L2({a1p!2~wnDy*h)NkuU)y5uFtet}TP1ET4AsZvV zSc#r{XUji?*wSY1FIP#zQikOP%jyx<9xusJH@tce%+s7O^u$8+J~)i>mG$Vjvsb!K zxo-INzUPrYzZlMW?wIxS1*l%$h@qd&fnBN#HvE1Iw!XLnW5Xw6@V;3B(9;L$lE~owl!6BKPpBp^%rkzkp!}ZTj-v;sa`Bu zl2?~YAY!*Y(q z&Db$TfMel~ZdBgYi}2o5Skbyop>0o?nS*i3)^y$Hqx-4Z67kMa>uFo+pj}Z2?S=}( z-_d|5j*4Gtw7GG~@k8U%b_8UHAahDST9$U9bZ!G$xAmi7d9&Eb#V)Qu#H<{|%_~95 zB3jpFw4O_<5Vx>c{<#vnq*N?;7;2}|_9t&*09S^nRWyBlxkQ??xA{#QmP}_<-!lWP z56+Uva^0*vWN&W6zk}r*#je<}D4<+{&B`?DZ@PN z-|2Scm0_j+edeKyFSPLS&6{$z2GF64072b=xOnmk&R)2R zbx;FP_6uI!TXSpfcCK!})VpaD^klXI}8`O~;^jV`K-7jThQ zg{I)MGbeDCx@WFk#kr#=jN5+Vyd+Tl?mOD_Gv{%Mx@S&bz%@23r)3`a?mXx<0f(+r zeQcC|@-)8tdMEJh6`VSCh*p&9I)4gBa1{sf4NlO`zkZw+c!m~qfc6K?a{0oyKdNu| zSka<5a-GHFu3Y?1x@`G!`t)I{^%8cTI)Z)QUc!54_EBT>1@O+Bc(gDV`0x!}{_^iQ zyyr{o-m?#TcOAx_od>8v+bNA2H)ssY#jl*CM3z@pl}co}IyzEddALp^HYglfKHl6? zqRLqezZrUunP@6e;@X&ae6{BQUi!-$P>r1kM>j9Hc>2Q4nhu$&<~+q0;n zV{zi_MOq>d5~&6ImAiQQ2qd3iW(GSK7jS}4_QGah&!9XmB}o!~dI$Q$BQO9?-n0x~ zAGrGY!r8|go4x?m!{Jr{^Jhu!J7k>49{l0#P(9 zu)HHxq9xsn)Dq#;wsaagmrO%ZXDOP7T2MF8jDjwD=8WtEcYv3Nr$m)m z;o;(pD0L)U=y-a%Iw2u83Tep(_;@;DoJs{pJ9EV9Bk_yJ9>kRP23VSnhlS}lna2HG z&fCKgo^JM3)>Oui8>7Pb8!|DWa+VWeZf=ZNx3M)9**jUo#huPgH%Hhz+K8N7>|sso z@969RXIdAwfiY#zbw@jxSm-ro>`l&^%+@RkC;1U}Gk8~}33*scQ+{EC6@v%NIPY)Kqa*iywEeI1>Zj~DZvrHfOHN;AS&%oLQ zXxp;{mU|aQ!KXlvkctGcFyP2c#V$gzYhYkx74LJi(Ki>$$FSSNUk$9U@W zGKos(X`G}mvN8!)F>WwXo5C%{1#WR37~@OlmcJ`h-j491{uoCUHWx)9%T5Jre=}I7 zgu^>G38mATP*IbOPriH|&;R2O0-c;P1CXh4#y{v>I~Ev(-)lWF6k!Qn1f7rCi3rh8 zK%9OO()`CGFVYSX5q9v7bAfG|10sD?_P0YYaF72Z4v8fgA^}Y zEDHpq;pt25qB;tyq%e{%B2q$N>oOU^w7r_x zFjQKra7R%zLW1qY=UMT6w$ysSI?7ANnMJzFIEPq&8Fr*?F$r~qO|-X6}-=-XPn48d50But`qFXYNJ5Y^)Tn&2G4bju$S&a3ZgnNGT0Crv6i;s_gh6CRm zmhRv8zYm9SXRNqyHTGUPfIs~6MN|&dqmfx0J)n!{B4oiR*c4FeHcU60NbooFYJM~HbZPy{0m|*c=vLNJm+cbVLo-sd;#kW%}Zyu zBd5OxoaB=~_;GYNTdFWHXK>CR2bxy)N;}5G)r&gCl7*9ZGU#So6(t(Ic1agX=QImM zXX_fLlmPi~!4c{0>jngx^M?j*AGy8cD0D7Yzoc6}Y;Xct_POuhIv2C=TZ*oYL+~$& zf=RR!3g$MVX5CawNN|yawu$sSkubXq(VRrGKN}$(@rat13eVC|*Xu8m)KPP!m)x6A@ROg6j5ax~Ee+_4Z5jsCX26K7Wn6M{xc8K6;ovhNj8_ zI9iz?*v|vLbRQ25^g~!E|AWdOAt6CfYa_u4uDv|Ws6r+|;&MM6?AqN|hS!-l#z8O60lXwwDbmFN&$i1Nir_X+q) zXM;y-wV2Y8h)jAm3hysP+DNTLRu|HWR1>dHcV zZ-Mx}H*f5dDDt9t4QN=^gNjA1s9xNL*45LHKUj$=n+DLmZA22ZH?EzI){O&HZW@}_ zOh?zIVf1X7Md!dY%z0=f+Sc@;WTXK*UV0c0y#6Gr=C+`FeLtF(bztPad1zhJg&B9v z!odA=QL(rYjqAElzoruvOPkQPxfjjrx+U_wW=S)Os6DKlTZ@_n4RjvXBC#VA#j~oB z){}?&rS13}dyqhF7!N0PW+ApE74dE9Ff^yYFFy>CRWS%H(?Q=%ZE8&%v@|}rLXW_* zD7a+@!>?E){rqvjF)aWdxuNpGKovMik{PRlCS$DH8gn08fnV=@Ng%#^ZUDxp&7caW zXFDA|J4capW|)}dh;i|D7-z5%nZ(gOAl?C!W9j+cK+hscE-*=P#l%Esu?2+BA^m>fbSYh7dE77%WP(Bh2JU9;lQ_|<3x zm~VUQ0jRVls94p2jFAE~Z|y?Mwr->hWFW966wmGb9g_Rg;awbrd*6N-*~5isSks2k z%1AV;=WNlE#x^T! zDt@5MjkS^!g{N~=deW*gf$jNsG$V0smDq}eE+|0p{nN#^Bzs*0I)6Tbh^_^egj> zUWPL6$E3`!lxK1O&AO?~ztU*nJsP01c-pPQx0YA>Zzlzo8%R9N^YXD_3m(Hdviv6O-qi3PN0$GXMuYL&NvY?@ zl)SC=CQ#@8q^&Ii(W6#Z(f(^C1@PO|s@?pf=ebJyC;dg$)z>VCVctE;Pi{q+Bdm|LZ$ zavLpRm+PP2m)7Jq+U@1JNKg83(Qbszcrumy3Yk@@0((l&@{svGMO~~VthJKRkp;wz zDC8$jF@DtyhPIC6Cbzk8{Q@V>pWyUa$)ApM@xnRIo;k(I6UUy|@e`apd6HA7PAOP^ z^6VK-ojd!N0Q`Sq|AFQIv47Vz(yRIRYfoVL%7h3wcU*azOV4MiBy#P+4X%hm&Y62h zIDY>)Cm-M7;=_kLxCO}Imlq##>(YI$-jJ~RiFdUE_AFcw`@eWonAqT& zq|}eaI=K1xcLm7LKDZ->FOS3k>me6^f57F(4>*7OCKqmABF{M)$nrMaxzC-ecO~mq z5c&442Z%#Z!2SMNadRBK#G{L1rP%DE$ba?mV?;Kt+_ciracsHcdlH!6y34)G*SRka_w-e9KH?be-4N#>_Q`osHV>|G z=kaB(|9*+97mtZdBJHpkG(5V;jhmObd-Dd@MgH@M^Ax+4JY5AB6{pELv3&U$_!YKo=J}LZ z_;Cw&4(;UJ(L)?NDjKiD=Y^f+=+UDb)oM$LhD_>}pF4F@RGl;8z#dXul8=*%JwAcn ze+kQV4b2rS*UGQ>1coXv@yXL?EAV|s{3l_#gz3_&Ttaeb(z{%4BLTa#F%ze%{P)Fm z^bHE7O^42Co^4N;9zAgJ@={VP+5n$gST3blca_yeAIGci_h zTx*^6d;DP%oJ*6x(^>BcIPV}KxzA|hyVv+}*V|&Y==kq$i`4W0CSHZZ)xVOLwJvmIuy_2?~%0k1WKsIT@Ee zNdyls5D%>)yqZ%<^ z9IrqxJpH^B=ykBOSGwRmj0_drmVjJ(luJl1m!*feT-HjkNC+kR!kDW7m$2*jV*Y z(7SU-4SRn0hWmFfvg)Npv~R1SgV=WZv{5{`CvUu4;=Vb{&FiP(chMG}Kg>`2w(#!T zFEMS(2>SNzNkv5->FKdVL-(Hq^?K`$p z)=A3B=;|nFF3(2-a|zNVESFQcECIO$<;J4C#R&EDb44mxVP85 z`6^v?JEGUUlR6#=@U3hNDJ{>z%uEk!YeSw9zdvf!0D1TE`s*vv>CzT=FK5#8($F>O zMn^*(x?1WhSS}@4q_s2ERVHOvBpB~*Wr&`o!5^CC3Zh%+(Zj2bQTmSf%*kloNtgl9vKM zQlB@jPmY3V5|&H2CLxoQZ;%j5N;=3q5-uh56$3DlSIHQp`qI!kh!?(G!}9g3nf>-G zT31h|b;UGBE}qK7HLo&$`BGk5K8NkE&u2+?C|eherm!&=jW`Fl!gQ=6{1`N{NtE*m zzS{8xvscZ>Bhi}zZ%cmh^XIm+J3sn6^Jb_$6JuQ%lI+IBBnM_EIx@w}nAx!&w50fw zpW{tXzC8*49oZY{%>^$hAKwSX|x3y&GhU zevqBgcQ%W3#ax_^MYKD{kuFO2Sq4tj*mhM@3DxEL9)Y&>@VCM^z>3Jyc!KgGloztD zn*rV24bhlBtLFDy`bB|G8T3$kD(g6R$4;EHqo_O1@t#-&JD}rYfS#vl-}55r;%TBZ ztZQ0Z&f-ZR;#wnsh4Q~N9QZ=a>s@!9O@&LN4eB2cdV6PusySI>m*3_YX1s-MJKut;D@X)J?HZ`2~bqWdx}sN)#OPEEM%G z&XEK-uiFx*aUD`i}qGXs>DzqzP)G9Y7*5Nph0oRu7lR_aAcwrC|; zob!SStxHw+oYWeZfjq0mHL~sWZkD|Ff`Z|LT8FUn_z$!(Zp*|alSQ}j7H_P7ldRet z&OAKFN83N4tz}2?G`Xp~zCE&n2(L;~KwN@xd7N%}A?jY15+w5FmXu?WUmHk$_K1o^ z!ph=_>6xnHYDgV)S*Ij0m-T1N^OFe4jo_uvUZtS9SV4RF@^}2g@thI;o!XY3Y}mS< zjXO3lVfF-S`uF7J_g`iA@x6qkMR4fq5q`ORm=`{JnUtP6B-Lc$l^TM^x+}^3N|aZ* z^eC5-D^jD}UDQJf(4DhFm4>;-Sv=E19aOpu>?ys=qZ@L`A6+ZXB}si5AfbnnJI$nJNVJg-Yj;Rsl{p1Us?oqacG^A2BZy*}SXUUn? zK<10EIr!#>*9(cJs z;o@Mc!hM}qR#Vf~k|c_YbD zo@hiKV?SFg1D(-#FeB8m2hY2h@vDb9*mUEPIM&tP-Kh-hj#HAjFY`tDWs5c~#{;We z7i=;ea7}l?In5RQI2#oa7yz+V%S+CujbQ}LT_3X;2I`{0oufOk=_g69&Hr}WQJ z(k*cU(k>8dCio}?yX`*t6r& zZZby~;8Et!>p#9jL{l7n7PnxXYESK)Mpo~BQ%SOXdipDRFX>NkpIBlBr&0TS3z|S3 zR_=d?$Wd9Cmw3?ct#KqsFWJG#6fbEae_=gE&x!L{+K2e5#Y9aI_tp4Zl4q1tvb-N< zEBlkXw4Ugx`AV)uPNmm*{ET9yd7d)2g0%S+WG<>9ZhC=QPG3+d@)W4`Dt&e-887rE zc}WAA%lZ&BPPA<^%gLTwL&3aST*dizOEIU{i!C_U2hld(K!N+h7n_KlQAEmfH8>B8 zCTUS6exp*zn$we|J6^+4j63?z8O#r-cHtK8f|cke)eW!V!|fmP;)YjPv~eZSX<`W{$Gjw_` z;WG+JeeMY?e>TN}ikF5^_I!WZCtDIZq2M2KFaHH*rFXgXEDxLc1eE_fuv{z0@^_|% z*jj-7wEa6UTMMt{ycUXU?di0qx6zv1?&JX*7!c!0~7N39ju*G2Ho>2H*0`Ty;(Jba$?4u9fdEQEI)JR3}?=r<@EV;oVjrRe}UisQ~M7r z|BwBxNr~L&I=8vTx%=nE;OQL4f4{_`hZop?<&=^| zk%2QW-Mgn`TW*ML?}(|~Uh0LP7uy~a!>Ch_t|+bUoA+*U$XRYl`u*UMIPvS;I`ShA9^c_Ak2rb% zF2}B2<^FwnT-U^Q;#V(;;r{QUXm8%)vbYI2?E<$x|CrmW*TA;##l9}_`0_Dv z9P*{YC2m~3z=d0)>_wT%^OMpsckhVbJ161)J+5B5%Z2M=-{KfWBeOXP(jPgnNiDK9T8imi!kv($K)PA#5|k3cXS+A>>y2X=xf(DAtKGt)C5yY3(PIeFfo&QJ_aqOp0{K)E87ST@R z&B=`7=x@6?bMhy?{rUs7PUiV(?>8JfvRm1~{oBRh|8v%TxSE$%EMVr$af}^1m|3$X zGIiQG#!nc<$WcRR>QhH{PMQk5DFfh|S(u`4*h7JR3C<-5mvCId@Q$53sCjA916^x! zS#BfqNHA_{VxY{*(i9tOb1W@PFc;@;VQxf#zZa)Y9^tF6K0!~fBhNmo5#=uKH8VYI zY>aSpG$$i13I{tQ+*~X~9jg;<*HwP_VKXst!Pq%k5S<*MV0j0F&UCTrK}QQc+M0Ex zjfoD=8h24LEIJlFlu4~}saY;%SUQ^MDrpuSTSMAe_rNhBPzCrjiuP2VbyvptAAO`p{xTmu6CMk6RMB2avyXPgI^2=A)?Kg_?UHMPKh|OHILG;75-948a}T_8 z!j)IFLx!)C;fWiZPtuq&>??!u?U#&u-vkBAo$I4;>m94S!!1kw)jA2(rEYm(zZAj; zX5v>DOGslP$%FIA99AUyBj?zDbr0|U@(JddZus>UZKlZQUmu50rP#JQN=Z=U3@=lG z8Y8Qd2rd@wv8bz3Q(Q{2bn`V;y5&-v+&Lvs$*)*Mx~Tw@reV$)hd5%NAnu7^2bC@Z zPRev?avP~#EA?>lSFCBy7%zp3i`Vqd0KyI0F}qLZh!yp8J;3&h!YBUjOC_ zmP^lL31FqHN*8Z2@7i5?=1UnBX}aS0j6!YII=P($?cMy$(D5=-X>z@kLwUwom-Zg| z>IKC!_Byn+)xjdfP8`K8(Z4&yj$^xsFN){L^&=wX7LhrTytUyiPCq!y*FS&5hJ72^ za%d}U%{#FB+>dBX+9)WfFMd-uz+AoXk^oo&UK!9*tG6wWU*jmAwcZ=2JU1gBeoWbRI6@;sHQ^NbU-UjMxoRpE} zXk2ti7+#`0trJI=E6FLN6i0N!OtDLLQGErCi7*|FD1UvPweG0ur$$#pTjRD*){AFQ z=gu1T|0w#sqF*mRPrWVWA8((7$D;o$Y~5Qg(@~?r$H@{Wb3<%Ry5nkRMu4Xyfxa&I zdW!ypo2~jP%0)c4g1zm~75Ue{ypX%UZDZS)FLP|i`<(vZRoL(;58rwd_Ua|7BtOw?8HI#~NH#iu8yDd1Fu-nUwH}it1>lIGr?4BwRWcbJ&qNfxSJUWB) zNhM^A6E;b-S96;P9hkw#m%k@#N>3&IApvgg)EeT4=20}Yma^6cB6=q?=*7{b56Y)- zR5{ht8X2-`64~Rbs1QCpkhWJB1QWl0dwWF-qg-+p-A-iqUuwa^TBh>U-vxm z^=TxFXI{?00umZisS*2%Zb&AwAxUY9SI=%HyiW>QW6Q}LRf?}@mm=yD@hc4@tU5+q z<3h3r6%bSwCF*FrsIQS2McU9XX8>o#V8}7UTbXr|E50S-IV*MN^8)cH4pURJSO+D; zVw35CO|~bNX|5_}g!CepF9o^U2iA%8 z`WQrsw!}-^qi*ea#09MbXS!N@mximniy06N_20Z6z9K4P)M$!sJh8DOg^+xRJ<~So~^(cyY(8MD~+k zyxH>MvCoO?pF-8FI`krqXnuYmbG}%FriX?%eqPJaHRDyV&w?4%l+3HAYmzyAUL8fs zq*C1K!s+wcXzErDrPuPo7-TtOR_uxYfFxqZ7ts5SF;uM>MBai1(q{D}U}zfI^XsX3 zbtqM@45a*}0TjR3hl1yu$bGJkoW=EIFX|<%jgGl8xt7CaNxgQnL<5jHXdO>jq&W>rwKqD2An zf)%|99-FFy{pKyGW90kO(FrwV);kNtU450f+$g$Rby0Tw#!+(n6cAgRqNI4fJhxRm zuP!lg$xx1qT9-MjfCU?0P{C<;^Bdnj`jNU-Ly4PGMA&%IhnQYM=(Icq%cCS*omN1a zI0yeR*|bZuqI~6GDqa|xZfX@FgEhK*$ zO8+zaJ6Qhbd|G=t&%a}Tx7{D<|H7UI-+u?owV+#;vo!6pHs9Zwgyj-AONg!APQr2- z;4^$~kqYRlh2;`lOPQ6J8C5tnMx*sCkDgXW@YKTp1(wVGN(ldd8kYM`&Bt@17;}rM z)HRphq&2ky!Q*tHghpcD9^SgZmO=h02EzZ+t^D`LBI7rAxmf(n|+t$W-)bwM4+&71V}n-Qt|cf9Rnqxd=@1D3x6hxf7Tjpd?azgc9IUbpnuOtU`bdXl1SF1^g9e2dgK@6e^2g5@&6r<7sQ2KJPmX~X)e9YrTmIkf8#t0PTii&ODUFT zyZ!@~%fOSm9qVvs_wst0ax4y=@cc#<7DVe@aDGVHtEA~;txN*H0F|h$tA0yg1c16$6 z6w3rxr890{6pTl0JYHh36f`&&w?4_ri#%dvF_ELh16&6C?2}65kOD07eDJQ1$4}&u z(A=+g5+yU5D4x{7($8NezATB-J|*lvw4J6Qb!3*LVdi4W(l?j!`HnA%&y8W;@>#t6 z?sB3s!bz{lz%AUJ7v5UItQY6v80bb$Wj_8YLe^oiYS8=3Ei9bfRnPSLsF^%c8ztY^!&pYXwZukhS+GnhDW zC^AO=!dL|y{dnDboILp}adBY^lsh;` zz+i=yl>shJW(t(2CWjLn?N542G&{cEDDL4qxVTv>SRNGRkG`b=?Rs=X$Fe)^ExIXd zWA+4;OZ{@GO)kC2I~eFF85RZ1rCxdW4(N&BkecOIkzN>uyJ3?WjA4wY(k$0Y@WeRN zA9FDPm%zMRiVIy59q1fyr(n5rb%d&yPs4KSbUz%jLhva|z#_>D_u>cwdnPKg%M|M} z{1h;f05PZ{UO{mQgR%ycsNjbwee#rkv}alX<^i@?2RN#iI=*p!M2Ky}Q$?E<;*5o> z4Q4^XxJ5=EG-^o_rkT#MiMld>ie=S0RB+a&y7LM$`>Y9lTthWm=Xy z8-_Y1(X$5=JxoaGuAwM32$xj1Cy*=LNWI8# z^NhmAF$A4RU)o2B`_xkp%RqB9q0V%6HKW1Bk}1(Xc>0JoJk(0*N=ws`QZ|0ZwDU2f zy{{3*an6`0xnnBYCMkI%^U6F@<63&e+9!Id0F=hTHcDDWYHe#Q+7VO~&Cj=wDCjG{ zV38ij?HqN9tV~jYAZ0$^tT232!KA*D%Vwv>}Iu!@BGJe5aUVne># zCUZa;NqzH`7qNUXAYTB<7!ylBUxnx)Dft!O+%O7vly%;c=6qdoz#u(jdhS6Zn2&$eP@}1^Yd3PB&9Nq zxvS=~``9kFinI?lzfT9V4s^5A#X;NyJC5(9|Fl7bmg&TRn^^9Mh5}eo19B@6lz7UWAUFwfZ*%hf%E?>S3czzt-#gS-?HR>L!n>|Q*q08;1 z3{}tREl53j3C}h5om5~?DP<$`L^Wh64}GawFUwQHb}99uUP6d^Dy4RkL>-kcKje!M z`Ne?*_8t9ANEuQ}^U^UqB8oY>Wx>bRfW4Jl{-ou@%o6HwPn}9QCoY>`Zr!hTR{&Ci?D2Ik)u_&i?u> z7Y~2Sqy1aC`_-phdi{0y?GTaPcC_pC1lT)@Hq6M}0MiZ{!o>D(yIXNg^c{Y;Hsh?L zIa{J!m|Ez|^hLeN8JVeMCL(5)<1sp&_|_8Q$K{bUp@g(a<)Z(T$eSm>BxOQ5aij9d znO;lM*dhvN)RQnQm+klWGvf70?7H&{zx@6i#bYY@`O#s16JwKkn^r2hsJw~Q_{*T`v+3+$$UK~e{Pzw_KW;1ckEYb%RQZ&Arj8R2Y&hAa}usrg{SE)8o zdY2cEuM_pUo_^1bqHIzlDT52?HLr!-ag`(v$x&Y-w5%M#m*+MS))+(fm_mxDR#7^m zhLTymD4f}o()kT!O)V#LN|~DG2+N&TLGBbW6_zu(OsuOQRa}FVF-4?`^3Ix6LEf}# z3Z~UiIJFwRC^I6PlW@%S5^Zy_=zBO*JEuu$yvO!WW7fv!G0JqruPK%>AI&0mXqMVf z^UK39%XXx2dL?fi{t%;7D}tJ$81?ozs^;|~W?%yOQ;Kma@?z45Gl?0Hf@!i1ukCwV zltT%13;JM@YNx>Y%AKpxxIfE~H^wpI-N{4^O{a2kAElFSSL(;ub#q7>Q-Xe)J;`HB zu`BZz{hlzwhi1|(RkSr>J<#}d5&eyhbW3-{w8)dTF{00$ndDf7Uz#1o?uH?`b7-x2%Xp;-3vR{%VEN}+=3 z3Dd;!zdDS#i3JoaYQRsNYo`=*8rFoi^(Qf60D{puj4uO2%!kGN@tcn^$c$l9rR z*F;b=y;+RBuM?UPqFz#VGI*9fhj$QPnn2y8KBBFx=F1aXI4qu`LzWI_ff)aMc<3`` zd^C^s7q;-`uOIXE-QBdjIhNSTg+xxuCux2)Ayab|ERS7KL2zpUsY@I29hFIk3>!*b z9H0Vxwuv_-dQuT_vnu}*mTNW3rTy=EmP^nr;j^5V`6YmU8h&e`^xv7x`**NhyH2}a zo9EBR_|NR=eQVR6-oF-r|D8Pzy|roDWi1q!rUm6%)23_l{*_5suE4f1?KWCi9yX_t z;CY1v&Mm@wX0Gx;moQu_!}9+5@BV)Q%U#B#;XGQ5H6~`OWeJw0r?~{?a@lKAuJR_A zKwM6xH@WmGR}w3;o_L=BS%O8*OOxqOL+rn@KSOb?NjNU;>2=z9EewBp`RRQ=yX+UOB5Y%Oxm3e)5Qd zWPoJh~%(Tm1evVw+7{ zVe@xl`Z-8=v+-;AT%>=v8{XL|mc{;+e!1BGzSIW)or9B?b1b%+ec@Sf;x*|=H3IY z+`q{&Zt#;Bm|v5~{fIbk(dp-qDBCl?3OoGI?c7mOPDh^1pAz{`if!doE}s=;v`-xO z0g>nSV{xo^`0?y-qA}VJySMXPdfXqd{M@m_9G9NuM=lAwz_DW|6f8e+?6`vE(yLs` zu$(@1jK{y2?exeOF4J=JBPQ0Yakh2zq6y6GuMD}S?{obRqj`yP5v zV0q_faSm|DE5s8QFB^K*7tpV78728Kj2TkH%<)aUzq*yr-k!miYiIMtyR+D^b`D>E zG@ozQE#RvUXLDf38ovBsE<;)}=+`@izD;Qi8eBk2OCEg&6p7!^(7~oNhW_T5M>;5P z9@}g`CCB1Y9gU0B(H)RQ(4ZW=n^W=cn=U%*q9f8T6Nj=ed}?J-&~RL;A_(Y{Lj15o zG0>``cw8;-Z2yoZac{iv#uD{)NPTl9B~^KtIU4iEN2@t->K6u%?8D1zmht_bP0V{? zCMg9;bTR47^0!tnZE-6WuGS>wr{Wdri(fz*$$n>AXt=xsfqeDyQ^L&B{hO`qmk zdNoTn7A< zK|ZBPFfIYP{4Cwc(H0kHJ7qEmshzC_o}P{j8PZoA=RIc3n24TUd%V0HR8Ue|TVvc^ zEr|~IVa$kr_D*8GVK zOJ^%_e^~0PAfHmJTuQKXv(Q(typ4V*y4oAl#mN-ASU)UceH1J=iuFP_$_3pxcMQ{g zF%flE%CP7rJENECqNG@ivON?mm!9SBl`;6$CMg*f3CkU`L-DIfQo%l*3c~QKO2of9 z3EOmk95Mp%ER3XEpcVc_F}P<06I>EcdUFw0;m$;qCgPDCfOUu?79Q4ExL9B*A&jRr zE`DZs23isn;znppDE1-YgeIq;qtW2sPQ%i)5So3gcz?q?bd2_(V``unJQ@;Qmq=8v zBtHIS3m+Zaj+r>eU~!B?^Fx@L;l;#4KgN}ZGpam^;l*)cIf5DD7+X`rm|d8~yaCNj z7~IUr(fvfdDPrEhLMD_2F(lWWA^Cpv%L=7uRtWheVHB4H(VXqV&@?wjr$^ILoJ*>> zHxmX_6C(zvB}qOs$Gb8l$&02We;QK)=$+zCU79N;=~kqtSrC)#L_mrMkv*faNOK}> zWGUXg;xQ2WbS{V?B)0_5lx*w^V(A)ThD($Q17`Kcdw>`ORi-m8K9EIOQPec$5;q{9 z*#3FMOE1Skg=#rzNHH0sDyf{+Lgwfy0>!n9>YJ@39TEqNfvm`rCDNlB((x&dz^^ol zw1Gv$G-i<4R}3J^qDdbl1`6ddcoj--#$YvX5$~d23QDO6lW<2BpwThh8>;{pOug-} z4R*sWOtj+>?&!E1DUEQszs`ZC3Pgo8r>XiBG(b#iBk^vGQy%25Vu0`27>j#-v;yUB zbs|qoDj_Xt#1GHMGQ$n`l3*3s^WC35=IuQnu>Ry`x`vBqgw)OT??F2+U3!F?VIE^E z+G0DbW1X-O_N+rE3`L#l?rVz1>>0ZGnqZUQhQ^{TUA#q_We2+XSzsFBM0;0#+BkN@ zDb=42ZU(e-5pAKD32kNYOHUa<(^$>x`kK?p!$^5{OD|&?a8qO1mLW^V@z&0D{CM*> zr9~}+Uv}{@R1z@KW4wESg~}^6tmR83=`}7r#$~X~HjZ7Dcd>qu)SEZrSts!v4YpQZ z7o@?wnD;@ci-nn>Z1mThBLqK}4^4>mrSfL^qF=e_^+jC#{UYnOeZtx;AJ9WwGgnc64P-#b1P>+uA|+;|hqLsE zmL|U*3G0=jOiIEyBzxnY6@;s}@2z57l*#R-2kA$`FdYHTBgd-(dq%@1hQI7=C7S+uj zLOU4%HpWT8e+99fx+rgO=>aai%O%v->Xz5f8BBO>ssiBJAfFO)OHcEmD<&%sa#=po zt6aiy={+v@qy5T8ZYQ2R;_)3u@eWeO!O1li}rNm=kF>hv$3OF(C^k3-HsakT&%cqLiBMTUWcnExO#Xm zb4K^aQ#@--#QFdSL*o4G@wOIyhfW%Fp4HG?kqB3Q6aC`d-2Cbj9{#wM!M*cvcI<+i zaeF?TKMl@{amwy(4C`Nwy{Ka*rkzMm31iQ`E$sgGQ@&j~lLybwW52sQ4_sV9JVSr6 z>A{DIE_^txhTg+7NSTmN{QO>cOvol?W~q|Jh#r$i%qUU!n_~Ik%4RZKt3}(AOyuxv z!iJ<1Ga?t80#AP6SKd1C5rdbHqGicos;AVl_x^rz#+TFo)v+XuC?K+b8Y!cS$(>Na z#w$B{`{2h6T{VH#d)G2z)kGrd}$x^T?X9m$_8%KW8~bP6|Q%=D z(t!@*nG)P5RrHITsa-alVQXj5=aumcdTT19KAcCrIQCvIj!@I4*T>TM`e+(n9YxK{ zL#bXqn6hOplswm$!o^MG&aEeRe!bENPoG&$=FA$>MERtOa+1^dNri-sOherKU~K}rV2wOcL=)JN6me~`=T(w8y^z?}LQ>~e zGx(F4xHU$JHm;p$40OGG%p*<>xVw#(`#F)Sk|A=F*$@y68(#LRrpQH#%Hp)x8_N&-CWY1?~TvM z3_4}mQTTj6YF-+KCf1nPDH5z!5;5}$v{e!;b4!(GdBp5u72H$Wzk=mjc>Q-KfwP=y z;rXAp(L(OOv!`M9)7!{&?K-W=b=u>4`uF~sJ-ywZk5R6B8jSyyJq^6IY1(D&Iysg0 zKLO>^q&*G9wewGdbFKXyFxSekXkoeZE|=>AMLR9! zSEOcn@VsiG7St0vw@!JMM-0hj&*NkN4VIs|eC7{We(c2IKlIA~1Izzo|F@Xth74GF z^&*@+$fDF3IDJNWS)YCQfa6H*>%&}ldpY}K68R}IiSuv1$-RrGxp3(`=f!r9xzFQ= zSGjTFFt?8HgG-{*dhAE8ESSOjLH_It2OAdrtCmNIJiIN3$h9Q-S46zaQY?-MyUXRm?tpJI;ILamcTbFQbxJn-amQ zSa-h63}R=fFF!^EvMDi?)nP8Y7U{vKQGx9B3ucGAKko+l!QM@9?~wS-{qWOPzArCe zLx3CW{5{38=-?kYE!O?6BwKEtxr`KMe|Yx}7jNC<d)zs!#F)*I+vHNfirjD@*R$! zImU$(5|-~^NwTO9`?o4se&+aLP8>h0VEKuo7dU?Wq-fMc<96&gCypHD!kN=tJ}-kZ zoKRZz5|(@Wdi*z79vm62V0n98y+2@id!26BIlC)ea;+ST^e}JJLFW&Ba_L2`H3`bK zp5-#Xlx{J$ut7&pUwIfyXx^o}0eVJau-~bZ@;;W}TuOFGST1$TB`i0!w#3T8P62f( z<6&lFqa-~fIG4a&rfc=cpEe21pEl`P-a)5}g0}J{z#p)@YezI4pHYz5Khh5)3tc?D ztcVD8p&&Die!a5jU6DZR$O;xr>BTFH2JzAANo@LPKHq)zoUlb~`E()M)-U6OHzqT% zcQU=}VyW#JOYg=M>grPH)jJEXNGIY-;_*rK$2{B~Gcf>`-sP@k5x7)EDLEEbG05_2 zOj734n2b+D5^j}I*cJrhRTHBuv~N1eqe@90Q6dIBrR0ji`-eY#NK)%u_Je!`xeAMwNX_e9z{-hXEi z8@_y<58qqPD=*Du(fsjDnlO+dgKFvDuO|aqYUtm;mH`7A7&5dUBS#Hl;Gn)#R2Gwv z7(-C7AH}6b^zPHhq$v|cC*U~AsY%MKT*7ioYl}ZT$Yn53Cl^N**i4$Us}uJ2wm3T2 z;Ory;xxJdYigWjHcTyhZ5|~?97!VNP!HpXiShwyS+PBvzeOEU(v7LiCL4M98!~_x^ zEbdiLJ3<59#5rza%ES?vnCRjou9avf^}rB^Otxs+d# zQY_NLT%+@h(lXcRwxOe)Aw7KUut^NSHZ26ba2KUn-Ywn(qYOVxbNp41&#p;MN`}QS z%M-JFALUi-TODi7lzF->jAQySL+;{LM|Q&TTX1B|!!g4b zFR445AI@&B+9c_9>*Vm=}Y5|HgQNno@`!oQEt z%SCFE`!^*LHXuW3k4q^9=^+|6Bul~a;DPCQ)x{7f@`UtBCbS`uNO4|Ot&Oz4Ge>Fp zb_+4Wt;nBfaV|0-UbtwVy>k6=7iAt)96^96p4L)7 zTxxtvSibfAUIr~3t@L@Nx4un`s{+UpaN8$|@)7rs)W~*7^A-E`!!A)=|0pLlFM+rW zoGIree3tp8Ngyq!mSR6r_gv~*%Y8~s^!ImtN>?`nQD1#&XVH;PRyvHDGm74$d((Gp zGgFsLp?+8$tAs?F-s{IOYvOOf_wRe zh=j!*ybTpRmQx9TpLOr9BxTyVbw^{{Ny*44Sr&`7>MI2Ea0fa$>5HmqXBrqz^=tzq@HcUk$(>%6mP9kbUi zV(}+0a-M69UNMPCaZNS09q1v-w`^ixyb5Dz>uyAFRVqpSN|fA+gyIsA%d|GG1`4KE zOm3lTfHfNH&crt5(tG|0+KBc;!t27ZwMutfE=!N`mL+4*HPsgwsMO4Iz(>U@43-RW<`3S%kq+*>e8!x$nr^QUgqf@VT(nYmokGG zM~WvkD$jNKLd7LDfC;N+i#i;qf_aZ#-l|^ENR9kLaX;118LD1J6iw(uLZ3pa#C47? zNu=+%7QWs44F^vD#E-{zv+bA7Y~R0y1E=<|;`K#*wds9kO&^Y>VMlg+E1su6e4}Dz zbQI4eQ~eI;w$-p;@(6C6_?h#+e9xtWJ9vCneiix~2fqD~d1IQX%Z*`l?_$<0oy@%p zyF@?vXYTCyj8kvFEc)R)d2ML3g6JBtF9%!EZ_tQ+w)7VL@~ey+-;bocFcvKwCkEqt zc*J$CT{+76eVgI<0dDr|!yy}69+;VclO=mSO!&GwnjsC*WDUp5MZT zv)|G_M4!OEiOM6oWOf5-V~TOF4B^cK>)6Y0_=|Q)!tybzCo3tD*7xS{{MRe_?C^Sy za+1vZP(phr5!jeO_T*|ZCR7kRG?(4K|3v)@}l zKyfJ3-cX^MJTiGGXb?41r7_fAd3P@TtwKtp2?NDCsV_uy` zbaNU>Bl3tGlp@;xL|*&leRbSYUSs$xQ`mTRCmBOZX<0U!-H(11ZG8c~7Pk;PEJJNm zzhVG$zgtGgzyzX4q?0+lq|GQJerloeR+a%Rxt6DAjlv|^H`mXJK9MC`AGkip65rCQM;#!y^`0E*|1{lTr-_xO-UJF zOyrOZbmGiN8kJAQ{3i0JSCKF>n_kcL!LL3{1^HaDXEj};y3=pvK&E~&gQ!6X41Z@5 zF+4vv!-3Rxp>xhqjQW6n!p}t zLiN!^8qhA-R=elBB?uTQQ zKRGihC|X>PCcFzFqtfX4+F;TbRFf(!Xj~Q%Qwk_u*&nAq;dD&1pm1>`MT%@0i?P zYjRnFaw*aBbh@;^`u%^${%*TJ1MENB)6n~`VELby|D0bt|5qlj$G-~j8M?3x|G9-v z@`*M;%CN{dGg7ns)0?~guZQIlCQHw2sa-Dh%B9I=xlVeQOUae=ms%)TGn}-Q{Zx?8 zzmi+|bD9>KKMk<|9g~n-Ykvmea;o(@*8+3xRGa6|`_Z1G)GAk?d|L67{Ie?Ym3ik? zKLO@5Wl-R1BE<7e!t%YpA7{$zbN|+}Tno$pBg66^`@h9BcW(UymY+Vz+>97R%>*f{ z^7{jhA=W)S$Aedwam3DtgO*<0UA{`?zkly0H@MGfE^_JCQMhs%jva%AD>&d2%{K;? z?DzL$dt3k;(*1cS*_GEKtobO^fjtpEob>l+n_nnw{fS3sFLB|9*#7rR+qTwD>xMr1S>>``n#`T=SOhpQ`jqP&o{9ARe1G1k-ir;ZG>;X zgdcXo`(N{0abG^nD1#q==EA98xOML=+_@>1f8=^uK8HdAc_%Vn?B_62Qs%^-Bhrym zbj}|rshF$x?{VbO0}emB!<7e@;MO5g#@}&xND7F1rHQnLs$gV&a zehl?wUzn#_|FyRVUxlTxuYL^ta#>va+gv<;jBAH~5$C>(<*DMFe%Z?HBR?oue*DB) zP9D9?@uQbG_77MtqZA+e?XU{)DPj4A^QZZp2jt{t{NY)ybjt(${ufv-?Fr~MK+~=h z?K@3_T$-HMO1DTzDz`DQv=!T!DftzpSKi$~0dNV)B`i0xu)xC3 zMjb;yScsBgk+58*ncLc`yr$OH%ASCAD`gUvOCT%l?|^wnDgU9Pt31n})#=JJI-Swz zbVAdmgP69((8dHuZwCxaI%96pg#d30>MPS2P@BWxx=bbyEn&{MN?u(wkk8+2Wzz@q z_~NZ;eEP;@K7V@}Ygdiq z%ClVFAJQZ!?^RdBxCvwV_3$CwJ>6*6p{?>7_Z0W1l3KC05a(ovtGkN=sU~6TFos~ZE z5q<=EIWTGTKyiPI_W0gqR==`L$=CS$yWlC>3im)aIvGpNay{CKdMshN##r35rlRhf zb)&7Jj*?uFp5;dNW*FL;(%DQ8Gk06%^_$sPreJwjKU)l=Jm?xC25s@4=tR3CW+A3+bX>{b>-cylgMee-b2 z3stb(EiVimUo%3>67kKAAh;lg)Vf^dO&*XQidCRJcK)LLyo5R1Di3`dOCxM;baAxn zhO;Oe8w+zR-TdfoVnvK7)6k9@UdoJSc&HoS?An0FK_9E+K=gxbaEx;h_h1y21M9_e z^R5`^RbbOI1uxOD59%9^TfZ=DdxhXylR`*S0ig}4c$5UN4D@2XFpc)1 zbC5OdQY`40VuWR!DKW)iB$SGM6(?fWoQ_$ac)W^yi7fKQQw)S%DuM_dAv)bt`;*=* z2AbmjwkWX2uuxd08}?cLgk=R1lNCU4o;Mzaf!LR(;!v5TBvXvStZ))}Jj$X75N(8R zxC61JrMSmNp>gg^P+cJL{R4Q$M}t$Z7}9#CGt|$Hc_~4Z_f8{pK&k@H(ZjNzXnZ%t zDIM?dLFt%gyW`yuO>n0^}qw8lvT)$irhZNu{2j+be6&w!`$0=dIoXT^E8IdnK^Vv$8MZ$95#&~?| zWAW-4iIez!sXOeH?Tu5q2X5Iu7(|$T%Bc*v>0cV7@=4u&pQ1&;++Mf)VX_Mrs z0^EjICQ>%0ju~$+QZg~JyrfJ_LPM6CmzF!YoT3pul@$)Jrea(J^{xF`x^5-;{Y70# z_9dz~j-1APs)y7lc@+uBlSG|OD^De>I#W$cnoEc)PM~~1B^e@5&w!iIj!#^GNcufAp&^4tXMWdPbB@tpRvq;}E(OhcS-6W7T&%!!!VY>LJ- z@~oRN2~EYKOr9Z5v?&ck8W}up0Bhb~#rf+ec&I{r-{ji;GooL3RXiu9T_z#igH4~l zO-@!EPEHnBS?FPF-VGly?_i`O`s`Qv_4_Zl@#`+G?BB}GgWvP$gm~tj`-R76e&WID zeLOt7n^Su~VEemsc)a~%F_sX0_AOtNV`YrKt_Jrod#uI%?<4xkW}P(LJbREgK6;Tc z^9Ix0uaLbzZs6q2gKXaSB|El#A;v(ziSfYq?2ZWJig6Dx(c_kNcXox?F;(=T$_6~~ z{EiX>{S1M z^p%N}O|E6ks!6>1-5UG~gB1urBd*Wa=XMcL5i9Pm1_iloQ@!}$;8!ZWVeVk{1<>FZ zC-C8+jiSAABe{QpcqU|#I5LmCnUw@J$0`thRP=}De)$4JU!KJ3Js;wdAE*L<{v@7? zN#Z!d`y~_HH%>w8zN<&DXzwdz&M7BpMiEIfiwU2YN%H)1qGyOUa&i`7Q?iMgF3NgV zk+K+(E(2Lgi*1!bEenWlEmWrFWuVI`BLCC^5~dYVv9g8K>7~j;J%2$ja^_Z3Ft3Kt zAxR8=XClT~PI%OY6E`v!t3prutQ@X%%acauDwv)>t(?-?B7fgl0vaP&wtWT0Ddx(< zy!Y}JLi)v1Fsp{-F?n=}HRhF{-ywZmArXBOlsrpuYc(a)dx}1{tCE&^^}t#*{+*cd z%~Gf}n2MZJn2TTJZ80-{Fbsh7ejlPZWGE$ZdSe9|UWk}$4> z$e}qTjx8c$U@|6|wv;TWBXM#8n$S+F9Mcx|R5B&GEBcbNyqWOH`AXy5rX~ozOnarR zo;0x#jh}|F@u?K7Y$j<*t&%D79F;}J{3bF)U5o3NN6FA?+L(5rc0?o2QEvEVg{Zc@ zV02G<&mMq#jxULQGnL+cRNoXz=QI*NG=um_#mE=|QLUwf&yrBCn1DIO1TCr{V37>o zSVY>gCOn6w(lyVC+{H~ayfzw5r0CO5EBi}W9x|s$X_iOK_=o*(!g2}7CES)^TP_EP zI_WR!W{8CGBJF7){&)5?)RrdGw6Of|yvP5%&EMJ6+iTOb%W~bH0rsEmU%_&%wz+nl z*0kx`ynki#di<*ZpITTRI$uhLlqne&sad}E>}Ea}ZDj29iob>B5|00$hUF5BOK)-s z%jHxqOHXXMPQr5OSuO#2>~nQuU4@chk#a23q(sZpko^A*ESKO~3%#|bm0;0AaRt4n zi}L>mEPp!Kr=0#3ESILzW{LTKz;fwX{xmH2llv9>@@_50cZ#Tot(8QLD^)TqKXOvR za;;{$gymYz^1qT{`A>k)|JeU&`!862>LBx^?8f;sqAz=eQ;!~T=J8#z?hw4Tn42E{ zT(b9vWv{`>vs}A$o=cCebK>5~C&1|7E*L+av+fa`HTB_aPzuKiisAj2;po?JZ#P`q z3P-+yZJ)yYnH;R@35SmH_{KHP+&m#V$S1hDYBpc^*mE;F3I;aAS8u`(>tNH{@XbfC zeLJlGird>aDM)qc+J5ee>5AvusSPU~RfM)*~0Ve(N%~ zdBDT-XT^CPgD*bfr^IO94UFQA+$y*z%Iu1;-^BK(#P9qj@?8`Igv(<2x+p7oo~Oj` z9{h+)jY<6I;Q)*0!-*e+{Rlhv!@HuqemO3F|GYRwaST%H{q_+!zMa#tAzbxz=UPDu zcUpRKXHWyT2leL8z$Yf>)v`#Jc7Ir3ZVhbYR!c2+2RCwiY2rqGE|&_^_}(Xy zBUQu2xrlmj`7sxd9_Q+QaU8q0@j{w}<==Dr@LtZIILh%8XE=H6JSUEx;mC=T969*} zmj8C(Ajc2?ro79w0Y0;`)0Bs=U$F0ggXK0ZZvPFIOHeKWxP;?c2rl8LOz+S|Pt89K z$F;!x$+9p*6Rho>l!v#JTamC_dYDVia_Lsr_?NuPKd$G+8lFhnJxyx zwzkTnT;`LqD^h+%8#GcY!J?I6(MqsL=@n^hJ9YU(FZ-F!?a;J);?bn!QMzgH4ss$T zBb>C1V2Z^6x<(8}Ck(4(Xj3-xCf2cH{s3N_-OQ`c4dVS*#`Dpu<9Tn@7&g2&lYN_C zV$ZiP^X=!)F|W0jIj!|fn^?ol)&{1x_Gb3HK}?)Am_ZZ!V&-9l#z2Eruq}E%Cd!l2 zEYTI4EK&Y7@dWot$Gs{VoBRMAibL?Mk{;!8NWF3ipyEb|&h*fHrJb2Fw1|{GxxDb< zau%&;AeL2+Qhr>y&|r) z6K{y=f@QPC@lBwlt^^AgD}v*~Fmte=yP2UXD=CHZv}>!DD7{ll`n&OcI>DjI>w7JqZ|0{yLZ_5)hq1U{x+L8i82)f$}L~N z%+}4T`DxEb3XK1_TY8g!#P;vrM#A#VU$0hPiFztxG-ZNO5>EP{YMO=(Ox!Lhllx5MgXA$-F-k`ZPCC)2ouI zstRgqds5d>%i<-A6fAdfb5?;py?i{Cce(T^f7+x3i=BfEZ04YVxr3$=;0M0C&udbqNb{7w7jr zix*C1@9uAyJ9`2;IvPBE9C7h-z&q57E~eekwGsEF#S_nRjiIRT`t8wlZ=-Z6HKM$` zS%_;8?oD)R43VjkWR>T#`1R+NhH_rN3Us~2HIHz{EjNnDKKW>Tjp-C)uOwIuGd$^@ z=7xTTJ0`ham>2kBp6`QgX%Nn3;i4WVpdah_2P}6f2&YSg9nK};MD)ucwtv1z3&l3W z7q^^Xy84(AUY>-1P6WX@k)%{-VjW;lU~({a0S>r_df@8ijDLVP0sg+YyE$TKXN0}2 z0Zz8&*xT7);p9S4SUC2&od_1?u{1B9IuA>}`*xiQFlpdxj#Y#W;ROMNWcZNZAO=g> zG0fkzmY_jJ__ibvG%^YAktw(hP9bV+PfF$w7X$Eq3TSvWMxmExhpF`RPWHhjIRK*s z7p!W7@Ew|fgBZ-`G-oK#7u}GH`|x}`N9K{(Kb@kH+2o4OcG!>v!o}b?X>1i41M`S! zh$VDr91){Zame>3I6sWM;#exHQz`G0Nr5=7l;QQHj%c82OfP&zxu-Oz6VNk~kUoi| z4lBkZIfSx-HKetq(aHZA>@)O88ybzq@fj)_vY3?@&CL8LGAklgU`y#$9yd%}gQ3|3 z^-EM1HB^H0Sb|%UaH$T#r!Go)oo7$1QXbx3)zMgH`QYD>OuYC_+u~qCMEm34oPtMP zEdG5{ajK3`7SuljKanoig%8eA>#cMAY3FQ2^~e?+Bm6|Y)W<%+4I^hu9D>}i7HzKt z=BZ727>C;u)s#uF7?8_j@UD-=wK^Qnnn5E5kI4=3Y7)01Am~I~Jh`nfQOhRmwl#7&A zktQWpeDlLGjdj94%TH}<9POa?XCkIXk#-o0eOM)ma!7JlUmO`l*<&cuW$-=YI431_ zqay=)I_qQPZ%szuVl);VF%GuFAix^4Fh?vSU6glzXE#IfTrpSL@}@yHBEKbueij&c zn_(GXgG0D8cA<`RbI_-=wJzSVzI3p7qhEQ;;bdchTmDTVa>& zhfa_g8vBmuN$q?uLp0`X>Ef!7RhR=E?7Pz5PDi~=)|j?I*TVo~QI;KCb@8bXbwFIR zcEJX?RfMX5j8ekFp(H>}?L-?C(VU83brhbZA;gLMB%(F}U4H{&>r+W@DZ(Jko{nC| zRJZmgyfz(;jSjKB^T`?BO9lMY4YW}(-6cCrN$w;MET?EvGwuCM=^AWJOmhxZGg`zk zYZSmYqJN1$zp)j7BLDjTO z=)>6ALz(m96#5OXX7Gq!7@M}`lTTN(aM4tZjdk$%bs%3nm(29qVy)i}Zk*)go=qIw z{1FE>y~n|?-{IG9)^d3B`^pY&dY40AzsZ3wR&svR8(jHVj7v6t4EuJ{5a@-IWf$B; zJ#`7P#?ndj;Y8bgTZ~nPOz(?dx;v>wVZ`SL;gjbp?nMW>+UsK4qYa-=8OCegj@rz+VJop|{*UiK+&sD+HFK>KL)bK3&tQtw{S4$Z5`gp1r^<~N@ z^F_Op$*xBScy9B{gfztAE83|^@6Tr5m(MG2bKkNM_T2l0{TwDk^xfvKmzw35nf=u= zQGfkNn^;En`Ly2r z`1>&xsPlUGTFe8r$uW7&9pCo|VC;qxn-l_$1eQ#4aH%xBbRGl-j%L*#@^q9^AN zG$w_V1r-X62TsaR7CKF=pIM*)dgQcR!lz^tIXRn%sUrV`bb_a35k6Hs2Ss|wge+x| zlXI0ci0|-3N|ra1y`V-(xx|hU*K1rZY2)(=X^vAbCSnFd{NpI zub}rII_cA^@M{dmzjp*L|G0){d^?EiH=Xex&Y*C5HTlyjNg0uYU7iP{)=VaIbP*kc zy0b*|;d927GWzYQ=qFl}GB%$3TD@s8 zq(HTV&IxlXNtj(h)vH7B92h6^=u)_}k<8hZXu>)WCaz)9!WyFHR1rJ7hQeioh#6U; zUdF4hn*tpuYAmLmQF|=?Y{?Y;q;W4!W$cR+`TqP)zB{*z_xFFs*tcegeo-FzbLvT) zUP0)j0%GP?DNyb)HJiYBrGzc3!EbRn-m?oy7su!|G?i|7&g3raP5tX*p1|_y;#zBA z`J5+USILBkdK5A}pU_ru{io&qOIZFic>XKX2KkI$Sf%nyQ0_Y=N2SZOr=j>?*sMxi;z+=!kz}^a$cLR z&HGm-VYvj(5@KuRTeOSd?e^j0!@e%*a!)T!Lu7 z8AX2p@~7?3u={B+{#W+r{C_qr6#qMu@+%UGOW75zX#umGcORdnOBd>Wnjx+S(+3F7i2Kc zOI*DT*YDhin+N%QO)F0?R*uvk$p{{=YC1p z-h=Ebs^OD_a`;|sd;bPE?n~(yVJDA>{U3*QZ?QH$l`AtAh_n-I966k$#Wh?=F5_fE z9hVClIF%p6(ULIsSEO;cB#~R$-dy(6=du_?Uhwzkhl~tYdCndc z^J4k(4KWpEc=}r&wKlNF$B(lmec-rAzxq&liC_IqdX{fxNqQpuvYUIq9Z<0R*ootu zIwk{o9#&rEa{2JDq9c9esM0K#K|W8O5M{zcii-1abhaZfEP#Mef29@f9q5mRgA<*5 z7|=o206k+%x*41COeY<5jZDzA??^|z9%wpr!ob2x(pHgehj39 zhY3a|#^`kIjJ2%|?K*X&O~;N(Mny`Z$b8+zdKswG#>oM9UvK<^{qYO%#?8Z7dFz^r zby}}-ZBWo|hK35X%l$v?N&Yl6m+9(QJ9nY2nAdb}qd<9SO&V8j9pK`X-CVr5jXO8@ ziOcaV4{u9NdvOgP9~4!81J}-e&83s;xp?GDE+5;#_i_OA{7~LrF^UgYPh!hw&#Cmw zCpWVBizUnvo!zFyEC(q4mX7unp`nP1$I%|*`fCfdoQQ4GF-M~spnu=%~-$cvI zA&hu_B2(U&N9vGLtTTPF%?rSzI!1YEdiPEwb!rWfqGKO6BA@Ufxk|S@VQ{|kethwx z75wn)c8(X5pD;qIDH!>7uF3a2C53OJ0 z(%W3hvnZLCZo23i8>yESQmQg_-gamw-GcFI!1l$pD|G<|e9qnt8HMVvZ z`1yO{?rw{rQAaE+b@*ca8@%=QGCFsC0?UJ=1F&$iQXb=-OuM1!_N;>AX8ty0HRcgn z7)@$bI;DMz89Heo>$j}q^9}D&T%N(CX(QOYYrP5-om-cKri+HKk{DKOe1pa7U%?{F zpRNhc%JkFRl?01ks*{4{CSu@en(KjGSunnJ@px29eQhr+Qao|W3BfTp1gi{hCCw33 zmrQiuY~1pK6(Dra3{YS%q9hLQ6o2AHn=8FtZM|*q2yw$N%13$2`-R9CXyMAFOp}xd zGP5lPy;EmV}4+67FV)Q%4O`OEVag8_Un1t-;JdgRS%?jxi>v(1VzYARMDD zNUV)z`&H4AZ%M|tS0Mh)VfeL#<0+%#lQ5YZHeakM3&m9a{m!z(=yyD$gr zq8#ze^C7Y^7N-nHvIb=l-#dxap}9m4%OFM!4ioysl07(?xV}+hV4g|R&~&lC7!rhK z_fNtkSQlfTPB{AXpnG=>UD|7Kaq3FX=1dwV^dwvyV?s+BZYg&7XFCy6>P2L)AfkGQ z5#2k2_=YGF>!V1h4EGy9S4YfSI_5EaZ%>WCMNt;RXukKFNP zxK{-d*e8nEVJSooO2WC!7x(f&(nb`JIZOcR=_8;^f&xcc-yKn&odZf~%-X5nK0!98OLt%$-S zMLcWbJkS_CgMEl2Z7nY~iY)-~s98Z7%AVJ^0IA_oD zUQV{;;(AKpAJLLdct3Hh&GI-? ziR_<&d!?vtyMYc36p_)9U{E23310h+zT^5 z2Mj%}G4Zj%J2@EV7*9-nEbxf;CNMn+3r{l~gX}SIHbBR+E0*52xX1Wn;9`MuxH$JH zf1JWZn;hh(USK$fy5kn+iEF3_P9ZK>1~@25BII1Odezuzlq80Ka{>{=vIy+|0Tzku_9LZ9xVDwG(ZSlwh&V z45F>b>spmS!;9mUM!CkLI|%~{={0vSZNxsig;`TJwT}vjD>cRaD&uIFI|PdaH|1e2 zJN(0|6(OYSe4}W0_ zexl8mvMPo_wv2jl8a;fiF%J{hLzsI~AjW>S774#yNX{0oA~7JZflYv+k= zEm*UD6`yZ_;^|n;AKUpHX2qgnat6Bo49&x7Z(n0<$!qZ9{A>6PHz8%;Nmkiqw7;LMY7beXf%!LO> zF$)pplO>*yDNaPzi?&3x0oI~zlF}DeK1SF*t6{XY9(!DExM63+ecLWvckIkTAAMdI zZDsKQabHeMB}UY>*fAA^PbpFo6jJZ{onJqt`niE*i9VWq!6Nm%V@9MCJUkwk5s|nI z3nOq~Bq0N$322GJSG3)3^`Qg}Ok~tYGg))|Gu}J1k(pmTPx9zOCH*AtSt(-`J0xGp zM@{~G8Phkugl}(ge-Fq~?UB^SmH{SZ8{}H*OR#u0EZ(}3Bb?^|C;0TjCj1+utVg!W z6F)eex`oY@O|KzL+&6)ZaiZ-CRq`)ovm5#T!O!ZYY0>mryn2SSV)tA0THIf>C&|=4 zH-KrMEh1xFDT7`c&#OPb$C_V1Wbw9_uqkw9@|Sao9GZk{r(gs!4f$jnTemwX4dAV1P+KJW?VM06LN`~kVDj@T;<&yH6@SGiP?lt&QM#mE}F++iL|1rtL&MYKK>_>T=i~RC;BE+-t zg{?2MV$%u+E*{LtRpW8X_g9|HZrNVSLqC6Xsru^6G}T@O50zgL6fW#d-n?4O3tWjE zk;R+8eI)MVE=p>pMp)I%1`5ZQQ#h^yjkSgWOGi*YyB{e7a~b~f1PUisQNO4^o|VBQ zkIZM%$Fq6Hzbo@LEoZRk?^|VxduM1Kg{^h83F<-p(jk=0?#;8o`oxO%u5rak75r1q zS1lQ+>RHMBW-_N%QM{lx6-!#^wR|w8i<+r_X&C8~D<~1^)k_CZ^TI%SJ}+$90LsL5 zPn}ry#3qzdJgpb~Rt%?NZWH#!zDhc6=)2QJo7A2}v5)M9jpRJnq~ulN=2j9jUjp1h z?1o07Ni$G#ED2-tXcuQf; zFCrI6`HjDZ$#R|CMo#~nPkSudFKf6YGmcM)ETLsI*CW~t|y%-6~rOCRY1=Vu@e+J(Q zn2U62+CZTH%%0xUl zHU9K=Pp^|E)3mzh+H`H2@`Rrz(pyFPbdg_Jkho`Mnu6qF8|h&lI$PWuG9Y$qwfcH< zKPQ>`##{zW8p7qfS2%g$B*#uakzhG;^pFDOQmx>>?3D5@S0=s7|6!*@zSGk4{LB;h zEtj88J1b>e{)znumjB28UDI5Aa2Kv!hQo(>Au$dv9)~LzxP1fe-F%=tuOGiPi4)$Y z9C31h7e9g1@Zjt)6+Zx49yQ#f^vTbJ%~=hj_r-MPv2d)K)9 z;2LKi-4&fyQ3>x{7x2Ll=+KK%>!SMXM;gr~ zxgqTGa_7!VAByzHJic~cl<{ruDZ8o4`;I7^M>ntV@YWS>+`O%B`rmI|%?D=z63 z(I9a3dv46B702h!#o~HVCfCKOJ>i8jH z2RMHG2`oQ)_y{MD9#ak4$)iU&byAegKVZ4^ELWgB#81I;>Dg`R=&XQu`>y&5ly@;O zR$yF0aS77fcF|SPT+^nl0^}XKb^l*XZZE;P^ct7J5ZkqXMg>1~_HaR`oAf@`qpP7Y z4jx|UTbN^FYlFS3>l5Ad&>#YWeDUyfQF0x|=4Q%^TzZvjVYvk5aw_-#XHfoUSl-^i zkhUVNUH1;?7(7FtmVB;W`$3e)1}>cZoYSIH&8;8!Y3pmOdt(Zhj(x%TW1sT#&Q;tL zgP6zHcW~?MX1@Jo5zA&b@#gZ8N~ipnoohJq)BBt~{JHWhpF6FFX<~pfc4&?Q=hG&Z zGhur3V5 zMhpi0TG9v+4=&%qnFI~XB}AC?+?239YfuTVe7Tx0wtm7-2eylPv4<1KeqzUtO;l7D zFm3KcK3Tt(k3Lw<{=Hi`dT{e>$e&2DNRyykt7YCsr!$@PMfvOKDB$ky z(@E3?=!Y< zev92=`NVIVMU(a+KmG6-KmYJ02ljp?rt1|bU;pu|q$l`cZqQZ*DeL%*h7MwY-?`m0 z%G!$MXGMBjVO=`5qeJ^P=yY!Xe=5=+Sm_}?XJ;|lFxCG@Aj%)SGWpGa! z@Ke@p3C?AjTrW-PnwwafVrg%SshurmR<>AJJ790;f}?{gj-t-nS{Y+u))fc)Zme7} zoy(W@6A);Ri>o;U1~uaA=YglU8`icK;+}9v->?Hwu^#OCX#>}89zow&3}(!_;p*dp ziJiDl94zT-sZS?MaeZui5Ro5E{kYzw)uoeCl}wo!@JyOJiqF4Z%ge7W6xZ9Ayut*= ziMqJ=&{mQPV=$L+C*6;CMcJ?3`2j}BZpyQ~Yl0&^QeEki=pf7vgDe*evt2RI_Y!s0 zAMakV$`jct!w0h@cO0^UaLx}wKh^<{@^B)W(g>?h#x~6Z%UDO;GW=E0TPY3U6z-yA z9uo88$S6r8DApfqXETB#1Mv+G#3L{OS6_eZJw32?b-~KjQ9*NC7h8P%-BjRHXY+0Z z*&7n;Xw2Zecs8$?O_FmDT6(8m>o)7usxxk#zgv?k(umCO|Lj26YS{OH;J5@ zU`m>!D5wvis3DZ1>Hw;HM^aQ3NO?m9>BZhuHO10AID?oN3nIL_b9AeCe%?IH^1;;{ zcy9$O$2E}~=|D+t0P$%qgo|=c%W@|t$Ag>#Z*s+8Ik(i0oDyGUYFU(jalQ}DRZ;ku zYgjy_Ts%PbGcGrR@wHjp=PDYDc0~0`Ax>O_@TLUy$$D7-Sb|z231|u@P#mXcc>w+u zVM>O?HcI?cvl!W!Flx#eoCDl2a5Yn~+#t-B(1v7U2jwZ5 z7|*&$e41hi88mtj|F~W5bqY_N_RfOPQAB}6z zASJD!6KA4c3a@z^aw_$~w>*#tQMavwOzAhKp7O?AI_kHfM8=U= zG8I!_b5h0mNU-HA1CxsL3T{aj<(^DH-$VlYB`Fx_(_37RfoZr^h2U2gt)N%R@O+%J zeDO^Qz}(#mGY>0Do2#+)b5U?x-&s5l-E6T75%-h7v$$^^@r)0`CDIFXA8VY$oJC%1 zD*Kd(va%vFJ&fQKvH!S0_4P?yQM!^}at!muK19NDcWeS&u@h#R;D&*B*FKwH~(rH84;v%M<25V2lf6D1)e>Ro*Q3~@c<#Bn@J&*9~CwrC@)Eu9^7sGZnE&Y)5> z4xQ*6Xh!qWF_^@;(azhLu%4+j%^rqE9E)+3D}9!X$4t}-jlT)b)p1nJ9jqi5G|pW} zA6_ATrvSrPCk4!9vc0~s3l%D6(vs_B7$my(4Uc@}vgJ->s7`S2*fi)>; zT)Gm~JBO0Vy>ZMAR>3>xeZC6ciddyJE_KXh5af35285I+QZuE6ZhltSC;4D4UxtK< z_EWT%4v9Wgj_HH0mnly1zT!T$XUKx_j9E67!SlzVvDBfnrzy$(O2`{ohsMo-k}1uk zit@1(bxXpst})hBFX~V47lx~HG)}f<#F_~T)&`Y^aF@$$`tE)4oDt7TalP|IyK?^Q zK92pml}(?&#y6k7%Hh3Va$@fWe*X4dj_vq_^FM9m=(Z0zwe1rwZ2pwPAHT_^@7HtY zyHDBs=^D|0-NvdVlL!r!UgbIrpWd4boZ^!MAK@?VwLZ)G)BNIK;zs9?KDUhM9lj4UqFq6@ zBXF$?!LuO}|Gx3~ihDMBTru$@3)M@sm=T3yT|6_sS;gG#Yw&DJRso6SS3AjLa)=Q3 zLCV-%vL=h;8jzq&zOXdQwkNo64DLMx$eCKIUS5Xvk5?~TrH6OIh+NVBWht$0InA3^ z&6fN7a2D-##)ML}K1MvdylW%Wa@??NWs#yise67P%eKABsCTEZ=(`o9Oc3WjD4wt( zaU@U9#&p#7R#=Qf*7q-y6XaF@c8i}ZhVPJsJ3TV&mFXl}&^F3Yq;;cPstpF24pItB2^RStV%bVOs{+u8HpNyv`%RPWu}pKtI?F?}e_e4d31RfwIcR*kitAWS z+~ji7=G782yHZK5L@q2x>Pg!T45MSbF+CUeBTCc>jiZKiab9_Idn>Q^yzxEJbk*?X zzOOiU^E5y0|A95DU*`Aww;4HPfco;&-q{qtNb!vEG8cUTcg(`3KE8 zNmxFsjL2C}V7Y{`5}0c(;9tOUIhAQzfUQl_ZleX*(Tl2yS=>{ldrr($`%QSh?vH&* zp#HRJ)3tD1yMOI5$o*)4Lu=Z6{}WiQH7zKA+Wrj3wR-DXFdih1^Y37}cAKZAMgB@| zx<Kn5e-a3lw4{vbh;%SbaI>PZ2hdF%YpyEmAPKkE- zDOi5)AFy2Nm;VQr|HuBnw*Ng?e&d?RdzMQRN3zS_o*hnh+*>q5q@99?54m{drudP& z3gkYzah?0Ou53p9>GJ@%Y9SID1nZm$2g};m}XqKX;5rk8W_| z)_FMc0}LwQaEv#+{Vi-i!E4poyqM(57cstU4e;bUTT8aP+Ojp=gV#e`d8s6iqpKFe zZ|nG`E{e6Ov9M{g@|3@G{UYK{62~U>7cX&NNzvTm5qG#Ge@}Y9f3Y66?Smb^!1r5W z^P8~eL-E@iVXLt9t6_X2=iRMg_(0h3g;=)*wrmo4#kO0%gxx#gge>E0++DG%-T9slqy zw-x7SY;CJN%%yj@TrVNH)}vg4bv=_OdgPYYW(vUeFzAMbxQ1Q3>nYG}YHP3LUSvM$ zS#IszzJ2pJeq;l?w!F;lZ&$E;({e5y`H~&$Uu5~5zDyjF$B33RCXLMFqqin=?$^&a z_T&3({bDKazC4z9UK+#t_hu_V{>^8LIsD^$eEGo~7S60^>AXI?^1@Kwdt(yM&F{m+ zapm+MRLtlJP0D+!o3RFCt1e0tT$+S4HlYqgRwnVmPwVk0j-XSR1x^(aNGXFzF%a_~ zn1OfyG=jwgOnR65HYE|$KbsVB9xFb1nGM@N=kUp&Ie2gv`}gl)=MUdfP?p8e34{1} z!&#ZMi`PL~i^5a!d(72Q+F(}rjL#MWw zo0~p?z~b6SSg!RRm!9O(qg*ck;XVEjIIfjn`7niZ;m9+=#Ba?Zt0& zCnYJAh4Uux>H91BZsR-b-~ENK&)C276LxQThhKJo%(l&Muz%mjeE;q1?A-d6@-&y= zTmtibJJ%^s^KaI_&ZaL{i}|(uvgZpP-xY1ugR|Ta?d4I?-fY|a6<>V(9&6uzP5j<; zYI}+fWr#nfCI%Q9=%L$99CL>@N(cPeXP*%Rh4ysqs-wWSEQb!A+S8`(Gj#3NMFDaN z&Sh{RWd&Oa! z?T>N13w9X+xD|!dIm8@KQJ*9Gq!U_~gj;?fp1FYp7Dr(kY^?(OIfOb9BaSVzJdOH+ zwIt=n6C5p}aHjGsmtUMXxVd5L=8S{4J5IiyIC{C_;O>B@k1LUp{#Y1v!o#8)p2nSM z&W`29QOz{R_%Js=k+~@mEX|JRmBMtErbhF8S`3SmBUzXc!_4#u78WNnAvuUyd9f@h zPiI7!JM*(*n4T2EwA5f06vXj-aU#zbCa_c-=iIbFW@QHPd`&#fVP?#(iDFcNC*#X} z7**)X*dlkvGdD z&C7w0n<|)*7RtEvAf}7!H@7sEdBthWE>2}eVKS{n$xJIu5|+SpVe^Ypn2{REw8#J! z#YgZ#Ndaq;5;-wyG`puxV)l$t>T7}e8U2;_wH$m)2ou~t4(A$Qf?8q~tnsZ0CA3!z zZs|Ta#JCZV8iu`i&Uz*U(8JRV!$2F7nsSL~OvSw{grI&&*p&I=)jJyZ-cfioMB-T= zrQn71yq3T`s6LUnK6wO}B&tDq-*JOzuh)U{US;$h){nN`J7D5zMgD*a1sSCTON8{O z?j5VluQ`tRG5G|E{YBKr)6KIx-icl~23X@4?TJ^k2O6Vi2rZ5zws$&VjY+sxhGLfM zhI4g@g5&nZKKRx~;wz5LttL!CcnPFK>k~+A$yP6hx;yva-LKxkC)S%eFVA7pvQ{)Y z8dCcf;4kX5Tdzn3W*urm)Va#zaxD)ev^JWQ#$@!IJCj$F#<^QZD622vxAXg%w_-MJ zEjtj^l&&<@rKF5UFHt@Xad{h_s*9n&hADl%0NPbdpALvL|@vOPWO~y_i z&ZyR5h@J!b<_t78?U?k!6ryq?F>^Oz@mtTadgJQ^7KIW}8BRn?DoJAt@oR`CVL&FHML`(G z+9+>eXK_Di{JSYHPES$(ayfTgC0>Oh-Bf~~&nRokBPlO}ACGUx$jgW}cH;UBtH8fJ zhK>QIbdR>DanT6O65Y@Zuq3uIN4*&7=wpJZs9zOxhl=YZ>a34Gp-tK3j<2P2kU8DL zZSWTRsGT=N!E>urFXgFjo#w41SweayQ9oy}@+w!lh_!QZt%^b8C;D4rIc|6<^-D+5Bf*(=!4~L5+Mpx$ z+bPVF_CXdDOzo|LC%5xAMkmyoF>lSqTGZ#Rp;ly$>`7^BKlEapuqy~9eL@}1Rng+O z+tc#aG{$`K9I3562^^M1%*0|sMrPsJKbC;ONeU8s_Y?Kcvn@jx4i;Vf%N)M^qXOsG zADuBY;n@(rb7>~(gEwP9P%+@VZIAJ`-Z9Dj{y@437S=a=a@u%#XY;`#CoEq z_QZ8yIsrqn2^l7yFT;|>`gmNXB;qkCp0HtYM7Bf|)Eq7D^C;4%l@LBMO>qqB)0TR^C&>oKEpap@Jx(Dz!I^3@Xc@-R-ufEbia;+Q-_`X`F(ol461 zLgGi|DDP*P7A4wZIWMO{{o?U%h#+)8l1fXTR6_jl9DGEZ6)M_W3Ba=_SFlr*o0M0P zK|AI8z@|8&2WOBnrVy`Q;R==)&gezz*dl^t8&f6nit`U07$@53AaSfIq_>J=8yZXa z@Oa|JrBOJqQnW__#E-}zb5aqJ{gN5`ek%*Ny+oL(6Y=A6o`7-*!N)%F9FLeFmZ#)B zu}M#Wxk?|GMVKhBz~RYCk|kzlA#u|Sl;(Ntlw7q=3*1x0HIAH^hiQpB8I#LN64&M9 z1D`T;^)x>J@e@8f_!ZvyqW(7LV-@W{ZvR4ZM4wu=_j%*1D4W}dY*CNnClr%1wL*Dv zM-R>ue`~NMpv+Q-zOY;bdsO$i1CuB)5BgEr}`u_-d{lD z`~l+r?u%`vD|r*j8S%zs5{BjCAo@51Umd3adF6s;`m7v5n;<>)Vz6jV1H;y~();C+ z>R2ik_oHFua2j74LDlp9l}CBgDZ(sJuxaafYL#h=UVjO0K(M=r=^V)E$cg89`Wh%=d`aOMEVPw(c; z^^2UodX39hZgA_Ooa4+DIHzE4%ZWLwJi)JU^WtyZzAcxabYGNwh`d<8mBG^vj}Ta~ zL5};K{TFX==H>;?T|3E{i>J83Z_*)_OZ#1}k(>PT(fe$fIFEfJr*Lq>1okYQ$GI;* zh0AC8UD5W_Kl5v^WWI=WfEV78dzAb7_!Zdn41E1Q+`F8kIhp*{To13yIX_jwf<6Hi zg@4EEd^aG6&#L9#zS$=CaFUzH4)ELVU0nI#Vo zBRQ~}8y8P=MoG1tkz=n&XJ2WTUpfnWws2$S2zCZbo-SL2mZiC*bj@XY@c`FP|H$vR zWYBOy?pAq=|0e1E`Z1>p64~!3dGo-lat_IWb2oH;DqwDe<;v?`f$|$-=hgZ@VEJV^ z@2|K1hp_yIZCu;AlV1<)Wxq6JhY#%hZ?If>mMa;SJ7IZEZN;CkTzQr&y>bQ2y@Eot z*SC^k>0;xgy~~wHxmu^-xB}tIt6Z70x37lgc5WWp`&>;OJiPQ&%d*(mXwO`ubvExr zSWJZWFjna)=&pddg6vAm+%F`A*u*3flaq*uh``t14@cLQV4i=4?*_}26pQ*`p`Ne$(?CB9SyrCv<~A0XcIkkF zg9VB4!94ra1Duh%eC)utT2kffO)vBL2hWIY;M*@>(xCkFkDuWCt*@|s%gcQF;bZ); z^>x0K_TjS+pJdzDuV{G|wN6R3?A!4n#}9qUp}k-5)#vZZabL)BoB8#RD{+WS5RD;(VJY&tGrS2EVlMG8jvfm za(hR+mi+odnniu+@eT6BJJ26DDaT5;-_6qxAMZf?e1o(Miwf`=9_oRwj|J-bsyTf}G*jNQ41=Ws zzidgXG)C*^nkBi@I>wPUNv>Lg#i=q9%c4N6O9FANi^RQKG+qs{xYkAx(j$$Sez|zd zpwlkPACICag6mSS%kd|?XNCr+(LFN>sEo!VCji%UKiYYlXwUMDS{cZfBx=v{^x{wqe%Xw!k7Zm_JfrF( zn9vx*_^#nh?He|4dmH88z48gKPa>c$S_5(AVI46Bu!;u{nIt*R+{5c zy)ucAG7wT2jelAQZ+-DLOYdF4#!YXLoSi@$c~;I5?v#(H$2!?Vd!r`}D_$N@Ks6j4@R$F&-w@;@3R^ z>wHfrSCbVM?T4e ziwNzPfww$c>k5C|yGIk!F9lyI|8bI5cJC~Lv!q@}yYSxTS9s*P2YBR#2ldBLRrlii z=4v1w(40a*Ps#T_87+{!Zzh3#QsrKAajS{YQZEXWM@n6Z?VX8dSvZ}7El4R%B37Pz za$W+Xrj5eP#T@5gdCyAu?BeNwM@+Ex3|H{mGd8G2P9?ELPNlQ637fZn!Uvn*Wa@$m zT;(zbvsN0o$K)pC80v*vRG=IaihpuMizSBQmmqaZj#pml3YI&?N?Rpm&DvM`1-9*} zZmy6X)FpZhZs5B;U$c1K0v(SdvwyzUNe=0gLbyCT&mM6E4ava0Ia=;p@=69_5p_wl z_vuV}Z3f{Pq4XQyhmsz}SO!|^k0DBGC$?_}ZdJi#jwvO!IgOt4`V&?ck0G!leOHat zvMGh~K34Et<&^^PA*B&GMmtDv@*Gnaj^?G;ACX?pISdZ1anB6ERJNrLE+c1jR}8`C zI2DA@YuRYr^1`$5`gn&V5Bu_3SVnhb%)5|r?3>%uPB}yWsUGpypBu?6|EU7PX6;l3l0|?Ix zB3#OSc)BkkiSA@cd!LaTMofYyDQN*Tbk8Fu)r<6+Xq*zPa7nQxR@z3-JXgF6J&5ZS zhi8QkE~Os0*Z7e=rG%If>2$lVKS`4dC|}(}!&wzm;a=%yO?_k*AyVHu_6s9tUMb_d zMe<%w5NG}D!Px@b%s3Wg!#kPY`Xgn{C}}%p6q7i=jL6Bk1on<+%InLSzvXF4?;B0U z%3)Nm7^Go*{<220?&(I(imp`5s-k*Q1*Ma#DV|cT|GJ48no7LnP1I1SpM#ZWdAhU# z36f?kk%Ln3=^jokD=DIh8;n7Xy685yHAg3;zueC^;EsxEZ>cw=6IaS{Pjma&$GpWO|=#&9D0CrP_lOz41Ed3XC0H#$v!98goWE@f;k<#X!^Y>uL0 zP6HzzpTyG7?jvqQmevwC!t$i4CE9~rNvteks5nQInuQ+|GJpF>{|>O5>Ei3|uV7_A9|U-kEtXtRSu_js7c!5z#%7%#kHh z=N9X~k#Z+gQ8Blf#9{f2cw(BKcdHG<5M_c%whNAxL0A^5_$JaXEB2vXs-5;GZsh7InAgRL2f@@{ZT$V&$?_!FFRpDP1Bl%LJrHyi>oGGc5(2+Sh@Mr1jex%RrN|cmoo7!M% z)(p`>J`L&C+Os@&c~8<8)srfgyhwrA78t7_xzfc}b|)-10&F8FSIfqEqp4-1sb!^6 zuE4Q^%Et9Zkgeuby2kBB9daXpR@;pG{?*hz#{K>sGeT~4F5|V_c^)GySL@YOoil4q zFS6J6CiC8&dLOmkm>Uko>Q(+-OSM{2$q0;rL(8cpl?D z8SP&IQ9S3rKJ-35XhmyLkiXn)<$xbL0Icbakke`E@ZYwz-Ta=lU~mBq}L zc_qcNj*ST`}CcmARbhHNe6>dl& zRHotinH!urBL(s{oKx^zd1ODnlmo#ITnmYUm5;;zlbk(wL7{Peza}TXa2#&j;KuRu zTs(M8gX=HuU(R#+S!_&><%4ifK1h$|@&k{;f#cjdeGIM~(faQPN|`!!oqQurz~8$SO9c5LJIg%f$cq=1jp zv-vb8j!#kxIJNXiIqn8m4xf|Ek^4P&h#RMOa$5h+cZv(_lljAJy?qhMZN2^S!l~?t zlKWh>TJGy4zg{@ZwX^&A?fMaZx%@Ln<){mCsmk;I@^1&=$R^GfByqqu1nyU`TxHx1 zE?;edKlNeO?wROI`ZJ-PqFc{ zFX(7tt=GHw_-k|X3)IUF9^RPQNg8Hm_=oth_JNf=_u>ZaU2X5`sDpVb5A@bbPu$d; z_GXqkIH-3(une}6Nk~a0EIbk~Z(m$IJhfi=UtzhDVo}=VcbWp`3YIGGp3yk^r*{V$JSSQ=h?+PzIqf7Egs6_%g3;0?qFG-#EKdHm_4?RDI=?R^1%r_ zBAv=vV=I|Hs*DGh4d&G+XYu|^OW63@a^8DoDeu0#M0=Kh@a9V1m%-S_@7%*XuPouo zM<%g&L0`tmp!&U!p5gv=3z#xzC{yQ*lEM5~_MF_wFDHND{U1NVGc$YIUYpETT?WMDQRO9r^5B*=9XO=+ZLY&Y(IYds@pjo`@_)^X_Q4tDJM zmibF(5|$Xu%%#&=xMr?A*GSerDA%~@HP)@Bf&u))mAQu5qE!*czB;}1x#0J*aN4#!($Sk$~S_0dAXa`oqddKT)L zs5DJ2yI^i%g1wz3;UT^(o}W z`JvcGzWL%ge%k&9n>Rhh&Y#}V_UT8D^Y-g&Wxr?n`TIBdart&Gq(xVI>*1(qU-ct<}on+9bV0lD* zIMFHb1jk3yUIsXA9lFrP)0UvjaO}gR-UQpz%B~%T4h9|M(-`EolVxk1eC=EQbddG# z$-cOy2Wib+L!bq1q8%~BI?^G{6NmB$85qXu;GQ<6K^m4TQxX+M&+@y$a@%Y_LYh*w zhi+V-971a2an149av$-vsq(5i#m{GUl39~UOjaa;vHpZ7g^*K{PG){8i7Bzf#YYhl z6-rQeApQ!Phx`9&9{%p+m1N=L=S)YrkHlzSnrd=+_r-O1xSQY>=SE0bEWKt7Ai6vO z&qQyMDw2sRiXovURc|XA)s>8ar6l#v$2~ic@bY--$2Q@c7K~q7B%X2MxJCrw9TSFM zY#1Jq{=^ieQa_=ehHbfHq!T*0gv5~*#0@Rd-qA|SHf2b@)_zr<+{&{rqB)+l{@H|; zhT#}$!)qTtqyO|+d+!1syniXq?v`5SBDrfe`NO*6QyxQ9w-h3~#S z;qjA-aqksP#E2{+hql0SKe?`#zJ8Tmr*;w}?S?8Fp3&Y!6~|!_YESNfGQzti65B`i zt&b*UOtF?IQ1S%6y%V%&rIyARkfA-NBYLOfUmQ+YK{&%_4ddA5L-OvphvoOqr=fSP z_IP)SbftJmO$#g^Ttw`ULhX4SKcaxh!I`+q{U!C!BBM_>xjnM*m*=O-tC?d*%9~2$ z*?1FP5{GwTg!bfhuZ+RDQp#pcjFeqlJgTGcZ;Z#gTde-D6WBxA)y5=(q#VXIq~Q?d zNO)EVr*9o+@}lt!pD~os>@W>~E5|fYJheM9L-Pri{86Ahuz#wSPYLQCM^yI&8YVT+ z*4aQ%q8Fch_YNbc3})`C8ML-A;1J`cwfdDjL$LBtSD?IKj*dkUHXu*trA!RS*ZS`& zh-#GFV_0Jv(ajk;5NLkCVlqmTiH;8-H7ACotZ2-nZu>_E5|I%{NNP0B;ePlegyS9^ zgj3xr8hS4*_MxVJvVcXnF{Z!@R7MH1LEY_audEK(LhJ5YhM$(5COC2b{ zuTK)r-6FJCxqts;T_%bq$-uuk3$qX_tyNyyTuioE2{Z8OVR@pG0xLB3juR7&4(3%T`Zk^A~Tj zeC;eP71LwRAaaIQYQUT~p_@F@W(+}Hv|N;uP6?E@$T7u_@^Q`7N;}aZ)|vJR?u>YB zK0Y-`w2rVLsySPGqj!pRlI!R|rleOnwHF3Ic?T4P>U6w{B6L8{9lInMiyy# z7A08{D&;+Ecrlfe>vc?pDoH1^M>c7VsRT=#9+=@nQFm$MlYNNK3nxk51&K}ZL`yr9 zJSdrh@df0L%_D7Cx}HY$iJ|vBeMuggO3uUrl1HQyH#mv-VJQrIVl=tZM%Bz}pkaO= z{r5oj{3fg?XA{4=mWC;LEG+ToXplR|yZ1MDE6)1curJh=H?jg4)-R5{iK(Pc&Lnk0 zE;&+`RM5@Of8WcayWi)PgP-x_iPjUMdtT&NJb0?_*wt3evlKg*QR3|<$bn?^D_U%!T03Nc9gBM z_qVcrs~qvk??3VtyV)Z1pZ@j}AKu!|2iLx16F>3hxi46^>lL2b|28YOJkG19KIO4p zukyq%ukhmjcX|2X`>grmG4A{73BH#zPk&`G6Q7&QglFfl`m^=SdwUg=o}Z`Z7rc89 zSCT8r)cUMH_ET^@VSK&@ zV~Qx8QcKLhOlcF7w8y_!_ZS_EpmEtiipSRQ{+5~d(*sTI3;tsYj5$|W&O#VR7K^Y-a444(j~81 z-k*Zm4V2CAp_dz04y9~%Gu@U9)ZXLGO9oRvryq@T`%^JN_8Zs02M0fA+vQzi(x;cQ zH2c}*MAoNb66wH*)sykbkHjEtox!aGJr|CokBna|)4g!7h#+rjJ^3^0$(vqB`uH-+ zW;T*DrX?V9#|&rsK01}`sogL{TVpBxx+JNuQ>49AeZrKiI0}ohXw}MqtE(-RX41~3 z#8I4|M!NLF%F1$xPYTB)K>CF$V7!$9$7m;d&*@LwU{f-N7g4{oKZ72dtnXQQ``51> zrajB8sssNEmS@_MG^2`~Wj+2WEH^^$J3;x~0J_nP@Y%Rt?P~*)JDAgY23YHr^%>Nx&ZuBfy`zi>Yv8Y+gu)KWybKbwUorJlPj|=767Axqh z0ImYV{{^uBzkub+?gZv{f^y@!zh`#?Y$EKDlN~!H#~+1VKfsQiuutZHmi6c4z{}TR|8DqVBYgTYOzz1K zMM-e~Q*ih)x6Yr2TL<~Re*zmbocQha*Esp+2k`YK`1U>6`Z~PzIG;pEa;9ser1K4Y z`5iaE-OJUFx5AGW24h=hpmbZ1o9-X$#=OIZpn51#Yx_ z7})vSVd?T-RVCQcQmus0wS9(+|YS$&9Tf#od^v;~$cjd%shuU|RK zIazOn<(FjL5qT6wSblE#zW~d(f6J9$e$lXe-+|qCh2{Hokk3DW`QiQi&P~cIiZv`( zn&o$c<((|-Ft>BjKwQCWHMMYX#>&YRxn*tE&TiUlT->p9^VE>s-rY;@V`AMB)bZiR z9^(3~iyS-sD{VWqp`%%6+L@V1=d1&^uI_q2Wj2nk_y&bZXDpq>)C@vGBXM$b*Rb5E zSFSY5l__9ugylwXuIx@&u0VZ9Q*%0YGSjf!(ySAm+bUR|#r_}P;gi?y;pzJ)@#H-d zG$>y(sShh=3}nGX8EnrP$if-DnKrhTi845x0P{c$zdNCZr8By-W??@q#iD|He)is4 z4a=1&aQ?}=_i9M~*~a@cG=JuaX)KuAi{-1v^TDR)*>mt49(`sNd@qR64{l{qjkY&VBrd65>ae5;8Cc?_Mbc4a_EPbQy`G%PE@HoxD-C zEPrV&nO(D)FKL~>eu7;GzNfsdh>kYxS+;&T4?OoE8O6zb`NJl8UYA&W-#ilXqqIG@ zaRW=&FVw%mha?3Oo*G7UdMsWcK9YZ?SlZg4Byf}ji-P4w-EsxT6$n>TEqw9`**%qDE87zK zY3-D9Q>t&XeIa3r8=Cr3ANZ)MbRnUm(HmnSfoYcn4Kv1 zl!0ea3O4CsGB8ahV?s|%iX(`Y`sg#Z9REp`c#kV3Xi61+ql@t$TSWBiT3kn@>t7tB zrc~fB*Amz(4R<;2!4IC|;dh^A@AYF0m^}uAb!(h*qi`sR!>eZ@cG4cWH>cy;l!Rkr zERIc*cRdru;$=Pt`}#1#hi2i|6iZn5SPZTP9lZ3&?OlvtG>CV;c^QL!D-6yZC>c>l z+K>|MZ5_~G+L;N(_zg+HcTf^O&9OR|VnAsaJLG++Bzdaq3R$vz4%sy_KrTzdIo^}P zL6wA8$7`?bP6;;JW81AZ6zAFyu~1y=WFXxTBk3jJ*PN`i>eG8>W9r+HbuX-u?!Ymg zf9+9*jF3T^ls6M8zqTO`WcMk-JW0y=kW!)s=4nsvnBfIF$fuGK2&xJtzkeQIAKuK9 zuRqM(71QZAvL_y4?%0PoV;kj$Q${crDc%^uY-ktgLxyy6OAfQ(Uem&ChX-d)4 zpgszmXXD?Tre!yRn$o0>$oje@VtV9g??L~fC>V<;fzHuSi3%$>PZtU9gE#H3s87tQ=mUnp@yk&bx zVg!zX?y_H)hV4p%#R$tiVgm4p^}{{RPuhhjTx0#UT#nLCcMo=#_T0cN>HAbSmS|Y6 zKEkPdOzW9TNPRpJeU%q(4$-3uh#Zkeywn5lhG^pCzKcgx)5g6$119%p@dNX@_pudB zS~!mIEa`UyT97RH;8EyLOrLb3dZuVkbM*&6#n^f}hFg$3yn;62W@HU3r*wQ*!m8pZ z98gSgpJLs{Ex&IrefmqjZTp1!9;FzZT2VErnUV>O+S9sKj4kD}`;axZ4uf|G?HOJ* zu?IF%zAfWDC>+%dud-M=#JJKW)tiQeL-Ca|-&zIoY|f@m`UY*nZLrPo)j_#yXZF)+ zbc(cRz>0AMR>orz?WlqIkku0~mE+QT#f)ji-J_PZD~i(=M_L71O)XeQ94pr43QA zJbywdNrN+Vfa9osNkomvC3AMYj!O_cFkR|(Jc%O8{032oY~Tb3{JwocNCQ}SPvhRNSXrWV{$aC ztz0DcHY!_Nl?>{$njGN7=%j^mt$tP4|tU*F$3%DPy_j z`$sZ+aO}%d2ch9n6=PNwF?@eAi_C6n8`hu_diPuiP&o*}Q72Emj_Ex@-rAe>OX4bol zWlVFNy&UE9>)*-zNtS-HMoV?&POl_?b`806YRH~lttC{HC%FRUYO27wmS>sX5(rd* z^}Jct6wRum_kF{({`cZ{?qT*ziy6Is3b|v-8T8P2-Z;LAr}w@~^@2X+j;us`H8vDuOvhEP3T`psLCzt(!%))Pq4w#*oyI&9KGeng7^wCaj)8*HO*1_cUYu z`%m%y?oavQ@=l)n<`u?1Fq!711NFzE>UljiFjs#nmCkC^puBcbAFW$&p68B_ynj`2 z&b|+i(_mal@YJsyMBS=E6whnYAiZ4HcUv}yqN&|T9a==qte(0Z>$zwMgO-hs^>-tz{qntLa>&IqE7+tt)~yfH1~Hsd+&W-3i1+&02*qZ#-4 z>-v9Y#`NwqqsP1PoN7NcudY$et98a}SM$bmt9d1NqCmKs22PVP|0L*u*wS?;=iw{l_KGuW;nzuhNyg#bxyz#LnM5BA0WU;c#UhYudo zuv~ow)KV-*4ro|jR$in7d@9d!13!IVzzTZtLy)tJlf z@89J8S61`fx@p|EU>M71_UFMR<5|0SEK6n%X4-@v%$U@JG138l0TUAr&EfE!oJhAyD8F0xUR0gw&Bg%EasMz7f#LJ)}VrYTZE>9X?r2%@z z_!=ENZ|;U=B$Ox9drU9B_8=+|-M5afOn465VuPbd#JK*dodGGG3LAlYZ+^AcAr`-w5 z6+l-{HW% z&pCT$J6pHB!n^N0%sX$b(@wga}C|QS21?nFh-0V zNWcEgG&I#vRa>U5Yqu&5%%@JD!sMxwSaaXKI#{jp8dp#}At_$Vttgq4ppZa9!h#76 z57E=W-~hdkhp#7oAu_Mlg@$Ph4hknQFqn`4e?kJi@b?X_ol zYrD?0a_C4K2YD8D@+=&?VB###%)X11y^feVm|^K|MMozyI(b-NDP_hsL9V$d4yU3h z4B-y6ikGsG)B?*LDl{B~`{(IEi6PyRa4!nMG};d5bYCJX6X`m-JH00M)iN=oW{+g;lWTbT^`{syc_`_* ziIS&2L_`D-85u}ec%asBSHRpa)K7bs`^$Q-FrOBWc@qQ9eh!q@7x36~4`AkLf@iTm zol>l+oKa7oWdr#1#Am#Ja3g``LB#b;B5^>5_I9(%bs?lj92vv&3F#VvO_D8MneGJ2 zy$7Ut;uGVDcceXDkv6zTSP(7g)=j9uyTpT%>7}HoU)sl|5<4=1)Cs91%QSgpk_=E2 zNEn%^0ZWvmUplIk;2a;Ef-Jbr8P=^|F6H(xBI&(zICNz{Z@m9J!-h0-^5j0Aee+p) zHqn^*+2NTMghiASjv2m~C%NEJ8Hs&SAa*4|*q4T4r!5TovT&Trqwy+_!avU+$52at zy|9z7zki?nqIm61ACnwRd+Szo@v+eG!X(Z~%SnXy%Ok0c~5g4V94SjBi_o$8NEVHDB*N(gMsBDgVIt}zC$>R6mg z!m*ZXvCQ_vB+&))co)30mFKh<55M>zPrka2*(;{-^jnYNm*|Z{m_4ywlL=IM(h0V> zNSO#9l8Z~X2>qMAO`a!a@wSu=E2E=(8&*EDPzTTLGrWns>MU%$tg#Mp)Zo>vHV)UC zc$_MuaH)>Nqb@-#3D>F^yla!B%}>x;)4rwh9&XAbz99?ycrQjS9L-0YUS;}}!F(-c zWa6YDgetj}KsTKHT=0qtz(dNv(j0e>3c({f6lZBSG%%O?(cY>fZ@&GUw1F?PapNnj zdvuMwlRIPSY=wohHMzCL1SZLO<#_M-5G~`Pyvmg+Sne9*Ll<9rJmTaW@lvOwdTq&DYxTIpb={nplrP>Tm9p zM&bt+VF!ku$>SM{ASMH%zm?eHvUPeDUhjC9VAg*tLmX0xmS&=uoPRqymRK#K-?UJKh zmwS=ax2yo%@d zSY$gf_0Hq4)MhIukh*RANlaiRtm>Umo2e+b=NV z$$8RmXw+KbD$Ygw1Z!rzz6|qhSF$HmN*x+b*}P_LU6&8gp5qFXH?JK*&C-5aKfU|f z;gl}uLG_aUI?h7nyk0b|7)ssTe!RNpLq0yXMPJ(?x$5Z;&7)#ySKj>geYPL}nQ<$p z@#v=K=p}W!Vsry5UwKHbOUBG{Z=db|mdyvZ(ZoPavD0k5xs!hPjiuX)A^QE_F4c)4>u1n=#c0Y$b)#u~FP1*Ih@bX;OKp9r_8#~3 zcfs1mR6BI!W~5M%E$y+N2jM|J(hu({eT=Izj=apTa_)kt-XqLA5?L8kb>8ZKA zyl*4#oc@xfo7a;#p^R2p4pgolsA0Jw%Z}uk)mr2Hp9T0-09~zDmbj=Z2@7Stm|CB@ ztl`h~@e6AHT;GyTonBVkjK{^zuhyoPTflrBDN9?dZF!?Uk21Av+~2sb z+HSPJ?x*)%-U7k@o+)U5H$eW^eUurYxLWsDSZ;*gs={D=J&l>cvl7U0te%ai5(nmE6K{DnP<8(zqF zw|BGng;k87KZ&!~&;1F@j~+YpA6Wh$`(J7QCM@5{&hgQFo!X8q;YqOZF!HA5+GY6t zoNT{zRi|#-{!*A8=SgzUfa2AH@SN0Hpn&={PWk#a$a_D<>kR_&NOf;#GIp^ z&TNfKXJc>z2SVaG;upofs4U*`PvEt}dN?fSI1RUz^2z1na^jyjzM>y*6@+u^!I$J( zZb`T3CMQmP#>w%yYzyfC&u)M@OE^Ai2_}^~uxO zGfb90dyMV1(R`DU4WE1~d2^Pt=TC9*+9k=Wy)eHQo0FY5ylg2PI3ede$UF0A@OEkn zTVul6o*K;;F(G{96Ts%k9Nv!U%4-Sb92(UJ?w!le9^qW+K2eU948I~-pr#jYapA%_ zF5Lc|Yw~Dro`rKNi0HA;I8>R&50PP9d-N4~4p+JL|28b&w)Jmd`Jw$gG%P=K=zxah zze*#fWLWs(2vC=F~EFNYRbtUS;h?dV`3X_;GKe7Wnc;dlHTBBU)l|Qt6h@OAz z+4;P(VYUwPskF%Cr2XXXmhRUT?-vYG&TzF_I7Maq=?3FVtDfpajPI zky?>TLS+hN!|SwXdB%_m!h2@P;HiM{0Xakr$|GiEiH7Cz<0?p=RHK*E##WIsxRm)X zuBK*W10Jzn_{aJXmK=nmzXLvTemuYF6&`qHJsn*;W9ef_NM;yrG45L9SAhjJ5Lxs5 zS`y2WaS3z7HPnN|yc8ULTq${o}E8`%He}s_~oaM zxp`f+S1LZiC2rj~!;wQj^ZBQ5^WcLk89R0`0|qoPWLR(Q!QI%shWf@TYU;|UtSQx2 zQ&&OP`fAx{Ff(RN=Ub^~PA-m8XZ*A$xsqE6iwM=GAh`nOYMX-OM$d8;%+xEu2d`j1 z{DXtULJ05=!Ot&%03UCyS?=v=OGbLA)XN|F>Bmi&TeQa2)f#6PJDeo%?HwI-no1%j zCN7Yfb4Ii8ptN%`m@~6#gQt%(0pS7Kd)-BznL+Z<#NCFDE>c(RI?!3BZEQQy!QK=T zXQ>yqCfZD0EHQDlq?5Z92K$a!MtKraok7P~51dQl=#=h{A;Db(^G+GwEdaDK6071M z>?@QPaU`}fU{?|>DnMcEzY?M!x{ z)*y|qPQ@wOjr5vKikpk^ituE@oN+w()P3|C)Lrt`ldxbf!ovJCG>?c3(UL47(IEsz z2NRkQ(bBebQ6Hb$;TY&bbZ#um9$A5jj~QL!?6A#t$0pU8p7Z)rH@=QBtH+Q~mq3z| zhiOd2w=#^t+9;CxXXBOcM@V@%9;xoQ#5&*}ZI5q)6TwNYM5TKYlO_2iX+;)!lRq$3 z?$d+P8AT+ImOL00OT^%C634`mFg%L*;W4C)%OI$CBxxfu$QqJP;ebrC>f%T*4CAtt z(Rp)6a$x^f5)uRHY-zwf#EG!XPy#bTh%8AYxjv7mayd_KG+vqE+I(`vWFPPJKtgiD zh%bsEAjX5(BtIU0Xc5N`e#ep-Bk0q!9N%a!I{RB|*sf%8lvlf7-&8#MC1TeYhIij2 zTx;e2>!P)!!mpS2^73ns@xVO`xOMF`I}Yu{#KlSnjdhOp#wF1okIWGKOJndXiNvEU zN&{(+ia1=#VzDobz&0-eyZlJp3L7AiHxfL*Ss|ePb$>C)ota@%K$8PLr((GYOpEr){zn|x!4fo>_;fukp zBf%xf_)30Rr3T_!6pKlM)WPxu?6ZULDvQRiCIRo7czwNAY2Mf+dFVj4tsUC%@pl_} zaKmZ_kMGTk?`^aK&2llClEuv~eSJBJ0}86$0c zcp%O}zBmSWV(8q84?cLEr=Pfwoxgm;!o@Ra-^rk*i@ZX8@d%Z+O6rlj)GL=zZ>?eO z65)eelpn59-Z)EL^o$R}DMIRhpetVCzPJUr5)u`__dk72W3O7S{B~BuZ>0@hGOUW! z{snkTT~bict9u-wgEI*qlu3-#twgE&ab44}3bNtxR~})-gNvCmXDmApey;d8$yUV?(6q*aI|)>4+rA(+O=`?*gs^|Oa!ne2^CS^%aoF4!ddVVmrOV|oxaN#0C;bO}}op14Z; zG3=hH_(&QK8B#~w+fqHVkB%V`JFrle4HV7pfrkp1nru(r?Cz8=>#rpfRNzbX+~Oye z5*0C&gNSEsB=4Wz!Ver|`Mc|QYu~3l^W7V~xA${a zef%g*kB_HIcWJX{loK?mkidxrgiS3Wd`gQ&PL}@7q++6E8ZtJIiA;3M`jT}yH3meRLp23Y*wN4mtuKP-Z9_B26D#V4dk7Pouy38*&Alb%Q;R= z84ydu$aHxpIP=JdYsi~fNA|oPq>t}P$+RXiN0yN?QfX@E6FZ@h)UhQbNgnu(E5LnJ zHnEc`NT1e~@X`4s&8Q}3Y8l=`)8yKV2%S`*VSmijB7#Sx5HvV}!B386<>oa6_XsC* zbT0YQW<>SPB)VS~;nMb|jVvW^Vy#}z8DFg}SlSk~UP*T)4=W;TY$ZY6rR^Uk{k}m` zX9g-MkRm-*KwNp2+ZTH4`OqGTRL*H4Wq5(4RiSmtYZvsA+Czek3j4Wj;OpEm6`hDH&9YWr(AU z7q9Z}kDqXe6YRWonE0j~DyHxEA4%k(ERx5RkTbQG^a&MuIeSVCDdWqeJe5$f zun)P@>dBc{L-FK#0=vfZ*w-(xi=%8h@(u6q+{C0cGYF7&aNDt;*tmTYyJgJ%!=*ip zxMvde6MIoHtQ!x$`6TP#+MvhH>t5f0LzpMM#}DSP+|TZd2iWkz^LVHDGw0#?tbOA_ zId%ejIZoaDzEsTZN%?}lgh+Ypl;TQ4zXGbqN!h8*;DM*tvgg<@#HU6Qrv5DQc96cM zBPpq|L`k13Fu+^-sY$eJXJG&SUpRN+C|kB|;?<2W&~rq0OuS8~8`sDYDVqxBul@W9 zUO(|U6JA|J=#VVh=eyFheryXYkL{#Cc;&C`tzo$e1bQbdk6)}jz+3E2czrimuBHl< zD+sQpMi6d<M}~LUH49|1K;y zYNX!@&5hgc1mbGFT2}K)enrX1sAJW#5tb|aD=b$)T7hw;Q?5X`n$LY;09kAM>TUlF zmMaLZV0nU0s|A*~Jew+_msFB;PoswA8mce&FU|6oj(w(OSnd|!Q`w&oTh8&1V7bxb z{O{S_0QsHv&tSQ6{_okH;QRj%Sbit?HU{-n^J<;i_RnB>)I70Y_^PeB^t529>aWJ-2k+=ayLQXHU66Y}Da#+RsYezYlXBq8U2yy~w=YVXC*=P3$i9;r_&(i@ zy>sTk&ysgnFY?9xD>*iK9E=xt;@IB zzxTkOuzYoi-18rv<%jm}lH1+M0oit7?~hVkcC&Z?KG|P+lpofxT*)VuD+ldmu4Gw^>)M%G(Ylj4rq+¬k#G zwAb6zRPAr=;Eb7d7co=JZOkyYwZzQcM$C>b_70fZJ7VGNPG@TeeGUc7({p41l9r_< zD_lK&aPnvY<_d-@Z*rwy?&|HW&DqmauQLYsGc@%Of7A+e2k%O2fA39YK`ZH z?m6uE=!$6_l3{KY2EU-UtGioudmRW zzpvZ5nrN`)79#oSWsXCn3z3ycEPLgCJ+M}=TxpiaDX(%FK&8vTDq(De3}VZ*MGY?^ zLDpB#?a#P%v-x=M7kvBcc0StnA)o*J8K3_2Ih%gj%!j{x#utaajJ{13`AX;^9C;97%gNv(%<9`k4sn#hd zZfM(DLvv+Dc@|}AALU)%szV1_buyt{7kM5QR=QlN4;aeh+|0@v8wY#3n44iG>Dk-c z;_Bjnm!~U!zMcdH`VtoGM`>Xm)#W9`M@L}RxdUGAPK+Hjly}~IiEqCA1e1;iY%Dtx z8SYJwrV3WAn9Xy~JjARSBS}pTBPhUypdb$d0^IQRbtW{_o3ykTii)!-E6*ptAcNwv z+&=+%W!G}5WLn!$Lw!>nJ$f}WZ^2xS9{*Kql`9ag;JAX}Mz3;ZYF@!|CBvfNwua_% z556J38kYM6_-hN0`V|lmpaXpRdAs22ZBNf0rBWx)v2w*UI>`O__&DL}=7@)s{m}3* zeJ=k1FOpLuD6L3my9^e8J^qXKM0Rkt!d>#q!PAW{j*_1)_H=Zy)>15;-K=P@Jjum6 zI+)SPQPw$GXzL`V_UYhmMJrcx%p*OqN)E&}D@+E2k+e(k#Uwk3wn-i`?~YAz2&UOm z=W3$0XSrK_6pk`j4C01$(OvU zjMkpfmeEe6HsoL%=BVX_D*IMykKDYf9Q-1^r7d#C#myQoF9-bm-0=5z$JftOo`I+K z+IR7C(}6zSg1s=9x6?Z9N?SRnsfa~SuA;TCC8nuC7-GEWv0?@<@7}^!=MM4huq}uufASzq(n2v$4k5IzkcgTB!mIPKNDRa>DFDxcIP6n`aLWnDB|8kq z{7|yw-C|i8M#9W`4Oe_7=HoFs3;#(4_>RfOZ+tdB6VkN>kINu*Xez0r^N47OA*du! z2E30DD7psH#T{} zvfdxlBsUGi?2|p|5^Tv6??1t>*AFpu$#_EL7@J^64EAlbCbNQcw#C7CHYIBBAD5#|! zZ5!G;chH{Y>fYmJ@UHaU-D{%>?UjmWg$&ZmLWr#hr)FS@ynatHcytplzWTWKYFqu_ zGX1B7g`Xo1F}^sZD1GPv8SW8>8HX0(kN?CC&ipHZfPEQ?j!?4Q^!6`2sH(9pNlxt28 z(m=>JCkmhRFr1_eyF`0)UGDL*^~-p9!x}9Sw`jp++DiN26(sf1)1JV@aQx!KaSD@m zM&9F2q5il>1mP1MCfl9leQm~y74ulSa4Ors`;-wQ`eA0?0e2r)44qr!9pR5>L?AAq zzB*v2oxdw~(q1aF^>@U|-vPT2ckOZR9_~YDJ5wAz?exd*PdC5M&=GyPa_bBoY+BR7 zwIdb7WnkQxrUSKx_07_OOr2^%^hilBPZ9e>=_n>sPXB%>r)AeVW?0 z*ZCEY5kOEu2w|0x_?Cp?Ds@45Y%6bVgHI=-6f_SsBdQ?-=S(S!@>~OQ!*P{&syhCI zuis_Vgh9G|1jcx44dUX_)ua!Vcj@R#q6X)aA@AjwVI>&i?8q5iOIWv5S_jCxSnAi% z)swVGwjsz|2hd9%R7%?@J1r^IcjY*2GyUig?Lb_wJgpV1Jku30ubtM1{1LUZkveD| z?@Esa!*I_Hp<|$p_KF?6XaWZJ&iWZUCi)O4?aA~<7UL)7RA~_RnmbZU!6?WbP!`XO zr&eMX=}K@>0uHhA&M8P_+{zi)OTF?)4#GCVlirgD(7>(r%}F(X@P|wA~pPA}pz2GL*upjbx9n zrD4es?E#%LL-KA~nTDS#Fk{w~3Ua1YlRKeOYathotKx|*FR)DdQ?LE_E+6dwjA`rV z@Zfuo^URi42v>4CLvu(TSE^-5QYVz_c{RzVvSq$- zQn|Fv<=X2#dvZ0E^1LcWRgpEhl!~!AOzV-zD|um@k@q9gr^MDurl#O-!oF}Do+}Mu zLAQ7&SI6<}L(}Oqy-~-KP>@_nRg_Pur)Xj|X=4h>99u}`xJtTB@2=&=(k9nv$vYLC zI(cXb1ydSG93lO(5k>lAL2$oRa^#wQyT_0`vIR`{T+xqvKE994p_!x)$|OhnY9$lv zNa&kQ)1rYy%X>0qU_SBkPD~qIsDmz-%5_9^Pu3dzYMLo!Q|+f@i1OrmB6=q2Ajdv6 zVN}m)VjH`(JXPkXV)ErV1UJT#HM&G={AZ6T)$@_PlC@`f_ISx_dFQCVr_x6k%JY?H zH&LG3AJc@vIdYFRBoEIevTriQ@*Fb97HgP3;|*yOw?9S1z~nzY%T=Jyyt%ccNtuYB zB-cMd?nR~wl53Ci8M2R<);OPBLE6v)#y&JvhNLH@^*+b$>w9=+^K-;Y`Fri>_xR!V zKDLW(*#0Kz{fns?-^9DWe8igP?$h#Yt6qAL%${XLl_p{0W69y$Cv>0ot6#t4nXg|X zbAa6AkV*-8O-*JR9Y})q)znt4i?XWsNIrIge9R5;E%e=GWV=9L?uw=tMta))A zn|6IIS9O7j(l^LzEa1_1pJeZi!!rIo!U;*IYFwR`G@1U&5*n5cplWUpQbrbGSLDMO z>E9Pj?Mk$~KU2n(=)l&#O>sIlLtw9#576F?G1!*-VNvRhZ;yCvN__RlC7V21u8O8$ zR5fqy-Na!z*LSCPP&u@luFGHT`;K?M{*bLle&pM;zmU>156eg=Vk%SFcjGwQj_=^t zTW5Jo_8B#MA`iXz82isDM16@9w@y*juZs1ruIKeFZ}Ii1ZS0nN?>2t`-Ze24&+0|V z?B0~k>W!7uf0IxfS~<1F!qc48f&@b3JsK^2AS;K?xcfU15avTdYMk`9+(^kx!cF?7 z3s%hK^$%asZS9IjmrEPeL|f^%l#h{iZtXZWU;l}G8O1w+I<|<8P#`ON4 zDGzd^XSvagp5;c(@>oen$*?3Zlys-okRk8GpE#&vp(t2>>9@-qJ@u>hEI;z=0S+A8 z!|@}BwRicQuw0pP&Qx~fNQ)^b{*TNE(f^+P2bTZG{#E<8Wms<9SI?Hj_UsBsfQLVo zbS`uKI$Sw%N(bV+coAxq10_&R@MO=l&5k zOyHYTbM}Tf!NNImuETIfPIzi3oc>vC4>!&omch^^a+*_TsixuszFF}eSp`(WN+J`1(t#L|1^+T>ysh(0dskL(8N zZ1Bm8oTM z`K;WZWX;vzPsnkb`L!g8A2lq0QSRZoN|}vi%%KZ_8nqB_fkehdXdn`u7*9f43a-BX8g44st)RCuBM?{X)KsnOU}mF%xp5z5 zO1ed@SEiP`*xF-ZtAcl0U}x6f37^zu##3iTU z%q+`trKNnGqzF& zKQ$DOZy>WzF;Qg+xW{->(Wiol+!zXbmlIblgVge5s)jWXA_H>2^dS7QLP)94qOe~X zp?MK>9np=E3&xO9n}cJpEActWcn0}u_^tHf70_1m3XUsSt{}KtR?pGsZEl3)#(8B5 zsw){5Oi0E%_WUL0)4hz~ZKh^ju(Y z=tv)?O&Q8>w@)%_=5TE7I$~nd1~bXe)YMd*UEGL_j>5@V?!nsubE{VD*!`uJXXq&9 zIVjYR;K)#1{k$=Aa=_HtPQ&tcj#B^PzL5kM=BAu-v{PTx*uQcZ=5E<<8Y%Iv}HGO|!XiDL#nk{&lpDmFM12jAMQh-ldr|%p8YT zK`OQxaoA=j;8v81O|6XiapRN_9q7(bc%j4Q%t zLLu%Ga%Fvi_OS8lqr3%+i0z(AXmKQmZXc$oPbn6GHrPhFU~p@X!KVwIqnu>EBdtR1 zF!-6%D$r2X5oTyaP2sw2lb?V z$2KjV`yJb2>*I=Zh!@s@u9*8v+3>NYt+x$kVeS}Q&9R9Kz$q;TgNqgBF(I_^wxhFa z2a4)aIe%R`-*ZQBOUik0hzmjLn9h=}w7cQu3A72eXpxEOmrJBvoAyNRmqkcfD1lir zsCR44p5xot@ceyj{q|!nUObAchqUb-4VcKe?ZP~;lD4&jpA7!JB+op|Ft~S-YcRtk z#GZBm(uVk1NS;ai5N?lUs694;lD{1ce6rKHt4h|=5?0y1 zBn~YmepoTim7#doMHA6Ik+fc!*oWIn+iA^#6FV3>vKQBGo+GCyP2QvOTrAsS9pyn6 z^+!*%8zxb%da6z4O(I=zP7A^;ROzmJNLudL203HpV~3reqmD!I=(^>6`?>V#xIj); zEMAgsdy95hN?Yci5Qc@1GY%nAFN1t=3ic&DEfIHV$DDlSoR*z=_`&5o@yI>=dhln8 ziZbXdZHtSi6OP`__(cZd;OmC9mot{qK3a%bc^SI4CIaXUZRUrC;it_cCSJbdu9{Sl!kA8Joe=wdf*k_FH-|Y6|B}jTY14d z=>VaFhV@|Q?r%A8=qEy=d@ylnkGs@^@WKefE28nr55TuD9FM$E?ICUOHEDt7GW98n z#5Tc$;Nloe<=MJKyWq?%yFB66o>33<)%Pe71zbK`!Z9}p(*##4XY?U)K(Y2HSAQgoUOxx3BzJ7m zeTeOuOaACOtzWJJdsa+rCZ%r?R!JWEgUsNS6YwjHmNI8T$%sb!EgX$`l;n4u2i}D- zn8moV{LM%8$DEkv0{X9&rhl#D6m z(vBpNJh}+i%3#8!El~jl69?uI)|5e+C}RnOdjyoU^93K=KTkDp{A* zDK#WXyO}hl`p;>~lnNavGIK^588a%#o?b=aBn8mr_-W-7OwOliL@LYVJ+wPQ#ttqn z;A|z<8QeN>Ho%OJr0skrE0_lhqWJRRS&X0CldMs44nMe)*N)T@FKW5}10yvwj~kRh z+L(ME`}sKy%cBRTkT<y~FsDJ5riwT9)%lZ#25QcTj+61}XRkpksPf<^6@IkAi+ z>9>wsKV5S49G@QfLWZUafUl-}ST$?jewbf=KPY!|n%;{?5Z9DN$?#f!ytqq-sRwl5 zbi=1F6J4D~Vc$y318n8lT;;=GHZg3`7+%@-E(NlGw^{v3?o%LX9cJA}8(8-2Y7NVC zn{t`BR)P9ca*h*BzJDg+#j(8c-9|qAc{4ws-N$3^JVV2np7fa5kHp$^9)9OBc{&%E z{lr2BE*nnY)x)vOcB9{YqsbUu%7`bXku|;ox2g~#`ljJg7eT~;4DCs-Vp*sFpBeJp zm6v(;v|26U6FoAI?3rD)PJQjt07XH%zJ9t+WQ-_f%7%sV^iOd}&bal=4th=*DE*)+ zK9XxY@!JJv+_!*-WL%(P7WA1nlw9ezuX^DD4&FE+BlH`@6v(?fCWw(U$FuL$K^eJU zXZ7Q2sFXCOES=2Z>ngWT^UQazNt-qt$D$zer!`SNuO9>MpG>s0)nOI!y!_>B44gE8 z_Pgx-Gz39f1E&tOb1E3B&&=4$;vvVR84m3O%U<_SxhG%Qb%HY2&CM@5_?e#<07H7o~>p)oWqU?W*16R&-?Z#Ekosuq$oaE%i%bdP= zk&{<1a`3ma9JqB_)?ebrCAcl;xu)2yk|0q*JfE7+7x6Ca4i1G?kHQhza8k~7RJI*I zBG-4C-_J^S^TIWb$?=jrS5C>X7jMD20~}w_owo`DIDW6vEWgS1^M~QYcUcTI`MIYP;vj*`=fCHzOtk>S*7xx|D)~$2W)liULw(tFnosA`YpDcO%{^ydZ z7i1uJ7H;f>A3os6h(z`zmBYSs${}02Q8(Cs^AyLq#L3&YIWPC8*!JaXa_@&f<9tyP zy952X{Mhq4Uv6D&snFLiE4w7~*SIQqd+YL9EyZ&2(iIKUZ(lmeb;)QY9HE{G=f331 z%KrZxmjAGgt2=gRSib+@9xcOiX#dX~IIvHa5Bv=*S9bc;F>e2Mo!q=kt^fPaV7UV2 zMp$n2AXi@CYMarE+-M4xEBO{>+9TcCPU}-^vu_E;se*@g5i_xK5Nm zCh)==>)86^CbsPOjD4qfv+K+**1h!@p`~#wdf{FIsuOT24VTWQbO?sX0CiXqiKEK& zeB>}0piZoj!HB$o$5jzGw1mX|g@jin(KNX)gJut-sFw^-8uIa1o|PHF#C6Riy?X&U zvOZDiA9u|lt4ASz*`Y+1##7k4l-%w`WOmKP*4IJ9@`%J3Y@Hox)1jl5O0jmd*HSFX zlzzF|=H%g~&EC~n191h$6(GM8lq)F~JvHq_>n@#IfVsIT9WCYAShaYfE5L4UYmJGy zJRjL^WoL_rm+~BzXYcBQm6a9dX4bSaw4+^{j@a5bVr5~A!O&KN^Y-mK;;Mqo$}@L! zaV0o75N}T}9OOEEygiAG2*KOSm4E;bLR2tFvCuF-u>gXCeew2_j=t2d;LrdK$h8)> zv@yz*SGa=RX&I^7yL{av59^?$;gKz#-cd1;8j`DJqZCVUs7fnHdz!0hU|0}gv0((o z$Tqo_pfK4lG+eGTm|%Y&0_FU!&St#-?sMF}b%Nx?Ai8vEg{^HDxhG59+&oA~OeQ%s z1rJYWIgiR0b52OvS-x^MenBq8CCVTsJ{lKa<@sqtXGa@4x!P#2aV5oK?rDpen>Afr zt+WhFCuhlfF}1C|n+2_0x?pfO$2KVdm%J!k3S+c{Myq&t+9r9?F4+^aT-jC~gH3TT z4wVsDmjr51u5_GLa8LKTD6Ltp0({zL`x8);s6ETo)HK~g2Hyo5mZuCU#;ZI6rCY9G zd8c42N`}@FB<*~8|0?Q-)Z-B7NL-E@pm}QVawYi?9OjFEkT<@59(en> zT2>=-dJ|FOD~Xy^N%)u|VkVXoF)ClI5T5}#c=paAaYQWzBN`YqYYbBt&0zf#53^&} zPh7lwj-jK5N!{p-!K5v|F`+aJ>P^Fte)JkWnCbV-W%7#Yj9f5|A+tx)TL#oM!|G`q z+k*+qCo^LHXa-FmLRFtil4P)Z`r0uTE}zK*>sDwlF%|UC#Lt$30kt@125AWgB`e`x z5k)|^MBGY4iR&S4LtQcxmW*cik?-i!yMisBzCj1|VX8wbsmJYc_46dPAd8&J0x~Lc z$*j&NU96&iHwt=I6J44`SV1Zd(aICN5bv}^oFW4;SQ?nRa3qUXO=ZF2Nz`{M)PGMn zd0J{%9$geC?NmAjw>I(&0tu>1(2&ieG=z|vD8hu*1cUzof0lx}U?n)JpT?9;pns!!Hld1jd&1T`m-Jh(u6JqMSB z6Pgo5Rz)JOzPW+fbH{Vy)B&t*PiuKsEnPjA_uqV)@8y19eqo(F3xl+=tq4mBBdI7|>x?^w z`rw-siC0`G_R`LoI$B}pDRn3#LC45gx_CN|uV2mAo8Koe(49`5TN4r)gtM2k+YF;6W8x_D4kom+>WHP6ysI6g&9Lf(rJXrhxheek(^lSi>v>Ab zb1<}%>vC$Z^DD44ny|(+eCpx|>z_@*%tk_br;#yGz{#0K?ev8Ye*!tM~apX3FB_rYfp-<~)3Y>+DKD<1Rf3~#L(At65F3PPt}mT){jrj|=O|^nXhDCvNO^MX z7Ekfgp%~I!XqV?l@Ze&)tsH|Pz?6_)`P45Pg>6v;qn}|Xr5d|v;6EUTRut`-EtQkV|jCx7KK=)^6 z(XJ{0hdxQNt%BM|ClEBLh~S0g1S~E2FI!wnkXZ1NGQyTtki51D-Wp*-4T|OUoIv)6xp6AMhBN-A z91rQh!Eh6P4z=UUSZ|(B_U9|fzhP4=i5;6x$h2HZuZ)}rdg3uEk@Uq?{K9@#yu1*P z1RG{QIfGfxFCeOyl&R%|d13#D_&3HAJ1Cc!fm!U55x~3WzoPF$W10Q_YJ&PE6Eq-| z`um15Z}USs7DU3hV*PiF(&|3O8GK8F8MtydTP}Z(ZK^W~($1;%m6Pg7>YbtO>xD{P=!$a+t*7S=x&{c3?U`$d=KMPvxb(@ACYvx7hakF2+1DjjwP1DED-P ze)o?cX;=$Q)RzC7KGy)@$hO zQxL-JN9SuOpWiEwIgid|&SUeK^1uwnubx6t{|c5qwNj3}Nd2g0j{J6#SH60SnDP{! z`TS+peejfyt01E$a)y;sBzxfzp*%uv~eTE01zz z9`%u0s>`!63iswn0tY5zSM5)mR2%6(1rXXd73*9toC^Y3`o;r1_{j!Rd*thPf|8B; zeD7Aa9s7mR%O-1C85IE3B+6bp#=Q5-rxf(5;@EHJsUO-CTYqO7WIA)@JeIFt#j3~d zB`iH$`VZZhuyhj3Wn3|7-5e=XlDDI4$sS)v@~BF(#?;@YD!=V*^Mj%fLG!5TBF~JW>O7EEO;5M_DAhV=rx0VE1Gl!ytcF zBUv-+bWqRuiDi^5?nT(pY)neLv}bw6Jp<`j>Z#j;%*EYFUC@=3g>@JMd@5M3Ai09& zTJA#u@A-eX55~!>COB?>Q^kt3O)cU_3`)7Jf zyZsFqznk3&#_u%a`oF^QzuI4q`>Wjzkl$%{gXBj0S7CYFs(LNgqP)hHX1V{s4Bj~N zHBan+S38MB&#OU6uNZ;3nkrBpEzijaz5ld7fVt6(fIM|z`bzwJV$Sz)0*YKUAipC|Hh3Aa(ZQw9Ovbv zPp#(5a8Dh~lO@lzoJ+~NC~xpHXJw!3a@=hl`0}K3;+E+dvESr2xF8i|RUe+ucH_6l zUXo*P!HL~)^jmJ!m9Q%@5x4?4AIOSD-{i3pqGJln8mo9Sa;u-B- ze(6%ngZ};UDQ+rQ{yW;+oU>nW>0j|IzXO&VHOmz&H+q)eDZ`@7=vkhZpQSy^|CtQS zosirJ%8m1XHMLDaas|ybXjef#ty`o~%w=AAnk$WRCA-qm+MW(pc3Or-nWeKU?twu> zCCgwfCJI+i4;)=xG#odYgPYrb1LsC>as|ninOa$CSgv);Ev#s7DT8Y>b2*ptZZ=R{ zk;pH*-sg=sR`c|ev)J(1EFOJm8a{4qY2Vs_vy(vv??nt5Ue3IEeHbN!qnTqWSUjzP zwTt>|ukvp`e26WZ*7M;TE45eommfZ;LAjD&QJ&=rmcQ}xBIeF&=AN}v*mrmfXD{t# z|FLbn^U;eexMv2-9$L(_mD8vmTBjrauYOYoCH1KqVnq)s)POu`bUCSGDoGhzN!o-O z(k4qMMFvPpw>)uV1v%sDv_9(WCzrDP`87;?U=B;4zL$~9CQ&)MiTX)>8GG*x*>)dm zUR%$!2j??$-2xgW^rCWD9pwY7nY?NSla|lGG0=^u)L5;tZDwVOjXWnGUw>RY)W->r zKLdU$Q}aru#ZAh&p?zCgb!ex-xPs+MenkOv4a>W9*08*lsq!%Is9||$YYR+lEHx-s z`xyg*b};FTwY^;n0F8zLt* zqYPXtr#F#0B%jp&d6bQ>A*wnK_f&7(Bwzd_&)wnzbf81GSSceZL4*`W(`{NGT#LiV zn<^dMF{LC;kOB0ld{V}j5;rVcERUoyRpd@?CZ>B1nev`0?^Z@!To?nIyOE!gz^a9F zD9lQsRVxEs%-Yk%q64mSFU~GDxVqV4B4xtHp%ZRi)&$7=FfhUcYZnu#N3C)3vBf*s zMe3dU8^(g%{3MnvnZe5CvstlZCT-gr=}C!tR+F+I}>sf{MNXBzQU(b7(irKCQC<@ZeEp$8W8?1uYTxp+Dq3%xu{^p359WFR-}?zl1NEo0Yzf!*Yp&*|IGRvVq|+tc?t=+G1_bXzK51ceQKhs zJR4J+4*I&(wcq#3LpZ1TX+2zzvPdF(W)RktibJl{`+`7fM|WlD^#1rqyEA6o09GuU zMbD-hI(KeOhmNfYjPzsBq60Dab;Ksn15-~2 z?1DU{?)c;2>%y!hvzfna9H;Y?jJk?E_ZFyp>y%zbo$q`6GXCQN@|J|mV+WX#H`3|l;&5sN1< zQubAO*>}=Fyro{Yw`oVWesxTqJ&v-P0z5-pq&+aD+tg-qhnEr2Bb9V{e?|_=CwM?M z#dCX6Fuj=|xwh8fRuoN;L2a)*+DLscNpz*Rl)Em;?z&B@n=_E~Ar)G7MR}ahdSMlo zDV~@oxsx-ZMthYj?{cM8UNEw2i-x)MB`i}s82{KDOcES1_;rwT)YGJZxKCRx@1v|s zwkOkGUxjIoCy|5ls9QNqx3PxM&Lj;fW#WcK7(Ck&-ju<-*Vhu-n1)5F2evBsaBTwP z9-oIH$P7nm+k7ixwEn+Iv;(!X`%tsEKZcMtM2*a+@!`?LPAnyTb{*kk3rL<>L+R@N z6s_ok!QVjU+-^Fcr6JCg$`$=7Uf!GN*$PVMi4_nrzmUjzg@nz{BWQXSfs@mTn3a#m zsCd$r)et!=kHCrP#Lq1ucwz zDgQ1U3hN|h!Z}$!5$?t3QC{qtJBW!B3dtCkO1#`x!m=s?CZ^&sD3XSU`tS=sa`@7> zJpbBCmady3V}x&5@%jq#h8OeJ?srM=ok>jBXeq~eY>{o>UHXoD-o2OmH$6;L?<9hI z#xdf#=`7x|9-I0=;>Hz_F|tU~-OKm4c53)uGp&(tu54%OQ*+1~TEKpek~^Z9#NHWL zB-yd))K`pqWD56ee2|?S#5v!aC$_(!;di$My-6I9rNMdWl&(beOvbImU-ml59vPF^ z=Xy{#uczMMB+&+siU7XlXOc(ekTtG^h(1ZokbdcI*>{QbTVLJ(zK&JVUCPKO=f2VU z;t4~tNE=l^KvSgFD_^zwLAkFOGAETtAGCS#VmXN z9uD0+qIJiAzPN|<#$5g9nS$keFYf2yjl*m|`J>$RMXDw>Qz`X3xN8D0?0B0Gj(ow| zccp)RVk<>`3;FTFPwc(9Pxd{<=0jiMlj_gv=hyP$=2v;?i`RJTyNyhc_eyrpA|816 zF<$ugb&5t+@%@cmJh=G@d}|`8Thy15>D_QH4WN1TP`WPeOaBMQQnRo(U6=LOR=KD* zkm^i<>E#*PX&?b=>p$<9yEn4s)Jk3X0Dj zOvB`Uy!6exoRx9r&KpPg^1=_S`ru*eXZ4}a;t_1SxQpf~1DL;lIY(}u(SJaFwRbz0 zWlVSS_E|~g3ZBv4e6Z~U$(_p_=ZxI@C2FShWbl2HwR~e>_f(vuzGMxn)Uf=kU!|0s z_=&eSzs@snJ|Snm#Kd`H^gC63xQ)n)!Y@_&d~woVMY>Qot*`!=Shsixy&s%F)$)Oq zF6m3goO*H=bSF}tyU&0Wth)wNDr4AaDNm-Q-ZVclPQ&uf<=%gKmZ!|GC3R7~2G9yF zD_9=0pi;wfCC6ff-ha>j3d#R!cLU%?Q;^*V!tVs$MgXtuPw*{f+*g?qnj4S3^EfrH zkCFS)-sgXS>${oJlU&W;3Bc95JH5>RPwj4i{7$AgY=p8($?2#&GPa0 zPh;Z3DH@jldh&>tVKHi!pE`C_19RnJ-eSLMQ<~+<6x?pH{|?CSw7UWFJMBNP{6F@u z+P??OFP(ss-|=}_0>4EjvC}bt3-_;vt7o`+;1FE9&GmEVxpwg!H_t0i=kr{=ae=E> z&Py66`Tc;rW-q~sD{xW4^0VjQ(R=tg(2ISpQLyBB*$BtwGEU#R&V}o8?By%mzIcn@ zKye8>Mhv>p1{dhCQ5*~gI-ua%L<43}?4{<6kne7n?uw{#+DK{`> z3Omv=;O&p#pe&ygJMbfH+s13rNqjSMk|e$d_PovK&8d8xm=0g<;>Lw@(s8`aKDk^j zoaXZUA$*Y@$ezgyV87hRu?w7e>wRvVyRJROIlh-q8>{#vR`T|PZ)DvS>7-ti4u)($ zdxDcg`tey@47~OZx8%AG$d(-{gQY{kjo-K>_jpz8`ZdYV{hPR+6UPA`Z>~P_jAY6c z4a=`xlCI1JWfvu{uWD$1`@$Iw%&%U)#dWT7<3TOhl+jl&<-vTS1GNM~y&I$Ar@UaX6=8y3#4SU5T3 z?CV2Vd?WLAHc&K^K%ULe(FVXRy_fKT6D z%hr$A@zur$v`6`SFD~Zuch>OLM-TD&`}gtLdu#Q)g5*lC{Oe8Y*#6a%8kQ^1@-gEZ zDXmJTl>$4;d#1_*#mlHB&RAFA0q@@E=mcqaQp?UY~MCte8yk@Op}dNk^kHUF!??o;?hg z6o1lt6fkkk3=(S6=svC|{iY7)-VOH?niN4&ZYpj*9$HI0CMFIC2PYg{RQ|V^or{z9 zFgJRadq{huAi09&3VbWCa%Eb6MXa5fiR6Dr3?^;F+R@IUvpj!uOl_4UOK0imx6uGy z?Pv5dS28<3K|utDhZ7tgK|oNT_QX~I+{edHPZbmo3=GEA)t&hGM7^v`d2K6@?&;x+ zpKl8=4-XF|I7B-Afj%vI*S?az_DuF^k@5)e$3yC?`Y7P+?xz1*P#*!*R4rTCSZYvi zD%YrjdMddX12bV5%ax_D_HJP9*$dKFkxMju}yT>zZUys1d(2!O?lr+LS#@Dl@Zw@ z!xAQGq(l)A9gI(yAO4{&`ta)Gfs(TE4-C*A{0V7EIxwxNn-ylhw&eFNXYE^$(J9;k z&(av23c~O#j@5zh{0d`gV6L$s8e)F3?Kz423lHH#vsp4bhS!T|Cn%fL+rgh}HHi5rnc%GiA3hollG7StyW z@2;U(#K|)c>Zs+NI>>YOvNjOuWkQf!dwkv6Vj}H=qocGBZCk8u8v~{?5bi8(Mi-g3 zmt#~g+cvFb*;Lw)P6k@Zyt1~kkGXjp4WTnqW9TB=obAmpF>Q;DpM&4uGM2Rg~|%G6&s3QjA) z+)mEXrh{CcWlOuJrCP)~TXoP=b1AEOo!TbmAkW6!vb~l@^73(%x^AM^H;(K9a$BF|geq0(?Nd*>3GA3|hCFlo8b^zKHY`rY8@s##LrVf6#IQrXR=WmOhk2USAThm#tU3pd8Nu6vj&(_MWBi_Ca z+hr|O+$G}&%yZHk3h zaEKqd@~%)Z1l&Aqv30e;LCV!z-@QjjS*(WTN=_`eS2{6+^N8r1fonk!Rbv|&G;=6+ z-d4<>HESZ%v3P{sSE%+z&m2@v_ql_yNO04-<)a^*N!PIrSi5&1BPW>I^M{d|8Gu)S8Ku(p zt&oAJi=PQGY2HMndg=hevsaHJIN6OXsRM(iHWQiSM>|^s-3M1NYsEM$q@8f|GsP#; zp0wgfg5_L~ziVq+y(ia`*O-L0UwekkYGTmr2Kr2^pmA&w-9{Ja zsj|9JIaCczr}xxyYNgHVE&KGIUPd=*`f(|vrQwz|>zvQCyKl+iS?oJN^;8&^Wt zamCb*Z?T$jMO2M1qC(nFWtB2tHKAo&ukoey9a~DDaiug(kZYJ!M9t)Us;A^rKQWI! zLsOaA6weEJ;rtlo%T-TjaIxfyuZgzb98JO3nP0=b_-)=W9-L54k5TEAjnATJQZBXA zis><fR?nLMi}Mcoo8=$*=l)q`2{@fy-3PqO5`0_r1J_Wr%}ST>NauWu(~cp>xO zSjGpZHWS}3jfbSK*nM#yJ)Qo-Jcc|lmd`GJ!&5)JB>VrMJ;ujBIfGRnJ;)n}KA?PB zJsVGcPIRvnQsup?p!qj9e$-y&@1OXLQIAZPD?hSw<3o&CH%Z1!N165N5-R65k~lP51M-C*tYFR8>k03hK#n};%*mzF z56#tH;|ho?4|C;RuDs0EvNE+zdzH(xQh{01$CqiDm&I?b=9z6Tvi#MRRE?=2ydsiM zk8WoB^__C&b1ZvnEpa{4X_(%dZ5Mv#qn#h~^`WoX^6Phm7evu>VsESiZFqh2YrOf* z8_alUHZN~`Q_FuO_0J`LY&C=K8^c@sKjQO~Uom~%bgD*Fviv694*a_^&y$(`1flDSP9npZ6BrD1vgqHg3bt|Mnb4Rvb= zP_(ccnNusso?OMfUp}rr&&c@rjGj(v<{cwn<0gDL>N=*fF%?`Fn_KYh;jqrb?y^X$2BfUZLt_~yV?c3s%Z=0jU_Ak?gZ z<>Zd)O6BZ+G%g!S=I9#I29?rA`a37&et$atBbVj)E7G?-dgTzkM>S*XV@X6>DB)Q$ z9*g$W4g&V6KGe+{sGW6^CRUR=tAVt6jik(z>EiAr&#luzdLt(l6E-G~%GCq4W_ia# zcX~ZOk;;1q(JIeL2l!N;<;nAEv}gHWVY!xIS^T$P{BCwPKz^qgLH6D3uQ1%WPMPue zI{~=S?mWf_%><_7y<$vE4&{k6g$&KFTcLMW&*X{<$@3gx?a-;n#usm9( zN`}P<%av!j-+*)t%OBnI*5AmmC2AivZ8 z3yj~*{uwM+z*<4_nE5KO>Hi#-8|7C1y8cdimVadb3M^Ne<$s0c-`?8A*tJubvSj+7 z0Y3L0+M_}F!9#mFef*fV|G@J9*#8#$w_y42SI)wb?fkak9)1k=;b5RYd#cJ|;|Fj^ z(!6k6(mT&@XU=fz>~U_0DPSw55KhYpPMp{BA*Zij=faiCvMlFbzlc5Ip8V<;2dkAX z_wO7-E{SWLzkZ5K=TC9-?0GnMgBzD`a)gT_KJ$%ZuM~}td*Lf};>P_)Tq%{jSHuHFHH}?Ae?+x&I z^zaeRoH)s;V@DM*Zw$-*1AYFdHY_j0atXtwG|;@Yp0s0Wfa99=n!n{f1}3&j`et@Y zdgc!3nA@UlW}_rwxvsUC%E3FG?ePr@#4jQM2X}ic>@AcHhy>#rNl-2&2lJGYP`t7I zij;)rQf+h%XwlA;cKYI)ls9%WQbfb=_`#L@^wkW$dVdrj&hF3mA5LJ|qM7{k$u!RF z`GqYjK4QgBqN6agoAN7{1A6}Q^)!|*p31VXrYLB>VZ}Qtx?F1KpC2px6^&>4zHMKy z^oJSBvwZNdYWfbUCMetydv^nTf*lD-@F6I{AKwID!V99w=w8UD8@|I!bfTkry)Fc9Qsci!nGH-sO!@i?+|~YOFFZ&hgOD-eGWrVqk9v9aqC8N)!Z0xN6Yu?csJ6Bt*T&&f+ zjiap^v{T-Tos~H@mPS;RXL0%BA(k!uRKarTs~#2_Kv-Cq*jD;;dlL{CtfJvv#IZcR zZF%tc5*_M_aB;UGAV^-bFQ#_3w2{BEu(3o>oU5&!csJ~fl<%;fop>K?MH*Y{(#A?h z!Sa?iLZYK3{j8fg>SG+{L>oU#biy3ez=P^%{BGh|B)DKz7=nf9+?wY2&@ROpyYdj6 zYr=7>i&By05&g5#^4G&C*%{};P+ST^@hXYIJlO-2bPp9-E(dOm?wx~mmKRRB{y1d# zq91HYW{)Dg(gKKYpR6Lw!!slCi}%MR$Qeg}@w@{)u<>-lN?NdZyNPGytsuFZn;V{< z^23R=Zi-YM%+hW~-^G-ax-8!KaRIHpjA#*Hjzy{;@jZ(9WYZF+ef>7?uJ{tW6o1@` zqA^PG#=mQ}=;(IjhpRiWEsjJ##f#)YRcLt`<6j<6R82Z2p$@pG1Yj5Cf=iMYZsPjW zM2FEL%UumT7t%MCkO8R#_Ks6PA*4sNg5^QI;xJ6H6jqKa;9Vhp%VDF}%IdNbO*Dvno8PLC)p1sTI-M51N{VM6(r#-`m z*D-#4cServ#NeTIEc#+TA1$224@*8_;U{mf{MT>z`rA+V?&mLAzGfL8e))kYC)!|a zrjMDqAuU>J;Ub=?1iNWfIrN+|5G}h_xaS2D-XW2I(hy>5pwTO=K z!rZVq*~wvKCWc|G+mu$#w3Mxj9QaZK-ezLjPEQLX6D^EQn_yzv938Q*fk|_WZL}4P zwfC~b&Cg!sCGq~+nP6_x4hvH~OhnnF)l>^JCks(#HDTb)(U^ug;+Y?&22qt!!mfF8 z;7LD>15K6Rx&+DUqk)(jiTg3q7UiHwdka$o1>jq?(W0ex!^edt5MNFig((9PF*Xh?;<*aL0+^K`?r+$FOFs7D$6i!tbE0L z>urjqtGOD`)XGWJJ2r-B8@ItoOl8{1K~&{3Q)}_JNW09OWFn)2h>Q$GN4pu0@Hw z-MSSWlYE&g-k$^)J<@zk8C;pnl|rAcarEjICz|i+ z^zM;BxB7Uxbx)vsk3@R(N>=LLGl_cfx0GBb)m3aK)wz2-UBrG}dnVGWN5lDsbje^) zmsI+9OQuivBzlT%q8VppzYYDM?emIynH+{tSXMR;yDX#7Pu`lu@uuHTWuv12p+hn<7 zp6Wo7sA~^$O61iDQU~P`&>@oAIo&CrQpc#plNC&tRxHClA5Z$QeCj{w&)Yi}vgE=_ zemMIZalJEGwD)_Wx}`GU!_n-1evH%s1-!fQQ#EjCzl9@+?3<*lSEj6*%R5^a;@>Hp zWa&{qEKAjGvBR@e1i6$ZvRw1GTqh+hTckY2zIjt>2(M36mNIdj6UiS~NK)5SVmc;J zFiez9Vm`TF9tk}%@fGa{pWGnK<#;Lft!Zi3hOoQ{ay#dtCCc=I&bfHTd!X&AgKLJU zr$w70QRMF^@jge?CyTa+ud=i0JhdCyJ+rV0w;)lJL!tRWcqF;gzJD3MslN1_)Ca$; zV1~Rgik`FjQ#7=a!r>KIi1tlbmjsF@)sQi=L=EbhCDPP7*Mnk_##v+AW1j7*tXLv? zrxDy!JXg{Glr}8VuUz`_r;lq->Xp&XJY6;k+Gof;@NV_Z2o z<10xST1@qfo)nC#RTfUky^2NqU6enDTFQ=04oE8p)2*4=gJ6*_yUyr`ZLAxa-HPZq zx);rCb!g*YKvS#Ms$TCqZ7>0uA)?-IMk^;B+KP5emudY}`ISDTg1CM~bbVu}=x;<4 zUX>{N?sq8^=d0*hPJV}MQQqs**18QQu10ui)bApa-G{qIP#pGGeqPpa|u8d$E0FqhK& zE!X|ee9JY^ToYBU(LXJJS(@$sNv{IrjrA%>uF<~>%Y)~ZDyXgTESIo+$+gXVa^ja) z!g2}KjU~&!1I!zP@mEPjxBs_luv=*i$X^EHn)z3)lfe3A zSgwKI8t|=|e-$j(EPHwRzpMWlEcc%#(_9>LMwNP(EZ+%|9CTX%0RQw!L_t(L&cYS3%^e{L*6&>top>>SSl+6KA(+XUz8Qcy}V$?yKvzi4<5e|=MmRe3)}7(;WpOSph~;a!lM%{kUk~mrTFldP*LZwQywo>t zi{ufyaZ}98zi;yF`W2oE-M@8@`!{d%{MvaQT)V<0$;su%hHD%DJy`zN0H2!3a?Jpr zGO}FSupB;kh||YUaN@{e1t|`JcgZ3CdrFW4;bQ$rzWGq-qfz{{Xo89=*F={~&+-*N z%~7Cyx9Dg{SS};WcW(SdWa01lZRuRbj%v@Kp;ZhRT8q8tBsbO866vL-2Ka1dpoO-L zHi228*u}Z?(b~m?i%z(Ncz# z-mf1q>Z7TIwND_VG=ctaj3K>G8QB9WN$yg}?C%yZ=A#(|m&D_g(fSbtXf&OrMZ=OHllN-WzrNa+cwGrSjXQI!$?PE zp`sVzK&ucd%yR-nXD|V~(lBgGLNLhmz`ZV3fpYhb(JHdsve1XtQI@!shhrzUmtN&Q zWpS7!xZ+!vs0Kz%7*s@v=oDLKc;MSU3e#98T6-Ik)F~T}6h9SNE@63mVIl#EfhxK@ zEF~Q05HBn|oiTS7`9M5l^@a$qqttDtN>zr<*5${aU;v{>zA%9419WtcTh|NMF%mccMA4Z zp$u9)jf>po_uan{73)Q0fFmP&R&ij%GAo+cD=guV@JM=q; zb}!}Dh3%qz`HsV4-*YE6uv=`qfA0#eUpvI5%Lm!C^*5?J6wtG89k=dX-~|sbHfx8T zVH(M|)CoqbO*f%C*u9|RIpV>INQ3|D&U#hshF|>9aLnwRh*OZwf4>v&p6E; zV?TX{%fVi0oH?|O>t_#g`|>evUlk4a%SX6)=>X?1?d9~@?V|46 zz?oB~3y~_RLf9Jmd!k>6tBmO}206Ruv82yiGHj z>9$l5e8PLPFbNUmOR~3k{ua381mag3ftF)SY@_WN{l*A>-?)UImVU;(8RK|w-ZU1z zIgdAIO=aqYF?_o4UEY0j2JgHzoj2Z`%4_o{F?;TKrq3S3)S07{Mvm>rj5%YOJ8vTM z#QF~w%wfi~k&GG9hi;w9@f2mA{1~9sR10%Q3v_LbNv|oSs7Ebr-9(-2W@I0O#5i2g5@pz zjd3Xo#j7Sxy#MiPyn=|jRQ&V9m508brM4(jUGejFAzqY`wq|3rs}$qy~PK z_bj%Rd8DPdmo{yhs9z<>dyyXwWIobv+f03Uk=J1;mdRgUm>RXCjkrd`wk@!;Gs4Q# zgdwjDWZb6{)u60F-IDO^9E-b<99%NAZ?^gv9WUN@8Et8n?uk*V8_6Ro@T`reRk#(V z$?kM}eVFnrmy&g^Z~IuZ+}aV>Bagz-9hI$7yI@PQ2USosvJNf#mbi!7F;kRjV?>){ zc780g3gURXDwEgBk{O*Gz|{O`#$|^wwK$HcWeH3uj$u@87;kpVXLwdHqw>NToE^&W zqG-mpPh?U}8htYYnbA3iv8C}$u1aN6g?MK>tUwx+0oU zm67z%_hUr+a3*(4p+~kSW9#A=RuRsmPRR@@3Sn${6jMZbIIcKKTtfiRKrg>2^Xf9` z7Ujs$q6mhTi(^#8F+%hqhP97jh$z2@R7EkYCWe0H!3?YnV@ORn{VIa!UFJ)l$^Zt{ zg)ypUJcBw$GN4nWnhx$H_Ujz2rh~=b18c(>S{JD_thPbJJ47;~Hj0sT;+!4h7%u9b z;WbH&6xTLfl+VLNTYs3Sb4FK&GrT&S0bL@PP!-14se$YY^5m|l2eB{*YeTTn0a4H4 zsKZg4R$Lc(@bz3b`sBKZYYt&V$9Sf87HL==OCM3*j42CeVo4NpMH{S7eKPq49&{=5 z=M9lhI;T1^zFMSFMGPae{h3%0&ij3e86ood$eMWS3j8TA^=HiNj=a5OBA)qngm(=g zeRQ7sU>e>(8K15ZB#z9*rAE~Mz2g;lcB>6i%e*>=VUp|c_qN_$!U^e>hZD| z3Wi5W&+@^kf7`FfsB*bX*{=vi5B_U9G>h!1mGl+;#y;;4X3+b?shiT7h#JwxDGR1z zVx96d&l*}xQm;%7K0D5*>%ZXGKH|Euav(*dDg@#3TJd8Yf1$fv&!)37f#Z&0t(-(C3AL#O0Sf0#dLV5 zFNwnoi5-wj(WK6#3@oL1To=YJp38fpKOn81`Y#;CJ6k@Zc7AWth7=RkH607lt_muR z#ZlBtwc~nHKe@je#NR`dDXs~=m;_icO!NVY`&FRhVT5(G3x$KLDG|rEO!ub$CzHt- zT0z-_t{8`l{+X{CP0gF(66!=qvL7X#^VF|vJ4uL9(a^)euDtp62QE@8F= z;;~b!6fBpX<)5AUjgax;S&C<)v0-T(S^hFCmvCDG@_^~3f9qe?iNF6{NUqVV0C{7* z8jv?u11xV0%r!7v1H?7+uY%IFyy7Sxh)=S!;M8s&-#yBU z$H&BVY=*@n*%52O9%l;}Fj)NkEsvHjg`dBIA3lMfzJz7pi{t*t&80tz{_Rz`bxTE9 zvuQKC-OPC?I!e1df_Of7IP6=_UOlC`PJggJffAu0apIj67EIPv%4)b(!8OMU!amm7g z8!ln&4h`h#TeHM9$@Q1S`FC-mD4R_&k+4dn-HkKiJ}<+$=Wy^k?EIadA|2U~maja` zxgpMZ_bd#a#9F^B?tig{2S?BGd1*aQcTD}c{lk#?fPcGBIGJ4IdK%x#|Eea49sr?`3SfOt-S@@|H> z=e^sxfA|1rPn_ZCsSBJu*u8F*l@U&+ z`q=5WRdUpChofFwY+AR%qDd1RnzzKQOC&-6p9lmT1hj#5ByAL2phVrZ$`0{?&Au zGyt1uPX*0dxfzmGU(B#K$CKVEpS=1K63Ww+k99i>ef+|M2#=1!)5`}-OKbG?4V4v% z#;aU{aXHARv`dkHOPDR8c{@XWq<6W5+h!|mrIx)7!-o5r@9Mn@v0&^)j;HO4^FAEF8P1=VDx%;@O>yy_aqoI9$Jn->$qq@3? zL4)cUJfxo3*g*UPJd|aOvKn!d^In*lTdI96ERE^gzpH|LOP7D6ppo=m_w@6^R9shU zLutcef`OxW4_z!V^|Zy@(;9PkD@@$P`{^X!ReJ+kT4~eNq7_Y68h*y*b-cuqTqKx#}vG)>n}r#23oTz}k4 zBZ#ceM$1K;ur3({bxy^vR&>mJ=P18tn@lg_dSqjr=5(bL*t11$& zvQYJt@Rq(tB=jyNsZS-Xe66ub^v5{V1^d(h9J7PPJ>_GT>r33I3jF$J;x`}zuU^Rn zi)o;khV)Lyt~it(&(0vNk(wGc!`xB_H#=i2#QPZQ@5J>B2iUr4DSP&`Ed z^Yc&d^6QcXY*_sz>sKyjHGKjWA%6J+_Q%Lhc_{BU^jHcGth0*OaWW@i@HT0 ze~7lITO{CbCdw%pS+3`2sXpqsX8IFU7DHPfV+#9~bMDy%?sJz9K6`@^BYP`rJMLfO zf@nuQymo;zhxc%B*9J}=+`{n#8#uCWJqP!#wo6p zp-sHtHcuX1<>Qa$v-HPBoIJXV+cz#UZR!LCs!i?96)f*GyfyYim(C(=W z@0-Q@pN$lCMg&nq;tA>KkuPhS#enkV$m5+JDS~uixc2^x=MNm#4&CRu#`qo%RP9GrJFNXYi@DKV=>`7IhQmi}- zsq0woUck$!lSMqM zKfc4eU%yFF*L+6J9Zv0#4!pbMJvN@-O2ME~#(p`4siIxq{oR42k0>T?U^W?}OO@qH z^}HUmiZW4u*S*;nlMF{SO&wiA%BT`D$G2DTJZeBDX=BPr9a~Jnybi=n$foG6I)aCa zw!y$;(kHj4WKJi7dnS=Ss+82hMa1vS8(Bbeh;p4eW0cXiH*sCMErn?6*sc37c$nqY==(`$FAj_8ai8QfjMnYL4C7laMD2yYm zHj^wlNcoWVl+NvikH|}zuh%yW3OKul#Mf$xomHix#na~2kvO%Suo1Zw&+o3hvTKQ&R7%*yLL~{tWpuf;UkRR+hyS>&|7}>VSuO_>m47z|xS*D=4oYz>V$a%R;u4`~~(hW`^RZw$yakX&y2|E~c)Uk%6`>;D~CE~hU?n!gH` zYv%t+8YuoxQrGg|!17@6&dRC$Tf%b90H3>_A7k*_V;C}Rgo5Q4MLSgbmS4PlPFb;> zJKMmS8pHCJLHU1R`G53(Qd-i^MB1Tn;tccCGvMkK9^bjfaUOE+MFSA# zSpWVXaP~3JFJI!>^Xpu`aR{EC6rH&Pu;p7Gj;Lp6xDRXHZP^px#>rq$4tv>i(94b^ zfgT(P@@1EgFZ%)lS)Y*%2iA#wB`DtmH+RFL$!v?V<&>8tSHv+ch)%H7RS$cvx;t{& z!=1BUUL5!FV@-s#M%e(jMMv`bMcBBSrGCB~%uVO{PalYT66?1A&W3Pr)_b_X(l6nz z^bMDGEmK+N?7=?oRIZi}Vq33%{9ISf)(+MDQP-YzqA|qQ~pH%vo)Sr_cf)^LB;c-XSV-^jStz2036H8y4!NH|J^WyXcaqo9Y2~WVq-VI;BVEjWw=O`{-C;=yTU)t%J z)3%K%CMFITS_s)VAbr23-?&zD>2umzOj}}VYyX#zxS5iPr75OXa%zmBnE`snx((52 z+D*|n(M3nU4KB`hSeY7PrLT)k+cr3Ax5Q1mIUb_(9ckQ_Qg3@|{2eHCG9ufm9T_IA zNH=Ohs%{e!T4)h3I>9MI1)`%~*`hg}TC}8l^VSS(*^bd|44JBD#cX|B<{H>BU)O@~ zom^SsXva@>W-PTc5YNGZjXoyq2r^?&m<3w`4A~uR&2L^hY>so}k7#?=r+M*Hge^-e zV)*&BKD;--H?Pm^%3E`~v*?3iEd6#Gzx*(hC0|cr)v|f~v3x#zH!ot>hEEhYKf3!{ z)+~RW*;BhPXVySAZeGI9-7EO&o45J;r-i)v;Y@z~<2!br+s)de8_@MNW5KG=|Mo1G zqt(0D#t=WGSp7uPOLRh$hL_;qBbm%;of;y{2Nn|Dr-0y^RJ0sLI=9tQvJ7#hZgd}f zb7JvMkEEZd?DRwjUCXpJIxc3!mZlS&9gDfYBQ8jN_H0m# zwsOGF*2+7+jb2*?)!Q0Kk6!5|-%iczn;NTM5;TrvmxF9NxjSR)WQUoxIhJ--IJ!Bh z-CM$MA7!s1C2c#TR5bZt%cSHsQu5*x zT?mT^#>>}D+>f2Irtt7}$IaWl;U3*w)W-C_8_h%w2V_9?NPqO+I5Y;&u-548U`s6B` zn8d-w1lA?soEIQErYYzIS&}`V8t;NQOy$p!lSMiQ*eTC%*Nh+%dKF-q<4fYm3Ih6O z64XBv-(D#M_Y>2uaRhXV$G&zB`16l1ICkg{c5Gg%pzH3NKsp;LR6S9Fk{ zGa(|6$N@cF9844_{bTh{95}dC!_(6iCnpOQfBmV7YSuN@S0Bo>+O?pvZ)ftl zm7!&%g?q9W0r~!TWH@6Q(vCxSc5?mMc`O_Z6~ML^*KKW~O=Pe$H!tjG%i8bRw|O}m z|5(iCHH+D?=?6Bf{+!jnEmYGTo4#Z1Z;M#D>{HgR{E9>S*K+j8CWZ{{rXrc0tPOFp zG@+HKPio6cIC=CCEku1JA-F& z_1#)rn>@z;t!ub`dOy3?FJsdmKZxu4hTS544s2V(ft^d)wdDu4Z~UH}TYqBrwq@+x zzKq>Fe`EKq6`VY=jbDFTtRko7F=e#0rI{`VcJF`}&(RXcH?lOMg-KgVdUn7%+!HMa zeYC9G($dWo1Fr_Vn!aNP@rcL#vT_-oUQUFG`rzK((<+Z`-t;rqt{!BssEg!zw{QKK zvnMxj;>a3KA6>)cvzxhoVH=mvY~t#R~`=70Vk4$)q;@e*}MvI|=FTDav&OPy?7;sdY`bX8;GY}mMl zUfnt|VZ>1GUJ>o4=l8@t-sQ>Nv)sKZ+N&=varfd*xPOXAmk)5~^iCdMImn%}ySRB~ zClACu+_|!!7Z2sH4X(3u+e%`h{4h0bM^t18$BrN3^y!l-uNjJVMCZ}n7`|YFDuaAG z#;SVMuU8TQeNxm%t*C+7goyW6Mu1vQY z!*DxVgxJvejWLAPWQ%8@jcsWZ!@in{PmCjh?m7%DiekJd|MV@jaPT+ayAS7378ioA zs}=eA$;_EQNz@U}v@>eL$f^CQ=wE`Kds{-&Mg0)%Msi6KQ(hmBtDiC9NiNLzbTX~& zTZ;PGf&BLAjDKSsZ5_1nh;m}=tN~=@g%h6WLDz|0h$)K}^^qg5%^pEwlB_FR5*Fu4 z{lJd6hTGG1ObzV^=TO)umF!Nb_=@trU}Ooo6ACGrQ%3i<>xnIlz(2~1PQ$uj8fr(s zcSe&vvOU@3+LJyckD3w1RF5hmbwnl^qjRVlmQNSaCh5_um=1l5l?_Gw6tjQ(BO%&~)5gFtU%~Brf75x&Z?-9jx@eIFA_hXm06Zf6ncxvsy zO)E=|_}X)2YzL+dOCzJom(r4W%4-Wq>RpCkWjs~gbI7j>C%!(Elu;>o)cF(LFOm2@ zam00v5P3M9xK42jS||3*P?5?7qTZ|NF0P>z}2dcw+w? z68dEm+dG4#0lDOkDJOYIK4J0$QtvczZBb15eIB#_d`CsQOTTgn$|DCiz;YQ~F6X0% ziu)2$)+-}(l;nK)z!WvebfidFe~nfURp#>Fsao^44FNU z*!*youKAid^TsfFLVr%~{Zo|j2bnQzDC1`iWWsAh`Ec=kQQsSga^f^+L|wRX!%uV_ zR?8%j-YZ4@G~p$gF(Jz1Nmk;=M>k{UEIiI{P66B9$=b0U>+`9^!AX~Pc-p0aZA9L=> zd1ibxi(j_?#uctn+OwR=qOZJk%W}S4xtLFuf2P*gkM6VH|QL{2FqV)9?>L^&a+^6#jr5@fe0 zcwB*6Cg-K(I=P*kO28dAy_^_vyy!`VL`^PK^Rd&!_R~v?9KTG{H4ar|Ayt_*b++1Xz<3@tzf=T*c_4O^Q+W0VdB1}f4xWdWR_ju&cb8A zh_sP_xDh0m(0OVp(hpq1>c(JO!f*-5{l)Xq$X7fIX}h9<<8u1)KAQQ)&|R}ma~>&; zPr6(dB=T0E$YYua_kWTGfd7*;VEmt?tXTe%W?AF?!$tZ^HD2F%zn9^;l;&@_t}z&Y zl{CkT5cx4&uFhV`5I4eNmzbY4MZYsS?<2~Axr%-`Q9&|%L{)O+dSmi&CA@rcb12; zS@PsEk8ht4{hd>Aejoh&DOY+|vQ>1Xc6eEH%-@-F;l2tOZ+3HLldmsV+gI@H_1ECG zbR@qG7ey!Lqkrc`RZ1u~S^DDQ2rhTaJbY z!Ia73IO4qDeaZP*lQ=rCp7Z6o>=B)~txo3b3wCF9h%bwMyjY!H$d%FKV4q0OAKqn& zUnHk{4}o){^C~KW+Z~J99W4hW-3qrZa_8Auk?y-WnVZ2`YddZPM?gs_Hw)6aQk=?_ zqD(FpXLG(dk8>pjoYkl}m+RFfT+C17YGE?>OHz1H6wlq9FiyJL^VBJlry1Qv9(c~9 zJI^?J;S$%69u#S^iEom{IS#Dj#-Z&TKXR30B595ud%}sm=eT!xmq;g}72mO4+~=aw z0&ac(typ$JMfs=t1QF`$L2`IFNfF_sMMshn7D|x4Bi1e2Vy4wnOm(nm(GmmEQ8#bd z90y%(^u+uhUwq1oGbdOuW&~c^E%4WAMVNkDBJ{P1)N4be_&Y|oHF5f_nOTu7vX4lc zLtDr(YE5cOEov+bDQnk?js`k(*VAQ?i2);w^_gmG&IkS;d>-b_C*qlW9^%F)0S+t* zc4l#?8{dX`@O`KkOTv8kH8OzJF(IrB4HVBTkaZzJ{23C=#*k1p1%U#A@b?hTuo<4N`zy!f^@7mw!Kl-2+-ssm zhb2k<^ioEi{cYKwREz_#MbI>P%fdlu9-2$HkN9;_>5G{>}8~COPcFwD@ZOOUDLMGVx=L%Tt%6; zZSyx6msTwjmj9PexsHP6GGblAav4!BLAeC=5)wPOIIF3I;&w7}{I9=d)Vl=wa+wB} zyLoy34alYBwoY!YxO#dtKy!Z?MIMNMa1a3^zr-aaif1A^sxi@OnS|YPD&e;T?{a$$ zEN?8$@|Qt*W6ATVNb{h8zx~qv0(=`_xt|vvzMg-Be@Ay`T)f=WRN5lAdb{Hn5}-ax zcn107?CFk)g*mUypUbmnPk8-}xfmMhs=-U;*aNyIIvCrUplhj*zKjO7H&(FR*hM@$ zCo4Ro0#vlQwyhy1Ubbo=Of6k4w9J~IWvWFh4}BHsZJXwXZ$$*|#Uc$#Ln#_s&Cdr` z(tGX@CVe@FKhADuN3JGu=t=orO)j9lsy>ja#DA=auM+eV{p^Nq$792NM$OLwIbUO0NK! zj)B1h`1z}da)0q$0)2%7yh+W7$Ii_Xb5}FG6MRL!uVeAHCA_`rQ%n<_i0PF{tTd79CGx_MP9a z0IZdr0e)U~nCLaZ+PD?A=B*h$qC1C=ZV<)tZWUdA{MaTHInImg9N)i|7mv>>OOYL$ ze&Oi;jhqqX`pE-3NfPCs1aD>r%?Jr}Ai&qAA%a+xonu7ZDI>U>>$Ib#Q9Bhy-f>t@ zJQ4!XaW+QB(Ew|AOLiUDqVvC{ zewVP^%tX{jZM9hP&3l|bzJ*OIzhc*)-?L-gx9r~h6UX-d&d$x>vvJKA9FbA_+kfHg zvCSOX`v>dSe8<+!zY!hjgSU7uoNbJ-5OrF(pC?9bTJh;e@2hi3Agv|RWB6N>Xzi`9 zKI~Y=*x{M#gO$Gxzis*z7avC~tc}oZ+frG6nCZ44QM92RUOmqKEx&N%tazRqe-w4W zQVwqai38hyWcL>2rNH&wJ14NRY>kJfC|7OuX(7_a$H$4n zoJ@G~?=&c>olklyFgp5*sm zKNHXK4;C(%%%5w%WW}=gS^fKm{JH95c5eEbLpy(9-_~!~x&Cvdy_*)ZZ~Kp&J+)J{ z|9m_x)N!QDO`20vl_!=zpm*OMYEWn`?Uu~>gh`}G-z;z1i263BDqBUo zU%q#ZqLO^&r*9zATYg|LXx)t6oBm+mmQ|eGyG}GQSF+~E_c$if=j`@noZPaMD~Hx{ ze(y^5|M?x44zK0Pi4E-C`~#VtL(1=c> zx-sJYNm!?O;MXyMfSySTmizTd!oNoX9-ShwFZ08$+>fB1$s~>~C45L8t~F6;2b$6Q z&5<~@k3h@4H3{`Obe`ImcG1qXiFBsJ#K8nt=g>OY9lOE+dJnB4-PeRE*}+WfluGTy zO0@h$d&<>_nXgYFG(U+ZZsua2Eb68V!ad2KHg0-k4sTD^m}+s2-k3x=Vb6r^UV##Fw=)l3&!!Kj6_GM7pM>!_ zM2t!!eqz2-;`n0XClnJsu}pRNeI!_!T!i#~P8*g*+_-d-$ES$%N7JWM2n*Bw`BStL z4>&t>O0;7xB!+T#R&U;UvxfA3QRH;Xrbx8GLWk54FsOu#{<)<0i6eSo1d&6d3GEX@ z%z$Kqdr0e^2m(7s<5?@xzGDnlB42ovie*KicxJc}oa0JS`yh(KtwbL!k`1qq!N10b zR+V-*RC(jqAq3x=U|dVRaVhb_vqH2j%6+lVcf~Hx1;;{nwa%+jv^{D=3F#80AbC{J z1T`PsD^YDHr#{s|tiQJf=VDJa?_CwBjxF~K>J*{259=1AK)O_L*LVUu$12JBh@L4# zi~31|b2*jK)1mc=3XrD^El|s4ba_a(1m4`Tkoj8|s&P0Z5SIgY%7}6~FJZWZj;7a+T!Y5ra~R=#xz4xDI?P%DoZuhtX+h4X=GT6+_$BT)KCH)WT?{zd4rLUZupP z1u|>)NX8AVr(aDWdw=;k#3LPwX>Hw4-+)_(Rlt9-P^^hD9^Rvg*5!sP2+4 zYNCtS23m;x?m^eSRm5e5k=-?i^=CGrrKd$)VJsmcFU$Jo?){7O>{iK!RZF;j_Ar-D z>?1Q-^y9e0n5jbuNc5vvT#x+4TTn#|iw^!o{P0}D`iZn8ip z?qU7@b!63KDZuWR9z@mfP9$~7p=?A)CM=pwYiC_ zpDfy^6Y~@>SJ3<~P%a_4lxBO)c@+E>7 zPkI#~Z!CGgQvd6){E~v@111gO#*0M|VXgz9IT67vbI| zu}tXVRh~b1&fP~(x%W^Gx%rr*Po8n;DO?b`|KvF$m%*hAaO#*i<{{XzMOmiY`En7@ zmMw!_yT!V5Vh3@a8~3<)`94=3!R6}@;F;_nJ(ffku8Q-C7l<=Q;jHLDpA*ybC&jU) z54t%1b+P{TP3}E^#`(MVL}yUk$Ft`=xgt8+H^u#&7kcLh&Rb@1)G31#^WRdC;4)XZ z`1o{#b<2gTVmooX$G5os;0!z!$2=mg@0>WF=m2wSJ8av;f&BIyj46S22Si$27mcTf zoWFd9hX;1^j_Aa^A8*E$C9}kJt{404XK8XeE4@NFl90-e?zXIr^J0H?1cwS@IagoB z!;fC)!SRhec`VLzf0MY6t$dyw#`4%u5FKb%e8uI=WVWUxs{u!!+&IO9Cx^v-Z{%`e z9Or}FVCpc~C-yxlu1ORwoIWMaFYe*2NHYnn&;6w{=hd$TxFFYwbd}p*6vsNaiF>oA zv&%V>3pqVSx;{~Zj&2p{e(a=tZkzZ#JsS3|;PKi0Ts(D&L;Ejr`p{(_o<7U7J-@-? zxm?IgXRCuFhqALo`m7e|w@*CR^CUZ(ljvebwwE>euBKFo`C3Oa%1zplDH@e2qO+aZ zN{fOvTGZRMqf#_FI~g~lTr9sSI(>Zc9$Pw=G2L9Bx9rSVNBAo_1Ua@!_1WCx;#ExEU18Sw|PHxO#HWD}Xz0UfgtauT=RA0ypID%#WnBovS6#X8M~rf*c9!=swg{_MOpKGgcVFH!lovUb^wbde7+*eoUc0By~ZB8v1!QOd&STZn=72~Q{HLWvW3@_uW zakVTQTgyk|yYSk`Dt`EM96x+HksrUBq_pgtX{=l_S6Q&E`uQ~l#n=Aw2HXC4Uupa5 z4>-ExYc~A)7SlyXp>NMZdiE&6+_D9_23oWg>DWqN3mZ=hHGq$Wzcr-;tNC{4azd+; z6nsqRTPQk!De1L^jC*GW?fZ9T@a%ESSoj9N?_AHU z58lMk&RjIc{fS9Uz|q}Rfov;h2L;1rbh(Tum!Mn@%Bg2=q9A%=R=SEXmw;TWbqi&s zA|bhqE|-z!FT-*<0H_9#H-_dKST6n0B`CLcv{!?ON)X-{hD-1*p}7Wt= z5>F2W%%vpk)&O)(#QDpRJ1{gvNrG)nq_~9T8esk^Ag=jau4@d(8?XCYe%?ynzFz+# z88I!Tf#x1!>M8zq^YKtV!g4T6_W*BP{XDU8br5OPPT5z?oi|5x`0gCDfm=~j(1%=znomp{>LZD>0icc%ipK(TO)aQ^&$)-?bINhZiS)v zR>tB{7Ku@UGv1$WIMoD$}XK%ElA_Aa4S~d4S{9-c-7AN7F*a&|ztG+} zg!j$EwJbtK!v|L-s>t%3epPshy1_We0s9y)e9}X(ix&AX#YYYBXPV(j%#b3yd!*pq zI|Yw!@hU3Svtty#)lrxRTCxAaKGn(9HEc#mfD7KDJTemHk-eq1DEbd6zwPU{j&u3y z0X|+hhY)`oti-mN3I0TfIWcHJHSfMPmGh_fbN+;=A6`75rX-s-O|)=#G$cI45hGEi zSX#9qDJ7iA)5fFKqKUFL(rPQ7bvrF8#rtk6u0h|;1U+X1Oq~qbe{7qAjEuiaoVJij87cc&h^A`?r=k`e+hi}su2=UQ=I@G|y(#`K4g`6+5aQ** znUhEUwy%+@9o?OlUhQzn^gutzM8WbVW=+|+e?6wQ2IBqG#lzJOdkX_B^jo1P?&sRs zeH_{I2M2eqVCTl4IJR#k$M>(|+_68odVV_>PjBY%-rtq?{O)bPuzl+?4j)*@j_tqG zMx0X)bZKhVid50wkYj8Fin5g#PiZRBOy5jjJkKW745`O6BLc$^2R!m3(GhisOQJtk zfsTB>>}%SY>fquo@~gN%ds{u+#PhDMOcnROiapzx^UKc*`02Yh*|_dY{`_N+xQ_2R zuyYAJH+{qIjo)y5?=PG^yowVC{!n&56UPrw&)nHT7f*L1tSwq93!5`%4zci)4@5cM zmZrMe%vKQwiJkoU%NLv%>2Z4J?;PH^gqtU}uy_6UqB*pLlY3Wk_TU8$8HHVC9IYZPh|lz6LXUi2uTCP;N{jrlB?OHqR0DuIr3O+yYcRH=p4W=9$E7Tq zz7zW38R3XQgeg_Cx{}^A3tdkGd{Y8254IKMPy(Gl7=>1(C02DQbb4ztTHdy_Oz6kU^TjUK7rkf`Vh3iBAksify#E

    • _M06a5QBcWKS>fp=6W?5jtDJ}@OD&wmt_~xqn6Jgg9$7f5Qb%Mpo>i}+s@N5%;%YJfvfC1~ z=Wu8|qESPzy5Zc*c=#-PZIWSN@Da!`d=6#k;I~{s!)H|vD(taW(lFYPA#4|9(@Yt{ z&c2!k&x}*QV7&7h-uF&p2`QE%iIHo(*N-ZgfAt-x=XwA@Gb1!Vj^Tz;CGeR88f1ob zgw7Tx0rq*Nhf;Ui`3dhb?CKN=6)CQKpP4ku;UNa zhA?!s4AIH!IP~jq3LIKWJAt$V3Uy+4BMP}Jq zIA8`r1-`^ndNdyg)d|J1$6AAAcNdt~czR0uZ`vn?FqD%}<|#|5}; z4<}Yw=7T)7P8?y(vW8{;(t7NSZ|>-5#mCA6=)uwk>5a_9Z_D3-`*yZmavjcdd%#Il zbp5tHLp8)ZtlzF9EjZM29GQ~c+{~0kH0+s#1^U0s7R$ji})A=WjefT30Vq)q2*A-tSSZ zzy6TX?2B+#$ufUcW4qsi=P0HTWcmvx)0Sou8+D4eIg^Zk77jZre4<8n3LSJ(un_>q zkmKXuB&3ROYVZtD8dBH$*mZQOsmF&B3_Z5wJ9;|DL|Ufs=t>+tj^#G=O<8(cff9ya zU2n!+VCx!8UBcE`Pgu{^S#u=lgMWc+w+nN_jo1P90Tc#GfOARZ#VY^QmJZAu>B5k^ z!A%6E);wka+y5LJgfO4F1vuZvPBDHA))CNAH--zy?kpF0^MBxiDiF&B-U#j@EEjOH ztmy)dP%vD;?~;ZKDA6nzc&~mCfhu#$1>QpLA}kle8c8sWSxgsrQ+N;@l_txD@s^XS zT3IgGg{csh3t82~bOH6`Js))I$uDja^FRJUG@gn zyg21n?*qpa%>Tz8R5IQ^M)Q@;ez21`_*ukI>JMQk9W7hO=4ly_zlos~hg%AO^ner- zSR6zx9#L={zeIMd4`nFTp;D#3mZ5})NMZ1GjCFx|TE`1Zfd*Z=3Ujd3G@@?Ek8CLU zOex2!Lhum{r3pXsu(Y*4OaWGS-|`_{4Bs6mPeVQRRx$tmkn*H2Rvuk=8;U><9oQk6 z<+t4Ced(A2Ap{QX7q{Z?HvHX=zXE(qV6x9AO#91yKPkMqEf{O9UX5)gtIE0t2m9tF z%a|sYEJ@-dx%TFH$@9-o2BMBNYn$iI6W%chMu*_yH+uB$vSiBm=yNi_H!z?!v`Z5# zB(u${>Kj_w$^uxy&qg>phKrWNjg4pvVvx_n-;1BC$aaDQWC^31B9 z%9=`SlbuX{ZyOxm(z&C%GF4I0-m?V>>pW*0wcrI3N&=Y#tmQ6@?SV^$iYeO45I#uy7m_2h=#F^u}AECxoHRK%taEw{`8H zgYWMaUdik>_}U|i_XuzL?2^wUyy;w(#3V7DDv+2&Tjh|>OnN{Rm*JGF(vn{Rq|ZM9 zOx6(wE*%@_9_<|*NcXkNqxDyM-qB?xw-|tCrMTY-XjtxOJ0T+Ug8wV%izBiiTWg!A-CN-LGQxf z-T1o)f7E`<Tc@RX5xt-?A&;nfmJmZQ_% zz`nHN|ExOpmZ}W8RZ5Ah7$|n?S082D_)ip0dn?8QQ~$EUCLic3EOdIhk=}DN)Yfkj z-hx93fm{#|;O{~F?Z%&a&Ys@r^B3RvQCl!2QRq#@vlbuLz=>~IbFqFE|5iv({bc#} z>U4D)|Eh&IO@i=ERTl#Qu5?;>MU0^>cQo~gc^{UplfG+gqbOeH@i3f=f2?l{jR~7Fkk7%BR^~d@*Z1M?{rGzre^g&5 z`96Jhsvbvr%Aw&wG{8gGfWt@qwe7r^BUy%eT3%6}JT{p^2Qt+_;KWE;?jaG?wF*(p z2wK2P-=Yc;RRN+z*@(b&X)DtiLkAJqR;tUjCo>qqM-SMLno4bCW@v<-by!Lp_*+xg zt^7UM2DQ@Kf0d}3bXtK9Wl$@&a^Ux!Ryvm>0997#=ni90cxs1%snW5{VGNa%^juar zZLDTdoi=s^1Gz6zl@cu;2am1Mt86&i>jHez#bZ@M;|dp^u2Ko&?^(#MN}6YQO_dv< zOK107*S_>$dtP1Jqdk9zi{w%afOS1OQ%f1Bqpx3uBRrNjH?E+B)zoCPr$;dg+sl?V zu6ST1kz4R6C=`9DmeFhi@Cm6;{V+Jo_t>r^qr}+?#B?uljAT1cgH0h zAcVg?otJzTeGuL~g1zYR|e=`ZdCleTuqn9KvG%yDfW@&3nn*n*3Wn~s2 zmW9z!JV%GooOBY!CcODRPItt%nzHTllD!*~Wk=#>Uh=%8pB@>>43GMo(*r$tqr$)j z+hLo1e}Rw1NUP)x)dzY*_5FD#ULd@3^xg7Hd6;codQ)azvS$!B$v%na zC0Fif!@y*8V^RT5OkR-Owi&N(s8IaYDa2!(w;#a&`P8GgGLo^Mw*35618F^iR)Z!y zP4OfdOAphFDSGy>^1-F9!SryC-#s|6u{RuGy=ncGBWIX89%Jdzk2}p)FYMQ@rq^U@0MWnQnYGIOQ{b~KH zd@)U?gvZA>@RHb;cAC(@z?f%K*h?TOL>c|ZUdbCcWgAj4W@+`z38F5O$7lPiutt~S zn5TF;w~zSwieKH-L~b3ca>SQn6`FmJl6f?PqQa0(tmG0llnad6^{alD>sYLCD$$6>F5Tu7RRGfldqOXj2sHi2++d zkuKJeYH^vq;W$GEv1-QGRYD6mn>6F2Y9QJMI*^Q~BI;UJeVVJN%aM$pe_8THc;#!Tb;7$MZGYR}S`M1i$9cOHdmob4Pb*-kZ~u9!)p&j*e(aVov+$ z;E*XPn6tERa9iW(aG%Ct_Pig@%tkyPwP@TNq_N+O3dgUd$9mS#$2@u3hJT`$r9RL* z8oX2Ch3#^D3sjb__$cVd@F&Lx`nkmi3R(j%Zzjv|Tm90OWi+yxUskqturEDIBMdcn zIDcLlgJ{(}#_1UK2=8E)EX$0p8tX3`!aVMRq22*%0d$|7pJX*Yv_=cS=ONJAftBf@ zGQuG6EY{+?E6RBtk?;;-4Mt1+%Rp1}(ol7%G`SiR7OqwQuAuUpI&7;-_ALKcT@PVKWJ|@8CYM!!524XprFrdwGBv^E-A3Fwig z)g~V=kdY2l0Xo-)rYfSL)quXkgf_<}s|L_g8yaVI5uit-|50czV1KYjmo;wbF>czT zjF){8RfY%vWp_>hW%8Q=(6iEbDkcib&^H03)F>;)0%cxK3(Y<(AafdY=AgP`>K-E% zjQz^w-O+dzp;kmw?x=Z7ap9c-`Ng$RJ{ma4k$599fN&m`8x6~t{h?=_jsSszY{w4* zzDlesR=MbkRmxp)rA)6Yu8I~{M~hXaxkeU6qg5%o=(=dMu2(KR6_ZX~#98>5l%`^m znyRMacxO-?=m)ssp{TjPTPzzuGeBpxtZG}^p&O{tlg&#~x0B|n6D%8vL{Jyf#Rz;v zClWzDM>iwz#qLN1br?Mg5%g4+AJk7|6e8$KECh8A8x^85G8XC;Hqk?<9OD*DZpd!d zGExi3W(ipn1E~X~S3x==vjinByt5^wF$O|?^cI3(pHFl|s0YI9laLr+Qk1j(3KA0$ zW$l23#Q8#bJ4ld~DHWNd3M#})JbVEQySDyihJ zSD2VoRZ^+m;5F4_8Blc7tE4i$(Tl4(RpiJ`UR(Q``jv6%sUk;iR+yLsRgojNC=8!# z64@xK$eUYDSY*>+*li{(@=3<9+f7(x6JppM-l-k+%ltL#{Ep~{Zxz++J44jU$Y#W- zyFye`WE)}B-3BVMkud5Wuce}~+{ahJqH0?;wUPHKNK<_zgsSYl1WCnNsiOYjJ_U)k z!jN5Fdt(cB)Yf3teq>aXMfV$^$Wp1M>i>YZYN_0)5mPU#sU|$=wKO(I#zY?PmKoT- zKBgu$n^F~2q963+V&y0s*ir_>Bc2|P;t^Q3ag5%+@qZFy(emvZHv;jY073I&W&N1G z0H#dc=$AH{YM`&dU>>l(1Me7eaTJ-jn`~mOO?Yk?SJloY5u+KZJGbtG}JpNe=Ny4|CPkdO|JPbW#;Xf|0=nmATgca z@cC7f78wLwiWV0HT!ola7;=?j(u9z!5|gHdT(y{#47nOH>6DOLBqm)PaenUtUmBd$u%d~PAMq)0aoyl zFZHwpgKl`u1>H32oM^(z3RYo#A$A_H=Yf@nJ@3qdl4}dS>6jXn^_MIWqt^rCzMdBv z;`1J!_bIQSe!h6)&Y7S`5JNx#(d^n%6aG zo;uO#_4H|CGLS5zzIz7owY8Wp&{FEJXHqCR08&_bG|iF`(}Da+Czzg_TsAy7Hsp5< z`h3$eP{x!yVV>=wm6!8amOM^Qq0t;Gtx1@7JZ46Ym2*N8g&IcPGyxF#Y|dq_pMyRK zY~z1eP9+yFrbVE@{6|3>*3@;-tfl+~Qg|PhB3N0A6xUUxus{#UN2M6Q6*8D?Hwo_} zffP~G6iN^$rdmHLmH6JQ8RTPu)D439+Q*bV{6-gqX%ODWL$MnOKYe^cYVlra1^Q$t zb^}!k?^6ZzHj2}U>|}mgip^x!3vX{AbuHm1q$i}(OeTVSCXl*8@bk^n1sM64a|-E3 zc+aqawhEca{%j!4vVpvMmbFzYtxzbF&l&QpaLBIDvp!Xm74QqDA}b{F?28P*;N9}_ zOMx^ijPSn9N_sm9!ytFQ5{k0|A!*M^HQraOP+twjS)r*Q*q@b(#UH(agozRhYkQxWbvrXnKXcUkY|>GuMu8wAPvJ}a~G^ar6h zD-aU)L#cN2^o3BI6$*L!BT`pzp3>W@@P5n!H&1^ONVAL}>YuXKP2;^(imnf}U0+$+cHyBFbGNsNcfy+%rRzT#)6&m1{z?G&V zDVx5 z%s}5DMOkR%)QzO7vd}k4Q5G7-aWko^E%Yr?l!eB_?p9LOSm@iNC<~4JyPZ^vEc6{x zl!Zn)-ASt25RIqyT~g$t;r4qAd4VXNEi|`g1-jQ(xq-2*;=T}J)k4I$%T~F8@s{M> zA42TPh~N)6x~%YU{Xqj`RY`>3?dYi8#zM{QlB4oCBDAF*^nLV0@kqn561eG`t@q6m3T`(u_88*5aGdAjy7OG&?E zC|4;7AGehJ8-~)-%+e<;E&qCoF20L zsVpt}4c3y+pU%>vpI|K&9Cy{KeRMi zVUgq)0tDCpAgd7gMO&2>8lL|+fUM(1l4kIqIJ&IxD5IYS7;Mj`?NosQ3<`hdDzhwL zoJ^P$Pts@S-7j5bmI2hPUxgqm_wa7_Yg^@p#zW~hA;Qi+g#N9gbAw}E;lDx%Wgnj| z7~}v-;N=LtYlfa~zb{xhef(K84 zL0P`)VDuv>z@WCh7GU(lA<&{8zaD7mqY~6J1=?zw)!xPPV7K7^+-o}Jf=p|TW@T#j*GH%y5%)yx#v)pr6LyUi>|QzXIVE zOu`cX$=IVZr4ZXDgPj|+Jcbq-7x6k7bK5I63SnomUpBX~tsR?)dgo&Qh}{1{+dsS+%^R?Cm_3LM)$E3% zA490d6o_}@|J?N^do8e9+M87~)K0>M-LPrzxePahV4Fy=@>gyd;hmY?ob|ltwh!W5 zzk?|J+fz#lClvS;b6;jVA6MY_432g6WpIQ+DA%IGP_(gcFg+^9whs38=mQSsU7GOy zt!clncLb*$%t09siQ)v!iHo_#KM-v`_D}ZqjpFAA4J!T>Wzt+;emr+t5AJJs7K~eP zAZ3W&y_xAA#SZV`^hk!b?gHYK@`_=(xij6l>BpjlIsH;okoAh}sd} zY3fAn?+eDAXhzUQd&k*+WyO|%NfdSW7LI$OaQx74W@Bcw8|PbirO1YnQ7nq~*$C>_xQ+Bm5|cnBfMeSboy3Oh~4g}tf+FhhCq%*p2cM7PFrPX z#qXgE(!kar5KrRIJ5n4!6;T|C`vRN?GNWZCy1`O0Y0^oP3h-IcaYbIigrg>uj5};X zkyq?Z8;?%Y771}cC?Gw6I*1SlhD;*@N(&QBAqAPF1sXBg6bLazvjjd!GeS(&x1sH6 zp@_gmM+-_(aUqgcFk#XpAxh|$Zl;%sf(f&soWVC!gqS%ADsn-HgC_}jGmB(G9D)Gi zP_0i*6XGz5pxfCbr<=nk2_kc*z;esX+5?3+Lf#6I)Uv9{LL8}?Nt32bnheu(r?Q*x zSj41s90=w9QFJ53(L@rkb`0MjS!L5$F|Py>BUvcH`E*M+$4Z$H3rdiV<4WL)5DQD- z{_&)#nk@0U2~$s;S~s;|!pW0cX3D&&vBgrj zC=@PJxY|%8gC`Mdoh>BM3884&OcIYb7TY2rmV|<3$g7h=HgxqAWZB8Kf}ADs zDWO=pOTzk4Xc(C&M1!qhBM>)+Vr2xvro)kGDbz=*PtB4MVreMdF!l7Q>ygT3Ql#1C zWK4%^2^n(iRD(qnDy1WY-K1QcGV2%sVc3e8=QkQlWV9fQXx*0 zEEV;dgV_?*i*~xDn+_=xV(r0Po7T-jZCXEz>-vT&wv;$<0f47#Mu;=iEu216-V&fw z-U{(fjifl=rI`g&iN&X8sre+v6LXeiq$VvHl6O@hdKqgs-y)(Ox}j(?bR)#ZaZEN5 zp@zPBobpwOUUiF5XUkh5wrDlk@6(KoxnJW+H$VodJr42>Yz*lXP-dSanUg0k1~V*~ z*)z$n5zXMhq-t)#V<*BTA+|0Nv*7TyB9Ho7967OA-5{g++TQ_1dbq!@cVG)2kW`)N zd8g2VgpIv)C=x3-Wd`t69nJXt>7gMy zPi16Bf7f8&2(&%DX|Q8Mc)E;?EUBxjOfBI5YHF$~pza5q$gL z#?f_4+rSNujSh{CE?L+)*mX9>1|z|N7K2c3-I(deFYik>4i0x`CW@8;KT5sgV3ew40QkSbqP2~6$;riZ#mmK=}$ z6`5f=lPbJJNMw3X@7CU)Ofnda4(@+qoMW&g3-{{k5Y@;~AC_;7Ad7K26qlMzVK;P} z2F8-d4MrD1Pi6>Xn~3tEdf}#=(;6fdfb8r`9@ky(nk|5!EtMltCOp?O9;LbgSR{UP~szZ2m3erT{xX+Bok3S-NPG`R!-Av zlJx?l`xQ+eo2~DNdcx)t4qqTX0{l=Aq`=V^vc4nG7drZJtgj06;~f2X)?Xgz$2r>C^MraAf|)`$65y}Hfk@`adeG}uuoRR!tfj-Il^F)W^-!DT5-ljZZ^9k`4Ltg-oHW<7}6o``zz5o+v zw!Tozv-IN}{Wvkp(vNra<3+;KAK>T@5WfzS4DTj5`U&DYmi|CTf1r5M(ob~s6U8Hz zev+e~Bz9T)$&P-qxX#i~ar9Hfh^0Ts(Sx`2Qyu+OQE%y|Ir?ehcuQa8=!?WmOJD5h zi$#H@FLCrG;+3!pBLAm5`sv~)mVSn#pCNt*J#|;qrV?U?_`HGl#B8z0;tv-$S^ONa z-QtfB@3Q!$XtMYt#e9pOE2dfeJH-ElO$>gOiWe;YDDjNNA1xlX_+!L%7GEYtEPkHY zVDaB*k|#_i@g?KE*`Y_l(@#?E5tb#Unw?Ne3dxa z;;Y5c7GEQ#So|XKTG)lbzgqD_i?0*USo{g%0~UXxxWVEVi>(&FM08sGNut5xPZnhs ze~LKB;_Jn0c!|`PCmO^H7T+kIwfH9Sh{ZRHn=F2**kSR@#90=-b#jg?{vG~>E4vTLS7g_viB4hDu#0raV7b%PH5C>cQTJd+9 zkWrT>)`?$O{Ce?Ki{BtVZtOZIg9TWdn~?3+-&g~ajwNpDq4WWcs&7 z{J`S-#1j_ZFLqh{fVj-!2gOE<9}+DVe~wsS@xz#jG~*u;ui$N7Umi|g{+7j$iH}?S zR&l$2iP_+(|EKX0rliIHV74LT6JjrTeHA616z5v}7 z#O>nCm`c%CQQ~It9*ciWv|0RKQDX7C#dm1_R$WDjN5%aX|G4P4_^U*X#b1jlY8{&L z<1+De%)aTXC~>{G&*C2zLl%FLsJHlCqS)g1h!-%Mq_3jH-QvR*f4jKY;%^ph7XO$? zTKrz|2TUsIt0=KsJZ15ZiVH3NlVXX*Un%}_fDTRRy+(Y(;x853E&e)jqQ$>o{1cO6 z`YK9XC_ZcP_lc`4{t?k+@pp-d7Jr-g8Yac`Rg}0%+-UJ16CD=+X>qW{KPY}c4MSZ; zi4TigE&dbYG>gANOtkoSi)ZDJer%yAaf!Ih;@=}0E&hF?(Bdx;p9^16ke~O8D=q$m z;uMR&QxsVIt>W3>U6jh>Msc~te^fMC{HH{r#XrDjU5Dxa4{?EJK#LOhh{YEFg!n4n z7s$jA{)+K_Qm^<9<_pEKimzgRoH$hRmoqF{XHW%oZmO5@%TaRMDt-8U_|8riql| zLBJP@Sr)!njI;D5;#G`q$^Q+EpDxHReHEju4%ZAQ@y2k8c?zqqxzJnhcX+=ohY~-F zVI&1Q#S>?kJPu)BPW(GDfexAgoul+kL}z${x|501JwcDfi3J{?n>}%YC)n;dPn<;Z znKTjtg}wPi5$;Mw0cANgyTo4k4TQw8@;r5-bgp({p%7mt3jS+~o~Ec34w-W|$w4_B zoZxWaIUFd51Fa=o3P0;8JIq%o9(wXW@hCRaieIAm&5A!+@x6*aQ}JgjzE1I56n~=P`xL)O@%@Ug zSNwqDn-xE(_|p|Xr1%wdRvGf?N%<{{#2z8;B>oCVj(lV}=zB?jr4XMX`gwW6I^{EN zIlsBw0RExU|ClKF-zlCN1%;#jhUBQi%%f^CKbz>&LL`a8F12r>3zR&i=y4R%n8VmG(q%HqIU`LaiY-wr{Xz1;5i+joDSf=u5jN{xE~OGT8JMJ zg}t9C`dcOcy`q+XE0uqs?BCUne~`0(pzI$SgXJIiNdF+W`~z?K2Yc)vXiooDEB`>* zzjv#0MP_h*K+gFA%I)zUA-G(j{5ho;{2z&e=W+$5{(}-!(#fO2xJOURr)_E zemupCz_S$PdI&r76n`91@Kr>gMn6Op@hw)gNy%FjwfslF!Ty7?|JSN|hxneL_#uB< z(a#aRSBUQrg`Ue3{7b~c|6eP;&hP(GJi2VgAFSwML=lej7k0S)fUhL^(?TpFig-^{ zv{A{ID{A?VevbVIW&d}|HDw7@3KWq@K>k@pzd-apC;!27{=*N>fAD`M9Kuhe_#i)s zDCF!nz(=s`P1YFDA&ISocages(;|E`UhUuKU%v$>A}!JBp{!o__>OoulR+EXa9j; zspNblKf-Mw{%MR~h{CV46zx^=0Y%4?-%qON*U2iKpq$PdoaYqehzj3{QT^G2&T|U< zZ%B{w|8Jt;xm*zFZ;IFTmHP+CxjzGr>nC`AK7r@{;c3-BAih(`Ur^mYtcvpgOyxf) z`+uVlPf@(E`z%q&zo_VQM0d-toRIz}ivK-P@LaE;FQjL0+rL+RN+;J6+^ ze!7yslPLHeqKJR9qQgo)p5l8_<$s;>AC&#SN!2UZ<$4AAmk1AvEEb7})N>U2pDF$o zqTpXwJl7-e$54Er+;4$$y+L@+Pw-rCp2mt3!ofcK586dM;{p99 z+4+DFza)xE^jpPqJiv251o?p!4{)@mjq-uh5B_Myb3X)L_dh2qe5=y8DW3Zwgx{g$ z7byAVMB&fXir%E;cM*MBhC65BZz`8Rg}jG;H_~E!tpoeOiK0-l{!GQ!DIV>ay;km$##)Wmcvg@->{-%if&bOo1)tlJy+556g^+j z3l+Uc(Tf$mMA1tXy-d-|6@5~OYbbpfY3X23P0s9I3gT$i~MUxhZ zpN8%B8^j}@f1zk0l^=L6f6x;Yulv(86hEdY*LUDY@J}lKc}0J#=wB2)Bq8Ie zQnX9a^A){T(T5fNtfIeDbV`8?U#4i2qV0+fDte8gHz@j$q90TA(~3T?=yw$TiK4G6 zI<-*7hfnNs{>)RfQqiS~o}uWNqE{$-r=sI2pHUv~BZ`Lunwm)bEG(y8#J{G-r!R%$ zu`iGu`O57Z^yiA#&qY1{pq1T(Yf$t|MbB6CW<~E;^l?Q$ujoESf2Qak6g^PodrHwp zMbA)lMA1hSeNoY=D*qZ3^%cEd(XT0r&*-t=$1D0FqF=!}48_yDEAhWm{IqeBuO*7~ zo}~CSir=RA2NeC1qWhHoABq-^mv&|mg`E=>tygrdqFWTbQqg-AeO%G6Df)_{;s9xH zg`ycn&r|eLMIR!HbUmv0pDFrlC4WQl4HKlj(-a+4bWG7}6h-u0zdlA35BpCN{V%*H zsC@pGN_W{LY42N8C7p;qkJ3L)QEdl9ACdU0n#cQXSWo#q`!DJ_^c%TehQf2WFNHYn zr~ah+sb7WiTgmP})N|o?;W$~3H&>{7r~SaAUnE|a-)2nw!m)#wMt;8h+L8ZL$?@>x zb_W00Z_ww+9w?8KK=n8QQ=TlJp{O2Tjwd|YE&Kh3viouv-`%8#k^6}LB$PA$?+X9l zSg~)~#dDgUmx!Oosi0ew{#-?`QuITLKBnl`6n#-q-M{Mobfs#4^vzUCXRo514m`)j zLM$d+m>$K~0K3LUGb3UlzUDWY?gHJc@34+{A+KTehsL@F()cisSQyGS4ntxJus+!0 zdj~cSvc7jAeJE`kJ|mD(J9xVAk+f)4mb7PZ+W__z^-#!7hL*R*@P;2l$a{8F9JFmfh$YWHRulW1u_GrlEciQ+{-)uf zg({cQU0uVOtqV8NVOR?*{Q7?EdMo$)x`sBdXc^s-DXqX+?Q|I-gSC{vZ>_C_($9=G zoU?Stinh%aHU2smZ*L+*ppo_p3Uv0O9jne+pI+x@Dt)rzMk4nr0>5b`53N1D=G5}?`YNBkuV^J#f0h#P zZQIy<^P;-7L(3|+we)sno0r}PA52B4^;Q2_Me*oBmU?i$KIf7xmM{<_}5bnT+F-|gC_<;;F}e>n#jtf#pB zj>^@&&GpOI^;K8h2%GrwdU}`BTRnY|B=5>zuPQBVDa)2G8E!lkJuahFaa- z&0)4-7crt57}&C`ee2BG<$Q}wi4n!|n^iW^AJL7Nj z@tx;13uMoszWE4=vF(j}BwIvl+x6B$3rpRN4IRQ)%(z#v#o>mznyM{vD(ah*d3;)A zoy<*0g1vRU3*}zMuDC&mRU*w>kvi;*koWWj2D%scTy<&b zn#?(4nUT@bQj~IEZB2bXTtrb|f=uvfX{yXp+^l>Hfb|x5e&K6lFdg zmMX2lfYaK@Og_!cE_8B3_D~c)pDrppJk^7Rn<;!geM(IDx0(&A(vttON2d7m>5{YJ zmmLZP&!Gn3i&+i^%y1J_XUmb zhW&hoG{M6g_+ysA@Yx!) zE8z2a9SoZi0_5}Tl&?8&^_AuS;X9SxEGQfDc&S&PiQk=@GK=7RI@Tjs1J}u>rf0b3W$Z%HP7wB4$i{ z->=hq)ctNh)ze*7RlcYOVtj{TUHfu+-+wa{zA`Gi=!hAZpzrooK?QI3sY)FT)1ukh zin?%WAwpY`ON;MSKEFGEWm_XX(}o2wO@MYYnH)W)-^(Qy!6zN)wTh ztf`C0NLJKFR3TO@il{*sEN&o>ey_kip_$2ICx-^BRI2YN-`^u)p5EbkC6aTK%#h2zE_FyX+7lO|6&XzH}0 z;*#kzL}SIm@;dC5Jk*<0fDNA5ZkZ6X#GJxIaEmoB!o!LxQS4!FD60;_0-8LpZ)5Eg zp=k{bU9^`F%h7^M-_u$%6IUC9I{+XPw-`A5a2s6O9+q8MxJSXC6`(>No_BE5V4ULC zm$vt52+VkCZ_f=H1gdc#bJFoW;F1wITGMOV`!kr12;5Z;t`%#NHb>xSt*vSAG2qHc zpf2s-eU5)GVU1f-Y*>7^WZxp;-$5kro9F5V^;)@!WzXXo&#>5 zfz!HH2e%6i@2m)%Yme4m=3{Rka8dS7bmFZ-Woe3t*Trqm6Sp@{oH#JQc$@OXU7aWH zxjb>x(1qrcFCD-w&m;ft0d8>~xbFc+bwgjezPRO4iZ!ln8Uz}L8wD<(bUY56*{{Xf zn~bMUKI!eq6L$}A`K0&Pz~z(P+9~;^V<&L=q+=g&QRU{g%V`JM{ejLu7xyS|w68>8 z`qst0jJ3;u)*#S0+)LB)!@W=>_v2}karS1HApf*7N4!JR^TW{@S50}?n{cpPxBO=Q z(HUg<_*aG@(e^yzr8D(5^-qHgor~KG z+{1a`dXAC%NHkQ(<=UH2mLF~paQVdBF;DKNezSP#@Q^(k1RCex9^m%of!lm6$|Dcl zUf^EH19!&)9PY23%H`j2dFIPPAzsTP-sQ*VS6|A?g}5URdrtxPY#zAFQ$k#v2d=Op zy8XKKYP3?GOQ22ataNcW%ssN)zEl|239|7haMV`yrR}-6$<_JcHs^_ZHcwo#Mu?r- zInX%&_T-7H#a^7DJnTIT+~PcNF9CN$9=K7wMExWWTt{7g>HP_CFXv(JxfAkB?_vz} zw&!8*G2o)whg)A-k$IQrVefh1XrH^j^sQ^J_N4sk^G@KVYh$3=-lv>;zYDldyd&vL z= z0Eb6waK+i1*^JMc1gJ32+MC*!v9J1n|$`Z!i9!=D(Y9!@gpEhOSZIl6)us)9L7O?A-#~G(gDS zckrj}1@&Ip+YQ_u6tTLrz2NzwaEn(*_xGI$XZm*saMLkIq%Uo6q2u44HKBjs0yxgU zy}<3!#z3__*T2o}(eGuhe~$zAXoS7L!e_HQHg|;neIti|+kvCGAAQC7H|_NN{5uP{ z-4XUa>-bmruF$`4=J0PiaHZNg&^Z5Ufx9OH=jPu&;G**HCda?a{m{RCIsCf?xLJ5N z(^s5-dq$({f$QIfF?^3MqCR&!{=Ixb=-&@>`1b~IkK&z6U$Oq(8T~wW{o8q$5KqxY zTXkuBHI9F+ILt=3-yZ-Q*FHLdqx{vEw&%8w@(M5VdG7l6FmPw7HcvLSJ>mE_q1xl; zD)lel$6uU(vw_Q}{+$Bc7b!w@>3CiLCg2dN7c>Y|?j*h^61A4QaPsX7( zI-kD_d~7;^yE?+2o6oy}BcJu9{d3bnhZH@gL7*CUzvJIyz-j+}1YDed&jPnQ!k+8j z<~mQDAAxiIdkMIUwNr+F=Q#fL;1Cz>-?wx4HwxU#s%$8FZQAwktdl%(3IWumajt*6 zfZL@(pc>cU_;(5pm(l)x54gDeYXdH7{>An0;Zr>EctpIee`nQ4`$y-En)QzkkG|(U-PId-RQH#0@wkOZ)eH4*zxmS6HI0h3R$u+l@)HsCML*@A7lJ z$axw%qsa8{55P@Fw9nx0#T@<>;!rQDpZe12b^Ut*xTyCn*T2ybkH13c+RN%E$2_rK zgFtn>bS9yhj>TJ1zR*)Tp2VN72k!W^3Ao+k08p2tdWBYXHsC%|oRa2>#vE8I*2x7@*9Zp3@AfphKcH0)9Q+CSIcUc=rY25ylP@3X+^ zc8;m?z@CfSXW(eqrsH*SFB!PmIdHETI83R>+AGANKia=JIdIbr+z~l&r3NmU16O6> zj?95;GH`Qq;5rQ4J96N93|wgr+^B&&DhKXz14rYwxN^J2z)@cohudx7%5vZyGjNzv zkG1!#funhjxOn#&IGRU@!@XqS7UaOaX5eVvB+g#pEn)qmc@B+p+vRlNs6A4DK=USX zxCOxNQaI`t;&9IyxKs{Y->soNOl`;7n|xb{tIUDh1Kd;4Q#z`0;QDS4ahPI`jd#Hv z@_A17Fm)V@+XviP&=ZdOl(>AUx>Jr530Io~_cCz5hMsVBIdJ>#3e$lp+}L<;xjV#R zYBmw%J&|^Ey;n~3EU0P6YiuOxY;m-IJ{5SgVS>0CL1_RRmR3U-N0cAG8Q-6z;)!nl^VFUIdBUM+&TkC&vtXXTV>$3 zq?4dlRe7`VY4xK0B{{fw@EZhCtR+&MXLeFkng2X55BjpV?c zZ{S9A;4U|Cn9__*$4&#cH3#k%1Gg;)?j8fTJqK>Lf!kr=-0{X9;PiOoq8zwq4cuip za4!INgL*Dpl>^uJU>NVUIdGQ)w>%;H`|ESyo_i>Ke%zb`H~oEKytn7TEdVYFJw0dc zHgIk|Z3RyEL-!asH=jFCTRL.reg = 0; + UARTx->RX_INT_LEN.reg = 0; +} + +/** + * @method UART_Init + * @brief Initializes the UARTx peripheral according to + * the specified parameters. + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param UART_InitStruct: pointer to a UART_InitTypeDef structure that + * contains the configuration information. + */ +void UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef *UART_InitStruct) +{ + DMA_TypeDef *DMAx = NULL; + uint8_t *uartx_DMA_buf = NULL; + uint32_t temp_baudrate = 0; + + _ASSERT(IS_UART(UARTx)); + _ASSERT(IS_UART_RX_MODE(UART_InitStruct->RxMode)); + _ASSERT(IS_UART_PARITY(UART_InitStruct->Parity)); + _ASSERT(IS_UART_WORD_LENGTH(UART_InitStruct->DataBits)); + _ASSERT(IS_UART_STOPBITS(UART_InitStruct->StopBits)); + _ASSERT(IS_UART_FLOW_CTRL(UART_InitStruct->FlowCtrl)); + _ASSERT(IS_UART_SMART_CARD(UART_InitStruct->SmartCard)); + _ASSERT(IS_UART_COMM_MODE(UART_InitStruct->CommMode)); + _ASSERT(IS_UART_BAUDRATE(UART_InitStruct->BaudRate)); + + DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + uartx_DMA_buf = UART_Buffer_Select(UARTx); + temp_baudrate = (48000000 / UART_InitStruct->BaudRate); + + UART_DeInit(UARTx); + DMAx->DEST_ADDR.reg = (uint32_t)uartx_DMA_buf; + DMAx->LEN_LOW.bit.RX_LEN_L = uart_DMA_buf_len; + DMAx->CTRL.bit.LOOPBACK = 1; + DMAx->CTRL.bit.RESET = 1; + DMAx->CTRL.bit.RESET = 0; + + UARTx->CTRL.bit.RX_EN = UART_InitStruct->RxMode; + UARTx->CTRL.bit.PARITY = UART_InitStruct->Parity; + UARTx->CTRL.bit.DATA_BITS = UART_InitStruct->DataBits; + UARTx->CTRL.bit.STOP_BITS = UART_InitStruct->StopBits; + UARTx->CTRL.bit.FLOW_CTRL = UART_InitStruct->FlowCtrl; + UARTx->CTRL.bit.SMART_CARD = UART_InitStruct->SmartCard; + UARTx->CTRL.bit.HDX_EN = UART_InitStruct->CommMode; + UARTx->CTRL.bit.RESET_BAUD = ENABLE; + UARTx->BAUD.bit.BAUD_RATE = temp_baudrate; +} + +/** + * @method UART_StructInit + * @brief Fills each USART_InitStruct member with its default value. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * which will be initialized. + * @retval None + */ +void UART_StructInit(UART_InitTypeDef *UART_InitStruct) +{ + UART_InitStruct->BaudRate = 9600; + UART_InitStruct->RxMode = MODE_RX_ENABLE; + UART_InitStruct->Parity = YC_PARITY_NONE; + UART_InitStruct->DataBits = DATABITS_8B; + UART_InitStruct->StopBits = STOPBITS_1; + UART_InitStruct->FlowCtrl = FLOWCTRL_NONE; + UART_InitStruct->SmartCard = SMARTCARD_DISABLE; + UART_InitStruct->CommMode = MODE_DUPLEX; +} + +/** + * @method UART_ITConfig + * @brief Enable or disable the specified UART interrupt. + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param UART_IT: specifies the UART interrupt sources + * This parameter can be one of the following values: + * @arg UART_IT_TX:interrupt trigger after send data completed. + * @arg UART_IT_RX:interrupt trigger when received data. + * @param NewState: new state of the specified UART interrupt + * This parameter can be ENABLE or DISABLE + */ +void UART_ITConfig(UART_TypeDef *UARTx, uint32_t UART_IT, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(IS_UART_IT(UART_IT)); + + if (UART_IT == UART_IT_TX) + { + UARTx->BAUD.bit.TX_INT_EN = NewState; + } + else if (UART_IT == UART_IT_RX) + { + UARTx->RX_INT_LEN.bit.VAL = NewState; + } +} + +/** + * @method UART_SendData + * @brief UART Send One Data + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval None + */ +void UART_SendData(UART_TypeDef *UARTx, uint8_t Data) +{ + _ASSERT(IS_UART(UARTx)); + + volatile uint8_t buf[1]; + + buf[0] = Data; + DMA_TypeDef *DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + DMAx->SRC_ADDR.reg = (uint32_t)buf; + DMAx->LEN_LOW.bit.TX_LEN_L = 1; + DMAx->CTRL.bit.START = 1; + + while (DMAx->STATUS.bit.DONE != 1); +} + +/** + * @method UART_SendBuf + * @brief Transmits datas via UART DMA, the function will return after datas is sent. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param buf: pointer to a buf that contains the data you want transmit. + * @param len: the buf length + * @retval None + */ +void UART_SendBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(NULL != buf); + _ASSERT(len < 0xfffff); + + DMA_TypeDef *DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + DMAx->SRC_ADDR.reg = (uint32_t)buf; + DMAx->LEN_LOW.bit.TX_LEN_L = len & 0xffff; + DMAx->CTRL.bit.TX_LEN_H = len >> 16; + DMAx->CTRL.bit.START = 1; + + while (DMAx->STATUS.bit.DONE != 1); +} + +/** + * @method UART_ReceiveData + * @brief Receive single data through the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval An one byte received data. + */ +uint8_t UART_ReceiveData(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + return UARTx->RX_DATA.bit.VAL; + +} + +/** + * @method UART_ReceiveBuf + * @brief Receives datas through the UART DMA. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param buf: pointer to a buf that contains the data you want receive. + * @param len: the buf length, which size should be less than 20 bit (len < 0xfffff) + * @retval The length of received data before return. + */ +uint32_t UART_ReceiveBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len) +{ + _ASSERT(IS_UART(UARTx)); + _ASSERT(NULL != buf); + _ASSERT(len < 0xfffff); + + uint32_t rcv_len = 0; + while ((UART_ReceiveDataLen(UARTx) > 0) && (rcv_len < len)) + { + buf[rcv_len++] = UARTx->RX_DATA.bit.VAL; + } + + return rcv_len; +} + +/** + * @method UART_AutoFlowCtrlCmd + * @brief ENABLE or DISABLE UARTx auto flow control + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param NewState: ENABLE or DISABLE auto flow control + * @retval None + */ +void UART_AutoFlowCtrlCmd(UART_TypeDef *UARTx, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + + UARTx->CTRL.bit.FLOW_CTRL = NewState; +} + +/** + * @method UART_GetITIdentity + * @brief Get IT Identity + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval IT Identity + */ +uint8_t UART_GetITIdentity(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + //return (0 || (UARTx->BAUD.bit.TX_INT_EN) || (UARTx->RX_INT_LEN.bit.VAL)); + if((UARTx->RX_INT_LEN.reg > 0)&& (UARTx->STATUS.bit.RX_ITEMS_L >=UARTx->RX_INT_LEN.reg)) + { + return UART_IT_RX; + } + else if(UARTx->BAUD.bit.TX_INT_EN) + { + return UART_IT_TX; + } + return 0; +} + +/** + * @method UART_IsRXFIFOFull + * @brief Check if the Rx fifo is full or not. + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval TRUE: Rx fifo is full. + * FALSE: Rx fifo is not full + */ +Boolean UART_IsRXFIFOFull(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + return (Boolean)(UARTx->STATUS.bit.RX_FULL); +} + +/** + * @method UART_IsRXFIFONotEmpty + * @brief Check if the Rx fifo is empty or not. + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval TRUE: Rx fifo is not empty. + * FALSE: Rx fifo is empty + */ +Boolean UART_IsRXFIFONotEmpty(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + return (Boolean)(!(UARTx->STATUS.bit.RX_EMPTY)); +} + +/** + * @method UART_IsBusy + * @brief Check if the UARTx is busy or not. + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval TRUE: UARTx is busy. + * FALSE: UARTx is not busy. + */ +Boolean UART_IsBusy(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + return (Boolean)(!(UARTx->STATUS.bit.RX_EMPTY)); +} + +/** + * @method UART_SetITTimeout + * @brief Sets the interruption time for serial port timeout. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param timeout: 0x00~0xff + * @retval None + */ +void UART_SetITTimeout(UART_TypeDef *UARTx, uint16_t timeout) +{ + _ASSERT(IS_UART(UARTx)); + + UARTx->TIMEOUT_INT.reg = timeout; +} + +/** + * @method UART_SetRxITNum + * @brief Set the number of uart receive data intterupt trigger + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @param Bcnt: if the number of receive datas greater than Bcnt,interrupt trigger + * @retval None + */ +void UART_SetRxITNum(UART_TypeDef *UARTx, uint8_t Bcnt) +{ + _ASSERT(IS_UART(UARTx)); + + UARTx->RX_INT_LEN.reg = Bcnt; +} + +/** + * @method UART_ReceiveDataLen + * @brief Return the length of received data + * @param UARTx: Select the UART peripheral. + * This parameter can be one of the following values: + * MUART0, MUART1, MUART2 or MUART3. + * @retval Data len + */ +uint32_t UART_ReceiveDataLen(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + + return (UARTx->STATUS.bit.RX_ITEMS_H << 16) + UARTx->STATUS.bit.RX_ITEMS_L; +} + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.h b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.h new file mode 100644 index 0000000000..6fdbed0227 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_uart.h @@ -0,0 +1,157 @@ +/* + * Copyright (c); 2006-2020, YICHIP Development Team + * @file yc_uart.h + * @brief source file for setting uart + * + * Change Logs: + * Date Author Version Notes + * 2020-11-06 wushengyan V1.0.0 the first version + */ + +#ifndef __YC_UART_H__ +#define __YC_UART_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "yc3122.h" +#include "system.h" + +/** + * @defgroup UARTx + */ +#define IS_UART(UARTx) (((UARTx) == MUART0) ||\ + ((UARTx) == MUART1) ||\ + ((UARTx) == MUART2) ||\ + ((UARTx) == MUART3)) + +/** + * @defgroup UART_RxMode + */ +#define MODE_RX_ENABLE 1 +#define MODE_RX_DISABLE 0 +#define IS_UART_RX_MODE(MODE) (((MODE) == MODE_RX_ENABLE) ||\ + ((MODE) == MODE_RX_DISABLE)) + +/** + * @defgroup USART_Parity + */ +#define YC_PARITY_NONE 0 +#define YC_PARITY_EVEN 0 +#define YC_PARITY_ODD 1 +#define IS_UART_PARITY(PARITY) (((PARITY) == YC_PARITY_NONE) ||\ + ((PARITY) == YC_PARITY_EVEN) ||\ + ((PARITY) == YC_PARITY_ODD)) + +/** + * @defgroup UART_DataBits + */ +#define DATABITS_8B 0 +#define DATABITS_9B 1 +#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == DATABITS_8B) || \ + ((LENGTH) == DATABITS_9B)) + +/** + * @defgroup UART_Stop_Bits + */ +#define STOPBITS_1 0 +#define STOPBITS_2 1 +#define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == STOPBITS_1) || \ + ((STOPBITS) == STOPBITS_2) ) + +/** + * @defgroup UART_Hardware_Flow_Control + */ +#define FLOWCTRL_NONE 0 +#define FLOWCTRL_ENABLE 1 +#define IS_UART_FLOW_CTRL(CTRL) (((CTRL) == FLOWCTRL_NONE) || \ + ((CTRL) == FLOWCTRL_ENABLE)) + +/** + * @defgroup UART_Smart_Card_Control + */ +#define SMARTCARD_ENABLE 1 +#define SMARTCARD_DISABLE 0 +#define IS_UART_SMART_CARD(CTRL) (((CTRL) == SMARTCARD_ENABLE) || \ + ((CTRL) == SMARTCARD_DISABLE)) + +/** + * @defgroup UART_CommMode + */ +#define MODE_SINGLE_LINE 1 +#define MODE_DUPLEX 0 +#define IS_UART_COMM_MODE(MODE) (((MODE) == MODE_SINGLE_LINE) ||\ + ((MODE) == MODE_DUPLEX)) + +/** + * @defgroup USART_BaudRate + */ +#define IS_UART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0x5B8) &&\ + ((BAUDRATE) < 0x0044AA21)) + +/** + * @defgroup UART_Interrupt_Type_definition + */ +#define UART_IT_TX 0x01 +#define UART_IT_RX 0x02 +#define IS_UART_IT(ITx) (((ITx) == UART_IT_TX) || ((ITx) == UART_IT_RX)) + +typedef struct +{ + uint8_t RxMode; /*!< Specifies wether the Receive or Transmit mode + is enabled or disabled. This parameter can be + a value of @ref UART_Mode */ + + uint8_t Parity; /*!< Specifies the parity mode. + This parameter can be a value of + @ref UART_Parity @note When parity is enabled, + the computed parity is inserted at + the MSB position of the transmitted data + (9th bit when the word length is set to + 9 data bits; 8th bit when the word length is + set to 8 data bits);. */ + + uint8_t DataBits; /*!< Specifies the number of data bits transmitted + or received in a frame. This parameter can be + a value of @ref UART_DataBits */ + + uint8_t StopBits; /*!< Specifies the number of stop bits transmitted. + parameter can be a value of @ref UART_Stop_Bits */ + + uint8_t FlowCtrl; /*!< Specifies wether the hardware flow control mode + is enabled or disabled. This parameter can be + a value of @ref UART_Hardware_Flow_Control */ + + uint8_t SmartCard; + + uint8_t CommMode; + + uint32_t BaudRate; /*!< This member configures the USART + communication baud rate. */ +} UART_InitTypeDef; + +void UART_DeInit(UART_TypeDef *UARTx); +void UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef *UART_InitStruct); +void UART_StructInit(UART_InitTypeDef *UART_InitStruct); +void UART_ITConfig(UART_TypeDef *UARTx, uint32_t UART_IT, FunctionalState NewState); +void UART_SendData(UART_TypeDef *UARTx, uint8_t Data); +void UART_SendBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len); +uint8_t UART_ReceiveData(UART_TypeDef *UARTx); +uint32_t UART_ReceiveBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len); +void UART_AutoFlowCtrlCmd(UART_TypeDef *UARTx, FunctionalState NewState); +uint8_t UART_GetITIdentity(UART_TypeDef *UARTx); +Boolean UART_IsRXFIFOFull(UART_TypeDef *UARTx); +Boolean UART_IsRXFIFONotEmpty(UART_TypeDef *UARTx); +Boolean UART_IsBusy(UART_TypeDef *UARTx); +void UART_SetITTimeout(UART_TypeDef *UARTx, uint16_t timeout); +void UART_SetRxITNum(UART_TypeDef *UARTx, uint8_t Bcnt); +uint32_t UART_ReceiveDataLen(UART_TypeDef *UARTx); + +#ifdef __cplusplus +} +#endif + +#endif + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.c b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.c new file mode 100644 index 0000000000..2d7bc96afc --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.c @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_wdt.c + * @brief This file provides all the WDT firmware functions. + * + * Change Logs: + * Date Author Version Notes + * 2021-01-04 yangzhengfeng V1.0.0 the first version + */ +#include "yc_wdt.h" + +/** + * @brief Set WDT Clk Div + * @param Wdtclkdiv: Wdtclkdiv value equal 1 to 16 + * @retval none + */ +void WDT_CLKDIV(uint32_t Wdtclkdiv) +{ + _ASSERT(IS_WDT_CLKDI(Wdtclkdiv)); + + MWDT->CONFIG.bit.CLK_DIV = Wdtclkdiv; +} + +/** + * @brief Set reload counter + * @param Reload: Reload counter equal to 2 to 31 + * @retval none + */ +void WDT_SetReload(uint32_t Reload) +{ + _ASSERT(IS_WDT_RELOAD(Reload)); + + MWDT->CONFIG.bit.RELOAD = Reload; +} + +/** + * @brief Feed the watchdog function + * @param none + * @retval none + */ +void WDT_ReloadCounter(void) +{ + MWDT->KICK.reg = COUNTER_RELOAD_KEY; +} + +/** + * @brief Enable WDT + * @param none + * @retval none + */ +void WDT_Enable(void) +{ + MWDT->CONFIG.bit.EN = ENABLE; +} + +/** + * @brief Set WDT mode + * @param WDT_Mode : Select the following values : + * WDT_CPUReset + * WDT_Interrupt. + * @retval none + * @description If Select WDT_CPUReset Mode,the bit for WDT RESET will be set;if + * Select WDT_Interrupt the bit for WDT RESET will + */ +void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode) +{ + _ASSERT(IS_WDT_MODE(WDT_Mode)); + + if(WDT_CPUReset == WDT_Mode) + { + MWDT->CONFIG.bit.MODE = WDT_CPUReset; + MRSTGEN->RST_EN.bit.WDT = ENABLE; + } + else if(WDT_Interrupt == WDT_Mode) + { + MWDT->CONFIG.bit.MODE = WDT_Interrupt; + MRSTGEN->RST_EN.bit.WDT = DISABLE; + } +} + +/** + * @brief Get interrupt Status + * @param none + * @retval SET:interrupt ocuured. + */ +uint8_t WDT_GetITStatus(void) +{ + uint16_t ret; + + ret = MWDT->IRQ_STATUS.bit.STATE; + + return ret ; +} + +/** + * @brief Clear interrupt + * @param none + * @retval none + */ +void WDT_ClearITPendingBit(void) +{ + MWDT->CLEAR.reg = 1; +} + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.h b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.h new file mode 100644 index 0000000000..1f3aa40388 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/sdk/yc_wdt.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_wdt.h + * @brief This file provides all the WDT firmware functions. + * + * Change Logs: + * Date Author Version Notes + * 2021-01-04 yangzhengfeng V1.0.0 the first version + */ + +#ifndef __YC_WDT_H__ +#define __YC_WDT_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "yc3122.h" +#include "system.h" + + +typedef enum +{ + WDT_CPUReset = 0, + WDT_Interrupt, +} WDT_ModeTypeDef; + +#define WDTCLKDIV_1 0x00 +#define WDTCLKDIV_2 0x01 +#define WDTCLKDIV_3 0x02 +#define WDTCLKDIV_4 0x03 +#define WDTCLKDIV_5 0x04 +#define WDTCLKDIV_6 0x05 +#define WDTCLKDIV_7 0x06 +#define WDTCLKDIV_8 0x07 +#define WDTCLKDIV_9 0x08 +#define WDTCLKDIV_10 0x09 +#define WDTCLKDIV_11 0x0A +#define WDTCLKDIV_12 0x0B +#define WDTCLKDIV_13 0x0c +#define WDTCLKDIV_14 0x0D +#define WDTCLKDIV_15 0x0E +#define WDTCLKDIV_16 0x0F + +/**************the value of feed dog************/ +#define COUNTER_RELOAD_KEY 0x5937 +#define ITSTATUS 0x01 +#define IS_WDT_CLKDI(wdtclkdiv) (wdtclkdiv < 16) +#define IS_WDT_RELOAD(load) (load <= 0x1f) +#define IS_WDT_MODE(mode) ((mode == WDT_CPUReset) || (mode == WDT_Interrupt)) + +void WDT_CLKDIV(uint32_t Wdtclkdiv); +void WDT_SetReload(uint32_t Reload); +void WDT_ModeConfig(WDT_ModeTypeDef WDT_Mode); +void WDT_ClearITPendingBit(void); +void WDT_Enable(void); +void WDT_ReloadCounter(void); +uint8_t WDT_GetITStatus(void); + +#ifdef __cplusplus +} +#endif + +#endif /*__YC_WDT_H__*/ + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/ diff --git a/bsp/yichip/yc3122-pos/Libraries/startup/startup_rv32.s b/bsp/yichip/yc3122-pos/Libraries/startup/startup_rv32.s new file mode 100644 index 0000000000..62faf734e5 --- /dev/null +++ b/bsp/yichip/yc3122-pos/Libraries/startup/startup_rv32.s @@ -0,0 +1,423 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file yc_startup_yc3122.s + * @brief source file for setting startup_yc3122 + * + * Change Logs: + * Date Author Version Notes + * 2020-11-06 wushengyan V1.0.0 the first version + */ + +#define REGBYTES (4) +/* Enable interrupts when returning from the handler */ +#define MSTATUS_PRV1 0x1880 +#define MSTATUS_MIE 0x00000008 +#define MSTATUS_FS 0x00006000 + + .equ __stack_size,0x9000 + + .text + .globl flash_start + .globl delay + .globl __stack_size + .section .text.startup +flash_start: + la sp, _stack + + /* set exception and irq mtvec */ + la a0,trap + ori a0,a0,1 + csrw mtvec,a0 + + /* enable fs */ + li t0,MSTATUS_FS + csrs mstatus,t0 + csrw fcsr,x0 + + /* Load data section */ + la a0, _sidata + la a1, _sdata + la a2, _edata + bgeu a1,a2,2f +1: + lw t0, (a0) + sw t0, (a1) + addi a0,a0,4 + addi a1,a1,4 + bltu a1,a2,1b +2: + /* clear bss section */ + la a0,_sbss + la a1,_ebss + bgeu a0,a1,2f +1: + sw zero,(a0) + addi a0,a0,4 + bltu a0,a1,1b +2: + /*clear heap/statck*/ + la a0,_ebss + la a1,_stack + bgeu a0,a1,2f +1: + sw zero,(a0) + addi a0,a0,4 + bltu a0,a1,1b +2: + +#ifndef __NO_SYSTEM_INIT +// jal systeminit +#endif + +#ifndef __NO_BOARD_INIT +// jal board_init +#endif + li t0, 0x00000800 + csrs 0x304,t0 + + li t0, MSTATUS_MIE + csrs mstatus, t0 + + jal main + + /* never retch here*/ +__exit: + j __exit + + + + + + +.macro DISABLE_MIE + csrc mstatus, MSTATUS_MIE +.endm + +.macro ENABLE_MIE + csrs mstatus, MSTATUS_MIE +.endm + +.macro GET_IRQ_NUM + li t1,0x000E4004 + lw t1,0(t1) + li t3,0x01 + li t5,0x00 +get_irq_num_loop: + and t4, t1, t3 + blt x0, t4, get_irq_num_end + addi t5, t5, 1 + slli t3, t3, 1 + j get_irq_num_loop +get_irq_num_end: + mv t1, t5 +.endm + + + +.macro SAVE_CONTEXT + addi sp,sp,-40*4 + sw x1 , 0 *REGBYTES(sp) /* ra */ + sw x4 , 1 *REGBYTES(sp) /* tp */ + sw x5 , 2 *REGBYTES(sp) /* t0 */ + sw x6 , 3 *REGBYTES(sp) /* t1 */ + sw x7 , 4 *REGBYTES(sp) /* t2 */ + sw x10, 5 *REGBYTES(sp) /* a0 */ + sw x11, 6 *REGBYTES(sp) /* a1 */ + sw x12, 7 *REGBYTES(sp) /* a2 */ + sw x13, 8 *REGBYTES(sp) /* a3 */ + sw x14, 9 *REGBYTES(sp) /* a4 */ + sw x15, 10*REGBYTES(sp) /* a5 */ + sw x16, 11*REGBYTES(sp) /* a6 */ + sw x17, 12*REGBYTES(sp) /* a7 */ + sw x28, 13*REGBYTES(sp) /* t3 */ + sw x29, 14*REGBYTES(sp) /* t4 */ + sw x30, 15*REGBYTES(sp) /* t5 */ + sw x31, 16*REGBYTES(sp) /* t6 */ + + fsw f0, 17*REGBYTES(sp) /* ft0 */ + fsw f1, 18*REGBYTES(sp) /* ft1 */ + fsw f2, 19*REGBYTES(sp) /* ft2 */ + fsw f3, 20*REGBYTES(sp) /* ft3 */ + fsw f4, 21*REGBYTES(sp) /* ft4 */ + fsw f5, 22*REGBYTES(sp) /* ft5 */ + fsw f6, 23*REGBYTES(sp) /* ft6 */ + fsw f7, 24*REGBYTES(sp) /* ft7 */ + fsw f10,25*REGBYTES(sp) /* fa0 */ + fsw f11,26*REGBYTES(sp) /* fa1 */ + fsw f12,27*REGBYTES(sp) /* fa2 */ + fsw f13,28*REGBYTES(sp) /* fa3 */ + fsw f14,29*REGBYTES(sp) /* fa4 */ + fsw f15,30*REGBYTES(sp) /* fa5 */ + fsw f16,31*REGBYTES(sp) /* fa6 */ + fsw f17,32*REGBYTES(sp) /* fa7 */ + fsw f28,33*REGBYTES(sp) /* ft8 */ + fsw f29,34*REGBYTES(sp) /* ft9 */ + fsw f30,35*REGBYTES(sp) /* ft10*/ + fsw f31,36*REGBYTES(sp) /* ft11*/ +.endm + +.macro RESTORE_CONTEXT + lw x1 , 0 *REGBYTES(sp) /* ra */ + lw x4 , 1 *REGBYTES(sp) /* tp */ + lw x5 , 2 *REGBYTES(sp) /* t0 */ + lw x6 , 3 *REGBYTES(sp) /* t1 */ + lw x7 , 4 *REGBYTES(sp) /* t2 */ + lw x10, 5 *REGBYTES(sp) /* a0 */ + lw x11, 6 *REGBYTES(sp) /* a1 */ + lw x12, 7 *REGBYTES(sp) /* a2 */ + lw x13, 8 *REGBYTES(sp) /* a3 */ + lw x14, 9 *REGBYTES(sp) /* a4 */ + lw x15, 10*REGBYTES(sp) /* a5 */ + lw x16, 11*REGBYTES(sp) /* a6 */ + lw x17, 12*REGBYTES(sp) /* a7 */ + lw x28, 13*REGBYTES(sp) /* t3 */ + lw x29, 14*REGBYTES(sp) /* t4 */ + lw x30, 15*REGBYTES(sp) /* t5 */ + lw x31, 16*REGBYTES(sp) /* t6 */ + + flw f0, 17*REGBYTES(sp) /* ft0 */ + flw f1, 18*REGBYTES(sp) /* ft1 */ + flw f2, 19*REGBYTES(sp) /* ft2 */ + flw f3, 20*REGBYTES(sp) /* ft3 */ + flw f4, 21*REGBYTES(sp) /* ft4 */ + flw f5, 22*REGBYTES(sp) /* ft5 */ + flw f6, 23*REGBYTES(sp) /* ft6 */ + flw f7, 24*REGBYTES(sp) /* ft7 */ + flw f10,25*REGBYTES(sp) /* fa0 */ + flw f11,26*REGBYTES(sp) /* fa1 */ + flw f12,27*REGBYTES(sp) /* fa2 */ + flw f13,28*REGBYTES(sp) /* fa3 */ + flw f14,29*REGBYTES(sp) /* fa4 */ + flw f15,30*REGBYTES(sp) /* fa5 */ + flw f16,31*REGBYTES(sp) /* fa6 */ + flw f17,32*REGBYTES(sp) /* fa7 */ + flw f28,33*REGBYTES(sp) /* ft8 */ + flw f29,34*REGBYTES(sp) /* ft9 */ + flw f30,35*REGBYTES(sp) /* ft10*/ + flw f31,36*REGBYTES(sp) /* ft11*/ + addi sp, sp, 40*REGBYTES +.endm + +.macro SAVE_CSR_CONTEXT + csrr t0,mepc + csrr t1,mcause + sw t0,37*REGBYTES(sp) /* mepc */ + sw t1,38*REGBYTES(sp) /* mcause */ +.endm + +.macro RESTORE_CSR_CONTEXT + lw t0,37*REGBYTES(sp) /* mepc */ + lw t1,38*REGBYTES(sp) /* mcause */ + csrw mcause, t1 + csrw mepc, t0 +.endm + + + + .align 2 + .global Default_IRQHandler + .weak Default_IRQHandler + .type Default_IRQHandler, %function +Default_IRQHandler: + + SAVE_CONTEXT + + SAVE_CSR_CONTEXT + + /* get irq */ + la t0,isr_table +// GET_IRQ_NUM /* t1: irq num */ + li t1,0x000E4004 /* t1: irq num */ + lw t1,0(t1) + slli t2, t1, 2 + add t0, t0, t2 + lw t2, (t0) + sw t1,39*REGBYTES(sp) + + + ENABLE_MIE + + jalr t2 /* jump to irq */ + + DISABLE_MIE + + /* clear pending mask*/ + lw t1,39*REGBYTES(sp) + li t0,0x000E4004 + sw t1,(t0) + + /* enable pri mie*/ + li t0, MSTATUS_PRV1 + csrs mstatus, t0 + + RESTORE_CSR_CONTEXT + + RESTORE_CONTEXT + + mret + + +/* trap start*/ +.section .text.trap +/* In CLIC mode, the exeception entry must be 64bytes aligned */ +.align 6 +.global trap +.weak trap +.type trap, %function +trap: + /* check for interrupt */ + addi sp,sp,-4 + sw t0,0x0(sp) + csrr t0,mcause + blt t0,x0, .Interrupt /* go to Interrupt*/ + addi sp,sp,4 + + /* save regs */ + addi sp,sp,-22*4 + sw x1 , 0 *REGBYTES(sp) + sw x2 , 1 *REGBYTES(sp) + sw x3 , 2 *REGBYTES(sp) + sw x4 , 3 *REGBYTES(sp) + sw x5 , 4 *REGBYTES(sp) + sw x6 , 5 *REGBYTES(sp) + sw x7 , 6 *REGBYTES(sp) + sw x8 , 7 *REGBYTES(sp) + sw x9 , 8 *REGBYTES(sp) + sw x10, 9 *REGBYTES(sp) + sw x11, 10*REGBYTES(sp) + sw x12, 11*REGBYTES(sp) + sw x13, 12*REGBYTES(sp) + sw x14, 13*REGBYTES(sp) + sw x15, 14*REGBYTES(sp) + sw x16, 15*REGBYTES(sp) + sw x17, 16*REGBYTES(sp) + sw x28, 17*REGBYTES(sp) + sw x29, 18*REGBYTES(sp) + sw x30, 19*REGBYTES(sp) + sw x31, 20*REGBYTES(sp) + + csrr a0, mepc + sw a0, 21*REGBYTES(sp) + csrr a0, mstatus + sw a0, 22*REGBYTES(sp) + mv a0, sp + + + jal trap_c + + /*never reatch here */ + j . + +.Interrupt: + lw t0, 0x0(sp) + addi sp, sp, 4 + + j Default_IRQHandler +/* trap end*/ + + + + .global trap_c + .weak trap_c + .type trap_c,%function +trap_c: + j trap_c + + + .align 6 + .weak Default_Handler + .global Default_Handler + .type Default_Handler, %function +Default_Handler: + j Default_Handler + .size Default_Handler, . - Default_Handler + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .globl \handler_name + .set \handler_name, Default_Handler + .endm + + + def_irq_handler USB_IRQHandler + def_irq_handler I2C0_IRQHandler + def_irq_handler I2C1_IRQHandler + def_irq_handler QSPI_IRQHandler + def_irq_handler SPI0_IRQHandler + def_irq_handler SPI1_IRQHandler + def_irq_handler HSPI_IRQHandler + def_irq_handler SEC_IRQHandler + def_irq_handler UART0_IRQHandler + def_irq_handler UART1_IRQHandler + def_irq_handler UART2_IRQHandler + def_irq_handler UART3_IRQHandler + def_irq_handler MEMCP_IRQHandler + def_irq_handler SCI0_IRQHandler + def_irq_handler SCI1_IRQHandler + def_irq_handler MSR_IRQHandler + def_irq_handler GPIO_IRQHandler + def_irq_handler TMRG0_IRQHandler + def_irq_handler TMRG1_IRQHandler + def_irq_handler SDIO_IRQHandler + def_irq_handler PSARM_IRQHandler + def_irq_handler RSA_IRQHandler + def_irq_handler SM4_IRQHandler + def_irq_handler TRNG_IRQHandler + def_irq_handler WDT_IRQHandler + def_irq_handler DCMI_IRQHandler + def_irq_handler ADC_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler BIN_IRQHandler + def_irq_handler POWER_IRQHandler + def_irq_handler SOFTWARE_IRQHandler + def_irq_handler IPC_IRQHandler + def_irq_handler QR_IRQHandler + def_irq_handler ONE_BIN_IRQHandler + def_irq_handler SYSTICK_IRQHandler + def_irq_handler VBAT_IRQHandler + def_irq_handler EXTI0_IRQHandler + def_irq_handler EXTI1_IRQHandler + def_irq_handler EXTI2_IRQHandler + def_irq_handler EXTI3_IRQHandler + def_irq_handler EXTI4_IRQHandler + + .align 4 +isr_table: + .long USB_IRQHandler + .long I2C0_IRQHandler + .long I2C1_IRQHandler + .long QSPI_IRQHandler + .long SPI0_IRQHandler + .long SPI1_IRQHandler + .long HSPI_IRQHandler + .long SEC_IRQHandler + .long UART0_IRQHandler + .long UART1_IRQHandler + .long UART2_IRQHandler + .long UART3_IRQHandler + .long MEMCP_IRQHandler + .long SCI0_IRQHandler + .long SCI1_IRQHandler + .long MSR_IRQHandler + .long GPIO_IRQHandler + .long TMRG0_IRQHandler + .long TMRG1_IRQHandler + .long SDIO_IRQHandler + .long PSARM_IRQHandler + .long RSA_IRQHandler + .long SM4_IRQHandler + .long TRNG_IRQHandler + .long WDT_IRQHandler + .long DCMI_IRQHandler + .long ADC_IRQHandler + .long RTC_IRQHandler + .long BIN_IRQHandler + .long POWER_IRQHandler + .long SOFTWARE_IRQHandler + .long IPC_IRQHandler + .long QR_IRQHandler + .long ONE_BIN_IRQHandler + .long SYSTICK_IRQHandler diff --git a/bsp/yichip/yc3122-pos/README.md b/bsp/yichip/yc3122-pos/README.md new file mode 100644 index 0000000000..760a612461 --- /dev/null +++ b/bsp/yichip/yc3122-pos/README.md @@ -0,0 +1,47 @@ +# YC3122-pos 板级支持包 说明 + +标签： YICHIP、Cortex-M0、RISC_V YC3121、国产MCU + +--- + +## 1. 简介 + +本文档为 YC3122-pos 的 BSP(板级支持包) 说明。 + +通过阅读本文档，开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。 + +### 1.1 开发板介绍 + +YC3122-pos 开发板由易兆微提供，可满足基础测试及高端开发需求。 + +开发板外观如下图所示： + +YC3122-pos + +![YC3122-pos](figures/YC3122-pos.png) + +YC3122-pos 开发板板载资源如下： + +- MCU：YC3122 ARM 32-bit Cortex-M0和RISC V 双核处理器，RISC V支持浮点算法主频 192MHz，512KB/1MB/4MB FLASH ，320KB SRAM +- 常用外设 + - LED：4 个 + - 梯形矩阵键盘 + - 蜂鸣器 + - USB + - UART + - I2C + - DCMI + - GPIO(80个) + - SDIO2.0 + - ADC + - SPI LCD + - SPI NFC + - 7816接口 （接触IC卡，支持3V , 1.8V） + - 7811接口 （三轨磁条卡解码模块，支持ISO/ABA AAMVA 及IBM等标准卡） + - TIMER：9个32bi位 （支持PWM） + - TRNG：（1个真随机数发生器） + - 安全加密算法 + - 对称算法：对称算法：DES、TDES、AES-128/192/256、国密IV（SM4） + - 非对称算法：RSA-1024/2048、国密II（SM2）、ECC + - HASH 校验算法：SHA-1/224/256/384/512、国密III（SM3） +- 调试接口：SWD / ICE diff --git a/bsp/yichip/yc3122-pos/SConscript b/bsp/yichip/yc3122-pos/SConscript new file mode 100644 index 0000000000..1b1c7506a4 --- /dev/null +++ b/bsp/yichip/yc3122-pos/SConscript @@ -0,0 +1,11 @@ +from building import * + +cwd = GetCurrentDir() + +objs = [] +list = os.listdir(cwd) +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) +Return('objs') diff --git a/bsp/yichip/yc3122-pos/SConstruct b/bsp/yichip/yc3122-pos/SConstruct new file mode 100644 index 0000000000..615a67aadc --- /dev/null +++ b/bsp/yichip/yc3122-pos/SConstruct @@ -0,0 +1,40 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM in ['iccarm']: + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map') + +Export('RTT_ROOT') +Export('rtconfig') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/yichip/yc3122-pos/applications/SConscript b/bsp/yichip/yc3122-pos/applications/SConscript new file mode 100644 index 0000000000..9bb9abae89 --- /dev/null +++ b/bsp/yichip/yc3122-pos/applications/SConscript @@ -0,0 +1,15 @@ +from building import * +import os + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + +Return('group') diff --git a/bsp/yichip/yc3122-pos/applications/main.c b/bsp/yichip/yc3122-pos/applications/main.c new file mode 100644 index 0000000000..503513d163 --- /dev/null +++ b/bsp/yichip/yc3122-pos/applications/main.c @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +#include + +/* defined the LED pin: PA12 */ +#define LED_PIN (51) +#define FS_PARTITION_NAME "filesystem" + +#ifdef BSP_USING_INTER_FLASH +#include +#include +#include +#include +#include +static void elmfs_sample(void) +{ + fal_init(); + + struct rt_device *flash_dev = fal_blk_device_create(FS_PARTITION_NAME); + if (flash_dev == NULL) + { + LOG_E("Can't create a block device on '%s' partition.", FS_PARTITION_NAME); + } + else + { + LOG_I("Create a block device on the %s partition of flash successful...", FS_PARTITION_NAME); + } + if (dfs_mkfs("elm", flash_dev->parent.name) == 0) + { + LOG_I("dfs_mkfs ok!\n"); + } + else + { + LOG_E("dfs_mkfs err!\n"); + } + + if (dfs_mount(flash_dev->parent.name, "/", "elm", 0, 0) == 0) + { + LOG_I("Filesystem initialized!"); + } + else + { + LOG_E("Failed to initialize filesystem!"); + LOG_D("You should create a filesystem on the block device first!"); + } + struct statfs elm_stat; + if (statfs("/", &elm_stat) == 0) + { + LOG_I("elmfat filesystem block size:0x%x,total blocks:0x%x,free blocks:0x%x\n", elm_stat.f_bsize, elm_stat.f_blocks, elm_stat.f_bfree); + } + + if (mkdir("/user", 0x777) == 0) + { + LOG_I("make a directory: '/user'.\n"); + } + + LOG_I("open file\n"); + int fd = open("/user/test.txt", O_WRONLY | O_CREAT); + LOG_I("open file ok\n"); + char str[] = "elmfat mount"; + if (fd >= 0) + { + LOG_I("write file\n"); + if (write(fd, str, sizeof(str)) == sizeof(str)) + LOG_I("write data done.\n"); + close(fd); + } + int size; + char buf[20]; + fd = open("/user/test.txt", O_RDONLY); + if (fd >= 0) + { + LOG_I("read file\n"); + size = read(fd, buf, sizeof(buf)); + close(fd); + if (size == sizeof(str)) + { + LOG_I("Read data from file test.txt(size:%d):%s\n", size, buf); + } + } + else + { + LOG_E("open err\n"); + } + + if (statfs("/", &elm_stat) == 0) + { + LOG_I("elmfat filesystem block size:0x%x,total blocks:0x%x,free blocks:0x%x\n", elm_stat.f_bsize, elm_stat.f_blocks, elm_stat.f_bfree); + } +} +#endif +int main(void) +{ +#ifdef BSP_USING_INTER_FLASH + elmfs_sample(); +#endif + int count = 1; + /* set LED4 pin mode to output */ + rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/yichip/yc3122-pos/drivers/Kconfig b/bsp/yichip/yc3122-pos/drivers/Kconfig new file mode 100644 index 0000000000..605a6f0b7b --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/Kconfig @@ -0,0 +1,26 @@ +menu "Hardware Drivers Config" + + menu "On-chip Peripheral Drivers" + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menu "UART Drivers" + config BSP_USING_UART0 + bool "Enable UART0 PC6/5(R/T)" + select RT_USING_SERIAL + default y + + config BSP_USING_UART1 + bool "Enable UART1 PC2/3(R/T)" + select RT_USING_SERIAL + default n + endmenu + + config BSP_USING_INTER_FLASH + bool "Enable inter flash" + default n + endmenu + +endmenu diff --git a/bsp/yichip/yc3122-pos/drivers/SConscript b/bsp/yichip/yc3122-pos/drivers/SConscript new file mode 100644 index 0000000000..665cd1122e --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/SConscript @@ -0,0 +1,29 @@ +# RT-Thread building script for component + +from building import * +import os +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" +board.c +""") + +# add gpio driver code +if GetDepend(['BSP_USING_GPIO']): + src += ['drv_gpio.c'] + +# add serial driver code +if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1') or GetDepend('BSP_USING_UART2') or GetDepend('BSP_USING_UART3'): + src += ['drv_uart.c'] + +# add inter flash fal filesystem +if GetDepend('BSP_USING_INTER_FLASH'): + src += Glob('ports/*.c') + +path_ports = os.path.join(cwd,'ports') +CPPPATH = [cwd,path_ports] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/yichip/yc3122-pos/drivers/board.c b/bsp/yichip/yc3122-pos/drivers/board.c new file mode 100644 index 0000000000..84d2fa3eb5 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/board.c @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#if defined(BSP_USING_EXT_SRAM) && defined(RT_USING_MEMHEAP_AS_HEAP) + static struct rt_memheap system_heap; +#endif +#define SystemCoreClock (48000000) + +static void bsp_clock_config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); +} + +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +#ifdef RT_USING_SERIAL + extern int rt_hw_uart_init(void); +#endif + +void rt_hw_board_init() +{ + bsp_clock_config(); + +#if defined(RT_USING_HEAP) + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + + /* UART driver initialization is open by default */ +#ifdef RT_USING_SERIAL + rt_hw_uart_init(); +#endif + +#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} + diff --git a/bsp/yichip/yc3122-pos/drivers/board.h b/bsp/yichip/yc3122-pos/drivers/board.h new file mode 100644 index 0000000000..879b92ca8d --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/board.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef BOARD_H__ +#define BOARD_H__ +#include +#include +#include "yc_gpio.h" +#include "yc_uart.h" +#include "yc_exti.h" + +#define SRAM_BASE 0x20000 +#define SRAM_SIZE 0x10000 + +#ifdef BSP_USING_EXT_SRAM + #define EXT_SRAM_BASE SRAMM_BASE + #define EXT_SRAM_SIZE BSP_EXT_SRAM_SIZE + #define EXT_SRAM_BEGIN EXT_SRAM_BASE + #define EXT_SRAM_END (EXT_SRAM_BASE + EXT_SRAM_SIZE) +#endif + +#define SRAM_END (SRAM_BASE + SRAM_SIZE) +#if defined(__ARMCC_VERSION) + extern int Image$$RW_IRAM1$$ZI$$Limit; + #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ + #pragma section = "HEAP" + #define HEAP_rBEGIN (__segment_end("HEAP")) +#else + extern int __bss_end; + #define HEAP_BEGIN ((void *)&__bss_end) +#endif +#define HEAP_END SRAM_END +#define HEAP_SIZE (HEAP_END - (rt_uint32_t)HEAP_BEGIN) +extern void rt_hw_board_init(void); +#endif diff --git a/bsp/yichip/yc3122-pos/drivers/drv_gpio.c b/bsp/yichip/yc3122-pos/drivers/drv_gpio.c new file mode 100644 index 0000000000..6fe1047a2e --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/drv_gpio.c @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +#include +#include + +#define PIN_MAX_NUM (48) + +typedef void (*pin_callback_t)(void *args); +struct pin +{ + uint32_t package_index; + const char *name; + IRQn_Type irq; + rt_uint32_t irq_mode; + pin_callback_t callback; + void *callback_args; +}; +typedef struct pin pin_t; + + +struct rt_pin_irq_hdr pin_irq_hdr_tab[] = +{ + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, + {-1, 0, RT_NULL, RT_NULL}, +}; + +static void yc_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode) +{ + /* Configure GPIO_InitStructure */ + if (mode == PIN_MODE_OUTPUT) + { + /* output setting */ + GPIO_CONFIG(pin) = OUTPUT_LOW; + } + else if (mode == PIN_MODE_INPUT) + { + /* input setting: not pull. */ + GPIO_CONFIG(pin) = INPUT; + } + else if (mode == PIN_MODE_INPUT_PULLUP) + { + /* input setting: pull up. */ + GPIO_CONFIG(pin) = PULL_PU; + } + else if (mode == PIN_MODE_INPUT_PULLDOWN) + { + /* input setting: pull down. */ + GPIO_CONFIG(pin) = PULL_PD; + } + else if (mode == PIN_MODE_OUTPUT_OD) + { + /* output setting: od. */ + GPIO_CONFIG(pin) = PULL_PU; + } +} + +static void yc_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value) +{ + if (value) + { + GPIO_CONFIG(pin) = OUTPUT_HIGH; + } + else + { + GPIO_CONFIG(pin) = OUTPUT_LOW; + } +} + +static rt_int8_t yc_pin_read(rt_device_t dev, rt_base_t pin) +{ + //return GPIO_IN(pin / 16) & (1 << (pin % 16)) ? 1 : 0; + return GPIO_ReadInputDataBit((GPIO_TypeDef)(pin / 16), (GPIO_Pin_TypeDef)(1 << (pin % 16))); +} + +static rt_err_t yc_pin_attach_irq(struct rt_device *device, + rt_base_t pin, + rt_uint8_t mode, + pin_callback_t cb, + void *args) +{ + rt_int32_t index = -1; + rt_base_t level; + if (pin >= PIN_MAX_NUM) + { + return -RT_EINVAL; + } + + index = pin; + level = rt_hw_interrupt_disable(); + + pin_irq_hdr_tab[index].pin = pin; + pin_irq_hdr_tab[index].hdr = cb; + pin_irq_hdr_tab[index].mode = mode; + pin_irq_hdr_tab[index].args = args; + rt_hw_interrupt_enable(level); + + return RT_EOK; +} + +static rt_err_t yc_pin_detach_irq(struct rt_device *device, rt_base_t pin) +{ + rt_int32_t index = -1; + rt_base_t level; + if (pin >= PIN_MAX_NUM) + { + return -RT_EINVAL; + } + + index = pin; + level = rt_hw_interrupt_disable(); + + pin_irq_hdr_tab[index].pin = -1; + pin_irq_hdr_tab[index].hdr = RT_NULL; + pin_irq_hdr_tab[index].mode = 0; + pin_irq_hdr_tab[index].args = RT_NULL; + + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +static rt_err_t yc_pin_irq_enable(struct rt_device *device, + rt_base_t pin, + rt_uint8_t enabled) +{ + rt_int32_t index; + rt_base_t level = 0; + rt_int8_t TrigMode = 0; + if (pin >= PIN_MAX_NUM) + { + return -RT_EINVAL; + } + + index = pin; + + if (enabled == PIN_IRQ_ENABLE) + { + switch (pin_irq_hdr_tab[index].mode) + { + case PIN_IRQ_MODE_RISING: + TrigMode = EXTI_Trigger_Rising; + break; + case PIN_IRQ_MODE_FALLING: + TrigMode = EXTI_Trigger_Falling; + break; + case PIN_IRQ_MODE_RISING_FALLING: + TrigMode = EXTI_Trigger_Rising_Falling; + break; + case PIN_IRQ_MODE_HIGH_LEVEL: + GPIO_CONFIG(pin) = PULL_PD; + TrigMode = EXTI_Trigger_HighLev; + break; + case PIN_IRQ_MODE_LOW_LEVEL: + GPIO_CONFIG(pin) = PULL_PU; + TrigMode = EXTI_Trigger_LowLev; + break; + default: + rt_hw_interrupt_enable(level); + return -RT_EINVAL; + } + + level = rt_hw_interrupt_disable(); + NVIC_EnableIRQ(GPIO_IRQn); + EXTI_LineConfig((EXTI_LineTypeDef)(pin / 16), (EXTI_PIN_TypeDef)(1 << (pin % 16)), (EXTI_TriggerTypeDef)TrigMode); + rt_hw_interrupt_enable(level); + } + else if (enabled == PIN_IRQ_DISABLE) + { + NVIC_DisableIRQ(GPIO_IRQn); + MGPIO->INTR.reg[pin / 16] &= ~(1 << (pin % 16)); + } + else + { + return -RT_ENOSYS; + } + return RT_EOK; +} + +const static struct rt_pin_ops yc3122_pin_ops = +{ + yc_pin_mode, + yc_pin_write, + yc_pin_read, + yc_pin_attach_irq, + yc_pin_detach_irq, + yc_pin_irq_enable, + RT_NULL, +}; + +int rt_hw_pin_init(void) +{ + int result; + result = rt_device_pin_register("pin", &yc3122_pin_ops, RT_NULL); + return result; +} +INIT_BOARD_EXPORT(rt_hw_pin_init); + +void GPIO_IRQHandler(void) +{ +// int i; + + rt_interrupt_enter(); +// for (i = 0; i < PIN_MAX_NUM; i++) +// { +// if ((GPIO_TRIG_MODE(i / 16) & (1 << (i % 16))) == (GPIO_IN(i / 16) & (1 << (i % 16)))) +// { +// if (pin_irq_hdr_tab[i].hdr) +// { +// pin_irq_hdr_tab[i].hdr(pin_irq_hdr_tab[i].args); +// } +// } +// } + rt_interrupt_leave(); +} diff --git a/bsp/yichip/yc3122-pos/drivers/drv_gpio.h b/bsp/yichip/yc3122-pos/drivers/drv_gpio.h new file mode 100644 index 0000000000..2f0bd6ce66 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/drv_gpio.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef DRV_GPIO_H__ +#define DRV_GPIO_H__ + +int rt_hw_pin_init(void); + +#endif diff --git a/bsp/yichip/yc3122-pos/drivers/drv_uart.c b/bsp/yichip/yc3122-pos/drivers/drv_uart.c new file mode 100644 index 0000000000..141ce68591 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/drv_uart.c @@ -0,0 +1,193 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#include +#include +#include + +struct yc3122_uart +{ + UART_TypeDef *uart; + IRQn_Type irq; +}; + +static rt_err_t yc3122_uart_configure(struct rt_serial_device *serial, + struct serial_configure *cfg) +{ + struct yc3122_uart *uart; + UART_InitTypeDef UART_initStruct; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + uart = (struct yc3122_uart *)serial->parent.user_data; + NVIC_DisableIRQ(uart->irq); + UART_initStruct.BaudRate = cfg->baud_rate; + UART_initStruct.FlowCtrl = FLOWCTRL_NONE ; + UART_initStruct.CommMode = MODE_DUPLEX; + UART_initStruct.SmartCard = SMARTCARD_DISABLE; + UART_initStruct.RxMode = MODE_RX_ENABLE; + switch (cfg->data_bits) + { + case DATA_BITS_9: + UART_initStruct.DataBits = DATABITS_9B; + break; + default: + UART_initStruct.DataBits = DATABITS_8B; + break; + } + switch (cfg->stop_bits) + { + case STOP_BITS_2: + UART_initStruct.StopBits = STOPBITS_2; + break; + default: + UART_initStruct.StopBits = STOPBITS_1; + break; + } + switch (cfg->parity) + { + case PARITY_ODD: + UART_initStruct.Parity = YC_PARITY_ODD; + break; + case PARITY_EVEN: + UART_initStruct.Parity = YC_PARITY_EVEN; + break; + default: + UART_initStruct.Parity = YC_PARITY_NONE; + break; + } + UART_Init(uart->uart, &UART_initStruct); + return RT_EOK; +} + +static rt_err_t yc3122_uart_control(struct rt_serial_device *serial, + int cmd, void *arg) +{ + struct yc3122_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3122_uart *)serial->parent.user_data; + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + /* disable rx irq */ + UART_SetRxITNum(uart->uart, 0); + NVIC_DisableIRQ(uart->irq); + break; + case RT_DEVICE_CTRL_SET_INT: + /* enable rx irq */ + UART_ITConfig(uart->uart, UART_IT_RX, ENABLE); + UART_SetRxITNum(uart->uart, 1); + NVIC_EnableIRQ((IRQn_Type)uart->irq); + break; + } + return RT_EOK; +} + +static int yc3122_uart_putc(struct rt_serial_device *serial, char c) +{ + struct yc3122_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3122_uart *)serial->parent.user_data; + while (UART_IsBusy(uart->uart)); + UART_SendData(uart->uart, c); + return 1; +} + +static int yc3122_uart_getc(struct rt_serial_device *serial) +{ + int ch; + struct yc3122_uart *uart; + RT_ASSERT(serial != RT_NULL); + uart = (struct yc3122_uart *)serial->parent.user_data; + ch = -1; + if (UART_ReceiveDataLen(uart->uart) != 0) + { + ch = UART_ReceiveData(uart->uart); + } + return ch; +} + +static const struct rt_uart_ops yc3122_uart_ops = +{ + yc3122_uart_configure, + yc3122_uart_control, + yc3122_uart_putc, + yc3122_uart_getc, +}; + +#if defined(BSP_USING_UART0) +/* UART0 device driver structure */ +static struct yc3122_uart uart0; +static struct rt_serial_device serial0; +void UART0_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + /* UART in mode Receiver */ + if (UART_GetITIdentity(uart0.uart) == UART_IT_RX) + { + rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART0 */ + +#if defined(BSP_USING_UART1) +/* UART1 device driver structure */ +static struct yc3122_uart uart1; +static struct rt_serial_device serial1; +void UART1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + /* UART in mode Receiver */ + if (UART_GetITIdentity(uart1.uart) == UART_IT_RX) + { + rt_hw_serial_isr(&serial1, RT_SERIAL_EVENT_RX_IND); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* BSP_USING_UART1 */ + +int rt_hw_uart_init(void) +{ + struct yc3122_uart *uart; + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; +#ifdef BSP_USING_UART0 + + GPIO_CONFIG(53) = UART0_TXD; + GPIO_CONFIG(54) = UART0_RXD; + uart = &uart0; + uart->uart = MUART0; + uart->irq = UART0_IRQn; + serial0.ops = &yc3122_uart_ops; + serial0.config = config; + /* register UART0 device */ + rt_hw_serial_register(&serial0, RT_CONSOLE_DEVICE_NAME, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* BSP_USING_UART0 */ +#ifdef BSP_USING_UART1 + GPIO_CONFIG(53) = UART1_TXD; + GPIO_CONFIG(54) = UART1_RXD; + uart = &uart1; + uart->uart = MUART1; + uart->irq = UART1_IRQn; + serial1.ops = &yc3122_uart_ops; + serial1.config = config; + /* register UART1 device */ + rt_hw_serial_register(&serial1, "uart1", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + uart); +#endif /* BSP_USING_UART1 */ + return 0; +} diff --git a/bsp/yichip/yc3122-pos/drivers/drv_uart.h b/bsp/yichip/yc3122-pos/drivers/drv_uart.h new file mode 100644 index 0000000000..b4f84a1d93 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/drv_uart.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2006-2021, YICHIP Technology Co.,Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-09-09 WSY first version + */ + +#ifndef DRV_UART_H__ +#define DRV_UART_H__ + +int rt_hw_uart_init(void); + +#endif diff --git a/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.icf b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.icf new file mode 100644 index 0000000000..25b66c5fe9 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.icf @@ -0,0 +1,32 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x1000200; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x1000200; +define symbol __ICFEDIT_region_ROM_end__ = 0x1ffffff; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0xF800; +define symbol __ICFEDIT_size_heap__ = 0x800; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.lds b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.lds new file mode 100644 index 0000000000..e3b0df4d39 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.lds @@ -0,0 +1,161 @@ +/* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */ + RAM (rwx) : ORIGIN = 0x20000, LENGTH = 0x10000 /* 64K */ +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + *flash_start*.o + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + + . = ALIGN(4); + __exidx_start = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.sct b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.sct new file mode 100644 index 0000000000..f1add98f95 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/linker_scripts/link.sct @@ -0,0 +1,16 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x01000200 0x0007FE00 { ; load region size_region + ER_IROM1 0x01000200 0x0007FE00 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + RW_IRAM1 0x00020004 0x0004FFFC { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/yichip/yc3122-pos/drivers/ports/fal_cfg.h b/bsp/yichip/yc3122-pos/drivers/ports/fal_cfg.h new file mode 100644 index 0000000000..27aa4acce0 --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/ports/fal_cfg.h @@ -0,0 +1,51 @@ +/* + * File : fal_cfg.h + * COPYRIGHT (C) 2012-2018, Shanghai Real-Thread Technology Co., Ltd + * + * Change Logs: + * Date Author Notes + * 2018-08-21 MurphyZhao the first version + */ +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +/* enable yc3122 onchip flash driver sample */ +#define FAL_FLASH_PORT_DRIVER_YC3122 +/* enable SFUD flash driver sample */ +//#define FAL_FLASH_PORT_DRIVER_SFUD + +extern const struct fal_flash_dev yc3122_onchip_flash; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &yc3122_onchip_flash, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +#define APP_START_ADDR (0) +#define APP_SIZE (128*1024) +#define PARAM_START_ADDR (APP_START_ADDR+APP_SIZE) +#define PARAM_SIZE (64*1024) +#define DOWNLOAD_START_ADDR (PARAM_START_ADDR+PARAM_SIZE) +#define DOWNLOAD_SIZE (APP_SIZE) +#define FONT_START_ADDR (DOWNLOAD_START_ADDR+DOWNLOAD_SIZE) +#define FONT_SIZE (64*1024) +#define FILESYSTEM_ADDR (FONT_START_ADDR+FONT_SIZE) +#define FILESYSTEM_SIZE (128*1024) +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash", APP_START_ADDR, APP_SIZE, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash", PARAM_START_ADDR, PARAM_SIZE, 0}, \ + {FAL_PART_MAGIC_WROD, "download", "onchip_flash", DOWNLOAD_START_ADDR, DOWNLOAD_SIZE, 0}, \ + {FAL_PART_MAGIC_WROD, "font", "onchip_flash", FONT_START_ADDR, FONT_SIZE, 0}, \ + {FAL_PART_MAGIC_WROD, "filesystem", "onchip_flash", FILESYSTEM_ADDR, FILESYSTEM_SIZE, 0}, \ +} + +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/yichip/yc3122-pos/drivers/ports/fal_flash_yc3122_port.c b/bsp/yichip/yc3122-pos/drivers/ports/fal_flash_yc3122_port.c new file mode 100644 index 0000000000..c833a4546b --- /dev/null +++ b/bsp/yichip/yc3122-pos/drivers/ports/fal_flash_yc3122_port.c @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file + * @brief + * + * Change Logs: + * Date Author Version Notes + * 2020-11-06 dengzhiqian V1.0.0 the first version + */ + +#include +#include "board.h" +#include "yc_qspi.h" +#include "rtdbg.h" + +#define FLASH_START_ADRESS ((uint32_t)0x1000000) +#define FLASH_SIZE ((uint32_t)4 * 1024 * 1024) +#define FLASH_BLOCK_SIZE ((uint32_t)512) +#define FLASH_END_ADDRESS ((uint32_t)(FLASH_START_ADRESS + FLASH_SIZE)) +#define FLASH_PAGE_NBPERBANK 256 +#define FLASH_BANK_NUMBER 2 +#define FLASH_PAGE_SIZE 256 +// #define LOGOPEN +#ifdef LOGOPEN + #define YC3122_FLASH_DEBUG LOG_D +#else + #define YC3122_FLASH_DEBUG(...) +#endif +static int read(long offset, uint8_t *buf, size_t size) +{ + uint32_t addr = yc3122_onchip_flash.addr + offset; + + if ((addr + size) > FLASH_END_ADDRESS) + { + YC3122_FLASH_DEBUG("ERROR: read outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -1; + } + YC3122_FLASH_DEBUG("r_ addr:0x%x,size:0x%x\n", addr, size); + qspi_flash_read(addr, buf, size); + return size; +} + +static int write(long offset, const uint8_t *buf, size_t size) +{ + uint32_t addr = yc3122_onchip_flash.addr + offset; + + if ((addr + size) > FLASH_END_ADDRESS) + { + YC3122_FLASH_DEBUG("ERROR: write outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -1; + } + if (size < 1) + { + return -1; + } + YC3122_FLASH_DEBUG("w_ addr:0x%x,size:0x%x\n", addr, size); + qspi_flash_write(addr, (uint8_t *)buf, size); + + return size; +} + +static int erase(long offset, size_t size) +{ + uint32_t addr = yc3122_onchip_flash.addr + offset; + if ((addr + size) > FLASH_END_ADDRESS || addr % 0x100 != 0) + { + YC3122_FLASH_DEBUG("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -1; + } + YC3122_FLASH_DEBUG("s_ addr:0x%x,size:0x%x\n", addr, size); + if (addr % FLASH_PAGE_SIZE != 0) + { + YC3122_FLASH_DEBUG("ERROR: erase addr is not page alignment\n"); + } + for (uint32_t i = 0; i < size; i += 256) + qspi_flash_pageerase(addr + i); + return size; +} + +const struct fal_flash_dev yc3122_onchip_flash = +{ + "onchip_flash", + FLASH_START_ADRESS, + FLASH_SIZE, + FLASH_BLOCK_SIZE, + {NULL, read, write, erase}, + 8, +}; \ No newline at end of file diff --git a/bsp/yichip/yc3122-pos/figures/YC3122-pos.png b/bsp/yichip/yc3122-pos/figures/YC3122-pos.png new file mode 100644 index 0000000000000000000000000000000000000000..b3040fb879963bb618b0ebfdc5597e67d6ab0f60 GIT binary patch literal 2260454 zcmeFY1yh?{*fok4cX#*T6fY9oy*Lyv541q=;t<>+SaF9!@gl`NxD{`aK#&5(-42hu z-}%nW`xDNd$z<+KX6|j*+Ur{D+R@sYN;sI5mb!g*y6Y+d5o#u>_g@}R9Aq_Q5fJJVu^y~YU!E~sm5tpI5J*}6{vfL8GM^wIJeR7- z%j)}B96q8Iuo!&f!CZgty#Ld7oag@LxBprg2ZkesM^Hfo9_ZY->ysy1gH3iZ~hwR ze>N4)4v+ZX+R(b7ka11n|I$vq@ifw%-v2M{;g?)0obrEbLD$o^ZU6gg-u(Zs`FGNS zkX=DR(T~5__U^eezP)~0*r>CN>Ix(@%I^vK(SnAh8=<}yp;IT#nc;t&A)Od{Bqw!U z*t0GbF>(J|NQ%m~#wQD)nl8N~C8lLdJxb2C^7PH6BM_AH*UL)zzx8K!X?-Q$)(z1* z%Y8^6856&CT%Kzg8e5MPeCp76GI>yP3^=>iTAN!8%l!rTvCwd3-R3jA+f31u+?sOjf)!Nd=FgEPnx0&a8c{N31A6e56I%NPiEZa z3<`2C2$Cel6$Y~>exd+#Q81e^OgtWk)AQQJoTwWXLI{W-j|F@og2t#*qx8eyC2pG{ zhAeTixRh<9C3n^Hws@!9GIu3UEytloVVjAslLG`Y?sgK#X&6?Y{nh{8gAWe$;`%WM z7NZkA?Dp(>wr|cE@&&`=?zk;dJZH^5zxXPLv{-? z!_cAS*(Kn<1*Y}}v2?{s~~8)^q_nvYpV3PbP{q&9i&uD~7oD5b{+Jj}ie zZpMaW`=PP&^--nP79~O`Z`_O?y6B|wA%#R20Q5~ zi91hk#vU`kfzaZ|#1DUWGl+^VwNvW0%3>``YLw#HC0Q^4Tx(`WV|dVl&L`((c*{F6 z&(qj{!udV6gZKuJl#v&3#Q1^Z1LqOEd*DIHcnytVEWjKZB>VfIDQH>bU(gET`WL2# z7=rOjNBwl8^one6ZNHG?2jGXnQsvvosq&e}SZqUvUdH7O%VmkMp|kqqmxCpx0=ZZ8 zvJAQ+*qL3AOgTKqP+E8W!!-6tKHJ5g?HO|)bp|Vs0-ZM8L+5yQd)+uGDT7{Prk7ic zLw!@u;Im#M<6G%1YEk-8H(#puxciFpWOXW|KS2JrTOoaHx0`uP`VZF2WW7vR zx5E1dv%g~+Uj{o~YPKD3KVa{ilFZtSUQv-wXAOWJ*xzK zP|3ez_S2C?f4{#aW%H;lGs;nKQc6o0p&)r!(veS{sJO;kE=?+JMNP!H)1*R9NtusG zEdd0NWyYj8?8%avgUwie#`yDs6OtsJd>%8a2^*9OMo3?}Gli5)Lw9uXdv!B|S@&uE zj8Mxq0a_I0z=V+9FrrkzC=h#KJ&BwF+y+p484jOT<*?rvJUP|AI;dIEwrD-Z8oS~* zeyZ=dI<2R@cVtU?ypI1bW-VZYW2__K8`=G`{J!B&PU}1py-#=Y{~MOUVN%tMK(wHL+wR9{^(d5~LYXc(Uc)7iMM5yMqf+Ky{?EPl>vR$|F>f)wSbU z+TtSE2Osr&C3%gMkXWrLr3a-jKQq6qk#X0v)Xd9qGd+D{`tRl!!X>yvr)SU`)YEN7 zxtFhgZt>^6zEwm!{-soNmAqq77S*u-7c~-O>B{;+r5n8xfRc|NoD~{`ke)QsMb=DB zzOYz6>q3b4(_qcG3$g9F{`A=eeVH9CYb3;;j>f*Z7B}EB$>`7;;r@~@jm(%1%$Fg~ z7225jHw;(R2zU($>OeW#u6$Xq2)5~n;9cb~w)*bV>K9UUnjbD+A&?)T7gd}T>#jk> zn4?@4LQcTY_aLE+0+Wx6!e^i>{7AosQt}&Di#eK{;4v=h8v;hNT*{FRepb^ghP=bx zTy&GtKcr}A6Zc<6Ma{^pt0J0!3PI#jwHfC*ks}Q+iS}njmN=j{sKa-skyj;U>=-h` zI%Vvh+I=T(hrV9vc9J}qPQXiy&m)HJONwNNRoD<+=Rj{P^lk^|$_X(`ITKG*9+#v& zszU`?w+1!QW@9=94x?Fb`DNytPA0&a(53~+uCpPa&)8~Z9vI_+en-!G2O3u_?r2D$ z2uaGj`%)V;XfTwJiUxF}KR9a##QZ{JPn^`nFc!Qdv%R(S0i2yb4K@G00lLwAZ)5e5 zqOeYBdfYRfh`sZkaDMuoE&FVgxSyUxJ8WUV_Kh93+OiyAw^^2Kn*HaEng%{Q1HL}~ zPXI~(Ga*UPY*YWAyS-3HpTE|GBn7Y6hho{Lh8oYywnmmyPcL#ReKt#sefA+l^OrNJ zI|!!2jX0@4P=O~ftJa45@d?I0FK*pR5(@72edg_0x+l0zgW1@}fAFs#@qYpa-$oWY zMq2>v!TAcJc9O!89|!r`-9{Z_jOEoEx_QTkQT3i7qa|rd3~Fa?>&_A{hvayVR2|yi z<(6~-U>>Egz`05dF=GgK7C?fSZ8PaWQeORxL!N6|I+htYvB~@6;!F*=_z?Ldimmv{ z(GXT2yDK_uB^9}p{#B+7p~(aBO#^CfempgfZNj`Z1l{Sq|0~x+4>Yj^(aGN?g_`lP zrqoWC3hPt+G9Rs(_#((lrH}Ve(Fv$MFO`ZW6aYP~EjZRC8=&#;CqYow2f+M^N zUZbGk6y$y~rdo8BmFPa$Lltii;VEjL>!zJd`tI={v1c6sUm5z|?EaYHBqvz+fvwI; zFn!$v>-&1(s`Tq0s{JZMNu?h@dsS4CR#L%j$#S(IWM8EkerCW;y#C?()VTlWXaqAP zAs2^QQ0lPZw(KF`S{Ze*xj-V!I5om};xP-Q*w7g=fbyca=oC)VQFEd<%8J(?<|h&O zDHl|(QVEneh!mFN&IAdt`fz48#v3fvSW0v;ptAYd-&bYz%n1VTsi@G9fs&)W#h_N} zfkpxzqBLw+-hhi;r>*Iy9Ghv|WjR(-ORv{Y9;3H6zpCfl;H_CchuQ1H$nHB^$wUs0 z?;qxGwmNQG&vVY*#+G-t2FGfER=4)~1*60pmk~)?%*4h#yr4TMiEkUTgX9HG1i;28 z$j0>V!*M-K{C(!Z$f(2VMYo#y2BvCyC-LXz)~97~stgO6TrW=VX{cGd zpKs|OyH&FRwMaH~#`FB({kx>8bS3kqU}vaI*PGzU#r1(cu3B3Ouk&l-)d}E`CR5fo z$VVny-$^eL9UiNL?dn{qh7PTo<64*hIN00&mxGN-EFasQET2y+Sw6n7EF;M) zb--s=fxMj8BzO~4O6t>#Vg3Q21rGpa&@0kJvBUrnZeHFeVcO50ubxDAJ${N@>xWBE zO4Hy4JyI7KHw!f;I!dNvBRg`1ZA%fl2H9-A>q#``i5$4ghri=tb79O-Lw-xGjJ2HK zCn54H&cOTU*0IO?k2|lG)s{mX*lwLMN#rP7uefN|o zbtnOegk>M{7(M+U`t3DEu|}eARU9x(ayK9#kUqzJ|8eouDzZXO5E6|8BQgZ@jM+1 zvJ}0Pa@HGNkO~867Y`RFR)a~LT%S1{kaZ|`e_7E}haHGQciiu3$k4EWN&Vx<5n7pK zx!9P-L@be>BXvB4O48F|PCJuwR$Ht+>HQRX>?L8!CbF3%ax_xegvg&gXa32wvU0*x zz+y?R=mg8X)A4AN_lVPjx2aLZhj0VzM|qCoC>jQ1|0#KC;@E`0#gJ3uLg<+*iuaUd z&o|A5_KNNu164i&R`E}AuEfg+g%GzkMa)eu+S#X-N?f{0jF3PdV9x96j-brzZd4|R zimIa(SJi~joGhkwzgdeAgpc`BVd5yB5gzKDGI%Uubvn8N7SOZM$C2jZhcz-2wb}Wz zzhUVm5vTc|(~Dh{qTp~^=0KtJD+X3==PT3WHo85G*^>+SD@qKlOH>aH*svpllECWJW|d?i=WibJk^(V3dd%vnuY;Z$*IXFb z(CmHfO7x;16JohSb9(DDkX2FT^{fWeC{V?I z=nXlozYSzF)d#n+n!cc)6qdeEQ)`Hy!xY+gjv#8Z$^_gc3M>}YGO(WRu;-H5?>0cu z34toqLDlsT>9D%k;*KVvu937#UF_kwM@Y9?+B38|-kRZ>0249{t>Y);cyODPEa;qA zr!k&n$V6v9cBg_Tj)3MAmLDEsW8S&0ITLsRzFb z{1vc|5g~{~*;jH*Y5h&We#QMW4zzQP?PR7AmfV0Ba2=CTFZ0{5L1T^gQb_ts`A@E? z%QSeZ-M#xoKyA(a*+a$0pjVaU1+{UrJb^D-3ez>TF<}4Fw^Z2};vK)0`r)j4-7!~}zfI)yeE*<*)AaXyC<$$ckRs324zE83IC{w1FoG;EGsX-2`Z!hH%%W~a~M zJ#8nfRY1M9sCn{ck&jUr!0d>eDhV&2I;WtNKFht!3yM`ra&CzybLV`t#f^eTBk5D7 zSX65(=B!8ab13iJUUzkDQ*x+&vMXs65*2HC6mnPI&Fq5MS$qqg58$))O&i zicM&SlR1jWb1r;blyb}N*AhIqoH<3GO=0^iLsib)86S2S{q#F7U3s5e7ZyYAK0&SQ zElS8f@`U7MC^C}4AIr}0iHd$@VBK#|N*QlY*(GmUyT(eMx70giCd%LvPVBI+&mVVH zpR4#iH~RBV-8lvSm-B5v3Av~A6)p)$-dkTijna{uQS+coix@$W`nyzY)J$@AW+2aVA+Hm%30 zlv%M2ntAW)$RA3+93cM@7m$mkpF?A1fI9K6f}zOAyq4fp zo>0tTjTGN#hc=l$ROsg)Egwf()B3k;5C3?Z{UgFj$b1Hsa|K6|=G1ukG0<-gs;ZV< zDC+)pP8M<@q5(5fnJHGpLP#3Yli&)L>rhkw2!X_ym_0W8w-@+IvQj~3$Lb4G3qZ7?aW+vO4{gJsEVgp%xdW1sUNAe2Ul}LIS9>u zjrot~JnYCx-3Q%Ye^SJy<;rZ?&idK4`zVA`Ks${3DsRHCBHxrE>~gXP-ucDq>c`e{ ztEQ^-f&r zECJL3Zmz0urk8X)AR#(wL6n&@vt`Ga%!s1rUP`L+C z3L(prEQfWd8kd;CUe1skA?7u%)0woXL$bgwyT~bJa|4P&({xpS61PTWc+Q8aQ8sw` zMK#J;j&+vq7l56k8YM1YH1n~VK(0EFfCi4;y=C)`01lzgSWxW3R~k$fP;1x5(1Pgv zbzCaI^C2I+I{rjbn*GSj&wQQ`0(N3D8EveMeOR$G5wc2wneU~V+*27wVhv~~_5api zy=vZgN-e9`5I5>h`sBOiVmZMHQ^z%r)1Qs{)ch9_9Pw~_-j%>Y5Fk(Y9^&Rq1`f7g zH-Q5pg@Ot_)KN&&K;pE4bC=33~C2RmGj$+XFS2>vPhuy{r92t9nC}L0FvyG|9tQN{sr_k#)+VOJL zTUr2N@n^v{-?MGZM(HiAyvm9?a;%*Tg+&lmiPLQT0AYXw!x2M#wNf2uV~2VzzMGEi zX9nCki*){Rf6fOg;dtAGbL&CWAYdm2iV{Z=oLam=0i}`ljD^gO@>`k^)nXxa>QMc6 zqbtRi9NJl!zB_SjjIsOqT7(Ceb(^JBOB5vKrmg~5Xi~G09Bx)_xGrQ1~EBjYMNpT{u~f`6&}xF>If}N+!WYV77K17(*?=R z#?)PJrQw6M)5(%SBn=j}u|B=NUM6s>dc4vUeg=p$#MV#+JVO9OwGzSdj-hYwy0l8YX4aUn`_02{rrH*`a=cVSk!F zDef<&Q1^>Dp#MOjj96wU{LekZR&F~#B+g%hkL;0LD8AB@^u9!|_j_%7aHjjnTT-7lEP!ShP zuYa%0YD-XIJ8ysvx@-_-y5wLS$@mku;7 zsYRad%)9PF%puAQa-t2k1SkX;d;Xp>jclh>;a#0rFJrI@kLj<*5@#Y`_hf-SJtejX@oZfC(C!o0$FQzh{+m=){V1{F zHd?odG1n21TmeFW%_wKjWV@M7o3QS#Uc={utd2v-Yh~)hqyoa_kt>Ny=4QIf8+jDX znIaXt`p1}?H&q1z zlBpLL3_lCEXRY5U>`YuPinHV=TSW!HReMkiYzZDLBbz3Y4~9fnRlBEUz7? z#xKp7bkeD2tuDwjpq-fbo~(P<0Md)!ZRmTlMxIZgOq=p2U+xbPN@gCtGB}!@VU< zU|>AXaKo*B5rR9KlK8MewcBKn4x>EcT8<~0t;g9Rx4(7>V~u~!^&Q(uls)iZe+=0t zl1n(T$`Xz zJ(90p3ihZ}dcy>E7c!Mq1V~fL;h(9;NuL4;7cwoQ4GGo4frBBvpypj}5As((QGy_+ z`d0QI@!MR9V)jMVSM`q7z-yZNlF%B9$QJZl?qkb71x-3qWuO&f&nGWeGkLL^abXCT zqr%U~+m4P}PFLj%$n5);6(h-n8S5N7@At?%I#!?BTqESTaI55zf9xyPE{8K8^fGHh zi8tV8OF|YOvPFh(xz9^9;)JA!wpqet=R_D4S#V}tQ79(IqLhkB#K0gc6eGHYlmNLX zL=`y`=p<-XN4~V{zuE#fA=tU6-)fqwQjaoLu?$~486aA|_J2#; z|5hh?e%~Lp5^0#~ULlVN)|Ln`wAi)wugc{TAbX&pRIdNkW)Jn#W;kYg2x=nSGTQNh zc{>{ZCbcmS(6#u@^AI6z(cM+Y-D##jlm0?vv)3#;e}rzAOXW! zS2DWcrMsUci}KgCflR5~Nf}Q{ZM>P)guP}5x8olJ3((z&uVQ|41{8UH$WkB%G&|1d zf!oA|5-uUl1iIZWyU9rsd~!Y>Yqpo6W!BnxI>KKB8V(t+OKM9x4UEArW{+9&+kD!& zzpb@r0%GH}U$^|rY5|gZMUx|!U$-Ibss0Uy7wVQ$$8)`A&vsu$xdv>nbJ4xrMC;kB z*jE+ep&4qUVcCfcxn2bBZ3{CC1iL8>n>v4V7bFlN_=IqG}~sE@44Heio4tH2pg;>)nPO7++nk~?IHJCQYzawM-&Th zLW}?}S2QCtQOO|}tYn`LM%x{K(MYp~a@rpJYE+L;jp^i`(vMNkoY!}|{PObx36HZA z{dT7Y->}{Kss?IJK@I>v+c)IX9eKvsZYPG_=XSQTDA>-rj9Y`&00uQmzWG174C&aO z*m}-R*Vyc}2G0dqZDvaLjfC7t^RferI9KU*>ov!>1|0?KT}Smh#626nAI}h#{wjmD zQOuogt2YxJw_h_iPj#3`iU*0(idJG?=jv8TSDhAAmbv`pO8J;P$%S-UV<;`HNpp~Tgh5nZb5!g9HLWKDgiI_ z5f70ZOq{ZYq}@YRv1+Z3u(=MeL&BZUiYCM(KG|nxiQ;aQq18+{O`*mSxlLBH!7)7w zB3N2P#H=_{yo(bK*|&xgaYi&ieymsdn@2Br6jly40#KM&E29ruV@7nmk7W&5bYC8{ zYFMKvOT{@krpFm#1_4=T_g))YRP_ig+20c5EUJ@dfza#y(ayIU36+d3W=F8ND66Rh z0H(wi91-%Z*`B9jvwW+?^zEnvVWK0Hq_Y)EXQ21T!?wQaQ3C<5n5hE(7AH4lUNk7X zTiQ+7>mey3WE06_Fg{72en&IvnX%-w-Qno5wai#2aNr9*9dJkhhati4XRJd@Qax;* zZU2g(40wat%RP1Zi;GuX-?H zJoVn_*NG?(I0;AJwnZl8Y*3zTu>|2fDUeV=JoPIy0LC6@^Bo$*4Wxy7!0BeIrI*E-*@rNgz3vl=fMAb_)8)y|8Or4@RA zl*&n(Y`=2W2i!)lDi>D2lod9KcJCIwRcnhkLp`-d)$ywGXR}jWaUn~tWK6tM20gQ& zTAi>8h7pbx_KntcaWa#R(eo;nJZ}4uAWfwFk`6TKGHlcO89Sa1x{utxwQ2%`b*@dG zun7L~@~G9R*^PP5#z1dsPTK+`g!EiBMkUlpvE4Y6Bqdq6h<+I8*{LPNNq&p@u7a%w zH(FT_L8$yvgxhz?n7UGmH`Rj;1`T^fnzQO{i*g@06-`G*uZox@8aP>+vM_$ryN#Y_ zI^S8ZKz4~2S$G`m(s_?5(d~%PeQ`s7lz*z+`n%SqlFM$K+Io|C1xTaLq-I`)Jp-L3 z*va1hEHiVg+odKEy;cEa`9ikvq_)F8#w_t=y6QhoY)a(CMR$YJ=fP)yl=}Q>BKa$S zc*`{=pgi7;g2$is(RGleR&Wr}2ibyLLoxCS@Aczf z`N2Qg*2jA75N|v1&YaO0rkV-9TJ6XxcMRY^r#moDc>({V9uIPv&!;8bvmAGMJWH-W zqw8jLRehmbt&M+gEg{7JMy1_!maPQ$Lq~a5_qUTgucGWd*!tH8i@;P6csXIyeBfW(Z)_( zvuYiN;nYND3Q%&Ayutf>*0JR1)4*n%e(`sYy3JhogPst>R3i0$tW|bacd6*K^G;(D z_xD1G?cQfuoia><1iWu4O<02x&hwqKY_Jcrfo%6|gI#}K34c}CjCas!+ZBhnJc*s` z9fz>QirQx?a_vIuz)e4_v*@X>Vhu-o^fipz7{!c6A}F*ns5Bn zfWKnxY?5;iOU@BW(i+B>ix@J+Z2xKjev^P&2iRdv=(T$vbV+bgy^O(T_ST}?Y7RI< z^8K@?Ho-(J-s^~fPl!wPIliY-VRjQ4_#j>7>58Ts zG2X%ivxHU2F>?FWmu|!NGYC3%a7DYj@r)igS99zL2+eR$gshcIJ`B20p5VKyZ_jqk z0Ja&ISkZ;<7+8NK5Z_K-LrCR3{=*rNp)VTN>|e27bXnX}V+l!7p&0p(enCXA4e4_Z4Q`c0@hkXTv+v&C|o@VkeCmaz+z*U=?pB6u>Qq#C-$ zciu98O6opWWEd;1&UQ8?t94*Nc!y=YhBXykmlNna=Nu_NB7ZH_VAfGFi2M`QWTRKl z&8&4QQ;yAP`|gNoCY)(x zZHYuj^qvmZeQtA{Utyj7#%K4LEU_8TvO%($xbjr^19vca-`2=j}b^Znv0 z#5BtNGMkh69(=^JH5tUe@lxOQVh9v$$&7$zszzxSQ_MmHIHNl#Uh-{OF;4N+B}#R{ ziNP>NVe=9C%-AA&0c~^-DPE`Glr~_QUfI}~ejAzCQ!08f`Co<&Q(m(bd;#QUVeJD6 zg_^}cnHcA?gjC_pQwOaD=HzQa5gvyE=61=!kzUQBcLT{9XvX&G(FZx0bSh%FH8V5L zc+Iw^l~$(~7`bGPR(eXwbsnlB+5^q_I}J>l7bHO+GA`Brs|U^Z{##|o?<)f;qE_!Q zCKsH2=GME7wH`TY*_d#0DLGRJlbF@$??yBBfJVsM1)C;llyc#;TkD1}Gq3rq=$6=w zsLse}@g1Q!Q!Y^S0hoO>re(A^5^*zPin874>mi-kX{u68Xz`bie=vMUIt*R}Hm2m1 zd+ujr2E*-l1)|?fLwa|!BAh7LmtMttBMXxlh=JM6`Ow>RH%VZ@Q(V^i=&+lvi&QaB zXhKjyLVt&G1~CHz-Ay)o4rn6*99vO>^;;tP8xMR+ZQM0o?f2*$yFl9dWgwUG+hyn(go3Q#j@H*R2BIsLYCz-zpc{KZEjW|0`Z z(EFl!rp~~$dScAWRn|A+Bg~MG6A5KlnR&GsrK8eP`J-`a;cK59nfV?SC2VBmltDfk zvzM`E03-dfI1{el^K7k7BPIH-;V1gL)%=>?F|03j_J{PMB4#)k{Y+>9W!ngBxEXOH z_5F@44;DX(``mdcYo8I*=W+XE>Kj8!g({YQz*LwM_7F1^4N4UDp z+Lbg1|9mz9E8@z5re)+4X=46teW`c2kq6{T(Jgf#4|)*FGN`dE1Qei6EUpK8M`9~F zeBci4|1#}=DB}^A9nx96Ti^?8>oMm&l``?AmM*2Qg|X&s=ctB@t`qG6yc>*k&)APm zQP20Y@!R*PmIT~!8xp&*&?7aolE+P?mNT^&Ar8ytPt!Bl9aq98noq1(3Au^i!q|$s zKD~bY(L-hRqd?`T$n-&B+cvZEBB;W2l%h+cR{F5xOw3RG z&@9Eei>;@jq29h1{z!VSk(*EdmBTTU7xZ>Z`yi*bJ5jHqwO#<&5*lY|Nm4VGtC--l+koacwbzm?A%6@>eZg zkO!%q`7RhJn~)@$e^A3eOGma0N3qIYB2n1*BBGR&0Sv{O;)3gJ*8yHXn6_HYd;Q)} zi+-HA9rs|Njz6pB9TxjbPWf%0vX9#Urf^Zt@kl^qE4+=i?H(5+O+d{jAn3Z-bZGs+y!vG(T@Z5v=t5se!wG z#zxtfphPV&?xJBpk4$X1D_NjQTVmV-IQdTj;?}#rk<0BTRFV3N6UTO|W*YNO_V70a z<->`C;7&h(G~ybnN>#!)UI?h3HM%PM_k?*|VVEgqWB7$BL&KFn`qQ<;-y);>lfi{A zv+jQNd^YG&`;k#|k8_!BiO}*BOY%veF3k6bCn#X+h=#TrebGehnr&?N_gjSQo1YDM z!SFL*?&IC{)f?Y?#j-KU-<7+}VSnM}gLxVOzfXJ@Ds|1EJa3 zFTj#wen!YoZWu6T72M5_;6-VbD{)sy|5hNYg@!n@7Eft@s=HzBft%5htc1J5g=`cZGP-vaC2(MNwpvw-4YOK4k{ygC z)wHxWjx8@~au~2PVR6I~`;hNxyBuB>&2R2&0i$vVe<vSlh z6|NjCn(=Eb!ghx>1{Nsh>YVhsL2UWqu#xqiKUQ0Hr%;AHDG+hdmS%D9HS09#^|Dfe z21$mbyp4_-_*{szcwkmUI|z=tBxFN=^)N;@z2riEGT_%SrNEyoV}VQTAvP?)59Val zGAhil7)Yl$uPgjS_`952=671+E{=Wb9)#rVT$(&~s*%di zYFZ8l1dGu1{jMCg_MR}r&oV;Z9XQvPgtOJ{1fu;i5S(@&*G7p<1a36dBDXu%l`TmN z(T72_Cc;rLVQ%&@XcT^o8fwigs6j@2*;^umtiqyhDM@m@1Lt1&y6PCykCw9 zn;yDpDl5v#D2HkkWutD4{=a`1m~w5bN%1SjnfugtOm^>5_csY8EPb}(;OnTz(2|^ z*lRZXE3H_Y9)azxQsI(}SZA*IeB}GCZL}rv58}c&G~o1JWCF>%_b3Tcq`9wCr}@u? zI_A1Dxis%s>(UMyZ%DLVuB|7OyS(r$^86*e5~#u>e$Onu{v_F~l^Kka>QwjFgLZY1 zW~19E^F`pJ|Hh!95xrDCRuQqIQuKji=w~zU5uG!W9Q^@f1uw%&e6#9y6T{RWtKzG# z|Gn&U+7|II#O>8F?=%<|%Bsr`90g+mXs(af+9KOnOZ)*sCkxp*D5xX?HdIK|s}G&NG_J?TR$4ic zZ=PKNUf0>dOL#$u)&5}t4H>VDv3Bi=;+ZkvFV&@q>*3!-o~Yli9J#z9<+TxG_MUtD zW8I5wy62wxLOI25-~QSA?3V10lJzM6dofs0q4!E#&;2EP#@KjwaO*sx$f!T8<9MEo zAm>uU<2pa;>o9dlU!2=Xf;ef`m*}3xAY)eL-#0MfsXPE8;^B$YncNp!INufNBzx7Ug%48!ZQ>Rkj$%hu?#g5SwuFzc zI!KG^sqP)Fw7VIbV@YGK2{P)gOZV@uMQ`#@Uq!EcYgC`+2n5D!0MkL(`EZ+F6!Q&^$97XjMj+z z7(+o~9dm55+ji`$g2Veg9;P?ySn#BQfQ(aS2Age8{w=szasc6!;XipB8r3t4t(XC& z$h$et0`;^dvs=FE7R$bLj&DmspNOm3EXp>p=RgJOJgQJJsV)6?Wz^rCDu(%f6lPO! zK`)!qVtI6ykR`AEs;Laa^H!oOqyzby6ZR521(k}d*4Pg}o5vcYD%zYTS-sEo=1f;F z>FNkMP|y6{k%M6~kLdC<{)p&~!S&G1H8M`|i@oF(HaQpvIbmR7C1mM!A*ElH6Mk)0 z#7<%A^iA$Dk_)f3#6_JZVw1h!495xtq+6KtEx`Aymsq{VkB_B%o}FI*me{}d?|P|F zd=cwQU3ajcS)}SD@6+D;0pi-j0WRg%9C-u!oLCVUQ&H2wq+y@aMJ|N~nOC|Zt=#Aw z86z6m-^Hlw^jb-446xTK=(x_^N2NPkd^pbd3LC|mNxslnW0Eha9gk)U_d$sXWdkQV zXL%Fz6P;s_s6o-!Q+1;-#4Z%+OA?$-uRAHFBecwJPR-I5Ercu23^vh;qalX!(cKyr zqZ_G;UBhKR56X}H433%du9CF^^5G(vG$i_T_hjqZ#<6YgQ4cdP^It4;gHf2aeWR=o(fA(TNp9_M7m9U~bSU!h2x`i~J|=m{x*t zv3$8w_RErahR4;Vgp4jX#M+4@gdX5VG+A+yWWcJd0wURz0>kE0jZL~K|0La&*115* zRE@&BZGt7yzW_LFlxh*=@5JZ_+LEAs8dy3VRF~hB3T>t{2wD%7#v5tGcILy;83N~p zW@*3UoPOa)4{{SdJhenyGkMj-->J)X?h=~os91_0X~@CI=91IFUj65*HvgDS13c3% z#pw4}4H@QYTt|(%sUvmNaQ5RV|pabHtE;@k)b7XUmtp zBr=CSE>w}Iw4?EVGyJT0y5KN#m&>t7D@^=>aMGUXn1ggWW#0-%QaFf$#jA??V+HiA z1~(s&!6)cANx)##=r%dnp8?1?Q3HC#FmMli#V-XdmEd=S%7VwIq|kkN3g6gLbK&g; z2z=2J9vkDc%jCKRELNv*FgoEFc8qR~hME1j#*2rza!_j;N8?RO5&1$kT8ra0OLUz= ze3G$xc~GjL#>o<}d4T*^x{m|WX8PNyKI&X9ZWd`B0%DrjqtflBg8~^>Iv)nVtLBzc zcXeEM{$i0P=~4hHxcy=1zf`k^xvalB{D|-geqy}F)X!z9dnV;_zjhLncSv)bTkMX3VoWs$Q7^ z(Xefx3o_eI^cih5eYp99)PKJEMP_+SO07}aP9@Dd4^@ii;48!uis$M2e$C*K$y3L( zoPD>LlQJafgph9SSZ|*!e}l}$!&mbkaEe4iQ%{doFOI7MyGI$am;d79^g_dorImYx z5>1PG&~s{asJ@B1LR_SJxeKQ<_2X!Qcu`Y|M`D`M9p4p4i0RyIZY#r)^Q81oA{rIVG$9lB^1|XNljbKeCMKX_p_F zg^f+T%-tN>U5`BA@FxG^m=|sG--_v%n`HmV?zWZAmAs#YF$Xav8B#)j`J9ya{-7$B zi6WIGQ9Gq1*|NZPXrWj1qqx;af?HEYI};{bV+#GUO8>wtKwtzrGTeTA(CFxPhYcF? zZA2|rWhe>FR!LUbfOI9Xn@l?2@wkGkzhPDkghyQ@sfj}=`k1x7iN6Xv77<#vS!4W8 z0Z@_1VlZuG!r+?WN%&fSWkduNCh6INHB1U9PdGH>QOmUD%e33j;D%t%c=a32~pO&mgvu66Wuh6V@ zk~vZyel0&G5e@vjx0Tafo-}^Nz85;`y!AL1B2DJjeV^s?%2hd23J(O!OX(L zh@X-J_WJS1hduHj$?s@*!G8NwC05DAFzr5Z53k0}Y=ZVnYY%L(S0DN#k?Cse(U`?D z2&vcj2aYZu{J5KGyipn+ou&mquTF&Ht85VzIl%H_!Es|x1iD-!nzojznzqwZ5SiYnV3zrpO-zbMsp5?-A9N@2HmqUSjK7iS1>y zsG>ud4;t-W)8@Xxs*kNf$_va3i-7;S!lqQBP5jQlq~ovJQD79@)Uh2?)l7_}87JoJ zh!VXz(p<^Bln24e^JyU)t79iRgVE%#C5%r<1Gh7o-f4c0yomI}w|BQwW1)1-*@AGS zdEoujN6Q!4VD;0kA)ekhz#koZu#6o4x-NfRKio?ZBoMz02iPEyq6I)FdbY@Uhm0*5 zv{;U%8YJ!b#NI$!_R-G7t@F@q&V>oBItrS$9 zcZa+(gFX>1)n$PCLy+-0Nsw7Ec8OLr5QppAGd%GT7u2$7Q{AAa6km5AmL|J7j+t$v zsc!&iDv>v)_qb()Q-sfXj-1mSYB0C>fy zS@8;S*yeMP$Ol9ufKxCHe#&Ktjd0)b7NZCUQJ*tfq&r8Sze0NRc{^=$c$|Wm{P%EA zOekW@!)lXug4?eY3>h)3=GWFZ&QxU#ylQ?vmTW;z z=+4%w^}i^y0;wb_k{w0#aD~oWSl8Bj8^(I)ooScrN%#T(CaZ)G8A)*B_KnYE<)kD@ zVbF6L_AYcOP?E6)Ecr0SzGBv8>?xnvZhV?^9F+UF*9LAa~OT!{2&hc&b#k zmn4Ad0^HG>NVBCLgtM+;lo-p(MB2Tepu9?V#i=!AC!Y0x>LntZ?=7@pzyST&l|e(O zdhD=g@OVwK{JJLWK*d#~Hbp6Sw&Pl)%Q9n4u!BIXnMmE}`ji2YILQn_b|H=={W(mC{kZROJCcGu`nCn8r|13#UsNL(gEUIq0w9+eyz=wZ}Z# z=zvc!49=>O)zD*6@3ZXKzZN03T5}+^>%?JOFIH#y*hR$WU!K2fi(Z4}>NhLiX^ z2~Vj^Rr%|vMQl}EuFbeS(7o`)3bnXD2ne|9;%p?>%;UnxmoCx~QVCZ?p}|fpS2KGG zRyt_(ADE~QgQl~*h^q)`#oCeDEtw1Bo?K616$o5%)Aei1MP^u6Cqr=tbiEL&TKjyL zBEHcfK8gP*{rPC3*;|MSE!vr*n@G{6m?km}Pn ztXY7g(>A!RYqG3Bj2jV)GWltng@iv6mK$Y=U9z2&_7cQ$upr)ewLgf@X&_Nt8$ecL zwP-RD?jDS&?W*qIPuq{H&LdCFN?3X-C+WKE)T|_Yu!~^PA`;J{^)jRT8R6{uoShtl z?(+NZ)bZdrb!E9fmXEaj@NYO4}*XMUhcnHWFeU9E9J;ySJ0k$Kjz(~#nTCjjDNG)|F$ZznApHq-` z#s+az{w9rH`2w90Xb0#kpjh&6puv}the@oWQV1JSgm=TA=pkB|q{s-hr^v+G7CMb!F|z_QT(j zykwAwRL%JoWR{m%-N)B2G0Um3XHXV-3#rNOXfR z@>79ud1=i)c7(w6l}(9#`3ImfPG$}@{c!s|sIx}27qPU$92|4tMiw_h8Rf}|I`6XJ z1OVj&Olu6_jK1G$ZPzdyv<{EvkTUYv@Xv=`tg#iHMG+RCe4hzar*s*6GD6Z%Bwy3cmrDk+YI$6Fr$7{@`6=s;0NCa=6#&l3^ola26` zwT-~_$l>$8_l)Zu(BWkx$Hj}&cm-yu8zbM_D1O78pve17$iw);ocnbv%BJms%;W8l zdvGczZo~N-oITqc{DHeBxyJ~tvG1<^f6=VTZVwGwToo=d0Bm?9CXv}v@;pZ#jsA~{ zGfepdMPS4+$#p4(y|((ORcoYLRx;5Rd>vw)&~$liwk@>18RLD^CNUCCJgWEzaCuX& zvoy7AQAL%B*On5lh(rCx$!k+)t zSv*^2wPPh$l$}aV&id^&yX7|=pq~k+uidBXLcs2U@%8QAWvd~pl@%mXaWZ`6sTOi# z#%ZH5>ZIan3~cIF(ox}wBUx6QSIdM zSW`+#MpAJKX{K0y>3`AQell{pD^@D-+{u+2a^JL@L%~k{M$~a163&zb6Vmg=1#;B( zqWI=AfQ2nsm|y6%B9GP2p-l^4O!4+qXJAvEV&v`N0qHX`=q))YS9PgzR@-vfg(o1q zb6Y89O)_80?#R=I0DLJ`Z4M*o)}&$zrfNfm;*NIkxHX=%h~f)AaRq>4S$IMpWB!C? zFTK*PHB|DYS724Dq!W6>0 z`)(f^G0Bl_Y0{!_X(ka*qET*VhPu-prVzlD@zP$u!#}4I5}DOn8f-9cQ$nmwtyJ96 zJi`qv1v&GCd%3bqN3z+>eQ$wV(0tAhDH-fvlreBtOR!C;`k!*XFb?`T!19Ph6r>Db zQSe|-T|3Wb@0KMrIdJ>oI#CGY>-e^Sbzf~p#AEo!gE8H^U6HKRabP1XPE9$iJaACkVpW z)1!@iNB#`qYepa)P8b~jqNU4Y$)K%75zMliG*BRJEakU@^(%o7#os=04tb zzjoI(B5N?DmWmGY=2o}b-zJbhY~&LmW2M75584U*g;pzWalu!cD@4pppxC$XTY6!- zI13SWLfF}S#lAK#a28I=G*6Noxg0T_|FV0r^gQchO}6HF zY7taR?t*s|7=R6ycvNlB$}S<&;lcBUsiElIVKkOrF9Wcv7zMNZ=4$A)6WE~SL}1~f zD>Z-UF2chPaRQaH@EAXo1ZLhnd?+O#2_!vt3*_NApE>}-#{h2L8R!Z?=pgbGVO zZLe21=^2lIs5^zP)7km`U#T-8Ea45OF|S#IQChfr2SDYg(v1zxa+VI5AxtLrAiKDb z828l?E@UKisby!{A(Lo>#=Z_(%15Ndok{=m&N4eM!kuw3`0O&RkeY_O6;4wF+etQv-L@L2h_+)H0{PA67uT>dl z>925Num=3r5onFnc-0TEy6vzz7e)CCqXF_3^333=6Sh+StBupG*l#;#3UQmU4j1SM zf0p>)!u-2S$N9fzsyH4kK!iLFMJp$^FkBq@*Usf*Q;|^IE&`61as*AoeM)$7Xp~2} zq7p}hd_``%sUW_rUE^-e4{(CZqUn z^c4JZ>qbOcF?>*US*uUZ$6bmzmMI$IIv2D9Y#U ze(b~3JcKW^$#x7xzob+dI#M&1xW`|Ho$SoI9}GoaoNjX?@C-1E@)3vPf+i^N+y#Rj z>#5YV5-u)FQ+)lfM?N1H-0W_F`BDkl+!#uHL>QeJNRqEYa#5R#`-FXg!*bI-+Q6J~9rsyy-;EyR zUF#u^7ip?t`ygMtK>W}mq0HeM*GC-^a|8y0H)eij{ ze%1~5bJ;NA=6!%YyecetJy5Qn+ufzyf!~Wu@$lj5cL7N z9Nh;K62ek8{!yTm-0#;=6Ll4ESxgW+U^SW5K%!isBm%$sZHu=~Zz2K%QrvUzMPE2C z1~qz*Rhqh!;ClXXw2v&8T#saNCE+=MrDVs%vT@sOIDaa!nO)}<_tI`!1vn6 z3XI?!FXjfPv8(O)mHiJx{C)(((SjG_T+;jkBfmF=GXjzHHiEC1TR!nT6q;a&5coVO zSw=?}*v*Q8PLffO8SR|_3igs@g1mGU5CD{5q5<&~s ztKeB$Degb!{P}Ta;$Xv{P~yyn?cHai#}}~k^oQxorz|6Y&$&Ar zhZ56heP`dM@%>n8M5j0Qal?h9NDCw=ka3N*KeA!ST_mKFj5FP~Xbv2(=}V3}qSDW7 zoga0zWEk6KU9EZOrFIihB@=tP@cW~Rk|;rfIeim`L!lJhoG|kxq{Vt?XrA6=UZrP% zXXm~cZ!OJ{$)Ys8{O_MJ3=X_)W`I470Y-`15`U;pg~EheAuvgEhnr|F84f0bhLBd+ zU_+MsM;PqAXfp;PnF|p?vtf$4G+K^JflOB3kNf9ah~U2QjH)n7>ydU*F-*>JU}Qze zTXX?2b;zV=71I5r6FVd;k;ongVK<4_{QMyVB4~j$GK$k2WQ4uGqeSBfjM}0b2Pl`9 zy}R97qEfCg^~zX&od=IlfhW81LUl355*m$QGOH6k?d%XX_I)}}d2PD46oENBB!X-m zSZ7BWz?K@M(_hC_g$*g6(QYNcDOemioZyiLbC&`~ANY_y$r;}T7d*-XGSK+Z2c{TP z%5uPWH)xSwHQBYwmlKCXEsS%X@f1F&g0qO+ZhB;OXHolo;IG7-kc^keqJR-f8<1Ct z1BdA4O=^pSY3NG3LuFza3|&OkAZHc_bXze~0eICo(7@n~zc*CUc@YP?^kWzqbZ?Kk z79O4MlK6$QE=BmJy_J3V_a?!?mxGDpw;-fhEwFIs8}j(L6Uj?Y2fE{c9d@BR3X}z^ zMG8%eWn+DGbx_R%v*uc4POk>sty}u|KaBbKk6W?_%H|NQChivkd;eX|GZr>q5Jy>B z5zi}%cB1%PdvylRF*x+x=!gj~M;NWFOX%ej)}K#8{{8&xV=aUKl(ow{xJhgE(9C-= z^~)UOx~HRREQ}{8yJSLc35~*~GZ}kG(dF^y+u;Ap0IYrqGC_Z^9_+q(b5q6`nv41T z;4-WU{7Ie=x!M5v?11N`EDE<)Q4ntkhiJBTNHT?82Uko+0~B$~E1JVlS&vl2w;ZtD zv?OgvtoXI=cJlh_(8*_o1M(q86aaTw(yq$pM{l)i=Ai|%Dv`kbal>5;`)0ncsmmeTzdO2J+4I7& zgv!yK@)*wNzqVw49&vqfcNrFZ?_E5oFJMWIu#6Iu-|dZg2jnBHR~F84oOq&rB|PXN zTl(?;9=p;``1!Dkfy(|A@jzOeI+%?bUI6DFWeSNK*#*)mVyq(n+KA~YF};|fPJjIv zu>>t1v=_?0+(8%=cl-N|_oy-eAG*d`8DBP0=0t6Jx2ISZ@YSOqt3*>ibd&)xwJf*f z8@B9VTpv&^3rM7CoUL7Oymzfr>U5G~LoxOH7*mB^I8$jV9A|`5VG5JOw4Fe)VqQO) zT-sC$T}0;|utCCs#Ujc0RNs?-Y#8iW@v8JqvvV9CM?z+t&FBDeHSm8`H}4L>|6ogi zlpa&Riw#mKnnFL}$L|-d$y`sPS03e|tkV(Dj8EILU&%>RV#D$lVcjReKHg_iwZtN@ zx01FN#^M7#-MQl>HA0Hjk?Ov*G^$<#aBS;g4iyy9&XNNxS>~6WIX;2igK3WNRovsQ zg~%SNO^#w$Lr)i9Pfa|gvfuqLyA7`WazJuHvU3%RghdTHlc%Z}T~QAzk-Pwu_$La) z)yF(s=_M!2jRcV9N9#ZxC&atXq<#IsNPPO~-o{mIi0bE$9dY&<5%A`Z8%N=Y?9P4X(KhY~-*LJ1cE@Un>udpBtk{ z#f^8c{iQP@EXP0>+m*Md@4;ciBoCQ6KSTHmsffVA@giWn)9c=AG?Hpe7{9_>@X2A`p!e*oF`@Z@28gLg7BwIt&IUAfnEU=@zeN=A5kk$slk(<(8KsN6qqCQJ6#7XV`3bcBc9IlfjWaOiNhpo8eOWXgyO=?Gj4r& z;Xfj&nLnLct1gKKv59>^~*8qYs+X4V(Ameaj50OOl~=Bq}HDQyttQLiez>*?a_^ z8nQ*M6Ad;Lu4L_%im-vc!q-JGSxBY*uE~w)uE_^Nz=3%B6duT?L^G-axvB83zm{&? z)+kdr!d$ZdvsU6d5QX~>&E~J%yB2sbYRj*f#_h4kU!zSJDe>W24g8d0&*p*`N2N&9 z-xEA#G5ZUg4JC5={*AOROkwj|$7NElrJUk;s}*z5n`)6sA6$>jXm6E2rC5^R1we_o zgRcF1jmDG2A`z(8O4Gx($NIW``B>NFB#{%|7P@$z60 zV1xq+&2<}UsBBog$e%htAvzJPypbhIa}Bq>aCCaWS|W#0cX-k?qZf;eL>F*h%c<3k z@YRKan$iI&bR;kJrcW2uHrco6MLC=Ud)N5QxlpPFFn{lfh4;rv-#e@k4Sm#c%$}I_ zEHwg06}3zj*>(KNtpr95$oY9gEu*w<@2SOWZt!i=R+z7WDCXBK_ zlF6iR+Qsl5;FTz4oz%{HFxMvEBNPQQ%)0P{kq@%&1H#3s#1_;#WGG2(V;x4wh4G5| zAIxX!U_s~WApJqtC(iSri2Lpfl8YU)tt3o~;2h!|yl6#C7(a0fwz{91mLEvBn(d<_zM*2FsK|1R_0 zd@vl8O8izY{6FGe40w!mAX{{)3LvU1uTbO4M8T)U08YMsBYXxFB;^1>zMwGtG3s`^ zvoYDXx0=SLRyfL$5P%$+N04v2(bI!mlzv?jrwaTr1i`b;q>=tD z4yH;lVGLndK0_6fE(6*Icw6hG2#u1&wjb;Z8|{208dEC3b9xNm*3$E+qoo$g%< zLTmjqvL|j$%AqJy%p2E-jFp4OwZCbuAFsaLWReHfl=*xEZ@YL2j>D7OuQ(pI?dv}j zSrK^^KI0bU=is5*sPLAKLH2R+;tKi`8-7tD~Z~ASds7^r7uR@ng7}jes4)YRyPV;6JGV zz8V75N{qgp7`V%+J*G}UPXQy*M~9*i6#H=r{`}y@MnXZ#PSON#qohdvz}WU&)`0^3 zppfC*I_dMzywqMpo-TF&7*Cj4rS9*i2TP82FVDiU<(_v&Mh)IjKi0RSH5}JV+%M`B z?H(DIyk7)o+)h7Nz1`N&c&`0C{PwK3uN9JmW9&m(0q#r?z%%y8B0ZRrS+538(*Y!( zS@JGx$pUqyIAw=cm;qU4!cBspXTqnGP3fk*|zW`*d6z*&$dSfH{G3~ zr}gbJ{LABl@lug5%w-_M;M16^NfEomt#aZ@wZ}8@p`&tFtWp%V0zP6qM^ZOXHN)D~ ztM4ZgKHiE|MFgu z0&;FDA>q;}#a3$C4FAJhU$gB?$Svg$-9t66R6ZF61Jjyh88wLyUk(eZ5DC7JS1~rU zp6 z%>iXdl}MWgX4%z7wXskw#RlqPE}fYqlQY}f(26BKH8zUWJdayHr>el9ZqN*$l~;y> zt3kD=3XzL}9+Wl{eUIS$<3m0|fWBPmB#R4fGC$;~s!Y*&Og7g>Fy}`o#Zo}~21-<{Y6#Z9-c=zi#Yqu?_A@~Fsp>?#1oV%Cp_5YyPk z$I^FS)t=f7rZpY77+h~er>{u1_lk(bk6j5JlcSQdLoIb;cBY}pdwFzPv1yhT$Z|53hi9!4i_#C!k8wWW@8RZYteTSNelRV240|l3raJi%_ z^tQh{%DA9a7kqiI6LFG&m0*YJ2xFI5ngIjRhnhhbr8=?spOxD$^H#9+YzX}TnoR>F zWWn%*GXy6gL}A>-(9h=vTiwf#>ouUwfSBFXU8=89z3`}@Z*w#zsNngDiLU~|yhak> zWZW4MKbixU5yWfeccrkoj9IcQe}(@N9N1V49K0R9#Ce{urpH5y&u`tgzlVkChz!Uq z%BwYw_}B0jyW~3Z!MO*_*(eOeVAcj?7{y(zwU{U@%31Whpf-Qe>p~kg_cmV+XR>g5 zAis|7PbU{X-joIHYkrI@96vyBE)I)USYZ{Uv*1*-lG&pTX;N7Hwp`|FBYJ*No2H1@ zY+BLFKhPMH_4-{0R3x1wPfgk*?Ep`)d`lk>xJ)^MYlrSgTpQ40jpHGFN1 z->8pd-om?@5HzgRy@r{qT=*}?-0FVjP@yBZqkJ-Q^rpD)($M^Br2W3Tq z*mOWGyqN5hZLHN{o93t7kc0D~4H#J%>YA;;HxM10-EId18VRjL63W~Ol-StIEpj##eyM(%Z>f&w?;5?9b#q| z;z=eukn%&W_6O#rM^nXS^*%hdFHB)MQiO_G@}*e9EX-=%_XIbJ0`Ti2iqg}r^C3-a z@C59=}feBe5mb7&TLS%d~ z^!6Obg@N;&tEV%BW^+>fuSOjZBQ+7`G7MJGxv%rA00Q0jDY<@NbIr-d6MR- zL*_Qi{u&DNd|z(13iE}fG3~jE@ZAE6xiXQ8+0p6l>soj*Ac4(NM#ag=0K&3M|(vn2@!Gs2Ri{^ zrpkQ3o*iA4gJvfl6j52rm#qZ4Hh&8@2g>sklz(PR1_@lH$_i!E{z=cV;#Jn=V%klR$7kC)=-W~Ca5>qEBUZ--ek!e&BVNutEl6WKAc z)1q*m(;|Z&_eC%1IS_6;ZcyakYf;~nn2hsMYen=UIv2EZSS0sOX(s+MFuYG&o~SKf zCdi4S-L9gv+>T;7f$p}yWnI~|ATyb1jUjVB&pLfN#Zy=KigHG%z!Xt;)+6GXrvl0AEuGIy(Qx&vh!LL5?W3?WJb?`tsg}D z2MfF-y@FBv&C!ud)LhW=b`qi{{2>LkZGS<-3iQ>sZon&tQn3#ITr~Ex2BOLNC=7(7 z76nXK7%ttUGSbvku{Fs!QtEi~7NJ!7#w%~XvhOA*XN7rZ#0QgeDXB`N7BR&!-{9x- zSzG7cT#!6L>Xf6ZMu5P1x^ViLe2Sk`Jf_WF=fC$ETxVS0gYEDoPHO9&x z3_Rlw0z<90V6jElQQ^yODlp@bT9K29TmHD4BW|ORBsmjJ2Z)pLUGp0uHkkt9_xuPl zobqK5->CjUm|{R-C}|cx|GNDzwWuzQi^WH?%UsG}3|o74OxCMgQg->=4M$7eFa z$Pi+RTX>MiF$OGtxL@?2RsH+{`lGmaF9j){C|n7rWIJh^i`=eCQ$iSk*Tu;xEX2pRu@S$)x@$kr1v z{^DKqyrz&WY!3UiA}PxCfH@#j-oH3J+n#Emn;R-E*%qzNR4w;RzxPS%a)ui>TB9w~ zXW_>mt6|Y#jsw>dNUYS@W&2yhZA;R74gsF)@kNxTE}v6qXI<@kv~W?Z^+j1jc=P5n zekvSQD(PF8iL{^!^Jy!S!1KjGC#hIgUBw6HU;WogP(OkoBW7A{xn1Fssu#Oy!lr9WX%#&13T`d1u`~+DbeU; zXhN3=BbG2j*^>>L+JkyDgHQZIVEiK5Sp*e?uixEWp}Wy}g79mR-_UF9Ba7}UC!Dk5 z4HFq(v-X5IABrnykOl3l4ROhpd9R>6Q>C6qk4x7oBS)sC4So+EQf!atpoE^^>N3ce z$9t--3Zo5dO($GQAJE1BQeK97H9GVbunGxT!yI59)ONZghcyE?ZJw`PUD;hfS+orT zvxu%)(ard;`^GC$Soz6X(&LojRw-I>1S^vI&tTwYIQ{6n&~w8#E;VK~^}{AhBTa7) zu^(JK(3=x-;-_}`@9I0FhFfCTN4l}j>-V`9{(zD=hOusM+gv9mjZb6O@FA+WiH0@6X^ zbNVIIoJiuJ01jw8ZdNZ@YfX;`4|VnDI-2?(w>VF)R^STsl+WQ)US{cE;(*gyr@_x?I;}RA^5uuN4PGX-nC;RY zn5T7$wLWTZRa>XL4E^qXnf~C+HEmtc%h?RwaV{KhGs4Vrn*eH%xorG*%m3e2zNeKU zYeXKo4%-(n9n>TcT|SOg)_L(Q!etSgLFCIL(cKp9yMUV(O#!hHigk-tm)1BHGdJIa z`j@gWWb{{`kN2qBI7g*eF4dM=))!YmqO0&1*_4)2IS?90CatsnLK851LBD?oB-Y?q z4wh3z44b??eza%Ye8bPj9f8FZ8SxWvVKBq5o}!iat*G(&`<$yZo4+fdzM-(v`LU)F zUF???O`db!v=_3ABewCw%S4rh0!6caj_`Sorl|sz2~vPCMY=E_z7io|wG0*Y;BUjE1g@UYVQgcG<7|!KD4i?cSBG{a z?~z4uTd2G;-p4$iJHiU(62hb3a5e?gTJT{~#=%LS`r~}$F~O;!#8cZ06-tBtP0AxbVyw5;)wr}KuDmNS#my&|XL#xmR`jb|c|mVnbg3EKoI~6b4qu1L zbS(H2vPKTRI9U5)r>GmXBd_2m7rQwj>9IBtGuLAJhoN*N?>~|1N5TEil5B-e=+1sg zvD&fy#BIi4mk4T7<4>MT|Bd*psJ@ufoArq!(xw@xEFaw=-I|G<6=_sMW}&;?`Sg;2 zlvp#obYvck7zpMdD+)0WU8#l>qWu+Xeef>SQa|C%fp_x~8)oixQG_VQ(e87nv5YZ7 zJJJlnQ#R=01>S#0Z<#y=2vNXsPduixaJ)W;|cNy|WT7zPex ze=!T;aQbvNK@wq@Rx>N$_HoXb0_pjRq8U9mW0Ib2cIM0OOM|G1^C^)-t_$5vwoJsX zi0)qNuNB`0hIZ#R3{tB^Y48KK4T&HUn2r+heoa<|Ko5i3(sYiF z*T(uul6bQV&gU4vwonA-Z(R2nM{B%Wwz;I)_ZAnSvyHI!rh~1p72L-T7$TdKHK0(-uxPJhyc|e~W5U2E4PVrFsmEC{N zbNshNhQY`KPWMlaqwb;!9cdScCkXby3`y%0`47IuT}1Dy`q}|3D-PinihWd;F#1{O zbBu^JO>H?<_hVmQ*T6IES2hmByg0foB>_raNU|HAO4!H!x6ms;@}vreCx9{oiNu{|?N=?_c}9 zQ5WhuT%wrY%%`of%HVPZ(Cz5kPcwL#ZUyOj7NmN!Qhw~Km<~KgFD8%CU+Q?py9*JJ;^)0(u~8cx1x@}Ag3zoHDXV{Lx~b7o9+`dDd% z02^3K?h$tLfp1PUXKgs1vTwNRzqQ`$E{^~Nnjn%lEMlayet(z}u4 zKJ-)DtKD1>FxVc>?s`QRFF|3O$qS(9#CZaxODhnrspFk$3XVIACX_GkHaP9WG98eM zIiP~Bg=>k0@mNZ&K45l*TFxJAPvTZ?h4E8go*lB8PF4j;7*2|QGPr${d@5oqvK{|o zQ|OM($;J91(3doptvmXp!x;|D16z~(jVB8#4|)zUW8)kuqXUal>#+(V3MH-?d~X_Y zQ)2)buXNUhtK0Yyc2rO%jDrGu87pT^N{ffO2@`cOGClauXtb@=&^`k`WOat;e}JMi!}QH$3y5rk{eTypd*nSr54f`FGON;#W@;kOQXu@Q!9$w zz{i7v-kV8}O>(Iv#lN{;Nr-x!#C@O;daaF-_7VNF;L7-;-ZaNj`17@Q@wZoQ2g*N` zDX86jLL1w?$1-ZL4NV4Kqqrjh{B<8_)3nX`;RS~RP6(zJy}}FI;ZCouOb&`(5C3iO zhJ04Yu|~3tavb4oZ=^0eq{>qKWDH6!+n%t%{(_%l^mVL>wYlh|NURF+zF^QdgGX~M zZo6uy>j1;LQ7EcYZ5vVwGf6i|>Y(zNhex~`vGr}aI1mGRptTIs!AKh6pv09=0~P!J z4bQremlfu$n`HfWX-MH)9qjq3#uVNr^OW=bcWoT(06Q)~k#(u9)W_!s~=1zlS)l1SGQYVopAvSM6oY zrXTFMm8*yDVt(uLSivqS5+~))|0}hGh{AHdB?=+T{;;*F7RJ8SGH=)pe?83mOe#2X z>AuLmkVF!i2zZOlFIE1q}E@UYP?azGAG^eA~VE+K0Ic@?f~YBHqsRj1{3v1i{OHX3!nlodgHXeRKumw- z{3OUihz-e9+s#Yd3ZnQPgYiItB2Ny)Q7rwNW=rB}0|I2?u|49dC`IDas28Rh0qWy= zpFhPL+y=D_{5MpwqS_=dq{L)9bTloCrY$FU>RarF<1huhi7Hj#~$zuU9w zhyNXP{}bmSm(!_HL`-Myxh=#c+e_d5-Yj-}cn_IsBJM|{x~CLUWN%>~X_i^XZ^=Zn zBG3=+ZT7#ro#)$-1qvP2*m4QoAX!r1dT}td)=?Q+t^Nu_3zg2i0K$(eft5=qPqwBF zqG-uO2EY7WMHLDny;J_1gl;YaqXM*8&u%#sFyPFuijtcXTP^OU>iENCdDEEOaE2M2 zMIm(#QPaH)>Yn(0uO~uiN{Wa7r4Hi%os(NCxnwG%w6601wsQ*pXXkV&vhaP(=)fZP z;NA&~8t}crC%FKm2YQgKM!s?#*~!3Rio*Nwdt@)%;3+T+W|LLTqwJ3C&gxw!LAY)$ zide-Rm&KAvOdCHTbS6W41~!g%v543STh~QrDf(&UY>+ot$18i&bU{YMF>?3j~5VTsN`2=}13myI<1*BAo)O%9K^f=ax4IqxP3^_r1aGp(}#4j>g z5?4MWB&U?GARpJ!K6?xRzy#P9sjAq7C6U>4`AHl73FR(62kqBC3lnw5)so4kUSf%U zoYC#LX2i9)zN*1N;t1ZxKl+>fskk)_?h|+>mpDb1K<3p5a^Im;<8o^nIT7pjg|BK7sN5wI~CXumc%i|-SpJu^r1 z?^LT;wigM5F~fmu)+~7FxEYEe!&<~RJ8R4?ic4K_?>VZJS1(6z=sY9~0oa6=)&o|+ zmF7V)W#wQUNZUAEw!&VijnVM&yk<``e&!dp=}+>H4?_C5Fyp^C(FgMI#XF?S%4QkDAGZ}UtsSR~YpB$0vJr+*pT7EnV@SW2p!WGY_v(KhFfn+s z=Rtvn=5eUT&n}%wm*7O`?dh_eO5ao)n-4rN?bWpvTv5egMSYor`fz*=sXQMVem|-> zc8`GyIPm+VOrZHaNAwZr1v`nUKVx_6A^qgMCMyt*DxoW?AZvcUC1}y)R(*HKJ$)XM z(3J?u)Elw(q!2u1B5{Owsz29V8L=QJr_qs4 zdwQ$0wv-H&YZ?tYcjP@I@(aZ>@#kGJHK?Tm<<`8W!SO~8_>(v+V^`MvDLfFe_SRDx za6*{!bfq)n+i$~-mK%GgmIm_d{lu;OJzi-*w#0S8$3shp`s*TQhYTh{rsKASDNkef z9)E)$P1$lOge&`2;8+4*R`_l79OO4@a+CKa+-(1$je)Szgs|`%p=T)qK*W;@6n7kP z0(<0uu*yeIv*b&EAV%2Zyb34e0{4|3P4=);A$T7zi=BUuUzTGnMC<;IfV3xw>1Zl1 zcFS8ue5B1lWBQHt&gcRcD0)EE>3@a^`iDqZ^0#AC-20T_28}4P;yZ3i`(dTed3=mb zs{_;AftxVjHD8%s;^0ODHRx&%_43S8RPq>J$LyR~RPx}wz(kKvKUMmFOT`{!E)#Cx zw8I2Bm&x72(TZv~OMjCtuOt-A6^;O*ah0DItLab)ZugZ`kY$1X&gvH}Sv+jL%J#>R z9ci0=63FKOB9e-UvR5#rU{xCXI}9TIGFbMh_?#LgCuqQ%y~#+A*T4Bc0xeY$hIvbyFkLm_A%*9%uz04Y_Zxv44&I-oKoz?ayl6(^iu-&qn5?(+VbXtpU+Z_g@{ zApImEl^%W3;le!AiSKjdwXk?6=`z8$H83d#x5k-#;M_UR^KXhrM8yNl;|FMX>})_( zHbGs>DLj8dZccjT6p+P?;&5g?QYMSaUzEgtaSO8eanK-~$(7Ik*(+0cq!Cd7Cgv&k zPsHK6j`?x8Uhp8bbuJA=li%(X+n@0Em^D0>+~JN!eh4o&E|v@b8&3`=kp-DeV_w2# z&Y0U2VvO*Z@7`SW`>P&Zcq>gGN$JQ+CGgr%r&K9AR?;iINaVV4-i*z96&(B_WX{{@ zz519XwsJwbBU%8#J8qM0ySvI#1{XMreqXptA3Q7d{<}S`w=Xt-$vTuutRNhyL+o#I zSBNq8g{)7J#B6F3JLTTL+-hn05O7%_*In0G6x;+|)coCEh^q0>Eh~lbV5U_)2zN6Y zhH0s0`0i&I{X*&U=)hAL@^J(WqFA)9;^qKTtMTVN$fN~HrKIPFO3zA$qj;Xt;xzV-#kr*X?S5sVL! znO%OWfl5sAMeptAO{+#s;AwdPvpxX?`nS_#rTwlyHK#nmD!*>8NTAP>dFO63G{!A6m5rmH-pF4x3}jb-dsKUQs(Yzg9KoR!>j$&2<)s=(9Fa)xiD zH?K!L9tOUo>MiSW{|b%cShCi`m3lf6j{~piO-?C13Ihb1mGfZUH$Ck+l_vsUA2X@O zc0cd9vKH$|iQwWGmF0%1Px&6|A=U_5z`u*HjqI{XyLxTP&d8e&!Loen_irfmqnS829u?n+-nm=+`lcw7%Ma-Gy8Wm;2hql74=+W$@|;A3_e*`|Fea0 zIHB#}_f3P?4EGVUrv+?>7E@h;286hZcW<{wh1vE*HN|vA1WQtu`g!Ns86+b@4qjYKlYBTXoH1EP9C5DzC@H(?4!XJPR(S3F<1Teox@O z?p0@zE8tgOjSn!2#+Jz+yjup$2LDw!dQx`JvU;BS{t^Atd|C2V$H8tGE%KLysQqL< zZvBTat^Z0wn*se-*Lh}17+vAGe;)f=U1sOms752J8tzhD>L>6H?U|<)=U+^+>B)AF zK3z@5A3_c{&8QC|{XI6d4A4x+dy9{`v}wEZK~vltBb1F*H&9-s8DyquAGOqVfpzkR z0fI~gdM%>)cm5ic`e3`^>agbrGp`g$tn-q&FqlY_6v#bHaoUzTf#m>#_NPX>)~}0w zLGqZ+sFsb0!+BWSJ;#9s$8$Gu$?K_M)_=8u;OV!4ilsm5mzTAiS)mt4Ry3!!?Cd2*<*B3 z@%3mz6KtW#3Pu}(>lBD@+(U5fs4+r0h7j-(D5%^VEBn5VsX`0wz1#g!Na7dm%hQlj+gBL_TPg`j?#C#!JBntlHp=Z>~dc>I#HON=iPbNpG8`=CDWU$N9&z zw#mzn7~XfOCX1vPDXaADzVL?hj-^Js>9irfNZ2`r@xh6Gm+M#wCRA^M|eW zyv7?ggJN3{k(=r5bnee>);usJr1!f|KU>98-}?BEOUNgF=y~9{(aZ^#w4{ii^v{+D z`&?>LpncZ@4Y%t8znRm0V6o14uiwelp9PpT`Au6QYtX-)U}7;1VmbAm)!rS89P&Rr z?0k_p6{q_Xq7t6HPpjKjt206OTO!&tpYH@uwYf z1!cFR^>dQP=g=+Sx>1Se(jwx~Go?E*ub*fU?8dTw@ENH-4Uy+U?Z)OQQkj ze^zmiwv02fU(oL8W43_Q*VQkg)iHM_lS4HO!v}v&23qEEf?q+ zFC#o)8pZH^?<%-sr;rVLMjUs3An@s_Vn;W=sgErvjgtw z`oM#)hm=oKA(CeED%^Cd^>pXm?5LQpdv6m+jpY9>$}?UdLm=e&1Qf41%syGCL>g`H zc>MEyDsSSkh?~`ah^| zd?qzZ=s+W>ZkR>m{{_nEkTU#5!L36mmyg0G64-I0J^8l71LS5dHydtm%=b;&P`z04 zjKrJ#C*Lk}ioYS3_d&`tBdf0hqDA zXVb&*-;Vx##|__UGD_V2|0YfUPoV5(-wRfLV}En$J~O1ho3dJPRHvMQ4gIoHI`?y7 zn&rs!1S`tS9l8^iEAtGaS<&qy^5 zR49`VXr+A*q+ea1gcwAgarS;>4?K*_q;~9y%|AVBa!h>4sJ`MrK0isA^%z7X&F{Es z>#U(+I;`b!(Q8I6U8!G{#@4^ZTlO+^c2ozb0pBT(aHQncNt5cGy$Rg}0WI9H3=<2I zoqxZqCyVmg5D71;4?vpq&Zc*2{5&7t2Z_R7A4!}WAAvTD2>;!Z<|v2aPFHgrRa3`# z6SLUrT?f^D17V(OQo)zs}Mk|EyTXf|9T-MbvG!HLDc4V~hg6 z!svRL!P-8oBV`FQtp7&UY72US8CvOuyMD5@)Hy$KMmqr$R{A|!Trn0Ie|U!%bcb<{ zvnAa}73Ug^J)-AW*3(Aj&1#7OmQ$24&tfBo%$cR{7G(mfkhY8utQ6z&ieSMe-zJr~ zWPB+9g4ijG;m>lX_Z$^O#sVBzR0C)IeI-vRRec&Q6Yq;8 zqqc}m;_1(azeD|5_~Bhs{oLnYgHblfaSMZmgbUyT89v8*9acpKVmdD7aYF0jfF9{C z@|PvOy!YTAr>Jl4oQPq=D86NZJ1VWzBIM_&Fh1u>`)-vkW`zs9Brfz34^&WFQlwCp zIbhsF(AetMhgzb)BD38gj1J-xRqbDTBOIas9axO=lV5=avq z?zzP*g`k?VF$F_g$@)$MJESj#J&3lyj#l`MLIVZFe~xVe{y&E;j*rz~%(v;QH!sTDZGQk#v)lUQ>Ez&vzhrJ(>{zBT~lE!r$zhkPj=YP(meb4A;sE$pGJm8e($0?A}?gkS=YU`w~3uN`P02JU9Q5Iw?ao zg-&g6JJK*F3#WvVp6ug+7(;4q7LoS8uUAZcG%4Wlv+u^bE3}_NfH55u@qWp=^=}0$ zBo>#ODa(L0Wr<4zJZy(3=KTTFyJHs0M_{!^|DD%$xuT@g^7+_0l>ir6sDbqGmy$7? zk#YKb;uKxOMiNY0BG`oB1u7v8?fXQnH2oxuiP_Q;yC ziClJ`)u`Fj|DrBr;Vcanj?FPz4Bblrzf~McMaY(ldp((&bKCa zxKUG8yx639AMDML_i!=QOxu~i6meDIS~sTgEnf4YTS29HljFj&pXyPC_au*|>Dxht zcU!5}98UsoA1jo7*!+dBmD`HIRK@CxcAe2Lzfl;)OH(asch^7%&5OQ~@9+U);Y(`S zXS~gU4GR1TZ)08(e6Vb4M-aT$M9?>8Ld+~gLDrL$R_3CFC0|2FPF~{UugN$-%4xeE zy!5~H6^fqNuK8-@dhhv(i``2q+E9hVoig% zBmXk%rPkg{S5t;CG$ukC-K6wmFBQ?1q>}N-F-jxl*7RboUfBEP5E@+z8i%z=PF4hy zd_N6GoogQ|xD~_i!FvO9OLfa+%Rc1xA+JBL?$Wd!iN`Dn4sTMS_9eMMK}V8?Bb`ka z-919#NgpKoNR01jiqc?rlY^|e+~*Ogq2I!|oNn{?yHPD_Qhn?CPyB7q2dZ^cq*U!! zt<#QZ?94f~d{9=h-rjr_8dlo)iJtb37v-kEVSwU}c^)5uEUYDg#mR~{h;CckWPgD? zpHdiQckOm`2T3y)c`(Z;w3vC_(&+gt8}k*2aI)(pP?c-Lx-Z~qlvIDiq!brT`q*U8 zYEdA7_vzE8pEt(|xh|N=ew%-?;!BQaW8IG;Xa^$xDZj8~GSfYME)uxjKi>P!3feNf ziNTfk)!_O%mNc6DwPZ=ahTwoTvA>IgvC#w0Hji%}_G5dxRJP-@X9JnB! zAj5Pn$LnkcxeGXDYc%k^m;@yPBsjD@%x(jUxneM!4KP330HR3DFePqHBdc(fR~CB{ z*`U39``eA5rm5<3#Rxg0ua%z!vp)SbYOFif)xZmT^#7i4sSNE_yGVU2H z+ey(qofnxj_c6?zDpZon$=%TJUi>|kPLd%#)Sx@IoyNWg4Af}R#5+|xMqcQPzj=O1 zqA$dDD*x*Re^>M83I5bOVA`3mFd{6tNctq{R)EIH^aPP;F0v?XkaH#@6qa2|B zF7{jd?W7#PPhRA`Py)ZIFt(I@Gm0NF(aiT`&r|Gv<<85JT%msY%Et}YdH42ZK^eL_ z?(=c;_WR`a0HuzIH9;FZXIuE=5LX7FW?a6viLy`i+-I{#{?_^ssyrGn&1ujR5G-q#-{@^DM~r|KZ8=MQ*GasPtw+H&W}DyC@)`5PIxY7^~s#YIfhM{ z3HY>d_pHhY96B+RVlqai{}(w6PZ)2hB|kt_*yx4)Ph4F^ukK$^To=5FC#X*yv(dQe z#`6F|gk+0}U+*irzG{%r?8(14y9Q{RfXNr)aXBm#nu+ZpBhk!D-lKM{n%_pIOP<)* zV@hGaPKPo9kH_RYD!V>~rKw`T=VddHst=a9|^e=M0k3Js&- zzT&p0D6Hy5pf&BN`ZcU3Os`u+^uUTDB#D)5JrO1E%L{wo|B}dP_gv-hG}lnr2vDp) zq#!-v(dePmP0L0&p)6Q>X_wbPy}bXcki4J}JpX$Uj7rob1n}qEV@XwjX#SW*>41e* zK>Y=ga#-{|x>l*@)%km|URpO8woKWb8?2h?H2SiP0wYP3$UB{hr70CZ8Efc*(B%2A z)=$&x_0&69sM3ck{rQ4Ww5;GzB%cspmablL?4I@fm`c}zD1$A@yjH>ty^u*>NMHWv zjafu^&ya&IyNiKcr|2DNwakn2U2d`u9W|%a%2A?2jw){3X*9x!ePFyIjmOc7sp~E< zb*6=y$xK$O>U4m0pyWIGFV*Lh^L8NVezM~GoF!WGF{-Gw0mjYet+xv?GbD0h1;r5> ziiRpwhSWOg&OjWgP;B4J12(Nu_3&k0{~T4O)6O^8F+sQ*(%rHDjQ1NEW5-#Z&phBY z2hb&cAGWsnd7Hz1Rb%mwRKoK(ijN&3@4w$;ePv1Muf?=&x(v*=UHpApe0RdaaU)3A zR##3hqbNNg5ou*>S(+oqojq@N@5ltj#!DhdiPm5VuY>hZdnAs4>O~8++fio~aeHhJgss5Nc1PAmz% zxM)X{z9$W|m@wVsgZVh$_crOApDEq&IvVgEzhji$DjG+Ns< z)YSHow=MD8X!3{cGubIRVEu8*O;G`Q-MjISy$(%QgHRlWtd8dtOhx)Ml{-qk;$nN6-5Cc6XO7V?538GLjPH zMK8zLKTEB}GeAkyc-OW)&oNjJ-itKqoNdeVNMmF^(>Vj{2F>2+x(Mk!JHgD>-}?9E z@^5xgzK{jTMv9)4h>9nz4bklLB3%Lw43Bd4lfJjioJn38FEH6h*=7^i`gf`63?D0z zg(*Fk`P%%e-s}&)ZC0P;TtIFG%5D6?K3f}Z2{RIT<$S0ea0M_Hx?;p7YNgPeHikBvEHcv?}^CZZ|_j4G;QbJGgGM;~<|G$uI2? z0_EX9h6RDI_|MS#O#RT^W>V6mHxp!Vix5+%@XzT*f$=jEqk%iURpAvW$oOy)mt(-J zK+bLb26&q!IWHs51;fHa;B2#HNly|tTrV_^=-cq#Uiqq0=L20^a>HnSlP#!sq1lY5 zwB#U^!PFavw?W915VL^EPTyOXbPDk;f?sQ1(ACs{VBK~H;QfX{i+OgY% zT@`fpi$0RJ3;oa`S?Mxzdsb=>qcRxh;05FLRraOa{>^pcv6Wo#a6YyUtcqMpDalDG z&Hp=f9sTsXCEnJav2mZTPWls`AWz5qsLjM#+S1)BZU3Lf%(rG_n^aJ1H)p?l%~qWovSh0GUpi$!C7mRE znsH2H@J9;=J`+-D<9_Dv*;N~(7q+FrYG1{4GDe?E*2^wE`KR0F@tst1ZXz!>D?K)Q zn**2-#Cl=uBMj-J{9h7+g#62U#^9i9W+7-a3@nu#r>sbZ55J}a&W9#MVKt+^**ZS7 zM%YP-DTk2a{%8p|GVDJn7ypxu}V z&uxbzy39Ka_ye#mXVTm+;Ra|Osie4Faf;zx7I)$KM( zP*++p$cT|r54pVHG#2W7Bfgh{+Qx;-z}4tUpYd1I@0!+TTV$`;<*o8>~Gr82W+J4E#-0ExHxtt{d`Y(l_oD)yo_45 zEdnIGKgj4B^(af-`7@q)m7o`MoPInBF$lW{zFI#XoKLK?w?1*T;!Bj@&hJb48eZ>B z8wvjlJ>BVTGp`mrvY{SUE4u8Q|2K1~&X^>#Ab(P`{<6>Z`l@+NwsM7N>yj#6oZai- z?jB)#D&4;$HvLKG>hEdbzuw2`9;vahF{!ppHa^xcCY6X+p0CIi;^XxNGnv)0nAO@c z?M(+DabHw)Ch26u#`||9=0Gw3atrf4VfleQ*G4mF!pf2;1SA!l?qRMP*Y)NG-CLHS z-_0KzLY6b9r6{2JfhC7&3Jl!_S&D{{y)%8eSOg!D5leQ5B81T8@-Ct=|?1@dIKEPdclE0l=+32`;<#XFapyl5> z8sCQ^01HC~ZmvCKl?l_IgIDYu*Zgq5wp+&Aiu1@JPQGJUJ~(1nzyVZ@xEX1RctO*c zIyblFl$tD~v{bUqK*?{UlP z_HpnY0_pEWYu^JX`Kc*M#QXMV)K`l9VYb6MY`20}Vuk1dpoJ0r zxn4`;bsMipA?PpsB*yH*lmRHW;_2@d>!-yA9hd16 znF5J?PCD8$?r~WEI(Ckx)z#VxU*H_xYf$?gPnULXeV&vfCksy}#q;5b0^&36=-EtY z{DI)L{d0nm99v{i_0bdPuZU&Lrigi5&1HSeZG4_p-(G-d!&aOZ%x!4o2o2 zU31Y|QWNwUnQ^f<3One5`6K##6m}vzde8~t&E(=UzUWL3$=!3hejTGey`DZzm5$0( z>DQ89Y~o9vCXwhd+CHQrJtJM!Dd?#Pnrc9^E6+k(U*GC78H8#0sHnU%76*gWgX%|4Dw7L4@#^YYpP1jI-@&x)(VM~Vup5_6D-4TsuxP9tw?nl(Qa{{?2 z-VO;_zG>7&21-*O0hn=-4TBAHqLXNn|AHkGwNm95h30n(5uAce6lQVm6{80RD*8)W zyF%(1EoQ=8R&Qz~&<$h#&8+%Nfv=#03nSWz%>w6D`HtjelssE`Nk`K-kEw1yi~*_h67ij@C_$1R!igVhCE&>T&lzqCk53B05Js z*1NA%s!IF9rclQ)%cT9B2*S>NwZsGS=K+QjXE5tXiH~%tw3OOO@PSN3`FU%vjK_Jb zMJeQ4&1!y!+Jz@5tRaXcH(G`t>f$FzvzXIzsnmzZ4YWaeh+>d`WniqvJ~<*`g%;0a!ArIIZcB@x-7QZ$1qqQ z?%@r#b>F5-Kr`+Td)=_;jUMxLDbx2gFku;4dGGVBamSh2Mj7qM##8rCx7|Z_;&$5| z4FvH`AfnJVF?ixv?4;H+seEt6)T;RA zsyitx?bTx{*tyi~;M367k3~k05xgDg+lCy(uk6OF-#pfPP(*x5=rcoQ@AC{s=u;0{ z&>hQ01R`qQ@|pQ;#!~+7(sJ~dbTAs!5)Rz!yPF|@f=gQ;eX|_9gFO>g%mlyAoe9O+ z7iL&+QW#+!#{R@09XWrAh`aH$_&nhoOp;mSm9)tHE_{L3`ey4>>dLt=#2&q&sK4Jl z+h!x#8C)4uXiHIP4rIKPnmOc4F5zn{``rBeNE_q2I6{u#-37Z+B-Fe{O9!*MP6M6$ zx7U?71`+WaQ3#$%%S!-x51fb3V=B)I40oONe6jfYtXdZDN{S2wHpY1m!hz}oxA!Tw zH(iH>K~sm;y;nh37XDHaD?AbR`G~mA1fJpHC{wFU6yxs>`f^Wf#Xhf2SWJ5Va|7Kb zWou;V-Du~f1*64AbrzNsR%kkA@yM~(u+C^lLqRf^V2eF4;npcLWV6EkxstN%SzLs> z7UxnvGkmL;?liWBVR#pwfi=XV=Yya7N)KhWgI2T^|NZ;dlRgl?HB*~jMUlO7Z90be z)p@+nf-u453|@$%hV}{1xMxfb-~cAjJQ4F@=EB;hR~_EssggMuyIa!@%@t8~;4n3? zq>F#1W{-Cng~istQFWJ;ljN98bopw%Jp5l5C_K(K9k@PBi^G!*oS}hh`L)AMl7NWc zIvl-#m=5pp_4YZ>Y0=n_6(|A_v1brm;I5>_}G+3X!p0|*cI)sT=Ynz z83rS8(lR1`rxzi!{v$M@zsFgjcs($afU zN_|&C#~6x!xKU@0vuClZjqnpG`rBjvv>{7-OIRUVM65-h8%vj!%tj2n;88^tDBviT z2{zFD!$VdBn~os>41Ry<+ek8<*riDq-8pvp;52A6p~MdBjVN~-#BOz%8b%h0=cfLv z9x??1v;ZYN&Fr#gvkKx$S)G`?0xY}~M^TnDe zdsMq%&*p=B9CjwrVMn}K8a9A?-%f{A!=9AgOk-!Do-S|blQV0=kGEtkvDT3^0vDO` z;j1bCJjmH7;n1V(1TbEcT0G{i=r$yQ+*&Mw6I5P0>Dd$p;x4q4RdtPoQbB_(xJ?aN ztbaKvFRyZ6)A{gmLXzF}3E#^_sung5qQ_F72?A_#`6gk?yqQGRVp3q_rE$4gF8eO8xn>QD7vREQ{jzgzvVCird3_lucb^lK5doqY3Np*J z-+V*pStAi`Tw-IzGTKz25jRmxF1HK@quA1fHO(R`+1S=f;~U6%<%YzI=p8jo5UiNc z4FAH{+`d0Fnrc+|*bOmy9-p{iSOIF}vhX0a+>_dIBsN(5(iYRaVK`syi+PIZLz23s zu(EmqmNP{pcyE*ku@0+4UfW0HOjW*BpNKPWDWvyv9EV!flp6?XP6vrm>OH8b$mtg{ZJ z&ME}%%u5*-UHWc^Gw37)s_qCSnEteuyn7p(yX)Y3k;~_MdwsU<$F)IW9o+bNTy0Pu zodCS2)X{!o_Y5!*`GwBDv=^%?WtVlIdxRoZD7W8W`FTrm5lM5Dmb5w2dN_Zfbslvn zdU;dn&eW$vt1+3y@#oER=x~#7FwO1|wM?pi&}LxHAAi)^&|AX(-gha5j)af!C-NZ1 z%bVv06nXW&Z8jVcv*eos;EFoVL~PEess~Aojz*KYAx5&a!W~?>FS2a07j5m9f9f7g zL|Je4dIIZE01{-db>O)E`OJ}~{~}u|F}ERvys04=qpX{IRCXG7NUOa` zgB&D*zW8`LG*8L>>cpS+><41_D!VUw8F7cjB6VrKk${MJK6I5?;cBme8$nxgxF)Nm zI#jbEycwr6cLi%-`bAt5A(1gC_PnnWfmSj-WyLdXlDoN(vZPb=VFhVc z(xv$ILlFNryqWsupwc{M(ZvKBy{$h9Sow0y+;$)}Y5$w+_W%C>OT#SB_xeB%#+Wgd#&VLXO{19YXRzEy@ntbSI@unJFHw7lrB>}}|e z*xj^Wj+9IGfgFTwDz)+YQgI{z>4Ql1(TV2f^j)kXN?mN=eE@xd^^%ua&t0r)s6!D{ z0IU0Td=0}z-L{<6x6$gl#V>={7i)s)B+bS?=|&goIoOPRRmHK=%m1jMH5ZC%AAm+g zIopG7!Y#3iH@U`QkfzBfiwx|}_s>k528KHqSmyMT#5gT4D%Z({M5tp{?wAQTb=gs$ zToB-Q0&-KX8D!e3rfbsMA%6ASFsi8{wQ(#}Q-Dk+aK4;J!vLCN_eJiiWeGlnee**< z-#@>oB$1s_lJhC)wp5pfzCBljJ4|h|`zSKo2kMy!vC*2eFBc$e6y~#3kA2;5myz&W z9Vb&xpW2uMz1Ak+O&@q$vl3w2X=5hCFFkTcD`Zk=P5Vw$`+zh7s8zTTQSekc{=PZT zWp`tnw+|sX4u@MCLipqPMlokfzvd}R2}gNk@LR;1`cDv3I<7Wo-<+o%DSyt;sR09) zE;WqXdI_VQ+mVszak1*Ol5yKiIgIR#99LPC{TpzdMO?yRu9hi3Ke_Zz^7P{4bcLtD zC5ZrQSSyZ2a>D)7lp?m90NQ~KR3o~83GV9;0b@dmzQ+|9x*wTo7<|}M-EIL_IO_LtvkG#)6T&?!k`^MmarZ07Lz-@z3d?-F15)G+yL1 zjA}c7Xb=bk+!T57HH`i+#*KfQM$XFR+OgBGm4a_>dLjb_PxlHD1SwpEz`)u9-UGB@U2skk3rP zC)`<)BL21gVR+Gi$Bd?W@L7@Z=7)?Wd@{B)NBbbGf9vy~heUc&|1}`68ubd*mO=P{ z^6zqWr>-HWh0Y=jS1%rZ2r|yC^%3^%P~S2C#!px-ZI1-vZKgs-SZG~_#MG#?0JzYQ@ z!5-gpGG~jETuw{^{p8LbujZan4I@SWZ0+x5*Xg&YvSM zTFie)-DUi@Hy7Jf_tT3=_29!tbkH>@5|kV3GO=E<^YLjSx*%I8^#9M{DM|E7S-pKdbhWl#8<3UKS3GUUE#X}dr8Exf&l@~)fu z%n}~j-+n38uUwImaDkcxOaZ_uJATC~}}7XM@iTD-77=>Nds*If2PT~Y72T!VKV z%BK$7&VjXP)5x8VxATSEhbmtE>I+AlJcb8P5$F*f3{BZ&nX8DBdcjvxf zghJ}OjH}v#j>KA|`s5eqU)q&SB=9x8;Eu1&gnN*;;Qh*lQew|jK_Y^!)OS51oC`1z ze9a|O7L_y@kck?eojUTWOeew6Zk)wr`i&%ZvzgBWiGWj_9OlHY_>cHC+aEh(cfF`| zZt|R%6WsWdDY!exOhWIkUewX(Dbmy_SSoaJi}}J}_)cOui~}Y>*1<-UmqBWx?eVkh zPqHoNlu-WJ79Tf>ty9q~L?XT^)z9rOZ~oP}6DA>dS7kbhhQy7 zjdV;3b0nzCJ0v?Hnf+U;^E&1kpz=pEWn15!nm+%hF#seaUPy zv!mIoI^XU-*_k4bKhJq5%HnB5e3kN&@;VY&uAi=B^UU&v%{KRUrhO~cN}nKwRbQnO zMWMq3)rEl}g}rB%cWG~>wdqcR*&RUch!%&{$KdWS!=V&?qlmxf4Wda4KLN6nK-STdm8AP_*WsO$7nu7wdehaVYs(b7GC;#^t({b|-3%3H((Rn* z_-$-{Rtpc2yU@Bi-;6+h*|1IOJY|gF7tCbaA-+U&Ka{K&1M#*gTKBgH2!lSG8%>Sd z$@b}cRP0=SrDhKm7JKLIkPeB2nKI~t8&-@P4(&!y9qz%j7sGH;VL9c&` zjcbjcuP>1=2Ls}oQ-s<}PJh6LJg;4*i%9Lie+oY)&1~0H$Ev|1lB;8?(!QTsbcb*C z4Z5yCoBIf>R_bYSo{_WQ+eU8t7|F|_2M*qq|G8Dx zMM3}$#yQAYiZPXV>G30c8o}?mo8%1GWYeg0#ldR+2Y93h-Yd5iXh6!0xJrLsi`Mm}@?ttc>R>bbn zW00ENg+szwsy|(pFM`o4edr`zFd3*kU&)C}ZKRu&bR`xC8m1i~>6AH7$lkf_A z_eqiPQ;7#rC;uFe0%3!aHWyGkmr~(gx-UBJ@+Ibz5`kW8gg}j6yK_7{_7mTz68@@b z+shO~>rj*F!Pf^{-&nuM&gstazkj~$w;`WUCs!*WjNDFFv9leA)eMl;u*J-cXC)X< zbIBwcS>2FlNqK^zdEh+caOkDB-%1~{mhd?Us8?6(vp=DkZXEsR`;u(d%-R@>P9wTs z5teJUT*d&$z+3u+Ob;qfk29+P3>Dm0(?iDhzXE@@9#dWY^`o3~u?nJ>)n2&=oHKZC zbiePs_E>6Ldj-Fg4`XG(A=&yzQt3gcC^II2YVTt<2{MWr$KsP_9|ipSLDJ9^*L<44ZOZ6ForosI4f7NNWQBVzLmhR*tK<`LZOpobS{-%~i| z#>_sI@$}zxy1t6R{g@Up9|1Xixgfiwu$#e?O>{dp9A6cHBL;?1|1j9e*lmR=hKz+@ zC%>^ETM|hyd(|ZG?i6;-BAzZ6N8ZsYuY#wi4-|E6LQHgOoIB|fo{ju!=5HdL9&Q3| z^NdDmMg+49CFoi!9bZ{Ej6u%*D>9jWH30#-q}NDDo}U#MqT*8*_-@MdWx1~8;$CNo zu9Zf`|0&=WkBTbSATc?SC>nFbG?}K01^g?Gd@BT1WF5l+6rU3SijO!hE?Cql7`p3= zeWcv!Rh5P9NtcwrvDe$|G8@GHtFZYvIcm}`ILE{MW!#hg&9r{z2MUMeT^eP!?l6#4 z3{<~v9LsQNMup~5-8I8jVe$vm9ckC@cy3?rJu2y*EZ(F>^T5SLdP+t%dQGS5^@wUl zg7W0#Mv1vEzoemCjtVb+jVSbCOf5@IlBM?I7gwU$I}7BU0fw3=zjqb{879gX3`yQh zEG|kI-Z{Ku9wCLzEa}nU4J!^6qrqyAO*5KWhGTov7FV07i!)`*(K~~eL1Lj@Crev6 zirDN9n%`eE!EreigeB^`MEgv(@ez%M8VpL_4ZT+$<^jJZ&R$brHq~Vc5ptGUEW_X0 zd}Oy3V~ZKy>%tiL09p7MVilBQp9%QFkY13}5efh=uGeC06DbCU7cdjze{0AZ*6az| zvzThs+tKq{p0QEYx2G{}dbI$v>V-?-tg`Xobmu7h;8~~cIwja=z0Buns}YzBdWqX1 zYiRI|?K87WF|Uvf+y2*w64Hr&&>=Uc9-`m32owUVwMx;hN@MBEL{?#E+k9e&&;0{E zY-TOEO@}UaqFEo}?V*h?!+hn3N@?+U-Ne51jER|0R7P>jnB{hf@kV~6j3ro0j;4U? zrcVFgh&^i4@Y80^Zn1FsO6f7dy&#;K!_WW%MpGX7eWQF|)(UmQ#NZ&-QSK+sjkKcQ zgEP7(YLv-W$j31ReK42AqY$1AQ#po=A(9pOUV^3n>kvIAJnp-I!*Oh6Wpu>lHQ#hb z-WqYfEt)bAg=zCZDt8h}BY*XL8w~LD$ZV*?QiUM?V(7-v+sE5W80w%0$6MqTTeRut zT78*cQGjg-roBXbZh^l})@Fb81Y=~g5I{9*s5dY8sA&_By?X>Rt4Lt)OiFjyl@)zC z$o5hl?}Ds#($-54Cjc@2qdIlcmxfkSE&e}G?|2Vf=U6z%A}Bk*Q{%z-d~YV zC*IjQIQ>Up{BN;Q^*>_c>+=|TCj}iMdthd%oFbP1an*&8NTMY+h|$M#h)|)$|3_d` zj*70TIzwUc7miBiYOB2)1d$rRRdEM=+|LsQoY6(Xv1O*#bzrmeRcQMv2jtg4bv3Dw zY(M;{F!SW9(tCo4Ia37mw{IgAORM4e9J(k$4Sa`gY8r~Y z%BeAM^i%=5(Qa?Ts|sbtKGTl0oIcQ5Is7FcJyxM<^0LT%n^usmqM=B9p zB=IN+FyfOk^-*Fs&G~inkMQQ6UfmXXyTXJUiy{qMpecx7%eS1)K~YbWsl$OF&LS4Xp(xUujjEtIhvl%%mRz`j&_Odmc{49(bJUoe$M z1A^!5R17~2Mj<@WYC{wGCiL?jmyzxBXM{21__DXAaUM{j<^uR0IjMzg9e_K zm{kPfb1`U1a=tC7Ve({vae$o6dM8!&ZdK}OAY670!+_@e1M+L4_!c*;-B_>!H{Ecj z7k#0&W801=#epjOwPFg@5ZrCoLA4Tc6td!%stq~kp5s=>Q{;j5$&;fUi==F!a>}LLnD_zWk=t(uHrg4A2 zue*7=T|Gwx*)92H>H_Q^xCJcdDH9U&rgX`ahpMB8fUMW8x`grsgZYQpAOb0i6%%et zr218pLT)A_%SyeOGQ7&(QCkW-y)c=riINikEZK#S|7q)`@!p#a(el6=<66d8OrANE z83^SWD0EzOogQ@w#_MHeh4Y@jpY=tN4CQnEQoRP*aAeAWjpd|>kR3+PmsY#ODik>~ z-49&Z6(IUfBP{ajPQiLeTt);YREkF%7V4IM0z|MiB=|nX_@@7ECTX1lqm7hy!GR_z zLE1h)mYf7r%`9~Q6|wJ8|CJ?NtDO5U+KRy~N{b@L_Ya9m$^*=za}?+|64+4x72d{c z&5bH8ULNdNx=1T)J0b&nh?dHXu~bZ}6GCO0AMy0jaci(j3I%a|TY6c_ zY1O%drEcaexz}zHGl9)La7SqoGh5->Kd#syJ42eiIlk(O7KEbzt0ms-Ywb>MTPm+7 z*ec+=GOsVp8Kd{#b*xh-&WJAsk;JVP$(X8q@My?vBIac;Z>;JbXZhcR*jG=K&*n0VvO6Ic)Hr_|v0KD_hPsaf z1lNNYH;x^aV=$x-Yw&Z9`nLdUxHJ9@@)v*A!aVC0;NWjzp-&tFf=Zd8v53!3M))k! z4}@3i&%zrjjG3O&05k!W9YBX@9NQ&Dd=wQ$b=q#aUVLZf=j5z}X4CXtyT>YBQt!sv zqaaPUa5{9N3B0e@baoKVxPTc6J*Hu=sKy_1EGc*!P2Db5;(;dkoCgGx#)-#Y*-9ab zd0;pp<%SMl=NHZrwxY{X3ja9wGJjwuR?e19J=-^q$~<+FRNHp43q2JtK685Uj;Qxv zW*qI)7{pgvm~Z@Uo>Y?EITASzS?Y^R)i|p?npoQ|DsaoSYJ-|_Yvb(qT)$%X>nPMB z*)%~vp&Uw*S9WBS#SAWEXgut=7^vQE4T2 zQF}3S!&#ZT=oM$x*-QwTB;UIK(u^Lj@b37P?Oe4)EU0Ykv@6LrvssaUQexNkL#0ul z<%jA;*Q;uPa*DceAAPez@>9iR)OV_zcMeZuptVtU^mIi?+W7~njwpV&ugwY;h4%Ko z2&^${4Qmo2S)WAAk{S#0MhQrfhqg~GK!C5!k;vVCE`O#RoPEeY)|G?80aG%*6{fnM zUul9hd-C-jlTGSH0}BG#_tw3*9eBh5H)?CKe?xT($4~x^GnHn-PMMaD! z+uy`sRw_=uKK~}}GF)itWAo5bgqH8KmQW%Ag1|3ByuVIKMl0A8mcTKfRIj1~f1dXS z^4|2X@P*Fw^gBLddbY1e?e+O{DXraxKrZ++*$CsAKqo$^DAxEyUWy^4dOru8a1lJ!PY4n?yigbN(xd}o9shfx3BE!t0H%M2kdv87p zx`1dG4!LEoilmWq*sJu^KVPa`pV0`K{~*?*eWbGIhBYn$O9|Pb$T&rhyy~}q1k=3qm+=UrOs-Xq>OSb9yf+m$uP_y96|wBl5^N(W95tXqr&e z6s(f%k4nb_5ti!_?bDiv&Z)`v2wwl^GzGYa6cK<}jPq#k<(eFx58Jol+$EBZlJf~= zF*$>OFs>iqMMPgdKq6WqbF_zsMQH+9y?;?mW0(FvrrtWNtuN>rMM`m(KyfKKIJ^QSu4l{ZOXb|RZX$@tykVytNvlQ z{vlJQuk?YA;Gv{Gkdoerg2zum*ENg%^2f!1ml93s{nji#%+dW$QoZJKmK=u3>lP`v zH;})o;^!CUO|@4F5{nl+%z%v0vhOZA&$gBOj4(!-f7O`>%#M~ z85zMTJW^eyeo^vFEIxdnIt09DV=gsljsoM<&N97+O(5hF%bxVFyCc^jz$N?SYhA9p z3n+eenIM8+x?;e$z9lLL^W4m)D8D;|3uAZ1JbMVu9udAS^4|mAv)MEL`H9NnNc99X zHRndwHOg;3YJgDnkM<41?hov@RB>P9XXU$(rXUu1A_R!0T4-qEf@I#Sr&vm_xq;fj zG8zhN@=-9xJ-EkJULf_JMNC`A&QPdUVD|1b7FUJQqY>Z;U_;X{9(?{!FPmj1eVUlCM z8>`@_f4B%uQuV1C*JJePOD6(9(Pp8qx!@XG6P@Efl2{`b-p~1uNZe4NEWF;@u_iXt zAm}jzk6!s8F)aqr%@`Z$<;oz|b`|@9yt&8!sT$4iGKSrS{_;T1exygH7Y(BWyUrix zB5=Lt<8+=!?sy(PI@NSSptSDGt5oYlS$bxY?fXKm75R`!Ej+m%H@%j>J*=G3>)S_6 zy4p&4J1iFza7Q3pyBxHUwou^=a5nwntHCl??9q-|y?2U`<&Bu`P)b9RyM0)oxkTKz zlwzH*Rq=2dzC7~zz0tC`R%t-AUB<@NCxNd^1$_fS>;&etY6)*<6Ny*;*3uk`UMeL) z)3v&Sz*gXQJybyKdhRznW)$Sw3@O@;$nr^2pyT2A(nz|F(P%84Qsu3Sq6m18IY~4M zCqgeYRECp5xEKm0QZG{C?x^y0VdImYu5tnH^`0lmaN-H-kTkF;4fcXloODf0l^Vug z%^X>2rOWrw8uFD`kv?dHBp@O&zHYH*;3tuBc?yErGn%H4^mFW&L|a9?fuA{lh{1_3 z4CnO@qot?H;GpQVjW7<@ z?X4N4qElcV&m^L-I$)?9)H-}iZhiHsw| z=Vdi>5%3)S`d#=;19ME6SfME(+)uI-FEK12ep`p+9R7DX9 zJQ=j%c7o4={a5ew1aAnGasp`Cbqz3HBB%=}Y)t4c?c(aap z)VR?59FB>%){2>@So=Dtt=Vi#yb~SkA!w4w)akC5Iri>~;YY+MCJHUx&Van2zBycb zHmK~vS&{OGpsbgdEACJ6TLKKDmkUMszMLgl)(XUh%6F-_cj{4x-9Qv3ih*r2;B zfH-$yJ#d3J0ivScJabtWa78`Y{vft7x%ox>#ub@9hiz9df=rpabK7sv@Z|jj>{SdKZwxE0OJC^-RU0l`#3i52v12rBdqMp}LubCh4 zHbi>v?7gx60q^da;~fMWO0zr%^1_=1nAjHsP< zlC@+jzP+!|Bi5A!$tP@NG_Q`KJbd^GTq;Z)1Tls}D1MWn)02&ASaSf+@Xbq6g9c;!IENeDB%iG zlw!15^s}ceoF<9EU8b=;Vu)7Hbt{sHIN) zYZzVL!^Z|Xo0!qUr{kSFL0_tR9sr-NbMsxR|yghW6nDVV2oofLKzTLM8F9Y0BXgJHpm5O!es0?-t5=00YB&`R}d z?-wh!^_1Jz3djXwwCN zIjTozTJh_%O+B9J3YYVrciW2vpe!g&dp8QHDW2jnh}BfE*D1YVI%T8iBbk}lA~i&@ zpDuu_!p6;**diBfo0x$j$hn5`%BXQL^LVr-_k%tLrJ0^wTDZObrQcZjMHv(^%p^FQ zP?%DcoW6H}j2aw@E9$34)w5p+w+?rz>=Dha<>Z^@`)`eaZ&%xt~Rr5)n!E& z4BwBTkp(zMjIbe(9C^#XUp#eU{WV1a-K1bGd`HmEuY^blbplf4^yHDBnsnvtn0n-4 zhzxxf3cV9qiGH4kl3c$tJLk7|aW4SPCS{e)$oWKKG_o*HECRVm=EJfepK zUM%GqrBtt1r@9fBNSL?vp*q*NVvqM79-U_0{EJ7Nx5c!Sk*P1n0l1cn!es3 z?pXj}I(OFTE*mNgW3P*TEfn7Foh~)?~y*SoMf(a1p#KJ9JqvyRc}A5LeARF=4)s{ahXo!r$w=Mxtc+8#8|N zbZ{fXf7lf>+A}Mvp{u@-r{s;P>362S!FSYyGdGYNNP`HOMOz7eHAI=GitSq4U3i#G zN@J+Chynr?D|HW=Tbq6Xwq{D|XI|r_P=YB28yq@9a*Y$i2zi+k+_V4>^ptoy_ec5DWp7Yj1Z)w$3!F~a9X zWy36H&M?RCL-4h9OLpV18FURYiT-{pPcc$<`W31)`|M_qz;}xPR1Z7g$6CQ%vo5<{AAON6X>-=`cti zZ_O#)%nxj49!y}Cyv^}Ph`pZbbL%gm{-0`CY&$Xda56WrAG2iGhpb_`9+|IMxlDkG z;xX?;RWbm$5~wqVl}`+n6`U<*uIg9ADM__cAzQzQ{gzoyq&vznFS`7M1Vd3>XLLWNrV&^g9{q&>h;j??vtj9u(hb3p> z4&WhSnC5_bB>LjD3uHzzE1qln&fv^An-fyc>@eyas7n!3g0y?W{9a+D_@ z-GM?Q-)l4jaJVsNN;ZP_x<@Wqc&ipFycA6M@foD`1f_pT9@ddeHg&-n188`rOWW33 zQa~+1_w-&t_5npSnI(R}(sg?-xD3lw91z(NP|uW|@mNRdjOLs(5mQ@Lz{-WRL`}cs zrL+f&MX0yRmJk_1dHYb1!;4?`m5`~#Z0m;sJ&smB^sjEs7B2l5wka>FA;^USpPnr?q!2wki1nUT)O>}z3^B$(P``MDHMPR#qP@-T zm4X z9n4=iHP>Zty2t-_=I-#dk-w1rkEwj}kp8;uTNiq?CsuZC4e& ze>NPq!qabD2P;F?G9%0xWA*IO6%SZSN4(Rd#53dqxmTOqu{zGo7Q0}w1ydLndYN9? zk*X%|KT27oW1`f*kW*RZs{SLX-5cC|PB`1BIC3w(3{pj)e0yK7T<%I@dBCae6|Z8( z1A|>M2H|7wcAo2ln^qC_!h|=yx0TPk;F`?0;o6k(abuOag{EBMfA~~%76~NNac>rE zg;g)_s%F&0!eNp`bEGo~q1t{j<&Kq761;5kB}+^@)z>5ZR{+G#D#wZG66AC##h&0EbL8BU;V>t3oxwN z(H2h>N{y3u5|ef39p<$4>O95)Jd8?~6+`_gzDRtdjrC+7;v+icjtMihLlu7o5|5(a zRVp4kVBR^~-PjgJlRlgh3l};Ojr{)ZK+%=tZ(XA+t?v=^{nQXj*S|UMX6ftv_8D)Jj4v!CCfP0 z^JcUp>WpbT$GUV~P#9};tlVlUe559)ssQr)+bF;VY!Vk|LN+=_Du;la8ai9d#<$$? zF%xgEC7DZShb;mv?T2UhMYJ39^&bnXw&McMAG<74yV?RQAz)7y=P8bpuW3+foQ(>f z#m)waR02ij2B5izk6lFCv2*#^{4qgvRrOg7K-Go+G@!Blv)?FyT%T6R>>^DGCxv)z zkF@V~Bxvi&$;S(t-@{=J6zYO?4QkyYd$?ZK%)+N7wX-ht$3qvf-Zjf}24h9NPDVSv z^n6`}F_)2H0Ci@ox>O8W(!2ps+Jwn^d`%}IL9e!SR^r3^XvKO01}^uVyv3$;5>6P%Frc{m(4n#`k z|8DKh-rSc7lySbA(L`Tm80=gS$G7im2#@Lyp+K3J$V%@aV~AGhB|eVqT^e|+#;+*+ zWt((|)$=+!{G#fA;PseG=YOBeUNj0OM!!UkS12*rZ&e{2qT_Wq2YNS_kc+opS{{3y zBZ|15aXwz13ZJK}HgA@B{Eg1X$6fVj^LJXQzAf39U-@^=@lnKiv>GE}?Qwc_9fhG< zmq7Kn)5So<_hyyU@1AAcDF@GtjafQlwwKZ=*$%5JVrK}fx7UNR*b5mv#)IZNr%81)((l{F!#WD|AUpRR1wBWQKCXRSw9Em``{h*~izdP?KQLPQcJgASE_ZwBluDWaJp=rN)sDr((%p@kt! zj~MB_#W|$AYJbLyL}n&XN0?Gx>yw0kf?BRADD1QePUf^j3j>Lg6$DaZf)S=!caal3 ze?{;}5q)EM+s3S{@GQxzxZ5evn473!ykp#cTW_MVxSH0VB#bA}H_F4D%H~G#Sv;cb zw3N{hAw}+y3&YN9WR%@`K4&|;JCjq~rnUh=JaK&kg%rM-%&EjZd2FFcW)GG8{gs4& zsZ-d5=?BtV?)yDV5q#DexuV*u&d5q^i9?A}S929qj_=SOuphV{N-3D%qXJ0;mRuN& z-&1QCy$^ItHas1Q2H)emur*9KsS~+SR4U23ZwxAuX?tkL8!fSbIOAxAR%5CvfMb=hJ;4B?*7!D!VuUkG7?RoOYg4-Q2L`O#BJ#X z>$C=om#1oR94Y(Pn(O=k;cB1Roi~S@Mo5y(?xfSdM_+!?W%=9xzX#6UqdcR~4aAZ{ zp+my)Ip5T9+En$|k7eTux~CZUhYty5XP&4q;EH(vwUXQtpyG!H=Vy^5yD4m%rqYEF z3R%W&{@n7+v82A99pgz63yG)~n9HeB;}64c&^rVLF9oQ7ZdP2;hY9~4a>45eCGa*~ z|2-i4xs|&&4b1{;FYb^4_LE{1)E2M1RJO$B9QJ|rJ+Sb7so#$AG{FPO-fs3Xo`^XP(E>wS)JSb_@o?d$363Y3X&ZhTskh zl9#}|cAa!G>r7%G>kz}8_hw;FI)}j)=?07Hl7`*Gbk0fJ?m18Dom=vnD&+u9X&Kw% zJj4W53Ff#pKxRXwBWS{S0-ZFW(}5RpZ`ifnA7(WO-P3C;%7~36K>7LyWMc ziJ=V3+0iPby}jrhO0`log1Z5$k%p4mQ2MH`IFj+cT9pw|I00GwTa4JIJefByV+={p|KVP!cS3N(!$bg5B1E#ea;m z-v1+opAE1;OSH!bT`DL2C!T`}VS8!44De<+O{wmV2;Lort}Dv;y5cN;d9JCx;WZIU za|Lo*c~=^-fcOX|&3KQ~VU^S2FNn^ve1MmXf!Npia;u|fPMRmj|3e|8@WlVeSaHcJ z1N=&8PJW3UE<{nmFRSF9_VQQ`_l}4T2L!{uP=)?7m`LMk&v`BrHGAde|0nL%gt6}F zOCFm3w^YRb4@i8nGJp;+yX>2WN+{kqxQqw)YE*taFiBw#NRvAL9HpkqkcSp&P7&p) z)j^z!0*gV(W_(m>jXw7$Q;R?ulscRgl}VqNFrN5&T8P9bOs0#+R#r#%Ba?zIeRn61 z=%OH0BPy7)ULJ*CYJg9bXqN6B^sNKd<~KB#dJFdVy^(|T%#kM&ONB%5PE#XuWRN7z z5?etkCp}<<<~?5~{g|qf{L+tQFA^)?3QSs(&t!MM@-gAIVdX``zCTzTQzZZH6%los z*2oM4Shq$}g}~}bx#%NC^>6FZbIX5*pj%i`=SR0re@LIkWKPShcST17K5AsS_3%WL z$EJf-Ovqr9x$EYVT_e9cNRwa+Wy+ zn|TJkaT$zY*>;yR{zDOIRV#dzLOOTRp*0I@wS$NLFLOV!@)63Mi#5sOF1US1TN z<%iybxeRH-r^T1?l@@`^`gPTxPAt-?5W7s{7icXFYlPvhpk)Ku+_+@_NCs&nWNioU z?-hZp|GgcB-_X}2&x=IJQ_TB#{P<$YqFCwDXnB@s^B{j7_g=zb((A&bnX}%-uP-?J z2W0^ig{ByrC0?nOEMvwvmtg6SOh#l%nwe-U!EQ;buAO7Y>AZR)QDei!G+&j%M6L1& zS;F%@OwW{sjeTAomTEwOI@9tE*d^dH4E_j%r>o4ZS$yr}-!mC=C@2C5ntYH7nxiT3h-owm@1w+i`G5;ln=EYX{#;rt_ zg<<9{U5d3zecllIL2=3zU}Y@2TgAC0RGXTMxI&;l*Fq$X1u$As{!TYc32X=0^(>=E z&3H!;emAizUpTrtq)LwC{Bw5`v!hr`K8CW4WTF2w0lBXw^*}s%+~Xy zS_I-4wiy>Aic&KL4{%LCGe`(B`Z0{H6NoqV9*=RO$H%b4Oe`fvv?P+u>a#Xl%zsBh z5~AWRNVjF^%d6Blxgtdvc4Wwgnt3E-1IBO_O7TFwcP@8ElYLX+ zED@?qGlyYXV)fpPBh#;n_y-@Bnb)wTYBf+Z2J7Svio4ej$1+|e@Yv8zIyYTG zLdl?ocjaX|+cD*MGSDW;i{qqX_5i`e+5$s`od&ie$t&Jx31@dKl%%6sGLpX8)>|V( zXDFu5)X3~0g5+4W!g^ZBBq2)APn>~z55{{a+urIKn5Y}E+Yg}iithDGSrxE#^{%^d1< z5Un9V^fzJu=ibkmVIn~^?Ui^>|6MtCv`oMQx{%qJyPLgp%lPI$EfK{`dN|r!kt5Uc^{^3IE+jFg#}H(&s~|!)*?QY|wvAsV zgH{ou`@wdTQP#D@Gb)%O?p*iCQlyj@1?zJ$PSlsy&Zbjaa$}-_C}pT-_NYkohAm8@ z+&Exvf!(3wPY8r>g&Bpa!Tc!P+Z2OfKfLX9e|D5Xps|P9PBYP#dJ`i_&O+}!p znlw$Q$-QrNB_3g=J)k?`Sxh**YRtzN4?CPwpxyl{!F%fDEZCv|lW^>%pb%f`b)JV9 zJr*autgYWCIYNKu6P?u94pKh1o*iKC{zuc{=|AqLK`C%E6Y>=UzcIr618#z6QNMSBXunQ`?JaRlh4v!4|qoqTujj_GZ*p)j&1!_M?s;D z=KSu^e{XtMxeESXqg~sH18TZD-fTAeA=MjR<7=`NAsb%L;OIRLnP5=_ulpfLT^FAV zFK-&>^R^)GU)-BuK(PGjMRek=c!$7#2=vDuI1?tZH)7%A5B8GVXAPvgfGherk-od##Jl#*!`CeH?IRP!X-VBCDYCH>Zy9JrkLs-_km-_0dIH{UeGSr zA6R8y;DmMl_mulj8&966hvZJSH*F>lTU}R;VMG|4i*irePaD@hJGaV>ya}>`{RBrwA zKWw#1_*=EI8Moj#m`d zB5Zg`p9}T@c8mnGihQzJGaoAN2~=lV>9z`vd-}D$s315Uh2EsyRYECoorxI0Rh3S7 zj{18O?xEq|)H~k(kV{Ew(T=DH@D;5l-6ExO{%yh!sb1C5TkHb$y>*4;ljmZmrYWQS z#zM>T21;iNEUtw3Lq(`zg`?9L%?*TnR>D=GnQ&9*=HiK&3YrBKAK}N2YSM#~Zch&; z*%e{#*|n%7D&!}2wCi`;SrTjH2Z#OUR)EqKA>jOU_$MD;kinn2dLCnn3|ln9wJd6T2#wzR(Ac-=PvI`b2Giir zUyyBGiP$!%!o1dvsm2tgWSRwS+<;9Q;k}b{!9gnHiq&?Gj_kr9QC5czKkPa;s=iMS znD=ej8zzRw>>+*Y5vOZ!v3`#^Qi=E6?{Bpad!JZ-z4~BW(m=M};)^*s9g48mYIy0S z?cY|By|3v==AF5qviRqU$u?)jcK5VFmg7Vhhm-BH9r1AB&Y*YX&V>H|r?kc8ho{7; zaVh@~Cw=aGitl-x(}(uwMd|X!nf7v2cE1d?jE0EoCObvG&_e@n7Pr8{Rx1-zybUq@ zp#E}IvWp)%u}NcLWNiOtT!Q~^vj60eTX>+5Fi=E^(kj#@NF9J=#(6tra~|hoNYYNo zg$o(?D%l_{e(u5%p?9^*l@GTR+!N9>sw%56!HRvuEe0Her=o5@`72#La1S)j2`u>b zNraOZ`SW~^6~Hs6Xw=!s+Qi*@4gyMx`uyK&CFBWoV;|^!vl|;G3>A7eW9MZVD&GSdLkvq$-$R3WIS}z z_>bz27_OMAFL2)5EyIheW=1k_2fuo-{D17Uxm+Q|2iko9(eaDTLW$To9L>qu;R_QC zG3E0}Q+m>OMKny|5i$baK-m(FgeeIw*|*G*$o43-11J(*ni6g4J`%Os=z9EV6@s;> z`={O8Z4NR&%Lr#cSS{rRLUJJRbr$dpVlvGCWB9_jJ19tkE$0cx^NBN7&;aZvfQBi% z%GiR6#f=N^;e&=v7Lb`yVOk!$k1dvW3qGCSp-!!f2clR`DP z0#BQmv3$lro_abXj=LELW0`1}X`;0T1DAvlNA%yBa=V(nXrX}wSpRNl)ae^fqOnp3 zChIB*`%d|8J31V1mFjpXW7e_TR**AB2f}iQ{W*6Z;|)Cx49@X5Jy3J%| zTyf{Up5BOo^@#Z-m8&-^+?Ec#?G-2za!j^bEq2qmwjJd;o`|Zao%kcyjIr51#_%lT zYcg)rlirr7gO!fD)^^9=*j1S6>lGZH`lmuQE2SKv`b?G2%Z=!`=YtR zO@CjK7M0SI+WAqiEclz>Qz7Nud3bWIA{|*Qm>g$_OD!)&ggs3l4f3&*4c8EZGi)7NRhYYJ&fX#N3_vktl!V3jUXs z9msTJ^1B*eOi@^N>;!Bge(BL{mSe}W;xI^bWL}g48NgFx@Llj^V(;1J#-fxw0uheY zi0a*q04Cj!V0C^^DUpIIj$@R2q#{9)n+QT;clKAHF6>=4E{O%Vj6ygRbEESRqouZm zAl&ZjRD&Jnf5Oz6YsE>|6&V4iA!32fCzAHMC;MZcBOk-4909{{KEEfnm&z#wsE-0tgLZiEq=7 zKY8`KeP4`!={j^E?r`vCk#D`#Nm$YVmD^76v;N|nwg$xO9x8!g3ZG7UEYIKgjvg#m znt2DbZyF0a#kcD?{Vuj*c;=M^=jFWChGd#X_Co%gm~~yy8*hTlwm`j|@7)-;M@~jb^O*WL8=+^3&&CJ^ex5Rz0<`r+_;lXlLm z1aUf$-!rFFyYJ3e{;;ir+ff^MNm!a@Rp;^j5?tQAbXGq&lglo|v@@i~X|O#p>Him!e<6(_l<8yP~$?}=UTV` z0s4fLSL>XqY6>y0sqW!d%q`wa*P;}d)duHoJjyQo%ajJ+oZJff)^Hl?!!}u%lqjRm zPhDLLmX_lA<|~r!aJWy+<#0)U3vn;`zG=vnQ{V7CpE+uFsiKgmGZXg~zV5NNHT7%k zwcb~g?wI?Fk&+4Nc8!Gz;$T|D4NSfz&o|@8jCwW|U?00VbU-i0Wx5IV6en!qSUuMh zT*tfkdg+lVNbP{oR`_Ht;OE;)641&8OFn9xn0(|54%H`DQIskW{d&f=u*EeoH&ls= zUi)PDz}{MB_=A_@&ddq;ijZVMIuhds!mq}c9G zPctQd$?iGseTdWVABfVC-=Y8`%2q2Q?s&UHi?Q){9p+c!_R9@g3u$WodL7}%Y?S_so@7Z*~>bq5~>;g7@mH)vMWs|jsv29tu8@71?z+!`Ogcsjwp zT-NT*E6SbCPyZ|=QQaDTdiS9VUQliJzRLfJ&Hvu*)cdBY|u7;_|G-*Tw{W; z?+N4Lq50@YtMj|lcatBWWLyrT5HUm;LG4fkg9H2_cQ+mvMQ5c&2d5fTHtpqP_}ZFM z@l;dd!@A!1IDZ<`HJ`Ba`x+}E_>pA4uQrZeFT0aOHiSe4T5R&&_0wF)bDquwQfrx9 zHRtyU4K5DdRt8a7S@0V3iZy!yD9BM6-uwLqJ{ghrfvkk{st@E#Ee{!#jyjDg}Ea)0^_1H$t+phAeX+8DZQzq!PXi0W@}kK>6FBG4D*)$sr-`u})n)rX+daa+!T;Tsc1Y}gp;qSU< zCs`Esnx7(O-E5Dv)k+unyu#pev~B*m?yN$R>Ab#i>}NrlF{TltKbQHw9d*||FpJb! zZK8=KykF1+-|ZMU+WQbr8$A&Gj6wclW!|1D-d4S2Jy`h?KHlqWql8#~g;*T}nk zR_`nV!Sz|f*_Fj|rqKIH$Qsy{6;7Kq`Ik59@Chj~pjA#GL37 z3ADY@)T%0+|d?s&M>%xr3G>ll}5a#xI;UM)Htp>N>y;WLu7Y;w`qSmDLq}HH* zA;mCyWMc4tB$lRr#yLMW+@bQpX-E(adzJMAE`}B{x{M-quRX}fk9qr!Z!Ta`iFN|r z|7hFRU@>SXB?|@3*iW5&dJoEV4=uNr*`vCYIM8=+*ryqPk=MRPJwD2wz>Y98f45i+ zbxtlwXgA50)E=~f7}y!~m1`~YH$=+Nd_n*=lA0T165k~lZ_z_E1S=}RE;RG`mwmGq z(GC}&i{Az}QT9YWkp}1SEn>?7cfOa1RGAD}_ifdGwE1?-nAvH!LHu+=lItZ1 zVO%o}U)qcdL;$2G2GK2U*+LsY_a2A+ZZ+Jgm3aU7k8Q2k9oITVWGXJ0NN<;_*Gg%G zcXF|ssVGG4pl)zC=HbTOJ*!7!;g!N_GGxj>=Pt+hXySVtLGhYsuIGZQC+AmnDgs;& zZ9@3R#~Q+Y7Jx@JIkqYa-sB-pRD-6%Wd^Yt2wzAc8)u$T7L zk&@3f*hsg`rr~WujzGiz);nvGV2w6TVY6ul@T1m`JYaa4{MI{`W7GWVq@JoF-dL^$ zf?C`h8j#~|@`B|x&5zZtrkZzw9~^8e{I=OXda~(n{#%(}v-^E>Anp81`#TBFY=BDZ zQ>x;}-W-=#{{(EeRm4NDkG<{Bu;~H>gqJG?X$h@sm`c}B`S3-c?$vx2C)?@rk+*#u z-ri$lP#a&~?JKK(xE<~35BvL$#olN^bjEewMGo0Lww^u3zwJKRE&l$I&aIZX=A({) zTuq&ShF~+AHD~CZd7w>{#5j5n6>R*W0`v0K=#oa-kEUN}p>3;nwRVrwNwmJdvD@2T zz*zefYcJBv1J{yrRquxw`%SULZjv{Y$1VPS7kUg9(;aBz$?NdXrvEV+vb)u7!n8|CD1K-xI+UODl;_`95B zq+qzZjV$e)?m|RX<$OxzP2>62;nPv8&5T!)Vop5i?897$SdExUhwDNq%gy|~^|Q@( z9?reMJC>hJvJ0<`PfMSs@$|VrdVwFSs*UM;7Gs|i&ub=~^hweAdNPMuW^ z91s-bKby0{Gu1fy>QBc^+4QO&D0{} zkEIch7Amk%$Cpz;rC$@4_5eq77Jb#7E9bEMkNP~6oy*b%%2~b$qr%29H8lq#bzHM3 zpSX}?XrN$lArdoS6Vej}_Yr;B;!43`dgGKP2{~k{37y*B5$%#fR|b}FpEMzZ+Qt2c z;)btWjR(zyIrQzx>brTA2J$|a_(qGL0FD0+g^d{VQ}nIIuJo;I*;Z^QLsdQl()_zH z(`osu=4YryY785!hY&-ym3h)4q?tG8V^Wu{o}CQT%@oMH&<-P0 zsT90MC%dIER=i-}NX!CSxqLd0w;&LW*YAx>=b+uno~d;dn*wC2`#;Y0t?;Q3<){_D}U_j>T-h-S~o03kNDg2kM@E6km-ilUzG$L-iB)Z?Rc zVxyx7;sIV!rA$&EAUjI(gibbX*l|{{`_^-}2f@<&?9G3TnqqE~U6_6GoUua7Kr55n zk75aBVpn{g{{N`uJx);t;&}&Uf5dS_W`3z>wsWxl@%UX049xY!FO3@_-f0$#z2&%~ zl&fk$jEZNha&0!QsSV>P)b1c9Z*rYJ=_j)2j;%+=?5GY6weD3~M^}26P`{pAU~41M zy&O#If+?%a0Y0`H1bGmW{LZSIU5m6R?U-E(ZLN`2!Z$NbFR#T98DzvF|H8dK6<)#@ zPv5%kq7>I*G9v+tCySp<@H(Mc?zihUzi}EAe-p4S_C^TTvHc6s=LhmA2^)z3pB%d~ zDK|xLPFtomg+!orq(V|s&6h{PUF&cQoNJ2k<{KI(Qn6|-@QM--~PDg?3|r@?s?t&+Vei2kFrj)hvO{@m6h-l=JfYSmgjb^`t??^ zsr+@64})BZU>Rb~y<#%a&-G#B!DE@!?9*1-Cfei-*?flCNYEdaA*yr!u} z2gQ~RR8?yv)V@5>iP3!HILD0!b;rFoVZ9HBJQ(LSnKccGc~20=#q?asnQo8W-*==Hz&vzWSDiXiupCGuXiuQo8Z&AbxNQtWAi1^Zq0 z8tf^u`Cj@ZT!X20)+l_`d0|$SJwAsCuzYMl*K{=RUB@ZvsmFGrKeI|9=w7SgRuD={ zAiT@imJGswb!fJy-J$D3pd<1_3h}^t@fLh~@v7v&31#Ne8Xc$@2&*ZI0OlpO;p~z5 za~=acdcwmC13tnpFm=-;S^DYZ4@I6d8U?2n4dUPv-VPebudd6&8v>*yBpE)QOuIjo zMe5(P)Tf-1z7w?k{$!`~0SBNf^g(L%;>-`K4MWVBvx7p*qm^sN(fk&oL-xOSFHLhG zM$KgmcwKNC3tLysh4^zVq2R z;tTpUipiwVX9=VliVB&&YW_58{O=*=ISn{Iu}!~avw?1_*5s2N^x_jV#RLk`F&ct@ zm8d?i@*cO@o6?h=JpBTy&yVNwchjtk5V=@pV$Yev-Ue5TgXJ|7p@7pWBNt9^@`DxK_6Jz^BF z&Dvu{pj1xvYPB$KtoFFNQQwhSH}wEc@E~MMzT12KryvKs+Qlc})=yxmvoOFYCiY51 zT15(=ga!Kl*0Z}^HfAJgL--Mi8@ug$N6TB2;wJ@>|M5)Ye2pq(-f|QqZgP72imkp< zZz~8+*i3pXon|^2Qc;)YlH8|sbFQTA&zFN-w|t`$lHaq9eI;f65XC=o;b}f>6P`3e zrLKJiad#chapT+4w&WxsV_0FRXcg=1i|xn!9r-s{9dk|ox!Y%zyCS2L{wO)pV@)02y5U*U{|m}x#v9fM{ZV|&y|CoTKrm;9_A(zIk95)GHP2+# zJ+QhSW;?%b9P79764o^LH2pye711u>Ob#m%IF>RnqiJ85D)rPSea;6EwIaL(cNGfT zLy`FO?S>Hs1rtO7dVRX-(5@-c^juO3n^evYD|CYb^^%gxd|g>S9~ybcq_@-|yF_W_IpP!Ab&Y5ti_66)?h(05BiKfjmq5UeK>{pdz40e* zcfQo{1_ag-6sFbl??LreiIrs_|2ddDDMpkL2lMMA2P;_xx8{+y!Ko)e?r(mRMD84= zKvb?`W5FWA!ckW-_L=;{p#aB)R9t#YSl7GI@lLl|86BfqZlxLdiblat~Ey5&a!TiwGjuY>N(W(l+7Ao-3R;2mFzP$R)v<1#@9 z;SvQ}q9q~`c8lL8MdB@r^PwGpjhnmg!M+Sjomcy*Rr%TxZz5q@4@6 z5Mcu88QCyyS0EGlTok3w`4LO#aiL1o83^RkEh*<_5$I$E_49{Yg3jP;lkA zP?g8wMSMF{Ed=k2Is@Qz; z$C0pn-2Z{ronV$EE(;*!G%~oiGWKWb2*-2_;aJ=@mE&^sXN+RERLJ8qu$^?sw|$(y zb6KiQNXE`IhOHH|pzn@SVY|2Se@0LFPgU6;GG)E?UREB&oax#xhj*p;5lJ-vP+!Nf zOfylaL+K6H%EX4oH8;WO`5Zyz>Vw~=pzgdEe|$b4^M4`-2_wo0Cs;?GjGvReBp-Pa z5H!N^^L2^YQCNh8Ts-~&&nPC33C-zlPWdwyRJPDSc*b9ATI5K1B;NxX;V4*}J{3pY zWwdh+FaW*jc5^`=5%(RS1gRGG^6uMXxmy~R>p5OmY(VOtQ4fZJt#y}bc}iH~Sy=fSWEnkT1#8Uq zbpU7PIWLk)PvhAmU)nU2X3#Z;qNDp`XH~+u(&PQ?t9eYCLQ{!m_w_8}W?g07OCvyQNh{@38Ag zoL@p-3FzJa>aBnp=-;FDv{Cu~mvIy)wU^}WJsxKFWrTPg6mNb~lFdx=@Vt3R!Xf+2 zGNa`7Ac~tFpRlB$Rh+@FKsK zh{|Vsvud$Q0_5F5ph^&l=%349!Bsg_?bt9S4*re0611iwX(gMzNo_`y&?t1%IJOQ- zJ>-*d3NxW(s%q+Y_LBu(K^UlUb?Qj$0L1Ql-`AqxH&DMX7IM3=O{0MkpV4uBtcW{_ zt>aFg-DqD3Tj-5RP)I#vdHy8azLC(rU-d&^ z;y!V?)pilmm^$FYZsPJ9FM8vw={bp@37p=Yjdyf5hSzg3#L$GE?uMc+NGWB0D(>Vv z?=Qon=M}zn%h}_MsMD7DIK5i(S8RMLySxDU1x2nV#U#!S)xw>DVKnVT# zlSVmYW{s`d!(wnQmRL=KXGkn&2C#Zs)3F5%Mofh%g2Ly%NLjDRYO{w8s?VE;E!(eh zMqecx^-~CrW|SV+F+KJ*mq3h>ry6)d(5>A!q=tj(VBbX6cji$F>V8BazT~<-tGN&` z4}-AhlU5t)4AwGl0FbcvdqZ*&4&NEqg}+s5{Xxv5Q%#Dw$K%EkN`&-4x^NnmT0)}? zZvdXko8xrf(lSu`$}wB`lov}_tLr!X^iio%3YvY*g9n;uUEz6UtKPXh3gTZ?e-9)t zSh5-{2**o%gzYRB>l(~lz03yx+x9a^&o^rzR)Lb#IC_EC2qn1g6kWd0y$`AWE$7#O zQUPle+L)q~JLH2p3M~BttFG!iR7>3PdDIbxhiw~`Uw4spCRDR(c#-m#=v@6&XyHs) zysMx=Tn)k2R)zqhm8kbI4$WlR+c#b%8E6C;Zp+M)deli;YZ8Ab?m8&fdj(QCv6%^pl4BtX%ov`tG=`VvC%pGj zS&OOb$I}S2YkBy;K})d8qDu^R0<5}X=g;!ImYBxztNMJ9@VU6@jO%0B84ogCj~#8{PH4_{gf84X=z*5fIz_W2&y_^D6jv+zd2o8(c7-G+ zD-S;FgStV~-k#5q@^B1nt}G~O=5h{9U7j&w@gFBt*I?lnhw-B?mRC``4}#)Us)LP; z9r~ih-gr|fg_IyIfRR6|N8cu)vh$26IeV@N=0`>NcV2syG5aNZ(4{EunMPDRo%v2h zx)^SDyDQjyiK=FbwN*CBmceRA)+i_95! z428^hjEDCc#aa#0do_jGb!TfzxYj7Txv|D<6+%N}A`@H~R6+r?Uk z4vA$ST7Tb>FPB$FI;%O2(6)|7m{|+7t8x(S;~jR=<#%|2+g>F;(b$7JlU+Orz78N!|Z>&Rs7ih z)H>f4U42PDa3ef%6}kXN+uvLYAfCOIVxR5une`xV@j`#NtgT%LgZN%A+6HVG=sL_s zCl^uQegLiRNfH&5>mlRl()Wy&0c00+=d+qF8Eip~M^9M%ZX8z(l?%&4ZfekCFJ_*p zc9wdX97fiIV?Vya>G0maoCksL2u9bWH>kG0^j2dNy0!V5w!}9{IyKdFf-fCIV%ycy z_7@RZMFBMmqy@j+OW_1VChoRu^R4bE`xe4X7i^Gk@1aPcMO$C34F1^;Nc!kGc3 zTkG}iN1UU#w!IZ`n;V%i>G82gOU6*y)J=e6=PKv0OXG z-1BL#FfMJ}bqXg3hPZo{DA#a3_Em`~c0I5@>IxL@i0soUlG)CuqnOgrtZ#_v79g>2 z>;`=RN{k>UG!c{r*$NOJEy!sh8dD57`qkPe^x>g* zDjkP&17bxO>LqrII#-C>roOmkzpQJIs_b4CR_&iI_B6wglsk)HNRtw|)c1{O)<{mK z|Jdez3XuDI12()5-j7YagGc2Y{DM&H9gY#_XQyVz_ z$_2pK9Z5_%aWOkKa_)y$0W|b?5BlXI_=+bpBpoiB@oaJ)NQ3)1122Qi~$&nSCK^iRsb+8v5;#HlI=g5I=>pv96GsNKask;jx*cNMYtu+V96w!XFPw z#{>WsrCA!13x+>t0m*i8tO>&|KX9zU8XLs*&BOD18|90V(Ejt>@W+K5- zQd};Fm+u44KS-+)?`V@|rKz~tareHy*iW#N&8LV;W<`Cagbal4B`eASYeZVe*?0p0 z2CJ#cmtP~he00@9fTK5vL)?kO{dE{>0=l2qNH^y`eXS;K?!5ToVo~qj)@O@bPtJY@ z<|zg!<-s2^BGT9Y3`%bnuupByL|fWis5_IAd{EW$J=Ichh`B#bZ#4pZoGquloRr6r z_b2+Dt7*}Id|>|d#j{LSuos(B%jPz?(HXF?4acdxzr@m((x|Y2_gG?ZMBI^T@13xI z3(8;A_bivF>aeRYGukPMnC-%#e8QoI?ahoo*$EBS5S|hzvxjQmkA>C5?*T8gi6{|% z&p*1|TCvzsgS5J0E}uDlHYX2~pSwR4yo6(D2i*oQe$NSuPsXK~1TYS<`$@bXLB46~ z8E};+vDhY7N7r<ydWg22jYH;H|74;h`6!Iz3a4EFk#)ccgzIAlw`qe{z<&_&&m= z@YQH2j(_K|qtKIm2Zj0q>d>sO{Ato<3-ht>m3d$E7?h7LMMOerh`i2>4e+*R2~L%U z9UZkv$JpFSGyJ&>1x3vMHscq^x^wh|@?&$z2T(s6apaC%XKohDe7-vZbu8;U)V_C? z2X)(=Y-AdgIV_BbfLL;stb0kHWiE_b_NcY#I$2>?xw!kBr}Q*`Uj_GKRb zV{Q4#K6v}ry-#uoEhrDiC z1qa&`x(3Cz3c^UxwDwe5j&_N zY<;{Iq8y2iQZ;@;@yBiBfs3WQ%ca!HgLQTv+)7opF7q?(w`^Ark2eBvmv3;D5RQtc z*TsPlUqbK0)L!=QWUFDa5fw3c>oEc6-#^D6D(?0sk%ZznQVbde;m7#5-1nNU z4zht{1Bo)H_~xn*g`l^r{=rFb zJx>EPpSZ2PyOzzf)Vw&>-t($jeg66@wLFKv=F9t$4AH0S_C9o3HQU0|_3U^zNK+Fk z8qKe9YJg4u00|7xnVu}=>mOohOYX5Jdr&d@u^v>BtNr107EM2GfUF*LaUy93^G5l5=#muzrKmR#b85FOa^Z01S95 zwgbrt9a9c)<|>J;rNf$&$g3T}jW4Scg!iepP!aC3W`d(h zn@pk=hS|IWVi6{-&xQ1h3QFs1>41^PsBG*=U^C$0<8~=N83T*yY(%Rm`RSK`t?Yjf zSstfK4<-=w=X~kC4SX_hN?!F1A9V;MqNorgv}e%kVf~5sdb{&N2tm$eSUKwKG#C4$ zAo%-sTF{-cVhy2@fNV41k)>XE%zgu~1L0nMUhO?sy}-=2F&9O3>Rh$#`)Ez#H5R!_ zJgQdy4D3vwiJ*^h&%EF~)mIHcaCM;2mbdwEIcD3}ma^@JTs#u^1Aj_wP@^}RUM89@ z_T2e3)^s~qFG@L9tCx1PKKDAfN>3164V$$p&mhEAm%xd!w^n|-ftN)fk3A(yzf44M z!bVUvcRj)Pl!S{<8m`sbSn|Lk(IZt5M|M14NTY&xWGr@pP?Ec_eG^na3=RwT3@C-u z8MA8!l)6eXgW^RR>tfdyfI;Ec+)UGKDn$S->s35SH}u;} zpAJ-uitcpS`aiO^Z-=>HeRb9c{%er|{~bg`E1EiSAZmX(FW(Y*AK|Gy+48Nf;4GD(h?@K>8nsr`o}jC=v(}~9BsbqM8E9#dFaql zHPFPNC)n@wgC=ZQ2VmsW%jd#}e+hVU=O168B}n*#V3X<*?3X{?o9yC|2bnxEQj*jS zF;q!J=I^a$?7Hg~W1bf?CV7%}Um6S+_qKT(hb3ZTtD_Cyo>Ch)hS!1h6T4!U^|;1Z zpia7rvb>bp?sWqFEwux7p*>oaXN%6c6_(%3S_faA{w5G{Uvmy_>v>aGNo;KJ3fEA* zPtZ_`VSHF-25jQmY#zSw=~ewphs_{6Y^w?W=z2PP>MN4T301ffab`NGP|l2gC4%$P z@}M(2GFq$w?{vPmD^i&nMv zH>DY6GKh(r{n4R=(9Jl~Z56PxHBM6BmZ&?kdh;7jLhqnRCHhY{ld`qHNzIi=3qp$$ zkCpP>6-(5V*>$o*O(?G=)0X?HSfwkPPV8h{x1YZKChr=>Uwe{O6|dKOsse5v>gSJb za!7b{A$*HTzc5=`ikMyH3DLM=u>cH*-wWMquBe&d&c$h$OXKL2;o&tC4Ay+(n!RBm zxI;CU8J^U-EV;6p3m_RhBv zVlcaF?TbGPs3O8upX26;yHk0QWt3z?3(Bqz)=Yl6gP4iSbYYkM=TPf&Fa+LreiN_` z6PZ5e?qE}Vq3|Xz{cekX^mw*k#crQK<&o++R@?|c@jPv)(DH?_TPjE$a@wA$T@c=KN9P2HCVx%XOD z^fIjtS~j@HXnkAD@M)dtU^=J&tmw@~=ZcIKKA=4;7Fyqk^f)2;==xRr<-RlWH1?KI zaL`j)OfLs_M$l;Ii}TOuvip^SYrLqEr;5RA-j5@Q>19O&Zf}X>h>Mu7*4`Mmeqf&a z<#^h)#52gqlx%b+GC@qH$3$HvTAZrFMfPfGK6LkxP2I!8G|VnWiy~%Lf5ur~c(Cf1 z9;?#uyW?}#VEB-4(+kT8TEmk zasXuye~&_dvqX?z=DD-BkbYPLg)2wrwk{>dIEvrpn0jORRy^ho1r)|ylm4LeWtcf* z$Y;t5FQ`@g{flAGsl!|K70(>A$do@zl4FnXl0SY&X3vT^i((UG`X|y?#rQpSM_#87ZO}z?9M%--FUiQgeHB(P_ z>yZj=iy;}AHuP`&cv7@mVrCy;-+H?d*;l(A@85EB}R3>QU>vk>I=eAJUWV`^uNLct5OtIbG4ibf4YnUSfo|Rsax*8q*PJ_rnu4Qb^&RzEuqhWa*qvLdIO>BxS zbU;j@XX#-jnSQ`Hn(ujT73}M9wb}WtyCVZKs|B`qdwvtA5(B*Rd1>g6z{Ur`LuFDy zVj6u0Ttgl_t}4M5j1xsrF#b+Q{MO zCd_=tD}_`~P<%i$ans+!zT7(gy^zBO8r*b3W9Iou^5x(^1Fpg6$H^|V7=2EcYRzF$ z97C@0&Di25+4F0bJq6A4n$_(_r?25HL%-{v9iOxyA`(iOMcgUr4#Wqg9dunhX)?jz z&L;nuN3#lXo%JpudT!9D~6gH)809spDs+I5*)ov zBsj7I-lT4ISu8<_rHIfPYyO&AVNF)>KC;u>q>-~QWR%vO!=hV!tInaio1&{Eff0Cb(>28k_Ng7?HVjAZHL^wW_DE=!$FKMK9`CQi~TS-m$vO>1+I)W;PShD>WLBl@it98mKPw zQ3474hIUQdREuK8G^%Pk*?9t%^+OtOk~|{w3r;RGQ#qHe9(P|;C{P@KD?Q|AH^mU^ zIh}|W8{M1l8+xW-^!#i08JdE7#;`84S=%jvznO=-2BiXUZdT^sda)=bo!IH-U#~b@ zEY^78!S9IYYBKTWFC-qwV+fQMvHF>64m(=rNlHA*0JdS|w)qt{rW%f+w*)zs&9aoG zW%$<6Af0ONO?h38UC) z)C7O*rb)Ed-LjlJKdosZ=-$7>l|{7BUGRCe`wsvDa|OVTQWWq4!pz~Xbvzk6iS+N; z1c{!hg@wM|X84s#k5{ANE!(vHOGw&>_Brb}*FhhqNd(JjkosT)5izGwU-E}*nvsYp{{;W!!4s4uD}j|cXf5c&XWO`8Op)99B`(tXX6vu)t#c&V1e%W-uO|l}53DMaP&QU+ z)*!wZGN9>^8vEyu~MyttLRos%C7Oko3$!thUY8K4fe;s->kF3d>G9GKooA<#$l^! zH4oxtLLxgxTE{_TvdK7GOP({5OC`zmp8WtF%Ke}+Eo1cYEIHI#)Rn^JT-@Sq_gi<; zpwgkTbJ3jITIvgprG4A5U(mplhHIu#Cz(Lcj%z1ED~Ez2;>;}-k40f>&0}_1lFnqKh%U+I%KUedj zabP7ctAYGzOtmN~cyp!Kz+`rq&tjqb9G2w%D;Gu7B+EOxSPpS#-w*yyr!+o%s?RVo ziRhEw4{9t<-LaON|6;tD$-81F|BvX4td`(tgj?WmKM&ao!$V>{D7Nu5e7D>uodjgw zeonZrcqFt@4i3^Asjl?r&N5W<<}j}IW?~eu>-%r&3sI@+N2!di*}00@av#mPoEq%u zaJh)#dOON-JAax+jZ@iPC0_!Mq9LBnT()+lSci-ALRB~5|5RV?wxc)ayFk>lQOy3t z4AJ$u1n0m*RIgiL)?36OAMWDRmsDXy#OX4vp0UvIz|(&tkAZzB)sl?Us+ns~8!DjS zV>jfA$a5Xx!&heC$U8MjC5EniyNv+y?+iUC9!*fcm84ApGPPO4H#d$@PePznL*{ay zrsXHtI1*XG7pG}g|8@Shh zdlM_%u^j>Evw5fY@YLWY|AsDRAdE{^PtcD(YH zS3I$ohHG!Jrp1ZUxph(8%PTFMojO=Hw|?EV;6(Bbk=8T(zZ+J+9_YNTFEI(tFhs$& z?U~!T$z`dF$5)!G5x|apVn;t;^0ejMY;56;IMvDEw@F8E4G=c7)Sd&hD-5fXsu(*+ ztAO>qqwRZrr}~D|zX*z8($EcU)rq$!|dZS5Un^*7DUchKsl$on7R*K#Q1 z=j(IcC}Htu)&?QTuwQC7Rnk8jCQkqL9!Vd*Q!+%zR|88~C#x4M;E!~mU%u;oMPl__ zqy;Edq;WGw-v=xD9!)n)6kaPxT*H;sg1WwWr0SV55{rg#cLBvmfljdt)4fiy$8wt_ z_uToQ(DUh=uCG3^+^{QHGc2zlG@XsoG>WRiH{^Q;xNuf*WWVn;iANW|*s?xLbeX%~ zI0xD$V1&u;8}LZ%Ey#$AvpQkZb)SLV*% zXoLdt_$Q7t@=0Wl|8<`kb@AO=e;Y+duAmh_hhivNogl#l^#{Ydtg>DU53&;c>z<;K ztd7Lm0JL_!^3m4`kQja1x!K+jW}OWpZ`cva{#kVBt_W*)3xth!?Q0l&i9S+S8`Y?a zRDp1b4Ko^5vf!9&xed;#;NtS)JqtoSw4cXbC<2=>vu z#R=%@`Y#`a{I?dIv|_#@lZeML~#z(P($d*YJ#MN#u5YEg${ z2_@6r5O3CM8CIFv|GS=94*06%a9y}w^O@TyACJqRtP3FBj9D7L@{E{&ma^maH=!^l z|DN)c{#NQZZv>~bXY|NEtnC{SpTjGeJK^pcT>ze zt$S}?!}(ec^lE_Ry;!T`N>ELBR9-ou_;djaKfwG?g;iO(q2cRU-Bj_oOlUI$2)Uow zvSRKne`)>q1MkYNd%FWs>oTIi6PNcOeC7HSZwG!oQtq;Q|FG%a=`;K~zTa21-;=EG z)+GEYc;2-B?EMPHL=lC+>elyRot?Mr`2JU-KS2ROUHK;Fd!t-b+SH^Vc;pVHJY~-` zQrCMvTyNTf=o{OQwh5An1Zu$-MdDiqo_ZkG(=QS4{BE;7lN~vFb4S%^ z6dK!d7qCqth?8NsQqiWPb4D0_OIkO&Ah3-aV79>Mz-tgjH8ZEi`DP3IRgaL(pt!*V zpq%3=5K?v7=Zw@}F=rBsV4v7No4Q=}F3kDR#wAqdAm(PEX#A;n<|pfwwOlH6Vxe7R z^3SlW%iP?gS(~^q>8^lfP3TAxFfb(P829@-9)xv2EzP>#&U*%=Ke=O+OieGn;Ekh& z!K~C_=v(>A9< zYq!!Xn8!olPmPccFSgWcY7Q7nx z6F&1CpW@{zHKS4bS=u3)ilh z`ru(S>yS%y+5lyAYZ=ooWbG;bxGKXF${~TG-@|c}L>JD-h{SiosQ302iLOw>qs}3q zPNHHMX$J+Lb+e&YJ*KGgyYSdi+i4kV(goMEbV{z{M6cZ2Fd+41>d1prEBfuWU7Xq9 z0#_x8aHVJQgpN^QQUY}b%WI|K=ck&77$APL${lGNR&WmMJ)GFkYlMZ;+m1k|5Ya{) zxSOP=YE-~pvOzVVadzDmn zeHsbz)Lbx&d*k{Pd$Se*tQvAQVoiJ6>Z;daf1mT1chUy*-D9>1+veu(Y!2cH(ye*pW!EC#+`IjkfKJIj9#F zfs9?k6IKjtgnpJ0(=R54~v2%!|GsfiznbI0~M-1j|$RJd}75*a=3=x@*G5&rg)^UG5LZ3}}9==G5_DJPGC2BsILy(96igFdAKL|4h zFA{)dK2NF(k}C4}n}Z(e_L%Li2*80fhn`@yc8=B<&u5rhH``)E%HtNW(kDWMI7?>| z%f6cIhaCxt=M{$PR97WpuatO+52QnC6&eE?T!7``OKPDTA0R1r(Im6CP^2+}=I+r~ zf6%mVY>pzhbW;$sTS0F~^ z!v0R5g}9j4e_wGevN$hKaeNHh?1hXa^`&7?9_*pF~&B0BTIuV-T-hEi|(VE02iB1{jYsf@)JHGQ!}-9LuMe=xw_lj=gXgng~> zCkW;H1s};bF$h&z+_N_cndt>>2|XoL-_jpf?dvlsH9=SjaIvO%wOqnZRz9AWL!S7A zsv@G|6p;9l8u6SJ$*^|kJG?eNY`k|UeXG}g?4%c4PenNnR|{LA(dlje-0)QPm&A=* zxjlgrgFvd&;E)=Fubzf{?emTAe+*O~w9CEoQOnHi&$Z4q4&DlQAp>c|@h@)ipjtcn zW?7y^hILxU29oUM6@{z(v&Y|=lSK9Bg?}YfMqNK$hd^(b&PS4gel4PpbToN@f1z|( zO!!rxoU!cAgt1VT;riFNW>!jVYrTmLFW(V0}nTm_!3g zS(u)ehE5$~RY%gm4j_Il)f&*`MX&Qo5@^3`g2)}I&#rPmSiNznPjtn4Q2Vl^^Vhe~ zAFwN8Ex9MRU<4C2G;xpVIrIvMz;cZhN9c*QpuKJ!?IVwK1Cywf4CBkqINE>n1Pt8v ziNtcVOEMaJrjfpr7nA!d9!XcpXqlvxLa*^?v!K^4R>DAR?3DABK>DTj|I37bk@#1* z_sQ=Fj-)tkJsN-pRvIKBi~k*?L*sBN6-`g`*q+3E!nYOX83E+3<2imEfrU~%QwVRX zGdGxu{ISgQe;p(R1;Kk03{uA$gGJm7;;W)u;}daBMf6WCB>shI{9*lK!H4x6U=+L@ zH%x|Zr_{ZDt~d8_wf(Pyqx^14y=fw7?JL-N_W0iB2(~W32dxe`U%)JlfR^3e{@|yE zbua$+32JQQQFs!#5*U_mmx^pbyLrt*k>sL>DG3|(>qXVw`93cZhl>jSXj%5__-*Yk zxhk>$o&%v$@ZzsSp1IDPjw zdMz`IQFlqwBGl)?2Ce3|AVVLJq48*kVj z@9?v-0g-s&2L@rtF~TbqX?amd!t_aM#nMt>mylW zKhWV1A)yvBXTo}46^2DEMwo+5-GsC8q5j*Rv0qV~M#oRaXTv6Mo_z}3y==H(#HUzd zxdl0d2tn)L4ktbFNy^+w9=U9+(3JB({`$ApkW$i;xv6#&b~3fwW4d$Pv6^0oCnt@< zUFo71zE92_Z9;gqW~2t@BSyVWp6@I=Qm%ydUG}moc}WLnSu#cA4JmBUS`IJKB+6dk zvjxzZ^vbdSyk#7y=FlSRl}ouJ9-tA~(59ZHV|33_Tj@PX37^4D<)(I>mQSVI`%u$g zj^h0FE^1@TxIg5`*X%GMLs>&tE&-Kh^{ruo4G;W|@9iAG$=3n?Z`Z(~5|p=rfDb1d9&0tF zgcQc(ea;d37kTBPWrv#$U|I^PFn;F$Mi6nyl)qH z!|Gb}MarL~3=Si5AkO^Fd-K&!cK`ADzxW{IEk_q5&$S&Ow!lx?vBuUSb0Xh7vvTQ! zC$q$us#z_K18`B-tvlzy-_fMBa+9FTao5`+ommvd9pwCQm1LAQqH*fWX%YUA<1sS7 zT%o?m3umMF@5>k%ccZh!tPqDs61mUf-%3BecdOP`jUf07W*I=2*aT=oz}sE&>3o{P z3r5B5k3vyrAS&dAMb5%e&fOP&z{LaK<|#VweffYuFRwY;XdxM96Yh-`*nq{4tM;YG zbZDE6-!ZQ~t`p#1yg$%-GQ)KnX=DRt_J}HFV5Ldc9!9zz$}^L}{tfc$5r%y0Cji}3 z)T5+QGLVZk10Q@^3S&OZ!5lD-t?E)eCC9pERpfa^@9*SO7P_-9%C9GU3_P2=-HLNn z=6{Wx9Pu%8HufE=#n-3k^}M`&{I+=Uf?bVipl0@#@7Q_?s`JFSDD!&8YF-EP^qfsC zWK}viqt%e3VY=u8PCZQuz$PtT>Gb8>dl9pGTo(iU^%oM5sWRW{?&7Jk8(yfUd`mn_IXKu5`-Yy8u2aN|$KTS4o`W>R?x3oSER_OAwDF1xh!Cqgf8 zZy%n2>wg0WcXO6Ej~TVLzs7gYdvu90h3m=RH0x3wsor|aZ*_oN*_VEWlkGW<0j`9X z1V7Uus0vcJW%=GBoqL13UVeY3_o6(dH#kOMZYeoDuDptWwmc|>XHK=6dr3ThDaLb! zX0}EGpf6&=R!FxQ3>NYf1eD9n1)(=q4+fIyP5LF5>|yPkBQj0e333x_`=xF3iFEwY zHRi4koBG@*bSi1FV4cSKItM#ud&RoG-kPzV+3;&uz=3}zGPVDb9%O&)WH@dr8|FLZ zram`HZ>J#lIXv;O?0X=uV!a+T@aMWS_qH;}Rw#Kbt;_ragH3{x=gbK)w9>sVl0|zQsz-LwgX*^YHYenthr@3T+0hux>=+=Uw>>y8giYwL0|Cm)@{a| zaU6Z#7?x$dVy$VD*O;Xz^-Lqm05QwSBlXYO8fb0^ZYI_rzF8UJiIo}(mIav!jjI&Cqin5jKMy0i zi*}@}NxvP{%eCB`MPKSfQ$ntJa$GRab?YYLF1N2zR~?DeLf>oL@3kpfe-ekkf5JtThDxn9D?|T7z0;nsm^(TM#c!I%EyG zOWT;Y4MgB%#J~wR%b&O?^FrCIu{qFyy}dnG^Yw~CpUwwdCX?<{dBgC7i}VNBCQRst zaYO0hd6(PekFus~>em#rRKM5bA8z$;4^22c@O(LCZ|twuyG;LF@yzf=#5ZZ%yQxtD zNY|lmdPZ=m+fCZX)Di7cFL|L|2yZNtl0|e(z=AcFgWp`dl zFPa>$rwmT>SDF7D!L_$96y2lt)8n5qtIsF+R>`qnnpLb}|63+L+`7ffr(~3&8}+G! z0C_G+S9eO2y)}T}& z7Jk2%df6jB&)Gagcj>lOdHMOUASDu}m)-<0Taj4b<98c=sq?H5_$)ri*RAU5j8sI*yvFIe^k9?Sd{Pg#jBJ^hzLkYBM1y#(xIR< zf|Rs$%pgO<&>$#{Fmwun(m4#>HFU$!F!a!!XTHDxi*wGKdHY<~JkPc7z1RAzeFq+Y zA~mXatSaI0YMw-?OmsH`8GfFfx}4~U-T6D(EhU_nc)^;156WPqZsOlH5_K6_5mk4x zo^0RQ>=Y5Ytm{g3v?}mT6X%$pP-eH$>`@I8-gkaiOWe~0CXGf`4N@d)7uy)v#P067 zU^$=Jm>9e;hX=W#-iye9Lsuy}QF_WM<*uod&viw98RaiSgaM`{NA|*ihaVB;>4J!s z%UkVR^zJaf&U=` zAMJJ;HZAC<4`vtrCU%NIqlaEC?)0w=?gJLL`o1bTDH#nHRdM|cnkUlL(lc!@Y>hLx0s zGO{zi>1i>32&|+DC#rhgKi( zO<}6-LAx4V4Td0+bYC%PTcE5BPe|KG+V9MRl}ev46^f@<5`1s` za^{Hu=aN6JBs5yn$V6JFNu;o%&m&)(WB#Vy&~}vg*mZmU8Z^;YoqtKMmXbyCgYrnDAlr@D6l;&c z(3zzwIX|kj4&oD zCvCFA^^Ip+j(_hMun`u` z^%QyTu;ki3s#@R1HIM6=BcVT4dm9c&y+W=IFuRb)FIs>{_ok;F>T-5@T8-eJoACMpX;JoRbe z^7vTFJYo4S8{iDqb={70_d1r6ydO>!VN#u* zovu>$Jd&4YU)VhqRSzJ%oB3W2u`GY$1W0w7lI88TNM6$Ed=l|;b>WJIYN$^^oR@N2 zey-SmaWYY{pl~KbvH8O>c!itDit7(GJiNerwYOhEVj+!6&2G3??dunwQx5p{T56{f z+-qa5|0%q03arj^4PUhE5<+$)gMS;UQwxsMCD!qOvaH^N{;?$bv5)mNLoClnKwzlQ zAT_tDfC4dgravZ0Jq~*NB%>;;ZLCz}s-5fcM)Lgg8&t#?*UvQP@3HZ`8ZaSFl8i zN-~XJL|@?0*V7&>LHPbKz+cug)H6KT6ZK>3uq+mPQ79a+=2?{W+mzB9XWAV4oiU91 z?mj)FtA8dR1`KY0Eoydz(4iXY=6hAv)1a{w-5x0M)iWX^5COtXr8!ip!z0|e4~hH0 z({}ibtio)#=?JFV64?=^A;EfnRl3^_55eV=FHeyM2ua+^x~N%G9q^Vtk>@(pwSFP*UiA#xr`^6id`)*Ee` zRc`-@MylO~9m)}x^=BAWfCAcbD!CZlrHSvs$YjAXLiO>I?>R`=0u}K_+fIyRy=wgR z=Azk5L}2zSY@QsZP5PW3{ql6)m~|2y5x~I2kQj=jNIGV!9h*F9#)jll8(&#*TJH3WxQzT9k8Rh^v87PoU#AlHdqq{F-c7 z$+IpQnV%X?%};#|9e?^ews72w9O-#l1V4nf0AW1kD~hd3Hdy|iRH5wjvWn815IINW zyxu7LW~!G`KH+oo^Mh_$ze(?_&<=HOI0^isJ}EK+dyW&*|75fV+Nb(X=q6wo~N${P_t@-voWu z_1t{|P}?rU*i=dUT)Fa&+)M&(p>((B%y0U)={%=Wt}c!9YOWOm;CSv4ys{REBADb5 zwO#D+u!&@1Pp_4O|4q87WnldPDcHN8?@UsSc`X_MQpvgOU&ljWHded$(~Tqv0gxAp zHWJ^D)wWDnhp~OltKLtyToZzwv_lnoUIp@sLJwko?5_Tyf(&Qam+wDQ_y1bqt`bZdSZ7MtlSlk?lj$A+XNZAR9>Zx_ z^)#jb{cqy_``^UP)4cr4=^iz3T-I_;^e(t*12^k7f2dKXuCe)ZJ|$$1QUdFnag32U z94M+%rjMu`sdXJ?Brt%_xLa3P`n3cezB9&!_aT_co+`iUyC5Io+S%vI)=pq}!zilX zfAQjvO+1xyLjmEj7vRlCd7*x1`_QdzeYs{U*0zNoPZ;SB{`5Yx!g=-am12lkCyMYj zX-TsChj+QHwsWs7_J3ZEQa=k{4`g98?XSpom;*8z;~B32@GOo|DD%GB%(Te6GDz(_s%Ye{tP^_=FZ&xf_5mhKwu=J`0J!}NHTJC-RA zko0E_jlwUw@H~mw*syHd?qGLQ;#DP*7hg3H!M_8CMxVJVt}_W3Y4KF9R&pd-VmpK` ze->9AQRLJ6rxy#n;XlB9k4V!lZwd>E8-_Ekj^h=xo8)rIEPIi1$xL8u7zecqfHnRJ zx4(qqejRa6hDXowojQ)mJ=gbxw~u(UE@>N2_SP;9ReIAA^rqO*vwXf+sSzXsf`=D# zG8WrU!6L@bzqVrbqVGMB&ytS?@YcZl{muRd zaT3oZEGfyI8XuWXYP3_{>+v7=PKG;G;YwqG7|6&(xa-I0ocX=b-$ubx4vf}L*^i}0 zt@8u~HXI2nQ{1a?5SqPVfsE7rnA<7){As?Wr1T@oJGJPJ;UHX^jnYR5_>hVXhqrBt47eX*J=xcgK9zT9L5WiFw zi8sIW!CkT-qpJN0MC+oR3=C=x>6Jz&>#ve8mC^kHi17}dZBNnyo-amhlq&Q$I$fFaqabElOhAPJK+a6mxI#J1&;&M#!IsL^{N~OH{ znVxM4pD$okW6jPm6hWhL=QwJ8kuQ>1TeI6zHlJM^J!w0HqFIiP*$Mk7HgPj$S zJXJ5AxPu}aBS1_cD|dws@CGx!&Hq(i_O4ze4lvvqyzYiloGdZ<+?IkL@73Z*QWO`V z4M&=pZ%uU0Jo;ST=@DLstv6Tlnz2PRj;7$;KE6e7G?afk0UpJut>0MuT3S9q`+bii ze!$M!uNGNc^dyEf4L;NN+v2~J-$z2Nay<(qFiK{S5l%$IFT7-zl*G}a9U>QWL!(rp zY~8g^<*xL%`|#xiG8!Z^fPOf2!J-c@VCe&hA2@5_?66jATszJXR(;J`T#MXE&REmUN>sAYeZd6ho|{p>srCJ7;DwhsQ99kI-1F~d{=7zkcDFv_ zg%c6{@iB$vnG{sj6uKu)$E!Uxdt+t=2L0;a?>Vo?cLSkMFK3)Tb9JxOaTOU3nPP!y zq2r|@SWefPILqlqb{&}d9*W|e(-D!mZZ3xa%$KYw9e``E7_okGP;!d`eu_4f@mom$u`cr7Is80*T% zBRcU34v*|pgQ?6hB=Y{&eAX0)g|~_+yY_AE?@J84u{;)oL}3e$BiJ3k=ZDdUpfqFx zNP>0rcbvM-T6y^edR=iwDWPvy0zQI%a^?9ldD-IQj?yNC{mPbPOh6Rd{Ii0&#;%de z)b2j@R5*Ul>`djs$B873qul_%nlo5JCxr=TN#y|tC{E7VFnW={NT*Wi)7ccU? zcmVXA2In_-uZIHhn*y!lLz@mTPoSKcdI=GfOc&XjT8ZvsY@-aMUs?DmYv`Ne(GEUy z3*L2yB%YTwcgyTk_{>m1FG5$jLQyI~C0k9KFNO9hD5YC4H^9_B!-g^Z$sPs%z7Z^(GleR($bj0L$Leg6ZA9kYNv;QP`vZ0At!1^~DoS1X+L zAR~I!{G?t(ir&;)l1e#r{R%C7+MS7wBUBQ6R)JNQT_2f^qI==AUW4&kvl?+M%xa9VJ&!^l!CShvyV|yfY3UGuoe$3=U`!^(ZD~3& z*=Hjq<(?1N0ew}2_YnxO>#kxB{8tT>J0uH_l3Dp}<|8sAqC-6zj00qvB0ZQtRePpt zz8YdmXAM8h;hG6i_s>Y7%j^|l(Y2Km9|tjZYR)(fT^Io(aZE>)src~#F>FXKjI2^U zTI>bFwr2lW3nYlG84w2=DiI`d^_4_%U(Z-nn2Y5&j|QR6ldFk+F}8s3qzz!UIWbQ& z{ZU#~#lrIW1w|m6Tp`^rFN>2&7Nl-OXr_JR(k18DO}d}=-2M?|qQ=-WAY({%+ifOOhQ()qId?_e7 zr(XQ^n{}P%YMS&X6RC~uCT9f<`IsteN86n%gQ$)2I-9I>H!M&?bCzIyo{Y4uwUF5_ z)){l0KMqs>E+o}jWOP@q>0vE_#zYe5;E%zEBKRb}5m}qg|U>UQdmhLMBb>!Q_LkOEH5hN{4ASvYksq6=CgvCK`0@_rmOo=Zn zMiFI<9$QD3wlQ~yZS@XV#~H_{TA7aNhI<;P(ubDA$@8@3j*?nM(B=aF?QPXo+)a|G zi?dg0+-6MP(g2UCX2NFd*XmPdJ?fsVJ@B?(kM2{bM9<$!q;CUnGhr`qc6sLS1Fadn zy;HfeCl|PPk1>sOO*3zzZfdIi;HBp3v~pMdW^gH83N*nxF}yQ3>^ye~x~i#|4>VQr z_^mn?ZO8I#X76R@^m}G!#M#aYT>Yy|)@I!|+#Epx^H45ESRT?qX)nTJ96bV@II_Ra za8~+<6o$?y=8K@yoQ0rt!=-v@h7vcPnmaZZ+aYV}q(Ls$a4e^wZ$G_^ebS|k!I^?( zb0lX=5U_2uVs3rtwt+v$6pgZiA*jaK^|s!6`5bzN9kdHHH-)l zG7o!XkTX<)wY6B1IY-Ik*Wgw#Pg|uvkCsZ;6ypY(W=#uYd7|N}6sknJ$J-*uuGZP0zK4s|9J3c(3t)rX)kQ!{Rg)Vl~1B5D#FEmI?|K z+vKG_hwt%rfKTezTXmu8YUU9#IS^|=^~LMk-z#1a&-KTbmJ4TxsJUJ9K9RJX-D|;$ z>@_P(!5VyPq$Tp?qk<(7WRxYxSpF+i8{6DMx=Qsu&pz*<88iXq+R0)sdWH+H&}~so zkTxOL2EU7amiiWB*6uE7)ed({E(x9`_E5f8>`bZuEU-bRBTrBDYt%gt)h58=gls~4brdnejT$<lQ9}; zkR_GmC@*O!N`N37&Gu^JVA}h*=1|ylM*uOJ#+sP4*oyCXF7C*@=ygdC8P|-sQqw*% zxB)Duupb_Au;@Qw}dUS?3z$M9}8 zevh$Ft0>OLWf|pcBuxnllrauX33H72Gp^oNP=dxsz|-mR&Fpqf%lD=P`2@^amK#-$ ztW_vhkNGkZEE0$j&IC#{M=bPejMPfmR7B?HA21z(7m?tzC5mR>=tr486bGMWqCBw5 zRu1mnvu7hNOdz;Qv(U#6LIC3CNQH~cpUZJb^Q|d~BlC##%_h0`zqJqV5u%J$!|xlL zPI6up&|@F*;1J+8QrIdSU?*jxmmflLdmgY5G4rps7hqjMh6in7#B@}u?9ZXYcJD#y zYZ-D^s=_Rkwz4gfjpvp~(mr9PWG8vn@vro@4IT6+BvJ1rLu}=**&D-!Y2TWtddDVs z8hy{FvXf=fk|IDn@OyCnp>uiu5;jevpGl%3g-kFPV>-DA?IK4Ok-Iv~S6IR(MdqLV z)SRD<(LSxZ$%$IimA!vw)iY5?P|Q)#qD@f8rL^`rKCO%=PQLu5Ly5dbHr~ly+3(#p z6~4w3#Y_7;Q>@*)7yfDGc#7_+0r{d?>{;WOMc~5NN(ZW)*gA*oyCd{P3U9Zbed^%~ ztt4M5$NGvLlt1(x=}tSRZv(3`e`_`UDd(IM=gTJZjL7iitnUL=Wl!Owxxr!R^{)Hh z>P7mNIY*gxC!PZNLp4VF^MQArhF1M4w!Z>VB7CqM_$Rn&6fi~sXz^ntg*jZeqWJlo z-LyD`uh2oU4INWSkOlH$iK)9_CP^8%q~}fq^Gm;p5TOM*G{*};Yip1(1%80%>UO@b z|EtXetz1fv>&bE(9)tC)x@?GMF~!+PF>Qml6YiW1%76Sz+0Lt zs9Lm}u3V_iHF^XuN$gmSFNt?FEvOeqnfPiR6TYBQ|8Qt68G1#}o9hq3T9SOg`qts* z>3|?Ux=`~AZ7I8H2^jQy>{yK_J!`aI!6Qa{x%(^G_hj|_$o+azO3$i$I7Mo1(Wd%cL&0RZ}vQ&y=4b8Z|%=cbD+i1br0mC~xr4FS_5bHLY0 z5Zf|<{I~XRK`uUGFE@bO$ABFT+P1nTq6nE+C z0NX@h-1UT^SJMV4@dzWidZ~`|a!6m033h)H4^8(bgTH0K)n-9`+Hw^e0{q9VAW=EGfKi^qRHalr*xBG6ZP$R&nc3cdfE63%ya@KX+D=v<%b@VGz5Sodn)Uo-3@Ji9c3Te}5jo z{v6AD);Rx2Q|v0fpf2(w&l;s+YayfP3@6k;@6+~kfo;~@tGDum7Wmd1%fTb$kw!iO zi*sLn&F5D{^w$>r&c6=frl^(p?)uo6b;6H)W+M0OV6)~U<&xDSWJ-Qti} zDZ$aS>T+hk+{(WdagV~MGq+j}ze1#ns0q^~!S^-G3tzDhC(xc2n`cKuArGBt5`FNC z+k?OUglDp@Igoa4n8^f6O?hA@eXiAyb{*S4>D8_Y=)+9RH`ed6tkJG-BDX z(`L?wgo{put1KG$@PBq&JLuMLU;?O=CmwT{WAr|4X?Iu@ad_BfHt#K`wD(>+Pj z2gy5cGk2^N*;hIhj}&jC0yeDx&7Rmq2UiUG%_yhC(a|2PGdlfwQdy7Quy5s0>EiH0 z#!7lw6;{00-<^RWG^G7Ptyxa;$%qP8mZ;8kLk(qWCt}bB8_7UTVDRn%3;M&Fcw5c*631B?Ym~MU z$d3SXalGEpuWxkM^4k2DNwj>`i0(`4JK+Gg>DCsJFN7Tuz@Rwf&^wLY6EM$!?0_ik zQ-5LRQ9PXXn(*5+On1mSRXJrRA*v5bN@3^I(+9yySkVqTd27`@UzE=MzBy>y0d^dQ z$zkSV=wk&OaZU*dN5y3Z)w`$#xSKOM;k?+T;%{!csVA#SLnza|f(N-yM z8~Qr|%dSLk)?IYg&%O8v!@yXZ^z=7YHFfLB^b=2M1FE9vood8T1Q>TsHw#nAcoC&N z{*tRAGv!9e2brgcg$~GILTNY=;+qGlk>R{i`727v&`l$d z0#m)Vb>B;D#M;)Y1j0*MC8;}b;6cRKY|)=NnQs-nUnDPO2z(hy5lS^xHIvIpc;?|( zl=F4ow!D?LD<1Fo1wzYT9pw1l*8m>Kp#n^VcwhbT`lKQLhJ@;|7yeO_&h>85omqQJ z?Hmcq^`kX5p50F$zY`0^SkmzC`OqbwQZ3F{7(y!U%L32*SVa5cLDkQo!0MMTGrWYF zBX!!AuI=p9qQx;ydm|cgy|4eod$m$6`fXw!e{)vd zex0OcsHN$Tw-zv}&W7*Zj|W#H~QQgjrXoGEP)$!uQuVmk-gYXA0!r|)+_ij6(vW0dd5hG->|K$ z`3%2zK8PycJ6?M1Cak}e5jlM8-_^58|Faog+pR~^99|Z@P?*&Gg|Ng^yE}k7W_7Iy z)^)i55GX1#``lk*1?$$KUv+kxTYt#o(IqWu959@9_ftaHbg7YDt*6ssgyz4;&8lQr z)TMuUd-%E;#BMhfYDTMH$+QQ(P13cCx0w5`&&(N5duRK5_CwtJGy{{qrwErE?<#9A zCX+9V?*q%Zal0(~2B-0sYZuf+s9?w_SkrinMTJ}qacN78>y1z;nTf<*hSq~}B~x8m zy0pj}jgVAQCZS)$@BPj27Jbkp`i)54Ry>EtyJg(*4(I1-U$+M-vtcNOkY9qNM?-RR zh7t1Fk2y4+25_3W{gPi$*4navXU8)A^-~wz$x^QETI&frl%V;ucZDVg(ji4Q#_k+hR*DU>!KB9I3iexUHYp9WM^H6gXbM`rF+WnqdO5>w<5C4&T<*v_HL)(wt~CYk0#jofqfF0W@9XJ-qb z6rN)rRs?tV1oC4I6{w`36T{KwJpLI_htwq4?cETXjBA$2ViYuJciGjC@(c zA)&?AnSeS90RMbslyhmX-~8o49n*iwI7fL{i}7;eY(#iEW4w#Dp|JsHW8F|n2@}lK z8h`xrD-;+g%)Jg|b>9<$|2OFFKnFd6!UqQcF3{qgHHK@LRq=C1_F%ep)~E$3}gCn-E;;mbcjyhX`X zMu?a*R{7DFR_~TaQ&(b#RS&p(b!68fMhpk{DCx$u!k%x%6x0k!-mzhowl3Q%oVtFO z@e`7T3d$sI#hZZFf)P491{=XN+9#TN>a#-wwm)Iff86h4GQfKwC}SqCWzHh~mw{r5 z#4uXw=O*7#zXit?M9S|yTET<ne4>F@*5 zB?_`8!-Pe=b^7_Y%xvW69O^|&>@j$q7|9YzQ&4+UPj(#&?{a;{BCwXNaiypyNVdjt zNfL0bL{lhQF2j)(<@%4>>C&_#2yyYw@8QSCObFBc)XOkY6YPfo$@T9+`Y#cESF}NT z=LRae*N$HF3=95v;unjLoJ{@1G>wTTn!<;(;1qWapzlKq9$l4`f6V>fhI-~w5NZ>* zHtLlx&v%f{-L#DOZe3H&SvYmpE>eb8@h12R&@K&R{@`s=qxw0;{34b6CjVuhr_|Uz zjZ3ED>L7maIi5BU4_dHBf8rEf=lD*Z{`~5S9l-vIeI%;0J-i#GXxeXlRR2l;elUHS z|7;7pqOimoS05x@^sKk|n?Bm2@4SHgOVOUVsF>W9C#KOj7c}`OWdiT2Ua3LvvLUC{ zL~h-+Uz=7b))*OL63DEmFLP@d(Pc$hJ>aYPTVJdPifa0M`2H79i`~J)b2mz}?4vR; z&!GIw2mK+2Oqx%&MeoLLxcA(C(VDrDwH0I8(~j8_!Mq!W49cX9+(Sjq3XILKJo73z z`%3(QDw<9=^*_+SSvQ)PN_1_D{C_}s4>3N;MD&o5NAO013q$1|&X$D|lUMaShyuaD z0wYX&XKkavJ*sR>9Cu*n!q=+9z5qXIVXufebYcMM`)>idpl;Ox6oq$vsxVo5i>~FA zJ2~o|Cy8RpFfYZ7b&2aZo1mR|pGk&10e}aV3+{R%V?CD3bTV`v!++93J*?(1M|v~3 z1ivNY3pKz4d!TkNWlNnpJ0s%jC+VmhN4$&*Dm)i4xW}Pc-b|2!e-ncfsF}Zf#rs(G z&;?S}r@$P+DhQHae0MRks#C)2H24QOdv_o16c%$L2Zc z`DjfK-SfsGMhn`Qe#{G)WzVy5hqHUOew2T-5lG9S2Fqhxzg9d2X%mHlgs`aSuO1TgESo^ z9iS(?!Z;}MX)e(!giizC*to$LpGFDMYXOZro!BwzjdKOfBs2biCXcR&!jh{y>ffYr z#w2TKK}GhjDuhC4-sm@*7Yj{Fd3v+Wd=A z?2E^p9_9^_Mz8_7bXnffud*gW2B~-dIM6xz5lU;vtuHiSENmpg0J7Ctv~5gcAfxs* zyMTatQk{%0jYfi*fa%y@&JdL`f$4@nx{rpA8806u2L3CT+sWw_sxrp`zkY-e0Uq+) z1=upm*%v`6A{fzdWdbwi3Lc#h*XV!7&t?&(hA)$Op6stJ&svZ*UQB!jfRuCi61p3E zg*veW%iny7@Q`#lR2%2ITpv|=KJWi-{bCN6t^xg{lUwxBs0c)0m)dMd@FQI#_HhF+ zEc5PJmxRY+jMXCEX`j~uSkg`U4=JL91`50b2>A&u^I=cw z%1VqJgx|6170Im3iqRuAWA5-!wiR^Gu)=zF6dzSlO!OH&v0a;smZJbV8& zD{~d;;Sj%U%~s;tqVB`*RLP=frZNO(+xRGbQztzyQQcUP^^r|JNpVQ7^ObGrY{pO0j)%YH^G~_#svc+0arIFTbHGGuF@x`p@{?|y4T7G9z4SsWHdFYcuRb@` z0}0Z#W%~?KavX0=b@cCj=Vp9&lU>t?^u=}0v`u{^($6?y;#H>o<@0zOOOIDA`gS_h zKzCYu$Wv2k^~6s19UCVu?Xyn}+zo^M@BMw!X|mkh8EPM3cjcv(>E-EPO>ClzV&q+n z?L)}`Xe)j4RAhE~dB#CJ3yBt=x?f&#`20r$t=Bq1sQ*z!et`dL4KHxBte-*!00l3J zdqWlT{Bu6xgWfq~xr*vbi<22wXTvV(oHwp-rMLBj=2&O1~;q8=x)=Pq90N)jYalcYZLB(|xEHWvlJ96`Q4# z(*jAaWrUzeJAcY`qVV{cMF;ueaYTqgp&YO3Wzpxx;~y8p3g-{MyO_LR4`fU@tNVj9 z)@VR;F1%V|$NSqp%eZ_myD2dEqW#J4ErZ!=ner|<2u?3;ax&d&9>!RCkl8yA7KYa9 z{iXsb0>*;Oawh{CHRH=0uvf_Cy#A{8_6R}arN?nl=->A{Jqc&-5>Sg{zT6|u{GA8i zvBF4hQU^JKDb}xZn5}2uozcg#v)1c)H4DqN;~FQ4>o2EE4O1py@nhy#3LgF^xt}TZ zn_H)a2oPco(qvAuLdGor1O<2D=N>!&lGL1Mt}meMP561%IqZk87F+IEaXe-ITz0@e!2OCi|vO<s&o94q2!Jrv%|-mSD4^{?$*xP1t2?r`r8 z+Wf;boggbt`d(-X!~OGtx!u5fDl&)F6m@u)mW_8aV)(D>NUuRHq@G>`-_}aDFzV3H z4+k;+s=fqH2zR39bD_ohTY}SrO0GpQGf^VCW_CWb4#4kDm}o+GZMT-qmBH=N%e`u0 z=za|^G~HL^rMfp!aNzdGE^C%FP$xcvG&cIpwL~oR?p2}%MO2cR*zl-pF7E7mvg2a| zE&U-E5tJJ`Eu0F&rgx>|V0bFnA2L33kI^8A}Wzw$}ePWmamYbmED>0~@-_ zfgmjzLy#Ya%|2kGRrP1M8_^e8cmEZ1piG01*>IAV9f}Eu_;t{YAA*oYmmB+B<(9~( z!%1t})hgnt4#PC3P>s?{x|h?c@&b~SeoK-ec|gvQp!Z>&hY8k97zD?&XH4JBv)H?V z1XiEO-I05xJeG`kn1h4PoP@>9orFbUi?STN{afg|J)zqGUE;MS!NA!QoT$M&OKjIa z7XRLLGcBQNyRkM18i9v{pXC~qcjxCSiuq>GucX0PR}kWrj%Ulh-|;cwESm=`G&Sdkb_3lE}mA_R48rsp#ULh2?l z6#g>@Y=;t{*;TGjX;)gC7Zuc3VxGD~liwa{J<#VX9BAGmiG0q;Ne;M+I7d2@7Hfmn zDy^I%8g$e7F}WGx2B0SEc2U}X)=B-X6{uW85W}w zEu9XIo~7UP%mbc!+N&ZJXMua-1x@jL{PtN13t@sLeKEED%x^G4ECQ2}+6B0Tu7zx* zTPig)8AbfZ{WK|5AZlWk(|9jgh4ggagF27(X{h&T$o_wQpw1KkBLl?e__3I*4=5B7 zby7rg0j48T<=t>M$dkYZGaN?|3;Oy~5RMqvA6XNB@q7xMY|7J;eB7fP@@ zsuZFMYQ#{JY^LDtLdX$9O_nprNEw9lg30n1m?f5=Pp$2z9S4ZmiFOT4O+TF= z7~%D9a+Zl?QDZ*r-$_jOl8M)&hx!970MeZpQZqVy2s^tc%L3MjTwfrGRLZ1r4+O@=1@cx6PKK-hNTDW49{)7+-gRz(RDiRoiB9ZxNb>;@9 z7d11_p}F&KeCo^2@cqJLiR_L{0#H`P%$D+-z zfvNFi=y1Q8_Vxx8b7^8|W>yfz@1GVm(y+j`HSdQ_?tV)wAo1{mP<{TziIen`cP_{g z>MaE(M$wfcUHFe~R5@%|)PjuwGD>b2Od&7vMsx z`mpqdeGk)dErI^6J51$^l+Qx``k(V#Q-Q+kH(+~jO8pTw4e%ga<8ri4;dt!IgL1(g1r+I*Nn7-R9AM57 z+ib{~zx$LM==;f-O4ujFoI0|S7+Dlk#eIkG|Bw}ca&JkH(napG)lOCj)L@t$2`Dt< zTSNR_^Ik<|H2-H1@W0-f{S~ZD%qFqyQFDH@NUcS`fLuMT>a?WTGk7e|LeXCM-^%<7 z42u7>1IYNl_)bjD|FYhRZO8e9KI>n{fIOTbD5EMP^Q*Cyz%kq+qPCPuM{HN)1|wdO zh|s1MPe&-$#%4b6=(j*lvqJq=Gxjd(Eu)?M@W4gpYafE#SKi*0Tf0Nh`}XmaE(m-y z-841=#1t9_>27UaF`CN@rv4-X8Vghes#$H;Njz zD6{CxD(wtfU|U8+`PrH5oGe)S#RX7l5r0@>Q?6J znoP)+d`$w!OHD%BN!f6GAUkGcBWcf?X#TF$vmbUr^T#4Ei)7x9b#>*1W(?w;SEc&7 zQt;#Tu2=?REz^X%X$}(KI5Td7QNBe-`|kK6Ub&uqLyJBJhVGk^$t@DqcN%BE@Qq!G zem>a`#5HsZCW(=JoGkssX(%&Tfv$uqK5X%`w+Kxm?{B^Yg`(l$Z^{0opsuh<4aRSa z`yVr_DW!c;Pl?<^M|nh3oHKm_Uxozn<7j^pDkv~F9|k}KFQ_3Wmv>vudoNr~-KdX~ zvVO#I4Y!6RrT>f>mU!%x~kns5bL{P77h@3`ze=7^6hVp?T#E2Zdozn)Y3 zD0%W9cL)dbP?(8Ca@1NG-Y0?4Z3t^8#&p)85P66L8O2YTxB&ns+lo9PN zD5eJbxY$$LUr)YjJh{FFchDa)(H$|h4Ht=h2djVIeO>ZSd@6uEMkSYi`!iSj-`MmH zu%oyv0og5&Kb57sNQ+J~um7b_#4_l|`<)NrZU+kE*C@@IuuJ0v|DyEw|iFm~77CbAv1%>0uj}Ob5E7dGqC;?*!{Zvh@Vh1k2zyvtRMJ)iq z7=BuNr|6E#E5Gzz?O&o!pgz5AS`!9)zR|GQotgZDQWm($A?nX)oyTiSpqFuR>>mRg zb-K^#?hb6eAJV}xhEaCU9ks-eztkpxqP=O~`ZL(gC-k1Of6Y{ON$W?ZJh$_A{5>-F zeTLI7(-<9%{-(T(76DBYkYP4z@lTKQ=S`bqIl~f=trG!mN1}oQsD{AoG!+}_kD0MP zSV{(eGR|;NwWj$K#LE9MFtzw?KJkf@ua}r0aM6<{4wCCJ6YL*4BKoE&uC?NUH?S8H zZJuAcmjNBy}UCXBQhIe=L`U zjc9)Ey^8Dej!V1@L4jJ0x-R&mUIVMZq>wWEYwpG(R?*}_%~)9-VB-JF18ut(y3&E~ zE%bG~mlB&F{(UZ!j{G!`bX}=kXRh2VQtb7R!QnD(6E+f18k3C06XqrFmKsbSfO(up_vu@>7$fTQ@tF zTCOBD8StI6l9+QjvbZJly_0C0M}LBy4RSPP%~%P$>n0-qY~X{pptV9!v;5QQs!YEQ zDOAd)mT9Wp5cO7uzQDY(H-m}BW0nQ4U;Y+yKX|D@LU}uwBwB@;7{;eBn~KT*-_dh~ zNj*{ixeAVF*lG{*>$`wXakHP&?{O7p=iKMol~D@(sjdKJi^}X2v_j;vjCuj1A`^yR zNQ|`wf2UXVDG>Azs-CFB^*z{B?Rh2?;I;_dxdCS00x2>0md$TA;i`cy4Rn4jDx$Fh z(Iv$|r=zFX-1t7j?uuEtFR7p~c74DZ{`X_QS_C9V5R*P=lj;g}(~<2z zV^oI3TQOXn38^W=Rh48EY zhpV#;YO{g1bz3MDiWD#2LV@DN9g0)5xD(t1#T`mCcU!2@Qq2_(|y;%GV*hYOPd+XJ0E` z&o-*%_5F;K>_nmL9dpB4aZmq}PIKCgWUM}Gy!$KptjDfs-{eH!@A3YlNan5cl(gyh z6Y;(cPrFSx1Di!PF#m(>-9*Y?o!4DZq4j8#Fy#9ch=)`PVK zRYe(SXnL-c8)cHQsOaB8MYus0H4y%{3&(@9V`pddWvg70o=-3WquUmfMxSD+7 z>X^612yEWx{yc9*LRu+B|MGCl>C=5hTSKJ@oI@d@aI9`Hbg`taG9M|}PQ%OnU* zp<*?!-yGN9ti6}*L#Z&qRmvSbjgL_5bFL3hNYb4wRH2-)lHOuML~`uKwj;br^hr$T zSUO_xs=ObM29w9;9I?RH8Wv4EwGRr`Tjzt|O?P8mRt;7HZR#J3cgsfsD7P+vYw)Ri ztK`qIjzq`Yhw-j7o4;tH_2^ZAVbPpzGRO}#9YE!w#yMBA-I~48nZ7h>l5@OuOKw54 z4^9cxb2coulF$b2mw9s$4p0nJ$XS(^BY9>rCn)B@a@30s@pR2m$JDaz)q+JXHx>IS zD0!YrBwcfU!QLYG6r9kR}n<>#O~M;;#gGJw=7BSVmn zvZ>IZZ8ti?dc_{I*2Z@tE&XriXP`PV;XOG0ZoS5SF0lH|omO9~p4Hf=l#f!2)E`2wjuA8AtIx9k8(FZc*MAeXvn!L`C=i5$c7EFt`&8M*7_Ts@)cefFSVF_(WUx5LPcZ$q;WAJ!Ai7I{aPoLe0 z+bQ<tUB7%U>~2&THPh=mI6 zRtxX2%^$J*`5o;2!%`agyW}6&LU1|E7On^!otmAZ&~6J*Hoj`Rd(p(!Qp`&0!h&Ols;zbhw|2aNAy;Q%0Vy>N>NrP-l4^Y!qp!h}Qx zeBhmoAVOqIb&|YPz%>vz>H6_DMnJ2A{)l&Uct;&~d~kB(W}}ykgdC5`T>bOIc3J+~ zZ|;r(iu|DF|0eg(|26+!Mr1Q$L}(hg*n$a>7VDn@4y8?-GB$ueXsHsEF!ls7S;IjJ z5v0-2#)s%)xL5CR=ichm@2-X)b-qjwUO*vT@l0D zw>4Jtcm0M!prh(9`G_U+oG(A<#%`#>d-)KJEsi?0UgDDZeAp^M_|cc%1*Nrg4}a=N z0DN)cLsomqLF|Oyblg~C@bMF%9JtJAMBw$sOi`H)-I>7D_|yk#G#=1k%axbP{THF`u;lQ;3Hv9M&;> z|GF>4bgNxpkAOcD4J&DwW6-=5jUCf9V94)RZFSbKs<;?uCnSpaUUxP3=CD#xQYR^= z&JO*2JMUIVo#duxCQY^?C6Cx@YAJ48XX(>WRF>i`=_#QvG7wy2T!@zYMOUa=^mO}a z$36dKbg%|zY`2L0L0(wHkjjpH*%ZMdA-&s}56pVY{qn`Yjf|#?&%U@@Dn59*`0F5! zpU!_?)}GV!PcVxS5v+%%)1cx_p;{LC@Kvm@U`Y5jI=AA&Sow6x<=OjEtk0iJFei30qXQq=^{uR!#MJa;Ds6jB*Z{WktKgM+N?k z^ttg?l-dSb?#5fnXvx_8W$_h!r3b~Y%^x{-5c;0=8K4EKZ-2V2C3qJWq%4*QTR8bu zoYvz&4a(+;#(P5nK-tN38EcKR>?U_&j?L&VifCgD$YV|}*_Q5LKTVWHCd2m?L*OD@ zD4u?oT~G~v$)eS*ZF^^Tms?_32j&{qHZ)}9OH zs-=e3685nD90?aNCHN}u2s}x-)gGgz?CY}TA#$wZuW)P&66q}KR}bmg(=_0`^rk7T zBeAF07DH#}1dfpEA&u8iUl&$zV3B9@>#`-=rr)DScj8ZlE&N(FC0Xu<3Y`^@x(#Hx z@=3|?1&~VHD=4Ks===u@%N4=C9v(Bpb?IN)^D8(;zJ>wyZkQQoo5EdEeCc1R7gPs;a#8N_ zxRW!A$H;5ohht`x#mDXz{7RfjKKFmZ@^31tmhcO-4|=afnS~Iqzx-JuSeAr00|U93 zU$Z>fC6>vNn@z>Z{$y{;DpI*|FU{)wq$QU)#ivZAstu6Wdy}HirDA2fQD$wt-I2!% zu^r9|Y_c42Lkv>I?q^JQY51utcKst)RhOi5w8pK;u!Oj zLRdJv5yhWgJ|6}jhwnC%1h$uWflXPN=1s-<8M}pWyW@KksDN`i<#pvw4T^Ga7Py8x?lCwC+Y34_+3K z7xLP`2p^*F)Q0{UvT^Iv>;6|8?J70+7ruo%po=yuK)IRjxYd3kdeCtee~&_&=R3Ft z%jhi{L>=#2jKNqah)0aeoL$w1@bdiE!S_&qGteda2)K9J%(wUg9y^^NA+&n85fud~ zNwa7UHJxZ6d(srTX6Z5Ib3gK7R79|z{Z(yf<*}V@>En}T=`Y6NXrJan!O5eyfy-Ss zsz2LAMCiqsNcJMQLb}C@>O&=N9to_kEEO;)M(1a6;v%bSOBZ-{N~%_!&&*d;%s6FB znvCi;ggS`OV}vU3QKvg?o#zv^z1Kv4G+efPHe3nbw|O&0)9YUbWdJIPs2o zT!)8qNciPjG&I*$^8KQ*y2A-UokeIF?Mu_J!c}( z4a2>1Uc|2a{)l1ikiN;|xo$<{2Q<0Ytp8i2h;8#91LMCpL~o9=**CZ25w_uN zz!&b`B6c93SBZ14KdSqQZBdQ$V22`k?}1Fkf28Z`XFqyCp9rn#o`niF=hX>NJ~!H4 za&nR@Zm-}sZp^Li`u!?BBmAcc!N54JkEO(X1hI^n# zLf~JI_-VSd>cyJHc%}f#Y@U9ePbO+2E^r(r5$Z)}#pXP3j6T$M{qS~xF)A~QatU*D zQvEQ~vE5kecS>TSY;n~B&af_=a68o_=F$E%;CI4{F|US>OnfN?<*&!#4>WPv%kh8j ztv;6cX8oGiJC7fP<=y1e=~4nraU=Y+$*W!Ke_wb&oPIP%Dg}FzON7u=6?-dJV((;q z?m%WZMXMNJ+O>c4L>5gt)r=UH&DnXN68NcXwv4txJKJJiUmcp~-mJ||JHSTjlin;> zu*~ZPl%y481gC4sSbuXbh594&VPAGUqdtjP@qs}n^L0zVOSV?tF`>ZP9k0aF(~ddI zGK-g9#?Yh2R5cW7fOZdFd#7deq2Np&wqUeW^pN!{_jCLMmBwZjJycEr$eGyzv23mG zd%cY1tKv9(Q#0}7Vv)5vphQafc+|s>qM{dShxbgl=d44O{g&7wa2X!Sba&Fqz_GeD zhYlEt8hFkL_yV9s>%|vfWFg?7T-dD?7E+W)SSkVTZhSr$zsjo0+CHV7%BY}?A$$0%59-GWJ=?*1=4W{xT#!!E< zMYvW#39^X$kmIfnYPVXq@9esB37C5Bx3Z@iOP~H7NbcYWVj#OLwmHh_Ru#@m31a@yX;`6i zf4iO8MwHV<1QtEF4t<>=g(N}85)XkIfA8u9>fobw#v<0ePk@ccECAJ46 zyY_&*-K2OmNj`KDLow82hIL?_@L7pZdisjyfV*Cz*pzizeh?kT!ii1mjZaI?%lpEw zFw3Pfadm%==6t`LX_to*Gf7EDmf8<|XY%1Q)|5NVl|vzuA=#5qdfs`$JFCw7?r%%7 zi$r-OStNNLND+$;nGnzoY_T zeUt|hI2fH21Y6Zg2P# z|NcK9V)`0%hKF7N{jb9vVgEGuVa{umEKl3$;cZpUwsKWYCvGVhpt&YIU{>Vs2}bQt)3WYA?pIA<(_5;so{3ya@V5M zvX|LxABd_= z#8o*T!XH)pqP-H;z~sz=rx8YqW)e0&8X>&W1zIj5HY z!6eUk|8zJ>Za&FcZs2uFO(RA%!HxJ0PAf{u&pIHRlJTp-XUl6i5yB@!u-tyUc;c&b z=d>o`yQ|J0zTog9tXLr(QoDj|!#!zAkA(qoVEY3(hvP|Ck08B&yR`MQx9?=$S_etv zHC}%hXSPxvYKAip`uKBZ5lUgW!u||we0)`|*MmiAcf)7!3AqbX!+H%dVEa_)$HaC;|`{e-mNUp3MK8>46R^`~7GF_R1rUkHJ z+U1Rd%NrUu%jx@hs)IRrKm)ZUh`NpxVaZZ&>K*nOk)RhEUO+$iQA6GDG4exQm&=BM zvu$Bdg@#|A!GY{Rr#Hrtk=&v0^PY&IR!{JMU39e84481#DF4Z%I2{Jo4-UEY8 zk`aq2Z4UOIf~PGx#7bg?Lg%<`YIrJjVkO6{v~k)4NhmSf`a?Y5bVD;`$txqn+^s~HWL)7u2{)sBTp`LLrST@mS%^OyuoF>hR~t(yX*Ams=R_$ zp&2u?h7$h8c12`dsYykN@xK|ve-wa*LnSf>0E!H%ohfRqcaQ1Q*T7HK6x)Sdm?UAkt_Z5d) zl&(>kUu!!E7}5jpaGsBTGDi;dRs})?(@Y1wc6H&Mw+oV^Qv>3K{v~M-rZ&Q=L+WA{ z?mX&0*@H39YaVsO%UhU5r5o|PW?Vl0na6*h1TLtHF-)|(g(w9O0duCMGauyP0~fTr z4PWTp?|eJboK+oa`~79yXVc|Ab9!+}F;@W+KMiVrx@Am$_)siGQ0~0ACyGj>_izr- zl+?gHjW6S2i|NX(-N4BkbM_a>!-|Y+dWR1#T~B#ur181^+t&4khr|~sISeAAaLsws zVL3h2=S_sV7$kW(Pe;AB=MMUXmqXDSx+xCZ65nbPz5~cd=Yy=$)2&j#o7!kYi^+)m znWKkt(2LdPAU4ypsOSPRv>T6{D_On&n}5hSkv@tLApEt)~>pV0Bx_m4d0BFCz^RXKiUM`(an zmx+Z4I)zzrIt7w(r><)GWCtqSdg=6L{#&6rV{Em5+k!Z)>>y1fAxj0J^Y!ZWU3h+B zz!m4|)i8I#+$t8pfR0o+tP~G|vqYMPCSdQdE7L{4XTkFh^K#UlNUB=mP(TT2e zp3~KXWNfHl=_0f8*>*D?Xg9n?uaer6^q2!4t0iEB4N3Cb-C~Au$-WW~l1}8MN7bE~ z7ElTg=H6POq1hpfqODCPd94|HF1@0{T5`?^BhR5Q-QVJ${k4Fnb`qy{qH8gY1)P)i zW}+Dfc#L_3Z?Z1me*gDXpKel=m~&v2r9)a%=T^P%;Ng*>;+QsV^B^_blI^qJXP1kg zUq)ZL7CbNf5~ca3ixP1hJ%}^aetKs-3O~5mB*aL&vG}M3Zvu%z*e)smCJpa0PJXp6 zZul{I=BGOB<_>q*bmz%=3$t;1anm021ilqH&Ay2?&zCN)#(q?QW}0(8n9YTQ2}Q_z z>rIFi2D0%AO+E@+u&zjEa_4;D@NM zc!EMlqJn3gPVba*m60jdA?8N-X6+gW#h>$1rVEJE!gopNcXSZCet=A|Is`G1N`f!@o%lm^X{WUbu(u!n7l zN}7J_H;a`ATNRGFQ85ZEDuu)hBdJ!KP3tDWlO2P^i?24s21|Gm{VstJlySAh_WDYWLt1ax(Oc+H=H!(jZt^#t$OrEU`SLnx4k~%P9ihquB1lG zp;?i1L9n5|glArmVYM=R4(i>|37@v(00`~JyYt<(bD-aZnAPNYxqqlzM)J;u?*&^Ks-lKe{R;L4{*lBro7%WZ@(UC?^EPd^F0YKLhOgv zpC-jPJ*7tB8a(d$+8th29bGk=HwO-mfdiZexGr~j5UllH@;322$E#9omptX-FdgEz zZQp$LnQZRlBygl!wu67G{QK=ZAqnzNmHxCK`R15145?*!IPEeg2Dzv&kqjyy#}!-z zdpTNlNYM^_M7P_ufimGd0$7VxOH5YhFsYTOW`w^@D%jfJN&Qun)3Hw<8z~5xq5YXZ~*m*e$U~et$7964P1Fw zmfAnZcuTr+KP+|m`Blt@2<&xIdhRq%34)ZJVj#k}HTj%w4b7-Z95UceK9L?C+)F|9 z(7{R+^rB)IZ%O#+x#&}vq21g${l4gaB4lK*MySqXf!eqwElGW()-S^FN6GbZP0h49 zH=t`6?3xl6=u>XU`>M7<1huaXGTb#OcKV@DED}4waBnMR!VnpxRaXmuN8V1prW~?- zFo)XP3rDR-$a4f25uQiAv{ewD<7D~3!T}IH<>c_GFzonJj0tJpczTF4$hw0A!GFQs zx#sbot^c=x+5dg$f-S1&-s{sVTZl+EKSOA~SjpwHdA=)!#j&f32BttRRn$ADozc8m z_WL>;47=xlTsB@x7P(KQtdH4NQDU4Gq{d9IC4lw~d~XrHQB{FO=*EJC;K&U++Lz6543L`Xg*ng6XAG*;58wMdkqj1D&(+2qVjrf9%U&AjWV6Iu zW+@sRgDbiKa~MdA_gn|pdf(WUAXyF(-8uWdmj$wj;psVi4sJ}_B7?QC6BEzpc12?R z*nS9no1HFjcG#Cv+zC%Lzga(tjkB-m>H@=IW^tdIAAH1(*n>u7#UL>X;j)vFPlVYw zHG~*nWwA)kC@Ji|rF7HKo}enW)FqozJ|0M|aeXlFLcQ{cewDrP()U_R{ed=nTka=a z-~^@3Sv9lvV5iSi(!<-3`cGEt{&KQj%(@OsDKENzZ;PiM|M^~OBQ~YEU`8Q!B`vO( zq|`>#E$6g9_~OPSa;xnK!C#nkDwn7+D~6FjH`YsnO&cx5DCx;RrqIF?5m`W!`ZJKr z6q<=pmSRy?Qh%-XU*XNGKykFNYVKE1SN9daR8L;?Zt>%>5{~z8d+MYYgTTy%EgPcf z!xUB*25Y`UMsR=I-wZ&a>(|;5oRQzJu5{ljeEyefMT#7g$vzRdF6NpbmTQstme}C8 z2lT^%{1d^5pbbfAY%rkD&-G$ca0G<1XhjIZOwKo;4M@Yu3asG$C`jcsoM}}rD^$&Z z&N=tSwEj@lNv3y_m+hF=L%x=2g=Rv$t^qW?qLt9F!}h7a3~w~ZQs`rw?k(sfBSpDu zY0l)?jtN`8db3U}rFMi)w{uBa?N|IY&bw?T(K@p;RRLG?jw2~!_S(hcdgz6&88YGq zO)he)b-Gt}r=~91^cXPKT|n6bkiyNXF|n6fzg~Ef8F_RrQazvT7%9hx;E!_k0uu_W zOhTLa8bIvBSjV{Q$HC6u)e-bWr04hd?(w99KWhpbo~{YL2g4G%wq;tON)hE zT+zcZyesb;uEXyqQ^*uvTCbuJ|E(5ow(IQpGszpSMmg$2KZRR56^H%QU)C%%J{WtL z%i-&Saz3dfiDCjEDZ6S9lxHw@Qu^6l=HbtCF(d5?GUq#V)UE!!o&H|Z=XR>%>gl}; zz%Vf3P)}q3_RtpJC&mWUl3Zix&pboGCBg?1_Ar*Nk9}o?PTrKX$v8f9?m2@RIH-9d zWxIwXUzQtfX}fcS2{wXU*(Jr#-v!nojIP0<+nrdmD9V)u@1QosHLU^L6(5FsWw&o` za)agvD9?wIF}l=mo@8&EpdZT&b~rp^7vZFMZ4<$0)bK~@>&*AkpZUU!8uSm@ zOLE+fO!8zQErC&7=iNGJqkZ6*vrTelvk7v}f3d=*EO*Ut(>`GKkoRqS=Ba%EZB!_1 zTPL*MBhcAy_QY28lcBB2ZFwi?7=7|WWE=>4Jyzwpy{JCU?89v*^Id#m0wg^z$?T^q z-ttA$u^$5W-=(LYe`ENt{qpU3AOUFCV#iQpHAkGJY@24yqe_zA!+~OigOx!rNZmWt zFl5U5+eSCLqd@m?fEe&Z3?v*md3(Z}`0c`O z_JX@)Sz_Ys_Oa$QJ_qMZ zW($P!0|%)H{Nf3zoc?hoI@y=F22D-WFG11dUKZAxEDGeL3AvYH=S;{SH015ecDCTu z8IGgj&4f@c4io_gMM96e`WlD1w4ZJB8FPlq2E>da{vmlbMIGqC&)F`2v0O0d!HO20!@Q*q!_96!7Rg?0Y>c4>qgcMV!Fyh%NemgJPWL<0rWh-39{WzP8!t z>j|@l1{^n`YpNF!C0zV3WxEXxUgbt5kE`POmRZdU;lKP=E6+Ev`XCyMA0n{--RGBm z%NC%wz>X?1jPJumJ@H5BCoatexi4+-^3{$Q?aZ^d(bcq$A+IM&d_sek+!B zz%53t!pvc2VnxGT!fhL0{51F`FVUgsa`{+0L8_#K{aU4Sb0L`X96SCSprP4hhmdl3 zUbV>CmjG89L4@zSv)&$QcwH4NO73SiI5|6<@p#dj;RZ$c0_c_))he?E^f9_yCYa