Bernard Xiong
GitHub
commit
15ffe88466
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@ -150,9 +150,9 @@ extern unsigned char _sdata;
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// End address for the .data section// defined in linker script
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extern unsigned char _edata;
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// Begin address for the .bss section// defined in linker script
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extern unsigned char __bss_start__;
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extern unsigned char __bss_start;
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// End address for the .bss section// defined in linker script
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extern unsigned char __bss_end__;
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extern unsigned char __bss_end;
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extern int entry(void);
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@ -333,7 +333,7 @@ pHandler g_pfnVectors[] =
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void _start()
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{
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memcpy(&_sdata, &_sidata, &_edata - &_sdata);
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memset(&__bss_start__, 0, &__bss_end__ - &__bss_start__);
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memset(&__bss_start, 0, &__bss_end - &__bss_start);
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}
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static void Reset_Handler(void)
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@ -3,7 +3,7 @@
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NuTiny-EVB-NUC472
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## note:
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support the GCC MDK5 IAR
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support the GCC MDK4 MDK5 IAR
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**TODO**
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@ -22,7 +22,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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#else
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extern int __bss_end__;
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extern int __bss_end;
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#endif
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/**
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@ -80,7 +80,7 @@ void rt_hw_board_init(void)
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rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
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#else
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/* init memory system */
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rt_system_heap_init((void*)&__bss_end__, (void*)SRAM_END);
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rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
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#endif
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#endif /* RT_USING_HEAP */
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@ -181,7 +181,7 @@ static void init_rx_desc(rt_nuc472_emac_t emac)
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emac->rx_desc[i].status1 = OWNERSHIP_EMAC;
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emac->rx_desc[i].buf = &emac->rx_buf[i][0];
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emac->rx_desc[i].status2 = 0;
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emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % TX_DESCRIPTOR_NUM];
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emac->rx_desc[i].next = &emac->rx_desc[(i + 1) % RX_DESCRIPTOR_NUM];
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}
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emac_base->RXDSA = (unsigned int)&emac->rx_desc[0];
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return;
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@ -205,8 +205,8 @@ static void set_mac_addr(rt_nuc472_emac_t emac, rt_uint8_t *addr)
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void EMAC_init(rt_nuc472_emac_t emac, rt_uint8_t *mac_addr)
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{
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EMAC_T *emac_base = emac->emac_base;
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RT_ASSERT(emac->dev_addr != RT_NULL);
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EMAC_T *emac_base = emac->emac_base;
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CLK_EnableModuleClock(EMAC_MODULE);
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@ -445,12 +445,12 @@ rt_err_t rt_nuc472_emac_tx(rt_device_t dev, struct pbuf* p)
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struct pbuf *rt_nuc472_emac_rx(rt_device_t dev)
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{
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rt_nuc472_emac_t emac = (rt_nuc472_emac_t)dev;
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unsigned int status;
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struct pbuf* p;
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/* init p pointer */
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p = RT_NULL;
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unsigned int status;
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status = emac->cur_rx_desc_ptr->status1;
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if(status & OWNERSHIP_EMAC)
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@ -1,8 +0,0 @@
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/*
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* Placeholder to list other libraries required by the application.
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GROUP(
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)
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*/
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@ -1,25 +0,0 @@
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/*
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* Memory Spaces Definitions.
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*
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* Need modifying for a specific board.
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* FLASH.ORIGIN: starting address of flash
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* FLASH.LENGTH: length of flash
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* RAM.ORIGIN: starting address of RAM bank 0
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* RAM.LENGTH: length of RAM bank 0
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*
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* The values below can be addressed in further linker scripts
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* using functions like 'ORIGIN(RAM)' or 'LENGTH(RAM)'.
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*/
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
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FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K /*4K*/
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}
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/*
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* For external ram use something like:
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RAM (xrw) : ORIGIN = 0x68000000, LENGTH = 8K
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*/
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@ -1,129 +1,32 @@
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/*
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* Default linker script for Cortex-M
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*
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* To make use of the multi-region initialisations, define
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* OS_INCLUDE_STARTUP_INIT_MULTIPLE_RAM_SECTIONS for the _startup.c file.
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* linker script for STM32F10x with GNU ld
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* bernard.xiong 2009-10-14
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*/
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/*
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* The '__stack' definition is required by crt0, do not remove it.
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*/
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__stack = ORIGIN(RAM) + LENGTH(RAM);
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_estack = __stack; /* STM specific definition */
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/*
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* Default stack sizes.
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* These are used by the startup in order to allocate stacks
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* for the different modes.
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*/
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__Main_Stack_Size = 1024 ;
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PROVIDE ( _Main_Stack_Size = __Main_Stack_Size ) ;
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__Main_Stack_Limit = __stack - __Main_Stack_Size ;
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/* "PROVIDE" allows to easily override these values from an
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* object file or the command line. */
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PROVIDE ( _Main_Stack_Limit = __Main_Stack_Limit ) ;
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/*
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* There will be a link error if there is not this amount of
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* RAM free at the end.
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*/
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_Minimum_Stack_Size = 256 ;
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/*
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* Default heap definitions.
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* The heap start immediately after the last statically allocated
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* .sbss/.noinit section, and extends up to the main stack limit.
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*/
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PROVIDE ( _Heap_Begin = _end_noinit ) ;
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PROVIDE ( _Heap_Limit = __stack - __Main_Stack_Size ) ;
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/*
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* The entry point is informative, for debuggers and simulators,
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* since the Cortex-M vector points to it anyway.
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*/
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/* Program Entry, set to mark it as "used" and avoid gc */
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MEMORY
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{
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CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 128K sram */
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DATA (rw) : ORIGIN = 0x20000000, LENGTH = 64k /* 512KB flash */
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}
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ENTRY(_start)
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/* Sections Definitions */
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_system_stack_size = 0x400;
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SECTIONS
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{
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/*
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* For Cortex-M devices, the beginning of the startup code is stored in
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* the .isr_vector section, which goes to FLASH.
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*/
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.isr_vector : ALIGN(4)
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.text :
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{
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FILL(0xFF)
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__vectors_start = ABSOLUTE(.) ;
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__vectors_start__ = ABSOLUTE(.) ; /* STM specific definition */
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KEEP(*(.isr_vector)) /* Interrupt vectors */
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KEEP(*(.cfmconfig)) /* Freescale configuration words */
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/*
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* This section is here for convenience, to store the
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* startup code at the beginning of the flash area, hoping that
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* this will increase the readability of the listing.
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*/
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*(.after_vectors .after_vectors.*) /* Startup code and ISR */
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} >FLASH
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.inits : ALIGN(4)
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{
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/*
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* Memory regions initialisation arrays.
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*
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* Thee are two kinds of arrays for each RAM region, one for
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* data and one for bss. Each is iterrated at startup and the
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* region initialisation is performed.
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*
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* The data array includes:
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* - from (LOADADDR())
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* - region_begin (ADDR())
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* - region_end (ADDR()+SIZEOF())
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*
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* The bss array includes:
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* - region_begin (ADDR())
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* - region_end (ADDR()+SIZEOF())
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*
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* WARNING: It is mandatory that the regions are word aligned,
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* since the initialisation code works only on words.
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*/
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__data_regions_array_start = .;
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LONG(LOADADDR(.data));
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LONG(ADDR(.data));
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LONG(ADDR(.data)+SIZEOF(.data));
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__data_regions_array_end = .;
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__bss_regions_array_start = .;
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LONG(ADDR(.bss));
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LONG(ADDR(.bss)+SIZEOF(.bss));
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__bss_regions_array_end = .;
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/* End of memory regions initialisation arrays. */
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/*
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* These are the old initialisation sections, intended to contain
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* naked code, with the prologue/epilogue added by crti.o/crtn.o
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* when linking with startup files. The standalone startup code
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* currently does not run these, better use the init arrays below.
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*/
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KEEP(*(.init))
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KEEP(*(.fini))
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. = ALIGN(4);
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_stext = .;
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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*(.gnu.linkonce.t*)
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/* section information for finsh shell */
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. = ALIGN(4);
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@ -135,7 +38,7 @@ SECTIONS
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(4);
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/* section information for initial. */
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. = ALIGN(4);
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__rt_init_start = .;
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@ -143,212 +46,67 @@ SECTIONS
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__rt_init_end = .;
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. = ALIGN(4);
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. = ALIGN(4);
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_etext = .;
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} > CODE = 0
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/*
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* The preinit code, i.e. an array of pointers to initialisation
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* functions to be performed before constructors.
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*/
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PROVIDE_HIDDEN (__preinit_array_start = .);
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/*
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* Used to run the SystemInit() before anything else.
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*/
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KEEP(*(.preinit_array_sysinit .preinit_array_sysinit.*))
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/*
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* Used for other platform inits.
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*/
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KEEP(*(.preinit_array_platform .preinit_array_platform.*))
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/*
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* The application inits. If you need to enforce some order in
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* execution, create new sections, as before.
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*/
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KEEP(*(.preinit_array .preinit_array.*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/*
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* The init code, i.e. an array of pointers to static constructors.
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*/
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/*
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* The fini code, i.e. an array of pointers to static destructors.
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*/
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/*
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* For some STRx devices, the beginning of the startup code
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* is stored in the .flashtext section, which goes to FLASH.
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*/
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.flashtext : ALIGN(4)
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.flashtext .flashtext.*) /* Startup code */
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} >FLASH
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/*
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* The program code is stored in the .text section,
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* which goes to FLASH.
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*/
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.text : ALIGN(4)
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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/* This is used by the startup in order to initialize the .data secion */
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_sidata = .;
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} > CODE
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__exidx_end = .;
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/* .data section which is used for initialized data */
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.data : AT (_sidata)
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{
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*(.text .text.*) /* all remaining code */
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/* read-only data (constants) */
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*(.rodata .rodata.* .constdata .constdata.*)
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. = ALIGN(4);
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/* This is used by the startup in order to initialize the .data secion */
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_sdata = . ;
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*(vtable) /* C++ virtual tables */
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d*)
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KEEP(*(.eh_frame*))
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. = ALIGN(4);
|
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/* This is used by the startup in order to initialize the .data secion */
|
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_edata = . ;
|
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} >DATA
|
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|
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/*
|
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* Stub sections generated by the linker, to glue together
|
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* ARM and Thumb code. .glue_7 is used for ARM code calling
|
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* Thumb code, and .glue_7t is used for Thumb code calling
|
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* ARM code. Apparently always generated by the linker, for some
|
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* architectures, so better leave them here.
|
||||
*/
|
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*(.glue_7)
|
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*(.glue_7t)
|
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|
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KEEP (*(.init))
|
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KEEP (*(.fini))
|
||||
|
||||
} >FLASH
|
||||
|
||||
/* ARM magic sections */
|
||||
.ARM.extab : ALIGN(4)
|
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{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : ALIGN(4)
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
__etext = .;
|
||||
|
||||
/* MEMORY_ARRAY */
|
||||
/*
|
||||
.ROarraySection :
|
||||
.stack :
|
||||
{
|
||||
*(.ROarraySection .ROarraySection.*)
|
||||
} >MEMORY_ARRAY
|
||||
*/
|
||||
|
||||
/*
|
||||
* This address is used by the startup code to
|
||||
* initialise the .data section.
|
||||
*/
|
||||
_sidata = LOADADDR(.data);
|
||||
_sstack = .;
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >DATA
|
||||
|
||||
/*
|
||||
* The initialised data section.
|
||||
*
|
||||
* The program executes knowing that the data is in the RAM
|
||||
* but the loader puts the initial values in the FLASH (inidata).
|
||||
* It is one task of the startup to copy the initial values from
|
||||
* FLASH to RAM.
|
||||
*/
|
||||
.data : ALIGN(4)
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
FILL(0xFF)
|
||||
/* This is used by the startup code to initialise the .data section */
|
||||
_sdata = . ; /* STM specific definition */
|
||||
__data_start__ = . ;
|
||||
*(.data_begin .data_begin.*)
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.data .data.*)
|
||||
|
||||
*(.data_end .data_end.*)
|
||||
. = ALIGN(4);
|
||||
|
||||
/* This is used by the startup code to initialise the .data section */
|
||||
_edata = . ; /* STM specific definition */
|
||||
__data_end__ = . ;
|
||||
|
||||
} >RAM AT>FLASH
|
||||
|
||||
/*
|
||||
* The uninitialised data sections. NOLOAD is used to avoid
|
||||
* the "section `.bss' type changed to PROGBITS" warning
|
||||
*/
|
||||
|
||||
/* The primary uninitialised data section. */
|
||||
.bss (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
__bss_start__ = .; /* standard newlib definition */
|
||||
_sbss = .; /* STM specific definition */
|
||||
*(.bss_begin .bss_begin.*)
|
||||
|
||||
*(.bss .bss.*)
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
*(.bss_end .bss_end.*)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .; /* standard newlib definition */
|
||||
_ebss = . ; /* STM specific definition */
|
||||
} >RAM
|
||||
|
||||
.noinit (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
_noinit = .;
|
||||
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
. = ALIGN(4) ;
|
||||
_end_noinit = .;
|
||||
} > RAM
|
||||
|
||||
/* Mandatory to be word aligned, _sbrk assumes this */
|
||||
PROVIDE ( end = _end_noinit ); /* was _ebss */
|
||||
PROVIDE ( _end = _end_noinit );
|
||||
PROVIDE ( __end = _end_noinit );
|
||||
PROVIDE ( __end__ = _end_noinit );
|
||||
|
||||
/*
|
||||
* Used for validation only, do not allocate anything here!
|
||||
*
|
||||
* This is just to check that there is enough RAM left for the Main
|
||||
* stack. It should generate an error if it's full.
|
||||
*/
|
||||
._check_stack : ALIGN(4)
|
||||
{
|
||||
. = . + _Minimum_Stack_Size ;
|
||||
} >RAM
|
||||
|
||||
/* After that there are only debugging sections. */
|
||||
|
||||
/* This can remove the debugging information from the standard libraries */
|
||||
/*
|
||||
DISCARD :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
*/
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
|
||||
*(.bss.init)
|
||||
} > DATA
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
|
|
@ -357,11 +115,9 @@ SECTIONS
|
|||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/*
|
||||
* DWARF debug sections.
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0.
|
||||
*/
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
|
@ -383,5 +139,5 @@ SECTIONS
|
|||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,407 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>rtthread-nuc472</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>NUC472HI8AE</Device>
|
||||
<Vendor>Nuvoton</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x2000FFFF) IROM(0-0x7FFFF) CLOCK(84000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>undefined</StartupFile>
|
||||
<FlashDriverDll></FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile></RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>SFD\Nuvoton\NUC400_v1.SFR</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\build\</OutputDirectory>
|
||||
<OutputName>template</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments></SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments></SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments></TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments></TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>1</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>0</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>0</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
<UsePdscDebugDescription>1</UsePdscDebugDescription>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>-1</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver></Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>0</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||
<Capability>0</Capability>
|
||||
<DriverSelection>-1</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>0</bUseTDR>
|
||||
<Flash2></Flash2>
|
||||
<Flash3></Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>2</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>0</uC99>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
Loading…
Reference in New Issue