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[bsp/ls1cdev]astyle格式化

This commit is contained in:
zhuangwei123 2018-08-26 18:27:38 +08:00
parent efa6eb1dc2
commit 1572cda572
1 changed files with 657 additions and 618 deletions
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371
bsp/ls1cdev/drivers/net/synopGMAC.c
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@ -48,11 +48,11 @@
u32 regbase = 0xbfe10000; u32 regbase = 0xbfe10000;
static u32 GMAC_Power_down; static u32 GMAC_Power_down;
extern void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr) ; extern void *plat_alloc_consistent_dmaable_memory(synopGMACdevice *pcidev, u32 size, u32 *addr) ;
extern s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter *adapter) ; extern s32 synopGMAC_check_phy_init(synopGMACPciNetworkAdapter *adapter) ;
extern int init_phy(synopGMACdevice *gmacdev); extern int init_phy(synopGMACdevice *gmacdev);
dma_addr_t plat_dma_map_single(void *hwdev, void *ptr,u32 size); dma_addr_t plat_dma_map_single(void *hwdev, void *ptr, u32 size);
void eth_rx_irq(int irqno,void *param); void eth_rx_irq(int irqno, void *param);
static char Rx_Buffer[Buffer_Size]; static char Rx_Buffer[Buffer_Size];
static char Tx_Buffer[Buffer_Size]; static char Tx_Buffer[Buffer_Size];
@ -98,18 +98,19 @@ static struct rt_semaphore sem_ack, sem_lock;
* continue further * continue further
* only if the number of descriptors in the chain meets the requirements * only if the number of descriptors in the chain meets the requirements
*/ */
s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32 desc_mode) s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice *gmacdev, u32 no_of_desc, u32 desc_mode)
{ {
s32 i; s32 i;
DmaDesc * bf1; DmaDesc *bf1;
DmaDesc *first_desc = NULL; DmaDesc *first_desc = NULL;
dma_addr_t dma_addr; dma_addr_t dma_addr;
gmacdev->TxDescCount = 0; gmacdev->TxDescCount = 0;
first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory (gmacdev, sizeof(DmaDesc) * no_of_desc,&dma_addr); first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory(gmacdev, sizeof(DmaDesc) * no_of_desc, &dma_addr);
if(first_desc == NULL){ if (first_desc == NULL)
{
rt_kprintf("Error in Tx Descriptors memory allocation\n"); rt_kprintf("Error in Tx Descriptors memory allocation\n");
return -ESYNOPGMACNOMEM; return -ESYNOPGMACNOMEM;
} }
@ -120,18 +121,19 @@ s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
gmacdev->TxDesc = first_desc; gmacdev->TxDesc = first_desc;
gmacdev->TxDescDma = dma_addr; gmacdev->TxDescDma = dma_addr;
for(i =0; i < gmacdev->TxDescCount; i++){ for (i = 0; i < gmacdev->TxDescCount; i++)
synopGMAC_tx_desc_init_ring(gmacdev->TxDesc + i, i == gmacdev->TxDescCount-1); {
synopGMAC_tx_desc_init_ring(gmacdev->TxDesc + i, i == gmacdev->TxDescCount - 1);
#if SYNOP_TOP_DEBUG #if SYNOP_TOP_DEBUG
rt_kprintf("\n%02d %08x \n",i,(unsigned int)(gmacdev->TxDesc + i)); rt_kprintf("\n%02d %08x \n", i, (unsigned int)(gmacdev->TxDesc + i));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i))->status); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i))->status);
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->length)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->length));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->buffer1)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->buffer1));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->buffer2)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->buffer2));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->data1)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->data1));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->data2)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->data2));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->dummy1)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->dummy1));
rt_kprintf("%08x ",(unsigned int)((gmacdev->TxDesc + i)->dummy2)); rt_kprintf("%08x ", (unsigned int)((gmacdev->TxDesc + i)->dummy2));
#endif #endif
} }
@ -171,17 +173,18 @@ s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
* continue further * continue further
* only if the number of descriptors in the chain meets the requirements * only if the number of descriptors in the chain meets the requirements
*/ */
s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32 desc_mode) s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice *gmacdev, u32 no_of_desc, u32 desc_mode)
{ {
s32 i; s32 i;
DmaDesc * bf1; DmaDesc *bf1;
DmaDesc *first_desc = NULL; DmaDesc *first_desc = NULL;
dma_addr_t dma_addr; dma_addr_t dma_addr;
gmacdev->RxDescCount = 0; gmacdev->RxDescCount = 0;
first_desc =(DmaDesc *)plat_alloc_consistent_dmaable_memory (gmacdev, sizeof(DmaDesc) * no_of_desc, &dma_addr); first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory(gmacdev, sizeof(DmaDesc) * no_of_desc, &dma_addr);
if(first_desc == NULL){ if (first_desc == NULL)
{
rt_kprintf("Error in Rx Descriptor Memory allocation in Ring mode\n"); rt_kprintf("Error in Rx Descriptor Memory allocation in Ring mode\n");
return -ESYNOPGMACNOMEM; return -ESYNOPGMACNOMEM;
} }
@ -192,8 +195,9 @@ s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
gmacdev->RxDesc = (DmaDesc *)first_desc; gmacdev->RxDesc = (DmaDesc *)first_desc;
gmacdev->RxDescDma = dma_addr; gmacdev->RxDescDma = dma_addr;
for(i =0; i < gmacdev->RxDescCount; i++){ for (i = 0; i < gmacdev->RxDescCount; i++)
synopGMAC_rx_desc_init_ring(gmacdev->RxDesc + i, i == gmacdev->RxDescCount-1); {
synopGMAC_rx_desc_init_ring(gmacdev->RxDesc + i, i == gmacdev->RxDescCount - 1);
} }
@ -215,37 +219,40 @@ void synopGMAC_linux_cable_unplug_function(void *adaptr)
struct ethtool_cmd cmd; struct ethtool_cmd cmd;
//rt_kprintf("%s\n",__FUNCTION__); //rt_kprintf("%s\n",__FUNCTION__);
if(!mii_link_ok(&adapter->mii)){ if (!mii_link_ok(&adapter->mii))
if(gmacdev->LinkState) {
if (gmacdev->LinkState)
rt_kprintf("\r\nNo Link\r\n"); rt_kprintf("\r\nNo Link\r\n");
gmacdev->DuplexMode = 0; gmacdev->DuplexMode = 0;
gmacdev->Speed = 0; gmacdev->Speed = 0;
gmacdev->LoopBackMode = 0; gmacdev->LoopBackMode = 0;
gmacdev->LinkState = 0; gmacdev->LinkState = 0;
} }
else{ else
{
data = synopGMAC_check_phy_init(adapter); data = synopGMAC_check_phy_init(adapter);
if(gmacdev->LinkState != data){ if (gmacdev->LinkState != data)
{
gmacdev->LinkState = data; gmacdev->LinkState = data;
synopGMAC_mac_init(gmacdev); synopGMAC_mac_init(gmacdev);
rt_kprintf("Link is up in %s mode\n",(gmacdev->DuplexMode == FULLDUPLEX) ? "FULL DUPLEX": "HALF DUPLEX"); rt_kprintf("Link is up in %s mode\n", (gmacdev->DuplexMode == FULLDUPLEX) ? "FULL DUPLEX" : "HALF DUPLEX");
if(gmacdev->Speed == SPEED1000) if (gmacdev->Speed == SPEED1000)
rt_kprintf("Link is with 1000M Speed \r\n"); rt_kprintf("Link is with 1000M Speed \r\n");
if(gmacdev->Speed == SPEED100) if (gmacdev->Speed == SPEED100)
rt_kprintf("Link is with 100M Speed \n"); rt_kprintf("Link is with 100M Speed \n");
if(gmacdev->Speed == SPEED10) if (gmacdev->Speed == SPEED10)
rt_kprintf("Link is with 10M Speed \n"); rt_kprintf("Link is with 10M Speed \n");
} }
} }
} }
s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter *adapter) s32 synopGMAC_check_phy_init(synopGMACPciNetworkAdapter *adapter)
{ {
struct ethtool_cmd cmd; struct ethtool_cmd cmd;
synopGMACdevice *gmacdev = adapter->synopGMACdev; synopGMACdevice *gmacdev = adapter->synopGMACdev;
if(!mii_link_ok(&adapter->mii)) if (!mii_link_ok(&adapter->mii))
{ {
gmacdev->DuplexMode = FULLDUPLEX; gmacdev->DuplexMode = FULLDUPLEX;
gmacdev->Speed = SPEED100; gmacdev->Speed = SPEED100;
@ -256,30 +263,31 @@ s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter *adapter)
{ {
mii_ethtool_gset(&adapter->mii, &cmd); mii_ethtool_gset(&adapter->mii, &cmd);
gmacdev->DuplexMode = (cmd.duplex == DUPLEX_FULL) ? FULLDUPLEX: HALFDUPLEX ; gmacdev->DuplexMode = (cmd.duplex == DUPLEX_FULL) ? FULLDUPLEX : HALFDUPLEX ;
if(cmd.speed == SPEED_1000) if (cmd.speed == SPEED_1000)
gmacdev->Speed = SPEED1000; gmacdev->Speed = SPEED1000;
else if(cmd.speed == SPEED_100) else if (cmd.speed == SPEED_100)
gmacdev->Speed = SPEED100; gmacdev->Speed = SPEED100;
else else
gmacdev->Speed = SPEED10; gmacdev->Speed = SPEED10;
} }
return gmacdev->Speed|(gmacdev->DuplexMode<<4); return gmacdev->Speed | (gmacdev->DuplexMode << 4);
} }
static int Mac_change_check(u8 *macaddr0, u8 *macaddr1) static int Mac_change_check(u8 *macaddr0, u8 *macaddr1)
{ {
int i; int i;
for(i = 0; i < 6; i++){ for (i = 0; i < 6; i++)
if(macaddr0[i] != macaddr1[i]) {
if (macaddr0[i] != macaddr1[i])
return 1; return 1;
} }
return 0; return 0;
} }
static rt_err_t eth_init(rt_device_t device ) static rt_err_t eth_init(rt_device_t device)
{ {
struct eth_device *eth_device = (struct eth_device *)device; struct eth_device *eth_device = (struct eth_device *)device;
RT_ASSERT(eth_device != RT_NULL); RT_ASSERT(eth_device != RT_NULL);
@ -292,37 +300,37 @@ static rt_err_t eth_init(rt_device_t device )
u8 macaddr[6] = DEFAULT_MAC_ADDRESS; u8 macaddr[6] = DEFAULT_MAC_ADDRESS;
struct rt_eth_dev *dev = &eth_dev; struct rt_eth_dev *dev = &eth_dev;
struct synopGMACNetworkAdapter *adapter = dev->priv; struct synopGMACNetworkAdapter *adapter = dev->priv;
synopGMACdevice * gmacdev = (synopGMACdevice *)adapter->synopGMACdev; synopGMACdevice *gmacdev = (synopGMACdevice *)adapter->synopGMACdev;
synopGMAC_reset(gmacdev); synopGMAC_reset(gmacdev);
synopGMAC_attach(gmacdev,(regbase + MACBASE),(regbase + DMABASE), DEFAULT_PHY_BASE, macaddr); synopGMAC_attach(gmacdev, (regbase + MACBASE), (regbase + DMABASE), DEFAULT_PHY_BASE, macaddr);
synopGMAC_read_version(gmacdev); synopGMAC_read_version(gmacdev);
synopGMAC_set_mdc_clk_div(gmacdev,GmiiCsrClk3); synopGMAC_set_mdc_clk_div(gmacdev, GmiiCsrClk3);
gmacdev->ClockDivMdc = synopGMAC_get_mdc_clk_div(gmacdev); gmacdev->ClockDivMdc = synopGMAC_get_mdc_clk_div(gmacdev);
init_phy(adapter->synopGMACdev); init_phy(adapter->synopGMACdev);
DEBUG_MES("tx desc_queue\n"); DEBUG_MES("tx desc_queue\n");
synopGMAC_setup_tx_desc_queue(gmacdev,TRANSMIT_DESC_SIZE, RINGMODE); synopGMAC_setup_tx_desc_queue(gmacdev, TRANSMIT_DESC_SIZE, RINGMODE);
synopGMAC_init_tx_desc_base(gmacdev); synopGMAC_init_tx_desc_base(gmacdev);
DEBUG_MES("rx desc_queue\n"); DEBUG_MES("rx desc_queue\n");
synopGMAC_setup_rx_desc_queue(gmacdev,RECEIVE_DESC_SIZE, RINGMODE); synopGMAC_setup_rx_desc_queue(gmacdev, RECEIVE_DESC_SIZE, RINGMODE);
synopGMAC_init_rx_desc_base(gmacdev); synopGMAC_init_rx_desc_base(gmacdev);
DEBUG_MES("DmaRxBaseAddr = %08x\n",synopGMACReadReg(gmacdev->DmaBase,DmaRxBaseAddr)); DEBUG_MES("DmaRxBaseAddr = %08x\n", synopGMACReadReg(gmacdev->DmaBase, DmaRxBaseAddr));
// u32 dmaRx_Base_addr = synopGMACReadReg(gmacdev->DmaBase,DmaRxBaseAddr); // u32 dmaRx_Base_addr = synopGMACReadReg(gmacdev->DmaBase,DmaRxBaseAddr);
// rt_kprintf("first_desc_addr = 0x%x\n", dmaRx_Base_addr); // rt_kprintf("first_desc_addr = 0x%x\n", dmaRx_Base_addr);
#ifdef ENH_DESC_8W #ifdef ENH_DESC_8W
synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength32 | DmaDescriptorSkip2 | DmaDescriptor8Words ); synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength32 | DmaDescriptorSkip2 | DmaDescriptor8Words);
#else #else
//synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip1); //synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip1);
synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip2); synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip2);
#endif #endif
synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl128); synopGMAC_dma_control_init(gmacdev, DmaStoreAndForward | DmaTxSecondFrame | DmaRxThreshCtrl128);
status = synopGMAC_check_phy_init(adapter); status = synopGMAC_check_phy_init(adapter);
synopGMAC_mac_init(gmacdev); synopGMAC_mac_init(gmacdev);
@ -335,22 +343,25 @@ static rt_err_t eth_init(rt_device_t device )
#endif #endif
u32 skb; u32 skb;
do{ do
{
skb = (u32)plat_alloc_memory(RX_BUF_SIZE); //should skb aligned here? skb = (u32)plat_alloc_memory(RX_BUF_SIZE); //should skb aligned here?
if(skb == RT_NULL){ if (skb == RT_NULL)
{
rt_kprintf("ERROR in skb buffer allocation\n"); rt_kprintf("ERROR in skb buffer allocation\n");
break; break;
} }
dma_addr = plat_dma_map_single(gmacdev,(void *)skb,RX_BUF_SIZE); //获取 skb 的 dma 地址 dma_addr = plat_dma_map_single(gmacdev, (void *)skb, RX_BUF_SIZE); //获取 skb 的 dma 地址
status = synopGMAC_set_rx_qptr(gmacdev,dma_addr,RX_BUF_SIZE,(u32)skb,0,0,0); status = synopGMAC_set_rx_qptr(gmacdev, dma_addr, RX_BUF_SIZE, (u32)skb, 0, 0, 0);
if(status < 0) if (status < 0)
{ {
rt_kprintf("status < 0!!\n"); rt_kprintf("status < 0!!\n");
plat_free_memory((void *)skb); plat_free_memory((void *)skb);
} }
}while(status >= 0 && (status < (RECEIVE_DESC_SIZE - 1))); }
while (status >= 0 && (status < (RECEIVE_DESC_SIZE - 1)));
synopGMAC_clear_interrupt(gmacdev); synopGMAC_clear_interrupt(gmacdev);
@ -406,13 +417,13 @@ static rt_err_t eth_close(rt_device_t dev)
return RT_EOK; return RT_EOK;
} }
static rt_size_t eth_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) static rt_size_t eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{ {
rt_set_errno(-RT_ENOSYS); rt_set_errno(-RT_ENOSYS);
return 0; return 0;
} }
static rt_size_t eth_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) static rt_size_t eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{ {
rt_set_errno(-RT_ENOSYS); rt_set_errno(-RT_ENOSYS);
return 0; return 0;
@ -423,7 +434,7 @@ static rt_err_t eth_control(rt_device_t dev, int cmd, void *args)
switch (cmd) switch (cmd)
{ {
case NIOCTL_GADDR: case NIOCTL_GADDR:
if(args) rt_memcpy(args, eth_dev.dev_addr, 6); if (args) rt_memcpy(args, eth_dev.dev_addr, 6);
else return -RT_ERROR; else return -RT_ERROR;
break; break;
@ -433,7 +444,7 @@ static rt_err_t eth_control(rt_device_t dev, int cmd, void *args)
return RT_EOK; return RT_EOK;
} }
rt_err_t rt_eth_tx(rt_device_t device, struct pbuf* p) rt_err_t rt_eth_tx(rt_device_t device, struct pbuf *p)
{ {
/* lock eth device */ /* lock eth device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER); rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
@ -445,24 +456,24 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf* p)
u64 dma_addr; u64 dma_addr;
u32 offload_needed = 0; u32 offload_needed = 0;
u32 index; u32 index;
DmaDesc * dpr; DmaDesc *dpr;
struct rt_eth_dev *dev = (struct rt_eth_dev *) device; struct rt_eth_dev *dev = (struct rt_eth_dev *) device;
struct synopGMACNetworkAdapter *adapter; struct synopGMACNetworkAdapter *adapter;
synopGMACdevice * gmacdev; synopGMACdevice *gmacdev;
adapter = (struct synopGMACNetworkAdapter *) dev->priv; adapter = (struct synopGMACNetworkAdapter *) dev->priv;
if(adapter == NULL) if (adapter == NULL)
return -1; return -1;
gmacdev = (synopGMACdevice *) adapter->synopGMACdev; gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
if(gmacdev == NULL) if (gmacdev == NULL)
return -1; return -1;
if(!synopGMAC_is_desc_owned_by_dma(gmacdev->TxNextDesc)) if (!synopGMAC_is_desc_owned_by_dma(gmacdev->TxNextDesc))
{ {
pbuf = (u32)plat_alloc_memory(p->tot_len); pbuf = (u32)plat_alloc_memory(p->tot_len);
//pbuf = (u32)pbuf_alloc(PBUF_LINK, p->len, PBUF_RAM); //pbuf = (u32)pbuf_alloc(PBUF_LINK, p->len, PBUF_RAM);
if(pbuf == 0) if (pbuf == 0)
{ {
rt_kprintf("===error in alloc bf1\n"); rt_kprintf("===error in alloc bf1\n");
return -1; return -1;
@ -470,11 +481,12 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf* p)
DEBUG_MES("p->len = %d\n", p->len); DEBUG_MES("p->len = %d\n", p->len);
pbuf_copy_partial(p, (void *)pbuf, p->tot_len, 0); pbuf_copy_partial(p, (void *)pbuf, p->tot_len, 0);
dma_addr = plat_dma_map_single(gmacdev,(void*)pbuf,p->tot_len); dma_addr = plat_dma_map_single(gmacdev, (void *)pbuf, p->tot_len);
status = synopGMAC_set_tx_qptr(gmacdev,dma_addr,p->tot_len,pbuf,0,0,0,offload_needed,&index,dpr); status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, p->tot_len, pbuf, 0, 0, 0, offload_needed, &index, dpr);
if(status < 0){ if (status < 0)
rt_kprintf("%s No More Free Tx Descriptors\n",__FUNCTION__); {
rt_kprintf("%s No More Free Tx Descriptors\n", __FUNCTION__);
plat_free_memory((void *)pbuf); plat_free_memory((void *)pbuf);
return -16; return -16;
@ -492,36 +504,44 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf* p)
u32 time_stamp_high; u32 time_stamp_high;
u32 time_stamp_low; u32 time_stamp_low;
#endif #endif
do { do
{
#ifdef ENH_DESC_8W #ifdef ENH_DESC_8W
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2,&ext_status,&time_stamp_high,&time_stamp_low); desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2, &ext_status, &time_stamp_high, &time_stamp_low);
synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher); synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher);
#else #else
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2); desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
#endif #endif
if(desc_index >= 0 && data1 != 0){ if (desc_index >= 0 && data1 != 0)
{
#ifdef IPC_OFFLOAD #ifdef IPC_OFFLOAD
if(synopGMAC_is_tx_ipv4header_checksum_error(gmacdev, status)){ if (synopGMAC_is_tx_ipv4header_checksum_error(gmacdev, status))
{
rt_kprintf("Harware Failed to Insert IPV4 Header Checksum\n"); rt_kprintf("Harware Failed to Insert IPV4 Header Checksum\n");
} }
if(synopGMAC_is_tx_payload_checksum_error(gmacdev, status)){ if (synopGMAC_is_tx_payload_checksum_error(gmacdev, status))
{
rt_kprintf("Harware Failed to Insert Payload Checksum\n"); rt_kprintf("Harware Failed to Insert Payload Checksum\n");
} }
#endif #endif
plat_free_memory((void *)(data1)); //sw: data1 = buffer1 plat_free_memory((void *)(data1)); //sw: data1 = buffer1
if(synopGMAC_is_desc_valid(status)){ if (synopGMAC_is_desc_valid(status))
{
adapter->synopGMACNetStats.tx_bytes += length1; adapter->synopGMACNetStats.tx_bytes += length1;
adapter->synopGMACNetStats.tx_packets++; adapter->synopGMACNetStats.tx_packets++;
} }
else { else
{
adapter->synopGMACNetStats.tx_errors++; adapter->synopGMACNetStats.tx_errors++;
adapter->synopGMACNetStats.tx_aborted_errors += synopGMAC_is_tx_aborted(status); adapter->synopGMACNetStats.tx_aborted_errors += synopGMAC_is_tx_aborted(status);
adapter->synopGMACNetStats.tx_carrier_errors += synopGMAC_is_tx_carrier_error(status); adapter->synopGMACNetStats.tx_carrier_errors += synopGMAC_is_tx_carrier_error(status);
} }
} adapter->synopGMACNetStats.collisions += synopGMAC_get_tx_collision_count(status); }
} while(desc_index >= 0); adapter->synopGMACNetStats.collisions += synopGMAC_get_tx_collision_count(status);
}
while (desc_index >= 0);
/* unlock eth device */ /* unlock eth device */
rt_sem_release(&sem_lock); rt_sem_release(&sem_lock);
@ -536,11 +556,11 @@ struct pbuf *rt_eth_rx(rt_device_t device)
DEBUG_MES("%s : \n", __FUNCTION__); DEBUG_MES("%s : \n", __FUNCTION__);
struct rt_eth_dev *dev = &eth_dev; struct rt_eth_dev *dev = &eth_dev;
struct synopGMACNetworkAdapter *adapter; struct synopGMACNetworkAdapter *adapter;
synopGMACdevice * gmacdev; synopGMACdevice *gmacdev;
// struct PmonInet * pinetdev; // struct PmonInet * pinetdev;
s32 desc_index; s32 desc_index;
int i; int i;
char * ptr; char *ptr;
u32 bf1; u32 bf1;
u32 data1; u32 data1;
u32 data2; u32 data2;
@ -552,38 +572,41 @@ struct pbuf *rt_eth_rx(rt_device_t device)
rt_sem_take(&sem_lock, RT_WAITING_FOREVER); rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
adapter = (struct synopGMACNetworkAdapter *) dev->priv; adapter = (struct synopGMACNetworkAdapter *) dev->priv;
if(adapter == NULL){ if (adapter == NULL)
{
rt_kprintf("%S : Unknown Device !!\n", __FUNCTION__); rt_kprintf("%S : Unknown Device !!\n", __FUNCTION__);
return NULL; return NULL;
} }
gmacdev = (synopGMACdevice *) adapter->synopGMACdev; gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
if(gmacdev == NULL){ if (gmacdev == NULL)
{
rt_kprintf("%s : GMAC device structure is missing\n", __FUNCTION__); rt_kprintf("%s : GMAC device structure is missing\n", __FUNCTION__);
return NULL; return NULL;
} }
/*Handle the Receive Descriptors*/ /*Handle the Receive Descriptors*/
// do{ // do{
desc_index = synopGMAC_get_rx_qptr(gmacdev, &status,&dma_addr1,NULL, &data1,&dma_addr2,NULL,&data2); desc_index = synopGMAC_get_rx_qptr(gmacdev, &status, &dma_addr1, NULL, &data1, &dma_addr2, NULL, &data2);
if(desc_index >= 0 && data1 != 0){ if (desc_index >= 0 && data1 != 0)
DEBUG_MES("Received Data at Rx Descriptor %d for skb 0x%08x whose status is %08x\n",desc_index,dma_addr1,status); {
DEBUG_MES("Received Data at Rx Descriptor %d for skb 0x%08x whose status is %08x\n", desc_index, dma_addr1, status);
if(synopGMAC_is_rx_desc_valid(status)||SYNOP_PHY_LOOPBACK) if (synopGMAC_is_rx_desc_valid(status) || SYNOP_PHY_LOOPBACK)
{ {
pbuf = pbuf_alloc(PBUF_LINK, MAX_ETHERNET_PAYLOAD, PBUF_RAM); pbuf = pbuf_alloc(PBUF_LINK, MAX_ETHERNET_PAYLOAD, PBUF_RAM);
if(pbuf == 0) rt_kprintf("===error in pbuf_alloc\n"); if (pbuf == 0) rt_kprintf("===error in pbuf_alloc\n");
dma_addr1 = plat_dma_map_single(gmacdev,(void*)data1,RX_BUF_SIZE); dma_addr1 = plat_dma_map_single(gmacdev, (void *)data1, RX_BUF_SIZE);
len = synopGMAC_get_rx_desc_frame_length(status); //Not interested in Ethernet CRC bytes len = synopGMAC_get_rx_desc_frame_length(status); //Not interested in Ethernet CRC bytes
rt_memcpy( pbuf->payload, (char *)data1, len); rt_memcpy(pbuf->payload, (char *)data1, len);
DEBUG_MES("==get pkg len: %d\n",len); DEBUG_MES("==get pkg len: %d\n", len);
} }
else else
{ {
rt_kprintf("s: %08x\n",status); rt_kprintf("s: %08x\n", status);
adapter->synopGMACNetStats.rx_errors++; adapter->synopGMACNetStats.rx_errors++;
adapter->synopGMACNetStats.collisions += synopGMAC_is_rx_frame_collision(status); adapter->synopGMACNetStats.collisions += synopGMAC_is_rx_frame_collision(status);
adapter->synopGMACNetStats.rx_crc_errors += synopGMAC_is_rx_crc(status); adapter->synopGMACNetStats.rx_crc_errors += synopGMAC_is_rx_crc(status);
@ -591,11 +614,12 @@ struct pbuf *rt_eth_rx(rt_device_t device)
adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status); adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
} }
desc_index = synopGMAC_set_rx_qptr(gmacdev,dma_addr1, RX_BUF_SIZE, (u32)data1,0,0,0); desc_index = synopGMAC_set_rx_qptr(gmacdev, dma_addr1, RX_BUF_SIZE, (u32)data1, 0, 0, 0);
if(desc_index < 0){ if (desc_index < 0)
{
#if SYNOP_RX_DEBUG #if SYNOP_RX_DEBUG
rt_kprintf("Cannot set Rx Descriptor for data1 %08x\n",(u32)data1); rt_kprintf("Cannot set Rx Descriptor for data1 %08x\n", (u32)data1);
#endif #endif
plat_free_memory((void *)data1); plat_free_memory((void *)data1);
} }
@ -614,21 +638,21 @@ static int rtl88e1111_config_init(synopGMACdevice *gmacdev)
u16 data; u16 data;
DEBUG_MES("in %s\n", __FUNCTION__); DEBUG_MES("in %s\n", __FUNCTION__);
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x14, &data);
data = data | 0x82; data = data | 0x82;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,data); err = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x14, data);
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x00, &data);
data = data | 0x8000; data = data | 0x8000;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,data); err = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x00, data);
#if SYNOP_PHY_LOOPBACK #if SYNOP_PHY_LOOPBACK
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x14, &data);
data = data | 0x70; data = data | 0x70;
data = data & 0xffdf; data = data & 0xffdf;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,data); err = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x14, data);
data = 0x8000; data = 0x8000;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,data); err = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x00, data);
data = 0x5140; data = 0x5140;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,data); err = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x00, data);
#endif #endif
if (err < 0) if (err < 0)
return err; return err;
@ -639,43 +663,44 @@ int init_phy(synopGMACdevice *gmacdev)
{ {
u16 data; u16 data;
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,2,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 2, &data);
/*set 88e1111 clock phase delay*/ /*set 88e1111 clock phase delay*/
if(data == 0x141) if (data == 0x141)
rtl88e1111_config_init(gmacdev); rtl88e1111_config_init(gmacdev);
#if defined (RMII) #if defined (RMII)
else if(data == 0x8201) else if (data == 0x8201)
{ {
//RTL8201 //RTL8201
data = 0x400; // set RMII mode data = 0x400; // set RMII mode
synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x19,data); synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x19, data);
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x19,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x19, &data);
TR("phy reg25 is %0x \n",data); TR("phy reg25 is %0x \n", data);
data = 0x3100; //set 100M speed data = 0x3100; //set 100M speed
synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,data); synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x0, data);
} }
else if(data == 0x0180 || data == 0x0181) else if (data == 0x0180 || data == 0x0181)
{ {
//DM9161 //DM9161
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x10, &data);
data |= (1 << 8); //set RMII mode data |= (1 << 8); //set RMII mode
synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,data); //set RMII mode synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x10, data); //set RMII mode
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x10,&data); synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x10, &data);
TR("phy reg16 is 0x%0x \n",data); TR("phy reg16 is 0x%0x \n", data);
// synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,&data); // synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,&data);
// data &= ~(1<<10); // data &= ~(1<<10);
data = 0x3100; //set auto- data = 0x3100; //set auto-
//data = 0x0100; //set 10M speed //data = 0x0100; //set 10M speed
synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x0,data); synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, 0x0, data);
} }
#endif #endif
return 0; return 0;
} }
u32 synopGMAC_wakeup_filter_config3[] = { u32 synopGMAC_wakeup_filter_config3[] =
{
0x00000000, 0x00000000,
0x000000FF, 0x000000FF,
0x00000000, 0x00000000,
@ -717,9 +742,9 @@ static void synopGMAC_linux_powerdown_mac(synopGMACdevice *gmacdev)
static void synopGMAC_linux_powerup_mac(synopGMACdevice *gmacdev) static void synopGMAC_linux_powerup_mac(synopGMACdevice *gmacdev)
{ {
GMAC_Power_down = 0; GMAC_Power_down = 0;
if( synopGMAC_is_magic_packet_received(gmacdev)) if (synopGMAC_is_magic_packet_received(gmacdev))
rt_kprintf("GMAC wokeup due to Magic Pkt Received\n"); rt_kprintf("GMAC wokeup due to Magic Pkt Received\n");
if(synopGMAC_is_wakeup_frame_received(gmacdev)) if (synopGMAC_is_wakeup_frame_received(gmacdev))
rt_kprintf("GMAC wokeup due to Wakeup Frame Received\n"); rt_kprintf("GMAC wokeup due to Wakeup Frame Received\n");
synopGMAC_pmt_int_disable(gmacdev); synopGMAC_pmt_int_disable(gmacdev);
@ -735,40 +760,40 @@ static void synopGMAC_linux_powerup_mac(synopGMACdevice *gmacdev)
static int mdio_read(synopGMACPciNetworkAdapter *adapter, int addr, int reg) static int mdio_read(synopGMACPciNetworkAdapter *adapter, int addr, int reg)
{ {
synopGMACdevice * gmacdev; synopGMACdevice *gmacdev;
u16 data; u16 data;
gmacdev = adapter->synopGMACdev; gmacdev = adapter->synopGMACdev;
synopGMAC_read_phy_reg(gmacdev->MacBase,addr,reg, &data); synopGMAC_read_phy_reg(gmacdev->MacBase, addr, reg, &data);
return data; return data;
} }
static void mdio_write(synopGMACPciNetworkAdapter *adapter, int addr, int reg, int data) static void mdio_write(synopGMACPciNetworkAdapter *adapter, int addr, int reg, int data)
{ {
synopGMACdevice * gmacdev; synopGMACdevice *gmacdev;
gmacdev = adapter->synopGMACdev; gmacdev = adapter->synopGMACdev;
synopGMAC_write_phy_reg(gmacdev->MacBase,addr,reg,data); synopGMAC_write_phy_reg(gmacdev->MacBase, addr, reg, data);
} }
void eth_rx_irq(int irqno,void *param) void eth_rx_irq(int irqno, void *param)
{ {
struct rt_eth_dev *dev = &eth_dev; struct rt_eth_dev *dev = &eth_dev;
struct synopGMACNetworkAdapter *adapter = dev->priv; struct synopGMACNetworkAdapter *adapter = dev->priv;
//DEBUG_MES("in irq!!\n"); //DEBUG_MES("in irq!!\n");
#ifdef RT_USING_GMAC_INT_MODE #ifdef RT_USING_GMAC_INT_MODE
int i ; int i ;
for(i = 0; i < 7200; i++) for (i = 0; i < 7200; i++)
; ;
#endif /*RT_USING_GMAC_INT_MODE*/ #endif /*RT_USING_GMAC_INT_MODE*/
synopGMACdevice * gmacdev = (synopGMACdevice *)adapter->synopGMACdev; synopGMACdevice *gmacdev = (synopGMACdevice *)adapter->synopGMACdev;
u32 interrupt,dma_status_reg; u32 interrupt, dma_status_reg;
s32 status; s32 status;
u32 dma_addr; u32 dma_addr;
//rt_kprintf("irq i = %d\n", i++); //rt_kprintf("irq i = %d\n", i++);
dma_status_reg = synopGMACReadReg(gmacdev->DmaBase, DmaStatus); dma_status_reg = synopGMACReadReg(gmacdev->DmaBase, DmaStatus);
if(dma_status_reg == 0) if (dma_status_reg == 0)
{ {
rt_kprintf("dma_status ==0 \n"); rt_kprintf("dma_status ==0 \n");
return; return;
@ -777,29 +802,33 @@ void eth_rx_irq(int irqno,void *param)
//rt_kprintf("dma_status_reg is 0x%x\n", dma_status_reg); //rt_kprintf("dma_status_reg is 0x%x\n", dma_status_reg);
u32 gmacstatus; u32 gmacstatus;
synopGMAC_disable_interrupt_all(gmacdev); synopGMAC_disable_interrupt_all(gmacdev);
gmacstatus = synopGMACReadReg(gmacdev->MacBase,GmacStatus); gmacstatus = synopGMACReadReg(gmacdev->MacBase, GmacStatus);
if(dma_status_reg & GmacPmtIntr){ if (dma_status_reg & GmacPmtIntr)
rt_kprintf("%s:: Interrupt due to PMT module\n",__FUNCTION__); {
rt_kprintf("%s:: Interrupt due to PMT module\n", __FUNCTION__);
//synopGMAC_linux_powerup_mac(gmacdev); //synopGMAC_linux_powerup_mac(gmacdev);
} }
if(dma_status_reg & GmacMmcIntr){ if (dma_status_reg & GmacMmcIntr)
rt_kprintf("%s:: Interrupt due to MMC module\n",__FUNCTION__); {
DEBUG_MES("%s:: synopGMAC_rx_int_status = %08x\n",__FUNCTION__,synopGMAC_read_mmc_rx_int_status(gmacdev)); rt_kprintf("%s:: Interrupt due to MMC module\n", __FUNCTION__);
DEBUG_MES("%s:: synopGMAC_tx_int_status = %08x\n",__FUNCTION__,synopGMAC_read_mmc_tx_int_status(gmacdev)); DEBUG_MES("%s:: synopGMAC_rx_int_status = %08x\n", __FUNCTION__, synopGMAC_read_mmc_rx_int_status(gmacdev));
DEBUG_MES("%s:: synopGMAC_tx_int_status = %08x\n", __FUNCTION__, synopGMAC_read_mmc_tx_int_status(gmacdev));
} }
if(dma_status_reg & GmacLineIntfIntr){ if (dma_status_reg & GmacLineIntfIntr)
rt_kprintf("%s:: Interrupt due to GMAC LINE module\n",__FUNCTION__); {
rt_kprintf("%s:: Interrupt due to GMAC LINE module\n", __FUNCTION__);
} }
interrupt = synopGMAC_get_interrupt_type(gmacdev); interrupt = synopGMAC_get_interrupt_type(gmacdev);
//rt_kprintf("%s:Interrupts to be handled: 0x%08x\n",__FUNCTION__,interrupt); //rt_kprintf("%s:Interrupts to be handled: 0x%08x\n",__FUNCTION__,interrupt);
if(interrupt & synopGMACDmaError){ if (interrupt & synopGMACDmaError)
{
u8 mac_addr0[6]; u8 mac_addr0[6];
rt_kprintf("%s::Fatal Bus Error Inetrrupt Seen\n",__FUNCTION__); rt_kprintf("%s::Fatal Bus Error Inetrrupt Seen\n", __FUNCTION__);
memcpy(mac_addr0,dev->dev_addr,6); memcpy(mac_addr0, dev->dev_addr, 6);
synopGMAC_disable_dma_tx(gmacdev); synopGMAC_disable_dma_tx(gmacdev);
synopGMAC_disable_dma_rx(gmacdev); synopGMAC_disable_dma_rx(gmacdev);
@ -810,9 +839,9 @@ void eth_rx_irq(int irqno,void *param)
synopGMAC_reset(gmacdev); synopGMAC_reset(gmacdev);
synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, mac_addr0); synopGMAC_set_mac_addr(gmacdev, GmacAddr0High, GmacAddr0Low, mac_addr0);
synopGMAC_dma_bus_mode_init(gmacdev,DmaFixedBurstEnable| DmaBurstLength8 | DmaDescriptorSkip2 ); synopGMAC_dma_bus_mode_init(gmacdev, DmaFixedBurstEnable | DmaBurstLength8 | DmaDescriptorSkip2);
synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward); synopGMAC_dma_control_init(gmacdev, DmaStoreAndForward);
synopGMAC_init_rx_desc_base(gmacdev); synopGMAC_init_rx_desc_base(gmacdev);
synopGMAC_init_tx_desc_base(gmacdev); synopGMAC_init_tx_desc_base(gmacdev);
synopGMAC_mac_init(gmacdev); synopGMAC_mac_init(gmacdev);
@ -820,44 +849,52 @@ void eth_rx_irq(int irqno,void *param)
synopGMAC_enable_dma_tx(gmacdev); synopGMAC_enable_dma_tx(gmacdev);
} }
if(interrupt & synopGMACDmaRxNormal){ if (interrupt & synopGMACDmaRxNormal)
{
//DEBUG_MES("%s:: Rx Normal \n", __FUNCTION__); //DEBUG_MES("%s:: Rx Normal \n", __FUNCTION__);
//synop_handle_received_data(netdev); //synop_handle_received_data(netdev);
eth_device_ready(&eth_dev.parent); eth_device_ready(&eth_dev.parent);
} }
if(interrupt & synopGMACDmaRxAbnormal){ if (interrupt & synopGMACDmaRxAbnormal)
{
//rt_kprintf("%s::Abnormal Rx Interrupt Seen\n",__FUNCTION__); //rt_kprintf("%s::Abnormal Rx Interrupt Seen\n",__FUNCTION__);
if(GMAC_Power_down == 0){ if (GMAC_Power_down == 0)
{
adapter->synopGMACNetStats.rx_over_errors++; adapter->synopGMACNetStats.rx_over_errors++;
synopGMACWriteReg(gmacdev->DmaBase, DmaStatus ,0x80); synopGMACWriteReg(gmacdev->DmaBase, DmaStatus, 0x80);
synopGMAC_resume_dma_rx(gmacdev); synopGMAC_resume_dma_rx(gmacdev);
} }
} }
if(interrupt & synopGMACDmaRxStopped){ if (interrupt & synopGMACDmaRxStopped)
rt_kprintf("%s::Receiver stopped seeing Rx interrupts\n",__FUNCTION__); //Receiver gone in to stopped state {
rt_kprintf("%s::Receiver stopped seeing Rx interrupts\n", __FUNCTION__); //Receiver gone in to stopped state
} }
if(interrupt & synopGMACDmaTxNormal){ if (interrupt & synopGMACDmaTxNormal)
DEBUG_MES("%s::Finished Normal Transmission \n",__FUNCTION__); {
DEBUG_MES("%s::Finished Normal Transmission \n", __FUNCTION__);
// synop_handle_transmit_over(netdev); // synop_handle_transmit_over(netdev);
} }
if(interrupt & synopGMACDmaTxAbnormal){ if (interrupt & synopGMACDmaTxAbnormal)
rt_kprintf("%s::Abnormal Tx Interrupt Seen\n",__FUNCTION__); {
rt_kprintf("%s::Abnormal Tx Interrupt Seen\n", __FUNCTION__);
} }
if(interrupt & synopGMACDmaTxStopped){ if (interrupt & synopGMACDmaTxStopped)
TR("%s::Transmitter stopped sending the packets\n",__FUNCTION__); {
if(GMAC_Power_down == 0){ // If Mac is not in powerdown TR("%s::Transmitter stopped sending the packets\n", __FUNCTION__);
if (GMAC_Power_down == 0) // If Mac is not in powerdown
{
synopGMAC_disable_dma_tx(gmacdev); synopGMAC_disable_dma_tx(gmacdev);
synopGMAC_take_desc_ownership_tx(gmacdev); synopGMAC_take_desc_ownership_tx(gmacdev);
synopGMAC_enable_dma_tx(gmacdev); synopGMAC_enable_dma_tx(gmacdev);
// netif_wake_queue(netdev); // netif_wake_queue(netdev);
TR("%s::Transmission Resumed\n",__FUNCTION__); TR("%s::Transmission Resumed\n", __FUNCTION__);
} }
} }
/* Enable the interrrupt before returning from ISR*/ /* Enable the interrrupt before returning from ISR*/
synopGMAC_enable_interrupt(gmacdev,DmaIntEnable); synopGMAC_enable_interrupt(gmacdev, DmaIntEnable);
return; return;
} }
@ -865,14 +902,14 @@ void eth_rx_irq(int irqno,void *param)
int rt_hw_eth_init(void) int rt_hw_eth_init(void)
{ {
u64 base_addr = Gmac_base; u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter * synopGMACadapter; struct synopGMACNetworkAdapter *synopGMACadapter;
static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS; static u8 mac_addr0[6] = DEFAULT_MAC_ADDRESS;
int index; int index;
rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO); rt_sem_init(&sem_ack, "tx_ack", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO); rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
for(index=21; index<=30;index++) for (index = 21; index <= 30; index++)
{ {
pin_set_purpose(index, PIN_PURPOSE_OTHER); pin_set_purpose(index, PIN_PURPOSE_OTHER);
pin_set_remap(index, PIN_REMAP_DEFAULT); pin_set_remap(index, PIN_REMAP_DEFAULT);
@ -885,24 +922,26 @@ int rt_hw_eth_init(void)
memset(&eth_dev, 0, sizeof(eth_dev)); memset(&eth_dev, 0, sizeof(eth_dev));
synopGMACadapter = (struct synopGMACNetworkAdapter * )plat_alloc_memory(sizeof (struct synopGMACNetworkAdapter)); synopGMACadapter = (struct synopGMACNetworkAdapter *)plat_alloc_memory(sizeof(struct synopGMACNetworkAdapter));
if(!synopGMACadapter){ if (!synopGMACadapter)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__); rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
} }
memset((char *)synopGMACadapter ,0, sizeof (struct synopGMACNetworkAdapter)); memset((char *)synopGMACadapter, 0, sizeof(struct synopGMACNetworkAdapter));
synopGMACadapter->synopGMACdev = NULL; synopGMACadapter->synopGMACdev = NULL;
synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof (synopGMACdevice)); synopGMACadapter->synopGMACdev = (synopGMACdevice *) plat_alloc_memory(sizeof(synopGMACdevice));
if(!synopGMACadapter->synopGMACdev){ if (!synopGMACadapter->synopGMACdev)
{
rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__); rt_kprintf("Error in Memory Allocataion, Founction : %s \n", __FUNCTION__);
} }
memset((char *)synopGMACadapter->synopGMACdev ,0, sizeof (synopGMACdevice)); memset((char *)synopGMACadapter->synopGMACdev, 0, sizeof(synopGMACdevice));
/* /*
* Attach the device to MAC struct This will configure all the required base addresses * Attach the device to MAC struct This will configure all the required base addresses
* such as Mac base, configuration base, phy base address(out of 32 possible phys) * such as Mac base, configuration base, phy base address(out of 32 possible phys)
* */ * */
synopGMAC_attach(synopGMACadapter->synopGMACdev,(regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0); synopGMAC_attach(synopGMACadapter->synopGMACdev, (regbase + MACBASE), regbase + DMABASE, DEFAULT_PHY_BASE, mac_addr0);
init_phy(synopGMACadapter->synopGMACdev); init_phy(synopGMACadapter->synopGMACdev);
synopGMAC_reset(synopGMACadapter->synopGMACdev); synopGMAC_reset(synopGMACadapter->synopGMACdev);