From efbb5490d7799caf70e5bf76a1d0a8b02fcfb9e2 Mon Sep 17 00:00:00 2001
From: bigmagic <zhaofujin@rt-thread.com>
Date: Thu, 19 Mar 2020 18:31:55 +0800
Subject: [PATCH] add soc timer cntpct

---
 bsp/raspberry-pi/raspi3-64/driver/board.c |  2 ++
 libcpu/aarch64/cortex-a53/context_gcc.S   | 14 ++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/bsp/raspberry-pi/raspi3-64/driver/board.c b/bsp/raspberry-pi/raspi3-64/driver/board.c
index 0305dda8d9..5d15dda987 100644
--- a/bsp/raspberry-pi/raspi3-64/driver/board.c
+++ b/bsp/raspberry-pi/raspi3-64/driver/board.c
@@ -25,6 +25,8 @@ static rt_uint64_t timerStep;
 
 int rt_hw_get_gtimer_frq(void);
 void rt_hw_set_gtimer_val(rt_uint64_t value);
+int rt_hw_get_gtimer_val(void);
+int rt_hw_get_cntpct_val(void);
 void rt_hw_gtimer_enable(void);
 
 void core0_timer_enable_interrupt_controller()
diff --git a/libcpu/aarch64/cortex-a53/context_gcc.S b/libcpu/aarch64/cortex-a53/context_gcc.S
index d5c241036e..934db7ed84 100644
--- a/libcpu/aarch64/cortex-a53/context_gcc.S
+++ b/libcpu/aarch64/cortex-a53/context_gcc.S
@@ -25,6 +25,20 @@ rt_hw_set_gtimer_val:
 	MSR CNTP_TVAL_EL0,X0
 	RET
 
+/*
+ *get gtimer CNTP_TVAL_EL0 value
+ */
+.globl rt_hw_get_gtimer_val
+rt_hw_get_gtimer_val:
+	MRS X0,CNTP_TVAL_EL0
+	RET
+
+
+.globl rt_hw_get_cntpct_val
+rt_hw_get_cntpct_val:
+	MRS X0, CNTPCT_EL0
+	RET
+
 /*
  *get gtimer frq value
  */