diff --git a/bsp/stm3210/project_107/application.c b/bsp/stm3210/project_107/application.c index b1830132ef..f3a37e583e 100644 --- a/bsp/stm3210/project_107/application.c +++ b/bsp/stm3210/project_107/application.c @@ -1,24 +1,35 @@ -/* - * File : application.c - * This file is part of RT-Thread RTOS - * COPYRIGHT (C) 2006, RT-Thread Development Team - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rt-thread.org/license/LICENSE - * - * Change Logs: - * Date Author Notes - * 2009-01-05 Bernard the first version - */ - -/** - * @addtogroup STM32 - */ -/*@{*/ - +/* + * File : application.c + * This file is part of RT-Thread RTOS + * COPYRIGHT (C) 2006, RT-Thread Development Team + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rt-thread.org/license/LICENSE + * + * Change Logs: + * Date Author Notes + * 2009-01-05 Bernard the first version + */ + +/** + * @addtogroup STM32 + */ +/*@{*/ + #include +#ifdef RT_USING_DFS +/* dfs init */ +#include +/* dfs filesystem:FAT filesystem init */ +#include +/* dfs filesystem:EFS filesystem init */ +#include +/* dfs Filesystem APIs */ +#include +#endif + #ifdef RT_USING_LWIP #include #include @@ -26,6 +37,25 @@ void rt_init_thread_entry(void* parameter) { +/* Filesystem Initialization */ +#ifdef RT_USING_DFS + { + /* init the device filesystem */ + dfs_init(); + /* init the efsl filesystam*/ + efsl_init(); + + /* mount sd card fat partition 1 as root directory */ + if (dfs_mount("sd0", "/", "efs", 0, 0) == 0) + { + rt_kprintf("File System initialized!\n"); + } + else + rt_kprintf("File System initialzation failed!\n"); + + } +#endif + /* LwIP Initialization */ #ifdef RT_USING_LWIP { @@ -37,25 +67,25 @@ void rt_init_thread_entry(void* parameter) } #endif } - -int rt_application_init() -{ - rt_thread_t init_thread; - + +int rt_application_init() +{ + rt_thread_t init_thread; + #if (RT_THREAD_PRIORITY_MAX == 32) - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, 2048, 8, 20); #else - init_thread = rt_thread_create("init", - rt_init_thread_entry, RT_NULL, + init_thread = rt_thread_create("init", + rt_init_thread_entry, RT_NULL, 2048, 80, 20); #endif - if (init_thread != RT_NULL) + if (init_thread != RT_NULL) rt_thread_startup(init_thread); - - return 0; -} - -/*@}*/ + + return 0; +} + +/*@}*/ diff --git a/bsp/stm3210/project_107/board.h b/bsp/stm3210/project_107/board.h index 5c2c8e577f..22968525fd 100644 --- a/bsp/stm3210/project_107/board.h +++ b/bsp/stm3210/project_107/board.h @@ -40,7 +40,7 @@ // Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3 // Default: 1 -#define STM32_CONSOLE_USART 2 +#define STM32_CONSOLE_USART 1 void rt_hw_board_led_on(int n); void rt_hw_board_led_off(int n); diff --git a/bsp/stm3210/project_107/msd.c b/bsp/stm3210/project_107/msd.c new file mode 100644 index 0000000000..170bd3f248 --- /dev/null +++ b/bsp/stm3210/project_107/msd.c @@ -0,0 +1,937 @@ +/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** +* File Name : msd.c +* Author : MCD Application Team +* Version : V2.1 +* Date : 05/30/2008 +* Description : MSD card driver source file. +* Pin assignment: +* ---------------------------------------------- +* | STM32F10x | MSD Pin | +* ---------------------------------------------- +* | P0.4 | ChipSelect 1 | +* | P0.1 / MOSI | DataIn 2 | +* | | GND 3 (0 V) | +* | | VDD 4 (3.3 V) | +* | P0.2 / SCLK | Clock 5 | +* | | GND 6 (0 V) | +* | P0.0 / MISO | DataOut 7 | +* ----------------------------------------------- +******************************************************************************** +* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED +* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. +*******************************************************************************/ + +/* Includes ------------------------------------------------------------------*/ +#include "msd.h" +#include + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Select MSD Card: ChipSelect pin low */ +#define MSD_CS_LOW() GPIO_ResetBits(GPIOC, GPIO_Pin_7) +/* Deselect MSD Card: ChipSelect pin high */ +#define MSD_CS_HIGH() GPIO_SetBits(GPIOC, GPIO_Pin_7) +/* MSD Card SPI */ +#define MSD_SPI SPI3 + +/* Private function prototypes -----------------------------------------------*/ +static void SPI_Config(void); +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : MSD_Init +* Description : Initializes the MSD/SD communication. +* Input : None +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_Init(void) +{ + u32 i = 0; + + /* Initialize SPI */ + SPI_Config(); + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte 0xFF, 10 times with CS high*/ + /* rise CS and MOSI for 80 clocks cycles */ + for (i = 0; i <= 9; i++) + { + /* Send dummy byte 0xFF */ + MSD_WriteByte(DUMMY); + } + /*------------Put MSD in SPI mode--------------*/ + /* MSD initialized and set to SPI mode properly */ + return (MSD_GoIdleState()); +} + +/******************************************************************************* +* Function Name : MSD_WriteBlock +* Description : Writes a block on the MSD +* Input : - pBuffer : pointer to the buffer containing the data to be +* written on the MSD. +* - WriteAddr : address to write on. +* - NumByteToWrite: number of data to write +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite) +{ + u32 i = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD24 (MSD_WRITE_BLOCK) to write multiple block */ + MSD_SendCmd(MSD_WRITE_BLOCK, WriteAddr, 0xFF); + + /* Check if the MSD acknowledged the write block command: R1 response (0x00: no errors) */ + if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + /* Send a dummy byte */ + MSD_WriteByte(DUMMY); + /* Send the data token to signify the start of the data */ + MSD_WriteByte(0xFE); + /* Write the block data to MSD : write count data by block */ + for (i = 0; i < NumByteToWrite; i++) + { + /* Send the pointed byte */ + MSD_WriteByte(*pBuffer); + /* Point to the next location where the byte read will be saved */ + pBuffer++; + } + /* Put CRC bytes (not really needed by us, but required by MSD) */ + MSD_ReadByte(); + MSD_ReadByte(); + /* Read data response */ + if (MSD_GetDataResponse() == MSD_DATA_OK) + { + rvalue = MSD_RESPONSE_NO_ERROR; + } + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + /* Returns the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_ReadBlock +* Description : Reads a block of data from the MSD. +* Input : - pBuffer : pointer to the buffer that receives the data read +* from the MSD. +* - ReadAddr : MSD's internal address to read from. +* - NumByteToRead : number of bytes to read from the MSD. +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead) +{ + u32 i = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD17 (MSD_READ_SINGLE_BLOCK) to read one block */ + MSD_SendCmd(MSD_READ_SINGLE_BLOCK, ReadAddr, 0xFF); + + /* Check if the MSD acknowledged the read block command: R1 response (0x00: no errors) */ + if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + /* Now look for the data token to signify the start of the data */ + if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) + { + /* Read the MSD block data : read NumByteToRead data */ + for (i = 0; i < NumByteToRead; i++) + { + /* Save the received data */ + *pBuffer = MSD_ReadByte(); + /* Point to the next location where the byte read will be saved */ + pBuffer++; + } + /* Get CRC bytes (not really needed by us, but required by MSD) */ + MSD_ReadByte(); + MSD_ReadByte(); + /* Set response value to success */ + rvalue = MSD_RESPONSE_NO_ERROR; + } + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + /* Returns the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_WriteBuffer +* Description : Writes many blocks on the MSD +* Input : - pBuffer : pointer to the buffer containing the data to be +* written on the MSD. +* - WriteAddr : address to write on. +* - NumByteToWrite: number of data to write +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite) +{ + u32 i = 0, NbrOfBlock = 0, Offset = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + + /* Calculate number of blocks to write */ + NbrOfBlock = NumByteToWrite / BLOCK_SIZE; + /* MSD chip select low */ + MSD_CS_LOW(); + + /* Data transfer */ + while (NbrOfBlock --) + { + /* Send CMD24 (MSD_WRITE_BLOCK) to write blocks */ + MSD_SendCmd(MSD_WRITE_BLOCK, WriteAddr + Offset, 0xFF); + + /* Check if the MSD acknowledged the write block command: R1 response (0x00: no errors) */ + if (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + return MSD_RESPONSE_FAILURE; + } + /* Send dummy byte */ + MSD_WriteByte(DUMMY); + /* Send the data token to signify the start of the data */ + MSD_WriteByte(MSD_START_DATA_SINGLE_BLOCK_WRITE); + /* Write the block data to MSD : write count data by block */ + for (i = 0; i < BLOCK_SIZE; i++) + { + /* Send the pointed byte */ + MSD_WriteByte(*pBuffer); + /* Point to the next location where the byte read will be saved */ + pBuffer++; + } + /* Set next write address */ + Offset += 512; + /* Put CRC bytes (not really needed by us, but required by MSD) */ + MSD_ReadByte(); + MSD_ReadByte(); + /* Read data response */ + if (MSD_GetDataResponse() == MSD_DATA_OK) + { + /* Set response value to success */ + rvalue = MSD_RESPONSE_NO_ERROR; + } + else + { + /* Set response value to failure */ + rvalue = MSD_RESPONSE_FAILURE; + } + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + /* Returns the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_ReadBuffer +* Description : Reads multiple block of data from the MSD. +* Input : - pBuffer : pointer to the buffer that receives the data read +* from the MSD. +* - ReadAddr : MSD's internal address to read from. +* - NumByteToRead : number of bytes to read from the MSD. +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead) +{ + u32 i = 0, NbrOfBlock = 0, Offset = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + + /* Calculate number of blocks to read */ + NbrOfBlock = NumByteToRead / BLOCK_SIZE; + /* MSD chip select low */ + MSD_CS_LOW(); + + /* Data transfer */ + while (NbrOfBlock --) + { + /* Send CMD17 (MSD_READ_SINGLE_BLOCK) to read one block */ + MSD_SendCmd (MSD_READ_SINGLE_BLOCK, ReadAddr + Offset, 0xFF); + /* Check if the MSD acknowledged the read block command: R1 response (0x00: no errors) */ + if (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + return MSD_RESPONSE_FAILURE; + } + /* Now look for the data token to signify the start of the data */ + if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) + { + /* Read the MSD block data : read NumByteToRead data */ + for (i = 0; i < BLOCK_SIZE; i++) + { + /* Read the pointed data */ + *pBuffer = MSD_ReadByte(); + /* Point to the next location where the byte read will be saved */ + pBuffer++; + } + /* Set next read address*/ + Offset += 512; + /* get CRC bytes (not really needed by us, but required by MSD) */ + MSD_ReadByte(); + MSD_ReadByte(); + /* Set response value to success */ + rvalue = MSD_RESPONSE_NO_ERROR; + } + else + { + /* Set response value to failure */ + rvalue = MSD_RESPONSE_FAILURE; + } + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + /* Returns the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_GetCSDRegister +* Description : Read the CSD card register. +* Reading the contents of the CSD register in SPI mode +* is a simple read-block transaction. +* Input : - MSD_csd: pointer on an SCD register structure +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd) +{ + u32 i = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + u8 CSD_Tab[16]; + + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD9 (CSD register) or CMD10(CSD register) */ + MSD_SendCmd(MSD_SEND_CSD, 0, 0xFF); + + /* Wait for response in the R1 format (0x00 is no errors) */ + if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) + { + for (i = 0; i < 16; i++) + { + /* Store CSD register value on CSD_Tab */ + CSD_Tab[i] = MSD_ReadByte(); + } + } + /* Get CRC bytes (not really needed by us, but required by MSD) */ + MSD_WriteByte(DUMMY); + MSD_WriteByte(DUMMY); + /* Set response value to success */ + rvalue = MSD_RESPONSE_NO_ERROR; + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + + /* Byte 0 */ + MSD_csd->CSDStruct = (CSD_Tab[0] & 0xC0) >> 6; + MSD_csd->SysSpecVersion = (CSD_Tab[0] & 0x3C) >> 2; + MSD_csd->Reserved1 = CSD_Tab[0] & 0x03; + /* Byte 1 */ + MSD_csd->TAAC = CSD_Tab[1] ; + /* Byte 2 */ + MSD_csd->NSAC = CSD_Tab[2]; + /* Byte 3 */ + MSD_csd->MaxBusClkFrec = CSD_Tab[3]; + /* Byte 4 */ + MSD_csd->CardComdClasses = CSD_Tab[4] << 4; + /* Byte 5 */ + MSD_csd->CardComdClasses |= (CSD_Tab[5] & 0xF0) >> 4; + MSD_csd->RdBlockLen = CSD_Tab[5] & 0x0F; + /* Byte 6 */ + MSD_csd->PartBlockRead = (CSD_Tab[6] & 0x80) >> 7; + MSD_csd->WrBlockMisalign = (CSD_Tab[6] & 0x40) >> 6; + MSD_csd->RdBlockMisalign = (CSD_Tab[6] & 0x20) >> 5; + MSD_csd->DSRImpl = (CSD_Tab[6] & 0x10) >> 4; + MSD_csd->Reserved2 = 0; /* Reserved */ + MSD_csd->DeviceSize = (CSD_Tab[6] & 0x03) << 10; + /* Byte 7 */ + MSD_csd->DeviceSize |= (CSD_Tab[7]) << 2; + /* Byte 8 */ + MSD_csd->DeviceSize |= (CSD_Tab[8] & 0xC0) >> 6; + MSD_csd->MaxRdCurrentVDDMin = (CSD_Tab[8] & 0x38) >> 3; + MSD_csd->MaxRdCurrentVDDMax = (CSD_Tab[8] & 0x07); + /* Byte 9 */ + MSD_csd->MaxWrCurrentVDDMin = (CSD_Tab[9] & 0xE0) >> 5; + MSD_csd->MaxWrCurrentVDDMax = (CSD_Tab[9] & 0x1C) >> 2; + MSD_csd->DeviceSizeMul = (CSD_Tab[9] & 0x03) << 1; + /* Byte 10 */ + MSD_csd->DeviceSizeMul |= (CSD_Tab[10] & 0x80) >> 7; + MSD_csd->EraseGrSize = (CSD_Tab[10] & 0x7C) >> 2; + MSD_csd->EraseGrMul = (CSD_Tab[10] & 0x03) << 3; + /* Byte 11 */ + MSD_csd->EraseGrMul |= (CSD_Tab[11] & 0xE0) >> 5; + MSD_csd->WrProtectGrSize = (CSD_Tab[11] & 0x1F); + /* Byte 12 */ + MSD_csd->WrProtectGrEnable = (CSD_Tab[12] & 0x80) >> 7; + MSD_csd->ManDeflECC = (CSD_Tab[12] & 0x60) >> 5; + MSD_csd->WrSpeedFact = (CSD_Tab[12] & 0x1C) >> 2; + MSD_csd->MaxWrBlockLen = (CSD_Tab[12] & 0x03) << 2; + /* Byte 13 */ + MSD_csd->MaxWrBlockLen |= (CSD_Tab[13] & 0xc0) >> 6; + MSD_csd->WriteBlockPaPartial = (CSD_Tab[13] & 0x20) >> 5; + MSD_csd->Reserved3 = 0; + MSD_csd->ContentProtectAppli = (CSD_Tab[13] & 0x01); + /* Byte 14 */ + MSD_csd->FileFormatGrouop = (CSD_Tab[14] & 0x80) >> 7; + MSD_csd->CopyFlag = (CSD_Tab[14] & 0x40) >> 6; + MSD_csd->PermWrProtect = (CSD_Tab[14] & 0x20) >> 5; + MSD_csd->TempWrProtect = (CSD_Tab[14] & 0x10) >> 4; + MSD_csd->FileFormat = (CSD_Tab[14] & 0x0C) >> 2; + MSD_csd->ECC = (CSD_Tab[14] & 0x03); + /* Byte 15 */ + MSD_csd->msd_CRC = (CSD_Tab[15] & 0xFE) >> 1; + MSD_csd->Reserved4 = 1; + + /* Return the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_GetCIDRegister +* Description : Read the CID card register. +* Reading the contents of the CID register in SPI mode +* is a simple read-block transaction. +* Input : - MSD_cid: pointer on an CID register structure +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid) +{ + u32 i = 0; + u8 rvalue = MSD_RESPONSE_FAILURE; + u8 CID_Tab[16]; + + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD10 (CID register) */ + MSD_SendCmd(MSD_SEND_CID, 0, 0xFF); + + /* Wait for response in the R1 format (0x00 is no errors) */ + if (!MSD_GetResponse(MSD_RESPONSE_NO_ERROR)) + { + if (!MSD_GetResponse(MSD_START_DATA_SINGLE_BLOCK_READ)) + { + /* Store CID register value on CID_Tab */ + for (i = 0; i < 16; i++) + { + CID_Tab[i] = MSD_ReadByte(); + } + } + /* Get CRC bytes (not really needed by us, but required by MSD) */ + MSD_WriteByte(DUMMY); + MSD_WriteByte(DUMMY); + /* Set response value to success */ + rvalue = MSD_RESPONSE_NO_ERROR; + } + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte: 8 Clock pulses of delay */ + MSD_WriteByte(DUMMY); + + /* Byte 0 */ + MSD_cid->ManufacturerID = CID_Tab[0]; + /* Byte 1 */ + MSD_cid->OEM_AppliID = CID_Tab[1] << 8; + /* Byte 2 */ + MSD_cid->OEM_AppliID |= CID_Tab[2]; + /* Byte 3 */ + MSD_cid->ProdName1 = CID_Tab[3] << 24; + /* Byte 4 */ + MSD_cid->ProdName1 |= CID_Tab[4] << 16; + /* Byte 5 */ + MSD_cid->ProdName1 |= CID_Tab[5] << 8; + /* Byte 6 */ + MSD_cid->ProdName1 |= CID_Tab[6]; + /* Byte 7 */ + MSD_cid->ProdName2 = CID_Tab[7]; + /* Byte 8 */ + MSD_cid->ProdRev = CID_Tab[8]; + /* Byte 9 */ + MSD_cid->ProdSN = CID_Tab[9] << 24; + /* Byte 10 */ + MSD_cid->ProdSN |= CID_Tab[10] << 16; + /* Byte 11 */ + MSD_cid->ProdSN |= CID_Tab[11] << 8; + /* Byte 12 */ + MSD_cid->ProdSN |= CID_Tab[12]; + /* Byte 13 */ + MSD_cid->Reserved1 |= (CID_Tab[13] & 0xF0) >> 4; + /* Byte 14 */ + MSD_cid->ManufactDate = (CID_Tab[13] & 0x0F) << 8; + /* Byte 15 */ + MSD_cid->ManufactDate |= CID_Tab[14]; + /* Byte 16 */ + MSD_cid->msd_CRC = (CID_Tab[15] & 0xFE) >> 1; + MSD_cid->Reserved2 = 1; + + /* Return the reponse */ + return rvalue; +} + +/******************************************************************************* +* Function Name : MSD_SendCmd +* Description : Send 5 bytes command to the MSD card. +* Input : - Cmd: the user expected command to send to MSD card +* - Arg: the command argument +* - Crc: the CRC +* Output : None +* Return : None +*******************************************************************************/ +void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc) +{ + u32 i = 0x00; + u8 Frame[6]; + + /* Construct byte1 */ + Frame[0] = (Cmd | 0x40); + /* Construct byte2 */ + Frame[1] = (u8)(Arg >> 24); + /* Construct byte3 */ + Frame[2] = (u8)(Arg >> 16); + /* Construct byte4 */ + Frame[3] = (u8)(Arg >> 8); + /* Construct byte5 */ + Frame[4] = (u8)(Arg); + /* Construct CRC: byte6 */ + Frame[5] = (Crc); + + /* Send the Cmd bytes */ + for (i = 0; i < 6; i++) + { + MSD_WriteByte(Frame[i]); + } +} + +/******************************************************************************* +* Function Name : MSD_GetDataResponse +* Description : Get MSD card data response. +* Input : None +* Output : None +* Return : The MSD status: Read data response xxx01 +* - status 010: Data accecpted +* - status 101: Data rejected due to a crc error +* - status 110: Data rejected due to a Write error. +* - status 111: Data rejected due to other error. +*******************************************************************************/ +u8 MSD_GetDataResponse(void) +{ + u32 i = 0; + u8 response, rvalue; + + while (i <= 64) + { + /* Read resonse */ + response = MSD_ReadByte(); + /* Mask unused bits */ + response &= 0x1F; + + switch (response) + { + case MSD_DATA_OK: + { + rvalue = MSD_DATA_OK; + break; + } + + case MSD_DATA_CRC_ERROR: + return MSD_DATA_CRC_ERROR; + + case MSD_DATA_WRITE_ERROR: + return MSD_DATA_WRITE_ERROR; + + default: + { + rvalue = MSD_DATA_OTHER_ERROR; + break; + } + } + /* Exit loop in case of data ok */ + if (rvalue == MSD_DATA_OK) + break; + /* Increment loop counter */ + i++; + } + /* Wait null data */ + while (MSD_ReadByte() == 0); + /* Return response */ + return response; +} + +/******************************************************************************* +* Function Name : MSD_GetResponse +* Description : Returns the MSD response. +* Input : None +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_GetResponse(u8 Response) +{ + u32 Count = 0xFFF; + + /* Check if response is got or a timeout is happen */ + while ((MSD_ReadByte() != Response) && Count) + { + Count--; + } + + if (Count == 0) + { + /* After time out */ + return MSD_RESPONSE_FAILURE; + } + else + { + /* Right response got */ + return MSD_RESPONSE_NO_ERROR; + } +} + +/******************************************************************************* +* Function Name : MSD_GetStatus +* Description : Returns the MSD status. +* Input : None +* Output : None +* Return : The MSD status. +*******************************************************************************/ +u16 MSD_GetStatus(void) +{ + u16 Status = 0; + + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD13 (MSD_SEND_STATUS) to get MSD status */ + MSD_SendCmd(MSD_SEND_STATUS, 0, 0xFF); + + Status = MSD_ReadByte(); + Status |= (u16)(MSD_ReadByte() << 8); + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte 0xFF */ + MSD_WriteByte(DUMMY); + + return Status; +} + +/******************************************************************************* +* Function Name : MSD_GoIdleState +* Description : Put MSD in Idle state. +* Input : None +* Output : None +* Return : The MSD Response: - MSD_RESPONSE_FAILURE: Sequence failed +* - MSD_RESPONSE_NO_ERROR: Sequence succeed +*******************************************************************************/ +u8 MSD_GoIdleState(void) +{ + /* MSD chip select low */ + MSD_CS_LOW(); + /* Send CMD0 (GO_IDLE_STATE) to put MSD in SPI mode */ + MSD_SendCmd(MSD_GO_IDLE_STATE, 0, 0x95); + + /* Wait for In Idle State Response (R1 Format) equal to 0x01 */ + if (MSD_GetResponse(MSD_IN_IDLE_STATE)) + { + /* No Idle State Response: return response failue */ + return MSD_RESPONSE_FAILURE; + } + /*----------Activates the card initialization process-----------*/ + do + { + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send Dummy byte 0xFF */ + MSD_WriteByte(DUMMY); + + /* MSD chip select low */ + MSD_CS_LOW(); + + /* Send CMD1 (Activates the card process) until response equal to 0x0 */ + MSD_SendCmd(MSD_SEND_OP_COND, 0, 0xFF); + /* Wait for no error Response (R1 Format) equal to 0x00 */ + } + while (MSD_GetResponse(MSD_RESPONSE_NO_ERROR)); + + /* MSD chip select high */ + MSD_CS_HIGH(); + /* Send dummy byte 0xFF */ + MSD_WriteByte(DUMMY); + + return MSD_RESPONSE_NO_ERROR; +} + +/******************************************************************************* +* Function Name : MSD_WriteByte +* Description : Write a byte on the MSD. +* Input : Data: byte to send. +* Output : None +* Return : None. +*******************************************************************************/ +void MSD_WriteByte(u8 Data) +{ + /* Wait until the transmit buffer is empty */ + while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_TXE) == RESET); + /* Send the byte */ + SPI_I2S_SendData(MSD_SPI, Data); +} + +/******************************************************************************* +* Function Name : MSD_ReadByte +* Description : Read a byte from the MSD. +* Input : None. +* Output : None +* Return : The received byte. +*******************************************************************************/ +u8 MSD_ReadByte(void) +{ + u8 Data = 0; + + /* Wait until the transmit buffer is empty */ + while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_TXE) == RESET); + /* Send the byte */ + SPI_I2S_SendData(MSD_SPI, DUMMY); + + /* Wait until a data is received */ + while (SPI_I2S_GetFlagStatus(MSD_SPI, SPI_I2S_FLAG_RXNE) == RESET); + /* Get the received data */ + Data = SPI_I2S_ReceiveData(MSD_SPI); + + /* Return the shifted data */ + return Data; +} + +/******************************************************************************* +* Function Name : SPI_Config +* Description : Initializes the SPI and CS pins. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SPI_Config(void) +{ + uint32_t delay; + GPIO_InitTypeDef GPIO_InitStructure; + SPI_InitTypeDef SPI_InitStructure; + + /* GPIOC Periph clock enable */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); + /* remap SPI3 */ + GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE); + + /* SPI Periph clock enable */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE); + + /* Configure SPI3 pins: SCK, MISO and MOSI */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* Configure PC7 pin: CS pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* SPI3 Config */ + SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStructure.SPI_Mode = SPI_Mode_Master; + SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; + SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; + SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; + SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; + SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; + SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; + SPI_InitStructure.SPI_CRCPolynomial = 7; + SPI_Init(MSD_SPI, &SPI_InitStructure); + + /* SPI enable */ + SPI_Cmd(MSD_SPI, ENABLE); + + for(delay = 0; delay < 0xfffff; delay++); +} + +/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ + +/* + * RT-Thread SD Card Driver + * 20090417 Bernard + */ +#include +#include + +static struct rt_device sdcard_device; +static struct dfs_partition part; +#define SECTOR_SIZE 512 + +/* RT-Thread Device Driver Interface */ +static rt_err_t rt_msd_init(rt_device_t dev) +{ + sMSD_CSD MSD_csd; + + MSD_GetCSDRegister(&MSD_csd); + + return RT_EOK; +} + +static rt_err_t rt_msd_open(rt_device_t dev, rt_uint16_t oflag) +{ + return RT_EOK; +} + +static rt_err_t rt_msd_close(rt_device_t dev) +{ + return RT_EOK; +} + +static rt_size_t rt_msd_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size) +{ + rt_uint8_t status; + rt_uint32_t i; + + status = MSD_RESPONSE_NO_ERROR; + // rt_kprintf("read: 0x%x, size %d\n", pos, size); + + /* read all sectors */ + for (i = 0; i < size / SECTOR_SIZE; i ++) + { + status = MSD_ReadBlock((rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE), + (part.offset + i)* SECTOR_SIZE + pos, + SECTOR_SIZE); + if (status != MSD_RESPONSE_NO_ERROR) + { + rt_kprintf("sd card read failed\n"); + return 0; + } + } + + if (status == MSD_RESPONSE_NO_ERROR) return size; + + rt_kprintf("read failed: %d\n", status); + return 0; +} + +static rt_size_t rt_msd_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size) +{ + rt_uint8_t status; + rt_uint32_t i; + + status = MSD_RESPONSE_NO_ERROR; + // rt_kprintf("write: 0x%x, size %d\n", pos, size); + + /* read all sectors */ + for (i = 0; i < size / SECTOR_SIZE; i ++) + { + status = MSD_WriteBuffer((rt_uint8_t*)((rt_uint8_t*)buffer + i * SECTOR_SIZE), + (part.offset + i)* SECTOR_SIZE + pos, + SECTOR_SIZE); + if (status != MSD_RESPONSE_NO_ERROR) + { + rt_kprintf("sd card write failed\n"); + return 0; + } + } + + if (status == MSD_RESPONSE_NO_ERROR) return size; + + rt_kprintf("write failed: %d\n", status); + return 0; +} + +static rt_err_t rt_msd_control(rt_device_t dev, rt_uint8_t cmd, void *args) +{ + return RT_EOK; +} + +void rt_hw_msd_init() +{ + if (MSD_Init() == MSD_RESPONSE_NO_ERROR) + { + rt_uint8_t status; + rt_uint8_t *sector; + + /* register sdcard device */ + sdcard_device.init = rt_msd_init; + sdcard_device.open = rt_msd_open; + sdcard_device.close = rt_msd_close; + sdcard_device.read = rt_msd_read; + sdcard_device.write = rt_msd_write; + sdcard_device.control = rt_msd_control; + + /* no private */ + sdcard_device.private = RT_NULL; + /* get the first sector to read partition table */ + sector = (rt_uint8_t*) rt_malloc (512); + if (sector == RT_NULL) + { + rt_kprintf("allocate partition sector buffer failed\n"); + return; + } + + status = MSD_ReadBlock(sector, 0, 512); + if (status == MSD_RESPONSE_NO_ERROR) + { + /* get the first partition */ + status = dfs_filesystem_get_partition(&part, sector, 0); + if (status != RT_EOK) + { + /* there is no partition table */ + part.offset = 0; + part.size = 0; + } + } + else + { + /* there is no partition table */ + part.offset = 0; + part.size = 0; + } + + /* release sector buffer */ + rt_free(sector); + + rt_device_register(&sdcard_device, "sd0", + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE); + } + else + { + rt_kprintf("sdcard init failed\n"); + } +} diff --git a/bsp/stm3210/project_107/msd.h b/bsp/stm3210/project_107/msd.h new file mode 100644 index 0000000000..66faeb5dc0 --- /dev/null +++ b/bsp/stm3210/project_107/msd.h @@ -0,0 +1,173 @@ +/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** +* File Name : msd.h +* Author : MCD Application Team +* Version : V2.1 +* Date : 05/30/2008 +* Description : Header for msd.c file. +******************************************************************************** +* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED +* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. +*******************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MSD_H +#define __MSD_H + +/* Includes ------------------------------------------------------------------*/ +#include + +/* Private define ------------------------------------------------------------*/ +/* Block Size */ +#define BLOCK_SIZE 512 + +/* Dummy byte */ +#define DUMMY 0xFF + +/* Start Data tokens */ +/* Tokens (necessary because at nop/idle (and CS active) only 0xff is on the data/command line) */ +#define MSD_START_DATA_SINGLE_BLOCK_READ 0xFE /* Data token start byte, Start Single Block Read */ +#define MSD_START_DATA_MULTIPLE_BLOCK_READ 0xFE /* Data token start byte, Start Multiple Block Read */ +#define MSD_START_DATA_SINGLE_BLOCK_WRITE 0xFE /* Data token start byte, Start Single Block Write */ +#define MSD_START_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data token start byte, Start Multiple Block Write */ +#define MSD_STOP_DATA_MULTIPLE_BLOCK_WRITE 0xFD /* Data toke stop byte, Stop Multiple Block Write */ + +/* MSD functions return */ +#define MSD_SUCCESS 0x00 +#define MSD_FAIL 0xFF + +/* MSD reponses and error flags */ +#define MSD_RESPONSE_NO_ERROR 0x00 +#define MSD_IN_IDLE_STATE 0x01 +#define MSD_ERASE_RESET 0x02 +#define MSD_ILLEGAL_COMMAND 0x04 +#define MSD_COM_CRC_ERROR 0x08 +#define MSD_ERASE_SEQUENCE_ERROR 0x10 +#define MSD_ADDRESS_ERROR 0x20 +#define MSD_PARAMETER_ERROR 0x40 +#define MSD_RESPONSE_FAILURE 0xFF + +/* Data response error */ +#define MSD_DATA_OK 0x05 +#define MSD_DATA_CRC_ERROR 0x0B +#define MSD_DATA_WRITE_ERROR 0x0D +#define MSD_DATA_OTHER_ERROR 0xFF + +/* Commands: CMDxx = CMD-number | 0x40 */ +#define MSD_GO_IDLE_STATE 0 /* CMD0=0x40 */ +#define MSD_SEND_OP_COND 1 /* CMD1=0x41 */ +#define MSD_SEND_CSD 9 /* CMD9=0x49 */ +#define MSD_SEND_CID 10 /* CMD10=0x4A */ +#define MSD_STOP_TRANSMISSION 12 /* CMD12=0x4C */ +#define MSD_SEND_STATUS 13 /* CMD13=0x4D */ +#define MSD_SET_BLOCKLEN 16 /* CMD16=0x50 */ +#define MSD_READ_SINGLE_BLOCK 17 /* CMD17=0x51 */ +#define MSD_READ_MULTIPLE_BLOCK 18 /* CMD18=0x52 */ +#define MSD_SET_BLOCK_COUNT 23 /* CMD23=0x57 */ +#define MSD_WRITE_BLOCK 24 /* CMD24=0x58 */ +#define MSD_WRITE_MULTIPLE_BLOCK 25 /* CMD25=0x59 */ +#define MSD_PROGRAM_CSD 27 /* CMD27=0x5B */ +#define MSD_SET_WRITE_PROT 28 /* CMD28=0x5C */ +#define MSD_CLR_WRITE_PROT 29 /* CMD29=0x5D */ +#define MSD_SEND_WRITE_PROT 30 /* CMD30=0x5E */ +#define MSD_TAG_SECTOR_START 32 /* CMD32=0x60 */ +#define MSD_TAG_SECTOR_END 33 /* CMD33=0x61 */ +#define MSD_UNTAG_SECTOR 34 /* CMD34=0x62 */ +#define MSD_TAG_ERASE_GROUP_START 35 /* CMD35=0x63 */ +#define MSD_TAG_ERASE_GROUP_END 36 /* CMD36=0x64 */ +#define MSD_UNTAG_ERASE_GROUP 37 /* CMD37=0x65 */ +#define MSD_ERASE 38 /* CMD38=0x66 */ +#define MSD_READ_OCR 39 /* CMD39=0x67 */ +#define MSD_CRC_ON_OFF 40 /* CMD40=0x68 */ + +/* Exported types ------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +typedef struct _MSD_CSD /*Card Specific Data*/ +{ + vu8 CSDStruct; /* CSD structure */ + vu8 SysSpecVersion; /* System specification version */ + vu8 Reserved1; /* Reserved */ + vu8 TAAC; /* Data read access-time 1 */ + vu8 NSAC; /* Data read access-time 2 in CLK cycles */ + vu8 MaxBusClkFrec; /* Max. bus clock frequency */ + vu16 CardComdClasses; /* Card command classes */ + vu8 RdBlockLen; /* Max. read data block length */ + vu8 PartBlockRead; /* Partial blocks for read allowed */ + vu8 WrBlockMisalign; /* Write block misalignment */ + vu8 RdBlockMisalign; /* Read block misalignment */ + vu8 DSRImpl; /* DSR implemented */ + vu8 Reserved2; /* Reserved */ + vu16 DeviceSize; /* Device Size */ + vu8 MaxRdCurrentVDDMin; /* Max. read current @ VDD min */ + vu8 MaxRdCurrentVDDMax; /* Max. read current @ VDD max */ + vu8 MaxWrCurrentVDDMin; /* Max. write current @ VDD min */ + vu8 MaxWrCurrentVDDMax; /* Max. write current @ VDD max */ + vu8 DeviceSizeMul; /* Device size multiplier */ + vu8 EraseGrSize; /* Erase group size */ + vu8 EraseGrMul; /* Erase group size multiplier */ + vu8 WrProtectGrSize; /* Write protect group size */ + vu8 WrProtectGrEnable; /* Write protect group enable */ + vu8 ManDeflECC; /* Manufacturer default ECC */ + vu8 WrSpeedFact; /* Write speed factor */ + vu8 MaxWrBlockLen; /* Max. write data block length */ + vu8 WriteBlockPaPartial; /* Partial blocks for write allowed */ + vu8 Reserved3; /* Reserded */ + vu8 ContentProtectAppli; /* Content protection application */ + vu8 FileFormatGrouop; /* File format group */ + vu8 CopyFlag; /* Copy flag (OTP) */ + vu8 PermWrProtect; /* Permanent write protection */ + vu8 TempWrProtect; /* Temporary write protection */ + vu8 FileFormat; /* File Format */ + vu8 ECC; /* ECC code */ + vu8 msd_CRC; /* CRC */ + vu8 Reserved4; /* always 1*/ +} +sMSD_CSD; + +typedef struct _MSD_CID /*Card Identification Data*/ +{ + vu8 ManufacturerID; /* ManufacturerID */ + vu16 OEM_AppliID; /* OEM/Application ID */ + vu32 ProdName1; /* Product Name part1 */ + vu8 ProdName2; /* Product Name part2*/ + vu8 ProdRev; /* Product Revision */ + vu32 ProdSN; /* Product Serial Number */ + vu8 Reserved1; /* Reserved1 */ + vu16 ManufactDate; /* Manufacturing Date */ + vu8 msd_CRC; /* CRC */ + vu8 Reserved2; /* always 1*/ +} +sMSD_CID; + +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +/*----- High layer function -----*/ +u8 MSD_Init(void); +u8 MSD_WriteBlock(u8* pBuffer, u32 WriteAddr, u16 NumByteToWrite); +u8 MSD_ReadBlock(u8* pBuffer, u32 ReadAddr, u16 NumByteToRead); +u8 MSD_WriteBuffer(u8* pBuffer, u32 WriteAddr, u32 NumByteToWrite); +u8 MSD_ReadBuffer(u8* pBuffer, u32 ReadAddr, u32 NumByteToRead); +u8 MSD_GetCSDRegister(sMSD_CSD* MSD_csd); +u8 MSD_GetCIDRegister(sMSD_CID* MSD_cid); + +/*----- Medium layer function -----*/ +void MSD_SendCmd(u8 Cmd, u32 Arg, u8 Crc); +u8 MSD_GetResponse(u8 Response); +u8 MSD_GetDataResponse(void); +u8 MSD_GoIdleState(void); +u16 MSD_GetStatus(void); + +/*----- Low layer function -----*/ +void MSD_WriteByte(u8 byte); +u8 MSD_ReadByte(void); + +#endif /* __MSD_H */ + +/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm3210/project_107/project.ewd b/bsp/stm3210/project_107/project.ewd new file mode 100644 index 0000000000..bc0e83e56e --- /dev/null +++ b/bsp/stm3210/project_107/project.ewd @@ -0,0 +1,1299 @@ + + + + 2 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 18 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + ANGEL_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IARROM_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + JLINK_ID + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 1 + 1 + 1 + + + + + + + + MACRAIGOR_ID + 2 + + 3 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + RDI_ID + 2 + + 1 + 1 + 1 + + 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$PROJ_DIR$\Libraries\CMSIS\Core\CM3\core_cm3.c + + + $PROJ_DIR$\Libraries\CMSIS\Core\CM3\system_stm32f10x.c + + + + Filesystem + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_cache.c + + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_fs.c + + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_init.c + + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_posix.c + + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_raw.c + + + $PROJ_DIR$\..\..\filesystem\dfs\src\dfs_util.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c + + + $PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c + + + + finsh + + $PROJ_DIR$\..\..\finsh\cmd.c + + + $PROJ_DIR$\..\..\finsh\finsh_compiler.c + + + $PROJ_DIR$\..\..\finsh\finsh_error.c + + + $PROJ_DIR$\..\..\finsh\finsh_heap.c + + + $PROJ_DIR$\..\..\finsh\finsh_init.c + + + $PROJ_DIR$\..\..\finsh\finsh_node.c + + + $PROJ_DIR$\..\..\finsh\finsh_ops.c + + + $PROJ_DIR$\..\..\finsh\finsh_parser.c + + + $PROJ_DIR$\..\..\finsh\finsh_token.c + + + $PROJ_DIR$\..\..\finsh\finsh_var.c + + + $PROJ_DIR$\..\..\finsh\finsh_vm.c + + + $PROJ_DIR$\..\..\finsh\shell.c + + + $PROJ_DIR$\..\..\finsh\symbol.c + + + + Kernel + + $PROJ_DIR$\..\..\src\clock.c + + + $PROJ_DIR$\..\..\src\device.c + + + $PROJ_DIR$\..\..\src\idle.c + + + $PROJ_DIR$\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\src\irq.c + + + $PROJ_DIR$\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\src\mem.c + + + $PROJ_DIR$\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\src\object.c + + + $PROJ_DIR$\..\..\src\scheduler.c + + + $PROJ_DIR$\..\..\src\slab.c + + + $PROJ_DIR$\..\..\src\thread.c + + + $PROJ_DIR$\..\..\src\timer.c + + + + LwIP + + $PROJ_DIR$\..\..\net\lwip\src\api\api_lib.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\api_msg.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\autoip.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\dhcp.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\dns.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\err.c + + + $PROJ_DIR$\..\..\net\lwip\src\netif\etharp.c + + + $PROJ_DIR$\..\..\net\lwip\src\netif\ethernetif.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\icmp.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\igmp.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet_chksum.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\init.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_addr.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_frag.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\memp_tiny.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\netbuf.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\netdb.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\netif.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\netifapi.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\pbuf.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\raw.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\sockets.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\stats.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\sys.c + + + $PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch.c + + + $PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch_init.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\tcp.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\tcp_in.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\tcp_out.c + + + $PROJ_DIR$\..\..\net\lwip\src\api\tcpip.c + + + $PROJ_DIR$\..\..\net\lwip\src\core\udp.c + + + + Startup + + $PROJ_DIR$\application.c + + + $PROJ_DIR$\board.c + + + $PROJ_DIR$\board.h + + + $PROJ_DIR$\led.c + + + $PROJ_DIR$\msd.c + + + $PROJ_DIR$\rtc.c + + + $PROJ_DIR$\rtconfig.h + + + $PROJ_DIR$\startup.c + + + $PROJ_DIR$\stm32_eth.c + + + $PROJ_DIR$\stm32f10x_it.c + + + $PROJ_DIR$\usart.c + + + + StdPeriph_Driver + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c + + + $PROJ_DIR$\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c + + + + STM32 + + $PROJ_DIR$\..\..\libcpu\arm\stm32\context_iar.S + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\cpu.c + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\fault.c + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\fault_iar.S + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\interrupt.c + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\serial.c + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\stack.c + + + $PROJ_DIR$\..\..\libcpu\arm\stm32\start_iar.s + + + + + diff --git a/bsp/stm3210/project_107/project.eww b/bsp/stm3210/project_107/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm3210/project_107/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm3210/project_107/rtconfig.h b/bsp/stm3210/project_107/rtconfig.h index 9751c32384..bac80d2558 100644 --- a/bsp/stm3210/project_107/rtconfig.h +++ b/bsp/stm3210/project_107/rtconfig.h @@ -1,113 +1,121 @@ -/* RT-Thread config file */ -#ifndef __RTTHREAD_CFG_H__ -#define __RTTHREAD_CFG_H__ - -/* RT_NAME_MAX*/ -#define RT_NAME_MAX 8 - -/* RT_ALIGN_SIZE*/ -#define RT_ALIGN_SIZE 4 - -/* PRIORITY_MAX */ -#define RT_THREAD_PRIORITY_MAX 32 - -/* Tick per Second */ -#define RT_TICK_PER_SECOND 100 - -/* SECTION: RT_DEBUG */ -/* Thread Debug */ -#define RT_DEBUG -#define RT_THREAD_DEBUG - -#define RT_USING_OVERFLOW_CHECK - -/* Using Hook */ -#define RT_USING_HOOK - -/* SECTION: IPC */ -/* Using Semaphore*/ -#define RT_USING_SEMAPHORE - -/* Using Mutex */ -#define RT_USING_MUTEX - -/* Using Event */ -#define RT_USING_EVENT - -/* Using MailBox */ -#define RT_USING_MAILBOX - -/* Using Message Queue */ -#define RT_USING_MESSAGEQUEUE - -/* SECTION: Memory Management */ -/* Using Memory Pool Management*/ -#define RT_USING_MEMPOOL - -/* Using Dynamic Heap Management */ -#define RT_USING_HEAP - -/* Using Small MM */ -#define RT_USING_SMALL_MEM - -/* SECTION: Device System */ -/* Using Device System */ -#define RT_USING_DEVICE -#define RT_USING_UART1 -#define RT_USING_UART2 - -/* SECTION: Console options */ -/* the buffer size of console*/ +/* RT-Thread config file */ +#ifndef __RTTHREAD_CFG_H__ +#define __RTTHREAD_CFG_H__ + +/* RT_NAME_MAX*/ +#define RT_NAME_MAX 8 + +/* RT_ALIGN_SIZE*/ +#define RT_ALIGN_SIZE 4 + +/* PRIORITY_MAX */ +#define RT_THREAD_PRIORITY_MAX 32 + +/* Tick per Second */ +#define RT_TICK_PER_SECOND 100 + +/* SECTION: RT_DEBUG */ +/* Thread Debug */ +#define RT_DEBUG +#define RT_THREAD_DEBUG + +#define RT_USING_OVERFLOW_CHECK + +/* Using Hook */ +#define RT_USING_HOOK + +/* SECTION: IPC */ +/* Using Semaphore*/ +#define RT_USING_SEMAPHORE + +/* Using Mutex */ +#define RT_USING_MUTEX + +/* Using Event */ +#define RT_USING_EVENT + +/* Using MailBox */ +#define RT_USING_MAILBOX + +/* Using Message Queue */ +#define RT_USING_MESSAGEQUEUE + +/* SECTION: Memory Management */ +/* Using Memory Pool Management*/ +#define RT_USING_MEMPOOL + +/* Using Dynamic Heap Management */ +#define RT_USING_HEAP + +/* Using Small MM */ +#define RT_USING_SMALL_MEM + +/* SECTION: Device System */ +/* Using Device System */ +#define RT_USING_DEVICE +#define RT_USING_UART1 + +/* SECTION: Console options */ +/* the buffer size of console*/ #define RT_CONSOLEBUF_SIZE 128 -/* SECTION: finsh shell */ +/* SECTION: finsh, a C-Express shell */ #define RT_USING_FINSH /* Using symbol table */ #define FINSH_USING_SYMTAB #define FINSH_USING_DESCRIPTION -#define FINSH_DEVICE_NAME "uart2" +#define FINSH_DEVICE_NAME "uart1" -/* SECTION: lwip, a lighwight TCP/IP protocol stack */ +/* SECTION: device filesystem */ +#define RT_USING_DFS +/* the max number of mounted filesystem */ +#define DFS_FILESYSTEMS_MAX 2 +/* the max number of opened files */ +#define DFS_FD_MAX 4 +/* the max number of cached sector */ +#define DFS_CACHE_MAX_NUM 4 + +/* SECTION: lwip, a lighwight TCP/IP protocol stack */ #define RT_USING_LWIP - -/* Enable ICMP protocol*/ -#define RT_LWIP_ICMP -/* Enable UDP protocol*/ -#define RT_LWIP_UDP -/* Enable TCP protocol*/ + +/* Enable ICMP protocol*/ +#define RT_LWIP_ICMP +/* Enable UDP protocol*/ +#define RT_LWIP_UDP +/* Enable TCP protocol*/ #define RT_LWIP_TCP -/* Enable DNS */ +/* Enable DNS */ #define RT_LWIP_DNS - -/* the number of simulatenously active TCP connections*/ + +/* the number of simulatenously active TCP connections*/ #define RT_LWIP_TCP_PCB_NUM 5 - -/* ip address of target*/ -#define RT_LWIP_IPADDR0 192 -#define RT_LWIP_IPADDR1 168 -#define RT_LWIP_IPADDR2 1 -#define RT_LWIP_IPADDR3 30 - -/* gateway address of target*/ -#define RT_LWIP_GWADDR0 192 -#define RT_LWIP_GWADDR1 168 -#define RT_LWIP_GWADDR2 1 -#define RT_LWIP_GWADDR3 1 - -/* mask address of target*/ -#define RT_LWIP_MSKADDR0 255 -#define RT_LWIP_MSKADDR1 255 -#define RT_LWIP_MSKADDR2 255 -#define RT_LWIP_MSKADDR3 0 - -/* tcp thread options */ -#define RT_LWIP_TCPTHREAD_PRIORITY 12 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4 -#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 - -/* ethernet if thread options */ -#define RT_LWIP_ETHTHREAD_PRIORITY 15 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4 -#define RT_LWIP_ETHTHREAD_STACKSIZE 512 - -#endif + +/* ip address of target*/ +#define RT_LWIP_IPADDR0 192 +#define RT_LWIP_IPADDR1 168 +#define RT_LWIP_IPADDR2 1 +#define RT_LWIP_IPADDR3 30 + +/* gateway address of target*/ +#define RT_LWIP_GWADDR0 192 +#define RT_LWIP_GWADDR1 168 +#define RT_LWIP_GWADDR2 1 +#define RT_LWIP_GWADDR3 1 + +/* mask address of target*/ +#define RT_LWIP_MSKADDR0 255 +#define RT_LWIP_MSKADDR1 255 +#define RT_LWIP_MSKADDR2 255 +#define RT_LWIP_MSKADDR3 0 + +/* tcp thread options */ +#define RT_LWIP_TCPTHREAD_PRIORITY 12 +#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4 +#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 + +/* ethernet if thread options */ +#define RT_LWIP_ETHTHREAD_PRIORITY 15 +#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4 +#define RT_LWIP_ETHTHREAD_STACKSIZE 512 + +#endif diff --git a/bsp/stm3210/project_107/startup.c b/bsp/stm3210/project_107/startup.c index 6033d9bd8d..0ee8ddbde4 100644 --- a/bsp/stm3210/project_107/startup.c +++ b/bsp/stm3210/project_107/startup.c @@ -27,7 +27,7 @@ #ifdef RT_USING_LWIP #ifdef STM32F10X_CL - void rt_hw_stm32_eth_init(void); + extern void rt_hw_stm32_eth_init(void); #else #include "enc28j60.h" #endif @@ -40,6 +40,7 @@ extern void finsh_system_init(void); extern void finsh_set_device(const char* device); #endif +/* bss end definitions for heap init */ #ifdef __CC_ARM extern int Image$$RW_IRAM1$$ZI$$Limit; #elif __ICCARM__ @@ -109,7 +110,7 @@ void rtthread_startup(void) /* init hardware serial device */ rt_hw_usart_init(); -#ifdef RT_USINS_DFS +#ifdef RT_USING_DFS /* init sdcard driver */ #if STM32_USE_SDIO rt_hw_sdcard_init(); @@ -121,13 +122,13 @@ void rtthread_startup(void) #ifdef RT_USING_LWIP eth_system_device_init(); + /* register ethernetif device */ #ifdef STM32F10X_CL rt_hw_stm32_eth_init(); #else - /* register ethernetif device */ rt_hw_enc28j60_init(); #endif -#endif // end of RT_USING_LWIP +#endif rt_hw_rtc_init(); diff --git a/bsp/stm3210/project_107/stm32f10x_it.c b/bsp/stm3210/project_107/stm32f10x_it.c index 55bab1bac0..3b787c3a52 100644 --- a/bsp/stm3210/project_107/stm32f10x_it.c +++ b/bsp/stm3210/project_107/stm32f10x_it.c @@ -1,132 +1,131 @@ -/** - ****************************************************************************** - * @file Project/Template/stm32f10x_it.c - * @author MCD Application Team - * @version V3.1.0 - * @date 06/19/2009 - * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and - * peripherals interrupt service routine. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2009 STMicroelectronics

- */ - -/* Includes ------------------------------------------------------------------*/ +/** + ****************************************************************************** + * @file Project/Template/stm32f10x_it.c + * @author MCD Application Team + * @version V3.1.0 + * @date 06/19/2009 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and + * peripherals interrupt service routine. + ****************************************************************************** + * @copy + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2009 STMicroelectronics

+ */ + +/* Includes ------------------------------------------------------------------*/ #include "stm32f10x_it.h" -#include "stm32f10x_dma.h" - #include - -/** @addtogroup Template_Project - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************/ -/* Cortex-M3 Processor Exceptions Handlers */ -/******************************************************************************/ - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) -{ -} - -/** - * @brief This function handles Hard Fault exception. - * @param None - * @retval None - */ -void HardFault_Handler(void) -{ - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) -{ - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) -{ - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) -{ - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) -{ -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) -{ -} - -/******************************************************************************/ -/* STM32F10x Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f10x_xx.s). */ +#include "board.h" + +/** @addtogroup Template_Project + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + /******************************************************************************/ - +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + /******************************************************************************* * Function Name : DMA1_Channel2_IRQHandler * Description : This function handles DMA1 Channel 2 interrupt request. @@ -194,7 +193,7 @@ void USART1_IRQHandler(void) #ifdef RT_USING_UART1 extern struct rt_device uart1_device; extern void rt_hw_serial_isr(struct rt_device *device); - + /* enter interrupt */ rt_interrupt_enter(); @@ -251,6 +250,54 @@ void USART3_IRQHandler(void) #endif } +/******************************************************************************* +* Function Name : SDIO_IRQHandler +* Description : This function handles SDIO global interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SDIO_IRQHandler(void) +{ +#if defined(RT_USING_DFS) && STM32_USE_SDIO + extern int SD_ProcessIRQSrc(void); + + /* enter interrupt */ + rt_interrupt_enter(); + + /* Process All SDIO Interrupt Sources */ + SD_ProcessIRQSrc(); + + /* leave interrupt */ + rt_interrupt_leave(); +#endif +} + +/******************************************************************************* +* Function Name : EXTI0_IRQHandler +* Description : This function handles External interrupt Line 0 request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void EXTI0_IRQHandler(void) +{ +#if defined(RT_USING_LWIP) && !defined(STM32F10X_CL) + extern void enc28j60_isr(void); + + /* enter interrupt */ + rt_interrupt_enter(); + + enc28j60_isr(); + + /* Clear the Key Button EXTI line pending bit */ + EXTI_ClearITPendingBit(EXTI_Line0); + + /* leave interrupt */ + rt_interrupt_leave(); +#endif +} + /******************************************************************************* * Function Name : ETH_IRQHandler * Description : This function handles ETH interrupt request. @@ -260,7 +307,7 @@ void USART3_IRQHandler(void) *******************************************************************************/ void ETH_IRQHandler(void) { -#ifdef RT_USING_LWIP +#if defined(RT_USING_LWIP) && defined(STM32F10X_CL) extern void rt_hw_stm32_eth_isr(void); /* enter interrupt */ @@ -272,10 +319,10 @@ void ETH_IRQHandler(void) rt_interrupt_leave(); #endif } - -/** - * @} - */ - - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ + +/** + * @} + */ + + +/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm3210/project_107/stm32f10x_it.h b/bsp/stm3210/project_107/stm32f10x_it.h index d8c8961791..ad935ba382 100644 --- a/bsp/stm3210/project_107/stm32f10x_it.h +++ b/bsp/stm3210/project_107/stm32f10x_it.h @@ -1,53 +1,53 @@ -/** - ****************************************************************************** - * @file Project/Template/stm32f10x_it.h - * @author MCD Application Team - * @version V3.1.0 - * @date 06/19/2009 - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * @copy - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2009 STMicroelectronics

- */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_IT_H -#define __STM32F10x_IT_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_IT_H */ - -/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file Project/Template/stm32f10x_it.h + * @author MCD Application Team + * @version V3.1.0 + * @date 06/19/2009 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @copy + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2009 STMicroelectronics

+ */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/