diff --git a/bsp/nuvoton/README.md b/bsp/nuvoton/README.md index 7cbf783135..c4b93ed78a 100644 --- a/bsp/nuvoton/README.md +++ b/bsp/nuvoton/README.md @@ -14,3 +14,4 @@ Current supported BSP shown in below table: | NuMaker-M467HJ | CORTEX-M4 | [numaker-m467hj](numaker-m467hj) | | NuMaker-IoT-M467 | CORTEX-M4 | [numaker-iot-m467](numaker-iot-m467) | | NuMaker-HMI-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-hmi-ma35d1](numaker-hmi-ma35d1), [ma35-rtp](ma35-rtp) | +| NuMaker-IOT-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-iot-ma35d1](numaker-iot-ma35d1), [ma35-rtp](ma35-rtp) | diff --git a/bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c b/bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c index 22976c66fc..3ee2c2f85e 100644 --- a/bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c +++ b/bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c @@ -154,12 +154,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] = { PDMA_SPI9_TX, eMemCtl_SrcInc_DstFix }, { PDMA_SPI10_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2C0_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2C1_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2C2_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2C3_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2C4_TX, eMemCtl_SrcInc_DstFix }, - { PDMA_I2S0_TX, eMemCtl_SrcInc_DstFix }, { PDMA_I2S1_TX, eMemCtl_SrcInc_DstFix }, @@ -215,12 +209,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] = { PDMA_EPWM1_P2_RX, eMemCtl_SrcFix_DstInc }, { PDMA_EPWM1_P3_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2C0_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2C1_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2C2_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2C3_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2C4_RX, eMemCtl_SrcFix_DstInc }, - { PDMA_I2S0_RX, eMemCtl_SrcFix_DstInc }, { PDMA_I2S1_RX, eMemCtl_SrcFix_DstInc }, diff --git a/bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c b/bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c index 0df0ccb443..e7de46e186 100644 --- a/bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c +++ b/bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c @@ -67,15 +67,15 @@ void RTC_Open(S_RTC_TIME_DATA_T *sPt) { RTC->INIT = RTC_INIT_KEY; - if(RTC->INIT != RTC_INIT_ACTIVE_Msk) + if (RTC->INIT != RTC_INIT_ACTIVE_Msk) { RTC->INIT = RTC_INIT_KEY; - while(RTC->INIT != RTC_INIT_ACTIVE_Msk) + while (RTC->INIT != RTC_INIT_ACTIVE_Msk) { } } - if(sPt == 0) + if (sPt == 0) { } else @@ -110,14 +110,14 @@ void RTC_Close(void) void RTC_32KCalibration(int32_t i32FrequencyX10000) { uint64_t u64Compensate; - int32_t i32RegInt,i32RegFra ; + int32_t i32RegInt, i32RegFra ; - if(!(SYS->CSERVER & 0x1)) + if (!(SYS->CSERVER & 0x1)) { u64Compensate = (uint64_t)(0x2710000000000); u64Compensate = (uint64_t)(u64Compensate / (uint64_t)i32FrequencyX10000); - if(u64Compensate >= (uint64_t)0x400000) + if (u64Compensate >= (uint64_t)0x400000) { u64Compensate = (uint64_t)0x3FFFFF; } @@ -128,23 +128,23 @@ void RTC_32KCalibration(int32_t i32FrequencyX10000) else { /* Compute Integer and Fraction for RTC register*/ - i32RegInt = (i32FrequencyX10000/10000) - 32752; - i32RegFra = ((((i32FrequencyX10000%10000)) * 64) + 5000) / 10000; + i32RegInt = (i32FrequencyX10000 / 10000) - 32752; + i32RegFra = ((((i32FrequencyX10000 % 10000)) * 64) + 5000) / 10000; - if(i32RegFra >= 0x40) + if (i32RegFra >= 0x40) { i32RegFra = 0x0; i32RegInt++; } /* Judge Integer part is reasonable */ - if ( (i32RegInt < 0) | (i32RegInt > 31) ) + if ((i32RegInt < 0) | (i32RegInt > 31)) { return; } RTC_WaitAccessEnable(); - RTC->FREQADJ = (uint32_t)((i32RegInt<<8) | i32RegFra); + RTC->FREQADJ = (uint32_t)((i32RegInt << 8) | i32RegFra); } } @@ -204,13 +204,13 @@ void RTC_GetDateAndTime(S_RTC_TIME_DATA_T *sPt) sPt->u32Day = u32Tmp + g_u32loDay; /* Compute 12/24 hour */ - if(sPt->u32TimeScale == RTC_CLOCK_12) + if (sPt->u32TimeScale == RTC_CLOCK_12) { u32Tmp = (g_u32hiHour * 10ul); u32Tmp += g_u32loHour; sPt->u32Hour = u32Tmp; /* AM: 1~12. PM: 21~32. */ - if(sPt->u32Hour >= 21ul) + if (sPt->u32Hour >= 21ul) { sPt->u32AmPm = RTC_PM; sPt->u32Hour -= 20ul; @@ -301,13 +301,13 @@ void RTC_GetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt) sPt->u32Day = u32Tmp + g_u32loDay; /* Compute 12/24 hour */ - if(sPt->u32TimeScale == RTC_CLOCK_12) + if (sPt->u32TimeScale == RTC_CLOCK_12) { u32Tmp = (g_u32hiHour * 10ul); u32Tmp += g_u32loHour; sPt->u32Hour = u32Tmp; /* AM: 1~12. PM: 21~32. */ - if(sPt->u32Hour >= 21ul) + if (sPt->u32Hour >= 21ul) { sPt->u32AmPm = RTC_PM; sPt->u32Hour -= 20ul; @@ -366,7 +366,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt) { uint32_t u32RegCAL, u32RegTIME; - if(sPt == 0ul) + if (sPt == NULL) { } else @@ -375,14 +375,14 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt) /* Set RTC 24/12 hour setting and Day of the Week */ /*-----------------------------------------------------------------------------------------------------*/ RTC_WaitAccessEnable(); - if(sPt->u32TimeScale == RTC_CLOCK_12) + if (sPt->u32TimeScale == RTC_CLOCK_12) { RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk; /*-------------------------------------------------------------------------------------------------*/ /* Important, range of 12-hour PM mode is 21 up to 32 */ /*-------------------------------------------------------------------------------------------------*/ - if(sPt->u32AmPm == RTC_PM) + if (sPt->u32AmPm == RTC_PM) { sPt->u32Hour += 20ul; } @@ -447,7 +447,7 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt) { uint32_t u32RegCALM, u32RegTALM; - if(sPt == 0) + if (sPt == NULL) { } else @@ -456,14 +456,14 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt) /* Set RTC 24/12 hour setting and Day of the Week */ /*-----------------------------------------------------------------------------------------------------*/ RTC_WaitAccessEnable(); - if(sPt->u32TimeScale == RTC_CLOCK_12) + if (sPt->u32TimeScale == RTC_CLOCK_12) { RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk; /*-------------------------------------------------------------------------------------------------*/ /* Important, range of 12-hour PM mode is 21 up to 32 */ /*-------------------------------------------------------------------------------------------------*/ - if(sPt->u32AmPm == RTC_PM) + if (sPt->u32AmPm == RTC_PM) { sPt->u32Hour += 20ul; } @@ -549,7 +549,7 @@ void RTC_SetTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, uint3 uint32_t u32RegTIME; /* Important, range of 12-hour PM mode is 21 up to 32 */ - if((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM)) + if ((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM)) { u32Hour += 20ul; } @@ -565,7 +565,7 @@ void RTC_SetTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, uint3 /* Set RTC 24/12 hour setting and Day of the Week */ /*-----------------------------------------------------------------------------------------------------*/ RTC_WaitAccessEnable(); - if(u32TimeMode == RTC_CLOCK_12) + if (u32TimeMode == RTC_CLOCK_12) { RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk; } @@ -624,7 +624,7 @@ void RTC_SetAlarmTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, uint32_t u32RegTALM; /* Important, range of 12-hour PM mode is 21 up to 32 */ - if((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM)) + if ((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM)) { u32Hour += 20ul; } @@ -640,7 +640,7 @@ void RTC_SetAlarmTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, /* Set RTC 24/12 hour setting and Day of the Week */ /*-----------------------------------------------------------------------------------------------------*/ RTC_WaitAccessEnable(); - if(u32TimeMode == RTC_CLOCK_12) + if (u32TimeMode == RTC_CLOCK_12) { RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk; } @@ -861,15 +861,15 @@ void RTC_StaticTamperEnable(uint32_t u32TamperSelect, uint32_t u32DetecLevel, ui RTC_WaitAccessEnable(); u32Reg = RTC->TAMPCTL; - u32TmpReg = ( RTC_TAMPCTL_TAMP0EN_Msk | (u32DetecLevel << RTC_TAMPCTL_TAMP0LV_Pos) | - (u32DebounceEn << RTC_TAMPCTL_TAMP0DBEN_Pos) ); + u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | (u32DetecLevel << RTC_TAMPCTL_TAMP0LV_Pos) | + (u32DebounceEn << RTC_TAMPCTL_TAMP0DBEN_Pos)); - for(i = 0ul; i < MAX_TAMPER_PIN_NUM; i++) + for (i = 0ul; i < MAX_TAMPER_PIN_NUM; i++) { - if(u32TamperSelect & (0x1ul << i)) + if (u32TamperSelect & (0x1ul << i)) { - u32Reg &= ~((RTC_TAMPCTL_TAMP0EN_Msk|RTC_TAMPCTL_TAMP0LV_Msk|RTC_TAMPCTL_TAMP0DBEN_Msk) << (i*4ul)); - u32Reg |= (u32TmpReg << (i*4ul)); + u32Reg &= ~((RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP0LV_Msk | RTC_TAMPCTL_TAMP0DBEN_Msk) << (i * 4ul)); + u32Reg |= (u32TmpReg << (i * 4ul)); } } @@ -904,11 +904,11 @@ void RTC_StaticTamperDisable(uint32_t u32TamperSelect) u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk); - for(i = 0ul; i < MAX_TAMPER_PIN_NUM; i++) + for (i = 0ul; i < MAX_TAMPER_PIN_NUM; i++) { - if(u32TamperSelect & (0x1ul << i)) + if (u32TamperSelect & (0x1ul << i)) { - u32Reg &= ~(u32TmpReg << (i*4ul)); + u32Reg &= ~(u32TmpReg << (i * 4ul)); } } @@ -958,7 +958,7 @@ void RTC_DynamicTamperEnable(uint32_t u32PairSel, uint32_t u32DebounceEn, uint32 u32Reg &= ~(RTC_TAMPCTL_DYN1ISS_Msk | RTC_TAMPCTL_DYN2ISS_Msk); u32Reg |= ((u32Pair1Source & 0x1ul) << RTC_TAMPCTL_DYN1ISS_Pos) | ((u32Pair2Source & 0x1ul) << RTC_TAMPCTL_DYN2ISS_Pos); - if(u32DebounceEn) + if (u32DebounceEn) { u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk | RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk); @@ -968,22 +968,22 @@ void RTC_DynamicTamperEnable(uint32_t u32PairSel, uint32_t u32DebounceEn, uint32 u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk); } - for(i = 0ul; i < MAX_PAIR_NUM; i++) + for (i = 0ul; i < MAX_PAIR_NUM; i++) { - if(u32PairSel & (0x1ul << i)) + if (u32PairSel & (0x1ul << i)) { - u32Reg &= ~((RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk) << (i*8ul)); - u32Reg |= (u32TmpReg << (i*8ul)); + u32Reg &= ~((RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk) << (i * 8ul)); + u32Reg |= (u32TmpReg << (i * 8ul)); } } - if((u32Pair1Source) && (u32PairSel & RTC_PAIR1_SELECT)) + if ((u32Pair1Source) && (u32PairSel & RTC_PAIR1_SELECT)) { u32Reg &= ~RTC_TAMPCTL_TAMP2EN_Msk; u32Reg |= u32Tamper2Debounce; } - if((u32Pair2Source) && (u32PairSel & RTC_PAIR2_SELECT)) + if ((u32Pair2Source) && (u32PairSel & RTC_PAIR2_SELECT)) { u32Reg &= ~RTC_TAMPCTL_TAMP4EN_Msk; u32Reg |= u32Tamper4Debounce; @@ -1015,23 +1015,23 @@ void RTC_DynamicTamperDisable(uint32_t u32PairSel) RTC_WaitAccessEnable(); u32Reg = RTC->TAMPCTL; - if((u32Reg & RTC_TAMPCTL_DYN1ISS_Msk) && (u32PairSel & RTC_PAIR1_SELECT)) + if ((u32Reg & RTC_TAMPCTL_DYN1ISS_Msk) && (u32PairSel & RTC_PAIR1_SELECT)) { u32Tamper2En = u32Reg & RTC_TAMPCTL_TAMP2EN_Msk; } - if((u32Reg & RTC_TAMPCTL_DYN2ISS_Msk) && (u32PairSel & RTC_PAIR2_SELECT)) + if ((u32Reg & RTC_TAMPCTL_DYN2ISS_Msk) && (u32PairSel & RTC_PAIR2_SELECT)) { u32Tamper4En = u32Reg & RTC_TAMPCTL_TAMP4EN_Msk; } u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk); - for(i = 0ul; i < MAX_PAIR_NUM; i++) + for (i = 0ul; i < MAX_PAIR_NUM; i++) { - if(u32PairSel & (0x1ul << i)) + if (u32PairSel & (0x1ul << i)) { - u32Reg &= ~(u32TmpReg << ((i*8ul))); + u32Reg &= ~(u32TmpReg << ((i * 8ul))); } } diff --git a/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/ma35d1.h b/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/ma35d1.h index 0481d1ee39..695a97d68c 100644 --- a/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/ma35d1.h +++ b/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/ma35d1.h @@ -239,9 +239,9 @@ typedef enum IRQn /****** Platform Exceptions Numbers ***************************************************/ LVD_IRQn = 32, /*!< Low Voltage detection Interrupt */ A35PMU_IRQn = 33, /*!< A35 PMU Interrupt */ - HSEM_IRQn = 34, /*!< Hardware Semaphore Interrupt */ + HWSEM0_IRQn = 34, /*!< Hardware Semaphore Interrupt */ CKFAIL_IRQn = 35, /*!< Clock failed Interrupt */ - WRHO_IRQn = 36, /*!< Wormhole Interrupt */ + WHC0_IRQn = 36, /*!< Wormhole Interrupt */ RTC_IRQn = 37, /*!< Real Time Clock Interrupt */ TAMPER_IRQn = 38, /*!< Tamper detection Interrupt */ WDT0_IRQn = 39, /*!< Watchdog timer 0 Interrupt */ @@ -266,7 +266,7 @@ typedef enum IRQn SSPCC_IRQn = 58, /*!< SSPCC Interrupt */ GFX_IRQn = 59, /*!< GFX GC520L Interrupt (Graphic Engine) */ VDE_IRQn = 60, /*!< Video Decoder (VC8000) Interrupt */ - WRHO1_IRQn = 61, /*!< WRHO 1 Interrupt */ + WHC1_IRQn = 61, /*!< WRHO 1 Interrupt */ SDH0_IRQn = 62, /*!< SDH 0 Interrupt */ SDH1_IRQn = 63, /*!< SDH 1 Interrupt */ HSUSBD_IRQn = 64, /*!< USB 2.0 High-Speed Device Interrupt */ @@ -468,6 +468,7 @@ typedef enum IRQn #include "sdh_reg.h" #include "ccap_reg.h" +#include "nfi_reg.h" /** @addtogroup PERIPHERAL_MEM_MAP Peripheral Memory Base Memory Mapped Structure for Peripherals @@ -781,6 +782,7 @@ typedef enum IRQn #define CCAP0 ((CCAP_T*) CCAP0_BASE) #define CCAP1 ((CCAP_T*) CCAP1_BASE) +#define NFI ((NFI_T*) NAND_BASE) /*@}*/ /* end of group ERIPHERAL_DECLARATION */ /** @addtogroup IO_ROUTINE I/O Routines diff --git a/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/nfi_reg.h b/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/nfi_reg.h index de1320210c..25477915bd 100644 --- a/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/nfi_reg.h +++ b/bsp/nuvoton/libraries/ma35/Device/Nuvoton/MA35D1/Include/nfi_reg.h @@ -1803,50 +1803,27 @@ typedef struct * |[31:0] |Data |NAND Flash Redundant Area Word n * | | |This field indicates a 32-bit data of redundant area. */ - __IO uint32_t BUFFER0; /*!< [0x0000] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER1; /*!< [0x0004] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER2; /*!< [0x0008] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER3; /*!< [0x000c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER4; /*!< [0x0010] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER5; /*!< [0x0014] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER6; /*!< [0x0018] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER7; /*!< [0x001c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER8; /*!< [0x0020] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER9; /*!< [0x0024] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER10; /*!< [0x0028] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER11; /*!< [0x002c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER12; /*!< [0x0030] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER13; /*!< [0x0034] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER14; /*!< [0x0038] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER15; /*!< [0x003c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER16; /*!< [0x0040] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER17; /*!< [0x0044] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER18; /*!< [0x0048] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER19; /*!< [0x004c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER20; /*!< [0x0050] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER21; /*!< [0x0054] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER22; /*!< [0x0058] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER23; /*!< [0x005c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER24; /*!< [0x0060] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER25; /*!< [0x0064] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER26; /*!< [0x0068] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER27; /*!< [0x006c] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER28; /*!< [0x0070] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER29; /*!< [0x0074] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER30; /*!< [0x0078] NFI Embedded Buffer Word n */ - __IO uint32_t BUFFER31; /*!< [0x007c] NFI Embedded Buffer Word n */ - __I uint32_t RESERVE0[224]; + __IO uint32_t BUFFER[32]; /*!< [0x0000] NFI Embedded Buffer Word n */ + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE0[224]; /*!< [0x0080~0x03FC] */ + /** @endcond */ __IO uint32_t DMACTL; /*!< [0x0400] NFI DMA Control and Status Register */ - __I uint32_t RESERVE1[1]; + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE1[1]; /*!< [0x0404] */ + /** @endcond */ __IO uint32_t DMASA; /*!< [0x0408] NFI DMA Transfer Starting Address Register */ __I uint32_t DMABCNT; /*!< [0x040c] NFI DMA Transfer Byte Count Register */ __IO uint32_t DMAINTEN; /*!< [0x0410] NFI DMA Interrupt Enable Control Register */ __I uint32_t DMAINTSTS; /*!< [0x0414] NFI DMA Interrupt Status Register */ - __I uint32_t RESERVE2[250]; + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE2[250]; /*!< [0x0418~0x07FC] */ + /** @endcond */ __IO uint32_t GCTL; /*!< [0x0800] NFI Global Control and Status Register */ __IO uint32_t GINTEN; /*!< [0x0804] NFI Global Interrupt Control Register */ __I uint32_t GINTSTS; /*!< [0x0808] NFI Global Interrupt Status Register */ - __I uint32_t RESERVE3[37]; + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE3[37]; /*!< [0x080C~0x089C] */ + /** @endcond */ __IO uint32_t NANDCTL; /*!< [0x08a0] NAND Flash Control Register */ __IO uint32_t NANDTMCTL; /*!< [0x08a4] NAND Flash Timing Control Register */ __IO uint32_t NANDINTEN; /*!< [0x08a8] NAND Flash Interrupt Enable Register */ @@ -1856,151 +1833,22 @@ typedef struct __IO uint32_t NANDDATA; /*!< [0x08b8] NAND Flash Data Port Register */ __IO uint32_t NANDRACTL; /*!< [0x08bc] NAND Flash Redundant Area Control Register */ __IO uint32_t NANDECTL; /*!< [0x08c0] NAND Flash Extend Control Register */ - __I uint32_t RESERVE4[3]; - __I uint32_t NANDECCES0; /*!< [0x08d0] NAND Flash ECC Error Status 0 Register */ - __I uint32_t NANDECCES1; /*!< [0x08d4] NAND Flash ECC Error Status 1 Register */ - __I uint32_t NANDECCES2; /*!< [0x08d8] NAND Flash ECC Error Status 2 Register */ - __I uint32_t NANDECCES3; /*!< [0x08dc] NAND Flash ECC Error Status 3 Register */ - __I uint32_t RESERVE5[8]; - __I uint32_t NANDECCEA0; /*!< [0x0900] NAND Flash ECC Error Byte Address 0 Register */ - __I uint32_t NANDECCEA1; /*!< [0x0904] NAND Flash ECC Error Byte Address 1 Register */ - __I uint32_t NANDECCEA2; /*!< [0x0908] NAND Flash ECC Error Byte Address 2 Register */ - __I uint32_t NANDECCEA3; /*!< [0x090c] NAND Flash ECC Error Byte Address 3 Register */ - __I uint32_t NANDECCEA4; /*!< [0x0910] NAND Flash ECC Error Byte Address 4 Register */ - __I uint32_t NANDECCEA5; /*!< [0x0914] NAND Flash ECC Error Byte Address 5 Register */ - __I uint32_t NANDECCEA6; /*!< [0x0918] NAND Flash ECC Error Byte Address 6 Register */ - __I uint32_t NANDECCEA7; /*!< [0x091c] NAND Flash ECC Error Byte Address 7 Register */ - __I uint32_t NANDECCEA8; /*!< [0x0920] NAND Flash ECC Error Byte Address 8 Register */ - __I uint32_t NANDECCEA9; /*!< [0x0924] NAND Flash ECC Error Byte Address 9 Register */ - __I uint32_t NANDECCEA10; /*!< [0x0928] NAND Flash ECC Error Byte Address 10 Register */ - __I uint32_t NANDECCEA11; /*!< [0x092c] NAND Flash ECC Error Byte Address 11 Register */ - __I uint32_t RESERVE6[12]; - __I uint32_t NANDECCED0; /*!< [0x0960] NAND Flash ECC Error Data Register 0 */ - __I uint32_t NANDECCED1; /*!< [0x0964] NAND Flash ECC Error Data Register 1 */ - __I uint32_t NANDECCED2; /*!< [0x0968] NAND Flash ECC Error Data Register 2 */ - __I uint32_t NANDECCED3; /*!< [0x096c] NAND Flash ECC Error Data Register 3 */ - __I uint32_t NANDECCED4; /*!< [0x0970] NAND Flash ECC Error Data Register 4 */ - __I uint32_t NANDECCED5; /*!< [0x0974] NAND Flash ECC Error Data Register 5 */ - __I uint32_t RESERVE7[34]; - __IO uint32_t NANDRA0; /*!< [0x0a00] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA1; /*!< [0x0a04] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA2; /*!< [0x0a08] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA3; /*!< [0x0a0c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA4; /*!< [0x0a10] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA5; /*!< [0x0a14] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA6; /*!< [0x0a18] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA7; /*!< [0x0a1c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA8; /*!< [0x0a20] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA9; /*!< [0x0a24] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA10; /*!< [0x0a28] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA11; /*!< [0x0a2c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA12; /*!< [0x0a30] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA13; /*!< [0x0a34] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA14; /*!< [0x0a38] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA15; /*!< [0x0a3c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA16; /*!< [0x0a40] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA17; /*!< [0x0a44] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA18; /*!< [0x0a48] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA19; /*!< [0x0a4c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA20; /*!< [0x0a50] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA21; /*!< [0x0a54] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA22; /*!< [0x0a58] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA23; /*!< [0x0a5c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA24; /*!< [0x0a60] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA25; /*!< [0x0a64] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA26; /*!< [0x0a68] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA27; /*!< [0x0a6c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA28; /*!< [0x0a70] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA29; /*!< [0x0a74] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA30; /*!< [0x0a78] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA31; /*!< [0x0a7c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA32; /*!< [0x0a80] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA33; /*!< [0x0a84] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA34; /*!< [0x0a88] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA35; /*!< [0x0a8c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA36; /*!< [0x0a90] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA37; /*!< [0x0a94] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA38; /*!< [0x0a98] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA39; /*!< [0x0a9c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA40; /*!< [0x0aa0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA41; /*!< [0x0aa4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA42; /*!< [0x0aa8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA43; /*!< [0x0aac] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA44; /*!< [0x0ab0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA45; /*!< [0x0ab4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA46; /*!< [0x0ab8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA47; /*!< [0x0abc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA48; /*!< [0x0ac0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA49; /*!< [0x0ac4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA50; /*!< [0x0ac8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA51; /*!< [0x0acc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA52; /*!< [0x0ad0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA53; /*!< [0x0ad4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA54; /*!< [0x0ad8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA55; /*!< [0x0adc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA56; /*!< [0x0ae0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA57; /*!< [0x0ae4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA58; /*!< [0x0ae8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA59; /*!< [0x0aec] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA60; /*!< [0x0af0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA61; /*!< [0x0af4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA62; /*!< [0x0af8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA63; /*!< [0x0afc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA64; /*!< [0x0b00] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA65; /*!< [0x0b04] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA66; /*!< [0x0b08] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA67; /*!< [0x0b0c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA68; /*!< [0x0b10] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA69; /*!< [0x0b14] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA70; /*!< [0x0b18] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA71; /*!< [0x0b1c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA72; /*!< [0x0b20] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA73; /*!< [0x0b24] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA74; /*!< [0x0b28] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA75; /*!< [0x0b2c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA76; /*!< [0x0b30] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA77; /*!< [0x0b34] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA78; /*!< [0x0b38] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA79; /*!< [0x0b3c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA80; /*!< [0x0b40] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA81; /*!< [0x0b44] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA82; /*!< [0x0b48] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA83; /*!< [0x0b4c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA84; /*!< [0x0b50] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA85; /*!< [0x0b54] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA86; /*!< [0x0b58] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA87; /*!< [0x0b5c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA88; /*!< [0x0b60] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA89; /*!< [0x0b64] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA90; /*!< [0x0b68] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA91; /*!< [0x0b6c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA92; /*!< [0x0b70] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA93; /*!< [0x0b74] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA94; /*!< [0x0b78] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA95; /*!< [0x0b7c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA96; /*!< [0x0b80] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA97; /*!< [0x0b84] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA98; /*!< [0x0b88] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA99; /*!< [0x0b8c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA100; /*!< [0x0b90] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA101; /*!< [0x0b94] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA102; /*!< [0x0b98] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA103; /*!< [0x0b9c] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA104; /*!< [0x0ba0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA105; /*!< [0x0ba4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA106; /*!< [0x0ba8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA107; /*!< [0x0bac] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA108; /*!< [0x0bb0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA109; /*!< [0x0bb4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA110; /*!< [0x0bb8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA111; /*!< [0x0bbc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA112; /*!< [0x0bc0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA113; /*!< [0x0bc4] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA114; /*!< [0x0bc8] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA115; /*!< [0x0bcc] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA116; /*!< [0x0bd0] NAND Flash Redundant Area Word n */ - __IO uint32_t NANDRA117; /*!< [0x0bd4] NAND Flash Redundant Area Word n */ - + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE4[3]; /*!< [0x08C4~0x08CC] */ + /** @endcond */ + __I uint32_t NANDECCES[4]; /*!< [0x08d0] NAND Flash ECC Error Status 0 Register */ + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE5[8]; /*!< [0x08E0~0x08FC] */ + /** @endcond */ + __I uint32_t NANDECCEA[12]; /*!< [0x0900] NAND Flash ECC Error Byte Address 0 Register */ + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE6[12]; /*!< [0x0930~0x095C] */ + /** @endcond */ + __I uint32_t NANDECCED[6]; /*!< [0x0960] NAND Flash ECC Error Data Register 0 */ + /** @cond HIDDEN_SYMBOLS */ + __I uint32_t RESERVE7[34]; /*!< [0x0978~0x09FC] */ + /** @endcond */ + __IO uint32_t NANDRA[118]; /*!< [0x0a00] NAND Flash Redundant Area Word n */ } NFI_T; /** @@ -2008,101 +1856,8 @@ typedef struct Constant Definitions for NFI Controller @{ */ -#define NFI_BUFFER0_Data_Pos (0) /*!< NFI_T::BUFFER0: Data Position */ -#define NFI_BUFFER0_Data_Msk (0xfffffffful << NFI_BUFFER0_Data_Pos) /*!< NFI_T::BUFFER0: Data Mask */ - -#define NFI_BUFFER1_Data_Pos (0) /*!< NFI_T::BUFFER1: Data Position */ -#define NFI_BUFFER1_Data_Msk (0xfffffffful << NFI_BUFFER1_Data_Pos) /*!< NFI_T::BUFFER1: Data Mask */ - -#define NFI_BUFFER2_Data_Pos (0) /*!< NFI_T::BUFFER2: Data Position */ -#define NFI_BUFFER2_Data_Msk (0xfffffffful << NFI_BUFFER2_Data_Pos) /*!< NFI_T::BUFFER2: Data Mask */ - -#define NFI_BUFFER3_Data_Pos (0) /*!< NFI_T::BUFFER3: Data Position */ -#define NFI_BUFFER3_Data_Msk (0xfffffffful << NFI_BUFFER3_Data_Pos) /*!< NFI_T::BUFFER3: Data Mask */ - -#define NFI_BUFFER4_Data_Pos (0) /*!< NFI_T::BUFFER4: Data Position */ -#define NFI_BUFFER4_Data_Msk (0xfffffffful << NFI_BUFFER4_Data_Pos) /*!< NFI_T::BUFFER4: Data Mask */ - -#define NFI_BUFFER5_Data_Pos (0) /*!< NFI_T::BUFFER5: Data Position */ -#define NFI_BUFFER5_Data_Msk (0xfffffffful << NFI_BUFFER5_Data_Pos) /*!< NFI_T::BUFFER5: Data Mask */ - -#define NFI_BUFFER6_Data_Pos (0) /*!< NFI_T::BUFFER6: Data Position */ -#define NFI_BUFFER6_Data_Msk (0xfffffffful << NFI_BUFFER6_Data_Pos) /*!< NFI_T::BUFFER6: Data Mask */ - -#define NFI_BUFFER7_Data_Pos (0) /*!< NFI_T::BUFFER7: Data Position */ -#define NFI_BUFFER7_Data_Msk (0xfffffffful << NFI_BUFFER7_Data_Pos) /*!< NFI_T::BUFFER7: Data Mask */ - -#define NFI_BUFFER8_Data_Pos (0) /*!< NFI_T::BUFFER8: Data Position */ -#define NFI_BUFFER8_Data_Msk (0xfffffffful << NFI_BUFFER8_Data_Pos) /*!< NFI_T::BUFFER8: Data Mask */ - -#define NFI_BUFFER9_Data_Pos (0) /*!< NFI_T::BUFFER9: Data Position */ -#define NFI_BUFFER9_Data_Msk (0xfffffffful << NFI_BUFFER9_Data_Pos) /*!< NFI_T::BUFFER9: Data Mask */ - -#define NFI_BUFFER10_Data_Pos (0) /*!< NFI_T::BUFFER10: Data Position */ -#define NFI_BUFFER10_Data_Msk (0xfffffffful << NFI_BUFFER10_Data_Pos) /*!< NFI_T::BUFFER10: Data Mask */ - -#define NFI_BUFFER11_Data_Pos (0) /*!< NFI_T::BUFFER11: Data Position */ -#define NFI_BUFFER11_Data_Msk (0xfffffffful << NFI_BUFFER11_Data_Pos) /*!< NFI_T::BUFFER11: Data Mask */ - -#define NFI_BUFFER12_Data_Pos (0) /*!< NFI_T::BUFFER12: Data Position */ -#define NFI_BUFFER12_Data_Msk (0xfffffffful << NFI_BUFFER12_Data_Pos) /*!< NFI_T::BUFFER12: Data Mask */ - -#define NFI_BUFFER13_Data_Pos (0) /*!< NFI_T::BUFFER13: Data Position */ -#define NFI_BUFFER13_Data_Msk (0xfffffffful << NFI_BUFFER13_Data_Pos) /*!< NFI_T::BUFFER13: Data Mask */ - -#define NFI_BUFFER14_Data_Pos (0) /*!< NFI_T::BUFFER14: Data Position */ -#define NFI_BUFFER14_Data_Msk (0xfffffffful << NFI_BUFFER14_Data_Pos) /*!< NFI_T::BUFFER14: Data Mask */ - -#define NFI_BUFFER15_Data_Pos (0) /*!< NFI_T::BUFFER15: Data Position */ -#define NFI_BUFFER15_Data_Msk (0xfffffffful << NFI_BUFFER15_Data_Pos) /*!< NFI_T::BUFFER15: Data Mask */ - -#define NFI_BUFFER16_Data_Pos (0) /*!< NFI_T::BUFFER16: Data Position */ -#define NFI_BUFFER16_Data_Msk (0xfffffffful << NFI_BUFFER16_Data_Pos) /*!< NFI_T::BUFFER16: Data Mask */ - -#define NFI_BUFFER17_Data_Pos (0) /*!< NFI_T::BUFFER17: Data Position */ -#define NFI_BUFFER17_Data_Msk (0xfffffffful << NFI_BUFFER17_Data_Pos) /*!< NFI_T::BUFFER17: Data Mask */ - -#define NFI_BUFFER18_Data_Pos (0) /*!< NFI_T::BUFFER18: Data Position */ -#define NFI_BUFFER18_Data_Msk (0xfffffffful << NFI_BUFFER18_Data_Pos) /*!< NFI_T::BUFFER18: Data Mask */ - -#define NFI_BUFFER19_Data_Pos (0) /*!< NFI_T::BUFFER19: Data Position */ -#define NFI_BUFFER19_Data_Msk (0xfffffffful << NFI_BUFFER19_Data_Pos) /*!< NFI_T::BUFFER19: Data Mask */ - -#define NFI_BUFFER20_Data_Pos (0) /*!< NFI_T::BUFFER20: Data Position */ -#define NFI_BUFFER20_Data_Msk (0xfffffffful << NFI_BUFFER20_Data_Pos) /*!< NFI_T::BUFFER20: Data Mask */ - -#define NFI_BUFFER21_Data_Pos (0) /*!< NFI_T::BUFFER21: Data Position */ -#define NFI_BUFFER21_Data_Msk (0xfffffffful << NFI_BUFFER21_Data_Pos) /*!< NFI_T::BUFFER21: Data Mask */ - -#define NFI_BUFFER22_Data_Pos (0) /*!< NFI_T::BUFFER22: Data Position */ -#define NFI_BUFFER22_Data_Msk (0xfffffffful << NFI_BUFFER22_Data_Pos) /*!< NFI_T::BUFFER22: Data Mask */ - -#define NFI_BUFFER23_Data_Pos (0) /*!< NFI_T::BUFFER23: Data Position */ -#define NFI_BUFFER23_Data_Msk (0xfffffffful << NFI_BUFFER23_Data_Pos) /*!< NFI_T::BUFFER23: Data Mask */ - -#define NFI_BUFFER24_Data_Pos (0) /*!< NFI_T::BUFFER24: Data Position */ -#define NFI_BUFFER24_Data_Msk (0xfffffffful << NFI_BUFFER24_Data_Pos) /*!< NFI_T::BUFFER24: Data Mask */ - -#define NFI_BUFFER25_Data_Pos (0) /*!< NFI_T::BUFFER25: Data Position */ -#define NFI_BUFFER25_Data_Msk (0xfffffffful << NFI_BUFFER25_Data_Pos) /*!< NFI_T::BUFFER25: Data Mask */ - -#define NFI_BUFFER26_Data_Pos (0) /*!< NFI_T::BUFFER26: Data Position */ -#define NFI_BUFFER26_Data_Msk (0xfffffffful << NFI_BUFFER26_Data_Pos) /*!< NFI_T::BUFFER26: Data Mask */ - -#define NFI_BUFFER27_Data_Pos (0) /*!< NFI_T::BUFFER27: Data Position */ -#define NFI_BUFFER27_Data_Msk (0xfffffffful << NFI_BUFFER27_Data_Pos) /*!< NFI_T::BUFFER27: Data Mask */ - -#define NFI_BUFFER28_Data_Pos (0) /*!< NFI_T::BUFFER28: Data Position */ -#define NFI_BUFFER28_Data_Msk (0xfffffffful << NFI_BUFFER28_Data_Pos) /*!< NFI_T::BUFFER28: Data Mask */ - -#define NFI_BUFFER29_Data_Pos (0) /*!< NFI_T::BUFFER29: Data Position */ -#define NFI_BUFFER29_Data_Msk (0xfffffffful << NFI_BUFFER29_Data_Pos) /*!< NFI_T::BUFFER29: Data Mask */ - -#define NFI_BUFFER30_Data_Pos (0) /*!< NFI_T::BUFFER30: Data Position */ -#define NFI_BUFFER30_Data_Msk (0xfffffffful << NFI_BUFFER30_Data_Pos) /*!< NFI_T::BUFFER30: Data Mask */ - -#define NFI_BUFFER31_Data_Pos (0) /*!< NFI_T::BUFFER31: Data Position */ -#define NFI_BUFFER31_Data_Msk (0xfffffffful << NFI_BUFFER31_Data_Pos) /*!< NFI_T::BUFFER31: Data Mask */ +#define NFI_BUFFER_Data_Pos (0) /*!< NFI_T::BUFFER0: Data Position */ +#define NFI_BUFFER_Data_Msk (0xfffffffful << NFI_BUFFER0_Data_Pos) /*!< NFI_T::BUFFER0: Data Mask */ #define NFI_DMACTL_DMACEN_Pos (0) /*!< NFI_T::DMACTL: DMACEN Position */ #define NFI_DMACTL_DMACEN_Msk (0x1ul << NFI_DMACTL_DMACEN_Pos) /*!< NFI_T::DMACTL: DMACEN Mask */ @@ -2185,6 +1940,9 @@ typedef struct #define NFI_NANDCTL_CS0_Pos (25) /*!< NFI_T::NANDCTL: CS0 Position */ #define NFI_NANDCTL_CS0_Msk (0x1ul << NFI_NANDCTL_CS0_Pos) /*!< NFI_T::NANDCTL: CS0 Mask */ +#define NFI_NANDCTL_CS1_Pos (26) /*!< NFI_T::NANDCTL: CS1 Position */ +#define NFI_NANDCTL_CS1_Msk (0x1ul << NFI_NANDCTL_CS1_Pos) /*!< NFI_T::NANDCTL: CS1 Mask */ + #define NFI_NANDTMCTL_LOWID_Pos (0) /*!< NFI_T::NANDTMCTL: LOWID Position */ #define NFI_NANDTMCTL_LOWID_Msk (0xfful << NFI_NANDTMCTL_LOWID_Pos) /*!< NFI_T::NANDTMCTL: LOWID Mask */ @@ -2245,599 +2003,32 @@ typedef struct #define NFI_NANDECTL_WP_Pos (0) /*!< NFI_T::NANDECTL: WP Position */ #define NFI_NANDECTL_WP_Msk (0x1ul << NFI_NANDECTL_WP_Pos) /*!< NFI_T::NANDECTL: WP Mask */ -#define NFI_NANDECCES0_F1STAT_Pos (0) /*!< NFI_T::NANDECCES0: F1STAT Position */ -#define NFI_NANDECCES0_F1STAT_Msk (0x3ul << NFI_NANDECCES0_F1STAT_Pos) /*!< NFI_T::NANDECCES0: F1STAT Mask */ +#define NFI_NANDECCES_F1STAT_Pos (0) /*!< NFI_T::NANDECCES: F1STAT Position */ +#define NFI_NANDECCES_F1STAT_Msk (0x3ul << NFI_NANDECCES_F1STAT_Pos) /*!< NFI_T::NANDECCES: F1STAT Mask */ -#define NFI_NANDECCES0_F1ECNT_Pos (2) /*!< NFI_T::NANDECCES0: F1ECNT Position */ -#define NFI_NANDECCES0_F1ECNT_Msk (0x1ful << NFI_NANDECCES0_F1ECNT_Pos) /*!< NFI_T::NANDECCES0: F1ECNT Mask */ +#define NFI_NANDECCES_F1ECNT_Pos (2) /*!< NFI_T::NANDECCES: F1ECNT Position */ +#define NFI_NANDECCES_F1ECNT_Msk (0x1ful << NFI_NANDECCES_F1ECNT_Pos) /*!< NFI_T::NANDECCES: F1ECNT Mask */ -#define NFI_NANDECCES0_F2STAT_Pos (8) /*!< NFI_T::NANDECCES0: F2STAT Position */ -#define NFI_NANDECCES0_F2STAT_Msk (0x3ul << NFI_NANDECCES0_F2STAT_Pos) /*!< NFI_T::NANDECCES0: F2STAT Mask */ +#define NFI_NANDECCES_F2STAT_Pos (8) /*!< NFI_T::NANDECCES: F2STAT Position */ +#define NFI_NANDECCES_F2STAT_Msk (0x3ul << NFI_NANDECCES_F2STAT_Pos) /*!< NFI_T::NANDECCES: F2STAT Mask */ -#define NFI_NANDECCES0_F2ECNT_Pos (10) /*!< NFI_T::NANDECCES0: F2ECNT Position */ -#define NFI_NANDECCES0_F2ECNT_Msk (0x1ful << NFI_NANDECCES0_F2ECNT_Pos) /*!< NFI_T::NANDECCES0: F2ECNT Mask */ +#define NFI_NANDECCES_F2ECNT_Pos (10) /*!< NFI_T::NANDECCES: F2ECNT Position */ +#define NFI_NANDECCES_F2ECNT_Msk (0x1ful << NFI_NANDECCES_F2ECNT_Pos) /*!< NFI_T::NANDECCES: F2ECNT Mask */ -#define NFI_NANDECCES0_F3STAT_Pos (16) /*!< NFI_T::NANDECCES0: F3STAT Position */ -#define NFI_NANDECCES0_F3STAT_Msk (0x3ul << NFI_NANDECCES0_F3STAT_Pos) /*!< NFI_T::NANDECCES0: F3STAT Mask */ +#define NFI_NANDECCES_F3STAT_Pos (16) /*!< NFI_T::NANDECCES: F3STAT Position */ +#define NFI_NANDECCES_F3STAT_Msk (0x3ul << NFI_NANDECCES_F3STAT_Pos) /*!< NFI_T::NANDECCES: F3STAT Mask */ -#define NFI_NANDECCES0_F3ECNT_Pos (18) /*!< NFI_T::NANDECCES0: F3ECNT Position */ -#define NFI_NANDECCES0_F3ECNT_Msk (0x1ful << NFI_NANDECCES0_F3ECNT_Pos) /*!< NFI_T::NANDECCES0: F3ECNT Mask */ +#define NFI_NANDECCES_F3ECNT_Pos (18) /*!< NFI_T::NANDECCES: F3ECNT Position */ +#define NFI_NANDECCES_F3ECNT_Msk (0x1ful << NFI_NANDECCES_F3ECNT_Pos) /*!< NFI_T::NANDECCES: F3ECNT Mask */ -#define NFI_NANDECCES0_F4STAT_Pos (24) /*!< NFI_T::NANDECCES0: F4STAT Position */ -#define NFI_NANDECCES0_F4STAT_Msk (0x3ul << NFI_NANDECCES0_F4STAT_Pos) /*!< NFI_T::NANDECCES0: F4STAT Mask */ +#define NFI_NANDECCES_F4STAT_Pos (24) /*!< NFI_T::NANDECCES: F4STAT Position */ +#define NFI_NANDECCES_F4STAT_Msk (0x3ul << NFI_NANDECCES_F4STAT_Pos) /*!< NFI_T::NANDECCES: F4STAT Mask */ -#define NFI_NANDECCES0_F4ECNT_Pos (26) /*!< NFI_T::NANDECCES0: F4ECNT Position */ -#define NFI_NANDECCES0_F4ECNT_Msk (0x1ful << NFI_NANDECCES0_F4ECNT_Pos) /*!< NFI_T::NANDECCES0: F4ECNT Mask */ +#define NFI_NANDECCES_F4ECNT_Pos (26) /*!< NFI_T::NANDECCES: F4ECNT Position */ +#define NFI_NANDECCES_F4ECNT_Msk (0x1ful << NFI_NANDECCES_F4ECNT_Pos) /*!< NFI_T::NANDECCES: F4ECNT Mask */ -#define NFI_NANDECCES1_F5STAT_Pos (0) /*!< NFI_T::NANDECCES1: F5STAT Position */ -#define NFI_NANDECCES1_F5STAT_Msk (0x3ul << NFI_NANDECCES1_F5STAT_Pos) /*!< NFI_T::NANDECCES1: F5STAT Mask */ - -#define NFI_NANDECCES1_F5ECNT_Pos (2) /*!< NFI_T::NANDECCES1: F5ECNT Position */ -#define NFI_NANDECCES1_F5ECNT_Msk (0x1ful << NFI_NANDECCES1_F5ECNT_Pos) /*!< NFI_T::NANDECCES1: F5ECNT Mask */ - -#define NFI_NANDECCES1_F6STAT_Pos (8) /*!< NFI_T::NANDECCES1: F6STAT Position */ -#define NFI_NANDECCES1_F6STAT_Msk (0x3ul << NFI_NANDECCES1_F6STAT_Pos) /*!< NFI_T::NANDECCES1: F6STAT Mask */ - -#define NFI_NANDECCES1_F6ECNT_Pos (10) /*!< NFI_T::NANDECCES1: F6ECNT Position */ -#define NFI_NANDECCES1_F6ECNT_Msk (0x1ful << NFI_NANDECCES1_F6ECNT_Pos) /*!< NFI_T::NANDECCES1: F6ECNT Mask */ - -#define NFI_NANDECCES1_F7STAT_Pos (16) /*!< NFI_T::NANDECCES1: F7STAT Position */ -#define NFI_NANDECCES1_F7STAT_Msk (0x3ul << NFI_NANDECCES1_F7STAT_Pos) /*!< NFI_T::NANDECCES1: F7STAT Mask */ - -#define NFI_NANDECCES1_F7ECNT_Pos (18) /*!< NFI_T::NANDECCES1: F7ECNT Position */ -#define NFI_NANDECCES1_F7ECNT_Msk (0x1ful << NFI_NANDECCES1_F7ECNT_Pos) /*!< NFI_T::NANDECCES1: F7ECNT Mask */ - -#define NFI_NANDECCES1_F8STAT_Pos (24) /*!< NFI_T::NANDECCES1: F8STAT Position */ -#define NFI_NANDECCES1_F8STAT_Msk (0x3ul << NFI_NANDECCES1_F8STAT_Pos) /*!< NFI_T::NANDECCES1: F8STAT Mask */ - -#define NFI_NANDECCES1_F8ECNT_Pos (26) /*!< NFI_T::NANDECCES1: F8ECNT Position */ -#define NFI_NANDECCES1_F8ECNT_Msk (0x1ful << NFI_NANDECCES1_F8ECNT_Pos) /*!< NFI_T::NANDECCES1: F8ECNT Mask */ - -#define NFI_NANDECCES2_F9STAT_Pos (0) /*!< NFI_T::NANDECCES2: F9STAT Position */ -#define NFI_NANDECCES2_F9STAT_Msk (0x3ul << NFI_NANDECCES2_F9STAT_Pos) /*!< NFI_T::NANDECCES2: F9STAT Mask */ - -#define NFI_NANDECCES2_F9ECNT_Pos (2) /*!< NFI_T::NANDECCES2: F9ECNT Position */ -#define NFI_NANDECCES2_F9ECNT_Msk (0x1ful << NFI_NANDECCES2_F9ECNT_Pos) /*!< NFI_T::NANDECCES2: F9ECNT Mask */ - -#define NFI_NANDECCES2_F10STAT_Pos (8) /*!< NFI_T::NANDECCES2: F10STAT Position */ -#define NFI_NANDECCES2_F10STAT_Msk (0x3ul << NFI_NANDECCES2_F10STAT_Pos) /*!< NFI_T::NANDECCES2: F10STAT Mask */ - -#define NFI_NANDECCES2_F10ECNT_Pos (10) /*!< NFI_T::NANDECCES2: F10ECNT Position */ -#define NFI_NANDECCES2_F10ECNT_Msk (0x1ful << NFI_NANDECCES2_F10ECNT_Pos) /*!< NFI_T::NANDECCES2: F10ECNT Mask */ - -#define NFI_NANDECCES2_F11STAT_Pos (16) /*!< NFI_T::NANDECCES2: F11STAT Position */ -#define NFI_NANDECCES2_F11STAT_Msk (0x3ul << NFI_NANDECCES2_F11STAT_Pos) /*!< NFI_T::NANDECCES2: F11STAT Mask */ - -#define NFI_NANDECCES2_F11ECNT_Pos (18) /*!< NFI_T::NANDECCES2: F11ECNT Position */ -#define NFI_NANDECCES2_F11ECNT_Msk (0x1ful << NFI_NANDECCES2_F11ECNT_Pos) /*!< NFI_T::NANDECCES2: F11ECNT Mask */ - -#define NFI_NANDECCES2_F12STAT_Pos (24) /*!< NFI_T::NANDECCES2: F12STAT Position */ -#define NFI_NANDECCES2_F12STAT_Msk (0x3ul << NFI_NANDECCES2_F12STAT_Pos) /*!< NFI_T::NANDECCES2: F12STAT Mask */ - -#define NFI_NANDECCES2_F12ECNT_Pos (26) /*!< NFI_T::NANDECCES2: F12ECNT Position */ -#define NFI_NANDECCES2_F12ECNT_Msk (0x1ful << NFI_NANDECCES2_F12ECNT_Pos) /*!< NFI_T::NANDECCES2: F12ECNT Mask */ - -#define NFI_NANDECCES3_F13STAT_Pos (0) /*!< NFI_T::NANDECCES3: F13STAT Position */ -#define NFI_NANDECCES3_F13STAT_Msk (0x3ul << NFI_NANDECCES3_F13STAT_Pos) /*!< NFI_T::NANDECCES3: F13STAT Mask */ - -#define NFI_NANDECCES3_F13ECNT_Pos (2) /*!< NFI_T::NANDECCES3: F13ECNT Position */ -#define NFI_NANDECCES3_F13ECNT_Msk (0x1ful << NFI_NANDECCES3_F13ECNT_Pos) /*!< NFI_T::NANDECCES3: F13ECNT Mask */ - -#define NFI_NANDECCES3_F14STAT_Pos (8) /*!< NFI_T::NANDECCES3: F14STAT Position */ -#define NFI_NANDECCES3_F14STAT_Msk (0x3ul << NFI_NANDECCES3_F14STAT_Pos) /*!< NFI_T::NANDECCES3: F14STAT Mask */ - -#define NFI_NANDECCES3_F14ECNT_Pos (10) /*!< NFI_T::NANDECCES3: F14ECNT Position */ -#define NFI_NANDECCES3_F14ECNT_Msk (0x1ful << NFI_NANDECCES3_F14ECNT_Pos) /*!< NFI_T::NANDECCES3: F14ECNT Mask */ - -#define NFI_NANDECCES3_F15STAT_Pos (16) /*!< NFI_T::NANDECCES3: F15STAT Position */ -#define NFI_NANDECCES3_F15STAT_Msk (0x3ul << NFI_NANDECCES3_F15STAT_Pos) /*!< NFI_T::NANDECCES3: F15STAT Mask */ - -#define NFI_NANDECCES3_F15ECNT_Pos (18) /*!< NFI_T::NANDECCES3: F15ECNT Position */ -#define NFI_NANDECCES3_F15ECNT_Msk (0x1ful << NFI_NANDECCES3_F15ECNT_Pos) /*!< NFI_T::NANDECCES3: F15ECNT Mask */ - -#define NFI_NANDECCES3_F16STAT_Pos (24) /*!< NFI_T::NANDECCES3: F16STAT Position */ -#define NFI_NANDECCES3_F16STAT_Msk (0x3ul << NFI_NANDECCES3_F16STAT_Pos) /*!< NFI_T::NANDECCES3: F16STAT Mask */ - -#define NFI_NANDECCES3_F16ECNT_Pos (26) /*!< NFI_T::NANDECCES3: F16ECNT Position */ -#define NFI_NANDECCES3_F16ECNT_Msk (0x1ful << NFI_NANDECCES3_F16ECNT_Pos) /*!< NFI_T::NANDECCES3: F16ECNT Mask */ - -#define NFI_NANDECCEA0_ERRADDR0_Pos (0) /*!< NFI_T::NANDECCEA0: ERRADDR0 Position */ -#define NFI_NANDECCEA0_ERRADDR0_Msk (0x7fful << NFI_NANDECCEA0_ERRADDR0_Pos) /*!< NFI_T::NANDECCEA0: ERRADDR0 Mask */ - -#define NFI_NANDECCEA0_ERRADDR1_Pos (16) /*!< NFI_T::NANDECCEA0: ERRADDR1 Position */ -#define NFI_NANDECCEA0_ERRADDR1_Msk (0x7fful << NFI_NANDECCEA0_ERRADDR1_Pos) /*!< NFI_T::NANDECCEA0: ERRADDR1 Mask */ - -#define NFI_NANDECCEA1_ERRADDR2_Pos (0) /*!< NFI_T::NANDECCEA1: ERRADDR2 Position */ -#define NFI_NANDECCEA1_ERRADDR2_Msk (0x7fful << NFI_NANDECCEA1_ERRADDR2_Pos) /*!< NFI_T::NANDECCEA1: ERRADDR2 Mask */ - -#define NFI_NANDECCEA1_ERRADDR3_Pos (16) /*!< NFI_T::NANDECCEA1: ERRADDR3 Position */ -#define NFI_NANDECCEA1_ERRADDR3_Msk (0x7fful << NFI_NANDECCEA1_ERRADDR3_Pos) /*!< NFI_T::NANDECCEA1: ERRADDR3 Mask */ - -#define NFI_NANDECCEA2_ERRADDR4_Pos (0) /*!< NFI_T::NANDECCEA2: ERRADDR4 Position */ -#define NFI_NANDECCEA2_ERRADDR4_Msk (0x7fful << NFI_NANDECCEA2_ERRADDR4_Pos) /*!< NFI_T::NANDECCEA2: ERRADDR4 Mask */ - -#define NFI_NANDECCEA2_ERRADDR5_Pos (16) /*!< NFI_T::NANDECCEA2: ERRADDR5 Position */ -#define NFI_NANDECCEA2_ERRADDR5_Msk (0x7fful << NFI_NANDECCEA2_ERRADDR5_Pos) /*!< NFI_T::NANDECCEA2: ERRADDR5 Mask */ - -#define NFI_NANDECCEA3_ERRADDR6_Pos (0) /*!< NFI_T::NANDECCEA3: ERRADDR6 Position */ -#define NFI_NANDECCEA3_ERRADDR6_Msk (0x7fful << NFI_NANDECCEA3_ERRADDR6_Pos) /*!< NFI_T::NANDECCEA3: ERRADDR6 Mask */ - -#define NFI_NANDECCEA3_ERRADDR7_Pos (16) /*!< NFI_T::NANDECCEA3: ERRADDR7 Position */ -#define NFI_NANDECCEA3_ERRADDR7_Msk (0x7fful << NFI_NANDECCEA3_ERRADDR7_Pos) /*!< NFI_T::NANDECCEA3: ERRADDR7 Mask */ - -#define NFI_NANDECCEA4_ERRADDR8_Pos (0) /*!< NFI_T::NANDECCEA4: ERRADDR8 Position */ -#define NFI_NANDECCEA4_ERRADDR8_Msk (0x7fful << NFI_NANDECCEA4_ERRADDR8_Pos) /*!< NFI_T::NANDECCEA4: ERRADDR8 Mask */ - -#define NFI_NANDECCEA4_ERRADDR9_Pos (16) /*!< NFI_T::NANDECCEA4: ERRADDR9 Position */ -#define NFI_NANDECCEA4_ERRADDR9_Msk (0x7fful << NFI_NANDECCEA4_ERRADDR9_Pos) /*!< NFI_T::NANDECCEA4: ERRADDR9 Mask */ - -#define NFI_NANDECCEA5_ERRADDR10_Pos (0) /*!< NFI_T::NANDECCEA5: ERRADDR10 Position */ -#define NFI_NANDECCEA5_ERRADDR10_Msk (0x7fful << NFI_NANDECCEA5_ERRADDR10_Pos) /*!< NFI_T::NANDECCEA5: ERRADDR10 Mask */ - -#define NFI_NANDECCEA5_ERRADDR11_Pos (16) /*!< NFI_T::NANDECCEA5: ERRADDR11 Position */ -#define NFI_NANDECCEA5_ERRADDR11_Msk (0x7fful << NFI_NANDECCEA5_ERRADDR11_Pos) /*!< NFI_T::NANDECCEA5: ERRADDR11 Mask */ - -#define NFI_NANDECCEA6_ERRADDR12_Pos (0) /*!< NFI_T::NANDECCEA6: ERRADDR12 Position */ -#define NFI_NANDECCEA6_ERRADDR12_Msk (0x7fful << NFI_NANDECCEA6_ERRADDR12_Pos) /*!< NFI_T::NANDECCEA6: ERRADDR12 Mask */ - -#define NFI_NANDECCEA6_ERRADDR13_Pos (16) /*!< NFI_T::NANDECCEA6: ERRADDR13 Position */ -#define NFI_NANDECCEA6_ERRADDR13_Msk (0x7fful << NFI_NANDECCEA6_ERRADDR13_Pos) /*!< NFI_T::NANDECCEA6: ERRADDR13 Mask */ - -#define NFI_NANDECCEA7_ERRADDR14_Pos (0) /*!< NFI_T::NANDECCEA7: ERRADDR14 Position */ -#define NFI_NANDECCEA7_ERRADDR14_Msk (0x7fful << NFI_NANDECCEA7_ERRADDR14_Pos) /*!< NFI_T::NANDECCEA7: ERRADDR14 Mask */ - -#define NFI_NANDECCEA7_ERRADDR15_Pos (16) /*!< NFI_T::NANDECCEA7: ERRADDR15 Position */ -#define NFI_NANDECCEA7_ERRADDR15_Msk (0x7fful << NFI_NANDECCEA7_ERRADDR15_Pos) /*!< NFI_T::NANDECCEA7: ERRADDR15 Mask */ - -#define NFI_NANDECCEA8_ERRADDR16_Pos (0) /*!< NFI_T::NANDECCEA8: ERRADDR16 Position */ -#define NFI_NANDECCEA8_ERRADDR16_Msk (0x7fful << NFI_NANDECCEA8_ERRADDR16_Pos) /*!< NFI_T::NANDECCEA8: ERRADDR16 Mask */ - -#define NFI_NANDECCEA8_ERRADDR17_Pos (16) /*!< NFI_T::NANDECCEA8: ERRADDR17 Position */ -#define NFI_NANDECCEA8_ERRADDR17_Msk (0x7fful << NFI_NANDECCEA8_ERRADDR17_Pos) /*!< NFI_T::NANDECCEA8: ERRADDR17 Mask */ - -#define NFI_NANDECCEA9_ERRADDR18_Pos (0) /*!< NFI_T::NANDECCEA9: ERRADDR18 Position */ -#define NFI_NANDECCEA9_ERRADDR18_Msk (0x7fful << NFI_NANDECCEA9_ERRADDR18_Pos) /*!< NFI_T::NANDECCEA9: ERRADDR18 Mask */ - -#define NFI_NANDECCEA9_ERRADDR19_Pos (16) /*!< NFI_T::NANDECCEA9: ERRADDR19 Position */ -#define NFI_NANDECCEA9_ERRADDR19_Msk (0x7fful << NFI_NANDECCEA9_ERRADDR19_Pos) /*!< NFI_T::NANDECCEA9: ERRADDR19 Mask */ - -#define NFI_NANDECCEA10_ERRADDR20_Pos (0) /*!< NFI_T::NANDECCEA10: ERRADDR20 Position */ -#define NFI_NANDECCEA10_ERRADDR20_Msk (0x7fful << NFI_NANDECCEA10_ERRADDR20_Pos) /*!< NFI_T::NANDECCEA10: ERRADDR20 Mask */ - -#define NFI_NANDECCEA10_ERRADDR21_Pos (16) /*!< NFI_T::NANDECCEA10: ERRADDR21 Position */ -#define NFI_NANDECCEA10_ERRADDR21_Msk (0x7fful << NFI_NANDECCEA10_ERRADDR21_Pos) /*!< NFI_T::NANDECCEA10: ERRADDR21 Mask */ - -#define NFI_NANDECCEA11_ERRADDR22_Pos (0) /*!< NFI_T::NANDECCEA11: ERRADDR22 Position */ -#define NFI_NANDECCEA11_ERRADDR22_Msk (0x7fful << NFI_NANDECCEA11_ERRADDR22_Pos) /*!< NFI_T::NANDECCEA11: ERRADDR22 Mask */ - -#define NFI_NANDECCEA11_ERRADDR23_Pos (16) /*!< NFI_T::NANDECCEA11: ERRADDR23 Position */ -#define NFI_NANDECCEA11_ERRADDR23_Msk (0x7fful << NFI_NANDECCEA11_ERRADDR23_Pos) /*!< NFI_T::NANDECCEA11: ERRADDR23 Mask */ - -#define NFI_NANDECCED0_ERRDATA0_Pos (0) /*!< NFI_T::NANDECCED0: ERRDATA0 Position */ -#define NFI_NANDECCED0_ERRDATA0_Msk (0xfful << NFI_NANDECCED0_ERRDATA0_Pos) /*!< NFI_T::NANDECCED0: ERRDATA0 Mask */ - -#define NFI_NANDECCED0_ERRDATA1_Pos (8) /*!< NFI_T::NANDECCED0: ERRDATA1 Position */ -#define NFI_NANDECCED0_ERRDATA1_Msk (0xfful << NFI_NANDECCED0_ERRDATA1_Pos) /*!< NFI_T::NANDECCED0: ERRDATA1 Mask */ - -#define NFI_NANDECCED0_ERRDATA2_Pos (16) /*!< NFI_T::NANDECCED0: ERRDATA2 Position */ -#define NFI_NANDECCED0_ERRDATA2_Msk (0xfful << NFI_NANDECCED0_ERRDATA2_Pos) /*!< NFI_T::NANDECCED0: ERRDATA2 Mask */ - -#define NFI_NANDECCED0_ERRDATA3_Pos (24) /*!< NFI_T::NANDECCED0: ERRDATA3 Position */ -#define NFI_NANDECCED0_ERRDATA3_Msk (0xfful << NFI_NANDECCED0_ERRDATA3_Pos) /*!< NFI_T::NANDECCED0: ERRDATA3 Mask */ - -#define NFI_NANDECCED1_ERRDATA4_Pos (0) /*!< NFI_T::NANDECCED1: ERRDATA4 Position */ -#define NFI_NANDECCED1_ERRDATA4_Msk (0xfful << NFI_NANDECCED1_ERRDATA4_Pos) /*!< NFI_T::NANDECCED1: ERRDATA4 Mask */ - -#define NFI_NANDECCED1_ERRDATA5_Pos (8) /*!< NFI_T::NANDECCED1: ERRDATA5 Position */ -#define NFI_NANDECCED1_ERRDATA5_Msk (0xfful << NFI_NANDECCED1_ERRDATA5_Pos) /*!< NFI_T::NANDECCED1: ERRDATA5 Mask */ - -#define NFI_NANDECCED1_ERRDATA6_Pos (16) /*!< NFI_T::NANDECCED1: ERRDATA6 Position */ -#define NFI_NANDECCED1_ERRDATA6_Msk (0xfful << NFI_NANDECCED1_ERRDATA6_Pos) /*!< NFI_T::NANDECCED1: ERRDATA6 Mask */ - -#define NFI_NANDECCED1_ERRDATA7_Pos (24) /*!< NFI_T::NANDECCED1: ERRDATA7 Position */ -#define NFI_NANDECCED1_ERRDATA7_Msk (0xfful << NFI_NANDECCED1_ERRDATA7_Pos) /*!< NFI_T::NANDECCED1: ERRDATA7 Mask */ - -#define NFI_NANDECCED2_ERRDATA8_Pos (0) /*!< NFI_T::NANDECCED2: ERRDATA8 Position */ -#define NFI_NANDECCED2_ERRDATA8_Msk (0xfful << NFI_NANDECCED2_ERRDATA8_Pos) /*!< NFI_T::NANDECCED2: ERRDATA8 Mask */ - -#define NFI_NANDECCED2_ERRDATA9_Pos (8) /*!< NFI_T::NANDECCED2: ERRDATA9 Position */ -#define NFI_NANDECCED2_ERRDATA9_Msk (0xfful << NFI_NANDECCED2_ERRDATA9_Pos) /*!< NFI_T::NANDECCED2: ERRDATA9 Mask */ - -#define NFI_NANDECCED2_ERRDATA10_Pos (16) /*!< NFI_T::NANDECCED2: ERRDATA10 Position */ -#define NFI_NANDECCED2_ERRDATA10_Msk (0xfful << NFI_NANDECCED2_ERRDATA10_Pos) /*!< NFI_T::NANDECCED2: ERRDATA10 Mask */ - -#define NFI_NANDECCED2_ERRDATA11_Pos (24) /*!< NFI_T::NANDECCED2: ERRDATA11 Position */ -#define NFI_NANDECCED2_ERRDATA11_Msk (0xfful << NFI_NANDECCED2_ERRDATA11_Pos) /*!< NFI_T::NANDECCED2: ERRDATA11 Mask */ - -#define NFI_NANDECCED3_ERRDATA12_Pos (0) /*!< NFI_T::NANDECCED3: ERRDATA12 Position */ -#define NFI_NANDECCED3_ERRDATA12_Msk (0xfful << NFI_NANDECCED3_ERRDATA12_Pos) /*!< NFI_T::NANDECCED3: ERRDATA12 Mask */ - -#define NFI_NANDECCED3_ERRDATA13_Pos (8) /*!< NFI_T::NANDECCED3: ERRDATA13 Position */ -#define NFI_NANDECCED3_ERRDATA13_Msk (0xfful << NFI_NANDECCED3_ERRDATA13_Pos) /*!< NFI_T::NANDECCED3: ERRDATA13 Mask */ - -#define NFI_NANDECCED3_ERRDATA14_Pos (16) /*!< NFI_T::NANDECCED3: ERRDATA14 Position */ -#define NFI_NANDECCED3_ERRDATA14_Msk (0xfful << NFI_NANDECCED3_ERRDATA14_Pos) /*!< NFI_T::NANDECCED3: ERRDATA14 Mask */ - -#define NFI_NANDECCED3_ERRDATA15_Pos (24) /*!< NFI_T::NANDECCED3: ERRDATA15 Position */ -#define NFI_NANDECCED3_ERRDATA15_Msk (0xfful << NFI_NANDECCED3_ERRDATA15_Pos) /*!< NFI_T::NANDECCED3: ERRDATA15 Mask */ - -#define NFI_NANDECCED4_ERRDATA16_Pos (0) /*!< NFI_T::NANDECCED4: ERRDATA16 Position */ -#define NFI_NANDECCED4_ERRDATA16_Msk (0xfful << NFI_NANDECCED4_ERRDATA16_Pos) /*!< NFI_T::NANDECCED4: ERRDATA16 Mask */ - -#define NFI_NANDECCED4_ERRDATA17_Pos (8) /*!< NFI_T::NANDECCED4: ERRDATA17 Position */ -#define NFI_NANDECCED4_ERRDATA17_Msk (0xfful << NFI_NANDECCED4_ERRDATA17_Pos) /*!< NFI_T::NANDECCED4: ERRDATA17 Mask */ - -#define NFI_NANDECCED4_ERRDATA18_Pos (16) /*!< NFI_T::NANDECCED4: ERRDATA18 Position */ -#define NFI_NANDECCED4_ERRDATA18_Msk (0xfful << NFI_NANDECCED4_ERRDATA18_Pos) /*!< NFI_T::NANDECCED4: ERRDATA18 Mask */ - -#define NFI_NANDECCED4_ERRDATA19_Pos (24) /*!< NFI_T::NANDECCED4: ERRDATA19 Position */ -#define NFI_NANDECCED4_ERRDATA19_Msk (0xfful << NFI_NANDECCED4_ERRDATA19_Pos) /*!< NFI_T::NANDECCED4: ERRDATA19 Mask */ - -#define NFI_NANDECCED5_ERRDATA20_Pos (0) /*!< NFI_T::NANDECCED5: ERRDATA20 Position */ -#define NFI_NANDECCED5_ERRDATA20_Msk (0xfful << NFI_NANDECCED5_ERRDATA20_Pos) /*!< NFI_T::NANDECCED5: ERRDATA20 Mask */ - -#define NFI_NANDECCED5_ERRDATA21_Pos (8) /*!< NFI_T::NANDECCED5: ERRDATA21 Position */ -#define NFI_NANDECCED5_ERRDATA21_Msk (0xfful << NFI_NANDECCED5_ERRDATA21_Pos) /*!< NFI_T::NANDECCED5: ERRDATA21 Mask */ - -#define NFI_NANDECCED5_ERRDATA22_Pos (16) /*!< NFI_T::NANDECCED5: ERRDATA22 Position */ -#define NFI_NANDECCED5_ERRDATA22_Msk (0xfful << NFI_NANDECCED5_ERRDATA22_Pos) /*!< NFI_T::NANDECCED5: ERRDATA22 Mask */ - -#define NFI_NANDECCED5_ERRDATA23_Pos (24) /*!< NFI_T::NANDECCED5: ERRDATA23 Position */ -#define NFI_NANDECCED5_ERRDATA23_Msk (0xfful << NFI_NANDECCED5_ERRDATA23_Pos) /*!< NFI_T::NANDECCED5: ERRDATA23 Mask */ - -#define NFI_NANDRA0_Data_Pos (0) /*!< NFI_T::NANDRA0: Data Position */ -#define NFI_NANDRA0_Data_Msk (0xfffffffful << NFI_NANDRA0_Data_Pos) /*!< NFI_T::NANDRA0: Data Mask */ - -#define NFI_NANDRA1_Data_Pos (0) /*!< NFI_T::NANDRA1: Data Position */ -#define NFI_NANDRA1_Data_Msk (0xfffffffful << NFI_NANDRA1_Data_Pos) /*!< NFI_T::NANDRA1: Data Mask */ - -#define NFI_NANDRA2_Data_Pos (0) /*!< NFI_T::NANDRA2: Data Position */ -#define NFI_NANDRA2_Data_Msk (0xfffffffful << NFI_NANDRA2_Data_Pos) /*!< NFI_T::NANDRA2: Data Mask */ - -#define NFI_NANDRA3_Data_Pos (0) /*!< NFI_T::NANDRA3: Data Position */ -#define NFI_NANDRA3_Data_Msk (0xfffffffful << NFI_NANDRA3_Data_Pos) /*!< NFI_T::NANDRA3: Data Mask */ - -#define NFI_NANDRA4_Data_Pos (0) /*!< NFI_T::NANDRA4: Data Position */ -#define NFI_NANDRA4_Data_Msk (0xfffffffful << NFI_NANDRA4_Data_Pos) /*!< NFI_T::NANDRA4: Data Mask */ - -#define NFI_NANDRA5_Data_Pos (0) /*!< NFI_T::NANDRA5: Data Position */ -#define NFI_NANDRA5_Data_Msk (0xfffffffful << NFI_NANDRA5_Data_Pos) /*!< NFI_T::NANDRA5: Data Mask */ - -#define NFI_NANDRA6_Data_Pos (0) /*!< NFI_T::NANDRA6: Data Position */ -#define NFI_NANDRA6_Data_Msk (0xfffffffful << NFI_NANDRA6_Data_Pos) /*!< NFI_T::NANDRA6: Data Mask */ - -#define NFI_NANDRA7_Data_Pos (0) /*!< NFI_T::NANDRA7: Data Position */ -#define NFI_NANDRA7_Data_Msk (0xfffffffful << NFI_NANDRA7_Data_Pos) /*!< NFI_T::NANDRA7: Data Mask */ - -#define NFI_NANDRA8_Data_Pos (0) /*!< NFI_T::NANDRA8: Data Position */ -#define NFI_NANDRA8_Data_Msk (0xfffffffful << NFI_NANDRA8_Data_Pos) /*!< NFI_T::NANDRA8: Data Mask */ - -#define NFI_NANDRA9_Data_Pos (0) /*!< NFI_T::NANDRA9: Data Position */ -#define NFI_NANDRA9_Data_Msk (0xfffffffful << NFI_NANDRA9_Data_Pos) /*!< NFI_T::NANDRA9: Data Mask */ - -#define NFI_NANDRA10_Data_Pos (0) /*!< NFI_T::NANDRA10: Data Position */ -#define NFI_NANDRA10_Data_Msk (0xfffffffful << NFI_NANDRA10_Data_Pos) /*!< NFI_T::NANDRA10: Data Mask */ - -#define NFI_NANDRA11_Data_Pos (0) /*!< NFI_T::NANDRA11: Data Position */ -#define NFI_NANDRA11_Data_Msk (0xfffffffful << NFI_NANDRA11_Data_Pos) /*!< NFI_T::NANDRA11: Data Mask */ - -#define NFI_NANDRA12_Data_Pos (0) /*!< NFI_T::NANDRA12: Data Position */ -#define NFI_NANDRA12_Data_Msk (0xfffffffful << NFI_NANDRA12_Data_Pos) /*!< NFI_T::NANDRA12: Data Mask */ - -#define NFI_NANDRA13_Data_Pos (0) /*!< NFI_T::NANDRA13: Data Position */ -#define NFI_NANDRA13_Data_Msk (0xfffffffful << NFI_NANDRA13_Data_Pos) /*!< NFI_T::NANDRA13: Data Mask */ - -#define NFI_NANDRA14_Data_Pos (0) /*!< NFI_T::NANDRA14: Data Position */ -#define NFI_NANDRA14_Data_Msk (0xfffffffful << NFI_NANDRA14_Data_Pos) /*!< NFI_T::NANDRA14: Data Mask */ - -#define NFI_NANDRA15_Data_Pos (0) /*!< NFI_T::NANDRA15: Data Position */ -#define NFI_NANDRA15_Data_Msk (0xfffffffful << NFI_NANDRA15_Data_Pos) /*!< NFI_T::NANDRA15: Data Mask */ - -#define NFI_NANDRA16_Data_Pos (0) /*!< NFI_T::NANDRA16: Data Position */ -#define NFI_NANDRA16_Data_Msk (0xfffffffful << NFI_NANDRA16_Data_Pos) /*!< NFI_T::NANDRA16: Data Mask */ - -#define NFI_NANDRA17_Data_Pos (0) /*!< NFI_T::NANDRA17: Data Position */ -#define NFI_NANDRA17_Data_Msk (0xfffffffful << NFI_NANDRA17_Data_Pos) /*!< NFI_T::NANDRA17: Data Mask */ - -#define NFI_NANDRA18_Data_Pos (0) /*!< NFI_T::NANDRA18: Data Position */ -#define NFI_NANDRA18_Data_Msk (0xfffffffful << NFI_NANDRA18_Data_Pos) /*!< NFI_T::NANDRA18: Data Mask */ - -#define NFI_NANDRA19_Data_Pos (0) /*!< NFI_T::NANDRA19: Data Position */ -#define NFI_NANDRA19_Data_Msk (0xfffffffful << NFI_NANDRA19_Data_Pos) /*!< NFI_T::NANDRA19: Data Mask */ - -#define NFI_NANDRA20_Data_Pos (0) /*!< NFI_T::NANDRA20: Data Position */ -#define NFI_NANDRA20_Data_Msk (0xfffffffful << NFI_NANDRA20_Data_Pos) /*!< NFI_T::NANDRA20: Data Mask */ - -#define NFI_NANDRA21_Data_Pos (0) /*!< NFI_T::NANDRA21: Data Position */ -#define NFI_NANDRA21_Data_Msk (0xfffffffful << NFI_NANDRA21_Data_Pos) /*!< NFI_T::NANDRA21: Data Mask */ - -#define NFI_NANDRA22_Data_Pos (0) /*!< NFI_T::NANDRA22: Data Position */ -#define NFI_NANDRA22_Data_Msk (0xfffffffful << NFI_NANDRA22_Data_Pos) /*!< NFI_T::NANDRA22: Data Mask */ - -#define NFI_NANDRA23_Data_Pos (0) /*!< NFI_T::NANDRA23: Data Position */ -#define NFI_NANDRA23_Data_Msk (0xfffffffful << NFI_NANDRA23_Data_Pos) /*!< NFI_T::NANDRA23: Data Mask */ - -#define NFI_NANDRA24_Data_Pos (0) /*!< NFI_T::NANDRA24: Data Position */ -#define NFI_NANDRA24_Data_Msk (0xfffffffful << NFI_NANDRA24_Data_Pos) /*!< NFI_T::NANDRA24: Data Mask */ - -#define NFI_NANDRA25_Data_Pos (0) /*!< NFI_T::NANDRA25: Data Position */ -#define NFI_NANDRA25_Data_Msk (0xfffffffful << NFI_NANDRA25_Data_Pos) /*!< NFI_T::NANDRA25: Data Mask */ - -#define NFI_NANDRA26_Data_Pos (0) /*!< NFI_T::NANDRA26: Data Position */ -#define NFI_NANDRA26_Data_Msk (0xfffffffful << NFI_NANDRA26_Data_Pos) /*!< NFI_T::NANDRA26: Data Mask */ - -#define NFI_NANDRA27_Data_Pos (0) /*!< NFI_T::NANDRA27: Data Position */ -#define NFI_NANDRA27_Data_Msk (0xfffffffful << NFI_NANDRA27_Data_Pos) /*!< NFI_T::NANDRA27: Data Mask */ - -#define NFI_NANDRA28_Data_Pos (0) /*!< NFI_T::NANDRA28: Data Position */ -#define NFI_NANDRA28_Data_Msk (0xfffffffful << NFI_NANDRA28_Data_Pos) /*!< NFI_T::NANDRA28: Data Mask */ - -#define NFI_NANDRA29_Data_Pos (0) /*!< NFI_T::NANDRA29: Data Position */ -#define NFI_NANDRA29_Data_Msk (0xfffffffful << NFI_NANDRA29_Data_Pos) /*!< NFI_T::NANDRA29: Data Mask */ - -#define NFI_NANDRA30_Data_Pos (0) /*!< NFI_T::NANDRA30: Data Position */ -#define NFI_NANDRA30_Data_Msk (0xfffffffful << NFI_NANDRA30_Data_Pos) /*!< NFI_T::NANDRA30: Data Mask */ - -#define NFI_NANDRA31_Data_Pos (0) /*!< NFI_T::NANDRA31: Data Position */ -#define NFI_NANDRA31_Data_Msk (0xfffffffful << NFI_NANDRA31_Data_Pos) /*!< NFI_T::NANDRA31: Data Mask */ - -#define NFI_NANDRA32_Data_Pos (0) /*!< NFI_T::NANDRA32: Data Position */ -#define NFI_NANDRA32_Data_Msk (0xfffffffful << NFI_NANDRA32_Data_Pos) /*!< NFI_T::NANDRA32: Data Mask */ - -#define NFI_NANDRA33_Data_Pos (0) /*!< NFI_T::NANDRA33: Data Position */ -#define NFI_NANDRA33_Data_Msk (0xfffffffful << NFI_NANDRA33_Data_Pos) /*!< NFI_T::NANDRA33: Data Mask */ - -#define NFI_NANDRA34_Data_Pos (0) /*!< NFI_T::NANDRA34: Data Position */ -#define NFI_NANDRA34_Data_Msk (0xfffffffful << NFI_NANDRA34_Data_Pos) /*!< NFI_T::NANDRA34: Data Mask */ - -#define NFI_NANDRA35_Data_Pos (0) /*!< NFI_T::NANDRA35: Data Position */ -#define NFI_NANDRA35_Data_Msk (0xfffffffful << NFI_NANDRA35_Data_Pos) /*!< NFI_T::NANDRA35: Data Mask */ - -#define NFI_NANDRA36_Data_Pos (0) /*!< NFI_T::NANDRA36: Data Position */ -#define NFI_NANDRA36_Data_Msk (0xfffffffful << NFI_NANDRA36_Data_Pos) /*!< NFI_T::NANDRA36: Data Mask */ - -#define NFI_NANDRA37_Data_Pos (0) /*!< NFI_T::NANDRA37: Data Position */ -#define NFI_NANDRA37_Data_Msk (0xfffffffful << NFI_NANDRA37_Data_Pos) /*!< NFI_T::NANDRA37: Data Mask */ - -#define NFI_NANDRA38_Data_Pos (0) /*!< NFI_T::NANDRA38: Data Position */ -#define NFI_NANDRA38_Data_Msk (0xfffffffful << NFI_NANDRA38_Data_Pos) /*!< NFI_T::NANDRA38: Data Mask */ - -#define NFI_NANDRA39_Data_Pos (0) /*!< NFI_T::NANDRA39: Data Position */ -#define NFI_NANDRA39_Data_Msk (0xfffffffful << NFI_NANDRA39_Data_Pos) /*!< NFI_T::NANDRA39: Data Mask */ - -#define NFI_NANDRA40_Data_Pos (0) /*!< NFI_T::NANDRA40: Data Position */ -#define NFI_NANDRA40_Data_Msk (0xfffffffful << NFI_NANDRA40_Data_Pos) /*!< NFI_T::NANDRA40: Data Mask */ - -#define NFI_NANDRA41_Data_Pos (0) /*!< NFI_T::NANDRA41: Data Position */ -#define NFI_NANDRA41_Data_Msk (0xfffffffful << NFI_NANDRA41_Data_Pos) /*!< NFI_T::NANDRA41: Data Mask */ - -#define NFI_NANDRA42_Data_Pos (0) /*!< NFI_T::NANDRA42: Data Position */ -#define NFI_NANDRA42_Data_Msk (0xfffffffful << NFI_NANDRA42_Data_Pos) /*!< NFI_T::NANDRA42: Data Mask */ - -#define NFI_NANDRA43_Data_Pos (0) /*!< NFI_T::NANDRA43: Data Position */ -#define NFI_NANDRA43_Data_Msk (0xfffffffful << NFI_NANDRA43_Data_Pos) /*!< NFI_T::NANDRA43: Data Mask */ - -#define NFI_NANDRA44_Data_Pos (0) /*!< NFI_T::NANDRA44: Data Position */ -#define NFI_NANDRA44_Data_Msk (0xfffffffful << NFI_NANDRA44_Data_Pos) /*!< NFI_T::NANDRA44: Data Mask */ - -#define NFI_NANDRA45_Data_Pos (0) /*!< NFI_T::NANDRA45: Data Position */ -#define NFI_NANDRA45_Data_Msk (0xfffffffful << NFI_NANDRA45_Data_Pos) /*!< NFI_T::NANDRA45: Data Mask */ - -#define NFI_NANDRA46_Data_Pos (0) /*!< NFI_T::NANDRA46: Data Position */ -#define NFI_NANDRA46_Data_Msk (0xfffffffful << NFI_NANDRA46_Data_Pos) /*!< NFI_T::NANDRA46: Data Mask */ - -#define NFI_NANDRA47_Data_Pos (0) /*!< NFI_T::NANDRA47: Data Position */ -#define NFI_NANDRA47_Data_Msk (0xfffffffful << NFI_NANDRA47_Data_Pos) /*!< NFI_T::NANDRA47: Data Mask */ - -#define NFI_NANDRA48_Data_Pos (0) /*!< NFI_T::NANDRA48: Data Position */ -#define NFI_NANDRA48_Data_Msk (0xfffffffful << NFI_NANDRA48_Data_Pos) /*!< NFI_T::NANDRA48: Data Mask */ - -#define NFI_NANDRA49_Data_Pos (0) /*!< NFI_T::NANDRA49: Data Position */ -#define NFI_NANDRA49_Data_Msk (0xfffffffful << NFI_NANDRA49_Data_Pos) /*!< NFI_T::NANDRA49: Data Mask */ - -#define NFI_NANDRA50_Data_Pos (0) /*!< NFI_T::NANDRA50: Data Position */ -#define NFI_NANDRA50_Data_Msk (0xfffffffful << NFI_NANDRA50_Data_Pos) /*!< NFI_T::NANDRA50: Data Mask */ - -#define NFI_NANDRA51_Data_Pos (0) /*!< NFI_T::NANDRA51: Data Position */ -#define NFI_NANDRA51_Data_Msk (0xfffffffful << NFI_NANDRA51_Data_Pos) /*!< NFI_T::NANDRA51: Data Mask */ - -#define NFI_NANDRA52_Data_Pos (0) /*!< NFI_T::NANDRA52: Data Position */ -#define NFI_NANDRA52_Data_Msk (0xfffffffful << NFI_NANDRA52_Data_Pos) /*!< NFI_T::NANDRA52: Data Mask */ - -#define NFI_NANDRA53_Data_Pos (0) /*!< NFI_T::NANDRA53: Data Position */ -#define NFI_NANDRA53_Data_Msk (0xfffffffful << NFI_NANDRA53_Data_Pos) /*!< NFI_T::NANDRA53: Data Mask */ - -#define NFI_NANDRA54_Data_Pos (0) /*!< NFI_T::NANDRA54: Data Position */ -#define NFI_NANDRA54_Data_Msk (0xfffffffful << NFI_NANDRA54_Data_Pos) /*!< NFI_T::NANDRA54: Data Mask */ - -#define NFI_NANDRA55_Data_Pos (0) /*!< NFI_T::NANDRA55: Data Position */ -#define NFI_NANDRA55_Data_Msk (0xfffffffful << NFI_NANDRA55_Data_Pos) /*!< NFI_T::NANDRA55: Data Mask */ - -#define NFI_NANDRA56_Data_Pos (0) /*!< NFI_T::NANDRA56: Data Position */ -#define NFI_NANDRA56_Data_Msk (0xfffffffful << NFI_NANDRA56_Data_Pos) /*!< NFI_T::NANDRA56: Data Mask */ - -#define NFI_NANDRA57_Data_Pos (0) /*!< NFI_T::NANDRA57: Data Position */ -#define NFI_NANDRA57_Data_Msk (0xfffffffful << NFI_NANDRA57_Data_Pos) /*!< NFI_T::NANDRA57: Data Mask */ - -#define NFI_NANDRA58_Data_Pos (0) /*!< NFI_T::NANDRA58: Data Position */ -#define NFI_NANDRA58_Data_Msk (0xfffffffful << NFI_NANDRA58_Data_Pos) /*!< NFI_T::NANDRA58: Data Mask */ - -#define NFI_NANDRA59_Data_Pos (0) /*!< NFI_T::NANDRA59: Data Position */ -#define NFI_NANDRA59_Data_Msk (0xfffffffful << NFI_NANDRA59_Data_Pos) /*!< NFI_T::NANDRA59: Data Mask */ - -#define NFI_NANDRA60_Data_Pos (0) /*!< NFI_T::NANDRA60: Data Position */ -#define NFI_NANDRA60_Data_Msk (0xfffffffful << NFI_NANDRA60_Data_Pos) /*!< NFI_T::NANDRA60: Data Mask */ - -#define NFI_NANDRA61_Data_Pos (0) /*!< NFI_T::NANDRA61: Data Position */ -#define NFI_NANDRA61_Data_Msk (0xfffffffful << NFI_NANDRA61_Data_Pos) /*!< NFI_T::NANDRA61: Data Mask */ - -#define NFI_NANDRA62_Data_Pos (0) /*!< NFI_T::NANDRA62: Data Position */ -#define NFI_NANDRA62_Data_Msk (0xfffffffful << NFI_NANDRA62_Data_Pos) /*!< NFI_T::NANDRA62: Data Mask */ - -#define NFI_NANDRA63_Data_Pos (0) /*!< NFI_T::NANDRA63: Data Position */ -#define NFI_NANDRA63_Data_Msk (0xfffffffful << NFI_NANDRA63_Data_Pos) /*!< NFI_T::NANDRA63: Data Mask */ - -#define NFI_NANDRA64_Data_Pos (0) /*!< NFI_T::NANDRA64: Data Position */ -#define NFI_NANDRA64_Data_Msk (0xfffffffful << NFI_NANDRA64_Data_Pos) /*!< NFI_T::NANDRA64: Data Mask */ - -#define NFI_NANDRA65_Data_Pos (0) /*!< NFI_T::NANDRA65: Data Position */ -#define NFI_NANDRA65_Data_Msk (0xfffffffful << NFI_NANDRA65_Data_Pos) /*!< NFI_T::NANDRA65: Data Mask */ - -#define NFI_NANDRA66_Data_Pos (0) /*!< NFI_T::NANDRA66: Data Position */ -#define NFI_NANDRA66_Data_Msk (0xfffffffful << NFI_NANDRA66_Data_Pos) /*!< NFI_T::NANDRA66: Data Mask */ - -#define NFI_NANDRA67_Data_Pos (0) /*!< NFI_T::NANDRA67: Data Position */ -#define NFI_NANDRA67_Data_Msk (0xfffffffful << NFI_NANDRA67_Data_Pos) /*!< NFI_T::NANDRA67: Data Mask */ - -#define NFI_NANDRA68_Data_Pos (0) /*!< NFI_T::NANDRA68: Data Position */ -#define NFI_NANDRA68_Data_Msk (0xfffffffful << NFI_NANDRA68_Data_Pos) /*!< NFI_T::NANDRA68: Data Mask */ - -#define NFI_NANDRA69_Data_Pos (0) /*!< NFI_T::NANDRA69: Data Position */ -#define NFI_NANDRA69_Data_Msk (0xfffffffful << NFI_NANDRA69_Data_Pos) /*!< NFI_T::NANDRA69: Data Mask */ - -#define NFI_NANDRA70_Data_Pos (0) /*!< NFI_T::NANDRA70: Data Position */ -#define NFI_NANDRA70_Data_Msk (0xfffffffful << NFI_NANDRA70_Data_Pos) /*!< NFI_T::NANDRA70: Data Mask */ - -#define NFI_NANDRA71_Data_Pos (0) /*!< NFI_T::NANDRA71: Data Position */ -#define NFI_NANDRA71_Data_Msk (0xfffffffful << NFI_NANDRA71_Data_Pos) /*!< NFI_T::NANDRA71: Data Mask */ - -#define NFI_NANDRA72_Data_Pos (0) /*!< NFI_T::NANDRA72: Data Position */ -#define NFI_NANDRA72_Data_Msk (0xfffffffful << NFI_NANDRA72_Data_Pos) /*!< NFI_T::NANDRA72: Data Mask */ - -#define NFI_NANDRA73_Data_Pos (0) /*!< NFI_T::NANDRA73: Data Position */ -#define NFI_NANDRA73_Data_Msk (0xfffffffful << NFI_NANDRA73_Data_Pos) /*!< NFI_T::NANDRA73: Data Mask */ - -#define NFI_NANDRA74_Data_Pos (0) /*!< NFI_T::NANDRA74: Data Position */ -#define NFI_NANDRA74_Data_Msk (0xfffffffful << NFI_NANDRA74_Data_Pos) /*!< NFI_T::NANDRA74: Data Mask */ - -#define NFI_NANDRA75_Data_Pos (0) /*!< NFI_T::NANDRA75: Data Position */ -#define NFI_NANDRA75_Data_Msk (0xfffffffful << NFI_NANDRA75_Data_Pos) /*!< NFI_T::NANDRA75: Data Mask */ - -#define NFI_NANDRA76_Data_Pos (0) /*!< NFI_T::NANDRA76: Data Position */ -#define NFI_NANDRA76_Data_Msk (0xfffffffful << NFI_NANDRA76_Data_Pos) /*!< NFI_T::NANDRA76: Data Mask */ - -#define NFI_NANDRA77_Data_Pos (0) /*!< NFI_T::NANDRA77: Data Position */ -#define NFI_NANDRA77_Data_Msk (0xfffffffful << NFI_NANDRA77_Data_Pos) /*!< NFI_T::NANDRA77: Data Mask */ - -#define NFI_NANDRA78_Data_Pos (0) /*!< NFI_T::NANDRA78: Data Position */ -#define NFI_NANDRA78_Data_Msk (0xfffffffful << NFI_NANDRA78_Data_Pos) /*!< NFI_T::NANDRA78: Data Mask */ - -#define NFI_NANDRA79_Data_Pos (0) /*!< NFI_T::NANDRA79: Data Position */ -#define NFI_NANDRA79_Data_Msk (0xfffffffful << NFI_NANDRA79_Data_Pos) /*!< NFI_T::NANDRA79: Data Mask */ - -#define NFI_NANDRA80_Data_Pos (0) /*!< NFI_T::NANDRA80: Data Position */ -#define NFI_NANDRA80_Data_Msk (0xfffffffful << NFI_NANDRA80_Data_Pos) /*!< NFI_T::NANDRA80: Data Mask */ - -#define NFI_NANDRA81_Data_Pos (0) /*!< NFI_T::NANDRA81: Data Position */ -#define NFI_NANDRA81_Data_Msk (0xfffffffful << NFI_NANDRA81_Data_Pos) /*!< NFI_T::NANDRA81: Data Mask */ - -#define NFI_NANDRA82_Data_Pos (0) /*!< NFI_T::NANDRA82: Data Position */ -#define NFI_NANDRA82_Data_Msk (0xfffffffful << NFI_NANDRA82_Data_Pos) /*!< NFI_T::NANDRA82: Data Mask */ - -#define NFI_NANDRA83_Data_Pos (0) /*!< NFI_T::NANDRA83: Data Position */ -#define NFI_NANDRA83_Data_Msk (0xfffffffful << NFI_NANDRA83_Data_Pos) /*!< NFI_T::NANDRA83: Data Mask */ - -#define NFI_NANDRA84_Data_Pos (0) /*!< NFI_T::NANDRA84: Data Position */ -#define NFI_NANDRA84_Data_Msk (0xfffffffful << NFI_NANDRA84_Data_Pos) /*!< NFI_T::NANDRA84: Data Mask */ - -#define NFI_NANDRA85_Data_Pos (0) /*!< NFI_T::NANDRA85: Data Position */ -#define NFI_NANDRA85_Data_Msk (0xfffffffful << NFI_NANDRA85_Data_Pos) /*!< NFI_T::NANDRA85: Data Mask */ - -#define NFI_NANDRA86_Data_Pos (0) /*!< NFI_T::NANDRA86: Data Position */ -#define NFI_NANDRA86_Data_Msk (0xfffffffful << NFI_NANDRA86_Data_Pos) /*!< NFI_T::NANDRA86: Data Mask */ - -#define NFI_NANDRA87_Data_Pos (0) /*!< NFI_T::NANDRA87: Data Position */ -#define NFI_NANDRA87_Data_Msk (0xfffffffful << NFI_NANDRA87_Data_Pos) /*!< NFI_T::NANDRA87: Data Mask */ - -#define NFI_NANDRA88_Data_Pos (0) /*!< NFI_T::NANDRA88: Data Position */ -#define NFI_NANDRA88_Data_Msk (0xfffffffful << NFI_NANDRA88_Data_Pos) /*!< NFI_T::NANDRA88: Data Mask */ - -#define NFI_NANDRA89_Data_Pos (0) /*!< NFI_T::NANDRA89: Data Position */ -#define NFI_NANDRA89_Data_Msk (0xfffffffful << NFI_NANDRA89_Data_Pos) /*!< NFI_T::NANDRA89: Data Mask */ - -#define NFI_NANDRA90_Data_Pos (0) /*!< NFI_T::NANDRA90: Data Position */ -#define NFI_NANDRA90_Data_Msk (0xfffffffful << NFI_NANDRA90_Data_Pos) /*!< NFI_T::NANDRA90: Data Mask */ - -#define NFI_NANDRA91_Data_Pos (0) /*!< NFI_T::NANDRA91: Data Position */ -#define NFI_NANDRA91_Data_Msk (0xfffffffful << NFI_NANDRA91_Data_Pos) /*!< NFI_T::NANDRA91: Data Mask */ - -#define NFI_NANDRA92_Data_Pos (0) /*!< NFI_T::NANDRA92: Data Position */ -#define NFI_NANDRA92_Data_Msk (0xfffffffful << NFI_NANDRA92_Data_Pos) /*!< NFI_T::NANDRA92: Data Mask */ - -#define NFI_NANDRA93_Data_Pos (0) /*!< NFI_T::NANDRA93: Data Position */ -#define NFI_NANDRA93_Data_Msk (0xfffffffful << NFI_NANDRA93_Data_Pos) /*!< NFI_T::NANDRA93: Data Mask */ - -#define NFI_NANDRA94_Data_Pos (0) /*!< NFI_T::NANDRA94: Data Position */ -#define NFI_NANDRA94_Data_Msk (0xfffffffful << NFI_NANDRA94_Data_Pos) /*!< NFI_T::NANDRA94: Data Mask */ - -#define NFI_NANDRA95_Data_Pos (0) /*!< NFI_T::NANDRA95: Data Position */ -#define NFI_NANDRA95_Data_Msk (0xfffffffful << NFI_NANDRA95_Data_Pos) /*!< NFI_T::NANDRA95: Data Mask */ - -#define NFI_NANDRA96_Data_Pos (0) /*!< NFI_T::NANDRA96: Data Position */ -#define NFI_NANDRA96_Data_Msk (0xfffffffful << NFI_NANDRA96_Data_Pos) /*!< NFI_T::NANDRA96: Data Mask */ - -#define NFI_NANDRA97_Data_Pos (0) /*!< NFI_T::NANDRA97: Data Position */ -#define NFI_NANDRA97_Data_Msk (0xfffffffful << NFI_NANDRA97_Data_Pos) /*!< NFI_T::NANDRA97: Data Mask */ - -#define NFI_NANDRA98_Data_Pos (0) /*!< NFI_T::NANDRA98: Data Position */ -#define NFI_NANDRA98_Data_Msk (0xfffffffful << NFI_NANDRA98_Data_Pos) /*!< NFI_T::NANDRA98: Data Mask */ - -#define NFI_NANDRA99_Data_Pos (0) /*!< NFI_T::NANDRA99: Data Position */ -#define NFI_NANDRA99_Data_Msk (0xfffffffful << NFI_NANDRA99_Data_Pos) /*!< NFI_T::NANDRA99: Data Mask */ - -#define NFI_NANDRA100_Data_Pos (0) /*!< NFI_T::NANDRA100: Data Position */ -#define NFI_NANDRA100_Data_Msk (0xfffffffful << NFI_NANDRA100_Data_Pos) /*!< NFI_T::NANDRA100: Data Mask */ - -#define NFI_NANDRA101_Data_Pos (0) /*!< NFI_T::NANDRA101: Data Position */ -#define NFI_NANDRA101_Data_Msk (0xfffffffful << NFI_NANDRA101_Data_Pos) /*!< NFI_T::NANDRA101: Data Mask */ - -#define NFI_NANDRA102_Data_Pos (0) /*!< NFI_T::NANDRA102: Data Position */ -#define NFI_NANDRA102_Data_Msk (0xfffffffful << NFI_NANDRA102_Data_Pos) /*!< NFI_T::NANDRA102: Data Mask */ - -#define NFI_NANDRA103_Data_Pos (0) /*!< NFI_T::NANDRA103: Data Position */ -#define NFI_NANDRA103_Data_Msk (0xfffffffful << NFI_NANDRA103_Data_Pos) /*!< NFI_T::NANDRA103: Data Mask */ - -#define NFI_NANDRA104_Data_Pos (0) /*!< NFI_T::NANDRA104: Data Position */ -#define NFI_NANDRA104_Data_Msk (0xfffffffful << NFI_NANDRA104_Data_Pos) /*!< NFI_T::NANDRA104: Data Mask */ - -#define NFI_NANDRA105_Data_Pos (0) /*!< NFI_T::NANDRA105: Data Position */ -#define NFI_NANDRA105_Data_Msk (0xfffffffful << NFI_NANDRA105_Data_Pos) /*!< NFI_T::NANDRA105: Data Mask */ - -#define NFI_NANDRA106_Data_Pos (0) /*!< NFI_T::NANDRA106: Data Position */ -#define NFI_NANDRA106_Data_Msk (0xfffffffful << NFI_NANDRA106_Data_Pos) /*!< NFI_T::NANDRA106: Data Mask */ - -#define NFI_NANDRA107_Data_Pos (0) /*!< NFI_T::NANDRA107: Data Position */ -#define NFI_NANDRA107_Data_Msk (0xfffffffful << NFI_NANDRA107_Data_Pos) /*!< NFI_T::NANDRA107: Data Mask */ - -#define NFI_NANDRA108_Data_Pos (0) /*!< NFI_T::NANDRA108: Data Position */ -#define NFI_NANDRA108_Data_Msk (0xfffffffful << NFI_NANDRA108_Data_Pos) /*!< NFI_T::NANDRA108: Data Mask */ - -#define NFI_NANDRA109_Data_Pos (0) /*!< NFI_T::NANDRA109: Data Position */ -#define NFI_NANDRA109_Data_Msk (0xfffffffful << NFI_NANDRA109_Data_Pos) /*!< NFI_T::NANDRA109: Data Mask */ - -#define NFI_NANDRA110_Data_Pos (0) /*!< NFI_T::NANDRA110: Data Position */ -#define NFI_NANDRA110_Data_Msk (0xfffffffful << NFI_NANDRA110_Data_Pos) /*!< NFI_T::NANDRA110: Data Mask */ - -#define NFI_NANDRA111_Data_Pos (0) /*!< NFI_T::NANDRA111: Data Position */ -#define NFI_NANDRA111_Data_Msk (0xfffffffful << NFI_NANDRA111_Data_Pos) /*!< NFI_T::NANDRA111: Data Mask */ - -#define NFI_NANDRA112_Data_Pos (0) /*!< NFI_T::NANDRA112: Data Position */ -#define NFI_NANDRA112_Data_Msk (0xfffffffful << NFI_NANDRA112_Data_Pos) /*!< NFI_T::NANDRA112: Data Mask */ - -#define NFI_NANDRA113_Data_Pos (0) /*!< NFI_T::NANDRA113: Data Position */ -#define NFI_NANDRA113_Data_Msk (0xfffffffful << NFI_NANDRA113_Data_Pos) /*!< NFI_T::NANDRA113: Data Mask */ - -#define NFI_NANDRA114_Data_Pos (0) /*!< NFI_T::NANDRA114: Data Position */ -#define NFI_NANDRA114_Data_Msk (0xfffffffful << NFI_NANDRA114_Data_Pos) /*!< NFI_T::NANDRA114: Data Mask */ - -#define NFI_NANDRA115_Data_Pos (0) /*!< NFI_T::NANDRA115: Data Position */ -#define NFI_NANDRA115_Data_Msk (0xfffffffful << NFI_NANDRA115_Data_Pos) /*!< NFI_T::NANDRA115: Data Mask */ - -#define NFI_NANDRA116_Data_Pos (0) /*!< NFI_T::NANDRA116: Data Position */ -#define NFI_NANDRA116_Data_Msk (0xfffffffful << NFI_NANDRA116_Data_Pos) /*!< NFI_T::NANDRA116: Data Mask */ - -#define NFI_NANDRA117_Data_Pos (0) /*!< NFI_T::NANDRA117: Data Position */ -#define NFI_NANDRA117_Data_Msk (0xfffffffful << NFI_NANDRA117_Data_Pos) /*!< NFI_T::NANDRA117: Data Mask */ +#define NFI_NANDRA_Data_Pos (0) /*!< NFI_T::NANDRA: Data Position */ +#define NFI_NANDRA_Data_Msk (0xfffffffful << NFI_NANDRA_Data_Pos) /*!< NFI_T::NANDRA: Data Mask */ /**@}*/ /* NFI_CONST */ /**@}*/ /* end of NFI register group */ diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/SConscript b/bsp/nuvoton/libraries/ma35/StdDriver/SConscript index 9431744b64..6ccd1e29be 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/SConscript +++ b/bsp/nuvoton/libraries/ma35/StdDriver/SConscript @@ -8,6 +8,20 @@ src = Glob('*src/*.c') + Glob('src/*.cpp') cpppath = [cwd + '/inc'] libpath = [cwd + '/lib'] -group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath) + +if not GetDepend('BSP_USE_STDDRIVER_SOURCE'): + if rtconfig.CROSS_TOOL == 'keil': + if GetOption('target') == 'mdk5' and os.path.isfile('./lib/libstddriver_keil.lib'): + libs += ['libstddriver_keil'] + elif rtconfig.CROSS_TOOL == 'gcc' and os.path.isfile('./lib/libstddriver_gcc_CM4.a') and GetDepend('USE_MA35D1_SUBM'): + libs += ['libstddriver_gcc_CM4'] + elif rtconfig.CROSS_TOOL == 'gcc' and os.path.isfile('./lib/libstddriver_gcc_CA35.a') and GetDepend('USE_MA35D1_AARCH32'): + libs += ['libstddriver_gcc_CA35'] + +if not libs: + group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath) +else: + src = [] + group = DefineGroup('Libraries', src, depend = [''], CPPPATH = cpppath, LIBS = libs, LIBPATH = libpath) Return('group') diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h index 07cffd0bf3..ac5f0ce84e 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h +++ b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_clk.h @@ -363,9 +363,9 @@ extern "C" #define PDMA1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(1UL<<0)) /*!< PDMA1 Module \hideinitializer */ #define PDMA2_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(2UL<<0)) /*!< PDMA2 Module \hideinitializer */ #define PDMA3_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(3UL<<0)) /*!< PDMA3 Module \hideinitializer */ -#define WH0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< WH0 Module \hideinitializer */ -#define WH1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< WH1 Module \hideinitializer */ -#define HWS_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< HWS Module \hideinitializer */ +#define WHC0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(4UL<<0)) /*!< WH0 Module \hideinitializer */ +#define WHC1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(5UL<<0)) /*!< WH1 Module \hideinitializer */ +#define HWSEM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(6UL<<0)) /*!< HWS Module \hideinitializer */ #define EBI_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(7UL<<0)) /*!< EBI Module \hideinitializer */ #define SRAM0_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(8UL<<0)) /*!< SRAM0 Module \hideinitializer */ #define SRAM1_MODULE ((1UL<<29)|(MODULE_NoMsk<<26)|(MODULE_NoMsk<<22)|(MODULE_NoMsk<<17)|(MODULE_NoMsk<<14)|(MODULE_NoMsk<<10)|(MODULE_NoMsk<<5)|(9UL<<0)) /*!< SRAM1 Module \hideinitializer */ diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_disp.h b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_disp.h index 5bd63f9060..2c9ae7327b 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_disp.h +++ b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_disp.h @@ -190,6 +190,7 @@ void DISP_SetBlendValue(uint32_t u32GloAV_Src, uint32_t u32GloAV_Dst); void DISP_SetColorKeyValue(uint32_t u32ColorKeyLow, uint32_t u32ColorKeyHigh); int DISP_SetFBAddr(E_DISP_LAYER eLayer, uint32_t u32DMAFBStartAddr); int DISP_SetFBFmt(E_DISP_LAYER eLayer, E_FB_FMT eFbFmt, uint32_t u32Pitch); +uint32_t DISP_LCDTIMING_GetFPS(const DISP_LCD_TIMING* psDispLCDTiming); /*@}*/ /* end of group DISP_EXPORTED_FUNCTIONS */ diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_hwsem.h b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_hwsem.h index 551df1471d..a46de00ae0 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_hwsem.h +++ b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_hwsem.h @@ -13,6 +13,11 @@ extern "C" { #endif +#ifdef __has_include + #if __has_include("rtconfig.h") + #include "rtconfig.h" + #endif +#endif /** @addtogroup Standard_Driver Standard Driver @{ @@ -26,9 +31,23 @@ extern "C" @{ */ #define HWSEM_CNT 8ul /*!SEM[(u32Num)] & (HWSEM_SEM_ID_Msk)) +/** + * @brief + * + * @param[in] hwsem The pointer of the specified HWSEM module. + * @param[in] u32Num HWSEM number, valid values are between 0~7 + * + * @retval 0 The key of specified semaphore. + * \hideinitializer + */ +#define HWSEM_GET_KEY(hwsem, u32Num) (((hwsem)->SEM[(u32Num)]&HWSEM_SEM_KEY_Msk) >> HWSEM_SEM_KEY_Pos) + /** * @brief Enable specified HWSEM interrupt * @@ -67,7 +97,7 @@ extern "C" * * \hideinitializer */ -#define HWSEM_ENABLE_INT(hwsem, u32Num) ((hwsem)->INTENM4 |= (HWSEM_INTENM4_SEM0IEN_Msk << (u32Num))) +#define HWSEM_ENABLE_INT(hwsem, u32Num) ((hwsem)->INTEN_CORE |= (HWSEM_INTEN_SEM0IEN_Msk << (u32Num))) /** @@ -79,7 +109,7 @@ extern "C" * * \hideinitializer */ -#define HWSEM_DISABLE_INT(hwsem, u32Num) ((hwsem)->INTENM4 &= ~(HWSEM_INTENM4_SEM0IEN_Msk << (u32Num))) +#define HWSEM_DISABLE_INT(hwsem, u32Num) ((hwsem)->INTEN_CORE &= ~(HWSEM_INTEN_SEM0IEN_Msk << (u32Num))) /** * @brief Get specified interrupt flag @@ -91,7 +121,7 @@ extern "C" * Otherwise The specified interrupt is happened. * \hideinitializer */ -#define HWSEM_GET_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTSM4 & (HWSEM_INTSTSM4_SEM0IF_Msk << (u32Num))) +#define HWSEM_GET_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTS_CORE & (HWSEM_INTSTS_SEM0IF_Msk << (u32Num))) /** @@ -102,7 +132,7 @@ extern "C" * * \hideinitializer */ -#define HWSEM_CLR_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTSM4 = (HWSEM_INTSTSM4_SEM0IF_Msk << (u32Num))) +#define HWSEM_CLR_INT_FLAG(hwsem, u32Num) ((hwsem)->INTSTS_CORE = (HWSEM_INTSTS_SEM0IF_Msk << (u32Num))) /** @@ -115,6 +145,7 @@ extern "C" * \hideinitializer */ #define HWSEM_UNLOCK(hwsem, u32Num, u8Key) ((hwsem)->SEM[(u32Num)] = ((u8Key) << HWSEM_SEM_KEY_Pos) & HWSEM_SEM_KEY_Msk) +#define HWSEM_LOCK HWSEM_UNLOCK /* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */ __STATIC_INLINE int32_t HWSEM_Try_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8Key); @@ -133,7 +164,7 @@ __STATIC_INLINE void HWSEM_Spin_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8 __STATIC_INLINE int32_t HWSEM_Try_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8Key) { hwsem->SEM[u32Num] = (u8Key << HWSEM_SEM_KEY_Pos); - if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_M4 && + if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_OWNER && (hwsem->SEM[u32Num] & HWSEM_SEM_KEY_Msk) == (u8Key << HWSEM_SEM_KEY_Pos)) return 0; else @@ -154,7 +185,7 @@ __STATIC_INLINE void HWSEM_Spin_Lock(HWSEM_T *hwsem, uint32_t u32Num, uint8_t u8 while (1) { hwsem->SEM[u32Num] = (u8Key << HWSEM_SEM_KEY_Pos); - if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_M4 && + if ((hwsem->SEM[u32Num] & HWSEM_SEM_ID_Msk) == HWSEM_LOCK_BY_OWNER && (hwsem->SEM[u32Num] & HWSEM_SEM_KEY_Msk) == (u8Key << HWSEM_SEM_KEY_Pos)) break; } diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sdh.h b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sdh.h index 4473f6fba1..1f6aec5b57 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sdh.h +++ b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sdh.h @@ -8,6 +8,10 @@ #ifndef __NU_SDH_H__ #define __NU_SDH_H__ +#if defined ( __CC_ARM ) + #pragma anon_unions +#endif + #ifdef __cplusplus extern "C" { @@ -116,6 +120,10 @@ void SDH_SetPower(SDH_T *sdh, uint32_t u32OnOff); } #endif +#if defined ( __CC_ARM ) + #pragma no_anon_unions +#endif + #endif diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sys.h b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sys.h index 567d9b5f10..f7cf078ffe 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sys.h +++ b/bsp/nuvoton/libraries/ma35/StdDriver/inc/nu_sys.h @@ -36,15 +36,15 @@ extern "C" #define PDMA2_RST ((0UL<<24) | SYS_IPRST0_PDMA2RST_Pos) /*!< Reset PDMA2 \hideinitializer */ #define PDMA3_RST ((0UL<<24) | SYS_IPRST0_PDMA3RST_Pos) /*!< Reset PDMA3 \hideinitializer */ #define DISPC_RST ((0UL<<24) | SYS_IPRST0_DISPCRST_Pos) /*!< Reset DISPC \hideinitializer */ -#define CCAP0_RST ((0UL<<24) | SYS_IPRST0_CCAP0RST_Pos) /*!< Reset VCAP0 \hideinitializer */ -#define CCAP1_RST ((0UL<<24) | SYS_IPRST0_CCAP1RST_Pos) /*!< Reset VCAP1 \hideinitializer */ +#define CCAP0_RST ((0UL<<24) | SYS_IPRST0_CCAP0RST_Pos) /*!< Reset CCAP0 \hideinitializer */ +#define CCAP1_RST ((0UL<<24) | SYS_IPRST0_CCAP1RST_Pos) /*!< Reset CCAP1 \hideinitializer */ #define GFX_RST ((0UL<<24) | SYS_IPRST0_GFXRST_Pos) /*!< Reset GFX \hideinitializer */ #define VDEC_RST ((0UL<<24) | SYS_IPRST0_VDECRST_Pos) /*!< Reset VDEC \hideinitializer */ -#define WRHO0_RST ((0UL<<24) | SYS_IPRST0_WRHO0RST_Pos) /*!< Reset WRHO0 \hideinitializer */ -#define WRHO1_RST ((0UL<<24) | SYS_IPRST0_WRHO1RST_Pos) /*!< Reset WRHO1 \hideinitializer */ +#define WHC0_RST ((0UL<<24) | SYS_IPRST0_WRHO0RST_Pos) /*!< Reset WRHO0 \hideinitializer */ +#define WHC1_RST ((0UL<<24) | SYS_IPRST0_WRHO1RST_Pos) /*!< Reset WRHO1 \hideinitializer */ #define GMAC0_RST ((0UL<<24) | SYS_IPRST0_GMAC0RST_Pos) /*!< Reset GMAC0 \hideinitializer */ #define GMAC1_RST ((0UL<<24) | SYS_IPRST0_GMAC1RST_Pos) /*!< Reset GMAC1 \hideinitializer */ -#define HWSEM_RST ((0UL<<24) | SYS_IPRST0_HWSEMRST_Pos) /*!< Reset HWSEM \hideinitializer */ +#define HWSEM0_RST ((0UL<<24) | SYS_IPRST0_HWSEMRST_Pos) /*!< Reset HWSEM \hideinitializer */ #define EBI_RST ((0UL<<24) | SYS_IPRST0_EBIRST_Pos) /*!< Reset EBI \hideinitializer */ #define HSUSBH0_RST ((0UL<<24) | SYS_IPRST0_HSUSBH0RST_Pos) /*!< Reset HSUSBH0 \hideinitializer */ #define HSUSBH1_RST ((0UL<<24) | SYS_IPRST0_HSUSBH1RST_Pos) /*!< Reset HSUSBH1 \hideinitializer */ @@ -184,7 +184,7 @@ Example 1: If user want to set PA.0 as SC0_CLK in initial function, #define SYS_GPA_MFPH_PA8MFP_GPIO (0x00UL<u32HA + psDispLCDTiming->u32HBP + psDispLCDTiming->u32HFP + psDispLCDTiming->u32HSL; + u32VTotal = psDispLCDTiming->u32VA + psDispLCDTiming->u32VBP + psDispLCDTiming->u32VFP + psDispLCDTiming->u32VSL; + + u32FPS = psDispLCDTiming->u32PCF / u32HTotal / u32VTotal; + } + + return u32FPS; +} + int DISP_Trigger(E_DISP_LAYER eLayer, uint32_t u32Action) { switch (eLayer) diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_i2s.c b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_i2s.c index 6fd974f097..f95507f630 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_i2s.c +++ b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_i2s.c @@ -28,10 +28,8 @@ static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s); * @param[in] i2s The pointer of the specified I2S module. * @return Source clock frequency of I2S peripheral. * @details - * 0: _HXT - * 1: APLL - * 2: PCLK0 - * 3: HIRC + * 0: APLL + * 1: SYSCLK1_DIV2 */ static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s) diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_pdma.c b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_pdma.c index ff56e0ccb8..3e98dbe14f 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_pdma.c +++ b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_pdma.c @@ -240,8 +240,8 @@ void PDMA_SetTransferMode(PDMA_T *pdma, uint32_t u32Ch, uint32_t u32Peripheral, if (u32ScatterEn) { - pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER; pdma->DSCT[u32Ch].NEXT = u32DescAddr; + pdma->DSCT[u32Ch].CTL = (pdma->DSCT[u32Ch].CTL & ~PDMA_DSCT_CTL_OPMODE_Msk) | PDMA_OP_SCATTER; } else { diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_rtc.c b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_rtc.c index 4f16700b96..adac9a992d 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_rtc.c +++ b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_rtc.c @@ -65,12 +65,12 @@ static volatile uint32_t g_u32hiHour, g_u32loHour, g_u32hiMin, g_u32loMin, g_u32 int32_t RTC_Open(S_RTC_TIME_DATA_T *sPt) { RTC->INIT = RTC_INIT_KEY; - if (RTC->INIT != RTC_INIT_ACTIVE_Msk) + if ((RTC->INIT & RTC_INIT_ACTIVE_Msk) != RTC_INIT_ACTIVE_Msk) { - uint32_t u32Timeout = 10000000ul; + uint32_t volatile u32Timeout = 10000000ul; RTC->INIT = RTC_INIT_KEY; - while ((u32Timeout > 0) && (RTC->INIT != RTC_INIT_ACTIVE_Msk)) + while ((u32Timeout > 0) && ((RTC->INIT & RTC_INIT_ACTIVE_Msk) != RTC_INIT_ACTIVE_Msk)) { u32Timeout--; } @@ -317,7 +317,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt) { uint32_t u32RegCAL, u32RegTIME; - if (sPt == 0ul) + if (sPt == NULL) { } else @@ -396,7 +396,7 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt) { uint32_t u32RegCALM, u32RegTALM; - if (sPt == 0) + if (sPt == NULL) { } else diff --git a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_sys.c b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_sys.c index 98a23a2757..38cd15bb6c 100644 --- a/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_sys.c +++ b/bsp/nuvoton/libraries/ma35/StdDriver/src/nu_sys.c @@ -42,7 +42,7 @@ extern "C" * - \ref WRHO1_RST * - \ref GMAC0_RST * - \ref GMAC1_RST - * - \ref HWSEM_RST + * - \ref HWSEM0_RST * - \ref EBI_RST * - \ref HSUSBH0_RST * - \ref HSUSBH1_RST diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/inc/config.h b/bsp/nuvoton/libraries/ma35/UsbHostLib/inc/config.h index 892cbbb32b..327abb47da 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/inc/config.h +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/inc/config.h @@ -25,8 +25,6 @@ #define HCLK_MHZ 700 /* used for loop-delay. must be larger than true HCLK clock MHz */ -#define NON_CACHE_MASK (0xC0000000) - static __inline void ENABLE_OHCI_IRQ(void) { rt_hw_interrupt_umask(USBH0_IRQn); @@ -87,7 +85,7 @@ static __inline void DISABLE_EHCI_IRQ(void) limited. */ #define MAX_UDEV_DRIVER 8 /*!< Maximum number of registered drivers */ -#define MAX_ALT_PER_IFACE 8 /*!< maximum number of alternative interfaces per interface */ +#define MAX_ALT_PER_IFACE 32 /*!< maximum number of alternative interfaces per interface */ #define MAX_EP_PER_IFACE 6 /*!< maximum number of endpoints per interface */ #define MAX_HUB_DEVICE 8 /*!< Maximum number of hub devices */ @@ -95,8 +93,8 @@ static __inline void DISABLE_EHCI_IRQ(void) are all allocated from this pool. Allocated unit size is determined by MEM_POOL_UNIT_SIZE. May allocate one or more units depend on hardware descriptor type. */ -#define MEM_POOL_UNIT_SIZE 64 /*!< A fixed hard coding setting. Do not change it! */ -#define MEM_POOL_UNIT_NUM 256 /*!< Increase this or heap size if memory allocate failed. */ +#define MEM_POOL_UNIT_SIZE 256 /*!< A fixed hard coding setting. Do not change it! */ +#define MEM_POOL_UNIT_NUM 64 /*!< Increase this or heap size if memory allocate failed. */ /*----------------------------------------------------------------------------------------*/ /* Re-defined staff for various compiler */ diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ehci.c_ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ehci.c_ index 958844b806..1a1a10701c 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ehci.c_ +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ehci.c_ @@ -11,15 +11,15 @@ /// @cond HIDDEN_SYMBOLS -static QH_T *_H_qh; /* head of reclamation list */ -static qTD_T *_ghost_qtd; /* used as a terminator qTD */ -static QH_T *qh_remove_list; +static QH_T *_H_qh __attribute__((section(".usbhostlib._H_qh"))); /* head of reclamation list */ +static qTD_T *_ghost_qtd __attribute__((section(".usbhostlib._ghost_qtd"))); /* used as a terminator qTD */ +static QH_T *qh_remove_list __attribute__((section(".usbhostlib.qh_remove_list"))); -static uint32_t _PFList_mem[FL_SIZE] __attribute__((aligned(4096))); /* Periodic frame list */ +static uint32_t _PFList_mem[FL_SIZE] __attribute__((section(".usbhostlib._PFList_mem"))) __attribute__((aligned(4096))); /* Periodic frame list */ -static uint32_t *_PFList; +static uint32_t *_PFList __attribute__((section(".usbhostlib._PFList"))); -static QH_T *_Iqh[NUM_IQH]; +static QH_T *_Iqh[NUM_IQH] __attribute__((section(".usbhostlib.QH_T"))) __attribute__((aligned(32)));; static int ehci_quit_iso_xfer(UTR_T *utr, EP_INFO_T *ep); static void scan_isochronous_list(void); @@ -29,24 +29,25 @@ static void scan_isochronous_list(void); static void dump_ehci_regs(void) { USB_debug("Dump HSUSBH(0x%x) registers:\n", ptr_to_u32(&_ehci->EHCVNR)); - USB_debug(" EHCVNR = 0x%x\n", _ehci->EHCVNR); - USB_debug(" EHCSPR = 0x%x\n", _ehci->EHCSPR); - USB_debug(" EHCCPR = 0x%x\n", _ehci->EHCCPR); - USB_debug(" UCMDR = 0x%x\n", _ehci->UCMDR); - USB_debug(" USTSR = 0x%x\n", _ehci->USTSR); - USB_debug(" UIENR = 0x%x\n", _ehci->UIENR); - USB_debug(" UFINDR = 0x%x\n", _ehci->UFINDR); - USB_debug(" UPFLBAR = 0x%x\n", _ehci->UPFLBAR); - USB_debug(" UCALAR = 0x%x\n", _ehci->UCALAR); - USB_debug(" UCFGR = 0x%x\n", _ehci->UCFGR); - USB_debug(" UPSCR0 = 0x%x\n", _ehci->UPSCR); + USB_debug(" EHCVNR = 0x%08x\n", _ehci->EHCVNR); + USB_debug(" EHCSPR = 0x%08x\n", _ehci->EHCSPR); + USB_debug(" EHCCPR = 0x%08x\n", _ehci->EHCCPR); + USB_debug(" UCMDR = 0x%08x\n", _ehci->UCMDR); + USB_debug(" USTSR = 0x%08x\n", _ehci->USTSR); + USB_debug(" UIENR = 0x%08x\n", _ehci->UIENR); + USB_debug(" UFINDR = 0x%08x\n", _ehci->UFINDR); + USB_debug(" UPFLBAR = 0x%08x\n", _ehci->UPFLBAR); + USB_debug(" UCALAR = 0x%08x\n", _ehci->UCALAR); + USB_debug(" UCFGR = 0x%08x\n", _ehci->UCFGR); + USB_debug(" UPSCR0 = 0x%08x\n", _ehci->UPSCR[0]); +// USB_debug(" UPSCR1 = 0x%08x\n", _ehci->UPSCR[1]); // USB_debug(" PHYCTL0 = 0x%x\n", _ehci->USBPCR0); // USB_debug(" PHYCTL1 = 0x%x\n", _ehci->USBPCR1); } static void dump_ehci_ports() { - USB_debug("_ehci port0=0x%x\n", _ehci->UPSCR); + USB_debug("_ehci port0=0x%x, port1=0x%x\n", _ehci->UPSCR[0], _ehci->UPSCR[1]); } static void dump_ehci_qtd(qTD_T *qtd) @@ -150,7 +151,7 @@ static void init_periodic_frame_list() QH_T *qh_p; int i, idx, interval; - _PFList = (uint32_t *)((uint32_t)_PFList_mem | NON_CACHE_MASK); + _PFList = (uint32_t *)((uint32_t)&_PFList_mem[0]); memset(_PFList, 0, sizeof(_PFList_mem)); iso_ep_list = NULL; @@ -281,6 +282,8 @@ static int ehci_init(void) else return USBH_ERR_EHCI_INIT; /* Invalid FL_SIZE setting! */ + _ehci->UPFLBAR = (uint32_t)_PFList; + /*------------------------------------------------------------------------------------*/ /* start run */ /*------------------------------------------------------------------------------------*/ @@ -295,8 +298,8 @@ static int ehci_init(void) init_periodic_frame_list(); - _ehci->UPFLBAR = (uint32_t)_PFList; - usbh_delay_ms(10); /* delay 10 ms */ + //usbh_delay_ms(10); /* delay 10 ms */ + //dump_ehci_regs(); return 0; } @@ -611,6 +614,7 @@ static int ehci_ctrl_xfer(UTR_T *utr) _H_qh->HLink = QH_HLNK_QH(qh); } + //dump_ehci_regs(); /* Start transfer */ _ehci->UCMDR |= HSUSBH_UCMDR_ASEN_Msk; /* start asynchronous transfer */ return 0; @@ -1098,8 +1102,13 @@ void EHCI_IRQHandler(int vector, void *param) USB_error("Transfer error!\n"); } - if (intsts & HSUSBH_USTSR_USBINT_Msk) + if (intsts & (HSUSBH_USTSR_USBINT_Msk | HSUSBH_USTSR_UERRINT_Msk)) { + if (intsts & HSUSBH_USTSR_UERRINT_Msk) + { + USB_error("Transfer error!\n"); + } + /* some transfers completed, travel asynchronous */ /* and periodic lists to find and reclaim them. */ scan_asynchronous_list(); @@ -1140,12 +1149,12 @@ static int ehci_rh_port_reset(int port) _ehci->UPSCR[port] = (_ehci->UPSCR[port] | HSUSBH_UPSCR_PRST_Msk) & ~HSUSBH_UPSCR_PE_Msk; t0 = usbh_get_ticks(); - while (usbh_get_ticks() - t0 < (reset_time) + 1) ; /* wait at least 50 ms */ + while (usbh_get_ticks() - t0 < (reset_time/10) + 1) ; /* wait at least 50 ms */ _ehci->UPSCR[port] &= ~HSUSBH_UPSCR_PRST_Msk; t0 = usbh_get_ticks(); - while (usbh_get_ticks() - t0 < (reset_time) + 1) + while (usbh_get_ticks() - t0 < (reset_time/10) + 1) { if (!(_ehci->UPSCR[port] & HSUSBH_UPSCR_CCS_Msk) || ((_ehci->UPSCR[port] & (HSUSBH_UPSCR_CCS_Msk | HSUSBH_UPSCR_PE_Msk)) == (HSUSBH_UPSCR_CCS_Msk | HSUSBH_UPSCR_PE_Msk))) @@ -1174,7 +1183,7 @@ static int ehci_rh_polling(void) int port; int connect_status, t0, debounce_tick; - for (port = 0; port < EHCI_PORT_CNT; port++) + for (port = 0; port < 1; port++) { if (!(_ehci->UPSCR[port] & HSUSBH_UPSCR_CSC_Msk)) continue; @@ -1197,7 +1206,7 @@ static int ehci_rh_polling(void) /* Port de-bounce */ /*--------------------------------------------------------------------------------*/ t0 = usbh_get_ticks(); - debounce_tick = usbh_tick_from_millisecond(HUB_DEBOUNCE_TIME); + debounce_tick = usbh_tick_from_millisecond(HUB_DEBOUNCE_TIME/10); connect_status = _ehci->UPSCR[port] & HSUSBH_UPSCR_CCS_Msk; while (usbh_get_ticks() - t0 < debounce_tick) { diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ohci.c_ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ohci.c_ index a551648248..6c49d921d7 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ohci.c_ +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/_ohci.c_ @@ -17,11 +17,9 @@ #define PORT_CNT (_ohci->HcRhDescriptorA & 0xf) -static uint8_t _hcca_mem[256] __attribute__((aligned(256))); +static HCCA_T _hcca __attribute__((section(".usbhostlib._hcca"))) __attribute__((aligned(256))); -static HCCA_T *_hcca; - -static ED_T *_Ied[6]; +static ED_T * _Ied[6] __attribute__((section(".usbhostlib._Ied"))); static ED_T *ed_remove_list; @@ -97,7 +95,7 @@ static void init_hcca_int_table() ED_T *ed_p; int i, idx, interval; - memset(_hcca->int_table, 0, sizeof(_hcca->int_table)); + memset(_hcca.int_table, 0, sizeof(_hcca.int_table)); for (i = 5; i >= 0; i--) /* interval = i^2 */ { @@ -108,13 +106,13 @@ static void init_hcca_int_table() for (idx = interval - 1; idx < 32; idx += interval) { - if (_hcca->int_table[idx] == 0) /* is empty list, insert directly */ + if (_hcca.int_table[idx] == 0) /* is empty list, insert directly */ { - _hcca->int_table[idx] = (uint32_t)_Ied[i]; + _hcca.int_table[idx] = (uint32_t)_Ied[i]; } else { - ed_p = (ED_T *)_hcca->int_table[idx]; + ed_p = (ED_T *)_hcca.int_table[idx]; while (1) { @@ -133,7 +131,7 @@ static void init_hcca_int_table() } } -static ED_T *get_int_tree_head_node(int interval) +static ED_T * get_int_tree_head_node(int interval) { int i; @@ -166,8 +164,6 @@ static int ohci_init(void) uint32_t fminterval; volatile int i; - _hcca = (HCCA_T *)((uint32_t)_hcca_mem | NON_CACHE_MASK); - if (ohci_reset() < 0) return -1; @@ -180,11 +176,11 @@ static int ohci_init(void) _ohci->HcControlHeadED = 0; /* control ED list head */ _ohci->HcBulkHeadED = 0; /* bulk ED list head */ - _ohci->HcHCCA = (uint32_t)_hcca; /* HCCA area */ + _ohci->HcHCCA = (uint32_t)&_hcca; /* HCCA area */ /* periodic start 90% of frame interval */ fminterval = 0x2edf; /* 11,999 */ - _ohci->HcPeriodicStart = (fminterval * 9) / 10; + _ohci->HcPeriodicStart = (fminterval*9)/10; /* set FSLargestDataPacket, 10,104 for 0x2edf frame interval */ fminterval |= ((((fminterval - 210) * 6) / 7) << 16); @@ -342,7 +338,7 @@ static uint32_t ed_make_info(UDEV_T *udev, EP_INFO_T *ep) static void write_td(TD_T *td, uint32_t info, uint8_t *buff, uint32_t data_len) { uint32_t baddr = ptr_to_u32(buff); - + td->Info = info; td->CBP = (((baddr == 0) || !data_len) ? 0 : baddr); td->BE = (((baddr == 0) || !data_len) ? 0 : baddr + data_len - 1); @@ -661,7 +657,7 @@ static int ohci_int_xfer(UTR_T *utr) info = (TD_CC | TD_R | TD_DP_IN | TD_TYPE_INT); /* Keep data toggle */ - info = (info & ~(1 << 25)) | (td->Info & (1 << 25)); + info = (info & ~(1<<25)) | (td->Info & (1<<25)); /* fill this TD */ write_td(td, info, utr->buff, utr->data_len); @@ -735,7 +731,7 @@ static int ohci_iso_xfer(UTR_T *utr) /* Prepare TDs */ /*------------------------------------------------------------------------------------*/ if (utr->bIsoNewSched) /* Is the starting of isochronous streaming? */ - ed->next_sf = _hcca->frame_no + OHCI_ISO_DELAY; + ed->next_sf = _hcca.frame_no + OHCI_ISO_DELAY; utr->td_cnt = 0; utr->iso_sf = ed->next_sf; @@ -759,7 +755,7 @@ static int ohci_iso_xfer(UTR_T *utr) td->PSW[0] = 0xE000 | (buff_addr & 0xFFF); td->ed = ed; - utr->td_cnt++; /* increase TD count, for recalim counter */ + utr->td_cnt++; /* increase TD count, for reclaim counter */ /* chain to end of TD list */ if (td_list == NULL) @@ -841,7 +837,7 @@ static int ohci_rh_port_reset(int port) _ohci->HcRhPortStatus[port] = USBH_HcRhPortStatus_PRS_Msk; t0 = usbh_get_ticks(); - while (usbh_get_ticks() - t0 < (reset_time) + 1) + while (usbh_get_ticks() - t0 < (reset_time/10) + 1) { /* * If device is disconnected or port enabled, we can stop port reset. @@ -853,7 +849,7 @@ static int ohci_rh_port_reset(int port) reset_time += PORT_RESET_RETRY_INC_MS; } - USB_debug("OHCI port %d - port reset failed!\n", port + 1); + USB_debug("OHCI port %d - port reset failed!\n", port+1); return USBH_ERR_PORT_RESET; port_reset_done: @@ -871,7 +867,7 @@ static int ohci_rh_polling(void) UDEV_T *udev; int ret; - for (i = 0; i < OHCI_PORT_CNT; i++) + for (i = 0; i < 1; i++) { /* clear unwanted port change status */ _ohci->HcRhPortStatus[i] = USBH_HcRhPortStatus_OCIC_Msk | USBH_HcRhPortStatus_PRSC_Msk | @@ -1183,8 +1179,8 @@ void OHCI_IRQHandler(int vector, void *param) /* * reverse done list */ - td = (TD_T *)(_hcca->done_head & TD_ADDR_MASK); - _hcca->done_head = 0; + td = (TD_T *)(_hcca.done_head & TD_ADDR_MASK); + _hcca.done_head = 0; td_prev = NULL; _ohci->HcInterruptStatus = USBH_HcInterruptStatus_WDH_Msk; @@ -1232,7 +1228,7 @@ static void dump_ohci_int_table() { USB_debug("%02d: ", i); - ed = (ED_T *)_hcca->int_table[i]; + ed = (ED_T *)_hcca.int_table[i]; while (ed != NULL) { @@ -1268,12 +1264,14 @@ static void dump_ohci_regs() USB_debug(" HcRhDescriptorB = 0x%x\n", _ohci->HcRhDescriptorB); USB_debug(" HcRhStatus = 0x%x\n", _ohci->HcRhStatus); USB_debug(" HcRhPortStatus0 = 0x%x\n", _ohci->HcRhPortStatus[0]); + USB_debug(" HcRhPortStatus1 = 0x%x\n", _ohci->HcRhPortStatus[1]); USB_debug(" HcPhyControl = 0x%x\n", _ohci->HcPhyControl); + USB_debug(" HcMiscControl = 0x%x\n", _ohci->HcMiscControl); } static void dump_ohci_ports() { - USB_debug("_ohci port0=0x%x\n", _ohci->HcRhPortStatus[0]); + USB_debug("_ohci port0=0x%x, port1=0x%x\n", _ohci->HcRhPortStatus[0], _ohci->HcRhPortStatus[1]); } #endif // ENABLE_DEBUG_MSG diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/mem_alloc.c b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/mem_alloc.c index 75a7b60e38..9531a959ed 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/mem_alloc.c +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/mem_alloc.c @@ -25,14 +25,7 @@ #define mem_debug(...) #endif -#ifdef __ICCARM__ - #pragma data_alignment=1024 - uint8_t _mem_pool_buff[MEM_POOL_UNIT_NUM][MEM_POOL_UNIT_SIZE]; -#else - uint8_t _mem_pool_buff[MEM_POOL_UNIT_NUM][MEM_POOL_UNIT_SIZE] __attribute__((aligned(1024))); -#endif - -static uint8_t *_mem_pool[MEM_POOL_UNIT_NUM]; +static uint8_t _mem_pool[MEM_POOL_UNIT_NUM][MEM_POOL_UNIT_SIZE] __attribute__((section(".usbhostlib._mem_pool"))) __attribute__((aligned(32))); static uint8_t _unit_used[MEM_POOL_UNIT_NUM]; static volatile int _usbh_mem_used; @@ -42,7 +35,7 @@ static volatile int _mem_pool_used; UDEV_T *g_udev_list; -uint8_t _dev_addr_pool[128]; +uint8_t _dev_addr_pool[128] __attribute__((section(".usbhostlib._dev_addr_pool"))); static volatile int _device_addr; static int _sidx = 0;; @@ -53,8 +46,6 @@ static int _sidx = 0;; void usbh_memory_init(void) { - int i; - if (sizeof(TD_T) > MEM_POOL_UNIT_SIZE) { USB_error("TD_T - MEM_POOL_UNIT_SIZE too small!\n"); @@ -67,15 +58,10 @@ void usbh_memory_init(void) while (1); } - for (i = 0; i < MEM_POOL_UNIT_NUM; i++) - { - _unit_used[i] = 0; - _mem_pool[i] = (uint8_t *)((uint32_t)&_mem_pool_buff[i] | NON_CACHE_MASK); - } - _usbh_mem_used = 0L; _usbh_max_mem_used = 0L; + memset(_unit_used, 0, sizeof(_unit_used)); _mem_pool_used = 0; _sidx = 0; @@ -93,9 +79,13 @@ uint32_t usbh_memory_used(void) return _usbh_mem_used; } -static void memory_counter(int size) +static void memory_counter(int inc, int size) { - _usbh_mem_used += size; + if (inc) + _usbh_mem_used += size; + else + _usbh_mem_used -= size; + if (_usbh_mem_used > _usbh_max_mem_used) _usbh_max_mem_used = _usbh_mem_used; } @@ -104,7 +94,7 @@ void *usbh_alloc_mem(int size) { void *p; - p = USB_malloc(size, 16); + p = USB_malloc(size, 4); if (p == NULL) { USB_error("usbh_alloc_mem failed! %d\n", size); @@ -112,14 +102,14 @@ void *usbh_alloc_mem(int size) } memset(p, 0, size); - memory_counter(size); + memory_counter(1, size); return p; } void usbh_free_mem(void *p, int size) { USB_free(p); - memory_counter(0 - size); + memory_counter(0, size); } @@ -131,15 +121,14 @@ UDEV_T *alloc_device(void) { UDEV_T *udev; - udev = (UDEV_T *)USB_malloc(sizeof(*udev), 16); + udev = (UDEV_T *)USB_malloc(sizeof(*udev), 4); if (udev == NULL) { USB_error("alloc_device failed!\n"); return NULL; } - memset(udev, 0, sizeof(*udev)); - memory_counter(sizeof(*udev)); + memory_counter(1, sizeof(*udev)); udev->cur_conf = -1; /* must! used to identify the first SET CONFIGURATION */ udev->next = g_udev_list; /* chain to global device list */ g_udev_list = udev; @@ -177,7 +166,7 @@ void free_device(UDEV_T *udev) } } USB_free(udev); - memory_counter(-sizeof(*udev)); + memory_counter(0, sizeof(*udev)); } int alloc_dev_address(void) @@ -212,39 +201,19 @@ void free_dev_address(int dev_addr) UTR_T *alloc_utr(UDEV_T *udev) { -#if 0 - UTR_T *utr, *utr_noncache; - - utr = (UTR_T *)USB_malloc(sizeof(*utr), 16); - if (utr == NULL) - { - USB_error("alloc_utr failed!\n"); - return NULL; - } - - utr_noncache = (UTR_T *)((uint32_t)utr | NONCACHEABLE); - - memory_counter(sizeof(*utr)); - memset(utr_noncache, 0, sizeof(*utr)); - utr_noncache->udev = udev; - mem_debug("[ALLOC] [UTR] - 0x%x\n", (int)utr_noncache); - return utr_noncache; -#else UTR_T *utr; - utr = (UTR_T *)USB_malloc(sizeof(*utr), 16); + utr = (UTR_T *)USB_malloc(sizeof(*utr), 4); if (utr == NULL) { USB_error("alloc_utr failed!\n"); return NULL; } - - memory_counter(sizeof(*utr)); + memory_counter(1, sizeof(*utr)); memset(utr, 0, sizeof(*utr)); utr->udev = udev; - mem_debug("[ALLOC] [UTR] - 0x%x\n", (int)utr_noncache); + mem_debug("[ALLOC] [UTR] - 0x%x\n", (int)utr); return utr; -#endif } void free_utr(UTR_T *utr) @@ -253,14 +222,8 @@ void free_utr(UTR_T *utr) return; mem_debug("[FREE] [UTR] - 0x%x\n", (int)utr); - -#if 0 - if ((uint32_t)utr & NONCACHEABLE) - utr = (UTR_T *)((uint32_t)utr & ~NONCACHEABLE); -#endif - USB_free(utr); - memory_counter(0 - (int)sizeof(*utr)); + memory_counter(0, (int)sizeof(*utr)); } /*--------------------------------------------------------------------------*/ @@ -278,7 +241,7 @@ ED_T *alloc_ohci_ED(void) { _unit_used[i] = 1; _mem_pool_used++; - ed = (ED_T *)_mem_pool[i]; + ed = (ED_T *)&_mem_pool[i]; memset(ed, 0, sizeof(*ed)); mem_debug("[ALLOC] [ED] - 0x%x\n", (int)ed); return ed; @@ -294,7 +257,7 @@ void free_ohci_ED(ED_T *ed) for (i = 0; i < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)ed) + if ((uint32_t)&_mem_pool[i] == (uint32_t)ed) { mem_debug("[FREE] [ED] - 0x%x\n", (int)ed); _unit_used[i] = 0; @@ -319,7 +282,7 @@ TD_T *alloc_ohci_TD(UTR_T *utr) { _unit_used[i] = 1; _mem_pool_used++; - td = (TD_T *)_mem_pool[i]; + td = (TD_T *)&_mem_pool[i]; memset(td, 0, sizeof(*td)); td->utr = utr; @@ -337,7 +300,7 @@ void free_ohci_TD(TD_T *td) for (i = 0; i < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)td) + if ((uint32_t)&_mem_pool[i] == (uint32_t)td) { mem_debug("[FREE] [TD] - 0x%x\n", (int)td); _unit_used[i] = 0; @@ -363,7 +326,7 @@ QH_T *alloc_ehci_QH(void) _unit_used[i] = 1; _sidx = i; _mem_pool_used++; - qh = (QH_T *)_mem_pool[i]; + qh = (QH_T *)&_mem_pool[i]; memset(qh, 0, sizeof(*qh)); mem_debug("[ALLOC] [QH] - 0x%x\n", (int)qh); break; @@ -387,7 +350,7 @@ void free_ehci_QH(QH_T *qh) for (i = 0; i < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)qh) + if ((uint32_t)&_mem_pool[i] == (uint32_t)qh) { mem_debug("[FREE] [QH] - 0x%x\n", (int)qh); _unit_used[i] = 0; @@ -413,7 +376,7 @@ qTD_T *alloc_ehci_qTD(UTR_T *utr) _unit_used[i] = 1; _sidx = i; _mem_pool_used++; - qtd = (qTD_T *)_mem_pool[i]; + qtd = (qTD_T *)&_mem_pool[i]; memset(qtd, 0, sizeof(*qtd)); qtd->Next_qTD = QTD_LIST_END; @@ -434,7 +397,7 @@ void free_ehci_qTD(qTD_T *qtd) for (i = 0; i < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)qtd) + if ((uint32_t)&_mem_pool[i] == (uint32_t)qtd) { mem_debug("[FREE] [qTD] - 0x%x\n", (int)qtd); _unit_used[i] = 0; @@ -463,7 +426,7 @@ iTD_T *alloc_ehci_iTD(void) _unit_used[i] = _unit_used[i + 1] = 1; _sidx = i + 1; _mem_pool_used += 2; - itd = (iTD_T *)_mem_pool[i]; + itd = (iTD_T *)&_mem_pool[i]; memset(itd, 0, sizeof(*itd)); mem_debug("[ALLOC] [iTD] - 0x%x\n", (int)itd); return itd; @@ -479,7 +442,7 @@ void free_ehci_iTD(iTD_T *itd) for (i = 0; i + 1 < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)itd) + if ((uint32_t)&_mem_pool[i] == (uint32_t)itd) { mem_debug("[FREE] [iTD] - 0x%x\n", (int)itd); _unit_used[i] = _unit_used[i + 1] = 0; @@ -505,7 +468,7 @@ siTD_T *alloc_ehci_siTD(void) _unit_used[i] = 1; _sidx = i; _mem_pool_used ++; - sitd = (siTD_T *)_mem_pool[i]; + sitd = (siTD_T *)&_mem_pool[i]; memset(sitd, 0, sizeof(*sitd)); mem_debug("[ALLOC] [siTD] - 0x%x\n", (int)sitd); return sitd; @@ -521,7 +484,7 @@ void free_ehci_siTD(siTD_T *sitd) for (i = 0; i < MEM_POOL_UNIT_NUM; i++) { - if ((uint32_t)_mem_pool[i] == (uint32_t)sitd) + if ((uint32_t)&_mem_pool[i] == (uint32_t)sitd) { mem_debug("[FREE] [siTD] - 0x%x\n", (int)sitd); _unit_used[i] = 0; diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/support.c b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/support.c index 7338f41ab7..cd3231fba9 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/support.c +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/support.c @@ -39,8 +39,7 @@ typedef struct USB_mhdr uint32_t reserved; } USB_MHDR_T; -uint8_t _USBMemoryPool[USB_MEMORY_POOL_SIZE] __attribute__((aligned(USB_MEM_BLOCK_SIZE))); - +uint8_t _USBMemoryPool[USB_MEMORY_POOL_SIZE] __attribute__((section(".usbhostlib.USBMemoryPool"))) __attribute__((aligned(USB_MEM_BLOCK_SIZE))); static USB_MHDR_T *_pCurrent; uint32_t *_USB_pCurrent = (uint32_t *) &_pCurrent; @@ -50,7 +49,7 @@ static uint32_t _MemoryPoolBase, _MemoryPoolEnd; void USB_InitializeMemoryPool() { - _MemoryPoolBase = (uint32_t)&_USBMemoryPool[0] | NON_CACHE_MASK; + _MemoryPoolBase = (uint32_t)&_USBMemoryPool[0]; _MemoryPoolEnd = _MemoryPoolBase + USB_MEMORY_POOL_SIZE; _FreeMemorySize = _MemoryPoolEnd - _MemoryPoolBase; _AllocatedMemorySize = 0; diff --git a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/usb_core.c b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/usb_core.c index bd85008f9c..83857a54c7 100644 --- a/bsp/nuvoton/libraries/ma35/UsbHostLib/src/usb_core.c +++ b/bsp/nuvoton/libraries/ma35/UsbHostLib/src/usb_core.c @@ -103,6 +103,7 @@ int usbh_polling_root_hubs(void) int ret, change = 0; #ifdef ENABLE_EHCI0 + //_ehci0->UPSCR[1] = HSUSBH_UPSCR_PP_Msk | HSUSBH_UPSCR_PO_Msk; /* set port 2 owner to OHCI */ do { ret = ehci0_driver.rthub_polling(); @@ -114,6 +115,7 @@ int usbh_polling_root_hubs(void) #endif #ifdef ENABLE_EHCI1 + //_ehci1->UPSCR[1] = HSUSBH_UPSCR_PP_Msk | HSUSBH_UPSCR_PO_Msk; /* set port 2 owner to OHCI */ do { ret = ehci1_driver.rthub_polling(); diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig b/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig index 035e80155e..5e830cf9c1 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig @@ -5,6 +5,32 @@ select RT_USING_USER_MAIN default y + config BSP_USING_SSPCC + bool + depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM + default y + + config BSP_USING_SSMCC + bool + depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM + default y + + config BSP_USING_UMCTL2 + bool + depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM + default y + + config BSP_USING_RTP + bool + depends on SOC_SERIES_MA35D1 && !USE_MA35D1_SUBM + default y + + if BSP_USING_RTP + config RTP_USING_AT_STARTUP + bool "Enable RTP Executation at startup" + default y + endif + config USE_MA35D1_AARCH32 bool select ARCH_ARM_CORTEX_A @@ -17,6 +43,15 @@ bool select ARCH_ARMV8 + if USE_MA35D1_AARCH64 + config BSP_USING_GIC + bool + default y + config BSP_USING_GICV2 + bool + default y + endif + config USE_MA35D1_SUBM bool select ARCH_ARM_CORTEX_M4 @@ -1098,6 +1133,36 @@ default n endif + config BSP_USING_HWSEM + bool "Enable Hardware semaphore(HWSEM)" + default y + + if BSP_USING_HWSEM + config BSP_USING_HWSEM0 + bool "Enable HWSEM0" + default y + endif + + config BSP_USING_WHC + bool "Enable Wormhole(WHC)" + default y + + if BSP_USING_WHC + config BSP_USING_WHC0 + bool "Enable WHC0" + default y + + config BSP_USING_WHC1 + bool "Enable WHC1" + depends on !USE_MA35D1_SUBM + default n + endif + + config BSP_USING_NFI + bool "Enable Raw NAND flash Interface(NFI)" + depends on !USE_MA35D1_SUBM + default y + config BSP_USING_EBI bool "Enable External Bus Interface(EBI)" default n diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.h index fc0e3ee187..8eeaea33ef 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.h +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.h @@ -21,7 +21,9 @@ #include "gic.h" #include "mmu.h" -#include "cp15.h" +#if defined(USE_MA35D1_AARCH32) + #include "cp15.h" +#endif #include "gtimer.h" #define __REG32(x) (*((volatile unsigned int*)((rt_ubase_t)x))) @@ -35,21 +37,6 @@ #define DDR_LIMIT_SIZE 0xC0000000u #define UNCACHEABLE 0x40000000u -#define SSPCC_SET_REALM(IP, REALM) \ - do { \ - rt_kprintf("Set %s realm to %s(%d)\n", #IP, #REALM, REALM); \ - SSPCC_SetRealm(IP, REALM); \ - rt_kprintf("Get %s realm is %d ....%s\n", #IP, SSPCC_GetRealm(IP), (SSPCC_GetRealm(IP)==REALM)?"Success":"Failure"); \ - } while(0) - -#define SSPCC_SET_GPIO_REALM(PORT, PIN, REALM) \ - do { \ - rt_kprintf("Set %s%s realm to %s(%d)\n", #PORT, #PIN, #REALM, REALM); \ - SSPCC_SetRealm_GPIO((uint32_t)PORT, PIN, REALM); \ - rt_kprintf("Get %s%s realm is %d ....%s\n", #PORT, #PIN, SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN), (SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN)==REALM)?"Success":"Failure"); \ - } while(0) - - /* the basic constants needed by gic */ rt_inline rt_uint32_t platform_get_gic_dist_base(void) { @@ -72,12 +59,16 @@ rt_inline rt_uint32_t nu_cpu_dcache_line_size(void) return 4 << ((ctr >> 16) & 0xF); } extern void rt_hw_cpu_dcache_clean(void *addr, int size); -extern void rt_hw_cpu_dcache_clean_inv(void *addr, int size); +extern void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size); extern void rt_hw_cpu_dcache_invalidate(void *addr, int size); #else #define UNCACHEABLE 0 #endif -void nu_clock_init(void); +#define REGION_ADDR_SRAM0 0x24000000 +#define REGION_ADDR_DDR (0x80020000|UNCACHEABLE) +#define REGION_MAXSIZE_SRAM0 (128*1024) +#define REGION_MAXSIZE_DDR (4*1024*1024-REGION_MAXSIZE_SRAM0) +#define REGION_MAXSIZE_LIMIT (REGION_MAXSIZE_SRAM0+REGION_MAXSIZE_DDR) #endif /* __DRV_COMMON_H__ */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common_aarch32.c similarity index 51% rename from bsp/nuvoton/libraries/ma35/rtt_port/drv_common.c rename to bsp/nuvoton/libraries/ma35/rtt_port/drv_common_aarch32.c index 644f9d0cd7..16af3a6a5a 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_common.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common_aarch32.c @@ -11,21 +11,25 @@ ******************************************************************************/ #include + +#if defined(USE_MA35D1_AARCH32) + #include #include #include "drv_common.h" #include "board.h" #include "drv_uart.h" +#include "drv_sspcc.h" +#include "drv_ssmcc.h" +#include "drv_umctl2.h" #define LOG_TAG "drv.common" -#undef DBG_ENABLE #define DBG_SECTION_NAME LOG_TAG -#define DBG_LEVEL LOG_LVL_DBG +#define DBG_LEVEL LOG_LVL_INFO #define DBG_COLOR #include -#if defined(USE_MA35D1_AARCH32) #define NORMAL_MEM_UNCACHED (SHARED|AP_RW|DOMAIN0|STRONGORDER|DESC_SEC) /* @@ -46,26 +50,23 @@ struct mem_desc platform_mem_desc[] = {0xC0000000, 0xFFFFFFFF, 0x80000000, NORMAL_MEM_UNCACHED} // 1GB DDR, non-cacheable }; const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]); -#endif +/** + * This function will initialize board + */ -static void nu_mmu_initialize(void) -{ -#if defined(USE_MA35D1_AARCH64) - mmu_init(); - /* device memory 0x0000_0000 - 0x3FFF_FFFF */ - armv8_map(0x00000000, 0x00000000, 0x40000000, MEM_ATTR_IO); - /* device memory 0x4000_0000 - 0x7FFF_FFFF */ - armv8_map(0x40000000, 0x40000000, 0x40000000, MEM_ATTR_IO); - /* system memory 0x8000_0000 - 0xFFFF_FFFF */ - armv8_map(0x80000000, 0x80000000, 0x80000000, MEM_ATTR_MEMORY); - mmu_enable(); -#endif -} +rt_mmu_info mmu_info; -#if !defined(USE_MA35D1_SUBM) +extern size_t MMUTable[]; + +extern void nu_clock_dump(void); +extern void nu_clock_raise(void); +extern void nu_clock_init(void); +extern void nu_chipcfg_dump(void); +extern uint32_t nu_chipcfg_ddrsize(void); volatile uint32_t secondary_cpu_entry __attribute__((aligned(32))) = 0; static rt_uint32_t timerStep; + void rt_hw_systick_isr(int vector, void *parameter) { gtimer_set_load_value(timerStep); @@ -83,42 +84,6 @@ int rt_hw_systick_init(void) return 0; } -void nu_sspcc_init(void) -{ - int i, j; - - CLK->APBCLK2 |= CLK_APBCLK2_SSPCCEN_Msk; - /* Set all GPIO security set to TZNS. */ - for (i = 0; i < 16; i++) - { - for (j = 0; j < 14; j++) - { - SSPCC_SetRealm_GPIO(GPIO_BASE + (j * 0x40), i, SSPCC_SSET_TZNS); - } - } -} - -void nu_ssmcc_init(void) -{ - CLK->APBCLK2 |= CLK_APBCLK2_SSMCCEN_Msk; - - /* set region 0 to secure region, non-secure and m4 all can access */ - SSMCC_SetRegion0(SSMCC_SECURE_READ | SSMCC_SECURE_WRITE | SSMCC_NONSECURE_READ | SSMCC_NONSECURE_WRITE | SSMCC_M4NS_READ | SSMCC_M4NS_WRITE); -} - -void nu_ddr_init(void) -{ - UMCTL2->PCTRL_0 = UMCTL2_PCTRL_0_port_en_Msk; //[0x0490] - UMCTL2->PCTRL_1 = UMCTL2_PCTRL_1_port_en_Msk; //[0x0540] - UMCTL2->PCTRL_2 = UMCTL2_PCTRL_2_port_en_Msk; //[0x05f0] - UMCTL2->PCTRL_3 = UMCTL2_PCTRL_3_port_en_Msk; //[0x06a0] - - UMCTL2->PCTRL_4 = UMCTL2_PCTRL_4_port_en_Msk; //[0x0750] - UMCTL2->PCTRL_5 = UMCTL2_PCTRL_5_port_en_Msk; //[0x0800] - UMCTL2->PCTRL_6 = UMCTL2_PCTRL_6_port_en_Msk; //[0x08b0] - UMCTL2->PCTRL_7 = UMCTL2_PCTRL_7_port_en_Msk; //[0x0960] -} - void rt_hw_us_delay(rt_uint32_t us) { rt_uint32_t ticks; @@ -156,154 +121,13 @@ void rt_hw_us_delay(rt_uint32_t us) } } /* rt_hw_us_delay */ -#else - -void SysTick_Handler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -int rt_hw_systick_init(void) -{ - /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */ - SystemCoreClockUpdate(); - - /* Configure SysTick */ - SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); - - - return 0; -} - -/** - * The time delay function. - * - * @param microseconds. - */ -void rt_hw_us_delay(rt_uint32_t us) -{ - rt_uint32_t ticks; - rt_uint32_t told, tnow, tcnt = 0; - rt_uint32_t reload = SysTick->LOAD; - - ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); - told = SysTick->VAL; - while (1) - { - tnow = SysTick->VAL; - if (tnow != told) - { - if (tnow < told) - { - tcnt += told - tnow; - } - else - { - tcnt += reload - tnow + told; - } - told = tnow; - if (tcnt >= ticks) - { - break; - } - } - } -} - -#endif - - -void devmem(int argc, char *argv[]) -{ - volatile unsigned int u32Addr; - unsigned int value = 0, mode = 0; - - if (argc < 2 || argc > 3) - { - goto exit_devmem; - } - - if (argc == 3) - { - if (sscanf(argv[2], "0x%x", &value) != 1) - goto exit_devmem; - mode = 1; //Write - } - - if (sscanf(argv[1], "0x%x", &u32Addr) != 1) - goto exit_devmem; - else if (u32Addr & (4 - 1)) - goto exit_devmem; - - if (mode) - { - *((volatile uint32_t *)u32Addr) = value; - } - rt_kprintf("0x%08x\n", *((volatile uint32_t *)u32Addr)); - - return; -exit_devmem: - rt_kprintf("Read: devmem \n"); - rt_kprintf("Write: devmem \n"); - return; -} -MSH_CMD_EXPORT(devmem, dump device registers); - -void devmem2(int argc, char *argv[]) -{ - volatile unsigned int u32Addr; - unsigned int value = 0, word_count = 1; - - if (argc < 2 || argc > 3) - { - goto exit_devmem; - } - - if (argc == 3) - { - if (sscanf(argv[2], "%d", &value) != 1) - goto exit_devmem; - word_count = value; - } - - if (sscanf(argv[1], "0x%x", &u32Addr) != 1) - goto exit_devmem; - else if (u32Addr & (4 - 1)) - goto exit_devmem; - - if (word_count > 0) - { - LOG_HEX("devmem", 16, (void *)u32Addr, word_count * sizeof(rt_base_t)); - } - - return; -exit_devmem: - rt_kprintf("devmem2: \n"); - return; -} -MSH_CMD_EXPORT(devmem2, dump device registers); - void idle_wfi(void) { -#if defined(USE_MA35D1_SUBM) - __WFI(); -#else asm volatile("wfi"); -#endif } -extern void nu_clock_dump(void); -extern void nu_clock_raise(void); - rt_weak void nutool_pincfg_init(void) { - } /** @@ -311,10 +135,11 @@ rt_weak void nutool_pincfg_init(void) */ rt_weak void rt_hw_board_init(void) { + uint32_t u32BoardHeapEnd; + /* Unlock protected registers */ SYS_UnlockReg(); -#if !defined(USE_MA35D1_SUBM) /* initialize SSPCC */ nu_sspcc_init(); @@ -322,25 +147,32 @@ rt_weak void rt_hw_board_init(void) nu_ssmcc_init(); /* initialize UMCTL2 */ - nu_ddr_init(); - -#endif + nu_umctl2_init(); /* initialize base clock */ nu_clock_init(); - /* initialize peripheral pin function */ nutool_pincfg_init(); + rt_hw_mmu_map_init(&mmu_info, (void*)0x80000000, 0x10000000, MMUTable, 0); + rt_hw_mmu_ioremap_init(&mmu_info, (void*)0x80000000, 0x10000000); + /* initialize hardware interrupt */ rt_hw_interrupt_init(); - /* initialize MMU */ - nu_mmu_initialize(); - #if defined(RT_USING_HEAP) - rt_system_heap_init((void *)BOARD_HEAP_START, (void *)BOARD_HEAP_END); + if (nu_chipcfg_ddrsize() > 0) + { + /* Get MCP DDR capacity in run-time. */ + u32BoardHeapEnd = 0x80000000 + nu_chipcfg_ddrsize(); + } + else + { + /* Use board.h definition */ + u32BoardHeapEnd = (uint32_t)BOARD_HEAP_END; + } + rt_system_heap_init((void *)BOARD_HEAP_START, (void *)u32BoardHeapEnd); #endif /* initialize uart */ @@ -350,18 +182,7 @@ rt_weak void rt_hw_board_init(void) rt_console_set_device(RT_CONSOLE_DEVICE_NAME); #endif -#if !defined(USE_MA35D1_SUBM) -#if !defined(USE_MA35D1_AARCH64) - //TOFIX nu_clock_raise(); -#endif - nu_clock_dump(); -#endif - -#if defined(RT_USING_HEAP) - /* Dump heap information */ - rt_kprintf("Heap: Begin@%08x, END@%08x, SIZE: %d KiB\n", BOARD_HEAP_START, BOARD_HEAP_END, ((rt_uint32_t)BOARD_HEAP_END - (rt_uint32_t)BOARD_HEAP_START) / 1024); -#endif /* initialize systick */ rt_hw_systick_init(); @@ -371,22 +192,29 @@ rt_weak void rt_hw_board_init(void) rt_components_board_init(); #endif +#if defined(RT_USING_HEAP) + /* Dump heap information */ + LOG_I("Heap: Begin@%08x, END@%08x, SIZE: %d MB", BOARD_HEAP_START, u32BoardHeapEnd, ((rt_uint32_t)u32BoardHeapEnd - (rt_uint32_t)BOARD_HEAP_START) / 1024 / 1024); +#endif + + nu_chipcfg_dump(); + nu_clock_dump(); + #if defined(RT_USING_SMP) /* install IPI handle */ rt_hw_interrupt_set_priority(RT_SCHEDULE_IPI, 16); rt_hw_ipi_handler_install(RT_SCHEDULE_IPI, rt_scheduler_ipi_handler); rt_hw_interrupt_umask(RT_SCHEDULE_IPI); #endif - } #if defined(RT_USING_SMP) -extern void secondary_cpu_start(void); +extern void rt_secondary_cpu_entry(void); void set_secondary_cpu_boot_address(void) { - secondary_cpu_entry = (uint32_t)&secondary_cpu_start; - rt_kprintf("Wake up cpu-1 goto -> 0x%08x\n", secondary_cpu_entry); + secondary_cpu_entry = (uint32_t)&rt_secondary_cpu_entry; + rt_kprintf("Wake up cpu-1 goto -> 0x%08x@0x%08x\n", secondary_cpu_entry, &secondary_cpu_entry); } void rt_hw_secondary_cpu_up(void) @@ -414,7 +242,7 @@ void rt_hw_secondary_cpu_up(void) } } -void secondary_cpu_c_start(void) +void rt_hw_secondary_cpu_bsp_start(void) { rt_kprintf("[%s] cpu-%d\r\n", __func__, rt_hw_cpu_id()); @@ -435,3 +263,5 @@ void rt_hw_secondary_cpu_idle_exec(void) } #endif + +#endif /* #if defined(USE_MA35D1_AARCH32) */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_common_subm.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common_subm.c new file mode 100644 index 0000000000..7f3d816bb4 --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_common_subm.c @@ -0,0 +1,144 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2021-07-14 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(USE_MA35D1_SUBM) + +#include +#include + +#include "drv_common.h" +#include "board.h" +#include "drv_uart.h" + +#define LOG_TAG "drv.common" +#undef DBG_ENABLE +#define DBG_SECTION_NAME LOG_TAG +#define DBG_LEVEL LOG_LVL_DBG +#define DBG_COLOR +#include + +extern void nu_clock_init(void); + +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +int rt_hw_systick_init(void) +{ + /* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */ + SystemCoreClockUpdate(); + + /* Configure SysTick */ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + + + return 0; +} + +/** + * The time delay function. + * + * @param microseconds. + */ +void rt_hw_us_delay(rt_uint32_t us) +{ + rt_uint32_t ticks; + rt_uint32_t told, tnow, tcnt = 0; + rt_uint32_t reload = SysTick->LOAD; + + ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); + told = SysTick->VAL; + while (1) + { + tnow = SysTick->VAL; + if (tnow != told) + { + if (tnow < told) + { + tcnt += told - tnow; + } + else + { + tcnt += reload - tnow + told; + } + told = tnow; + if (tcnt >= ticks) + { + break; + } + } + } +} + +void idle_wfi(void) +{ + __WFI(); +} + +rt_weak void nutool_pincfg_init(void) +{ + +} + +/** + * This function will initial board. + */ +rt_weak void rt_hw_board_init(void) +{ + /* Unlock protected registers */ + SYS_UnlockReg(); + + /* initialize base clock */ + nu_clock_init(); + + /* initialize peripheral pin function */ + nutool_pincfg_init(); + + /* initialize hardware interrupt */ + rt_hw_interrupt_init(); + +#if defined(RT_USING_HEAP) + rt_system_heap_init((void *)BOARD_HEAP_START, (void *)BOARD_HEAP_END); +#endif + + /* initialize uart */ + rt_hw_uart_init(); + +#if defined(RT_USING_CONSOLE) + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#if defined(RT_USING_HEAP) + /* Dump heap information */ + rt_kprintf("Heap: Begin@%08x, END@%08x, SIZE: %d KiB\n", BOARD_HEAP_START, BOARD_HEAP_END, ((rt_uint32_t)BOARD_HEAP_END - (rt_uint32_t)BOARD_HEAP_START) / 1024); +#endif + + /* initialize systick */ + rt_hw_systick_init(); + rt_thread_idle_sethook(idle_wfi); + +#if defined(RT_USING_COMPONENTS_INIT) + rt_components_board_init(); +#endif + +} + +#endif diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_disp.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_disp.c index ef620165cf..8834c0ef55 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_disp.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_disp.c @@ -53,6 +53,10 @@ typedef struct nu_disp *nu_disp_t; static volatile uint32_t g_u32VSyncBlank = 0; static struct rt_completion vsync_wq; +#if defined(DISP_USING_OVERLAY) +static rt_mutex_t disp_lock; +#endif + static struct nu_disp nu_fbdev[eLayer_Cnt] = { { @@ -69,9 +73,9 @@ static struct nu_disp nu_fbdev[eLayer_Cnt] = #endif }; -rt_weak void nu_lcd_backlight_on(void) { } +RT_WEAK void nu_lcd_backlight_on(void) { } -rt_weak void nu_lcd_backlight_off(void) { } +RT_WEAK void nu_lcd_backlight_off(void) { } static void nu_disp_isr(int vector, void *param) { @@ -88,6 +92,10 @@ static rt_err_t disp_layer_open(rt_device_t dev, rt_uint16_t oflag) nu_disp_t psDisp = (nu_disp_t)dev; RT_ASSERT(psDisp != RT_NULL); +#if defined(DISP_USING_OVERLAY) + rt_mutex_take(disp_lock, RT_WAITING_FOREVER); +#endif + psDisp->ref_count++; #if defined(DISP_USING_OVERLAY) @@ -112,6 +120,10 @@ static rt_err_t disp_layer_open(rt_device_t dev, rt_uint16_t oflag) } #endif +#if defined(DISP_USING_OVERLAY) + rt_mutex_release(disp_lock); +#endif + return RT_EOK; } @@ -120,6 +132,10 @@ static rt_err_t disp_layer_close(rt_device_t dev) nu_disp_t psDisp = (nu_disp_t)dev; RT_ASSERT(psDisp != RT_NULL); +#if defined(DISP_USING_OVERLAY) + rt_mutex_take(disp_lock, RT_WAITING_FOREVER); +#endif + psDisp->ref_count--; #if defined(DISP_USING_OVERLAY) @@ -140,6 +156,10 @@ static rt_err_t disp_layer_close(rt_device_t dev) DISP_Trigger(eLayer_Video, 0); } +#if defined(DISP_USING_OVERLAY) + rt_mutex_release(disp_lock); +#endif + return RT_EOK; } @@ -208,8 +228,6 @@ static rt_err_t disp_layer_control(rt_device_t dev, int cmd, void *args) /* Initial LCD */ DISP_SetFBFmt(psDisp->layer, eFBFmt, psDisp->info.pitch); - - } break; @@ -243,7 +261,7 @@ static rt_err_t disp_layer_control(rt_device_t dev, int cmd, void *args) if (psDisp->last_commit >= g_u32VSyncBlank) { rt_completion_init(&vsync_wq); - rt_completion_wait(&vsync_wq, RT_TICK_PER_SECOND / 60); + rt_completion_wait(&vsync_wq, RT_TICK_PER_SECOND / DISP_LCDTIMING_GetFPS(RT_NULL)); } } break; @@ -331,12 +349,20 @@ int rt_hw_disp_init(void) rt_kprintf("%s's fbdev video memory at 0x%08x.\n", psDisp->name, psDisp->info.framebuffer); } +#if defined(DISP_USING_OVERLAY) + /* Initial display lock */ + disp_lock = rt_mutex_create("displock", RT_IPC_FLAG_FIFO); + RT_ASSERT(disp_lock); +#endif + /* Register ISR */ rt_hw_interrupt_install(DISP_IRQn, nu_disp_isr, RT_NULL, "DISP"); /* Enable interrupt. */ rt_hw_interrupt_umask(DISP_IRQn); + rt_kprintf("LCD panel timing is %d FPS.\n", DISP_LCDTIMING_GetFPS(&psDispLcdInstance->sLcdTiming)); + return (int)ret; } INIT_DEVICE_EXPORT(rt_hw_disp_init); diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.c new file mode 100644 index 0000000000..6aadc342be --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.c @@ -0,0 +1,310 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-5 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(BSP_USING_HWSEM) + +#include +#include "drv_hwsem.h" +#include "drv_sys.h" +#include "drv_common.h" +#include "nu_bitutil.h" + +/* Private define ---------------------------------------------------------------*/ +enum +{ + HWSEM_START = -1, +#if defined(BSP_USING_HWSEM0) + HWSEM0_IDX, +#endif + HWSEM_END +}; + +/* Private typedef --------------------------------------------------------------*/ + +struct nu_mutex_priv +{ + struct nu_mutex parent; + + rt_thread_t owner; + uint8_t key; + uint8_t hold; + struct rt_completion completion; + void *user_data; +}; +typedef struct nu_mutex_priv *nu_mutex_priv_t; + +struct nu_hwsem +{ + struct rt_device dev; + char *name; + HWSEM_T *base; + IRQn_Type irqn; + uint32_t rstidx; + + struct nu_mutex_priv mutex[evHWSEM_CNT]; +}; +typedef struct nu_hwsem *nu_hwsem_t; + +static struct nu_hwsem nu_hwsem_arr [] = +{ +#if defined(BSP_USING_HWSEM0) + { + .name = "hwsem0", + .base = HWSEM0, + .irqn = HWSEM0_IRQn, + .rstidx = HWSEM0_RST, + }, +#endif +}; /* nu_hwsem */ + +/** + * All HWSEM interrupt service routine + */ +static void nu_hwsem_isr(int vector, void *param) +{ + nu_hwsem_t psNuHwSem = (nu_hwsem_t)param; + rt_int32_t irqidx; + + volatile uint32_t vu32Intsts = psNuHwSem->base->INTSTS_CORE; + + while ((irqidx = nu_ctz(vu32Intsts)) < evHWSEM_CNT) + { + nu_mutex_priv_t priv = (nu_mutex_priv_t)&psNuHwSem->mutex[irqidx]; + uint32_t u32IsrBitMask = 1 << irqidx ; + + HWSEM_CLR_INT_FLAG(psNuHwSem->base, irqidx); + + /* Unlocked, Signal waiter. */ + rt_completion_done(&priv->completion); + + /* Clear sent bit */ + vu32Intsts &= ~(u32IsrBitMask); + } +} + +nu_mutex_t nu_mutex_init(struct rt_device *device, E_HWSEM_ID id) +{ + if (id < evHWSEM_CNT) + { + nu_hwsem_t psNuHwSem = (nu_hwsem_t)device->user_data; + nu_mutex_t mutex = (nu_mutex_t)&psNuHwSem->mutex[id]; + nu_mutex_priv_t priv = (nu_mutex_priv_t)mutex; + + if (!priv->owner) + { + priv->owner = rt_thread_self(); + } + else + { + goto exit_nu_mutex_init; + } + + return mutex; + } + +exit_nu_mutex_init: + + return RT_NULL; +} + +void nu_mutex_deinit(struct rt_device *device, E_HWSEM_ID id) +{ + if (id < evHWSEM_CNT) + { + nu_hwsem_t psNuHwSem = (nu_hwsem_t)device->user_data; + nu_mutex_t mutex = (nu_mutex_t)&psNuHwSem->mutex[id]; + nu_mutex_priv_t priv = (nu_mutex_priv_t)mutex; + + if (priv->owner == rt_thread_self()) + { + priv->owner = RT_NULL; + } + + } + +} + +rt_err_t nu_mutex_take(nu_mutex_t mutex, rt_int32_t timeout) +{ + rt_err_t ret = RT_EOK; + nu_mutex_priv_t priv = (nu_mutex_priv_t)mutex; + nu_hwsem_t dev = (nu_hwsem_t)priv->user_data; + + uint8_t u8PrivKey = priv->key; + +#ifdef RT_USING_SMP + u8PrivKey |= (rt_hw_cpu_id() << 6); +#endif /* RT_USING_SMP */ + + if (priv->owner != rt_thread_self()) + { + return -RT_ERROR; + } + + rt_completion_init(&priv->completion); + + while (1) + { + if (HWSEM_IS_LOCKED(dev->base, mutex->id) != HWSEM_NOLOCK) + { + /* LOCKED */ + if (HWSEM_GET_KEY(dev->base, mutex->id) != u8PrivKey) + { + /* Enable interrupt */ + HWSEM_ENABLE_INT(dev->base, mutex->id); + + /* owner is NOT me. */ + if (rt_completion_wait(&priv->completion, timeout) != RT_EOK) + { + ret = -RT_EBUSY; + break; + } + else + { + /* Got notification, do lock. */ + } + } + else + { + /* owner is me. */ + priv->hold++; + break; + } + } + else + { + /* NOLOCK, To lock */ + HWSEM_LOCK(dev->base, mutex->id, u8PrivKey); + if (HWSEM_GET_KEY(dev->base, mutex->id) == u8PrivKey) + { + /* owner is me. */ + priv->hold = 1; + + /* Disable interrupt */ + HWSEM_DISABLE_INT(dev->base, mutex->id); + + break; + } + else + { + /* Failed to lock, owner is not me. wait notification. */ + } + } + + } //while(1) + + return ret; +} +RTM_EXPORT(nu_mutex_take); + +rt_err_t nu_mutex_release(nu_mutex_t mutex) +{ + rt_err_t ret = RT_EOK; + nu_mutex_priv_t priv = (nu_mutex_priv_t)mutex; + nu_hwsem_t dev = (nu_hwsem_t)priv->user_data; + + uint8_t u8PrivKey = priv->key; + + if (priv->owner != rt_thread_self()) + { + return -RT_ERROR; + } + +#ifdef RT_USING_SMP + u8PrivKey |= (rt_hw_cpu_id() << 6); +#endif /* RT_USING_SMP */ + + if (HWSEM_IS_LOCKED(dev->base, mutex->id) != 0 && + HWSEM_GET_KEY(dev->base, mutex->id) == u8PrivKey) + { + priv->hold--; + if (priv->hold == 0) + { + /* Unlocked */ + HWSEM_UNLOCK(dev->base, mutex->id, u8PrivKey); + } + } + else + { + ret = -RT_ERROR; + } + + return ret; +} +RTM_EXPORT(nu_mutex_release); + +static rt_err_t hwsem_register(struct rt_device *device, const char *name, void *user_data) +{ + RT_ASSERT(device); + + device->type = RT_Device_Class_Miscellaneous; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + +#ifdef RT_USING_DEVICE_OPS + device->ops = RT_NULL; +#else + device->init = RT_NULL; + device->open = RT_NULL; + device->close = RT_NULL; + device->read = RT_NULL; + device->write = RT_NULL; + device->control = RT_NULL; +#endif + device->user_data = user_data; + + return rt_device_register(device, name, RT_DEVICE_FLAG_RDONLY | RT_DEVICE_FLAG_STANDALONE); +} + +/** + * Hardware Sem Initialization + */ +int rt_hw_hwsem_init(void) +{ + int i, j; + rt_err_t ret = RT_EOK; + + for (i = (HWSEM_START + 1); i < HWSEM_END; i++) + { +#if !defined(USE_MA35D1_SUBM) + /* Reset this module */ + nu_sys_ip_reset(nu_hwsem_arr[i].rstidx); +#endif + for (j = 0; j < evHWSEM_CNT; j++) + { + nu_hwsem_arr[i].mutex[j].parent.id = (E_HWSEM_ID)j; + nu_hwsem_arr[i].mutex[j].user_data = (void *)&nu_hwsem_arr[i]; + nu_hwsem_arr[i].mutex[j].key = (HWSEM_LOCK_BY_OWNER << 4) | j; // CoreID + SemID + nu_hwsem_arr[i].mutex[j].hold = 0; + nu_hwsem_arr[i].mutex[j].owner = RT_NULL; + + if (HWSEM_IS_LOCKED(nu_hwsem_arr[i].base, j) == HWSEM_LOCK_BY_OWNER) + HWSEM_UNLOCK(nu_hwsem_arr[i].base, j, nu_hwsem_arr[i].mutex[j].key); + + /* Disable interrupt */ + HWSEM_DISABLE_INT(nu_hwsem_arr[i].base, j); + } + + rt_hw_interrupt_install(nu_hwsem_arr[i].irqn, nu_hwsem_isr, &nu_hwsem_arr[i], nu_hwsem_arr[i].name); + rt_hw_interrupt_umask(nu_hwsem_arr[i].irqn); + + ret = hwsem_register(&nu_hwsem_arr[i].dev, (const char *)nu_hwsem_arr[i].name, (void *)&nu_hwsem_arr[i]); + RT_ASSERT(ret == RT_EOK); + } + + return 0; +} +INIT_BOARD_EXPORT(rt_hw_hwsem_init); + +#endif //#if defined(BSP_USING_UART) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.h new file mode 100644 index 0000000000..516b93fcd4 --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_hwsem.h @@ -0,0 +1,43 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-5 Wayne First version +* +******************************************************************************/ + +#ifndef __DRV_HWSEM_H__ +#define __DRV_HWSEM_H__ + +#include + +typedef enum +{ + evHWSEM0 = 0, + evHWSEM1, + evHWSEM2, + evHWSEM3, + evHWSEM4, + evHWSEM5, + evHWSEM6, + evHWSEM7, + evHWSEM_CNT, +} E_HWSEM_ID; + +struct nu_mutex +{ + E_HWSEM_ID id; +}; +typedef struct nu_mutex *nu_mutex_t; + +nu_mutex_t nu_mutex_init(struct rt_device *device, E_HWSEM_ID id); +rt_err_t nu_mutex_take(nu_mutex_t mutex, rt_int32_t timeout); +rt_err_t nu_mutex_release(nu_mutex_t mutex); +void nu_mutex_deinit(struct rt_device *device, E_HWSEM_ID id); + + +#endif /* __DRV_HWSEM_H__ */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.c index 1c015ef704..a46cf355bf 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.c @@ -328,22 +328,6 @@ static inline void nu_pdma_channel_reset(int i32ChannID) while ((PDMA->CHCTL & (1 << u32ModChannId))); } -void nu_pdma_channel_terminate(int i32ChannID) -{ - if (nu_pdma_check_is_nonallocated(i32ChannID)) - goto exit_pdma_channel_terminate; - - /* Reset specified channel. */ - nu_pdma_channel_reset(i32ChannID); - - /* Enable specified channel after reset. */ - nu_pdma_channel_enable(i32ChannID); - -exit_pdma_channel_terminate: - - return; -} - static rt_err_t nu_pdma_timeout_set(int i32ChannID, int i32Timeout_us) { rt_err_t ret = RT_EINVAL; @@ -396,6 +380,25 @@ exit_nu_pdma_timeout_set: return -(ret); } +void nu_pdma_channel_terminate(int i32ChannID) +{ + if (nu_pdma_check_is_nonallocated(i32ChannID)) + goto exit_pdma_channel_terminate; + + /* Disable timeout function of specified channel. */ + nu_pdma_timeout_set(i32ChannID, 0); + + /* Reset specified channel. */ + nu_pdma_channel_reset(i32ChannID); + + /* Enable specified channel after reset. */ + nu_pdma_channel_enable(i32ChannID); + +exit_pdma_channel_terminate: + + return; +} + int nu_pdma_channel_allocate(int32_t i32PeripType) { int ChnId, i32PeripCtlIdx, j; @@ -595,6 +598,22 @@ exit_nu_pdma_transferred_byte_get: return -1; } +nu_pdma_desc_t nu_pdma_get_channel_desc(int32_t i32ChannID) +{ + PDMA_T *PDMA; + + if (nu_pdma_check_is_nonallocated(i32ChannID)) + goto exit_nu_pdma_get_srcaddr; + + PDMA = NU_PDMA_GET_BASE(i32ChannID); + + return &PDMA->DSCT[NU_PDMA_GET_MOD_CHIDX(i32ChannID)]; + +exit_nu_pdma_get_srcaddr: + + return RT_NULL; +} + nu_pdma_memctrl_t nu_pdma_channel_memctrl_get(int i32ChannID) { nu_pdma_memctrl_t eMemCtrl = eMemCtl_Undefined; @@ -727,31 +746,31 @@ exit_nu_pdma_desc_setup: rt_err_t nu_pdma_sgtbls_allocate(nu_pdma_desc_t *ppsSgtbls, int num) { int i; - nu_pdma_desc_t psSgTblHead; RT_ASSERT(ppsSgtbls != NULL); RT_ASSERT(num > 0); - psSgTblHead = (nu_pdma_desc_t) rt_malloc_align(RT_ALIGN(sizeof(DSCT_T) * num, 64), 64); - RT_ASSERT(psSgTblHead != RT_NULL); - - rt_memset((void *)psSgTblHead, 0, sizeof(DSCT_T) * num); - for (i = 0; i < num; i++) - ppsSgtbls[i] = &psSgTblHead[i]; + { + ppsSgtbls[i] = (nu_pdma_desc_t) rt_malloc_align(RT_ALIGN(sizeof(DSCT_T), 64), 64); + RT_ASSERT(ppsSgtbls[i] != RT_NULL); + rt_memset((void *)ppsSgtbls[i], 0, RT_ALIGN(sizeof(DSCT_T), 64)); + } return RT_EOK; } void nu_pdma_sgtbls_free(nu_pdma_desc_t *ppsSgtbls, int num) { - nu_pdma_desc_t psSgTblHead; + int i; RT_ASSERT(ppsSgtbls != NULL); - psSgTblHead = *ppsSgtbls; - RT_ASSERT(psSgTblHead != NULL); + RT_ASSERT(num > 0); - rt_free_align(psSgTblHead); + for (i = 0; i < num; i++) + { + rt_free_align(ppsSgtbls[i]); + } } static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_desc_t head, uint32_t u32IdleTimeout_us) @@ -781,18 +800,20 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de rt_kprintf("[%s] u32SrcCtl=0x%08x\n", __func__, u32SrcCtl); rt_kprintf("[%s] u32DstCtl=0x%08x\n", __func__, u32DstCtl); rt_kprintf("[%s] u32FlushLen=%d\n", __func__, u32FlushLen); + rt_kprintf("[%s] DA=%08x\n", __func__, next->DA); + rt_kprintf("[%s] SA=%08x\n", __func__, next->SA); #endif /* Flush Src buffer into memory. */ if ((u32SrcCtl == PDMA_SAR_INC)) // for M2P, M2M - rt_hw_cpu_dcache_clean_inv((void *)next->SA, u32FlushLen); + rt_hw_cpu_dcache_clean_and_invalidate((void *)next->SA, u32FlushLen); /* Flush Dst buffer into memory. */ if ((u32DstCtl == PDMA_DAR_INC)) // for P2M, M2M - rt_hw_cpu_dcache_clean_inv((void *)next->DA, u32FlushLen); + rt_hw_cpu_dcache_clean_and_invalidate((void *)next->DA, u32FlushLen); /* Flush descriptor into memory */ - rt_hw_cpu_dcache_clean_inv((void *)next, sizeof(DSCT_T)); + rt_hw_cpu_dcache_clean_and_invalidate((void *)next, sizeof(DSCT_T)); if (bNonCacheAlignedWarning) { @@ -806,7 +827,7 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de Source, destination, DMA descriptor address and length should be aligned at len(CACHE_LINE_SIZE) */ bNonCacheAlignedWarning = 0; - rt_kprintf("[PDMA-W]\n"); + //rt_kprintf("[PDMA-W]\n"); } } @@ -817,19 +838,29 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de } #endif + nu_pdma_desc_t psDesc = nu_pdma_get_channel_desc(i32ChannID); + PDMA_DisableTimeout(PDMA, 1 << NU_PDMA_GET_MOD_CHIDX(i32ChannID)); - PDMA_EnableInt(PDMA, NU_PDMA_GET_MOD_CHIDX(i32ChannID), PDMA_INT_TRANS_DONE); - - nu_pdma_timeout_set(i32ChannID, u32IdleTimeout_us); - /* Set scatter-gather mode and head */ /* Take care the head structure, you should make sure cache-coherence. */ PDMA_SetTransferMode(PDMA, - NU_PDMA_GET_MOD_CHIDX(i32ChannID), - u32Peripheral, - (head->NEXT != 0) ? 1 : 0, - (uint32_t)head); + NU_PDMA_GET_MOD_CHIDX(i32ChannID), + u32Peripheral, + (head->NEXT != 0) ? 1 : 0, + (uint32_t)head); + + /* PDMA fetchs description on-demand if SG enabled. We check it valid in here. */ + if ( (u32Peripheral != PDMA_MEM) && + (head->NEXT != 0) && + (head->DA != psDesc->DA) ) + { + RT_ASSERT(0); + } + + PDMA_EnableInt(PDMA, NU_PDMA_GET_MOD_CHIDX(i32ChannID), PDMA_INT_TRANS_DONE); + + nu_pdma_timeout_set(i32ChannID, u32IdleTimeout_us); /* If peripheral is M2M, trigger it. */ if (u32Peripheral == PDMA_MEM) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.h index 1267dcb9fa..09aafaf77e 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.h +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_pdma.h @@ -73,6 +73,7 @@ rt_err_t nu_pdma_channel_memctrl_set(int i32ChannID, nu_pdma_memctrl_t eMemCtrl) nu_pdma_cb_handler_t nu_pdma_callback_hijack(int i32ChannID, nu_pdma_cbtype_t eCBType, nu_pdma_chn_cb_t psChnCb_Hijack); rt_err_t nu_pdma_filtering_set(int i32ChannID, uint32_t u32EventFilter); uint32_t nu_pdma_filtering_get(int i32ChannID); +nu_pdma_desc_t nu_pdma_get_channel_desc(int32_t i32ChannID); // For scatter-gather DMA rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u32DataWidth, uint32_t u32AddrSrc, uint32_t u32AddrDst, int32_t TransferCnt, nu_pdma_desc_t next, uint32_t u32BeSilent); diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_qspi.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_qspi.c index a81632284e..0ae777a6c0 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_qspi.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_qspi.c @@ -402,7 +402,7 @@ static int rt_hw_qspi_init(void) return 0; } -INIT_DEVICE_EXPORT(rt_hw_qspi_init); +INIT_PREV_EXPORT(rt_hw_qspi_init); rt_err_t nu_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)()) { diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_rtp.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_rtp.c index 4e4f79e407..09759b2c99 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_rtp.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_rtp.c @@ -11,12 +11,11 @@ #include -#if !defined(USE_MA35D1_SUBM) +#if defined(BSP_USING_RTP) && defined(RT_USING_DFS) #define LOG_TAG "drv.rtp" -#undef DBG_ENABLE #define DBG_SECTION_NAME LOG_TAG -#define DBG_LEVEL LOG_LVL_DBG +#define DBG_LEVEL LOG_LVL_INFO #define DBG_COLOR #include @@ -28,17 +27,12 @@ #include #include -#define RTP_USING_AT_STARTUP +#include "drv_sspcc.h" /* Link to rtthread.bin in ma35-rtp folder. */ #define PATH_RTP_INCBIN "..//ma35-rtp//rtthread.bin" #define READ_BLOCK_SIZE 128 -#define REGION_ADDR_SRAM0 0x24000000 -#define REGION_ADDR_DDR (0x80020000|UNCACHEABLE) -#define REGION_MAXSIZE_SRAM0 (128*1024) -#define REGION_MAXSIZE_DDR (4*1024*1024-REGION_MAXSIZE_SRAM0) -#define REGION_MAXSIZE_LIMIT (REGION_MAXSIZE_SRAM0+REGION_MAXSIZE_DDR) #if !defined(PATH_RTP_FW_FILE) #define PATH_RTP_FW_FILE "/mnt/sd1p0/rtp.bin" @@ -106,7 +100,7 @@ exit_nu_rtp_load_from_memory: } #endif -rt_weak void nu_rtp_sspcc_setup(void) +RT_WEAK void nu_rtp_sspcc_setup(void) { SSPCC_SET_REALM(SSPCC_UART16, SSPCC_SSET_SUBM); @@ -216,7 +210,7 @@ int nu_rtp_load_run(int argc, char *argv[]) if (!szFilePath || nu_rtp_load_from_file(szFilePath) < 0) return -1; - rt_kprintf("Loaded %s, then run...\n", szFilePath); + LOG_I("Loaded %s, then run...", szFilePath); nu_rtp_start(); @@ -227,11 +221,11 @@ MSH_CMD_EXPORT(nu_rtp_load_run, load rtp code then run); int rt_hw_rtp_init(void) { - int fw_size; - - fw_size = (int)((char *)&incbin_rtp_end - (char *)&incbin_rtp_start); - rt_kprintf("INCBIN RTP Start = %p\n", &incbin_rtp_start); - rt_kprintf("INCBIN RTP Size = %p\n", fw_size); +#if defined(RTP_USING_AT_STARTUP) + int fw_size = (int)((char *)&incbin_rtp_end - (char *)&incbin_rtp_start); + LOG_I("INCBIN RTP Start = %p", &incbin_rtp_start); + LOG_I("INCBIN RTP Size = %p", fw_size); +#endif /* Enable RTP and reset M4 reset */ nu_rtp_init(); @@ -247,4 +241,4 @@ int rt_hw_rtp_init(void) } INIT_BOARD_EXPORT(rt_hw_rtp_init); -#endif //#if defined(USE_MA35D1_SUBM) +#endif //#if defined(BSP_USING_RTP) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sdio.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sdio.c index 027ecdc512..3a58433839 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sdio.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sdio.c @@ -59,12 +59,12 @@ typedef struct nu_sdh *nu_sdh_t; /* Private variables ------------------------------------------------------------*/ #if defined(BSP_USING_SDH0) - rt_align(SDH_ALIGN_LEN) + ALIGN(SDH_ALIGN_LEN) static uint8_t g_au8CacheBuf_SDH0[SDH_BUFF_SIZE]; #endif #if defined(BSP_USING_SDH1) - rt_align(SDH_ALIGN_LEN) + ALIGN(SDH_ALIGN_LEN) static uint8_t g_au8CacheBuf_SDH1[SDH_BUFF_SIZE]; #endif @@ -481,7 +481,7 @@ static void nu_sdh_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req) } } - rt_hw_cpu_dcache_clean_inv((void *)data.dest, size); + rt_hw_cpu_dcache_clean_and_invalidate((void *)data.dest, size); req->cmd->err = nu_sdh_send_command(sdh->base, &cmd, &data); rt_hw_cpu_dcache_invalidate((void *)data.dest, size); @@ -766,7 +766,7 @@ void nu_sdh_host_initial(nu_sdh_t sdh) nu_sdh_irq_update(host, 1); /* ready to change */ - mmcsd_change(host); + //mmcsd_change(host); } void nu_sd_attach(void) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.c new file mode 100644 index 0000000000..db66c5b534 --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.c @@ -0,0 +1,29 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#include "rtthread.h" + +#if defined(BSP_USING_SSMCC) + +#include "drv_common.h" + +rt_err_t nu_ssmcc_init(void) +{ + CLK->APBCLK2 |= CLK_APBCLK2_SSMCCEN_Msk; + + /* set region 0 to secure region, non-secure and m4 all can access */ + SSMCC_SetRegion0(SSMCC_SECURE_READ | SSMCC_SECURE_WRITE | SSMCC_NONSECURE_READ | SSMCC_NONSECURE_WRITE | SSMCC_M4NS_READ | SSMCC_M4NS_WRITE); + + return RT_EOK; +} + +#endif //#if defined(BSP_USING_SSMCC) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.h new file mode 100644 index 0000000000..2437d070fd --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_ssmcc.h @@ -0,0 +1,18 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#ifndef __DRV_SSMCC_H__ +#define __DRV_SSMCC_H__ + +rt_err_t nu_ssmcc_init(void); + +#endif /* __DRV_SSMCC_H__ */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.c new file mode 100644 index 0000000000..9b4bc52fdb --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.c @@ -0,0 +1,41 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#include "rtthread.h" + +#if defined(BSP_USING_SSPCC) + +#include "drv_common.h" + +rt_err_t nu_sspcc_init(void) +{ + int i, j; + + /* Enable SSPCC clock. */ + CLK->APBCLK2 |= CLK_APBCLK2_SSPCCEN_Msk; + + /* Assign all SRAM1 capacity to TZNS. */ + SSPCC->SRAMSB = 0; + + /* Set all GPIO security set to TZNS. */ + for (i = 0; i < 16; i++) + { + for (j = 0; j < 14; j++) + { + SSPCC_SetRealm_GPIO(GPIO_BASE + (j * 0x40), i, SSPCC_SSET_TZNS); + } + } + + return RT_EOK; +} + +#endif //#if defined(BSP_USING_SSPCC) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.h new file mode 100644 index 0000000000..1d524d68df --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sspcc.h @@ -0,0 +1,34 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#ifndef __DRV_SSPCC_H__ +#define __DRV_SSPCC_H__ + +#include "rtthread.h" + +#define SSPCC_SET_REALM(IP, REALM) \ + do { \ + rt_kprintf("Set %s realm to %s(%d)\n", #IP, #REALM, REALM); \ + SSPCC_SetRealm(IP, REALM); \ + rt_kprintf("Get %s realm is %d ....%s\n", #IP, SSPCC_GetRealm(IP), (SSPCC_GetRealm(IP)==REALM)?"Success":"Failure"); \ + } while(0) + +#define SSPCC_SET_GPIO_REALM(PORT, PIN, REALM) \ + do { \ + rt_kprintf("Set %s%s realm to %s(%d)\n", #PORT, #PIN, #REALM, REALM); \ + SSPCC_SetRealm_GPIO((uint32_t)PORT, PIN, REALM); \ + rt_kprintf("Get %s%s realm is %d ....%s\n", #PORT, #PIN, SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN), (SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN)==REALM)?"Success":"Failure"); \ + } while(0) + +rt_err_t nu_sspcc_init(void); + +#endif /* __DRV_SSPCC_H__ */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sys.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sys.c index cbf15c750e..d88df6677e 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_sys.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_sys.c @@ -15,6 +15,13 @@ #include "drv_sys.h" #include +#define LOG_TAG "drv.sys" +#undef DBG_ENABLE +#define DBG_SECTION_NAME LOG_TAG +#define DBG_LEVEL LOG_LVL_DBG +#define DBG_COLOR +#include + #define DEF_RAISING_CPU_FREQUENCY //Dont enable #define DEF_RAISING_CPU_VOLTAGE @@ -80,14 +87,14 @@ void nu_sys_check_register(S_NU_REG *psNuReg) { vu32 vc32RegValue = *((vu32 *)psNuReg->vu32RegAddr); vu32 vc32BMValue = vc32RegValue & psNuReg->vu32BitMask; - rt_kprintf("[%3s] %32s(0x%08x) %24s(0x%08x): 0x%08x(AndBitMask:0x%08x)\n", - (psNuReg->vu32Value == vc32BMValue) ? "Ok" : "!OK", - psNuReg->szVName, - psNuReg->vu32Value, - psNuReg->szRegName, - psNuReg->vu32RegAddr, - vc32RegValue, - vc32BMValue); + LOG_I("[%3s] %32s(0x%08x) %24s(0x%08x): 0x%08x(AndBitMask:0x%08x)\n", + (psNuReg->vu32Value == vc32BMValue) ? "Ok" : "!OK", + psNuReg->szVName, + psNuReg->vu32Value, + psNuReg->szRegName, + psNuReg->vu32RegAddr, + vc32RegValue, + vc32BMValue); psNuReg++; } } @@ -122,7 +129,7 @@ static int nu_tempsen_get_value() count = 0; temp = (double)((SYS->TSENSRFCR & 0x0FFF0000) >> 16) * 274.3531 / 4096.0 - 93.3332; snprintf(sztmp, sizeof(sztmp), "Temperature: %.1f\n", temp); - rt_kprintf("%s", sztmp); + LOG_I("%s", sztmp); } // Clear Valid bit @@ -142,7 +149,7 @@ static int nu_tempsen_go(void) if (err != RT_EOK) { - rt_kprintf("set %s idle hook failed!\n", __func__); + LOG_E("set %s idle hook failed!\n", __func__); return -1; } @@ -153,32 +160,51 @@ static int nu_tempsen_go(void) //INIT_APP_EXPORT(nu_tempsen_go); MSH_CMD_EXPORT(nu_tempsen_go, go tempsen); -void nu_clock_dump(void) +#define REG_SYS_CHIPCFG (SYS_BASE + 0x1F4) + +uint32_t nu_chipcfg_ddrsize(void) { - rt_kprintf("HXT: %d Hz\n", CLK_GetHXTFreq()); - rt_kprintf("LXT: %d Hz\n", CLK_GetLXTFreq()); - rt_kprintf("CAPLL: %d Hz(OpMode=%d)\n", CLK_GetPLLClockFreq(CAPLL), CLK_GetPLLOpMode(CAPLL)); - rt_kprintf("DDRPLL: %d Hz(OpMode=%d)\n", CLK_GetPLLClockFreq(DDRPLL), CLK_GetPLLOpMode(DDRPLL)); - rt_kprintf("APLL: %d Hz(OpMode=%d)\n", CLK_GetPLLClockFreq(APLL), CLK_GetPLLOpMode(APLL)); - rt_kprintf("EPLL: %d Hz(OpMode=%d)\n", CLK_GetPLLClockFreq(EPLL), CLK_GetPLLOpMode(EPLL)); - rt_kprintf("VPLL: %d Hz(OpMode=%d)\n", CLK_GetPLLClockFreq(VPLL), CLK_GetPLLOpMode(VPLL)); + uint32_t u32ChipCfg = *((vu32 *)REG_SYS_CHIPCFG); - rt_kprintf("M4-CPU: %d Hz\n", CLK_GetCPUFreq()); - - rt_kprintf("SYSCLK0: %d Hz\n", CLK_GetSYSCLK0Freq()); - rt_kprintf("SYSCLK1: %d Hz\n", CLK_GetSYSCLK1Freq()); - rt_kprintf("HCLK0: %d Hz\n", CLK_GetHCLK0Freq()); - rt_kprintf("HCLK1: %d Hz\n", CLK_GetHCLK1Freq()); - rt_kprintf("HCLK2: %d Hz\n", CLK_GetHCLK2Freq()); - rt_kprintf("HCLK3: %d Hz\n", CLK_GetHCLK3Freq()); - rt_kprintf("PCLK0: %d Hz\n", CLK_GetPCLK0Freq()); - rt_kprintf("PCLK1: %d Hz\n", CLK_GetPCLK1Freq()); - rt_kprintf("PCLK2: %d Hz\n", CLK_GetPCLK2Freq()); - rt_kprintf("PCLK3: %d Hz\n", CLK_GetPCLK3Freq()); - rt_kprintf("PCLK4: %d Hz\n", CLK_GetPCLK4Freq()); + return ((u32ChipCfg & 0xF0000) != 0) ? (1 << ((u32ChipCfg & 0xF0000) >> 16)) << 20 : 0; } -const char *szClockName [] = +void nu_chipcfg_dump(void) +{ + uint32_t u32ChipCfg = *((vu32 *)REG_SYS_CHIPCFG); + uint32_t u32ChipCfg_DDRSize = ((u32ChipCfg & 0xF0000) != 0) ? 1 << ((u32ChipCfg & 0xF0000) >> 16) : 0; + uint32_t u32ChipCfg_DDRType = ((u32ChipCfg & 0x8000) >> 15); + + LOG_I("CHIPCFG: 0x%08x ", u32ChipCfg); + LOG_I("DDR SDRAM Size: %d MB", u32ChipCfg_DDRSize); + LOG_I("MCP DDR TYPE: %s", u32ChipCfg_DDRSize ? (u32ChipCfg_DDRType ? "DDR2" : "DDR3/3L") : "Unknown"); +} + +void nu_clock_dump(void) +{ + LOG_I("HXT: %d Hz", CLK_GetHXTFreq()); + LOG_I("LXT: %d Hz", CLK_GetLXTFreq()); + LOG_I("CAPLL: %d Hz(OpMode=%d)", CLK_GetPLLClockFreq(CAPLL), CLK_GetPLLOpMode(CAPLL)); + LOG_I("DDRPLL: %d Hz(OpMode=%d)", CLK_GetPLLClockFreq(DDRPLL), CLK_GetPLLOpMode(DDRPLL)); + LOG_I("APLL: %d Hz(OpMode=%d)", CLK_GetPLLClockFreq(APLL), CLK_GetPLLOpMode(APLL)); + LOG_I("EPLL: %d Hz(OpMode=%d)", CLK_GetPLLClockFreq(EPLL), CLK_GetPLLOpMode(EPLL)); + LOG_I("VPLL: %d Hz(OpMode=%d)", CLK_GetPLLClockFreq(VPLL), CLK_GetPLLOpMode(VPLL)); + + LOG_I("M4-CPU: %d Hz", CLK_GetCPUFreq()); + LOG_I("SYSCLK0: %d Hz", CLK_GetSYSCLK0Freq()); + LOG_I("SYSCLK1: %d Hz", CLK_GetSYSCLK1Freq()); + LOG_I("HCLK0: %d Hz", CLK_GetHCLK0Freq()); + LOG_I("HCLK1: %d Hz", CLK_GetHCLK1Freq()); + LOG_I("HCLK2: %d Hz", CLK_GetHCLK2Freq()); + LOG_I("HCLK3: %d Hz", CLK_GetHCLK3Freq()); + LOG_I("PCLK0: %d Hz", CLK_GetPCLK0Freq()); + LOG_I("PCLK1: %d Hz", CLK_GetPCLK1Freq()); + LOG_I("PCLK2: %d Hz", CLK_GetPCLK2Freq()); + LOG_I("PCLK3: %d Hz", CLK_GetPCLK3Freq()); + LOG_I("PCLK4: %d Hz", CLK_GetPCLK4Freq()); +} + +static const char *szClockName [] = { "HXT", "LXT", @@ -202,7 +228,7 @@ void nu_clock_isready(void) { if (i == 5 || i == 7 || i == 2) continue; u32IsReady = CLK_WaitClockReady(1 << i); - rt_kprintf("%s: %s\n", szClockName[i], (u32IsReady == 1) ? "[Stable]" : "[Unstable]"); + LOG_I("%s: %s\n", szClockName[i], (u32IsReady == 1) ? "[Stable]" : "[Unstable]"); } } @@ -230,7 +256,7 @@ void nu_clock_raise(void) } CLK_SetPLLFreq(VPLL, PLL_OPMODE_INTEGER, u32PllRefClk, 102000000ul); - CLK_SetPLLFreq(APLL, PLL_OPMODE_INTEGER, u32PllRefClk, 160000000ul); + CLK_SetPLLFreq(APLL, PLL_OPMODE_INTEGER, u32PllRefClk, 144000000ul); CLK_SetPLLFreq(EPLL, PLL_OPMODE_INTEGER, u32PllRefClk, 500000000ul); /* Waiting clock ready */ @@ -247,7 +273,9 @@ void nu_clock_raise(void) else #endif { +#if defined(DEF_RAISING_CPU_VOLTAGE) ma35d1_set_cpu_voltage(CLK_GetPLLClockFreq(SYSPLL), 0x5F); +#endif CLK_SetPLLFreq(CAPLL, PLL_OPMODE_INTEGER, u32PllRefClk, 800000000ul); } @@ -267,3 +295,74 @@ void nu_clock_raise(void) #endif +void devmem(int argc, char *argv[]) +{ + volatile unsigned int u32Addr; + unsigned int value = 0, mode = 0; + + if (argc < 2 || argc > 3) + { + goto exit_devmem; + } + + if (argc == 3) + { + if (sscanf(argv[2], "0x%x", &value) != 1) + goto exit_devmem; + mode = 1; //Write + } + + if (sscanf(argv[1], "0x%x", &u32Addr) != 1) + goto exit_devmem; + else if (u32Addr & (4 - 1)) + goto exit_devmem; + + if (mode) + { + *((volatile uint32_t *)u32Addr) = value; + } + LOG_I("0x%08x\n", *((volatile uint32_t *)u32Addr)); + + return; +exit_devmem: + rt_kprintf("Read: devmem \n"); + rt_kprintf("Write: devmem \n"); + return; +} +MSH_CMD_EXPORT(devmem, dump device registers); + +void devmem2(int argc, char *argv[]) +{ + volatile unsigned int u32Addr; + unsigned int value = 0, word_count = 1; + + if (argc < 2 || argc > 3) + { + goto exit_devmem; + } + + if (argc == 3) + { + if (sscanf(argv[2], "%d", &value) != 1) + goto exit_devmem; + word_count = value; + } + + if (sscanf(argv[1], "0x%x", &u32Addr) != 1) + goto exit_devmem; + else if (u32Addr & (4 - 1)) + goto exit_devmem; + + if (word_count > 0) + { + LOG_HEX("devmem", 16, (void *)u32Addr, word_count * sizeof(rt_base_t)); + } + + return; + +exit_devmem: + rt_kprintf("devmem2: \n"); + return; +} +MSH_CMD_EXPORT(devmem2, dump device registers); + diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_uart.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_uart.c index ce80525109..9d10050a24 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_uart.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_uart.c @@ -23,6 +23,13 @@ #include #endif +#define LOG_TAG "drv.uart" +//#undef DBG_ENABLE +#define DBG_SECTION_NAME LOG_TAG +#define DBG_LEVEL LOG_LVL_INFO +#define DBG_COLOR +#include + /* Private define ---------------------------------------------------------------*/ enum { @@ -81,12 +88,21 @@ enum UART_CNT }; +struct nu_rxbuf_ctx +{ + void * pvRxBuf; + uint32_t bufsize; + uint32_t wrote_offset; + uint32_t reserved; +}; +typedef struct nu_rxbuf_ctx *nu_rxbuf_ctx_t; + /* Private typedef --------------------------------------------------------------*/ struct nu_uart { rt_serial_t dev; char *name; - UART_T *uart_base; + UART_T *base; IRQn_Type irqn; uint32_t rstidx; @@ -97,10 +113,11 @@ struct nu_uart int16_t pdma_perp_rx; int8_t pdma_chanid_rx; - int32_t rx_write_offset; - int32_t rxdma_trigger_len; nu_pdma_desc_t pdma_rx_desc; + + struct nu_rxbuf_ctx dmabuf; + struct nu_rxbuf_ctx userbuf; #endif }; @@ -116,12 +133,10 @@ static int nu_uart_receive(struct rt_serial_device *serial); static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction); static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events); static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events); + static uint32_t nu_uart_flush(nu_uart_t psNuUart, uint32_t pdma_new_rxsize); #endif -/* Public functions ------------------------------------------------------------*/ - /* Private variables ------------------------------------------------------------*/ - static const struct rt_uart_ops nu_uart_ops = { .configure = nu_uart_configure, @@ -143,7 +158,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART0) { .name = "uart0", - .uart_base = UART0, + .base = UART0, .irqn = UART0_IRQn, .rstidx = UART0_RST, @@ -155,7 +170,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART0_RX_DMA) .pdma_perp_rx = PDMA_UART0_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -166,7 +180,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART1) { .name = "uart1", - .uart_base = UART1, + .base = UART1, .irqn = UART1_IRQn, .rstidx = UART1_RST, @@ -178,7 +192,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART1_RX_DMA) .pdma_perp_rx = PDMA_UART1_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -189,7 +202,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART2) { .name = "uart2", - .uart_base = UART2, + .base = UART2, .irqn = UART2_IRQn, .rstidx = UART2_RST, @@ -201,7 +214,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART2_RX_DMA) .pdma_perp_rx = PDMA_UART2_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -212,7 +224,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART3) { .name = "uart3", - .uart_base = UART3, + .base = UART3, .irqn = UART3_IRQn, .rstidx = UART3_RST, @@ -224,7 +236,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART3_RX_DMA) .pdma_perp_rx = PDMA_UART3_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -235,7 +246,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART4) { .name = "uart4", - .uart_base = UART4, + .base = UART4, .irqn = UART4_IRQn, .rstidx = UART4_RST, @@ -247,7 +258,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART4_RX_DMA) .pdma_perp_rx = PDMA_UART4_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -258,7 +268,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART5) { .name = "uart5", - .uart_base = UART5, + .base = UART5, .irqn = UART5_IRQn, .rstidx = UART5_RST, @@ -270,7 +280,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART5_RX_DMA) .pdma_perp_rx = PDMA_UART5_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -281,7 +290,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART6) { .name = "uart6", - .uart_base = UART6, + .base = UART6, .irqn = UART6_IRQn, .rstidx = UART6_RST, @@ -293,7 +302,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART6_RX_DMA) .pdma_perp_rx = PDMA_UART6_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -304,7 +312,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART7) { .name = "uart7", - .uart_base = UART7, + .base = UART7, .irqn = UART7_IRQn, .rstidx = UART7_RST, @@ -316,7 +324,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART7_RX_DMA) .pdma_perp_rx = PDMA_UART7_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -327,7 +334,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART8) { .name = "uart8", - .uart_base = UART8, + .base = UART8, .irqn = UART8_IRQn, .rstidx = UART8_RST, @@ -339,7 +346,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART8_RX_DMA) .pdma_perp_rx = PDMA_UART8_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -350,7 +356,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART9) { .name = "uart9", - .uart_base = UART9, + .base = UART9, .irqn = UART9_IRQn, .rstidx = UART9_RST, @@ -362,7 +368,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART9_RX_DMA) .pdma_perp_rx = PDMA_UART9_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -373,7 +378,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART10) { .name = "uart10", - .uart_base = UART10, + .base = UART10, .irqn = UART10_IRQn, .rstidx = UART10_RST, @@ -385,7 +390,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART10_RX_DMA) .pdma_perp_rx = PDMA_UART10_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -396,7 +400,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART11) { .name = "uart11", - .uart_base = UART11, + .base = UART11, .irqn = UART11_IRQn, .rstidx = UART11_RST, @@ -408,7 +412,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART11_RX_DMA) .pdma_perp_rx = PDMA_UART11_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -419,7 +422,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART12) { .name = "uart12", - .uart_base = UART12, + .base = UART12, .irqn = UART12_IRQn, .rstidx = UART12_RST, @@ -431,7 +434,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART12_RX_DMA) .pdma_perp_rx = PDMA_UART12_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -442,7 +444,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART13) { .name = "uart13", - .uart_base = UART13, + .base = UART13, .irqn = UART13_IRQn, .rstidx = UART13_RST, @@ -454,7 +456,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART13_RX_DMA) .pdma_perp_rx = PDMA_UART13_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -465,7 +466,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART14) { .name = "uart14", - .uart_base = UART14, + .base = UART14, .irqn = UART14_IRQn, .rstidx = UART14_RST, @@ -477,7 +478,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART14_RX_DMA) .pdma_perp_rx = PDMA_UART14_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -488,7 +488,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART15) { .name = "uart15", - .uart_base = UART15, + .base = UART15, .irqn = UART15_IRQn, .rstidx = UART15_RST, @@ -500,7 +500,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART15_RX_DMA) .pdma_perp_rx = PDMA_UART15_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -511,7 +510,7 @@ static struct nu_uart nu_uart_arr [] = #if defined(BSP_USING_UART16) { .name = "uart16", - .uart_base = UART16, + .base = UART16, .irqn = UART16_IRQn, .rstidx = UART16_RST, @@ -523,7 +522,6 @@ static struct nu_uart nu_uart_arr [] = #endif #if defined(BSP_USING_UART16_RX_DMA) .pdma_perp_rx = PDMA_UART16_RX, - .rx_write_offset = 0, #else .pdma_perp_rx = NU_PDMA_UNUSED, #endif @@ -539,19 +537,25 @@ static struct nu_uart nu_uart_arr [] = static void nu_uart_isr(int vector, void *param) { /* Get base address of uart register */ - nu_uart_t serial = (nu_uart_t)param; - UART_T *uart_base = serial->uart_base; + nu_uart_t psNuUart = (nu_uart_t)param; + UART_T *base = psNuUart->base; /* Get interrupt event */ - uint32_t u32IntSts = uart_base->INTSTS; - uint32_t u32FIFOSts = uart_base->FIFOSTS; + uint32_t u32IntSts = base->INTSTS; + uint32_t u32FIFOSts = base->FIFOSTS; #if defined(RT_SERIAL_USING_DMA) if (u32IntSts & UART_INTSTS_PRLSIF_Msk) { /* Drain RX FIFO to remove remain FEF frames in FIFO. */ - uart_base->FIFO |= UART_FIFO_RXRST_Msk; - uart_base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk); + base->FIFO |= UART_FIFO_RXRST_Msk; + base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk); + return; + } + + if (u32IntSts & UART_INTSTS_PTOIF_Msk) + { + nu_uart_flush(psNuUart, 0); return; } #endif @@ -559,10 +563,10 @@ static void nu_uart_isr(int vector, void *param) /* Handle RX event */ if (u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk)) { - rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND); + rt_hw_serial_isr(&psNuUart->dev, RT_SERIAL_EVENT_RX_IND); } - uart_base->INTSTS = u32IntSts; - uart_base->FIFOSTS = u32FIFOSts; + base->INTSTS = u32IntSts; + base->FIFOSTS = u32FIFOSts; } /** @@ -570,27 +574,28 @@ static void nu_uart_isr(int vector, void *param) */ void nu_uart_set_rs485aud(struct rt_serial_device *serial, rt_bool_t bRTSActiveLowLevel) { - UART_T *uart_base; + nu_uart_t psNuUart = (nu_uart_t)serial; + UART_T *base; RT_ASSERT(serial); /* Get base address of uart register */ - uart_base = ((nu_uart_t)serial)->uart_base; + base = ((nu_uart_t)serial)->base; /* Set RTS as RS-485 phy direction controlling ping. */ - UART_SelectRS485Mode(uart_base, UART_ALTCTL_RS485AUD_Msk, 0); + UART_SelectRS485Mode(base, UART_ALTCTL_RS485AUD_Msk, 0); if (bRTSActiveLowLevel) { /* Set direction pin as active-low. */ - uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk; + base->MODEM |= UART_MODEM_RTSACTLV_Msk; } else { /* Set direction pin as active-high. */ - uart_base->MODEM &= ~UART_MODEM_RTSACTLV_Msk; + base->MODEM &= ~UART_MODEM_RTSACTLV_Msk; } - rt_kprintf("Set %s to RS-485 AUD function mode. ActiveLowLevel-%s\n", ((nu_uart_t)serial)->name, bRTSActiveLowLevel ? "YES" : "NO"); + LOG_I("Set %s to RS-485 AUD function mode. ActiveLowLevel-%s", psNuUart->name, bRTSActiveLowLevel ? "YES" : "NO"); } /** @@ -598,10 +603,9 @@ void nu_uart_set_rs485aud(struct rt_serial_device *serial, rt_bool_t bRTSActiveL */ static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { + nu_uart_t psNuUart = (nu_uart_t)serial; rt_err_t ret = RT_EOK; - uint32_t uart_word_len = 0; - uint32_t uart_stop_bit = 0; - uint32_t uart_parity = 0; + uint32_t uart_word_len, uart_stop_bit, uart_parity; RT_ASSERT(serial); RT_ASSERT(cfg); @@ -609,8 +613,10 @@ static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial /* Check baudrate */ RT_ASSERT(cfg->baud_rate != 0); + uart_word_len = uart_stop_bit = uart_parity = 0; + /* Get base address of uart register */ - UART_T *uart_base = ((nu_uart_t)serial)->uart_base; + UART_T *base = psNuUart->base; /* Check word len */ switch (cfg->data_bits) @@ -632,7 +638,7 @@ static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial break; default: - rt_kprintf("Unsupported data length\n"); + LOG_E("Unsupported data length."); ret = RT_EINVAL; goto exit_nu_uart_configure; } @@ -649,7 +655,7 @@ static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial break; default: - rt_kprintf("Unsupported stop bit\n"); + LOG_E("Unsupported stop bit."); ret = RT_EINVAL; goto exit_nu_uart_configure; } @@ -670,45 +676,170 @@ static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial break; default: - rt_kprintf("Unsupported parity\n"); + LOG_E("Unsupported parity."); ret = RT_EINVAL; goto exit_nu_uart_configure; } /* Reset this module */ - nu_sys_ip_reset(((nu_uart_t)serial)->rstidx); + nu_sys_ip_reset(psNuUart->rstidx); /* Open Uart and set UART Baudrate */ - UART_Open(uart_base, cfg->baud_rate); + UART_Open(base, cfg->baud_rate); /* Set line configuration. */ - UART_SetLineConfig(uart_base, 0, uart_word_len, uart_parity, uart_stop_bit); + UART_SetLineConfig(base, 0, uart_word_len, uart_parity, uart_stop_bit); /* Enable interrupt. */ - rt_hw_interrupt_umask(((nu_uart_t)serial)->irqn); + rt_hw_interrupt_umask(psNuUart->irqn); exit_nu_uart_configure: if (ret != RT_EOK) - UART_Close(uart_base); + UART_Close(base); return -(ret); } #if defined(RT_SERIAL_USING_DMA) -static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t *pu8Buf, int32_t i32TriggerLen) + +static uint32_t nu_uart_flush_sync( + uint8_t *dst_buf_start, + uint8_t *dst_buf_put, + uint8_t *src_buf_start, + uint8_t *src_buf_put, + uint32_t bufsize, + uint32_t sync_len) +{ + uint32_t count = 0; + + /* Copy bytes in Source's ring-buffer to Destination's ring-buffer. */ + while ( count < sync_len ) + { + if ( dst_buf_put >= (dst_buf_start + bufsize) ) + { + dst_buf_put = dst_buf_start; + } + + if ( src_buf_put >= (src_buf_start + bufsize) ) + { + src_buf_put = src_buf_start; + } + + *dst_buf_put = *src_buf_put; + + src_buf_put++; + dst_buf_put++; + + count++; + } + + return count; +} + +static uint32_t nu_uart_flush(nu_uart_t psNuUart, uint32_t pdma_new_rxsize) +{ + uint32_t recv_len; + UART_T *base = psNuUart->base; + uint8_t tempbuf[64]; + + /* Disable Receive Line interrupt first. */ + UART_DISABLE_INT(base, UART_INTEN_RXPDMAEN_Msk); + + /* Pick up RX bytes in PDMA RX BUFFER. */ + if ( pdma_new_rxsize > 0 ) + { + nu_pdma_desc_t psDesc = nu_pdma_get_channel_desc(psNuUart->pdma_chanid_rx); + #if !defined(USE_MA35D1_SUBM) + uint8_t *pu8DmaBuf_noncache = (uint8_t *)(psDesc->DA + UNCACHEABLE); + #else + uint8_t *pu8DmaBuf_noncache = (uint8_t *)(psDesc->DA); + #endif + + /* Update wrote offset of user buffer. */ + psNuUart->userbuf.wrote_offset += nu_uart_flush_sync( psNuUart->userbuf.pvRxBuf, + (uint8_t *)psNuUart->userbuf.pvRxBuf + psNuUart->userbuf.wrote_offset, + pu8DmaBuf_noncache, + pu8DmaBuf_noncache + psNuUart->dmabuf.wrote_offset, + psNuUart->userbuf.bufsize, + pdma_new_rxsize ); + psNuUart->userbuf.wrote_offset %= psNuUart->userbuf.bufsize; + } + + /* Pick up RX bytes in UART FIFO. */ + recv_len = 0; + while (!UART_GET_RX_EMPTY(base)) + { + tempbuf[recv_len] = UART_READ(base); + recv_len++; + RT_ASSERT( recv_len < sizeof(tempbuf) ); + } + if ( recv_len > 0 ) + { + /* Update wrote offset of user buffer. */ + psNuUart->userbuf.wrote_offset += nu_uart_flush_sync( psNuUart->userbuf.pvRxBuf, + psNuUart->userbuf.pvRxBuf + psNuUart->userbuf.wrote_offset, + tempbuf, + tempbuf, + psNuUart->userbuf.bufsize, + recv_len ); + psNuUart->userbuf.wrote_offset %= psNuUart->userbuf.bufsize; + } + + /* Report received bytes = UART_FIFO_RXSIZE + PDMA_NEW_RXSIZE */ + recv_len += pdma_new_rxsize; + if (recv_len > 0) + { + LOG_D("%d(Received) = %d(PDMA) + %d(FIFO)", + recv_len - pdma_new_rxsize, + pdma_new_rxsize, + recv_len); + + LOG_D("User: [%08x] bufsize=%d, wrote_offset=%d", + psNuUart->userbuf.pvRxBuf, + psNuUart->userbuf.bufsize, + psNuUart->userbuf.wrote_offset); + + LOG_D("DMA: [%08x] bufsize=%d, put=%d", + psNuUart->dmabuf.pvRxBuf, + psNuUart->dmabuf.bufsize, + psNuUart->dmabuf.wrote_offset); + + rt_hw_serial_isr(&psNuUart->dev, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + } + + /* Enable Receive Line interrupt first. */ + UART_ENABLE_INT(base, UART_INTEN_RXPDMAEN_Msk); + + return recv_len; +} + +static void nu_pdma_uart_rxbuf_free(nu_uart_t psNuUart) +{ + psNuUart->userbuf.pvRxBuf = RT_NULL; + psNuUart->userbuf.bufsize = 0; + psNuUart->userbuf.wrote_offset = 0; + + if (psNuUart->dmabuf.pvRxBuf) + rt_free_align(psNuUart->dmabuf.pvRxBuf); + + psNuUart->dmabuf.pvRxBuf = RT_NULL; + psNuUart->dmabuf.bufsize = 0; + psNuUart->dmabuf.wrote_offset = 0; +} + +static rt_err_t nu_pdma_uart_rx_config(nu_uart_t psNuUart, uint8_t *pu8Buf, int32_t i32TriggerLen) { rt_err_t result = RT_EOK; struct nu_pdma_chn_cb sChnCB; - nu_uart_t psNuUart = (nu_uart_t)serial; /* Get base address of uart register */ - UART_T *uart_base = psNuUart->uart_base; + UART_T *base = psNuUart->base; /* Register ISR callback function */ sChnCB.m_eCBType = eCBType_Event; sChnCB.m_pfnCBHandler = nu_pdma_uart_rx_cb; - sChnCB.m_pvUserData = (void *)serial; + sChnCB.m_pvUserData = (void *)psNuUart; nu_pdma_filtering_set(psNuUart->pdma_chanid_rx, NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT); result = nu_pdma_callback_register(psNuUart->pdma_chanid_rx, &sChnCB); @@ -718,48 +849,49 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t goto exit_nu_pdma_uart_rx_config; } - if (serial->config.bufsz == 0) - { - result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_rx, - 8, - (uint32_t)uart_base, - (uint32_t)pu8Buf, - i32TriggerLen, - 1000); //Idle-timeout, 1ms - if (result != RT_EOK) - { - goto exit_nu_pdma_uart_rx_config; - } - } - else - { - /* For Serial RX FIFO - Single buffer recycle SG trigger */ - /* Link to next */ - nu_pdma_desc_t next = psNuUart->pdma_rx_desc; + /* Store user buffer context */ + psNuUart->userbuf.pvRxBuf = pu8Buf; + psNuUart->userbuf.bufsize = i32TriggerLen; + psNuUart->userbuf.wrote_offset = 0; - result = nu_pdma_desc_setup(psNuUart->pdma_chanid_rx, - psNuUart->pdma_rx_desc, - 8, - (uint32_t)uart_base, - (uint32_t)pu8Buf, - i32TriggerLen, - next, - 0); - if (result != RT_EOK) - { - goto exit_nu_pdma_uart_rx_config; - } - - /* Assign head descriptor & go */ - result = nu_pdma_sg_transfer(psNuUart->pdma_chanid_rx, psNuUart->pdma_rx_desc, 1000); - if (result != RT_EOK) - { - goto exit_nu_pdma_uart_rx_config; - } + psNuUart->dmabuf.pvRxBuf = rt_malloc_align(i32TriggerLen, 64); + psNuUart->dmabuf.bufsize = 0; + if (psNuUart->dmabuf.pvRxBuf == RT_NULL) + { + LOG_E("Failed to allocate dma memory %d.", i32TriggerLen); + goto exit_nu_pdma_uart_rx_config; } + psNuUart->dmabuf.bufsize = i32TriggerLen; + psNuUart->dmabuf.wrote_offset = 0; + + /* Disable Receive Line interrupt & Start DMA RX transfer. */ + UART_DISABLE_INT(base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk | UART_INTEN_RXTOIEN_Msk); + + /* For Serial RX FIFO - Single buffer recycle SG trigger */ + result = nu_pdma_desc_setup(psNuUart->pdma_chanid_rx, + psNuUart->pdma_rx_desc, + 8, + (uint32_t)base, + (uint32_t)psNuUart->dmabuf.pvRxBuf, + psNuUart->dmabuf.bufsize, + psNuUart->pdma_rx_desc, + 0); + if (result != RT_EOK) + { + goto exit_nu_pdma_uart_rx_config; + } + + /* Assign head descriptor & go */ + result = nu_pdma_sg_transfer(psNuUart->pdma_chanid_rx, psNuUart->pdma_rx_desc, 500); + if (result != RT_EOK) + { + goto exit_nu_pdma_uart_rx_config; + } + + UART_SetTimeoutCnt(base, 255); /* Enable Receive Line interrupt & Start DMA RX transfer. */ - UART_ENABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk); + UART_ENABLE_INT(base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk | UART_INTEN_RXTOIEN_Msk); exit_nu_pdma_uart_rx_config: @@ -768,75 +900,53 @@ exit_nu_pdma_uart_rx_config: static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events) { - rt_size_t recv_len = 0; - rt_size_t transferred_rxbyte = 0; - struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner; - nu_uart_t puart = (nu_uart_t)serial; - RT_ASSERT(serial); + nu_uart_t psNuUart = (nu_uart_t)pvOwner; + RT_ASSERT(psNuUart); - /* Get base address of uart register */ - UART_T *uart_base = puart->uart_base; - - transferred_rxbyte = nu_pdma_transferred_byte_get(puart->pdma_chanid_rx, puart->rxdma_trigger_len); if (u32Events & (NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT)) { + rt_size_t pdma_rxsize = 0; + if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE) { - transferred_rxbyte = puart->rxdma_trigger_len; + pdma_rxsize = psNuUart->dmabuf.bufsize; } - else if ((u32Events & NU_PDMA_EVENT_TIMEOUT) && !UART_GET_RX_EMPTY(uart_base)) + else { - return; + pdma_rxsize = nu_pdma_transferred_byte_get(psNuUart->pdma_chanid_rx, psNuUart->dmabuf.bufsize); } - recv_len = transferred_rxbyte - puart->rx_write_offset; + nu_uart_flush(psNuUart, pdma_rxsize - psNuUart->dmabuf.wrote_offset); - if (recv_len > 0) - { -#if !defined(USE_MA35D1_SUBM) - struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; - rt_hw_cpu_dcache_invalidate((void *)&rx_fifo->buffer[puart->rx_write_offset], recv_len); -#endif - puart->rx_write_offset = transferred_rxbyte % puart->rxdma_trigger_len; - } - } - - if ((serial->config.bufsz == 0) && (u32Events & NU_PDMA_EVENT_TRANSFER_DONE)) - { - recv_len = puart->rxdma_trigger_len; - } - - if (recv_len > 0) - { - rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + /* Update rxdma buffer wrote index */ + psNuUart->dmabuf.wrote_offset = (psNuUart->dmabuf.wrote_offset + pdma_rxsize) % psNuUart->dmabuf.bufsize; } } -static rt_err_t nu_pdma_uart_tx_config(struct rt_serial_device *serial) +static rt_err_t nu_pdma_uart_tx_config(nu_uart_t psNuUart) { struct nu_pdma_chn_cb sChnCB; - RT_ASSERT(serial); + RT_ASSERT(psNuUart); /* Register ISR callback function */ sChnCB.m_eCBType = eCBType_Event; sChnCB.m_pfnCBHandler = nu_pdma_uart_tx_cb; - sChnCB.m_pvUserData = (void *)serial; + sChnCB.m_pvUserData = (void *)psNuUart; - nu_pdma_filtering_set(((nu_uart_t)serial)->pdma_chanid_tx, NU_PDMA_EVENT_TRANSFER_DONE); - return nu_pdma_callback_register(((nu_uart_t)serial)->pdma_chanid_tx, &sChnCB); + nu_pdma_filtering_set(psNuUart->pdma_chanid_tx, NU_PDMA_EVENT_TRANSFER_DONE); + return nu_pdma_callback_register(psNuUart->pdma_chanid_tx, &sChnCB); } static void nu_pdma_uart_tx_cb(void *pvOwner, uint32_t u32Events) { - nu_uart_t puart = (nu_uart_t)pvOwner; + nu_uart_t psNuUart = (nu_uart_t)pvOwner; + RT_ASSERT(psNuUart); - RT_ASSERT(puart); - - UART_DISABLE_INT(puart->uart_base, UART_INTEN_TXPDMAEN_Msk);// Stop DMA TX transfer + UART_DISABLE_INT(psNuUart->base, UART_INTEN_TXPDMAEN_Msk);// Stop DMA TX transfer if (u32Events & NU_PDMA_EVENT_TRANSFER_DONE) { - rt_hw_serial_isr(&puart->dev, RT_SERIAL_EVENT_TX_DMADONE); + rt_hw_serial_isr(&psNuUart->dev, RT_SERIAL_EVENT_TX_DMADONE); } } @@ -852,26 +962,44 @@ static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_ RT_ASSERT(buf); /* Get base address of uart register */ - UART_T *uart_base = psNuUart->uart_base; + UART_T *base = psNuUart->base; if (direction == RT_SERIAL_DMA_TX) { - result = nu_pdma_transfer(psNuUart->pdma_chanid_tx, + UART_DISABLE_INT(base, UART_INTEN_TXPDMAEN_Msk); + /* <16 PDMA TX case. */ + if (size < 16) + { + int i = 0; + UART_T *base = psNuUart->base; + + while (i < size) + { + /* Waiting if TX-FIFO is full. */ + while (UART_IS_TX_FULL(base)); + /* Put char into TX-FIFO */ + UART_WRITE(base, buf[i]); + i++; + } + rt_hw_serial_isr(&psNuUart->dev, RT_SERIAL_EVENT_TX_DMADONE); + } + else + { + result = nu_pdma_transfer(psNuUart->pdma_chanid_tx, 8, (uint32_t)buf, - (uint32_t)uart_base, + (uint32_t)base, size, 0); // wait-forever - // Start DMA TX transfer - UART_ENABLE_INT(uart_base, UART_INTEN_TXPDMAEN_Msk); + // Start DMA TX transfer + UART_ENABLE_INT(base, UART_INTEN_TXPDMAEN_Msk); + } } else if (direction == RT_SERIAL_DMA_RX) { - UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk); + UART_DISABLE_INT(base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk | UART_INTEN_TOCNTEN_Msk); // If config.bufsz = 0, serial will trigger once. - psNuUart->rxdma_trigger_len = size; - psNuUart->rx_write_offset = 0; - result = nu_pdma_uart_rx_config(serial, buf, size); + result = nu_pdma_uart_rx_config(psNuUart, buf, size); } else { @@ -881,29 +1009,29 @@ static rt_size_t nu_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_ return result; } -static int nu_hw_uart_dma_allocate(nu_uart_t pusrt) +static int nu_hw_uart_dma_allocate(nu_uart_t psNuUart) { - RT_ASSERT(pusrt); + RT_ASSERT(psNuUart); /* Allocate UART_TX nu_dma channel */ - if (pusrt->pdma_perp_tx != NU_PDMA_UNUSED) + if (psNuUart->pdma_perp_tx != NU_PDMA_UNUSED) { - pusrt->pdma_chanid_tx = nu_pdma_channel_allocate(pusrt->pdma_perp_tx); - if (pusrt->pdma_chanid_tx >= 0) + psNuUart->pdma_chanid_tx = nu_pdma_channel_allocate(psNuUart->pdma_perp_tx); + if (psNuUart->pdma_chanid_tx >= 0) { - pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_TX; + psNuUart->dma_flag |= RT_DEVICE_FLAG_DMA_TX; } } /* Allocate UART_RX nu_dma channel */ - if (pusrt->pdma_perp_rx != NU_PDMA_UNUSED) + if (psNuUart->pdma_perp_rx != NU_PDMA_UNUSED) { - pusrt->pdma_chanid_rx = nu_pdma_channel_allocate(pusrt->pdma_perp_rx); - if (pusrt->pdma_chanid_rx >= 0) + psNuUart->pdma_chanid_rx = nu_pdma_channel_allocate(psNuUart->pdma_perp_rx); + if (psNuUart->pdma_chanid_rx >= 0) { rt_err_t ret = RT_EOK; - pusrt->dma_flag |= RT_DEVICE_FLAG_DMA_RX; - ret = nu_pdma_sgtbls_allocate(&pusrt->pdma_rx_desc, 1); + psNuUart->dma_flag |= RT_DEVICE_FLAG_DMA_RX; + ret = nu_pdma_sgtbls_allocate(&psNuUart->pdma_rx_desc, 1); RT_ASSERT(ret == RT_EOK); } } @@ -924,14 +1052,14 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * RT_ASSERT(serial); /* Get base address of uart register */ - UART_T *uart_base = psNuUart->uart_base; + UART_T *base = psNuUart->base; switch (cmd) { case RT_DEVICE_CTRL_CLR_INT: if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Disable INT-RX */ { - UART_DISABLE_INT(uart_base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk); + UART_DISABLE_INT(base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk); } else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Disable DMA-RX */ { @@ -940,8 +1068,9 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * if (psNuUart->dma_flag & RT_DEVICE_FLAG_DMA_RX) { nu_pdma_channel_terminate(psNuUart->pdma_chanid_rx); + nu_pdma_uart_rxbuf_free(psNuUart); } - UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk); + UART_DISABLE_INT(base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk | UART_INTEN_TOCNTEN_Msk); #endif } break; @@ -949,7 +1078,7 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * case RT_DEVICE_CTRL_SET_INT: if (ctrl_arg == RT_DEVICE_FLAG_INT_RX) /* Enable INT-RX */ { - UART_ENABLE_INT(uart_base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk); + UART_ENABLE_INT(base, UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk); } break; @@ -958,14 +1087,11 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Configure and trigger DMA-RX */ { struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; - psNuUart->rxdma_trigger_len = serial->config.bufsz; - psNuUart->rx_write_offset = 0; - - result = nu_pdma_uart_rx_config(serial, &rx_fifo->buffer[0], psNuUart->rxdma_trigger_len); // Config & trigger + result = nu_pdma_uart_rx_config(psNuUart, &rx_fifo->buffer[0], serial->config.bufsz); // Config & trigger } else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) /* Configure DMA-TX */ { - result = nu_pdma_uart_tx_config(serial); + result = nu_pdma_uart_tx_config(psNuUart); } break; #endif @@ -975,18 +1101,19 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * rt_hw_interrupt_mask(psNuUart->irqn); #if defined(RT_SERIAL_USING_DMA) - UART_DISABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk); - UART_DISABLE_INT(uart_base, UART_INTEN_TXPDMAEN_Msk); + UART_DISABLE_INT(base, UART_INTEN_RLSIEN_Msk | UART_INTEN_RXPDMAEN_Msk | UART_INTEN_TOCNTEN_Msk); + UART_DISABLE_INT(base, UART_INTEN_TXPDMAEN_Msk); if (psNuUart->dma_flag != 0) { nu_pdma_channel_terminate(psNuUart->pdma_chanid_tx); nu_pdma_channel_terminate(psNuUart->pdma_chanid_rx); + nu_pdma_uart_rxbuf_free(psNuUart); } #endif /* Close UART port */ - UART_Close(uart_base); + UART_Close(base); break; @@ -1003,16 +1130,18 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void * */ static int nu_uart_send(struct rt_serial_device *serial, char c) { + nu_uart_t psNuUart = (nu_uart_t)serial; + RT_ASSERT(serial); /* Get base address of uart register */ - UART_T *uart_base = ((nu_uart_t)serial)->uart_base; + UART_T *base = psNuUart->base; /* Waiting if TX-FIFO is full. */ - while (UART_IS_TX_FULL(uart_base)); + while (UART_IS_TX_FULL(base)); /* Put char into TX-FIFO */ - UART_WRITE(uart_base, c); + UART_WRITE(base, c); return 1; } @@ -1022,19 +1151,33 @@ static int nu_uart_send(struct rt_serial_device *serial, char c) */ static int nu_uart_receive(struct rt_serial_device *serial) { + nu_uart_t psNuUart = (nu_uart_t)serial; + RT_ASSERT(serial); /* Get base address of uart register */ - UART_T *uart_base = ((nu_uart_t)serial)->uart_base; + UART_T *base = psNuUart->base; /* Return failure if RX-FIFO is empty. */ - if (UART_GET_RX_EMPTY(uart_base)) + if (UART_GET_RX_EMPTY(base)) { return -1; } /* Get char from RX-FIFO */ - return UART_READ(uart_base); + return UART_READ(base); +} + +void nu_uart_set_loopback(struct rt_serial_device *serial, rt_bool_t bOn) +{ + nu_uart_t psNuUart = (nu_uart_t)serial; + + RT_ASSERT(serial); + + /* Get base address of uart register */ + UART_T *base = psNuUart->base; + + bOn ? (base->MODEM |= 0x10) : (base->MODEM &= ~0x10); } /** diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.c new file mode 100644 index 0000000000..e17d7b2aca --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.c @@ -0,0 +1,34 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#include "rtthread.h" + +#if defined(BSP_USING_UMCTL2) + +#include "drv_common.h" + +rt_err_t nu_umctl2_init(void) +{ + UMCTL2->PCTRL_0 = UMCTL2_PCTRL_0_port_en_Msk; //[0x0490] + UMCTL2->PCTRL_1 = UMCTL2_PCTRL_1_port_en_Msk; //[0x0540] + UMCTL2->PCTRL_2 = UMCTL2_PCTRL_2_port_en_Msk; //[0x05f0] + UMCTL2->PCTRL_3 = UMCTL2_PCTRL_3_port_en_Msk; //[0x06a0] + + UMCTL2->PCTRL_4 = UMCTL2_PCTRL_4_port_en_Msk; //[0x0750] + UMCTL2->PCTRL_5 = UMCTL2_PCTRL_5_port_en_Msk; //[0x0800] + UMCTL2->PCTRL_6 = UMCTL2_PCTRL_6_port_en_Msk; //[0x08b0] + UMCTL2->PCTRL_7 = UMCTL2_PCTRL_7_port_en_Msk; //[0x0960] + + return RT_EOK; +} + +#endif //#if defined(BSP_USING_UMCTL2) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.h new file mode 100644 index 0000000000..e5d539f035 --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_umctl2.h @@ -0,0 +1,18 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-20 Wayne First version +* +******************************************************************************/ + +#ifndef __DRV_UMCTL2_H__ +#define __DRV_UMCTL2_H__ + +rt_err_t nu_umctl2_init(void); + +#endif /* __DRV_UMCTL2_H__*/ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_usbhost.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_usbhost.c index 2707f1c4dc..cc0642c9c8 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_usbhost.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_usbhost.c @@ -517,7 +517,7 @@ static int nu_pipe_xfer(upipe_t pipe, rt_uint8_t token, void *buffer, int nbytes if ((pipe->ep.bEndpointAddress & USB_DIR_MASK) == USB_DIR_OUT) { rt_memcpy(buffer_nonch, buffer, nbytes); - rt_hw_cpu_dcache_clean_inv((void *)buffer_nonch, nbytes); + rt_hw_cpu_dcache_clean_and_invalidate((void *)buffer_nonch, nbytes); } } diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.c new file mode 100644 index 0000000000..b8b5899f8e --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.c @@ -0,0 +1,268 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-5 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(BSP_USING_WHC) + +#include +#include "drv_whc.h" +#include "drv_sys.h" +#include "nu_bitutil.h" + +/* Private define ---------------------------------------------------------------*/ +enum +{ + WHC_START = -1, +#if defined(BSP_USING_WHC0) + WHC0_IDX, +#endif +#if defined(BSP_USING_WHC1) + WHC1_IDX, +#endif + WHC_CNT +}; + +/* Private typedef --------------------------------------------------------------*/ +struct nu_whc_priv +{ + char *name; + WHC_T *base; + IRQn_Type irqn; + uint32_t rstidx; + + rt_device_t psChDev[WHC_CH]; +}; +typedef struct nu_whc_priv *nu_whc_priv_t; + +struct nu_whc +{ + struct rt_device dev; + nu_whc_priv_t psPriv; + uint32_t u32WhcChNum; + void *pvTxBuf; +}; +typedef struct nu_whc *nu_whc_t; + +static struct nu_whc_priv nu_whc_priv_arr [] = +{ +#if defined(BSP_USING_WHC0) + { + .name = "whc0", + .base = WHC0, + .irqn = WHC0_IRQn, + .rstidx = WHC0_RST, + }, +#endif +#if defined(BSP_USING_WHC1) + { + .name = "whc1", + .base = WHC1, + .irqn = WHC1_IRQn, + .rstidx = WHC1_RST, + }, +#endif +}; /* nu_whc_priv */ + +/** + * All WHC interrupt service routine + */ +static void nu_whc_isr(int vector, void *param) +{ + nu_whc_priv_t psNuWhcPriv = (nu_whc_priv_t)param; + + volatile uint32_t vu32Intsts = psNuWhcPriv->base->INTSTS; + uint32_t irqidx; + + while ((irqidx = nu_ctz(vu32Intsts)) != 32) + { + uint32_t u32IsrBitMask = 1 << irqidx ; + + switch (irqidx) + { + /* Process TX-complete interrupt event */ + case WHC_INTSTS_TX0IF_Pos: + case WHC_INTSTS_TX1IF_Pos: + case WHC_INTSTS_TX2IF_Pos: + case WHC_INTSTS_TX3IF_Pos: + { + uint32_t u32ChNum = irqidx - WHC_INTSTS_TX0IF_Pos; + rt_device_t device = psNuWhcPriv->psChDev[u32ChNum]; + nu_whc_t psWhc = (nu_whc_t)device; + + if (device->tx_complete && psWhc->pvTxBuf) + { + device->tx_complete(device, psWhc->pvTxBuf); + psWhc->pvTxBuf = RT_NULL; + } + } + break; + + /* Process RX-indicate interrupt event */ + case WHC_INTSTS_RX0IF_Pos: + case WHC_INTSTS_RX1IF_Pos: + case WHC_INTSTS_RX2IF_Pos: + case WHC_INTSTS_RX3IF_Pos: + { + uint32_t u32ChNum = irqidx - WHC_INTSTS_RX0IF_Pos; + rt_device_t device = psNuWhcPriv->psChDev[u32ChNum]; + + if (device->rx_indicate) + { + device->rx_indicate(device, 1); + } + } + break; + + default: + break; + } + + /* Clear interrupt bit. */ + WHC_CLR_INT_FLAG(psNuWhcPriv->base, u32IsrBitMask); + + /* Clear served bit */ + vu32Intsts &= ~(u32IsrBitMask); + } +} + +rt_err_t nu_whc_init(rt_device_t dev) +{ + return RT_EOK; +} + +rt_err_t nu_whc_open(rt_device_t dev, rt_uint16_t oflag) +{ + nu_whc_t psWhc = (nu_whc_t)dev; + nu_whc_priv_t psWhcPriv = psWhc->psPriv; + + WHC_ENABLE_INT(psWhcPriv->base, WHC_INTEN_TX0IEN_Msk << psWhc->u32WhcChNum | + WHC_INTEN_RX0IEN_Msk << psWhc->u32WhcChNum); + + return RT_EOK; +} + +rt_err_t nu_whc_close(rt_device_t dev) +{ + nu_whc_t psWhc = (nu_whc_t)dev; + nu_whc_priv_t psWhcPriv = psWhc->psPriv; + + WHC_DISABLE_INT(psWhcPriv->base, WHC_INTEN_TX0IEN_Msk << psWhc->u32WhcChNum | + WHC_INTEN_RX0IEN_Msk << psWhc->u32WhcChNum); + + return RT_EOK; +} + +rt_size_t nu_whc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size) +{ + nu_whc_t psWhc = (nu_whc_t)dev; + nu_whc_priv_t psWhcPriv = psWhc->psPriv; + + if ((sizeof(nu_whc_msg) != size) || ((uint32_t)buffer & 0x3)) + goto exit_nu_whc_read; + + if (WHC_Recv(psWhcPriv->base, psWhc->u32WhcChNum, (uint32_t *)buffer) < 0) + goto exit_nu_whc_read; + + return size; + +exit_nu_whc_read: + + return 0; +} + +rt_size_t nu_whc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size) +{ + nu_whc_t psWhc = (nu_whc_t)dev; + nu_whc_priv_t psWhcPriv = psWhc->psPriv; + + if ((sizeof(nu_whc_msg) != size) || ((uint32_t)buffer & 0x3)) + goto exit_nu_whc_write; + + psWhc->pvTxBuf = (void *)buffer; + if (WHC_Send(psWhcPriv->base, psWhc->u32WhcChNum, (uint32_t *)buffer) < 0) + goto exit_nu_whc_write; + + return size; + +exit_nu_whc_write: + + return 0; +} + +rt_err_t nu_whc_control(rt_device_t dev, int cmd, void *args) +{ + return RT_EOK; +} + +static rt_err_t whc_register(nu_whc_priv_t psWhcPriv) +{ + int i; + char szDevName[16]; + + for (i = 0; i < WHC_CH; i++) + { + nu_whc_t psWhc; + rt_device_t device = rt_device_create(RT_Device_Class_Miscellaneous, sizeof(struct nu_whc) - sizeof(struct rt_device)); + RT_ASSERT(device); + + psWhcPriv->psChDev[i] = device; + psWhc = (nu_whc_t)device; + psWhc->psPriv = psWhcPriv; + psWhc->u32WhcChNum = i; + + device->type = RT_Device_Class_Miscellaneous; + device->rx_indicate = RT_NULL; + device->tx_complete = RT_NULL; + +#ifdef RT_USING_DEVICE_OPS + device->ops = RT_NULL; +#else + device->init = nu_whc_init; + device->open = nu_whc_open; + device->close = nu_whc_close; + device->read = nu_whc_read; + device->write = nu_whc_write; + device->control = nu_whc_control; +#endif + device->user_data = (void *)psWhcPriv; + + rt_snprintf(szDevName, sizeof(szDevName), "%s-%d", psWhcPriv->name, psWhc->u32WhcChNum); + + RT_ASSERT(rt_device_register(device, szDevName, RT_DEVICE_FLAG_STANDALONE) == RT_EOK); + } + + return RT_EOK; +} + +/** + * Hardware Sem Initialization + */ +int rt_hw_whc_init(void) +{ + int i; + + for (i = (WHC_START + 1); i < WHC_CNT; i++) + { + nu_whc_priv_t psNuWhcPriv = &nu_whc_priv_arr[i]; + + whc_register(psNuWhcPriv); + + rt_hw_interrupt_install(psNuWhcPriv->irqn, nu_whc_isr, psNuWhcPriv, psNuWhcPriv->name); + rt_hw_interrupt_umask(nu_whc_priv_arr[i].irqn); + } + + return 0; +} +INIT_BOARD_EXPORT(rt_hw_whc_init); + +#endif //#if defined(BSP_USING_WHC) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.h b/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.h new file mode 100644 index 0000000000..02b7546aab --- /dev/null +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_whc.h @@ -0,0 +1,24 @@ +/**************************************************************************//** +* +* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-5 Wayne First version +* +******************************************************************************/ + +#ifndef __DRV_WHC_H__ +#define __DRV_WHC_H__ + +#include "drv_common.h" + +typedef struct +{ + uint32_t content[WHC_BUFFER_LEN]; +} nu_whc_msg; +typedef nu_whc_msg *nu_whc_msg_t; + +#endif /* __DRV_WHC_H__ */ diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/nu_clock_init.c b/bsp/nuvoton/libraries/ma35/rtt_port/nu_clock_init.c index 228a704f7b..53a95e9837 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/nu_clock_init.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/nu_clock_init.c @@ -191,11 +191,11 @@ static void nu_clock_i2s_init(void) { #if defined(BSP_USING_I2S0) CLK_EnableModuleClock(I2S0_MODULE); - CLK_SetModuleClock(I2S0_MODULE, CLK_CLKSEL4_I2S0SEL_SYSCLK1_DIV2, MODULE_NoMsk); + CLK_SetModuleClock(I2S0_MODULE, CLK_CLKSEL4_I2S0SEL_APLL, MODULE_NoMsk); #endif #if defined(BSP_USING_I2S1) CLK_EnableModuleClock(I2S1_MODULE); - CLK_SetModuleClock(I2S1_MODULE, CLK_CLKSEL4_I2S1SEL_SYSCLK1_DIV2, MODULE_NoMsk); + CLK_SetModuleClock(I2S1_MODULE, CLK_CLKSEL4_I2S1SEL_APLL, MODULE_NoMsk); #endif } @@ -365,6 +365,23 @@ void nu_clock_base_init(void) } #endif +static void nu_clock_hwsem_init(void) +{ +#if defined(BSP_USING_HWSEM0) + CLK_EnableModuleClock(HWSEM0_MODULE); +#endif +} + +static void nu_clock_whc_init(void) +{ +#if defined(BSP_USING_WHC0) + CLK_EnableModuleClock(WHC0_MODULE); +#endif +#if defined(BSP_USING_WHC1) + CLK_EnableModuleClock(WHC1_MODULE); +#endif +} + void nu_clock_init(void) { #if !defined(USE_MA35D1_SUBM) @@ -377,6 +394,8 @@ void nu_clock_init(void) nu_clock_disp_init(); #endif + nu_clock_whc_init(); + nu_clock_hwsem_init(); nu_clock_pdma_init(); nu_clock_gpio_init(); nu_clock_uart_init(); diff --git a/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig b/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig index 5739233cb5..ba9697f256 100644 --- a/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig @@ -12,6 +12,7 @@ config SOC_SERIES_N9H30 config BSP_USING_MMU bool "Enable MMU" + select ARCH_ARM_MMU default y config BSP_USING_GPIO diff --git a/bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c b/bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c index b553d3e970..443a4aaef2 100644 --- a/bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c +++ b/bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c @@ -370,9 +370,13 @@ static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Val break; case AUDIO_MIXER_VOLUME: { - uint8_t u8DACGAIN = 256 * ui32Value / 100; - I2C_WriteNAU8822(11, u8DACGAIN); - I2C_WriteNAU8822(12, u8DACGAIN); + uint8_t u8GAIN = 256 * ui32Value / 100; + I2C_WriteNAU8822(11, 0x100 | u8GAIN); + I2C_WriteNAU8822(12, 0x100 | u8GAIN); + + u8GAIN = 0x3F * ui32Value / 100; + I2C_WriteNAU8822(54, 0x100 | u8GAIN); + I2C_WriteNAU8822(55, 0x100 | u8GAIN); } break; case AUDIO_MIXER_QUERY: diff --git a/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMG160_driver/bmg160.h b/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMG160_driver/bmg160.h index d10b39bbb6..7041b49df3 100644 --- a/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMG160_driver/bmg160.h +++ b/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMG160_driver/bmg160.h @@ -1570,7 +1570,7 @@ FOR THE AUTO OFFSET INTERRUPT */ /***********************************************/ /**\name NUMERIC DEFINITIONS*/ /**********************************************/ -#define BMG160_INIT_VALUE ((u8)0) +#define BMG160_INIT_VALUE (0) #define BMG160_GEN_READ_WRITE_DATA_LENGTH ((u8)1) #define BMG160_X_DATA_LENGTH ((u8)2) #define BMG160_Y_DATA_LENGTH ((u8)2) diff --git a/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMM050_driver/bmm050.h b/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMM050_driver/bmm050.h index cf93270e01..8b9bfa8936 100644 --- a/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMM050_driver/bmm050.h +++ b/bsp/nuvoton/libraries/nu_packages/BMX055/libraries/BMM050_driver/bmm050.h @@ -709,7 +709,7 @@ delay_func(delay_in_msec) #define E_BMM050_NULL_PTR ((s8)-127) #define ERROR ((s8)-1) #define E_BMM050_OUT_OF_RANGE ((s8)-2) -#define BMM050_NULL ((u8)0) +#define BMM050_NULL (0) #define E_BMM050_UNDEFINED_MODE (0) /********************************************/ diff --git a/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.c b/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.c index d2d946119c..cf1ada0410 100644 --- a/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.c +++ b/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.c @@ -248,14 +248,15 @@ static double get_mdps_value(int32_t i32AccelVal) return 0.0f; } -static rt_size_t bmx055_fetch_data(rt_sensor_t sensor, void *buf, rt_size_t len) +static rt_ssize_t bmx055_fetch_data(rt_sensor_t sensor, rt_sensor_data_t data, rt_size_t len) { - struct rt_sensor_data *data = (struct rt_sensor_data *)buf; + RT_ASSERT(data); + switch (sensor->info.type) { - case RT_SENSOR_CLASS_ACCE: + case RT_SENSOR_TYPE_ACCE: bma2x2_read_accel_xyzt(&g_sbmx055.accel_xyzt); - data->type = RT_SENSOR_CLASS_ACCE; + data->type = RT_SENSOR_TYPE_ACCE; /* Report mg */ data->data.acce.x = (int32_t)get_mg_value(g_sbmx055.accel_xyzt.x); @@ -263,9 +264,9 @@ static rt_size_t bmx055_fetch_data(rt_sensor_t sensor, void *buf, rt_size_t len) data->data.acce.z = (int32_t)get_mg_value(g_sbmx055.accel_xyzt.z); break; - case RT_SENSOR_CLASS_GYRO: + case RT_SENSOR_TYPE_GYRO: bmg160_get_data_XYZI(&g_sbmx055.gyro_xyzi); - data->type = RT_SENSOR_CLASS_GYRO; + data->type = RT_SENSOR_TYPE_GYRO; /* Report mdps */ data->data.gyro.x = (int32_t)get_mdps_value(g_sbmx055.gyro_xyzi.datax); @@ -273,9 +274,9 @@ static rt_size_t bmx055_fetch_data(rt_sensor_t sensor, void *buf, rt_size_t len) data->data.gyro.z = (int32_t)get_mdps_value(g_sbmx055.gyro_xyzi.dataz); break; - case RT_SENSOR_CLASS_MAG: + case RT_SENSOR_TYPE_MAG: bmm050_read_mag_data_XYZ(&g_sbmx055.mag_data); - data->type = RT_SENSOR_CLASS_MAG; + data->type = RT_SENSOR_TYPE_MAG; /* Report mquass */ data->data.mag.x = g_sbmx055.mag_data.datax; @@ -307,15 +308,15 @@ static rt_err_t bmx055_getid(rt_sensor_t sensor, rt_uint8_t *pu8) { switch (sensor->info.type) { - case RT_SENSOR_CLASS_ACCE: + case RT_SENSOR_TYPE_ACCE: *pu8 = g_sbmx055.accel.chip_id; break; - case RT_SENSOR_CLASS_GYRO: + case RT_SENSOR_TYPE_GYRO: *pu8 = g_sbmx055.gyro.chip_id; break; - case RT_SENSOR_CLASS_MAG: + case RT_SENSOR_TYPE_MAG: *pu8 = g_sbmx055.mag.company_id; break; } @@ -329,19 +330,19 @@ static rt_err_t bmx055_set_power(rt_sensor_t sensor, rt_uint8_t power_mode) switch (sensor->info.type) { - case RT_SENSOR_CLASS_ACCE: + case RT_SENSOR_TYPE_ACCE: { switch (power_mode) { - case RT_SENSOR_POWER_DOWN: + case RT_SENSOR_MODE_POWER_DOWN: power_ctr = BMA2x2_MODE_STANDBY; break; - case RT_SENSOR_POWER_NORMAL: + case RT_SENSOR_MODE_POWER_MEDIUM: power_ctr = BMA2x2_MODE_NORMAL; break; - case RT_SENSOR_POWER_LOW: + case RT_SENSOR_MODE_POWER_LOW: power_ctr = BMA2x2_MODE_LOWPOWER1; break; @@ -355,15 +356,15 @@ static rt_err_t bmx055_set_power(rt_sensor_t sensor, rt_uint8_t power_mode) } break; - case RT_SENSOR_CLASS_GYRO: + case RT_SENSOR_TYPE_GYRO: { switch (power_mode) { - case RT_SENSOR_POWER_DOWN: + case RT_SENSOR_MODE_POWER_DOWN: power_ctr = BMG160_MODE_DEEPSUSPEND; break; - case RT_SENSOR_POWER_NORMAL: + case RT_SENSOR_MODE_POWER_MEDIUM: power_ctr = BMG160_MODE_NORMAL; break; @@ -377,15 +378,15 @@ static rt_err_t bmx055_set_power(rt_sensor_t sensor, rt_uint8_t power_mode) } break; - case RT_SENSOR_CLASS_MAG: + case RT_SENSOR_TYPE_MAG: { switch (power_mode) { - case RT_SENSOR_POWER_DOWN: + case RT_SENSOR_MODE_POWER_DOWN: power_ctr = 0; break; - case RT_SENSOR_POWER_NORMAL: + case RT_SENSOR_MODE_POWER_MEDIUM: power_ctr = 1; break; @@ -412,7 +413,7 @@ static rt_err_t bmx055_set_range(rt_sensor_t sensor, rt_uint16_t range) switch (sensor->info.type) { - case RT_SENSOR_CLASS_ACCE: + case RT_SENSOR_TYPE_ACCE: { idx = find_param_index(range, accel_ranges, sizeof(accel_ranges)); if (bma2x2_set_range(accel_ranges[idx].reg) != 0) @@ -422,7 +423,7 @@ static rt_err_t bmx055_set_range(rt_sensor_t sensor, rt_uint16_t range) } break; - case RT_SENSOR_CLASS_GYRO: + case RT_SENSOR_TYPE_GYRO: { idx = find_param_index(range, gyro_ranges, sizeof(gyro_ranges)); if (bmg160_set_range_reg(gyro_ranges[idx].reg) != 0) @@ -446,7 +447,7 @@ static rt_err_t bmx055_set_odr(rt_sensor_t sensor, rt_uint16_t odr_hz) int idx; switch (sensor->info.type) { - case RT_SENSOR_CLASS_ACCE: + case RT_SENSOR_TYPE_ACCE: { idx = find_param_index(odr_hz, accel_odr, sizeof(accel_odr)); if (bma2x2_set_bw(accel_odr[idx].reg) != 0) @@ -454,7 +455,7 @@ static rt_err_t bmx055_set_odr(rt_sensor_t sensor, rt_uint16_t odr_hz) } break; - case RT_SENSOR_CLASS_GYRO: + case RT_SENSOR_TYPE_GYRO: { idx = find_param_index(odr_hz, gyro_odr, sizeof(gyro_odr)); if (bmg160_set_bw(gyro_odr[idx].reg) != 0) @@ -462,7 +463,7 @@ static rt_err_t bmx055_set_odr(rt_sensor_t sensor, rt_uint16_t odr_hz) } break; - case RT_SENSOR_CLASS_MAG: + case RT_SENSOR_TYPE_MAG: { idx = find_param_index(odr_hz, mag_odr, sizeof(mag_odr)); if (bmm050_set_data_rate(mag_odr[idx].reg) != 0) @@ -483,8 +484,8 @@ exit_bmx055_set_power: static rt_err_t bmx055_control(rt_sensor_t sensor, int cmd, void *args) { - RT_ASSERT(sensor != RT_NULL); - RT_ASSERT(args != RT_NULL); + RT_ASSERT(sensor); + RT_ASSERT(args); switch (cmd) { @@ -496,7 +497,7 @@ static rt_err_t bmx055_control(rt_sensor_t sensor, int cmd, void *args) case RT_SENSOR_CTRL_SET_RANGE: return bmx055_set_range(sensor, (rt_uint32_t)args); - case RT_SENSOR_CTRL_SET_POWER: + case RT_SENSOR_CTRL_SET_POWER_MODE: return bmx055_set_power(sensor, ((rt_uint32_t)args & 0xff)); case RT_SENSOR_CTRL_SET_ODR: @@ -521,14 +522,14 @@ static int rt_hw_bmx055_accel_init(const char *name, struct rt_sensor_config *cf if (sensor == RT_NULL) return -(RT_ENOMEM); - sensor->info.type = RT_SENSOR_CLASS_ACCE; - sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; - sensor->info.model = "bmx055_acce"; - sensor->info.unit = RT_SENSOR_UNIT_MG; - sensor->info.intf_type = RT_SENSOR_INTF_I2C; - sensor->info.range_max = 16000; - sensor->info.range_min = 2000; - sensor->info.period_min = 100; + sensor->info.type = RT_SENSOR_TYPE_ACCE; + sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; + sensor->info.name = "bmx055_acce"; + sensor->info.unit = RT_SENSOR_UNIT_MG; + sensor->info.intf_type = RT_SENSOR_INTF_I2C; + sensor->info.scale.range_max = 16000; + sensor->info.scale.range_min = 2000; + sensor->info.acquire_min = 100; rt_memcpy(&sensor->config, cfg, sizeof(struct rt_sensor_config)); sensor->ops = &sensor_ops; @@ -552,14 +553,14 @@ static int rt_hw_bmx055_gyro_init(const char *name, struct rt_sensor_config *cfg if (sensor == RT_NULL) return -(RT_ENOMEM); - sensor->info.type = RT_SENSOR_CLASS_GYRO; - sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; - sensor->info.model = "bmx055_gyro"; - sensor->info.unit = RT_SENSOR_UNIT_MDPS; - sensor->info.intf_type = RT_SENSOR_INTF_I2C; - sensor->info.range_max = 2000; - sensor->info.range_min = 125; - sensor->info.period_min = 100; + sensor->info.type = RT_SENSOR_TYPE_GYRO; + sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; + sensor->info.name = "bmx055_gyro"; + sensor->info.unit = RT_SENSOR_UNIT_MDPS; + sensor->info.intf_type = RT_SENSOR_INTF_I2C; + sensor->info.scale.range_max = 2000; + sensor->info.scale.range_min = 125; + sensor->info.acquire_min = 100; rt_memcpy(&sensor->config, cfg, sizeof(struct rt_sensor_config)); sensor->ops = &sensor_ops; @@ -583,14 +584,14 @@ static int rt_hw_bmx055_mag_init(const char *name, struct rt_sensor_config *cfg) if (sensor == RT_NULL) return -(RT_ENOMEM); - sensor->info.type = RT_SENSOR_CLASS_MAG; - sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; - sensor->info.model = "bmx055_mag"; - sensor->info.unit = RT_SENSOR_UNIT_MGAUSS; - sensor->info.intf_type = RT_SENSOR_INTF_I2C; - sensor->info.range_max = 25000; // 1uT = 10*mGauss, X/Y: 1300uT=13000mGauss, Z: 2500uT=25000mG - sensor->info.range_min = 0; - sensor->info.period_min = 100; + sensor->info.type = RT_SENSOR_TYPE_MAG; + sensor->info.vendor = RT_SENSOR_VENDOR_BOSCH; + sensor->info.name = "bmx055_mag"; + sensor->info.unit = RT_SENSOR_UNIT_MGAUSS; + sensor->info.intf_type = RT_SENSOR_INTF_I2C; + sensor->info.scale.range_max = 25000; // 1uT = 10*mGauss, X/Y: 1300uT=13000mGauss, Z: 2500uT=25000mG + sensor->info.scale.range_min = 0; + sensor->info.acquire_min = 100; rt_memcpy(&sensor->config, cfg, sizeof(struct rt_sensor_config)); sensor->ops = &sensor_ops; diff --git a/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.h b/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.h index 39dbb6a29e..d1c3494ee3 100644 --- a/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.h +++ b/bsp/nuvoton/libraries/nu_packages/BMX055/sensor_bmx055.h @@ -13,7 +13,8 @@ #ifndef __SENSOR_BMX055_H__ #define __SENSOR_BMX055_H__ -#include "sensor.h" +#include "rtdevice.h" + #include "bma2x2.h" #include "bmm050.h" #include "bmg160.h" diff --git a/bsp/nuvoton/libraries/nu_packages/Demo/SConscript b/bsp/nuvoton/libraries/nu_packages/Demo/SConscript index beabf4e3c6..fa31056d8f 100644 --- a/bsp/nuvoton/libraries/nu_packages/Demo/SConscript +++ b/bsp/nuvoton/libraries/nu_packages/Demo/SConscript @@ -1,13 +1,9 @@ Import('RTT_ROOT') from building import * + cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') CPPPATH = [cwd] -src = Split(""" - usbd_hid_dance_mouse.c - slcd_show_tick.c - usbd_cdc_vcom_echo.c - atdev_utils.c - """) group = DefineGroup('nu_pkgs_demo', src, depend = ['NU_PKG_USING_DEMO'], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/nuvoton/libraries/nu_packages/CCAP_Sensors/ccap_demo.c b/bsp/nuvoton/libraries/nu_packages/Demo/ccap_demo.c similarity index 99% rename from bsp/nuvoton/libraries/nu_packages/CCAP_Sensors/ccap_demo.c rename to bsp/nuvoton/libraries/nu_packages/Demo/ccap_demo.c index 41426d2f8f..dcc3606f77 100644 --- a/bsp/nuvoton/libraries/nu_packages/CCAP_Sensors/ccap_demo.c +++ b/bsp/nuvoton/libraries/nu_packages/Demo/ccap_demo.c @@ -12,6 +12,8 @@ #include +#if defined(BSP_USING_CCAP) + #include "drv_ccap.h" #include @@ -504,7 +506,9 @@ static void ccap_grabber(void *parameter) exit_ccap_grabber: ccap_sensor_fini(rt_device_find(psGrabberParam->devname_ccap), rt_device_find(psGrabberParam->devname_sensor)); - rt_device_close(psDevLcd); + + if (psDevLcd != RT_NULL) + rt_device_close(psDevLcd); return; } @@ -539,4 +543,5 @@ int ccap_demo(void) return 0; } MSH_CMD_EXPORT(ccap_demo, camera capture demo); -//INIT_APP_EXPORT(ccap_demo); +//INIT_ENV_EXPORT(ccap_demo); +#endif diff --git a/bsp/nuvoton/libraries/nu_packages/Demo/ccap_saver.c b/bsp/nuvoton/libraries/nu_packages/Demo/ccap_saver.c new file mode 100644 index 0000000000..3004711de4 --- /dev/null +++ b/bsp/nuvoton/libraries/nu_packages/Demo/ccap_saver.c @@ -0,0 +1,409 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-8-16 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(BSP_USING_CCAP) + +#include "drv_ccap.h" +#include + +#define DBG_ENABLE +#define DBG_LEVEL DBG_LOG +#define DBG_SECTION_NAME "ccap.saver" +#define DBG_COLOR +#include + +#define THREAD_PRIORITY 5 +#define THREAD_STACK_SIZE 4096 +#define THREAD_TIMESLICE 5 + +#define DEF_FRAME_WIDTH 640 +#define DEF_FRAME_HEIGHT 480 + +typedef struct +{ + char *thread_name; + char *devname_ccap; + char *devname_sensor; +} ccap_grabber_param; +typedef ccap_grabber_param *ccap_grabber_param_t; + +typedef struct +{ + ccap_config sCcapConfig; + uint32_t u32CurFBPointer; + uint32_t u32FrameEnd; + rt_sem_t semFrameEnd; +} ccap_grabber_context; +typedef ccap_grabber_context *ccap_grabber_context_t; + +static void nu_ccap_event_hook(void *pvData, uint32_t u32EvtMask) +{ + ccap_grabber_context_t psGrabberContext = (ccap_grabber_context_t)pvData; + + if (u32EvtMask & NU_CCAP_FRAME_END) + { + rt_sem_release(psGrabberContext->semFrameEnd); + } + + if (u32EvtMask & NU_CCAP_ADDRESS_MATCH) + { + LOG_I("Address matched"); + } + + if (u32EvtMask & NU_CCAP_MEMORY_ERROR) + { + LOG_E("Access memory error"); + } +} + +static rt_device_t ccap_sensor_init(ccap_grabber_context_t psGrabberContext, ccap_grabber_param_t psGrabberParam) +{ + rt_err_t ret; + ccap_view_info_t psViewInfo; + sensor_mode_info *psSensorModeInfo; + rt_device_t psDevSensor = RT_NULL; + rt_device_t psDevCcap = RT_NULL; + ccap_config_t psCcapConfig = &psGrabberContext->sCcapConfig; + + psDevCcap = rt_device_find(psGrabberParam->devname_ccap); + if (psDevCcap == RT_NULL) + { + LOG_E("Can't find %s", psGrabberParam->devname_ccap); + goto exit_ccap_sensor_init; + } + + psDevSensor = rt_device_find(psGrabberParam->devname_sensor); + if (psDevSensor == RT_NULL) + { + LOG_E("Can't find %s", psGrabberParam->devname_sensor); + goto exit_ccap_sensor_init; + } + + /* Packet pipe for preview */ + psCcapConfig->sPipeInfo_Packet.u32Width = DEF_FRAME_WIDTH; + psCcapConfig->sPipeInfo_Packet.u32Height = DEF_FRAME_HEIGHT; + psCcapConfig->sPipeInfo_Packet.pu8FarmAddr = rt_malloc_align(psCcapConfig->sPipeInfo_Packet.u32Height * psCcapConfig->sPipeInfo_Packet.u32Width * 2, 32); + if (psCcapConfig->sPipeInfo_Packet.pu8FarmAddr == RT_NULL) + { + LOG_E("Can't malloc"); + goto exit_ccap_sensor_init; + } + + psCcapConfig->sPipeInfo_Packet.u32PixFmt = CCAP_PAR_OUTFMT_RGB565; + psCcapConfig->u32Stride_Packet = psCcapConfig->sPipeInfo_Packet.u32Width; + + /* Planar pipe for encoding */ + psCcapConfig->sPipeInfo_Planar.u32Width = psCcapConfig->sPipeInfo_Packet.u32Width; + psCcapConfig->sPipeInfo_Planar.u32Height = psCcapConfig->sPipeInfo_Packet.u32Height; + psCcapConfig->sPipeInfo_Planar.pu8FarmAddr = rt_malloc_align(psCcapConfig->sPipeInfo_Planar.u32Height * psCcapConfig->sPipeInfo_Planar.u32Width * 2, 32); + if (psCcapConfig->sPipeInfo_Planar.pu8FarmAddr == RT_NULL) + { + LOG_E("Can't malloc"); + goto exit_ccap_sensor_init; + } + + psCcapConfig->sPipeInfo_Planar.u32PixFmt = CCAP_PAR_PLNFMT_YUV422; + psCcapConfig->u32Stride_Planar = psCcapConfig->sPipeInfo_Planar.u32Width; + + LOG_I("Packet.FarmAddr@0x%08X", psCcapConfig->sPipeInfo_Packet.pu8FarmAddr); + LOG_I("Packet.FarmWidth: %d", psCcapConfig->sPipeInfo_Packet.u32Width); + LOG_I("Packet.FarmHeight: %d", psCcapConfig->sPipeInfo_Packet.u32Height); + + LOG_I("Planar.FarmAddr@0x%08X", psCcapConfig->sPipeInfo_Planar.pu8FarmAddr); + LOG_I("Planar.FarmWidth: %d", psCcapConfig->sPipeInfo_Planar.u32Width); + LOG_I("Planar.FarmHeight: %d", psCcapConfig->sPipeInfo_Planar.u32Height); + + /* open CCAP */ + ret = rt_device_open(psDevCcap, 0); + if (ret != RT_EOK) + { + LOG_E("Can't open %s", psGrabberParam->devname_ccap); + goto exit_ccap_sensor_init; + } + + /* Find suit mode for packet pipe */ + if (psCcapConfig->sPipeInfo_Packet.pu8FarmAddr != RT_NULL) + { + /* Check view window of packet pipe */ + psViewInfo = &psCcapConfig->sPipeInfo_Packet; + + if ((rt_device_control(psDevSensor, CCAP_SENSOR_CMD_GET_SUIT_MODE, (void *)&psViewInfo) != RT_EOK) + || (psViewInfo == RT_NULL)) + { + LOG_E("Can't get suit mode for packet."); + goto fail_ccap_init; + } + } + + /* Find suit mode for planner pipe */ + if (psCcapConfig->sPipeInfo_Planar.pu8FarmAddr != RT_NULL) + { + int recheck = 1; + + if (psViewInfo != RT_NULL) + { + if ((psCcapConfig->sPipeInfo_Planar.u32Width <= psViewInfo->u32Width) || + (psCcapConfig->sPipeInfo_Planar.u32Height <= psViewInfo->u32Height)) + recheck = 0; + } + + if (recheck) + { + /* Check view window of planner pipe */ + psViewInfo = &psCcapConfig->sPipeInfo_Planar; + + /* Find suit mode */ + if ((rt_device_control(psDevSensor, CCAP_SENSOR_CMD_GET_SUIT_MODE, (void *)&psViewInfo) != RT_EOK) + || (psViewInfo == RT_NULL)) + { + LOG_E("Can't get suit mode for planner."); + goto exit_ccap_sensor_init; + } + } + } + + /* Set cropping rectangle */ + psCcapConfig->sRectCropping.x = 0; + psCcapConfig->sRectCropping.y = 0; + psCcapConfig->sRectCropping.width = psViewInfo->u32Width; + psCcapConfig->sRectCropping.height = psViewInfo->u32Height; + + /* ISR Hook */ + psCcapConfig->pfnEvHndler = nu_ccap_event_hook; + psCcapConfig->pvData = (void *)psGrabberContext; + + /* Get Suitable mode. */ + psSensorModeInfo = (sensor_mode_info *)psViewInfo; + + /* Feed CCAP configuration */ + ret = rt_device_control(psDevCcap, CCAP_CMD_CONFIG, (void *)psCcapConfig); + if (ret != RT_EOK) + { + LOG_E("Can't feed configuration %s", psGrabberParam->devname_ccap); + goto fail_ccap_init; + } + + { + int i32SenClk = psSensorModeInfo->u32SenClk; + + /* speed up pixel clock */ + if (rt_device_control(psDevCcap, CCAP_CMD_SET_SENCLK, (void *)&i32SenClk) != RT_EOK) + { + LOG_E("Can't feed setting."); + goto fail_ccap_init; + } + } + + /* Initial CCAP sensor */ + if (rt_device_open(psDevSensor, 0) != RT_EOK) + { + LOG_E("Can't open sensor."); + goto fail_sensor_init; + } + + /* Feed settings to sensor */ + if (rt_device_control(psDevSensor, CCAP_SENSOR_CMD_SET_MODE, (void *)psSensorModeInfo) != RT_EOK) + { + LOG_E("Can't feed setting."); + goto fail_sensor_init; + } + + ret = rt_device_control(psDevCcap, CCAP_CMD_SET_PIPES, (void *)psViewInfo); + if (ret != RT_EOK) + { + LOG_E("Can't set pipes %s", psGrabberParam->devname_ccap); + goto fail_ccap_init; + } + + return psDevCcap; + +fail_sensor_init: + + if (psDevSensor) + rt_device_close(psDevSensor); + +fail_ccap_init: + + if (psDevCcap) + rt_device_close(psDevCcap); + +exit_ccap_sensor_init: + + psDevCcap = psDevSensor = RT_NULL; + + return psDevCcap; +} + +static void ccap_sensor_fini(rt_device_t psDevCcap, rt_device_t psDevSensor) +{ + if (psDevSensor) + rt_device_close(psDevSensor); + + if (psDevCcap) + rt_device_close(psDevCcap); +} + +static int ccap_save_frame(char *szFilename, const void *data, size_t size) +{ + int fd; + int wrote_size = 0; + + fd = open(szFilename, O_WRONLY | O_CREAT); + if (fd < 0) + { + LOG_E("Could not open %s for writing.", szFilename); + goto exit_ccap_save_planar_frame; + } + + if ((wrote_size = write(fd, data, size)) != size) + { + LOG_E("Could not write to %s (%d != %d).", szFilename, wrote_size, size); + goto exit_ccap_save_planar_frame; + } + + wrote_size = size; + + LOG_I("Output %s", szFilename); + +exit_ccap_save_planar_frame: + + if (fd >= 0) + close(fd); + + return wrote_size; +} + +static void ccap_grabber(void *parameter) +{ + ccap_grabber_param_t psGrabberParam = (ccap_grabber_param_t)parameter; + ccap_grabber_context sGrabberContext; + + rt_device_t psDevCcap = RT_NULL; + + rt_memset((void *)&sGrabberContext, 0, sizeof(ccap_grabber_context)); + + sGrabberContext.semFrameEnd = rt_sem_create(psGrabberParam->devname_ccap, 0, RT_IPC_FLAG_FIFO); + if (sGrabberContext.semFrameEnd == RT_NULL) + { + LOG_E("Can't allocate sem resource %s", psGrabberParam->devname_ccap); + goto exit_ccap_grabber; + } + + /* initial ccap & sensor*/ + psDevCcap = ccap_sensor_init(&sGrabberContext, psGrabberParam); + if (psDevCcap == RT_NULL) + { + LOG_E("Can't init %s and %s", psGrabberParam->devname_ccap, psGrabberParam->devname_sensor); + goto exit_ccap_grabber; + } + + /* Start to capture */ + if (rt_device_control(psDevCcap, CCAP_CMD_START_CAPTURE, RT_NULL) != RT_EOK) + { + LOG_E("Can't start %s", psGrabberParam->devname_ccap); + goto exit_ccap_grabber; + } + + while (1) + { + if (sGrabberContext.semFrameEnd) + { + rt_sem_take(sGrabberContext.semFrameEnd, RT_WAITING_FOREVER); + } + + sGrabberContext.u32FrameEnd++; + LOG_I("%s Grabbed %d", psGrabberParam->devname_ccap, sGrabberContext.u32FrameEnd); + + if (sGrabberContext.u32FrameEnd == 30) + { + char szFilename[64]; + uint32_t u32Factor = 0; + + LOG_I("%s Capturing %d", psGrabberParam->devname_ccap, sGrabberContext.u32FrameEnd); + + if (sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32PixFmt == CCAP_PAR_PLNFMT_YUV420) + { + u32Factor = 3; + rt_snprintf(szFilename, sizeof(szFilename), "/%08d_%dx%d.yuv420p", + rt_tick_get(), + sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Width, + sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Height); + } + else if (sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32PixFmt == CCAP_PAR_PLNFMT_YUV422) + { + u32Factor = 4; + rt_snprintf(szFilename, sizeof(szFilename), "/%08d_%s_%dx%d.yuv422p", + rt_tick_get(), + psGrabberParam->devname_ccap, + sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Width, + sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Height); + } + + if (u32Factor > 0) + { + /* Save YUV422 or YUV420 frame from packet pipe*/ + ccap_save_frame(szFilename, (const void *)sGrabberContext.sCcapConfig.sPipeInfo_Planar.pu8FarmAddr, sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Width * sGrabberContext.sCcapConfig.sPipeInfo_Planar.u32Height * u32Factor / 2); + } + + /* Save RGB565 frame from packet pipe*/ + rt_snprintf(szFilename, sizeof(szFilename), "/%08d_%s_%dx%d.rgb565", + rt_tick_get(), + psGrabberParam->devname_ccap, + sGrabberContext.sCcapConfig.sPipeInfo_Packet.u32Width, + sGrabberContext.sCcapConfig.sPipeInfo_Packet.u32Height); + + ccap_save_frame(szFilename, (const void *)sGrabberContext.sCcapConfig.sPipeInfo_Packet.pu8FarmAddr, sGrabberContext.sCcapConfig.sPipeInfo_Packet.u32Width * sGrabberContext.sCcapConfig.sPipeInfo_Packet.u32Height * 2); + + break; + } + } + +exit_ccap_grabber: + + ccap_sensor_fini(rt_device_find(psGrabberParam->devname_ccap), rt_device_find(psGrabberParam->devname_sensor)); + + return; +} + +static void ccap_grabber_create(ccap_grabber_param_t psGrabberParam) +{ + rt_thread_t ccap_thread = rt_thread_find(psGrabberParam->thread_name); + if (ccap_thread == RT_NULL) + { + ccap_thread = rt_thread_create(psGrabberParam->thread_name, + ccap_grabber, + psGrabberParam, + THREAD_STACK_SIZE, + THREAD_PRIORITY, + THREAD_TIMESLICE); + + if (ccap_thread != RT_NULL) + rt_thread_startup(ccap_thread); + } +} + +int ccap_saver(void) +{ +#if defined(BSP_USING_CCAP0) + static ccap_grabber_param ccap0_grabber_param = {"grab0", "ccap0", "sensor0"}; + ccap_grabber_create(&ccap0_grabber_param); +#endif +#if defined(BSP_USING_CCAP1) + static ccap_grabber_param ccap1_grabber_param = {"grab1", "ccap1", "sensor1"}; + ccap_grabber_create(&ccap1_grabber_param); +#endif + return 0; +} +MSH_CMD_EXPORT(ccap_saver, camera saver demo); +#endif diff --git a/bsp/nuvoton/libraries/nu_packages/Demo/hwsem_counter.c b/bsp/nuvoton/libraries/nu_packages/Demo/hwsem_counter.c new file mode 100644 index 0000000000..b07e69ba41 --- /dev/null +++ b/bsp/nuvoton/libraries/nu_packages/Demo/hwsem_counter.c @@ -0,0 +1,93 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-5 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(BSP_USING_HWSEM) + +#include "drv_common.h" +#include "drv_hwsem.h" + +#define DEF_COUNTER_ADDR_RTP (3*1024*1024) +#define DEF_COUNTER_ADDR_A35 ((0x80000000+DEF_COUNTER_ADDR_RTP)|UNCACHEABLE) + +#if defined(USE_MA35D1_SUBM) + #define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_RTP +#else + #define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_A35 +#endif + +static void hwsem_counter_go(void *parameter) +{ + rt_err_t ret; + rt_device_t psNuHwSem = (rt_device_t)parameter; + uint32_t *pu32Counter = (uint32_t *)DEF_COUNTER_ADDR; + + nu_mutex_t psNuMutex = nu_mutex_init(psNuHwSem, evHWSEM0); + if (psNuMutex == RT_NULL) + return; + + *pu32Counter = 0; + while (1) + { + ret = nu_mutex_take(psNuMutex, RT_WAITING_FOREVER); + if (ret != RT_EOK) + continue; + + if (*pu32Counter >= 10) + { + nu_mutex_release(psNuMutex); + break; + } + else + *pu32Counter = *pu32Counter + 1; + +#ifdef RT_USING_SMP + rt_kprintf("[%08x@CPU-%d] ->Inc %d@%08x\n", rt_thread_self(), rt_hw_cpu_id(), *pu32Counter, DEF_COUNTER_ADDR); +#else + rt_kprintf("[%08x]-> Inc %d@%08x\n", rt_thread_self(), *pu32Counter, DEF_COUNTER_ADDR); +#endif /* RT_USING_SMP */ + + nu_mutex_release(psNuMutex); + + /* Relax, fair to get the mutex. */ + rt_thread_mdelay(500); + } + + nu_mutex_deinit(psNuHwSem, evHWSEM0); +} + +static int hwsem_counter_app(void) +{ + rt_err_t result = 0; + rt_thread_t thread; + rt_device_t psNuHwSem = rt_device_find("hwsem0"); + if (psNuHwSem == RT_NULL) + return -1; + + thread = rt_thread_create("hwsa35", hwsem_counter_go, (void *)psNuHwSem, 2048, 25, 20); + if (thread != RT_NULL) + { +#ifdef RT_USING_SMP + rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)0); +#endif + result = rt_thread_startup(thread); + RT_ASSERT(result == RT_EOK); + } + + return 0; +} +INIT_APP_EXPORT(hwsem_counter_app); +MSH_CMD_EXPORT(hwsem_counter_app, demo hwsem); + +#endif /* #if defined(BSP_USING_HWSEM)*/ + diff --git a/bsp/nuvoton/libraries/nu_packages/Demo/smp_demo.c b/bsp/nuvoton/libraries/nu_packages/Demo/smp_demo.c new file mode 100644 index 0000000000..a3f8309521 --- /dev/null +++ b/bsp/nuvoton/libraries/nu_packages/Demo/smp_demo.c @@ -0,0 +1,177 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-8-16 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(RT_USING_SMP) +#include "drv_common.h" + + +#define DEF_COUNTER_ADDR_RTP (3*1024*1024) +#define DEF_COUNTER_ADDR_A35 ((0x80000000+DEF_COUNTER_ADDR_RTP)|UNCACHEABLE) + +#if defined(USE_MA35D1_SUBM) + #define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_RTP +#else + #define DEF_COUNTER_ADDR DEF_COUNTER_ADDR_A35 +#endif + +void happy_counter(void *pdata) +{ + uint32_t counter = 0; + while (1) + { + rt_kprintf("cpu-%d %d\r\n", rt_hw_cpu_id(), counter++); + rt_thread_mdelay(1000); + } +} + +void go_happy_counter(void) +{ + rt_thread_t tid = rt_thread_create("cpu-1", happy_counter, RT_NULL, 2048, 10, 20); + RT_ASSERT(tid != RT_NULL); + + rt_thread_control(tid, RT_THREAD_CTRL_BIND_CPU, (void *)1); + + rt_thread_startup(tid); +} +MSH_CMD_EXPORT(go_happy_counter, go happy counter); + +void happy_memcpy(void *pdata) +{ + volatile uint32_t counter = 0; + void *srcbuf, *dstbuf; + rt_tick_t last, now; + +#define DEF_BUF_SIZE 4096 +#define DEF_TIMES 500000 + srcbuf = rt_malloc_align(DEF_BUF_SIZE, nu_cpu_dcache_line_size()); + dstbuf = rt_malloc_align(DEF_BUF_SIZE, nu_cpu_dcache_line_size()); + + now = rt_tick_get(); + while (counter < DEF_TIMES) + { + rt_memcpy(dstbuf, srcbuf, DEF_BUF_SIZE); + counter++; + } + last = rt_tick_get(); + + if (rt_hw_cpu_id() == 1) + rt_thread_mdelay(1000); + + rt_kprintf("%d Bytes copied by cpu-%d in %d ms\n", DEF_TIMES * DEF_BUF_SIZE, rt_hw_cpu_id(), last - now); + + rt_free_align(srcbuf); + rt_free_align(dstbuf); +} + +void go_happy_memcpy_0_1(void) +{ + rt_thread_t tid0, tid1; + + tid0 = rt_thread_create("cpu-0", happy_memcpy, RT_NULL, 2048, 10, 20); + RT_ASSERT(tid0 != RT_NULL); + rt_thread_control(tid0, RT_THREAD_CTRL_BIND_CPU, (void *)0); + + tid1 = rt_thread_create("cpu-1", happy_memcpy, RT_NULL, 2048, 10, 20); + RT_ASSERT(tid1 != RT_NULL); + rt_thread_control(tid1, RT_THREAD_CTRL_BIND_CPU, (void *)1); + + rt_thread_startup(tid0); + rt_thread_startup(tid1); +} +MSH_CMD_EXPORT(go_happy_memcpy_0_1, go happy memcpy on dual - core); + +void go_happy_memcpy_0(void) +{ + rt_thread_t tid0; + + tid0 = rt_thread_create("cpu-0", happy_memcpy, RT_NULL, 2048, 10, 20); + RT_ASSERT(tid0 != RT_NULL); + rt_thread_control(tid0, RT_THREAD_CTRL_BIND_CPU, (void *)0); + + rt_thread_startup(tid0); +} +MSH_CMD_EXPORT(go_happy_memcpy_0, go happy memcpy on core0); + +void go_happy_memcpy_1(void) +{ + rt_thread_t tid1; + + tid1 = rt_thread_create("cpu-1", happy_memcpy, RT_NULL, 2048, 10, 20); + RT_ASSERT(tid1 != RT_NULL); + rt_thread_control(tid1, RT_THREAD_CTRL_BIND_CPU, (void *)1); + + rt_thread_startup(tid1); +} +MSH_CMD_EXPORT(go_happy_memcpy_1, go happy memcpy on core1); + +static void happy_mutex(void *parameter) +{ + rt_err_t ret; + rt_mutex_t psMutex = (rt_mutex_t)parameter; + uint32_t *pu32Counter = (uint32_t *)DEF_COUNTER_ADDR; + + *pu32Counter = 0; + while (1) + { + ret = rt_mutex_take(psMutex, RT_WAITING_FOREVER); + if (ret != RT_EOK) + continue; + + if (*pu32Counter >= 1000) + { + rt_mutex_release(psMutex); + break; + } + else + *pu32Counter = *pu32Counter + 1; + +#ifdef RT_USING_SMP + rt_kprintf("[%08x@CPU-%d] ->Inc %d@%08x\n", rt_thread_self(), rt_hw_cpu_id(), *pu32Counter, DEF_COUNTER_ADDR); +#else + rt_kprintf("[%08x]-> Inc %d@%08x\n", rt_thread_self(), *pu32Counter, DEF_COUNTER_ADDR); +#endif /* RT_USING_SMP */ + + rt_mutex_release(psMutex); + } +} + +static int go_happy_mutex(void) +{ + rt_thread_t thread; + rt_mutex_t sem = rt_mutex_create("mutexsem", RT_IPC_FLAG_PRIO); + + thread = rt_thread_create("mutex0", happy_mutex, (void *)sem, 2048, 25, 20); + if (thread != RT_NULL) + { +#ifdef RT_USING_SMP + rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)0); +#endif + rt_thread_startup(thread); + } + + thread = rt_thread_create("mutex1", happy_mutex, (void *)sem, 2048, 25, 20); + if (thread != RT_NULL) + { +#ifdef RT_USING_SMP + rt_thread_control(thread, RT_THREAD_CTRL_BIND_CPU, (void *)1); +#endif + rt_thread_startup(thread); + } + + return 0; +} +MSH_CMD_EXPORT(go_happy_mutex, demo mutex); + + +#endif diff --git a/bsp/nuvoton/libraries/nu_packages/Demo/wormhole_demo.c b/bsp/nuvoton/libraries/nu_packages/Demo/wormhole_demo.c new file mode 100644 index 0000000000..bf2b8d7ad7 --- /dev/null +++ b/bsp/nuvoton/libraries/nu_packages/Demo/wormhole_demo.c @@ -0,0 +1,325 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2022-10-10 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(BSP_USING_WHC) + +#include "drv_whc.h" +#include + +#define DBG_ENABLE +#define DBG_LEVEL DBG_LOG +#define DBG_SECTION_NAME "whc.demo" +#define DBG_COLOR +#include + +#define USE_WORMHOLE_CHNAME "whc0-0" + +typedef enum +{ + evCMD_MEM_ALLOCATE, + evCMD_MEM_FREE, + evCMD_MEM_COPY, + evCMD_DEVMEM_WRITE, + evCMD_DEVMEM_READ, + evCMD_MEM_SET +} nu_whc_cmd; + +typedef enum +{ + evCMD_REQ, + evCMD_RESP, +} nu_whc_cmd_type; + +#define CMD_TYPE_Pos 16 +#define CMD_TYPE_Msk (3<>CMD_TYPE_Pos)==evCMD_REQ) +#define CMD_IS_RESP(m) (((m.u32Cmd&CMD_TYPE_Msk)>>CMD_TYPE_Pos)==evCMD_RESP) + +typedef struct +{ + union + { + nu_whc_msg sMsgBuf; + struct + { + uint32_t u32Cmd; + uint32_t u32Addr0; //Dst, free, allocate, set + uint32_t u32Addr1; //Src, value + uint32_t u32Size; + } msg; + }; +} whc_mem; +typedef whc_mem *whc_mem_t; + +static struct rt_semaphore tx_sem; +static struct rt_semaphore rx_sem; +static rt_device_t device = RT_NULL; + +static rt_err_t whc_tx_complete(rt_device_t dev, void *buffer) +{ + return rt_sem_release(&tx_sem); +} + +static rt_err_t whc_rx_indicate(rt_device_t dev, rt_size_t size) +{ + return rt_sem_release(&rx_sem); +} + +static rt_err_t proc_msg(whc_mem_t req, whc_mem_t resp) +{ + switch ((nu_whc_cmd)req->msg.u32Cmd) + { + case evCMD_MEM_ALLOCATE: + resp->msg.u32Addr0 = (uint32_t)rt_malloc(req->msg.u32Size); + resp->msg.u32Size = req->msg.u32Size; + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_MEM_ALLOCATE); + break; + + case evCMD_MEM_FREE: + rt_free((void *)req->msg.u32Addr0); + resp->msg.u32Addr0 = (uint32_t)req->msg.u32Addr0; + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_MEM_FREE); + resp->msg.u32Size = 0; + break; + + case evCMD_MEM_COPY: + rt_memcpy((void *)req->msg.u32Addr0, (void *)req->msg.u32Addr1, req->msg.u32Size); + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_MEM_COPY); + resp->msg.u32Addr0 = (uint32_t)req->msg.u32Addr0; + resp->msg.u32Addr1 = (uint32_t)req->msg.u32Addr1; + resp->msg.u32Size = req->msg.u32Size; + break; + + case evCMD_MEM_SET: + rt_memset((void *)req->msg.u32Addr0, (req->msg.u32Addr1 & 0xff), req->msg.u32Size); + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_MEM_SET); + resp->msg.u32Addr0 = (uint32_t)req->msg.u32Addr0; + resp->msg.u32Addr1 = (uint32_t)(req->msg.u32Addr1 & 0xff); + resp->msg.u32Size = req->msg.u32Size; + break; + + case evCMD_DEVMEM_WRITE: + *((vu32 *)req->msg.u32Addr0) = req->msg.u32Addr1; + + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_DEVMEM_WRITE); + resp->msg.u32Addr0 = 0; + resp->msg.u32Addr1 = 0; + resp->msg.u32Size = sizeof(uint32_t); + break; + + case evCMD_DEVMEM_READ: + resp->msg.u32Cmd = PACK_MSG_CMD(evCMD_RESP, evCMD_DEVMEM_READ); + resp->msg.u32Addr0 = *((vu32 *)req->msg.u32Addr0); + resp->msg.u32Addr1 = 0; + resp->msg.u32Size = sizeof(uint32_t); + break; + + default: + return -RT_ERROR; + } + + return -RT_ERROR; +} + +static rt_err_t send_msg(whc_mem_t req) +{ + if (device) + { + if (sizeof(nu_whc_msg) != rt_device_write(device, 0, req, sizeof(nu_whc_msg))) + { + LOG_E("Failed to send msg."); + return -RT_ERROR; + } + + if (-RT_ETIMEOUT == rt_sem_take(&tx_sem, 100)) + LOG_E("Timeout cant get ACK."); + } + + return RT_EOK; +} + + +static void whc_daemon(void *parameter) +{ + rt_err_t ret; + + device = rt_device_find(USE_WORMHOLE_CHNAME); + RT_ASSERT(device); + + /* Init semaphores */ + ret = rt_sem_init(&tx_sem, "whc_tx", 0, RT_IPC_FLAG_PRIO); + RT_ASSERT(ret == RT_EOK); + + ret = rt_sem_init(&rx_sem, "whc_rx", 0, RT_IPC_FLAG_PRIO); + RT_ASSERT(ret == RT_EOK); + + /* Set tx complete function */ + ret = rt_device_set_tx_complete(device, whc_tx_complete); + RT_ASSERT(ret == RT_EOK); + + /* Set rx indicate function */ + ret = rt_device_set_rx_indicate(device, whc_rx_indicate); + RT_ASSERT(ret == RT_EOK); + + ret = rt_device_open(device, 0); + if (!device) + { + LOG_E("Failed to open %s", USE_WORMHOLE_CHNAME); + return; + } + + while (1) + { + if (rt_sem_take(&rx_sem, RT_WAITING_FOREVER) == RT_EOK) + { + nu_whc_msg sNuWhcMsg; + whc_mem_t psWhcMem = (whc_mem_t)&sNuWhcMsg; + + if (sizeof(nu_whc_msg) != rt_device_read(device, 0, psWhcMem, sizeof(nu_whc_msg))) + continue; + + if (CMD_IS_REQ(psWhcMem->msg)) + { + nu_whc_msg sNuWhcMsg_Resp; + + proc_msg((whc_mem_t)&sNuWhcMsg, (whc_mem_t)&sNuWhcMsg_Resp); + send_msg((whc_mem_t)&sNuWhcMsg_Resp); + } + else if (CMD_IS_RESP(psWhcMem->msg)) + { + LOG_I("Get Resp. 0x%08x 0x%08x 0x%08x %d", + psWhcMem->msg.u32Cmd, + psWhcMem->msg.u32Addr0, + psWhcMem->msg.u32Addr1, + psWhcMem->msg.u32Size); + } + + } //if + + } //while +} + +static int wormhole_app(void) +{ + rt_err_t result = 0; + rt_thread_t thread; + + thread = rt_thread_create("whcD", whc_daemon, RT_NULL, 2048, 25, 20); + if (thread != RT_NULL) + { + result = rt_thread_startup(thread); + RT_ASSERT(result == RT_EOK); + } + + return 0; +} +INIT_COMPONENT_EXPORT(wormhole_app); + +void *whc_malloc(uint32_t u32Size) +{ + whc_mem sWhcMem; + + sWhcMem.msg.u32Cmd = PACK_MSG_CMD(evCMD_REQ, evCMD_MEM_ALLOCATE); + sWhcMem.msg.u32Size = (uint32_t)u32Size; + + send_msg(&sWhcMem); + + return 0; +} +RTM_EXPORT(whc_malloc); + +void *whc_memcpy(void *pvDst, void *pvSrc, uint32_t u32Size) +{ + whc_mem sWhcMem; + + sWhcMem.msg.u32Cmd = PACK_MSG_CMD(evCMD_REQ, evCMD_MEM_COPY); + sWhcMem.msg.u32Addr0 = (uint32_t)pvDst; + sWhcMem.msg.u32Addr1 = (uint32_t)pvSrc; + sWhcMem.msg.u32Size = (uint32_t)u32Size; + + send_msg(&sWhcMem); + + return 0; +} +RTM_EXPORT(whc_memcpy); + + +uint32_t whc_devmem_write(void *pvaddr, uint32_t u32value) +{ + whc_mem sWhcMem; + + sWhcMem.msg.u32Cmd = PACK_MSG_CMD(evCMD_REQ, evCMD_DEVMEM_WRITE); + sWhcMem.msg.u32Addr0 = (uint32_t)pvaddr; + sWhcMem.msg.u32Addr1 = u32value; + sWhcMem.msg.u32Size = sizeof(uint32_t); + + send_msg(&sWhcMem); + + return 0; +} +RTM_EXPORT(whc_devmem_write); + +uint32_t whc_devmem_read(void *pvaddr) +{ + whc_mem sWhcMem; + + sWhcMem.msg.u32Cmd = PACK_MSG_CMD(evCMD_REQ, evCMD_DEVMEM_READ); + sWhcMem.msg.u32Addr0 = (uint32_t)pvaddr; + sWhcMem.msg.u32Addr1 = 0; + sWhcMem.msg.u32Size = sizeof(uint32_t); + + send_msg(&sWhcMem); + + return 0; +} +RTM_EXPORT(whc_devmem_read); + +void whc_devmem(int argc, char *argv[]) +{ + volatile unsigned int u32Addr; + unsigned int value = 0, mode = 0; + + if (argc < 2 || argc > 3) + { + goto exit_devmem; + } + + if (argc == 3) + { + if (sscanf(argv[2], "0x%x", &value) != 1) + goto exit_devmem; + mode = 1; //Write + } + + if (sscanf(argv[1], "0x%x", &u32Addr) != 1) + goto exit_devmem; + else if (u32Addr & (4 - 1)) + goto exit_devmem; + + if (mode) + { + whc_devmem_write((void *) u32Addr, value); + } + rt_kprintf("0x%08x\n", whc_devmem_read((void *)u32Addr)); + + return; +exit_devmem: + rt_kprintf("Read: whc_devmem \n"); + rt_kprintf("Write: whc_devmem \n"); + return; +} +MSH_CMD_EXPORT(whc_devmem, dump device registers); + +#endif /* #if defined(BSP_USING_HWSEM)*/ diff --git a/bsp/nuvoton/libraries/nu_packages/Kconfig b/bsp/nuvoton/libraries/nu_packages/Kconfig index bd09927c61..c6f978f247 100644 --- a/bsp/nuvoton/libraries/nu_packages/Kconfig +++ b/bsp/nuvoton/libraries/nu_packages/Kconfig @@ -7,10 +7,6 @@ menu "Nuvoton Packages Config" bool "Enable demos" default y - config NU_PKG_USING_LVGL - bool "Enable LVGL demos" - default n - config NU_PKG_USING_BMX055 bool "BMX055 9-axis sensor." select RT_USING_I2C diff --git a/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.c b/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.c index c82909d4d0..6331592ee9 100644 --- a/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.c +++ b/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.c @@ -15,8 +15,7 @@ #if defined(NU_PKG_USING_MAX31875) #include -#include "sensor.h" -#include "max31875_c.h" +#include "sensor_max31875.h" #define DBG_ENABLE #define DBG_LEVEL DBG_LOG @@ -65,9 +64,9 @@ static int max31875_i2c_read_reg(int address, const char *reg, int reg_length, c return RT_EOK; } -static rt_size_t max31875_fetch_data(struct rt_sensor_device *sensor, void *buf, rt_size_t len) +static rt_ssize_t max31875_fetch_data(rt_sensor_t sensor, rt_sensor_data_t data, rt_size_t len) { - struct rt_sensor_data *data = (struct rt_sensor_data *)buf; + RT_ASSERT(data); if (sensor->info.type == RT_SENSOR_CLASS_TEMP) { diff --git a/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.h b/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.h index ac1c976bfa..1e04351cd7 100644 --- a/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.h +++ b/bsp/nuvoton/libraries/nu_packages/MAX31875/sensor_max31875.h @@ -13,7 +13,8 @@ #ifndef __SENSOR_MAX31875_H__ #define __SENSOR_MAX31875_H__ -#include "sensor.h" +#include "rtdevice.h" + #include "max31875_c.h" int rt_hw_max31875_init(const char *name, struct rt_sensor_config *cfg); diff --git a/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.c b/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.c index dac9d3ebd6..94c5c03682 100644 --- a/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.c +++ b/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.c @@ -13,7 +13,6 @@ #include #include -#include "sensor.h" #include "sensor_nct7717u.h" #define DBG_ENABLE @@ -116,19 +115,19 @@ static rt_err_t nct7717u_ldt_readout(struct rt_i2c_bus_device *i2c_bus_dev, uint return nct7717u_i2c_read_reg(i2c_bus_dev, (const char *)&u8Reg, sizeof(u8Reg), (char *)u8Temp, sizeof(uint8_t)); } -static rt_size_t nct7717u_fetch_data(struct rt_sensor_device *sensor, void *buf, rt_size_t len) +static rt_ssize_t nct7717u_fetch_data(rt_sensor_t sensor, rt_sensor_data_t data, rt_size_t len) { - struct rt_sensor_data *data = (struct rt_sensor_data *)buf; + RT_ASSERT(data); - if (sensor->info.type == RT_SENSOR_CLASS_TEMP) + if (sensor->info.type == RT_SENSOR_TYPE_TEMP) { rt_int8_t i8Temp; - struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.user_data; + struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.arg; if (nct7717u_ldt_readout(i2c_bus_dev, (uint8_t *)&i8Temp) == RT_EOK) { rt_int32_t i32TempValue = i8Temp; - data->type = RT_SENSOR_CLASS_TEMP; + data->type = RT_SENSOR_TYPE_TEMP; data->data.temp = i32TempValue * 10; data->timestamp = rt_sensor_get_ts(); return 1; @@ -143,7 +142,7 @@ static rt_err_t nct7717u_control(struct rt_sensor_device *sensor, int cmd, void { case RT_SENSOR_CTRL_GET_ID: { - struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.user_data; + struct rt_i2c_bus_device *i2c_bus_dev = sensor->config.intf.arg; uint8_t u8Did; RT_ASSERT(args); @@ -174,14 +173,14 @@ int rt_hw_nct7717u_temp_init(const char *name, struct rt_sensor_config *cfg) if (sensor == RT_NULL) return -(RT_ENOMEM); - sensor->info.type = RT_SENSOR_CLASS_TEMP; - sensor->info.vendor = RT_SENSOR_VENDOR_UNKNOWN; - sensor->info.model = "nct7717u_temp"; - sensor->info.unit = RT_SENSOR_UNIT_DCELSIUS; - sensor->info.intf_type = RT_SENSOR_INTF_I2C; - sensor->info.range_max = 127; - sensor->info.range_min = -128; - sensor->info.period_min = 100; //100ms + sensor->info.type = RT_SENSOR_TYPE_TEMP; + sensor->info.vendor = RT_SENSOR_VENDOR_UNKNOWN; + sensor->info.name = "nct7717u_temp"; + sensor->info.unit = RT_SENSOR_UNIT_CELSIUS; + sensor->info.intf_type = RT_SENSOR_INTF_I2C; + sensor->info.scale.range_max = 127; + sensor->info.scale.range_min = -128; + sensor->info.acquire_min = 100; //100ms rt_memcpy(&sensor->config, cfg, sizeof(struct rt_sensor_config)); sensor->ops = &sensor_ops; @@ -213,7 +212,7 @@ int rt_hw_nct7717u_init(const char *name, struct rt_sensor_config *cfg) { goto exit_rt_hw_nct7717u_init; } - intf->user_data = i2c_bus_dev; + intf->arg = i2c_bus_dev; if (nct7717u_probe(i2c_bus_dev) != RT_EOK) goto exit_rt_hw_nct7717u_init; diff --git a/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.h b/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.h index a3b4a14b40..c1d1fe45e8 100644 --- a/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.h +++ b/bsp/nuvoton/libraries/nu_packages/NCT7717U/sensor_nct7717u.h @@ -13,7 +13,7 @@ #ifndef __SENSOR_NCT7717U_H__ #define __SENSOR_NCT7717U_H__ -#include "sensor.h" +#include "rtdevice.h" int rt_hw_nct7717u_init(const char *name, struct rt_sensor_config *cfg); diff --git a/bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c b/bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c index 6968595221..caad7f40be 100644 --- a/bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c +++ b/bsp/nuvoton/libraries/nu_packages/SPINAND/drv_spinand.c @@ -864,14 +864,14 @@ static int nid(int argc, char **argv) */ #include "drv_spi.h" -static int find_valid_window(const char* pcDevName) +static int find_valid_window(const char *pcDevName) { rt_device_t psRtDev; nu_spi_t psNuSpiBus; int i, j, k; psRtDev = rt_device_find(pcDevName); - if (!psRtDev || (psRtDev->type != RT_Device_Class_SPIDevice) ) + if (!psRtDev || (psRtDev->type != RT_Device_Class_SPIDevice)) { LOG_E("Usage %s: %s .\n", __func__, __func__); return -1; @@ -887,21 +887,21 @@ static int find_valid_window(const char* pcDevName) LOG_I("Probe JEDEC[%08X] on %s bus.", u32JedecId, psNuSpiBus->name); rt_kprintf(" "); - for (i=0; i<8; i++) // Pin driving + for (i = 0; i < 8; i++) // Pin driving rt_kprintf("%d ", i); rt_kprintf("\n"); - for (j=0; j<0xC; j++) // Master RX delay cycle + for (j = 0; j < 0xC; j++) // Master RX delay cycle { rt_kprintf("%X: ", j); - for (i=0; i<8; i++) // Pin driving + for (i = 0; i < 8; i++) // Pin driving { SPI_SET_MRXPHASE(psNuSpiBus->spi_base, j); - GPIO_SetDrivingCtl(PD, (BIT0|BIT1|BIT2|BIT3|BIT4|BIT5), i); + GPIO_SetDrivingCtl(PD, (BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5), i); spinand_jedecid_get((struct rt_qspi_device *)psRtDev, &id); - if ( id==u32JedecId ) + if (id == u32JedecId) { rt_kprintf("O "); } @@ -934,9 +934,9 @@ static int nprobe(int argc, char **argv) static int nprobe_auto(int argc, char **argv) { - int count=0; + int count = 0; - while( count++ < 100 ) + while (count++ < 100) find_valid_window("qspi01"); return 0; diff --git a/bsp/nuvoton/libraries/nu_packages/TPC/ft5446.c b/bsp/nuvoton/libraries/nu_packages/TPC/ft5446.c index 4fe7be6641..e65e412a74 100644 --- a/bsp/nuvoton/libraries/nu_packages/TPC/ft5446.c +++ b/bsp/nuvoton/libraries/nu_packages/TPC/ft5446.c @@ -318,11 +318,11 @@ int rt_hw_ft5446_init(const char *name, struct rt_touch_config *cfg) ft5446_init(&ft5446_client); - rt_memset(&pre_x[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_y[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_w[0], 0xff, FT_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&s_tp_dowm[0], 0, FT_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_id[0], 0xff, FT_MAX_TOUCH * sizeof(int8_t)); + rt_memset(&pre_x[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_y[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_w[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&s_tp_dowm[0], 0, FT_MAX_TOUCH * sizeof(rt_int8_t)); + rt_memset(&pre_id[0], 0xff, FT_MAX_TOUCH * sizeof(rt_int8_t)); /* register touch device */ touch_device->info.type = RT_TOUCH_TYPE_CAPACITANCE; diff --git a/bsp/nuvoton/libraries/nu_packages/TPC/gt911.c b/bsp/nuvoton/libraries/nu_packages/TPC/gt911.c index 2bc5e126b3..4958d1713a 100644 --- a/bsp/nuvoton/libraries/nu_packages/TPC/gt911.c +++ b/bsp/nuvoton/libraries/nu_packages/TPC/gt911.c @@ -471,7 +471,7 @@ int rt_hw_gt911_init(const char *name, struct rt_touch_config *cfg) rt_memset(&pre_x[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t)); rt_memset(&pre_y[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t)); rt_memset(&pre_w[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_int16_t)); - rt_memset(&s_tp_dowm[0], 0, GT911_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&s_tp_dowm[0], 0, GT911_MAX_TOUCH * sizeof(rt_int8_t)); rt_memset(&pre_id[0], 0xff, GT911_MAX_TOUCH * sizeof(rt_uint8_t)); /* register touch device */ diff --git a/bsp/nuvoton/libraries/nu_packages/TPC/ili.c b/bsp/nuvoton/libraries/nu_packages/TPC/ili.c index a5db143c45..af2d0ca12c 100644 --- a/bsp/nuvoton/libraries/nu_packages/TPC/ili.c +++ b/bsp/nuvoton/libraries/nu_packages/TPC/ili.c @@ -615,11 +615,11 @@ int rt_hw_ili_tpc_init(const char *name, struct rt_touch_config *cfg) goto exit_rt_hw_ili_tpc_init; } - rt_memset(&pre_x[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_y[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_w[0], 0xff, ILI_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&s_tp_dowm[0], 0, ILI_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_id[0], 0xff, ILI_MAX_TOUCH * sizeof(int8_t)); + rt_memset(&pre_x[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_y[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_w[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&s_tp_dowm[0], 0, ILI_MAX_TOUCH * sizeof(rt_uint8_t)); + rt_memset(&pre_id[0], 0xff, ILI_MAX_TOUCH * sizeof(rt_uint8_t)); /* register touch device */ rt_memcpy(&touch_device->config, cfg, sizeof(struct rt_touch_config)); diff --git a/bsp/nuvoton/libraries/nu_packages/TPC/st1663i.c b/bsp/nuvoton/libraries/nu_packages/TPC/st1663i.c index 9cbb277af7..a2349e8f52 100644 --- a/bsp/nuvoton/libraries/nu_packages/TPC/st1663i.c +++ b/bsp/nuvoton/libraries/nu_packages/TPC/st1663i.c @@ -313,11 +313,11 @@ int rt_hw_st1663i_init(const char *name, struct rt_touch_config *cfg) st1663i_init(&st1663i_client); - rt_memset(&pre_x[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_y[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_w[0], 0xff, ST_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&s_tp_dowm[0], 0, ST_MAX_TOUCH * sizeof(int16_t)); - rt_memset(&pre_id[0], 0xff, ST_MAX_TOUCH * sizeof(int8_t)); + rt_memset(&pre_x[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_y[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&pre_w[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int16_t)); + rt_memset(&s_tp_dowm[0], 0, ST_MAX_TOUCH * sizeof(rt_int8_t)); + rt_memset(&pre_id[0], 0xff, ST_MAX_TOUCH * sizeof(rt_int8_t)); /* register touch device */ touch_device->info.type = RT_TOUCH_TYPE_CAPACITANCE; diff --git a/bsp/nuvoton/libraries/nuc980/Driver/Source/nu_rtc.c b/bsp/nuvoton/libraries/nuc980/Driver/Source/nu_rtc.c index 1dab4c7a13..1ace109924 100644 --- a/bsp/nuvoton/libraries/nuc980/Driver/Source/nu_rtc.c +++ b/bsp/nuvoton/libraries/nuc980/Driver/Source/nu_rtc.c @@ -349,7 +349,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt) { uint32_t u32RegCAL, u32RegTIME; - if (sPt == 0ul) + if (sPt == NULL) { } else diff --git a/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig b/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig index 697685116c..fb92e3a931 100644 --- a/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig @@ -12,6 +12,7 @@ config SOC_SERIES_NUC980 config BSP_USING_MMU bool "Enable MMU" + select ARCH_ARM_MMU default y menuconfig BSP_USING_PDMA diff --git a/bsp/nuvoton/ma35-rtp/.config b/bsp/nuvoton/ma35-rtp/.config index 24c4519665..9f457e3e10 100644 --- a/bsp/nuvoton/ma35-rtp/.config +++ b/bsp/nuvoton/ma35-rtp/.config @@ -9,6 +9,7 @@ CONFIG_USE_MA35D1_SUBM=y # CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -77,16 +78,19 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart16" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y +# CONFIG_RT_USING_CACHE is not set +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components @@ -113,12 +117,12 @@ CONFIG_FINSH_USING_DESCRIPTION=y CONFIG_FINSH_ARG_MAX=10 # CONFIG_RT_USING_DFS is not set # CONFIG_RT_USING_FAL is not set -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SERIAL_V1=y @@ -133,10 +137,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=256 CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set # CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SPI is not set @@ -144,10 +152,13 @@ CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -353,6 +364,7 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -360,6 +372,7 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -451,7 +464,6 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -485,8 +497,8 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -522,7 +534,6 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -557,19 +568,93 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -592,12 +677,9 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -612,7 +694,6 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -643,10 +724,11 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -661,6 +743,12 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -712,7 +800,6 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -722,6 +809,213 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -768,6 +1062,10 @@ CONFIG_BSP_USING_UART16=y # CONFIG_BSP_USING_QEI is not set # CONFIG_BSP_USING_SOFT_I2C is not set # CONFIG_BSP_USING_WDT is not set +CONFIG_BSP_USING_HWSEM=y +CONFIG_BSP_USING_HWSEM0=y +CONFIG_BSP_USING_WHC=y +CONFIG_BSP_USING_WHC0=y # CONFIG_BSP_USING_EBI is not set # @@ -783,8 +1081,7 @@ CONFIG_BSP_USING_NULINKME=y # Nuvoton Packages Config # CONFIG_NU_PKG_USING_UTILS=y -# CONFIG_NU_PKG_USING_DEMO is not set -# CONFIG_NU_PKG_USING_LVGL is not set +CONFIG_NU_PKG_USING_DEMO=y # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set # CONFIG_NU_PKG_USING_NCT7717U is not set @@ -797,5 +1094,3 @@ CONFIG_NU_PKG_USING_UTILS=y # CONFIG_NU_PKG_USING_TPC is not set # CONFIG_NU_PKG_USING_ADC_TOUCH is not set # CONFIG_NU_PKG_USING_SPINAND is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/ma35-rtp/rtthread.bin b/bsp/nuvoton/ma35-rtp/rtthread.bin index 4c25ef079b..71f81136b5 100644 Binary files a/bsp/nuvoton/ma35-rtp/rtthread.bin and b/bsp/nuvoton/ma35-rtp/rtthread.bin differ diff --git a/bsp/nuvoton/nk-980iot/.config b/bsp/nuvoton/nk-980iot/.config index 31c70a95d1..b1ffd16111 100644 --- a/bsp/nuvoton/nk-980iot/.config +++ b/bsp/nuvoton/nk-980iot/.config @@ -8,6 +8,7 @@ # CONFIG_RT_NAME_MAX=16 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -61,7 +62,7 @@ CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set CONFIG_RT_USING_MEMHEAP=y CONFIG_RT_MEMHEAP_FAST_MODE=y -# CONFIG_RT_MEMHEAP_BSET_MODE is not set +# CONFIG_RT_MEMHEAP_BEST_MODE is not set CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_SLAB_AS_HEAP is not set @@ -76,15 +77,20 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y -# CONFIG_RT_USING_CPU_FFS is not set -CONFIG_ARCH_ARM_ARM9=y +CONFIG_RT_USING_CACHE=y +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +# CONFIG_RT_USING_CPU_FFS is not set +CONFIG_ARCH_MM_MMU=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_MMU=y +CONFIG_ARCH_ARM_ARM9=y # # RT-Thread Components @@ -141,15 +147,17 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_NFS is not set # CONFIG_RT_USING_FAL is not set -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -171,11 +179,15 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set CONFIG_RT_USING_MTD_NAND=y CONFIG_RT_MTD_NAND_DEBUG=y # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y CONFIG_RT_USING_ALARM=y # CONFIG_RT_USING_SOFT_RTC is not set @@ -194,6 +206,7 @@ CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2 CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set CONFIG_RT_USING_HWCRYPTO=y CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto" CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16 @@ -220,7 +233,9 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y # CONFIG_RT_HWCRYPTO_USING_BIGNUM is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -424,7 +439,6 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set -# CONFIG_PKG_USING_NETUTILS_LATEST_VERSION is not set # CONFIG_PKG_USING_CMUX is not set # CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set @@ -472,6 +486,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -479,6 +494,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -578,7 +594,6 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -612,8 +627,8 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -649,7 +664,6 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -661,16 +675,7 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_DFS_JFFS2 is not set -CONFIG_PKG_USING_DFS_UFFS=y -CONFIG_PKG_UFFS_PATH="/packages/system/uffs" -CONFIG_RT_USING_DFS_UFFS=y -# CONFIG_RT_UFFS_ECC_MODE_0 is not set -# CONFIG_RT_UFFS_ECC_MODE_1 is not set -# CONFIG_RT_UFFS_ECC_MODE_2 is not set -CONFIG_RT_UFFS_ECC_MODE_3=y -CONFIG_RT_UFFS_ECC_MODE=3 -CONFIG_PKG_USING_DFS_UFFS_LATEST_VERSION=y -CONFIG_PKG_UFFS_VER="latest" +# CONFIG_PKG_USING_DFS_UFFS is not set # CONFIG_PKG_USING_LWEXT4 is not set # CONFIG_PKG_USING_THREAD_POOL is not set # CONFIG_PKG_USING_ROBOTS is not set @@ -697,19 +702,93 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -732,12 +811,9 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -752,7 +828,6 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -783,10 +858,11 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -801,6 +877,12 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -856,7 +938,6 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -866,6 +947,213 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -982,7 +1270,6 @@ CONFIG_BOARD_USING_USB1_HOST=y # CONFIG_NU_PKG_USING_UTILS=y CONFIG_NU_PKG_USING_DEMO=y -# CONFIG_NU_PKG_USING_LVGL is not set # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set # CONFIG_NU_PKG_USING_NCT7717U is not set @@ -995,5 +1282,3 @@ CONFIG_NU_PKG_USING_NAU8822=y # CONFIG_NU_PKG_USING_TPC is not set # CONFIG_NU_PKG_USING_ADC_TOUCH is not set CONFIG_NU_PKG_USING_SPINAND=y -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_demo.c b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/nk-980iot/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/nk-980iot/project.uvproj b/bsp/nuvoton/nk-980iot/project.uvproj deleted file mode 100644 index af99c1fcb5..0000000000 --- a/bsp/nuvoton/nk-980iot/project.uvproj +++ /dev/null @@ -1,2133 +0,0 @@ - - - 1.1 -
### uVision Project, (C) Keil Software
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pbuf.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\pbuf.c - - - - - raw.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\raw.c - - - - - stats.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\stats.c - - - - - sys.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\sys.c - - - - - tcp.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\tcp.c - - - - - tcp_in.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\tcp_in.c - - - - - tcp_out.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\tcp_out.c - - - - - timeouts.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\timeouts.c - - - - - udp.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\core\udp.c - - - - - ethernet.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\netif\ethernet.c - - - - - lowpan6.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\netif\lowpan6.c - - - - - ethernetif.c - 1 - ..\..\..\components\net\lwip\port\ethernetif.c - - - - - sys_arch.c - 1 - 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..\libraries\nu_packages\SPINAND\drv_spinand.c - - - - - spinand.c - 1 - ..\libraries\nu_packages\SPINAND\spinand.c - - - - - nuc980_usbhostlib - - - support.c - 1 - ..\libraries\nuc980\UsbHostLib\src\support.c - - - - - mem_alloc.c - 1 - ..\libraries\nuc980\UsbHostLib\src\mem_alloc.c - - - - - ehci_iso.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ehci_iso.c - - - - - usb_core.c - 1 - ..\libraries\nuc980\UsbHostLib\src\usb_core.c - - - - - ohci.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ohci.c - - - - - ehci.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ehci.c - - - - - optparse - - - optparse.c - 1 - packages\optparse-latest\optparse.c - - - - - POSIX - - - poll.c - 1 - ..\..\..\components\libc\posix\io\poll\poll.c - - - - - select.c - 1 - ..\..\..\components\libc\posix\io\poll\select.c - - - - - ramdisk - - - drv_ramdisk.c - 1 - packages\ramdisk-latest\src\drv_ramdisk.c - - - - - rt_usbd - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - mstorage.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\mstorage.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - cdc_vcom.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\cdc_vcom.c - - - - - rt_usbh - - - hub.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\hub.c - - - - - usbhost.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost.c - - - - - usbhost_core.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_lwip.c - 1 - ..\..\..\components\net\sal\impl\af_inet_lwip.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - uffs - - - uffs_mem.c - 1 - packages\uffs-latest\src\uffs\uffs_mem.c - - - - - uffs_init.c - 1 - packages\uffs-latest\src\uffs\uffs_init.c - - - - - dfs_uffs.c - 1 - packages\uffs-latest\dfs_uffs.c - - - - - uffs_mtb.c - 1 - packages\uffs-latest\src\uffs\uffs_mtb.c - - - - - uffs_crc.c - 1 - packages\uffs-latest\src\uffs\uffs_crc.c - - - - - uffs_tree.c - 1 - packages\uffs-latest\src\uffs\uffs_tree.c - - - - - uffs_flash.c - 1 - packages\uffs-latest\src\uffs\uffs_flash.c - - - - - uffs_version.c - 1 - packages\uffs-latest\src\uffs\uffs_version.c - - - - - uffs_debug.c - 1 - packages\uffs-latest\src\uffs\uffs_debug.c - - - - - uffs_blockinfo.c - 1 - packages\uffs-latest\src\uffs\uffs_blockinfo.c - - - - - uffs_public.c - 1 - packages\uffs-latest\src\uffs\uffs_public.c - - - - - uffs_find.c - 1 - packages\uffs-latest\src\uffs\uffs_find.c - - - - - uffs_buf.c - 1 - packages\uffs-latest\src\uffs\uffs_buf.c - - - - - uffs_pool.c - 1 - packages\uffs-latest\src\uffs\uffs_pool.c - - - - - uffs_rtthread.c - 1 - packages\uffs-latest\uffs_rtthread.c - - - - - uffs_device.c - 1 - packages\uffs-latest\src\uffs\uffs_device.c - - - - - uffs_fd.c - 1 - packages\uffs-latest\src\uffs\uffs_fd.c - - - - - uffs_utils.c - 1 - packages\uffs-latest\src\uffs\uffs_utils.c - - - - - uffs_ecc.c - 1 - packages\uffs-latest\src\uffs\uffs_ecc.c - - - - - uffs_badblock.c - 1 - packages\uffs-latest\src\uffs\uffs_badblock.c - - - - - uffs_nandif.c - 1 - packages\uffs-latest\uffs_nandif.c - - - - - uffs_fs.c - 1 - packages\uffs-latest\src\uffs\uffs_fs.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - wavplayer - - - wavplayer.c - 1 - packages\wavplayer-latest\src\wavplayer.c - - - - - wavplayer_cmd.c - 1 - packages\wavplayer-latest\src\wavplayer_cmd.c - - - - - wavrecorder.c - 1 - packages\wavplayer-latest\src\wavrecorder.c - - - - - wavhdr.c - 1 - packages\wavplayer-latest\src\wavhdr.c - - - - - wavrecorder_cmd.c - 1 - packages\wavplayer-latest\src\wavrecorder_cmd.c - - - - - - - diff --git a/bsp/nuvoton/nk-980iot/rtconfig.h b/bsp/nuvoton/nk-980iot/rtconfig.h deleted file mode 100644 index 347920f600..0000000000 --- a/bsp/nuvoton/nk-980iot/rtconfig.h +++ /dev/null @@ -1,442 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 16 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 2048 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_MEMHEAP -#define RT_MEMHEAP_FAST_MODE -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_MEMTRACE -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define ARCH_ARM_ARM9 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 16 -#define DFS_FILESYSTEM_TYPES_MAX 16 -#define DFS_FD_MAX 64 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 8 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 2048 -#define RT_USING_CAN -#define RT_CAN_USING_HDR -#define RT_USING_HWTIMER -#define RT_USING_CPUTIME -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_MTD_NAND -#define RT_MTD_NAND_DEBUG -#define RT_USING_RTC -#define RT_USING_ALARM -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_WDT -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_HWCRYPTO -#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto" -#define RT_HWCRYPTO_IV_MAX_SIZE 16 -#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256 -#define RT_HWCRYPTO_USING_AES -#define RT_HWCRYPTO_USING_AES_ECB -#define RT_HWCRYPTO_USING_AES_CBC -#define RT_HWCRYPTO_USING_AES_CFB -#define RT_HWCRYPTO_USING_AES_CTR -#define RT_HWCRYPTO_USING_AES_OFB -#define RT_HWCRYPTO_USING_SHA1 -#define RT_HWCRYPTO_USING_SHA2 -#define RT_HWCRYPTO_USING_SHA2_224 -#define RT_HWCRYPTO_USING_SHA2_256 -#define RT_HWCRYPTO_USING_SHA2_384 -#define RT_HWCRYPTO_USING_SHA2_512 -#define RT_HWCRYPTO_USING_RNG - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/mnt/udisk" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define RT_USB_DEVICE_COMPOSITE -#define RT_USB_DEVICE_CDC -#define RT_USB_DEVICE_NONE -#define RT_USB_DEVICE_MSTORAGE -#define RT_VCOM_TASK_STK_SIZE 2048 -#define RT_CDC_RX_BUFSIZE 128 -#define RT_VCOM_SERNO "32021919830108" -#define RT_VCOM_SER_LEN 14 -#define RT_VCOM_TX_TIMEOUT 1000 -#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1" - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT -#define RT_USING_POSIX_SOCKET - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP212 -#define RT_USING_LWIP_VER_NUM 0x20102 -#define RT_LWIP_MEM_ALIGNMENT 4 -#define RT_LWIP_IGMP -#define RT_LWIP_ICMP -#define RT_LWIP_DNS -#define RT_LWIP_DHCP -#define IP_SOF_BROADCAST 1 -#define IP_SOF_BROADCAST_RECV 1 - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.31.55" -#define RT_LWIP_GWADDR "192.168.31.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 16 -#define RT_LWIP_PBUF_NUM 256 -#define RT_LWIP_RAW_PCB_NUM 16 -#define RT_LWIP_UDP_PCB_NUM 16 -#define RT_LWIP_TCP_PCB_NUM 16 -#define RT_LWIP_TCP_SEG_NUM 64 -#define RT_LWIP_TCP_SND_BUF 16384 -#define RT_LWIP_TCP_WND 65535 -#define RT_LWIP_TCPTHREAD_PRIORITY 10 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 256 -#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_STACKSIZE 4096 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 256 -#define RT_LWIP_REASSEMBLY_FRAG -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define RT_LWIP_NETIF_LOOPBACK -#define LWIP_NETIF_LOOPBACK 1 -#define RT_LWIP_STATS -#define RT_LWIP_USING_PING - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - -#define PKG_USING_NETUTILS -#define PKG_NETUTILS_TFTP -#define PKG_NETUTILS_IPERF -#define PKG_NETUTILS_NTP -#define NTP_USING_AUTO_SYNC -#define NTP_AUTO_SYNC_FIRST_DELAY 30 -#define NTP_AUTO_SYNC_PERIOD 3600 -#define NETUTILS_NTP_HOSTNAME "0.tw.pool.ntp.org" -#define NETUTILS_NTP_HOSTNAME2 "1.tw.pool.ntp.org" -#define NETUTILS_NTP_HOSTNAME3 "2.tw.pool.ntp.org" -#define PKG_USING_NETUTILS_LATEST_VERSION -#define PKG_NETUTILS_VER_NUM 0x99999 - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - -#define PKG_USING_WAVPLAYER -#define PKG_WP_USING_PLAY -#define PKG_WP_PLAY_DEVICE "sound0" -#define PKG_WP_USING_RECORD -#define PKG_WP_RECORD_DEVICE "sound0" -#define PKG_USING_WAVPLAYER_LATEST_VERSION - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - -#define PKG_USING_DFS_UFFS -#define RT_USING_DFS_UFFS -#define RT_UFFS_ECC_MODE_3 -#define RT_UFFS_ECC_MODE 3 -#define PKG_USING_DFS_UFFS_LATEST_VERSION -#define PKG_USING_RAMDISK -#define PKG_USING_RAMDISK_LATEST_VERSION - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - -#define PKG_USING_OPTPARSE -#define PKG_USING_OPTPARSE_LATEST_VERSION - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_NUC980 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_MMU -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 2 -#define BSP_USING_GPIO -#define BSP_USING_EMAC -#define BSP_USING_EMAC0 -#define BSP_USING_RTC -#define NU_RTC_SUPPORT_IO_RW -#define NU_RTC_SUPPORT_MSH_CMD -#define BSP_USING_ADC -#define BSP_USING_TMR -#define BSP_USING_TIMER -#define BSP_USING_TMR0 -#define BSP_USING_TIMER0 -#define BSP_USING_TMR1 -#define BSP_USING_TIMER1 -#define BSP_USING_TMR2 -#define BSP_USING_TIMER2 -#define BSP_USING_TMR3 -#define BSP_USING_TIMER3 -#define BSP_USING_TMR4 -#define BSP_USING_TIMER4 -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_UART1 -#define BSP_USING_UART1_TX_DMA -#define BSP_USING_UART1_RX_DMA -#define BSP_USING_I2C -#define BSP_USING_I2C0 -#define BSP_USING_I2C2 -#define BSP_USING_SDH -#define BSP_USING_SDH1 -#define NU_SDH_USING_PDMA -#define NU_SDH_HOTPLUG -#define BSP_USING_PWM -#define BSP_USING_PWM0 -#define BSP_USING_SPI -#define BSP_USING_SPI_PDMA -#define BSP_USING_SPI0 -#define BSP_USING_SPI0_PDMA -#define BSP_USING_SPI1_NONE -#define BSP_USING_I2S -#define NU_I2S_DMA_FIFO_SIZE 4096 -#define BSP_USING_QSPI -#define BSP_USING_QSPI_PDMA -#define BSP_USING_QSPI0 -#define BSP_USING_QSPI0_PDMA -#define BSP_USING_CRYPTO -#define BSP_USING_WDT -#define BSP_USING_USBD -#define BSP_USING_USBH - -/* On-board Peripheral Drivers */ - -#define BSP_USING_CONSOLE -#define BOARD_USING_IP101GR -#define BOARD_USING_NAU8822 -#define BOARD_USING_STORAGE_SDCARD -#define BOARD_USING_STORAGE_SPINAND -#define BOARD_USING_USB0_DEVICE_HOST -#define BOARD_USING_USB1_HOST - -/* Board extended module drivers */ - - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO -#define NU_PKG_USING_NAU8822 -#define NU_PKG_USING_SPINAND - -#endif diff --git a/bsp/nuvoton/nk-n9h30/.config b/bsp/nuvoton/nk-n9h30/.config index a8fdd9106b..dab92a6914 100644 --- a/bsp/nuvoton/nk-n9h30/.config +++ b/bsp/nuvoton/nk-n9h30/.config @@ -8,6 +8,7 @@ # CONFIG_RT_NAME_MAX=16 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -61,7 +62,7 @@ CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set CONFIG_RT_USING_MEMHEAP=y CONFIG_RT_MEMHEAP_FAST_MODE=y -# CONFIG_RT_MEMHEAP_BSET_MODE is not set +# CONFIG_RT_MEMHEAP_BEST_MODE is not set CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_SLAB_AS_HEAP is not set @@ -76,15 +77,20 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set CONFIG_RT_USING_INTERRUPT_INFO=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" -CONFIG_RT_VER_NUM=0x40101 -CONFIG_ARCH_ARM=y -# CONFIG_RT_USING_CPU_FFS is not set -CONFIG_ARCH_ARM_ARM9=y +CONFIG_RT_VER_NUM=0x50000 +CONFIG_RT_USING_CACHE=y +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +# CONFIG_RT_USING_CPU_FFS is not set +CONFIG_ARCH_MM_MMU=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_MMU=y +CONFIG_ARCH_ARM_ARM9=y # # RT-Thread Components @@ -141,7 +147,9 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_NFS is not set CONFIG_RT_USING_FAL=y CONFIG_FAL_DEBUG_CONFIG=y @@ -149,12 +157,12 @@ CONFIG_FAL_DEBUG=1 CONFIG_FAL_PART_HAS_TABLE_CFG=y CONFIG_FAL_USING_SFUD_PORT=y CONFIG_FAL_USING_NOR_FLASH_DEV_NAME="norflash0" -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -165,6 +173,7 @@ CONFIG_RT_USING_SERIAL_V1=y CONFIG_RT_SERIAL_RB_BUFSZ=2048 CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set +# CONFIG_RT_CAN_USING_CANFD is not set CONFIG_RT_USING_HWTIMER=y # CONFIG_RT_USING_CPUTIME is not set CONFIG_RT_USING_I2C=y @@ -175,11 +184,15 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set CONFIG_RT_USING_MTD_NAND=y # CONFIG_RT_MTD_NAND_DEBUG is not set # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y CONFIG_RT_USING_ALARM=y # CONFIG_RT_USING_SOFT_RTC is not set @@ -204,11 +217,14 @@ CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 # CONFIG_RT_USING_SENSOR is not set CONFIG_RT_USING_TOUCH=y # CONFIG_RT_TOUCH_PIN_IRQ is not set +# CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_PULSE_ENCODER is not set CONFIG_RT_USING_INPUT_CAPTURE=y CONFIG_RT_INPUT_CAPTURE_RB_SIZE=100 +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -459,6 +475,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -466,6 +483,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -490,6 +508,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_RAPIDJSON is not set # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set # # XML: Extensible Markup Language @@ -515,10 +534,19 @@ CONFIG_PKG_LVGL_PATH="/packages/multimedia/LVGL/LVGL" CONFIG_PKG_LVGL_THREAD_PRIO=20 CONFIG_PKG_LVGL_THREAD_STACK_SIZE=4096 CONFIG_PKG_LVGL_DISP_REFR_PERIOD=30 +# CONFIG_PKG_USING_LVGL_SQUARELINE is not set # CONFIG_PKG_LVGL_USING_EXAMPLES is not set CONFIG_PKG_LVGL_USING_DEMOS=y -CONFIG_PKG_LVGL_VER_NUM=0x99999 -CONFIG_PKG_LVGL_VER="latest" +CONFIG_PKG_LVGL_USING_V08034=y +# CONFIG_PKG_LVGL_USING_V08033 is not set +# CONFIG_PKG_LVGL_USING_V08032 is not set +# CONFIG_PKG_LVGL_USING_V08031 is not set +# CONFIG_PKG_LVGL_USING_V08030 is not set +# CONFIG_PKG_LVGL_USING_V08020 is not set +# CONFIG_PKG_LVGL_USING_V8_3_LATEST_VERSION is not set +# CONFIG_PKG_LVGL_USING_LATEST_VERSION is not set +CONFIG_PKG_LVGL_VER_NUM=0x08034 +CONFIG_PKG_LVGL_VER="v8.3.4" # CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set @@ -564,7 +592,6 @@ CONFIG_PKG_LVGL_VER="latest" # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -598,7 +625,8 @@ CONFIG_PKG_LVGL_VER="latest" # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -611,14 +639,6 @@ CONFIG_PKG_LVGL_VER="latest" # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set -# -# POSIX extension functions -# -# CONFIG_PKG_USING_POSIX_GETLINE is not set -# CONFIG_PKG_USING_POSIX_WCWIDTH is not set -# CONFIG_PKG_USING_POSIX_ITOA is not set -# CONFIG_PKG_USING_POSIX_STRINGS is not set - # # acceleration: Assembly language or algorithmic acceleration packages # @@ -642,10 +662,11 @@ CONFIG_PKG_LVGL_VER="latest" # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set # CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set # CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set @@ -679,17 +700,93 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set -# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ESP_IDF is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -700,6 +797,11 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set # CONFIG_PKG_USING_WM_LIBRARIES is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_INFRARED is not set # CONFIG_PKG_USING_MULTI_INFRARED is not set @@ -707,12 +809,9 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -727,7 +826,6 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -758,8 +856,11 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -774,6 +875,12 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -825,7 +932,6 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -835,6 +941,213 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -958,9 +1271,9 @@ CONFIG_BOARD_USING_ADCTOUCH=y # CONFIG_NU_PKG_USING_UTILS=y # CONFIG_NU_PKG_USING_DEMO is not set -# CONFIG_NU_PKG_USING_LVGL is not set # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set +# CONFIG_NU_PKG_USING_NCT7717U is not set # CONFIG_NU_PKG_USING_NAU88L25 is not set CONFIG_NU_PKG_USING_NAU8822=y # CONFIG_NU_PKG_USING_DA9062 is not set @@ -971,5 +1284,3 @@ CONFIG_NU_PKG_USING_NAU8822=y CONFIG_NU_PKG_USING_ADC_TOUCH=y # CONFIG_NU_PKG_USING_ADC_TOUCH_SW is not set # CONFIG_NU_PKG_USING_SPINAND is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/nk-n9h30/applications/SConscript b/bsp/nuvoton/nk-n9h30/applications/SConscript index 9bb9abae89..a3ccbe0469 100644 --- a/bsp/nuvoton/nk-n9h30/applications/SConscript +++ b/bsp/nuvoton/nk-n9h30/applications/SConscript @@ -1,15 +1,11 @@ from building import * import os - cwd = GetCurrentDir() src = Glob('*.c') CPPPATH = [cwd] - group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) - list = os.listdir(cwd) for item in list: if os.path.isfile(os.path.join(cwd, item, 'SConscript')): group = group + SConscript(os.path.join(item, 'SConscript')) - Return('group') diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_conf.h b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_conf.h index 1587d341ac..52438622fa 100644 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_conf.h +++ b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_conf.h @@ -14,9 +14,8 @@ #include "rtconfig.h" #if defined(SOC_SERIES_N9H30) - #define LV_USE_GPU_N9H30_GE2D 1 //#define LV_USE_ANTI_TEARING 1 - //#define LV_DISP_DEF_REFR_PERIOD 16 + //#define LV_DISP_DEF_REFR_PERIOD 30 #ifndef BIT31 #define BIT31 (0x80000000) ///< Bit 31 mask of an 32 bit integer @@ -25,8 +24,6 @@ #define IS_CACHEABLE_VRAM(addr) !((uint32_t)addr & BIT31) #endif -#define LV_VERSION_EQUAL(x,y,z) (x == LVGL_VERSION_MAJOR && y==LVGL_VERSION_MINOR && z==LVGL_VERSION_PATCH ) - #define LV_COLOR_DEPTH BSP_LCD_BPP #define LV_HOR_RES_MAX BSP_LCD_WIDTH #define LV_VER_RES_MAX BSP_LCD_HEIGHT @@ -36,7 +33,7 @@ #define LV_USE_PERF_MONITOR 1 //#define CONFIG_LV_LOG_LEVEL LV_LOG_LEVEL_TRACE -//#define LV_USE_DEMO_RTT_MUSIC 1 +#define LV_USE_DEMO_RTT_MUSIC 1 #if LV_USE_DEMO_RTT_MUSIC #define LV_COLOR_SCREEN_TRANSP 1 #define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1 @@ -46,7 +43,7 @@ #endif /* Please comment LV_USE_DEMO_RTT_MUSIC declaration before un-comment below */ -#define LV_USE_DEMO_WIDGETS 1 +//#define LV_USE_DEMO_WIDGETS 1 //#define LV_USE_DEMO_BENCHMARK 1 #endif diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_demo.c b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.c b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.c index e0dca96f55..e13f2d16a2 100644 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.c +++ b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.c @@ -17,8 +17,6 @@ *********************/ #include -#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0) - #include "lv_gpu_n9h30_ge2d.h" #include "nu_2d.h" #include "mmu.h" @@ -119,7 +117,10 @@ void lv_draw_n9h30_ge2d_blend(lv_draw_ctx_t *draw_ctx, const lv_draw_sw_blend_ds } } - if (!done) lv_draw_sw_blend_basic(draw_ctx, dsc); + if (!done) + { + lv_draw_sw_blend_basic(draw_ctx, dsc); + } } static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_stride, const lv_area_t *fill_area, @@ -130,7 +131,7 @@ static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_ lv_color_t *start_buf = dest_buf - (fill_area->y1 * dest_stride) - fill_area->x1; - //rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 ); +// rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 ); if (IS_CACHEABLE_VRAM(dest_buf)) mmu_clean_invalidated_dcache((uint32_t)dest_buf, sizeof(lv_color_t) * (dest_stride * fill_area_h + fill_area_w)); @@ -153,34 +154,51 @@ static void lv_draw_n9h30_ge2d_blend_fill(lv_color_t *dest_buf, lv_coord_t dest_ static void lv_draw_n9h30_ge2d_blend_map(lv_color_t *dest_buf, const lv_area_t *dest_area, lv_coord_t dest_stride, const lv_color_t *src_buf, lv_coord_t src_stride, lv_opa_t opa) { - /*Simple copy*/ - int32_t dest_x = dest_area->x1; - int32_t dest_y = dest_area->y1; int32_t dest_w = lv_area_get_width(dest_area); int32_t dest_h = lv_area_get_height(dest_area); - const lv_color_t *dest_start_buf = dest_buf - (dest_area->y1 * dest_stride) - dest_area->x1; - //rt_kprintf("[blend_map %d %08x -> %08x] (x:%d y:%d, %dx%d) \n", lv_area_get_size(dest_area), src_buf, dest_buf, dest_x, dest_y, dest_w, dest_h, src_stride, dest_stride); - // Enter GE2D -> - ge2dInit(sizeof(lv_color_t) * 8, dest_stride, dest_area->y2, (void *)dest_start_buf); - - if (opa >= LV_OPA_MAX) + if (!IS_CACHEABLE_VRAM(dest_buf)) { - ge2dBitblt_SetAlphaMode(0, 0, 0); - ge2dBitblt_SetDrawMode(0, 0, 0); + const lv_color_t *dest_start_buf = dest_buf - (dest_area->y1 * dest_stride) - dest_area->x1; + int32_t dest_x = dest_area->x1; + int32_t dest_y = dest_area->y1; + + // Enter GE2D -> + ge2dInit(sizeof(lv_color_t) * 8, dest_stride, dest_area->y2, (void *)dest_start_buf); + + if (opa >= LV_OPA_MAX) + { + ge2dBitblt_SetAlphaMode(0, 0, 0); + ge2dBitblt_SetDrawMode(0, 0, 0); + } + else + { + ge2dBitblt_SetAlphaMode(1, opa, opa); + } + + if (IS_CACHEABLE_VRAM(src_buf)) + mmu_clean_dcache((uint32_t)src_buf, sizeof(lv_color_t) * (src_stride * dest_h + dest_w)); + + ge2dSpriteBlt_Screen(dest_x, dest_y, dest_w, dest_h, (void *)src_buf); + // -> Leave GE2D } else { - ge2dBitblt_SetAlphaMode(1, opa, opa); + int32_t x, y; + + /*Simple copy*/ + for (y = 0; y < dest_h; y++) + { + for (x = 0; x < dest_w; x++) + { + dest_buf[x] = src_buf[x]; + } + dest_buf += dest_stride; + src_buf += src_stride; + } } - - // flush - mmu_clean_dcache((uint32_t)src_buf, sizeof(lv_color_t) * (src_stride * dest_h + dest_w)); - - ge2dSpriteBlt_Screen(dest_x, dest_y, dest_w, dest_h, (void *)src_buf); - // -> Leave GE2D } void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx) @@ -191,5 +209,3 @@ void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx) /********************** * STATIC FUNCTIONS **********************/ - -#endif // #if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)) diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.h b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.h index 0852168ebd..343d590ff8 100644 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.h +++ b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_gpu_n9h30_ge2d.h @@ -21,8 +21,6 @@ extern "C" { #include "../../hal/lv_hal_disp.h" #include "../sw/lv_draw_sw.h" -#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0) - /********************* * DEFINES *********************/ @@ -54,8 +52,6 @@ void lv_gpu_n9h30_ge2d_wait_cb(lv_draw_ctx_t *draw_ctx); * MACROS **********************/ -#endif /*#if LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)*/ - #ifdef __cplusplus } /*extern "C"*/ #endif diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c index c36a6635ee..97dc36a6c6 100644 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.c @@ -8,20 +8,20 @@ * 2021-12-17 Wayne The first version */ #include -#include "nu_2d.h" #include "mmu.h" - -#if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)) - #include "lv_gpu_n9h30_ge2d.h" -#endif +#include "lv_gpu_n9h30_ge2d.h" #define LOG_TAG "lvgl.disp" #define DBG_ENABLE #define DBG_SECTION_NAME LOG_TAG -#define DBG_LEVEL DBG_ERROR +#define DBG_LEVEL DBG_INFO #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static rt_device_t lcd_device = 0; @@ -32,6 +32,8 @@ static void *buf3_next = RT_NULL; static uint32_t u32FirstFlush = 0; +static uint32_t LV_USE_GPU_N9H30_GE2D = 1; + static void nu_antitearing(lv_disp_draw_buf_t *draw_buf, lv_color_t *color_p) { if (buf3_next) @@ -74,11 +76,15 @@ static void nu_flush_full_refresh(lv_disp_drv_t *disp_drv, const lv_area_t *area static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) { -#if (LV_USE_GPU_N9H30_GE2D==1) + int32_t area_w = lv_area_get_width(area); + int32_t area_h = lv_area_get_height(area); + lv_draw_sw_blend_dsc_t blend_flush = {0}; lv_draw_ctx_t draw_flush = {0}; lv_area_t flush_area = {0, 0, info.width - 1, info.height - 1 }; + //rt_kprintf("[nu_flush %d %08x] %dx%d %d %d\n", lv_area_get_size(area), color_p, area_w, area_h, area->x1, area->y1 ); + blend_flush.blend_area = area; blend_flush.src_buf = color_p; blend_flush.mask_buf = NULL; @@ -91,23 +97,6 @@ static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t lv_draw_n9h30_ge2d_blend(&draw_flush, (const lv_draw_sw_blend_dsc_t *)&blend_flush); -#else - int32_t flush_area_w = lv_area_get_width(area); - int32_t flush_area_h = lv_area_get_height(area); - - //if ( flush_area_w&0x3 != 0 ) - // rt_kprintf("[%s %08x] %dx%d %d %d\n", __func__, color_p, flush_area_w, flush_area_h, area->x1, area->y1 ); - - /* Update dirty region. */ - // Enter GE2D -> - ge2dInit(sizeof(lv_color_t) * 8, info.width, info.height, (void *)info.framebuffer); - ge2dBitblt_SetAlphaMode(-1, 0, 0); - ge2dBitblt_SetDrawMode(-1, 0, 0); - - ge2dSpriteBlt_Screen(area->x1, area->y1, flush_area_w, flush_area_h, (void *)color_p); - // -> Leave GE2D -#endif - if (!u32FirstFlush) { /* Enable backlight at first flushing. */ @@ -118,52 +107,9 @@ static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t lv_disp_flush_ready(disp_drv); } -#if LV_VERSION_EQUAL(8, 1, 0) -static void nu_fill_cb(struct _lv_disp_drv_t *disp_drv, lv_color_t *dest_buf, lv_coord_t dest_width, - const lv_area_t *fill_area, lv_color_t color) -{ - int32_t fill_area_w = lv_area_get_width(fill_area); - int32_t fill_area_h = lv_area_get_height(fill_area); - - - if (lv_area_get_size(fill_area) < 3600) - { - /*Software filling*/ - int y; - lv_color_t *disp_buf_first = dest_buf + dest_width * fill_area->y1 + fill_area->x1; - for (y = 0; y < fill_area_h; y++) - { - lv_color_fill(disp_buf_first, color, fill_area_w); - disp_buf_first += dest_width; - } - } - else - { - //rt_kprintf("[blend_fill %d %08x] %dx%d %d %d\n", lv_area_get_size(fill_area), dest_buf, fill_area_w, fill_area_h, fill_area->x1, fill_area->y1 ); - - if (IS_CACHEABLE_VRAM(dest_buf)) - mmu_clean_invalidated_dcache((uint32_t)dest_buf, sizeof(lv_color_t) * (dest_width * fill_area_h + fill_area_w)); - - /*Hardware filling*/ - // Enter GE2D -> - ge2dInit(sizeof(lv_color_t) * 8, fill_area_w, fill_area_h, (void *)dest_buf); - - ge2dClip_SetClip(fill_area->x1, fill_area->y1, fill_area->x2, fill_area->y2); - - if (sizeof(lv_color_t) == 4) - ge2dFill_Solid(fill_area->x1, fill_area->y1, fill_area_w, fill_area_h, color.full); - else if (sizeof(lv_color_t) == 2) - ge2dFill_Solid_RGB565(fill_area->x1, fill_area->y1, fill_area_w, fill_area_h, color.full); - - ge2dClip_SetClip(-1, 0, 0, 0); - // -> Leave GE2D - } -} -#endif - void nu_perf_monitor(struct _lv_disp_drv_t *disp_drv, uint32_t time, uint32_t px) { - rt_kprintf("Elapsed: %dms, Pixel: %d, Bytes:%d, %d%\n", time, px, px * sizeof(lv_color_t), px * 100 / disp_drv->draw_buf->size); + LOG_I("Elapsed: %dms, Pixel: %d, Bytes:%d, %d%\n", time, px, px * sizeof(lv_color_t), px * 100 / disp_drv->draw_buf->size); } void lv_port_disp_init(void) @@ -173,13 +119,19 @@ void lv_port_disp_init(void) void *buf2 = RT_NULL; uint32_t u32FBSize; - lcd_device = rt_device_find("lcd"); - if (lcd_device == 0) + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); + if (lcd_device == RT_NULL) { LOG_E("error!"); return; } + if (!LV_VERSION_CHECK(8, 3, 0)) + { + LV_USE_GPU_N9H30_GE2D = 0; + } + LOG_I("LVGL: %s drawing using 2DGE", LV_USE_GPU_N9H30_GE2D ? "Enabled" : "Disabled"); + /* get framebuffer address */ result = rt_device_control(lcd_device, RTGRAPHIC_CTRL_GET_INFO, &info); if (result != RT_EOK) @@ -205,25 +157,22 @@ void lv_port_disp_init(void) #if (LV_USE_ANTI_TEARING==1) disp_drv.full_refresh = 1; #endif + LOG_I("LVGL: %s anti-tearing", disp_drv.full_refresh ? "Enabled" : "Disabled"); if (disp_drv.full_refresh) { -#if (LV_USE_GPU_N9H30_GE2D==1) - buf1 = (void *)info.framebuffer; // Use Non-cacheable VRAM -#else buf1 = (void *)((uint32_t)info.framebuffer & ~BIT31); // Use Cacheable VRAM -#endif buf2 = (void *)((uint32_t)buf1 + u32FBSize); buf3_next = (void *)((uint32_t)buf2 + u32FBSize); - rt_kprintf("LVGL: Use triple screen-sized buffers(full_refresh) - buf1@%08x, buf2@%08x, buf3_next@%08x\n", buf1, buf2, buf3_next); + LOG_I("LVGL: Use triple screen-sized buffers(full_refresh) - buf1@%08x, buf2@%08x, buf3_next@%08x", buf1, buf2, buf3_next); disp_drv.flush_cb = nu_flush_full_refresh; } else { - buf1 = (void *)(((uint32_t)info.framebuffer) + u32FBSize); + buf1 = (void *)(((uint32_t)info.framebuffer & ~BIT31) + u32FBSize); // Use Cacheable VRAM buf2 = (void *)((uint32_t)buf1 + u32FBSize); - rt_kprintf("LVGL: Use two screen-sized buffers - buf1@%08x, buf2@%08x\n", buf1, buf2); + LOG_I("LVGL: Use two screen-sized buffers - buf1@%08x, buf2@%08x", buf1, buf2); rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, info.framebuffer); disp_drv.flush_cb = nu_flush; @@ -242,16 +191,12 @@ void lv_port_disp_init(void) /*Set a display buffer*/ disp_drv.draw_buf = &disp_buf; -#if LV_VERSION_EQUAL(8, 1, 0) - /*Fill a memory with a color (GPU only)*/ - disp_drv.gpu_fill_cb = nu_fill_cb; -#endif - -#if (LV_USE_GPU_N9H30_GE2D && LV_VERSION_CHECK(8, 2, 0)) - disp_drv.draw_ctx_init = lv_draw_n9h30_ge2d_ctx_init; - disp_drv.draw_ctx_deinit = lv_draw_n9h30_ge2d_ctx_init; - disp_drv.draw_ctx_size = sizeof(lv_draw_n9h30_ge2d_ctx_t); -#endif + if (LV_USE_GPU_N9H30_GE2D) + { + disp_drv.draw_ctx_init = lv_draw_n9h30_ge2d_ctx_init; + disp_drv.draw_ctx_deinit = lv_draw_n9h30_ge2d_ctx_init; + disp_drv.draw_ctx_size = sizeof(lv_draw_n9h30_ge2d_ctx_t); + } /*Called after every refresh cycle to tell the rendering and flushing time + the number of flushed pixels*/ //disp_drv.monitor_cb = nu_perf_monitor; diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/nk-n9h30/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/nk-n9h30/applications/mnt.c b/bsp/nuvoton/nk-n9h30/applications/mnt.c index 96b4788ab2..f69566c3a4 100644 --- a/bsp/nuvoton/nk-n9h30/applications/mnt.c +++ b/bsp/nuvoton/nk-n9h30/applications/mnt.c @@ -12,6 +12,8 @@ #include +#if defined(RT_USING_DFS) + #define LOG_TAG "mnt" #define DBG_ENABLE #define DBG_SECTION_NAME "mnt" @@ -160,9 +162,10 @@ exit_mkdir_p: #if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE) #include "yaffs_guts.h" -void yaffs_dev_init(void) +int yaffs_dev_init(void) { int i; + for (i = 0; i < sizeof(mount_table) / sizeof(struct dfs_mount_tbl); i++) { if (mount_table[i].filesystemtype && !rt_strcmp(mount_table[i].filesystemtype, "yaffs")) @@ -170,11 +173,26 @@ void yaffs_dev_init(void) struct rt_mtd_nand_device *psMtdNandDev = RT_MTD_NAND_DEVICE(rt_device_find(mount_table[i].device_name)); if (psMtdNandDev) { + LOG_I("yaffs start [%s].", mount_table[i].device_name); + yaffs_start_up(psMtdNandDev, (const char *)mount_table[i].path); + + LOG_I("dfs mount [%s].", mount_table[i].device_name); + if (dfs_mount(mount_table[i].device_name, + mount_table[i].path, + mount_table[i].filesystemtype, + mount_table[i].rwflag, + mount_table[i].data) != 0) + { + LOG_E("mount fs[%s] on %s failed.", mount_table[i].filesystemtype, mount_table[i].path); + } } } } + + return 0; } +INIT_APP_EXPORT(yaffs_dev_init); #endif /* Initialize the filesystem */ @@ -246,13 +264,10 @@ int filesystem_init(void) } #endif -#if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE) - yaffs_dev_init(); -#endif - exit_filesystem_init: return -result; } INIT_ENV_EXPORT(filesystem_init); #endif +#endif diff --git a/bsp/nuvoton/nk-n9h30/linking_scripts/n9h30.ld b/bsp/nuvoton/nk-n9h30/linking_scripts/n9h30.ld index bdecf1da02..ef5d634823 100644 --- a/bsp/nuvoton/nk-n9h30/linking_scripts/n9h30.ld +++ b/bsp/nuvoton/nk-n9h30/linking_scripts/n9h30.ld @@ -53,6 +53,11 @@ SECTIONS . = ALIGN(4); } + . = ALIGN(4); + __exidx_start = .; + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + __exidx_end = .; + . = ALIGN(4); .rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r*) *(.eh_frame) } diff --git a/bsp/nuvoton/nk-n9h30/project.uvproj b/bsp/nuvoton/nk-n9h30/project.uvproj deleted file mode 100644 index c2f79d0530..0000000000 --- a/bsp/nuvoton/nk-n9h30/project.uvproj +++ /dev/null @@ -1,6990 +0,0 @@ - - - 1.1 -
### uVision Project, (C) Keil Software
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..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_lwip.c - 1 - ..\..\..\components\net\sal\impl\af_inet_lwip.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - - - diff --git a/bsp/nuvoton/nk-n9h30/rtconfig.h b/bsp/nuvoton/nk-n9h30/rtconfig.h deleted file mode 100644 index 438987fc07..0000000000 --- a/bsp/nuvoton/nk-n9h30/rtconfig.h +++ /dev/null @@ -1,422 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 16 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 2048 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_MEMHEAP -#define RT_MEMHEAP_FAST_MODE -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_MEMTRACE -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_INTERRUPT_INFO -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define ARCH_ARM_ARM9 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 16 -#define DFS_FILESYSTEM_TYPES_MAX 16 -#define DFS_FD_MAX 64 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 8 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS -#define RT_USING_FAL -#define FAL_DEBUG_CONFIG -#define FAL_DEBUG 1 -#define FAL_PART_HAS_TABLE_CFG -#define FAL_USING_SFUD_PORT -#define FAL_USING_NOR_FLASH_DEV_NAME "norflash0" - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_RB_BUFSZ 2048 -#define RT_USING_CAN -#define RT_USING_HWTIMER -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_MTD_NAND -#define RT_USING_RTC -#define RT_USING_ALARM -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_SFUD -#define RT_SFUD_USING_SFDP -#define RT_SFUD_USING_FLASH_INFO_TABLE -#define RT_SFUD_USING_QSPI -#define RT_SFUD_SPI_MAX_HZ 50000000 -#define RT_USING_WDT -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_TOUCH -#define RT_USING_INPUT_CAPTURE -#define RT_INPUT_CAPTURE_RB_SIZE 100 - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/mnt/udisk" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define RT_USB_DEVICE_COMPOSITE -#define RT_USB_DEVICE_CDC -#define RT_USB_DEVICE_NONE -#define RT_USB_DEVICE_MSTORAGE -#define RT_VCOM_TASK_STK_SIZE 512 -#define RT_CDC_RX_BUFSIZE 128 -#define RT_VCOM_SERNO "32021919830108" -#define RT_VCOM_SER_LEN 14 -#define RT_VCOM_TX_TIMEOUT 1000 -#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1" - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL -#define SAL_INTERNET_CHECK - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP203 -#define RT_USING_LWIP_VER_NUM 0x20003 -#define RT_LWIP_MEM_ALIGNMENT 4 -#define RT_LWIP_IGMP -#define RT_LWIP_ICMP -#define RT_LWIP_DNS -#define RT_LWIP_DHCP -#define IP_SOF_BROADCAST 1 -#define IP_SOF_BROADCAST_RECV 1 - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.1.30" -#define RT_LWIP_GWADDR "192.168.1.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 32 -#define RT_LWIP_PBUF_NUM 256 -#define RT_LWIP_RAW_PCB_NUM 32 -#define RT_LWIP_UDP_PCB_NUM 32 -#define RT_LWIP_TCP_PCB_NUM 32 -#define RT_LWIP_TCP_SEG_NUM 256 -#define RT_LWIP_TCP_SND_BUF 32768 -#define RT_LWIP_TCP_WND 10240 -#define RT_LWIP_TCPTHREAD_PRIORITY 10 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 32 -#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_STACKSIZE 1024 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 32 -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define RT_LWIP_NETIF_LOOPBACK -#define LWIP_NETIF_LOOPBACK 1 -#define RT_LWIP_STATS -#define RT_LWIP_USING_PING - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - -#define PKG_USING_LVGL -#define PKG_LVGL_THREAD_PRIO 20 -#define PKG_LVGL_THREAD_STACK_SIZE 4096 -#define PKG_LVGL_DISP_REFR_PERIOD 30 -#define PKG_LVGL_USING_DEMOS -#define PKG_LVGL_USING_V08031 -#define PKG_LVGL_VER_NUM 0x08031 - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - -#define PKG_USING_RAMDISK -#define PKG_USING_RAMDISK_LATEST_VERSION - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_N9H30 -#define BSP_USING_MMU -#define BSP_USING_GPIO -#define BSP_USING_EMAC -#define BSP_USING_EMAC0 -#define BSP_USING_EMAC1 -#define BSP_USING_RTC -#define BSP_USING_ADC -#define BSP_USING_ADC_TOUCH -#define BSP_USING_ETMR -#define BSP_USING_ETIMER -#define BSP_USING_ETIMER_CAPTURE -#define BSP_USING_ETMR0 -#define BSP_USING_ETIMER0 -#define BSP_USING_ETMR1 -#define BSP_USING_ETIMER1 -#define BSP_USING_ETMR2 -#define BSP_USING_ETIMER2_CAPTURE -#define BSP_USING_ETMR3 -#define BSP_USING_ETIMER3_CAPTURE -#define BSP_USING_TMR -#define BSP_USING_TIMER -#define BSP_USING_TIMER0 -#define BSP_USING_TIMER1 -#define BSP_USING_TIMER2 -#define BSP_USING_TIMER3 -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_I2C -#define BSP_USING_I2C0 -#define BSP_USING_SDH -#define BSP_USING_SDH0 -#define BSP_USING_SDH1 -#define NU_SDH_HOTPLUG -#define BSP_USING_CAN -#define BSP_USING_CAN0 -#define BSP_USING_PWM -#define BSP_USING_PWM0 -#define BSP_USING_QSPI -#define BSP_USING_QSPI0 -#define BSP_USING_QSPI1_NONE -#define BSP_USING_I2S -#define NU_I2S_DMA_FIFO_SIZE 2048 -#define BSP_USING_WDT -#define BSP_USING_EBI -#define BSP_USING_VPOST -#define LCM_USING_FW070TFT -#define VPOST_USING_LCD_IDX 3 -#define BSP_LCD_BPP 32 -#define BSP_LCD_WIDTH 800 -#define BSP_LCD_HEIGHT 480 -#define BSP_USING_VPOST_OSD -#define BSP_USING_USBD -#define BSP_USING_USBH - -/* On-board Peripheral Drivers */ - -#define BSP_USING_CONSOLE -#define BOARD_USING_IP101GR -#define BOARD_USING_NAU8822 -#define BOARD_USING_STORAGE_SDCARD -#define BOARD_USING_STORAGE_SPIFLASH -#define BOARD_USING_BUZZER -#define BOARD_USING_USB0_DEVICE_HOST -#define BOARD_USING_USB1_HOST - -/* Board extended module drivers */ - -#define BOARD_USING_LCM -#define BOARD_USING_LCM_FW070TFT_WVGA -#define BOARD_USING_ADCTOUCH - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_NAU8822 -#define NU_PKG_USING_ADC_TOUCH - -#endif diff --git a/bsp/nuvoton/nk-n9h30/rtconfig.py b/bsp/nuvoton/nk-n9h30/rtconfig.py index 752155f321..51b6917e87 100644 --- a/bsp/nuvoton/nk-n9h30/rtconfig.py +++ b/bsp/nuvoton/nk-n9h30/rtconfig.py @@ -23,8 +23,8 @@ elif CROSS_TOOL == 'keil': if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') -BUILD = 'debug' -#BUILD = '' +#BUILD = 'debug' +BUILD = '' CORE = 'arm926ej-s' MAP_FILE = 'rtthread_n9h30.map' diff --git a/bsp/nuvoton/nk-rtu980/.config b/bsp/nuvoton/nk-rtu980/.config index 4cbe5820da..41fae917ba 100644 --- a/bsp/nuvoton/nk-rtu980/.config +++ b/bsp/nuvoton/nk-rtu980/.config @@ -8,6 +8,7 @@ # CONFIG_RT_NAME_MAX=16 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -61,7 +62,7 @@ CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set CONFIG_RT_USING_MEMHEAP=y CONFIG_RT_MEMHEAP_FAST_MODE=y -# CONFIG_RT_MEMHEAP_BSET_MODE is not set +# CONFIG_RT_MEMHEAP_BEST_MODE is not set CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_SLAB_AS_HEAP is not set @@ -76,15 +77,20 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y -# CONFIG_RT_USING_CPU_FFS is not set -CONFIG_ARCH_ARM_ARM9=y +CONFIG_RT_USING_CACHE=y +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +# CONFIG_RT_USING_CPU_FFS is not set +CONFIG_ARCH_MM_MMU=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_MMU=y +CONFIG_ARCH_ARM_ARM9=y # # RT-Thread Components @@ -141,7 +147,9 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_NFS is not set CONFIG_RT_USING_FAL=y CONFIG_FAL_DEBUG_CONFIG=y @@ -149,12 +157,12 @@ CONFIG_FAL_DEBUG=1 CONFIG_FAL_PART_HAS_TABLE_CFG=y CONFIG_FAL_USING_SFUD_PORT=y CONFIG_FAL_USING_NOR_FLASH_DEV_NAME="norflash0" -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -176,10 +184,14 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_ALARM is not set CONFIG_RT_USING_SOFT_RTC=y @@ -200,6 +212,7 @@ CONFIG_RT_USING_WDT=y # CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_SENSOR is not set # CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set CONFIG_RT_USING_HWCRYPTO=y CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto" CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16 @@ -226,7 +239,9 @@ CONFIG_RT_HWCRYPTO_USING_RNG=y # CONFIG_RT_HWCRYPTO_USING_BIGNUM is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -430,7 +445,6 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set -# CONFIG_PKG_USING_NETUTILS_LATEST_VERSION is not set # CONFIG_PKG_USING_CMUX is not set # CONFIG_PKG_USING_PPP_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set @@ -478,6 +492,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -485,6 +500,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -576,7 +592,6 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -610,8 +625,8 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -647,7 +662,6 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -686,19 +700,93 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -721,12 +809,9 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -741,7 +826,6 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -772,10 +856,11 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -790,6 +875,12 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -845,7 +936,6 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -855,6 +945,213 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -962,7 +1259,6 @@ CONFIG_BOARD_USING_IP101GR=y # CONFIG_NU_PKG_USING_UTILS=y CONFIG_NU_PKG_USING_DEMO=y -# CONFIG_NU_PKG_USING_LVGL is not set # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set # CONFIG_NU_PKG_USING_NCT7717U is not set @@ -975,5 +1271,3 @@ CONFIG_NU_PKG_USING_DEMO=y # CONFIG_NU_PKG_USING_TPC is not set # CONFIG_NU_PKG_USING_ADC_TOUCH is not set # CONFIG_NU_PKG_USING_SPINAND is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/nk-rtu980/project.uvproj b/bsp/nuvoton/nk-rtu980/project.uvproj deleted file mode 100644 index 8a72e069b3..0000000000 --- a/bsp/nuvoton/nk-rtu980/project.uvproj +++ /dev/null @@ -1,2284 +0,0 @@ - - - 1.1 -
### uVision Project, (C) Keil Software
- - - rtthread - 0x4 - ARM-ADS - 5060750::V5.06 update 6 (build 750)::ARMCC - 0 - - - Nuvoton_ARM9_Series - Nuvoton - IRAM(0x0-0x0) CLOCK(000000000) CPUTYPE(ARM926EJ-S) - - - - 0 - - - - - - - - - - - - 0 - 0 - - - - Atmel\SAM9260\ - Atmel\SAM9260\ - - 0 - 0 - 0 - 0 - 1 - - .\build\keil4\ - rtthread - 1 - 0 - 0 - 1 - 1 - .\build\keil4\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 1 - 0 - fromelf.exe --bin --output "$L@L.bin" "$L@L.axf" - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - SARM.DLL - -cAT91SAM9 - DARMATS9.DLL - -p91SAM9260 - SARM.DLL - - TARMATS9.DLL - -p91SAM9260 - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - - 1 - 1 - 0 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - - 0 - 18 - - - - - - - - - - - - - ..\libraries\nuc980\Script\NUC980xx61.ini - Segger\JLTAgdi.dll - - - - - 1 - 0 - 0 - 0 - 1 - 4098 - - 0 - Segger\JLTAgdi.dll - - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 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..\..\..\components\net\lwip\lwip-2.1.2\src\netif\ethernet.c - - - - - lowpan6.c - 1 - ..\..\..\components\net\lwip\lwip-2.1.2\src\netif\lowpan6.c - - - - - ethernetif.c - 1 - ..\..\..\components\net\lwip\port\ethernetif.c - - - - - sys_arch.c - 1 - ..\..\..\components\net\lwip\port\sys_arch.c - - - - - NetUtils - - - iperf.c - 1 - packages\netutils-latest\iperf\iperf.c - - - - - ntp.c - 1 - packages\netutils-latest\ntp\ntp.c - - - - - tftp_client.c - 1 - packages\netutils-latest\tftp\tftp_client.c - - - - - tftp_port.c - 1 - packages\netutils-latest\tftp\tftp_port.c - - - - - tftp_server.c - 1 - packages\netutils-latest\tftp\tftp_server.c - - - - - tftp_xfer.c - 1 - packages\netutils-latest\tftp\tftp_xfer.c - - - - - nu_pkgs_demo - - - usbd_cdc_vcom_echo.c - 1 - ..\libraries\nu_packages\Demo\usbd_cdc_vcom_echo.c - - - - - slcd_show_tick.c - 1 - ..\libraries\nu_packages\Demo\slcd_show_tick.c - - - - - usbd_hid_dance_mouse.c - 1 - ..\libraries\nu_packages\Demo\usbd_hid_dance_mouse.c - - - - - nuc980_usbhostlib - - - ehci_iso.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ehci_iso.c - - - - - ohci.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ohci.c - - - - - mem_alloc.c - 1 - ..\libraries\nuc980\UsbHostLib\src\mem_alloc.c - - - - - support.c - 1 - ..\libraries\nuc980\UsbHostLib\src\support.c - - - - - usb_core.c - 1 - ..\libraries\nuc980\UsbHostLib\src\usb_core.c - - - - - ehci.c - 1 - ..\libraries\nuc980\UsbHostLib\src\ehci.c - - - - - optparse - - - optparse.c - 1 - packages\optparse-latest\optparse.c - - - - - POSIX - - - poll.c - 1 - ..\..\..\components\libc\posix\io\poll\poll.c - - - - - select.c - 1 - ..\..\..\components\libc\posix\io\poll\select.c - - - - - ramdisk - - - drv_ramdisk.c - 1 - packages\ramdisk-latest\src\drv_ramdisk.c - - - - - rt_usbd - - - cdc_vcom.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\cdc_vcom.c - - - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - mstorage.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\mstorage.c - - - - - rt_usbh - - - hub.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\hub.c - - - - - usbhost.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost.c - - - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - usbhost_core.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_lwip.c - 1 - ..\..\..\components\net\sal\impl\af_inet_lwip.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - - - diff --git a/bsp/nuvoton/nk-rtu980/rtconfig.h b/bsp/nuvoton/nk-rtu980/rtconfig.h deleted file mode 100644 index 4e9727b9f2..0000000000 --- a/bsp/nuvoton/nk-rtu980/rtconfig.h +++ /dev/null @@ -1,427 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 16 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 2048 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_MEMHEAP -#define RT_MEMHEAP_FAST_MODE -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_MEMTRACE -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define ARCH_ARM_ARM9 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 16 -#define DFS_FILESYSTEM_TYPES_MAX 16 -#define DFS_FD_MAX 64 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 8 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS -#define RT_USING_FAL -#define FAL_DEBUG_CONFIG -#define FAL_DEBUG 1 -#define FAL_PART_HAS_TABLE_CFG -#define FAL_USING_SFUD_PORT -#define FAL_USING_NOR_FLASH_DEV_NAME "norflash0" - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 2048 -#define RT_USING_CAN -#define RT_CAN_USING_HDR -#define RT_USING_HWTIMER -#define RT_USING_CPUTIME -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_RTC -#define RT_USING_SOFT_RTC -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_SFUD -#define RT_SFUD_USING_SFDP -#define RT_SFUD_USING_FLASH_INFO_TABLE -#define RT_SFUD_USING_QSPI -#define RT_SFUD_SPI_MAX_HZ 50000000 -#define RT_USING_WDT -#define RT_USING_HWCRYPTO -#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto" -#define RT_HWCRYPTO_IV_MAX_SIZE 16 -#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256 -#define RT_HWCRYPTO_USING_AES -#define RT_HWCRYPTO_USING_AES_ECB -#define RT_HWCRYPTO_USING_AES_CBC -#define RT_HWCRYPTO_USING_AES_CFB -#define RT_HWCRYPTO_USING_AES_CTR -#define RT_HWCRYPTO_USING_AES_OFB -#define RT_HWCRYPTO_USING_SHA1 -#define RT_HWCRYPTO_USING_SHA2 -#define RT_HWCRYPTO_USING_SHA2_224 -#define RT_HWCRYPTO_USING_SHA2_256 -#define RT_HWCRYPTO_USING_SHA2_384 -#define RT_HWCRYPTO_USING_SHA2_512 -#define RT_HWCRYPTO_USING_RNG - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/mnt/udisk" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define RT_USB_DEVICE_COMPOSITE -#define RT_USB_DEVICE_CDC -#define RT_USB_DEVICE_NONE -#define RT_USB_DEVICE_MSTORAGE -#define RT_VCOM_TASK_STK_SIZE 2048 -#define RT_CDC_RX_BUFSIZE 128 -#define RT_VCOM_SERNO "32021919830108" -#define RT_VCOM_SER_LEN 14 -#define RT_VCOM_TX_TIMEOUT 1000 -#define RT_USB_MSTORAGE_DISK_NAME "ramdisk1" - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT -#define RT_USING_POSIX_SOCKET - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP212 -#define RT_USING_LWIP_VER_NUM 0x20102 -#define RT_LWIP_MEM_ALIGNMENT 4 -#define RT_LWIP_IGMP -#define RT_LWIP_ICMP -#define RT_LWIP_DNS -#define RT_LWIP_DHCP -#define IP_SOF_BROADCAST 1 -#define IP_SOF_BROADCAST_RECV 1 - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.31.55" -#define RT_LWIP_GWADDR "192.168.31.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 16 -#define RT_LWIP_PBUF_NUM 256 -#define RT_LWIP_RAW_PCB_NUM 16 -#define RT_LWIP_UDP_PCB_NUM 16 -#define RT_LWIP_TCP_PCB_NUM 16 -#define RT_LWIP_TCP_SEG_NUM 64 -#define RT_LWIP_TCP_SND_BUF 16384 -#define RT_LWIP_TCP_WND 65535 -#define RT_LWIP_TCPTHREAD_PRIORITY 10 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 256 -#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_STACKSIZE 4096 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 256 -#define RT_LWIP_REASSEMBLY_FRAG -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define RT_LWIP_NETIF_LOOPBACK -#define LWIP_NETIF_LOOPBACK 1 -#define RT_LWIP_STATS -#define RT_LWIP_USING_PING - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - -#define PKG_USING_NETUTILS -#define PKG_NETUTILS_TFTP -#define PKG_NETUTILS_IPERF -#define PKG_NETUTILS_NTP -#define NTP_USING_AUTO_SYNC -#define NTP_AUTO_SYNC_FIRST_DELAY 30 -#define NTP_AUTO_SYNC_PERIOD 3600 -#define NETUTILS_NTP_HOSTNAME "0.tw.pool.ntp.org" -#define NETUTILS_NTP_HOSTNAME2 "1.tw.pool.ntp.org" -#define NETUTILS_NTP_HOSTNAME3 "2.tw.pool.ntp.org" -#define PKG_USING_NETUTILS_LATEST_VERSION -#define PKG_NETUTILS_VER_NUM 0x99999 - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - -#define PKG_USING_RAMDISK -#define PKG_USING_RAMDISK_LATEST_VERSION - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - -#define PKG_USING_OPTPARSE -#define PKG_USING_OPTPARSE_LATEST_VERSION - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_NUC980 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_MMU -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 2 -#define BSP_USING_GPIO -#define BSP_USING_EMAC -#define BSP_USING_EMAC1 -#define NU_EMAC_PDMA_MEMCOPY -#define NU_EMAC_PDMA_MEMCOPY_THRESHOLD 128 -#define BSP_USING_ADC -#define BSP_USING_TMR -#define BSP_USING_TIMER -#define BSP_USING_TMR0 -#define BSP_USING_TIMER0 -#define BSP_USING_TMR1 -#define BSP_USING_TIMER1 -#define BSP_USING_TMR2 -#define BSP_USING_TIMER2 -#define BSP_USING_TMR3 -#define BSP_USING_TIMER3 -#define BSP_USING_TMR4 -#define BSP_USING_TIMER4 -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_UART4 -#define BSP_USING_UART4_TX_DMA -#define BSP_USING_UART4_RX_DMA -#define BSP_USING_UART8 -#define BSP_USING_UART8_TX_DMA -#define BSP_USING_UART8_RX_DMA -#define BSP_USING_I2C -#define BSP_USING_I2C1 -#define BSP_USING_CAN -#define BSP_USING_CAN3 -#define BSP_USING_SPI -#define BSP_USING_SPI_PDMA -#define BSP_USING_SPI0 -#define BSP_USING_SPI0_PDMA -#define BSP_USING_SPI1_NONE -#define BSP_USING_QSPI -#define BSP_USING_QSPI_PDMA -#define BSP_USING_QSPI0 -#define BSP_USING_QSPI0_PDMA -#define BSP_USING_CRYPTO -#define BSP_USING_WDT -#define BSP_USING_USBD -#define BSP_USING_USBH - -/* On-board Peripheral Drivers */ - -#define BSP_USING_CONSOLE -#define BOARD_USING_UART8_RS485 -#define BOARD_USING_STORAGE_SPIFLASH -#define BOARD_USING_USB0_DEVICE_HOST - -/* Board extended module drivers */ - -#define BOARD_USING_IP101GR - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO - -#endif diff --git a/bsp/nuvoton/nk-rtu980/rtconfig.py b/bsp/nuvoton/nk-rtu980/rtconfig.py index c0d6b5a46d..b4931ae159 100644 --- a/bsp/nuvoton/nk-rtu980/rtconfig.py +++ b/bsp/nuvoton/nk-rtu980/rtconfig.py @@ -16,7 +16,7 @@ if os.getenv('RTT_ROOT'): if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' EXEC_PATH = r'C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q1-update\bin' -elif CROSS_TOOL == 'keil': +if CROSS_TOOL == 'keil': PLATFORM = 'armcc' EXEC_PATH = r'C:\Keil_v5' diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/.config b/bsp/nuvoton/numaker-hmi-ma35d1/.config index 5cf42f36ff..a97d3b7fd3 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/.config +++ b/bsp/nuvoton/numaker-hmi-ma35d1/.config @@ -9,8 +9,8 @@ CONFIG_USE_MA35D1_AARCH32=y # CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set -CONFIG_RT_USING_SMP=y -CONFIG_RT_CPUS_NR=2 +# CONFIG_RT_USING_SMART is not set +# CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=32 # CONFIG_RT_THREAD_PRIORITY_8 is not set CONFIG_RT_THREAD_PRIORITY_32=y @@ -23,7 +23,6 @@ CONFIG_RT_HOOK_USING_FUNC_PTR=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=4096 -CONFIG_SYSTEM_THREAD_STACK_SIZE=4096 CONFIG_RT_USING_TIMER_SOFT=y CONFIG_RT_TIMER_THREAD_PRIO=4 CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096 @@ -67,7 +66,7 @@ CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SLAB is not set CONFIG_RT_USING_MEMHEAP=y CONFIG_RT_MEMHEAP_FAST_MODE=y -# CONFIG_RT_MEMHEAP_BSET_MODE is not set +# CONFIG_RT_MEMHEAP_BEST_MODE is not set CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set # CONFIG_RT_USING_SLAB_AS_HEAP is not set @@ -82,19 +81,26 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set CONFIG_RT_USING_INTERRUPT_INFO=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=4096 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CACHE=y +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_MM_MMU=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_MMU=y CONFIG_ARCH_ARM_CORTEX_A=y CONFIG_RT_SMP_AUTO_BOOT=y CONFIG_RT_USING_GIC_V2=y # CONFIG_RT_USING_GIC_V3 is not set +CONFIG_ARCH_ARM_SECURE_MODE=y +# CONFIG_RT_BACKTRACE_FUNCTION_NAME is not set CONFIG_ARCH_ARMV8=y -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components @@ -151,15 +157,17 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_NFS is not set # CONFIG_RT_USING_FAL is not set -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -179,11 +187,15 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set CONFIG_RT_USING_MTD_NAND=y CONFIG_RT_MTD_NAND_DEBUG=y # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_ALARM is not set # CONFIG_RT_USING_SOFT_RTC is not set @@ -209,10 +221,13 @@ CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 # CONFIG_RT_USING_SENSOR is not set CONFIG_RT_USING_TOUCH=y # CONFIG_RT_TOUCH_PIN_IRQ is not set +# CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -507,6 +522,7 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -514,6 +530,7 @@ CONFIG_UTEST_SMALL_MEM_TC=y # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -563,14 +580,20 @@ CONFIG_PKG_USING_LVGL=y CONFIG_PKG_LVGL_PATH="/packages/multimedia/LVGL/LVGL" CONFIG_PKG_LVGL_THREAD_PRIO=20 CONFIG_PKG_LVGL_THREAD_STACK_SIZE=4096 -CONFIG_PKG_LVGL_DISP_REFR_PERIOD=5 +CONFIG_PKG_LVGL_DISP_REFR_PERIOD=16 +# CONFIG_PKG_USING_LVGL_SQUARELINE is not set # CONFIG_PKG_LVGL_USING_EXAMPLES is not set CONFIG_PKG_LVGL_USING_DEMOS=y -# CONFIG_PKG_LVGL_USING_V08020 is not set +# CONFIG_PKG_LVGL_USING_V08034 is not set +# CONFIG_PKG_LVGL_USING_V08033 is not set +# CONFIG_PKG_LVGL_USING_V08032 is not set +# CONFIG_PKG_LVGL_USING_V08031 is not set # CONFIG_PKG_LVGL_USING_V08030 is not set -CONFIG_PKG_LVGL_USING_LATEST_VERSION=y -CONFIG_PKG_LVGL_VER_NUM=0x99999 -CONFIG_PKG_LVGL_VER="latest" +# CONFIG_PKG_LVGL_USING_V08020 is not set +CONFIG_PKG_LVGL_USING_V8_3_LATEST_VERSION=y +# CONFIG_PKG_LVGL_USING_LATEST_VERSION is not set +CONFIG_PKG_LVGL_VER_NUM=0x0803F +CONFIG_PKG_LVGL_VER="v8.3-latest" # CONFIG_PKG_USING_LITTLEVGL2RTT is not set # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set @@ -595,14 +618,10 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_TJPGD is not set # CONFIG_PKG_USING_PDFGEN is not set # CONFIG_PKG_USING_HELIX is not set -# CONFIG_PKG_USING_HELIX_V100 is not set -# CONFIG_PKG_USING_HELIX_LATEST_VERSION is not set # CONFIG_PKG_USING_AZUREGUIX is not set # CONFIG_PKG_USING_TOUCHGFX2RTT is not set # CONFIG_PKG_USING_NUEMWIN is not set # CONFIG_PKG_USING_MP3PLAYER is not set -# CONFIG_PKG_USING_MP3PLAYER_V100 is not set -# CONFIG_PKG_USING_MP3PLAYER_LATEST_VERSION is not set # CONFIG_PKG_USING_TINYJPEG is not set # CONFIG_PKG_USING_UGUI is not set @@ -628,7 +647,6 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -662,8 +680,8 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -699,7 +717,6 @@ CONFIG_PKG_WAVPLAYER_VER="latest" # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -738,19 +755,93 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -773,12 +864,9 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -793,7 +881,6 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -824,10 +911,11 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -842,6 +930,12 @@ CONFIG_PKG_RAMDISK_VER="latest" # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -897,7 +991,6 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -907,8 +1000,213 @@ CONFIG_PKG_OPTPARSE_VER="latest" # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -918,6 +1216,11 @@ CONFIG_BOARD_USE_UTEST=y # On-chip Peripheral Drivers # CONFIG_SOC_SERIES_MA35D1=y +CONFIG_BSP_USING_SSPCC=y +CONFIG_BSP_USING_SSMCC=y +CONFIG_BSP_USING_UMCTL2=y +CONFIG_BSP_USING_RTP=y +CONFIG_RTP_USING_AT_STARTUP=y CONFIG_RT_USING_FPU=y # CONFIG_BSP_USE_STDDRIVER_SOURCE is not set CONFIG_BSP_USING_PDMA=y @@ -1006,9 +1309,6 @@ CONFIG_BSP_USING_QSPI0=y # CONFIG_BSP_USING_SCUART is not set # CONFIG_BSP_USING_ECAP is not set # CONFIG_BSP_USING_QEI is not set -# CONFIG_BSP_USING_CRYPTO is not set -# CONFIG_BSP_USING_TRNG is not set -# CONFIG_BSP_USING_CRC is not set # CONFIG_BSP_USING_SOFT_I2C is not set CONFIG_BSP_USING_DISP=y CONFIG_LCM_USING_FW070TFT_WSVGA=y @@ -1020,8 +1320,13 @@ CONFIG_BSP_LCD_WIDTH=1024 CONFIG_BSP_LCD_HEIGHT=600 CONFIG_DISP_USING_OVERLAY=y # CONFIG_BSP_USING_WDT is not set +CONFIG_BSP_USING_HWSEM=y +CONFIG_BSP_USING_HWSEM0=y +CONFIG_BSP_USING_WHC=y +CONFIG_BSP_USING_WHC0=y +# CONFIG_BSP_USING_WHC1 is not set +CONFIG_BSP_USING_NFI=y # CONFIG_BSP_USING_EBI is not set -# CONFIG_BSP_USING_USBD is not set CONFIG_BSP_USING_USBH=y CONFIG_BSP_USING_HSUSBH0=y CONFIG_BSP_USING_HSUSBH1=y @@ -1033,9 +1338,11 @@ CONFIG_BSP_USING_CONSOLE=y CONFIG_BOARD_USING_NAU8822=y CONFIG_BOARD_USING_STORAGE_SDCARD=y CONFIG_BOARD_USING_STORAGE_EMMC=y +CONFIG_BOARD_USING_STORAGE_RAWNAND=y # CONFIG_BOARD_USING_STORAGE_SPIFLASH is not set CONFIG_BOARD_USING_STORAGE_SPINAND=y # CONFIG_BOARD_USING_BUZZER is not set +# CONFIG_BOARD_USING_MPU6500 is not set CONFIG_BOARD_USING_USBHOST=y # @@ -1046,16 +1353,14 @@ CONFIG_BOARD_USING_LCM=y CONFIG_BOARD_USING_LCM_FW070TFT_WSVGA=y # CONFIG_BOARD_USING_GT911 is not set CONFIG_BOARD_USING_ADCTOUCH=y -CONFIG_BOARD_USING_SENSOR0=y -CONFIG_BOARD_USING_SENSON0_ID=0 +# CONFIG_BOARD_USING_SENSOR0 is not set # CONFIG_BOARD_USING_SENSOR1 is not set # # Nuvoton Packages Config # CONFIG_NU_PKG_USING_UTILS=y -# CONFIG_NU_PKG_USING_DEMO is not set -CONFIG_NU_PKG_USING_LVGL=y +CONFIG_NU_PKG_USING_DEMO=y # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set # CONFIG_NU_PKG_USING_NCT7717U is not set diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/README.md b/bsp/nuvoton/numaker-hmi-ma35d1/README.md index 4d95d63512..915680a8b7 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/README.md +++ b/bsp/nuvoton/numaker-hmi-ma35d1/README.md @@ -88,10 +88,10 @@ Support GCC compiler. More information of these compiler version as following: | Compiler | Tested version | | -- | -- | -| GCC | 6-2017-q1-update| +| GCC | Arm Embedded Toolchain 10.3-2021.10 (Env 1.3.5 embedded version)| ## **Build RT-Thread** -You can build rt-thread.bin for NuMaker-HMI-MA35D1 board. Steps as following. Notice, the building will include **ma35-rtp/rtthread.bin** file into **NuMaker-HMI-MA35D1/rtthread.bin** for heterogeneous multi-core demonstration. +You can build rt-thread.bin for NuMaker-HMI-MA35D1 board. Steps as following. Notice, the building will include **ma35-rtp/rtthread.bin** file into **numaker-hmi-ma35d1/rtthread.bin** for heterogeneous multi-core demonstration. ```bash # cd rt-thread/bsp/nuvoton/numaker-hmi-ma35d1 @@ -194,8 +194,8 @@ You can run windows batch script to download rtthread.bin into Raw NAND flash, t |Connector on board|Wiring|Usage| |-|-|-| -|VCOM(CON21)|Use an USB line| rt-thread@RTP Console | -|RS232_16(CON14)|Using an USB to RS232 convert| rt-thread@CA35 Console | +|VCOM(CON21)|Use an USB line| rt-thread@CA35 Console | +|RS232_16(CON14)|Using an USB to RS232 convert| rt-thread@RTP Console | You can use Tera Term terminate emulator (or other software) to type commands of RTT. All parameters of serial communication are shown in below image. Here, you can find out the corresponding port number of Nuvoton Virtual Com Port in window device manager. @@ -206,11 +206,11 @@ You can use Tera Term terminate emulator (or other software) to type commands of ## **Purchase** -* [Nuvoton Direct](https://ComingSoon) +* [Nuvoton Direct](https://direct.nuvoton.com/en/numaker-hmi-ma35d1-s1) ## **Resources** -* [Download Board Schematics](https://ComingSoon) -* [Download Quick Start Guide](https://ComingSoon) -* [Download TRM](https://ComingSoon) +* [Download Board Schematics](https://www.nuvoton.com/resource-download.jsp?tp_GUID=HL102022102107140870) +* [Download User Manual](https://www.nuvoton.com/resource-download.jsp?tp_GUID=UG132022101900252882) +* [Download Datasheet](https://www.nuvoton.com/resource-download.jsp?tp_GUID=DA00-MA35D16) * [Download NuWriter](https://github.com/OpenNuvoton/MA35D1_NuWriter) diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_conf.h b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_conf.h index c902bc904c..b046f3c8c8 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_conf.h +++ b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_conf.h @@ -22,7 +22,7 @@ #define LV_USE_PERF_MONITOR 1 //#define CONFIG_LV_LOG_LEVEL LV_LOG_LEVEL_TRACE -//#define LV_USE_DEMO_RTT_MUSIC 1 +#define LV_USE_DEMO_RTT_MUSIC 1 #if LV_USE_DEMO_RTT_MUSIC #define LV_COLOR_SCREEN_TRANSP 1 #define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1 @@ -32,7 +32,7 @@ #endif /* Please comment LV_USE_DEMO_RTT_MUSIC declaration before un-comment below */ -#define LV_USE_DEMO_WIDGETS 1 +//#define LV_USE_DEMO_WIDGETS 1 //#define LV_USE_DEMO_BENCHMARK 1 #endif diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_demo.c index 7a04e1804a..1f8382d46a 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_demo.c @@ -10,23 +10,22 @@ #include -void lv_user_gui_init(void) +RT_WEAK void lv_user_gui_init(void) { /* display demo; you may replace with your LVGL application at here and disable related definitions. */ #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.c index 8c1de86b8d..5856a29fc6 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.c @@ -17,6 +17,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static rt_device_t lcd_device = 0; @@ -47,24 +51,6 @@ static void nu_antitearing(lv_disp_draw_buf_t *draw_buf, lv_color_t *color_p) } } -static void nu_flush_direct(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) -{ - /* Use PANDISPLAY */ - rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, color_p); - - //TODO - nu_antitearing(disp_drv->draw_buf, color_p); - - if (!u32FirstFlush) - { - /* Enable backlight at first flushing. */ - rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWERON, RT_NULL); - u32FirstFlush = 1; - } - - lv_disp_flush_ready(disp_drv); -} - static void nu_flush_full_refresh(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) { rt_hw_cpu_dcache_clean(color_p, disp_drv->draw_buf->size * sizeof(lv_color_t)); @@ -86,16 +72,29 @@ static void nu_flush_full_refresh(lv_disp_drv_t *disp_drv, const lv_area_t *area static void nu_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p) { - int32_t flush_area_w = lv_area_get_width(area); - int32_t flush_area_h = lv_area_get_height(area); + int32_t x, y; + int32_t w = lv_area_get_width(area); + int32_t h = lv_area_get_height(area); + lv_color_t *pDisp; - rt_kprintf("[%s %08x] %dx%d %d %d %d %d\n", __func__, color_p, flush_area_w, flush_area_h, area->x1, area->y1, area->x2, area->y2); + pDisp = (lv_color_t *)info.framebuffer + (info.width * area->y1 + area->x1); /* Update dirty region. */ - //TODO + for (y = 0; y < h; y++) + { + for (x = 0; x < w; x++) + { + pDisp[x] = color_p[x]; + } + pDisp += info.width; + color_p += w; + } if (!u32FirstFlush) { + /* Point to first screen buffer address. */ + rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, info.framebuffer); + /* Enable backlight at first flushing. */ rt_device_control(lcd_device, RTGRAPHIC_CTRL_POWERON, RT_NULL); u32FirstFlush = 1; @@ -115,7 +114,7 @@ void lv_port_disp_init(void) void *buf2 = RT_NULL; uint32_t u32FBSize; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); @@ -142,30 +141,25 @@ void lv_port_disp_init(void) /*Set the resolution of the display*/ disp_drv.hor_res = info.width; disp_drv.ver_res = info.height; - disp_drv.full_refresh = 1; - //disp_drv.direct_mode = 1; + //disp_drv.full_refresh = 1; u32FBSize = info.height * info.width * (info.bits_per_pixel / 8); - if (disp_drv.full_refresh || disp_drv.direct_mode) + if (disp_drv.full_refresh) { + disp_drv.flush_cb = nu_flush_full_refresh; buf1 = (void *)((uint32_t)info.framebuffer & (~UNCACHEABLE)); buf2 = (void *)((uint32_t)buf1 + u32FBSize); buf3_next = (void *)((uint32_t)buf2 + u32FBSize); - rt_kprintf("LVGL: Triple screen-sized buffers(%s) - buf1@%08x, buf2@%08x, buf3_next@%08x\n", (disp_drv.full_refresh == 1) ? "full_refresh" : "direct_mode", buf1, buf2, buf3_next); - if (disp_drv.direct_mode) - disp_drv.flush_cb = nu_flush_direct; - else - disp_drv.flush_cb = nu_flush_full_refresh; + LOG_I("LVGL: Triple screen-sized buffers(full_refresh) - buf1@%08x, buf2@%08x, buf3_next@%08x\n", buf1, buf2, buf3_next); } else { - buf1 = (void *)(((uint32_t)info.framebuffer) + u32FBSize); - buf2 = (void *)((uint32_t)buf1 + u32FBSize); - rt_kprintf("LVGL: Two screen-sized buffers - buf1@%08x, buf2@%08x\n", buf1, buf2); - rt_device_control(lcd_device, RTGRAPHIC_CTRL_PAN_DISPLAY, info.framebuffer); - disp_drv.flush_cb = nu_flush; + buf1 = (void *)(((uint32_t)info.framebuffer & (~UNCACHEABLE)) + u32FBSize); + buf2 = (void *)((uint32_t)buf1 + u32FBSize); + + rt_kprintf("LVGL: Two screen-sized buffers - buf1@%08x, buf2@%08x\n", buf1, buf2); } /*Initialize `disp_buf` with the buffer(s).*/ diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/main.c b/bsp/nuvoton/numaker-hmi-ma35d1/applications/main.c index 4c781acff3..87a2c7cc3e 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/main.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/applications/main.c @@ -47,25 +47,3 @@ int main(int argc, char **argv) } #endif - -void happy_counter(void *pdata) -{ - uint32_t counter = 0; - while (1) - { - rt_kprintf("cpu-%d %d\r\n", rt_hw_cpu_id(), counter++); - rt_thread_mdelay(1000); - } -} - -void go_happy_counter(void) -{ - rt_thread_t tid = rt_thread_create("cpu-1", happy_counter, RT_NULL, 2048, 10, 20); - RT_ASSERT(tid != RT_NULL); - - rt_thread_control(tid, RT_THREAD_CTRL_BIND_CPU, (void *)1); - - rt_thread_startup(tid); -} -MSH_CMD_EXPORT(go_happy_counter, go happy counter); - diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/applications/mnt.c b/bsp/nuvoton/numaker-hmi-ma35d1/applications/mnt.c index 2ddb18f2ba..601362ab50 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/applications/mnt.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/applications/mnt.c @@ -12,6 +12,8 @@ #include +#if defined(RT_USING_DFS) + #define LOG_TAG "mnt" #define DBG_ENABLE #define DBG_SECTION_NAME "mnt" @@ -57,9 +59,10 @@ const struct dfs_mount_tbl mount_table[] = { RAMDISK_UDC, "/mnt/ram_usbd", "elm", 0, RT_NULL }, #endif #if defined(PKG_USING_DFS_YAFFS) - { "nand1", "/mnt/filesystem", "yaffs", 0, RT_NULL }, + { "nand1", "/mnt/nand1", "yaffs", 0, RT_NULL }, + { "rawnd1", "/mnt/nfi", "yaffs", 0, RT_NULL }, #elif defined(RT_USING_DFS_UFFS) - { "nand1", "/mnt/filesystem", "uffs", 0, RT_NULL }, + { "nand1", "/mnt/nand1", "uffs", 0, RT_NULL }, #endif { "sd0", "/mnt/sd0", "elm", 0, RT_NULL }, { "sd0p0", "/mnt/sd0p0", "elm", 0, RT_NULL }, @@ -163,9 +166,10 @@ exit_mkdir_p: #if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE) #include "yaffs_guts.h" -void yaffs_dev_init(void) +int yaffs_dev_init(void) { int i; + for (i = 0; i < sizeof(mount_table) / sizeof(struct dfs_mount_tbl); i++) { if (mount_table[i].filesystemtype && !rt_strcmp(mount_table[i].filesystemtype, "yaffs")) @@ -173,11 +177,26 @@ void yaffs_dev_init(void) struct rt_mtd_nand_device *psMtdNandDev = RT_MTD_NAND_DEVICE(rt_device_find(mount_table[i].device_name)); if (psMtdNandDev) { + LOG_I("yaffs start [%s].", mount_table[i].device_name); + yaffs_start_up(psMtdNandDev, (const char *)mount_table[i].path); + + LOG_I("dfs mount [%s].", mount_table[i].device_name); + if (dfs_mount(mount_table[i].device_name, + mount_table[i].path, + mount_table[i].filesystemtype, + mount_table[i].rwflag, + mount_table[i].data) != 0) + { + LOG_E("mount fs[%s] on %s failed.", mount_table[i].filesystemtype, mount_table[i].path); + } } } } + + return 0; } +INIT_APP_EXPORT(yaffs_dev_init); #endif /* Initialize the filesystem */ @@ -214,7 +233,8 @@ int filesystem_init(void) mkdir_p("/cache", 0x777); mkdir_p("/download", 0x777); mkdir_p("/mnt/ram_usbd", 0x777); - mkdir_p("/mnt/filesystem", 0x777); + mkdir_p("/mnt/nand1", 0x777); + mkdir_p("/mnt/nfi", 0x777); mkdir_p("/mnt/sd0", 0x777); mkdir_p("/mnt/sd0p0", 0x777); mkdir_p("/mnt/sd0p1", 0x777); @@ -254,13 +274,10 @@ int filesystem_init(void) } #endif -#if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE) - yaffs_dev_init(); -#endif - exit_filesystem_init: return -result; } INIT_ENV_EXPORT(filesystem_init); #endif +#endif diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/board/Kconfig b/bsp/nuvoton/numaker-hmi-ma35d1/board/Kconfig index 2fbf0bf116..134a2e50b9 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/board/Kconfig +++ b/bsp/nuvoton/numaker-hmi-ma35d1/board/Kconfig @@ -32,6 +32,12 @@ menu "Hardware Drivers Config" select BSP_USING_SDH1 default y + config BOARD_USING_STORAGE_RAWNAND + bool "Raw NAND supporting(over nfi)" + select BSP_USING_NFI + select RT_USING_MTD_NAND + default y + config BOARD_USING_STORAGE_SPIFLASH bool "SPI NOR FLASH supporting(over qspi0)" select BSP_USING_QSPI @@ -52,6 +58,17 @@ menu "Hardware Drivers Config" select BSP_USING_EPWM1_PWM default y + config BOARD_USING_MPU6500 + bool "MPU6500 6-axis MotionTracking Sensor(over i2c1)" + select RT_USING_SENSOR + select PKG_USING_MPU6XXX + select PKG_USING_MPU6XXX_LATEST_VERSION + select PKG_USING_MPU6XXX_ACCE + select PKG_USING_MPU6XXX_GYRO + select BSP_USING_I2C + select BSP_USING_I2C1 + default y + config BOARD_USING_USBHOST bool "USB HOST function" select BSP_USING_USBH @@ -139,7 +156,7 @@ menu "Hardware Drivers Config" if BOARD_USING_SENSOR1 config BOARD_USING_SENSON1_ID int "Specify Sensor1 ID" - default 0 + default 0 range 0 2 help HM1055=0 diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/board/board.h b/bsp/nuvoton/numaker-hmi-ma35d1/board/board.h index 5d422bcf19..33c01c6097 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/board/board.h +++ b/bsp/nuvoton/numaker-hmi-ma35d1/board/board.h @@ -29,6 +29,9 @@ extern int __bss_end; #include #define MTD_SPINAND_PARTITION_NUM 3 extern struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM]; + + #define MTD_NFI_PARTITION_NUM 3 + extern struct rt_mtd_nand_device mtd_partitions_nfi[MTD_NFI_PARTITION_NUM]; #endif extern void rt_hw_board_init(void); extern void nu_clock_init(void); diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/board/board_dev.c b/bsp/nuvoton/numaker-hmi-ma35d1/board/board_dev.c index 97959fc4a4..a475663591 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/board/board_dev.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/board/board_dev.c @@ -14,6 +14,8 @@ #include #include "drv_gpio.h" #include "drv_sys.h" +#include "drv_sspcc.h" + #include "board.h" @@ -149,7 +151,7 @@ static int rt_hw_spiflash_init(void) #endif return 0; } -INIT_COMPONENT_EXPORT(rt_hw_spiflash_init); +INIT_DEVICE_EXPORT(rt_hw_spiflash_init); #endif /* BOARD_USING_STORAGE_SPIFLASH */ #if defined(BOARD_USING_STORAGE_SPINAND) && defined(NU_PKG_USING_SPINAND) @@ -193,7 +195,52 @@ static int rt_hw_spinand_init(void) return 0; } -INIT_COMPONENT_EXPORT(rt_hw_spinand_init); +INIT_DEVICE_EXPORT(rt_hw_spinand_init); +#endif + +#if defined(BOARD_USING_MPU6500) && defined(PKG_USING_MPU6XXX) + +#include "sensor_inven_mpu6xxx.h" + +int rt_hw_mpu6xxx_port(void) +{ + struct rt_sensor_config cfg; + rt_base_t mpu_int = NU_GET_PININDEX(NU_PL, 8); + + cfg.intf.dev_name = "i2c1"; + cfg.intf.arg = (void *)MPU6XXX_ADDR_DEFAULT; + cfg.irq_pin.pin = mpu_int; + + return rt_hw_mpu6xxx_init("mpu", &cfg); +} +INIT_APP_EXPORT(rt_hw_mpu6xxx_port); +#endif /* BOARD_USING_MPU6500 */ + +#if defined(BOARD_USING_STORAGE_RAWNAND) && defined(BSP_USING_NFI) +struct rt_mtd_nand_device mtd_partitions_nfi[MTD_NFI_PARTITION_NUM] = +{ + [0] = + { + /*nand0: rtthread*/ + .block_start = 0, + .block_end = 63, + .block_total = 64, + }, + [1] = + { + /*nand1: for filesystem mounting*/ + .block_start = 64, + .block_end = 8191, + .block_total = 8128, + }, + [2] = + { + /*nand2: Whole blocks size, overlay*/ + .block_start = 0, + .block_end = 8191, + .block_total = 8192, + } +}; #endif #if defined(BOARD_USING_NAU8822) && defined(NU_PKG_USING_NAU8822) diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/board/nutool_pincfg/nutool_pincfg.c b/bsp/nuvoton/numaker-hmi-ma35d1/board/nutool_pincfg/nutool_pincfg.c index e31c79cd08..f3a413b336 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/board/nutool_pincfg/nutool_pincfg.c +++ b/bsp/nuvoton/numaker-hmi-ma35d1/board/nutool_pincfg/nutool_pincfg.c @@ -11,181 +11,6 @@ /******************** MCU:MA35D16A887C(BGA312) -Pin Configuration: -PinA2:I2C2_SCL -PinA3:EADC0_CH7 -PinA4:EADC0_CH3 -PinA5:RGMII1_TXCLK -PinA6:RGMII1_RXCLK -PinA7:RGMII1_RXCTL -PinA8:RGMII1_MDIO -PinA9:RGMII0_TXCLK -PinA10:RGMII0_RXD1 -PinA11:RGMII0_RXCLK -PinA12:RGMII0_TXCTL -PinA13:I2S0_DI -PinA14:VCAP1_SFIELD -PinA15:VCAP1_HSYNC -PinA16:VCAP1_PIXCLK -PinA17:VCAP1_DATA5 -PinB1:ADC0_CH4 -PinB2:I2C1_SCL -PinB3:EADC0_CH5 -PinB4:EADC0_CH4 -PinB5:EADC0_CH1 -PinB6:RGMII1_TXD3 -PinB7:RGMII1_RXD0 -PinB8:RGMII1_TXCTL -PinB9:RGMII0_TXD2 -PinB10:RGMII0_RXD2 -PinB11:RGMII0_RXCTL -PinB12:RGMII0_MDIO -PinB13:I2S0_BCLK -PinB14:VCAP1_VSYNC -PinB15:VCAP1_SCLK -PinB16:VCAP1_DATA7 -PinB17:VCAP1_DATA0 -PinB18:VCAP1_DATA2 -PinC1:ADC0_CH7 -PinC2:ADC0_CH5 -PinC3:I2C2_SDA -PinC4:EADC0_CH2 -PinC5:EADC0_CH0 -PinC6:RGMII1_TXD2 -PinC7:RGMII1_RXD2 -PinC8:RGMII1_TXD0 -PinC9:RGMII0_TXD3 -PinC10:RGMII0_RXD0 -PinC11:RGMII0_TXD1 -PinC12:RGMII0_MDC -PinC13:I2S0_LRCK -PinC14:VCAP1_DATA8 -PinC15:VCAP1_DATA6 -PinC16:VCAP1_DATA4 -PinC17:VCAP1_DATA1 -PinC18:VCAP1_DATA3 -PinD1:ADC0_CH6 -PinD2:I2C1_SDA -PinD3:EADC0_CH6 -PinD6:RGMII1_RXD3 -PinD7:RGMII1_RXD1 -PinD8:RGMII1_TXD1 -PinD9:RGMII1_MDC -PinD10:RGMII0_RXD3 -PinD11:RGMII0_TXD0 -PinD12:I2S0_DO -PinD13:I2S0_MCLK -PinD14:VCAP1_DATA9 -PinD16:UART10_nCTS -PinD17:UART10_TXD -PinD18:SD0_CLK -PinE1:HSUSBH_PWREN -PinE2:CAN1_RXD -PinE3:HSUSBH_OVC -PinE4:HSUSB0_VBUSVLD -PinE15:UART10_nRTS -PinE16:UART10_RXD -PinE17:SD0_WP -PinE18:SD0_DAT0 -PinF3:CAN1_TXD -PinF4:NAND_DATA3 -PinF16:UART14_RXD -PinF17:SD0_nCD -PinF18:SD0_CMD -PinG3:NAND_DATA0 -PinG4:NAND_DATA5 -PinG16:UART16_nRTS -PinG17:SD0_DAT3 -PinG18:SD0_DAT1 -PinH3:NAND_DATA1 -PinH4:NAND_DATA7 -PinH15:UART12_nRTS -PinH16:UART16_nCTS -PinH18:SD0_DAT2 -PinJ3:NAND_DATA6 -PinJ4:NAND_RDY -PinJ15:UART12_RXD -PinJ16:UART16_TXD -PinJ18:I2C4_SCL -PinK1:NAND_DATA2 -PinK2:NAND_DATA4 -PinK3:NAND_nRE -PinK4:NAND_ALE -PinK5:NAND_nWE -PinK16:UART16_RXD -PinK18:I2C4_SDA -PinL1:NAND_nCS -PinL2:NAND_CLE -PinL15:UART12_TXD -PinL16:I2C5_SDA -PinM5:NAND_nWP -PinM15:UART14_nRTS -PinM16:I2C5_SCL -PinM17:CAN3_RXD -PinN1:EPWM1_CH5 -PinN2:I2C3_SDA -PinN17:CAN3_TXD -PinP1:I2C3_SCL -PinP7:VCAP0_SFIELD -PinP8:SD1_nCD -PinP9:SD1_WP -PinP15:UART14_TXD -PinR5:VCAP0_DATA9 -PinR6:VCAP0_DATA7 -PinR9:SD1_DAT1 -PinR10:LCM_DEN -PinR11:LCM_DATA1 -PinR12:LCM_DATA6 -PinR13:LCM_DATA11 -PinR14:LCM_DATA15 -PinR16:LCM_DATA18 -PinR17:LCM_DATA20 -PinR18:LCM_DATA22 -PinT1:UART0_TXD -PinT2:UART0_RXD -PinT4:VCAP0_HSYNC -PinT5:VCAP0_DATA1 -PinT6:VCAP0_DATA5 -PinT7:VCAP0_DATA6 -PinT9:SD1_CMD -PinT10:LCM_VSYNC -PinT11:LCM_DATA0 -PinT12:LCM_DATA5 -PinT13:LCM_DATA10 -PinT14:LCM_DATA14 -PinT15:QSPI0_MISO1 -PinT16:LCM_DATA16 -PinT17:LCM_DATA17 -PinT18:LCM_DATA23 -PinU4:VCAP0_VSYNC -PinU5:VCAP0_DATA2 -PinU6:VCAP0_DATA3 -PinU7:VCAP0_DATA8 -PinU8:SD1_DAT3 -PinU9:SD1_DAT0 -PinU10:LCM_HSYNC -PinU11:LCM_DATA7 -PinU12:LCM_DATA4 -PinU13:LCM_DATA9 -PinU14:LCM_DATA13 -PinU15:QSPI0_MISO0 -PinU16:QSPI0_SS0 -PinU17:LCM_DATA19 -PinU18:LCM_DATA21 -PinV3:VCAP0_SCLK -PinV4:VCAP0_PIXCLK -PinV5:VCAP0_DATA0 -PinV6:VCAP0_DATA4 -PinV8:SD1_CLK -PinV9:SD1_DAT2 -PinV10:LCM_CLK -PinV11:LCM_DATA2 -PinV12:LCM_DATA3 -PinV13:LCM_DATA8 -PinV14:LCM_DATA12 -PinV15:QSPI0_MOSI1 -PinV16:QSPI0_MOSI0 -PinV17:QSPI0_CLK ********************/ #include "ma35d1.h" @@ -430,7 +255,7 @@ void nutool_pincfg_deinit_lcm(void) void nutool_pincfg_init_nand(void) { SYS->GPA_MFPH &= ~(SYS_GPA_MFPH_PA14MFP_Msk | SYS_GPA_MFPH_PA13MFP_Msk | SYS_GPA_MFPH_PA12MFP_Msk | SYS_GPA_MFPH_PA11MFP_Msk | SYS_GPA_MFPH_PA10MFP_Msk | SYS_GPA_MFPH_PA9MFP_Msk | SYS_GPA_MFPH_PA8MFP_Msk); - SYS->GPA_MFPH |= (SYS_GPA_MFPH_PA14MFP_NAND_nWP | SYS_GPA_MFPH_PA13MFP_NAND_nCS | SYS_GPA_MFPH_PA12MFP_NAND_ALE | SYS_GPA_MFPH_PA11MFP_NAND_CLE | SYS_GPA_MFPH_PA10MFP_NAND_nWE | SYS_GPA_MFPH_PA9MFP_NAND_nRE | SYS_GPA_MFPH_PA8MFP_NAND_RDY); + SYS->GPA_MFPH |= (SYS_GPA_MFPH_PA14MFP_NAND_nWP | SYS_GPA_MFPH_PA13MFP_NAND_nCS0 | SYS_GPA_MFPH_PA12MFP_NAND_ALE | SYS_GPA_MFPH_PA11MFP_NAND_CLE | SYS_GPA_MFPH_PA10MFP_NAND_nWE | SYS_GPA_MFPH_PA9MFP_NAND_nRE | SYS_GPA_MFPH_PA8MFP_NAND_RDY0); SYS->GPA_MFPL &= ~(SYS_GPA_MFPL_PA7MFP_Msk | SYS_GPA_MFPL_PA6MFP_Msk | SYS_GPA_MFPL_PA5MFP_Msk | SYS_GPA_MFPL_PA4MFP_Msk | SYS_GPA_MFPL_PA3MFP_Msk | SYS_GPA_MFPL_PA2MFP_Msk | SYS_GPA_MFPL_PA1MFP_Msk | SYS_GPA_MFPL_PA0MFP_Msk); SYS->GPA_MFPL |= (SYS_GPA_MFPL_PA7MFP_NAND_DATA7 | SYS_GPA_MFPL_PA6MFP_NAND_DATA6 | SYS_GPA_MFPL_PA5MFP_NAND_DATA5 | SYS_GPA_MFPL_PA4MFP_NAND_DATA4 | SYS_GPA_MFPL_PA3MFP_NAND_DATA3 | SYS_GPA_MFPL_PA2MFP_NAND_DATA2 | SYS_GPA_MFPL_PA1MFP_NAND_DATA1 | SYS_GPA_MFPL_PA0MFP_NAND_DATA0); @@ -637,19 +462,19 @@ void nutool_pincfg_deinit_uart16(void) return; } -void nutool_pincfg_init_vcap0(void) +void nutool_pincfg_init_ccap0(void) { SYS->GPK_MFPH &= ~(SYS_GPK_MFPH_PK11MFP_Msk | SYS_GPK_MFPH_PK10MFP_Msk | SYS_GPK_MFPH_PK9MFP_Msk); - SYS->GPK_MFPH |= (SYS_GPK_MFPH_PK11MFP_VCAP0_HSYNC | SYS_GPK_MFPH_PK10MFP_VCAP0_PIXCLK | SYS_GPK_MFPH_PK9MFP_VCAP0_SCLK); + SYS->GPK_MFPH |= (SYS_GPK_MFPH_PK11MFP_CCAP0_HSYNC | SYS_GPK_MFPH_PK10MFP_CCAP0_PIXCLK | SYS_GPK_MFPH_PK9MFP_CCAP0_SCLK); SYS->GPM_MFPH &= ~(SYS_GPM_MFPH_PM11MFP_Msk | SYS_GPM_MFPH_PM10MFP_Msk | SYS_GPM_MFPH_PM9MFP_Msk | SYS_GPM_MFPH_PM8MFP_Msk); - SYS->GPM_MFPH |= (SYS_GPM_MFPH_PM11MFP_VCAP0_DATA9 | SYS_GPM_MFPH_PM10MFP_VCAP0_DATA8 | SYS_GPM_MFPH_PM9MFP_VCAP0_DATA7 | SYS_GPM_MFPH_PM8MFP_VCAP0_DATA6); + SYS->GPM_MFPH |= (SYS_GPM_MFPH_PM11MFP_CCAP0_DATA9 | SYS_GPM_MFPH_PM10MFP_CCAP0_DATA8 | SYS_GPM_MFPH_PM9MFP_CCAP0_DATA7 | SYS_GPM_MFPH_PM8MFP_CCAP0_DATA6); SYS->GPM_MFPL &= ~(SYS_GPM_MFPL_PM7MFP_Msk | SYS_GPM_MFPL_PM6MFP_Msk | SYS_GPM_MFPL_PM5MFP_Msk | SYS_GPM_MFPL_PM4MFP_Msk | SYS_GPM_MFPL_PM3MFP_Msk | SYS_GPM_MFPL_PM2MFP_Msk | SYS_GPM_MFPL_PM1MFP_Msk | SYS_GPM_MFPL_PM0MFP_Msk); - SYS->GPM_MFPL |= (SYS_GPM_MFPL_PM7MFP_VCAP0_DATA5 | SYS_GPM_MFPL_PM6MFP_VCAP0_DATA4 | SYS_GPM_MFPL_PM5MFP_VCAP0_DATA3 | SYS_GPM_MFPL_PM4MFP_VCAP0_DATA2 | SYS_GPM_MFPL_PM3MFP_VCAP0_DATA1 | SYS_GPM_MFPL_PM2MFP_VCAP0_DATA0 | SYS_GPM_MFPL_PM1MFP_VCAP0_SFIELD | SYS_GPM_MFPL_PM0MFP_VCAP0_VSYNC); + SYS->GPM_MFPL |= (SYS_GPM_MFPL_PM7MFP_CCAP0_DATA5 | SYS_GPM_MFPL_PM6MFP_CCAP0_DATA4 | SYS_GPM_MFPL_PM5MFP_CCAP0_DATA3 | SYS_GPM_MFPL_PM4MFP_CCAP0_DATA2 | SYS_GPM_MFPL_PM3MFP_CCAP0_DATA1 | SYS_GPM_MFPL_PM2MFP_CCAP0_DATA0 | SYS_GPM_MFPL_PM1MFP_CCAP0_SFIELD | SYS_GPM_MFPL_PM0MFP_CCAP0_VSYNC); return; } -void nutool_pincfg_deinit_vcap0(void) +void nutool_pincfg_deinit_ccap0(void) { SYS->GPK_MFPH &= ~(SYS_GPK_MFPH_PK11MFP_Msk | SYS_GPK_MFPH_PK10MFP_Msk | SYS_GPK_MFPH_PK9MFP_Msk); SYS->GPM_MFPH &= ~(SYS_GPM_MFPH_PM11MFP_Msk | SYS_GPM_MFPH_PM10MFP_Msk | SYS_GPM_MFPH_PM9MFP_Msk | SYS_GPM_MFPH_PM8MFP_Msk); @@ -658,17 +483,17 @@ void nutool_pincfg_deinit_vcap0(void) return; } -void nutool_pincfg_init_vcap1(void) +void nutool_pincfg_init_ccap1(void) { SYS->GPN_MFPH &= ~(SYS_GPN_MFPH_PN14MFP_Msk | SYS_GPN_MFPH_PN13MFP_Msk | SYS_GPN_MFPH_PN12MFP_Msk | SYS_GPN_MFPH_PN11MFP_Msk | SYS_GPN_MFPH_PN10MFP_Msk | SYS_GPN_MFPH_PN9MFP_Msk | SYS_GPN_MFPH_PN8MFP_Msk); - SYS->GPN_MFPH |= (SYS_GPN_MFPH_PN14MFP_VCAP1_SFIELD | SYS_GPN_MFPH_PN13MFP_VCAP1_VSYNC | SYS_GPN_MFPH_PN12MFP_VCAP1_HSYNC | SYS_GPN_MFPH_PN11MFP_VCAP1_PIXCLK | SYS_GPN_MFPH_PN10MFP_VCAP1_SCLK | SYS_GPN_MFPH_PN9MFP_VCAP1_DATA9 | SYS_GPN_MFPH_PN8MFP_VCAP1_DATA8); + SYS->GPN_MFPH |= (SYS_GPN_MFPH_PN14MFP_CCAP1_SFIELD | SYS_GPN_MFPH_PN13MFP_CCAP1_VSYNC | SYS_GPN_MFPH_PN12MFP_CCAP1_HSYNC | SYS_GPN_MFPH_PN11MFP_CCAP1_PIXCLK | SYS_GPN_MFPH_PN10MFP_CCAP1_SCLK | SYS_GPN_MFPH_PN9MFP_CCAP1_DATA9 | SYS_GPN_MFPH_PN8MFP_CCAP1_DATA8); SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN7MFP_Msk | SYS_GPN_MFPL_PN6MFP_Msk | SYS_GPN_MFPL_PN5MFP_Msk | SYS_GPN_MFPL_PN4MFP_Msk | SYS_GPN_MFPL_PN3MFP_Msk | SYS_GPN_MFPL_PN2MFP_Msk | SYS_GPN_MFPL_PN1MFP_Msk | SYS_GPN_MFPL_PN0MFP_Msk); - SYS->GPN_MFPL |= (SYS_GPN_MFPL_PN7MFP_VCAP1_DATA7 | SYS_GPN_MFPL_PN6MFP_VCAP1_DATA6 | SYS_GPN_MFPL_PN5MFP_VCAP1_DATA5 | SYS_GPN_MFPL_PN4MFP_VCAP1_DATA4 | SYS_GPN_MFPL_PN3MFP_VCAP1_DATA3 | SYS_GPN_MFPL_PN2MFP_VCAP1_DATA2 | SYS_GPN_MFPL_PN1MFP_VCAP1_DATA1 | SYS_GPN_MFPL_PN0MFP_VCAP1_DATA0); + SYS->GPN_MFPL |= (SYS_GPN_MFPL_PN7MFP_CCAP1_DATA7 | SYS_GPN_MFPL_PN6MFP_CCAP1_DATA6 | SYS_GPN_MFPL_PN5MFP_CCAP1_DATA5 | SYS_GPN_MFPL_PN4MFP_CCAP1_DATA4 | SYS_GPN_MFPL_PN3MFP_CCAP1_DATA3 | SYS_GPN_MFPL_PN2MFP_CCAP1_DATA2 | SYS_GPN_MFPL_PN1MFP_CCAP1_DATA1 | SYS_GPN_MFPL_PN0MFP_CCAP1_DATA0); return; } -void nutool_pincfg_deinit_vcap1(void) +void nutool_pincfg_deinit_ccap1(void) { SYS->GPN_MFPH &= ~(SYS_GPN_MFPH_PN14MFP_Msk | SYS_GPN_MFPH_PN13MFP_Msk | SYS_GPN_MFPH_PN12MFP_Msk | SYS_GPN_MFPH_PN11MFP_Msk | SYS_GPN_MFPH_PN10MFP_Msk | SYS_GPN_MFPH_PN9MFP_Msk | SYS_GPN_MFPH_PN8MFP_Msk); SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN7MFP_Msk | SYS_GPN_MFPL_PN6MFP_Msk | SYS_GPN_MFPL_PN5MFP_Msk | SYS_GPN_MFPL_PN4MFP_Msk | SYS_GPN_MFPL_PN3MFP_Msk | SYS_GPN_MFPL_PN2MFP_Msk | SYS_GPN_MFPL_PN1MFP_Msk | SYS_GPN_MFPL_PN0MFP_Msk); @@ -732,8 +557,8 @@ void nutool_pincfg_init(void) nutool_pincfg_init_uart12(); nutool_pincfg_init_uart14(); nutool_pincfg_init_uart16(); - nutool_pincfg_init_vcap0(); - nutool_pincfg_init_vcap1(); + nutool_pincfg_init_ccap0(); + nutool_pincfg_init_ccap1(); return; } @@ -765,8 +590,8 @@ void nutool_pincfg_deinit(void) nutool_pincfg_deinit_uart12(); nutool_pincfg_deinit_uart14(); nutool_pincfg_deinit_uart16(); - nutool_pincfg_deinit_vcap0(); - nutool_pincfg_deinit_vcap1(); + nutool_pincfg_deinit_ccap0(); + nutool_pincfg_deinit_ccap1(); return; } diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch32.ld b/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch32.ld index aeda604e2c..8dad35f515 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch32.ld +++ b/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch32.ld @@ -3,6 +3,12 @@ OUTPUT_ARCH(arm) SECTIONS { + ".usbhostlib" 0x28000000 (NOLOAD): + { + . = ALIGN(4) ; + *(.usbhostlib.*) + } + . = 0x80400000; __text_start = .; diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/README.md b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/README.md index 4ff12603c1..25a4cade1b 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/README.md +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/README.md @@ -1,19 +1,25 @@ -# nuwriter_scripts +# **nuwriter_scripts** Some scripts can help you program firmware into storages in this folder. -## Requirement +## **Requirement** -### [Python for Window](https://www.python.org/downloads/windows/) +### [Python3 for Window](https://www.python.org/downloads/windows/) + +After installing Python3, some plug-in as below must be installed. -After installing Python, some plug-in as below must be installed. ```bash -$ pip3 install pyusb usb crypto ecdsa crcmod tqdm pycryptodome +pip3 install pyusb usb crypto ecdsa crcmod tqdm pycryptodome ``` +Notice: + +- Tested python3 version is 3.10.1. +- Please remember to add Python to PATH environment variable. + ### [Libusb for Window](http://sourceforge.net/projects/libusb/files/libusb-1.0/libusb-1.0.20/libusb-1.0.20.7z/download) -In Windows platform, it is required to install libusb manually. +On Windows platform, it is required to install libusb manually. ```bash Step 1: Download the library extract the download file. @@ -21,24 +27,88 @@ Step 2: Copy MS64\dll\libusb-1.0.dll to C:\Windows\System32. Step 3: Copy MS64\dll\libusb-1.0.lib to C:\Users\\AppData\Local\Programs\Python\\Lib. ``` -## Double-click Scripts for Windows +### [USB Driver for Window](https://github.com/OpenNuvoton/MA35D1_NuWriter/blob/master/driver/WinUSB4NuVCOM.exe?raw=true) -### nuwriter_ddr_download_and_run.bat +NuWriter must install **WinUSB4NuVCOM.exe** on the computer. + +## **Double-click Scripts for Windows** + +If your NuWriter_MA35 python running is ready, you can do following batch script files for Window directly. + +### **nuwriter_ddr_download_and_run.bat** Download rtthread.bin binary file into DDR. The address is 0x80400000. -### nuwriter_sd_programming.bat +### **nuwriter_sd_programming.bat** Program header, DDR timing setting and rtthread.bin binary file into SD card or EMMC. -### nuwriter_spinand_programming.bat +### **nuwriter_spinand_programming.bat** Program header, DDR timing setting and rtthread.bin binary file into SPI NAND flash. -### nuwriter_nand_programming.bat +### **nuwriter_nand_programming.bat** Program header, DDR timing setting and rtthread.bin binary file into NAND flash. -### See also +## **Bash Scripts for Linux** + +If your NuWriter_MA35 python running is ready, you can do following bash script files for Linux directly. +If not, the **install_linux.sh** will help user to install related python module installation. + +```bash +# ./install_linux.sh +``` + +### **nuwriter_ddr_download_and_run.sh** + +Download rtthread.bin binary file into DDR. The address is 0x80400000. + +### **nuwriter_sd_programming.sh** + +Program header, DDR timing setting and rtthread.bin binary file into SD card or EMMC. + +### **nuwriter_spinand_programming.sh** + +Program header, DDR timing setting and rtthread.bin binary file into SPI NAND flash. + +### **nuwriter_nand_programming.sh** + +Program header, DDR timing setting and rtthread.bin binary file into NAND flash. + + +## **Troubleshoot** + +### **Fail to create symbolic folder** + +```bash +Create symbolic folder conv failed +``` + +- To switch **Developer Mode** in Window. To enter [Settings], [Update & Security], [For developers], [Developer Mode] page, then set it **On** +- Use **Administrator** permission to install python3, libusb and utilities. + +### **Use NuWriter_MA35.exe** + +Due to the python execution file size and saving network bandwidth, we just only release the python code in this repository. We also provide [NuWriter_MA35.exe](https://github.com/OpenNuvoton/MA35D1_NuWriter/blob/master/EXE/NuWriter_MA35.exe?raw=true) python execution. You can run the packaged app without installing a Python interpreter or any modules. You can use **NuWriter_MA35.exe** and do some modification. + +```bash +To modify "py -3 nuwriter.py" to "NuWriter_MA35.exe" +``` + +For example, the **nuwriter_ddr_download_and_run.bat** modification is as following: + +```bash +:forever_develop +NuWriter_MA35.exe -a ddrimg\enc_ddr3_winbond_256mb.bin +IF %ERRORLEVEL% EQU 0 ( + NuWriter_MA35.exe -o execute -w ddr 0x80400000 ..\rtthread.bin +) +pause +goto :forever_develop +``` + +## **See also** + [NuWriter Repository](https://github.com/OpenNuvoton/MA35D1_NuWriter) diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/install_linux.sh b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/install_linux.sh new file mode 100644 index 0000000000..82a10a7f53 --- /dev/null +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/install_linux.sh @@ -0,0 +1,7 @@ +#!/bin/bash + +set -x -e + +sudo apt-get install python3 python3-pip + +pip3 install -r requirements.txt diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_ddr_download_and_run.sh b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_ddr_download_and_run.sh new file mode 100644 index 0000000000..c670d12410 --- /dev/null +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_ddr_download_and_run.sh @@ -0,0 +1,8 @@ +#!/bin/bash + +set -x -e + +python3 nuwriter.py -a ddrimg/enc_ddr3_winbond_256mb.bin; + +python3 nuwriter.py -o execute -w ddr 0x80400000 ../rtthread.bin + diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_nand_programming.sh b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_nand_programming.sh new file mode 100644 index 0000000000..3058b76749 --- /dev/null +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_nand_programming.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +set -x -e + +python3 nuwriter.py -c header-nand.json + +python3 nuwriter.py -p pack-nand.json + +python3 nuwriter.py -a ddrimg/enc_ddr3_winbond_256mb.bin + +python3 nuwriter.py -w nand pack/pack.bin diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_sd_programming.sh b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_sd_programming.sh new file mode 100644 index 0000000000..5548dd07b3 --- /dev/null +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_sd_programming.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +set -x -e + +python3 nuwriter.py -c header-sd.json + +python3 nuwriter.py -p pack-sd.json + +python3 nuwriter.py -a ddrimg/enc_ddr3_winbond_256mb.bin + +python3 nuwriter.py -w sd pack/pack.bin diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.sh b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.sh new file mode 100644 index 0000000000..f2de73ea3e --- /dev/null +++ b/bsp/nuvoton/numaker-hmi-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +set -x -e + +python3 nuwriter.py -c header-nand.json + +python3 nuwriter.py -p pack-nand.json + +python3 nuwriter.py -a ddrimg/enc_ddr3_winbond_256mb.bin + +python3 nuwriter.py -w spinand pack/pack.bin diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/rtconfig.py b/bsp/nuvoton/numaker-hmi-ma35d1/rtconfig.py index 5d1b514111..ace1d14eee 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/rtconfig.py +++ b/bsp/nuvoton/numaker-hmi-ma35d1/rtconfig.py @@ -16,7 +16,8 @@ if os.getenv('RTT_ROOT'): if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' EXEC_PATH = r'C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q1-update\bin' -elif os.getenv('RTT_EXEC_PATH'): + +if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') #BUILD = 'debug' @@ -40,10 +41,9 @@ if PLATFORM == 'gcc': OBJCPY = PREFIX + 'objcopy' STRIP = PREFIX + 'strip' - DEVICE = ' -march=armv8-a -mfpu=neon-vfpv4 -ftree-vectorize -ffast-math -mfloat-abi=softfp' -# DEVICE = ' -march=armv7-a -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=softfp' + DEVICE = ' -march=armv8-a -mfpu=neon-vfpv4 -ftree-vectorize -ffast-math -msoft-float' CFLAGS = DEVICE + ' -Wall -fno-zero-initialized-in-bss ' - AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__ -I. ' LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-cref,-Map=' + MAP_FILE + ',-cref,-u,system_vectors' + ' -T ' + LINK_FILE + '.ld' CXXFLAGS = ' -march=armv8-a -mfpu=neon-vfpv4 -std=c++11 ' @@ -58,10 +58,10 @@ if PLATFORM == 'gcc': LPATH = '' if BUILD == 'debug': - CFLAGS += ' -O0 -gdwarf-2 -g' + CFLAGS += ' -O0 -gdwarf-2 -g ' AFLAGS += ' -gdwarf-2' else: - CFLAGS += ' -O2' + CFLAGS += ' -O2 ' CXXFLAGS = CFLAGS diff --git a/bsp/nuvoton/numaker-iot-m467/.config b/bsp/nuvoton/numaker-iot-m467/.config index 46b064294d..97a2bf67d6 100644 --- a/bsp/nuvoton/numaker-iot-m467/.config +++ b/bsp/nuvoton/numaker-iot-m467/.config @@ -8,6 +8,7 @@ # CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -74,16 +75,19 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y +# CONFIG_RT_USING_CACHE is not set +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components @@ -140,7 +144,9 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set # CONFIG_RT_USING_DFS_NFS is not set CONFIG_RT_USING_FAL=y CONFIG_FAL_DEBUG_CONFIG=y @@ -148,12 +154,12 @@ CONFIG_FAL_DEBUG=1 CONFIG_FAL_PART_HAS_TABLE_CFG=y CONFIG_FAL_USING_SFUD_PORT=y CONFIG_FAL_USING_NOR_FLASH_DEV_NAME="norflash0" -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -175,10 +181,14 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_ALARM is not set # CONFIG_RT_USING_SOFT_RTC is not set @@ -209,6 +219,7 @@ CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 CONFIG_RT_USING_SENSOR=y CONFIG_RT_USING_SENSOR_CMD=y # CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set CONFIG_RT_USING_HWCRYPTO=y CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto" CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16 @@ -245,7 +256,9 @@ CONFIG_RT_HWCRYPTO_USING_CRC_04C11DB7=y # CONFIG_RT_USING_PULSE_ENCODER is not set CONFIG_RT_USING_INPUT_CAPTURE=y CONFIG_RT_INPUT_CAPTURE_RB_SIZE=100 +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -512,6 +525,7 @@ CONFIG_ESP8266_SAMPLE_RECV_BUFF_LEN=2048 # CONFIG_AT_DEVICE_USING_M5311 is not set # CONFIG_AT_DEVICE_USING_L610 is not set # CONFIG_AT_DEVICE_USING_N720 is not set +# CONFIG_AT_DEVICE_USING_ML305 is not set # CONFIG_PKG_USING_AT_DEVICE_V204 is not set # CONFIG_PKG_USING_AT_DEVICE_V203 is not set # CONFIG_PKG_USING_AT_DEVICE_V202 is not set @@ -564,6 +578,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -571,6 +586,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -662,7 +678,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -696,8 +711,8 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -708,7 +723,15 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set +CONFIG_PKG_USING_RT_VSNPRINTF_FULL=y +CONFIG_PKG_RT_VSNPRINTF_FULL_PATH="/packages/system/enhanced-kservice/rt_vsnprintf_full" +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_SPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_SNPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_PRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_VSPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_VSNPRINTF is not set +CONFIG_PKG_USING_RT_VSNPRINTF_FULL_LATEST_VERSION=y +CONFIG_PKG_RT_VSNPRINTF_FULL_VER="latest" # # acceleration: Assembly language or algorithmic acceleration packages @@ -733,7 +756,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -768,12 +790,15 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -CONFIG_PKG_USING_SENSORS_DRIVERS=y -# CONFIG_PKG_USING_FINGERPRINT is not set + +# +# sensors drivers +# # CONFIG_PKG_USING_LSM6DSM is not set # CONFIG_PKG_USING_LSM6DSL is not set # CONFIG_PKG_USING_LPS22HB is not set @@ -789,16 +814,11 @@ CONFIG_PKG_USING_SENSORS_DRIVERS=y # CONFIG_PKG_USING_DF220 is not set # CONFIG_PKG_USING_HSHCAL001 is not set # CONFIG_PKG_USING_BH1750 is not set -CONFIG_PKG_USING_MPU6XXX=y -CONFIG_PKG_MPU6XXX_PATH="/packages/peripherals/sensors/mpu6xxx" +# CONFIG_PKG_USING_MPU6XXX is not set # CONFIG_PKG_USING_MPU6XXX_V001 is not set # CONFIG_PKG_USING_MPU6XXX_V100 is not set # CONFIG_PKG_USING_MPU6XXX_V110 is not set -CONFIG_PKG_USING_MPU6XXX_LATEST_VERSION=y -CONFIG_PKG_MPU6XXX_VER="latest" -CONFIG_PKG_USING_MPU6XXX_ACCE=y -CONFIG_PKG_USING_MPU6XXX_GYRO=y -CONFIG_PKG_USING_MPU6XXX_MAG=y +# CONFIG_PKG_USING_MPU6XXX_LATEST_VERSION is not set # CONFIG_PKG_USING_AHT10 is not set # CONFIG_PKG_USING_AP3216C is not set # CONFIG_PKG_USING_TSL4531 is not set @@ -822,6 +842,8 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set # CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set # CONFIG_PKG_USING_VL53L0X is not set @@ -834,14 +856,31 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_ISL29035 is not set # CONFIG_PKG_USING_MMC3680KJ is not set # CONFIG_PKG_USING_QMP6989 is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -864,12 +903,9 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -884,7 +920,6 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -915,10 +950,11 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -933,6 +969,12 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -984,7 +1026,6 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -994,6 +1035,213 @@ CONFIG_PKG_USING_MPU6XXX_MAG=y # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -1141,7 +1389,7 @@ CONFIG_BOARD_USING_STORAGE_SDCARD=y CONFIG_BOARD_USING_STORAGE_SPIFLASH=y CONFIG_BOARD_USING_CANFD0=y CONFIG_BOARD_USING_NCT7717U=y -CONFIG_BOARD_USING_MPU6500=y +# CONFIG_BOARD_USING_MPU6500 is not set CONFIG_BOARD_USING_USB_D_H=y # CONFIG_BOARD_USING_HSUSBD is not set # CONFIG_BOARD_USING_HSUSBD_USBH is not set @@ -1152,13 +1400,13 @@ CONFIG_BOARD_USING_HSUSBH_USBD=y # # Board extended module drivers # +# CONFIG_BOARD_USING_LCD_ILI9341 is not set # # Nuvoton Packages Config # CONFIG_NU_PKG_USING_UTILS=y CONFIG_NU_PKG_USING_DEMO=y -# CONFIG_NU_PKG_USING_LVGL is not set # CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set CONFIG_NU_PKG_USING_NCT7717U=y @@ -1171,5 +1419,3 @@ CONFIG_NU_PKG_USING_NCT7717U=y # CONFIG_NU_PKG_USING_TPC is not set # CONFIG_NU_PKG_USING_ADC_TOUCH is not set # CONFIG_NU_PKG_USING_SPINAND is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-iot-m467/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-iot-m467/board/Kconfig b/bsp/nuvoton/numaker-iot-m467/board/Kconfig index f2fe37f2f5..bdbb46d7b9 100644 --- a/bsp/nuvoton/numaker-iot-m467/board/Kconfig +++ b/bsp/nuvoton/numaker-iot-m467/board/Kconfig @@ -55,6 +55,8 @@ menu "Hardware Drivers Config" config BOARD_USING_MPU6500 bool "MPU6500 6-axis MotionTracking Sensor(over i2c2)" select PKG_USING_MPU6XXX + select PKG_USING_MPU6XXX_LATEST_VERSION + select PKG_USING_MPU6XXX_ACCE select BSP_USING_I2C select BSP_USING_I2C2 default y diff --git a/bsp/nuvoton/numaker-iot-m467/board/NuPinConfig/nutool_pincfg.c b/bsp/nuvoton/numaker-iot-m467/board/NuPinConfig/nutool_pincfg.c index 45d2d9368d..d06d719449 100644 --- a/bsp/nuvoton/numaker-iot-m467/board/NuPinConfig/nutool_pincfg.c +++ b/bsp/nuvoton/numaker-iot-m467/board/NuPinConfig/nutool_pincfg.c @@ -151,7 +151,7 @@ Pin175:EADC0_CH7 Pin176:EADC0_CH6 ********************/ -#include "M460.h" +#include "NuMicro.h" #include "rtconfig.h" void nutool_pincfg_init_can0(void) diff --git a/bsp/nuvoton/numaker-iot-m467/board/board_dev.c b/bsp/nuvoton/numaker-iot-m467/board/board_dev.c index 0c78b0bb7e..4056784edd 100644 --- a/bsp/nuvoton/numaker-iot-m467/board/board_dev.c +++ b/bsp/nuvoton/numaker-iot-m467/board/board_dev.c @@ -185,7 +185,7 @@ int rt_hw_mpu6xxx_port(void) rt_base_t mpu_int = NU_GET_PININDEX(NU_PD, 2); cfg.intf.dev_name = "i2c2"; - cfg.intf.user_data = (void *)MPU6XXX_ADDR_DEFAULT; + cfg.intf.arg = (void *)MPU6XXX_ADDR_DEFAULT; cfg.irq_pin.pin = mpu_int; return rt_hw_mpu6xxx_init("mpu", &cfg); diff --git a/bsp/nuvoton/numaker-iot-m487/.config b/bsp/nuvoton/numaker-iot-m487/.config index e90907c703..8d896645e0 100644 --- a/bsp/nuvoton/numaker-iot-m487/.config +++ b/bsp/nuvoton/numaker-iot-m487/.config @@ -8,6 +8,7 @@ # CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=4 # CONFIG_RT_THREAD_PRIORITY_8 is not set @@ -74,16 +75,19 @@ CONFIG_RT_USING_HEAP=y # CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=256 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" CONFIG_RT_VER_NUM=0x50000 -CONFIG_ARCH_ARM=y +# CONFIG_RT_USING_CACHE is not set +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M4=y -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # # RT-Thread Components @@ -140,18 +144,20 @@ CONFIG_RT_DFS_ELM_REENTRANT=y CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set CONFIG_RT_USING_FAL=y CONFIG_FAL_DEBUG_CONFIG=y CONFIG_FAL_DEBUG=1 CONFIG_FAL_PART_HAS_TABLE_CFG=y # CONFIG_FAL_USING_SFUD_PORT is not set -# CONFIG_RT_USING_LWP is not set # # Device Drivers # CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 @@ -173,6 +179,9 @@ CONFIG_RT_USING_I2C_BITOPS=y CONFIG_RT_USING_PIN=y CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set @@ -182,6 +191,7 @@ CONFIG_PM_TICKLESS_THRESHOLD_TIME=2 # CONFIG_PM_ENABLE_DEBUG is not set # CONFIG_PM_ENABLE_SUSPEND_SLEEP_MODE is not set # CONFIG_PM_ENABLE_THRESHOLD_SLEEP_MODE is not set +# CONFIG_RT_USING_FDT is not set CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_ALARM is not set # CONFIG_RT_USING_SOFT_RTC is not set @@ -212,6 +222,7 @@ CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 CONFIG_RT_USING_SENSOR=y CONFIG_RT_USING_SENSOR_CMD=y # CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set CONFIG_RT_USING_HWCRYPTO=y CONFIG_RT_HWCRYPTO_DEFAULT_NAME="hwcryto" CONFIG_RT_HWCRYPTO_IV_MAX_SIZE=16 @@ -247,7 +258,9 @@ CONFIG_RT_HWCRYPTO_USING_CRC_04C11DB7=y # CONFIG_RT_HWCRYPTO_USING_BIGNUM is not set # CONFIG_RT_USING_PULSE_ENCODER is not set # CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set # # Using USB @@ -433,6 +446,7 @@ CONFIG_ESP8266_SAMPLE_RECV_BUFF_LEN=2048 # CONFIG_AT_DEVICE_USING_M5311 is not set # CONFIG_AT_DEVICE_USING_L610 is not set # CONFIG_AT_DEVICE_USING_N720 is not set +# CONFIG_AT_DEVICE_USING_ML305 is not set # CONFIG_PKG_USING_AT_DEVICE_V204 is not set # CONFIG_PKG_USING_AT_DEVICE_V203 is not set # CONFIG_PKG_USING_AT_DEVICE_V202 is not set @@ -485,6 +499,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set # CONFIG_PKG_USING_LORA_PKT_FWD is not set # CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set @@ -492,6 +507,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_SMALL_MODBUS is not set # CONFIG_PKG_USING_NET_SERVER is not set # CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set # # security packages @@ -583,7 +599,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set # CONFIG_PKG_USING_ADBD is not set # CONFIG_PKG_USING_COREMARK is not set @@ -617,8 +632,8 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_CBOX is not set # CONFIG_PKG_USING_SNOWFLAKE is not set # CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set # # system packages @@ -629,7 +644,15 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set +CONFIG_PKG_USING_RT_VSNPRINTF_FULL=y +CONFIG_PKG_RT_VSNPRINTF_FULL_PATH="/packages/system/enhanced-kservice/rt_vsnprintf_full" +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_SPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_SNPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_PRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_VSPRINTF is not set +# CONFIG_RT_VSNPRINTF_FULL_REPLACING_VSNPRINTF is not set +CONFIG_PKG_USING_RT_VSNPRINTF_FULL_LATEST_VERSION=y +CONFIG_PKG_RT_VSNPRINTF_FULL_VER="latest" # # acceleration: Assembly language or algorithmic acceleration packages @@ -654,7 +677,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_CAIRO is not set # CONFIG_PKG_USING_PIXMAN is not set @@ -689,19 +711,93 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set # # peripheral libraries and drivers # -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set # CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -724,12 +820,9 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_AGILE_LED is not set # CONFIG_PKG_USING_AT24CXX is not set # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set # CONFIG_PKG_USING_PCA9685 is not set # CONFIG_PKG_USING_I2C_TOOLS is not set # CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set # CONFIG_PKG_USING_RPLIDAR is not set # CONFIG_PKG_USING_AS608 is not set # CONFIG_PKG_USING_RC522 is not set @@ -744,7 +837,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_CAN_YMODEM is not set # CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set # CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_AGILE_CONSOLE is not set # CONFIG_PKG_USING_LD3320 is not set # CONFIG_PKG_USING_WK2124 is not set @@ -775,10 +867,11 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # CONFIG_PKG_USING_RFM300 is not set # CONFIG_PKG_USING_IO_INPUT_FILTER is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set # # AI packages @@ -793,6 +886,12 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + # # miscellaneous packages # @@ -844,7 +943,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_CRCLIB is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set @@ -854,6 +952,213 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999 # CONFIG_PKG_USING_MFBD is not set # CONFIG_PKG_USING_SLCAN2RTT is not set # CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# # # Hardware Drivers Config @@ -962,7 +1267,7 @@ CONFIG_NU_USBHOST_HUB_POLLING_INTERVAL=100 CONFIG_BSP_USING_NULINKME=y # CONFIG_BOARD_USING_IP101GR is not set CONFIG_BOARD_USING_ESP8266=y -CONFIG_BOARD_USING_BMX055=y +# CONFIG_BOARD_USING_BMX055 is not set CONFIG_BOARD_USING_NAU88L25=y CONFIG_BOARD_USING_STORAGE_SDCARD=y CONFIG_BOARD_USING_STORAGE_SPIFLASH=y @@ -984,8 +1289,7 @@ CONFIG_BOARD_USING_HSUSBH_USBD=y # CONFIG_NU_PKG_USING_UTILS=y CONFIG_NU_PKG_USING_DEMO=y -# CONFIG_NU_PKG_USING_LVGL is not set -CONFIG_NU_PKG_USING_BMX055=y +# CONFIG_NU_PKG_USING_BMX055 is not set # CONFIG_NU_PKG_USING_MAX31875 is not set # CONFIG_NU_PKG_USING_NCT7717U is not set CONFIG_NU_PKG_USING_NAU88L25=y @@ -997,5 +1301,3 @@ CONFIG_NU_PKG_USING_NAU88L25=y # CONFIG_NU_PKG_USING_TPC is not set # CONFIG_NU_PKG_USING_ADC_TOUCH is not set # CONFIG_NU_PKG_USING_SPINAND is not set -CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.utest." -CONFIG_BOARD_USE_UTEST=y diff --git a/bsp/nuvoton/numaker-iot-m487/Nu_Link_Driver.ini b/bsp/nuvoton/numaker-iot-m487/Nu_Link_Driver.ini deleted file mode 100644 index f702d5c1aa..0000000000 --- a/bsp/nuvoton/numaker-iot-m487/Nu_Link_Driver.ini +++ /dev/null @@ -1,1036 +0,0 @@ -[Version] -Nu_LinkVersion=V5.14 -[Process] -ProcessID=0x00004840 -ProcessCreationTime_L=0xb55cd40e -ProcessCreationTime_H=0x01d6e4e3 -NuLinkID=0x77885acd -NuLinkIDs_Count=0x00000001 -NuLinkID0=0x77885acd -[ChipSelect] -;ChipName= -ChipName=M481 -[NUC505] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC505_SPIFLASH.FLM -[NUC4xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC400_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x014fb180 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[NUC2xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC200_AP_128.FLM -[NUC1311] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC1311_AP_64.FLM -[NUC126] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=NUC126_AP_256.FLM -[NUC121] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC121_AP_32.FLM -[NUC1xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC100_AP_128.FLM -[NUC029] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NUC029_AP_16.FLM -[NM1820] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1820_AP_17_5.FLM -[NM1810] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1810_AP_29_5.FLM -[NM1500] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1500_AP_128.FLM -[NM1330] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1330_AP_64.FLM -[NM1320] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1320_AP_32.FLM -[NM1230] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1230_AP_64.FLM -[NM1200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1200_AP_8.FLM -[NM1120] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1120_AP_29_5.FLM -[TF5100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=TF5100_AP_64.FLM -[NDA102] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NDA102_AP_29_5.FLM -[Nano103] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano103_AP_64.FLM -[Nano100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano100_AP_64.FLM -[N576] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N576_AP_145.FLM -[N575] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N575_AP_145.FLM -[N572] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N572Fxxx.FLM -[N571] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N571E000.FLM -[N570] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N570_AP_64.FLM -[N569] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N569_AP_64.FLM -[N512] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N512_AP_64.FLM -[Mini57] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini57_AP_29_5.FLM -[Mini51] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini51_AP_16.FLM -[M481] -Connect=2 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x00004000 -ProgramAlgorithm=M481_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M480LD] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M480LD_AP_256.FLM -[M451] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M451_AP_256.FLM -[M251] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M251_AP_192.FLM -[M2351] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2351_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M261] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M261_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[MR63] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=MR63_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M0564] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M0564_AP_256.FLM -[M0519] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0519_AP_128.FLM -[M0518] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0518_AP_64.FLM -[M05x] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0516_AP_64.FLM -[M031] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M031_AP_128.FLM -Bank=0 -[NPCX] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NPCX_AP_512.FLM -[I94000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=I94000_AP_512.FLM -[ISD9300] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9300_AP_145.FLM -[I9200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=I9200_AP_128.FLM -[ISD9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9100_AP_145.FLM -[ISD9000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9000_AP_64.FLM -[AU9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=AU9100_AP_145.FLM -[General] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= -[Autodetect] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= -[I96000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=2 -Program=0 -Verify=0 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x8000 -ProgramAlgorithm= -[M030G] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -DisableTimeoutDetect=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M030G_AP_64.FLM -[M0A21] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0A21_AP_32.FLM -[M2354] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -CheckDPM=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2354_AP_1M.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M471] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M471_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M479] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M479_AP_256.FLM -[NM1240] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1240_AP_64.FLM -[M071] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M071_AP_128.FLM diff --git a/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-iot-m487/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-iot-m487/board/board_dev.c b/bsp/nuvoton/numaker-iot-m487/board/board_dev.c index 97288f2d74..1f9488d07b 100644 --- a/bsp/nuvoton/numaker-iot-m487/board/board_dev.c +++ b/bsp/nuvoton/numaker-iot-m487/board/board_dev.c @@ -158,7 +158,7 @@ int rt_hw_max31875_port(void) struct rt_sensor_config cfg; cfg.intf.dev_name = "i2c1"; - cfg.intf.user_data = (void *)MAX31875_I2C_SLAVE_ADR_R0; + cfg.intf.arg = (void *)MAX31875_I2C_SLAVE_ADR_R0; cfg.irq_pin.pin = PIN_IRQ_PIN_NONE; rt_hw_max31875_init("max31875", &cfg); @@ -174,7 +174,7 @@ int rt_hw_bmx055_port(void) { struct rt_sensor_config cfg; cfg.intf.dev_name = "i2c2"; - cfg.intf.user_data = (void *)0; + cfg.intf.arg = (void *)0; cfg.irq_pin.pin = PIN_IRQ_PIN_NONE; rt_hw_bmx055_init("bmx055", &cfg); diff --git a/bsp/nuvoton/numaker-iot-m487/project.uvproj b/bsp/nuvoton/numaker-iot-m487/project.uvproj deleted file mode 100644 index 425375cfb1..0000000000 --- a/bsp/nuvoton/numaker-iot-m487/project.uvproj +++ /dev/null @@ -1,2383 +0,0 @@ - - - 1.1 -
### uVision Project, (C) Keil Software
- - - rtthread-m480 - 0x4 - ARM-ADS - - - M487JIDAE - Nuvoton - IRAM(0x20000000-0x20027FFF) IROM(0-0x7FFFF) CLOCK(192000000) CPUTYPE("Cortex-M4") FPU2 - - undefined - - 0 - - - - - - - - - - - SFD\Nuvoton\M481_v1.SFR - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\build\keil4\ - rtthread - 1 - 0 - 1 - 1 - 1 - .\build\keil4\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - fromelf.exe --bin --output "$L@L.bin" "$L@L.axf" - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - SARMCM3.DLL - - DARMCM1.DLL - - SARMCM3.DLL - - TARMCM1.DLL - - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - - 0 - 10 - - - - - - - - - - - - - - NULink\Nu_Link.dll - - - - - 1 - 0 - 0 - 1 - 1 - 4101 - - 0 - NULink\Nu_Link.dll - "" () - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 1 - 0 - 0 - 8 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x28000 - - - 1 - 0x0 - 0x80000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x80000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x28000 - - - 0 - 0x0 - 0x0 - - - - - - 1 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - --c99 - RT_USING_LIBC, __RTTHREAD__, __STDC_LIMIT_MACROS, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND - - applications;.;..\..\..\components\net\at\include;..\..\..\components\net\at\at_socket;packages\at_device-latest\inc;packages\at_device-latest\class\esp8266;..\libraries\m480\CMSIS\Include;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\audio;..\..\..\components\drivers\include;..\..\..\components\drivers\hwcrypto;.;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\spi;..\..\..\components\drivers\include;..\..\..\components\drivers\spi\sfud\inc;..\..\..\components\drivers\include;board;board\NuClockConfig;board\NuPinConfig;..\libraries\m480\Device\Nuvoton\M480\Include;..\libraries\m480\rtt_port;..\..\..\components\fal\inc;..\..\..\components\dfs\include;..\..\..\components\dfs\filesystems\devfs;..\..\..\components\dfs\filesystems\elmfat;..\..\..\components\finsh;.;..\..\..\include;..\libraries\m480\StdDriver\inc;..\libraries\m480\USBHostLib\inc;..\libraries\nu_packages\BMX055;..\libraries\nu_packages\BMX055\libraries\BMA2x2_driver;..\libraries\nu_packages\BMX055\libraries\BMG160_driver;..\libraries\nu_packages\BMX055\libraries\BMM050_driver;..\libraries\nu_packages\Demo;..\libraries\nu_packages\AudioCodec;..\libraries\nu_packages\TPC;..\libraries\nu_packages\NuUtils\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\usb\usbdevice;..\..\..\components\drivers\usb\usbhost;..\..\..\components\drivers\usb\usbhost\class;..\..\..\components\drivers\usb\usbhost\core;..\..\..\components\drivers\usb\usbhost\include;..\..\..\components\drivers\include;..\..\..\components\net\netdev\include;..\..\..\components\net\sal\include;..\..\..\components\net\sal\include\socket;..\..\..\components\net\sal\impl;..\..\..\components\net\sal\include\dfs_net;..\..\..\components\net\sal\include\socket\sys_socket;..\..\..\components\drivers\sensors;..\..\..\components\drivers\include;..\..\..\components\utilities\utest - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0x00000000 - 0x20000000 - .\linking_scripts\m480_flash.sct - - - - - - - - - - - Applications - - - mnt.c - 1 - applications\mnt.c - - - - - main.c - 1 - applications\main.c - - - - - AT - - - at_utils.c - 1 - ..\..\..\components\net\at\src\at_utils.c - - - - - at_socket.c - 1 - ..\..\..\components\net\at\at_socket\at_socket.c - - - - - at_cli.c - 1 - ..\..\..\components\net\at\src\at_cli.c - - - - - at_client.c - 1 - ..\..\..\components\net\at\src\at_client.c - - - - - at_device - - - at_device_esp8266.c - 1 - packages\at_device-latest\class\esp8266\at_device_esp8266.c - - - - - at_socket_esp8266.c - 1 - packages\at_device-latest\class\esp8266\at_socket_esp8266.c - - - - - at_device.c - 1 - packages\at_device-latest\src\at_device.c - - - - - Compiler - - - syscall_mem.c - 1 - ..\..\..\components\libc\compilers\armlibc\syscall_mem.c - - - - - syscalls.c - 1 - ..\..\..\components\libc\compilers\armlibc\syscalls.c - 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..\libraries\m480\StdDriver\src\nu_usci_spi.c - - - - - nu_bpwm.c - 1 - ..\libraries\m480\StdDriver\src\nu_bpwm.c - - - - - nu_fmc.c - 1 - ..\libraries\m480\StdDriver\src\nu_fmc.c - - - - - nu_wwdt.c - 1 - ..\libraries\m480\StdDriver\src\nu_wwdt.c - - - - - nu_qspi.c - 1 - ..\libraries\m480\StdDriver\src\nu_qspi.c - - - - - nu_i2s.c - 1 - ..\libraries\m480\StdDriver\src\nu_i2s.c - - - - - nu_gpio.c - 1 - ..\libraries\m480\StdDriver\src\nu_gpio.c - - - - - nu_emac.c - 1 - ..\libraries\m480\StdDriver\src\nu_emac.c - - - - - nu_i2c.c - 1 - ..\libraries\m480\StdDriver\src\nu_i2c.c - - - - - nu_wdt.c - 1 - ..\libraries\m480\StdDriver\src\nu_wdt.c - - - - - nu_can.c - 1 - ..\libraries\m480\StdDriver\src\nu_can.c - - - - - nu_uart.c - 1 - ..\libraries\m480\StdDriver\src\nu_uart.c - - - - - nu_spi.c - 1 - ..\libraries\m480\StdDriver\src\nu_spi.c - - - - - nu_timer.c - 1 - ..\libraries\m480\StdDriver\src\nu_timer.c - - - - - nu_eadc.c - 1 - ..\libraries\m480\StdDriver\src\nu_eadc.c - - - - - nu_rtc.c - 1 - ..\libraries\m480\StdDriver\src\nu_rtc.c - - - - - nu_sc.c - 1 - ..\libraries\m480\StdDriver\src\nu_sc.c - - - - - nu_timer_pwm.c - 1 - ..\libraries\m480\StdDriver\src\nu_timer_pwm.c - - - - - nu_crc.c - 1 - ..\libraries\m480\StdDriver\src\nu_crc.c - - - - - m480_usbhostlib - - - mem_alloc.c - 1 - ..\libraries\m480\USBHostLib\src\mem_alloc.c - - - - - ehci.c - 1 - ..\libraries\m480\USBHostLib\src\ehci.c - - - - - ehci_iso.c - 1 - ..\libraries\m480\USBHostLib\src\ehci_iso.c - - - - - ohci.c - 1 - ..\libraries\m480\USBHostLib\src\ohci.c - - - - - usb_core.c - 1 - ..\libraries\m480\USBHostLib\src\usb_core.c - - - - - nu_pkgs_bmx055 - - - bmg160.c - 1 - ..\libraries\nu_packages\BMX055\libraries\BMG160_driver\bmg160.c - - - - - bma2x2.c - 1 - ..\libraries\nu_packages\BMX055\libraries\BMA2x2_driver\bma2x2.c - - - - - sensor_bmx055.c - 1 - ..\libraries\nu_packages\BMX055\sensor_bmx055.c - - - - - bmm050.c - 1 - ..\libraries\nu_packages\BMX055\libraries\BMM050_driver\bmm050.c - - - - - nu_pkgs_demo - - - usbd_cdc_vcom_echo.c - 1 - ..\libraries\nu_packages\Demo\usbd_cdc_vcom_echo.c - - - - - slcd_show_tick.c - 1 - ..\libraries\nu_packages\Demo\slcd_show_tick.c - - - - - usbd_hid_dance_mouse.c - 1 - ..\libraries\nu_packages\Demo\usbd_hid_dance_mouse.c - - - - - nu_pkgs_nau88l25 - - - audio_test.c - 1 - ..\libraries\nu_packages\AudioCodec\audio_test.c - - - - - acodec_nau88l25.c - 1 - ..\libraries\nu_packages\AudioCodec\acodec_nau88l25.c - - - - - POSIX - - - poll.c - 1 - ..\..\..\components\libc\posix\io\poll\poll.c - - - - - select.c - 1 - ..\..\..\components\libc\posix\io\poll\select.c - - - - - rt_usbd - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - hid.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\hid.c - - - - - rt_usbh - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - hub.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\hub.c - - - - - usbhost.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost.c - - - - - usbhost_core.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_at.c - 1 - ..\..\..\components\net\sal\impl\af_inet_at.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - Sensors - - - sensor_cmd.c - 1 - ..\..\..\components\drivers\sensors\sensor_cmd.c - - - - - sensor.c - 1 - ..\..\..\components\drivers\sensors\sensor.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - - - - - - - - - - - - - - - diff --git a/bsp/nuvoton/numaker-iot-m487/rtconfig.h b/bsp/nuvoton/numaker-iot-m487/rtconfig.h deleted file mode 100644 index 78a3082c5b..0000000000 --- a/bsp/nuvoton/numaker-iot-m487/rtconfig.h +++ /dev/null @@ -1,398 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 8 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 1024 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define RT_USING_CPU_FFS -#define ARCH_ARM_CORTEX_M -#define ARCH_ARM_CORTEX_M4 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 2048 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 8 -#define DFS_FILESYSTEM_TYPES_MAX 4 -#define DFS_FD_MAX 32 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 8 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS -#define RT_USING_FAL -#define FAL_DEBUG_CONFIG -#define FAL_DEBUG 1 -#define FAL_PART_HAS_TABLE_CFG - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 2048 -#define RT_USING_CAN -#define RT_USING_HWTIMER -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_PM -#define PM_TICKLESS_THRESHOLD_TIME 2 -#define RT_USING_RTC -#define RT_USING_SDIO -#define RT_SDIO_STACK_SIZE 2048 -#define RT_SDIO_THREAD_PRIORITY 15 -#define RT_MMCSD_STACK_SIZE 2048 -#define RT_MMCSD_THREAD_PREORITY 22 -#define RT_MMCSD_MAX_PARTITION 16 -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_SFUD -#define RT_SFUD_USING_SFDP -#define RT_SFUD_USING_FLASH_INFO_TABLE -#define RT_SFUD_SPI_MAX_HZ 50000000 -#define RT_USING_WDT -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_SENSOR -#define RT_USING_SENSOR_CMD -#define RT_USING_HWCRYPTO -#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto" -#define RT_HWCRYPTO_IV_MAX_SIZE 16 -#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256 -#define RT_HWCRYPTO_USING_AES -#define RT_HWCRYPTO_USING_AES_ECB -#define RT_HWCRYPTO_USING_AES_CBC -#define RT_HWCRYPTO_USING_AES_CFB -#define RT_HWCRYPTO_USING_AES_CTR -#define RT_HWCRYPTO_USING_AES_OFB -#define RT_HWCRYPTO_USING_DES -#define RT_HWCRYPTO_USING_DES_ECB -#define RT_HWCRYPTO_USING_DES_CBC -#define RT_HWCRYPTO_USING_3DES -#define RT_HWCRYPTO_USING_3DES_ECB -#define RT_HWCRYPTO_USING_3DES_CBC -#define RT_HWCRYPTO_USING_SHA1 -#define RT_HWCRYPTO_USING_SHA2 -#define RT_HWCRYPTO_USING_SHA2_224 -#define RT_HWCRYPTO_USING_SHA2_256 -#define RT_HWCRYPTO_USING_SHA2_384 -#define RT_HWCRYPTO_USING_SHA2_512 -#define RT_HWCRYPTO_USING_RNG -#define RT_HWCRYPTO_USING_CRC -#define RT_HWCRYPTO_USING_CRC_07 -#define RT_HWCRYPTO_USING_CRC_8005 -#define RT_HWCRYPTO_USING_CRC_1021 -#define RT_HWCRYPTO_USING_CRC_04C11DB7 - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/mnt/udisk/" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define _RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID_MOUSE - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL -#define SAL_INTERNET_CHECK - -/* Docking with protocol stacks */ - -#define SAL_USING_AT -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_AT -#define AT_USING_CLIENT -#define AT_CLIENT_NUM_MAX 1 -#define AT_USING_SOCKET -#define AT_USING_CLI -#define AT_CMD_MAX_LEN 512 -#define AT_SW_VERSION_NUM 0x10301 - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - -#define PKG_USING_AT_DEVICE -#define AT_DEVICE_USING_ESP8266 -#define AT_DEVICE_ESP8266_INIT_ASYN -#define AT_DEVICE_ESP8266_SOCKET -#define PKG_USING_AT_DEVICE_LATEST_VERSION -#define PKG_AT_DEVICE_VER_NUM 0x99999 - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_M480 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 2 -#define NU_PDMA_SGTBL_POOL_SIZE 16 -#define BSP_USING_FMC -#define BSP_USING_GPIO -#define BSP_USING_CLK -#define NU_CLK_INVOKE_WKTMR -#define BSP_USING_RTC -#define NU_RTC_SUPPORT_MSH_CMD -#define BSP_USING_TMR -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_UART1 -#define BSP_USING_UART1_TX_DMA -#define BSP_USING_UART1_RX_DMA -#define BSP_USING_UART2 -#define BSP_USING_UART2_TX_DMA -#define BSP_USING_UART2_RX_DMA -#define BSP_USING_I2C -#define BSP_USING_I2C0 -#define BSP_USING_I2C1 -#define BSP_USING_I2C2 -#define BSP_USING_USCI -#define BSP_USING_UUART -#define BSP_USING_USCI0 -#define BSP_USING_UUART0 -#define BSP_USING_UUART0_TX_DMA -#define BSP_USING_UUART0_RX_DMA -#define BSP_USING_SDH -#define BSP_USING_SDH0 -#define BSP_USING_SPI -#define BSP_USING_SPI_PDMA -#define BSP_USING_SPI0_NONE -#define BSP_USING_SPI1 -#define BSP_USING_SPI1_PDMA -#define BSP_USING_SPI2 -#define BSP_USING_SPI3_NONE -#define BSP_USING_I2S -#define NU_I2S_DMA_FIFO_SIZE 2048 -#define BSP_USING_QSPI -#define BSP_USING_QSPI0 -#define BSP_USING_CRYPTO -#define BSP_USING_CRC -#define NU_CRC_USE_PDMA -#define BSP_USING_WDT -#define BSP_USING_USBD -#define BSP_USING_HSUSBH -#define NU_USBHOST_HUB_POLLING_INTERVAL 100 - -/* On-board Peripheral Drivers */ - -#define BSP_USING_NULINKME -#define BOARD_USING_ESP8266 -#define BOARD_USING_BMX055 -#define BOARD_USING_NAU88L25 -#define BOARD_USING_STORAGE_SDCARD -#define BOARD_USING_STORAGE_SPIFLASH -#define BOARD_USING_USB_D_H -#define BOARD_USING_HSUSBH_USBD - -/* Board extended module drivers */ - - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO -#define NU_PKG_USING_BMX055 -#define NU_PKG_USING_NAU88L25 - -#endif diff --git a/bsp/nuvoton/numaker-iot-ma35d1/.config b/bsp/nuvoton/numaker-iot-ma35d1/.config new file mode 100644 index 0000000000..4008893646 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/.config @@ -0,0 +1,1381 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# +CONFIG_USE_MA35D1_AARCH32=y + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMART is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=32 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=4096 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=4096 + +# +# kservice optimization +# +CONFIG_RT_KSERVICE_USING_STDLIB=y +# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_KPRINTF_USING_LONGLONG is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +CONFIG_RT_USING_MEMHEAP=y +CONFIG_RT_MEMHEAP_FAST_MODE=y +# CONFIG_RT_MEMHEAP_BEST_MODE is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_DM is not set +CONFIG_RT_USING_INTERRUPT_INFO=y +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=4096 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +CONFIG_RT_VER_NUM=0x50000 +CONFIG_RT_USING_CACHE=y +# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_MM_MMU=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_MMU=y +CONFIG_ARCH_ARM_CORTEX_A=y +CONFIG_RT_SMP_AUTO_BOOT=y +CONFIG_RT_USING_GIC_V2=y +# CONFIG_RT_USING_GIC_V3 is not set +# CONFIG_ARCH_ARM_SECURE_MODE is not set +# CONFIG_RT_BACKTRACE_FUNCTION_NAME is not set +CONFIG_ARCH_ARMV8=y + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=4096 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +CONFIG_RT_USING_LEGACY=y +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=128 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 +CONFIG_RT_USING_DFS=y +CONFIG_DFS_USING_POSIX=y +CONFIG_DFS_USING_WORKDIR=y +CONFIG_DFS_FILESYSTEMS_MAX=32 +CONFIG_DFS_FILESYSTEM_TYPES_MAX=32 +CONFIG_DFS_FD_MAX=128 +CONFIG_RT_USING_DFS_MNTTABLE=y +CONFIG_RT_USING_DFS_ELMFAT=y + +# +# elm-chan's FatFs, Generic FAT Filesystem Module +# +CONFIG_RT_DFS_ELM_CODE_PAGE=437 +CONFIG_RT_DFS_ELM_WORD_ACCESS=y +# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set +# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set +# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set +CONFIG_RT_DFS_ELM_USE_LFN_3=y +CONFIG_RT_DFS_ELM_USE_LFN=3 +CONFIG_RT_DFS_ELM_LFN_UNICODE_0=y +# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set +# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set +CONFIG_RT_DFS_ELM_LFN_UNICODE=0 +CONFIG_RT_DFS_ELM_MAX_LFN=255 +CONFIG_RT_DFS_ELM_DRIVES=8 +CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 +# CONFIG_RT_DFS_ELM_USE_ERASE is not set +CONFIG_RT_DFS_ELM_REENTRANT=y +CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 +CONFIG_RT_USING_DFS_DEVFS=y +# CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set +# CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set +# CONFIG_RT_USING_DFS_NFS is not set +# CONFIG_RT_USING_FAL is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 +CONFIG_RT_USING_SYSTEM_WORKQUEUE=y +CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048 +CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23 +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=256 +CONFIG_RT_USING_CAN=y +# CONFIG_RT_CAN_USING_HDR is not set +# CONFIG_RT_CAN_USING_CANFD is not set +CONFIG_RT_USING_HWTIMER=y +# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_I2C=y +# CONFIG_RT_I2C_DEBUG is not set +CONFIG_RT_USING_I2C_BITOPS=y +# CONFIG_RT_I2C_BITOPS_DEBUG is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +CONFIG_RT_USING_ADC=y +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set +CONFIG_RT_USING_PWM=y +# CONFIG_RT_USING_MTD_NOR is not set +CONFIG_RT_USING_MTD_NAND=y +CONFIG_RT_MTD_NAND_DEBUG=y +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_FDT is not set +CONFIG_RT_USING_RTC=y +# CONFIG_RT_USING_ALARM is not set +# CONFIG_RT_USING_SOFT_RTC is not set +CONFIG_RT_USING_SDIO=y +CONFIG_RT_SDIO_STACK_SIZE=4096 +CONFIG_RT_SDIO_THREAD_PRIORITY=15 +CONFIG_RT_MMCSD_STACK_SIZE=4096 +CONFIG_RT_MMCSD_THREAD_PREORITY=22 +CONFIG_RT_MMCSD_MAX_PARTITION=8 +# CONFIG_RT_SDIO_DEBUG is not set +CONFIG_RT_USING_SPI=y +# CONFIG_RT_USING_SPI_BITOPS is not set +CONFIG_RT_USING_QSPI=y +# CONFIG_RT_USING_SPI_MSD is not set +# CONFIG_RT_USING_SFUD is not set +# CONFIG_RT_USING_ENC28J60 is not set +# CONFIG_RT_USING_SPI_WIFI is not set +# CONFIG_RT_USING_WDT is not set +CONFIG_RT_USING_AUDIO=y +CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_SIZE=4096 +CONFIG_RT_AUDIO_REPLAY_MP_BLOCK_COUNT=2 +CONFIG_RT_AUDIO_RECORD_PIPE_SIZE=2048 +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_DEV_BUS is not set +# CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_VIRTIO is not set + +# +# Using USB +# +CONFIG_RT_USING_USB=y +CONFIG_RT_USING_USB_HOST=y +CONFIG_RT_USBH_MSTORAGE=y +CONFIG_UDISK_MOUNTPOINT="/mnt/udisk" +# CONFIG_RT_USBH_HID is not set +# CONFIG_RT_USING_USB_DEVICE is not set +CONFIG_RT_USBD_THREAD_STACK_SZ=4096 + +# +# C/C++ and POSIX layer +# +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +CONFIG_RT_USING_POSIX_FS=y +# CONFIG_RT_USING_POSIX_DEVIO is not set +# CONFIG_RT_USING_POSIX_STDIO is not set +CONFIG_RT_USING_POSIX_POLL=y +CONFIG_RT_USING_POSIX_SELECT=y +CONFIG_RT_USING_POSIX_SOCKET=y +# CONFIG_RT_USING_POSIX_TERMIOS is not set +# CONFIG_RT_USING_POSIX_AIO is not set +# CONFIG_RT_USING_POSIX_MMAN is not set +CONFIG_RT_USING_POSIX_DELAY=y +CONFIG_RT_USING_POSIX_CLOCK=y +# CONFIG_RT_USING_POSIX_TIMER is not set +CONFIG_RT_USING_PTHREADS=y +CONFIG_PTHREAD_NUM_MAX=8 +CONFIG_RT_USING_MODULE=y +CONFIG_RT_USING_CUSTOM_DLMODULE=y + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Network +# +CONFIG_RT_USING_SAL=y +CONFIG_SAL_INTERNET_CHECK=y + +# +# Docking with protocol stacks +# +CONFIG_SAL_USING_LWIP=y +# CONFIG_SAL_USING_AT is not set +# CONFIG_SAL_USING_TLS is not set +CONFIG_SAL_USING_POSIX=y +CONFIG_RT_USING_NETDEV=y +CONFIG_NETDEV_USING_IFCONFIG=y +CONFIG_NETDEV_USING_PING=y +CONFIG_NETDEV_USING_NETSTAT=y +CONFIG_NETDEV_USING_AUTO_DEFAULT=y +# CONFIG_NETDEV_USING_IPV6 is not set +CONFIG_NETDEV_IPV4=1 +CONFIG_NETDEV_IPV6=0 +# CONFIG_NETDEV_IPV6_SCOPES is not set +CONFIG_RT_USING_LWIP=y +# CONFIG_RT_USING_LWIP_LOCAL_VERSION is not set +# CONFIG_RT_USING_LWIP141 is not set +# CONFIG_RT_USING_LWIP203 is not set +CONFIG_RT_USING_LWIP212=y +# CONFIG_RT_USING_LWIP_LATEST is not set +CONFIG_RT_USING_LWIP_VER_NUM=0x20102 +# CONFIG_RT_USING_LWIP_IPV6 is not set +CONFIG_RT_LWIP_MEM_ALIGNMENT=32 +CONFIG_RT_LWIP_IGMP=y +CONFIG_RT_LWIP_ICMP=y +# CONFIG_RT_LWIP_SNMP is not set +CONFIG_RT_LWIP_DNS=y +CONFIG_RT_LWIP_DHCP=y +CONFIG_IP_SOF_BROADCAST=1 +CONFIG_IP_SOF_BROADCAST_RECV=1 + +# +# Static IPv4 Address +# +CONFIG_RT_LWIP_IPADDR="192.168.31.55" +CONFIG_RT_LWIP_GWADDR="192.168.31.1" +CONFIG_RT_LWIP_MSKADDR="255.255.255.0" +CONFIG_RT_LWIP_UDP=y +CONFIG_RT_LWIP_TCP=y +CONFIG_RT_LWIP_RAW=y +# CONFIG_RT_LWIP_PPP is not set +CONFIG_RT_MEMP_NUM_NETCONN=32 +CONFIG_RT_LWIP_PBUF_NUM=8192 +CONFIG_RT_LWIP_RAW_PCB_NUM=32 +CONFIG_RT_LWIP_UDP_PCB_NUM=32 +CONFIG_RT_LWIP_TCP_PCB_NUM=32 +CONFIG_RT_LWIP_TCP_SEG_NUM=1024 +CONFIG_RT_LWIP_TCP_SND_BUF=8192 +CONFIG_RT_LWIP_TCP_WND=10240 +CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10 +CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8192 +CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096 +# CONFIG_LWIP_NO_RX_THREAD is not set +# CONFIG_LWIP_NO_TX_THREAD is not set +CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12 +CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=4096 +CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8192 +CONFIG_RT_LWIP_REASSEMBLY_FRAG=y +CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 +CONFIG_LWIP_NETIF_LINK_CALLBACK=1 +CONFIG_SO_REUSE=1 +CONFIG_LWIP_SO_RCVTIMEO=1 +CONFIG_LWIP_SO_SNDTIMEO=1 +CONFIG_LWIP_SO_RCVBUF=1 +CONFIG_LWIP_SO_LINGER=0 +CONFIG_RT_LWIP_NETIF_LOOPBACK=y +CONFIG_LWIP_NETIF_LOOPBACK=1 +CONFIG_RT_LWIP_STATS=y +CONFIG_RT_LWIP_USING_HW_CHECKSUM=y +CONFIG_RT_LWIP_USING_PING=y +# CONFIG_LWIP_USING_DHCPD is not set +# CONFIG_RT_LWIP_DEBUG is not set +# CONFIG_RT_USING_AT is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +CONFIG_RT_USING_ULOG=y +# CONFIG_ULOG_OUTPUT_LVL_A is not set +# CONFIG_ULOG_OUTPUT_LVL_E is not set +# CONFIG_ULOG_OUTPUT_LVL_W is not set +# CONFIG_ULOG_OUTPUT_LVL_I is not set +CONFIG_ULOG_OUTPUT_LVL_D=y +CONFIG_ULOG_OUTPUT_LVL=7 +CONFIG_ULOG_USING_ISR_LOG=y +CONFIG_ULOG_ASSERT_ENABLE=y +CONFIG_ULOG_LINE_BUF_SIZE=128 +# CONFIG_ULOG_USING_ASYNC_OUTPUT is not set + +# +# log format +# +# CONFIG_ULOG_OUTPUT_FLOAT is not set +CONFIG_ULOG_USING_COLOR=y +CONFIG_ULOG_OUTPUT_TIME=y +# CONFIG_ULOG_TIME_USING_TIMESTAMP is not set +CONFIG_ULOG_OUTPUT_LEVEL=y +CONFIG_ULOG_OUTPUT_TAG=y +# CONFIG_ULOG_OUTPUT_THREAD_NAME is not set +CONFIG_ULOG_BACKEND_USING_CONSOLE=y +# CONFIG_ULOG_BACKEND_USING_FILE is not set +# CONFIG_ULOG_USING_FILTER is not set +# CONFIG_ULOG_USING_SYSLOG is not set +CONFIG_RT_USING_UTEST=y +CONFIG_UTEST_THR_STACK_SIZE=4096 +CONFIG_UTEST_THR_PRIORITY=20 +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_VBUS is not set + +# +# RT-Thread Utestcases +# +CONFIG_RT_USING_UTESTCASES=y + +# +# Utest Self Testcase +# +CONFIG_UTEST_SELF_PASS_TC=y + +# +# Kernel Testcase +# +CONFIG_UTEST_MEMHEAP_TC=y +CONFIG_UTEST_SMALL_MEM_TC=y +# CONFIG_UTEST_IRQ_TC is not set +# CONFIG_UTEST_SEMAPHORE_TC is not set +# CONFIG_UTEST_EVENT_TC is not set +# CONFIG_UTEST_TIMER_TC is not set +# CONFIG_UTEST_MESSAGEQUEUE_TC is not set +# CONFIG_UTEST_SIGNAL_TC is not set +# CONFIG_UTEST_MUTEX_TC is not set +# CONFIG_UTEST_MAILBOX_TC is not set +# CONFIG_UTEST_THREAD_TC is not set + +# +# CPP11 Testcase +# +# CONFIG_UTEST_CPP11_THREAD_TC is not set + +# +# Utest Serial Testcase +# +# CONFIG_UTEST_SERIAL_TC is not set + +# +# RTT Posix Testcase +# +# CONFIG_RTT_POSIX_TESTCASE is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LWIP is not set +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_EZ_IOT_OS is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +CONFIG_PKG_USING_WAVPLAYER=y +CONFIG_PKG_WAVPLAYER_PATH="/packages/multimedia/wavplayer" +CONFIG_PKG_WP_USING_PLAY=y +CONFIG_PKG_WP_PLAY_DEVICE="sound0" +CONFIG_PKG_WP_USING_RECORD=y +CONFIG_PKG_WP_RECORD_DEVICE="sound0" +# CONFIG_PKG_USING_WAVPLAYER_V020 is not set +CONFIG_PKG_USING_WAVPLAYER_LATEST_VERSION=y +CONFIG_PKG_WAVPLAYER_VER="latest" +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +CONFIG_PKG_USING_RAMDISK=y +CONFIG_PKG_RAMDISK_PATH="/packages/system/ramdisk" +# CONFIG_PKG_USING_RAMDISK_V010 is not set +CONFIG_PKG_USING_RAMDISK_LATEST_VERSION=y +CONFIG_PKG_RAMDISK_VER="latest" +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set + +# +# peripheral libraries and drivers +# + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ESP_IDF is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_FINGERPRINT is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_UKAL is not set + +# +# miscellaneous packages +# + +# +# project laboratory +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_LIBCSV is not set +CONFIG_PKG_USING_OPTPARSE=y +CONFIG_PKG_OPTPARSE_PATH="/packages/misc/optparse" +CONFIG_PKG_USING_OPTPARSE_LATEST_VERSION=y +CONFIG_PKG_OPTPARSE_VER="latest" +# CONFIG_OPTPARSE_USING_DEMO is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects +# +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set + +# +# Other +# + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set + +# +# Uncategorized +# + +# +# Hardware Drivers Config +# + +# +# On-chip Peripheral Drivers +# +CONFIG_SOC_SERIES_MA35D1=y +CONFIG_BSP_USING_SSPCC=y +CONFIG_BSP_USING_SSMCC=y +CONFIG_BSP_USING_UMCTL2=y +CONFIG_BSP_USING_RTP=y +CONFIG_RTP_USING_AT_STARTUP=y +CONFIG_RT_USING_FPU=y +CONFIG_BSP_USE_STDDRIVER_SOURCE=y +CONFIG_BSP_USING_PDMA=y +CONFIG_BSP_USING_PDMA0=y +CONFIG_BSP_USING_PDMA1=y +# CONFIG_BSP_USING_PDMA2 is not set +# CONFIG_BSP_USING_PDMA3 is not set +CONFIG_NU_PDMA_MEMFUN_ACTOR_MAX=4 +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_GMAC=y +CONFIG_BSP_USING_GMAC0=y +CONFIG_BSP_USING_GMAC1=y +CONFIG_BSP_USING_RTC=y +# CONFIG_NU_RTC_SUPPORT_IO_RW is not set +# CONFIG_NU_RTC_SUPPORT_MSH_CMD is not set +# CONFIG_BSP_USING_ADC is not set +# CONFIG_BSP_USING_CCAP is not set +CONFIG_BSP_USING_EADC=y +CONFIG_BSP_USING_EADC0=y +CONFIG_BSP_USING_TMR=y +CONFIG_BSP_USING_TIMER=y +CONFIG_BSP_USING_TMR0=y +CONFIG_BSP_USING_TIMER0=y +# CONFIG_BSP_USING_TPWM0 is not set +CONFIG_BSP_USING_TMR1=y +CONFIG_BSP_USING_TIMER1=y +# CONFIG_BSP_USING_TPWM1 is not set +CONFIG_BSP_USING_TMR2=y +CONFIG_BSP_USING_TIMER2=y +# CONFIG_BSP_USING_TPWM2 is not set +CONFIG_BSP_USING_TMR3=y +CONFIG_BSP_USING_TIMER3=y +# CONFIG_BSP_USING_TPWM3 is not set +CONFIG_BSP_USING_TMR4=y +CONFIG_BSP_USING_TIMER4=y +# CONFIG_BSP_USING_TPWM4 is not set +CONFIG_BSP_USING_TMR5=y +CONFIG_BSP_USING_TIMER5=y +# CONFIG_BSP_USING_TPWM5 is not set +CONFIG_BSP_USING_TMR6=y +CONFIG_BSP_USING_TIMER6=y +# CONFIG_BSP_USING_TPWM6 is not set +CONFIG_BSP_USING_TMR7=y +CONFIG_BSP_USING_TIMER7=y +# CONFIG_BSP_USING_TPWM7 is not set +CONFIG_BSP_USING_TMR8=y +CONFIG_BSP_USING_TIMER8=y +# CONFIG_BSP_USING_TPWM8 is not set +CONFIG_BSP_USING_TMR9=y +CONFIG_BSP_USING_TIMER9=y +# CONFIG_BSP_USING_TPWM9 is not set +CONFIG_BSP_USING_TMR10=y +CONFIG_BSP_USING_TIMER10=y +# CONFIG_BSP_USING_TPWM10 is not set +CONFIG_BSP_USING_TMR11=y +CONFIG_BSP_USING_TIMER11=y +# CONFIG_BSP_USING_TPWM11 is not set +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_USING_UART0_TX_DMA is not set +# CONFIG_BSP_USING_UART0_RX_DMA is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UART5 is not set +# CONFIG_BSP_USING_UART6 is not set +# CONFIG_BSP_USING_UART7 is not set +# CONFIG_BSP_USING_UART8 is not set +# CONFIG_BSP_USING_UART9 is not set +CONFIG_BSP_USING_UART10=y +CONFIG_BSP_USING_UART10_TX_DMA=y +CONFIG_BSP_USING_UART10_RX_DMA=y +# CONFIG_BSP_USING_UART11 is not set +CONFIG_BSP_USING_UART12=y +CONFIG_BSP_USING_UART12_TX_DMA=y +CONFIG_BSP_USING_UART12_RX_DMA=y +# CONFIG_BSP_USING_UART13 is not set +# CONFIG_BSP_USING_UART14 is not set +# CONFIG_BSP_USING_UART15 is not set +CONFIG_BSP_USING_UART16=y +# CONFIG_BSP_USING_UART16_TX_DMA is not set +# CONFIG_BSP_USING_UART16_RX_DMA is not set +CONFIG_BSP_USING_I2C=y +CONFIG_BSP_USING_I2C0=y +CONFIG_BSP_USING_I2C1=y +CONFIG_BSP_USING_I2C2=y +# CONFIG_BSP_USING_I2C3 is not set +CONFIG_BSP_USING_I2C4=y +CONFIG_BSP_USING_I2C5=y +CONFIG_BSP_USING_SDH=y +# CONFIG_BSP_USING_SDH0 is not set +CONFIG_BSP_USING_SDH1=y +CONFIG_BSP_USING_CANFD=y +# CONFIG_BSP_USING_CANFD0 is not set +# CONFIG_BSP_USING_CANFD1 is not set +# CONFIG_BSP_USING_CANFD2 is not set +# CONFIG_BSP_USING_CANFD3 is not set +# CONFIG_BSP_USING_EPWM is not set +CONFIG_BSP_USING_SPI=y +# CONFIG_BSP_USING_SPI_PDMA is not set +CONFIG_BSP_USING_SPI0_NONE=y +# CONFIG_BSP_USING_SPI0 is not set +# CONFIG_BSP_USING_SPII2S0 is not set +CONFIG_BSP_USING_SPI1_NONE=y +# CONFIG_BSP_USING_SPI1 is not set +# CONFIG_BSP_USING_SPII2S1 is not set +CONFIG_BSP_USING_SPI2_NONE=y +# CONFIG_BSP_USING_SPI2 is not set +# CONFIG_BSP_USING_SPII2S2 is not set +CONFIG_BSP_USING_SPI3_NONE=y +# CONFIG_BSP_USING_SPI3 is not set +# CONFIG_BSP_USING_SPII2S3 is not set +CONFIG_BSP_USING_I2S=y +CONFIG_BSP_USING_I2S0=y +# CONFIG_BSP_USING_I2S1 is not set +CONFIG_NU_I2S_DMA_FIFO_SIZE=2048 +CONFIG_BSP_USING_QSPI=y +# CONFIG_BSP_USING_QSPI_PDMA is not set +CONFIG_BSP_USING_QSPI0=y +# CONFIG_BSP_USING_QSPI0_PDMA is not set +# CONFIG_BSP_USING_QSPI1 is not set +# CONFIG_BSP_USING_SCUART is not set +# CONFIG_BSP_USING_ECAP is not set +# CONFIG_BSP_USING_QEI is not set +# CONFIG_BSP_USING_SOFT_I2C is not set +# CONFIG_BSP_USING_DISP is not set +# CONFIG_BSP_USING_WDT is not set +CONFIG_BSP_USING_HWSEM=y +CONFIG_BSP_USING_HWSEM0=y +CONFIG_BSP_USING_WHC=y +CONFIG_BSP_USING_WHC0=y +# CONFIG_BSP_USING_WHC1 is not set +CONFIG_BSP_USING_NFI=y +# CONFIG_BSP_USING_EBI is not set +CONFIG_BSP_USING_USBH=y +CONFIG_BSP_USING_HSUSBH0=y +CONFIG_BSP_USING_HSUSBH1=y + +# +# On-board Peripheral Drivers +# +CONFIG_BSP_USING_CONSOLE=y +CONFIG_BOARD_USING_NAU8822=y +CONFIG_BOARD_USING_GMAC0=y +CONFIG_BOARD_USING_GMAC1=y +CONFIG_BOARD_USING_STORAGE_SDCARD=y +CONFIG_BOARD_USING_STORAGE_RAWNAND=y +# CONFIG_BOARD_USING_STORAGE_SPIFLASH is not set +CONFIG_BOARD_USING_STORAGE_SPINAND=y +CONFIG_BOARD_USING_USBHOST=y + +# +# Board extended module drivers +# +# CONFIG_BOARD_USING_SENSOR0 is not set + +# +# Nuvoton Packages Config +# +CONFIG_NU_PKG_USING_UTILS=y +CONFIG_NU_PKG_USING_DEMO=y +# CONFIG_NU_PKG_USING_BMX055 is not set +# CONFIG_NU_PKG_USING_MAX31875 is not set +# CONFIG_NU_PKG_USING_NCT7717U is not set +# CONFIG_NU_PKG_USING_NAU88L25 is not set +CONFIG_NU_PKG_USING_NAU8822=y +# CONFIG_NU_PKG_USING_DA9062 is not set +# CONFIG_NU_PKG_USING_ILI9341 is not set +# CONFIG_NU_PKG_USING_SSD1963 is not set +# CONFIG_NU_PKG_USING_FSA506 is not set +# CONFIG_NU_PKG_USING_TPC is not set +# CONFIG_NU_PKG_USING_ADC_TOUCH is not set +CONFIG_NU_PKG_USING_SPINAND=y diff --git a/bsp/nuvoton/numaker-iot-ma35d1/Kconfig b/bsp/nuvoton/numaker-iot-ma35d1/Kconfig new file mode 100644 index 0000000000..a78782d615 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/Kconfig @@ -0,0 +1,27 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +# you can change the RTT_ROOT default "../../.." to your rtthread_root, +# example : default "F:/git_repositories/rt-thread" + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +config USE_MA35D1_AARCH32 + bool + default y + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "$BSP_DIR/board/Kconfig" diff --git a/bsp/nuvoton/numaker-iot-ma35d1/README.md b/bsp/nuvoton/numaker-iot-ma35d1/README.md new file mode 100644 index 0000000000..bfa419a5ad --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/README.md @@ -0,0 +1,133 @@ +# **NuMaker-IOT-MA35D1** + +## **Introduction** + +The NuMicro® MA35D1 series is a heterogeneous multi-core microprocessor targeted to high-end edge IIoT gateway. It is based on dual 64-bit Arm® Cortex®-A35 cores with speed up to 1 GHz, and one 180 MHz Arm® Cortex®-M4 core. Based on the high-performance cores, the MA35D1 series facilities the tiny AI/ML for edge computing. + +The NuMaker-IoT-MA35D1 evaluation board provides the Ethernet and connectivity features of Nuvoton NuMicro MA35D1 series microprocessors, based on MA35D16F987C (LQFP216 package, and stacking a 512 MB DDR). The NuMaker-IoT-MA35D1 includes rich peripherals such as one set of Gigabit Ethernet, one set of Megabit Ethernet, high-speed USB2.0 Host and device, one set of SD3.0 in MicroSD slot, one set of CAN FD, and RS-485 and RS232 serial communication ports. Furthermore, the NuMaker-IoT-MA35D1 provides discrete power supply to be the reference design. It also provides compatible headers with Raspberry Pi and Arduino UNO for minimizing effort in connecting popular sensors and modules to the system. + +|

NuMaker-IoT-MA35D1(Frontend view)

|

NuMaker-IoT-MA35D1(Backend view)

| +|--|--| +|

fishy

|

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| + +## **NuMaker-IoT-MA35D1 Features** + +
    +
  • Target Chip
    • +
      +
    • MA35D16F987C (LQFP216) MCP package with DDR3L (512 MB), which can run up to 800 MHz
      • +
    +
  • Power
    • +
      +
    • 5V/2A Power Jack, USB VCOM Port or HUSB0 Device
      • +
    • Battery header for RTC power
      • +
    +
  • Memory Devices (Power-on Setting DIP switches for system booting selection)
    • +
      +
    • Quad SPI Flash (QSPI0): Winbond SPI-NAND Flash W25N04KWZEIR (512 MB)
      • +
    • NAND Flash: Winbond NAND Flash W29N08GVSIAA (1 GB)
      • +
    • MicroSD memory card (SD1, supports SD3.0)
      • +
    +
  • One Gigabit Ethernet: 1 x RGMII PHY (RTL8211FDI-CG) and RJ45 port connector
    • +
  • One 10/100 Megabit Ethernet: 1 x RMII PHY (RTL8201FI-VC) and RJ45 port connector
    • +
  • Two High Speed USB: HSUSB0 (Host/Device) and HSUSB1 (Host)
    • +
  • One Raspberry Pi 40-pin header connector
    • +
  • Arduino UNO Compatible Extension Connectors
    • +
  • One Camera Capture (CMOS sensor) header connector
    • +
  • One Audio codec (NAU88C22) with microphone input and speaker output
    • +
  • One set of RS232: Transceiver and header connector
    • +
  • One set of RS485: Transceiver and header connector
    • +
  • One set of CAN FD: Transceiver and header connector
    • +
  • Four Key buttons
    • +
  • Three user defined LEDs
    • +
+ +## **Supported compiler** + +Support GCC compiler. More information of these compiler version as following: + +| Compiler | Tested version | +| -- | -- | +| GCC | Arm Embedded Toolchain 10.3-2021.10 (Env 1.3.5 embedded version)| + +## **Build RT-Thread** + +You can build rt-thread.bin for NuMaker-IoT-MA35D1 board. Steps as following. Notice, the building will include **ma35-rtp/rtthread.bin** file into **numaker-iot-ma35d1/rtthread.bin** for heterogeneous multi-core demonstration. + +```bash +# cd rt-thread/bsp/nuvoton/numaker-iot-ma35d1 +# menuconfig --generate +# scons -c +# pkgs --update +# scons -j 16 + +\bsp\nuvoton\numaker-iot-ma35d1\rtthread.bin +``` + +## **Program firmware using NuWriter** + +To switch SW7 dip-switch on NuMaker-IoT-MA35D1 to do corresponding actions as below. + +**Power-on Setting** +L: OFF dip-switch +H: ON dip-switch + +| Memory Storage | **Burn to** settings | **Boot from** settings | +|--|--|--| +| **DDR** |
  • Switch 1(PG0) to ON.
  • Switch 3(PG2) to ON.
  • Switch 4(PG3) to ON.
  • Switch Others to OFF.
| | +| **Raw NAND**
(Select Ignore BCH and Page setting) |
  • Switch 1(PG0) to ON.
  • Switch 3(PG2) to ON.
  • Switch 4(PG3) to ON.
  • Switch Others to OFF.
|
  • Switch 1(PG0) to ON.
  • Switch 4(PG3) to ON.
  • Switch Others to OFF.
| +| **Serial NAND**
(Select 4-bit mode) |
  • Switch 1(PG0) to ON.
  • Switch 3(PG2) to ON.
  • Switch 4(PG3) to ON.
  • Switch 7(PG6) to ON.
  • Switch Others to OFF.
|
  • Switch 1(PG0) to ON.
  • Switch 7(PG6) to ON.
  • Switch Others to OFF.
+ +### **Download to DDR and Run** + +You can run windows batch script to download rtthread.bin into memory, then run it. The path of batch script as below. + +For 512MB DD3L downloading: +```bash +\bsp\nuvoton\numaker-iot-ma35d1\nuwriter_scripts\nuwriter_ddr3_512mb_download_and_run.bat +``` + +For 128MB DD2 downloading: +```bash +\bsp\nuvoton\numaker-iot-ma35d1\nuwriter_scripts\nuwriter_ddr2_128mb_download_and_run.bat +``` + +### **Burn to Serial NAND** + +You can run windows batch script to download rtthread.bin into SPI-NAND flash, then run it. The path of batch script as below. + +```bash +\bsp\nuvoton\numaker-iot-ma35d1\nuwriter_scripts\nuwriter_spinand_programming.bat +``` + +### **Burn to Raw NAND** + +You can run windows batch script to download rtthread.bin into Raw NAND flash, then run it. The path of batch script as below. + +```bash +\bsp\nuvoton\numaker-iot-ma35d1\nuwriter_scripts\nuwriter_nand_programming.bat +``` + +## **Test** + +|Connector on board|Wiring|Usage| +|-|-|-| +|VCOM(CON9)|Use an USB line| rt-thread@CA35 Console | + +You can use Tera Term terminate emulator (or other software) to type commands of RTT. All parameters of serial communication are shown in below image. Here, you can find out the corresponding port number of Nuvoton Virtual Com Port in window device manager. + +

+fishy +

+
+ +## **Purchase** + +* [Nuvoton Direct](https://direct.nuvoton.com/en/numaker-iot-ma35d1-a1) + +## **Resources** + +* [Download Board Schematics](https://www.nuvoton.com/resource-download.jsp?tp_GUID=HL102022101207193137) +* [Download User Manual](https://www.nuvoton.com/resource-download.jsp?tp_GUID=UG132022101707255524) +* [Download Datasheet](https://www.nuvoton.com/resource-download.jsp?tp_GUID=DA00-MA35D16) +* [Download NuWriter](https://github.com/OpenNuvoton/MA35D1_NuWriter) diff --git a/bsp/nuvoton/numaker-iot-ma35d1/SConscript b/bsp/nuvoton/numaker-iot-ma35d1/SConscript new file mode 100644 index 0000000000..fe0ae941ae --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/SConscript @@ -0,0 +1,14 @@ +# for module compiling +import os +Import('RTT_ROOT') + +cwd = str(Dir('#')) +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/nuvoton/numaker-iot-ma35d1/SConstruct b/bsp/nuvoton/numaker-iot-ma35d1/SConstruct new file mode 100644 index 0000000000..5143e3012d --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/SConstruct @@ -0,0 +1,58 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS, + CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES') + +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) +env['ASCOM'] = env['ASPPCOM'] + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT) + +nuvoton_library = 'ma35' +rtconfig.BSP_LIBRARY_TYPE = nuvoton_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, nuvoton_library, 'SConscript'))) + +# include nu_pkgs +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'nu_packages', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/nuvoton/numaker-iot-ma35d1/applications/SConscript b/bsp/nuvoton/numaker-iot-ma35d1/applications/SConscript new file mode 100644 index 0000000000..a3ccbe0469 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/applications/SConscript @@ -0,0 +1,11 @@ +from building import * +import os +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) +Return('group') diff --git a/bsp/nuvoton/numaker-iot-ma35d1/applications/main.c b/bsp/nuvoton/numaker-iot-ma35d1/applications/main.c new file mode 100644 index 0000000000..ff2061ff1b --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/applications/main.c @@ -0,0 +1,121 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2021-6-1 Wayne First version +* +******************************************************************************/ + +#include +#include +#include "drv_common.h" + +#if defined(RT_USING_PIN) +#include "drv_gpio.h" + +/* defined the LED_0 pin: PN6 */ +#define LED_0 NU_GET_PININDEX(NU_PN, 6) + +/* defined the LED_1 pin: PN7 */ +#define LED_1 NU_GET_PININDEX(NU_PN, 7) + +/* defined the LED_2 pin: PN10 */ +#define LED_2 NU_GET_PININDEX(NU_PN, 10) + +/* defined the KEY_0 pin: PN2 */ +#define KEY_0 NU_GET_PININDEX(NU_PN, 2) + +/* defined the KEY_1 pin: PN3 */ +#define KEY_1 NU_GET_PININDEX(NU_PN, 3) + +/* defined the KEY_2 pin: PN12 */ +#define KEY_2 NU_GET_PININDEX(NU_PN, 12) + +/* defined the KEY_3 pin: PN13 */ +#define KEY_3 NU_GET_PININDEX(NU_PN, 13) + +void nu_button_cb(void *args) +{ + uint32_t u32Key = (uint32_t)args; + + switch (u32Key) + { + case KEY_0: + rt_kprintf("KEY_0 pressed\n"); + rt_pin_write(LED_1, PIN_HIGH); + break; + case KEY_1: + rt_kprintf("KEY_1 pressed\n"); + rt_pin_write(LED_1, PIN_LOW); + break; + case KEY_2: + rt_kprintf("KEY_2 pressed\n"); + rt_pin_write(LED_2, PIN_HIGH); + break; + case KEY_3: + rt_kprintf("KEY_3 pressed\n"); + rt_pin_write(LED_2, PIN_LOW); + break; + } +} + +static void nu_button_init(void) +{ + /* set KEY_0 pin mode to input, pull-up, falling edge and enable interrupt. */ + rt_pin_mode(KEY_0, PIN_MODE_INPUT_PULLUP); + rt_pin_attach_irq(KEY_0, PIN_IRQ_MODE_FALLING, nu_button_cb, (void *)KEY_0); + rt_pin_irq_enable(KEY_0, PIN_IRQ_ENABLE); + + /* set KEY_1 pin mode to input, pull-up, falling edge and enable interrupt. */ + rt_pin_mode(KEY_1, PIN_MODE_INPUT_PULLUP); + rt_pin_attach_irq(KEY_1, PIN_IRQ_MODE_FALLING, nu_button_cb, (void *)KEY_1); + rt_pin_irq_enable(KEY_1, PIN_IRQ_ENABLE); + + /* set KEY_2 pin mode to input, pull-up, falling edge and enable interrupt. */ + rt_pin_mode(KEY_2, PIN_MODE_INPUT_PULLUP); + rt_pin_attach_irq(KEY_2, PIN_IRQ_MODE_FALLING, nu_button_cb, (void *)KEY_2); + rt_pin_irq_enable(KEY_2, PIN_IRQ_ENABLE); + + /* set KEY_3 pin mode to input, pull-up, falling edge and enable interrupt. */ + rt_pin_mode(KEY_3, PIN_MODE_INPUT_PULLUP); + rt_pin_attach_irq(KEY_3, PIN_IRQ_MODE_FALLING, nu_button_cb, (void *)KEY_3); + rt_pin_irq_enable(KEY_3, PIN_IRQ_ENABLE); +} + + +int main(int argc, char **argv) +{ + int counter = 100000; + + /* set on-board buttons */ + nu_button_init(); + + /* set LED_0, LED_1 and LED_2 pin mode to output */ + rt_pin_mode(LED_0, PIN_MODE_OUTPUT); + rt_pin_mode(LED_1, PIN_MODE_OUTPUT); + rt_pin_mode(LED_2, PIN_MODE_OUTPUT); + + while (counter--) + { + rt_pin_write(LED_0, PIN_HIGH); + rt_thread_mdelay(100); + rt_pin_write(LED_0, PIN_LOW); + rt_thread_mdelay(100); + } + + return 0; +} + +#else + +int main(int argc, char **argv) +{ + rt_kprintf("cpu-%d %d\r\n", rt_hw_cpu_id(), nu_cpu_dcache_line_size()); + return 0; +} + +#endif diff --git a/bsp/nuvoton/numaker-iot-ma35d1/applications/mnt.c b/bsp/nuvoton/numaker-iot-ma35d1/applications/mnt.c new file mode 100644 index 0000000000..c3e3045e3d --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/applications/mnt.c @@ -0,0 +1,283 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2021-6-26 Wayne First version +* +******************************************************************************/ + +#include + +#if defined(RT_USING_DFS) + +#define LOG_TAG "mnt" +#define DBG_ENABLE +#define DBG_SECTION_NAME "mnt" +#define DBG_LEVEL DBG_ERROR +#define DBG_COLOR +#include + +#include +#include +#include +#include +#include +#include + +#if defined(RT_USING_FAL) + #include +#endif + +#if defined(PKG_USING_RAMDISK) + #define RAMDISK_NAME "ramdisk0" + #define RAMDISK_UDC "ramdisk1" + #define MOUNT_POINT_RAMDISK0 "/" +#endif + +#if defined(BOARD_USING_STORAGE_SPIFLASH) + #define PARTITION_NAME_FILESYSTEM "filesystem" + #define MOUNT_POINT_SPIFLASH0 "/mnt/"PARTITION_NAME_FILESYSTEM +#endif + +#ifdef RT_USING_DFS_MNTTABLE + +/* +const char *device_name; +const char *path; +const char *filesystemtype; +unsigned long rwflag; +const void *data; +*/ + +const struct dfs_mount_tbl mount_table[] = +{ +#if defined(PKG_USING_RAMDISK) + { RAMDISK_UDC, "/mnt/ram_usbd", "elm", 0, RT_NULL }, +#endif +#if defined(PKG_USING_DFS_YAFFS) + { "nand1", "/mnt/nand1", "yaffs", 0, RT_NULL }, + { "rawnd1", "/mnt/nfi", "yaffs", 0, RT_NULL }, +#elif defined(RT_USING_DFS_UFFS) + { "nand1", "/mnt/nand1", "uffs", 0, RT_NULL }, +#endif + { "sd0", "/mnt/sd0", "elm", 0, RT_NULL }, + { "sd0p0", "/mnt/sd0p0", "elm", 0, RT_NULL }, + { "sd0p1", "/mnt/sd0p1", "elm", 0, RT_NULL }, + { "sd1", "/mnt/sd1", "elm", 0, RT_NULL }, + { "sd1p0", "/mnt/sd1p0", "elm", 0, RT_NULL }, + { "sd1p1", "/mnt/sd1p1", "elm", 0, RT_NULL }, + {0}, +}; +#endif + + +#if defined(PKG_USING_RAMDISK) + +extern rt_err_t ramdisk_init(const char *dev_name, rt_uint8_t *disk_addr, rt_size_t block_size, rt_size_t num_block); +int ramdisk_device_init(void) +{ + rt_err_t result = RT_EOK; + + /* Create a 8MB RAMDISK */ + result = ramdisk_init(RAMDISK_NAME, NULL, 512, 8 * 4096); + RT_ASSERT(result == RT_EOK); + + /* Create a 8MB RAMDISK */ + result = ramdisk_init(RAMDISK_UDC, NULL, 512, 8 * 4096); + RT_ASSERT(result == RT_EOK); + + return 0; +} +INIT_DEVICE_EXPORT(ramdisk_device_init); + +/* Recursive mkdir */ +static int mkdir_p(const char *dir, const mode_t mode) +{ + int ret = -1; + char *tmp = NULL; + char *p = NULL; + struct stat sb; + rt_size_t len; + + if (!dir) + goto exit_mkdir_p; + + /* Copy path */ + /* Get the string length */ + len = strlen(dir); + tmp = rt_strdup(dir); + + /* Remove trailing slash */ + if (tmp[len - 1] == '/') + { + tmp[len - 1] = '\0'; + len--; + } + + /* check if path exists and is a directory */ + if (stat(tmp, &sb) == 0) + { + if (S_ISDIR(sb.st_mode)) + { + ret = 0; + goto exit_mkdir_p; + } + } + + /* Recursive mkdir */ + for (p = tmp + 1; p - tmp <= len; p++) + { + if ((*p == '/') || (p - tmp == len)) + { + *p = 0; + + /* Test path */ + if (stat(tmp, &sb) != 0) + { + /* Path does not exist - create directory */ + if (mkdir(tmp, mode) < 0) + { + goto exit_mkdir_p; + } + } + else if (!S_ISDIR(sb.st_mode)) + { + /* Not a directory */ + goto exit_mkdir_p; + } + if (p - tmp != len) + *p = '/'; + } + } + + ret = 0; + +exit_mkdir_p: + + if (tmp) + rt_free(tmp); + + return ret; +} + +#if defined(PKG_USING_DFS_YAFFS) && defined(RT_USING_DFS_MNTTABLE) +#include "yaffs_guts.h" +int yaffs_dev_init(void) +{ + int i; + + for (i = 0; i < sizeof(mount_table) / sizeof(struct dfs_mount_tbl); i++) + { + if (mount_table[i].filesystemtype && !rt_strcmp(mount_table[i].filesystemtype, "yaffs")) + { + struct rt_mtd_nand_device *psMtdNandDev = RT_MTD_NAND_DEVICE(rt_device_find(mount_table[i].device_name)); + if (psMtdNandDev) + { + LOG_I("yaffs start [%s].", mount_table[i].device_name); + + yaffs_start_up(psMtdNandDev, (const char *)mount_table[i].path); + + LOG_I("dfs mount [%s].", mount_table[i].device_name); + if (dfs_mount(mount_table[i].device_name, + mount_table[i].path, + mount_table[i].filesystemtype, + mount_table[i].rwflag, + mount_table[i].data) != 0) + { + LOG_E("mount fs[%s] on %s failed.", mount_table[i].filesystemtype, mount_table[i].path); + } + } + } + } + + return 0; +} +INIT_APP_EXPORT(yaffs_dev_init); +#endif + +/* Initialize the filesystem */ +int filesystem_init(void) +{ + rt_err_t result = RT_EOK; + +#if defined(RT_USING_FAL) + extern int fal_init_check(void); + if (!fal_init_check()) + fal_init(); +#endif + + // ramdisk as root + if (!rt_device_find(RAMDISK_NAME)) + { + LOG_E("cannot find %s device", RAMDISK_NAME); + result = -RT_ERROR; + goto exit_filesystem_init; + } + else + { + /* Format these ramdisk */ + result = (rt_err_t)dfs_mkfs("elm", RAMDISK_NAME); + RT_ASSERT(result == RT_EOK); + + /* mount ramdisk0 as root directory */ + if (dfs_mount(RAMDISK_NAME, "/", "elm", 0, RT_NULL) == 0) + { + LOG_I("ramdisk mounted on \"/\"."); + + /* now you can create dir dynamically. */ + mkdir_p("/mnt", 0x777); + mkdir_p("/cache", 0x777); + mkdir_p("/download", 0x777); + mkdir_p("/mnt/ram_usbd", 0x777); + mkdir_p("/mnt/nand1", 0x777); + mkdir_p("/mnt/nfi", 0x777); + mkdir_p("/mnt/sd0", 0x777); + mkdir_p("/mnt/sd0p0", 0x777); + mkdir_p("/mnt/sd0p1", 0x777); + mkdir_p("/mnt/sd1", 0x777); + mkdir_p("/mnt/sd1p0", 0x777); + mkdir_p("/mnt/sd1p1", 0x777); +#if defined(RT_USBH_MSTORAGE) && defined(UDISK_MOUNTPOINT) + mkdir_p(UDISK_MOUNTPOINT, 0x777); +#endif + } + else + { + LOG_E("root folder creation failed!\n"); + goto exit_filesystem_init; + } + } + + if (!rt_device_find(RAMDISK_UDC)) + { + LOG_E("cannot find %s device", RAMDISK_UDC); + goto exit_filesystem_init; + } + else + { + /* Format these ramdisk */ + result = (rt_err_t)dfs_mkfs("elm", RAMDISK_UDC); + RT_ASSERT(result == RT_EOK); + } + +#if defined(BOARD_USING_STORAGE_SPIFLASH) + { + struct rt_device *psNorFlash = fal_blk_device_create(PARTITION_NAME_FILESYSTEM); + if (!psNorFlash) + { + rt_kprintf("Failed to create block device for %s.\n", PARTITION_NAME_FILESYSTEM); + } + } +#endif + +exit_filesystem_init: + + return -result; +} +INIT_ENV_EXPORT(filesystem_init); +#endif +#endif diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/Kconfig b/bsp/nuvoton/numaker-iot-ma35d1/board/Kconfig new file mode 100644 index 0000000000..17a2a0bb79 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/Kconfig @@ -0,0 +1,90 @@ +menu "Hardware Drivers Config" + + menu "On-chip Peripheral Drivers" + source "$BSP_DIR/../libraries/ma35/rtt_port/Kconfig" + endmenu + + menu "On-board Peripheral Drivers" + + config BSP_USING_CONSOLE + bool "Enable UART0 for RTT Console(uart0)" + select BSP_USING_UART + select BSP_USING_UART0 + default y + + config BOARD_USING_NAU8822 + bool "NAU8822 Audio Codec supporting(over i2s0, i2c1)" + select NU_PKG_USING_NAU8822 + select BSP_USING_I2C1 + select BSP_USING_I2S + select BSP_USING_I2S0 + default n + + config BOARD_USING_GMAC0 + bool "Enable RGMII0 port(over e0)" + select BSP_USING_GMAC0 + select BSP_USING_GMAC + default y + + config BOARD_USING_GMAC1 + bool "Enable RMII1 port(over e1)" + select BSP_USING_GMAC1 + select BSP_USING_GMAC + default y + + config BOARD_USING_STORAGE_SDCARD + bool "SDCARD supporting(over sdh1)" + select BSP_USING_SDH + select BSP_USING_SDH1 + default y + + config BOARD_USING_STORAGE_RAWNAND + bool "Raw NAND supporting(over nfi)" + select BSP_USING_NFI + select RT_USING_MTD_NAND + default y + + config BOARD_USING_STORAGE_SPIFLASH + bool "SPI NOR FLASH supporting(over qspi0)" + select BSP_USING_QSPI + select BSP_USING_QSPI0 + default n + + config BOARD_USING_STORAGE_SPINAND + bool "SPI NAND FLASH supporting(over qspi0)" + select BSP_USING_QSPI + select BSP_USING_QSPI0 + select NU_PKG_USING_SPINAND + default y + + config BOARD_USING_USBHOST + bool "USB HOST function" + select BSP_USING_USBH + default y + + endmenu + + menu "Board extended module drivers" + + config BOARD_USING_SENSOR0 + bool "CCAP-SENSOR PORT0(over i2c2/PM1/PC12)" + select BSP_USING_I2C + select BSP_USING_I2C2 + select BSP_USING_CCAP + select BSP_USING_CCAP0 + default n + + if BOARD_USING_SENSOR0 + config BOARD_USING_SENSON0_ID + int "Specify Sensor0 ID" + default 0 if BOARD_USING_SENSOR0 + range 0 2 + help + HM1055=0 + ADV728X=1 + endif + endmenu + + source "$BSP_DIR/../libraries/nu_packages/Kconfig" + +endmenu diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/SConscript b/bsp/nuvoton/numaker-iot-ma35d1/board/SConscript new file mode 100644 index 0000000000..38791565a2 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/SConscript @@ -0,0 +1,18 @@ +# RT-Thread building script for component + +from building import * + + +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +src = Split(""" +nutool_pincfg/nutool_pincfg.c +""") +src += Glob('*.c') + Glob('*.cpp') + Glob('*.S') +CPPPATH = [cwd, cwd + '/nutool_pincfg'] + +group = DefineGroup('board', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/board.h b/bsp/nuvoton/numaker-iot-ma35d1/board/board.h new file mode 100644 index 0000000000..7572d78c77 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/board.h @@ -0,0 +1,42 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2021-6-1 Wayne First version +* +******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "NuMicro.h" +#include "drv_sys.h" +#include "nutool_pincfg.h" + +#define BOARD_SDRAM_START 0x80400000 +#define BOARD_SDRAM_SIZE 0x07C00000 + +#define BOARD_HEAP_END ((void*)(BOARD_SDRAM_START+BOARD_SDRAM_SIZE)) +#define BOARD_HEAP_START ((void *)&__bss_end) + +extern int __bss_end; + +#if defined(RT_USING_MTD_NAND) + #include + #define MTD_SPINAND_PARTITION_NUM 3 + extern struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM]; + + #define MTD_NFI_PARTITION_NUM 3 + extern struct rt_mtd_nand_device mtd_partitions_nfi[MTD_NFI_PARTITION_NUM]; +#endif +extern void rt_hw_board_init(void); +extern void nu_clock_init(void); +extern void nu_clock_deinit(void); +extern void nu_pin_init(void); +extern void nu_pin_deinit(void); + +#endif /* BOARD_H_ */ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/board_dev.c b/bsp/nuvoton/numaker-iot-ma35d1/board/board_dev.c new file mode 100644 index 0000000000..89a03d8355 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/board_dev.c @@ -0,0 +1,312 @@ +/**************************************************************************//** +* +* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved. +* +* SPDX-License-Identifier: Apache-2.0 +* +* Change Logs: +* Date Author Notes +* 2021-6-1 Wayne First version +* +******************************************************************************/ + +#include +#include +#include "drv_gpio.h" +#include "drv_sys.h" +#include "drv_sspcc.h" + +#include "board.h" + + +#if defined(BOARD_USING_STORAGE_SPIFLASH) +#if defined(RT_USING_SFUD) + #include "spi_flash.h" + #include "spi_flash_sfud.h" +#endif + +#include "drv_qspi.h" + +#define W25X_REG_READSTATUS (0x05) +#define W25X_REG_READSTATUS2 (0x35) +#define W25X_REG_WRITEENABLE (0x06) +#define W25X_REG_WRITESTATUS (0x01) +#define W25X_REG_QUADENABLE (0x02) + +static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device) +{ + rt_uint8_t u8Val; + rt_err_t result = RT_EOK; + rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS; + + result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1); + RT_ASSERT(result > 0); + + return u8Val; +} + +static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device) +{ + rt_uint8_t u8Val; + rt_err_t result = RT_EOK; + rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2; + + result = rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1); + RT_ASSERT(result > 0); + + return u8Val; +} + +static rt_err_t SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2) +{ + rt_uint8_t w25x_txCMD1; + rt_uint8_t au8Val[2]; + rt_err_t result; + struct rt_qspi_message qspi_message = {0}; + + /* Enable WE */ + w25x_txCMD1 = W25X_REG_WRITEENABLE; + result = rt_qspi_send(qspi_device, &w25x_txCMD1, sizeof(w25x_txCMD1)); + if (result != sizeof(w25x_txCMD1)) + goto exit_SpiFlash_WriteStatusReg; + + /* Prepare status-1, 2 data */ + au8Val[0] = u8Value1; + au8Val[1] = u8Value2; + + /* 1-bit mode: Instruction+payload */ + qspi_message.instruction.content = W25X_REG_WRITESTATUS; + qspi_message.instruction.qspi_lines = 1; + + qspi_message.qspi_data_lines = 1; + qspi_message.parent.cs_take = 1; + qspi_message.parent.cs_release = 1; + qspi_message.parent.send_buf = &au8Val[0]; + qspi_message.parent.length = sizeof(au8Val); + qspi_message.parent.next = RT_NULL; + + if (rt_qspi_transfer_message(qspi_device, &qspi_message) != sizeof(au8Val)) + { + result = -RT_ERROR; + } + + result = RT_EOK; + +exit_SpiFlash_WriteStatusReg: + + return result; +} + +static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device) +{ + volatile uint8_t u8ReturnValue; + + do + { + u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device); + u8ReturnValue = u8ReturnValue & 1; + } + while (u8ReturnValue != 0); // check the BUSY bit +} + +static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device) +{ + rt_err_t result = RT_EOK; + + uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device); + uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device); + + u8Status2 |= W25X_REG_QUADENABLE; + + result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2); + RT_ASSERT(result == RT_EOK); + + SpiFlash_WaitReady(qspi_device); +} + +static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device) +{ + rt_err_t result = RT_EOK; + uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device); + uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device); + + u8Status2 &= ~W25X_REG_QUADENABLE; + + result = SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2); + RT_ASSERT(result == RT_EOK); + + SpiFlash_WaitReady(qspi_device); +} + +static int rt_hw_spiflash_init(void) +{ + if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK) + return -1; + +#if defined(RT_USING_SFUD) + if (rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi01") == RT_NULL) + { + return -(RT_ERROR); + } +#endif + return 0; +} +INIT_DEVICE_EXPORT(rt_hw_spiflash_init); +#endif /* BOARD_USING_STORAGE_SPIFLASH */ + +#if defined(BOARD_USING_STORAGE_SPINAND) && defined(NU_PKG_USING_SPINAND) + +#include "drv_qspi.h" +#include "spinand.h" + +struct rt_mtd_nand_device mtd_partitions[MTD_SPINAND_PARTITION_NUM] = +{ + [0] = + { + /*nand0: U-boot, env, rtthread*/ + .block_start = 0, + .block_end = 63, + .block_total = 64, + }, + [1] = + { + /*nand1: for filesystem mounting*/ + .block_start = 64, + .block_end = 4095, + .block_total = 4032, + }, + [2] = + { + /*nand2: Whole blocks size, overlay*/ + .block_start = 0, + .block_end = 4095, + .block_total = 4096, + } +}; + +static int rt_hw_spinand_init(void) +{ + if (nu_qspi_bus_attach_device("qspi0", "qspi01", 4, RT_NULL, RT_NULL) != RT_EOK) + return -1; + + if (rt_hw_mtd_spinand_register("qspi01") != RT_EOK) + return -1; + + return 0; +} + +INIT_DEVICE_EXPORT(rt_hw_spinand_init); +#endif + +#if defined(BOARD_USING_STORAGE_RAWNAND) && defined(BSP_USING_NFI) +struct rt_mtd_nand_device mtd_partitions_nfi[MTD_NFI_PARTITION_NUM] = +{ + [0] = + { + /*nand0: rtthread*/ + .block_start = 0, + .block_end = 63, + .block_total = 64, + }, + [1] = + { + /*nand1: for filesystem mounting*/ + .block_start = 64, + .block_end = 8191, + .block_total = 8128, + }, + [2] = + { + /*nand2: Whole blocks size, overlay*/ + .block_start = 0, + .block_end = 8191, + .block_total = 8192, + } +}; +#endif + +#if defined(BOARD_USING_NAU8822) && defined(NU_PKG_USING_NAU8822) +#include +S_NU_NAU8822_CONFIG sCodecConfig = +{ + .i2c_bus_name = "i2c1", + + .i2s_bus_name = "sound0", + + .pin_phonejack_en = NU_GET_PININDEX(NU_PC, 2), + + .pin_phonejack_det = NU_GET_PININDEX(NU_PC, 3), +}; + +int rt_hw_nau8822_port(void) +{ + if (nu_hw_nau8822_init(&sCodecConfig) != RT_EOK) + return -1; + + return 0; +} +INIT_COMPONENT_EXPORT(rt_hw_nau8822_port); +#endif /* BOARD_USING_NAU8822 */ + + +#if defined(BOARD_USING_SENSOR0) +#include "ccap_sensor.h" + +#define SENSOR0_RST_PIN NU_GET_PININDEX(NU_PM, 1) +#define SENSOR0_PD_PIN NU_GET_PININDEX(NU_PC, 12) + +ccap_sensor_io sIo_sensor0 = +{ + .RstPin = SENSOR0_RST_PIN, + .PwrDwnPin = SENSOR0_PD_PIN, + .I2cName = "i2c2" +}; +#endif /* BOARD_USING_SENSOR0 */ +int rt_hw_sensors_port(void) +{ +#if defined(BOARD_USING_SENSOR0) + nu_ccap_sensor_create(&sIo_sensor0, (ccap_sensor_id)BOARD_USING_SENSON0_ID, "sensor0"); +#endif + return 0; +} +INIT_COMPONENT_EXPORT(rt_hw_sensors_port); +void nu_rtp_sspcc_setup(void) +{ + /* PDMA2/3 */ + SSPCC_SET_REALM(SSPCC_PDMA2, SSPCC_SSET_SUBM); + SSPCC_SET_REALM(SSPCC_PDMA3, SSPCC_SSET_SUBM); +} + +static S_NU_REG s_NuReg_arr[] = +{ + /* QSPI0 */ + NUREG_EXPORT(CLK_CLKSEL4, CLK_CLKSEL4_QSPI0SEL_Msk, CLK_CLKSEL4_QSPI0SEL_PCLK0), + NUREG_EXPORT(CLK_APBCLK1, CLK_APBCLK1_QSPI0CKEN_Msk, CLK_APBCLK1_QSPI0CKEN_Msk), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD5MFP_Msk, SYS_GPD_MFPL_PD5MFP_QSPI0_MISO1), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD4MFP_Msk, SYS_GPD_MFPL_PD4MFP_QSPI0_MOSI1), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD3MFP_Msk, SYS_GPD_MFPL_PD3MFP_QSPI0_MISO0), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD2MFP_Msk, SYS_GPD_MFPL_PD2MFP_QSPI0_MOSI0), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD1MFP_Msk, SYS_GPD_MFPL_PD1MFP_QSPI0_CLK), + NUREG_EXPORT(SYS_GPD_MFPL, SYS_GPD_MFPL_PD0MFP_Msk, SYS_GPD_MFPL_PD0MFP_QSPI0_SS0), + + /* TIMERn */ + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR0CKEN_Msk, CLK_APBCLK0_TMR0CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR1CKEN_Msk, CLK_APBCLK0_TMR1CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR2CKEN_Msk, CLK_APBCLK0_TMR2CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR3CKEN_Msk, CLK_APBCLK0_TMR3CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR4CKEN_Msk, CLK_APBCLK0_TMR4CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR5CKEN_Msk, CLK_APBCLK0_TMR5CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR6CKEN_Msk, CLK_APBCLK0_TMR6CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR7CKEN_Msk, CLK_APBCLK0_TMR7CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR8CKEN_Msk, CLK_APBCLK0_TMR8CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR9CKEN_Msk, CLK_APBCLK0_TMR9CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR10CKEN_Msk, CLK_APBCLK0_TMR10CKEN_Msk), + NUREG_EXPORT(CLK_APBCLK0, CLK_APBCLK0_TMR11CKEN_Msk, CLK_APBCLK0_TMR11CKEN_Msk), + {0} +}; + +void nu_check_register(void) +{ + nu_sys_check_register(&s_NuReg_arr[0]); +} +MSH_CMD_EXPORT(nu_check_register, Check registers); diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.c b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.c new file mode 100644 index 0000000000..afdb55b5e5 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.c @@ -0,0 +1,476 @@ +/**************************************************************************** + * @file nutool_pincfg.c + * @version V1.24 + * @Date 2022/11/01-18:39:48 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2022 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +/******************** +MCU:MA35D16F787C(LQFP216) +********************/ + +#include "ma35d1.h" + +void nutool_pincfg_init_adc0(void) +{ + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB15MFP_Msk | SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk | SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB11MFP_Msk | SYS_GPB_MFPH_PB10MFP_Msk); + SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB15MFP_ADC0_CH7 | SYS_GPB_MFPH_PB14MFP_ADC0_CH6 | SYS_GPB_MFPH_PB13MFP_ADC0_CH5 | SYS_GPB_MFPH_PB12MFP_ADC0_CH4 | SYS_GPB_MFPH_PB11MFP_ADC0_CH3 | SYS_GPB_MFPH_PB10MFP_ADC0_CH2); + + PB->MODE &= ~(GPIO_MODE_MODE10_Msk | GPIO_MODE_MODE11_Msk | GPIO_MODE_MODE12_Msk | GPIO_MODE_MODE13_Msk | GPIO_MODE_MODE14_Msk | GPIO_MODE_MODE15_Msk); + GPIO_DISABLE_DIGITAL_PATH(PB, BIT10 | BIT11 | BIT12 | BIT13 | BIT14 | BIT15); + + return; +} + +void nutool_pincfg_deinit_adc0(void) +{ + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB15MFP_Msk | SYS_GPB_MFPH_PB14MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk | SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB11MFP_Msk | SYS_GPB_MFPH_PB10MFP_Msk); + + return; +} + +void nutool_pincfg_init_can1(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC7MFP_Msk | SYS_GPC_MFPL_PC6MFP_Msk); + SYS->GPC_MFPL |= (SYS_GPC_MFPL_PC7MFP_CAN1_TXD | SYS_GPC_MFPL_PC6MFP_CAN1_RXD); + + return; +} + +void nutool_pincfg_deinit_can1(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC7MFP_Msk | SYS_GPC_MFPL_PC6MFP_Msk); + + return; +} + +void nutool_pincfg_init_ccap0(void) +{ + SYS->GPK_MFPH &= ~(SYS_GPK_MFPH_PK11MFP_Msk | SYS_GPK_MFPH_PK10MFP_Msk | SYS_GPK_MFPH_PK9MFP_Msk); + SYS->GPK_MFPH |= (SYS_GPK_MFPH_PK11MFP_CCAP0_HSYNC | SYS_GPK_MFPH_PK10MFP_CCAP0_PIXCLK | SYS_GPK_MFPH_PK9MFP_CCAP0_SCLK); + SYS->GPM_MFPH &= ~(SYS_GPM_MFPH_PM11MFP_Msk | SYS_GPM_MFPH_PM10MFP_Msk | SYS_GPM_MFPH_PM9MFP_Msk | SYS_GPM_MFPH_PM8MFP_Msk); + SYS->GPM_MFPH |= (SYS_GPM_MFPH_PM11MFP_CCAP0_DATA9 | SYS_GPM_MFPH_PM10MFP_CCAP0_DATA8 | SYS_GPM_MFPH_PM9MFP_CCAP0_DATA7 | SYS_GPM_MFPH_PM8MFP_CCAP0_DATA6); + SYS->GPM_MFPL &= ~(SYS_GPM_MFPL_PM7MFP_Msk | SYS_GPM_MFPL_PM6MFP_Msk | SYS_GPM_MFPL_PM5MFP_Msk | SYS_GPM_MFPL_PM4MFP_Msk | SYS_GPM_MFPL_PM3MFP_Msk | SYS_GPM_MFPL_PM2MFP_Msk | SYS_GPM_MFPL_PM0MFP_Msk); + SYS->GPM_MFPL |= (SYS_GPM_MFPL_PM7MFP_CCAP0_DATA5 | SYS_GPM_MFPL_PM6MFP_CCAP0_DATA4 | SYS_GPM_MFPL_PM5MFP_CCAP0_DATA3 | SYS_GPM_MFPL_PM4MFP_CCAP0_DATA2 | SYS_GPM_MFPL_PM3MFP_CCAP0_DATA1 | SYS_GPM_MFPL_PM2MFP_CCAP0_DATA0 | SYS_GPM_MFPL_PM0MFP_CCAP0_VSYNC); + + return; +} + +void nutool_pincfg_deinit_ccap0(void) +{ + SYS->GPK_MFPH &= ~(SYS_GPK_MFPH_PK11MFP_Msk | SYS_GPK_MFPH_PK10MFP_Msk | SYS_GPK_MFPH_PK9MFP_Msk); + SYS->GPM_MFPH &= ~(SYS_GPM_MFPH_PM11MFP_Msk | SYS_GPM_MFPH_PM10MFP_Msk | SYS_GPM_MFPH_PM9MFP_Msk | SYS_GPM_MFPH_PM8MFP_Msk); + SYS->GPM_MFPL &= ~(SYS_GPM_MFPL_PM7MFP_Msk | SYS_GPM_MFPL_PM6MFP_Msk | SYS_GPM_MFPL_PM5MFP_Msk | SYS_GPM_MFPL_PM4MFP_Msk | SYS_GPM_MFPL_PM3MFP_Msk | SYS_GPM_MFPL_PM2MFP_Msk | SYS_GPM_MFPL_PM0MFP_Msk); + + return; +} + +void nutool_pincfg_init_hsusb0(void) +{ + SYS->GPF_MFPH &= ~(SYS_GPF_MFPH_PF15MFP_Msk); + SYS->GPF_MFPH |= (SYS_GPF_MFPH_PF15MFP_HSUSB0_VBUSVLD); + + return; +} + +void nutool_pincfg_deinit_hsusb0(void) +{ + SYS->GPF_MFPH &= ~(SYS_GPF_MFPH_PF15MFP_Msk); + + return; +} + +void nutool_pincfg_init_hsusbh(void) +{ + SYS->GPL_MFPH &= ~(SYS_GPL_MFPH_PL13MFP_Msk | SYS_GPL_MFPH_PL12MFP_Msk); + SYS->GPL_MFPH |= (SYS_GPL_MFPH_PL13MFP_HSUSBH_OVC | SYS_GPL_MFPH_PL12MFP_HSUSBH_PWREN); + + return; +} + +void nutool_pincfg_deinit_hsusbh(void) +{ + SYS->GPL_MFPH &= ~(SYS_GPL_MFPH_PL13MFP_Msk | SYS_GPL_MFPH_PL12MFP_Msk); + + return; +} + +void nutool_pincfg_init_i2c1(void) +{ + SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN5MFP_Msk | SYS_GPN_MFPL_PN4MFP_Msk); + SYS->GPN_MFPL |= (SYS_GPN_MFPL_PN5MFP_I2C1_SCL | SYS_GPN_MFPL_PN4MFP_I2C1_SDA); + + return; +} + +void nutool_pincfg_deinit_i2c1(void) +{ + SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN5MFP_Msk | SYS_GPN_MFPL_PN4MFP_Msk); + + return; +} + +void nutool_pincfg_init_i2c2(void) +{ + SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN1MFP_Msk | SYS_GPN_MFPL_PN0MFP_Msk); + SYS->GPN_MFPL |= (SYS_GPN_MFPL_PN1MFP_I2C2_SCL | SYS_GPN_MFPL_PN0MFP_I2C2_SDA); + + return; +} + +void nutool_pincfg_deinit_i2c2(void) +{ + SYS->GPN_MFPL &= ~(SYS_GPN_MFPL_PN1MFP_Msk | SYS_GPN_MFPL_PN0MFP_Msk); + + return; +} + +void nutool_pincfg_init_i2c4(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC1MFP_Msk | SYS_GPC_MFPL_PC0MFP_Msk); + SYS->GPC_MFPL |= (SYS_GPC_MFPL_PC1MFP_I2C4_SCL | SYS_GPC_MFPL_PC0MFP_I2C4_SDA); + + return; +} + +void nutool_pincfg_deinit_i2c4(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC1MFP_Msk | SYS_GPC_MFPL_PC0MFP_Msk); + + return; +} + +void nutool_pincfg_init_i2c5(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC5MFP_Msk | SYS_GPC_MFPL_PC4MFP_Msk); + SYS->GPC_MFPL |= (SYS_GPC_MFPL_PC5MFP_I2C5_SCL | SYS_GPC_MFPL_PC4MFP_I2C5_SDA); + + return; +} + +void nutool_pincfg_deinit_i2c5(void) +{ + SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC5MFP_Msk | SYS_GPC_MFPL_PC4MFP_Msk); + + return; +} + +void nutool_pincfg_init_i2s0(void) +{ + SYS->GPG_MFPH &= ~(SYS_GPG_MFPH_PG15MFP_Msk | SYS_GPG_MFPH_PG14MFP_Msk | SYS_GPG_MFPH_PG13MFP_Msk | SYS_GPG_MFPH_PG12MFP_Msk | SYS_GPG_MFPH_PG11MFP_Msk); + SYS->GPG_MFPH |= (SYS_GPG_MFPH_PG15MFP_I2S0_DO | SYS_GPG_MFPH_PG14MFP_I2S0_DI | SYS_GPG_MFPH_PG13MFP_I2S0_BCLK | SYS_GPG_MFPH_PG12MFP_I2S0_LRCK | SYS_GPG_MFPH_PG11MFP_I2S0_MCLK); + + return; +} + +void nutool_pincfg_deinit_i2s0(void) +{ + SYS->GPG_MFPH &= ~(SYS_GPG_MFPH_PG15MFP_Msk | SYS_GPG_MFPH_PG14MFP_Msk | SYS_GPG_MFPH_PG13MFP_Msk | SYS_GPG_MFPH_PG12MFP_Msk | SYS_GPG_MFPH_PG11MFP_Msk); + + return; +} + +void nutool_pincfg_init_nand(void) +{ + SYS->GPA_MFPH &= ~(SYS_GPA_MFPH_PA14MFP_Msk | SYS_GPA_MFPH_PA13MFP_Msk | SYS_GPA_MFPH_PA12MFP_Msk | SYS_GPA_MFPH_PA11MFP_Msk | SYS_GPA_MFPH_PA10MFP_Msk | SYS_GPA_MFPH_PA9MFP_Msk | SYS_GPA_MFPH_PA8MFP_Msk); + SYS->GPA_MFPH |= (SYS_GPA_MFPH_PA14MFP_NAND_nWP | SYS_GPA_MFPH_PA13MFP_NAND_nCS0 | SYS_GPA_MFPH_PA12MFP_NAND_ALE | SYS_GPA_MFPH_PA11MFP_NAND_CLE | SYS_GPA_MFPH_PA10MFP_NAND_nWE | SYS_GPA_MFPH_PA9MFP_NAND_nRE | SYS_GPA_MFPH_PA8MFP_NAND_RDY0); + SYS->GPA_MFPL &= ~(SYS_GPA_MFPL_PA7MFP_Msk | SYS_GPA_MFPL_PA6MFP_Msk | SYS_GPA_MFPL_PA5MFP_Msk | SYS_GPA_MFPL_PA4MFP_Msk | SYS_GPA_MFPL_PA3MFP_Msk | SYS_GPA_MFPL_PA2MFP_Msk | SYS_GPA_MFPL_PA1MFP_Msk | SYS_GPA_MFPL_PA0MFP_Msk); + SYS->GPA_MFPL |= (SYS_GPA_MFPL_PA7MFP_NAND_DATA7 | SYS_GPA_MFPL_PA6MFP_NAND_DATA6 | SYS_GPA_MFPL_PA5MFP_NAND_DATA5 | SYS_GPA_MFPL_PA4MFP_NAND_DATA4 | SYS_GPA_MFPL_PA3MFP_NAND_DATA3 | SYS_GPA_MFPL_PA2MFP_NAND_DATA2 | SYS_GPA_MFPL_PA1MFP_NAND_DATA1 | SYS_GPA_MFPL_PA0MFP_NAND_DATA0); + + return; +} + +void nutool_pincfg_deinit_nand(void) +{ + SYS->GPA_MFPH &= ~(SYS_GPA_MFPH_PA14MFP_Msk | SYS_GPA_MFPH_PA13MFP_Msk | SYS_GPA_MFPH_PA12MFP_Msk | SYS_GPA_MFPH_PA11MFP_Msk | SYS_GPA_MFPH_PA10MFP_Msk | SYS_GPA_MFPH_PA9MFP_Msk | SYS_GPA_MFPH_PA8MFP_Msk); + SYS->GPA_MFPL &= ~(SYS_GPA_MFPL_PA7MFP_Msk | SYS_GPA_MFPL_PA6MFP_Msk | SYS_GPA_MFPL_PA5MFP_Msk | SYS_GPA_MFPL_PA4MFP_Msk | SYS_GPA_MFPL_PA3MFP_Msk | SYS_GPA_MFPL_PA2MFP_Msk | SYS_GPA_MFPL_PA1MFP_Msk | SYS_GPA_MFPL_PA0MFP_Msk); + + return; +} + +void nutool_pincfg_init_qspi0(void) +{ + SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD5MFP_Msk | SYS_GPD_MFPL_PD4MFP_Msk | SYS_GPD_MFPL_PD3MFP_Msk | SYS_GPD_MFPL_PD2MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk | SYS_GPD_MFPL_PD0MFP_Msk); + SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD5MFP_QSPI0_MISO1 | SYS_GPD_MFPL_PD4MFP_QSPI0_MOSI1 | SYS_GPD_MFPL_PD3MFP_QSPI0_MISO0 | SYS_GPD_MFPL_PD2MFP_QSPI0_MOSI0 | SYS_GPD_MFPL_PD1MFP_QSPI0_CLK | SYS_GPD_MFPL_PD0MFP_QSPI0_SS0); + + GPIO_SetDrivingCtl(PD, (BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5), 4); + + return; +} + +void nutool_pincfg_deinit_qspi0(void) +{ + SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD5MFP_Msk | SYS_GPD_MFPL_PD4MFP_Msk | SYS_GPD_MFPL_PD3MFP_Msk | SYS_GPD_MFPL_PD2MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk | SYS_GPD_MFPL_PD0MFP_Msk); + + return; +} + +void nutool_pincfg_init_rgmii0(void) +{ + SYS->GPE_MFPH &= ~(SYS_GPE_MFPH_PE13MFP_Msk | SYS_GPE_MFPH_PE12MFP_Msk | SYS_GPE_MFPH_PE11MFP_Msk | SYS_GPE_MFPH_PE10MFP_Msk | SYS_GPE_MFPH_PE9MFP_Msk | SYS_GPE_MFPH_PE8MFP_Msk); + SYS->GPE_MFPH |= (SYS_GPE_MFPH_PE13MFP_RGMII0_TXD3 | SYS_GPE_MFPH_PE12MFP_RGMII0_TXD2 | SYS_GPE_MFPH_PE11MFP_RGMII0_TXCLK | SYS_GPE_MFPH_PE10MFP_RGMII0_RXD3 | SYS_GPE_MFPH_PE9MFP_RGMII0_RXD2 | SYS_GPE_MFPH_PE8MFP_RGMII0_RXD1); + SYS->GPE_MFPL &= ~(SYS_GPE_MFPL_PE7MFP_Msk | SYS_GPE_MFPL_PE6MFP_Msk | SYS_GPE_MFPL_PE5MFP_Msk | SYS_GPE_MFPL_PE4MFP_Msk | SYS_GPE_MFPL_PE3MFP_Msk | SYS_GPE_MFPL_PE2MFP_Msk | SYS_GPE_MFPL_PE1MFP_Msk | SYS_GPE_MFPL_PE0MFP_Msk); + SYS->GPE_MFPL |= (SYS_GPE_MFPL_PE7MFP_RGMII0_RXD0 | SYS_GPE_MFPL_PE6MFP_RGMII0_RXCTL | SYS_GPE_MFPL_PE5MFP_RGMII0_RXCLK | SYS_GPE_MFPL_PE4MFP_RGMII0_TXD1 | SYS_GPE_MFPL_PE3MFP_RGMII0_TXD0 | SYS_GPE_MFPL_PE2MFP_RGMII0_TXCTL | SYS_GPE_MFPL_PE1MFP_RGMII0_MDIO | SYS_GPE_MFPL_PE0MFP_RGMII0_MDC); + + /* RGMII Mode */ + SYS->GMAC0MISCR &= ~1; + + /* Set 1.8v */ + GPIO_SetPowerMode(PE, 0x3FFF, 0); + + GPIO_SetPullCtl(PE, 0x3FFF, GPIO_PUSEL_DISABLE); + + GPIO_SetSchmittTriggere(PE, 0x3FDF, 1); //except clk + + GPIO_SetSlewCtl(PE, 0x3FFF, GPIO_SLEWCTL_NORMAL); + + GPIO_SetDrivingCtl(PE, 0x3FFF, 1); + + return; +} + +void nutool_pincfg_deinit_rgmii0(void) +{ + SYS->GPE_MFPH &= ~(SYS_GPE_MFPH_PE13MFP_Msk | SYS_GPE_MFPH_PE12MFP_Msk | SYS_GPE_MFPH_PE11MFP_Msk | SYS_GPE_MFPH_PE10MFP_Msk | SYS_GPE_MFPH_PE9MFP_Msk | SYS_GPE_MFPH_PE8MFP_Msk); + SYS->GPE_MFPL &= ~(SYS_GPE_MFPL_PE7MFP_Msk | SYS_GPE_MFPL_PE6MFP_Msk | SYS_GPE_MFPL_PE5MFP_Msk | SYS_GPE_MFPL_PE4MFP_Msk | SYS_GPE_MFPL_PE3MFP_Msk | SYS_GPE_MFPL_PE2MFP_Msk | SYS_GPE_MFPL_PE1MFP_Msk | SYS_GPE_MFPL_PE0MFP_Msk); + + return; +} + +void nutool_pincfg_init_rmii1(void) +{ + SYS->GPF_MFPH &= ~(SYS_GPF_MFPH_PF9MFP_Msk | SYS_GPF_MFPH_PF8MFP_Msk); + SYS->GPF_MFPH |= (SYS_GPF_MFPH_PF9MFP_RMII1_RXERR | SYS_GPF_MFPH_PF8MFP_RMII1_RXD1); + SYS->GPF_MFPL &= ~(SYS_GPF_MFPL_PF7MFP_Msk | SYS_GPF_MFPL_PF6MFP_Msk | SYS_GPF_MFPL_PF5MFP_Msk | SYS_GPF_MFPL_PF4MFP_Msk | SYS_GPF_MFPL_PF3MFP_Msk | SYS_GPF_MFPL_PF2MFP_Msk | SYS_GPF_MFPL_PF1MFP_Msk | SYS_GPF_MFPL_PF0MFP_Msk); + SYS->GPF_MFPL |= (SYS_GPF_MFPL_PF7MFP_RMII1_RXD0 | SYS_GPF_MFPL_PF6MFP_RMII1_CRSDV | SYS_GPF_MFPL_PF5MFP_RMII1_REFCLK | SYS_GPF_MFPL_PF4MFP_RMII1_TXD1 | SYS_GPF_MFPL_PF3MFP_RMII1_TXD0 | SYS_GPF_MFPL_PF2MFP_RMII1_TXEN | SYS_GPF_MFPL_PF1MFP_RMII1_MDIO | SYS_GPF_MFPL_PF0MFP_RMII1_MDC); + + /* RMII Mode */ + SYS->GMAC1MISCR |= 1; + + return; +} + +void nutool_pincfg_deinit_rmii1(void) +{ + SYS->GPF_MFPH &= ~(SYS_GPF_MFPH_PF9MFP_Msk | SYS_GPF_MFPH_PF8MFP_Msk); + SYS->GPF_MFPL &= ~(SYS_GPF_MFPL_PF7MFP_Msk | SYS_GPF_MFPL_PF6MFP_Msk | SYS_GPF_MFPL_PF5MFP_Msk | SYS_GPF_MFPL_PF4MFP_Msk | SYS_GPF_MFPL_PF3MFP_Msk | SYS_GPF_MFPL_PF2MFP_Msk | SYS_GPF_MFPL_PF1MFP_Msk | SYS_GPF_MFPL_PF0MFP_Msk); + + return; +} + +void nutool_pincfg_init_sd1(void) +{ + SYS->GPJ_MFPH &= ~(SYS_GPJ_MFPH_PJ11MFP_Msk | SYS_GPJ_MFPH_PJ10MFP_Msk | SYS_GPJ_MFPH_PJ9MFP_Msk | SYS_GPJ_MFPH_PJ8MFP_Msk); + SYS->GPJ_MFPH |= (SYS_GPJ_MFPH_PJ11MFP_SD1_DAT3 | SYS_GPJ_MFPH_PJ10MFP_SD1_DAT2 | SYS_GPJ_MFPH_PJ9MFP_SD1_DAT1 | SYS_GPJ_MFPH_PJ8MFP_SD1_DAT0); + SYS->GPJ_MFPL &= ~(SYS_GPJ_MFPL_PJ7MFP_Msk | SYS_GPJ_MFPL_PJ6MFP_Msk | SYS_GPJ_MFPL_PJ5MFP_Msk); + SYS->GPJ_MFPL |= (SYS_GPJ_MFPL_PJ7MFP_SD1_CLK | SYS_GPJ_MFPL_PJ6MFP_SD1_CMD | SYS_GPJ_MFPL_PJ5MFP_SD1_nCD); + + return; +} + +void nutool_pincfg_deinit_sd1(void) +{ + SYS->GPJ_MFPH &= ~(SYS_GPJ_MFPH_PJ11MFP_Msk | SYS_GPJ_MFPH_PJ10MFP_Msk | SYS_GPJ_MFPH_PJ9MFP_Msk | SYS_GPJ_MFPH_PJ8MFP_Msk); + SYS->GPJ_MFPL &= ~(SYS_GPJ_MFPL_PJ7MFP_Msk | SYS_GPJ_MFPL_PJ6MFP_Msk | SYS_GPJ_MFPL_PJ5MFP_Msk); + + return; +} + +void nutool_pincfg_init_spi0(void) +{ + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB9MFP_Msk | SYS_GPB_MFPH_PB8MFP_Msk); + SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB9MFP_SPI0_CLK | SYS_GPB_MFPH_PB8MFP_SPI0_SS1); + SYS->GPL_MFPH &= ~(SYS_GPL_MFPH_PL15MFP_Msk | SYS_GPL_MFPH_PL14MFP_Msk); + SYS->GPL_MFPH |= (SYS_GPL_MFPH_PL15MFP_SPI0_MISO | SYS_GPL_MFPH_PL14MFP_SPI0_MOSI); + + return; +} + +void nutool_pincfg_deinit_spi0(void) +{ + SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB9MFP_Msk | SYS_GPB_MFPH_PB8MFP_Msk); + SYS->GPL_MFPH &= ~(SYS_GPL_MFPH_PL15MFP_Msk | SYS_GPL_MFPH_PL14MFP_Msk); + + return; +} + +void nutool_pincfg_init_spi2(void) +{ + SYS->GPG_MFPH &= ~(SYS_GPG_MFPH_PG10MFP_Msk | SYS_GPG_MFPH_PG9MFP_Msk | SYS_GPG_MFPH_PG8MFP_Msk); + SYS->GPG_MFPH |= (SYS_GPG_MFPH_PG10MFP_SPI2_MOSI | SYS_GPG_MFPH_PG9MFP_SPI2_CLK | SYS_GPG_MFPH_PG8MFP_SPI2_SS0); + SYS->GPK_MFPL &= ~(SYS_GPK_MFPL_PK4MFP_Msk); + SYS->GPK_MFPL |= (SYS_GPK_MFPL_PK4MFP_SPI2_MISO); + + return; +} + +void nutool_pincfg_deinit_spi2(void) +{ + SYS->GPG_MFPH &= ~(SYS_GPG_MFPH_PG10MFP_Msk | SYS_GPG_MFPH_PG9MFP_Msk | SYS_GPG_MFPH_PG8MFP_Msk); + SYS->GPK_MFPL &= ~(SYS_GPK_MFPL_PK4MFP_Msk); + + return; +} + +void nutool_pincfg_init_uart0(void) +{ + SYS->GPE_MFPH &= ~(SYS_GPE_MFPH_PE15MFP_Msk | SYS_GPE_MFPH_PE14MFP_Msk); + SYS->GPE_MFPH |= (SYS_GPE_MFPH_PE15MFP_UART0_RXD | SYS_GPE_MFPH_PE14MFP_UART0_TXD); + + return; +} + +void nutool_pincfg_deinit_uart0(void) +{ + SYS->GPE_MFPH &= ~(SYS_GPE_MFPH_PE15MFP_Msk | SYS_GPE_MFPH_PE14MFP_Msk); + + return; +} + +void nutool_pincfg_init_uart10(void) +{ + SYS->GPH_MFPL &= ~(SYS_GPH_MFPL_PH7MFP_Msk | SYS_GPH_MFPL_PH6MFP_Msk | SYS_GPH_MFPL_PH5MFP_Msk | SYS_GPH_MFPL_PH4MFP_Msk); + SYS->GPH_MFPL |= (SYS_GPH_MFPL_PH7MFP_UART10_TXD | SYS_GPH_MFPL_PH6MFP_UART10_RXD | SYS_GPH_MFPL_PH5MFP_UART10_nRTS | SYS_GPH_MFPL_PH4MFP_UART10_nCTS); + + return; +} + +void nutool_pincfg_deinit_uart10(void) +{ + SYS->GPH_MFPL &= ~(SYS_GPH_MFPL_PH7MFP_Msk | SYS_GPH_MFPL_PH6MFP_Msk | SYS_GPH_MFPL_PH5MFP_Msk | SYS_GPH_MFPL_PH4MFP_Msk); + + return; +} + +void nutool_pincfg_init_uart12(void) +{ + SYS->GPC_MFPH &= ~(SYS_GPC_MFPH_PC15MFP_Msk | SYS_GPC_MFPH_PC14MFP_Msk | SYS_GPC_MFPH_PC13MFP_Msk); + SYS->GPC_MFPH |= (SYS_GPC_MFPH_PC15MFP_UART12_TXD | SYS_GPC_MFPH_PC14MFP_UART12_RXD | SYS_GPC_MFPH_PC13MFP_UART12_nRTS); + + return; +} + +void nutool_pincfg_deinit_uart12(void) +{ + SYS->GPC_MFPH &= ~(SYS_GPC_MFPH_PC15MFP_Msk | SYS_GPC_MFPH_PC14MFP_Msk | SYS_GPC_MFPH_PC13MFP_Msk); + + return; +} + +void nutool_pincfg_init_uart13(void) +{ + SYS->GPH_MFPH &= ~(SYS_GPH_MFPH_PH13MFP_Msk | SYS_GPH_MFPH_PH12MFP_Msk); + SYS->GPH_MFPH |= (SYS_GPH_MFPH_PH13MFP_UART13_TXD | SYS_GPH_MFPH_PH12MFP_UART13_RXD); + + return; +} + +void nutool_pincfg_deinit_uart13(void) +{ + SYS->GPH_MFPH &= ~(SYS_GPH_MFPH_PH13MFP_Msk | SYS_GPH_MFPH_PH12MFP_Msk); + + return; +} + +void nutool_pincfg_init_uart14(void) +{ + SYS->GPH_MFPH &= ~(SYS_GPH_MFPH_PH15MFP_Msk | SYS_GPH_MFPH_PH14MFP_Msk); + SYS->GPH_MFPH |= (SYS_GPH_MFPH_PH15MFP_UART14_TXD | SYS_GPH_MFPH_PH14MFP_UART14_RXD); + + return; +} + +void nutool_pincfg_deinit_uart14(void) +{ + SYS->GPH_MFPH &= ~(SYS_GPH_MFPH_PH15MFP_Msk | SYS_GPH_MFPH_PH14MFP_Msk); + + return; +} + +void nutool_pincfg_init(void) +{ + //SYS->GPA_MFPH = 0x06666666UL; + //SYS->GPA_MFPL = 0x66666666UL; + //SYS->GPB_MFPH = 0x88888855UL; + //SYS->GPC_MFPH = 0x22200000UL; + //SYS->GPC_MFPL = 0x33440044UL; + //SYS->GPD_MFPH = 0x00000000UL; + //SYS->GPD_MFPL = 0x00555555UL; + //SYS->GPE_MFPH = 0x11888888UL; + //SYS->GPE_MFPL = 0x88888888UL; + //SYS->GPF_MFPH = 0x10000099UL; + //SYS->GPF_MFPL = 0x99999999UL; + //SYS->GPG_MFPH = 0x55555555UL; + //SYS->GPG_MFPL = 0x00000000UL; + //SYS->GPH_MFPH = 0x22330000UL; + //SYS->GPH_MFPL = 0x22220000UL; + //SYS->GPI_MFPH = 0x00000000UL; + //SYS->GPJ_MFPH = 0x00006666UL; + //SYS->GPJ_MFPL = 0x66600000UL; + //SYS->GPK_MFPH = 0x00006660UL; + //SYS->GPK_MFPL = 0x00050000UL; + //SYS->GPL_MFPH = 0x55990000UL; + //SYS->GPM_MFPH = 0x00006666UL; + //SYS->GPM_MFPL = 0x66666606UL; + //SYS->GPN_MFPH = 0x00000000UL; + //SYS->GPN_MFPL = 0x00440044UL; + + nutool_pincfg_init_adc0(); + nutool_pincfg_init_can1(); + nutool_pincfg_init_ccap0(); + nutool_pincfg_init_hsusb0(); + nutool_pincfg_init_hsusbh(); + nutool_pincfg_init_i2c1(); + nutool_pincfg_init_i2c2(); + nutool_pincfg_init_i2c4(); + nutool_pincfg_init_i2c5(); + nutool_pincfg_init_i2s0(); + nutool_pincfg_init_nand(); + nutool_pincfg_init_qspi0(); + nutool_pincfg_init_rgmii0(); + nutool_pincfg_init_rmii1(); + nutool_pincfg_init_sd1(); + nutool_pincfg_init_spi0(); + nutool_pincfg_init_spi2(); + nutool_pincfg_init_uart0(); + nutool_pincfg_init_uart10(); + nutool_pincfg_init_uart12(); + nutool_pincfg_init_uart13(); + nutool_pincfg_init_uart14(); + + return; +} + +void nutool_pincfg_deinit(void) +{ + nutool_pincfg_deinit_adc0(); + nutool_pincfg_deinit_can1(); + nutool_pincfg_deinit_ccap0(); + nutool_pincfg_deinit_hsusb0(); + nutool_pincfg_deinit_hsusbh(); + nutool_pincfg_deinit_i2c1(); + nutool_pincfg_deinit_i2c2(); + nutool_pincfg_deinit_i2c4(); + nutool_pincfg_deinit_i2c5(); + nutool_pincfg_deinit_i2s0(); + nutool_pincfg_deinit_nand(); + nutool_pincfg_deinit_qspi0(); + nutool_pincfg_deinit_rgmii0(); + nutool_pincfg_deinit_rmii1(); + nutool_pincfg_deinit_sd1(); + nutool_pincfg_deinit_spi0(); + nutool_pincfg_deinit_spi2(); + nutool_pincfg_deinit_uart0(); + nutool_pincfg_deinit_uart10(); + nutool_pincfg_deinit_uart12(); + nutool_pincfg_deinit_uart13(); + nutool_pincfg_deinit_uart14(); + + return; +} + +/*** (C) COPYRIGHT 2013-2022 Nuvoton Technology Corp. ***/ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.cfg b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.cfg new file mode 100644 index 0000000000..fd9b1bfea2 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.cfg @@ -0,0 +1,299 @@ +/**************************************************************************** + * @file nutool_pincfg.cfg + * @version V1.24 + * @Date 2022/11/01-18:39:49 + * @brief NuMicro config file + * + * @note Please do not modify this file. + * Otherwise, it may not be loaded successfully. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2022 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ +MCU:MA35D16F787C(LQFP216) +Pin1:nRESET +Pin2:HSUSB0_ID +Pin3:HSUSB0_VBUSVLD +Pin4:HSUSBH_PWREN +Pin5:HSUSBH_OVC +Pin6:SPI0_MOSI +Pin7:SPI0_MISO +Pin8:VDD_OTP +Pin9:RTC_RPWR +Pin10:VBAT +Pin11:RTC_nRWAKE +Pin12:X32_IN +Pin13:X32_OUT +Pin14:VDD_HSUSB1 +Pin15:HSUSB1_D- +Pin16:HSUSB1_D+ +Pin17:VDD_CORE +Pin18:VDD_HSUSB1 +Pin19:HSUSB0_D- +Pin20:HSUSB0_D+ +Pin21:VDD_CORE +Pin22:VDD_HSUSB0 +Pin23:VDD_CORE +Pin24:NAND_DATA0 +Pin25:NAND_DATA1 +Pin26:NAND_DATA2 +Pin27:NAND_DATA3 +Pin28:NAND_DATA4 +Pin29:NAND_DATA5 +Pin30:NAND_DATA6 +Pin31:NAND_DATA7 +Pin32:NAND_RDY0 +Pin33:NAND_nRE +Pin34:NAND_nWE +Pin35:NAND_CLE +Pin36:NAND_ALE +Pin37:NAND_nCS0 +Pin38:VDDIO1 +Pin39:NAND_nWP +Pin40:PG.0 +Pin41:PA.15 +Pin42:PG.1 +Pin43:PG.2 +Pin44:PG.3 +Pin45:PG.4 +Pin46:PG.5 +Pin47:PG.6 +Pin48:PG.7 +Pin49:VDD_CORE +Pin50:I2S0_MCLK +Pin51:I2S0_LRCK +Pin52:I2S0_BCLK +Pin53:I2S0_DI +Pin54:I2S0_DO +Pin55:VDD_CORE +Pin56:UART0_TXD +Pin57:UART0_RXD +Pin58:PD.6 +Pin59:PD.7 +Pin60:PD.8 +Pin61:PD.9 +Pin62:PD.10 +Pin63:PD.11 +Pin64:VDDIO1 +Pin65:CCAP0_SCLK +Pin66:CCAP0_PIXCLK +Pin67:CCAP0_HSYNC +Pin68:CCAP0_VSYNC +Pin69:PM.1 +Pin70:CCAP0_DATA0 +Pin71:CCAP0_DATA1 +Pin72:CCAP0_DATA2 +Pin73:CCAP0_DATA3 +Pin74:CCAP0_DATA4 +Pin75:CCAP0_DATA5 +Pin76:VDDIO2 +Pin77:CCAP0_DATA6 +Pin78:CCAP0_DATA7 +Pin79:CCAP0_DATA8 +Pin80:CCAP0_DATA9 +Pin81:VDD_CORE +Pin82:PJ.4 +Pin83:SD1_nCD +Pin84:VDDIO3 +Pin85:SD1_CMD +Pin86:SD1_CLK +Pin87:SD1_DAT0 +Pin88:SD1_DAT1 +Pin89:SD1_DAT2 +Pin90:SD1_DAT3 +Pin91:SPI2_SS0 +Pin92:SPI2_CLK +Pin93:SPI2_MOSI +Pin94:SPI2_MISO +Pin95:PI.8 +Pin96:PI.9 +Pin97:PI.10 +Pin98:PI.11 +Pin99:PI.12 +Pin100:PI.13 +Pin101:PI.14 +Pin102:PI.15 +Pin103:PH.0 +Pin104:PH.1 +Pin105:PH.2 +Pin106:VDDIO4 +Pin107:PH.3 +Pin108:UART10_nCTS +Pin109:UART10_nRTS +Pin110:UART10_RXD +Pin111:UART10_TXD +Pin112:PC.12 +Pin113:UART12_nRTS +Pin114:UART12_RXD +Pin115:UART12_TXD +Pin116:UART13_RXD +Pin117:UART13_TXD +Pin118:UART14_RXD +Pin119:UART14_TXD +Pin120:VDD_CORE +Pin121:VDDIO5 +Pin122:QSPI0_SS0 +Pin123:QSPI0_CLK +Pin124:QSPI0_MOSI0 +Pin125:QSPI0_MISO0 +Pin126:QSPI0_MOSI1 +Pin127:QSPI0_MISO1 +Pin128:VSS +Pin129:MVDD +Pin130:MVDD +Pin131:VDD_CORE +Pin132:MVDD_DPHYPLL +Pin133:MZQ_SDRAM +Pin134:MZQ_DDRPHY +Pin135:MVDD +Pin136:MVREF +Pin137:VDD_CORE +Pin138:MVDD +Pin139:MVDD_DPHYPLL +Pin140:VDD_CORE +Pin141:MVDD +Pin142:I2C4_SDA +Pin143:I2C4_SCL +Pin144:PC.2 +Pin145:PC.3 +Pin146:I2C5_SDA +Pin147:I2C5_SCL +Pin148:VDDIO6 +Pin149:CAN1_RXD +Pin150:CAN1_TXD +Pin151:VDD_CORE +Pin152:I2C2_SDA +Pin153:I2C2_SCL +Pin154:PN.2 +Pin155:PN.3 +Pin156:I2C1_SDA +Pin157:I2C1_SCL +Pin158:VDDIO7 +Pin159:PN.6 +Pin160:PN.7 +Pin161:PN.10 +Pin162:PN.11 +Pin163:PN.12 +Pin164:PN.13 +Pin165:PN.14 +Pin166:PN.15 +Pin167:PK.12 +Pin168:AVDDL_PLL0 +Pin169:XT1_IN +Pin170:XT1_OUT +Pin171:VDDIO10 +Pin172:AVDDL_PLL1 +Pin173:VDD_PLL1 +Pin174:AVDDH_PLL2 +Pin175:RGMII0_MDC +Pin176:RGMII0_MDIO +Pin177:RGMII0_TXCTL +Pin178:RGMII0_TXD0 +Pin179:VDDIO8 +Pin180:VDD_CORE +Pin181:RGMII0_TXD1 +Pin182:RGMII0_RXCLK +Pin183:RGMII0_RXCTL +Pin184:RGMII0_RXD0 +Pin185:RGMII0_RXD1 +Pin186:RGMII0_RXD2 +Pin187:RGMII0_RXD3 +Pin188:RGMII0_TXCLK +Pin189:RGMII0_TXD2 +Pin190:RGMII0_TXD3 +Pin191:VDDIO9 +Pin192:RMII1_MDC +Pin193:RMII1_MDIO +Pin194:RMII1_TXEN +Pin195:RMII1_TXD0 +Pin196:RMII1_TXD1 +Pin197:RMII1_REFCLK +Pin198:RMII1_CRSDV +Pin199:RMII1_RXD0 +Pin200:RMII1_RXD1 +Pin201:RMII1_RXERR +Pin202:VDD_CORE +Pin203:AVDD_EADC0 +Pin204:SPI0_SS1 +Pin205:SPI0_CLK +Pin206:ADC0_CH2 +Pin207:ADC0_CH3 +Pin208:AVDD_ADC0 +Pin209:AVSS +Pin210:VDD_CORE +Pin211:ADC0_CH4 +Pin212:ADC0_CH5 +Pin213:ADC0_CH6 +Pin214:ADC0_CH7 +Pin215:VDDIO0 +Pin216:VDD_CORE +GPIOpin:143 +GPIOpin:144 +GPIOpin:153 +GPIOpin:154 +GPIOpin:158 +GPIOpin:159 +GPIOpin:160 +GPIOpin:161 +GPIOpin:162 +GPIOpin:163 +GPIOpin:165 +GPIOpin:39 +GPIOpin:47 +GPIOpin:40 +GPIOpin:41 +GPIOpin:42 +GPIOpin:43 +GPIOpin:44 +GPIOpin:45 +GPIOpin:46 +GPIOpin:57 +GPIOpin:58 +GPIOpin:59 +GPIOpin:60 +GPIOpin:61 +GPIOpin:62 +GPIOpin:68 +GPIOpin:94 +GPIOpin:95 +GPIOpin:96 +GPIOpin:97 +GPIOpin:98 +GPIOpin:99 +GPIOpin:100 +GPIOpin:101 +GPIOpin:102 +GPIOpin:103 +GPIOpin:104 +GPIOpin:106 +GPIOpin:111 +GPIOpin:164 +GPIOpin:166 +GPIOpin:81 +SYS->GPA_MFPH = 0x06666666 +SYS->GPA_MFPL = 0x66666666 +SYS->GPB_MFPH = 0x88888855 +SYS->GPC_MFPH = 0x22200000 +SYS->GPC_MFPL = 0x33440044 +SYS->GPD_MFPH = 0x00000000 +SYS->GPD_MFPL = 0x00555555 +SYS->GPE_MFPH = 0x11888888 +SYS->GPE_MFPL = 0x88888888 +SYS->GPF_MFPH = 0x10000099 +SYS->GPF_MFPL = 0x99999999 +SYS->GPG_MFPH = 0x55555555 +SYS->GPG_MFPL = 0x00000000 +SYS->GPH_MFPH = 0x22330000 +SYS->GPH_MFPL = 0x22220000 +SYS->GPI_MFPH = 0x00000000 +SYS->GPJ_MFPH = 0x00006666 +SYS->GPJ_MFPL = 0x66600000 +SYS->GPK_MFPH = 0x00006660 +SYS->GPK_MFPL = 0x00050000 +SYS->GPL_MFPH = 0x55990000 +SYS->GPM_MFPH = 0x00006666 +SYS->GPM_MFPL = 0x66666606 +SYS->GPN_MFPH = 0x00000000 +SYS->GPN_MFPL = 0x00440044 +/*** (C) COPYRIGHT 2013-2022 Nuvoton Technology Corp. ***/ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.h b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.h new file mode 100644 index 0000000000..e2db815fca --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/board/nutool_pincfg/nutool_pincfg.h @@ -0,0 +1,90 @@ +/**************************************************************************** + * @file nutool_pincfg.h + * @version V1.24 + * @Date 2022/11/01-18:39:48 + * @brief NuMicro generated code file + * + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (C) 2013-2022 Nuvoton Technology Corp. All rights reserved. +*****************************************************************************/ + +#ifndef __NUTOOL_PINCFG_H__ +#define __NUTOOL_PINCFG_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif +void nutool_pincfg_init_adc0(void); +void nutool_pincfg_deinit_adc0(void); +void nutool_pincfg_init_can1(void); +void nutool_pincfg_deinit_can1(void); +void nutool_pincfg_init_ccap0(void); +void nutool_pincfg_deinit_ccap0(void); +void nutool_pincfg_init_hsusb0(void); +void nutool_pincfg_deinit_hsusb0(void); +void nutool_pincfg_init_hsusbh(void); +void nutool_pincfg_deinit_hsusbh(void); +void nutool_pincfg_init_i2c1(void); +void nutool_pincfg_deinit_i2c1(void); +void nutool_pincfg_init_i2c2(void); +void nutool_pincfg_deinit_i2c2(void); +void nutool_pincfg_init_i2c4(void); +void nutool_pincfg_deinit_i2c4(void); +void nutool_pincfg_init_i2c5(void); +void nutool_pincfg_deinit_i2c5(void); +void nutool_pincfg_init_i2s0(void); +void nutool_pincfg_deinit_i2s0(void); +void nutool_pincfg_init_nand(void); +void nutool_pincfg_deinit_nand(void); +void nutool_pincfg_init_pa(void); +void nutool_pincfg_deinit_pa(void); +void nutool_pincfg_init_pc(void); +void nutool_pincfg_deinit_pc(void); +void nutool_pincfg_init_pd(void); +void nutool_pincfg_deinit_pd(void); +void nutool_pincfg_init_pg(void); +void nutool_pincfg_deinit_pg(void); +void nutool_pincfg_init_ph(void); +void nutool_pincfg_deinit_ph(void); +void nutool_pincfg_init_pi(void); +void nutool_pincfg_deinit_pi(void); +void nutool_pincfg_init_pj(void); +void nutool_pincfg_deinit_pj(void); +void nutool_pincfg_init_pk(void); +void nutool_pincfg_deinit_pk(void); +void nutool_pincfg_init_pm(void); +void nutool_pincfg_deinit_pm(void); +void nutool_pincfg_init_pn(void); +void nutool_pincfg_deinit_pn(void); +void nutool_pincfg_init_qspi0(void); +void nutool_pincfg_deinit_qspi0(void); +void nutool_pincfg_init_rgmii0(void); +void nutool_pincfg_deinit_rgmii0(void); +void nutool_pincfg_init_rmii1(void); +void nutool_pincfg_deinit_rmii1(void); +void nutool_pincfg_init_sd1(void); +void nutool_pincfg_deinit_sd1(void); +void nutool_pincfg_init_spi0(void); +void nutool_pincfg_deinit_spi0(void); +void nutool_pincfg_init_spi2(void); +void nutool_pincfg_deinit_spi2(void); +void nutool_pincfg_init_uart0(void); +void nutool_pincfg_deinit_uart0(void); +void nutool_pincfg_init_uart10(void); +void nutool_pincfg_deinit_uart10(void); +void nutool_pincfg_init_uart12(void); +void nutool_pincfg_deinit_uart12(void); +void nutool_pincfg_init_uart13(void); +void nutool_pincfg_deinit_uart13(void); +void nutool_pincfg_init_uart14(void); +void nutool_pincfg_deinit_uart14(void); +void nutool_pincfg_init(void); +void nutool_pincfg_deinit(void); +#ifdef __cplusplus +} +#endif +#endif /*__NUTOOL_PINCFG_H__*/ + +/*** (C) COPYRIGHT 2013-2022 Nuvoton Technology Corp. ***/ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_B.png b/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_B.png new file mode 100644 index 0000000000..a9efb6dddf Binary files /dev/null and b/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_B.png differ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_F.png b/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_F.png new file mode 100644 index 0000000000..e690302e47 Binary files /dev/null and b/bsp/nuvoton/numaker-iot-ma35d1/figures/NuMaker-IoT-MA35D1_F.png differ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/figures/SerialSetting.png b/bsp/nuvoton/numaker-iot-ma35d1/figures/SerialSetting.png new file mode 100644 index 0000000000..7ab04331be Binary files /dev/null and b/bsp/nuvoton/numaker-iot-ma35d1/figures/SerialSetting.png differ diff --git a/bsp/nuvoton/numaker-iot-ma35d1/linking_scripts/aarch32.ld b/bsp/nuvoton/numaker-iot-ma35d1/linking_scripts/aarch32.ld new file mode 100644 index 0000000000..8dad35f515 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/linking_scripts/aarch32.ld @@ -0,0 +1,134 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +SECTIONS +{ + ".usbhostlib" 0x28000000 (NOLOAD): + { + . = ALIGN(4) ; + *(.usbhostlib.*) + } + + . = 0x80400000; + + __text_start = .; + .text : + { + KEEP(*(.text.entrypoint)) /* The entry point */ + *(.vectors) + *(.text) + *(.text.*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for modules */ + . = ALIGN(4); + __rtmsymtab_start = .; + KEEP(*(RTMSymTab)) + __rtmsymtab_end = .; + + /* section information for initialization */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + /* section information for utest */ + . = ALIGN(4); + __rt_utest_tc_tab_start = .; + KEEP(*(UtestTcTab)) + __rt_utest_tc_tab_end = .; + . = ALIGN(4); + + } =0 + __text_end = .; + + . = ALIGN(4); + + __exidx_start = .; + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + __exidx_end = .; + + . = ALIGN(4); + + __rodata_start = .; + .rodata : { *(.rodata) *(.rodata.*) } + __rodata_end = .; + + . = ALIGN(4); + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(__ctors_end__ = .); + } + + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + } + + . = ALIGN(16 * 1024); + .l1_page_table : + { + __l1_page_table_start = .; + . += 16K; + } + + . = ALIGN(8); + __data_start = .; + .data : + { + *(.data) + *(.data.*) + } + __data_end = .; + + . = ALIGN(8); + __bss_start = .; + .bss : + { + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + } + . = ALIGN(4); + __bss_end = .; + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += 0x400; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + _end = .; +} diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/README.md b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/README.md new file mode 100644 index 0000000000..460be71a00 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/README.md @@ -0,0 +1,87 @@ +# **nuwriter_scripts** + +Some scripts can help you program firmware into storages in this folder. + +## **Requirement** + +### [Python3 for Window](https://www.python.org/downloads/windows/) + +After installing Python3, some plug-in as below must be installed. + +```bash +pip3 install pyusb usb crypto ecdsa crcmod tqdm pycryptodome +``` + +Notice: + +- Tested python3 version is 3.10.1. +- Please remember to add Python to PATH environment variable. + +### [Libusb for Window](http://sourceforge.net/projects/libusb/files/libusb-1.0/libusb-1.0.20/libusb-1.0.20.7z/download) + +On Windows platform, it is required to install libusb manually. + +```bash +Step 1: Download the library extract the download file. +Step 2: Copy MS64\dll\libusb-1.0.dll to C:\Windows\System32. +Step 3: Copy MS64\dll\libusb-1.0.lib to C:\Users\\AppData\Local\Programs\Python\\Lib. +``` + +### [USB Driver for Window](https://github.com/OpenNuvoton/MA35D1_NuWriter/blob/master/driver/WinUSB4NuVCOM.exe?raw=true) + +NuWriter must install **WinUSB4NuVCOM.exe** on the computer. + +## **Double-click Scripts for Windows** + +If your NuWriter_MA35 python running is ready, you can do following batch script files for Window directly. + +### **nuwriter_ddr2_128mb_download_and_run.bat** or **nuwriter_ddr3_512mb_download_and_run.bat** + +Download rtthread.bin binary file into DDR. The address is 0x80400000. + +### **nuwriter_sd_programming.bat** + +Program header, DDR timing setting and rtthread.bin binary file into SD card or EMMC. + +### **nuwriter_spinand_programming.bat** + +Program header, DDR timing setting and rtthread.bin binary file into SPI NAND flash. + +### **nuwriter_nand_programming.bat** + +Program header, DDR timing setting and rtthread.bin binary file into NAND flash. + +## **Troubleshoot** + +### **Fail to create symbolic folder** + +```bash +Create symbolic folder conv failed +``` + +- To switch **Developer Mode** in Window. To enter [Settings], [Update & Security], [For developers], [Developer Mode] page, then set it **On** +- Use **Administrator** permission to install python3, libusb and utilities. + +### **Use NuWriter_MA35.exe** + +Due to the python execution file size and saving network bandwidth, we just only release the python code in this repository. We also provide [NuWriter_MA35.exe](https://github.com/OpenNuvoton/MA35D1_NuWriter/blob/master/EXE/NuWriter_MA35.exe?raw=true) python execution. You can run the packaged app without installing a Python interpreter or any modules. You can use **NuWriter_MA35.exe** and do some modification. + +```bash +To modify "py -3 nuwriter.py" to "NuWriter_MA35.exe" +``` + +For example, the **nuwriter_ddr_download_and_run.bat** modification is as following: + +```bash +:forever_develop +NuWriter_MA35.exe -a ddrimg\enc_ddr3_winbond_256mb.bin +IF %ERRORLEVEL% EQU 0 ( + NuWriter_MA35.exe -o execute -w ddr 0x80400000 ..\rtthread.bin +) +pause +goto :forever_develop +``` + +## **See also** + +[NuWriter Repository](https://github.com/OpenNuvoton/MA35D1_NuWriter) diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/UnpackImage.py b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/UnpackImage.py new file mode 100644 index 0000000000..113f6fe307 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/UnpackImage.py @@ -0,0 +1,65 @@ +# NOTE: This script is test under Python 3.x + +__copyright__ = "Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved" + +import sys +import crcmod + + +class UnpackImage: + + def __init__(self, pack_file_name, nocrc): + self.img_list = [] + try: + with open(pack_file_name, "rb") as pack_file: + self.pack_data = pack_file.read() + except (IOError, OSError) as err: + print(f"Open {pack_file_name} failed") + sys.exit(err) + + if self.pack_data[0:4] != b'\x20\x54\x56\x4e': + print(f"{pack_file_name} marker check failed") + sys.exit(0) + + print("Waiting for unpack Images ...") + if nocrc == 0: + print("check pack file crc32 ...") + crc32_func = crcmod.predefined.mkCrcFun('crc-32') + checksum = crc32_func(self.pack_data[8:]) + if checksum != int.from_bytes(self.pack_data[4:8], byteorder='little'): + print(f"{pack_file_name} CRC check failed") + sys.exit(0) + self.image_cnt = int.from_bytes(self.pack_data[8:12], byteorder='little') + # 1st image descriptor begins @ 0x10 + index = 0x10 + for _ in range(self.image_cnt): + # Put the image length, offset ,attribute in list + self.img_list.append([int.from_bytes(self.pack_data[index: index + 8], byteorder='little'), + int.from_bytes(self.pack_data[index + 8: index + 16], byteorder='little'), + int.from_bytes(self.pack_data[index + 16: index + 20], byteorder='little'), + index + 24]) + index += int.from_bytes(self.pack_data[index: index + 8], byteorder='little') + 24 # 24 is image header + if index % 16 != 0: + index += 16 - (index & 0xF) # round to 16-byte align + + def img_count(self): + return self.image_cnt + + def img_attr(self, index): + if index < self.image_cnt: + # No need to return the last entry, actual offset in image file. + # And should return integers instead of list of integer here + return self.img_list[index][0], self.img_list[index][1], self.img_list[index][2] + else: + print("Invalid image index") + return 0, 0, 0 + + def img_content(self, index, offset, size): + if index >= self.image_cnt: + print("Invalid image index") + return '' + if offset > self.img_list[index][0] or offset + size > self.img_list[index][0]: + print("Invalid offset") + return '' + + return self.pack_data[self.img_list[index][3] + offset: self.img_list[index][3] + offset + size] diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_header_bin.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_header_bin.bat new file mode 100644 index 0000000000..90242c39c5 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_header_bin.bat @@ -0,0 +1,2 @@ +py -3 nuwriter.py -c header-nand.json +pause diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_pack_bin.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_pack_bin.bat new file mode 100644 index 0000000000..80110b5deb --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/_nuwriter_nand_generate_pack_bin.bat @@ -0,0 +1,2 @@ +py -3 nuwriter.py -p pack-nand.json +pause \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-nand.json b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-nand.json new file mode 100644 index 0000000000..8254d60386 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-nand.json @@ -0,0 +1,36 @@ +{ + "header": + { + "version": "0x20210119", + "spiinfo": + { + "pagesize": "2048", + "sparearea": "64", + "pageperblk": "64", + "quadread": "0x6B", + "readsts": "0x05", + "writests": "0x01", + "stsvalue": "0x02", + "dummy1": "0", + "dummy2": "1", + "suspintvl": "1" + }, + "secureboot": "no", + "entrypoint": "0x80400000", + "image": + [ + { + "offset": "0x20000", + "loadaddr": "0x28030000", + "type": "2", + "file": "ddrimg/enc_ddr3_winbond_512mb.bin" + }, + { + "offset": "0x80000", + "loadaddr": "0x80400000", + "type": "4", + "file": "../rtthread.bin" + } + ] + } +} diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-sd.json b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-sd.json new file mode 100644 index 0000000000..f732fb8098 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/header-sd.json @@ -0,0 +1,36 @@ +{ + "header": + { + "version": "0x20210119", + "spiinfo": + { + "pagesize": "2048", + "sparearea": "64", + "pageperblk": "64", + "quadread": "0x6B", + "readsts": "0x05", + "writests": "0x01", + "stsvalue": "0x02", + "dummy1": "0", + "dummy2": "1", + "suspintvl": "1" + }, + "secureboot": "no", + "entrypoint": "0x80400000", + "image": + [ + { + "offset": "0x1000", + "loadaddr": "0x28030000", + "type": "2", + "file": "ddrimg/enc_ddr3_winbond_512mb.bin" + }, + { + "offset": "0x4000", + "loadaddr": "0x80400000", + "type": "4", + "file": "../rtthread.bin" + } + ] + } +} diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter.py b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter.py new file mode 100644 index 0000000000..60ae52747b --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter.py @@ -0,0 +1,1942 @@ +# NOTE: This script is test under Python 3.x + +__copyright__ = "Copyright (C) 2020~2021 Nuvoton Technology Corp. All rights reserved" +__version__ = "v0.37" + +import os +import sys +import argparse +import json +import crcmod +from Crypto.Cipher import AES +import hashlib +import ecdsa +import binascii +from datetime import datetime +import random +import shutil +from tqdm import tqdm +from xusbcom import XUsbComList +from concurrent.futures import ThreadPoolExecutor, as_completed +from UnpackImage import UnpackImage +from collections import namedtuple +from struct import unpack +import time +import platform +# for debug +import usb.core +import usb.util + +ACK = 0x55AA55AA +TRANSFER_SIZE = 4096 +MAX_HEADER_IMG = 4 +# SPI NOR align for erase/program starting address +SPINOR_ALIGN = 4096 + +# Storage device type +DEV_DDR_SRAM = 0 +DEV_NAND = 1 +DEV_SD_EMMC = 2 +DEV_SPINOR = 3 +DEV_SPINAND = 4 +DEV_OTP = 6 +DEV_USBH = 7 +DEV_UNKNOWN = 0xFF + +# For OTP programming +ACT_LOAD = 1 +ACT_WRITE = 2 +ACT_ERASE = 3 +ACT_READ = 4 +ACT_MSC = 5 + +# Command options +OPT_NONE = 0 +OPT_SCRUB = 1 # For erase, use with care +OPT_WITHBAD = 1 # For read +OPT_EXECUTE = 2 # For write +OPT_VERIFY = 3 # For write +OPT_UNPACK = 4 # For pack +OPT_RAW = 5 # For write +OPT_EJECT = 6 # For msc +OPT_STUFF = 7 # For stuff pack, output could be used by dd command +OPT_SETINFO = 8 # For set storage info for attach +OPT_CONCAT = 9 # For convert, concatenate at the end of encrypted data file +OPT_SHOWHDR = 10 # For convert. Instead of convert, show header content instead +OPT_NOCRC = 11 # For pack. unpack file without crc32 check +OPT_UNKNOWN = 0xFF # Error + + +# OPT block definitions +OPT_OTPBLK1 = 0x100 +OPT_OTPBLK2 = 0x200 +OPT_OTPBLK3 = 0x400 +OPT_OTPBLK4 = 0x800 +OPT_OTPBLK5 = 0x1000 +OPT_OTPBLK6 = 0x2000 +OPT_OTPBLK7 = 0x4000 +OPT_OTPKEY = 0x8000 + +# for key lock +OPT_OTPKEY0 = 0x10000 +OPT_OTPKEY1 = 0x20000 +OPT_OTPKEY2 = 0x40000 +OPT_OTPKEY3 = 0x80000 +OPT_OTPKEY4 = 0x100000 +OPT_OTPKEY5 = 0x200000 + + +# Image type definitions +IMG_DATA = 0 +IMG_TFA = 1 +IMG_UBOOT = 2 +IMG_LINUX = 3 +IMG_DDR = 4 +IMG_TEE = 5 +IMG_DTB = 6 + +# If attach is a must. maybe better for real chip. +# devices = [] +mp_mode = False + +WINDOWS_PATH = "C:\\Program Files (x86)\\Nuvoton Tools\\NuWriter\\" +LINUX_PATH = "/usr/share/nuwriter/" + + +def conv_env(env_file_name, blk_size) -> bytearray: + + try: + with open(env_file_name, "r") as env_file: + env_data = env_file.read().splitlines() + except (IOError, OSError) as err: + print(f"Open {env_file_name} failed") + sys.exit(err) + + out = bytearray(4) # Reserved for CRC + for lines in env_data: + out += bytes(lines, 'ascii') + out += b'\x00' + out += b'\x00' + out += b'\xFF' * (blk_size - len(out)) + + crc32_func = crcmod.predefined.mkCrcFun('crc-32') + checksum = crc32_func(out[4:]) + out[0:4] = checksum.to_bytes(4, byteorder="little") + + return out + + +def get_dpm(dpm) -> int: + return { + 'a35sdsdis': 0x00000001, + 'a35sdslock': 0x00000002, + 'a35sndsdis': 0x00000004, + 'a35sndslock': 0x00000008, + 'a35nsdsdis': 0x00000010, + 'a35nsdslock': 0x00000020, + 'a35nsndsdis': 0x00000040, + 'a35nsndslock': 0x00000080, + 'm4dsdis': 0x00000100, + 'm4dslock': 0x00000200, + 'm4ndsdis': 0x00000400, + 'm4ndslock': 0x00000800, + 'extdis': 0x00001000, + 'extlock': 0x00002000, + 'exttdis': 0x00004000, + 'exttlock': 0x00008000, + 'giccfgsdis': 0x00010000, + 'giccfgslock': 0x00020000 + }.get(dpm, 0) + + +def get_plm(plm) -> int: + return { + 'oem': 0x1, + 'deploy': 0x3, + 'rma': 0x7, + 'prma': 0xF + }.get(plm, 0) + + +def conv_otp(opt_file_name) -> (bytearray, int): + try: + with open(opt_file_name, "r") as json_file: + try: + d = json.load(json_file) + except json.decoder.JSONDecodeError as err: + print(f"{opt_file_name} parsing error") + sys.exit(err) + except (IOError, OSError) as err: + print(f"Open {opt_file_name} failed") + sys.exit(err) + # Bootcfg, DPM, PLM, and PWD 4 bytes each, MAC addr 8 bytes each, sec/nsec 88 bytes each + data = bytearray(208) + + option = 0 + for key in d.keys(): + if key == 'boot_cfg': + cfg_val = 0 + for sub_key in d['boot_cfg'].keys(): + if sub_key == 'posotp': + if d['boot_cfg']['posotp'] == 'enable': + cfg_val |= 1 + if sub_key == 'qspiclk': + if d['boot_cfg']['qspiclk'] == '50mhz': + cfg_val |= 2 + if sub_key == 'wdt1en': + if d['boot_cfg']['wdt1en'] == 'enable': + cfg_val |= 4 + if sub_key == 'uart0en': + if d['boot_cfg']['uart0en'] == 'disable': + cfg_val |= 0x10 + if sub_key == 'sd0bken': + if d['boot_cfg']['sd0bken'] == 'enable': + cfg_val |= 0x20 + if sub_key == 'tsiimg': + if d['boot_cfg']['tsiimg'] == 'enable': + cfg_val |= 0x40 + if sub_key == 'tsidbg': + if d['boot_cfg']['tsidbg'] == 'disable': + cfg_val |= 0x80 + if sub_key == 'bootsrc': + if d['boot_cfg']['bootsrc'] == 'sd' or d['boot_cfg']['bootsrc'] == 'emmc': + cfg_val |= 0x400 + elif d['boot_cfg']['bootsrc'] == 'nand': + cfg_val |= 0x800 + elif d['boot_cfg']['bootsrc'] == 'usb': + cfg_val |= 0xC00 + if sub_key == 'page': + if d['boot_cfg']['page'] == '2k': + cfg_val |= 0x1000 + elif d['boot_cfg']['page'] == '4k': + cfg_val |= 0x2000 + elif d['boot_cfg']['page'] == '8k': + cfg_val |= 0x3000 + if sub_key == 'option': + if d['boot_cfg']['option'] == 'sd1' or d['boot_cfg']['option'] == 'emmc1' or \ + d['boot_cfg']['option'] == 't12' or d['boot_cfg']['option'] == 'spinand4': + cfg_val |= 0x4000 + elif d['boot_cfg']['option'] == 't24' or d['boot_cfg']['option'] == 'spinor1': + cfg_val |= 0x8000 + elif d['boot_cfg']['option'] == 'noecc' or d['boot_cfg']['option'] == 'spinor4': + cfg_val |= 0xC000 + if sub_key == 'secboot': + if d['boot_cfg']['secboot'] == 'disable': + cfg_val |= 0x5A000000 + data[0:4] = cfg_val.to_bytes(4, byteorder='little') + option |= OPT_OTPBLK1 + elif key == 'dpm_plm': + for sub_key in d['dpm_plm'].keys(): + if sub_key == 'dpm': + dpm_val = 0 + for dpm_key in d['dpm_plm']['dpm'].keys(): + dpm_val |= get_dpm(dpm_key) + if dpm_val != 0: + data[4:8] = dpm_val.to_bytes(4, byteorder='little') + elif sub_key == 'plm': + plm_val = get_plm(d['dpm_plm']['plm']) + if plm_val != 0: + data[8:12] = plm_val.to_bytes(4, byteorder='little') + option |= OPT_OTPBLK2 + elif key == 'mac0': + data[12:18] = bytes.fromhex(d['mac0']) + option |= OPT_OTPBLK3 + elif key == 'mac1': + data[20:26] = bytes.fromhex(d['mac1']) + option |= OPT_OTPBLK4 + elif key == 'dplypwd': + data[28:32] = bytes.fromhex(d['dplypwd']) + option |= OPT_OTPBLK5 + elif key == 'sec': + newkey = bytes.fromhex(d['sec']) + newkey += b'\x00' * (88 - len(newkey)) + data[32:120] = newkey + option |= OPT_OTPBLK6 + elif key == 'nonsec': + newkey = bytes.fromhex(d['nonsec']) + newkey += b'\x00' * (88 - len(newkey)) + data[120:208] = newkey + option |= OPT_OTPBLK7 + elif key == 'huk0': + newkey = bytes.fromhex(d['huk0']['key']) + if len(newkey) != 16: + print("HUK0 is 128-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 128-bit + newkey += b'\x08\x00\x00\x00' + # key number - 0 + newkey += b'\x00\x00\x00\x00' + # meta - owner: cpu, cpu readable + newkey += b'\x04\x00\x05\x80' + data += newkey + + elif key == 'huk1': + newkey = bytes.fromhex(d['huk1']['key']) + if len(newkey) != 16: + print("HUK1 is 128-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 128-bit + newkey += b'\x08\x00\x00\x00' + # key number - 1 + newkey += b'\x01\x00\x00\x00' + # meta - owner: cpu, cpu readable + newkey += b'\x04\x00\x05\x80' + data += newkey + + elif key == 'huk2': + newkey = bytes.fromhex(d['huk2']['key']) + if len(newkey) != 16: + print("HUK0 is 128-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 128-bit + newkey += b'\x08\x00\x00\x00' + # key number - 2 + newkey += b'\x02\x00\x00\x00' + # meta - owner: cpu, cpu readable + newkey += b'\x04\x00\x05\x80' + data += newkey + + elif key == 'key3': + newkey = bytes.fromhex(d['key3']['key']) + if len(newkey) != 32: + print("key3 is 256-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 256-bit + newkey += b'\x00\x01\x00\x00' + # key number - 3 + newkey += b'\x03\x00\x00\x00' + + if d['key3']['meta'] == 'aes256-unreadable': + newkey += b'\x00\x06\x00\x80' + elif d['key3']['meta'] == 'aes256-cpu-readable': + newkey += b'\x04\x06\x00\x80' + elif d['key3']['meta'] == 'sha256-unreadable': + newkey += b'\x00\x06\x01\x80' + elif d['key3']['meta'] == 'sha256-cpu-readable': + newkey += b'\x04\x06\x01\x80' + elif d['key3']['meta'] == 'eccp256-unreadable': + newkey += b'\x00\x06\x04\x80' + elif d['key3']['meta'] == 'eccp256-cpu-readable': + newkey += b'\x04\x06\x04\x80' + + data += newkey + elif key == 'key4': + newkey = bytes.fromhex(d['key4']['key']) + if len(newkey) != 32: + print("key4 is 256-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 256-bit + newkey += b'\x00\x01\x00\x00' + # key number - 4 + newkey += b'\x04\x00\x00\x00' + + if d['key4']['meta'] == 'aes256-unreadable': + newkey += b'\x00\x06\x00\x80' + elif d['key4']['meta'] == 'aes256-cpu-readable': + newkey += b'\x04\x06\x00\x80' + elif d['key4']['meta'] == 'sha256-unreadable': + newkey += b'\x00\x06\x01\x80' + elif d['key4']['meta'] == 'sha256-cpu-readable': + newkey += b'\x04\x06\x01\x80' + elif d['key4']['meta'] == 'eccp256-unreadable': + newkey += b'\x00\x06\x04\x80' + elif d['key4']['meta'] == 'eccp256-cpu-readable': + newkey += b'\x04\x06\x04\x80' + + data += newkey + elif key == 'key5': + newkey = bytes.fromhex(d['key5']['key']) + if len(newkey) != 32: + print("key5 is 256-bit") + sys.exit(2) + newkey += b'\x00' * (32 - len(newkey)) + # size - 256-bit + newkey += b'\x00\x01\x00\x00' + # key number - 5 + newkey += b'\x05\x00\x00\x00' + + if d['key5']['meta'] == 'aes256-unreadable': + newkey += b'\x00\x06\x00\x80' + elif d['key5']['meta'] == 'aes256-cpu-readable': + newkey += b'\x04\x06\x00\x80' + elif d['key5']['meta'] == 'sha256-unreadable': + newkey += b'\x00\x06\x01\x80' + elif d['key5']['meta'] == 'sha256-cpu-readable': + newkey += b'\x04\x06\x01\x80' + elif d['key5']['meta'] == 'eccp256-unreadable': + newkey += b'\x00\x06\x04\x80' + elif d['key5']['meta'] == 'eccp256-cpu-readable': + newkey += b'\x04\x06\x04\x80' + + data += newkey + elif key == 'publicx': + newkey = bytes.fromhex(d['publicx']) + if len(newkey) != 32: + print("IBR publicx is 256-bit") + sys.exit(2) + data += bytes.fromhex(d['publicx']) + data += b'\x00\x01\x00\x00' # 256 bits + data += b'\x06\x00\x00\x00' + data += b'\x01\x06\x04\x80' + elif key == 'publicy': + newkey = bytes.fromhex(d['publicy']) + if len(newkey) != 32: + print("IBR publicy is 256-bit") + sys.exit(2) + data += bytes.fromhex(d['publicy']) + data += b'\x00\x01\x00\x00' # 256 bits + data += b'\x07\x00\x00\x00' + data += b'\x01\x06\x04\x80' + elif key == 'aeskey': + newkey = bytes.fromhex(d['aeskey']) + if len(newkey) != 32: + print("IBR aeskey is 256-bit") + sys.exit(2) + data += bytes.fromhex(d['aeskey']) + data += b'\x00\x01\x00\x00' # 256 bits + data += b'\x08\x00\x00\x00' + data += b'\x01\x06\x00\x80' + + try: + with open("otp_data.bin", "wb") as out_file: + out_file.write(data[0:len(data)]) + except (IOError, OSError) as err: + print(f"Open otp_data.bin failed") + sys.exit(err) + + if len(data) > 208: + option |= OPT_OTPKEY + return data, option + + +def __img_erase(dev, media, start, length, option) -> int: + + nand_align, spinand_align = dev.get_align() + + if (media == DEV_NAND and nand_align == 0) or \ + (media == DEV_SPINAND and spinand_align == 0): + print("Unable to get block size") + return -1 + + if (media == DEV_NAND and start % nand_align != 0) or\ + (media == DEV_SPINAND and start % spinand_align != 0) or \ + (media == DEV_SPINOR and start % SPINOR_ALIGN != 0): + print("Starting address must be block aligned") + return -1 + + cmd = start.to_bytes(8, byteorder='little') + cmd += length.to_bytes(8, byteorder='little') + cmd += ACT_ERASE.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(media) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + bar = tqdm(total=100, position=dev.get_id(), ascii=True) + previous_progress = 0 + while True: + # xusb ack with total erase progress. + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") <= 100: + bar.update(int.from_bytes(ack, byteorder="little") - previous_progress) + previous_progress = int.from_bytes(ack, byteorder="little") + if int.from_bytes(ack, byteorder="little") == 100: + break + bar.close() + return 0 + + +# default erase all (count=0) +def do_img_erase(media, start, length=0, option=OPT_NONE) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__img_erase, dev, media, start, length, option) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully erased {success} device(s)") + if failed > 0: + print(f"Failed to erase {failed} device(s)") + + +def do_otp_erase(option) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + start = 0 + length = 0 + dev = devices[0] + load_otp_writer(dev) + cmd = start.to_bytes(8, byteorder='little') + cmd += length.to_bytes(8, byteorder='little') + cmd += ACT_ERASE.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(DEV_OTP) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + print(f"Failed to erase device(s)") + + # There's no way to tell the progress... + ack = dev.read(4) + data = int.from_bytes(ack, byteorder="little") + if option == 0x100: + data >>= 2 + data &= 0x3 + if option == 0x400: + data >>= 6 + data &= 0x3 + if option == 0x800: + data >>= 8 + data &= 0x3 + if option & 0x8000: + data >>= 16 + #print(f"Erase count state {hex(data)}") + + print(f"Successfully erased device(s)") + +def load_otp_writer(dev) -> int: + try: + with open("otp_writer.bin", "rb") as writer_file: + otp_writer = writer_file.read() + except (IOError, OSError) as err: + print(f"Open {opt_file_name} failed") + sys.exit(err) + + option = 0 + img_length = len(otp_writer) + cmd = b'\x00\x00\xf0\x86\x00\x00\x00\x00' + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_LOAD.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + dev.set_media(DEV_OTP) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + + for offset in range(0, img_length, TRANSFER_SIZE): + xfer_size = TRANSFER_SIZE if offset + TRANSFER_SIZE < img_length else img_length - offset + dev.write(otp_writer[offset: offset + xfer_size]) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != xfer_size: + print("Acked size error") + return -1 + + while True: + # wait TSI update firmware + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") == ACK: + break + + return 0 + +def __otp_program(dev, otp_data, option) -> int: + + img_length = len(otp_data) + + cmd = b'\x00\x00\xf0\x86\x00\x00\x00\x00' + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_WRITE.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(DEV_OTP) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + # There's no way to tell the progress... + dev.write(otp_data) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != img_length: + print("Acked size error") + return -1 + + # There's no way to tell the progress... + ack = dev.read(4) + data = int.from_bytes(ack, byteorder="little") + #print(f"Can program count {hex(data)}") + + return 0 + + +def do_otp_program(opt_file_name) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + load_otp_writer(devices[0]) + otp_data, option = conv_otp(opt_file_name) + + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__otp_program, dev, otp_data, option) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully programmed {success} device(s)") + if failed > 0: + print(f"Failed to program {failed} device(s)") + + +def do_otp_read(media, start, out_file_name, length=0x1, option=OPT_NONE) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + # Only support one device in read function + dev = devices[0] + load_otp_writer(dev) + + cmd = start.to_bytes(8, byteorder='little') + cmd += length.to_bytes(8, byteorder='little') + cmd += ACT_READ.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(media) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return + # FIXME: Don't know real length for "read all" + bar = tqdm(total=length, ascii=True) + data = b'' + remain = length + + while remain > 0: + ack = dev.read(4) + # Get the transfer length of next read + xfer_size = int.from_bytes(ack, byteorder="little") + + data += dev.read(xfer_size) + dev.write(xfer_size.to_bytes(4, byteorder='little')) # ack + remain -= xfer_size + bar.update(xfer_size) + try: + with open(out_file_name, "wb") as out_file: + out_file.write(data[0:length]) + except (IOError, OSError) as err: + print(f"Open {out_file_name} failed") + sys.exit(err) + + bar.close() + + +def __pack_program(dev, media, pack_image, option) -> int: + + nand_align, spinand_align = dev.get_align() + image_cnt = pack_image.img_count() + + if (media == DEV_NAND and nand_align == 0) or \ + (media == DEV_SPINAND and spinand_align == 0): + print("Unable to get block size") + return -1 + + for i in range(image_cnt): + img_length, img_start, img_type = pack_image.img_attr(i) + if (media == DEV_NAND and img_start % nand_align != 0) or \ + (media == DEV_SPINAND and img_start % spinand_align != 0) or \ + (media == DEV_SPINOR and img_start % SPINOR_ALIGN != 0): + print("Starting address must be block aligned") + return -1 + time.sleep(1) + dev.set_media(media) + cmd = img_start.to_bytes(8, byteorder='little') + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_WRITE.to_bytes(4, byteorder='little') + cmd += img_type.to_bytes(4, byteorder='little') + + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + text = f"Programming {i}/{image_cnt}" + bar = tqdm(total=img_length, position=dev.get_id(), ascii=True, desc=text) + for offset in range(0, img_length, TRANSFER_SIZE): + xfer_size = TRANSFER_SIZE if offset + TRANSFER_SIZE < img_length else img_length - offset + dev.write(pack_image.img_content(i, offset, xfer_size)) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != xfer_size: + print("Ack size error") + return -1 + bar.update(xfer_size) + bar.close() + dev.read(4) + + # FIXME: Added time.sleep(1) to make SPI NAND Pack Program + Verify PASS + time.sleep(1) + + if option == OPT_VERIFY: + dev.set_media(media) + cmd = img_start.to_bytes(8, byteorder='little') + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_READ.to_bytes(4, byteorder='little') + cmd += b'\x00' * 4 + + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + remain = img_length + text = f"Verifying {i}/{image_cnt}" + bar = tqdm(total=img_length, position=dev.get_id(), ascii=True, desc=text) + while remain > 0: + ack = dev.read(4) + # Get the transfer length of next read + xfer_size = int.from_bytes(ack, byteorder="little") + + data = dev.read(xfer_size) + dev.write(xfer_size.to_bytes(4, byteorder='little')) + offset = img_length - remain + + # For SD/eMMC + if xfer_size > remain: + xfer_size = remain + data = data[0: remain] + + if data != bytearray(pack_image.img_content(i, offset, xfer_size)): + print("Verify failed") + return -1 + remain -= xfer_size + bar.update(xfer_size) + bar.close() + return 0 + + +def do_pack_program(media, pack_file_name, option=OPT_NONE) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + pack_image = UnpackImage(pack_file_name, option) + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__pack_program, dev, media, pack_image, option) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully programmed {success} device(s)") + if failed > 0: + print(f"Failed to program {failed} device(s)") + + +def __img_program(dev, media, start, img_data, option) -> int: + + nand_align, spinand_align = dev.get_align() + + if (media == DEV_NAND and nand_align == 0) or \ + (media == DEV_SPINAND and spinand_align == 0): + print("Unable to get block size") + return -1 + + if (media == DEV_NAND and start % nand_align != 0) or\ + (media == DEV_SPINAND and start % spinand_align != 0) or \ + (media == DEV_SPINOR and start % SPINOR_ALIGN != 0): + print("Starting address must be block aligned") + return -1 + + img_length = len(img_data) + print(f"image length is {img_length}") + cmd = start.to_bytes(8, byteorder='little') + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_WRITE.to_bytes(4, byteorder='little') + if option == OPT_EXECUTE: + cmd += option.to_bytes(4, byteorder='little') + else: + cmd += b'\x00' * 4 + + dev.set_media(media) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + + # Set ascii=True is for Windows cmd terminal, position > 0 doesn't work as expected in cmd though... + bar = tqdm(total=img_length, position=dev.get_id(), ascii=True, desc="Programming") + for offset in range(0, img_length, TRANSFER_SIZE): + xfer_size = TRANSFER_SIZE if offset + TRANSFER_SIZE < img_length else img_length - offset + dev.write(img_data[offset: offset + xfer_size]) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != xfer_size: + print("Ack size error") + return -1 + bar.update(xfer_size) + dev.read(4) + bar.close() + if option == OPT_VERIFY: + dev.set_media(media) + cmd = start.to_bytes(8, byteorder='little') + cmd += img_length.to_bytes(8, byteorder='little') + cmd += ACT_READ.to_bytes(4, byteorder='little') + cmd += b'\x00' * 4 + + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + + remain = img_length + bar = tqdm(total=img_length, position=dev.get_id(), ascii=True, desc="Verifying") + while remain > 0: + ack = dev.read(4) + # Get the transfer length of next read + xfer_size = int.from_bytes(ack, byteorder="little") + + data = dev.read(xfer_size) + dev.write(xfer_size.to_bytes(4, byteorder='little')) # ack + offset = img_length - remain + + # For SD/eMMC + if xfer_size > remain: + xfer_size = remain + data = data[0: remain] + + if data != bytearray(img_data[offset: offset + xfer_size]): + print("Verify failed") + return -1 + remain -= xfer_size + bar.update(xfer_size) + print("Verify pass") + bar.close() + return 0 + + +def do_img_program(media, start, image_file_name, option=OPT_NONE) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + try: + with open(image_file_name, "rb") as image_file: + img_data = image_file.read() + + except (IOError, OSError) as err: + print(f"Open {image_file_name} failed") + sys.exit(err) + + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__img_program, dev, media, start, img_data, option) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully programmed {success} device(s)") + if failed > 0: + print(f"Failed to program {failed} device(s)") + + +def do_img_read(media, start, out_file_name, length=0x1, option=OPT_NONE) -> None: + # only support read from 1 device + # devices = XUsbComList(attach_all=False).get_dev() + _XUsbComList = XUsbComList(attach_all=False) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + # Only support one device in read function + dev = devices[0] + + cmd = start.to_bytes(8, byteorder='little') + cmd += length.to_bytes(8, byteorder='little') + cmd += ACT_READ.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(media) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return + # FIXME: Don't know real length for "read all" + bar = tqdm(total=length, ascii=True) + data = b'' + remain = length + + while remain > 0: + ack = dev.read(4) + # Get the transfer length of next read + xfer_size = int.from_bytes(ack, byteorder="little") + + data += dev.read(xfer_size) + dev.write(xfer_size.to_bytes(4, byteorder='little')) # ack + remain -= xfer_size + bar.update(xfer_size) + try: + with open(out_file_name, "wb") as out_file: + out_file.write(data[0:length]) + except (IOError, OSError) as err: + print(f"Open {out_file_name} failed") + sys.exit(err) + + bar.close() + + +def __attach(dev, ini_data, xusb_data) -> int: + ini_len = len(ini_data) + out = int(ini_len).to_bytes(4, byteorder="little") + out += b'\x00\x00\x03\x28' # Execute address is 0x28030000 + dev.write(out) + dev.write(ini_data) + + in_buf = dev.read(4) + if int.from_bytes(in_buf, byteorder="little") != ini_len: + print("Length error") + return -1 + + in_buf = dev.read(4) + if int.from_bytes(in_buf, byteorder="little") != ACK: + val = int.from_bytes(in_buf, byteorder="little") + print(f"Ack error {val}") + return -1 + + xusb_len = len(xusb_data) + out = int(xusb_len).to_bytes(4, byteorder="little") + out += b'\x00\x00\x00\x87' # Execute address is 0x87000000 + dev.write(out) + for offset in range(0, xusb_len, TRANSFER_SIZE): + xfer_size = TRANSFER_SIZE if offset + TRANSFER_SIZE < xusb_len else xusb_len - offset + + dev.write(xusb_data[offset: offset + xfer_size]) + if offset + xfer_size != xusb_len: # Ignore the ack of last packet + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != xfer_size: + _ack = int.from_bytes(ack, byteorder="little") + print(f"Ack size error {_ack} {xfer_size}") + return -1 + + return 0 + + +def __get_info(dev, data) -> int: + try: + info = dev.get_info(data) + except usb.core.USBError as err: + sys.exit(err) + + _info_struct = namedtuple('_info_struct', + 'page_per_blk page_size blk_cnt bad_clk_cnt oob_size usr_cfg0 spi_id usr_cfg1 quad_cmd \ + read_sts_cmd write_sts_cmd sts_val dummy_byte blk rsv use_cfg2 snand_id snand_page_size \ + snand_oob snand_quad_cmd snand_read_sts_cmd snand_write_sts_cmd snand_sts_val \ + snand_dummy_byte snand_blk_cnt snand_page_per_blk') + info_struct = _info_struct._make(unpack(' None: + global mp_mode + + init_location = "missing" + if os.path.exists(ini_file_name): # default use the init file in current directory + init_location = ini_file_name + else: + if platform.system() == 'Windows': + if os.path.exists(WINDOWS_PATH + "ddrimg\\" + ini_file_name): + init_location = WINDOWS_PATH + "ddrimg\\" + ini_file_name + elif platform.system() == 'Linux': + if os.path.exists(LINUX_PATH + "ddrimg/" + ini_file_name): + init_location = LINUX_PATH + "ddrimg/" + ini_file_name + + if init_location == "missing": + print(f"Cannot find {ini_file_name}") + sys.exit(3) + try: + with open(init_location, "rb") as ini_file: + ini_data = ini_file.read() + except (IOError, OSError) as err: + print(f"Open {ini_file_name} failed") + sys.exit(err) + xusb_location = "missing" + if os.path.exists("xusb.bin"): # default use the xusb.bin in current directory + xusb_location = "xusb.bin" + else: + if platform.system() == 'Windows': + if os.path.exists(WINDOWS_PATH + "xusb.bin"): + xusb_location = WINDOWS_PATH + "xusb.bin" + elif platform.system() == 'Linux': + if os.path.exists(LINUX_PATH + "xusb.bin"): + xusb_location = LINUX_PATH + "xusb.bin" + if xusb_location == "missing": + print("Cannot find xusb.bin") + sys.exit(3) + + try: + with open(xusb_location, "rb") as xusb_file: + xusb_data = xusb_file.read() + except (IOError, OSError) as err: + print("Open xusb.bin failed") + sys.exit(err) + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__attach, dev, ini_data, xusb_data) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures, timeout=2): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully attached {success} device(s)") + if failed > 0: + print(f"Failed to attach {failed} device(s)") + if success == 0: + return + + time.sleep(1) + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComListNew = XUsbComList(attach_all=mp_mode) + devices = _XUsbComListNew.get_dev() + + data = bytearray(76) + # assign option file to set media info + if option == OPT_SETINFO: + try: + with open("info.json", "r") as json_file: + try: + d = json.load(json_file) + except json.decoder.JSONDecodeError as err: + print(f"{json_file} parsing error") + sys.exit(err) + except (IOError, OSError) as err: + print("Open info.json failed") + sys.exit(err) + # now generate info from info.json + for key in d.keys(): + if key == 'spinand': + data[48] = 1 + for sub_key in d['spinand'].keys(): + if sub_key == 'pagesize': + data[56:58] = int(d['spinand']['pagesize'], 0).to_bytes(2, byteorder="little") + elif sub_key == 'sparearea': + data[58:60] = int(d['spinand']['sparearea'], 0).to_bytes(2, byteorder="little") + elif sub_key == 'quadread': + data[60:61] = int(d['spinand']['quadread'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'readsts': + data[61:62] = int(d['spinand']['readsts'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'writests': + data[62:63] = int(d['spinand']['writests'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'stsvalue': + data[63:64] = int(d['spinand']['stsvalue'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'dummy': + data[64:68] = int(d['spinand']['dummy'], 0).to_bytes(4, byteorder="little") + elif sub_key == 'blkcnt': + data[68:72] = int(d['spinand']['blkcnt'], 0).to_bytes(4, byteorder="little") + elif sub_key == 'pageperblk': + data[72:76] = int(d['spinand']['pageperblk'], 0).to_bytes(4, byteorder="little") + elif key == 'spinor': + data[28] = 1 + for sub_key in d['spinor'].keys(): + if sub_key == 'quadread': + data[32:33] = int(d['spinor']['quadread'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'readsts': + data[33:34] = int(d['spinor']['readsts'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'writests': + data[34:35] = int(d['spinor']['writests'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'stsvalue': + data[35:36] = int(d['spinor']['stsvalue'], 0).to_bytes(1, byteorder="little") + elif sub_key == 'dummy': + data[36:40] = int(d['spinor']['dummy'], 0).to_bytes(4, byteorder="little") + elif key == 'nand': + data[20] = 1 + for sub_key in d['nand'].keys(): + if sub_key == 'blkcnt': + data[8:12] = int(d['nand']['blkcnt'], 0).to_bytes(4, byteorder="little") + elif sub_key == 'pageperblk': + data[0:4] = int(d['nand']['pageperblk'], 0).to_bytes(4, byteorder="little") + if len(devices) == 0: + print("Device not found") + sys.exit(2) + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__get_info, dev, data) for dev in devices] + + success = 0 + failed = 0 + for future in as_completed(futures, timeout=2): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print(f"Successfully get info from {success} device(s)") + + +def do_unpack(pack_file_name, nocrc32) -> None: + + now = datetime.now() + pack_image = UnpackImage(pack_file_name, nocrc32) + image_cnt = pack_image.img_count() + + try: + os.mkdir(now.strftime("%m%d-%H%M%S%f")) + except (IOError, OSError) as err: + sys.exit(err) + + for i in range(image_cnt): + img_length, _, _ = pack_image.img_attr(i) + try: + with open(now.strftime("%m%d-%H%M%S%f") + "/img" + str(i) + ".bin", "wb") as img_file: + img_file.write(pack_image.img_content(i, 0, img_length)) + except (IOError, OSError) as err: + print("Create output image file failed") + sys.exit(err) + try: + os.unlink("unpack") + except (IOError, OSError): + pass + try: + os.symlink(now.strftime("%m%d-%H%M%S%f"), "unpack") + except (IOError, OSError): + print("Create symbolic folder unpack failed") + print("Unpack images to directory {} complete".format(now.strftime("%m%d-%H%M%S%f"))) + + +def do_stuff(cfg_file) -> None: + now = datetime.now() + + try: + with open(cfg_file, "r") as json_file: + try: + d = json.load(json_file) + except json.decoder.JSONDecodeError as err: + print(f"{cfg_file} parsing error") + sys.exit(err) + except (IOError, OSError) as err: + print(f"Open {cfg_file} failed") + sys.exit(err) + + try: + os.mkdir(now.strftime("%m%d-%H%M%S%f")) + pack_file = open(now.strftime("%m%d-%H%M%S%f") + "/pack.bin", "wb") + except (IOError, OSError) as err: + sys.exit(err) + + offset = 0 + out = bytearray() + + # Start stuffing image + for img in d["image"]: + try: + with open(img["file"], "rb") as img_file: + data = img_file.read() + except (IOError, OSError) as err: + print(f"Open {img_file} failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + if int(img["offset"], 0) < offset: + print(f"Please place the files in {cfg_file} based on the ascending offset") + sys.exit(4) + elif int(img["offset"], 0) > offset: + out += b'\xFF' * (int(img["offset"], 0) - offset) + offset = int(img["offset"], 0) + out += data + offset += len(data) + pack_file.write(out) + pack_file.close() + try: + os.unlink("pack") + except (IOError, OSError): + pass + try: + os.symlink(now.strftime("%m%d-%H%M%S%f"), "pack") + except (IOError, OSError): + print("Create symbolic folder pack failed") + print("Generate pack file in directory {} complete".format(now.strftime("%m%d-%H%M%S%f"))) + + +def do_pack(cfg_file) -> None: + now = datetime.now() + + try: + with open(cfg_file, "r") as json_file: + try: + d = json.load(json_file) + except json.decoder.JSONDecodeError as err: + print(f"{cfg_file} parsing error") + sys.exit(err) + except (IOError, OSError) as err: + print(f"Open {cfg_file} failed") + sys.exit(err) + + try: + os.mkdir(now.strftime("%m%d-%H%M%S%f")) + pack_file = open(now.strftime("%m%d-%H%M%S%f") + "/pack.bin", "wb") + except (IOError, OSError) as err: + sys.exit(err) + + out = bytearray(b'\x20\x54\x56\x4e' + b'\xFF' * 12) # NVT + CRC32 + image count + 4 reserved bytes + + # Start packing image + img_cnt = 0 + for img in d["image"]: + try: + with open(img["file"], "rb") as img_file: + data = img_file.read() + except (IOError, OSError) as err: + print(f"Open {img_file} failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + img_cnt = img_cnt + 1 + + img_len = len(data) + out += img_len.to_bytes(8, byteorder="little") + try: + out += int(img["offset"], 0).to_bytes(8, byteorder="little") + except ValueError as err: + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + out += img["type"].to_bytes(4, byteorder="little") + out += b'\xFF' * 4 + out += data + # Always put image start @ 16 byte boundary + pad = 16 - (img_len + 8) & 0xF + if pad != 16: + out += b'\xFF' * pad + + # Fill image count + out[8:12] = img_cnt.to_bytes(4, byteorder="little") + + # Fill CRC field + crc32_func = crcmod.predefined.mkCrcFun('crc-32') + checksum = crc32_func(out[8:]) + out[4:8] = checksum.to_bytes(4, byteorder="little") + + pack_file.write(out) + pack_file.close() + try: + os.unlink("pack") + except (IOError, OSError): + pass + try: + os.symlink(now.strftime("%m%d-%H%M%S%f"), "pack") + except (IOError, OSError): + print("Create symbolic folder pack failed") + print("Generate pack file in directory {} complete".format(now.strftime("%m%d-%H%M%S%f"))) + + +def do_showhdr(cfg_file) -> None: + try: + header_file = open(cfg_file, "br") + except (IOError, OSError) as err: + print(f"Open {cfg_file} failed") + sys.exit(err) + + if unpack(' None: + now = datetime.now() + + try: + with open(cfg_file, "r") as json_file: + try: + d = json.load(json_file) + except json.decoder.JSONDecodeError as err: + print(f"{cfg_file} parsing error") + sys.exit(err) + except (IOError, OSError) as err: + print(f"Open {cfg_file} failed") + sys.exit(err) + try: + os.mkdir(now.strftime("%m%d-%H%M%S%f")) + except (IOError, OSError) as err: + print("Create output directory failed") + sys.exit(err) + + if "header" in d: + out = bytearray(b'\x20\x54\x56\x4e' + b'\x00' * 8) # NVT + CRC + LEN + try: + out += int(d["header"]["version"], 0).to_bytes(4, byteorder="little") + # Fill SPI flash info + out += int(d["header"]["spiinfo"]["pagesize"], 0).to_bytes(2, byteorder="little") + out += int(d["header"]["spiinfo"]["sparearea"], 0).to_bytes(2, byteorder="little") + out += int(d["header"]["spiinfo"]["pageperblk"], 0).to_bytes(2, byteorder="little") + out += int(d["header"]["spiinfo"]["quadread"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["readsts"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["writests"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["stsvalue"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["dummy1"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["dummy2"], 0).to_bytes(1, byteorder="little") + out += int(d["header"]["spiinfo"]["suspintvl"], 0).to_bytes(1, byteorder="little") + out += b'\xFF' * 3 # 3 reserved bytes + out += int(d["header"]["entrypoint"], 0).to_bytes(4, byteorder="little") + except ValueError as err: + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + out += b'\xFF' * 4 # Reserve 4 bytes for image count + + # Generate key file iff secure boot is enabled + if d["header"]["secureboot"] == 'yes': + + try: + key_file = open(now.strftime("%m%d-%H%M%S%f") + "/header_key.txt", "w+") + except (IOError, OSError) as err: + print("Create key file failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + if "aeskey" in d["header"]: + try: + aeskey = bytes.fromhex(d["header"]["aeskey"]) + except ValueError as err: + sys.exit(err) + else: + aeskey = ''.join(['%x' % random.randrange(16) for _ in range(0, 64)]) + aeskey = binascii.unhexlify(bytes(aeskey, 'utf-8')) + key_file.write("AES key:\n" + str.upper(aeskey.hex())) + + if "ecdsakey" in d["header"]: + try: + sk = ecdsa.SigningKey.from_string(bytes.fromhex(d["header"]["ecdsakey"]), + curve=ecdsa.NIST256p, + hashfunc=hashlib.sha256) + except ValueError as err: + sys.exit(err) + else: + sk = ecdsa.SigningKey.generate(curve=ecdsa.NIST256p, hashfunc=hashlib.sha256) + key_file.write("\nECDSA private key:\n" + str.upper(sk.to_string().hex())) + + vk = sk.verifying_key + key_file.write("\nECDSA public key:\n" + format(vk.pubkey.point.x(), 'X') + + "\n" + format(vk.pubkey.point.y(), 'X') + "\n") + + key_file.close() + + img_cnt = len(d["header"]["image"]) + if img_cnt > MAX_HEADER_IMG: + print("Can process 4 images in header max") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(2) + + # Fill image information + for i in range(img_cnt): + img = d["header"]["image"][i] + try: + with open(img["file"], "rb") as img_file: + data = img_file.read() + except (IOError, OSError) as err: + print("Open image file failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + try: + out += int(img["offset"], 0).to_bytes(4, byteorder="little") + out += int(img["loadaddr"], 0).to_bytes(4, byteorder="little") + out += os.path.getsize(img["file"]).to_bytes(4, byteorder="little") + out += int(img["type"]).to_bytes(4, byteorder="little") + except ValueError as err: + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + if d["header"]["secureboot"] == 'yes': + + # Use CFB and each image is process independently, so call new() for every image + aes_enc = AES.new(aeskey, AES.MODE_CFB, b'\x00' * 16, segment_size=128) + data_out = aes_enc.encrypt(data) + # R & S + out += sk.sign(data_out) + + # Write encrypt image + try: + with open(now.strftime("%m%d-%H%M%S%f") + '/enc_' + + os.path.basename(img["file"]), "wb") as enc_file: + enc_file.write(data_out) + except (IOError, OSError) as err: + print("Create encrypt file failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + else: + out += b'\xFF' * 64 # Just pack 0xFF if secure boot is disabled + + # Fill header length + out[8:12] = int(len(out) - 8).to_bytes(4, byteorder="little") + # Fill image count + out[36:40] = img_cnt.to_bytes(4, byteorder="little") + # Fill header checksum + crc32_func = crcmod.predefined.mkCrcFun('crc-32') + out[4:8] = crc32_func(out[8:]).to_bytes(4, byteorder="little") + + try: + with open(now.strftime("%m%d-%H%M%S%f") + "/header.bin", "wb") as header_file: + header_file.write(out) + except (IOError, OSError) as err: + print("Create header file failed") + sys.exit(err) + + if "env" in d: + try: + with open(now.strftime("%m%d-%H%M%S%f") + "/uboot-env.bin", "wb") as out_file: + out_file.write(conv_env(d["env"]["file"], int(d["env"]["blksize"], 0))) + except (IOError, OSError, ValueError) as err: + print("Create header file failed") + sys.exit(err) + # Misc images + if "data" in d: + try: + key_file = open(now.strftime("%m%d-%H%M%S%f") + "/data_key.txt", "w+") + except (IOError, OSError) as err: + print("Create key file failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + if "aeskey" in d["data"]: + try: + aeskey = bytes.fromhex(d["data"]["aeskey"]) + except ValueError as err: + sys.exit(err) + else: + aeskey = ''.join(['%x' % random.randrange(16) for _ in range(0, 64)]) + aeskey = binascii.unhexlify(bytes(aeskey, 'utf-8')) + key_file.write("AES key:\n" + str.upper(aeskey.hex())) + + if "ecdsakey" in d["data"]: + try: + sk = ecdsa.SigningKey.from_string(bytes.fromhex(d["data"]["ecdsakey"]), + curve=ecdsa.NIST256p, + hashfunc=hashlib.sha256) + except ValueError as err: + sys.exit(err) + else: + sk = ecdsa.SigningKey.generate(curve=ecdsa.NIST256p, hashfunc=hashlib.sha256) + key_file.write("\nECDSA private key:\n" + str.upper(sk.to_string().hex())) + + vk = sk.verifying_key + key_file.write("\nECDSA public key:\n" + format(vk.pubkey.point.x(), 'X') + + "\n" + format(vk.pubkey.point.y(), 'X') + "\n") + key_file.close() + + for img in d["data"]["image"]: + try: + with open(img["file"], "rb") as img_file: + data = img_file.read() + except (IOError, OSError) as err: + print(f"Open {img_file} failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + + aes_enc = AES.new(aeskey, AES.MODE_CFB, b'\x00' * 16, segment_size=128) + data_out = aes_enc.encrypt(data) + signature = sk.sign(data_out) + try: + if option is OPT_CONCAT: + # Append the R & S at the end of signed image instead of writing to a separate file. + # The signed image could be used in deployed mode + data_out += signature + else: + with open(now.strftime("%m%d-%H%M%S%f") + '/sig_' + img["file"], "wb") as sig_file: + sig_file.write(signature) # R & S + + with open(now.strftime("%m%d-%H%M%S%f") + '/enc_' + img["file"], "wb") as enc_file: + enc_file.write(data_out) + + except (IOError, OSError) as err: + print("Create encrypt/signature file failed") + shutil.rmtree(now.strftime("%m%d-%H%M%S%f")) + sys.exit(err) + try: + os.unlink("conv") + except (IOError, OSError): + pass + try: + os.symlink(now.strftime("%m%d-%H%M%S%f"), "conv") + except (IOError, OSError): + print("Create symbolic folder conv failed") + print("Generate output image(s) in directory {} complete".format(now.strftime("%m%d-%H%M%S%f"))) + + +def __msc(dev, media, reserve, option) -> int: + + cmd = reserve.to_bytes(8, byteorder='little') + cmd += b'\x00' * 8 + cmd += ACT_MSC.to_bytes(4, byteorder='little') + cmd += option.to_bytes(4, byteorder='little') + + dev.set_media(media) + dev.write(cmd) + ack = dev.read(4) + if int.from_bytes(ack, byteorder="little") != ACK: + print("Receive ACK error") + return -1 + return 0 + + +def do_msc(media, reserve, option=OPT_NONE) -> None: + global mp_mode + + # devices = XUsbComList(attach_all=mp_mode).get_dev() + _XUsbComList = XUsbComList(attach_all=mp_mode) + devices = _XUsbComList.get_dev() + + if len(devices) == 0: + print("Device not found") + sys.exit(2) + + with ThreadPoolExecutor(max_workers=8) as executor: + futures = [executor.submit(__msc, dev, media, reserve, option) for dev in devices] + success = 0 + failed = 0 + for future in as_completed(futures): + if future.result() == 0: + success += 1 + else: + failed += 1 + + print("Successfully {} {} MSC device(s)".format("set" if option == "OPT_NONE" else "eject", success)) + if failed > 0: + print("Failed to {} {} MSC device(s)".format("set" if option == "OPT_NONE" else "eject", failed)) + + +def get_media(media) -> int: + media = str.upper(media) + return { + 'DDR': DEV_DDR_SRAM, + 'SRAM': DEV_DDR_SRAM, + 'SD': DEV_SD_EMMC, + 'EMMC': DEV_SD_EMMC, + 'NAND': DEV_NAND, + 'SPINAND': DEV_SPINAND, + 'SPINOR': DEV_SPINOR, + 'OTP': DEV_OTP, + 'USBH': DEV_USBH + }.get(media, DEV_UNKNOWN) + + +def get_option(option) -> int: + option = str.upper(option) + return { + 'SCRUB': OPT_SCRUB, + 'WITHBAD': OPT_WITHBAD, + 'VERIFY': OPT_VERIFY, + 'EXECUTE': OPT_EXECUTE, + 'UNPACK': OPT_UNPACK, + 'RAW': OPT_RAW, + 'EJECT': OPT_EJECT, + 'STUFF': OPT_STUFF, + 'SETINFO': OPT_SETINFO, + 'CONCAT': OPT_CONCAT, + 'SHOWHDR': OPT_SHOWHDR, + 'NOCRC': OPT_NOCRC + }.get(option, OPT_UNKNOWN) + + +def get_type(img_type) -> int: + img_type = str.upper(img_type) + return { + 'TFA': IMG_TFA, + 'UBOOT': IMG_UBOOT, + 'LINUX': IMG_LINUX, + 'DDR': IMG_DDR, + 'TEE': IMG_TEE + }.get(img_type, IMG_DATA) + +def get_otpblock(num) -> int: + num = str.upper(num) + return { + 'OTP1': OPT_OTPBLK1, + 'OTP2': OPT_OTPBLK2, + 'OTP3': OPT_OTPBLK3, + 'OTP4': OPT_OTPBLK4, + 'OTP5': OPT_OTPBLK5, + 'OTP6': OPT_OTPBLK6, + 'OTP7': OPT_OTPBLK7, + 'KEY0': OPT_OTPKEY0+OPT_OTPKEY, + 'KEY1': OPT_OTPKEY1+OPT_OTPKEY, + 'KEY2': OPT_OTPKEY2+OPT_OTPKEY, + 'KEY3': OPT_OTPKEY3+OPT_OTPKEY, + 'KEY4': OPT_OTPKEY4+OPT_OTPKEY, + 'KEY5': OPT_OTPKEY5+OPT_OTPKEY + }.get(num, OPT_UNKNOWN) + + +def main(): + parser = argparse.ArgumentParser() + + parser.add_argument("CONFIG", nargs='?', help="Config file", type=str, default='') + parser.add_argument("-a", "--attach", action='store_true', help="Attach to MA35D1") + parser.add_argument("-o", "--option", nargs='+', help="Option flag") + parser.add_argument("-t", "--type", nargs='+', help="Type flag") + group = parser.add_mutually_exclusive_group() + group.add_argument("-c", "--convert", action='store_true', help="Convert images") + group.add_argument("-p", "--pack", action='store_true', help="Generate pack file") + group.add_argument("-v", "--version", action='store_true', help="Show version number") + group.add_argument("-r", "--read", nargs='+', help="Read flash") + group.add_argument("-w", "--write", nargs='+', help="Write flash") + group.add_argument("-e", "--erase", nargs='+', help="Erase flash") + group.add_argument("-s", "--storage", nargs='+', help="Export eMMC/SD as Mass Storage Class") + + if len(sys.argv) == 1: + parser.print_help() + sys.exit(0) + + args = parser.parse_args() + + if args.option: + option = get_option(args.option[0]) + else: + option = OPT_NONE + + if option is OPT_UNKNOWN: + print("Unknown option: " + args.option[0]) + sys.exit(0) + # if args.type: + # img_type = get_type(args.type[0]) + # else: + # img_type = IMG_DATA + + cfg_file = args.CONFIG + + if args.attach: + if not cfg_file: + print("Please assign a DDR ini file") + sys.exit(0) + do_attach(cfg_file, option) + + if args.convert: + if cfg_file == '': + print("No config file assigned") + sys.exit(0) + else: + if option == OPT_SHOWHDR: + do_showhdr(cfg_file) + else: + do_convert(cfg_file, option) + elif args.pack: + if cfg_file == '': + print("No config file assigned") + sys.exit(0) + else: + if option == OPT_UNPACK: + do_unpack(cfg_file, 0) + elif option == OPT_NOCRC: + do_unpack(cfg_file, 1) + elif option == OPT_STUFF: + do_stuff(cfg_file) + else: + do_pack(cfg_file) + elif args.read: + # -r spinor all out.bin + # -r nand 0x1000 0x100 out.bin + # -r otp all out.bin (block1 ~ block7) + # -r otp blockno 0x4 out.bin + arg_count = len(args.read) + if arg_count < 3: + print("At lease take 3 arguments") + sys.exit(0) + media = get_media(args.read[0]) + + try: + if media == DEV_UNKNOWN: + raise ValueError(f"Cannot support read {str.upper(args.read[0])}") + if arg_count == 3 and str.upper(args.read[1]) != 'ALL': + raise ValueError("Unknown arguments") + except ValueError as err: + sys.exit(err) + + if str.upper(args.read[1]) == 'ALL': + if media == DEV_OTP: + option |= 0x3fff00 + do_otp_read(media, 0, args.read[2], 352, option) + else: + do_img_read(media, 0, args.read[2], 0, option) + else: + try: + if media == DEV_OTP: + option = get_otpblock(args.read[1]) | option + else: + start = int(args.read[1], 0) + length = int(args.read[2], 0) + except ValueError as err: + print("Wrong start/length value") + sys.exit(err) + + if media == DEV_OTP: + do_otp_read(media, 0, args.read[3], length, option) + else: + do_img_read(media, start, args.read[3], length, option) + + elif args.write: + # -w spinor 0x1000 image.bin + # -w otp otp.json + # -w nand pack.img + arg_count = len(args.write) + if arg_count < 2: + print("At lease take 2 arguments") + sys.exit(0) + media = get_media(args.write[0]) + + try: + if media == DEV_UNKNOWN: + raise ValueError(f"Unknown storage media {str.upper(args.write[0])}") + if option == OPT_VERIFY and media == DEV_OTP: + raise ValueError(f"Do not support verify option on {str.upper(args.write[0])}") + if option == OPT_EXECUTE and media != DEV_DDR_SRAM: + raise ValueError(f"Do not support execution on {str.upper(args.write[0])}") + if option == OPT_RAW and media != DEV_NAND: + raise ValueError(f"Do not support raw write on {str.upper(args.write[0])}") + except ValueError as err: + sys.exit(err) + + if arg_count == 2: + if media == DEV_OTP: + do_otp_program(args.write[1]) + else: + do_pack_program(media, args.write[1], option) + else: + try: + start = int(args.write[1], 0) + except ValueError as err: + print("Wrong start value") + sys.exit(err) + do_img_program(media, start, args.write[2], option) + + elif args.erase: + # -e spinor all + # -e nand 0x100000 0x10000 -o withbad + # -e otp blockno + arg_count = len(args.erase) + if arg_count < 2: + print("At lease take 2 arguments") + sys.exit(0) + media = get_media(args.erase[0]) + + try: + if media in [DEV_DDR_SRAM, DEV_SD_EMMC, DEV_UNKNOWN]: + raise ValueError(f"{str.upper(args.erase[0])} does not support erase") + if arg_count == 2 and str.upper(args.erase[1]) != 'ALL' and media != DEV_OTP: + raise ValueError("Unknown arguments") + if str.upper(args.erase[1]) == 'ALL' and media == DEV_OTP: + raise ValueError("Wrong arguments") + except ValueError as err: + sys.exit(err) + + if media == DEV_OTP: + option = get_otpblock(args.erase[1]) + try: + # only can erase block 1, 3, 4 + if option == OPT_OTPBLK2: + raise ValueError(f"Error block 2, only erase block 1, 3, 4") + if option == OPT_OTPBLK5: + raise ValueError(f"Error block 5, only erase block 1, 3, 4") + if option == OPT_OTPBLK6: + raise ValueError(f"Error block 6, only erase block 1, 3, 4") + if option == OPT_OTPBLK7: + raise ValueError(f"Error block 7, only erase block 1, 3, 4") + if option == OPT_UNKNOWN: + raise ValueError(f"Error key number") + except ValueError as err: + sys.exit(err) + do_otp_erase(option) + else: + if str.upper(args.erase[1]) == 'ALL': + do_img_erase(media, 0, 0, option) + else: + try: + start = int(args.erase[1], 0) + length = int(args.erase[2], 0) + except ValueError as err: + print("Wrong start/length value") + sys.exit(err) + do_img_erase(media, start, length, option) + + elif args.storage: + # -s emmc 0x800000 + # -s emmc -o remove + arg_count = len(args.erase) + if arg_count != 2 and option != OPT_EJECT: + print("Takes 2 arguments. Storage device and reserved size") + sys.exit(0) + media = get_media(args.storage[0]) + try: + if media not in [DEV_SD_EMMC]: + raise ValueError("Only support eMMC/SD") + if option != OPT_NONE and option != OPT_EJECT: + raise ValueError("Unsupported option") + except ValueError as err: + sys.exit(err) + + if option == OPT_EJECT: + do_msc(media, 0, OPT_EJECT) + else: + try: + reserve = int(args.storage[1], 0) + except ValueError as err: + print("Wrong reserve size") + sys.exit(err) + do_msc(media, reserve) + elif args.version: + print('NuWriter ' + __version__) + print(__copyright__) + + +# Here goes the main function +if __name__ == "__main__": + #os.system("start cmd.exe") #Call do it. Will open cmd window in each process + main() diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr2_128mb_download_and_run.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr2_128mb_download_and_run.bat new file mode 100644 index 0000000000..7db6e016cc --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr2_128mb_download_and_run.bat @@ -0,0 +1,8 @@ +:forever_develop +py -3 nuwriter.py -a ddrimg\enc_ddr2_winbond_128mb.bin +IF %ERRORLEVEL% EQU 0 ( + py -3 nuwriter.py -o execute -w ddr 0x80400000 ..\rtthread.bin +) +pause + +goto :forever_develop \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr3_512mb_download_and_run.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr3_512mb_download_and_run.bat new file mode 100644 index 0000000000..93da94d220 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_ddr3_512mb_download_and_run.bat @@ -0,0 +1,8 @@ +:forever_develop +py -3 nuwriter.py -a ddrimg\enc_ddr3_winbond_512mb.bin +IF %ERRORLEVEL% EQU 0 ( + py -3 nuwriter.py -o execute -w ddr 0x80400000 ..\rtthread.bin +) +pause + +goto :forever_develop \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_nand_programming.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_nand_programming.bat new file mode 100644 index 0000000000..6ce69baf47 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_nand_programming.bat @@ -0,0 +1,8 @@ +py -3 nuwriter.py -c header-nand.json +py -3 nuwriter.py -p pack-nand.json + +py -3 nuwriter.py -a ddrimg\enc_ddr3_winbond_512mb.bin +IF %ERRORLEVEL% EQU 0 ( + py -3 nuwriter.py -w nand pack/pack.bin +) +PAUSE \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_sd_programming.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_sd_programming.bat new file mode 100644 index 0000000000..6db4817ef1 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_sd_programming.bat @@ -0,0 +1,8 @@ +py -3 nuwriter.py -c header-sd.json +py -3 nuwriter.py -p pack-sd.json + +py -3 nuwriter.py -a ddrimg\enc_ddr3_winbond_512mb.bin +IF %ERRORLEVEL% EQU 0 ( + py -3 nuwriter.py -w sd pack/pack.bin +) +PAUSE \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.bat b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.bat new file mode 100644 index 0000000000..7bfe4b8677 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/nuwriter_spinand_programming.bat @@ -0,0 +1,8 @@ +py -3 nuwriter.py -c header-nand.json +py -3 nuwriter.py -p pack-nand.json + +py -3 nuwriter.py -a ddrimg\enc_ddr3_winbond_512mb.bin +IF %ERRORLEVEL% EQU 0 ( + py -3 nuwriter.py -w spinand pack/pack.bin +) +PAUSE \ No newline at end of file diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-nand.json b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-nand.json new file mode 100644 index 0000000000..eec55d864c --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-nand.json @@ -0,0 +1,21 @@ +{ + "image": + [ + { + "offset": "0x0", + "file": "conv/header.bin", + "type": 1 + }, + + { + "offset": "0x20000", + "file": "ddrimg/enc_ddr3_winbond_512mb.bin", + "type": 0 + }, + { + "offset": "0x80000", + "file": "../rtthread.bin", + "type": 1 + } + ] +} diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-sd.json b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-sd.json new file mode 100644 index 0000000000..617827b600 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/pack-sd.json @@ -0,0 +1,20 @@ +{ + "image": + [ + { + "offset": "0x400", + "file": "conv/header.bin", + "type": 0 + }, + { + "offset": "0x1000", + "file": "ddrimg/enc_ddr3_winbond_512mb.bin", + "type": 0 + }, + { + "offset": "0x4000", + "file": "../rtthread.bin", + "type": 0 + } + ] +} diff --git a/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/xusbcom.py b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/xusbcom.py new file mode 100644 index 0000000000..da14584865 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/nuwriter_scripts/xusbcom.py @@ -0,0 +1,154 @@ +# NOTE: This script is test under Python 3.x + +__copyright__ = "Copyright (C) 2020~2021 Nuvoton Technology Corp. All rights reserved" + +import sys +import usb.core +import usb.util +import json +import typing + +XFER_LEN_CMD = 0x0012 +GET_INFO_CMD = 0x0005 + + +class XUsbCom: + + def __init__(self, _dev): + self.dev = _dev + self.write_addr = 0x1 + self.read_addr = 0x81 + self.attach = False + self.id = 0 + self.info = b'' + + def write(self, data) -> None: + try: + # Vendor command set transfer length + self.dev.ctrl_transfer(0x40, 0xA0, wValue=XFER_LEN_CMD, wIndex=len(data), data_or_wLength='') + # Actual data + self.dev.write(self.write_addr, data, timeout=1000) + except usb.core.USBError as err: + sys.exit(err) + + def read(self, size) -> bytes: + try: + buf = self.dev.read(self.read_addr, size, timeout=1000) + except usb.core.USBError as err: + sys.exit(err) + return buf + + def set_media(self, media) -> None: + try: + # Vendor command set type + self.dev.ctrl_transfer(0x40, 0xB0, wValue=media, wIndex=0, data_or_wLength='') + except usb.core.USBError as err: + sys.exit(err) + return + + def get_info(self, data) -> bytes: + try: + self.dev.ctrl_transfer(0x40, 0xB0, wValue=GET_INFO_CMD, wIndex=0, data_or_wLength='') + self.dev.ctrl_transfer(0x40, 0xA0, wValue=XFER_LEN_CMD, wIndex=76, data_or_wLength='') + self.dev.write(0x01, data, timeout=1000) + self.info = self.dev.read(0x81, 76, timeout=1000) + # not used + self.dev.read(0x81, 4, timeout=5000) + + except usb.core.USBError as err: + sys.exit(err) + return self.info + + def set_id(self, i) -> None: + self.id = i + + def get_id(self) -> int: + return self.id + + @staticmethod + def set_align(nand, spinand) -> None: + # See if we need to overwrite existing json file. + overwrite = False + try: + with open(".config", "r") as json_file: + cfg = json.load(json_file) + for key in cfg.keys(): + if key == 'nand_align': + if nand != int(cfg['nand_align']): + overwrite = True + elif key == 'spinand_align': + if spinand != int(cfg['spinand_align']): + overwrite = True + except (IOError, OSError, json.decoder.JSONDecodeError) as err: + overwrite = True + + if overwrite is True: + try: + with open(".config", "w+") as json_file: + new_key = {'nand_align': nand, 'spinand_align': spinand} + json.dump(new_key, json_file) + except (IOError, OSError) as err: + print("Write .config failed. Please re-attach") + sys.exit(err) + + @staticmethod + def get_align() -> typing.Tuple[int, int]: + try: + with open(".config", "r") as json_file: + cfg = json.load(json_file) + except (IOError, OSError, json.decoder.JSONDecodeError) as err: + print("Open/parsing .config failed. Please re-attach") + sys.exit(err) + nand_align = spinand_align = 0 + for key in cfg.keys(): + if key == 'nand_align': + nand_align = int(cfg['nand_align']) + elif key == 'spinand_align': + spinand_align = int(cfg['spinand_align']) + return nand_align, spinand_align + + +class XUsbComList: + + def __init__(self, attach_all=False): + vid = 0x0416 + pid = 0x5963 + try: + self.devices = list(usb.core.find(idVendor=vid, idProduct=pid, + find_all=True if attach_all is True else False)) + except TypeError: + # list will raise exception if there's no device + self.devices = [] + return + except usb.core.NoBackendError as err: + sys.exit(err) + + if len(self.devices) != 0 and attach_all is False: + # Object type return on attach_all == False is different + self.devices[0] = self.devices[0].device + + for dev in self.devices: + try: + dev.set_configuration() + except (usb.core.USBError, NotImplementedError) as err: + sys.exit(err) + + for i in range(0, len(self.devices)): + self.devices[i] = XUsbCom(self.devices[i]) + self.devices[i].set_id(i) + + def __del__(self): + if len(self.devices) != 0: + for dev in self.devices: + try: + usb.util.dispose_resources(dev.dev) + # dev.dev.reset() + dev = None + #except (usb.core.USBError, NotImplementedError) as err: + except usb.core.USBError as err: + sys.exit(err) + + self.devices = None + + def get_dev(self): + return self.devices diff --git a/bsp/nuvoton/numaker-iot-ma35d1/preload/SConscript b/bsp/nuvoton/numaker-iot-ma35d1/preload/SConscript new file mode 100644 index 0000000000..73123b415f --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/preload/SConscript @@ -0,0 +1,14 @@ +# RT-Thread building script for component + +from building import * + + +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +src = Glob('*.c') + Glob('*.cpp') + Glob('*.S') +CPPPATH = [ cwd ] + +group = DefineGroup('board', src, depend = [''], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/nuvoton/numaker-iot-ma35d1/preload/entry_point.S b/bsp/nuvoton/numaker-iot-ma35d1/preload/entry_point.S new file mode 100644 index 0000000000..210a262d4a --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/preload/entry_point.S @@ -0,0 +1,109 @@ +.section ".text.entrypoint" +.globl system_vectors + +ma35d1_start: + .word 0x10000014 + .word 0x9100029f + .word 0xd539f220 + .word 0xb27a0000 + .word 0xd519f220 + .word 0xd53800a1 + .word 0x92400421 + .word 0xb4000141 + .word 0xd503205f + .word 0xd2800900 + .word 0xf2a808c0 + .word 0xf9400001 + .word 0xf100003f + .word 0x54ffff60 + .word 0x91001000 + .word 0xb9000001 + .word 0x14000012 + .word 0xd2800980 + .word 0xf2a808c0 + .word 0xaa1f03e1 + .word 0xb9000001 + .word 0xd282000a + .word 0xd100054a + .word 0xf100015f + .word 0x54000140 + .word 0xd2800900 + .word 0xf2a808c0 + .word 0xaa1403e1 + .word 0xb9000001 + .word 0xd503209f + .word 0x91001000 + .word 0xb9400002 + .word 0xeb02003f + .word 0x54fffea1 + .word 0xd2836000 + .word 0xf2a016e0 + .word 0xd51be000 + .word 0xd2820000 + .word 0xf2aa1000 + .word 0x52800069 + .word 0xb9000009 + .word 0xb9400409 + .word 0x1200112a + .word 0x340001aa + .word 0x9102000b + .word 0x52800009 + .word 0xb8004569 + .word 0xb8004569 + .word 0x5100054a + .word 0x35ffffca + .word 0xd2840001 + .word 0xf2aa1001 + .word 0x52800060 + .word 0xb9000020 + .word 0x52801000 + .word 0xb9000420 + .word 0xd2820000 + .word 0xf2aa1000 + .word 0xd2840001 + .word 0xf2aa1001 + .word 0x52800009 + .word 0xb9008009 + .word 0x52800029 + .word 0xb9010009 + .word 0x52803ce9 + .word 0xb9000029 + .word 0x52801009 + .word 0xb9000429 + .word 0xd2a00600 + .word 0xd5181040 + .word 0xaa1f03e0 + .word 0xb2630000 + .word 0xb2640000 + .word 0xb2690000 + .word 0xb26a0000 + .word 0xb26c0000 + .word 0xb2750000 + .word 0xd5181000 + .word 0xaa1f03e0 + .word 0xb2770000 + .word 0xb2780000 + .word 0xb2790000 + .word 0xb27b0000 + .word 0xb27c0000 + .word 0xd51e1100 + .word 0xaa1f03e0 + .word 0xd2800060 + .word 0xb2780000 + .word 0xb2790000 + .word 0xb27a0000 + .word 0xb27c0000 + .word 0xd51e4000 + .word 0x10000060 + .word 0xd51e4020 + .word 0xd69f03e0 + +.L__aarch32_code: + + nop + nop + nop + nop + ldr r0, =ma35d1_start + mov sp, r0 + ldr pc, =system_vectors diff --git a/bsp/nuvoton/numaker-iot-ma35d1/preload/env_build.bat b/bsp/nuvoton/numaker-iot-ma35d1/preload/env_build.bat new file mode 100644 index 0000000000..57136e7b8e --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/preload/env_build.bat @@ -0,0 +1,7 @@ +@set RTT_CC=gcc +@set RTT_EXEC_PATH=C:\Program Files (x86)\GNU Tools ARM Embedded\8 2019-q3-aarch64-elf\bin +@set RTT_CC_PREFIX=aarch64-elf- +@set PATH=%RTT_EXEC_PATH%;%ENV_ROOT%\tools\gnu_gcc\arm_gcc\mingw\bin;%PATH% + +make +python transcode.py diff --git a/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch64.ld b/bsp/nuvoton/numaker-iot-ma35d1/preload/preload.ld similarity index 77% rename from bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch64.ld rename to bsp/nuvoton/numaker-iot-ma35d1/preload/preload.ld index 2558c052e6..bfe4705d25 100644 --- a/bsp/nuvoton/numaker-hmi-ma35d1/linking_scripts/aarch64.ld +++ b/bsp/nuvoton/numaker-iot-ma35d1/preload/preload.ld @@ -1,12 +1,3 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * 2017-5-30 bernard first version - */ - SECTIONS { . = 0x80400000; @@ -26,33 +17,6 @@ SECTIONS *(COMMON) - /* section information for finsh shell */ - . = ALIGN(16); - __fsymtab_start = .; - KEEP(*(FSymTab)) - __fsymtab_end = .; - . = ALIGN(16); - - . = ALIGN(16); - __vsymtab_start = .; - KEEP(*(VSymTab)) - __vsymtab_end = .; - . = ALIGN(16); - - /* section information for initial. */ - . = ALIGN(16); - __rt_init_start = .; - KEEP(*(SORT(.rti_fn*))) - __rt_init_end = .; - . = ALIGN(16); - - /* section information for utest */ - . = ALIGN(16); - __rt_utest_tc_tab_start = .; - KEEP(*(UtestTcTab)) - __rt_utest_tc_tab_end = .; - . = ALIGN(16); - _etext = .; } diff --git a/bsp/nuvoton/numaker-iot-ma35d1/preload/transcode.py b/bsp/nuvoton/numaker-iot-ma35d1/preload/transcode.py new file mode 100644 index 0000000000..a918f45245 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/preload/transcode.py @@ -0,0 +1,41 @@ +# -*- coding: UTF-8 -*- + +import os + +def extract_line(fname, pattern): + with open(fname, "r") as f: + lines = f.readlines() + f.close() + with open("entry_point.S", "w") as f: + counter=0 + f.write(".section \".text.entrypoint\"\n") + f.write(".globl system_vectors\n") + f.write("\n") + f.write("ma35d1_start:\n") + for line in lines: + if pattern in line: + new_line = " .word 0x" + line[6:14] + "\n" + f.write(new_line) + counter = counter+1 + f.write("\n") + f.write(".L__aarch32_code:\n") + f.write("\n") + # Append NOP to align vector table. + counter = (counter+5)*4 + counter_align = (counter+32-1) & ~(32-1) + nop_num = (counter_align - counter) / 4 + print hex(counter), hex(counter_align), nop_num + j = 0 + while j < nop_num: + f.write(" nop\n") + j += 1 + f.write(" ldr r0, =ma35d1_start\n") + f.write(" mov sp, r0\n") + f.write(" ldr pc, =system_vectors\n") + f.close() + +def formatfiles(): + extract_line("preload.txt", ":\t") + +if __name__ == '__main__': + formatfiles() diff --git a/bsp/nuvoton/numaker-iot-ma35d1/rtconfig.py b/bsp/nuvoton/numaker-iot-ma35d1/rtconfig.py new file mode 100644 index 0000000000..81218b47f8 --- /dev/null +++ b/bsp/nuvoton/numaker-iot-ma35d1/rtconfig.py @@ -0,0 +1,77 @@ +import os +# toolchains options +ARCH = 'arm' +CPU = 'cortex-a' +# toolchains options +CROSS_TOOL = 'gcc' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR + +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Program Files (x86)\GNU Tools ARM Embedded\6 2017-q1-update\bin' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +#BUILD = 'debug' +BUILD = '' +MAP_FILE = 'rtthread_ma35d1.map' +LINK_FILE = 'linking_scripts/aarch32' +TARGET_NAME = 'rtthread.bin' + +#------- GCC settings ---------------------------------------------------------- +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + STRIP = PREFIX + 'strip' + + DEVICE = ' -march=armv8-a -mfpu=neon-vfpv4 -ftree-vectorize -ffast-math -msoft-float' + CFLAGS = DEVICE + ' -Wall -fno-zero-initialized-in-bss ' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' + LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-cref,-Map=' + MAP_FILE + ',-cref,-u,system_vectors' + ' -T ' + LINK_FILE + '.ld' + CXXFLAGS = ' -march=armv8-a -mfpu=neon-vfpv4 -std=c++11 ' + + M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC ' + M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC' + M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\ + ' -shared -fPIC -nostartfiles -nostdlib -static-libgcc' + M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n' + #M_BIN_PATH = r'z:\fatdisk\root' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n' + POST_ACTION += SIZE + ' $TARGET\n' + + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/nuvoton/numaker-m032ki/Nu_Link_Driver.ini b/bsp/nuvoton/numaker-m032ki/Nu_Link_Driver.ini deleted file mode 100644 index 73b252707a..0000000000 --- a/bsp/nuvoton/numaker-m032ki/Nu_Link_Driver.ini +++ /dev/null @@ -1,1038 +0,0 @@ -[Version] -Nu_LinkVersion=V5.14 -[Process] -ProcessID=0x0000b660 -ProcessCreationTime_L=0xe87ebcaf -ProcessCreationTime_H=0x01d74ae4 -NuLinkID=0x18000000 -NuLinkIDs_Count=0x00000001 -NuLinkID0=0x18000000 -[ChipSelect] -;ChipName= -ChipName=M031 -[NUC505] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC505_SPIFLASH.FLM -[NUC4xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC400_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x014fb180 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[NUC2xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC200_AP_128.FLM -[NUC1311] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC1311_AP_64.FLM -[NUC126] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=NUC126_AP_256.FLM -[NUC121] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC121_AP_32.FLM -[NUC1xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC100_AP_128.FLM -[NUC029] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NUC029_AP_16.FLM -[NM1820] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1820_AP_17_5.FLM -[NM1810] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1810_AP_29_5.FLM -[NM1500] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1500_AP_128.FLM -[NM1330] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1330_AP_64.FLM -[NM1320] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1320_AP_32.FLM -[NM1240] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1240_AP_64.FLM -[NM1230] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1230_AP_64.FLM -[NM1200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1200_AP_8.FLM -[NM1120] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1120_AP_29_5.FLM -[TF5100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=TF5100_AP_64.FLM -[NDA102] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NDA102_AP_29_5.FLM -[Nano103] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano103_AP_64.FLM -[Nano100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano100_AP_64.FLM -[N576] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N576_AP_145.FLM -[N575] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N575_AP_145.FLM -[N572] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N572Fxxx.FLM -[N571] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N571E000.FLM -[N570] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N570_AP_64.FLM -[N569] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N569_AP_64.FLM -[N512] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N512_AP_64.FLM -[Mini57] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini57_AP_29_5.FLM -[Mini51] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini51_AP_16.FLM -[M481] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M481_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M480LD] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M480LD_AP_256.FLM -[M479] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M479_AP_256.FLM -[M451] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M451_AP_256.FLM -[M471] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M471_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M251] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M251_AP_192.FLM -[M2351] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2351_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M261] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M261_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[MR63] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=MR63_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M2354] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -CheckDPM=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2354_AP_1M.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M071] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M071_AP_128.FLM -[M0564] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M0564_AP_256.FLM -[M0519] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0519_AP_128.FLM -[M0518] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0518_AP_64.FLM -[M05x] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0516_AP_64.FLM -[M0A21] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0A21_AP_32.FLM -[M030G] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -DisableTimeoutDetect=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M030G_AP_64.FLM -[M031] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M031_AP_128.FLM -CheckDPM=0 -DisableTimeoutDetect=0 -[NPCX] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NPCX_AP_512.FLM -[I96000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=2 -Program=0 -Verify=0 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x8000 -ProgramAlgorithm= -[I94000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=I94000_AP_512.FLM -[ISD9300] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9300_AP_145.FLM -[I9200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=I9200_AP_128.FLM -[ISD9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9100_AP_145.FLM -[ISD9000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9000_AP_64.FLM -[AU9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=AU9100_AP_145.FLM -[Autodetect] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= -[General] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= diff --git a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-m032ki/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m032ki/project.uvprojx b/bsp/nuvoton/numaker-m032ki/project.uvprojx deleted file mode 100644 index bc6c2431a9..0000000000 --- a/bsp/nuvoton/numaker-m032ki/project.uvprojx +++ /dev/null @@ -1,1256 +0,0 @@ - - - 2.1 -
### uVision Project, (C) Keil Software
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__RTTHREAD__, __STDC_LIMIT_MACROS, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND - - applications;.;board;board\NuClockConfig;board\NuPinConfig;..\libraries\m031\CMSIS\Include;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m0;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\libraries\m031\Device\Nuvoton\M031\Include;..\libraries\m031\rtt_port;..\..\..\components\dfs\include;..\..\..\components\dfs\filesystems\devfs;..\..\..\components\finsh;.;..\..\..\include;..\libraries\m031\StdDriver\inc;..\libraries\nu_packages\Demo;..\libraries\nu_packages\TPC;..\libraries\nu_packages\NuUtils\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\usb\usbdevice;..\..\..\components\utilities\utest;..\..\..\examples\utest\testcases\kernel;..\..\..\examples\utest\testcases\utest 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..\libraries\m031\rtt_port\drv_bpwm_capture.c - - - - - drv_clk.c - 1 - ..\libraries\m031\rtt_port\drv_clk.c - - - - - drv_common.c - 1 - ..\libraries\m031\rtt_port\drv_common.c - - - - - drv_crc.c - 1 - ..\libraries\m031\rtt_port\drv_crc.c - - - - - drv_crypto.c - 1 - ..\libraries\m031\rtt_port\drv_crypto.c - - - - - drv_ebi.c - 1 - ..\libraries\m031\rtt_port\drv_ebi.c - - - - - drv_fmc.c - 1 - ..\libraries\m031\rtt_port\drv_fmc.c - - - - - drv_gpio.c - 1 - ..\libraries\m031\rtt_port\drv_gpio.c - - - - - drv_i2c.c - 1 - ..\libraries\m031\rtt_port\drv_i2c.c - - - - - drv_pdma.c - 1 - ..\libraries\m031\rtt_port\drv_pdma.c - - - - - drv_pwm.c - 1 - ..\libraries\m031\rtt_port\drv_pwm.c - - - - - drv_pwm_capture.c - 1 - ..\libraries\m031\rtt_port\drv_pwm_capture.c - - - - - drv_qspi.c - 1 - ..\libraries\m031\rtt_port\drv_qspi.c - - - - - drv_rtc.c - 1 - ..\libraries\m031\rtt_port\drv_rtc.c - - - - - drv_softi2c.c - 1 - ..\libraries\m031\rtt_port\drv_softi2c.c - - - - - drv_spi.c - 1 - ..\libraries\m031\rtt_port\drv_spi.c - - - - - drv_spii2s.c - 1 - ..\libraries\m031\rtt_port\drv_spii2s.c - - - - - drv_timer.c - 1 - ..\libraries\m031\rtt_port\drv_timer.c - - - - - drv_timer_capture.c - 1 - ..\libraries\m031\rtt_port\drv_timer_capture.c - - - - - drv_uart.c - 1 - ..\libraries\m031\rtt_port\drv_uart.c - - - - - drv_ui2c.c - 1 - ..\libraries\m031\rtt_port\drv_ui2c.c - - - - - drv_usbd.c - 1 - ..\libraries\m031\rtt_port\drv_usbd.c - - - - - drv_uspi.c - 1 - ..\libraries\m031\rtt_port\drv_uspi.c - - - - - drv_uuart.c - 1 - ..\libraries\m031\rtt_port\drv_uuart.c - - - - - drv_wdt.c - 1 - ..\libraries\m031\rtt_port\drv_wdt.c - - - - - Filesystem - - - devfs.c - 1 - ..\..\..\components\dfs\filesystems\devfs\devfs.c - - - - - dfs.c - 1 - ..\..\..\components\dfs\src\dfs.c - - - - - dfs_file.c - 1 - ..\..\..\components\dfs\src\dfs_file.c - - - - - dfs_fs.c - 1 - ..\..\..\components\dfs\src\dfs_fs.c - - - - - dfs_posix.c - 1 - ..\..\..\components\dfs\src\dfs_posix.c - - - - - Finsh - - - shell.c - 1 - ..\..\..\components\finsh\shell.c - - - - - msh.c - 1 - ..\..\..\components\finsh\msh.c - - - - - msh_parse.c - 1 - ..\..\..\components\finsh\msh_parse.c - - - - - cmd.c - 1 - ..\..\..\components\finsh\cmd.c - - - - - msh_file.c - 1 - ..\..\..\components\finsh\msh_file.c - - - - - Kernel - - - clock.c - 1 - ..\..\..\src\clock.c - - - - - components.c - 1 - ..\..\..\src\components.c - - - - - device.c - 1 - ..\..\..\src\device.c - - - - - idle.c - 1 - ..\..\..\src\idle.c - - - - - ipc.c - 1 - ..\..\..\src\ipc.c - - - - - irq.c - 1 - ..\..\..\src\irq.c - - - - - kservice.c - 1 - ..\..\..\src\kservice.c - - - - - mem.c - 1 - ..\..\..\src\mem.c - - - - - mempool.c - 1 - ..\..\..\src\mempool.c - - - - - object.c - 1 - ..\..\..\src\object.c - - - - - scheduler.c - 1 - ..\..\..\src\scheduler.c - - - - - thread.c - 1 - ..\..\..\src\thread.c - - - - - timer.c - 1 - ..\..\..\src\timer.c - - - - - Libraries - - - nu_rtc.c - 1 - ..\libraries\m031\StdDriver\src\nu_rtc.c - - - - - nu_ebi.c - 1 - ..\libraries\m031\StdDriver\src\nu_ebi.c - - - - - nu_gpio.c - 1 - ..\libraries\m031\StdDriver\src\nu_gpio.c - - - - - nu_crc.c - 1 - ..\libraries\m031\StdDriver\src\nu_crc.c - - - - - nu_wdt.c - 1 - ..\libraries\m031\StdDriver\src\nu_wdt.c - - - - - nu_clk.c - 1 - ..\libraries\m031\StdDriver\src\nu_clk.c - - - - - nu_timer.c - 1 - ..\libraries\m031\StdDriver\src\nu_timer.c - - - - - nu_acmp.c - 1 - ..\libraries\m031\StdDriver\src\nu_acmp.c - - - - - nu_usci_spi.c - 1 - ..\libraries\m031\StdDriver\src\nu_usci_spi.c - - - - - nu_fmc.c - 1 - ..\libraries\m031\StdDriver\src\nu_fmc.c - - - - - nu_sys.c - 1 - ..\libraries\m031\StdDriver\src\nu_sys.c - - - - - nu_uart.c - 1 - ..\libraries\m031\StdDriver\src\nu_uart.c - - - - - nu_wwdt.c - 1 - ..\libraries\m031\StdDriver\src\nu_wwdt.c - - - - - nu_bpwm.c - 1 - ..\libraries\m031\StdDriver\src\nu_bpwm.c - - - - - nu_pdma.c - 1 - ..\libraries\m031\StdDriver\src\nu_pdma.c - - - - - nu_qspi.c - 1 - ..\libraries\m031\StdDriver\src\nu_qspi.c - - - - - nu_pwm.c - 1 - ..\libraries\m031\StdDriver\src\nu_pwm.c - - - - - nu_adc.c - 1 - ..\libraries\m031\StdDriver\src\nu_adc.c - - - - - nu_spi.c - 1 - ..\libraries\m031\StdDriver\src\nu_spi.c - - - - - nu_i2c.c - 1 - ..\libraries\m031\StdDriver\src\nu_i2c.c - - - - - nu_usbd.c - 1 - ..\libraries\m031\StdDriver\src\nu_usbd.c - - - - - nu_usci_uart.c - 1 - ..\libraries\m031\StdDriver\src\nu_usci_uart.c - - - - - nu_usci_i2c.c - 1 - ..\libraries\m031\StdDriver\src\nu_usci_i2c.c - - - - - nu_pkgs_demo - - - usbd_cdc_vcom_echo.c - 1 - ..\libraries\nu_packages\Demo\usbd_cdc_vcom_echo.c - - - - - slcd_show_tick.c - 1 - ..\libraries\nu_packages\Demo\slcd_show_tick.c - - - - - usbd_hid_dance_mouse.c - 1 - ..\libraries\nu_packages\Demo\usbd_hid_dance_mouse.c - - - - - rt_usbd - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - hid.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\hid.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - utestcases - - - mem_tc.c - 1 - ..\..\..\examples\utest\testcases\kernel\mem_tc.c - - - - - pass_tc.c - 1 - ..\..\..\examples\utest\testcases\utest\pass_tc.c - - - - - - - - - - - - diff --git a/bsp/nuvoton/numaker-m032ki/rtconfig.h b/bsp/nuvoton/numaker-m032ki/rtconfig.h deleted file mode 100644 index 4f225b770d..0000000000 --- a/bsp/nuvoton/numaker-m032ki/rtconfig.h +++ /dev/null @@ -1,286 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 8 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 512 -#define RT_USING_TIMER_SOFT -#define RT_TIMER_THREAD_PRIO 4 -#define RT_TIMER_THREAD_STACK_SIZE 512 - -/* kservice optimization */ - -#define RT_DEBUG - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define ARCH_ARM_CORTEX_M -#define ARCH_ARM_CORTEX_M0 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 2 -#define DFS_FILESYSTEM_TYPES_MAX 2 -#define DFS_FD_MAX 16 -#define RT_USING_DFS_DEVFS - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 64 -#define RT_USING_HWTIMER -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_PM -#define PM_TICKLESS_THRESHOLD_TIME 2 -#define RT_USING_RTC -#define RT_USING_WDT - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define RT_USB_DEVICE_COMPOSITE -#define RT_USB_DEVICE_NONE -#define RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID_MOUSE - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - -#define RT_USING_UTESTCASES - -/* Utest Self Testcase */ - -#define UTEST_SELF_PASS_TC - -/* Kernel Testcase */ - -#define UTEST_SMALL_MEM_TC - -/* CPP11 Testcase */ - - -/* Utest Serial Testcase */ - - -/* RTT Posix Testcase */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_M032 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 4 -#define NU_PDMA_SGTBL_POOL_SIZE 16 -#define BSP_USING_GPIO -#define BSP_USING_CLK -#define NU_CLK_INVOKE_WKTMR -#define BSP_USING_RTC -#define NU_RTC_SUPPORT_IO_RW -#define NU_RTC_SUPPORT_MSH_CMD -#define BSP_USING_ADC -#define BSP_USING_ADC0 -#define BSP_USING_TMR -#define BSP_USING_TIMER -#define BSP_USING_TMR0 -#define BSP_USING_TIMER0 -#define BSP_USING_TMR1 -#define BSP_USING_TIMER1 -#define BSP_USING_TMR2 -#define BSP_USING_TIMER2 -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_UART1 -#define BSP_USING_UART1_TX_DMA -#define BSP_USING_UART1_RX_DMA -#define BSP_USING_UART2 -#define BSP_USING_UART3 -#define BSP_USING_UART4 -#define BSP_USING_UART5 -#define BSP_USING_UART6 -#define BSP_USING_UART7 -#define BSP_USING_WDT -#define BSP_USING_USBD - -/* On-board Peripheral Drivers */ - -#define BSP_USING_NULINKME - -/* Board extended module drivers */ - - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO - -#endif diff --git a/bsp/nuvoton/numaker-m2354/Nu_Link_Driver.ini b/bsp/nuvoton/numaker-m2354/Nu_Link_Driver.ini deleted file mode 100644 index aae0ad5cb6..0000000000 --- a/bsp/nuvoton/numaker-m2354/Nu_Link_Driver.ini +++ /dev/null @@ -1,1037 +0,0 @@ -[Version] -Nu_LinkVersion=V5.14 -[Process] -ProcessID=0x00009908 -ProcessCreationTime_L=0xda6c5f90 -ProcessCreationTime_H=0x01d74571 -NuLinkID=0x1800003c -NuLinkIDs_Count=0x00000001 -NuLinkID0=0x1800003c -[ChipSelect] -;ChipName= -ChipName=M2354 -[NUC505] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC505_SPIFLASH.FLM -[NUC4xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC400_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x014fb180 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[NUC2xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC200_AP_128.FLM -[NUC1311] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC1311_AP_64.FLM -[NUC126] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=NUC126_AP_256.FLM -[NUC121] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC121_AP_32.FLM -[NUC1xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC100_AP_128.FLM -[NUC029] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NUC029_AP_16.FLM -[NM1820] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1820_AP_17_5.FLM -[NM1810] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1810_AP_29_5.FLM -[NM1500] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1500_AP_128.FLM -[NM1330] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1330_AP_64.FLM -[NM1320] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1320_AP_32.FLM -[NM1240] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1240_AP_64.FLM -[NM1230] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1230_AP_64.FLM -[NM1200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1200_AP_8.FLM -[NM1120] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1120_AP_29_5.FLM -[TF5100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=TF5100_AP_64.FLM -[NDA102] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NDA102_AP_29_5.FLM -[Nano103] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano103_AP_64.FLM -[Nano100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano100_AP_64.FLM -[N576] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N576_AP_145.FLM -[N575] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N575_AP_145.FLM -[N572] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N572Fxxx.FLM -[N571] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N571E000.FLM -[N570] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N570_AP_64.FLM -[N569] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N569_AP_64.FLM -[N512] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N512_AP_64.FLM -[Mini57] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini57_AP_29_5.FLM -[Mini51] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini51_AP_16.FLM -[M481] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M481_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M480LD] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M480LD_AP_256.FLM -[M479] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M479_AP_256.FLM -[M451] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M451_AP_256.FLM -[M471] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M471_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M251] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M251_AP_192.FLM -[M2351] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2351_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M261] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M261_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[MR63] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=MR63_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M2354] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -CheckDPM=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2354_AP_1M.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -DisableTimeoutDetect=0 -[M071] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M071_AP_128.FLM -[M0564] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M0564_AP_256.FLM -[M0519] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0519_AP_128.FLM -[M0518] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0518_AP_64.FLM -[M05x] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0516_AP_64.FLM -[M0A21] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0A21_AP_32.FLM -[M030G] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -DisableTimeoutDetect=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M030G_AP_64.FLM -[M031] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Bank=0 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M031_AP_128.FLM -[NPCX] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NPCX_AP_512.FLM -[I96000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=2 -Program=0 -Verify=0 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x8000 -ProgramAlgorithm= -[I94000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=I94000_AP_512.FLM -[ISD9300] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9300_AP_145.FLM -[I9200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=I9200_AP_128.FLM -[ISD9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9100_AP_145.FLM -[ISD9000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9000_AP_64.FLM -[AU9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=AU9100_AP_145.FLM -[Autodetect] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= -[General] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= diff --git a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-m2354/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m2354/project.uvprojx b/bsp/nuvoton/numaker-m2354/project.uvprojx deleted file mode 100644 index a60d2e3ce7..0000000000 --- a/bsp/nuvoton/numaker-m2354/project.uvprojx +++ /dev/null @@ -1,2344 +0,0 @@ - - - 2.1 -
### uVision Project, (C) Keil Software
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__CLK_TCK=RT_TICK_PER_SECOND - - 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..\libraries\nu_packages\Demo\usbd_cdc_vcom_echo.c - - - - - slcd_show_tick.c - 1 - ..\libraries\nu_packages\Demo\slcd_show_tick.c - - - - - usbd_hid_dance_mouse.c - 1 - ..\libraries\nu_packages\Demo\usbd_hid_dance_mouse.c - - - - - nu_pkgs_slcd - - - slcd_rhe6616tp01.c - 1 - ..\libraries\nu_packages\SLCD\slcd_rhe6616tp01.c - - - - - POSIX - - - poll.c - 1 - ..\..\..\components\libc\posix\io\poll\poll.c - - - - - select.c - 1 - ..\..\..\components\libc\posix\io\poll\select.c - - - - - rt_usbd - - - hid.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\hid.c - - - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - rt_usbh - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - hub.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\hub.c - - - - - usbhost.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost.c - - - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - usbhost_core.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_at.c - 1 - ..\..\..\components\net\sal\impl\af_inet_at.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - Sensors - - - sensor_cmd.c - 1 - ..\..\..\components\drivers\sensors\sensor_cmd.c - - - - - sensor.c - 1 - ..\..\..\components\drivers\sensors\sensor.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - - - - - - - - diff --git a/bsp/nuvoton/numaker-m2354/rtconfig.h b/bsp/nuvoton/numaker-m2354/rtconfig.h deleted file mode 100644 index e58abe51d0..0000000000 --- a/bsp/nuvoton/numaker-m2354/rtconfig.h +++ /dev/null @@ -1,381 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 8 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 2048 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 4 -#define DFS_FILESYSTEM_TYPES_MAX 4 -#define DFS_FD_MAX 32 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 2 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS -#define RT_USING_FAL -#define FAL_DEBUG_CONFIG -#define FAL_DEBUG 1 -#define FAL_PART_HAS_TABLE_CFG - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 2048 -#define RT_USING_CAN -#define RT_USING_HWTIMER -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_PM -#define PM_TICKLESS_THRESHOLD_TIME 2 -#define RT_USING_RTC -#define RT_USING_SDIO -#define RT_SDIO_STACK_SIZE 2048 -#define RT_SDIO_THREAD_PRIORITY 15 -#define RT_MMCSD_STACK_SIZE 2048 -#define RT_MMCSD_THREAD_PREORITY 22 -#define RT_MMCSD_MAX_PARTITION 16 -#define RT_SDIO_DEBUG -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_SFUD -#define RT_SFUD_USING_SFDP -#define RT_SFUD_USING_FLASH_INFO_TABLE -#define RT_SFUD_USING_QSPI -#define RT_SFUD_SPI_MAX_HZ 50000000 -#define RT_DEBUG_SFUD -#define RT_USING_WDT -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_SENSOR -#define RT_USING_SENSOR_CMD -#define RT_USING_HWCRYPTO -#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto" -#define RT_HWCRYPTO_IV_MAX_SIZE 16 -#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256 -#define RT_HWCRYPTO_USING_AES -#define RT_HWCRYPTO_USING_AES_ECB -#define RT_HWCRYPTO_USING_AES_CBC -#define RT_HWCRYPTO_USING_AES_CFB -#define RT_HWCRYPTO_USING_AES_CTR -#define RT_HWCRYPTO_USING_AES_OFB -#define RT_HWCRYPTO_USING_DES -#define RT_HWCRYPTO_USING_DES_ECB -#define RT_HWCRYPTO_USING_DES_CBC -#define RT_HWCRYPTO_USING_3DES -#define RT_HWCRYPTO_USING_3DES_ECB -#define RT_HWCRYPTO_USING_3DES_CBC -#define RT_HWCRYPTO_USING_SHA1 -#define RT_HWCRYPTO_USING_SHA2 -#define RT_HWCRYPTO_USING_SHA2_224 -#define RT_HWCRYPTO_USING_SHA2_256 -#define RT_HWCRYPTO_USING_SHA2_384 -#define RT_HWCRYPTO_USING_SHA2_512 -#define RT_HWCRYPTO_USING_RNG -#define RT_HWCRYPTO_USING_CRC -#define RT_HWCRYPTO_USING_CRC_07 -#define RT_HWCRYPTO_USING_CRC_8005 -#define RT_HWCRYPTO_USING_CRC_1021 -#define RT_HWCRYPTO_USING_CRC_04C11DB7 - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define _RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID_MOUSE - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO -#define RT_USING_POSIX_POLL -#define RT_USING_POSIX_SELECT - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL -#define SAL_INTERNET_CHECK - -/* Docking with protocol stacks */ - -#define SAL_USING_AT -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_AT -#define AT_USING_CLIENT -#define AT_CLIENT_NUM_MAX 1 -#define AT_USING_SOCKET -#define AT_USING_CLI -#define AT_CMD_MAX_LEN 2048 -#define AT_SW_VERSION_NUM 0x10301 - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - -#define PKG_USING_AT_DEVICE -#define AT_DEVICE_USING_ESP8266 -#define AT_DEVICE_ESP8266_INIT_ASYN -#define AT_DEVICE_ESP8266_SOCKET -#define PKG_USING_AT_DEVICE_LATEST_VERSION -#define PKG_AT_DEVICE_VER_NUM 0x99999 - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_M2354 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 2 -#define NU_PDMA_SGTBL_POOL_SIZE 16 -#define BSP_USING_FMC -#define BSP_USING_GPIO -#define BSP_USING_CLK -#define NU_CLK_INVOKE_WKTMR -#define BSP_USING_RTC -#define NU_RTC_SUPPORT_MSH_CMD -#define BSP_USING_EADC -#define BSP_USING_EADC0 -#define BSP_USING_TMR -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_UART1 -#define BSP_USING_UART4 -#define BSP_USING_UART4_TX_DMA -#define BSP_USING_UART4_RX_DMA -#define BSP_USING_I2C -#define BSP_USING_I2C1 -#define BSP_USING_SDH -#define BSP_USING_SDH0 -#define BSP_USING_SPI -#define BSP_USING_SPI0 -#define BSP_USING_SPI1 -#define BSP_USING_SPI2_NONE -#define BSP_USING_SPI3_NONE -#define BSP_USING_CRYPTO -#define BSP_USING_TRNG -#define BSP_USING_CRC -#define NU_CRC_USE_PDMA -#define BSP_USING_WDT -#define BSP_USING_SLCD -#define BSP_USING_USBD -#define BSP_USING_USBH -#define NU_USBHOST_HUB_POLLING_INTERVAL 100 -#define BSP_USING_OTG - -/* On-board Peripheral Drivers */ - -#define BSP_USING_NULINKME -#define BOARD_USING_ESP8266 -#define BOARD_USING_STORAGE_SDCARD -#define BOARD_USING_OTG - -/* Board extended module drivers */ - -#define BOARD_USING_SEGMENT_LCD - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO - -#endif diff --git a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-m467hj/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-m467hj/board/NuPinConfig/nutool_pincfg.c b/bsp/nuvoton/numaker-m467hj/board/NuPinConfig/nutool_pincfg.c index 0114f1ac68..4e02ea2fee 100644 --- a/bsp/nuvoton/numaker-m467hj/board/NuPinConfig/nutool_pincfg.c +++ b/bsp/nuvoton/numaker-m467hj/board/NuPinConfig/nutool_pincfg.c @@ -132,7 +132,8 @@ Pin175:EADC0_CH7 Pin176:EADC0_CH6 ********************/ -#include "M460.h" +#include "NuMicro.h" +#include "rtconfig.h" void nutool_pincfg_init_can0(void) { diff --git a/bsp/nuvoton/numaker-pfm-m487/Nu_Link_Driver.ini b/bsp/nuvoton/numaker-pfm-m487/Nu_Link_Driver.ini deleted file mode 100644 index 13faf63291..0000000000 --- a/bsp/nuvoton/numaker-pfm-m487/Nu_Link_Driver.ini +++ /dev/null @@ -1,870 +0,0 @@ -[Version] -Nu_LinkVersion=V5.8 -[Process] -ProcessID=0x0000961c -ProcessCreationTime_L=0x338f3649 -ProcessCreationTime_H=0x01d61201 -NuLinkID=0x18004d67 -NuLinkIDs_Count=0x00000001 -NuLinkID0=0x18004d67 -[ChipSelect] -;ChipName= -ChipName=M481 -[NUC505] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC505_SPIFLASH.FLM -[NUC4xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NUC400_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x014fb180 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[NUC2xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC200_AP_128.FLM -[NUC1311] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC1311_AP_64.FLM -[NUC126] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=NUC126_AP_256.FLM -[NUC121] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC121_AP_32.FLM -[NUC1xx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NUC100_AP_128.FLM -[NUC029] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NUC029_AP_16.FLM -[NM1820] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1820_AP_17_5.FLM -[NM1810] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1810_AP_29_5.FLM -[NM1500] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1500_AP_128.FLM -[NM1330] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1330_AP_64.FLM -[NM1320] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1320_AP_32.FLM -[NM1230] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=NM1230_AP_64.FLM -[NM1200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1200_AP_8.FLM -[NM1120] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NM1120_AP_29_5.FLM -[TF5100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=TF5100_AP_64.FLM -[NDA102] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=NDA102_AP_29_5.FLM -[Nano103] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano103_AP_64.FLM -[Nano100] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=Nano100_AP_64.FLM -[N576] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N576_AP_145.FLM -[N575] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N575_AP_145.FLM -[N572] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N572Fxxx.FLM -[N571] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=N571E000.FLM -[N570] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N570_AP_64.FLM -[N569] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N569_AP_64.FLM -[N512] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=N512_AP_64.FLM -[Mini57] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini57_AP_29_5.FLM -[Mini51] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=Mini51_AP_16.FLM -[M481] -Connect=2 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x00004000 -ProgramAlgorithm=M481_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M480LD] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M480LD_AP_256.FLM -[M451] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M451_AP_256.FLM -[M251] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M251_AP_192.FLM -[M2351] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M2351_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M261] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=M261_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[MR63] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=1 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=MR63_AP_512.FLM -TraceConf0=0x00000002 -TraceConf1=0x00b71b00 -TraceConf2=0x00000800 -TraceConf3=0x00000000 -TraceConf4=0x00000001 -TraceConf5=0x00000000 -[M0564] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x2000 -ProgramAlgorithm=M0564_AP_256.FLM -[M0519] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0519_AP_128.FLM -[M0518] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=M0518_AP_64.FLM -[M05x] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M0516_AP_64.FLM -[M031] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=1 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x800 -ProgramAlgorithm=M031_AP_128.FLM -[NPCX] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=NPCX_AP_512.FLM -[I94000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm=I94000_AP_512.FLM -[ISD9300] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9300_AP_145.FLM -[I9200] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=I9200_AP_128.FLM -[ISD9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9100_AP_145.FLM -[ISD9000] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=ISD9000_AP_64.FLM -[AU9xxx] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -FlashSelect=APROM -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableFlashBreakpoint=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x1000 -ProgramAlgorithm=AU9100_AP_145.FLM -[General] -Connect=0 -Reset=Autodetect -MaxClock=1MHz -MemoryVerify=0 -IOVoltage=3300 -Erase=1 -Program=1 -Verify=1 -ResetAndRun=0 -EnableLog=0 -MemAccessWhileRun=0 -RAMForAlgorithmStart=0x20000000 -RAMForAlgorithmSize=0x4000 -ProgramAlgorithm= diff --git a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_demo.c b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_demo.c index 7a04e1804a..ebfbba2273 100644 --- a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_demo.c +++ b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_demo.c @@ -17,16 +17,15 @@ void lv_user_gui_init(void) #if LV_USE_DEMO_BENCHMARK extern void lv_demo_benchmark(void); lv_demo_benchmark(); -#endif -#if LV_USE_DEMO_WIDGETS +#elif LV_USE_DEMO_WIDGETS extern void lv_demo_widgets(void); lv_demo_widgets(); -#endif -#if LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC +#elif (LV_USE_DEMO_MUSIC || LV_USE_DEMO_RTT_MUSIC) extern void lv_demo_music(void); lv_demo_music(); + #endif } diff --git a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.c b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.c index a86452c5d5..445c4993e1 100644 --- a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.c +++ b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.c @@ -16,6 +16,10 @@ #define DBG_COLOR #include +#if !defined(NU_PKG_LVGL_RENDERING_LAYER) + #define NU_PKG_LVGL_RENDERING_LAYER "lcd" +#endif + /*A static or global variable to store the buffers*/ static lv_disp_draw_buf_t disp_buf; static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/ @@ -47,7 +51,7 @@ void lv_port_disp_init(void) rt_err_t result; void *buf1 = RT_NULL; - lcd_device = rt_device_find("lcd"); + lcd_device = rt_device_find(NU_PKG_LVGL_RENDERING_LAYER); if (lcd_device == 0) { LOG_E("error!"); diff --git a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.h b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.h deleted file mode 100644 index b11ce3c5b6..0000000000 --- a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_disp.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_DISP_H -#define LV_PORT_DISP_H - -#ifdef __cplusplus -extern "C" { -#endif - -void lv_port_disp_init(void); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_indev.h b/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_indev.h deleted file mode 100644 index bde7176807..0000000000 --- a/bsp/nuvoton/numaker-pfm-m487/applications/lvgl/lv_port_indev.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-18 Meco Man The first version - */ -#ifndef LV_PORT_INDEV_H -#define LV_PORT_INDEV_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern lv_indev_t *button_indev; - -void lv_port_indev_init(void); -void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state); - -#ifdef __cplusplus -} /*extern "C"*/ -#endif - -#endif diff --git a/bsp/nuvoton/numaker-pfm-m487/board/board_dev.c b/bsp/nuvoton/numaker-pfm-m487/board/board_dev.c index 25d3c1cd78..5db43eca5c 100644 --- a/bsp/nuvoton/numaker-pfm-m487/board/board_dev.c +++ b/bsp/nuvoton/numaker-pfm-m487/board/board_dev.c @@ -182,7 +182,7 @@ int rt_hw_max31875_port(void) struct rt_sensor_config cfg; cfg.intf.dev_name = "i2c1"; - cfg.intf.user_data = (void *)MAX31875_I2C_SLAVE_ADR_R0; + cfg.intf.arg = (void *)MAX31875_I2C_SLAVE_ADR_R0; cfg.irq_pin.pin = PIN_IRQ_PIN_NONE; rt_hw_max31875_init("max31875", &cfg); @@ -198,7 +198,7 @@ int rt_hw_mpu6500_port(void) struct rt_sensor_config cfg; cfg.intf.dev_name = "i2c2"; - cfg.intf.user_data = (void *)MPU6XXX_ADDR_DEFAULT; + cfg.intf.arg = (void *)MPU6XXX_ADDR_DEFAULT; cfg.irq_pin.pin = PIN_IRQ_PIN_NONE; rt_hw_mpu6xxx_init("mpu", &cfg); diff --git a/bsp/nuvoton/numaker-pfm-m487/project.uvproj b/bsp/nuvoton/numaker-pfm-m487/project.uvproj deleted file mode 100644 index 4c17d73000..0000000000 --- a/bsp/nuvoton/numaker-pfm-m487/project.uvproj +++ /dev/null @@ -1,2525 +0,0 @@ - - - 1.1 -
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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1 - ..\libraries\m480\rtt_port\drv_ecap.c - - - - - drv_emac.c - 1 - ..\libraries\m480\rtt_port\drv_emac.c - - - - - drv_epwm.c - 1 - ..\libraries\m480\rtt_port\drv_epwm.c - - - - - drv_epwm_capture.c - 1 - ..\libraries\m480\rtt_port\drv_epwm_capture.c - - - - - drv_fmc.c - 1 - ..\libraries\m480\rtt_port\drv_fmc.c - - - - - drv_gpio.c - 1 - ..\libraries\m480\rtt_port\drv_gpio.c - - - - - drv_hsotg.c - 1 - ..\libraries\m480\rtt_port\drv_hsotg.c - - - - - drv_hsusbd.c - 1 - ..\libraries\m480\rtt_port\drv_hsusbd.c - - - - - drv_i2c.c - 1 - ..\libraries\m480\rtt_port\drv_i2c.c - - - - - drv_i2s.c - 1 - ..\libraries\m480\rtt_port\drv_i2s.c - - - - - drv_pdma.c - 1 - ..\libraries\m480\rtt_port\drv_pdma.c - - - - - drv_qei.c - 1 - ..\libraries\m480\rtt_port\drv_qei.c - - - - - drv_qspi.c - 1 - ..\libraries\m480\rtt_port\drv_qspi.c - - - - - drv_rtc.c - 1 - ..\libraries\m480\rtt_port\drv_rtc.c - - - - - drv_scuart.c - 1 - ..\libraries\m480\rtt_port\drv_scuart.c - - - - - drv_sdh.c - 1 - ..\libraries\m480\rtt_port\drv_sdh.c - - - - - drv_sdio.c - 1 - ..\libraries\m480\rtt_port\drv_sdio.c - - - - - drv_softi2c.c - 1 - ..\libraries\m480\rtt_port\drv_softi2c.c - - - - - drv_spi.c - 1 - ..\libraries\m480\rtt_port\drv_spi.c - - - - - drv_spii2s.c - 1 - ..\libraries\m480\rtt_port\drv_spii2s.c - - - - - drv_timer.c - 1 - ..\libraries\m480\rtt_port\drv_timer.c - - - - - drv_timer_capture.c - 1 - ..\libraries\m480\rtt_port\drv_timer_capture.c - - - - - drv_tpwm.c - 1 - ..\libraries\m480\rtt_port\drv_tpwm.c - - - - - drv_trng.c - 1 - ..\libraries\m480\rtt_port\drv_trng.c - - - - - drv_uart.c - 1 - ..\libraries\m480\rtt_port\drv_uart.c - - - - - drv_ui2c.c - 1 - ..\libraries\m480\rtt_port\drv_ui2c.c - - - - - drv_usbd.c - 1 - ..\libraries\m480\rtt_port\drv_usbd.c - - - - - drv_usbhost.c - 1 - ..\libraries\m480\rtt_port\drv_usbhost.c - - - - - drv_uspi.c - 1 - ..\libraries\m480\rtt_port\drv_uspi.c - - - - - drv_uuart.c - 1 - ..\libraries\m480\rtt_port\drv_uuart.c - - - - - drv_wdt.c - 1 - ..\libraries\m480\rtt_port\drv_wdt.c - - - - - Fal - - - fal_flash.c - 1 - ..\..\..\components\fal\src\fal_flash.c - - - - - fal_rtt.c - 1 - ..\..\..\components\fal\src\fal_rtt.c - - - - - fal.c - 1 - ..\..\..\components\fal\src\fal.c - - - - - fal_partition.c - 1 - ..\..\..\components\fal\src\fal_partition.c - - - - - Filesystem - - - devfs.c - 1 - ..\..\..\components\dfs\filesystems\devfs\devfs.c - - - - - dfs_elm.c - 1 - ..\..\..\components\dfs\filesystems\elmfat\dfs_elm.c - - - - - ff.c - 1 - ..\..\..\components\dfs\filesystems\elmfat\ff.c - - - - - ffunicode.c - 1 - ..\..\..\components\dfs\filesystems\elmfat\ffunicode.c - - - - - dfs.c - 1 - ..\..\..\components\dfs\src\dfs.c - - - - - dfs_file.c - 1 - ..\..\..\components\dfs\src\dfs_file.c - - - - - dfs_fs.c - 1 - ..\..\..\components\dfs\src\dfs_fs.c - - - - - dfs_posix.c - 1 - ..\..\..\components\dfs\src\dfs_posix.c - - - - - Finsh - - - shell.c - 1 - ..\..\..\components\finsh\shell.c - - - - - msh.c - 1 - ..\..\..\components\finsh\msh.c - - - - - msh_parse.c - 1 - ..\..\..\components\finsh\msh_parse.c - - - - - cmd.c - 1 - ..\..\..\components\finsh\cmd.c - - - - - msh_file.c - 1 - ..\..\..\components\finsh\msh_file.c - - - - - Kernel - - - clock.c - 1 - ..\..\..\src\clock.c - - - - - components.c - 1 - ..\..\..\src\components.c - - - - - device.c - 1 - ..\..\..\src\device.c - - - - - idle.c - 1 - ..\..\..\src\idle.c - - - - - ipc.c - 1 - ..\..\..\src\ipc.c - - - - - irq.c - 1 - ..\..\..\src\irq.c - - - - - kservice.c - 1 - ..\..\..\src\kservice.c - - - - - mem.c - 1 - ..\..\..\src\mem.c - - - - - mempool.c - 1 - ..\..\..\src\mempool.c - - - - - object.c - 1 - ..\..\..\src\object.c - - - - - scheduler.c - 1 - ..\..\..\src\scheduler.c - - - - - signal.c - 1 - ..\..\..\src\signal.c - - - - - thread.c - 1 - ..\..\..\src\thread.c - - - - - timer.c - 1 - ..\..\..\src\timer.c - - - - - Libraries - - - nu_sys.c - 1 - ..\libraries\m480\StdDriver\src\nu_sys.c - - - - - nu_i2c.c - 1 - ..\libraries\m480\StdDriver\src\nu_i2c.c - - - - - nu_wwdt.c - 1 - ..\libraries\m480\StdDriver\src\nu_wwdt.c - - - - - nu_clk.c - 1 - ..\libraries\m480\StdDriver\src\nu_clk.c - - - - - nu_sdh.c - 1 - ..\libraries\m480\StdDriver\src\nu_sdh.c - - - - - nu_fmc.c - 1 - ..\libraries\m480\StdDriver\src\nu_fmc.c - - - - - nu_can.c - 1 - ..\libraries\m480\StdDriver\src\nu_can.c - - - - - nu_qspi.c - 1 - ..\libraries\m480\StdDriver\src\nu_qspi.c - - - - - nu_acmp.c - 1 - ..\libraries\m480\StdDriver\src\nu_acmp.c - - - - - nu_gpio.c - 1 - ..\libraries\m480\StdDriver\src\nu_gpio.c - - - - - nu_epwm.c - 1 - ..\libraries\m480\StdDriver\src\nu_epwm.c - - - - - nu_wdt.c - 1 - ..\libraries\m480\StdDriver\src\nu_wdt.c - - - - - nu_sc.c - 1 - ..\libraries\m480\StdDriver\src\nu_sc.c - - - - - nu_rtc.c - 1 - ..\libraries\m480\StdDriver\src\nu_rtc.c - - - - - nu_dac.c - 1 - ..\libraries\m480\StdDriver\src\nu_dac.c - - - - - nu_crypto.c - 1 - ..\libraries\m480\StdDriver\src\nu_crypto.c - - - - - nu_ccap.c - 1 - ..\libraries\m480\StdDriver\src\nu_ccap.c - - - - - nu_spi.c - 1 - ..\libraries\m480\StdDriver\src\nu_spi.c - - - - - nu_trng.c - 1 - ..\libraries\m480\StdDriver\src\nu_trng.c - - - - - nu_hsusbd.c - 1 - ..\libraries\m480\StdDriver\src\nu_hsusbd.c - - - - - nu_ecap.c - 1 - ..\libraries\m480\StdDriver\src\nu_ecap.c - - - - - nu_i2s.c - 1 - ..\libraries\m480\StdDriver\src\nu_i2s.c - - - - - nu_emac.c - 1 - ..\libraries\m480\StdDriver\src\nu_emac.c - - - - - nu_timer.c - 1 - ..\libraries\m480\StdDriver\src\nu_timer.c - - - - - nu_bpwm.c - 1 - ..\libraries\m480\StdDriver\src\nu_bpwm.c - - - - - nu_eadc.c - 1 - ..\libraries\m480\StdDriver\src\nu_eadc.c - - - - - nu_usci_spi.c - 1 - ..\libraries\m480\StdDriver\src\nu_usci_spi.c - - - - - nu_crc.c - 1 - ..\libraries\m480\StdDriver\src\nu_crc.c - - - - - nu_spim.c - 1 - ..\libraries\m480\StdDriver\src\nu_spim.c - - - - - nu_usci_uart.c - 1 - ..\libraries\m480\StdDriver\src\nu_usci_uart.c - - - - - nu_usci_i2c.c - 1 - ..\libraries\m480\StdDriver\src\nu_usci_i2c.c - - - - - nu_qei.c - 1 - ..\libraries\m480\StdDriver\src\nu_qei.c - - - - - nu_pdma.c - 1 - ..\libraries\m480\StdDriver\src\nu_pdma.c - - - - - nu_uart.c - 1 - ..\libraries\m480\StdDriver\src\nu_uart.c - - - - - nu_timer_pwm.c - 1 - ..\libraries\m480\StdDriver\src\nu_timer_pwm.c - - - - - nu_ebi.c - 1 - ..\libraries\m480\StdDriver\src\nu_ebi.c - - - - - nu_usbd.c - 1 - ..\libraries\m480\StdDriver\src\nu_usbd.c - - - - - nu_scuart.c - 1 - ..\libraries\m480\StdDriver\src\nu_scuart.c - - - - - lwIP - - - api_lib.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\api_lib.c - - - - - api_msg.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\api_msg.c - - - - - err.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\err.c - - - - - netbuf.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\netbuf.c - - - - - netdb.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\netdb.c - - - - - netifapi.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\netifapi.c - - - - - sockets.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\sockets.c - - - - - tcpip.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\api\tcpip.c - - - - - ping.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\apps\ping\ping.c - - - - - def.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\def.c - - - - - dns.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\dns.c - - - - - inet_chksum.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\inet_chksum.c - - - - - init.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\init.c - - - - - ip.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ip.c - - - - - autoip.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\autoip.c - - - - - dhcp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\dhcp.c - - - - - etharp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\etharp.c - - - - - icmp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\icmp.c - - - - - igmp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\igmp.c - - - - - ip4.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4.c - - - - - ip4_addr.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4_addr.c - - - - - ip4_frag.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\ipv4\ip4_frag.c - - - - - memp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\memp.c - - - - - netif.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\netif.c - - - - - pbuf.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\pbuf.c - - - - - raw.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\raw.c - - - - - stats.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\stats.c - - - - - sys.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\sys.c - - - - - tcp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\tcp.c - - - - - tcp_in.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\tcp_in.c - - - - - tcp_out.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\tcp_out.c - - - - - timeouts.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\timeouts.c - - - - - udp.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\core\udp.c - - - - - ethernet.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\netif\ethernet.c - - - - - lowpan6.c - 1 - ..\..\..\components\net\lwip\lwip-2.0.3\src\netif\lowpan6.c - - - - - ethernetif.c - 1 - ..\..\..\components\net\lwip\port\ethernetif.c - - - - - sys_arch.c - 1 - ..\..\..\components\net\lwip\port\sys_arch.c - - - - - m480_usbhostlib - - - ehci.c - 1 - ..\libraries\m480\USBHostLib\src\ehci.c - - - - - ehci_iso.c - 1 - ..\libraries\m480\USBHostLib\src\ehci_iso.c - - - - - mem_alloc.c - 1 - ..\libraries\m480\USBHostLib\src\mem_alloc.c - - - - - usb_core.c - 1 - ..\libraries\m480\USBHostLib\src\usb_core.c - - - - - ohci.c - 1 - ..\libraries\m480\USBHostLib\src\ohci.c - - - - - nu_pkgs_demo - - - usbd_cdc_vcom_echo.c - 1 - ..\libraries\nu_packages\Demo\usbd_cdc_vcom_echo.c - - - - - slcd_show_tick.c - 1 - ..\libraries\nu_packages\Demo\slcd_show_tick.c - - - - - usbd_hid_dance_mouse.c - 1 - ..\libraries\nu_packages\Demo\usbd_hid_dance_mouse.c - - - - - nu_pkgs_nau88l25 - - - audio_test.c - 1 - ..\libraries\nu_packages\AudioCodec\audio_test.c - - - - - acodec_nau88l25.c - 1 - ..\libraries\nu_packages\AudioCodec\acodec_nau88l25.c - - - - - rt_usbd - - - usbdevice_core.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice_core.c - - - - - usbdevice.c - 1 - ..\..\..\components\drivers\usb\usbdevice\core\usbdevice.c - - - - - hid.c - 1 - ..\..\..\components\drivers\usb\usbdevice\class\hid.c - - - - - rt_usbh - - - hub.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\hub.c - - - - - usbhost.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost.c - - - - - udisk.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\udisk.c - - - - - usbhost_core.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\usbhost_core.c - - - - - mass.c - 1 - ..\..\..\components\drivers\usb\usbhost\class\mass.c - - - - - driver.c - 1 - ..\..\..\components\drivers\usb\usbhost\core\driver.c - - - - - SAL - - - netdev.c - 1 - ..\..\..\components\net\netdev\src\netdev.c - - - - - netdev_ipaddr.c - 1 - ..\..\..\components\net\netdev\src\netdev_ipaddr.c - - - - - dfs_net.c - 1 - ..\..\..\components\net\sal\dfs_net\dfs_net.c - - - - - af_inet_lwip.c - 1 - ..\..\..\components\net\sal\impl\af_inet_lwip.c - - - - - net_netdb.c - 1 - ..\..\..\components\net\sal\socket\net_netdb.c - - - - - net_sockets.c - 1 - ..\..\..\components\net\sal\socket\net_sockets.c - - - - - sal_socket.c - 1 - ..\..\..\components\net\sal\src\sal_socket.c - - - - - UTest - - - utest.c - 1 - ..\..\..\components\utilities\utest\utest.c - - - - - - - - - - - - - - - - - - - diff --git a/bsp/nuvoton/numaker-pfm-m487/rtconfig.h b/bsp/nuvoton/numaker-pfm-m487/rtconfig.h deleted file mode 100644 index b6b55e368a..0000000000 --- a/bsp/nuvoton/numaker-pfm-m487/rtconfig.h +++ /dev/null @@ -1,411 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 8 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 1024 - -/* kservice optimization */ - -#define RT_DEBUG -#define RT_DEBUG_COLOR - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE -#define RT_USING_SIGNALS - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 256 -#define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define RT_USING_CPU_FFS -#define ARCH_ARM_CORTEX_M -#define ARCH_ARM_CORTEX_M4 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 2048 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 -#define RT_USING_DFS -#define DFS_USING_POSIX -#define DFS_USING_WORKDIR -#define DFS_FILESYSTEMS_MAX 8 -#define DFS_FILESYSTEM_TYPES_MAX 4 -#define DFS_FD_MAX 32 -#define RT_USING_DFS_MNTTABLE -#define RT_USING_DFS_ELMFAT - -/* elm-chan's FatFs, Generic FAT Filesystem Module */ - -#define RT_DFS_ELM_CODE_PAGE 437 -#define RT_DFS_ELM_WORD_ACCESS -#define RT_DFS_ELM_USE_LFN_3 -#define RT_DFS_ELM_USE_LFN 3 -#define RT_DFS_ELM_LFN_UNICODE_0 -#define RT_DFS_ELM_LFN_UNICODE 0 -#define RT_DFS_ELM_MAX_LFN 255 -#define RT_DFS_ELM_DRIVES 8 -#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096 -#define RT_DFS_ELM_REENTRANT -#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 -#define RT_USING_DFS_DEVFS -#define RT_USING_FAL -#define FAL_DEBUG_CONFIG -#define FAL_DEBUG 1 -#define FAL_PART_HAS_TABLE_CFG - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SYSTEM_WORKQUEUE -#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048 -#define RT_SYSTEM_WORKQUEUE_PRIORITY 23 -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 128 -#define RT_USING_CAN -#define RT_USING_HWTIMER -#define RT_USING_I2C -#define RT_USING_I2C_BITOPS -#define RT_USING_PIN -#define RT_USING_ADC -#define RT_USING_PWM -#define RT_USING_PM -#define PM_TICKLESS_THRESHOLD_TIME 2 -#define RT_USING_RTC -#define RT_USING_SDIO -#define RT_SDIO_STACK_SIZE 2048 -#define RT_SDIO_THREAD_PRIORITY 15 -#define RT_MMCSD_STACK_SIZE 2048 -#define RT_MMCSD_THREAD_PREORITY 22 -#define RT_MMCSD_MAX_PARTITION 16 -#define RT_USING_SPI -#define RT_USING_QSPI -#define RT_USING_SFUD -#define RT_SFUD_USING_SFDP -#define RT_SFUD_USING_FLASH_INFO_TABLE -#define RT_SFUD_SPI_MAX_HZ 50000000 -#define RT_USING_WDT -#define RT_USING_AUDIO -#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096 -#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2 -#define RT_AUDIO_RECORD_PIPE_SIZE 2048 -#define RT_USING_HWCRYPTO -#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto" -#define RT_HWCRYPTO_IV_MAX_SIZE 16 -#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256 -#define RT_HWCRYPTO_USING_AES -#define RT_HWCRYPTO_USING_AES_ECB -#define RT_HWCRYPTO_USING_AES_CBC -#define RT_HWCRYPTO_USING_AES_CFB -#define RT_HWCRYPTO_USING_AES_CTR -#define RT_HWCRYPTO_USING_AES_OFB -#define RT_HWCRYPTO_USING_DES -#define RT_HWCRYPTO_USING_DES_ECB -#define RT_HWCRYPTO_USING_DES_CBC -#define RT_HWCRYPTO_USING_3DES -#define RT_HWCRYPTO_USING_3DES_ECB -#define RT_HWCRYPTO_USING_3DES_CBC -#define RT_HWCRYPTO_USING_SHA1 -#define RT_HWCRYPTO_USING_SHA2 -#define RT_HWCRYPTO_USING_SHA2_224 -#define RT_HWCRYPTO_USING_SHA2_256 -#define RT_HWCRYPTO_USING_SHA2_384 -#define RT_HWCRYPTO_USING_SHA2_512 -#define RT_HWCRYPTO_USING_RNG -#define RT_HWCRYPTO_USING_CRC -#define RT_HWCRYPTO_USING_CRC_07 -#define RT_HWCRYPTO_USING_CRC_8005 -#define RT_HWCRYPTO_USING_CRC_1021 -#define RT_HWCRYPTO_USING_CRC_04C11DB7 - -/* Using USB */ - -#define RT_USING_USB -#define RT_USING_USB_HOST -#define RT_USBH_MSTORAGE -#define UDISK_MOUNTPOINT "/mnt/udisk/" -#define RT_USING_USB_DEVICE -#define RT_USBD_THREAD_STACK_SZ 4096 -#define USB_VENDOR_ID 0x0FFE -#define USB_PRODUCT_ID 0x0001 -#define _RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID -#define RT_USB_DEVICE_HID_MOUSE - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - -#define RT_USING_POSIX_FS -#define RT_USING_POSIX_DEVIO - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - -#define RT_USING_SAL -#define SAL_INTERNET_CHECK - -/* Docking with protocol stacks */ - -#define SAL_USING_LWIP -#define SAL_USING_POSIX -#define RT_USING_NETDEV -#define NETDEV_USING_IFCONFIG -#define NETDEV_USING_PING -#define NETDEV_USING_NETSTAT -#define NETDEV_USING_AUTO_DEFAULT -#define NETDEV_IPV4 1 -#define NETDEV_IPV6 0 -#define RT_USING_LWIP -#define RT_USING_LWIP203 -#define RT_USING_LWIP_VER_NUM 0x20003 -#define RT_LWIP_MEM_ALIGNMENT 4 -#define RT_LWIP_IGMP -#define RT_LWIP_ICMP -#define RT_LWIP_DNS -#define RT_LWIP_DHCP -#define IP_SOF_BROADCAST 1 -#define IP_SOF_BROADCAST_RECV 1 - -/* Static IPv4 Address */ - -#define RT_LWIP_IPADDR "192.168.1.30" -#define RT_LWIP_GWADDR "192.168.1.1" -#define RT_LWIP_MSKADDR "255.255.255.0" -#define RT_LWIP_UDP -#define RT_LWIP_TCP -#define RT_LWIP_RAW -#define RT_MEMP_NUM_NETCONN 8 -#define RT_LWIP_PBUF_NUM 16 -#define RT_LWIP_RAW_PCB_NUM 4 -#define RT_LWIP_UDP_PCB_NUM 4 -#define RT_LWIP_TCP_PCB_NUM 4 -#define RT_LWIP_TCP_SEG_NUM 40 -#define RT_LWIP_TCP_SND_BUF 8196 -#define RT_LWIP_TCP_WND 8196 -#define RT_LWIP_TCPTHREAD_PRIORITY 10 -#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 -#define RT_LWIP_TCPTHREAD_STACKSIZE 1024 -#define RT_LWIP_ETHTHREAD_PRIORITY 12 -#define RT_LWIP_ETHTHREAD_STACKSIZE 1024 -#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 -#define LWIP_NETIF_STATUS_CALLBACK 1 -#define LWIP_NETIF_LINK_CALLBACK 1 -#define SO_REUSE 1 -#define LWIP_SO_RCVTIMEO 1 -#define LWIP_SO_SNDTIMEO 1 -#define LWIP_SO_RCVBUF 1 -#define LWIP_SO_LINGER 0 -#define LWIP_NETIF_LOOPBACK 0 -#define RT_LWIP_USING_PING - -/* Utilities */ - -#define RT_USING_UTEST -#define UTEST_THR_STACK_SIZE 4096 -#define UTEST_THR_PRIORITY 20 - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - - -/* Hardware Drivers Config */ - -/* On-chip Peripheral Drivers */ - -#define SOC_SERIES_M480 -#define BSP_USE_STDDRIVER_SOURCE -#define BSP_USING_PDMA -#define NU_PDMA_MEMFUN_ACTOR_MAX 2 -#define NU_PDMA_SGTBL_POOL_SIZE 16 -#define BSP_USING_FMC -#define BSP_USING_GPIO -#define BSP_USING_CLK -#define NU_CLK_INVOKE_WKTMR -#define BSP_USING_EMAC -#define NU_EMAC_PDMA_MEMCOPY -#define NU_EMAC_PDMA_MEMCOPY_THRESHOLD 128 -#define BSP_USING_RTC -#define NU_RTC_SUPPORT_MSH_CMD -#define BSP_USING_TMR -#define BSP_USING_UART -#define BSP_USING_UART0 -#define BSP_USING_I2C -#define BSP_USING_I2C1 -#define BSP_USING_I2C2 -#define BSP_USING_SDH -#define BSP_USING_SDH0 -#define BSP_USING_SPI -#define BSP_USING_SPI_PDMA -#define BSP_USING_SPI0_NONE -#define BSP_USING_SPI1_NONE -#define BSP_USING_SPI2_NONE -#define BSP_USING_SPI3 -#define BSP_USING_I2S -#define NU_I2S_DMA_FIFO_SIZE 2048 -#define BSP_USING_QSPI -#define BSP_USING_QSPI0 -#define BSP_USING_QSPI0_PDMA -#define BSP_USING_CRYPTO -#define BSP_USING_CRC -#define NU_CRC_USE_PDMA -#define BSP_USING_WDT -#define BSP_USING_USBD -#define BSP_USING_HSUSBH -#define NU_USBHOST_HUB_POLLING_INTERVAL 100 - -/* On-board Peripheral Drivers */ - -#define BSP_USING_NULINKME -#define BOARD_USING_IP101GR -#define BOARD_USING_NAU88L25 -#define BOARD_USING_STORAGE_SDCARD -#define BOARD_USING_STORAGE_SPIFLASH -#define BOARD_USING_USB_D_H -#define BOARD_USING_HSUSBH_USBD - -/* Board extended module drivers */ - - -/* Nuvoton Packages Config */ - -#define NU_PKG_USING_UTILS -#define NU_PKG_USING_DEMO -#define NU_PKG_USING_NAU88L25 - -#endif