update CMSIS RTOS API in MB9BF506R
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2117 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
parent
e383470e01
commit
0ce3aa056d
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@ -23,12 +23,13 @@
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/**
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/**
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* @addtogroup Loongson LS1B
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* @addtogroup Loongson LS1B
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*/
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*/
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/*@{*/
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/*@{*/
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/**
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/**
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* This is the timer interrupt service routine.
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* This is the timer interrupt service routine.
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*/
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*/
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void rt_hw_timer_handler()
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void rt_hw_timer_handler(void)
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{
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{
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unsigned int count;
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unsigned int count;
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@ -43,7 +44,7 @@ void rt_hw_timer_handler()
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/**
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/**
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* This function will initial OS timer
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* This function will initial OS timer
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*/
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*/
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void rt_hw_timer_init()
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void rt_hw_timer_init(void)
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{
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{
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write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
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write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
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write_c0_count(0);
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write_c0_count(0);
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@ -52,7 +53,7 @@ void rt_hw_timer_init()
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/**
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/**
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* This function will initial sam7s64 board.
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* This function will initial sam7s64 board.
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*/
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*/
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void rt_hw_board_init()
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void rt_hw_board_init(void)
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{
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{
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#ifdef RT_USING_UART
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#ifdef RT_USING_UART
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/* init hardware UART device */
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/* init hardware UART device */
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@ -96,7 +96,7 @@ used throughout the whole project.
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#ifndef _CMSIS_OS_H
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#ifndef _CMSIS_OS_H
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#define _CMSIS_OS_H
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#define _CMSIS_OS_H
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#include "rtthread.h"
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#include <rtthread.h>
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/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version
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/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version
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#define osCMSIS 0x00003 ///< API version (main [31:16] .sub [15:0])
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#define osCMSIS 0x00003 ///< API version (main [31:16] .sub [15:0])
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@ -214,103 +214,60 @@ typedef struct rt_mailbox *osMailQId;
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/// Thread Definition structure contains startup information of a thread.
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/// Thread Definition structure contains startup information of a thread.
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/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_thread_def {
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typedef const struct os_thread_def {
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/* rt object */
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const char *name;
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char name[RT_NAME_MAX]; /**< the name of thread */
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void (*entry)(void *parameter);
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rt_uint8_t type; /**< type of object */
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rt_uint32_t stack_size;
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rt_uint8_t flags; /**< thread's flags */
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rt_uint8_t priority;
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rt_uint32_t tick;
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#ifdef RT_USING_MODULE
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void *module_id; /**< id of application module */
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#endif
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rt_list_t list; /**< the object list */
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rt_list_t tlist; /**< the thread list */
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/* stack point and entry */
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void *sp; /**< stack point */
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void *entry; /**< entry */
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void *parameter; /**< parameter */
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void *stack_addr; /**< stack address */
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rt_uint16_t stack_size; /**< stack size */
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/* error code */
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rt_err_t error; /**< error code */
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rt_uint8_t stat; /**< thread stat */
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/* priority */
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osPriority current_priority; /**< current priority */
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osPriority init_priority; /**< initialized priority */
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#if RT_THREAD_PRIORITY_MAX > 32
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rt_uint8_t number;
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rt_uint8_t high_mask;
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#endif
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rt_uint32_t number_mask;
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#if defined(RT_USING_EVENT)
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/* thread event */
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rt_uint32_t event_set;
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rt_uint8_t event_info;
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#endif
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rt_ubase_t init_tick; /**< thread's initialized tick */
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rt_ubase_t remaining_tick; /**< remaining tick */
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struct rt_timer thread_timer; /**< built-in thread timer */
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void (*cleanup)(struct rt_thread *tid); /**< cleanup function when thread exit */
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rt_uint32_t user_data; /**< private user data beyond this thread */
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} osThreadDef_t;
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} osThreadDef_t;
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/// Timer Definition structure contains timer parameters.
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/// Timer Definition structure contains timer parameters.
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/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_timer_def {
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typedef const struct os_timer_def {
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struct rt_object parent; /**< inherit from rt_object */
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const char *name;
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void (*timeout)(void *parameter);
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rt_list_t list; /**< the node of timer list */
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void *parameter;
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rt_tick_t time;
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void (*timeout_func)(void *parameter); /**< timeout function */
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rt_uint8_t flag;
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void *parameter; /**< timeout function's parameter */
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rt_tick_t init_tick; /**< timer timeout tick */
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rt_tick_t timeout_tick; /**< timeout tick */
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} osTimerDef_t;
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} osTimerDef_t;
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/// Mutex Definition structure contains setup information for a mutex.
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/// Mutex Definition structure contains setup information for a mutex.
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/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_mutex_def {
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typedef const struct os_mutex_def {
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uint32_t dummy; ///< dummy value.
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const char *name;
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rt_uint8_t flag;
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} osMutexDef_t;
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} osMutexDef_t;
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/// Semaphore Definition structure contains setup information for a semaphore.
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/// Semaphore Definition structure contains setup information for a semaphore.
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/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_semaphore_def {
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typedef const struct os_semaphore_def {
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uint32_t dummy; ///< dummy value.
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const char *name;
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rt_uint8_t flag;
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} osSemaphoreDef_t;
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} osSemaphoreDef_t;
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/// Definition structure for memory block allocation
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/// Definition structure for memory block allocation
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/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_pool_def {
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typedef const struct os_pool_def {
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uint32_t pool_sz; ///< number of items (elements) in the pool
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const char *name;
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uint32_t item_sz; ///< size of an item
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rt_size_t block_count;
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void *pool; ///< pointer to memory for pool
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rt_size_t block_size;
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} osPoolDef_t;
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} osPoolDef_t;
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/// Definition structure for message queue
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/// Definition structure for message queue
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/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_messageQ_def {
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typedef const struct os_messageQ_def {
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uint32_t queue_sz; ///< number of elements in the queue
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const char *name;
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uint32_t item_sz; ///< size of an item
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rt_size_t msg_size;
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void *pool; ///< memory array for messages
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rt_size_t max_msgs;
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rt_uint8_t flag;
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} osMessageQDef_t;
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} osMessageQDef_t;
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/// Definition structure for mail queue
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/// Definition structure for mail queue
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/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
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/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
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typedef const struct os_mailQ_def {
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typedef const struct os_mailQ_def {
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uint32_t queue_sz; ///< number of elements in the queue
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const char *name;
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uint32_t item_sz; ///< size of an item
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rt_size_t size;
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void *pool; ///< memory array for mail
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rt_uint8_t flag;
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} osMailQDef_t;
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} osMailQDef_t;
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/// Event structure contains detailed information about an event.
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/// Event structure contains detailed information about an event.
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@ -360,7 +317,7 @@ extern osThreadDef_t os_thread_def_##name
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#else // define the object
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#else // define the object
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#define osThreadDef(name, priority, instances, stacksz) \
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#define osThreadDef(name, priority, instances, stacksz) \
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osThreadDef_t os_thread_def_##name = \
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osThreadDef_t os_thread_def_##name = \
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{ (name), (priority), (instances), (stacksz) }
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{("cmsis"), (name), (stacksz), ((rt_uint8_t)(priority - osPriorityIdle) + 1), 50}
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#endif
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#endif
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/// Access a Thread defintion.
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/// Access a Thread defintion.
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@ -439,7 +396,7 @@ extern osTimerDef_t os_timer_def_##name
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#else // define the object
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#else // define the object
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#define osTimerDef(name, function) \
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#define osTimerDef(name, function) \
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osTimerDef_t os_timer_def_##name = \
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osTimerDef_t os_timer_def_##name = \
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{ (function) }
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{("timer"), (function), (RT_NULL) }
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#endif
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#endif
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/// Access a Timer definition.
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/// Access a Timer definition.
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@ -0,0 +1,310 @@
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#include "cmsis_os.h"
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// Kernel Control Public API
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/// Start the RTOS Kernel with executing the specified thread
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osStatus osKernelStart(osThreadDef_t *thread_def, void *argument)
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{
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osThreadCreate(thread_def, argument);
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rt_system_scheduler_start();
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return osOK;
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}
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/// Check if the RTOS kernel is already started
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int32_t osKernelRunning(void)
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{
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return (rt_thread_self() != RT_NULL) ? 1 : 0;
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}
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// Thread Public API
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/// Create a thread and add it to Active Threads and set it to state READY
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osThreadId osThreadCreate(osThreadDef_t *thread_def, void *argument)
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{
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osThreadId thread;
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thread = rt_thread_create(thread_def->name, thread_def->entry, argument, thread_def->stack_size, thread_def->priority, thread_def->tick);
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if (thread != RT_NULL)
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rt_thread_startup(thread);
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return thread;
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}
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/// Return the thread ID of the current running thread
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osThreadId osThreadGetId(void)
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{
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return rt_thread_self();
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}
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/// Terminate execution of a thread and remove it from ActiveThreads
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osStatus osThreadTerminate(osThreadId thread_id)
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{
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rt_err_t result;
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result = rt_thread_suspend(thread_id);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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/// Pass control to next thread that is in state READY
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osStatus osThreadYield(void)
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{
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rt_err_t result;
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result = rt_thread_yield();
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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/// Change prority of an active thread
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osStatus osThreadSetPriority(osThreadId thread_id, osPriority priority)
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{
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if (thread_id == RT_NULL)
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return osErrorOS;
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if (priority < osPriorityIdle || priority > osPriorityRealtime)
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return osErrorOS;
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thread_id->current_priority = priority;
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return osOK;
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}
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/// Get current prority of an active thread
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osPriority osThreadGetPriority(osThreadId thread_id)
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{
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if (thread_id == RT_NULL)
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return osPriorityError;
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if (thread_id->current_priority < osPriorityIdle || thread_id->current_priority > osPriorityRealtime)
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return osPriorityError;
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return thread_id->current_priority;
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}
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// Generic Wait API
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/// Wait for Timeout (Time Delay)
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osStatus osDelay(uint32_t millisec)
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{
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rt_err_t result;
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rt_tick_t ticks;
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ticks = rt_tick_from_millisecond(millisec);
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result = rt_thread_delay(ticks);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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/// Wait for Signal, Message, Mail, or Timeout
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osEvent osWait(uint32_t millisec)
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{
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}
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// Timer Management Public API
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/// Create timer
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osTimerId osTimerCreate(osTimerDef_t *timer_def, os_timer_type type, void *argument)
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{
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return rt_timer_create(timer_def->name, timer_def->timeout, timer_def->parameter, timer_def->time, timer_def->flag);
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}
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/// Start or restart timer
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osStatus osTimerStart(osTimerId timer_id, uint32_t millisec)
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{
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rt_err_t result;
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result = rt_timer_start(timer_id);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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/// Stop timer
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osStatus osTimerStop(osTimerId timer_id)
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{
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rt_err_t result;
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result = rt_timer_stop(timer_id);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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// Mutex Public API
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/// Create and Initialize a Mutex object
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osMutexId osMutexCreate(osMutexDef_t *mutex_def)
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{
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return rt_mutex_create(mutex_def->name, mutex_def->flag);
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}
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/// Wait until a Mutex becomes available
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osStatus osMutexWait(osMutexId mutex_id, uint32_t millisec)
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{
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rt_err_t result;
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rt_tick_t ticks;
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ticks = rt_tick_from_millisecond(millisec);
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result = rt_mutex_take(mutex_id, ticks);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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/// Release a Mutex that was obtained with osMutexWait
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osStatus osMutexRelease(osMutexId mutex_id)
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{
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rt_err_t result;
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result = rt_mutex_release(mutex_id);
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if (result == RT_EOK)
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return osOK;
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else
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return osErrorOS;
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}
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// Semaphore Public API
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/// Create and Initialize a Semaphore object
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osSemaphoreId osSemaphoreCreate(osSemaphoreDef_t *semaphore_def, int32_t count)
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{
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return rt_sem_create(semaphore_def->name, count, semaphore_def->flag);
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}
|
||||||
|
|
||||||
|
/// Wait until a Semaphore becomes available
|
||||||
|
int32_t osSemaphoreWait(osSemaphoreId semaphore_id, uint32_t millisec)
|
||||||
|
{
|
||||||
|
rt_tick_t ticks;
|
||||||
|
|
||||||
|
ticks = rt_tick_from_millisecond(millisec);
|
||||||
|
rt_sem_take(semaphore_id, ticks);
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Release a Semaphore
|
||||||
|
osStatus osSemaphoreRelease(osSemaphoreId semaphore_id)
|
||||||
|
{
|
||||||
|
rt_err_t result;
|
||||||
|
|
||||||
|
result = rt_sem_release(semaphore_id);
|
||||||
|
|
||||||
|
if (result == RT_EOK)
|
||||||
|
return osOK;
|
||||||
|
else
|
||||||
|
return osErrorOS;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Memory Management Public API
|
||||||
|
|
||||||
|
/// Create and Initialize memory pool
|
||||||
|
osPoolId osPoolCreate(osPoolDef_t *pool_def)
|
||||||
|
{
|
||||||
|
return rt_mp_create(pool_def->name, pool_def->block_count, pool_def->block_size);
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Allocate a memory block from a memory pool
|
||||||
|
void *osPoolAlloc(osPoolId pool_id)
|
||||||
|
{
|
||||||
|
return rt_mp_alloc(pool_id, 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Allocate a memory block from a memory pool and set memory block to zero
|
||||||
|
void *osPoolCAlloc(osPoolId pool_id)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Return an allocated memory block back to a specific memory pool
|
||||||
|
osStatus osPoolFree(osPoolId pool_id, void *block)
|
||||||
|
{
|
||||||
|
rt_mp_free(block);
|
||||||
|
|
||||||
|
return osOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Message Queue Management Public API
|
||||||
|
|
||||||
|
/// Create and Initialize Message Queue
|
||||||
|
osMessageQId osMessageCreate(osMessageQDef_t *queue_def, osThreadId thread_id)
|
||||||
|
{
|
||||||
|
return rt_mq_create(queue_def->name, queue_def->msg_size, queue_def->max_msgs, queue_def->flag);
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Put a Message to a Queue
|
||||||
|
osStatus osMessagePut(osMessageQId queue_id, uint32_t info, uint32_t millisec)
|
||||||
|
{
|
||||||
|
rt_err_t result;
|
||||||
|
|
||||||
|
result = rt_mq_send(queue_id, &info, 1);
|
||||||
|
|
||||||
|
if (result == RT_EOK)
|
||||||
|
return osOK;
|
||||||
|
else
|
||||||
|
return osErrorOS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Get a Message or Wait for a Message from a Queue
|
||||||
|
osEvent osMessageGet(osMessageQId queue_id, uint32_t millisec)
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
// Mail Queue Management Public API
|
||||||
|
|
||||||
|
/// Create and Initialize mail queue
|
||||||
|
osMailQId osMailCreate(osMailQDef_t *queue_def, osThreadId thread_id)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Allocate a memory block from a mail
|
||||||
|
void *osMailAlloc(osMailQId queue_id, uint32_t millisec)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Allocate a memory block from a mail and set memory block to zero
|
||||||
|
void *osMailCAlloc(osMailQId queue_id, uint32_t millisec)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Free a memory block from a mail
|
||||||
|
osStatus osMailFree(osMailQId queue_id, void *mail)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Put a mail to a queue
|
||||||
|
osStatus osMailPut(osMailQId queue_id, void *mail)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
/// Get a mail from a queue
|
||||||
|
osEvent osMailGet(osMailQId queue_id, uint32_t millisec)
|
||||||
|
{
|
||||||
|
osEvent ret;
|
||||||
|
|
||||||
|
if (queue_id == NULL) {
|
||||||
|
ret.status = osErrorParameter;
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = osMessageGet(*((void **)queue_id), millisec);
|
||||||
|
if (ret.status == osEventMessage) ret.status = osEventMail;
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -3,7 +3,7 @@ from building import *
|
||||||
|
|
||||||
cwd = GetCurrentDir()
|
cwd = GetCurrentDir()
|
||||||
src = Glob('*.c')
|
src = Glob('*.c')
|
||||||
src = ['Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c']
|
src = ['Device/FUJISTU/MB9BF50x/Source/system_mb9bf50x.c', 'CMSIS/RTOS/rtt_cmsis.c']
|
||||||
|
|
||||||
# add for startup script
|
# add for startup script
|
||||||
if rtconfig.CROSS_TOOL == 'gcc':
|
if rtconfig.CROSS_TOOL == 'gcc':
|
||||||
|
|
|
@ -16,15 +16,16 @@
|
||||||
#include <soc3210.h>
|
#include <soc3210.h>
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loogonson SoC3210
|
* @addtogroup Loongson SoC3210
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* this function will reset CPU
|
* this function will reset CPU
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void rt_hw_cpu_reset()
|
void rt_hw_cpu_reset(void)
|
||||||
{
|
{
|
||||||
/* open the watch-dog */
|
/* open the watch-dog */
|
||||||
WD_TIMER = 0x01; /* watch dog will be timeout after 1 tick */
|
WD_TIMER = 0x01; /* watch dog will be timeout after 1 tick */
|
||||||
|
@ -38,7 +39,7 @@ void rt_hw_cpu_reset()
|
||||||
* this function will shutdown CPU
|
* this function will shutdown CPU
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void rt_hw_cpu_shutdown()
|
void rt_hw_cpu_shutdown(void)
|
||||||
{
|
{
|
||||||
rt_kprintf("shutdown...\n");
|
rt_kprintf("shutdown...\n");
|
||||||
|
|
||||||
|
|
|
@ -25,8 +25,9 @@ void rt_interrupt_dispatch(void *ptreg);
|
||||||
void rt_hw_timer_handler();
|
void rt_hw_timer_handler();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loogonson SoC3210
|
* @addtogroup Loongson SoC3210
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
void rt_hw_interrupt_handler(int vector)
|
void rt_hw_interrupt_handler(int vector)
|
||||||
|
@ -37,7 +38,7 @@ void rt_hw_interrupt_handler(int vector)
|
||||||
/**
|
/**
|
||||||
* This function will initialize hardware interrupt
|
* This function will initialize hardware interrupt
|
||||||
*/
|
*/
|
||||||
void rt_hw_interrupt_init()
|
void rt_hw_interrupt_init(void)
|
||||||
{
|
{
|
||||||
rt_int32_t index;
|
rt_int32_t index;
|
||||||
|
|
||||||
|
|
|
@ -12,11 +12,13 @@
|
||||||
* 2010-05-17 swkyer first version
|
* 2010-05-17 swkyer first version
|
||||||
* 2010-07-07 Bernard porting to Jz47xx
|
* 2010-07-07 Bernard porting to Jz47xx
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loogonson SoC3210
|
* @addtogroup Loongson SoC3210
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
extern rt_uint32_t cp0_get_cause(void);
|
extern rt_uint32_t cp0_get_cause(void);
|
||||||
|
|
|
@ -12,6 +12,7 @@
|
||||||
* 2010-07-09 Bernard first version
|
* 2010-07-09 Bernard first version
|
||||||
* 2011-08-08 lgnq modified for LS1B
|
* 2011-08-08 lgnq modified for LS1B
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "../common/mipsregs.h"
|
#include "../common/mipsregs.h"
|
||||||
|
|
||||||
#define K0BASE 0x80000000
|
#define K0BASE 0x80000000
|
||||||
|
@ -43,10 +44,9 @@ typedef struct cacheop_t
|
||||||
static cacheop_t cacheop, *pcacheop;
|
static cacheop_t cacheop, *pcacheop;
|
||||||
static cacheinfo_t cacheinfo, *pcacheinfo;
|
static cacheinfo_t cacheinfo, *pcacheinfo;
|
||||||
|
|
||||||
int identify_cpu (void)
|
int identify_cpu(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu_id;
|
unsigned int cpu_id;
|
||||||
void invalidate_cache (void);
|
|
||||||
|
|
||||||
pcacheop = &cacheop;
|
pcacheop = &cacheop;
|
||||||
pcacheinfo = &cacheinfo;
|
pcacheinfo = &cacheinfo;
|
||||||
|
@ -112,8 +112,7 @@ void invalidate_writeback_dcache_all(void)
|
||||||
unsigned int start = K0BASE;
|
unsigned int start = K0BASE;
|
||||||
unsigned int end = (start + pcacheinfo->dcache_size);
|
unsigned int end = (start + pcacheinfo->dcache_size);
|
||||||
|
|
||||||
start = K0BASE;
|
while (start < end)
|
||||||
while(start < end)
|
|
||||||
{
|
{
|
||||||
Writeback_Invalidate_Dcache(start); //hit writeback invalidate
|
Writeback_Invalidate_Dcache(start); //hit writeback invalidate
|
||||||
start += pcacheinfo->dcacheline_size;
|
start += pcacheinfo->dcacheline_size;
|
||||||
|
@ -127,7 +126,7 @@ void invalidate_writeback_dcache(unsigned long addr, int size)
|
||||||
start = (addr +pcacheinfo->dcacheline_size -1) & (- pcacheinfo->dcacheline_size);
|
start = (addr +pcacheinfo->dcacheline_size -1) & (- pcacheinfo->dcacheline_size);
|
||||||
end = (end + size + pcacheinfo->dcacheline_size -1) & ( -pcacheinfo->dcacheline_size);
|
end = (end + size + pcacheinfo->dcacheline_size -1) & ( -pcacheinfo->dcacheline_size);
|
||||||
|
|
||||||
while(start <end)
|
while (start <end)
|
||||||
{
|
{
|
||||||
Writeback_Invalidate_Dcache(start);
|
Writeback_Invalidate_Dcache(start);
|
||||||
start += pcacheinfo->dcacheline_size;
|
start += pcacheinfo->dcacheline_size;
|
||||||
|
@ -139,18 +138,18 @@ void invalidate_icache_all(void)
|
||||||
unsigned int start = K0BASE;
|
unsigned int start = K0BASE;
|
||||||
unsigned int end = (start + pcacheinfo->icache_size);
|
unsigned int end = (start + pcacheinfo->icache_size);
|
||||||
|
|
||||||
while(start < end)
|
while (start < end)
|
||||||
{
|
{
|
||||||
pcacheop->Invalidate_Icache(start);
|
pcacheop->Invalidate_Icache(start);
|
||||||
start += pcacheinfo->icacheline_size;
|
start += pcacheinfo->icacheline_size;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void invalidate_dcache_all()
|
void invalidate_dcache_all(void)
|
||||||
{
|
{
|
||||||
unsigned int start = K0BASE;
|
unsigned int start = K0BASE;
|
||||||
unsigned int end = (start + pcacheinfo->dcache_size);
|
unsigned int end = (start + pcacheinfo->dcache_size);
|
||||||
while(start <end)
|
while (start <end)
|
||||||
{
|
{
|
||||||
Invalidate_Dcache_Fill_Gc3210I(start);
|
Invalidate_Dcache_Fill_Gc3210I(start);
|
||||||
start += pcacheinfo->icacheline_size;
|
start += pcacheinfo->icacheline_size;
|
||||||
|
@ -163,7 +162,7 @@ void init_dcache(void)
|
||||||
unsigned int start = K0BASE;
|
unsigned int start = K0BASE;
|
||||||
unsigned int end = (start + pcacheinfo->dcache_size);
|
unsigned int end = (start + pcacheinfo->dcache_size);
|
||||||
|
|
||||||
while(start < end)
|
while (start < end)
|
||||||
{
|
{
|
||||||
pcacheop->Invalidate_Dcache_ClearTag(start);
|
pcacheop->Invalidate_Dcache_ClearTag(start);
|
||||||
start += pcacheinfo->dcacheline_size;
|
start += pcacheinfo->dcacheline_size;
|
||||||
|
@ -190,7 +189,7 @@ void rt_hw_cache_init(void)
|
||||||
/*
|
/*
|
||||||
* 3. invalidate instruction cache;
|
* 3. invalidate instruction cache;
|
||||||
*/
|
*/
|
||||||
while(start < end)
|
while (start < end)
|
||||||
{
|
{
|
||||||
pcacheop->Invalidate_Icache(start); //index invalidate icache
|
pcacheop->Invalidate_Icache(start); //index invalidate icache
|
||||||
start += pcacheinfo->icacheline_size;
|
start += pcacheinfo->icacheline_size;
|
||||||
|
|
|
@ -13,6 +13,7 @@
|
||||||
* 2010-09-11 bernard port to Loongson SoC3210
|
* 2010-09-11 bernard port to Loongson SoC3210
|
||||||
* 2011-08-08 lgnq port to Loongson LS1B
|
* 2011-08-08 lgnq port to Loongson LS1B
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "../common/mips.inc"
|
#include "../common/mips.inc"
|
||||||
#include "../common/stackframe.h"
|
#include "../common/stackframe.h"
|
||||||
|
|
||||||
|
|
|
@ -12,19 +12,21 @@
|
||||||
* 2010-07-09 Bernard first version
|
* 2010-07-09 Bernard first version
|
||||||
* 2010-09-11 Bernard add CPU reset implementation
|
* 2010-09-11 Bernard add CPU reset implementation
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include "ls1b.h"
|
#include "ls1b.h"
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loogonson LS1B
|
* @addtogroup Loongson LS1B
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* this function will reset CPU
|
* this function will reset CPU
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void rt_hw_cpu_reset()
|
void rt_hw_cpu_reset(void)
|
||||||
{
|
{
|
||||||
/* open the watch-dog */
|
/* open the watch-dog */
|
||||||
WDT_EN = 0x01; /* watch dog enable */
|
WDT_EN = 0x01; /* watch dog enable */
|
||||||
|
@ -39,7 +41,7 @@ void rt_hw_cpu_reset()
|
||||||
* this function will shutdown CPU
|
* this function will shutdown CPU
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
void rt_hw_cpu_shutdown()
|
void rt_hw_cpu_shutdown(void)
|
||||||
{
|
{
|
||||||
rt_kprintf("shutdown...\n");
|
rt_kprintf("shutdown...\n");
|
||||||
|
|
||||||
|
|
|
@ -19,6 +19,7 @@
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loongson
|
* @addtogroup Loongson
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -12,13 +12,15 @@
|
||||||
* 2010-10-15 Bernard first version
|
* 2010-10-15 Bernard first version
|
||||||
* 2010-10-15 lgnq modified for LS1B
|
* 2010-10-15 lgnq modified for LS1B
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
#include "ls1b.h"
|
#include "ls1b.h"
|
||||||
|
|
||||||
#define MAX_INTR 32
|
#define MAX_INTR 32
|
||||||
|
|
||||||
extern rt_uint32_t rt_interrupt_nest;
|
extern rt_uint32_t rt_interrupt_nest;
|
||||||
rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
|
rt_uint32_t rt_interrupt_from_thread;
|
||||||
|
rt_uint32_t rt_interrupt_to_thread;
|
||||||
rt_uint32_t rt_thread_switch_interrupt_flag;
|
rt_uint32_t rt_thread_switch_interrupt_flag;
|
||||||
|
|
||||||
static rt_isr_handler_t irq_handle_table[MAX_INTR];
|
static rt_isr_handler_t irq_handle_table[MAX_INTR];
|
||||||
|
@ -29,8 +31,9 @@ static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
|
||||||
= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
|
= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @addtogroup Loogonson LS1B
|
* @addtogroup Loongson LS1B
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
void rt_hw_interrupt_handler(int vector)
|
void rt_hw_interrupt_handler(int vector)
|
||||||
|
@ -41,7 +44,7 @@ void rt_hw_interrupt_handler(int vector)
|
||||||
/**
|
/**
|
||||||
* This function will initialize hardware interrupt
|
* This function will initialize hardware interrupt
|
||||||
*/
|
*/
|
||||||
void rt_hw_interrupt_init()
|
void rt_hw_interrupt_init(void)
|
||||||
{
|
{
|
||||||
rt_int32_t index;
|
rt_int32_t index;
|
||||||
|
|
||||||
|
|
|
@ -12,17 +12,18 @@
|
||||||
* 2010-05-17 swkyer first version
|
* 2010-05-17 swkyer first version
|
||||||
* 2010-09-04 bernard porting to Jz47xx
|
* 2010-09-04 bernard porting to Jz47xx
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "../common/mips.inc"
|
#include "../common/mips.inc"
|
||||||
#include "../common/stackframe.h"
|
#include "../common/stackframe.h"
|
||||||
|
|
||||||
.section ".start", "ax"
|
.section ".start", "ax"
|
||||||
.set noreorder
|
.set noreorder
|
||||||
|
|
||||||
/* the program entry */
|
/* the program entry */
|
||||||
.globl _start
|
.globl _start
|
||||||
_start:
|
_start:
|
||||||
.set noreorder
|
.set noreorder
|
||||||
la ra, _start
|
la ra, _start
|
||||||
|
|
||||||
/* disable interrupt */
|
/* disable interrupt */
|
||||||
mfc0 t0, CP0_STATUS
|
mfc0 t0, CP0_STATUS
|
||||||
|
@ -32,104 +33,105 @@ _start:
|
||||||
|
|
||||||
/* disable cache */
|
/* disable cache */
|
||||||
mfc0 t0, CP0_CONFIG
|
mfc0 t0, CP0_CONFIG
|
||||||
and t0, 0xfffffff8
|
and t0, 0xfffffff8
|
||||||
or t0, 0x2 # disable,!default value is not it!
|
or t0, 0x2 # disable,!default value is not it!
|
||||||
mtc0 t0, CP0_CONFIG # Set CPU to disable cache.
|
mtc0 t0, CP0_CONFIG # Set CPU to disable cache.
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* setup stack pointer */
|
/* setup stack pointer */
|
||||||
li sp, SYSTEM_STACK
|
li sp, SYSTEM_STACK
|
||||||
la gp, _gp
|
la gp, _gp
|
||||||
|
|
||||||
/* clear bss */
|
/* clear bss */
|
||||||
la t0, __bss_start
|
la t0, __bss_start
|
||||||
la t1, __bss_end
|
la t1, __bss_end
|
||||||
_clr_bss_loop:
|
_clr_bss_loop:
|
||||||
sw zero, 0(t0)
|
sw zero, 0(t0)
|
||||||
bne t0, t1, _clr_bss_loop
|
bne t0, t1, _clr_bss_loop
|
||||||
addiu t0, t0, 4
|
addiu t0, t0, 4
|
||||||
|
|
||||||
/* jump to RT-Thread RTOS */
|
/* jump to RT-Thread RTOS */
|
||||||
jal rtthread_startup
|
jal rtthread_startup
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* restart, never die */
|
/* restart, never die */
|
||||||
j _start
|
j _start
|
||||||
nop
|
nop
|
||||||
.set reorder
|
.set reorder
|
||||||
|
|
||||||
.globl cp0_get_cause
|
.globl cp0_get_cause
|
||||||
cp0_get_cause:
|
cp0_get_cause:
|
||||||
mfc0 v0, CP0_CAUSE
|
mfc0 v0, CP0_CAUSE
|
||||||
jr ra
|
jr ra
|
||||||
nop
|
nop
|
||||||
|
|
||||||
.globl cp0_get_status
|
.globl cp0_get_status
|
||||||
cp0_get_status:
|
cp0_get_status:
|
||||||
mfc0 v0, CP0_STATUS
|
mfc0 v0, CP0_STATUS
|
||||||
jr ra
|
jr ra
|
||||||
nop
|
nop
|
||||||
|
|
||||||
.globl cp0_get_hi
|
.globl cp0_get_hi
|
||||||
cp0_get_hi:
|
cp0_get_hi:
|
||||||
mfhi v0
|
mfhi v0
|
||||||
jr ra
|
jr ra
|
||||||
nop
|
nop
|
||||||
|
|
||||||
.globl cp0_get_lo
|
.globl cp0_get_lo
|
||||||
cp0_get_lo:
|
cp0_get_lo:
|
||||||
mflo v0
|
mflo v0
|
||||||
jr ra
|
jr ra
|
||||||
nop
|
nop
|
||||||
|
|
||||||
.extern tlb_refill_handler
|
.extern tlb_refill_handler
|
||||||
.extern cache_error_handler
|
.extern cache_error_handler
|
||||||
|
|
||||||
/* Exception Handler */
|
/* Exception Handler */
|
||||||
|
|
||||||
/* 0x0 - TLB refill handler */
|
/* 0x0 - TLB refill handler */
|
||||||
.section .vectors.1, "ax", %progbits
|
.section .vectors.1, "ax", %progbits
|
||||||
.global tlb_refill_exception
|
.global tlb_refill_exception
|
||||||
.type tlb_refill_exception,@function
|
.type tlb_refill_exception,@function
|
||||||
tlb_refill_exception:
|
tlb_refill_exception:
|
||||||
j tlb_refill_handler
|
j tlb_refill_handler
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* 0x100 - Cache error handler */
|
/* 0x100 - Cache error handler */
|
||||||
.section .vectors.2, "ax", %progbits
|
.section .vectors.2, "ax", %progbits
|
||||||
j cache_error_handler
|
j cache_error_handler
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* 0x180 - Exception/Interrupt handler */
|
/* 0x180 - Exception/Interrupt handler */
|
||||||
.section .vectors.3, "ax", %progbits
|
.section .vectors.3, "ax", %progbits
|
||||||
.global general_exception
|
.global general_exception
|
||||||
.type general_exception,@function
|
.type general_exception,@function
|
||||||
general_exception:
|
general_exception:
|
||||||
j _general_exception_handler
|
j _general_exception_handler
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* 0x200 - Special Exception Interrupt handler (when IV is set in CP0_CAUSE) */
|
/* 0x200 - Special Exception Interrupt handler (when IV is set in CP0_CAUSE) */
|
||||||
.section .vectors.4, "ax", %progbits
|
.section .vectors.4, "ax", %progbits
|
||||||
.global irq_exception
|
.global irq_exception
|
||||||
.type irq_exception,@function
|
.type irq_exception,@function
|
||||||
irq_exception:
|
irq_exception:
|
||||||
j _irq_handler
|
j _irq_handler
|
||||||
nop
|
nop
|
||||||
|
|
||||||
.section .vectors, "ax", %progbits
|
.section .vectors, "ax", %progbits
|
||||||
.extern mips_irq_handle
|
.extern mips_irq_handle
|
||||||
|
|
||||||
/* general exception handler */
|
/* general exception handler */
|
||||||
_general_exception_handler:
|
_general_exception_handler:
|
||||||
.set noreorder
|
.set noreorder
|
||||||
la k0, mips_irq_handle
|
la k0, mips_irq_handle
|
||||||
jr k0
|
jr k0
|
||||||
nop
|
nop
|
||||||
.set reorder
|
.set reorder
|
||||||
|
|
||||||
/* interrupt handler */
|
/* interrupt handler */
|
||||||
_irq_handler:
|
_irq_handler:
|
||||||
.set noreorder
|
.set noreorder
|
||||||
la k0, mips_irq_handle
|
la k0, mips_irq_handle
|
||||||
jr k0
|
jr k0
|
||||||
nop
|
nop
|
||||||
.set reorder
|
.set reorder
|
||||||
|
|
Loading…
Reference in New Issue