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rt-thread
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Merge branch 'RT-Thread:master' into master

This commit is contained in:
qingehao 2021-11-16 17:39:35 +08:00 committed by GitHub
parent e1c281c95d c1d7eaa015
commit 0a123c307e
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GPG Key ID: 4AEE18F83AFDEB23
28 changed files with 677 additions and 342 deletions
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6
.github/workflows/action.yml vendored
View File

@ -169,7 +169,7 @@ jobs:
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-arm' && success() }}
shell: bash
run: |
wget -q https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.3/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
sudo tar xjf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt
/opt/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-gcc --version
echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-10-2020-q4-major/bin" >> $GITHUB_ENV
@ -186,7 +186,7 @@ jobs:
- name: Install Riscv64-unknown-elf ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-riscv64-unknown-elf' && success() }}
run: |
wget -q https://static.dev.sifive.com/dev-tools/freedom-tools/v2020.12/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.4/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
sudo tar zxvf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz -C /opt
/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version
echo "RTT_EXEC_PATH=/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin" >> $GITHUB_ENV
@ -194,7 +194,7 @@ jobs:
- name: Install Riscv-none-embed ToolChains
if: ${{ matrix.legs.RTT_TOOL_CHAIN == 'sourcery-riscv-none-embed' && success() }}
run: |
wget -q https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.3.0-2.3/xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.5/xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz
sudo tar zxvf xpack-riscv-none-embed-gcc-8.3.0-2.3-linux-x64.tar.gz -C /opt
/opt/xpack-riscv-none-embed-gcc-8.3.0-2.3/bin/riscv-none-embed-gcc --version
echo "RTT_EXEC_PATH=/opt/xpack-riscv-none-embed-gcc-8.3.0-2.3/bin" >> $GITHUB_ENV

4
.github/workflows/action_utest.yml vendored
View File

@ -37,7 +37,7 @@ jobs:
if: ${{ matrix.legs.QEMU_ARCH == 'arm' && success() }}
shell: bash
run: |
wget -q https://developer.arm.com/-/media/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.3/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2
sudo tar xjf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -C /opt
/opt/gcc-arm-none-eabi-10-2020-q4-major/bin/arm-none-eabi-gcc --version
echo "RTT_EXEC_PATH=/opt/gcc-arm-none-eabi-10-2020-q4-major/bin" >> $GITHUB_ENV
@ -45,7 +45,7 @@ jobs:
- name: Install RISC-V ToolChains
if: ${{ matrix.legs.QEMU_ARCH == 'riscv64' && success() }}
run: |
wget -q https://static.dev.sifive.com/dev-tools/freedom-tools/v2020.12/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
wget -q https://github.com/RT-Thread/toolchains-ci/releases/download/v1.4/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz
sudo tar zxvf riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14.tar.gz -C /opt
/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version
echo "RTT_EXEC_PATH=/opt/riscv64-unknown-elf-toolchain-10.2.0-2020.12.8-x86_64-linux-ubuntu14/bin" >> $GITHUB_ENV

1
bsp/n32g452xx/Libraries/rt_drivers/drv_flash.c
View File

@ -8,6 +8,7 @@
* 2021-08-20 breo.com first version
*/
#include <stddef.h>
#include <board.h>
#include <rtthread.h>

177
bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.c
View File

@ -5,51 +5,94 @@
*
* Change Logs:
* Date Author Notes
* 2020-1-13 Leo first version
* 2021-11-11 breo.com first version
*/
#include <board.h>
#include "drv_pwm.h"
#ifdef RT_USING_PWM
#if !defined(BSP_USING_TIM3_CH1) && !defined(BSP_USING_TIM3_CH2) && \
!defined(BSP_USING_TIM3_CH3) && !defined(BSP_USING_TIM3_CH4)
#if !defined(BSP_USING_TIM1_CH1) && !defined(BSP_USING_TIM1_CH2) && \
!defined(BSP_USING_TIM1_CH3) && !defined(BSP_USING_TIM1_CH4) && \
!defined(BSP_USING_TIM2_CH1) && !defined(BSP_USING_TIM2_CH2) && \
!defined(BSP_USING_TIM2_CH3) && !defined(BSP_USING_TIM2_CH4) && \
!defined(BSP_USING_TIM3_CH1) && !defined(BSP_USING_TIM3_CH2) && \
!defined(BSP_USING_TIM3_CH3) && !defined(BSP_USING_TIM3_CH4) && \
!defined(BSP_USING_TIM4_CH1) && !defined(BSP_USING_TIM4_CH2) && \
!defined(BSP_USING_TIM4_CH3) && !defined(BSP_USING_TIM4_CH4) && \
!defined(BSP_USING_TIM5_CH1) && !defined(BSP_USING_TIM5_CH2) && \
!defined(BSP_USING_TIM5_CH3) && !defined(BSP_USING_TIM5_CH4) && \
!defined(BSP_USING_TIM8_CH1) && !defined(BSP_USING_TIM8_CH2) && \
!defined(BSP_USING_TIM8_CH3) && !defined(BSP_USING_TIM8_CH4)
#error "Please define at least one BSP_USING_TIMx_CHx"
#endif
#endif /* RT_USING_PWM */
#define DRV_DEBUG
#define LOG_TAG "drv.pwm"
#include <drv_log.h>
#define MAX_PERIOD 65535
struct rt_device_pwm pwm_device;
#ifdef BSP_USING_PWM
struct n32_pwm
{
struct rt_device_pwm pwm_device;
TIM_Module *tim_handle;
rt_uint8_t channel;
char *name;
const char *name;
struct rt_device_pwm pwm_device;
int8_t tim_en;
uint8_t ch_en;
uint32_t period;
uint32_t psc;
};
static struct n32_pwm n32_pwm_obj[] =
{
#ifdef BSP_USING_TIM3_CH1
PWM1_TIM3_CONFIG,
#if defined(BSP_USING_TIM1_CH1) || defined(BSP_USING_TIM1_CH2) || \
defined(BSP_USING_TIM1_CH3) || defined(BSP_USING_TIM1_CH4)
{
.tim_handle = TIM1,
.name = "tim1pwm",
},
#endif
#ifdef BSP_USING_TIM3_CH2
PWM2_TIM3_CONFIG,
#if defined(BSP_USING_TIM2_CH1) || defined(BSP_USING_TIM2_CH2) || \
defined(BSP_USING_TIM2_CH3) || defined(BSP_USING_TIM2_CH4)
{
.tim_handle = TIM2,
.name = "tim2pwm",
},
#endif
#ifdef BSP_USING_TIM3_CH3
PWM3_TIM3_CONFIG,
#if defined(BSP_USING_TIM3_CH1) || defined(BSP_USING_TIM3_CH2) || \
defined(BSP_USING_TIM3_CH3) || defined(BSP_USING_TIM3_CH4)
{
.tim_handle = TIM3,
.name = "tim3pwm",
},
#endif
#ifdef BSP_USING_TIM3_CH4
PWM4_TIM3_CONFIG,
#if defined(BSP_USING_TIM4_CH1) || defined(BSP_USING_TIM4_CH2) || \
defined(BSP_USING_TIM4_CH3) || defined(BSP_USING_TIM4_CH4)
{
.tim_handle = TIM4,
.name = "tim4pwm",
},
#endif
#if defined(BSP_USING_TIM5_CH1) || defined(BSP_USING_TIM5_CH2) || \
defined(BSP_USING_TIM5_CH3) || defined(BSP_USING_TIM5_CH4)
{
.tim_handle = TIM5,
.name = "tim5pwm",
},
#endif
#if defined(BSP_USING_TIM8_CH1) || defined(BSP_USING_TIM8_CH2) || \
defined(BSP_USING_TIM8_CH3) || defined(BSP_USING_TIM8_CH4)
{
.tim_handle = TIM8,
.name = "tim8pwm",
}
#endif
};
static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
@ -58,31 +101,22 @@ static struct rt_pwm_ops drv_ops =
drv_pwm_control
};
static rt_err_t drv_pwm_enable(TIM_Module *TIMx, struct rt_pwm_configuration *configuration, rt_bool_t enable)
static rt_err_t drv_pwm_enable(struct n32_pwm *pwm_dev, struct rt_pwm_configuration *configuration, rt_bool_t enable)
{
/* Get the value of channel */
rt_uint32_t channel = configuration->channel;
TIM_Module *TIMx = pwm_dev->tim_handle;
if (!enable)
if (enable)
{
if (channel == 1)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_DISABLE);
}
else if (channel == 2)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE);
}
else if (channel == 3)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE);
}
else if (channel == 4)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_DISABLE);
}
pwm_dev->ch_en |= 0x1 << channel;
}
else
{
pwm_dev->ch_en &= ~(0x1 << channel);
}
if (enable)
{
if (channel == 1)
{
@ -101,18 +135,47 @@ static rt_err_t drv_pwm_enable(TIM_Module *TIMx, struct rt_pwm_configuration *co
TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_ENABLE);
}
}
else
{
if (channel == 1)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_DISABLE);
}
else if (channel == 2)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE);
}
else if (channel == 3)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE);
}
else if (channel == 4)
{
TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_DISABLE);
}
}
if (pwm_dev->ch_en)
{
pwm_dev->tim_en = 0x1;
TIM_Enable(TIMx, ENABLE);
}
else
{
pwm_dev->tim_en = 0x0;
TIM_Enable(TIMx, DISABLE);
}
return RT_EOK;
}
static rt_err_t drv_pwm_get(TIM_Module *TIMx, struct rt_pwm_configuration *configuration)
static rt_err_t drv_pwm_get(struct n32_pwm *pwm_dev, struct rt_pwm_configuration *configuration)
{
RCC_ClocksType RCC_Clockstruct;
rt_uint32_t ar, div, cc1, cc2, cc3, cc4;
rt_uint32_t channel = configuration->channel;
rt_uint64_t tim_clock;
rt_uint32_t channel = configuration->channel;
TIM_Module *TIMx = pwm_dev->tim_handle;
ar = TIMx->AR;
div = TIMx->PSC;
@ -140,9 +203,13 @@ static rt_err_t drv_pwm_get(TIM_Module *TIMx, struct rt_pwm_configuration *confi
return RT_EOK;
}
static rt_err_t drv_pwm_set(TIM_Module *TIMx, struct rt_pwm_configuration *configuration)
static rt_err_t drv_pwm_set(struct n32_pwm *pwm_dev, struct rt_pwm_configuration *configuration)
{
TIM_Module *TIMx = pwm_dev->tim_handle;
rt_uint32_t channel = configuration->channel;
/* Init timer pin and enable clock */
void n32_msp_tim_init(void *Instance);
n32_msp_tim_init(TIMx);
RCC_ClocksType RCC_Clock;
@ -167,6 +234,8 @@ static rt_err_t drv_pwm_set(TIM_Module *TIMx, struct rt_pwm_configuration *confi
period = period / psc;
psc = psc * (input_clock / 1000000);
if ((pwm_dev->period != period) || (pwm_dev->psc != psc))
{
/* TIMe base configuration */
TIM_TimeBaseInitType TIM_TIMeBaseStructure;
TIM_InitTimBaseStruct(&TIM_TIMeBaseStructure);
@ -175,6 +244,7 @@ static rt_err_t drv_pwm_set(TIM_Module *TIMx, struct rt_pwm_configuration *confi
TIM_TIMeBaseStructure.ClkDiv = 0;
TIM_TIMeBaseStructure.CntMode = TIM_CNT_MODE_UP;
TIM_InitTimeBase(TIMx, &TIM_TIMeBaseStructure);
}
rt_uint32_t pulse = (unsigned long long)configuration->pulse;
/* PWM1 Mode configuration: Channel1 */
@ -185,26 +255,33 @@ static rt_err_t drv_pwm_set(TIM_Module *TIMx, struct rt_pwm_configuration *confi
TIM_OCInitStructure.Pulse = pulse;
TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_HIGH;
rt_uint32_t channel = configuration->channel;
if (channel == 1)
{
TIM_InitOc1(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc1Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
if (!(pwm_dev->ch_en & (0x1 << channel)))
TIM_EnableCapCmpCh(TIMx, TIM_CH_1, TIM_CAP_CMP_DISABLE);
}
else if (channel == 2)
{
TIM_InitOc2(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc2Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
if (!(pwm_dev->ch_en & (0x1 << channel)))
TIM_EnableCapCmpCh(TIMx, TIM_CH_2, TIM_CAP_CMP_DISABLE);
}
else if (channel == 3)
{
TIM_InitOc3(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc3Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
if (!(pwm_dev->ch_en & (0x1 << channel)))
TIM_EnableCapCmpCh(TIMx, TIM_CH_3, TIM_CAP_CMP_DISABLE);
}
else if (channel == 4)
{
TIM_InitOc4(TIMx, &TIM_OCInitStructure);
TIM_ConfigOc4Preload(TIMx, TIM_OC_PRE_LOAD_ENABLE);
if (!(pwm_dev->ch_en & (0x1 << channel)))
TIM_EnableCapCmpCh(TIMx, TIM_CH_4, TIM_CAP_CMP_DISABLE);
}
TIM_ConfigArPreload(TIMx, ENABLE);
@ -216,18 +293,18 @@ static rt_err_t drv_pwm_set(TIM_Module *TIMx, struct rt_pwm_configuration *confi
static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
{
struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
TIM_Module *TIMx = (TIM_Module *)device->parent.user_data;
struct n32_pwm *pwm_dev = (struct n32_pwm *)(device->parent.user_data);
switch (cmd)
{
case PWM_CMD_ENABLE:
return drv_pwm_enable(TIMx, configuration, RT_TRUE);
return drv_pwm_enable(pwm_dev, configuration, RT_TRUE);
case PWM_CMD_DISABLE:
return drv_pwm_enable(TIMx, configuration, RT_FALSE);
return drv_pwm_enable(pwm_dev, configuration, RT_FALSE);
case PWM_CMD_SET:
return drv_pwm_set(TIMx, configuration);
return drv_pwm_set(pwm_dev, configuration);
case PWM_CMD_GET:
return drv_pwm_get(TIMx, configuration);
return drv_pwm_get(pwm_dev, configuration);
default:
return RT_EINVAL;
}
@ -240,13 +317,12 @@ static int rt_hw_pwm_init(void)
for (i = 0; i < sizeof(n32_pwm_obj) / sizeof(n32_pwm_obj[0]); i++)
{
if (rt_device_pwm_register(&n32_pwm_obj[i].pwm_device, n32_pwm_obj[i].name, &drv_ops, n32_pwm_obj[i].tim_handle) == RT_EOK)
if (rt_device_pwm_register(&n32_pwm_obj[i].pwm_device,
n32_pwm_obj[i].name, &drv_ops, &(n32_pwm_obj[i])) == RT_EOK)
{
LOG_D("%s register success", n32_pwm_obj[i].name);
}
else
{
LOG_D("%s register failed", n32_pwm_obj[i].name);
result = -RT_ERROR;
}
}
@ -254,3 +330,6 @@ static int rt_hw_pwm_init(void)
return result;
}
INIT_BOARD_EXPORT(rt_hw_pwm_init);
#endif

44
bsp/n32g452xx/Libraries/rt_drivers/drv_pwm.h
View File

@ -18,50 +18,6 @@
extern "C" {
#endif
#ifdef BSP_USING_TIM3_CH1
#ifndef PWM1_TIM3_CONFIG
#define PWM1_TIM3_CONFIG \
{ \
.tim_handle = TIM3, \
.name = "tim3pwm1", \
.channel = 1 \
}
#endif /* PWM1_TIM3_CONFIG */
#endif /* BSP_USING_TIM3_CH1 */
#ifdef BSP_USING_TIM3_CH2
#ifndef PWM2_TIM3_CONFIG
#define PWM2_TIM3_CONFIG \
{ \
.tim_handle = TIM3, \
.name = "tim3pwm2", \
.channel = 2 \
}
#endif /* PWM2_TIM3_CONFIG */
#endif /* BSP_USING_TIM3_CH2 */
#ifdef BSP_USING_TIM3_CH3
#ifndef PWM3_TIM3_CONFIG
#define PWM3_TIM3_CONFIG \
{ \
.tim_handle = TIM3, \
.name = "tim3pwm3", \
.channel = 3 \
}
#endif /* PWM3_TIM3_CONFIG */
#endif /* BSP_USING_TIM3_CH3 */
#ifdef BSP_USING_TIM3_CH4
#ifndef PWM4_TIM3_CONFIG
#define PWM4_TIM3_CONFIG \
{ \
.tim_handle = TIM3, \
.name = "tim3pwm4", \
.channel = 4 \
}
#endif /* PWM4_TIM3_CONFIG */
#endif /* BSP_USING_TIM3_CH4 */
#ifdef __cplusplus
}
#endif

128
bsp/n32g452xx/Libraries/rt_drivers/drv_wdt.c Normal file
View File

@ -0,0 +1,128 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-01-22 shelton first version
* 2021-11-10 breo.com porting to n32
*/
#include <board.h>
#include <drivers/watchdog.h>
#ifdef RT_USING_WDT
#ifdef BSP_USING_WDT
#define LSI_VALUE 40000
//#define DRV_DEBUG
#define LOG_TAG "drv.wdt"
#include <drv_log.h>
struct n32_wdt_obj
{
IWDG_Module *instance;
rt_uint32_t Prescaler;
rt_uint32_t Reload;
rt_uint16_t is_start;
};
static struct n32_wdt_obj n32_wdt;
static struct rt_watchdog_ops ops;
static rt_watchdog_t watchdog;
static rt_err_t wdt_init(rt_watchdog_t *wdt)
{
return RT_EOK;
}
static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
{
switch (cmd)
{
/* feed the watchdog */
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
IWDG_ReloadKey();
break;
/* set watchdog timeout */
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
#if defined(LSI_VALUE)
if (LSI_VALUE)
{
n32_wdt.Reload = (*((rt_uint32_t *)arg)) * LSI_VALUE / 256 ;
}
else
{
LOG_E("Please define the value of LSI_VALUE!");
}
if (n32_wdt.Reload > 0xFFF)
{
LOG_E("wdg set timeout parameter too large, please less than %ds", 0xFFF * 256 / LSI_VALUE);
return -RT_EINVAL;
}
#else
#error "Please define the value of LSI_VALUE!"
#endif
if (n32_wdt.is_start)
{
IWDG_WriteConfig(IWDG_WRITE_ENABLE);
IWDG_SetPrescalerDiv(n32_wdt.Prescaler);
IWDG_CntReload(n32_wdt.Reload);
IWDG_WriteConfig(IWDG_WRITE_DISABLE);
IWDG_Enable();
}
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
#if defined(LSI_VALUE)
if (LSI_VALUE)
{
(*((rt_uint32_t *)arg)) = n32_wdt.Reload * 256 / LSI_VALUE;
}
else
{
LOG_E("Please define the value of LSI_VALUE!");
}
#else
#error "Please define the value of LSI_VALUE!"
#endif
break;
case RT_DEVICE_CTRL_WDT_START:
IWDG_WriteConfig(IWDG_WRITE_ENABLE);
IWDG_SetPrescalerDiv(n32_wdt.Prescaler);
IWDG_CntReload(n32_wdt.Reload);
IWDG_WriteConfig(IWDG_WRITE_DISABLE);
IWDG_Enable();
n32_wdt.is_start = 1;
break;
default:
LOG_W("This command is not supported.");
return -RT_ERROR;
}
return RT_EOK;
}
int rt_hw_wdt_init(void)
{
n32_wdt.instance = IWDG;
n32_wdt.Prescaler = IWDG_PRESCALER_DIV256;
n32_wdt.Reload = 0x00000FFF;
n32_wdt.is_start = 0;
ops.init = &wdt_init;
ops.control = &wdt_control;
watchdog.ops = &ops;
/* register watchdog device */
if (rt_hw_watchdog_register(&watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
{
LOG_E("wdt device register failed.");
return -RT_ERROR;
}
LOG_D("wdt device register success.");
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_hw_wdt_init);
#endif /* BSP_USING_WDT */
#endif /* RT_USING_WDT */

30
bsp/n32g452xx/n32g452xx-mini-system/.config
View File

@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_BIG_ENDIAN is not set
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
@ -142,7 +143,7 @@ CONFIG_RT_USING_PWM=y
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
CONFIG_RT_USING_WDT=y
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
@ -154,6 +155,7 @@ CONFIG_RT_USING_PWM=y
#
# Using USB
#
# CONFIG_RT_USING_USB is not set
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
@ -161,10 +163,11 @@ CONFIG_RT_USING_PWM=y
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_LIBC_USING_TIME=y
# CONFIG_RT_LIBC_USING_FILEIO is not set
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
@ -201,6 +204,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
#
@ -297,10 +301,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
#
# security packages
@ -334,13 +334,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# U8G2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
#
# tools packages
@ -449,6 +442,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
@ -510,8 +504,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
#
# AI packages
@ -594,16 +586,12 @@ CONFIG_SOC_N32G452XX=y
#
CONFIG_RT_USING_GPIO=y
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_WDT is not set
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_UART2 is not set
# CONFIG_BSP_USING_UART3 is not set
CONFIG_BSP_USING_PWM=y
CONFIG_BSP_USING_TIM3=y
CONFIG_BSP_USING_TIM3_CH1=y
CONFIG_BSP_USING_TIM3_CH2=y
CONFIG_BSP_USING_TIM3_CH3=y
CONFIG_BSP_USING_TIM3_CH4=y
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_HWTIMER is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C1 is not set

94
bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig
View File

@ -28,6 +28,11 @@ menu "On-chip Peripheral Drivers"
bool "Enable on-chip FLASH"
default n
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
menuconfig BSP_USING_UART
bool "Enable UART"
default y
@ -51,10 +56,44 @@ menu "On-chip Peripheral Drivers"
default n
select RT_USING_PWM
if BSP_USING_PWM
menuconfig BSP_USING_TIM3
menuconfig BSP_USING_TIM1PWM
bool "Enable timer1 output PWM"
default n
if BSP_USING_TIM1PWM
config BSP_USING_TIM1_CH1
bool "Enable TIM1 channel1 PWM"
default n
config BSP_USING_TIM1_CH2
bool "Enable TIM1 channel2 PWM"
default n
config BSP_USING_TIM1_CH3
bool "Enable TIM1 channel3 PWM"
default n
config BSP_USING_TIM1_CH4
bool "Enable TIM1 channel4 PWM"
default n
endif
menuconfig BSP_USING_TIM2PWM
bool "Enable timer2 output PWM"
default n
if BSP_USING_TIM2PWM
config BSP_USING_TIM2_CH1
bool "Enable TIM2 channel1 PWM"
default n
config BSP_USING_TIM2_CH2
bool "Enable TIM2 channel2 PWM"
default n
config BSP_USING_TIM2_CH3
bool "Enable TIM2 channel3 PWM"
default n
config BSP_USING_TIM2_CH4
bool "Enable TIM2 channel4 PWM"
default n
endif
menuconfig BSP_USING_TIM3PWM
bool "Enable timer3 output PWM"
default n
if BSP_USING_TIM3
if BSP_USING_TIM3PWM
config BSP_USING_TIM3_CH1
bool "Enable TIM3 channel1 PWM"
default n
@ -68,6 +107,57 @@ menu "On-chip Peripheral Drivers"
bool "Enable TIM3 channel4 PWM"
default n
endif
menuconfig BSP_USING_TIM4PWM
bool "Enable timer4 output PWM"
default n
if BSP_USING_TIM4PWM
config BSP_USING_TIM4_CH1
bool "Enable TIM4 channel1 PWM"
default n
config BSP_USING_TIM4_CH2
bool "Enable TIM4 channel2 PWM"
default n
config BSP_USING_TIM4_CH3
bool "Enable TIM4 channel3 PWM"
default n
config BSP_USING_TIM4_CH4
bool "Enable TIM4 channel4 PWM"
default n
endif
menuconfig BSP_USING_TIM5PWM
bool "Enable timer5 output PWM"
default n
if BSP_USING_TIM5PWM
config BSP_USING_TIM5_CH1
bool "Enable TIM5 channel1 PWM"
default n
config BSP_USING_TIM5_CH2
bool "Enable TIM5 channel2 PWM"
default n
config BSP_USING_TIM5_CH3
bool "Enable TIM5 channel3 PWM"
default n
config BSP_USING_TIM5_CH4
bool "Enable TIM5 channel4 PWM"
default n
endif
menuconfig BSP_USING_TIM8PWM
bool "Enable timer8 output PWM"
default n
if BSP_USING_TIM8PWM
config BSP_USING_TIM8_CH1
bool "Enable TIM8 channel1 PWM"
default n
config BSP_USING_TIM8_CH2
bool "Enable TIM8 channel2 PWM"
default n
config BSP_USING_TIM8_CH3
bool "Enable TIM8 channel3 PWM"
default n
config BSP_USING_TIM8_CH4
bool "Enable TIM8 channel4 PWM"
default n
endif
endif
menuconfig BSP_USING_HWTIMER

88
bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c
View File

@ -164,48 +164,64 @@ void n32_msp_tim_init(void *Instance)
if (TIMx == TIM1)
{
/* TIM1 clock enable */
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE);
/* GPIOA clock enable */
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
/* GPIOA Configuration:TIM1 Channel1 and Channel4 as alternate function push-pull */
GPIO_InitCtlStructure.Pin = GPIO_PIN_8 | GPIO_PIN_11;
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
}
if (TIMx == TIM2)
{
/* TIM2 clock enable */
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE);
/* GPIOA clock enable */
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
/* GPIOA Configuration:TIM2 Channel1 and Channel2 as alternate function push-pull */
GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
}
if (TIMx == TIM3)
{
/* TIM3 clock enable */
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM3, ENABLE);
/* GPIOA clock enable */
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_GPIOB, ENABLE);
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStructure);
}
if (TIMx == TIM4)
{
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM4, ENABLE);
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9;
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStructure);
}
if (TIMx == TIM5)
{
RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM5, ENABLE);
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitPeripheral(GPIOA, &GPIO_InitCtlStructure);
}
GPIO_InitCtlStructure.Pin = GPIO_PIN_0 | GPIO_PIN_1;
GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStructure);
if (TIMx == TIM8)
{
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM8, ENABLE);
RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE);
GPIO_InitCtlStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9;
GPIO_InitCtlStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitCtlStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStructure);
}
}
#endif /* BSP_USING_PWM */
@ -474,46 +490,6 @@ static int hwtimer_sample(int argc, char *argv[])
MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample);
#endif
#ifdef RT_USING_PWM
static int pwm_set_test(const char *name, int ch,
rt_uint32_t period, rt_uint32_t pulse)
{
struct rt_device_pwm *pwm_dev = (struct rt_device_pwm *)rt_device_find(name);
if (pwm_dev == RT_NULL)
{
rt_kprintf("pwm sample run failed! can't find %s device!\n", name);
return RT_ERROR;
}
rt_pwm_set(pwm_dev, ch, period, pulse);
rt_pwm_enable(pwm_dev, ch);
return RT_EOK;
}
#define PWM_TEST_NAME_CH_1 "tim3pwm1"
#define PWM_TEST_NAME_CH_2 "tim3pwm2"
#define PWM_TEST_NAME_CH_3 "tim3pwm3"
#define PWM_TEST_NAME_CH_4 "tim3pwm4"
static int pwm_led_sample(int argc, char *argv[])
{
pwm_set_test(PWM_TEST_NAME_CH_1, 1, 1000, 200);
pwm_set_test(PWM_TEST_NAME_CH_2, 2, 1000, 400);
pwm_set_test(PWM_TEST_NAME_CH_3, 3, 1000, 600);
pwm_set_test(PWM_TEST_NAME_CH_4, 4, 1000, 700);
return RT_EOK;
}
MSH_CMD_EXPORT(pwm_led_sample, pwm sample);
static int pwm_led_sample_off(int argc, char *argv[])
{
struct rt_device_pwm *pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_TEST_NAME_CH_1);
if (pwm_dev == RT_NULL)
{
rt_kprintf("pwm sample run failed! can't find %s device!\n", PWM_TEST_NAME_CH_1);
return RT_ERROR;
}
rt_pwm_disable(pwm_dev, 1);
return RT_EOK;
}
MSH_CMD_EXPORT(pwm_led_sample_off, pwm sample off);
#endif
#endif

10
bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h
View File

@ -85,6 +85,7 @@
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_PWM
#define RT_USING_WDT
/* Using USB */
@ -143,9 +144,6 @@
/* multimedia packages */
/* U8G2: a monochrome graphic library */
/* tools packages */
@ -182,11 +180,5 @@
#define RT_USING_GPIO
#define BSP_USING_UART
#define BSP_USING_UART1
#define BSP_USING_PWM
#define BSP_USING_TIM3
#define BSP_USING_TIM3_CH1
#define BSP_USING_TIM3_CH2
#define BSP_USING_TIM3_CH3
#define BSP_USING_TIM3_CH4
#endif

3
bsp/stm32/libraries/HAL_Drivers/SConscript
View File

@ -106,9 +106,6 @@ if GetDepend(['BSP_USING_PULSE_ENCODER']):
if GetDepend(['BSP_USING_USBH']):
src += ['drv_usbh.c']
if GetDepend(['PKG_USING_TINYUSB']):
src += ['drv_tinyusb.c']
src += ['drv_common.c']
path = [cwd]

46
bsp/stm32/libraries/HAL_Drivers/drv_tinyusb.c
View File

@ -1,46 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-20 tfx2001 first version
*/
#ifdef PKG_USING_TINYUSB
#include <tusb.h>
#include <drv_config.h>
int tusb_board_init(void)
{
PCD_HandleTypeDef hpcd;
memset(&hpcd, 0, sizeof(hpcd));
/* Set LL Driver parameters */
hpcd.Instance = USBD_INSTANCE;
hpcd.Init.dev_endpoints = 8;
hpcd.Init.speed = USBD_PCD_SPEED;
#if defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32F4)
hpcd.Init.ep0_mps = EP_MPS_64;
#else
hpcd.Init.ep0_mps = DEP0CTL_MPS_64;
#endif
#if !defined(SOC_SERIES_STM32F1)
hpcd.Init.phy_itface = USBD_PCD_PHY_MODULE;
#endif
/* Initialize LL Driver */
HAL_PCD_Init(&hpcd);
/* USB interrupt Init */
HAL_NVIC_SetPriority(USBD_IRQ_TYPE, 2, 0);
HAL_NVIC_EnableIRQ(USBD_IRQ_TYPE);
return 0;
}
void USBD_IRQ_HANDLER(void)
{
tud_int_handler(0);
}
#endif

12
bsp/stm32/stm32l475-atk-pandora/board/ports/lvgl/lv_port_disp.c
View File

@ -11,13 +11,14 @@
#include <drv_lcd.h>
#define MY_DISP_HOR_RES LCD_W
#define DISP_BUFFER_LINES 10
/*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf;
/*Static or global buffer(s). The second buffer is optional*/
static lv_color_t buf_1[MY_DISP_HOR_RES * 10];
static lv_color_t buf_2[MY_DISP_HOR_RES * 10];
static lv_color_t buf_1[MY_DISP_HOR_RES * DISP_BUFFER_LINES];
static lv_color_t buf_2[MY_DISP_HOR_RES * DISP_BUFFER_LINES];
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
@ -26,6 +27,7 @@ static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
*'lv_disp_flush_ready()' has to be called when finished.*/
static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_color_t * color_p)
{
/* color_p is a buffer pointer; the buffer is provided by LVGL */
lcd_fill_array(area->x1, area->y1, area->x2, area->y2, color_p);
/*IMPORTANT!!!
@ -36,13 +38,13 @@ static void disp_flush(lv_disp_drv_t * disp_drv, const lv_area_t * area, lv_colo
void lv_port_disp_init(void)
{
/*Initialize `disp_buf` with the buffer(s). With only one buffer use NULL instead buf_2 */
lv_disp_draw_buf_init(&disp_buf, buf_1, buf_2, MY_DISP_HOR_RES*10);
lv_disp_draw_buf_init(&disp_buf, buf_1, buf_2, MY_DISP_HOR_RES * DISP_BUFFER_LINES);
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
/*Set the resolution of the display*/
disp_drv.hor_res = MY_DISP_HOR_RES;
disp_drv.ver_res = MY_DISP_HOR_RES;
disp_drv.hor_res = LCD_W;
disp_drv.ver_res = LCD_H;
/*Set a display buffer*/
disp_drv.draw_buf = &disp_buf;

2
bsp/thead-smart/gcc_csky.ld
View File

@ -44,7 +44,7 @@ SECTIONS
.text : AT(ADDR(.text)){
. = ALIGN(0x4) ;
__stext = . ;
KEEP(*startup.o(*.text*))
KEEP(*startup_gcc.o(*.text*))
*(.text)
*(.text*)
*(.text.*)

3
components/libc/Kconfig
View File

@ -2,7 +2,8 @@ menu "POSIX layer and C standard library"
config RT_USING_LIBC
bool "Enable libc APIs from toolchain"
default y
select RT_USING_HEAP
default n
if RT_USING_LIBC
config RT_LIBC_USING_TIME

36
components/libc/compilers/armlibc/mem_std.c
View File

@ -4,40 +4,68 @@
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* 2014-08-03 bernard Add file header.
* Date Author Notes
* 2014-08-03 bernard Add file header
* 2021-11-13 Meco Man implement no-heap warning
*/
#include <rtthread.h>
#include <stddef.h>
#ifdef RT_USING_HEAP
#ifndef RT_USING_HEAP
#define DBG_TAG "armlibc.mem"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#define _NO_HEAP_ERROR() do{LOG_E("Please enable RT_USING_HEAP");\
RT_ASSERT(0);\
}while(0)
#endif /* RT_USING_HEAP */
#ifdef __CC_ARM
/* avoid the heap and heap-using library functions supplied by arm */
#pragma import(__use_no_heap)
#endif
#endif /* __CC_ARM */
void *malloc(size_t n)
{
#ifdef RT_USING_HEAP
return rt_malloc(n);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
RTM_EXPORT(malloc);
void *realloc(void *rmem, size_t newsize)
{
#ifdef RT_USING_HEAP
return rt_realloc(rmem, newsize);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
RTM_EXPORT(realloc);
void *calloc(size_t nelem, size_t elsize)
{
#ifdef RT_USING_HEAP
return rt_calloc(nelem, elsize);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
RTM_EXPORT(calloc);
void free(void *rmem)
{
#ifdef RT_USING_HEAP
rt_free(rmem);
#else
_NO_HEAP_ERROR();
#endif
}
RTM_EXPORT(free);
#endif

55
components/libc/compilers/armlibc/syscalls.c
View File

@ -144,38 +144,48 @@ int _sys_close(FILEHANDLE fh)
*/
int _sys_read(FILEHANDLE fh, unsigned char *buf, unsigned len, int mode)
{
#ifdef RT_USING_POSIX_STDIO
#ifdef RT_USING_POSIX
int size;
if (fh == STDIN)
{
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0)
{
LOG_W("Do not invoke standard output before initializing libc");
return 0;
return 0; /* error, but keep going */
}
size = read(STDIN_FILENO, buf, len);
return len - size;
return 0; /* success */
#else
return 0; /* error */
#endif
}
else if ((fh == STDOUT) || (fh == STDERR))
else if (fh == STDOUT || fh == STDERR)
{
return 0; /* error */
}
else
{
size = read(fh, buf, len);
if (size >= 0)
return len - size;
return len - size; /* success */
else
return 0; /* error */
}
#else
return 0; /* error */
#endif /* RT_USING_POSIX_STDIO */
#endif /* RT_USING_POSIX */
}
/*
* Write to a file. Returns 0 on success, negative on error, and
* the number of characters _not_ written on partial success.
* `mode' exists for historical reasons and must be ignored.
* The return value is either:
* A positive number representing the number of characters not written
* (so any nonzero return value denotes a failure of some sort).
* A negative number indicating an error.
*/
int _sys_write(FILEHANDLE fh, const unsigned char *buf, unsigned len, int mode)
{
@ -183,39 +193,36 @@ int _sys_write(FILEHANDLE fh, const unsigned char *buf, unsigned len, int mode)
int size;
#endif /* RT_USING_POSIX */
if ((fh == STDOUT) || (fh == STDERR))
if (fh == STDOUT || fh == STDERR)
{
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0)
#ifdef RT_USING_CONSOLE
rt_device_t console;
console = rt_console_get_device();
if (console)
{
LOG_W("Do not invoke standard input before initializing libc");
return 0;
rt_device_write(console, -1, buf, len);
}
size = write(STDOUT_FILENO, buf, len);
return len - size;
#elif defined(RT_USING_CONSOLE)
if (rt_console_get_device())
{
rt_device_write(rt_console_get_device(), -1, buf, len);
}
return 0; /* success */
#else
return 0; /* error */
#endif /* RT_USING_POSIX_STDIO */
#endif /* RT_USING_CONSOLE */
}
else if (fh == STDIN)
{
return 0; /* error */
}
else
{
#ifdef RT_USING_POSIX
size = write(fh, buf, len);
if (size >= 0)
return len - size;
return 0; /* success */
else
return 0; /* error */
#else
return 0;
return 0; /* error */
#endif /* RT_USING_POSIX */
}
}
/*

11
components/libc/compilers/common/fcntl.h → components/libc/compilers/common/nogcc/fcntl.h
View File

@ -12,10 +12,9 @@
#include <sys/types.h>
#define O_RDONLY 0x0000 /* open for reading only */
#define O_WRONLY 0x0001 /* open for writing only */
#define O_RDWR 0x0002 /* open for reading and writing */
#define O_ACCMODE 0x0003 /* mask for above modes */
#define O_RDONLY 00
#define O_WRONLY 01
#define O_RDWR 02
#define O_CREAT 0100
#define O_EXCL 0200
@ -30,6 +29,7 @@
#define O_DIRECTORY 0200000
#define O_NOFOLLOW 0400000
#define O_CLOEXEC 02000000
#define O_ASYNC 020000
#define O_DIRECT 040000
#define O_LARGEFILE 0100000
@ -37,9 +37,12 @@
#define O_PATH 010000000
#define O_TMPFILE 020200000
#define O_NDELAY O_NONBLOCK
#define O_SEARCH O_PATH
#define O_EXEC O_PATH
#define O_ACCMODE (03|O_SEARCH)
#define F_DUPFD 0
#define F_GETFD 1
#define F_SETFD 2

1
components/libc/compilers/common/nogcc/unistd.h
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@ -7,4 +7,3 @@
* Date Author Notes
*/
#include "sys/unistd.h"

8
components/libc/compilers/dlib/syscall_close.c
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@ -8,10 +8,16 @@
* 2015-01-28 Bernard first version
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <unistd.h>
/*
* The "__close" function should close the file corresponding to
* "handle". It should return 0 on success and nonzero on failure.
*/
#pragma module_name = "?__close"
int __close(int handle)
{
if (handle == _LLIO_STDOUT ||

17
components/libc/compilers/dlib/syscall_lseek.c
View File

@ -8,10 +8,25 @@
* 2015-01-28 Bernard first version
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <unistd.h>
/*
* The "__lseek" function makes the next file operation (__read or
* __write) act on a new location. The parameter "whence" specifies
* how the "offset" parameter should be interpreted according to the
* following table:
*
* 0 (=SEEK_SET) - Goto location "offset".
* 1 (=SEEK_CUR) - Go "offset" bytes from the current location.
* 2 (=SEEK_END) - Go to "offset" bytes from the end.
*
* This function should return the current file position, or -1 on
* failure.
*/
#pragma module_name = "?__lseek"
long __lseek(int handle, long offset, int whence)
{
if (handle == _LLIO_STDOUT ||

38
components/libc/compilers/dlib/syscall_mem.c
View File

@ -6,27 +6,55 @@
* Change Logs:
* Date Author Notes
* 2015-01-28 Bernard first version
* 2021-11-13 Meco Man implement no-heap warning
*/
#include <rtthread.h>
#include <stddef.h>
#ifndef RT_USING_HEAP
#define DBG_TAG "dlib.syscall_mem"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#define _NO_HEAP_ERROR() do{LOG_E("Please enable RT_USING_HEAP");\
RT_ASSERT(0);\
}while(0)
#endif /* RT_USING_HEAP */
void *malloc(size_t n)
{
#ifdef RT_USING_HEAP
void *malloc(rt_size_t n)
{
return rt_malloc(n);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
void *realloc(void *rmem, rt_size_t newsize)
void *realloc(void *rmem, size_t newsize)
{
#ifdef RT_USING_HEAP
return rt_realloc(rmem, newsize);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
void *calloc(rt_size_t nelem, rt_size_t elsize)
void *calloc(size_t nelem, size_t elsize)
{
#ifdef RT_USING_HEAP
return rt_calloc(nelem, elsize);
#else
_NO_HEAP_ERROR();
return RT_NULL;
#endif
}
void free(void *rmem)
{
#ifdef RT_USING_HEAP
rt_free(rmem);
}
#else
_NO_HEAP_ERROR();
#endif
}

7
components/libc/compilers/dlib/syscall_open.c
View File

@ -9,9 +9,14 @@
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <fcntl.h>
/*
* The "__open" function opens the file named "filename" as specified
* by "mode".
*/
#pragma module_name = "?__open"
int __open(const char *filename, int mode)

26
components/libc/compilers/dlib/syscall_read.c
View File

@ -9,7 +9,7 @@
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <unistd.h>
#ifdef RT_USING_POSIX_STDIO
#include "libc.h"
@ -19,20 +19,36 @@
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
/*
* The "__read" function reads a number of bytes, at most "size" into
* the memory area pointed to by "buffer". It returns the number of
* bytes read, 0 at the end of the file, or _LLIO_ERROR if failure
* occurs.
*
* The template implementation below assumes that the application
* provides the function "MyLowLevelGetchar". It should return a
* character value, or -1 on failure.
*/
#pragma module_name = "?__read"
size_t __read(int handle, unsigned char *buf, size_t len)
{
#ifdef RT_USING_POSIX_STDIO
#ifdef RT_USING_POSIX
int size;
if (handle == _LLIO_STDIN)
{
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0)
{
LOG_W("Do not invoke standard input before initializing libc");
return 0;
return 0; /* error, but keep going */
}
return read(STDIN_FILENO, buf, len);
return read(STDIN_FILENO, buf, len); /* return the length of the data read */
#else
return _LLIO_ERROR;
#endif /* RT_USING_POSIX_STDIO */
}
else if ((handle == _LLIO_STDOUT) || (handle == _LLIO_STDERR))
{
@ -40,7 +56,7 @@ size_t __read(int handle, unsigned char *buf, size_t len)
}
size = read(handle, buf, len);
return size;
return size; /* return the length of the data read */
#else
return _LLIO_ERROR;
#endif /* RT_USING_POSIX */

14
components/libc/compilers/dlib/syscall_remove.c
View File

@ -8,15 +8,21 @@
* 2015-01-28 Bernard first version
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <unistd.h>
/*
* The "remove" function should remove the file named "filename". It
* should return 0 on success and nonzero on failure.
*/
#pragma module_name = "?remove"
int remove(const char *val)
int remove(const char *filename)
{
#ifdef RT_USING_POSIX
return unlink(val);
return unlink(filename);
#else
return -1;
return _LLIO_ERROR;
#endif /* RT_USING_POSIX */
}

37
components/libc/compilers/dlib/syscall_write.c
View File

@ -9,7 +9,7 @@
*/
#include <rtthread.h>
#include <yfuns.h>
#include <LowLevelIOInterface.h>
#include <unistd.h>
#ifdef RT_USING_POSIX_STDIO
#include "libc.h"
@ -19,6 +19,20 @@
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
/*
* The "__write" function should output "size" number of bytes from
* "buffer" in some application-specific way. It should return the
* number of characters written, or _LLIO_ERROR on failure.
*
* If "buffer" is zero then __write should perform flushing of
* internal buffers, if any. In this case "handle" can be -1 to
* indicate that all handles should be flushed.
*
* The template implementation below assumes that the application
* provides the function "MyLowLevelPutchar". It should return the
* character written, or -1 on failure.
*/
#pragma module_name = "?__write"
size_t __write(int handle, const unsigned char *buf, size_t len)
@ -29,36 +43,31 @@ size_t __write(int handle, const unsigned char *buf, size_t len)
if ((handle == _LLIO_STDOUT) || (handle == _LLIO_STDERR))
{
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0)
{
LOG_W("Do not invoke standard output before initializing libc");
return 0;
}
return write(STDOUT_FILENO, (void*)buf, len);
#elif defined(RT_USING_CONSOLE)
#ifdef RT_USING_CONSOLE
rt_device_t console_device;
console_device = rt_console_get_device();
if (console_device != 0)
if (console_device)
{
rt_device_write(console_device, 0, buf, len);
}
return len;
return len; /* return the length of the data written */
#else
return _LLIO_ERROR;
#endif /* RT_USING_POSIX */
#endif /* RT_USING_CONSOLE */
}
else if (handle == _LLIO_STDIN)
{
return _LLIO_ERROR;
}
else
{
#ifdef RT_USING_POSIX
size = write(handle, buf, len);
return size;
return size; /* return the length of the data written */
#else
return _LLIO_ERROR;
#endif /* RT_USING_POSIX */
}
}

23
components/libc/compilers/gcc/newlib/fcntl.h Normal file
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@ -0,0 +1,23 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-09-02 Meco Man First version
*/
#ifndef __FCNTL_H__
#define __FCNTL_H__
#include <sys/_default_fcntl.h>
#ifndef O_DIRECTORY
#define O_DIRECTORY 0x200000
#endif
#ifndef O_BINARY
#define O_BINARY 0x10000
#endif
#endif

58
components/libc/compilers/gcc/newlib/syscalls.c
View File

@ -80,7 +80,7 @@ void _free_r (struct _reent *ptr, void *addr)
void *
_sbrk_r(struct _reent *ptr, ptrdiff_t incr)
{
LOG_E("Please enable RT_USING_HEAP or RT_USING_LIBC");
LOG_E("Please enable RT_USING_HEAP");
RT_ASSERT(0);
return RT_NULL;
}
@ -109,7 +109,12 @@ int _getpid_r(struct _reent *ptr)
int _close_r(struct _reent *ptr, int fd)
{
#ifdef RT_USING_POSIX
return close(fd);
#else
ptr->_errno = ENOTSUP;
return -1;
#endif
}
int _execve_r(struct _reent *ptr, const char * name, char *const *argv, char *const *env)
@ -216,13 +221,27 @@ int _open_r(struct _reent *ptr, const char *file, int flags, int mode)
_ssize_t _read_r(struct _reent *ptr, int fd, void *buf, size_t nbytes)
{
#ifdef RT_USING_POSIX_STDIO
#ifdef RT_USING_POSIX
_ssize_t rc;
if (libc_stdio_get_console() < 0 && fd == STDIN_FILENO)
if (fd == STDIN_FILENO)
{
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0)
{
LOG_W("Do not invoke standard input before initializing libc");
return 0;
}
#else
ptr->_errno = ENOTSUP;
return -1;
#endif /* RT_USING_POSIX_STDIO */
}
else if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
{
ptr->_errno = ENOTSUP;
return -1;
}
rc = read(fd, buf, nbytes);
return rc;
#else
@ -271,27 +290,34 @@ _ssize_t _write_r(struct _reent *ptr, int fd, const void *buf, size_t nbytes)
{
#ifdef RT_USING_POSIX
_ssize_t rc;
#ifdef RT_USING_POSIX_STDIO
if (libc_stdio_get_console() < 0 && fd == STDOUT_FILENO)
{
LOG_W("Do not invoke standard output before initializing libc");
return 0;
}
#endif /* RT_USING_POSIX_STDIO */
rc = write(fd, buf, nbytes);
return rc;
#elif defined(RT_USING_CONSOLE)
if (STDOUT_FILENO == fd)
#endif /* RT_USING_POSIX */
if (fd == STDOUT_FILENO || fd == STDERR_FILENO)
{
#ifdef RT_USING_CONSOLE
rt_device_t console;
console = rt_console_get_device();
if (console)
return rt_device_write(console, -1, buf, nbytes);
}
#endif /* RT_USING_POSIX */
#else
ptr->_errno = ENOTSUP;
return -1;
#endif /* RT_USING_CONSOLE */
}
else if (fd == STDIN_FILENO)
{
ptr->_errno = ENOTSUP;
return -1;
}
#ifdef RT_USING_POSIX
rc = write(fd, buf, nbytes);
return rc;
#else
ptr->_errno = ENOTSUP;
return -1;
#endif /* RT_USING_POSIX */
}
/* for exit() and abort() */