import STM32F2xx branch.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1559 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong@gmail.com
parent
496e727498
commit
08240e3b8b
|
|
@ -0,0 +1,13 @@
|
|||
import rtconfig
|
||||
Import('RTT_ROOT')
|
||||
from building import *
|
||||
|
||||
src_bsp = ['application.c', 'startup.c', 'board.c', 'stm32f20x_it.c']
|
||||
src_drv = ['usart.c', 'serial.c']
|
||||
|
||||
src = src_bsp + src_drv
|
||||
CPPPATH = [str(Dir('#'))]
|
||||
CPPDEFINES = ['USE_STDPERIPH_DRIVER']
|
||||
group = DefineGroup('Startup', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
import os
|
||||
import sys
|
||||
import rtconfig
|
||||
|
||||
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
|
||||
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||
from building import *
|
||||
|
||||
TARGET = 'rtthread-stm32.' + rtconfig.TARGET_EXT
|
||||
|
||||
env = Environment(tools = ['mingw'],
|
||||
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||
|
||||
if rtconfig.PLATFORM == 'iar':
|
||||
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
|
||||
|
||||
Export('RTT_ROOT')
|
||||
Export('rtconfig')
|
||||
|
||||
# prepare building environment
|
||||
objs = PrepareBuilding(env, RTT_ROOT)
|
||||
|
||||
# STM32 firemare library building script
|
||||
objs = objs + SConscript('Libraries/SConscript', variant_dir='build/bsp/Libraries', duplicate=0)
|
||||
|
||||
# build program
|
||||
env.Program(TARGET, objs)
|
||||
|
||||
# end building
|
||||
EndBuilding(TARGET)
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
/*
|
||||
* File : application.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard the first version
|
||||
*/
|
||||
|
||||
/**
|
||||
* @addtogroup STM32
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
#include <board.h>
|
||||
#include <rtthread.h>
|
||||
#include "stm32f2xx_eth.h"
|
||||
|
||||
#ifdef RT_USING_DFS
|
||||
/* dfs init */
|
||||
#include <dfs_init.h>
|
||||
/* dfs filesystem:ELM filesystem init */
|
||||
#include <dfs_elm.h>
|
||||
/* dfs Filesystem APIs */
|
||||
#include <dfs_fs.h>
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_LWIP
|
||||
#include <lwip/sys.h>
|
||||
#include <lwip/api.h>
|
||||
#include <netif/ethernetif.h>
|
||||
#endif
|
||||
|
||||
void rt_init_thread_entry(void* parameter)
|
||||
{
|
||||
/* Filesystem Initialization */
|
||||
#ifdef RT_USING_DFS
|
||||
{
|
||||
/* init the device filesystem */
|
||||
dfs_init();
|
||||
|
||||
#ifdef RT_USING_DFS_ELMFAT
|
||||
/* init the elm chan FatFs filesystam*/
|
||||
elm_init();
|
||||
|
||||
/* mount sd card fat partition 1 as root directory */
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
|
||||
{
|
||||
rt_kprintf("File System initialized!\n");
|
||||
}
|
||||
else
|
||||
rt_kprintf("File System initialzation failed!\n");
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
/* LwIP Initialization */
|
||||
#ifdef RT_USING_LWIP
|
||||
{
|
||||
extern void lwip_sys_init(void);
|
||||
|
||||
/* register ethernetif device */
|
||||
eth_system_device_init();
|
||||
|
||||
/* initialize eth interface */
|
||||
rt_hw_stm32_eth_init();
|
||||
|
||||
/* re-init device driver */
|
||||
rt_device_init_all();
|
||||
|
||||
/* init lwip system */
|
||||
lwip_sys_init();
|
||||
rt_kprintf("TCP/IP initialized!\n");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
int rt_application_init()
|
||||
{
|
||||
rt_thread_t init_thread;
|
||||
|
||||
#if (RT_THREAD_PRIORITY_MAX == 32)
|
||||
init_thread = rt_thread_create("init",
|
||||
rt_init_thread_entry, RT_NULL,
|
||||
2048, 8, 20);
|
||||
#else
|
||||
init_thread = rt_thread_create("init",
|
||||
rt_init_thread_entry, RT_NULL,
|
||||
2048, 80, 20);
|
||||
#endif
|
||||
|
||||
if (init_thread != RT_NULL)
|
||||
rt_thread_startup(init_thread);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
* File : board.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard first implementation
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <stm32f2xx.h>
|
||||
#include "board.h"
|
||||
|
||||
/**
|
||||
* @addtogroup STM32
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NVIC_Configuration
|
||||
* Description : Configures Vector Table base location.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
/* Set the Vector Table base location at 0x20000000 */
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else /* VECT_TAB_FLASH */
|
||||
/* Set the Vector Table base location at 0x08000000 */
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SysTick_Configuration
|
||||
* Description : Configures the SysTick for OS tick.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void SysTick_Configuration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
rt_uint32_t cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
|
||||
}
|
||||
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
*
|
||||
*/
|
||||
void rt_hw_timer_handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial STM32 board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
/* NVIC Configuration */
|
||||
NVIC_Configuration();
|
||||
|
||||
/* Configure the SysTick */
|
||||
SysTick_Configuration();
|
||||
|
||||
rt_hw_usart_init();
|
||||
rt_console_set_device(CONSOLE_DEVICE);
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* File : board.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-09-22 Bernard add board.h to this bsp
|
||||
*/
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
/* board configuration */
|
||||
// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
|
||||
// <i>Default: 1
|
||||
#define STM32_USE_SDIO 0
|
||||
|
||||
/* whether use board external SRAM memory */
|
||||
// <e>Use external SRAM memory on the board
|
||||
// <i>Enable External SRAM memory
|
||||
#define STM32_EXT_SRAM 0
|
||||
// <o>Begin Address of External SRAM
|
||||
// <i>Default: 0x68000000
|
||||
#define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */
|
||||
// <o>End Address of External SRAM
|
||||
// <i>Default: 0x68080000
|
||||
#define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */
|
||||
// </e>
|
||||
|
||||
// <o> Internal SRAM memory size[Kbytes] <8-128>
|
||||
// <i>Default: 64
|
||||
#define STM32_SRAM_SIZE 128
|
||||
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||
|
||||
// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
|
||||
// <i>Default: 1
|
||||
#define STM32_CONSOLE_USART 1
|
||||
|
||||
void rt_hw_board_led_on(int n);
|
||||
void rt_hw_board_led_off(int n);
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#if STM32_CONSOLE_USART == 0
|
||||
#define CONSOLE_DEVICE "no"
|
||||
#elif STM32_CONSOLE_USART == 1
|
||||
#define CONSOLE_DEVICE "uart1"
|
||||
#elif STM32_CONSOLE_USART == 2
|
||||
#define CONSOLE_DEVICE "uart2"
|
||||
#elif STM32_CONSOLE_USART == 3
|
||||
#define CONSOLE_DEVICE "uart3"
|
||||
#endif
|
||||
|
||||
void rt_hw_usart_init(void);
|
||||
|
||||
/* SD Card init function */
|
||||
void rt_hw_msd_init(void);
|
||||
|
||||
/* ETH interface init function */
|
||||
|
||||
#endif
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,780 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>RT-Thread STM32</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F207VG</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>"STARTUP\ST\STM32F2xx\startup_stm32f2xx.s" ("STM32F2xx Startup Code")</StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
|
||||
<DeviceId>5118</DeviceId>
|
||||
<RegisterFile>stm32f2xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>SFD\ST\STM32F2xx\STM32F2xx.sfr</SFDFile>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath>ST\STM32F2xx\</RegisterFilePath>
|
||||
<DBRegisterFilePath>ST\STM32F2xx\</DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>rtthread-stm32</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-MPU</SimDllArguments>
|
||||
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pSTM32F207VG</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TARMSTM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pSTM32F207VG</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>0</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>7</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4098</DriverSelection>
|
||||
</Flash1>
|
||||
<Flash2>Segger\JL2CM3.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define>USE_STDPERIPH_DRIVER</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\components\finsh;.;..\..\include;Libraries\CMSIS\CM3\CoreSupport;Libraries\STM32F2xx_StdPeriph_Driver\inc;..\..\libcpu\arm\common;..\..\libcpu\arm\stm32;Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F2xx</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc>--keep __fsym_* --keep __vsym_*</Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Startup</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>application.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\application.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>startup.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\startup.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f20x_it.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\stm32f20x_it.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>serial.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>.\serial.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Kernel</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\clock.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>device.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\device.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>idle.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\idle.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>ipc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\ipc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>irq.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\irq.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>kservice.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\kservice.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\mem.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mempool.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\mempool.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>module.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\module.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>object.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\object.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>rtm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\rtm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>scheduler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\scheduler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>slab.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\slab.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>thread.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\thread.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\src\timer.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>STM32</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cpuport.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\stm32\cpuport.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>context_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\stm32\context_rvds.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>start_rvds.S</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>..\..\libcpu\arm\stm32\start_rvds.S</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>backtrace.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\backtrace.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>div0.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\div0.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>showmem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\libcpu\arm\common\showmem.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>finsh</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>cmd.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\cmd.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_compiler.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_compiler.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_error.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_error.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_heap.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_heap.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_init.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_init.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_node.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_node.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_ops.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_ops.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_parser.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_parser.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_token.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_token.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_var.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_var.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>finsh_vm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\finsh_vm.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>shell.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\shell.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>symbol.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\components\finsh\symbol.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>STM32_StdPeriph</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>core_cm3.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\CMSIS\CM3\CoreSupport\core_cm3.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>system_stm32f2xx.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F2xx\system_stm32f2xx.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>misc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\misc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_adc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_adc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_can.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_can.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_crc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_crc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_cryp.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_cryp_aes.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_aes.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_cryp_des.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_des.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_cryp_tdes.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_cryp_tdes.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_dac.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dac.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_dbgmcu.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dbgmcu.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_dcmi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dcmi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_dma.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_dma.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_exti.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_exti.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_flash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_flash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_fsmc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_fsmc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_gpio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_hash.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_hash_md5.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash_md5.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_hash_sha1.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_hash_sha1.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_i2c.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_i2c.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_iwdg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_iwdg.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_pwr.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_pwr.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_rcc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rcc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_rng.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rng.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_rtc.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_rtc.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_sdio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_sdio.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_spi.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_spi.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_syscfg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_syscfg.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_tim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_tim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stm32f2xx_wwdg.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>Libraries\STM32F2xx_StdPeriph_Driver\src\stm32f2xx_wwdg.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
1. support board
|
||||
# U-EasyTech STM32F207VG network debug board
|
||||
- LCD
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
/* RT_NAME_MAX*/
|
||||
#define RT_NAME_MAX 8
|
||||
|
||||
/* RT_ALIGN_SIZE*/
|
||||
#define RT_ALIGN_SIZE 4
|
||||
|
||||
/* PRIORITY_MAX */
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
|
||||
/* Tick per Second */
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
|
||||
/* SECTION: RT_DEBUG */
|
||||
/* Thread Debug */
|
||||
#define RT_DEBUG
|
||||
#define RT_THREAD_DEBUG
|
||||
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
|
||||
/* Using Hook */
|
||||
#define RT_USING_HOOK
|
||||
|
||||
/* Using Software Timer */
|
||||
/* #define RT_USING_TIMER_SOFT */
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
#define RT_TIMER_TICK_PER_SECOND 10
|
||||
|
||||
/* SECTION: IPC */
|
||||
/* Using Semaphore*/
|
||||
#define RT_USING_SEMAPHORE
|
||||
|
||||
/* Using Mutex */
|
||||
#define RT_USING_MUTEX
|
||||
|
||||
/* Using Event */
|
||||
#define RT_USING_EVENT
|
||||
|
||||
/* Using MailBox */
|
||||
#define RT_USING_MAILBOX
|
||||
|
||||
/* Using Message Queue */
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* SECTION: Memory Management */
|
||||
/* Using Memory Pool Management*/
|
||||
#define RT_USING_MEMPOOL
|
||||
|
||||
/* Using Dynamic Heap Management */
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Using Small MM */
|
||||
#define RT_USING_SMALL_MEM
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System */
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_UART1
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
/* the buffer size of console*/
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* SECTION: finsh, a C-Express shell */
|
||||
#define RT_USING_FINSH
|
||||
/* Using symbol table */
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
|
||||
/* SECTION: device filesystem */
|
||||
/* #define RT_USING_DFS */
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* the max number of mounted filesystem */
|
||||
#define DFS_FILESYSTEMS_MAX 2
|
||||
/* the max number of opened files */
|
||||
#define DFS_FD_MAX 4
|
||||
|
||||
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
|
||||
/* #define RT_USING_LWIP */
|
||||
/* LwIP uses RT-Thread Memory Management */
|
||||
#define RT_LWIP_USING_RT_MEM
|
||||
/* Enable ICMP protocol*/
|
||||
#define RT_LWIP_ICMP
|
||||
/* Enable UDP protocol*/
|
||||
#define RT_LWIP_UDP
|
||||
/* Enable TCP protocol*/
|
||||
#define RT_LWIP_TCP
|
||||
/* Enable DNS */
|
||||
#define RT_LWIP_DNS
|
||||
|
||||
/* the number of simulatenously active TCP connections*/
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
|
||||
/* ip address of target*/
|
||||
#define RT_LWIP_IPADDR0 192
|
||||
#define RT_LWIP_IPADDR1 168
|
||||
#define RT_LWIP_IPADDR2 1
|
||||
#define RT_LWIP_IPADDR3 30
|
||||
|
||||
/* gateway address of target*/
|
||||
#define RT_LWIP_GWADDR0 192
|
||||
#define RT_LWIP_GWADDR1 168
|
||||
#define RT_LWIP_GWADDR2 1
|
||||
#define RT_LWIP_GWADDR3 1
|
||||
|
||||
/* mask address of target*/
|
||||
#define RT_LWIP_MSKADDR0 255
|
||||
#define RT_LWIP_MSKADDR1 255
|
||||
#define RT_LWIP_MSKADDR2 255
|
||||
#define RT_LWIP_MSKADDR3 0
|
||||
|
||||
/* tcp thread options */
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
|
||||
|
||||
/* ethernet if thread options */
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 15
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
# toolchains options
|
||||
ARCH='arm'
|
||||
CPU='stm32'
|
||||
CROSS_TOOL='keil'
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = 'E:/SourceryGCC/bin'
|
||||
elif CROSS_TOOL == 'keil':
|
||||
PLATFORM = 'armcc'
|
||||
EXEC_PATH = 'E:/Keil'
|
||||
elif CROSS_TOOL == 'iar':
|
||||
PLATFORM = 'iar'
|
||||
IAR_PATH = 'E:/Program Files/IAR Systems/Embedded Workbench 5.4 Evaluation_0'
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'arm-none-eabi-'
|
||||
CC = PREFIX + 'gcc'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'axf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-stm32.map,-cref,-u,Reset_Handler -T stm32_rom.ld'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -gdwarf-2'
|
||||
AFLAGS += ' -gdwarf-2'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||
|
||||
elif PLATFORM == 'armcc':
|
||||
# toolchains
|
||||
CC = 'armcc'
|
||||
AS = 'armasm'
|
||||
AR = 'armar'
|
||||
LINK = 'armlink'
|
||||
TARGET_EXT = 'axf'
|
||||
|
||||
DEVICE = ' --device DARMSTM'
|
||||
CFLAGS = DEVICE + ' --apcs=interwork'
|
||||
AFLAGS = DEVICE
|
||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread-stm32.map --scatter stm32_rom.sct'
|
||||
|
||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
|
||||
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
|
||||
|
||||
EXEC_PATH += '/arm/bin40/'
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -g -O0'
|
||||
AFLAGS += ' -g'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||
|
||||
elif PLATFORM == 'iar':
|
||||
# toolchains
|
||||
CC = 'iccarm'
|
||||
AS = 'iasmarm'
|
||||
AR = 'iarchive'
|
||||
LINK = 'ilinkarm'
|
||||
TARGET_EXT = 'out'
|
||||
|
||||
DEVICE = ' --cpu DARMSTM --thumb'
|
||||
|
||||
CFLAGS = ''
|
||||
CFLAGS += ' --diag_suppress Pa050'
|
||||
CFLAGS += ' --no_cse'
|
||||
CFLAGS += ' --no_unroll'
|
||||
CFLAGS += ' --no_inline'
|
||||
CFLAGS += ' --no_code_motion'
|
||||
CFLAGS += ' --no_tbaa'
|
||||
CFLAGS += ' --no_clustering'
|
||||
CFLAGS += ' --no_scheduling'
|
||||
CFLAGS += ' --debug'
|
||||
CFLAGS += ' --endian=little'
|
||||
CFLAGS += ' --cpu=Cortex-M3'
|
||||
CFLAGS += ' -e'
|
||||
CFLAGS += ' --fpu=None'
|
||||
CFLAGS += ' --dlib_config "' + IAR_PATH + '/arm/INC/DLib_Config_Normal.h"'
|
||||
CFLAGS += ' -Ol'
|
||||
CFLAGS += ' -I"' + IAR_PATH + '/arm/inc"'
|
||||
|
||||
AFLAGS = ''
|
||||
AFLAGS += ' -s+'
|
||||
AFLAGS += ' -w+'
|
||||
AFLAGS += ' -r'
|
||||
AFLAGS += ' --cpu Cortex-M3'
|
||||
AFLAGS += ' --fpu None'
|
||||
AFLAGS += ' -I"' + IAR_PATH + '/arm/INC"'
|
||||
|
||||
LFLAGS = ' --config stm32f10x_flash.icf'
|
||||
LFLAGS += ' --redirect _Printf=_PrintfTiny'
|
||||
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
|
||||
LFLAGS += ' --entry __iar_program_start'
|
||||
|
||||
EXEC_PATH = IAR_PATH + '/arm/bin/'
|
||||
POST_ACTION = ''
|
||||
|
|
@ -0,0 +1,418 @@
|
|||
/*
|
||||
* File : serial.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-02-05 Bernard first version
|
||||
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
|
||||
* in the buffer.
|
||||
* 2010-03-29 Bernard cleanup code.
|
||||
*/
|
||||
|
||||
#include "serial.h"
|
||||
#include <stm32f2xx_dma.h>
|
||||
#include <stm32f2xx_usart.h>
|
||||
|
||||
static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
|
||||
rt_uint32_t address, rt_uint32_t size);
|
||||
|
||||
/**
|
||||
* @addtogroup STM32
|
||||
*/
|
||||
/*@{*/
|
||||
|
||||
/* RT-Thread Device Interface */
|
||||
static rt_err_t rt_serial_init (rt_device_t dev)
|
||||
{
|
||||
struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->user_data;
|
||||
|
||||
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
|
||||
{
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
rt_memset(uart->int_rx->rx_buffer, 0,
|
||||
sizeof(uart->int_rx->rx_buffer));
|
||||
uart->int_rx->read_index = 0;
|
||||
uart->int_rx->save_index = 0;
|
||||
}
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
|
||||
{
|
||||
RT_ASSERT(uart->dma_tx->dma_channel != RT_NULL);
|
||||
uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
|
||||
|
||||
/* init data node memory pool */
|
||||
rt_mp_init(&(uart->dma_tx->data_node_mp), "dn",
|
||||
uart->dma_tx->data_node_mem_pool,
|
||||
sizeof(uart->dma_tx->data_node_mem_pool),
|
||||
sizeof(struct stm32_serial_data_node));
|
||||
}
|
||||
|
||||
/* Enable USART */
|
||||
USART_Cmd(uart->uart_device, ENABLE);
|
||||
|
||||
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_close(rt_device_t dev)
|
||||
{
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_uint8_t* ptr;
|
||||
rt_err_t err_code;
|
||||
struct stm32_serial_device* uart;
|
||||
|
||||
ptr = buffer;
|
||||
err_code = RT_EOK;
|
||||
uart = (struct stm32_serial_device*)dev->user_data;
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
|
||||
{
|
||||
/* interrupt mode Rx */
|
||||
while (size)
|
||||
{
|
||||
rt_base_t level;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
if (uart->int_rx->read_index != uart->int_rx->save_index)
|
||||
{
|
||||
/* read a character */
|
||||
*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
|
||||
size--;
|
||||
|
||||
/* move to next position */
|
||||
uart->int_rx->read_index ++;
|
||||
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->read_index = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* set error code */
|
||||
err_code = -RT_EEMPTY;
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
break;
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* polling mode */
|
||||
while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
|
||||
{
|
||||
while (uart->uart_device->SR & USART_FLAG_RXNE)
|
||||
{
|
||||
*ptr = uart->uart_device->DR & 0xff;
|
||||
ptr ++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* set error code */
|
||||
rt_set_errno(err_code);
|
||||
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
|
||||
}
|
||||
|
||||
static void rt_serial_enable_dma(DMA_Stream_TypeDef* dma_channel,
|
||||
rt_uint32_t address, rt_uint32_t size)
|
||||
{
|
||||
RT_ASSERT(dma_channel != RT_NULL);
|
||||
|
||||
/* disable DMA */
|
||||
DMA_Cmd(dma_channel, DISABLE);
|
||||
|
||||
/* set buffer address */
|
||||
dma_channel->M0AR = address;
|
||||
/* set size */
|
||||
dma_channel->NDTR = size;
|
||||
|
||||
/* enable DMA */
|
||||
DMA_Cmd(dma_channel, ENABLE);
|
||||
}
|
||||
|
||||
static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||
{
|
||||
rt_uint8_t* ptr;
|
||||
rt_err_t err_code;
|
||||
struct stm32_serial_device* uart;
|
||||
|
||||
err_code = RT_EOK;
|
||||
ptr = (rt_uint8_t*)buffer;
|
||||
uart = (struct stm32_serial_device*)dev->user_data;
|
||||
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
/* interrupt mode Tx, does not support */
|
||||
RT_ASSERT(0);
|
||||
}
|
||||
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
|
||||
{
|
||||
/* DMA mode Tx */
|
||||
|
||||
/* allocate a data node */
|
||||
struct stm32_serial_data_node* data_node = (struct stm32_serial_data_node*)
|
||||
rt_mp_alloc (&(uart->dma_tx->data_node_mp), RT_WAITING_FOREVER);
|
||||
if (data_node == RT_NULL)
|
||||
{
|
||||
/* set error code */
|
||||
err_code = -RT_ENOMEM;
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_uint32_t level;
|
||||
|
||||
/* fill data node */
|
||||
data_node->data_ptr = ptr;
|
||||
data_node->data_size = size;
|
||||
|
||||
/* insert to data link */
|
||||
data_node->next = RT_NULL;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
data_node->prev = uart->dma_tx->list_tail;
|
||||
if (uart->dma_tx->list_tail != RT_NULL)
|
||||
uart->dma_tx->list_tail->next = data_node;
|
||||
uart->dma_tx->list_tail = data_node;
|
||||
|
||||
if (uart->dma_tx->list_head == RT_NULL)
|
||||
{
|
||||
/* start DMA to transmit data */
|
||||
uart->dma_tx->list_head = data_node;
|
||||
|
||||
/* Enable DMA Channel */
|
||||
rt_serial_enable_dma(uart->dma_tx->dma_channel,
|
||||
(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
|
||||
uart->dma_tx->list_head->data_size);
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* polling mode */
|
||||
if (dev->flag & RT_DEVICE_FLAG_STREAM)
|
||||
{
|
||||
/* stream mode */
|
||||
while (size)
|
||||
{
|
||||
if (*ptr == '\n')
|
||||
{
|
||||
while (!(uart->uart_device->SR & USART_FLAG_TXE));
|
||||
uart->uart_device->DR = '\r';
|
||||
}
|
||||
|
||||
while (!(uart->uart_device->SR & USART_FLAG_TXE));
|
||||
uart->uart_device->DR = (*ptr & 0x1FF);
|
||||
|
||||
++ptr; --size;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* write data directly */
|
||||
while (size)
|
||||
{
|
||||
while (!(uart->uart_device->SR & USART_FLAG_TXE));
|
||||
uart->uart_device->DR = (*ptr & 0x1FF);
|
||||
|
||||
++ptr; --size;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* set error code */
|
||||
rt_set_errno(err_code);
|
||||
|
||||
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
|
||||
}
|
||||
|
||||
static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
struct stm32_serial_device* uart;
|
||||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
uart = (struct stm32_serial_device*)dev->user_data;
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_SUSPEND:
|
||||
/* suspend device */
|
||||
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
|
||||
USART_Cmd(uart->uart_device, DISABLE);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RESUME:
|
||||
/* resume device */
|
||||
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
|
||||
USART_Cmd(uart->uart_device, ENABLE);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/*
|
||||
* serial register for STM32
|
||||
* support STM32F103VB and STM32F103ZE
|
||||
*/
|
||||
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
|
||||
{
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
|
||||
(flag & RT_DEVICE_FLAG_INT_TX))
|
||||
{
|
||||
RT_ASSERT(0);
|
||||
}
|
||||
|
||||
device->type = RT_Device_Class_Char;
|
||||
device->rx_indicate = RT_NULL;
|
||||
device->tx_complete = RT_NULL;
|
||||
device->init = rt_serial_init;
|
||||
device->open = rt_serial_open;
|
||||
device->close = rt_serial_close;
|
||||
device->read = rt_serial_read;
|
||||
device->write = rt_serial_write;
|
||||
device->control = rt_serial_control;
|
||||
device->user_data = serial;
|
||||
|
||||
/* register a character device */
|
||||
return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
|
||||
}
|
||||
|
||||
/* ISR for serial interrupt */
|
||||
void rt_hw_serial_isr(rt_device_t device)
|
||||
{
|
||||
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
|
||||
|
||||
if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
|
||||
{
|
||||
/* interrupt mode receive */
|
||||
RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
|
||||
|
||||
/* save on rx buffer */
|
||||
while (uart->uart_device->SR & USART_FLAG_RXNE)
|
||||
{
|
||||
rt_base_t level;
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
/* save character */
|
||||
uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->DR & 0xff;
|
||||
uart->int_rx->save_index ++;
|
||||
if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->save_index = 0;
|
||||
|
||||
/* if the next position is read index, discard this 'read char' */
|
||||
if (uart->int_rx->save_index == uart->int_rx->read_index)
|
||||
{
|
||||
uart->int_rx->read_index ++;
|
||||
if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
|
||||
uart->int_rx->read_index = 0;
|
||||
}
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
}
|
||||
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
|
||||
|
||||
/* invoke callback */
|
||||
if (device->rx_indicate != RT_NULL)
|
||||
{
|
||||
rt_size_t rx_length;
|
||||
|
||||
/* get rx length */
|
||||
rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
|
||||
UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
|
||||
uart->int_rx->save_index - uart->int_rx->read_index;
|
||||
|
||||
device->rx_indicate(device, rx_length);
|
||||
}
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
|
||||
{
|
||||
/* clear interrupt */
|
||||
USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* ISR for DMA mode Tx
|
||||
*/
|
||||
void rt_hw_serial_dma_tx_isr(rt_device_t device)
|
||||
{
|
||||
rt_uint32_t level;
|
||||
struct stm32_serial_data_node* data_node;
|
||||
struct stm32_serial_device* uart = (struct stm32_serial_device*) device->user_data;
|
||||
|
||||
/* DMA mode receive */
|
||||
RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
|
||||
|
||||
/* get the first data node */
|
||||
data_node = uart->dma_tx->list_head;
|
||||
RT_ASSERT(data_node != RT_NULL);
|
||||
|
||||
/* invoke call to notify tx complete */
|
||||
if (device->tx_complete != RT_NULL)
|
||||
device->tx_complete(device, data_node->data_ptr);
|
||||
|
||||
/* disable interrupt */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
/* remove list head */
|
||||
uart->dma_tx->list_head = data_node->next;
|
||||
if (uart->dma_tx->list_head == RT_NULL) /* data link empty */
|
||||
uart->dma_tx->list_tail = RT_NULL;
|
||||
|
||||
/* enable interrupt */
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
/* release data node memory */
|
||||
rt_mp_free(data_node);
|
||||
|
||||
if (uart->dma_tx->list_head != RT_NULL)
|
||||
{
|
||||
/* transmit next data node */
|
||||
rt_serial_enable_dma(uart->dma_tx->dma_channel,
|
||||
(rt_uint32_t)uart->dma_tx->list_head->data_ptr,
|
||||
uart->dma_tx->list_head->data_size);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* no data to be transmitted, disable DMA */
|
||||
DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
|
||||
}
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* File : serial.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009 - 2010, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard first version
|
||||
* 2010-03-29 Bernard remove interrupt tx and DMA rx mode.
|
||||
*/
|
||||
#ifndef __RT_HW_SERIAL_H__
|
||||
#define __RT_HW_SERIAL_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
/* STM32F10x library definitions */
|
||||
#include <stm32f2xx.h>
|
||||
|
||||
#define UART_RX_BUFFER_SIZE 64
|
||||
#define UART_TX_DMA_NODE_SIZE 4
|
||||
|
||||
/* data node for Tx Mode */
|
||||
struct stm32_serial_data_node
|
||||
{
|
||||
rt_uint8_t *data_ptr;
|
||||
rt_size_t data_size;
|
||||
struct stm32_serial_data_node *next, *prev;
|
||||
};
|
||||
struct stm32_serial_dma_tx
|
||||
{
|
||||
/* DMA Channel */
|
||||
DMA_Stream_TypeDef* dma_channel;
|
||||
|
||||
/* data list head and tail */
|
||||
struct stm32_serial_data_node *list_head, *list_tail;
|
||||
|
||||
/* data node memory pool */
|
||||
struct rt_mempool data_node_mp;
|
||||
rt_uint8_t data_node_mem_pool[UART_TX_DMA_NODE_SIZE *
|
||||
(sizeof(struct stm32_serial_data_node) + sizeof(void*))];
|
||||
};
|
||||
|
||||
struct stm32_serial_int_rx
|
||||
{
|
||||
rt_uint8_t rx_buffer[UART_RX_BUFFER_SIZE];
|
||||
rt_uint32_t read_index, save_index;
|
||||
};
|
||||
|
||||
struct stm32_serial_device
|
||||
{
|
||||
USART_TypeDef* uart_device;
|
||||
|
||||
/* rx structure */
|
||||
struct stm32_serial_int_rx* int_rx;
|
||||
|
||||
/* tx structure */
|
||||
struct stm32_serial_dma_tx* dma_tx;
|
||||
};
|
||||
|
||||
rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial);
|
||||
|
||||
void rt_hw_serial_isr(rt_device_t device);
|
||||
void rt_hw_serial_dma_tx_isr(rt_device_t device);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* File : startup.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-08-31 Bernard first implementation
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include <stm32f2xx.h>
|
||||
#include "board.h"
|
||||
|
||||
/**
|
||||
* @addtogroup STM32
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
extern int rt_application_init(void);
|
||||
#ifdef RT_USING_FINSH
|
||||
extern void finsh_system_init(void);
|
||||
extern void finsh_set_device(const char* device);
|
||||
#endif
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
/*******************************************************************************
|
||||
* Function Name : assert_failed
|
||||
* Description : Reports the name of the source file and the source line number
|
||||
* where the assert error has occurred.
|
||||
* Input : - file: pointer to the source file name
|
||||
* - line: assert error line source number
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void assert_failed(u8* file, u32 line)
|
||||
{
|
||||
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
|
||||
rt_kprintf(" file %s\r\n", file);
|
||||
rt_kprintf(" line %d\r\n", line);
|
||||
|
||||
while (1) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function will startup RT-Thread RTOS.
|
||||
*/
|
||||
void rtthread_startup(void)
|
||||
{
|
||||
/* init board */
|
||||
rt_hw_board_init();
|
||||
|
||||
/* show version */
|
||||
rt_show_version();
|
||||
|
||||
/* init tick */
|
||||
rt_system_tick_init();
|
||||
|
||||
/* init kernel object */
|
||||
rt_system_object_init();
|
||||
|
||||
/* init timer system */
|
||||
rt_system_timer_init();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
#if STM32_EXT_SRAM
|
||||
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
|
||||
#else
|
||||
#ifdef __CC_ARM
|
||||
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
|
||||
#elif __ICCARM__
|
||||
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
|
||||
#else
|
||||
/* init memory system */
|
||||
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* init scheduler system */
|
||||
rt_system_scheduler_init();
|
||||
|
||||
#ifdef RT_USING_DFS
|
||||
/* init sdcard driver */
|
||||
#if STM32_USE_SDIO
|
||||
rt_hw_sdcard_init();
|
||||
#else
|
||||
rt_hw_msd_init();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* init all device */
|
||||
rt_device_init_all();
|
||||
|
||||
/* init application */
|
||||
rt_application_init();
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
/* init finsh */
|
||||
finsh_system_init();
|
||||
finsh_set_device("uart1");
|
||||
#endif
|
||||
|
||||
/* init timer thread */
|
||||
rt_system_timer_thread_init();
|
||||
|
||||
/* init idle thread */
|
||||
rt_thread_idle_init();
|
||||
|
||||
/* start scheduler */
|
||||
rt_system_scheduler_start();
|
||||
|
||||
/* never reach here */
|
||||
return ;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/* disable interrupt first */
|
||||
rt_hw_interrupt_disable();
|
||||
|
||||
/* init system setting */
|
||||
SystemInit();
|
||||
|
||||
/* startup RT-Thread RTOS */
|
||||
rtthread_startup();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,127 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/Template/stm32f10x_it.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.1.0
|
||||
* @date 06/19/2009
|
||||
* @brief Main Interrupt Service Routines.
|
||||
* This file provides template for all exceptions handler and
|
||||
* peripherals interrupt service routine.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f20x_it.h"
|
||||
#include <board.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
/** @addtogroup Template_Project
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/Template/stm32f10x_it.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.1.0
|
||||
* @date 06/19/2009
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_IT_H
|
||||
#define __STM32F10x_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include <stm32f2xx.h>
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_IT_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,88 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file USART/USART_Printf/stm32f2xx_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 18-April-2011
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F2xx_CONF_H
|
||||
#define __STM32F2xx_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment the line below to enable peripheral header file inclusion */
|
||||
#include "stm32f2xx_adc.h"
|
||||
#include "stm32f2xx_can.h"
|
||||
#include "stm32f2xx_crc.h"
|
||||
#include "stm32f2xx_cryp.h"
|
||||
#include "stm32f2xx_dac.h"
|
||||
#include "stm32f2xx_dbgmcu.h"
|
||||
#include "stm32f2xx_dcmi.h"
|
||||
#include "stm32f2xx_dma.h"
|
||||
#include "stm32f2xx_exti.h"
|
||||
#include "stm32f2xx_flash.h"
|
||||
#include "stm32f2xx_fsmc.h"
|
||||
#include "stm32f2xx_hash.h"
|
||||
#include "stm32f2xx_gpio.h"
|
||||
#include "stm32f2xx_i2c.h"
|
||||
#include "stm32f2xx_iwdg.h"
|
||||
#include "stm32f2xx_pwr.h"
|
||||
#include "stm32f2xx_rcc.h"
|
||||
#include "stm32f2xx_rng.h"
|
||||
#include "stm32f2xx_rtc.h"
|
||||
#include "stm32f2xx_sdio.h"
|
||||
#include "stm32f2xx_spi.h"
|
||||
#include "stm32f2xx_syscfg.h"
|
||||
#include "stm32f2xx_tim.h"
|
||||
#include "stm32f2xx_usart.h"
|
||||
#include "stm32f2xx_wwdg.h"
|
||||
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* If an external clock source is used, then the value of the following define
|
||||
should be set to the value of the external clock source, else, if no external
|
||||
clock is used, keep this define commented */
|
||||
/*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
|
||||
|
||||
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F2xx_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,388 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>RT-Thread STM32</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F207VG</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x2001FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile>"STARTUP\ST\STM32F2xx\startup_stm32f2xx.s" ("STM32F2xx Startup Code")</StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F2xx_1024 -FS08000000 -FL0100000)</FlashDriverDll>
|
||||
<DeviceId>5118</DeviceId>
|
||||
<RegisterFile>stm32f2xx.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>SFD\ST\STM32F2xx\STM32F2xx.sfr</SFDFile>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath>ST\STM32F2xx\</RegisterFilePath>
|
||||
<DBRegisterFilePath>ST\STM32F2xx\</DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\obj\</OutputDirectory>
|
||||
<OutputName>rtthread-stm32</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-MPU</SimDllArguments>
|
||||
<SimDlgDll>DARMSTM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pSTM32F207VG</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TARMSTM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pSTM32F207VG</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>0</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>7</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
|
||||
<PeripheralDll></PeripheralDll>
|
||||
<PeripheralDllArguments></PeripheralDllArguments>
|
||||
<InitializationFile></InitializationFile>
|
||||
<Driver>Segger\JL2CM3.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4099</DriverSelection>
|
||||
</Flash1>
|
||||
<Flash2>Segger\JL2CM3.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x8000000</StartAddress>
|
||||
<Size>0x100000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x20000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<ScatterFile></ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
||||
|
|
@ -0,0 +1,195 @@
|
|||
/*
|
||||
* File : usart.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard the first version
|
||||
* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
|
||||
*/
|
||||
|
||||
#include "usart.h"
|
||||
#include <serial.h>
|
||||
#include <stm32f2xx.h>
|
||||
#include <stm32f2xx_dma.h>
|
||||
|
||||
/*
|
||||
* Use UART1 as console output and finsh input
|
||||
* interrupt Rx and poll Tx (stream mode)
|
||||
*
|
||||
* Use UART2 with interrupt Rx and poll Tx
|
||||
* Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
|
||||
*
|
||||
* USART DMA setting on STM32
|
||||
* USART1 Tx --> DMA Channel 4
|
||||
* USART1 Rx --> DMA Channel 5
|
||||
* USART2 Tx --> DMA Channel 7
|
||||
* USART2 Rx --> DMA Channel 6
|
||||
* USART3 Tx --> DMA Channel 2
|
||||
* USART3 Rx --> DMA Channel 3
|
||||
*/
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
struct stm32_serial_int_rx uart1_int_rx;
|
||||
struct stm32_serial_device uart1 =
|
||||
{
|
||||
USART1,
|
||||
&uart1_int_rx,
|
||||
RT_NULL
|
||||
};
|
||||
struct rt_device uart1_device;
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART2
|
||||
struct stm32_serial_int_rx uart2_int_rx;
|
||||
struct stm32_serial_device uart2 =
|
||||
{
|
||||
USART2,
|
||||
&uart2_int_rx,
|
||||
RT_NULL
|
||||
};
|
||||
struct rt_device uart2_device;
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART3
|
||||
struct stm32_serial_int_rx uart3_int_rx;
|
||||
struct stm32_serial_dma_tx uart3_dma_tx;
|
||||
struct stm32_serial_device uart3 =
|
||||
{
|
||||
USART3,
|
||||
&uart3_int_rx,
|
||||
&uart3_dma_tx
|
||||
};
|
||||
struct rt_device uart3_device;
|
||||
#endif
|
||||
|
||||
#define USART1_DR_Base 0x40013804
|
||||
#define USART2_DR_Base 0x40004404
|
||||
#define USART3_DR_Base 0x40004804
|
||||
|
||||
/* USART1_REMAP = 0 */
|
||||
#define UART1_GPIO_TX GPIO_Pin_9
|
||||
#define UART1_GPIO_RX GPIO_Pin_10
|
||||
#define UART1_GPIO GPIOA
|
||||
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
|
||||
#define UART1_TX_DMA DMA1_Channel4
|
||||
#define UART1_RX_DMA DMA1_Channel5
|
||||
|
||||
#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
|
||||
#define UART2_GPIO_TX GPIO_Pin_5
|
||||
#define UART2_GPIO_RX GPIO_Pin_6
|
||||
#define UART2_GPIO GPIOD
|
||||
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
|
||||
#else /* for STM32F10X_HD */
|
||||
/* USART2_REMAP = 0 */
|
||||
#define UART2_GPIO_TX GPIO_Pin_2
|
||||
#define UART2_GPIO_RX GPIO_Pin_3
|
||||
#define UART2_GPIO GPIOA
|
||||
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
|
||||
#define UART2_TX_DMA DMA1_Channel7
|
||||
#define UART2_RX_DMA DMA1_Channel6
|
||||
#endif
|
||||
|
||||
/* USART3_REMAP[1:0] = 00 */
|
||||
#define UART3_GPIO_RX GPIO_Pin_11
|
||||
#define UART3_GPIO_TX GPIO_Pin_10
|
||||
#define UART3_GPIO GPIOB
|
||||
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
|
||||
#define UART3_TX_DMA DMA1_Channel2
|
||||
#define UART3_RX_DMA DMA1_Channel3
|
||||
|
||||
static void RCC_Configuration(void)
|
||||
{
|
||||
#ifdef RT_USING_UART1
|
||||
/* Enable USART1 and GPIOA clocks */
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void GPIO_Configuration(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
|
||||
GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
|
||||
GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
|
||||
GPIO_InitStruct.GPIO_PuPd=GPIO_PuPd_UP;
|
||||
|
||||
GPIO_InitStruct.GPIO_Pin=GPIO_Pin_9|GPIO_Pin_10;
|
||||
GPIO_Init(GPIOA,&GPIO_InitStruct);
|
||||
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(void)
|
||||
{
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
/* Enable the USART1 Interrupt */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Init all related hardware in here
|
||||
* rt_hw_serial_init() will register all supported USART device
|
||||
*/
|
||||
void rt_hw_usart_init()
|
||||
{
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
|
||||
RCC_Configuration();
|
||||
|
||||
GPIO_Configuration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
/* uart init */
|
||||
#ifdef RT_USING_UART1
|
||||
USART_DeInit(USART1);
|
||||
USART_InitStructure.USART_BaudRate = 115200;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No ;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
|
||||
USART_Init(USART1, &USART_InitStructure);
|
||||
|
||||
/* register uart1 */
|
||||
rt_hw_serial_register(&uart1_device, "uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
||||
&uart1);
|
||||
|
||||
/* enable interrupt */
|
||||
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
|
||||
/* Enable USART1 */
|
||||
USART_Cmd(USART1, ENABLE);
|
||||
USART_ClearFlag(USART1,USART_FLAG_TXE);
|
||||
#endif
|
||||
}
|
||||
|
||||
void USART1_IRQHandler()
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_serial_isr(&uart1_device);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
/*
|
||||
* File : usart.h
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2009, RT-Thread Development Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rt-thread.org/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2009-01-05 Bernard the first version
|
||||
*/
|
||||
|
||||
#ifndef __USART_H__
|
||||
#define __USART_H__
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
void rt_hw_usart_init(void);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue