Merge remote-tracking branch 'upstream/master'
This commit is contained in:
Bernard Xiong
commit
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/*
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* File : gpio.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2015-01-05 Bernard the first version
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*/
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#include <rthw.h>
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#include <rtdevice.h>
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#include <board.h>
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#ifdef RT_USING_PIN
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/* STM32 GPIO driver */
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struct pin_index
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{
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int index;
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uint32_t rcc;
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GPIO_TypeDef *gpio;
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uint32_t pin;
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};
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static const struct pin_index pins[] =
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{
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{ 0, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_7},
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{ 1, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_6},
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{ 2, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_8},
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{ 3, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_11},
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{ 4, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_14},
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{ 5, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_13},
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{ 6, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_11},
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{ 7, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_9},
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{ 8, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_12},
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{ 9, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_13},
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{10, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_14},
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{11, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_15},
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{12, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_6},
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{13, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_5},
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{14, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_8},
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{15, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_9},
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{16, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_5},
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{17, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_6},
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{18, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_6},
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{19, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_7},
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{20, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_9},
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{21, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_8},
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{22, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_12},
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{23, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_2},
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{24, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_1},
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{25, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_0},
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{26, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_9},
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{27, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_13},
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{28, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_15},
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{29, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_12},
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{30, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_10},
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{31, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_8},
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{32, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_7},
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{33, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_4},
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{34, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_3},
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{35, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_2},
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{36, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_1},
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{37, RCC_AHB1Periph_GPIOE, GPIOE, GPIO_Pin_0},
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{38, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_11},
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{39, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_10},
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{40, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_7},
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{41, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_3},
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{42, RCC_AHB1Periph_GPIOD, GPIOD, GPIO_Pin_4},
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{43, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_8},
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{44, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_15},
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{45, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_14},
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{46, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_11},
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{47, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_5},
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{48, RCC_AHB1Periph_GPIOC, GPIOC, GPIO_Pin_10},
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{49, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_15},
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{50, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_4},
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{51, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_7},
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{52, RCC_AHB1Periph_GPIOB, GPIOB, GPIO_Pin_3},
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{53, RCC_AHB1Periph_GPIOA, GPIOA, GPIO_Pin_4},
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};
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#define ITEM_NUM(items) sizeof(items)/sizeof(items[0])
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const struct pin_index * get_pin(uint8_t pin)
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{
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const struct pin_index* index;
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if(pin < ITEM_NUM(pins))
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{
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index = &pins[pin];
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}
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else
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{
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index = RT_NULL;
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}
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return index;
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};
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void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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const struct pin_index *index;
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index = get_pin(pin);
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if(index == RT_NULL)
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{
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return;
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}
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if(value == PIN_LOW)
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{
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GPIO_ResetBits(index->gpio, index->pin);
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}
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else
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{
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GPIO_SetBits(index->gpio, index->pin);
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}
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}
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int stm32_pin_read(rt_device_t dev, rt_base_t pin)
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{
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int value;
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const struct pin_index *index;
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value = PIN_LOW;
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index = get_pin(pin);
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if(index == RT_NULL)
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{
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return value;
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}
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if(GPIO_ReadInputDataBit(index->gpio, index->pin) == Bit_RESET)
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{
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value = PIN_LOW;
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}
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else
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{
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value = PIN_HIGH;
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}
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return value;
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}
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void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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const struct pin_index *index;
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GPIO_InitTypeDef GPIO_InitStructure;
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index = get_pin(pin);
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if(index == RT_NULL)
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{
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return;
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}
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/* GPIO Periph clock enable */
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RCC_AHB1PeriphClockCmd(index->rcc, ENABLE);
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/* Configure GPIO_InitStructure */
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GPIO_InitStructure.GPIO_Pin = index->pin;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
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if(mode == PIN_MODE_OUTPUT)
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{
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/* output setting */
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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}
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else if(mode == PIN_MODE_INPUT)
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{
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/* input setting: not pull. */
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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}
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else if(mode == PIN_MODE_INPUT_PULLUP)
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{
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/* input setting: pull up. */
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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}
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else
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{
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/* input setting:default. */
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
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}
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GPIO_Init(index->gpio, &GPIO_InitStructure);
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}
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const static struct rt_pin_ops _stm32_pin_ops =
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{
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stm32_pin_mode,
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stm32_pin_write,
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stm32_pin_read,
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};
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int stm32_hw_pin_init(void)
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{
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rt_device_pin_register("pin", &_stm32_pin_ops, RT_NULL);
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return 0;
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}
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INIT_BOARD_EXPORT(stm32_hw_pin_init);
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#endif
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@ -0,0 +1,19 @@
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/*
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* File : gpio.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2015, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2015-01-05 Bernard the first version
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*/
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#ifndef GPIO_H__
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#define GPIO_H__
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int stm32_hw_pin_init(void);
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#endif
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