Merge pull request #369 from BernardXiong/master

[BSP] Add GCC compiler support for mb9bf568r
This commit is contained in:
Bernard Xiong 2014-11-03 13:46:27 +08:00
commit 00197fde12
9 changed files with 548 additions and 1480 deletions

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@ -0,0 +1,288 @@
/**************************************************************************//**
* @file startup_<Device>.s
* @brief CMSIS Cortex-M# Core Device Startup File for
* Device <Device>
* @version V3.01
* @date 06. March 2012
*
* @note Version CodeSourcery Sourcery G++ Lite (with CS3)
* Copyright (C) 2012 ARM Limited. All rights reserved.
*
* @par
* ARM Limited (ARM) is supplying this software for use with Cortex-M
* processor based microcontrollers. This file can be freely distributed
* within development tools that are supporting such ARM based processors.
*
* @par
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
******************************************************************************/
/*
//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
*/
/*
// <h> Stack Configuration
// <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
// </h>
*/
.equ Stack_Size, 0x00000400
.section ".stack", "w"
.align 3
.globl __cs3_stack_mem
.globl __cs3_stack_size
__cs3_stack_mem:
.if Stack_Size
.space Stack_Size
.endif
.size __cs3_stack_mem, . - __cs3_stack_mem
.set __cs3_stack_size, . - __cs3_stack_mem
/*
// <h> Heap Configuration
// <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
// </h>
*/
.equ Heap_Size, 0x00000100
.section ".heap", "w"
.align 3
.globl __cs3_heap_start
.globl __cs3_heap_end
__cs3_heap_start:
.if Heap_Size
.space Heap_Size
.endif
__cs3_heap_end:
/* Vector Table */
.section ".cs3.interrupt_vector"
.globl __cs3_interrupt_vector_cortex_m
.type __cs3_interrupt_vector_cortex_m, %object
__cs3_interrupt_vector_cortex_m:
.long __cs3_stack /* Top of Stack */
.long __cs3_reset /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External Interrupts */
/* ToDo: Add here the vectors for the device specific external interrupts handler */
.long CSV_Handler /* 0: Clock Super Visor */
.long SWDT_Handler /* 1: Software Watchdog Timer */
.long LVD_Handler /* 2: Low Voltage Detector */
.long MFT_WG_IRQHandler /* 3: Wave Form Generator / DTIF */
.long INT0_7_Handler /* 4: External Interrupt Request ch.0 to ch.7 */
.long INT8_15_Handler /* 5: External Interrupt Request ch.8 to ch.15 */
.long DT_Handler /* 6: Dual Timer / Quad Decoder */
.long MFS0RX_IRQHandler /* 7: MultiFunction Serial ch.0 */
.long MFS0TX_IRQHandler /* 8: MultiFunction Serial ch.0 */
.long MFS1RX_IRQHandler /* 9: MultiFunction Serial ch.1 */
.long MFS1TX_IRQHandler /* 10: MultiFunction Serial ch.1 */
.long MFS2RX_IRQHandler /* 11: MultiFunction Serial ch.2 */
.long MFS2TX_IRQHandler /* 12: MultiFunction Serial ch.2 */
.long MFS3RX_IRQHandler /* 13: MultiFunction Serial ch.3 */
.long MFS3TX_IRQHandler /* 14: MultiFunction Serial ch.3 */
.long MFS4RX_IRQHandler /* 15: MultiFunction Serial ch.4 */
.long MFS4TX_IRQHandler /* 16: MultiFunction Serial ch.4 */
.long MFS5RX_IRQHandler /* 17: MultiFunction Serial ch.5 */
.long MFS5TX_IRQHandler /* 18: MultiFunction Serial ch.5 */
.long MFS6RX_IRQHandler /* 19: MultiFunction Serial ch.6 */
.long MFS6TX_IRQHandler /* 20: MultiFunction Serial ch.6 */
.long MFS7RX_IRQHandler /* 21: MultiFunction Serial ch.7 */
.long MFS7TX_IRQHandler /* 22: MultiFunction Serial ch.7 */
.long PPG_Handler /* 23: PPG */
.long TIM_IRQHandler /* 24: OSC / PLL / Watch Counter */
.long ADC0_IRQHandler /* 25: ADC0 */
.long ADC1_IRQHandler /* 26: ADC1 */
.long ADC2_IRQHandler /* 27: ADC2 */
.long MFT_FRT_IRQHandler /* 28: Free-run Timer */
.long MFT_IPC_IRQHandler /* 29: Input Capture */
.long MFT_OPC_IRQHandler /* 30: Output Compare */
.long BT_IRQHandler /* 31: Base Timer ch.0 to ch.7 */
.long CAN0_IRQHandler /* 32: CAN ch.0 */
.long CAN1_IRQHandler /* 33: CAN ch.1 */
.long USBF_Handler /* 34: USB Function */
.long USB_Handler /* 35: USB Function / USB HOST */
.long RESERVED_1_IRQHandler /* 36: Reserved */
.long RESERVED_2_IRQHandler /* 37: Reserved */
.long DMAC0_Handler /* 38: DMAC ch.0 */
.long DMAC1_Handler /* 39: DMAC ch.1 */
.long DMAC2_Handler /* 40: DMAC ch.2 */
.long DMAC3_Handler /* 41: DMAC ch.3 */
.long DMAC4_Handler /* 42: DMAC ch.4 */
.long DMAC5_Handler /* 43: DMAC ch.5 */
.long DMAC6_Handler /* 44: DMAC ch.6 */
.long DMAC7_Handler /* 45: DMAC ch.7 */
.long RESERVED_3_IRQHandler /* 46: Reserved */
.long RESERVED_4_IRQHandler /* 47: Reserved */
.size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m
.thumb
/* Reset Handler */
.section .cs3.reset,"x",%progbits
.thumb_func
.globl __cs3_reset_cortex_m
.type __cs3_reset_cortex_m, %function
__cs3_reset_cortex_m:
.fnstart
LDR R0, =SystemInit
BLX R0
LDR R0,=_start
BX R0
.pool
.cantunwind
.fnend
.size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m
.section ".text"
/* Exception Handlers */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
B .
.size NMI_Handler, . - NMI_Handler
.weak HardFault_Handler
.type HardFault_Handler, %function
HardFault_Handler:
B .
.size HardFault_Handler, . - HardFault_Handler
.weak MemManage_Handler
.type MemManage_Handler, %function
MemManage_Handler:
B .
.size MemManage_Handler, . - MemManage_Handler
.weak BusFault_Handler
.type BusFault_Handler, %function
BusFault_Handler:
B .
.size BusFault_Handler, . - BusFault_Handler
.weak UsageFault_Handler
.type UsageFault_Handler, %function
UsageFault_Handler:
B .
.size UsageFault_Handler, . - UsageFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
B .
.size SVC_Handler, . - SVC_Handler
.weak DebugMon_Handler
.type DebugMon_Handler, %function
DebugMon_Handler:
B .
.size DebugMon_Handler, . - DebugMon_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
B .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
B .
.size SysTick_Handler, . - SysTick_Handler
/* IRQ Handlers */
/* ToDo: Add here the export definition for the device specific external interrupts handler */
/* ToDo: Add here the names for the device specific external interrupts handler */
.globl Default_Handler
.type Default_Handler, %function
Default_Handler:
B .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ CSV_Handler /* 0: Clock Super Visor */
IRQ SWDT_Handler /* 1: Software Watchdog Timer */
IRQ LVD_Handler /* 2: Low Voltage Detector */
IRQ MFT_WG_IRQHandler /* 3: Wave Form Generator / DTIF */
IRQ INT0_7_Handler /* 4: External Interrupt Request ch.0 to ch.7 */
IRQ INT8_15_Handler /* 5: External Interrupt Request ch.8 to ch.15 */
IRQ DT_Handler /* 6: Dual Timer / Quad Decoder */
IRQ MFS0RX_IRQHandler /* 7: MultiFunction Serial ch.0 */
IRQ MFS0TX_IRQHandler /* 8: MultiFunction Serial ch.0 */
IRQ MFS1RX_IRQHandler /* 9: MultiFunction Serial ch.1 */
IRQ MFS1TX_IRQHandler /* 10: MultiFunction Serial ch.1 */
IRQ MFS2RX_IRQHandler /* 11: MultiFunction Serial ch.2 */
IRQ MFS2TX_IRQHandler /* 12: MultiFunction Serial ch.2 */
IRQ MFS3RX_IRQHandler /* 13: MultiFunction Serial ch.3 */
IRQ MFS3TX_IRQHandler /* 14: MultiFunction Serial ch.3 */
IRQ MFS4RX_IRQHandler /* 15: MultiFunction Serial ch.4 */
IRQ MFS4TX_IRQHandler /* 16: MultiFunction Serial ch.4 */
IRQ MFS5RX_IRQHandler /* 17: MultiFunction Serial ch.5 */
IRQ MFS5TX_IRQHandler /* 18: MultiFunction Serial ch.5 */
IRQ MFS6RX_IRQHandler /* 19: MultiFunction Serial ch.6 */
IRQ MFS6TX_IRQHandler /* 20: MultiFunction Serial ch.6 */
IRQ MFS7RX_IRQHandler /* 21: MultiFunction Serial ch.7 */
IRQ MFS7TX_IRQHandler /* 22: MultiFunction Serial ch.7 */
IRQ PPG_Handler /* 23: PPG */
IRQ TIM_IRQHandler /* 24: OSC / PLL / Watch Counter */
IRQ ADC0_IRQHandler /* 25: ADC0 */
IRQ ADC1_IRQHandler /* 26: ADC1 */
IRQ ADC2_IRQHandler /* 27: ADC2 */
IRQ MFT_FRT_IRQHandler /* 28: Free-run Timer */
IRQ MFT_IPC_IRQHandler /* 29: Input Capture */
IRQ MFT_OPC_IRQHandler /* 30: Output Compare */
IRQ BT_IRQHandler /* 31: Base Timer ch.0 to ch.7 */
IRQ CAN0_IRQHandler /* 32: CAN ch.0 */
IRQ CAN1_IRQHandler /* 33: CAN ch.1 */
IRQ USBF_Handler /* 34: USB Function */
IRQ USB_Handler /* 35: USB Function / USB HOST */
IRQ RESERVED_1_IRQHandler /* 36: Reserved */
IRQ RESERVED_2_IRQHandler /* 37: Reserved */
IRQ DMAC0_Handler /* 38: DMAC ch.0 */
IRQ DMAC1_Handler /* 39: DMAC ch.1 */
IRQ DMAC2_Handler /* 40: DMAC ch.2 */
IRQ DMAC3_Handler /* 41: DMAC ch.3 */
IRQ DMAC4_Handler /* 42: DMAC ch.4 */
IRQ DMAC5_Handler /* 43: DMAC ch.5 */
IRQ DMAC6_Handler /* 44: DMAC ch.6 */
IRQ DMAC7_Handler /* 45: DMAC ch.7 */
IRQ RESERVED_3_IRQHandler /* 46: Reserved */
IRQ RESERVED_4_IRQHandler /* 47: Reserved */
.end

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@ -9,9 +9,10 @@ CPPPATH = [cwd + '/Include', cwd + '/DeviceSupport']
# add for startup script # add for startup script
if rtconfig.CROSS_TOOL == 'keil': if rtconfig.CROSS_TOOL == 'keil':
src += ['DeviceSupport/startup_mb9bf56xr.s'] src += ['DeviceSupport/arm/startup_mb9bf56xr.s']
if rtconfig.CROSS_TOOL == 'gcc':
src += ['DeviceSupport/gcc/startup_mb9bf56xr.S']
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH) group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH)

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@ -10,11 +10,12 @@ else:
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import * from building import *
TARGET = 'rtthread-stm32f4xx.' + rtconfig.TARGET_EXT TARGET = 'rtthread-fm4.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'], env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc', AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH) env.PrependENVPath('PATH', rtconfig.EXEC_PATH)

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@ -1,844 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rtthread-fm4</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>4000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>255</CpuCode>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDllName>DCM.DLL</SimDlgDllName>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDllName>TCM.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOpt>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>14</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"CMSIS-DAP" -U -O175 -S0 -C0 -P00 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(0) -FO15 -FD20000000 -FC8000 -FN2 -FF0MB9B560_1024 -FS00 -FL0100000 -FF1MB9B560_WORK32 -FS1200C0000 -FL18000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
<Group>
<GroupName>Applications</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>applications\application.c</PathWithFileName>
<FilenameWithoutPath>application.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>2</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>applications\demo.c</PathWithFileName>
<FilenameWithoutPath>demo.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>3</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>applications\startup.c</PathWithFileName>
<FilenameWithoutPath>startup.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>4</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>CMSIS\DeviceSupport\system_mb9abxxx.c</PathWithFileName>
<FilenameWithoutPath>system_mb9abxxx.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>2</GroupNumber>
<FileNumber>5</FileNumber>
<FileType>2</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>CMSIS\DeviceSupport\startup_mb9bf56xr.s</PathWithFileName>
<FilenameWithoutPath>startup_mb9bf56xr.s</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>6</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>drivers\board.c</PathWithFileName>
<FilenameWithoutPath>board.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>7</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>29</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>drivers\led.c</PathWithFileName>
<FilenameWithoutPath>led.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>3</GroupNumber>
<FileNumber>8</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>drivers\serial.c</PathWithFileName>
<FilenameWithoutPath>serial.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>0</RteFlg>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>9</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>E:/work/xiaoyang/rt-thread/src\clock.c</PathWithFileName>
<FilenameWithoutPath>clock.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>10</FileNumber>
<FileType>1</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>0</TopLine>
<CurrentLine>0</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>E:/work/xiaoyang/rt-thread/src\device.c</PathWithFileName>
<FilenameWithoutPath>device.c</FilenameWithoutPath>
<RteFlg>0</RteFlg>
<bShared>0</bShared>
</File>
<File>
<GroupNumber>4</GroupNumber>
<FileNumber>11</FileNumber>
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<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>0</AdsALst>
<AdsACrf>0</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>0</AdsLcgr>
<AdsLsym>0</AdsLsym>
<AdsLszi>0</AdsLszi>
<AdsLtoi>0</AdsLtoi>
<AdsLsun>0</AdsLsun>
<AdsLven>0</AdsLven>
<AdsLsxf>0</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>0</hadIROM>
<hadIRAM>0</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>1</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>5</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>1</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>1</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IRAM>
<IROM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x100000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x200c0000</StartAddress>
<Size>0x8000</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x1fff0000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x20038000</StartAddress>
<Size>0x10000</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>applications;.;CMSIS\Include;CMSIS\DeviceSupport;drivers;E:/work/xiaoyang/rt-thread/include;E:/work/xiaoyang/rt-thread/libcpu/arm/cortex-m4;E:/work/xiaoyang/rt-thread/libcpu/arm/common;E:/work/xiaoyang/rt-thread/components/finsh;E:/work/xiaoyang/rt-thread/components/init</IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>1</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x00000000</DataAddressRange>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc> --keep __fsym_* --keep __vsym_* --keep __rt_init* </Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
<Group>
<GroupName>Applications</GroupName>
<Files>
<File>
<FileName>application.c</FileName>
<FileType>1</FileType>
<FilePath>applications\application.c</FilePath>
</File>
<File>
<FileName>demo.c</FileName>
<FileType>1</FileType>
<FilePath>applications\demo.c</FilePath>
</File>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
<FilePath>applications\startup.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>CMSIS</GroupName>
<Files>
<File>
<FileName>system_mb9abxxx.c</FileName>
<FileType>1</FileType>
<FilePath>CMSIS\DeviceSupport\system_mb9abxxx.c</FilePath>
</File>
<File>
<FileName>startup_mb9bf56xr.s</FileName>
<FileType>2</FileType>
<FilePath>CMSIS\DeviceSupport\startup_mb9bf56xr.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Drivers</GroupName>
<Files>
<File>
<FileName>board.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\board.c</FilePath>
</File>
<File>
<FileName>led.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\led.c</FilePath>
</File>
<File>
<FileName>serial.c</FileName>
<FileType>1</FileType>
<FilePath>drivers\serial.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Kernel</GroupName>
<Files>
<File>
<FileName>clock.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\clock.c</FilePath>
</File>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\device.c</FilePath>
</File>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\idle.c</FilePath>
</File>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\ipc.c</FilePath>
</File>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\irq.c</FilePath>
</File>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\kservice.c</FilePath>
</File>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\mem.c</FilePath>
</File>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\mempool.c</FilePath>
</File>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\object.c</FilePath>
</File>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\scheduler.c</FilePath>
</File>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\thread.c</FilePath>
</File>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/src\timer.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>CORTEX-M4</GroupName>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/libcpu/arm/cortex-m4\cpuport.c</FilePath>
</File>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/libcpu/arm/cortex-m4\context_rvds.S</FilePath>
</File>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/libcpu/arm/common\backtrace.c</FilePath>
</File>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/libcpu/arm/common\div0.c</FilePath>
</File>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/libcpu/arm/common\showmem.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>finsh</GroupName>
<Files>
<File>
<FileName>shell.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\shell.c</FilePath>
</File>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\symbol.c</FilePath>
</File>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\cmd.c</FilePath>
</File>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_compiler.c</FilePath>
</File>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_error.c</FilePath>
</File>
<File>
<FileName>finsh_heap.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_heap.c</FilePath>
</File>
<File>
<FileName>finsh_init.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_init.c</FilePath>
</File>
<File>
<FileName>finsh_node.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_node.c</FilePath>
</File>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_ops.c</FilePath>
</File>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_parser.c</FilePath>
</File>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_var.c</FilePath>
</File>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_vm.c</FilePath>
</File>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/finsh\finsh_token.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>Components</GroupName>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>E:/work/xiaoyang/rt-thread/components/init\components.c</FilePath>
</File>
</Files>
</Group>
</Groups>
</Target>
</Targets>
</Project>

View File

@ -4,17 +4,17 @@ import os
ARCH='arm' ARCH='arm'
CPU='cortex-m4' CPU='cortex-m4'
CROSS_TOOL='keil' CROSS_TOOL='keil'
BOARD_NAME = 'lpc408x' BOARD_NAME = 'mb9bf568r'
if os.getenv('RTT_CC'): if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC') CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc': if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc' PLATFORM = 'gcc'
EXEC_PATH = r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin' EXEC_PATH = r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
elif CROSS_TOOL == 'keil': elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc' PLATFORM = 'armcc'
EXEC_PATH = 'D:/Keil' EXEC_PATH = 'D:/Keil'
elif CROSS_TOOL == 'iar': elif CROSS_TOOL == 'iar':
print '================ERROR============================' print '================ERROR============================'
print 'Not support iar yet!' print 'Not support iar yet!'
@ -22,7 +22,7 @@ elif CROSS_TOOL == 'iar':
exit(0) exit(0)
if os.getenv('RTT_EXEC_PATH'): if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH') EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug' BUILD = 'debug'
@ -30,9 +30,10 @@ if PLATFORM == 'gcc':
# toolchains # toolchains
PREFIX = 'arm-none-eabi-' PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc' CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc' AS = PREFIX + 'gcc'
AR = PREFIX + 'ar' AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc' LINK = PREFIX + 'g++'
TARGET_EXT = 'elf' TARGET_EXT = 'elf'
SIZE = PREFIX + 'size' SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump' OBJDUMP = PREFIX + 'objdump'
@ -51,6 +52,7 @@ if PLATFORM == 'gcc':
AFLAGS += ' -gdwarf-2' AFLAGS += ' -gdwarf-2'
else: else:
CFLAGS += ' -O2' CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

View File

@ -0,0 +1,222 @@
/* Linker script to configure memory regions
*
* Version:CodeSourcery Sourcery G++ Lite 2007q3-53
* BugURL:https://support.codesourcery.com/GNUToolchain/
*
* Copyright 2007 CodeSourcery.
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply. */
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
ENTRY(_start)
SEARCH_DIR(.)
GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro)
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000 /* 1024k */
ram (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000 /* 64k */
}
/* These force the linker to search for particular symbols from
* the start of the link process and thus ensure the user's
* overrides are picked up
*/
EXTERN(__cs3_reset_cortex_m)
EXTERN(__cs3_interrupt_vector_cortex_m)
EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end)
PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end);
PROVIDE(__cs3_heap_start = _end);
PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
SECTIONS
{
.text :
{
CREATE_OBJECT_SYMBOLS
__cs3_region_start_rom = .;
*(.cs3.region-head.rom)
__cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m;
*(.cs3.interrupt_vector)
/* Make sure we pulled in an interrupt vector. */
ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector");
*(.rom)
*(.rom.b)
__cs3_reset = __cs3_reset_cortex_m;
*(.cs3.reset)
/* Make sure we pulled in some reset code. */
ASSERT (. != __cs3_reset, "No reset code");
*(.text .text.* .gnu.linkonce.t.*)
*(.plt)
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
*(.rodata .rodata.* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
*(.gcc_except_table)
*(.eh_frame_hdr)
*(.eh_frame)
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
__cs3_regions = .;
LONG (0)
LONG (__cs3_region_init_ram)
LONG (__cs3_region_start_ram)
LONG (__cs3_region_init_size_ram)
LONG (__cs3_region_zero_size_ram)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
}
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} >rom
__exidx_end = .;
.text.align :
{
. = ALIGN(8);
_etext = .;
} >rom
__cs3_region_size_rom = LENGTH(rom);
__cs3_region_num = 1;
.data :
{
__cs3_region_start_ram = .;
*(.cs3.region-head.ram)
KEEP(*(.jcr))
*(.got.plt) *(.got)
*(.shdata)
*(.data .data.* .gnu.linkonce.d.*)
*(.ram)
. = ALIGN (8);
_edata = .;
} >ram AT>rom
.bss :
{
*(.shbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
*(.ram.b)
. = ALIGN (8);
_end = .;
__end = .;
} >ram AT>rom
.heap :
{
*(.heap)
} >ram
__bss_end = .;
.stack (__cs3_stack - __cs3_stack_size) :
{
*(.stack)
} >ram
__cs3_region_init_ram = LOADADDR (.data);
__cs3_region_init_size_ram = _edata - __cs3_region_start_ram;
__cs3_region_zero_size_ram = _end - _edata;
__cs3_region_size_ram = LENGTH(ram);
__cs3_region_num = 1;
.stab 0 (NOLOAD) : { *(.stab) }
.stabstr 0 (NOLOAD) : { *(.stabstr) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
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/* SGI/MIPS DWARF 2 extensions */
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}

View File

@ -0,0 +1,23 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00100000 { ; load region size_region
ER_IROM1 0x00000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x1FFF0000 0x00010000 { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 0x20038000 0x00010000 {
.ANY (+RW +ZI)
}
}
LR_IROM2 0x200C0000 0x00008000 {
ER_IROM2 0x200C0000 0x00008000 { ; load address = execution address
.ANY (+RO)
}
}