2018-12-24 17:17:27 +08:00
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/*
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* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-05-31 ZYH first version
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* 2018-12-10 Zohar_Lee format file
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2021-09-30 17:55:16 +08:00
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* 2020-07-10 lik format file
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2018-12-24 17:17:27 +08:00
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*/
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2021-09-30 17:55:16 +08:00
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#include "drv_uart.h"
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2018-12-24 17:17:27 +08:00
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2021-09-30 17:55:16 +08:00
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#ifdef RT_USING_SERIAL
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#ifdef BSP_USING_UART
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//#define DRV_DEBUG
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#define LOG_TAG "drv.uart"
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#include <drv_log.h>
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#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
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!defined(BSP_USING_UART3)
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#error "Please define at least one BSP_USING_UARTx"
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/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
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#endif
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enum
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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#ifdef BSP_USING_UART0
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UART0_INDEX,
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#endif
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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#ifdef BSP_USING_UART2
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UART2_INDEX,
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#endif
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#ifdef BSP_USING_UART3
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UART3_INDEX,
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#endif
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};
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static struct swm_uart_cfg uart_cfg[] =
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{
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#ifdef BSP_USING_UART0
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UART0_CFG,
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#endif
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#ifdef BSP_USING_UART1
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UART1_CFG,
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#endif
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#ifdef BSP_USING_UART2
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UART2_CFG,
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#endif
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#ifdef BSP_USING_UART3
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UART3_CFG,
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#endif
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2018-12-24 17:17:27 +08:00
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};
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2021-09-30 17:55:16 +08:00
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static struct swm_uart uart_drv[sizeof(uart_cfg) / sizeof(uart_cfg[0])] = {0};
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static rt_err_t swm_uart_init(struct rt_serial_device *serial_device, struct serial_configure *configure)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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struct swm_uart_cfg *cfg;
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RT_ASSERT(serial_device != RT_NULL);
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RT_ASSERT(configure != RT_NULL);
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cfg = serial_device->parent.user_data;
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cfg->uart_initstruct.Baudrate = configure->baud_rate;
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switch (configure->data_bits)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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case DATA_BITS_8:
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cfg->uart_initstruct.DataBits = UART_DATA_8BIT;
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break;
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2018-12-24 17:17:27 +08:00
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case DATA_BITS_9:
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2021-09-30 17:55:16 +08:00
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cfg->uart_initstruct.DataBits = UART_DATA_9BIT;
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2018-12-24 17:17:27 +08:00
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break;
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default:
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2021-09-30 17:55:16 +08:00
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cfg->uart_initstruct.DataBits = UART_DATA_8BIT;
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2018-12-24 17:17:27 +08:00
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break;
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}
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2021-09-30 17:55:16 +08:00
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switch (configure->stop_bits)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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case STOP_BITS_1:
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cfg->uart_initstruct.StopBits = UART_STOP_1BIT;
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break;
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2018-12-24 17:17:27 +08:00
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case STOP_BITS_2:
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2021-09-30 17:55:16 +08:00
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cfg->uart_initstruct.StopBits = UART_STOP_2BIT;
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2018-12-24 17:17:27 +08:00
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break;
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default:
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2021-09-30 17:55:16 +08:00
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cfg->uart_initstruct.StopBits = UART_STOP_1BIT;
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2018-12-24 17:17:27 +08:00
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break;
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}
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2021-09-30 17:55:16 +08:00
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switch (configure->parity)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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case PARITY_NONE:
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cfg->uart_initstruct.Parity = UART_PARITY_NONE;
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break;
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2018-12-24 17:17:27 +08:00
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case PARITY_ODD:
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cfg->uart_initstruct.Parity = UART_PARITY_ODD;
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2018-12-24 17:17:27 +08:00
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break;
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case PARITY_EVEN:
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2021-09-30 17:55:16 +08:00
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cfg->uart_initstruct.Parity = UART_PARITY_EVEN;
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break;
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default:
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cfg->uart_initstruct.Parity = UART_PARITY_NONE;
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break;
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}
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switch ((uint32_t)cfg->UARTx)
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{
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case ((uint32_t)UART0):
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PORT_Init(PORTA, PIN2, FUNMUX0_UART0_RXD, 1);
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PORT_Init(PORTA, PIN3, FUNMUX1_UART0_TXD, 0);
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break;
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case ((uint32_t)UART1):
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PORT_Init(PORTC, PIN2, FUNMUX0_UART1_RXD, 1);
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PORT_Init(PORTC, PIN3, FUNMUX1_UART1_TXD, 0);
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break;
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case ((uint32_t)UART2):
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PORT_Init(PORTC, PIN4, FUNMUX0_UART2_RXD, 1);
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PORT_Init(PORTC, PIN5, FUNMUX1_UART2_TXD, 0);
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break;
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case ((uint32_t)UART3):
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PORT_Init(PORTC, PIN6, FUNMUX0_UART3_RXD, 1);
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PORT_Init(PORTC, PIN7, FUNMUX1_UART3_TXD, 0);
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2018-12-24 17:17:27 +08:00
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break;
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default:
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break;
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}
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2021-09-30 17:55:16 +08:00
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UART_Init(cfg->UARTx, &(cfg->uart_initstruct));
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UART_Open(cfg->UARTx);
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2018-12-24 17:17:27 +08:00
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return RT_EOK;
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}
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2021-09-30 17:55:16 +08:00
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static rt_err_t swm_uart_control(struct rt_serial_device *serial_device, int cmd, void *arg)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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struct swm_uart_cfg *cfg;
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RT_ASSERT(serial_device != RT_NULL);
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cfg = serial_device->parent.user_data;
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2018-12-24 17:17:27 +08:00
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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2021-09-30 17:55:16 +08:00
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NVIC_DisableIRQ(cfg->irq);
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2018-12-24 17:17:27 +08:00
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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2021-09-30 17:55:16 +08:00
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NVIC_EnableIRQ(cfg->irq);
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2018-12-24 17:17:27 +08:00
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break;
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}
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return RT_EOK;
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}
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2021-09-30 17:55:16 +08:00
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static int swm_uart_putc(struct rt_serial_device *serial_device, char c)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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struct swm_uart_cfg *cfg;
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RT_ASSERT(serial_device != RT_NULL);
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cfg = serial_device->parent.user_data;
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while (UART_IsTXFIFOFull(cfg->UARTx))
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;
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UART_WriteByte(cfg->UARTx, c);
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while (UART_IsTXBusy(cfg->UARTx))
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;
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2018-12-24 17:17:27 +08:00
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return 1;
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}
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2021-09-30 17:55:16 +08:00
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static int swm_uart_getc(struct rt_serial_device *serial_device)
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2018-12-24 17:17:27 +08:00
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{
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int ch;
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2021-09-30 17:55:16 +08:00
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struct swm_uart_cfg *cfg;
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RT_ASSERT(serial_device != RT_NULL);
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cfg = serial_device->parent.user_data;
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2018-12-24 17:17:27 +08:00
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ch = -1;
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2021-09-30 17:55:16 +08:00
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if (UART_IsRXFIFOEmpty(cfg->UARTx) == 0)
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2018-12-24 17:17:27 +08:00
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{
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UART_ReadByte(cfg->UARTx, (uint32_t *)&ch);
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2018-12-24 17:17:27 +08:00
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}
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return ch;
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}
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2021-09-30 17:55:16 +08:00
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static const struct rt_uart_ops swm_uart_ops =
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{
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.configure = swm_uart_init,
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.control = swm_uart_control,
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.putc = swm_uart_putc,
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.getc = swm_uart_getc,
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.dma_transmit = RT_NULL};
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void rt_hw_uart_isr(struct rt_serial_device *serial_device)
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2018-12-24 17:17:27 +08:00
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{
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2021-09-30 17:55:16 +08:00
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struct swm_uart_cfg *cfg;
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RT_ASSERT(serial_device != RT_NULL);
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cfg = serial_device->parent.user_data;
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/* UART in mode Receiver -------------------------------------------------*/
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if (UART_INTRXThresholdStat(cfg->UARTx) || UART_INTTimeoutStat(cfg->UARTx))
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{
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rt_hw_serial_isr(serial_device, RT_SERIAL_EVENT_RX_IND);
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}
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}
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2018-12-24 17:17:27 +08:00
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#if defined(BSP_USING_UART0)
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void UART0_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2021-09-30 17:55:16 +08:00
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rt_hw_uart_isr(&(uart_drv[UART0_INDEX].serial_device));
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2018-12-24 17:17:27 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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void UART1_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2021-09-30 17:55:16 +08:00
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rt_hw_uart_isr(&(uart_drv[UART1_INDEX].serial_device));
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2018-12-24 17:17:27 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART2)
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void UART2_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2021-09-30 17:55:16 +08:00
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rt_hw_uart_isr(&(uart_drv[UART2_INDEX].serial_device));
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2018-12-24 17:17:27 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART2 */
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#if defined(BSP_USING_UART3)
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void UART3_Handler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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2021-09-30 17:55:16 +08:00
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rt_hw_uart_isr(&(uart_drv[UART3_INDEX].serial_device));
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2018-12-24 17:17:27 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif /* BSP_USING_UART3 */
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int rt_hw_uart_init(void)
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{
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2021-09-30 17:55:16 +08:00
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struct serial_configure cfg = RT_SERIAL_CONFIG_DEFAULT;
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int i = 0;
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rt_err_t result = RT_EOK;
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for (i = 0; i < sizeof(uart_cfg) / sizeof(uart_cfg[0]); i++)
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{
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uart_drv[i].cfg = &uart_cfg[i];
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uart_drv[i].serial_device.ops = &swm_uart_ops;
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uart_drv[i].serial_device.config = cfg;
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/* register UART device */
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result = rt_hw_serial_register(&uart_drv[i].serial_device, uart_drv[i].cfg->name,
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart_drv[i].cfg);
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RT_ASSERT(result == RT_EOK);
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}
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return result;
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2018-12-24 17:17:27 +08:00
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}
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INIT_BOARD_EXPORT(rt_hw_uart_init);
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2021-09-30 17:55:16 +08:00
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#endif /* BSP_USING_UART */
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#endif /* RT_USING_SERIAL */
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