50 lines
1017 B
C
50 lines
1017 B
C
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-10-03 Bernard The first version
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* 2020/11/20 BalanceTWK Add FPU support
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*/
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#ifndef CPUPORT_H__
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#define CPUPORT_H__
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#include <rtconfig.h>
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/* bytes of register width */
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#define STORE sw
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#define LOAD lw
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#define REGBYTES 4
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#ifdef __riscv_flen
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#define ARCH_RISCV_FPU
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#if __riscv_flen == 32
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#define ARCH_RISCV_FPU_S
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#endif
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#if __riscv_flen == 64
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#define ARCH_RISCV_FPU_D
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#endif
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#endif
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#ifdef ARCH_RISCV_FPU
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#ifdef ARCH_RISCV_FPU_D
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#define FSTORE fsd
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#define FLOAD fld
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#define FREGBYTES 8
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#define rv_floatreg_t rt_int64_t
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#endif
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#ifdef ARCH_RISCV_FPU_S
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#define FSTORE fsw
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#define FLOAD flw
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#define FREGBYTES 4
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#define rv_floatreg_t rt_int32_t
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#endif
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#endif
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#endif
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