88 lines
3.5 KiB
C
88 lines
3.5 KiB
C
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/*****************************************************************************
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* Copyright (c) 2019, Nations Technologies Inc.
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*
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* All rights reserved.
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* ****************************************************************************
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Nations' name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ****************************************************************************/
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/**
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* @file drv_spi.h
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* @author Nations
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* @version v1.0.0
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*
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* @copyright Copyright (c) 2019, Nations Technologies Inc. All rights reserved.
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*/
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#ifndef __DRV_SPI_H__
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#define __DRV_SPI_H__
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#include <rthw.h>
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#include <rtthread.h>
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#include <board.h>
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struct n32_spi_cs
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{
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GPIO_Module* GPIOx;
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uint32_t GPIO_Pin;
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};
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#ifdef BSP_USING_SPI1
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#define SPI1_SCK_PIN GPIO_PIN_5 /* PA.05 */
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#define SPI1_SCK_GPIO_PORT GPIOA /* GPIOA */
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#define SPI1_SCK_GPIO_CLK RCC_APB2_PERIPH_GPIOA
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#define SPI1_MISO_PIN GPIO_PIN_6 /* PA.06 */
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#define SPI1_MISO_GPIO_PORT GPIOA /* GPIOA */
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#define SPI1_MISO_GPIO_CLK RCC_APB2_PERIPH_GPIOA
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#define SPI1_MOSI_PIN GPIO_PIN_7 /* PA.07 */
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#define SPI1_MOSI_GPIO_PORT GPIOA /* GPIOA */
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#define SPI1_MOSI_GPIO_CLK RCC_APB2_PERIPH_GPIOA
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#endif /* RT_USING_SPI1 */
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#ifdef BSP_USING_SPI2
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#define SPI2_SCK_PIN GPIO_PIN_13 /* PB.13 */
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#define SPI2_SCK_GPIO_PORT GPIOB /* GPIOB */
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#define SPI2_SCK_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#define SPI2_MISO_PIN GPIO_PIN_14 /* PB.14 */
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#define SPI2_MISO_GPIO_PORT GPIOB /* GPIOB */
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#define SPI2_MISO_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#define SPI2_MOSI_PIN GPIO_PIN_15 /* PB.15 */
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#define SPI2_MOSI_GPIO_PORT GPIOB /* GPIOB */
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#define SPI2_MOSI_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#endif /* RT_USING_SPI2 */
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#ifdef BSP_USING_SPI3
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#define SPI3_SCK_PIN GPIO_PIN_3 /* PB.03 */
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#define SPI3_SCK_GPIO_PORT GPIOB /* GPIOB */
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#define SPI3_SCK_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#define SPI3_MISO_PIN GPIO_PIN_4 /* PB.04 */
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#define SPI3_MISO_GPIO_PORT GPIOB /* GPIOB */
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#define SPI3_MISO_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#define SPI3_MOSI_PIN GPIO_PIN_5 /* PB.05 */
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#define SPI3_MOSI_GPIO_PORT GPIOB /* GPIOB */
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#define SPI3_MOSI_GPIO_CLK RCC_APB2_PERIPH_GPIOB
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#endif /* RT_USING_SPI3 */
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int rt_hw_spi_init(void);
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#endif /* __DRV_SPI_H__ */
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