153 lines
5.0 KiB
C
153 lines
5.0 KiB
C
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fxmac_g.c
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* Date: 2022-04-06 14:46:52
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* LastEditTime: 2022-04-06 14:46:58
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* Description: This file is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#include "fxmac.h"
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#include "fparameters.h"
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#include "ftypes.h"
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/************************** Constant Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Prototypes ******************************/
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/*
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* The configuration table for emacps device
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*/
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const FXmacConfig fxmac_cfg_tbl[FT_XMAC_NUM] =
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{
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[FT_XMAC0_ID] =
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{
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.instance_id = (u32)FT_XMAC0_ID, /* Device ID */
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.base_address = (uintptr)FT_XMAC0_BASEADDRESS, /* Device base address */
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.extral_mode_base = FT_XMAC0_MODE_SEL_BASEADDRESS,
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.extral_loopback_base = FT_XMAC0_LOOPBACK_SEL_BASEADDRESS,
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.interface = FXMAC_PHY_INTERFACE_MODE_SGMII,
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.speed = 1000,
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.duplex = 1,
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.auto_neg = 1,
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.pclk_hz = FT_XMAC0_PCLK,
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.max_queue_num = 16,
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.tx_queue_id = 0,
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.rx_queue_id = 0,
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.hotplug_irq_num = FT_XMAC0_HOTPLUG_IRQ_NUM,
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.dma_brust_length = 16,
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.network_default_config = FXMAC_DEFAULT_OPTIONS,
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.queue_irq_num =
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{
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FT_XMAC0_QUEUE0_IRQ_NUM,
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FT_XMAC0_QUEUE1_IRQ_NUM,
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FT_XMAC0_QUEUE2_IRQ_NUM,
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FT_XMAC0_QUEUE3_IRQ_NUM,
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FT_XMAC0_QUEUE4_IRQ_NUM,
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FT_XMAC0_QUEUE5_IRQ_NUM,
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FT_XMAC0_QUEUE6_IRQ_NUM,
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FT_XMAC0_QUEUE7_IRQ_NUM
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}
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},
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#ifdef FT_XMAC1_ID
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[FT_XMAC1_ID] =
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{
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.instance_id = (u32)FT_XMAC1_ID, /* Device ID */
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.base_address = (uintptr)FT_XMAC1_BASEADDRESS, /* Device base address */
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.extral_mode_base = FT_XMAC1_MODE_SEL_BASEADDRESS,
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.extral_loopback_base = FT_XMAC1_LOOPBACK_SEL_BASEADDRESS,
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.interface = FXMAC_PHY_INTERFACE_MODE_SGMII,
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.speed = 1000,
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.duplex = 1,
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.auto_neg = 1,
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.pclk_hz = FT_XMAC1_PCLK,
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.max_queue_num = 4,
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.tx_queue_id = 0,
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.rx_queue_id = 0,
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.hotplug_irq_num = FT_XMAC1_HOTPLUG_IRQ_NUM,
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.dma_brust_length = 16,
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.network_default_config = FXMAC_DEFAULT_OPTIONS,
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.queue_irq_num =
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{
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FT_XMAC1_QUEUE0_IRQ_NUM,
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FT_XMAC1_QUEUE1_IRQ_NUM,
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FT_XMAC1_QUEUE2_IRQ_NUM,
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FT_XMAC1_QUEUE3_IRQ_NUM
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}
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},
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#endif
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#ifdef FT_XMAC2_ID
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[FT_XMAC2_ID] =
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{
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.instance_id = (u32)FT_XMAC2_ID, /* Device ID */
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.base_address = (uintptr)FT_XMAC2_BASEADDRESS, /* Device base address */
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.extral_mode_base = FT_XMAC2_MODE_SEL_BASEADDRESS,
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.extral_loopback_base = FT_XMAC2_LOOPBACK_SEL_BASEADDRESS,
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.interface = FXMAC_PHY_INTERFACE_MODE_RGMII,
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.speed = 1000,
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.duplex = 1,
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.auto_neg = 1,
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.pclk_hz = FT_XMAC2_PCLK,
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.max_queue_num = 4,
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.tx_queue_id = 0,
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.rx_queue_id = 0,
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.hotplug_irq_num = FT_XMAC2_HOTPLUG_IRQ_NUM,
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.dma_brust_length = 16,
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.network_default_config = FXMAC_DEFAULT_OPTIONS,
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.queue_irq_num =
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{
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FT_XMAC2_QUEUE0_IRQ_NUM,
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FT_XMAC2_QUEUE1_IRQ_NUM,
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FT_XMAC2_QUEUE2_IRQ_NUM,
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FT_XMAC2_QUEUE3_IRQ_NUM
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}
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},
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#endif
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#ifdef FT_XMAC3_ID
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[FT_XMAC3_ID] =
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{
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.instance_id = (u32)FT_XMAC3_ID, /* Device ID */
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.base_address = (uintptr)FT_XMAC3_BASEADDRESS, /* Device base address */
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.extral_mode_base = FT_XMAC3_MODE_SEL_BASEADDRESS,
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.extral_loopback_base = FT_XMAC3_LOOPBACK_SEL_BASEADDRESS,
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.interface = FXMAC_PHY_INTERFACE_MODE_RGMII,
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.speed = 1000,
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.duplex = 1,
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.auto_neg = 1,
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.pclk_hz = FT_XMAC3_PCLK,
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.max_queue_num = 4,
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.tx_queue_id = 0,
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.rx_queue_id = 0,
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.hotplug_irq_num = FT_XMAC3_HOTPLUG_IRQ_NUM,
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.dma_brust_length = 16,
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.network_default_config = FXMAC_DEFAULT_OPTIONS,
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.queue_irq_num =
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{
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FT_XMAC3_QUEUE0_IRQ_NUM,
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FT_XMAC3_QUEUE1_IRQ_NUM,
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FT_XMAC3_QUEUE2_IRQ_NUM,
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FT_XMAC3_QUEUE3_IRQ_NUM
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}
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}
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#endif
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};
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/** @} */
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