2022-09-12 19:36:11 +08:00
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/**************************************************************************//**
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-3-16 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#include <rtdevice.h>
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#include "NuMicro.h"
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#if defined(BSP_USING_EADC)
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/* Private define ---------------------------------------------------------------*/
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enum
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{
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EADC_START = -1,
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#if defined(BSP_USING_EADC0)
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EADC0_IDX,
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#endif
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#if defined(BSP_USING_EADC1)
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EADC1_IDX,
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#endif
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#if defined(BSP_USING_EADC2)
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EADC2_IDX,
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#endif
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EADC_CNT
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};
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/* Private Typedef --------------------------------------------------------------*/
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struct nu_eadc
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{
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struct rt_adc_device dev;
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char *name;
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EADC_T *base;
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uint32_t chn_msk;
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uint32_t max_chn_num;
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};
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typedef struct nu_eadc *nu_eadc_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_eadc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled);
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static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
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static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value);
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/* Public functions ------------------------------------------------------------*/
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int rt_hw_eadc_init(void);
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/* Private variables ------------------------------------------------------------*/
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static struct nu_eadc nu_eadc_arr [] =
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{
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#if defined(BSP_USING_EADC0)
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{
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.name = "eadc0",
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.base = EADC0,
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.chn_msk = 0,
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.max_chn_num = 16,
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},
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#endif
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#if defined(BSP_USING_EADC1)
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{
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.name = "eadc1",
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.base = EADC1,
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.chn_msk = 0,
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.max_chn_num = 16,
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},
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#endif
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#if defined(BSP_USING_EADC2)
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{
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.name = "eadc2",
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.base = EADC2,
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.chn_msk = 0,
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.max_chn_num = 16,
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},
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#endif
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};
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static const struct rt_adc_ops nu_adc_ops =
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{
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nu_eadc_enabled,
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nu_get_eadc_value,
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};
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typedef struct rt_adc_ops *rt_adc_ops_t;
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/* nu_adc_enabled - Enable ADC clock and wait for ready */
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static rt_err_t nu_eadc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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nu_eadc_t psNuEADC = (nu_eadc_t)device;
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RT_ASSERT(device);
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if (channel >= psNuEADC->max_chn_num)
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return -(RT_EINVAL);
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if (enabled)
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{
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if (psNuEADC->chn_msk == 0)
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{
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EADC_Open(psNuEADC->base, EADC_CTL_DIFFEN_SINGLE_END);
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}
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psNuEADC->chn_msk |= (0x1 << channel);
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}
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else
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{
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psNuEADC->chn_msk &= ~(0x1 << channel);
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if (psNuEADC->chn_msk == 0)
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{
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EADC_Close(psNuEADC->base);
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}
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}
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return RT_EOK;
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}
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static rt_err_t nu_get_eadc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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nu_eadc_t psNuEADC = (nu_eadc_t)device;
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2023-03-17 12:12:16 +08:00
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rt_err_t ret = -RT_ERROR;
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2022-09-12 19:36:11 +08:00
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RT_ASSERT(device);
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RT_ASSERT(value);
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if (channel >= psNuEADC->max_chn_num)
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{
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*value = 0xFFFFFFFF;
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2023-03-16 12:44:05 +08:00
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ret = -RT_EINVAL;
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2022-09-12 19:36:11 +08:00
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goto exit_nu_get_eadc_value;
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}
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if ((psNuEADC->chn_msk & (1 << channel)) == 0)
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{
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*value = 0xFFFFFFFF;
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2023-03-22 03:41:55 +08:00
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ret = -RT_EBUSY;
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2022-09-12 19:36:11 +08:00
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goto exit_nu_get_eadc_value;
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}
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EADC_ConfigSampleModule(psNuEADC->base, 0, EADC_SOFTWARE_TRIGGER, channel);
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EADC_CLR_INT_FLAG(psNuEADC->base, EADC_STATUS2_ADIF0_Msk);
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EADC_ENABLE_INT(psNuEADC->base, BIT0);
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EADC_ENABLE_SAMPLE_MODULE_INT(psNuEADC->base, 0, BIT0);
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EADC_START_CONV(psNuEADC->base, BIT0);
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while (EADC_GET_INT_FLAG(psNuEADC->base, BIT0) == 0);
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EADC_DISABLE_INT(psNuEADC->base, BIT0);
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*value = EADC_GET_CONV_DATA(psNuEADC->base, 0);
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ret = RT_EOK;
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exit_nu_get_eadc_value:
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return -(ret);
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}
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int rt_hw_eadc_init(void)
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{
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int i;
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rt_err_t result;
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for (i = (EADC_START + 1); i < EADC_CNT; i++)
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{
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result = rt_hw_adc_register(&nu_eadc_arr[i].dev, nu_eadc_arr[i].name, &nu_adc_ops, NULL);
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RT_ASSERT(result == RT_EOK);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_eadc_init);
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#endif //#if defined(BSP_USING_EADC)
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