2015-08-07 13:30:13 +08:00
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/*
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2018-10-16 13:00:37 +08:00
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* Copyright (c) 2006-2018, RT-Thread Development Team
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2015-08-07 13:30:13 +08:00
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*
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2018-10-16 13:00:37 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2015-08-07 13:30:13 +08:00
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*
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* Change Logs:
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* Date Author Notes
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2018-05-18 20:19:18 +08:00
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* 2018-05-17 ZYH first implementation
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2015-08-07 13:30:13 +08:00
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*/
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#include "drv_sdram.h"
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2018-05-18 20:19:18 +08:00
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#include <rtthread.h>
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#ifdef BSP_USING_SDRAM
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SDRAM_HandleTypeDef hsdram;
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static void BSP_SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command);
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/* FMC initialization function */
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void MX_FMC_Init(void)
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{
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FMC_SDRAM_TimingTypeDef SdramTiming;
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FMC_SDRAM_CommandTypeDef command;
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/** Perform the SDRAM1 memory initialization sequence
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*/
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hsdram.Instance = FMC_SDRAM_DEVICE;
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/* hsdram.Init */
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hsdram.Init.SDBank = FMC_SDRAM_BANK1;
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hsdram.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
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hsdram.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
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hsdram.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32;
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hsdram.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
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hsdram.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
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hsdram.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
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hsdram.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
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hsdram.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
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hsdram.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
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/* SdramTiming */
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SdramTiming.LoadToActiveDelay = 2;
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SdramTiming.ExitSelfRefreshDelay = 6;
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SdramTiming.SelfRefreshTime = 4;
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SdramTiming.RowCycleDelay = 6;
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SdramTiming.WriteRecoveryTime = 2;
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SdramTiming.RPDelay = 2;
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SdramTiming.RCDDelay = 2;
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2015-08-07 13:30:13 +08:00
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2018-05-18 20:19:18 +08:00
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HAL_SDRAM_Init(&hsdram, &SdramTiming);
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BSP_SDRAM_Initialization_Sequence(&hsdram, &command);
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2015-08-07 13:30:13 +08:00
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}
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2018-05-18 20:19:18 +08:00
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static uint32_t FMC_Initialized = 0;
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2015-08-07 13:30:13 +08:00
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2018-05-18 20:19:18 +08:00
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static void HAL_FMC_MspInit(void)
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2015-08-07 13:30:13 +08:00
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{
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2018-05-18 20:19:18 +08:00
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GPIO_InitTypeDef GPIO_InitStruct;
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if (FMC_Initialized)
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{
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return;
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}
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FMC_Initialized = 1;
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/* Peripheral clock enable */
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__HAL_RCC_FMC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOE_CLK_ENABLE();
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__HAL_RCC_GPIOF_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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__HAL_RCC_GPIOH_CLK_ENABLE();
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__HAL_RCC_GPIOI_CLK_ENABLE();
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/** FMC GPIO Configuration
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PE1 ------> FMC_NBL1
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PE0 ------> FMC_NBL0
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PG15 ------> FMC_SDNCAS
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PD0 ------> FMC_D2
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PI4 ------> FMC_NBL2
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PD1 ------> FMC_D3
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PI3 ------> FMC_D27
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PI2 ------> FMC_D26
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PF0 ------> FMC_A0
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PI5 ------> FMC_NBL3
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PI7 ------> FMC_D29
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PI10 ------> FMC_D31
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PI6 ------> FMC_D28
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PH15 ------> FMC_D23
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PI1 ------> FMC_D25
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PF1 ------> FMC_A1
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PI9 ------> FMC_D30
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PH13 ------> FMC_D21
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PH14 ------> FMC_D22
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PI0 ------> FMC_D24
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PF2 ------> FMC_A2
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PF3 ------> FMC_A3
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PG8 ------> FMC_SDCLK
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PF4 ------> FMC_A4
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PH5 ------> FMC_SDNWE
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PH3 ------> FMC_SDNE0
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PF5 ------> FMC_A5
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PH2 ------> FMC_SDCKE0
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PD15 ------> FMC_D1
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PD10 ------> FMC_D15
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PD14 ------> FMC_D0
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PD9 ------> FMC_D14
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PD8 ------> FMC_D13
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PF12 ------> FMC_A6
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PG1 ------> FMC_A11
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PF15 ------> FMC_A9
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PH12 ------> FMC_D20
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PF13 ------> FMC_A7
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PG0 ------> FMC_A10
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PE8 ------> FMC_D5
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PG5 ------> FMC_BA1
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PG4 ------> FMC_BA0
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PH9 ------> FMC_D17
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PH11 ------> FMC_D19
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PF14 ------> FMC_A8
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PF11 ------> FMC_SDNRAS
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PE9 ------> FMC_D6
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PE11 ------> FMC_D8
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PE14 ------> FMC_D11
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PH8 ------> FMC_D16
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PH10 ------> FMC_D18
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PE7 ------> FMC_D4
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PE10 ------> FMC_D7
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PE12 ------> FMC_D9
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PE15 ------> FMC_D12
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PE13 ------> FMC_D10
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*/
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_0 | GPIO_PIN_8 | GPIO_PIN_9
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| GPIO_PIN_11 | GPIO_PIN_14 | GPIO_PIN_7 | GPIO_PIN_10
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| GPIO_PIN_12 | GPIO_PIN_15 | GPIO_PIN_13;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_15 | GPIO_PIN_8 | GPIO_PIN_1 | GPIO_PIN_0
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| GPIO_PIN_5 | GPIO_PIN_4;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_15 | GPIO_PIN_10
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| GPIO_PIN_14 | GPIO_PIN_9 | GPIO_PIN_8;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_5
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| GPIO_PIN_7 | GPIO_PIN_10 | GPIO_PIN_6 | GPIO_PIN_1
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| GPIO_PIN_9 | GPIO_PIN_0;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3
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| GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_15
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| GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_11;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
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/* GPIO_InitStruct */
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GPIO_InitStruct.Pin = GPIO_PIN_15 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_5
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| GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_12 | GPIO_PIN_9
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| GPIO_PIN_11 | GPIO_PIN_8 | GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
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HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
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2015-08-07 13:30:13 +08:00
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}
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2018-05-18 20:19:18 +08:00
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void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *sdramHandle)
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2015-08-07 13:30:13 +08:00
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{
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2018-05-18 20:19:18 +08:00
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HAL_FMC_MspInit();
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2015-08-07 13:30:13 +08:00
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}
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2018-05-18 20:19:18 +08:00
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static uint32_t FMC_DeInitialized = 0;
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static void HAL_FMC_MspDeInit(void)
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2015-08-07 13:30:13 +08:00
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{
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2018-05-18 20:19:18 +08:00
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if (FMC_DeInitialized)
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{
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return;
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}
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FMC_DeInitialized = 1;
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/* Peripheral clock enable */
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__HAL_RCC_FMC_CLK_DISABLE();
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/** FMC GPIO Configuration
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PE1 ------> FMC_NBL1
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PE0 ------> FMC_NBL0
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PG15 ------> FMC_SDNCAS
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PD0 ------> FMC_D2
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PI4 ------> FMC_NBL2
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PD1 ------> FMC_D3
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PI3 ------> FMC_D27
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PI2 ------> FMC_D26
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PF0 ------> FMC_A0
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PI5 ------> FMC_NBL3
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PI7 ------> FMC_D29
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PI10 ------> FMC_D31
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PI6 ------> FMC_D28
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PH15 ------> FMC_D23
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PI1 ------> FMC_D25
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PF1 ------> FMC_A1
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PI9 ------> FMC_D30
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PH13 ------> FMC_D21
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PH14 ------> FMC_D22
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PI0 ------> FMC_D24
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PF2 ------> FMC_A2
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PF3 ------> FMC_A3
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PG8 ------> FMC_SDCLK
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PF4 ------> FMC_A4
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PH5 ------> FMC_SDNWE
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PH3 ------> FMC_SDNE0
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PF5 ------> FMC_A5
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PH2 ------> FMC_SDCKE0
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PD15 ------> FMC_D1
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PD10 ------> FMC_D15
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PD14 ------> FMC_D0
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PD9 ------> FMC_D14
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PD8 ------> FMC_D13
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PF12 ------> FMC_A6
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PG1 ------> FMC_A11
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PF15 ------> FMC_A9
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PH12 ------> FMC_D20
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PF13 ------> FMC_A7
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PG0 ------> FMC_A10
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PE8 ------> FMC_D5
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PG5 ------> FMC_BA1
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PG4 ------> FMC_BA0
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PH9 ------> FMC_D17
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PH11 ------> FMC_D19
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PF14 ------> FMC_A8
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PF11 ------> FMC_SDNRAS
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PE9 ------> FMC_D6
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PE11 ------> FMC_D8
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PE14 ------> FMC_D11
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PH8 ------> FMC_D16
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PH10 ------> FMC_D18
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PE7 ------> FMC_D4
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PE10 ------> FMC_D7
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PE12 ------> FMC_D9
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PE15 ------> FMC_D12
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PE13 ------> FMC_D10
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*/
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HAL_GPIO_DeInit(GPIOE, GPIO_PIN_1 | GPIO_PIN_0 | GPIO_PIN_8 | GPIO_PIN_9
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| GPIO_PIN_11 | GPIO_PIN_14 | GPIO_PIN_7 | GPIO_PIN_10
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| GPIO_PIN_12 | GPIO_PIN_15 | GPIO_PIN_13);
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HAL_GPIO_DeInit(GPIOG, GPIO_PIN_15 | GPIO_PIN_8 | GPIO_PIN_1 | GPIO_PIN_0
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| GPIO_PIN_5 | GPIO_PIN_4);
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_15 | GPIO_PIN_10
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| GPIO_PIN_14 | GPIO_PIN_9 | GPIO_PIN_8);
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HAL_GPIO_DeInit(GPIOI, GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_5
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| GPIO_PIN_7 | GPIO_PIN_10 | GPIO_PIN_6 | GPIO_PIN_1
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| GPIO_PIN_9 | GPIO_PIN_0);
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HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3
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| GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_12 | GPIO_PIN_15
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| GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_11);
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HAL_GPIO_DeInit(GPIOH, GPIO_PIN_15 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_5
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| GPIO_PIN_3 | GPIO_PIN_2 | GPIO_PIN_12 | GPIO_PIN_9
|
|
|
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| GPIO_PIN_11 | GPIO_PIN_8 | GPIO_PIN_10);
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2015-08-07 13:30:13 +08:00
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}
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|
|
|
|
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2018-05-18 20:19:18 +08:00
|
|
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void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *sdramHandle)
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2015-08-07 13:30:13 +08:00
|
|
|
{
|
2018-05-18 20:19:18 +08:00
|
|
|
HAL_FMC_MspDeInit();
|
2015-08-07 13:30:13 +08:00
|
|
|
}
|
|
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
static void BSP_SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command)
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2015-08-07 13:30:13 +08:00
|
|
|
{
|
2018-05-18 20:19:18 +08:00
|
|
|
__IO uint32_t tmpmrd = 0;
|
|
|
|
|
int delay = 216000/3;
|
|
|
|
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/* Step 3: Configure a clock configuration enable command */
|
|
|
|
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Command->CommandMode = FMC_SDRAM_CMD_CLK_ENABLE;
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|
|
|
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Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
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|
|
|
|
Command->AutoRefreshNumber = 1;
|
|
|
|
|
Command->ModeRegisterDefinition = 0;
|
2015-08-07 13:30:13 +08:00
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
/* Send the command */
|
|
|
|
|
HAL_SDRAM_SendCommand(hsdram, Command, SDRAM_TIMEOUT);
|
2015-08-07 13:30:13 +08:00
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
/* Step 4: Insert 100 us minimum delay */
|
|
|
|
|
/* Inserted delay is equal to 1 ms due to systick time base unit (ms) */
|
|
|
|
|
while(delay)
|
|
|
|
|
{
|
|
|
|
|
delay--;
|
|
|
|
|
}
|
2015-08-07 13:30:13 +08:00
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
/* Step 5: Configure a PALL (precharge all) command */
|
|
|
|
|
Command->CommandMode = FMC_SDRAM_CMD_PALL;
|
|
|
|
|
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
|
|
|
|
|
Command->AutoRefreshNumber = 1;
|
|
|
|
|
Command->ModeRegisterDefinition = 0;
|
2015-08-07 13:30:13 +08:00
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
/* Send the command */
|
|
|
|
|
HAL_SDRAM_SendCommand(hsdram, Command, SDRAM_TIMEOUT);
|
|
|
|
|
|
|
|
|
|
/* Step 6 : Configure a Auto-Refresh command */
|
|
|
|
|
Command->CommandMode = FMC_SDRAM_CMD_AUTOREFRESH_MODE;
|
|
|
|
|
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
|
|
|
|
|
Command->AutoRefreshNumber = 8;
|
|
|
|
|
Command->ModeRegisterDefinition = 0;
|
|
|
|
|
|
|
|
|
|
/* Send the command */
|
|
|
|
|
HAL_SDRAM_SendCommand(hsdram, Command, SDRAM_TIMEOUT);
|
2015-09-25 15:35:37 +08:00
|
|
|
|
2018-05-18 20:19:18 +08:00
|
|
|
/* Step 7: Program the external memory mode register */
|
|
|
|
|
tmpmrd = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_1 |
|
|
|
|
|
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL |
|
|
|
|
|
SDRAM_MODEREG_CAS_LATENCY_2 |
|
|
|
|
|
SDRAM_MODEREG_OPERATING_MODE_STANDARD |
|
|
|
|
|
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE;
|
|
|
|
|
|
|
|
|
|
Command->CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
|
|
|
|
|
Command->CommandTarget = FMC_SDRAM_CMD_TARGET_BANK1;
|
|
|
|
|
Command->AutoRefreshNumber = 1;
|
|
|
|
|
Command->ModeRegisterDefinition = tmpmrd;
|
|
|
|
|
|
|
|
|
|
/* Send the command */
|
|
|
|
|
HAL_SDRAM_SendCommand(hsdram, Command, SDRAM_TIMEOUT);
|
|
|
|
|
|
|
|
|
|
/* Step 8: Set the refresh rate counter */
|
|
|
|
|
/* (15.62 us x Freq) - 20 */
|
|
|
|
|
/* Set the device refresh counter */
|
|
|
|
|
hsdram->Instance->SDRTR |= ((uint32_t)((1292) << 1));
|
|
|
|
|
}
|
|
|
|
|
int bsp_sdram_hw_init(void)
|
2015-09-25 15:35:37 +08:00
|
|
|
{
|
2018-05-18 20:19:18 +08:00
|
|
|
MX_FMC_Init();
|
|
|
|
|
return 0;
|
2015-09-25 15:35:37 +08:00
|
|
|
}
|
2018-05-18 20:19:18 +08:00
|
|
|
#endif
|
