2011-07-08 15:13:20 +08:00
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/***************************************************************************//**
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* @file rtconfig.h
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2011-02-17 11:33:15 +08:00
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* @brief RT-Thread config file
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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* @author
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2011-07-08 15:13:20 +08:00
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* @version 0.4 beta
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*******************************************************************************
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2011-02-17 11:33:15 +08:00
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* @section License
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2011-07-08 15:13:20 +08:00
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
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******************************************************************************/
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2011-02-17 11:33:15 +08:00
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#ifndef __RTTHREAD_CFG_H__
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#define __RTTHREAD_CFG_H__
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2011-07-08 15:13:20 +08:00
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/* Includes ------------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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2011-02-17 11:33:15 +08:00
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/* RT_NAME_MAX*/
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#define RT_NAME_MAX (8)
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/* RT_ALIGN_SIZE*/
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#define RT_ALIGN_SIZE (4)
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/* PRIORITY_MAX */
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#define RT_THREAD_PRIORITY_MAX (32)
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/* Tick per Second */
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#define RT_TICK_PER_SECOND (100)
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/* SECTION: RT_DEBUG */
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#define RT_DEBUG
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2011-07-08 15:13:20 +08:00
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//#define RT_MEM_DEBUG (1)
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//#define RT_DEBUG_SCHEDULER (1)
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2011-02-17 11:33:15 +08:00
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//#define THREAD_DEBUG
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//#define IRQ_DEBUG
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#define RT_USING_OVERFLOW_CHECK
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//#define DFS_DEBUG
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#define RT_LWIP_DEBUG
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2011-03-29 17:41:22 +08:00
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//#define RT_IRQHDL_DEBUG
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//#define RT_USART_DEBUG
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//#define RT_IIC_DEBUG
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//#define RT_MISC_DEBUG
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//#define RT_ADC_DEBUG
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2011-03-29 17:41:22 +08:00
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//#define RT_ACMP_DEBUG
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//#define RT_TIMER_DEBUG
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//#define RT_RTC_DEBUG
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#define EFM32_SFLASH_DEBUG
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//#define EFM32_SDCARD_DEBUG
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#define EFM32_ETHERNET_DEBUG
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/* Using Hook */
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//#define RT_USING_HOOK
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/* Using Software Timer */
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/* #define RT_USING_TIMER_SOFT */
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#define RT_TIMER_THREAD_PRIO (4)
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#define RT_TIMER_THREAD_STACK_SIZE (512)
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#define RT_TIMER_TICK_PER_SECOND (10)
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/* SECTION: IPC */
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/* Using Semaphore*/
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#define RT_USING_SEMAPHORE /* Using by DFS and lwIP */
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/* Using Mutex */
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//#define RT_USING_MUTEX /* Using by DFS */
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/* Using Event */
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//#define RT_USING_EVENT
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/* Using MailBox */
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#define RT_USING_MAILBOX /* Using by lwIP */
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/* Using Message Queue */
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//#define RT_USING_MESSAGEQUEUE
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/* SECTION: Memory Management */
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/* Using Memory Pool Management*/
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//#define RT_USING_MEMPOOL
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/* Using Dynamic Heap Management */
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#define RT_USING_HEAP
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/* Using Small MM */
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#define RT_USING_SMALL_MEM
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/* SECTION: Device System */
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/* Using Device System */
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#define RT_USING_DEVICE
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/* USART Device for Console */
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#if defined(EFM32_G290_DK)
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#define RT_USING_USART1 (0x0UL)
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#define RT_USART1_NAME "debug"
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//#define RT_USART1_USING_DMA (0x0UL)
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#elif defined(EFM32_G890_STK)
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#define RT_USING_USART1 (0x1UL)
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#define RT_USART1_NAME "debug"
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#define RT_USART1_USING_DMA (0x0UL)
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#endif
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2011-05-12 15:19:37 +08:00
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/* SECTION: SPI options */
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#if defined(EFM32_G290_DK)
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#define RT_USING_USART0 (0x2UL)
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#define RT_USART0_SYNC_MODE (0x1UL) /* Master */
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#define RT_USART0_NAME "spi0"
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#define RT_USART0_USING_DMA (0x1UL)
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#define RT_USING_USART2 (0x1UL)
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#define RT_USART2_SYNC_MODE (0x1UL) /* Master */
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#define RT_USART2_NAME "spi2"
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#define RT_USART2_USING_DMA (0x2UL)
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#elif defined(EFM32_G890_STK)
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//#define RT_USING_USART0 (0x0UL)
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//#define RT_USART0_SYNC_MODE (0x1UL) /* Master */
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//#define RT_USART0_NAME "spi0"
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//#define RT_USART0_USING_DMA (0x1UL)
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#endif
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/* SECTION: IIC options */
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//#define RT_USING_IIC0 0x1UL
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#define RT_IIC0_NAME "iic0"
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/* SECTION: ACMP options */
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//#define RT_USING_ACMP0
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#define RT_ACMP0_NAME "acmp0"
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/* SECTION: ADC options */
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#define RT_USING_ADC0
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#define RT_ADC0_NAME "adc"
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/* SECTION: TIMER options */
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//#define RT_USING_TIMER2 (0x00) /* Continuous mode */
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#define RT_TIMER2_NAME "tmr2"
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/* SECTION: RTC options */
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#if (defined(EFM32_G290_DK) || defined(EFM32_G890_STK))
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//#define RT_USING_RTC
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#define RT_RTC_NAME "rtc"
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#endif
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/* SECTION: Serial options */
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#if defined(EFM32_G290_DK)
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#define RT_CONSOLE_DEVICE (0x1UL)
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#elif defined(EFM32_G890_STK)
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#define RT_CONSOLE_DEVICE (0x1UL)
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#endif
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/* SECTION: Console options */
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#define RT_USING_CONSOLE
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/* the buffer size of console*/
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#define RT_CONSOLEBUF_SIZE (128)
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/* SECTION: finsh, a C-Express shell */
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#define RT_USING_FINSH
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/* Using symbol table */
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#define FINSH_USING_SYMTAB
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#define FINSH_USING_DESCRIPTION
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/* SECTION: SPI Flash, MicroSD card and Ethernet */
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#if defined(EFM32_G290_DK)
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//#define EFM32_USING_SFLASH
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//#define EFM32_USING_SPISD
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#define EFM32_USING_ETHERNET
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#endif
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#if defined(EFM32_USING_SFLASH)
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#define SFLASH_USING_DEVICE_NAME RT_USART0_NAME
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#endif
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#if defined(EFM32_USING_SPISD)
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#define SPISD_USING_DEVICE_NAME RT_USART0_NAME
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#define SPISD_DEVICE_NAME "spiSd"
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#endif
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#if defined(EFM32_USING_ETHERNET)
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#define ETH_USING_DEVICE_NAME RT_USART2_NAME
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#define ETH_DEVICE_NAME "spiEth"
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#define ETH_ADDR_DEFAULT {0x11, 0x22, 0x33, 0x44, 0x55, 0x66}
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#endif
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2011-06-20 09:56:28 +08:00
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/* SECTION: device filesystem */
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#if defined(EFM32_USING_SPISD)
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//#define RT_USING_DFS
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//#define RT_USING_DFS_ELMFAT
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#define DFS_ELMFAT_INTERFACE_EFM
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/* the max number of mounted filesystem */
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#define DFS_FILESYSTEMS_MAX (2)
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/* the max number of opened files */
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#define DFS_FD_MAX (4)
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/* the max number of cached sector */
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#define DFS_CACHE_MAX_NUM (4)
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#endif
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/* SECTION: lwip, a lighwight TCP/IP protocol stack */
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#if defined(EFM32_USING_ETHERNET)
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#define RT_USING_LWIP
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#define RT_USING_NETUTILS
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//#define RT_LWIP_DHCP
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/* LwIP uses RT-Thread Memory Management */
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#define RT_LWIP_USING_RT_MEM
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/* Enable ICMP protocol*/
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#define RT_LWIP_ICMP
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/* Enable UDP protocol*/
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#define RT_LWIP_UDP
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/* Enable TCP protocol*/
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#define RT_LWIP_TCP
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/* Enable DNS */
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//#define RT_LWIP_DNS
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/* the number of simulatenously active TCP connections*/
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#define RT_LWIP_TCP_PCB_NUM (2)
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/* ip address of target*/
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#define RT_LWIP_IPADDR0 (192)
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#define RT_LWIP_IPADDR1 (168)
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#define RT_LWIP_IPADDR2 (1)
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#define RT_LWIP_IPADDR3 (118)
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/* gateway address of target*/
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#define RT_LWIP_GWADDR0 (192)
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#define RT_LWIP_GWADDR1 (168)
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#define RT_LWIP_GWADDR2 (1)
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#define RT_LWIP_GWADDR3 (1)
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/* mask address of target*/
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#define RT_LWIP_MSKADDR0 (255)
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#define RT_LWIP_MSKADDR1 (255)
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#define RT_LWIP_MSKADDR2 (255)
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#define RT_LWIP_MSKADDR3 (0)
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/* tcp thread options */
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#define RT_LWIP_TCPTHREAD_PRIORITY (12)
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#define RT_LWIP_TCPTHREAD_MBOX_SIZE (4)
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#define RT_LWIP_TCPTHREAD_STACKSIZE (512)
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/* ethernet if thread options */
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#define RT_LWIP_ETHTHREAD_PRIORITY (15)
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#define RT_LWIP_ETHTHREAD_MBOX_SIZE (4)
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#define RT_LWIP_ETHTHREAD_STACKSIZE (512)
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#endif
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2011-06-20 09:56:28 +08:00
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2011-07-08 15:13:20 +08:00
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/* Exported functions ------------------------------------------------------- */
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2011-02-17 11:33:15 +08:00
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2011-05-12 15:19:37 +08:00
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#endif /* __RTTHREAD_CFG_H__ */
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