98 lines
2.9 KiB
C
98 lines
2.9 KiB
C
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/*
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* Change Logs:
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* Date Author Notes
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* 2021-04-20 liuhy the first version
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*
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* Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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#ifndef __ES_CONF_INFO_ADC_H__
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#define __ES_CONF_INFO_ADC_H__
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#include "es_conf_info_map.h"
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#include <ald_adc.h>
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#define ES_C_ADC_CLK_DIV_1 ADC_CKDIV_1
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#define ES_C_ADC_CLK_DIV_2 ADC_CKDIV_2
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#define ES_C_ADC_CLK_DIV_4 ADC_CKDIV_4
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#define ES_C_ADC_CLK_DIV_8 ADC_CKDIV_8
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#define ES_C_ADC_CLK_DIV_16 ADC_CKDIV_16
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#define ES_C_ADC_CLK_DIV_32 ADC_CKDIV_32
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#define ES_C_ADC_CLK_DIV_64 ADC_CKDIV_64
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#define ES_C_ADC_CLK_DIV_128 ADC_CKDIV_128
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#define ES_C_ADC_ALIGN_RIGHT ADC_DATAALIGN_RIGHT
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#define ES_C_ADC_ALIGN_LEFT ADC_DATAALIGN_LEFT
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#define ES_C_ADC_CONV_BIT_6 ADC_CONV_BIT_6
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#define ES_C_ADC_CONV_BIT_8 ADC_CONV_BIT_8
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#define ES_C_ADC_CONV_BIT_10 ADC_CONV_BIT_10
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#define ES_C_ADC_CONV_BIT_12 ADC_CONV_BIT_12
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#define ES_C_ADC_SAMPLE_TIME_1 ADC_SAMPLETIME_1
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#define ES_C_ADC_SAMPLE_TIME_2 ADC_SAMPLETIME_2
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#define ES_C_ADC_SAMPLE_TIME_4 ADC_SAMPLETIME_4
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#define ES_C_ADC_SAMPLE_TIME_15 ADC_SAMPLETIME_15
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/* ADC 配置 */
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/* codes_main */
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#define ES_ADC0_ALIGN ES_C_ADC_ALIGN_RIGHT
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#define ES_ADC1_ALIGN ES_C_ADC_ALIGN_RIGHT
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#define ES_ADC1_DATA_BIT ES_C_ADC_CONV_BIT_12
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#define ES_ADC0_DATA_BIT ES_C_ADC_CONV_BIT_12
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#ifndef ES_DEVICE_NAME_ADC0
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#define ES_DEVICE_NAME_ADC0 "adc0"
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#endif
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#ifndef ES_DEVICE_NAME_ADC1
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#define ES_DEVICE_NAME_ADC1 "adc1"
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#endif
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#ifndef ES_ADC0_CLK_DIV
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#define ES_ADC0_CLK_DIV ES_C_ADC_CLK_DIV_128
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#endif
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#ifndef ES_ADC0_ALIGN
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#define ES_ADC0_ALIGN ES_C_ADC_ALIGN_RIGHT
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#endif
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#ifndef ES_ADC0_DATA_BIT
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#define ES_ADC0_DATA_BIT ES_C_ADC_CONV_BIT_12
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#endif
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#ifndef ES_ADC0_NCH_SAMPLETIME
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#define ES_ADC0_NCH_SAMPLETIME ES_C_ADC_SAMPLE_TIME_4
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#endif
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#ifndef ES_ADC1_CLK_DIV
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#define ES_ADC1_CLK_DIV ES_C_ADC_CLK_DIV_128
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#endif
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#ifndef ES_ADC1_ALIGN
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#define ES_ADC1_ALIGN ES_C_ADC_ALIGN_RIGHT
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#endif
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#ifndef ES_ADC1_DATA_BIT
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#define ES_ADC1_DATA_BIT ES_C_ADC_CONV_BIT_12
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#endif
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#ifndef ES_ADC1_NCH_SAMPLETIME
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#define ES_ADC1_NCH_SAMPLETIME ES_C_ADC_SAMPLE_TIME_4
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#endif
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#endif
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