437 lines
14 KiB
C
437 lines
14 KiB
C
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/******************************************************************************************************************************************
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* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: SWM320_timr.c
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: SWM320<EFBFBD><EFBFBD>Ƭ<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD>: http://www.synwit.com.cn/e/tool/gbook/?bid=1
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
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* <EFBFBD>汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD>: V1.1.0 2017<EFBFBD><EFBFBD>10<EFBFBD><EFBFBD>25<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼:
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*
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*
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*******************************************************************************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
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* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
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* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
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* -ECTION WITH THEIR PRODUCTS.
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*
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* COPYRIGHT 2012 Synwit Technology
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*******************************************************************************************************************************************/
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#include "SWM320.h"
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#include "SWM320_timr.h"
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_Init()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: TIMR<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* uint32_t mode TIMR_MODE_TIMER <EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ģʽ TIMR_MODE_COUNTER <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
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* uint32_t period <EFBFBD><EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* uint32_t int_en <EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_Init(TIMR_TypeDef * TIMRx, uint32_t mode, uint32_t period, uint32_t int_en)
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{
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SYS->CLKEN |= (0x01 << SYS_CLKEN_TIMR_Pos);
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TIMR_Stop(TIMRx); //һЩ<D2BB>ؼ<EFBFBD><D8BC>Ĵ<EFBFBD><C4B4><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ڶ<EFBFBD>ʱ<EFBFBD><CAB1>ֹͣʱ<D6B9><CAB1><EFBFBD><EFBFBD>
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TIMRx->CTRL &= ~TIMR_CTRL_CLKSRC_Msk;
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TIMRx->CTRL |= mode << TIMR_CTRL_CLKSRC_Pos;
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TIMRx->LDVAL = period;
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switch((uint32_t)TIMRx)
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{
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case ((uint32_t)TIMR0):
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TIMRG->IF = (1 << TIMRG_IF_TIMR0_Pos); //ʹ<><CAB9><EFBFBD>ж<EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
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TIMRG->IE &= ~TIMRG_IE_TIMR0_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR0_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR0_IRQn);
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break;
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case ((uint32_t)TIMR1):
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TIMRG->IF = (1 << TIMRG_IF_TIMR1_Pos);
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TIMRG->IE &= ~TIMRG_IE_TIMR1_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR1_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR1_IRQn);
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break;
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case ((uint32_t)TIMR2):
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TIMRG->IF = (1 << TIMRG_IF_TIMR2_Pos);
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TIMRG->IE &= ~TIMRG_IE_TIMR2_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR2_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR2_IRQn);
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break;
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case ((uint32_t)TIMR3):
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TIMRG->IF = (1 << TIMRG_IF_TIMR3_Pos);
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TIMRG->IE &= ~TIMRG_IE_TIMR3_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR3_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR3_IRQn);
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break;
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case ((uint32_t)TIMR4):
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TIMRG->IF = (1 << TIMRG_IF_TIMR4_Pos);
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TIMRG->IE &= ~TIMRG_IE_TIMR4_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR4_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR4_IRQn);
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break;
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case ((uint32_t)TIMR5):
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TIMRG->IF = (1 << TIMRG_IF_TIMR5_Pos);
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TIMRG->IE &= ~TIMRG_IE_TIMR5_Msk;
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TIMRG->IE |= (int_en << TIMRG_IE_TIMR5_Pos);
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if(int_en) NVIC_EnableIRQ(TIMR5_IRQn);
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break;
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_Start()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD>ʼֵ<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_Start(TIMR_TypeDef * TIMRx)
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{
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TIMRx->CTRL |= TIMR_CTRL_EN_Msk;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_Stop()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: ֹͣ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_Stop(TIMR_TypeDef * TIMRx)
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{
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TIMRx->CTRL &= ~TIMR_CTRL_EN_Msk;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_Halt()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ͣ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_Halt(TIMR_TypeDef * TIMRx)
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{
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switch((uint32_t)TIMRx)
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{
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case ((uint32_t)TIMR0):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR0_Pos);
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break;
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case ((uint32_t)TIMR1):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR1_Pos);
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break;
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case ((uint32_t)TIMR2):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR2_Pos);
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break;
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case ((uint32_t)TIMR3):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR3_Pos);
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break;
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case ((uint32_t)TIMR4):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR4_Pos);
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break;
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case ((uint32_t)TIMR5):
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TIMRG->HALT |= (0x01 << TIMRG_HALT_TIMR5_Pos);
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break;
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_Resume()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_Resume(TIMR_TypeDef * TIMRx)
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{
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switch((uint32_t)TIMRx)
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{
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case ((uint32_t)TIMR0):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR0_Pos);
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break;
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case ((uint32_t)TIMR1):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR1_Pos);
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break;
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case ((uint32_t)TIMR2):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR2_Pos);
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break;
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case ((uint32_t)TIMR3):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR3_Pos);
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break;
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case ((uint32_t)TIMR4):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR4_Pos);
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break;
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case ((uint32_t)TIMR5):
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TIMRG->HALT &= ~(0x01 << TIMRG_HALT_TIMR5_Pos);
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break;
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_SetPeriod()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD>ö<EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* uint32_t period <EFBFBD><EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void TIMR_SetPeriod(TIMR_TypeDef * TIMRx, uint32_t period)
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{
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TIMRx->LDVAL = period;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_GetPeriod()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t <EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ʱ/<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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uint32_t TIMR_GetPeriod(TIMR_TypeDef * TIMRx)
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{
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return TIMRx->LDVAL;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_GetCurValue()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t <EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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uint32_t TIMR_GetCurValue(TIMR_TypeDef * TIMRx)
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{
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return TIMRx->CVAL;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_INTEn()
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|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: ʹ<EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void TIMR_INTEn(TIMR_TypeDef * TIMRx)
|
|||
|
{
|
|||
|
switch((uint32_t)TIMRx)
|
|||
|
{
|
|||
|
case ((uint32_t)TIMR0):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR0_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR0_IRQn);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR1):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR1_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR1_IRQn);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR2):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR2_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR2_IRQn);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR3):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR3_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR3_IRQn);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR4):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR4_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR4_IRQn);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR5):
|
|||
|
TIMRG->IE |= (0x01 << TIMRG_IE_TIMR5_Pos);
|
|||
|
NVIC_EnableIRQ(TIMR5_IRQn);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_INTDis()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void TIMR_INTDis(TIMR_TypeDef * TIMRx)
|
|||
|
{
|
|||
|
switch((uint32_t)TIMRx)
|
|||
|
{
|
|||
|
case ((uint32_t)TIMR0):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR0_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR1):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR1_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR2):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR2_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR3):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR3_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR4):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR4_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR5):
|
|||
|
TIMRG->IE &= ~(0x01 << TIMRG_IE_TIMR5_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_INTClr()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<EFBFBD>־
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void TIMR_INTClr(TIMR_TypeDef * TIMRx)
|
|||
|
{
|
|||
|
switch((uint32_t)TIMRx)
|
|||
|
{
|
|||
|
case ((uint32_t)TIMR0):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR0_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR1):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR1_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR2):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR2_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR3):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR3_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR4):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR4_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case ((uint32_t)TIMR5):
|
|||
|
TIMRG->IF = (0x01 << TIMRG_IF_TIMR5_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: TIMR_INTStat()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD>ж<EFBFBD>״̬
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: TIMR_TypeDef * TIMRx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õĶ<EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>TIMR0<EFBFBD><EFBFBD>TIMR1<EFBFBD><EFBFBD>TIMR2<EFBFBD><EFBFBD>TIMR3<EFBFBD><EFBFBD>TIMR4<EFBFBD><EFBFBD>TIMR5
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 0 TIMRxδ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD> 1 TIMRx<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint32_t TIMR_INTStat(TIMR_TypeDef * TIMRx)
|
|||
|
{
|
|||
|
switch((uint32_t)TIMRx)
|
|||
|
{
|
|||
|
case ((uint32_t)TIMR0):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR0_Msk) ? 1 : 0;
|
|||
|
|
|||
|
case ((uint32_t)TIMR1):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR1_Msk) ? 1 : 0;
|
|||
|
|
|||
|
case ((uint32_t)TIMR2):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR2_Msk) ? 1 : 0;
|
|||
|
|
|||
|
case ((uint32_t)TIMR3):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR3_Msk) ? 1 : 0;
|
|||
|
|
|||
|
case ((uint32_t)TIMR4):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR4_Msk) ? 1 : 0;
|
|||
|
|
|||
|
case ((uint32_t)TIMR5):
|
|||
|
return (TIMRG->IF & TIMRG_IF_TIMR5_Msk) ? 1 : 0;
|
|||
|
}
|
|||
|
|
|||
|
return 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Pulse_Init()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t pulse PULSE_LOW <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> PULSE_HIGH <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* uint32_t int_en <EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void Pulse_Init(uint32_t pulse, uint32_t int_en)
|
|||
|
{
|
|||
|
SYS->CLKEN |= (0x01 << SYS_CLKEN_TIMR_Pos);
|
|||
|
|
|||
|
TIMRG->PCTRL = (0 << TIMRG_PCTRL_CLKSRC_Pos) | // ϵͳʱ<CDB3><CAB1><EFBFBD><EFBFBD>Ϊʱ<CEAA><CAB1>Դ
|
|||
|
(pulse << TIMRG_PCTRL_HIGH_Pos) |
|
|||
|
(0 << TIMRG_PCTRL_EN_Pos);
|
|||
|
|
|||
|
TIMRG->IE |= (1 << TIMRG_IE_PULSE_Pos); //ʹ<>ܲ<EFBFBD><DCB2>ܲ<EFBFBD>ѯ<EFBFBD>жϱ<D0B6>־
|
|||
|
|
|||
|
if(int_en) NVIC_EnableIRQ(PULSE_IRQn);
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Pulse_Start()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD>رղ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void Pulse_Start(void)
|
|||
|
{
|
|||
|
TIMRG->PCTRL |= (1 << TIMRG_PCTRL_EN_Pos);
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Pulse_Done()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint32_t Pulse_Done(void)
|
|||
|
{
|
|||
|
if(TIMRG->IF & TIMRG_IF_PULSE_Msk)
|
|||
|
{
|
|||
|
TIMRG->IF = TIMRG_IF_PULSE_Msk; // <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
|||
|
|
|||
|
return 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
return 0;
|
|||
|
}
|
|||
|
}
|