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rt-thread/bsp/swm320/libraries/SWM320_StdPeriph_Driver/SWM320_adc.h

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完善SWM320 BSP
2021-02-18 13:29:12 +08:00
#ifndef __SWM320_ADC_H__
#define __SWM320_ADC_H__
typedef struct {
uint8_t clk_src; //ADCת<43><D7AA>ʱ<EFBFBD><CAB1>Դ<EFBFBD><D4B4>ADC_CLKSRC_HRC<52><43>ADC_CLKSRC_VCO_DIV16<31><36>ADC_CLKSRC_VCO_DIV32<33><32>ADC_CLKSRC_VCO_DIV32
uint8_t clk_div; //ADCת<43><D7AA>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5>ȡֵ1--31
uint8_t pga_ref; //PGA<47><41>׼<EFBFBD><D7BC>PGA_REF_INTERNAL<41><4C>PGA_REF_EXTERNAL
uint8_t channels; //ADCת<43><D7AA>ͨ<EFBFBD><CDA8>ѡ<EFBFBD>У<EFBFBD>ADC_CH0<48><30>ADC_CH1<48><31>... ... <20><>ADC_CH7<48><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣩
uint8_t samplAvg; //<2F><><EFBFBD><EFBFBD>ȡƽ<C8A1><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADCת<43><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC<44><43>һ<EFBFBD><D2BB>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǵ<EFBFBD>ƽ<EFBFBD><C6BD>ֵ<EFBFBD><D6B5>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t trig_src; //ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD>ADC_TRIGSRC_SW<53><57>ADC_TRIGSRC_PWM<57><4D>ADC_TRIGSRC_TIMR2<52><32>ADC_TRIGSRC_TIMR3
uint8_t Continue; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>£<EFBFBD>1 <20><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һֱ<D2BB><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>STARTλ
// 0 <20><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>ģʽ<C4A3><CABD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD>STARTλ<54>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>ֹͣת<D6B9><D7AA>
uint8_t EOC_IEn; //EOC<4F>ж<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>ЧֵΪADC_CH0<48><30>ADC_CH1<48><31>... ... <20><>ADC_CH7<48><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣩
uint8_t OVF_IEn; //OVF<56>ж<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>ЧֵΪADC_CH0<48><30>ADC_CH1<48><31>... ... <20><>ADC_CH7<48><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣩
uint8_t HFULL_IEn; //FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>ЧֵΪADC_CH0<48><30>ADC_CH1<48><31>... ... <20><>ADC_CH7<48><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣩
uint8_t FULL_IEn; //FIFO <20><><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>ЧֵΪADC_CH0<48><30>ADC_CH1<48><31>... ... <20><>ADC_CH7<48><37><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣩
} ADC_InitStructure;
#define ADC_CH0 0x01
#define ADC_CH1 0x02
#define ADC_CH2 0x04
#define ADC_CH3 0x08
#define ADC_CH4 0x10
#define ADC_CH5 0x20
#define ADC_CH6 0x40
#define ADC_CH7 0x80
#define ADC_CLKSRC_HRC 1
#define ADC_CLKSRC_VCO_DIV16 2
#define ADC_CLKSRC_VCO_DIV32 3
#define ADC_CLKSRC_VCO_DIV64 4
#define ADC_AVG_SAMPLE1 0
#define ADC_AVG_SAMPLE2 1 //һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>2<EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ν<EFBFBD><CEBD><EFBFBD><EFBFBD><EFBFBD>ƽ<EFBFBD><C6BD>ֵ<EFBFBD><D6B5>Ϊת<CEAA><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define ADC_AVG_SAMPLE4 3
#define ADC_AVG_SAMPLE8 7
#define ADC_AVG_SAMPLE16 15
#define ADC_TRIGSRC_SW 0 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC->START.GOд1<D0B4><31><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>
#define ADC_TRIGSRC_PWM 1
#define PGA_REF_INTERNAL 1 //PGA<47><41><EFBFBD>빲ģ<EBB9B2><C4A3>ƽ<EFBFBD><C6BD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADC_REFP<46><50>ADC_REFN<46><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PGA_REF_EXTERNAL 0 //PGA<47><41><EFBFBD>빲ģ<EBB9B2><C4A3>ƽ<EFBFBD><C6BD><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD><EFBFBD>ṩ<EFBFBD><E1B9A9>(ADC_REFP + ADC_REFN) <20><>ƽֵ<C6BD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ
void ADC_Init(ADC_TypeDef * ADCx, ADC_InitStructure * initStruct); //ADCģ<43><C4A3>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
void ADC_Open(ADC_TypeDef * ADCx); //ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADCת<43><D7AA>
void ADC_Close(ADC_TypeDef * ADCx); //ADC<44>رգ<D8B1><D5A3>޷<EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ADCת<43><D7AA>
void ADC_Start(ADC_TypeDef * ADCx); //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ADC<44><43><EFBFBD><EFBFBD>ʼģ<CABC><C4A3>ת<EFBFBD><D7AA>
void ADC_Stop(ADC_TypeDef * ADCx); //<2F>ر<EFBFBD>ָ<EFBFBD><D6B8>ADC<44><43>ֹͣģ<D6B9><C4A3>ת<EFBFBD><D7AA>
uint32_t ADC_Read(ADC_TypeDef * ADCx, uint32_t chn); //<2F><>ָ<EFBFBD><D6B8>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ȡת<C8A1><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint32_t ADC_IsEOC(ADC_TypeDef * ADCx, uint32_t chn); //ָ<><D6B8>ͨ<EFBFBD><CDA8><EFBFBD>Ƿ<EFBFBD>End Of Conversion
void ADC_ChnSelect(ADC_TypeDef * ADCx, uint32_t chns);
void ADC_IntEOCEn(ADC_TypeDef * ADCx, uint32_t chn); //ת<><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>
void ADC_IntEOCDis(ADC_TypeDef * ADCx, uint32_t chn); //ת<><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6>ֹ
void ADC_IntEOCClr(ADC_TypeDef * ADCx, uint32_t chn); //ת<><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
uint32_t ADC_IntEOCStat(ADC_TypeDef * ADCx, uint32_t chn); //ת<><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬
void ADC_IntOVFEn(ADC_TypeDef * ADCx, uint32_t chn); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>
void ADC_IntOVFDis(ADC_TypeDef * ADCx, uint32_t chn); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6>ֹ
void ADC_IntOVFClr(ADC_TypeDef * ADCx, uint32_t chn); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
uint32_t ADC_IntOVFStat(ADC_TypeDef * ADCx, uint32_t chn); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬
void ADC_IntHFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>
void ADC_IntHFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>жϽ<D0B6>ֹ
void ADC_IntHFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
uint32_t ADC_IntHFULLStat(ADC_TypeDef * ADCx, uint32_t chn);//FIFO<46><4F><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>״̬
void ADC_IntFULLEn(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><CAB9>
void ADC_IntFULLDis(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD>жϽ<D0B6>ֹ
void ADC_IntFULLClr(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD>жϱ<D0B6>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
uint32_t ADC_IntFULLStat(ADC_TypeDef * ADCx, uint32_t chn); //FIFO<46><4F><EFBFBD>ж<EFBFBD>״̬
#endif //__SWM320_ADC_H__