2018-09-20 23:18:14 +08:00
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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2023-02-11 08:13:40 +08:00
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*
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2019-06-12 15:01:12 +08:00
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* SPDX-License-Identifier: BSD-3-Clause
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2018-09-20 23:18:14 +08:00
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*/
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#ifndef _FSL_DMAMUX_H_
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#define _FSL_DMAMUX_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup dmamux
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief DMAMUX driver version 2.0.2. */
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#define FSL_DMAMUX_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
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/*@}*/
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/*!
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* @name DMAMUX Initialization and de-initialization
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* @{
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*/
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/*!
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* @brief Initializes the DMAMUX peripheral.
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*
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* This function ungates the DMAMUX clock.
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*
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* @param base DMAMUX peripheral base address.
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*
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*/
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void DMAMUX_Init(DMAMUX_Type *base);
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/*!
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* @brief Deinitializes the DMAMUX peripheral.
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*
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* This function gates the DMAMUX clock.
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*
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* @param base DMAMUX peripheral base address.
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*/
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void DMAMUX_Deinit(DMAMUX_Type *base);
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/* @} */
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/*!
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* @name DMAMUX Channel Operation
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* @{
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*/
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/*!
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* @brief Enables the DMAMUX channel.
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*
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* This function enables the DMAMUX channel.
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*
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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*/
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static inline void DMAMUX_EnableChannel(DMAMUX_Type *base, uint32_t channel)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK;
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}
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/*!
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* @brief Disables the DMAMUX channel.
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*
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* This function disables the DMAMUX channel.
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*
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* @note The user must disable the DMAMUX channel before configuring it.
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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*/
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static inline void DMAMUX_DisableChannel(DMAMUX_Type *base, uint32_t channel)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK;
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}
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/*!
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* @brief Configures the DMAMUX channel source.
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*
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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* @param source Channel source, which is used to trigger the DMA transfer.
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*/
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static inline void DMAMUX_SetSource(DMAMUX_Type *base, uint32_t channel, uint32_t source)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(source));
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}
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#if defined(FSL_FEATURE_DMAMUX_HAS_TRIG) && FSL_FEATURE_DMAMUX_HAS_TRIG > 0U
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/*!
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* @brief Enables the DMAMUX period trigger.
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*
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* This function enables the DMAMUX period trigger feature.
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*
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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*/
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static inline void DMAMUX_EnablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK;
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}
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/*!
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* @brief Disables the DMAMUX period trigger.
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*
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* This function disables the DMAMUX period trigger.
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*
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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*/
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static inline void DMAMUX_DisablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK;
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}
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#endif /* FSL_FEATURE_DMAMUX_HAS_TRIG */
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#if (defined(FSL_FEATURE_DMAMUX_HAS_A_ON) && FSL_FEATURE_DMAMUX_HAS_A_ON)
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/*!
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* @brief Enables the DMA channel to be always ON.
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*
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* This function enables the DMAMUX channel always ON feature.
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*
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* @param base DMAMUX peripheral base address.
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* @param channel DMAMUX channel number.
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* @param enable Switcher of the always ON feature. "true" means enabled, "false" means disabled.
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*/
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static inline void DMAMUX_EnableAlwaysOn(DMAMUX_Type *base, uint32_t channel, bool enable)
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{
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assert(channel < FSL_FEATURE_DMAMUX_MODULE_CHANNEL);
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if (enable)
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{
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base->CHCFG[channel] |= DMAMUX_CHCFG_A_ON_MASK;
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}
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else
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{
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base->CHCFG[channel] &= ~DMAMUX_CHCFG_A_ON_MASK;
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}
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}
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#endif /* FSL_FEATURE_DMAMUX_HAS_A_ON */
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/* @} */
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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/* @} */
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#endif /* _FSL_DMAMUX_H_ */
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