2021-02-04 13:51:55 +08:00
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-01-28 greedyhao first version
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2021-03-19 11:08:00 +08:00
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* 2021-03-19 iysheng modify just set time first power up
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2021-03-26 23:26:17 +08:00
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* 2021-03-26 iysheng add alarm and 1s interrupt support
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2021-02-04 13:51:55 +08:00
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*/
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#include "board.h"
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#include <time.h>
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2021-02-07 21:08:41 +08:00
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#include <sys/time.h>
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2021-02-04 13:51:55 +08:00
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#ifdef BSP_USING_ONCHIP_RTC
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//#define DRV_DEBUG
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#define LOG_TAG "drv.rtc"
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#include <drv_log.h>
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static struct rt_device rtc;
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/************** HAL Start *******************/
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#define IRTC_ENTER_CRITICAL() uint32_t cpu_ie = PICCON & BIT(0); PICCONCLR = BIT(0);
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#define IRTC_EXIT_CRITICAL() PICCON |= cpu_ie
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uint8_t get_weekday(struct tm *const _tm)
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{
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uint8_t weekday;
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2021-02-07 21:08:41 +08:00
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time_t secs = timegm(_tm);
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2021-02-04 13:51:55 +08:00
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weekday = (secs / 86400 + 4) % 7;
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return weekday;
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}
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void irtc_write(uint32_t cmd)
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{
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RTCDAT = cmd;
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while (RTCCON & RTC_CON_TRANS_DONE);
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}
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uint8_t irtc_read(void)
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{
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RTCDAT = 0x00;
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while (RTCCON & RTC_CON_TRANS_DONE);
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return (uint8_t)RTCDAT;
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}
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void irtc_time_write(uint32_t cmd, uint32_t dat)
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{
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IRTC_ENTER_CRITICAL();
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RTCCON |= RTC_CON_CHIP_SELECT;
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irtc_write(cmd | RTC_WR);
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irtc_write((uint8_t)(dat >> 24));
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irtc_write((uint8_t)(dat >> 16));
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irtc_write((uint8_t)(dat >> 8));
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irtc_write((uint8_t)(dat >> 0));
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RTCCON &= ~RTC_CON_CHIP_SELECT;
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IRTC_EXIT_CRITICAL();
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}
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uint32_t irtc_time_read(uint32_t cmd)
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{
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uint32_t rd_val;
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IRTC_ENTER_CRITICAL();
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RTCCON |= RTC_CON_CHIP_SELECT;
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irtc_write(cmd | RTC_RD);
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*((uint8_t *)&rd_val + 3) = irtc_read();
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*((uint8_t *)&rd_val + 2) = irtc_read();
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*((uint8_t *)&rd_val + 1) = irtc_read();
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*((uint8_t *)&rd_val + 0) = irtc_read();
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RTCCON &= ~RTC_CON_CHIP_SELECT;
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IRTC_EXIT_CRITICAL();
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return rd_val;
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}
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void irtc_sfr_write(uint32_t cmd, uint8_t dat)
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{
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IRTC_ENTER_CRITICAL();
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RTCCON |= RTC_CON_CHIP_SELECT;
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irtc_write(cmd | RTC_WR);
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irtc_write(dat);
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RTCCON &= ~RTC_CON_CHIP_SELECT;
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IRTC_EXIT_CRITICAL();
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}
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uint8_t irtc_sfr_read(uint32_t cmd)
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{
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uint8_t rd_val;
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IRTC_ENTER_CRITICAL();
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RTCCON |= RTC_CON_CHIP_SELECT;
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irtc_write(cmd | RTC_RD);
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rd_val = irtc_read();
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RTCCON &= ~RTC_CON_CHIP_SELECT;
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IRTC_EXIT_CRITICAL();
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}
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2021-03-23 10:21:01 +08:00
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static void _init_rtc_clock(void)
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{
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uint8_t rtccon0;
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uint8_t rtccon2;
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rtccon0 = irtc_sfr_read(RTCCON0_CMD);
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rtccon2 = irtc_sfr_read(RTCCON2_CMD);
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#ifdef RTC_USING_INTERNAL_CLK
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rtccon0 &= ~RTC_CON0_XOSC32K_ENABLE;
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rtccon0 |= RTC_CON0_INTERNAL_32K;
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rtccon2 | RTC_CON2_32K_SELECT;
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#else
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rtccon0 |= RTC_CON0_XOSC32K_ENABLE;
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rtccon0 &= ~RTC_CON0_INTERNAL_32K;
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rtccon2 & ~RTC_CON2_32K_SELECT;
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#endif
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irtc_sfr_write(RTCCON0_CMD, rtccon0);
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irtc_sfr_write(RTCCON2_CMD, rtccon2);
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}
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2021-02-04 13:51:55 +08:00
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void hal_rtc_init(void)
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{
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time_t sec = 0;
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struct tm tm_new = {0};
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2021-03-23 10:21:01 +08:00
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uint8_t temp;
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2021-02-04 13:51:55 +08:00
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2021-03-23 10:21:01 +08:00
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_init_rtc_clock();
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2021-02-04 13:51:55 +08:00
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temp = irtc_sfr_read(RTCCON0_CMD);
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2021-03-19 11:08:00 +08:00
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if (temp & RTC_CON0_PWRUP_FIRST) {
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temp &= ~RTC_CON0_PWRUP_FIRST;
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2021-02-04 13:51:55 +08:00
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irtc_sfr_write(RTCCON0_CMD, temp); /* First power on */
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2021-03-19 11:08:00 +08:00
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tm_new.tm_mday = 29;
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tm_new.tm_mon = 1 - 1;
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tm_new.tm_year = 2021 - 1900;
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sec = timegm(&tm_new);
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2021-02-04 13:51:55 +08:00
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2021-03-19 11:08:00 +08:00
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irtc_time_write(RTCCNT_CMD, sec);
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}
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2021-03-26 23:26:17 +08:00
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#ifdef RT_USING_ALARM
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RTCCON |= RTC_CON_ALM_INTERRUPT;
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#ifdef RTC_USING_1S_INT
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RTCCON |= RTC_CON_1S_INTERRUPT;
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#endif
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#endif
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2021-02-04 13:51:55 +08:00
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}
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/************** HAL End *******************/
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2021-03-26 23:26:17 +08:00
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static time_t get_rtc_time_stamp(void)
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2021-02-04 13:51:55 +08:00
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{
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time_t sec = 0;
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sec = irtc_time_read(RTCCNT_CMD);
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LOG_D("get rtc time.");
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2021-03-26 23:26:17 +08:00
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2021-02-04 13:51:55 +08:00
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return sec;
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}
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static rt_err_t set_rtc_time_stamp(time_t time_stamp)
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{
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irtc_time_write(RTCCNT_CMD, time_stamp);
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return RT_EOK;
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}
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2021-03-26 23:26:17 +08:00
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static rt_err_t set_rtc_alarm_stamp(time_t alarm_stamp)
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{
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irtc_time_write(RTCALM_CMD, alarm_stamp);
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return RT_EOK;
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}
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static time_t get_rtc_alarm_stamp(void)
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{
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time_t sec = 0;
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sec = irtc_time_read(RTCALM_CMD);
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return sec;
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}
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2021-02-04 13:51:55 +08:00
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static void rt_rtc_init(void)
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{
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hal_rtc_init();
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}
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2021-03-29 23:39:01 +08:00
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static rt_err_t ab32_rtc_control(rt_device_t dev, int cmd, void *args)
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2021-02-04 13:51:55 +08:00
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{
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rt_err_t result = RT_EOK;
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RT_ASSERT(dev != RT_NULL);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_RTC_GET_TIME:
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2021-03-26 23:26:17 +08:00
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*(rt_uint32_t *)args = get_rtc_time_stamp();
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LOG_D("RTC: get rtc_time %x", *(rt_uint32_t *)args);
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2021-02-04 13:51:55 +08:00
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break;
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case RT_DEVICE_CTRL_RTC_SET_TIME:
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if (set_rtc_time_stamp(*(rt_uint32_t *)args))
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{
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result = -RT_ERROR;
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}
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2021-03-26 23:26:17 +08:00
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LOG_D("RTC: set rtc_time %x", *(rt_uint32_t *)args);
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break;
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case RT_DEVICE_CTRL_RTC_SET_ALARM:
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if (set_rtc_alarm_stamp(*(rt_uint32_t *)args))
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{
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result = -RT_ERROR;
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}
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LOG_D("RTC: set alarm_stamp %x", *(rt_uint32_t *)args);
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break;
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case RT_DEVICE_CTRL_RTC_GET_ALARM:
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*(rt_uint32_t *)args = get_rtc_alarm_stamp();
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LOG_D("RTC: get alarm_stamp %x", *(rt_uint32_t *)args);
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2021-02-04 13:51:55 +08:00
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break;
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}
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return result;
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}
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#ifdef RT_USING_DEVICE_OPS
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const static struct rt_device_ops rtc_ops =
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{
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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RT_NULL,
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2021-03-29 23:39:01 +08:00
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ab32_rtc_control
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2021-02-04 13:51:55 +08:00
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};
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#endif
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static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
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{
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RT_ASSERT(device != RT_NULL);
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rt_rtc_init();
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#ifdef RT_USING_DEVICE_OPS
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device->ops = &rtc_ops;
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#else
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device->init = RT_NULL;
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device->open = RT_NULL;
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device->close = RT_NULL;
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device->read = RT_NULL;
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device->write = RT_NULL;
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2021-03-29 23:39:01 +08:00
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device->control = ab32_rtc_control;
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2021-02-04 13:51:55 +08:00
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#endif
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device->type = RT_Device_Class_RTC;
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device->rx_indicate = RT_NULL;
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device->tx_complete = RT_NULL;
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device->user_data = RT_NULL;
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/* register a character device */
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return rt_device_register(device, name, flag);
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}
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2021-03-26 23:26:17 +08:00
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#ifdef RT_USING_ALARM
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2021-04-09 17:35:26 +08:00
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RT_SECTION(".irq.rtc")
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2021-03-26 23:26:17 +08:00
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static void rtc_isr(int vector, void *param)
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{
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rt_interrupt_enter();
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if (RTCCON & RTC_CON_ALM_PEND)
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{
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RTCCPND |= RTC_CPND_ALM;
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}
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#ifdef RTC_USING_1S_INT
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if (RTCCON & RTC_CON_1S_PEND)
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{
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RTCCPND |= RTC_CPND_1S;
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}
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#endif
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rt_interrupt_leave();
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}
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#endif
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2021-02-04 13:51:55 +08:00
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int rt_hw_rtc_init(void)
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{
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rt_err_t result;
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2021-03-26 23:26:17 +08:00
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2021-02-04 13:51:55 +08:00
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result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
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if (result != RT_EOK)
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{
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LOG_E("rtc register err code: %d", result);
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return result;
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}
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2021-03-26 23:26:17 +08:00
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#ifdef RT_USING_ALARM
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rt_hw_interrupt_install(IRQ_RTC_VECTOR, rtc_isr, RT_NULL, "rtc_isr");
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#endif
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2021-02-04 13:51:55 +08:00
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LOG_D("rtc init success");
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_rtc_init);
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#endif /* BSP_USING_ONCHIP_RTC */
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