288 lines
12 KiB
Batchfile
288 lines
12 KiB
Batchfile
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MEMORY
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{
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PAGE 0: /* Program Memory */
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PAGE 1: /* Data Memory */
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ADCA_RESULT : origin = 0x000B00, length = 0x000020
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ADCB_RESULT : origin = 0x000B20, length = 0x000020
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ADCC_RESULT : origin = 0x000B40, length = 0x000020
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ADCD_RESULT : origin = 0x000B60, length = 0x000020
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ADCA : origin = 0x007400, length = 0x000080
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ADCB : origin = 0x007480, length = 0x000080
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ADCC : origin = 0x007500, length = 0x000080
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ADCD : origin = 0x007580, length = 0x000080
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ANALOG_SUBSYS : origin = 0x05D180, length = 0x000080
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CANA : origin = 0x048000, length = 0x000800
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CANB : origin = 0x04A000, length = 0x000800
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CLA1 : origin = 0x001400, length = 0x000040 /* CLA registers */
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CLB_XBAR : origin = 0x007A40, length = 0x000040
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CMPSS1 : origin = 0x005C80, length = 0x000020
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CMPSS2 : origin = 0x005CA0, length = 0x000020
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CMPSS3 : origin = 0x005CC0, length = 0x000020
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CMPSS4 : origin = 0x005CE0, length = 0x000020
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CMPSS5 : origin = 0x005D00, length = 0x000020
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CMPSS6 : origin = 0x005D20, length = 0x000020
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CMPSS7 : origin = 0x005D40, length = 0x000020
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CMPSS8 : origin = 0x005D60, length = 0x000020
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CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
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CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer1 registers */
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CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer2 registers */
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DACA : origin = 0x005C00, length = 0x000010
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DACB : origin = 0x005C10, length = 0x000010
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DACC : origin = 0x005C20, length = 0x000010
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DMA : origin = 0x001000, length = 0x000200
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DMACLASRCSEL : origin = 0x007980, length = 0x000040
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ECAP1 : origin = 0x005000, length = 0x000020 /* Enhanced Capture 1 registers */
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ECAP2 : origin = 0x005020, length = 0x000020 /* Enhanced Capture 2 registers */
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ECAP3 : origin = 0x005040, length = 0x000020 /* Enhanced Capture 3 registers */
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ECAP4 : origin = 0x005060, length = 0x000020 /* Enhanced Capture 4 registers */
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ECAP5 : origin = 0x005080, length = 0x000020 /* Enhanced Capture 5 registers */
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ECAP6 : origin = 0x0050A0, length = 0x000020 /* Enhanced Capture 6 registers */
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EMIF1 : origin = 0x047000, length = 0x000800
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EMIF2 : origin = 0x047800, length = 0x000800
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EQEP1 : origin = 0x005100, length = 0x000040 /* Enhanced QEP 1 registers */
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EQEP2 : origin = 0x005140, length = 0x000040 /* Enhanced QEP 2 registers */
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EQEP3 : origin = 0x005180, length = 0x000040 /* Enhanced QEP 3 registers */
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EPWM1 : origin = 0x004000, length = 0x000100 /* Enhanced PWM 1 registers */
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EPWM2 : origin = 0x004100, length = 0x000100 /* Enhanced PWM 2 registers */
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EPWM3 : origin = 0x004200, length = 0x000100 /* Enhanced PWM 3 registers */
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EPWM4 : origin = 0x004300, length = 0x000100 /* Enhanced PWM 4 registers */
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EPWM5 : origin = 0x004400, length = 0x000100 /* Enhanced PWM 5 registers */
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EPWM6 : origin = 0x004500, length = 0x000100 /* Enhanced PWM 6 registers */
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EPWM7 : origin = 0x004600, length = 0x000100 /* Enhanced PWM 7 registers */
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EPWM8 : origin = 0x004700, length = 0x000100 /* Enhanced PWM 8 registers */
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EPWM9 : origin = 0x004800, length = 0x000100 /* Enhanced PWM 9 registers */
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EPWM10 : origin = 0x004900, length = 0x000100 /* Enhanced PWM 10 registers */
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EPWM11 : origin = 0x004A00, length = 0x000100 /* Enhanced PWM 11 registers */
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EPWM12 : origin = 0x004B00, length = 0x000100 /* Enhanced PWM 12 registers */
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EPWM_XBAR : origin = 0x007A00, length = 0x000040
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FLASH0_CTRL : origin = 0x05F800, length = 0x000300
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FLASH0_ECC : origin = 0x05FB00, length = 0x000040
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GPIOCTRL : origin = 0x007C00, length = 0x000180 /* GPIO control registers */
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GPIODAT : origin = 0x007F00, length = 0x000030 /* GPIO data registers */
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OUTPUT_XBAR : origin = 0x007A80, length = 0x000040
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I2CA : origin = 0x007300, length = 0x000040 /* I2C-A registers */
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I2CB : origin = 0x007340, length = 0x000040 /* I2C-B registers */
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IPC : origin = 0x050000, length = 0x000024
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FLASHPUMPSEMAPHORE : origin = 0x050024, length = 0x000002
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ROMPREFETCH : origin = 0x05E608, length = 0x000002
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MEMCFG : origin = 0x05F400, length = 0x000080 /* Mem Config registers */
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EMIF1CONFIG : origin = 0x05F480, length = 0x000020 /* Emif-1 Config registers */
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EMIF2CONFIG : origin = 0x05F4A0, length = 0x000020 /* Emif-2 Config registers */
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ACCESSPROTECTION : origin = 0x05F4C0, length = 0x000040 /* Access Protection registers */
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MEMORYERROR : origin = 0x05F500, length = 0x000040 /* Access Protection registers */
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ROMWAITSTATE : origin = 0x05F540, length = 0x000002 /* ROM Config registers */
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MCBSPA : origin = 0x006000, length = 0x000040 /* McBSP-A registers */
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MCBSPB : origin = 0x006040, length = 0x000040 /* McBSP-A registers */
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NMIINTRUPT : origin = 0x007060, length = 0x000010 /* NMI Watchdog Interrupt Registers */
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PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
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PIE_VECT : origin = 0x000D00, length = 0x000200 /* PIE Vector Table */
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SCIA : origin = 0x007200, length = 0x000010 /* SCI-A registers */
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SCIB : origin = 0x007210, length = 0x000010 /* SCI-B registers */
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SCIC : origin = 0x007220, length = 0x000010 /* SCI-C registers */
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SCID : origin = 0x007230, length = 0x000010 /* SCI-D registers */
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SDFM1 : origin = 0x005E00, length = 0x000080 /* Sigma delta 1 registers */
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SDFM2 : origin = 0x005E80, length = 0x000080 /* Sigma delta 2 registers */
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SPIA : origin = 0x006100, length = 0x000010
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SPIB : origin = 0x006110, length = 0x000010
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SPIC : origin = 0x006120, length = 0x000010
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SPID : origin = 0x006130, length = 0x000010
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UPP : origin = 0x006200, length = 0x000100 /* uPP registers */
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DEV_CFG : origin = 0x05D000, length = 0x000180
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CLK_CFG : origin = 0x05D200, length = 0x000100
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CPU_SYS : origin = 0x05D300, length = 0x000100
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INPUT_XBAR : origin = 0x007900, length = 0x000020
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XBAR : origin = 0x007920, length = 0x000020
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SYNC_SOC : origin = 0x007940, length = 0x000010
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WD : origin = 0x007000, length = 0x000040
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XINT : origin = 0x007070, length = 0x000010
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DCSM_Z1 : origin = 0x05F000, length = 0x000030 /* Zone 1 Dual code security module registers */
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DCSM_Z2 : origin = 0x05F040, length = 0x000030 /* Zone 2 Dual code security module registers */
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DCSM_COMMON : origin = 0x05F070, length = 0x000010 /* Common Dual code security module registers */
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}
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SECTIONS
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{
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/*** PIE Vect Table and Boot ROM Variables Structures ***/
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UNION run = PIE_VECT, PAGE = 1
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{
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PieVectTableFile
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GROUP
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{
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EmuBModeVar
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EmuBootPinsVar
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}
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}
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AdcaResultFile : > ADCA_RESULT, PAGE = 1
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AdcbResultFile : > ADCB_RESULT, PAGE = 1
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AdccResultFile : > ADCC_RESULT, PAGE = 1
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AdcdResultFile : > ADCD_RESULT, PAGE = 1
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AdcaRegsFile : > ADCA, PAGE = 1
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AdcbRegsFile : > ADCB, PAGE = 1
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AdccRegsFile : > ADCC, PAGE = 1
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AdcdRegsFile : > ADCD, PAGE = 1
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AnalogSubsysRegsFile : > ANALOG_SUBSYS, PAGE = 1
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CanaRegsFile : > CANA, PAGE = 1
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CanbRegsFile : > CANB, PAGE = 1
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Cla1RegsFile : > CLA1, PAGE = 1
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Cla1SoftIntRegsFile : > PIE_CTRL, PAGE = 1, type=DSECT
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ClbXbarRegsFile : > CLB_XBAR PAGE = 1
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Cmpss1RegsFile : > CMPSS1, PAGE = 1
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Cmpss2RegsFile : > CMPSS2, PAGE = 1
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Cmpss3RegsFile : > CMPSS3, PAGE = 1
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Cmpss4RegsFile : > CMPSS4, PAGE = 1
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Cmpss5RegsFile : > CMPSS5, PAGE = 1
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Cmpss6RegsFile : > CMPSS6, PAGE = 1
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Cmpss7RegsFile : > CMPSS7, PAGE = 1
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Cmpss8RegsFile : > CMPSS8, PAGE = 1
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CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
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CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
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CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
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DacaRegsFile : > DACA PAGE = 1
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DacbRegsFile : > DACB PAGE = 1
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DaccRegsFile : > DACC PAGE = 1
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DcsmZ1RegsFile : > DCSM_Z1, PAGE = 1
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DcsmZ2RegsFile : > DCSM_Z2, PAGE = 1
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DcsmCommonRegsFile : > DCSM_COMMON, PAGE = 1
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DmaRegsFile : > DMA PAGE = 1
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DmaClaSrcSelRegsFile : > DMACLASRCSEL PAGE = 1
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ECap1RegsFile : > ECAP1, PAGE = 1
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ECap2RegsFile : > ECAP2, PAGE = 1
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ECap3RegsFile : > ECAP3, PAGE = 1
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ECap4RegsFile : > ECAP4, PAGE = 1
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ECap5RegsFile : > ECAP5, PAGE = 1
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ECap6RegsFile : > ECAP6, PAGE = 1
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Emif1RegsFile : > EMIF1 PAGE = 1
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Emif2RegsFile : > EMIF2 PAGE = 1
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EPwm1RegsFile : > EPWM1, PAGE = 1
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EPwm2RegsFile : > EPWM2, PAGE = 1
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EPwm3RegsFile : > EPWM3, PAGE = 1
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EPwm4RegsFile : > EPWM4, PAGE = 1
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EPwm5RegsFile : > EPWM5, PAGE = 1
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EPwm6RegsFile : > EPWM6, PAGE = 1
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EPwm7RegsFile : > EPWM7, PAGE = 1
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EPwm8RegsFile : > EPWM8, PAGE = 1
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EPwm9RegsFile : > EPWM9, PAGE = 1
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EPwm10RegsFile : > EPWM10, PAGE = 1
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EPwm11RegsFile : > EPWM11, PAGE = 1
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EPwm12RegsFile : > EPWM12, PAGE = 1
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EPwmXbarRegsFile : > EPWM_XBAR PAGE = 1
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EQep1RegsFile : > EQEP1, PAGE = 1
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EQep2RegsFile : > EQEP2, PAGE = 1
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EQep3RegsFile : > EQEP3, PAGE = 1
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Flash0CtrlRegsFile : > FLASH0_CTRL PAGE = 1
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Flash0EccRegsFile : > FLASH0_ECC PAGE = 1
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GpioCtrlRegsFile : > GPIOCTRL, PAGE = 1
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GpioDataRegsFile : > GPIODAT, PAGE = 1
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OutputXbarRegsFile : > OUTPUT_XBAR PAGE = 1
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I2caRegsFile : > I2CA, PAGE = 1
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I2cbRegsFile : > I2CB, PAGE = 1
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InputXbarRegsFile : > INPUT_XBAR PAGE = 1
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XbarRegsFile : > XBAR PAGE = 1
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IpcRegsFile : > IPC, PAGE = 1
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FlashPumpSemaphoreRegsFile : > FLASHPUMPSEMAPHORE, PAGE = 1
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RomPrefetchRegsFile : > ROMPREFETCH, PAGE = 1
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MemCfgRegsFile : > MEMCFG, PAGE = 1
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Emif1ConfigRegsFile : > EMIF1CONFIG, PAGE = 1
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Emif2ConfigRegsFile : > EMIF2CONFIG, PAGE = 1
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AccessProtectionRegsFile : > ACCESSPROTECTION, PAGE = 1
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MemoryErrorRegsFile : > MEMORYERROR, PAGE = 1
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RomWaitStateRegsFile : > ROMWAITSTATE, PAGE = 1
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McbspaRegsFile : > MCBSPA, PAGE = 1
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McbspbRegsFile : > MCBSPB, PAGE = 1
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UppRegsFile : > UPP, PAGE = 1
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NmiIntruptRegsFile : > NMIINTRUPT, PAGE = 1
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PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
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SciaRegsFile : > SCIA, PAGE = 1
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ScibRegsFile : > SCIB, PAGE = 1
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ScicRegsFile : > SCIC, PAGE = 1
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ScidRegsFile : > SCID, PAGE = 1
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Sdfm1RegsFile : > SDFM1, PAGE = 1
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Sdfm2RegsFile : > SDFM2, PAGE = 1
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SpiaRegsFile : > SPIA, PAGE = 1
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SpibRegsFile : > SPIB, PAGE = 1
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SpicRegsFile : > SPIC, PAGE = 1
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SpidRegsFile : > SPID, PAGE = 1
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DevCfgRegsFile : > DEV_CFG, PAGE = 1
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ClkCfgRegsFile : > CLK_CFG, PAGE = 1
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CpuSysRegsFile : > CPU_SYS, PAGE = 1
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SyncSocRegsFile : > SYNC_SOC, PAGE = 1
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WdRegsFile : > WD, PAGE = 1
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XintRegsFile : > XINT PAGE = 1
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MemCfgRegs : > MEMCFG PAGE = 1
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}
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/*
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//===========================================================================
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// End of file.
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//===========================================================================
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*/
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