412 lines
13 KiB
C
412 lines
13 KiB
C
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//###########################################################################
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//
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// FILE: interrupt.c
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//
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// TITLE: Stellaris style wrapper driver for C28x PIE Interrupt Controller.
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//
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//###########################################################################
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// $TI Release: F2837xD Support Library v3.05.00.00 $
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// $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
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// $Copyright:
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// Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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//*****************************************************************************
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//
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//! \addtogroup interrupt_api
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//! @{
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//
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//*****************************************************************************
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#include "F28x_Project.h"
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#include "inc/hw_types.h"
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#include "driverlib/interrupt.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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//*****************************************************************************
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//
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//! \internal
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//! The default interrupt handler.
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//!
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//! This is the default interrupt handler. Whenever an interrupt is
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//! unregisterd this handler takes it place.
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//!
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//! \return None.
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//
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//*****************************************************************************
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__interrupt void IntDefaultHandler(void)
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{
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asm(" ESTOP0");
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return;
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}
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//*****************************************************************************
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//
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//! Enables the processor interrupt.
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//!
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//! Allows the processor to respond to interrupts. This does not affect the
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//! set of interrupts enabled in the interrupt controller; it just gates the
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//! single interrupt from the controller to the processor.
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//!
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//! \note Previously, this function had no return value. As such, it was
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//! possible to include <tt>interrupt.h</tt> and call this function without
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//! having included <tt>hw_types.h</tt>. Now that the return is a
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//! <tt>bool</tt>, a compiler error will occur in this case. The solution
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//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
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//!
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//! \return Returns \b true if interrupts were disabled when the function was
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//! called or \b false if they were initially enabled.
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//
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//*****************************************************************************
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bool
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IntMasterEnable(void)
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{
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//
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// Enable processor interrupts.
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//
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return __enable_interrupts() & 0x1;
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}
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//*****************************************************************************
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//
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//! Disables the processor interrupt.
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//!
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//! Prevents the processor from receiving interrupts. This does not affect the
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//! set of interrupts enabled in the interrupt controller; it just gates the
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//! single interrupt from the controller to the processor.
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//!
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//! \note Previously, this function had no return value. As such, it was
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//! possible to include <tt>interrupt.h</tt> and call this function without
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//! having included <tt>hw_types.h</tt>. Now that the return is a
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//! <tt>bool</tt>, a compiler error will occur in this case. The solution
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//! is to include <tt>hw_types.h</tt> before including <tt>interrupt.h</tt>.
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//!
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//! \return Returns \b true if interrupts were already disabled when the
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//! function was called or \b false if they were initially enabled.
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//
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//*****************************************************************************
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bool
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IntMasterDisable(void)
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{
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//
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// Disable processor interrupts.
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//
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return __disable_interrupts() & 0x1;
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}
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//*****************************************************************************
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//
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//! Registers a function to be called when an interrupt occurs.
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//
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//! Assumes PIE is enabled
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//!
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//! \param ui32Interrupt specifies the interrupt in question.
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//! \param pfnHandler is a pointer to the function to be called.
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//!
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//! This function is used to specify the handler function to be called when the
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//! given interrupt is asserted to the processor. When the interrupt occurs,
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//! if it is enabled (via IntEnable()), the handler function will be called in
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//! interrupt context. Since the handler function can pre-empt other code, care
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//! must be taken to protect memory or peripherals that are accessed by the
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//! handler and other non-handler code.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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IntRegister(uint32_t ui32Interrupt, void (*pfnHandler)(void))
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{
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EALLOW;
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//Copy ISR address into PIE table
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memcpy((uint16_t *) &PieVectTable + ((ui32Interrupt & 0xFFFF0000) >> 16)*2, (uint16_t *) &pfnHandler, sizeof(pfnHandler));
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EDIS;
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}
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//*****************************************************************************
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//
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//! Unregisters the function to be called when an interrupt occurs.
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//!
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//! \param ui32Interrupt specifies the interrupt in question.
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//!
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//! This function is used to indicate that no handler should be called when the
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//! given interrupt is asserted to the processor. The interrupt source will be
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//! automatically disabled (via IntDisable()) if necessary.
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//!
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//! \sa IntRegister() for important information about registering interrupt
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//! handlers.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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IntUnregister(uint32_t ui32Interrupt)
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{
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uint32_t temp;
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temp = (uint32_t) IntDefaultHandler;
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EALLOW;
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//Copy default ISR address into PIE table
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memcpy((uint16_t *) &PieVectTable + ((ui32Interrupt & 0xFFFF0000) >> 16)*2, (uint16_t *) &temp, sizeof(temp));
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EDIS;
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}
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//*****************************************************************************
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//
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//! Enables an interrupt.
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//!
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//! \param ui32Interrupt specifies the interrupt to be enabled.
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//!
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//! The specified interrupt is enabled in the interrupt controller. Other
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//! enables for the interrupt (such as at the peripheral level) are unaffected
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//! by this function.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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IntEnable(uint32_t ui32Interrupt)
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{
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uint16_t ui16IntsEnabled;
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ui32Interrupt = ui32Interrupt >> 16;
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EALLOW;
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//Ensure that PIE is enabled
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PieCtrlRegs.PIECTRL.bit.ENPIE=1;
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ui16IntsEnabled = IntMasterDisable();
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if (ui32Interrupt >= 0x20 && ui32Interrupt <= 0x7F) //Lower PIE table
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{
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//Enable Individual PIE interrupt
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*(uint16_t *)((&PieCtrlRegs.PIEIER1.all) + (((ui32Interrupt-0x20)/8))*2) |= 1 << ((ui32Interrupt-0x20)%8);
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// Wait for any pending interrupts to get to the CPU
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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//Clear the CPU flag
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IntIFRClear(1 << ((ui32Interrupt - 0x20)/8));
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//Acknowlege any interrupts
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PieCtrlRegs.PIEACK.all = 1 << ((ui32Interrupt - 0x20)/8);
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//Enable PIE Group Interrupt
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IER |= 1 << ((ui32Interrupt - 0x20)/8);
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}
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else if (ui32Interrupt >= 0x80) //Upper PIE table
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{
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//Enable Individual PIE interrupt
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*(uint16_t *)((&PieCtrlRegs.PIEIER1.all) + (((ui32Interrupt-0x80)/8))*2) |= 1 << (((ui32Interrupt-0x80)%8)+8);
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// Wait for any pending interrupts to get to the CPU
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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//Clear the CPU flag
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IntIFRClear(1 << ((ui32Interrupt - 0x80)/8));
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//Acknowlege any interrupts
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PieCtrlRegs.PIEACK.all = 1 << ((ui32Interrupt - 0x80)/8);
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//Enable PIE Group Interrupt
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IER |= 1 << ((ui32Interrupt - 0x80)/8);
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}
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else if (ui32Interrupt >= 0x0D && ui32Interrupt <= 0x10) //INT13, INT14, DLOGINT, & RTOSINT
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{
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//Enable PIE Group Interrupt
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IER |= 1 << (ui32Interrupt - 1);
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}
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else
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{
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//Other interrupts
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}
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EDIS;
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//Re-enable interrupts if they were enabled
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if(!ui16IntsEnabled){
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IntMasterEnable();
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}
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}
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//*****************************************************************************
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//
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//! Disables an interrupt.
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//!
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//! \param ui32Interrupt specifies the interrupt to be disabled.
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//!
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//! The specified interrupt is disabled in the interrupt controller. Other
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//! enables for the interrupt (such as at the peripheral level) are unaffected
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//! by this function.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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IntDisable(uint32_t ui32Interrupt)
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{
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uint16_t ui16IntsEnabled;
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ui32Interrupt = ui32Interrupt >> 16;
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EALLOW;
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ui16IntsEnabled = IntMasterDisable();
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if (ui32Interrupt >= 0x20 && ui32Interrupt <= 0x7F) //Lower PIE table
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{
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//Disable Individual PIE interrupt
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*(uint16_t *)((&PieCtrlRegs.PIEIER1.all) + (((ui32Interrupt-0x20)/8))*2) &= ~(1 << ((ui32Interrupt-0x20)%8));
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// Wait for any pending interrupts to get to the CPU
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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//Clear the CPU flag
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IntIFRClear(1 << ((ui32Interrupt - 0x20)/8));
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//Acknowlege any interrupts
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PieCtrlRegs.PIEACK.all = 1 << ((ui32Interrupt - 0x20)/8);
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}
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else if (ui32Interrupt >= 0x80) //Upper PIE table
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{
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//Disable Individual PIE interrupt
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*(uint16_t *)((&PieCtrlRegs.PIEIER1.all) + (((ui32Interrupt-0x80)/8))*2) &= ~(1 << (((ui32Interrupt-0x80)%8)+8));
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// Wait for any pending interrupts to get to the CPU
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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asm(" nop");
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//Clear the CPU flag
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IntIFRClear(1 << ((ui32Interrupt - 0x80)/8));
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//Acknowlege any interrupts
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PieCtrlRegs.PIEACK.all = 1 << ((ui32Interrupt - 0x80)/8);
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}
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else if (ui32Interrupt >= 0x0D && ui32Interrupt <= 0x10) //INT13, INT14, DLOGINT, & RTOSINT //Work-around Case
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{
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//Disable PIE Group Interrupt
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IER &= ~(1 << (ui32Interrupt - 1));
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}
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else
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{
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//Other Interrupts
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}
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EDIS;
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//Re-enable interrupts if they were enabled
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if(!ui16IntsEnabled){
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IntMasterEnable();
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}
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}
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void IntIFRClear(uint16_t ui16Interrupts)
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{
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switch(ui16Interrupts){
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case 0x0001:
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IFR &= ~0x0001;
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break;
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case 0x0002:
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IFR &= ~0x0002;
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break;
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case 0x0004:
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IFR &= ~0x0004;
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break;
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case 0x0008:
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IFR &= ~0x0008;
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break;
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case 0x0010:
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IFR &= ~0x0010;
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break;
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case 0x0020:
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IFR &= ~0x0020;
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break;
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case 0x0040:
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IFR &= ~0x0040;
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break;
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case 0x0080:
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IFR &= ~0x0080;
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break;
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case 0x0100:
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IFR &= ~0x0100;
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break;
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case 0x0200:
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IFR &= ~0x0200;
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break;
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case 0x0400:
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IFR &= ~0x0400;
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break;
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case 0x0800:
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IFR &= ~0x0800;
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break;
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case 0x1000:
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|
|
IFR &= ~0x1000;
|
||
|
|
break;
|
||
|
|
case 0x2000:
|
||
|
|
IFR &= ~0x2000;
|
||
|
|
break;
|
||
|
|
case 0x4000:
|
||
|
|
IFR &= ~0x4000;
|
||
|
|
break;
|
||
|
|
case 0x8000:
|
||
|
|
IFR &= ~0x8000;
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// Close the Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
|
||
|
|
|