381 lines
9.4 KiB
C
381 lines
9.4 KiB
C
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/*
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* File : drv_i2c.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2017-06-05 tanek first implementation.
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* 2018-04-19 misonyo Porting for gd32f30x
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*/
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#include "drv_i2c.h"
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#include <rtthread.h>
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#include "gd32f30x.h"
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#ifdef RT_USING_I2C
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#include <rtdevice.h>
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#ifdef RT_USING_I2C_BITOPS
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/*user can change this*/
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#define I2C_BUS_NAME "i2c2"
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/*user should change this to adapt specific board*/
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#define I2C_SCL_PIN GPIO_PIN_4
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#define I2C_SCL_PORT GPIOE
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#define I2C_SCL_CLK RCU_GPIOE
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#define I2C_SDA_PIN GPIO_PIN_5
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#define I2C_SDA_PORT GPIOE
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#define I2C_SDA_CLK RCU_GPIOE
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struct gd32_i2c_bit_data
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{
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struct
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{
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rcu_periph_enum clk;
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rt_uint32_t port;
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rt_uint32_t pin;
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}scl, sda;
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};
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static void gpio_set_sda(void *data, rt_int32_t state)
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{
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struct gd32_i2c_bit_data* bd = data;
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if (state)
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{
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gpio_bit_set(bd->sda.port, bd->sda.pin);
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}
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else
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{
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gpio_bit_reset(bd->sda.port, bd->sda.pin);
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}
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}
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static void gpio_set_scl(void *data, rt_int32_t state)
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{
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struct gd32_i2c_bit_data* bd = data;
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if (state)
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{
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gpio_bit_set(bd->scl.port, bd->scl.pin);
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}
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else
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{
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gpio_bit_reset(bd->scl.port, bd->scl.pin);
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}
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}
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static rt_int32_t gpio_get_sda(void *data)
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{
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struct gd32_i2c_bit_data* bd = data;
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return gpio_input_bit_get(bd->sda.port, bd->sda.pin);
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}
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static rt_int32_t gpio_get_scl(void *data)
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{
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struct gd32_i2c_bit_data* bd = data;
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return gpio_input_bit_get(bd->scl.port, bd->scl.pin);
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}
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static void gpio_udelay(rt_uint32_t us)
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{
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int i = ( rcu_clock_freq_get(CK_SYS) / 4000000 * us);
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while(i)
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{
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i--;
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}
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}
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static void drv_i2c_gpio_init(const struct gd32_i2c_bit_data* bd)
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{
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rcu_periph_clock_enable(bd->sda.clk);
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rcu_periph_clock_enable(bd->scl.clk);
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gpio_init(bd->sda.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->sda.pin);
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gpio_init(bd->scl.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->scl.pin);
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gpio_bit_set(bd->sda.port, bd->sda.pin);
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gpio_bit_set(bd->scl.port, bd->scl.pin);
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}
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#else /* use hardware i2c */
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struct gd32_i2c_bus
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{
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struct rt_i2c_bus_device parent;
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rt_uint32_t i2c_periph;
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};
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static int gd32_i2c_read(rt_uint32_t i2c_periph, rt_uint16_t slave_address, rt_uint8_t* p_buffer, rt_uint16_t data_byte)
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{
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/* wait until I2C bus is idle */
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while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
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/* send a start condition to I2C bus */
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i2c_start_on_bus(i2c_periph);
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/* wait until SBSEND bit is set */
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while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
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/* send slave address to I2C bus */
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i2c_master_addressing(i2c_periph, slave_address<<1, I2C_RECEIVER);
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/* wait until ADDSEND bit is set */
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while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
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/* clear the ADDSEND bit */
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i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
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if(1 == data_byte){
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/* disable acknowledge */
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i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(i2c_periph);
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}
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/* while there is data to be read */
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while(data_byte)
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{
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/* wait until the RBNE bit is set and clear it */
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if(i2c_flag_get(i2c_periph, I2C_FLAG_RBNE))
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{
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/* read a byte from the EEPROM */
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*p_buffer = i2c_data_receive(i2c_periph);
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/* point to the next location where the byte read will be saved */
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p_buffer++;
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/* decrement the read bytes counter */
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data_byte--;
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if(1 == data_byte)
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{
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/* disable acknowledge */
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i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(i2c_periph);
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}
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}
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}
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/* wait until the stop condition is finished */
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while(I2C_CTL0(i2c_periph)&0x0200);
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/* enable acknowledge */
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i2c_ack_config(i2c_periph,I2C_ACK_ENABLE);
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i2c_ackpos_config(i2c_periph,I2C_ACKPOS_CURRENT);
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return 0;
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}
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static int gd32_i2c_write(rt_uint32_t i2c_periph, uint16_t slave_address, uint8_t* p_buffer, uint16_t data_byte)
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{
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/* wait until I2C bus is idle */
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while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
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/* send a start condition to I2C bus */
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i2c_start_on_bus(i2c_periph);
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/* wait until SBSEND bit is set */
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while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
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/* send slave address to I2C bus */
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i2c_master_addressing(i2c_periph, slave_address<<1, I2C_TRANSMITTER);
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/* wait until ADDSEND bit is set */
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while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
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/* clear the ADDSEND bit */
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i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
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/* wait until the transmit data buffer is empty */
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while(SET != i2c_flag_get( i2c_periph , I2C_FLAG_TBE));
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/* while there is data to be read */
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while(data_byte)
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{
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i2c_data_transmit(i2c_periph, *p_buffer);
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/* point to the next byte to be written */
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p_buffer++;
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/* decrement the write bytes counter */
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data_byte --;
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/* wait until BTC bit is set */
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while(!i2c_flag_get(i2c_periph, I2C_FLAG_BTC));
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}
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/* send a stop condition to I2C bus */
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i2c_stop_on_bus(i2c_periph);
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/* wait until the stop condition is finished */
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while(I2C_CTL0(i2c_periph)&0x0200);
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return 0;
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}
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static rt_size_t gd32_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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rt_uint32_t i;
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rt_err_t ret = RT_ERROR;
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struct gd32_i2c_bus *gd32_i2c = (struct gd32_i2c_bus *)bus;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_ADDR_10BIT)
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{
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i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_10BITS,0);
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}
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else
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{
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i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_7BITS,0);
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}
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if (msg->flags & RT_I2C_RD)
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{
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if (gd32_i2c_read(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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else
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{
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if (gd32_i2c_write(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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}
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ret = i;
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out:
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i2c_dbg("send stop condition\n");
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return ret;
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}
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static const struct rt_i2c_bus_device_ops i2c_ops =
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{
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gd32_i2c_xfer,
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RT_NULL,
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RT_NULL
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};
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#endif /* RT_USING_I2C_BITOPS */
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int rt_hw_i2c_init(void)
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{
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#ifdef RT_USING_I2C_BITOPS
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{
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static struct rt_i2c_bus_device i2c_device;
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static const struct gd32_i2c_bit_data _i2c_bdata =
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{
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/* SCL */
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{ I2C_SCL_CLK, I2C_SCL_PORT, I2C_SCL_PIN},
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/* SDA */
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{ I2C_SDA_CLK, I2C_SDA_PORT, I2C_SDA_PIN},
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};
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static const struct rt_i2c_bit_ops _i2c_bit_ops =
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{
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(void*)&_i2c_bdata,
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gpio_set_sda,
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gpio_set_scl,
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gpio_get_sda,
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gpio_get_scl,
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gpio_udelay,
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1,
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100
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};
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drv_i2c_gpio_init(&_i2c_bdata);
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i2c_device.priv = (void *)&_i2c_bit_ops;
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rt_i2c_bit_add_bus(&i2c_device, I2C_BUS_NAME);
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}
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#else /* register hardware I2C */
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#ifdef RT_USING_I2C0
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#define I2C0_SPEED 100000
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static struct gd32_i2c_bus gd32_i2c0;
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/* enable GPIOB clock */
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rcu_periph_clock_enable(RCU_GPIOB);
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/* connect PB6 to I2C0_SCL, PB7 to I2C0_SDA */
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gpio_init(GPIOB, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, GPIO_PIN_6 | GPIO_PIN_7);
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/* enable I2C clock */
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rcu_periph_clock_enable(RCU_I2C0);
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/* configure I2C clock */
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i2c_clock_config(I2C0,I2C0_SPEED,I2C_DTCY_2);
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i2c_enable(I2C0);
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/* enable acknowledge */
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i2c_ack_config(I2C0,I2C_ACK_ENABLE);
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rt_memset((void *)&gd32_i2c0, 0, sizeof(struct gd32_i2c_bus));
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gd32_i2c0.parent.ops = &i2c_ops;
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gd32_i2c0.i2c_periph = I2C0;
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rt_i2c_bus_device_register(&gd32_i2c0.parent, "i2c0");
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#endif
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#ifdef RT_USING_I2C1
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#define I2C1_SPEED 100000
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static struct gd32_i2c_bus gd32_i2c1;
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/* enable GPIOB clock */
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rcu_periph_clock_enable(RCU_GPIOB);
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/* connect PB10 to I2C1_SCL, PB11 to I2C1_SDA */
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gpio_init(GPIOB, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, GPIO_PIN_10 | GPIO_PIN_11);
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|
|
||
|
|
/* enable I2C clock */
|
||
|
|
rcu_periph_clock_enable(RCU_I2C1);
|
||
|
|
/* configure I2C clock */
|
||
|
|
i2c_clock_config(I2C1,I2C1_SPEED,I2C_DTCY_2);
|
||
|
|
|
||
|
|
i2c_enable(I2C1);
|
||
|
|
/* enable acknowledge */
|
||
|
|
i2c_ack_config(I2C1,I2C_ACK_ENABLE);
|
||
|
|
|
||
|
|
rt_memset((void *)&gd32_i2c1, 0, sizeof(struct gd32_i2c_bus));
|
||
|
|
gd32_i2c1.parent.ops = &i2c_ops;
|
||
|
|
gd32_i2c1.i2c_periph = I2C1;
|
||
|
|
rt_i2c_bus_device_register(&gd32_i2c1.parent, "i2c1");
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* RT_USING_I2C_BITOPS */
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
|
||
|
|
|
||
|
|
#endif
|
||
|
|
/* end of i2c driver */
|