374 lines
19 KiB
C
374 lines
19 KiB
C
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/**************************************************************************//**
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* @file sys.h
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* @brief N9H30 SYS driver header file
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __NU_SYS_H__
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#define __NU_SYS_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup N9H30_Device_Driver N9H30 Device Driver
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@{
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*/
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/** @addtogroup N9H30_SYS_Driver SYS Driver
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@{
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*/
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/** @addtogroup N9H30_SYS_EXPORTED_CONSTANTS SYS Exported Constants
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@{
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*/
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/**
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* @details Interrupt Number Definition.
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*/
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typedef enum IRQn
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{
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/****** N9H30 Specific Interrupt Numbers *****************************************/
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WDT_IRQn = 1, /*!< Watch Dog Timer Interrupt */
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WWDT_IRQn = 2, /*!< Windowed-WDT Interrupt */
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LVD_IRQn = 3, /*!< Low Voltage Detect Interrupt */
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EINT0_IRQn = 4, /*!< External Interrupt 0 */
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EINT1_IRQn = 5, /*!< External Interrupt 1 */
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EINT2_IRQn = 6, /*!< External Interrupt 2 */
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EINT3_IRQn = 7, /*!< External Interrupt 3 */
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EINT4_IRQn = 8, /*!< External Interrupt 4 */
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EINT5_IRQn = 9, /*!< External Interrupt 5 */
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EINT6_IRQn = 10, /*!< External Interrupt 6 */
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EINT7_IRQn = 11, /*!< External Interrupt 7 */
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ACTL_IRQn = 12, /*!< Audio Controller Interrupt */
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LCD_IRQn = 13, /*!< LCD Controller Interrupt */
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CAP_IRQn = 14, /*!< Sensor Interface Controller Interrupt */
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RTC_IRQn = 15, /*!< Real Time Clock Interrupt */
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TMR0_IRQn = 16, /*!< Timer 0 Interrupt */
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TMR1_IRQn = 17, /*!< Timer 1 Interrupt */
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ADC_IRQn = 18, /*!< ADC Interrupt */
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EMC0_RX_IRQn = 19, /*!< EMC 0 RX Interrupt */
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EMC1_RX_IRQn = 20, /*!< EMC 1 RX Interrupt */
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EMC0_TX_IRQn = 21, /*!< EMC 0 TX Interrupt */
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EMC1_TX_IRQn = 22, /*!< EMC 1 TX Interrupt */
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EHCI_IRQn = 23, /*!< USB 2.0 Host Controller Interrupt */
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OHCI_IRQn = 24, /*!< USB 1.1 Host Controller Interrupt */
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GDMA0_IRQn = 25, /*!< GDMA Channel 0 Interrupt */
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GDMA1_IRQn = 26, /*!< GDMA Channel 1 Interrupt */
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SDH_IRQn = 27, /*!< SD/SDIO Host Interrupt */
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FMI_IRQn = 28, /*!< FMI Interrupt */
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USBD_IRQn = 29, /*!< USB Device Interrupt */
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TMR2_IRQn = 30, /*!< Timer 2 Interrupt */
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TMR3_IRQn = 31, /*!< Timer 3 Interrupt */
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TMR4_IRQn = 32, /*!< Timer 4 Interrupt */
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JPEG_IRQn = 33, /*!< JPEG Engine Interrupt */
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GE2D_IRQn = 34, /*!< 2D Graphic Engine Interrupt */
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CRPT_IRQn = 35, /*!< Cryptographic Accelerator Interrupt */
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UART0_IRQn = 36, /*!< UART 0 Interrupt */
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UART1_IRQn = 37, /*!< UART 1 Interrupt */
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UART2_IRQn = 38, /*!< UART 2 Interrupt */
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UART4_IRQn = 39, /*!< UART 4 Interrupt */
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UART6_IRQn = 40, /*!< UART 6 Interrupt */
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UART8_IRQn = 41, /*!< UART 8 Interrupt */
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UART10_IRQn = 42, /*!< UART 10 Interrupt */
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UART3_IRQn = 43, /*!< UART 3 Interrupt */
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UART5_IRQn = 44, /*!< UART 5 Interrupt */
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UART7_IRQn = 45, /*!< UART 7 Interrupt */
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UART9_IRQn = 46, /*!< UART 9 Interrupt */
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ETMR0_IRQn = 47, /*!< Enhanced Timer 0 Interrupt */
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ETMR1_IRQn = 48, /*!< Enhanced Timer 1 Interrupt */
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ETMR2_IRQn = 49, /*!< Enhanced Timer 2 Interrupt */
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ETMR3_IRQn = 50, /*!< Enhanced Timer 3 Interrupt */
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SPI0_IRQn = 51, /*!< SPI 0 Interrupt */
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SPI1_IRQn = 52, /*!< SPI 1 Interrupt */
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I2C0_IRQn = 53, /*!< I2C 0 Interrupt */
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I2C1_IRQn = 54, /*!< I2C 1 Interrupt */
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SC0_IRQn = 55, /*!< Smart Card 0 Interrupt */
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SC1_IRQn = 56, /*!< Smart Card 1 Interrupt */
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GPIO_IRQn = 57, /*!< GPIO Interrupt */
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CAN0_IRQn = 58, /*!< CAN 0 Interrupt */
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CAN1_IRQn = 59, /*!< CAN 1 Interrupt */
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PWM_IRQn = 60, /*!< PWM Interrupt */
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/* Renaming for RTT porting */
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IRQ_WDT = 1, /*!< Watch Dog Timer Interrupt */
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IRQ_WWDT = 2, /*!< Windowed-WDT Interrupt */
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IRQ_LVD = 3, /*!< Low Voltage Detect Interrupt */
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IRQ_EINT0 = 4, /*!< External Interrupt 0 */
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IRQ_EINT1 = 5, /*!< External Interrupt 1 */
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IRQ_EINT2 = 6, /*!< External Interrupt 2 */
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IRQ_EINT3 = 7, /*!< External Interrupt 3 */
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IRQ_EINT4 = 8, /*!< External Interrupt 4 */
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IRQ_EINT5 = 9, /*!< External Interrupt 5 */
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IRQ_EINT6 = 10, /*!< External Interrupt 6 */
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IRQ_EINT7 = 11, /*!< External Interrupt 7 */
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IRQ_ACTL = 12, /*!< Audio Controller Interrupt */
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IRQ_LCD = 13, /*!< LCD Controller Interrupt */
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IRQ_CAP = 14, /*!< Sensor Interface Controller Interrupt */
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IRQ_RTC = 15, /*!< Real Time Clock Interrupt */
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IRQ_TMR0 = 16, /*!< Timer 0 Interrupt */
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IRQ_TMR1 = 17, /*!< Timer 1 Interrupt */
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IRQ_ADC = 18, /*!< ADC Interrupt */
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IRQ_EMC0_RX = 19, /*!< EMC 0 RX Interrupt */
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IRQ_EMC1_RX = 20, /*!< EMC 1 RX Interrupt */
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IRQ_EMC0_TX = 21, /*!< EMC 0 TX Interrupt */
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IRQ_EMC1_TX = 22, /*!< EMC 1 TX Interrupt */
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IRQ_EHCI = 23, /*!< USB 2.0 Host Controller Interrupt */
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IRQ_OHCI = 24, /*!< USB 1.1 Host Controller Interrupt */
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IRQ_GDMA0 = 25, /*!< GDMA Channel 0 Interrupt */
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IRQ_GDMA1 = 26, /*!< GDMA Channel 1 Interrupt */
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IRQ_SDH = 27, /*!< SD/SDIO Host Interrupt */
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IRQ_FMI = 28, /*!< FMI Interrupt */
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IRQ_USBD = 29, /*!< USB Device Interrupt */
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IRQ_TMR2 = 30, /*!< Timer 2 Interrupt */
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IRQ_TMR3 = 31, /*!< Timer 3 Interrupt */
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IRQ_TMR4 = 32, /*!< Timer 4 Interrupt */
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IRQ_JPEG = 33, /*!< JPEG Engine Interrupt */
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IRQ_GE2D = 34, /*!< 2D Graphic Engine Interrupt */
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IRQ_CRPT = 35, /*!< Cryptographic Accelerator Interrupt */
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IRQ_UART0 = 36, /*!< UART 0 Interrupt */
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IRQ_UART1 = 37, /*!< UART 1 Interrupt */
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IRQ_UART2 = 38, /*!< UART 2 Interrupt */
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IRQ_UART4 = 39, /*!< UART 4 Interrupt */
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IRQ_UART6 = 40, /*!< UART 6 Interrupt */
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IRQ_UART8 = 41, /*!< UART 8 Interrupt */
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IRQ_UART10 = 42, /*!< UART 10 Interrupt */
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IRQ_UART3 = 43, /*!< UART 3 Interrupt */
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IRQ_UART5 = 44, /*!< UART 5 Interrupt */
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IRQ_UART7 = 45, /*!< UART 7 Interrupt */
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IRQ_UART9 = 46, /*!< UART 9 Interrupt */
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IRQ_ETMR0 = 47, /*!< Enhanced Timer 0 Interrupt */
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IRQ_ETMR1 = 48, /*!< Enhanced Timer 1 Interrupt */
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IRQ_ETMR2 = 49, /*!< Enhanced Timer 2 Interrupt */
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IRQ_ETMR3 = 50, /*!< Enhanced Timer 3 Interrupt */
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IRQ_SPI0 = 51, /*!< SPI 0 Interrupt */
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IRQ_SPI1 = 52, /*!< SPI 1 Interrupt */
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IRQ_I2C0 = 53, /*!< I2C 0 Interrupt */
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IRQ_I2C1 = 54, /*!< I2C 1 Interrupt */
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IRQ_SC0 = 55, /*!< Smart Card 0 Interrupt */
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IRQ_SC1 = 56, /*!< Smart Card 1 Interrupt */
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IRQ_GPIO = 57, /*!< GPIO Interrupt */
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IRQ_CAN0 = 58, /*!< CAN 0 Interrupt */
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IRQ_CAN1 = 59, /*!< CAN 1 Interrupt */
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IRQ_PWM = 60, /*!< PWM Interrupt */
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}
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IRQn_Type;
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/* Define constants for use timer in service parameters. */
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#define TIMER0 0 /*!< Select Timer0 */
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#define TIMER1 1 /*!< Select Timer1 */
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#define ONE_SHOT_MODE 0 /*!< Timer Operation Mode - One Shot */
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#define PERIODIC_MODE 1 /*!< Timer Operation Mode - Periodic */
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#define TOGGLE_MODE 2 /*!< Timer Operation Mode - Toggle */
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/* The parameters for sysSetInterruptPriorityLevel() and
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sysInstallISR() use */
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#define FIQ_LEVEL_0 0 /*!< FIQ Level 0 */
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#define IRQ_LEVEL_1 1 /*!< IRQ Level 1 */
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#define IRQ_LEVEL_2 2 /*!< IRQ Level 2 */
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#define IRQ_LEVEL_3 3 /*!< IRQ Level 3 */
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#define IRQ_LEVEL_4 4 /*!< IRQ Level 4 */
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#define IRQ_LEVEL_5 5 /*!< IRQ Level 5 */
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#define IRQ_LEVEL_6 6 /*!< IRQ Level 6 */
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#define IRQ_LEVEL_7 7 /*!< IRQ Level 7 */
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#define ONE_HALF_SECS 0 /*!< WDT interval - 1.5s */
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#define FIVE_SECS 1 /*!< WDT interval - 5s */
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#define TEN_SECS 2 /*!< WDT interval - 10s */
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#define TWENTY_SECS 3 /*!< WDT interval - 20s */
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/* Define constants for use AIC in service parameters. */
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#define SYS_SWI 0 /*!< Exception - SWI */
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#define SYS_D_ABORT 1 /*!< Exception - Data abort */
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#define SYS_I_ABORT 2 /*!< Exception - Instruction abort */
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#define SYS_UNDEFINE 3 /*!< Exception - undefine */
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/* The parameters for sysSetLocalInterrupt() use */
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#define ENABLE_IRQ 0x7F /*!< Enable I-bit of CP15 */
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#define ENABLE_FIQ 0xBF /*!< Enable F-bit of CP15 */
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#define ENABLE_FIQ_IRQ 0x3F /*!< Enable I-bit and F-bit of CP15 */
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#define DISABLE_IRQ 0x80 /*!< Disable I-bit of CP15 */
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#define DISABLE_FIQ 0x40 /*!< Disable F-bit of CP15 */
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#define DISABLE_FIQ_IRQ 0xC0 /*!< Disable I-bit and F-bit of CP15 */
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/* Define Cache type */
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#define CACHE_WRITE_BACK 0 /*!< Cache Write-back mode */
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#define CACHE_WRITE_THROUGH 1 /*!< Cache Write-through mode */
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#define CACHE_DISABLE -1 /*!< Cache Disable */
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/** \brief Structure type of clock source
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*/
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typedef enum CLKn
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{
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SYS_UPLL = 1, /*!< UPLL clock */
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SYS_APLL = 2, /*!< APLL clock */
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SYS_SYSTEM = 3, /*!< System clock */
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SYS_HCLK1 = 4, /*!< HCLK1 clock */
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SYS_HCLK234 = 5, /*!< HCLK234 clock */
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SYS_PCLK = 6, /*!< PCLK clock */
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SYS_CPU = 7, /*!< CPU clock */
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} CLK_Type;
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/// @cond HIDDEN_SYMBOLS
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typedef struct datetime_t
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{
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UINT32 year;
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UINT32 mon;
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UINT32 day;
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UINT32 hour;
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UINT32 min;
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UINT32 sec;
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} DateTime_T;
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/* The parameters for sysSetInterruptType() use */
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#define LOW_LEVEL_SENSITIVE 0x00
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#define HIGH_LEVEL_SENSITIVE 0x40
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#define NEGATIVE_EDGE_TRIGGER 0x80
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#define POSITIVE_EDGE_TRIGGER 0xC0
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/* The parameters for sysSetGlobalInterrupt() use */
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#define ENABLE_ALL_INTERRUPTS 0
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#define DISABLE_ALL_INTERRUPTS 1
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#define MMU_DIRECT_MAPPING 0
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#define MMU_INVERSE_MAPPING 1
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/* Define constants for use Cache in service parameters. */
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#define CACHE_4M 2
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#define CACHE_8M 3
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#define CACHE_16M 4
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#define CACHE_32M 5
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#define I_CACHE 6
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#define D_CACHE 7
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#define I_D_CACHE 8
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/**
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* @brief Disable register write-protection function
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* @param None
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* @return None
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* @details This function disable register write-protection function.
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* To unlock the protected register to allow write access.
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*/
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static __inline void SYS_UnlockReg(void)
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{
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do
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{
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outpw(0xB00001FC, 0x59UL);
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outpw(0xB00001FC, 0x16UL);
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outpw(0xB00001FC, 0x88UL);
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}
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while (inpw(0xB00001FC) == 0UL);
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}
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/**
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* @brief Enable register write-protection function
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* @param None
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* @return None
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* @details This function is used to enable register write-protection function.
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* To lock the protected register to forbid write access.
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*/
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static __inline void SYS_LockReg(void)
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{
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outpw(0xB00001FC, 0);
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}
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/// @endcond HIDDEN_SYMBOLS
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/*@}*/ /* end of group N9H30_SYS_EXPORTED_CONSTANTS */
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/** @addtogroup N9H30_SYS_EXPORTED_FUNCTIONS SYS Exported Functions
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@{
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*/
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/* Define system library Timer functions */
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UINT32 sysGetTicks(INT32 nTimeNo);
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INT32 sysResetTicks(INT32 nTimeNo);
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INT32 sysUpdateTickCount(INT32 nTimeNo, UINT32 uCount);
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INT32 sysSetTimerReferenceClock(INT32 nTimeNo, UINT32 uClockRate);
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INT32 sysStartTimer(INT32 nTimeNo, UINT32 uTicksPerSecond, INT32 nOpMode);
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INT32 sysStopTimer(INT32 nTimeNo);
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void sysClearWatchDogTimerCount(void);
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void sysClearWatchDogTimerInterruptStatus(void);
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void sysDisableWatchDogTimer(void);
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void sysDisableWatchDogTimerReset(void);
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void sysEnableWatchDogTimer(void);
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void sysEnableWatchDogTimerReset(void);
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PVOID sysInstallWatchDogTimerISR(INT32 nIntTypeLevel, PVOID pvNewISR);
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INT32 sysSetWatchDogTimerInterval(INT32 nWdtInterval);
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INT32 sysSetTimerEvent(INT32 nTimeNo, UINT32 uTimeTick, PVOID pvFun);
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void sysClearTimerEvent(INT32 nTimeNo, UINT32 uTimeEventNo);
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void sysSetLocalTime(DateTime_T ltime); /*!< Set local time \hideinitializer */
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void sysGetCurrentTime(DateTime_T *curTime); /*!< Get current time \hideinitializer */
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void sysDelay(UINT32 uTicks);
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/* Define system library UART functions */
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//INT8 sysGetChar(void);
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//INT32 sysInitializeUART(void);
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//void sysprintf(PINT8 pcStr, ...);
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//void sysPutChar(UINT8 ucCh);
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//INT sysIsKbHit(void);
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/* Define system library AIC functions */
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INT32 sysDisableInterrupt(IRQn_Type eIntNo);
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INT32 sysEnableInterrupt(IRQn_Type eIntNo);
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BOOL sysGetIBitState(void); /*!< Get I bit state \hideinitializer */
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UINT32 sysGetInterruptEnableStatus(void); /*!< Get interrupt enable status \hideinitializer */
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UINT32 sysGetInterruptEnableStatusH(void); /*!< Get interrupt enable status \hideinitializer */
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PVOID sysInstallExceptionHandler(INT32 nExceptType, PVOID pvNewHandler);
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PVOID sysInstallFiqHandler(PVOID pvNewISR);
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PVOID sysInstallIrqHandler(PVOID pvNewISR);
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PVOID sysInstallISR(INT32 nIntTypeLevel, IRQn_Type eIntNo, PVOID pvNewISR);
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INT32 sysSetGlobalInterrupt(INT32 nIntState); /*!< Enable/Disable all interrupt \hideinitializer */
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INT32 sysSetInterruptPriorityLevel(IRQn_Type eIntNo, UINT32 uIntLevel);
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INT32 sysSetInterruptType(IRQn_Type eIntNo, UINT32 uIntSourceType); /*!< Change interrupt type \hideinitializer */
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INT32 sysSetLocalInterrupt(INT32 nIntState);
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/* Define system library Cache functions */
|
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void sysDisableCache(void);
|
||
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INT32 sysEnableCache(UINT32 uCacheOpMode);
|
||
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void sysFlushCache(INT32 nCacheType); /*!< flush cache \hideinitializer */
|
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BOOL sysGetCacheState(void); /*!< get cache state \hideinitializer */
|
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INT32 sysGetSdramSizebyMB(void); /*!< Get DRAM size \hideinitializer */
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void sysInvalidCache(void); /*!< invalid cache \hideinitializer */
|
||
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INT32 sysSetCachePages(UINT32 addr, INT32 size, INT32 cache_mode); /*!< set cache page \hideinitializer */
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int sysSetMMUMappingMethod(int mode); /*!< MMU mapping \hideinitializer */
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|
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UINT32 sysGetClock(CLK_Type clk);
|
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|
||
|
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typedef void (*sys_pvFunPtr)(); /* function pointer */
|
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/// @cond HIDDEN_SYMBOLS
|
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|
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extern sys_pvFunPtr sysIrqHandlerTable[];
|
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|
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extern BOOL volatile _sys_bIsAICInitial;
|
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/// @endcond
|
||
|
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#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
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|
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|
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/*@}*/ /* end of group N9H30_SYS_EXPORTED_FUNCTIONS */
|
||
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|
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|
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/*@}*/ /* end of group N9H30_SYS_Driver */
|
||
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|
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/*@}*/ /* end of group N9H30_Device_Driver */
|
||
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||
|
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#endif //__NU_SYS_H__
|
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/*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/
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