359 lines
12 KiB
C
359 lines
12 KiB
C
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/**************************************************************************//**
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* @file nu_scu.h
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* @version V3.00
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* @brief Secure Configuration Unit Driver Header
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*
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* @copyright SPDX-License-Identifier: Apache-2.0
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* @copyright Copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#ifndef __NU_SCU_H__
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#define __NU_SCU_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup SCU_Driver SCU Driver
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@{
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*/
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/** @addtogroup SCU_EXPORTED_CONSTANTS SCU Exported Constants
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@{
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*/
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/**
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* @details Non-secure Attribution Definition.
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*/
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typedef enum NSATTR
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{
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/****** PNNSET0 **********************************************************************************/
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USBH_Attr = 9,
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SDH0_Attr = 13,
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EBI_Attr = 16,
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PDMA1_Attr = 24,
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/****** PNNSET1 **********************************************************************************/
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CRC_Attr = 32 + 17,
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CRPT_Attr = 32 + 18,
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/****** PNNSET2 **********************************************************************************/
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EWDT_Attr = 64 + 2,
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EADC_Attr = 64 + 3,
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ACMP01_Attr = 64 + 5,
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DAC_Attr = 64 + 7,
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I2S0_Attr = 64 + 8,
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OTG_Attr = 64 + 13,
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TMR23_Attr = 64 + 17,
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TMR45_Attr = 64 + 18,
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EPWM0_Attr = 64 + 24,
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EPWM1_Attr = 64 + 25,
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BPWM0_Attr = 64 + 26,
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BPWM1_Attr = 64 + 27,
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/****** PNNSET3 **********************************************************************************/
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QSPI0_Attr = 96 + 0,
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SPI0_Attr = 96 + 1,
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SPI1_Attr = 96 + 2,
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SPI2_Attr = 96 + 3,
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SPI3_Attr = 96 + 4,
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UART0_Attr = 96 + 16,
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UART1_Attr = 96 + 17,
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UART2_Attr = 96 + 18,
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UART3_Attr = 96 + 19,
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UART4_Attr = 96 + 20,
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UART5_Attr = 96 + 21,
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/****** PNNSET4 **********************************************************************************/
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I2C0_Attr = 128 + 0,
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I2C1_Attr = 128 + 1,
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I2C2_Attr = 128 + 2,
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SC0_Attr = 128 + 16,
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SC1_Attr = 128 + 17,
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SC2_Attr = 128 + 18,
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/****** PNNSET5 **********************************************************************************/
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CAN0_Attr = 160 + 0,
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QEI0_Attr = 160 + 16,
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QEI1_Attr = 160 + 17,
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ECAP0_Attr = 160 + 20,
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ECAP1_Attr = 160 + 21,
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TRNG_Attr = 160 + 25,
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LCD_Attr = 160 + 27,
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/****** PNNSET6 **********************************************************************************/
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USBD_Attr = 192 + 0,
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USCI0_Attr = 192 + 16,
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USCI1_Attr = 192 + 17
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} NSATTR_T;
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/**@}*/ /* end of group SCU_EXPORTED_CONSTANTS */
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/** @addtogroup SCU_EXPORTED_FUNCTIONS SCU Exported Functions
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@{
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*/
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/**
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* @brief Set peripheral non-secure attribution
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*
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* @param[in] nsattr The secure/non-secure attribution of specified module.
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The possible value could be refer to \ref NSATTR.
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*
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* @return None
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*
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* @details This macro is used to set a peripheral to be non-secure peripheral.
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*
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*/
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#define SCU_SET_PNSSET(nsattr) { SCU->PNSSET[(nsattr)/32] |= (1 << ((nsattr) & 0x1ful)); }
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/**
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* @brief Get peripheral secure/non-secure attribution
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*
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* @param[in] nsattr The secure/non-secure attribution of specified module.
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The possible value could be refer to \ref NSATTR.
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*
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* @return The secure/non-secure attribution of specified peripheral.
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* @retval 0 The peripheral is secure
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* @retval 1 The peripheral is non-secure
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*
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* @details This macro gets the peripheral secure/non-secure attribution.
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*/
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#define SCU_GET_PNSSET(nsattr) ((SCU->PNSSET[(nsattr)/32] >> ((nsattr) & 0x1ful)) & 1ul)
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/**
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* @brief Set secure/non-secure attribution of specified GPIO pin
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*
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* @param[in] port GPIO Port. It could be PA, PB, PC, PD, PE, PF, PG and PH.
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* @param[in] bitmask Bit mask of each bit. 0 is secure. 1 is non-secure.
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*
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* @return None
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*
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* @details This macro sets GPIO pin secure/non-secure attribution.
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*/
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#define SCU_SET_IONSSET(port, mask) (SCU->IONSSET[((uint32_t)(port)-(GPIOA_BASE))/0x40] = (mask))
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/**
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* @brief Get secure/non-secure attribution of specified GPIO port
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*
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* @param[in] port GPIO Port. It could be PA, PB, PC, PD, PE, PF, PG and PH.
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*
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* @return The secure/non-secure attribution of the port.
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* @retval 0 The relative bit of specified IO port is secure
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* @retval 1 The relative bit of specified IO port is non-secure
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*
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* @details This macro gets IO secure/non-secure attribution of specified IO port.
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*/
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#define SCU_GET_IONSSET(port) (SCU->IONSSET[((uint32_t)(port) - (GPIOA_BASE))/0x40])
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/**
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* @brief Enable sercure violation interrupts
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*
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* @param[in] mask The mask of each secure violation interrupt source
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* - \ref SCU_SVIOIEN_APB0IEN_Msk
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* - \ref SCU_SVIOIEN_APB1IEN_Msk
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* - \ref SCU_SVIOIEN_GPIOIEN_Msk
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* - \ref SCU_SVIOIEN_EBIIEN_Msk
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* - \ref SCU_SVIOIEN_USBHIEN_Msk
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* - \ref SCU_SVIOIEN_CRCIEN_Msk
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* - \ref SCU_SVIOIEN_SDH0IEN_Msk
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* - \ref SCU_SVIOIEN_PDMA0IEN_Msk
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* - \ref SCU_SVIOIEN_PDMA1IEN_Msk
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* - \ref SCU_SVIOIEN_SRAM0IEN_Msk
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* - \ref SCU_SVIOIEN_SRAM1IEN_Msk
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* - \ref SCU_SVIOIEN_FMCIEN_Msk
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* - \ref SCU_SVIOIEN_FLASHIEN_Msk
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* - \ref SCU_SVIOIEN_SCUIEN_Msk
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* - \ref SCU_SVIOIEN_SYSIEN_Msk
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* - \ref SCU_SVIOIEN_CRPTIEN_Msk
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*
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* @return None
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*
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* @details This macro is used to enable secure violation interrupt of SCU.
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* The secure violation interrupt could be used to detect attack of secure elements.
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*/
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#define SCU_ENABLE_INT(mask) (SCU->SVIOIEN |= (mask))
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/**
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* @brief Disable sercure violation interrupts
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*
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* @param[in] mask The mask of each secure violation interrupt source
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* - \ref SCU_SVIOIEN_APB0IEN_Msk
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* - \ref SCU_SVIOIEN_APB1IEN_Msk
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* - \ref SCU_SVIOIEN_GPIOIEN_Msk
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* - \ref SCU_SVIOIEN_EBIIEN_Msk
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* - \ref SCU_SVIOIEN_USBHIEN_Msk
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* - \ref SCU_SVIOIEN_CRCIEN_Msk
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* - \ref SCU_SVIOIEN_SDH0IEN_Msk
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* - \ref SCU_SVIOIEN_PDMA0IEN_Msk
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* - \ref SCU_SVIOIEN_PDMA1IEN_Msk
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* - \ref SCU_SVIOIEN_SRAM0IEN_Msk
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* - \ref SCU_SVIOIEN_SRAM1IEN_Msk
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* - \ref SCU_SVIOIEN_FMCIEN_Msk
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* - \ref SCU_SVIOIEN_FLASHIEN_Msk
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* - \ref SCU_SVIOIEN_SCUIEN_Msk
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* - \ref SCU_SVIOIEN_SYSIEN_Msk
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* - \ref SCU_SVIOIEN_CRPTIEN_Msk
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*
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* @return None
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*
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* @details This macro is used to disable secure violation interrupt of SCU.
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*
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*/
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#define SCU_DISABLE_INT(mask) (SCU->SVIOIEN &= (~(mask)))
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/**
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* @brief Get secure violation interrupt status
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*
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* @param mask The interrupt flag mask bit
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*
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* @return The value of SCU_SVINTSTS register
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*
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* @details Return interrupt flag of SCU_SVINTSTS register.
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*
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*/
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#define SCU_GET_INT_FLAG(mask) (SCU->SVINTSTS&(mask))
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/**
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* @brief Clear secure violation interrupt flag
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*
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* @param[in] flag The combination of the specified interrupt flags.
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* Each bit corresponds to a interrupt source.
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* This parameter decides which interrupt flags will be cleared.
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* - \ref SCU_SVINTSTS_APB0IF_Msk
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* - \ref SCU_SVINTSTS_APB1IF_Msk
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* - \ref SCU_SVINTSTS_GPIOIF_Msk
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* - \ref SCU_SVINTSTS_EBIIF_Msk
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* - \ref SCU_SVINTSTS_USBHIF_Msk
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* - \ref SCU_SVINTSTS_CRCIF_Msk
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* - \ref SCU_SVINTSTS_SDH0IF_Msk
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* - \ref SCU_SVINTSTS_PDMA0IF_Msk
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* - \ref SCU_SVINTSTS_PDMA1IF_Msk
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* - \ref SCU_SVINTSTS_SRAM0IF_Msk
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* - \ref SCU_SVINTSTS_SRAM1IF_Msk
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* - \ref SCU_SVINTSTS_FMCIF_Msk
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* - \ref SCU_SVINTSTS_FLASHIF_Msk
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* - \ref SCU_SVINTSTS_SCUIF_Msk
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* - \ref SCU_SVINTSTS_SYSIF_Msk
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* - \ref SCU_SVINTSTS_CRPTIF_Msk
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*
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* @return None
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*
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* @details Clear SCU related interrupt flags specified by flag parameter.
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*
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*/
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#define SCU_CLR_INT_FLAG(flag) (SCU->SVINTSTS = (flag))
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/**
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* @brief Control the behavior of non-secure monitor when CPU is in idle state.
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*
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* @param[in] opt Option for behavior control of non-secure monitor when CPU in idle.
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* - true The counter keeps counting when CPU is in idle.
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- false The counter will stop when CPU is in idle.
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*
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* @return None
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*
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* @details To control non-secure monitor counter when CPU is in idle.
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*
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*/
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#define SCU_NSM_IDLE_ON(opt) ((opt)?(SCU->NSMCTL |= SCU_NSMCTL_IDLEON_Msk):(SCU->NSMCTL &= ~SCU_NSMCTL_IDLEON_Msk))
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/**
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* @brief Control the behavior of non-secure monitor when CPU is in debug state.
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*
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* @param[in] opt Option for behavior control of non-secure monitor when CPU in debug.
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* - true The counter keeps counting when CPU is in debug.
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- false The counter will stop when CPU is in debug.
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*
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* @return None
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*
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* @details To control non-secure monitor counter when CPU is in debug.
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*
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*/
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#define SCU_NSM_DBG_ON(opt) ((opt)?(SCU->NSMCTL |= SCU_NSMCTL_DBGON_Msk):(SCU->NSMCTL &= ~SCU_NSMCTL_DBGON_Msk))
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/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */
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__STATIC_INLINE void SCU_NSMConfig(uint32_t u32Ticks, uint32_t u32Prescale);
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__STATIC_INLINE void SCU_TimerConfig(uint32_t u32Ticks, uint32_t u32Prescale);
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/**
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* @brief Config non-secure monitor to detect timeout in non-secure state.
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*
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* @param[in] u32Ticks A specified period for timeout in non-secure state
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* @param[in] u32Prescale A pre-scale divider to non-secure monitor clock
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*
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* @return None
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*
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* @details This function is used to configure non-secure monitor. If the CPU state stay in non-secure state for
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* a specified period. The non-secure monitor will timeout and assert an interrupt. Otherwise, the
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* non-secure monitor will auto clear whenever returning to secure state. This could be used to avoid
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* CPU state in non-secure state too long time for security purpose. User must enable SCU_IRQn if interrupt
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* is necessary.
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*
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*/
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__STATIC_INLINE void SCU_NSMConfig(uint32_t u32Ticks, uint32_t u32Prescale)
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{
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SCU->NSMLOAD = u32Ticks;
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SCU->NSMVAL = 0ul;
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SCU->NSMCTL = SCU_NSMCTL_AUTORLD_Msk | SCU_NSMCTL_NSMIEN_Msk | (u32Prescale & 0xfful);
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}
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/**
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* @brief Config non-secure monitor to be a timer.
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*
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* @param[in] u32Ticks A specified period for timer interrupt.
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* @param[in] u32Prescale A pre-scale divider to timer clock source.
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*
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* @return None
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*
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* @details This function is used to configure non-secure monitor as a timer. In other words, the timer counter
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* keeps counting even CPU is in secure state.
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*
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*/
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__STATIC_INLINE void SCU_TimerConfig(uint32_t u32Ticks, uint32_t u32Prescale)
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{
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SCU->NSMLOAD = u32Ticks;
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SCU->NSMVAL = 0ul;
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SCU->NSMCTL = SCU_NSMCTL_AUTORLD_Msk | SCU_NSMCTL_NSMIEN_Msk | SCU_NSMCTL_TMRMOD_Msk | (u32Prescale & 0xfful);
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}
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/**@}*/ /* end of group SCU_EXPORTED_FUNCTIONS */
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/**@}*/ /* end of group SCU_Driver */
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/**@}*/ /* end of group Standard_Driver */
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||
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#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
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|
||
|
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#endif /* __NU_SCU_H__ */
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||
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