2022-05-06 09:28:21 +08:00
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/*
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2024-01-09 21:56:37 +08:00
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* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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2022-05-06 09:28:21 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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2022-05-15 20:57:35 +08:00
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#include "irq_config.h"
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2022-05-06 09:28:21 +08:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_CAN1
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2024-01-09 21:56:37 +08:00
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#define CAN1_CLOCK_SEL (CAN_CLOCK_SRC_40M)
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#ifdef RT_CAN_USING_CANFD
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#define CAN1_CANFD_MODE (CAN_FD_MD_ISO)
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#endif
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#define CAN1_NAME ("can1")
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2022-05-15 20:57:35 +08:00
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#ifndef CAN1_INIT_PARAMS
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#define CAN1_INIT_PARAMS \
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2022-05-06 09:28:21 +08:00
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{ \
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2024-01-09 21:56:37 +08:00
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.name = CAN1_NAME, \
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.single_trans_mode = RT_FALSE \
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2022-05-06 09:28:21 +08:00
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}
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2022-05-15 20:57:35 +08:00
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#endif /* CAN1_INIT_PARAMS */
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2022-05-06 09:28:21 +08:00
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#endif /* BSP_USING_CAN1 */
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#ifdef BSP_USING_CAN2
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2024-01-09 21:56:37 +08:00
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#define CAN2_CLOCK_SEL (CAN_CLOCK_SRC_40M)
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#ifdef RT_CAN_USING_CANFD
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#define CAN2_CANFD_MODE (CAN_FD_MD_ISO)
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#endif
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#define CAN2_NAME ("can2")
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#ifndef CAN2_INIT_PARAMS
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#define CAN2_INIT_PARAMS \
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{ \
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2024-01-09 21:56:37 +08:00
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.name = CAN2_NAME, \
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.single_trans_mode = RT_FALSE \
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2022-05-06 09:28:21 +08:00
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}
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2022-05-15 20:57:35 +08:00
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#endif /* CAN2_INIT_PARAMS */
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2022-05-06 09:28:21 +08:00
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#endif /* BSP_USING_CAN2 */
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2022-05-15 20:57:35 +08:00
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/* Bit time config
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Restrictions: u32TimeSeg1 >= u32TimeSeg2 + 1, u32TimeSeg2 >= u32SJW.
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Baudrate = CANClock/(u32Prescaler*(u32TimeSeg1 + u32TimeSeg2))
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TQ = u32Prescaler / CANClock.
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Bit time = (u32TimeSeg2 + u32TimeSeg2) x TQ.
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The following bit time configures are based on CAN Clock 40M
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*/
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#define CAN_BIT_TIME_CONFIG_1M_BAUD \
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{ \
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.u32Prescaler = 2, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_800K_BAUD \
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{ \
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.u32Prescaler = 2, \
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.u32TimeSeg1 = 20, \
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.u32TimeSeg2 = 5, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_500K_BAUD \
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{ \
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.u32Prescaler = 4, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_250K_BAUD \
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{ \
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.u32Prescaler = 8, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_125K_BAUD \
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{ \
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.u32Prescaler = 16, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_100K_BAUD \
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{ \
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.u32Prescaler = 20, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_50K_BAUD \
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{ \
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.u32Prescaler = 40, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_20K_BAUD \
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{ \
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.u32Prescaler = 100, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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#define CAN_BIT_TIME_CONFIG_10K_BAUD \
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{ \
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.u32Prescaler = 200, \
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.u32TimeSeg1 = 16, \
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.u32TimeSeg2 = 4, \
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.u32SJW = 4 \
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}
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2022-05-06 09:28:21 +08:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CAN_CONFIG_H__ */
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