400 lines
13 KiB
C
400 lines
13 KiB
C
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/**
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*******************************************************************************
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* @file hc32f4a0_ctc.c
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* @brief This file provides firmware functions to manage the Clock Trimming
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* Controller(CTC).
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@verbatim
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Change Logs:
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Date Author Notes
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2020-09-01 Hongjh First version
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2020-10-30 Hongjh Modify for refining CTC initialization structure
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@endverbatim
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*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32f4a0_ctc.h"
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#include "hc32f4a0_utility.h"
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/**
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* @addtogroup HC32F4A0_DDL_Driver
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* @{
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*/
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/**
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* @defgroup DDL_CTC CTC
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* @brief CTC Driver Library
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* @{
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*/
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#if (DDL_CTC_ENABLE == DDL_ON)
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/*******************************************************************************
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* Local type definitions ('typedef')
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******************************************************************************/
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/*******************************************************************************
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* Local pre-processor symbols/macros ('#define')
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******************************************************************************/
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/**
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* @defgroup CTC_Local_Macros CTC Local Macros
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* @{
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*/
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/**
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* @defgroup CTC_Check_Parameters_Validity CTC Check Parameters Validity
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* @{
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*/
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#define IS_CTC_REF_CLK_SRC(x) \
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( ((x) == CTC_REF_CLK_XTAL) || \
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((x) == CTC_REF_CLK_XTAL32) || \
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((x) == CTC_REF_CLK_CTCREF))
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#define IS_CTC_REF_CLK_DIV(x) \
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( ((x) == CTC_REF_CLK_DIV8) || \
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((x) == CTC_REF_CLK_DIV32) || \
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((x) == CTC_REF_CLK_DIV128) || \
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((x) == CTC_REF_CLK_DIV256) || \
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((x) == CTC_REF_CLK_DIV512) || \
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((x) == CTC_REF_CLK_DIV1024) || \
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((x) == CTC_REF_CLK_DIV2048) || \
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((x) == CTC_REF_CLK_DIV4096))
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#define IS_CTC_OFFSET_VALUE(x) ((x) <= 0xFFUL)
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#define IS_CTC_RELOAD_VALUE(x) ((x) <= 0xFFFFUL)
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#define IS_CTC_TRIM_VALUE(x) ((x) <= 0x3FUL)
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#define IS_CTC_TOLERANCE_DEVIATION(x) (((x) >= 0.0F) && \
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((x) <= CTC_TOLERANCE_DEVIATION_MAX))
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#define IS_CTC_FLAG(x) \
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( ((x) != 0UL) && \
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(((x) | CTC_FLAG_ALL) == CTC_FLAG_ALL))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*******************************************************************************
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* Global variable definitions (declared in header file with 'extern')
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******************************************************************************/
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/*******************************************************************************
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* Local function prototypes ('static')
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******************************************************************************/
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/*******************************************************************************
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* Local variable definitions ('static')
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******************************************************************************/
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/*******************************************************************************
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* Function implementation - global ('extern') and local ('static')
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******************************************************************************/
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/**
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* @defgroup CTC_Global_Functions CTC Global Functions
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* @{
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*/
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/**
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* @brief Initialize CTC function.
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* @param [in] pstcCtcInit Pointer to a @ref stc_ctc_init_t structure.
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* @retval An en_result_t enumeration value:
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* - Ok: Initialize success
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* - ErrorNotReady: CTC state is busy
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* - ErrorInvalidParameter: If one of following cases matches:
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* - pstcCtcInit is NULL
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* - Reference frequency is out of range
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* - Calculate reload & offset value out of range
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*/
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en_result_t CTC_Init(const stc_ctc_init_t *pstcCtcInit)
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{
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float f32OffsetValue;
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uint32_t u32RegValue;
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uint32_t u32ReloadValue;
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uint32_t u32OffsetValue;
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uint32_t u32RefClockDiv;
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uint32_t u32Multiplier;
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uint64_t u64InterClock;
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uint32_t u32HrcFreq = HRC_VALUE;
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en_result_t enRet = ErrorNotReady;
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/* Check CTC status */
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if (CTC_FLAG_BUSY != (READ_REG32_BIT(M4_CTC->STR, CTC_FLAG_BUSY)))
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{
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if ((NULL == pstcCtcInit) || (0UL == pstcCtcInit->u32RefClockFreq))
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{
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enRet = ErrorInvalidParameter;
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}
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else
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_REF_CLK_SRC(pstcCtcInit->u32RefClockSrc));
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DDL_ASSERT(IS_CTC_REF_CLK_DIV(pstcCtcInit->u32RefClockDiv));
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DDL_ASSERT(IS_CTC_TRIM_VALUE(pstcCtcInit->u32TrimValue));
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DDL_ASSERT(IS_CTC_TOLERANCE_DEVIATION(pstcCtcInit->f32ToleranceDeviation));
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if (pstcCtcInit->u32RefClockDiv < CTC_REF_CLK_DIV128)
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{
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u32RefClockDiv = (8UL << (2UL * pstcCtcInit->u32RefClockDiv));
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}
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else
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{
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u32RefClockDiv = (32UL << pstcCtcInit->u32RefClockDiv);
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}
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u64InterClock = ((uint64_t)u32HrcFreq) * ((uint64_t)(u32RefClockDiv));
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u32Multiplier = (uint32_t)(u64InterClock / pstcCtcInit->u32RefClockFreq);
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/* Calculate offset value formula: OFSVAL = (Fhrc / (Fref * Fref_divsion)) * TA */
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f32OffsetValue = ((float)u32Multiplier) * (pstcCtcInit->f32ToleranceDeviation);
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u32OffsetValue = (uint32_t)(f32OffsetValue);
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/* Calculate reload value formula: RLDVAL = (Fhrc / (Fref * Fref_divsion)) + OFSVAL */
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u32ReloadValue = u32Multiplier + u32OffsetValue;
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if ((IS_CTC_OFFSET_VALUE(u32OffsetValue)) && (IS_CTC_RELOAD_VALUE(u32ReloadValue)))
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{
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/* Set CR1 */
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u32RegValue = (pstcCtcInit->u32RefClockDiv | \
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pstcCtcInit->u32RefClockSrc | \
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(pstcCtcInit->u32TrimValue << CTC_CR1_TRMVAL_POS));
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WRITE_REG32(M4_CTC->CR1, u32RegValue);
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/* Set CR2 */
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u32RegValue = ((u32ReloadValue << CTC_CR2_RLDVAL_POS) | u32OffsetValue);
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WRITE_REG32(M4_CTC->CR2, u32RegValue);
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enRet = Ok;
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}
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}
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}
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return enRet;
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}
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/**
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* @brief Set the fields of structure stc_uart_init_t to default values.
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* @param [out] pstcCtcInit Pointer to a @ref stc_ctc_init_t structure.
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* @retval An en_result_t enumeration value:
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* - Ok: Initialize success
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* - ErrorInvalidParameter: pstcCtcInit is NULL
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*/
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en_result_t CTC_StructInit(stc_ctc_init_t *pstcCtcInit)
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{
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en_result_t enRet = ErrorInvalidParameter;
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/* Check parameters */
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if (NULL != pstcCtcInit)
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{
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pstcCtcInit->u32RefClockFreq = 0UL;
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pstcCtcInit->u32RefClockSrc = CTC_REF_CLK_CTCREF;
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pstcCtcInit->u32RefClockDiv = CTC_REF_CLK_DIV8;
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pstcCtcInit->f32ToleranceDeviation = 0.0F;
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pstcCtcInit->u32TrimValue = 0UL;
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enRet = Ok;
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}
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return enRet;
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}
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/**
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* @brief De-Initialize CTC function.
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* @param None
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* @retval An en_result_t enumeration value:
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* - Ok: De-Initialize success
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* - ErrorNotReady: CTC state is busy
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*/
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en_result_t CTC_DeInit(void)
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{
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en_result_t enRet = ErrorNotReady;
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/* Check CTC status */
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if (CTC_FLAG_BUSY != (READ_REG32_BIT(M4_CTC->STR, CTC_FLAG_BUSY)))
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{
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/* Configures the registers to reset value. */
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WRITE_REG32(M4_CTC->CR1, 0UL);
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WRITE_REG32(M4_CTC->CR2, 0UL);
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enRet = Ok;
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}
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return enRet;
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}
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/**
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* @brief Set CTC reference clock division.
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* @param [in] u32Div CTC reference clock prescaler
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* This parameter can be one of the following values:
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* @arg CTC_REF_CLK_DIV8: REFCLK/8
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* @arg CTC_REF_CLK_DIV32: REFCLK/32
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* @arg CTC_REF_CLK_DIV128: REFCLK/128
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* @arg CTC_REF_CLK_DIV256: REFCLK/256
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* @arg CTC_REF_CLK_DIV512: REFCLK/512
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* @arg CTC_REF_CLK_DIV1024: REFCLK/1024
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* @arg CTC_REF_CLK_DIV2048: REFCLK/2048
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* @arg CTC_REF_CLK_DIV4096: REFCLK/4096
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* @retval None
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*/
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void CTC_SetRefClockDiv(uint32_t u32Div)
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_REF_CLK_DIV(u32Div));
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MODIFY_REG32(M4_CTC->CR1, CTC_CR1_REFPSC, u32Div);
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}
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/**
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* @brief Set CTC reference clock source.
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* @param [in] u32ClockSrc CTC reference clock source
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* This parameter can be one of the following values:
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* @arg CTC_REF_CLK_CTCREF: Clock source CTCREF
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* @arg CTC_REF_CLK_XTAL: Clock source XTAL
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* @retval None
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*/
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void CTC_SetRefClockSrc(uint32_t u32ClockSrc)
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_REF_CLK_SRC(u32ClockSrc));
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MODIFY_REG32(M4_CTC->CR1, CTC_CR1_REFCKS, u32ClockSrc);
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}
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/**
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* @brief Enable or disable CTC error interrupt function.
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* @param [in] enNewState The function new state.
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* This parameter can be one of the following values:
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* @arg Enable: Enable CTC error interrupt function.
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* @arg Disable: Disable CTC error interrupt function.
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* @retval None
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*/
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void CTC_IntCmd(en_functional_state_t enNewState)
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{
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/* Check parameters */
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DDL_ASSERT(IS_FUNCTIONAL_STATE(enNewState));
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WRITE_REG32(bM4_CTC->CR1_b.ERRIE, enNewState);
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}
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/**
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* @brief Get CTC flag.
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* @param [in] u32Flag CTC flag
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* This parameter can be any composed value of the following values::
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* @arg CTC_FLAG_TRIM_OK: Trimming OK flag
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* @arg CTC_FLAG_TRIM_OVF: Trimming overflow flag
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* @arg CTC_FLAG_TRIM_UDF: Trimming underflow flag
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* @arg CTC_FLAG_BUSY: CTC busy flag
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* @retval Returned value can be one of the following values:
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* - Set: Any bit of the composed flag is set.
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* - Reset: All bit of the composed flag is reset.
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*/
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en_flag_status_t CTC_GetStatus(uint32_t u32Flag)
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_FLAG(u32Flag));
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return ((0UL == READ_REG32_BIT(M4_CTC->STR, u32Flag)) ? Reset : Set);
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}
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/**
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* @brief Set CTC trimming value.
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* @param [in] u32TrimValue CTC trimming value
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* This parameter can be min=0 && max=0x3F
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* @retval None
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*/
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void CTC_SetTrimValue(uint32_t u32TrimValue)
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_TRIM_VALUE(u32TrimValue));
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MODIFY_REG32(M4_CTC->CR1, CTC_CR1_TRMVAL, (u32TrimValue << CTC_CR1_TRMVAL_POS));
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}
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/**
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* @brief Get CTC trimming value.
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* @param None
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* @retval CTC trimming value(between Min_Data=0 and Max_Data=0x3F)
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*/
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uint32_t CTC_GetTrimValue(void)
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{
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return (READ_REG32_BIT(M4_CTC->CR1, CTC_CR1_TRMVAL) >> CTC_CR1_TRMVAL_POS);
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}
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/**
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* @brief Set CTC reload value.
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* @param [in] u32ReloadValue CTC reload value
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* This parameter can be between Min_Data=0 and Max_Data=0xFFFF
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* @retval None
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*/
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void CTC_SetReloadValue(uint32_t u32ReloadValue)
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{
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/* Check parameters */
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DDL_ASSERT(IS_CTC_RELOAD_VALUE(u32ReloadValue));
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MODIFY_REG32(M4_CTC->CR2, CTC_CR2_RLDVAL, (u32ReloadValue << CTC_CR2_RLDVAL_POS));
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}
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/**
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* @brief Get CTC reload value.
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* @param None
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* @retval CTC reload value (between Min_Data=0 and Max_Data=0xFFFF)
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*/
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uint16_t CTC_GetReloadValue(void)
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{
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return (uint16_t)(READ_REG32_BIT(M4_CTC->CR2, CTC_CR2_RLDVAL) >> CTC_CR2_RLDVAL_POS);
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}
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/**
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* @brief Set CTC offset value.
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|
* @param [in] u32OffsetValue CTC offset value
|
||
|
|
* This parameter can be between Min_Data=0 and Max_Data=0xFF
|
||
|
|
* @retval None
|
||
|
|
*/
|
||
|
|
void CTC_SetOffsetValue(uint32_t u32OffsetValue)
|
||
|
|
{
|
||
|
|
/* Check parameters */
|
||
|
|
DDL_ASSERT(IS_CTC_OFFSET_VALUE(u32OffsetValue));
|
||
|
|
|
||
|
|
MODIFY_REG32(M4_CTC->CR2, CTC_CR2_OFSVAL, (u32OffsetValue << CTC_CR2_OFSVAL_POS));
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Get CTC offset value.
|
||
|
|
* @param None
|
||
|
|
* @retval CTC offset value (between Min_Data=0 and Max_Data=0xFF)
|
||
|
|
*/
|
||
|
|
uint32_t CTC_GetOffsetValue(void)
|
||
|
|
{
|
||
|
|
return (READ_REG32_BIT(M4_CTC->CR2, CTC_CR2_OFSVAL) >> CTC_CR2_OFSVAL_POS);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
#endif /* DDL_CTC_ENABLE */
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @}
|
||
|
|
*/
|
||
|
|
|
||
|
|
/******************************************************************************
|
||
|
|
* EOF (not truncated)
|
||
|
|
*****************************************************************************/
|