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rt-thread/bsp/stm32/stm32f103-fire-arbitrary/board/CubeMX_Config/stm32f103zet6.ioc

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[bsp][STM32] Add bsp based on new framework
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#MicroXplorer Configuration settings - do not modify
[bsp][stm32] add more drivers for stm32 bsp
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ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_11
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master
ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.master=1
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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CAN.CalculateBaudRate=749999
CAN.CalculateTimeBit=1333
CAN.CalculateTimeQuantum=444.44444444444446
CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit,CalculateBaudRate
FSMC.AttributeSpaceHiZSetupTime1=4
FSMC.AttributeSpaceHoldSetupTime1=2
FSMC.AttributeSpaceSetupTime1=4
FSMC.AttributeSpaceWaitSetupTime1=3
FSMC.CommonSpaceHiZSetupTime1=4
FSMC.CommonSpaceHoldSetupTime1=2
FSMC.CommonSpaceSetupTime1=4
FSMC.CommonSpaceWaitSetupTime1=3
FSMC.ECCPageSize1=FSMC_NAND_ECC_PAGE_SIZE_512BYTE
FSMC.EccComputation1=FSMC_NAND_ECC_ENABLE
FSMC.IPParameters=EccComputation1,ECCPageSize1,CommonSpaceSetupTime1,CommonSpaceWaitSetupTime1,CommonSpaceHoldSetupTime1,CommonSpaceHiZSetupTime1,AttributeSpaceSetupTime1,AttributeSpaceWaitSetupTime1,AttributeSpaceHoldSetupTime1,AttributeSpaceHiZSetupTime1,NandPageSize1,NandSpareAreaSize1,NandBlockSize1,NandBlockNbr1,NandPlaneNbr1,NandPlaneSize1
FSMC.NandBlockNbr1=1024
FSMC.NandBlockSize1=64
FSMC.NandPageSize1=2048
FSMC.NandPlaneNbr1=1024
FSMC.NandPlaneSize1=1024
FSMC.NandSpareAreaSize1=64
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File.Version=6
KeepUserPlacement=false
Mcu.Family=STM32F1
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Mcu.IP0=ADC1
[bsp][stm32] add can driver.
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Mcu.IP1=CAN
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Mcu.IP10=SYS
Mcu.IP11=TIM2
Mcu.IP12=TIM3
Mcu.IP13=TIM4
Mcu.IP14=TIM5
Mcu.IP15=USART1
Mcu.IP16=USART2
Mcu.IP17=USART3
Mcu.IP18=USB
Mcu.IP2=FSMC
Mcu.IP3=IWDG
Mcu.IP4=NVIC
Mcu.IP5=RCC
Mcu.IP6=RTC
Mcu.IP7=SDIO
Mcu.IP8=SPI1
Mcu.IP9=SPI2
Mcu.IPNb=19
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Mcu.Name=STM32F103Z(C-D-E)Tx
Mcu.Package=LQFP144
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
[bsp][stm32] add stm32l475-atk-pandora bsp
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Mcu.Pin10=PB0
Mcu.Pin11=PB1
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Mcu.Pin12=PE7
Mcu.Pin13=PE8
Mcu.Pin14=PE9
Mcu.Pin15=PE10
Mcu.Pin16=PB10
Mcu.Pin17=PB11
Mcu.Pin18=PB13
Mcu.Pin19=PB14
[bsp][STM32] Add bsp based on new framework
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Mcu.Pin2=OSC_IN
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Mcu.Pin20=PB15
Mcu.Pin21=PD11
Mcu.Pin22=PD12
Mcu.Pin23=PD14
Mcu.Pin24=PD15
Mcu.Pin25=PC8
Mcu.Pin26=PC9
Mcu.Pin27=PA9
Mcu.Pin28=PA10
Mcu.Pin29=PA11
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Mcu.Pin3=OSC_OUT
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Mcu.Pin30=PA12
Mcu.Pin31=PA13
Mcu.Pin32=PA14
Mcu.Pin33=PC10
Mcu.Pin34=PC11
Mcu.Pin35=PC12
Mcu.Pin36=PD0
Mcu.Pin37=PD1
Mcu.Pin38=PD2
Mcu.Pin39=PD4
[bsp][stm32] add more drivers for stm32 bsp
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Mcu.Pin4=PC1
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Mcu.Pin40=PD5
Mcu.Pin41=PD6
Mcu.Pin42=PD7
Mcu.Pin43=PB5
Mcu.Pin44=PB8
Mcu.Pin45=PB9
Mcu.Pin46=VP_IWDG_VS_IWDG
Mcu.Pin47=VP_RTC_VS_RTC_Activate
Mcu.Pin48=VP_SYS_VS_Systick
Mcu.Pin49=VP_TIM2_VS_ClockSourceINT
[bsp][stm32] add more drivers for stm32 bsp
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Mcu.Pin5=PA2
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Mcu.Pin50=VP_TIM3_VS_ClockSourceINT
Mcu.Pin51=VP_TIM4_VS_ClockSourceINT
Mcu.Pin52=VP_TIM5_VS_ClockSourceINT
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Mcu.Pin6=PA3
Mcu.Pin7=PA5
Mcu.Pin8=PA6
Mcu.Pin9=PA7
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Mcu.PinsNb=53
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Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103ZETx
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MxCube.Version=6.4.0
MxDb.Version=DB.6.0.40
[bsp][stm32]update project.|更新工程。
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
[bsp][STM32] Add bsp based on new framework
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NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
[bsp][stm32]update project.|更新工程。
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NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
[bsp][stm32] add more drivers for stm32 bsp
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OSC_IN.Mode=HSE-External-Oscillator
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OSC_IN.Signal=RCC_OSC_IN
[bsp][stm32] add more drivers for stm32 bsp
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OSC_OUT.Mode=HSE-External-Oscillator
[bsp][STM32] Add bsp based on new framework
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OSC_OUT.Signal=RCC_OSC_OUT
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
[bsp][stm32]update project.|更新工程。
2019-10-31 00:01:17 +08:00
PA11.Mode=Device
PA11.Signal=USB_DM
PA12.Mode=Device
PA12.Signal=USB_DP
[bsp][STM32] Add bsp based on new framework
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PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
PA3.Mode=Asynchronous
PA3.Signal=USART2_RX
PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK
PA6.Mode=Full_Duplex_Master
PA6.Signal=SPI1_MISO
PA7.Mode=Full_Duplex_Master
PA7.Signal=SPI1_MOSI
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
[bsp][stm32] add stm32l475-atk-pandora bsp
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PB0.Signal=S_TIM3_CH3
PB1.Signal=S_TIM3_CH4
[bsp][STM32] Add bsp based on new framework
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PB10.Mode=Asynchronous
PB10.Signal=USART3_TX
PB11.Mode=Asynchronous
PB11.Signal=USART3_RX
PB13.Mode=Full_Duplex_Master
PB13.Signal=SPI2_SCK
PB14.Mode=Full_Duplex_Master
PB14.Signal=SPI2_MISO
PB15.Mode=Full_Duplex_Master
PB15.Signal=SPI2_MOSI
[bsp][stm32] add stm32l475-atk-pandora bsp
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PB5.Signal=S_TIM3_CH2
[bsp][stm32][stm32f103-fire-arbitrary][board] 修改stm32f1xx_hal_msp.c文件CAN引脚配置, 修改Kconfig文件,取消CAN2相关内容 还原stm32f1xx_hal_conf.h中与CAN不相关的内容
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PB8.Locked=true
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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PB8.Mode=CAN_Activate
[bsp][stm32][stm32f103-fire-arbitrary][board] 修改stm32f1xx_hal_msp.c文件CAN引脚配置, 修改Kconfig文件,取消CAN2相关内容 还原stm32f1xx_hal_conf.h中与CAN不相关的内容
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PB8.Signal=CAN_RX
PB9.Locked=true
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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PB9.Mode=CAN_Activate
[bsp][stm32][stm32f103-fire-arbitrary][board] 修改stm32f1xx_hal_msp.c文件CAN引脚配置, 修改Kconfig文件,取消CAN2相关内容 还原stm32f1xx_hal_conf.h中与CAN不相关的内容
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PB9.Signal=CAN_TX
[bsp][stm32] add more drivers for stm32 bsp
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PC1.Locked=true
PC1.Signal=ADCx_IN11
[bsp][stm32] add stm32l475-atk-pandora bsp
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PC10.Mode=SD_4_bits_Wide_bus
PC10.Signal=SDIO_D2
PC11.Mode=SD_4_bits_Wide_bus
PC11.Signal=SDIO_D3
PC12.Mode=SD_4_bits_Wide_bus
PC12.Signal=SDIO_CK
[bsp][stm32] add more drivers for stm32 bsp
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PC14-OSC32_IN.Mode=LSE-External-Oscillator
[bsp][STM32] Add bsp based on new framework
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PC14-OSC32_IN.Signal=RCC_OSC32_IN
[bsp][stm32] add more drivers for stm32 bsp
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PC15-OSC32_OUT.Mode=LSE-External-Oscillator
[bsp][STM32] Add bsp based on new framework
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PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
[bsp][stm32] add stm32l475-atk-pandora bsp
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PC8.Mode=SD_4_bits_Wide_bus
PC8.Signal=SDIO_D0
PC9.Mode=SD_4_bits_Wide_bus
PC9.Signal=SDIO_D1
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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PD0.Signal=FSMC_D2_DA2
PD1.Signal=FSMC_D3_DA3
PD11.Signal=FSMC_A16_CLE
PD12.Signal=FSMC_A17_ALE
PD14.Signal=FSMC_D0_DA0
PD15.Signal=FSMC_D1_DA1
[bsp][stm32] add stm32l475-atk-pandora bsp
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PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDIO_CMD
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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PD4.Signal=FSMC_NOE
PD5.Signal=FSMC_NWE
PD6.Signal=FSMC_NWAIT
PD7.Mode=NandChipSelect2_1
PD7.Signal=FSMC_NCE2
PE10.Signal=FSMC_D7_DA7
PE7.Signal=FSMC_D4_DA4
PE8.Signal=FSMC_D5_DA5
PE9.Signal=FSMC_D6_DA6
[bsp][STM32] Add bsp based on new framework
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PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F103ZETx
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.4
[bsp][STM32] Add bsp based on new framework
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ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=stm32f103zet6.ioc
ProjectManager.ProjectName=stm32f103zet6
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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ProjectManager.RegisterCallBack=
[bsp][STM32] Add bsp based on new framework
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ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_SPI2_Init-SPI2-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_USART3_UART_Init-USART3-false-HAL-true,8-MX_ADC1_Init-ADC1-false-HAL-true,9-MX_RTC_Init-RTC-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true,11-MX_TIM2_Init-TIM2-false-HAL-true,12-MX_TIM3_Init-TIM3-false-HAL-true,13-MX_TIM4_Init-TIM4-false-HAL-true,14-MX_TIM5_Init-TIM5-false-HAL-true,15-MX_SDIO_SD_Init-SDIO-false-HAL-true,16-MX_CAN_Init-CAN-false-HAL-true,17-MX_USB_PCD_Init-USB-false-HAL-true,18-MX_FSMC_Init-FSMC-false-HAL-true
[bsp][stm32] add more drivers for stm32 bsp
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RCC.ADCFreqValue=12000000
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.ADCPresc=RCC_ADCPCLK2_DIV6
RCC.AHBFreq_Value=72000000
[bsp][STM32] Add bsp based on new framework
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RCC.APB1CLKDivider=RCC_HCLK_DIV2
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.APB1Freq_Value=36000000
RCC.APB1TimFreq_Value=72000000
RCC.APB2Freq_Value=72000000
RCC.APB2TimFreq_Value=72000000
RCC.FCLKCortexFreq_Value=72000000
RCC.FSMCFreq_Value=72000000
[bsp][STM32] Add bsp based on new framework
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RCC.FamilyName=M
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.HCLKFreq_Value=72000000
RCC.I2S2Freq_Value=72000000
RCC.I2S3Freq_Value=72000000
RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FSMCFreq_Value,FamilyName,HCLKFreq_Value,I2S2Freq_Value,I2S3Freq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,RTCFreq_Value,SDIOFreq_Value,SDIOHCLKDiv2FreqValue,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,USBPrescaler,VCOOutput2Freq_Value
RCC.MCOFreq_Value=72000000
RCC.PLLCLKFreq_Value=72000000
RCC.PLLMCOFreq_Value=36000000
RCC.PLLMUL=RCC_PLL_MUL9
[bsp][STM32] Add bsp based on new framework
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RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.RTCFreq_Value=40000
RCC.SDIOFreq_Value=72000000
RCC.SDIOHCLKDiv2FreqValue=36000000
RCC.SYSCLKFreq_VALUE=72000000
[bsp][STM32] Add bsp based on new framework
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RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.TimSysFreq_Value=72000000
[bsp][stm32]update project.|更新工程。
2019-10-31 00:01:17 +08:00
RCC.USBFreq_Value=48000000
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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RCC.USBPrescaler=RCC_USBCLKSOURCE_PLL_DIV1_5
[bsp][STM32] Add bsp based on new framework
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RCC.VCOOutput2Freq_Value=8000000
[bsp][stm32] add more drivers for stm32 bsp
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SH.ADCx_IN11.0=ADC1_IN11,IN11
SH.ADCx_IN11.ConfNb=1
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
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SH.FSMC_A16_CLE.0=FSMC_CLE,8b-dmux1
SH.FSMC_A16_CLE.ConfNb=1
SH.FSMC_A17_ALE.0=FSMC_ALE,8b-dmux1
SH.FSMC_A17_ALE.ConfNb=1
SH.FSMC_D0_DA0.0=FSMC_D0,8b-dmux1
SH.FSMC_D0_DA0.ConfNb=1
SH.FSMC_D1_DA1.0=FSMC_D1,8b-dmux1
SH.FSMC_D1_DA1.ConfNb=1
SH.FSMC_D2_DA2.0=FSMC_D2,8b-dmux1
SH.FSMC_D2_DA2.ConfNb=1
SH.FSMC_D3_DA3.0=FSMC_D3,8b-dmux1
SH.FSMC_D3_DA3.ConfNb=1
SH.FSMC_D4_DA4.0=FSMC_D4,8b-dmux1
SH.FSMC_D4_DA4.ConfNb=1
SH.FSMC_D5_DA5.0=FSMC_D5,8b-dmux1
SH.FSMC_D5_DA5.ConfNb=1
SH.FSMC_D6_DA6.0=FSMC_D6,8b-dmux1
SH.FSMC_D6_DA6.ConfNb=1
SH.FSMC_D7_DA7.0=FSMC_D7,8b-dmux1
SH.FSMC_D7_DA7.ConfNb=1
SH.FSMC_NOE.0=FSMC_NOE,8b-dmux1
SH.FSMC_NOE.ConfNb=1
SH.FSMC_NWAIT.0=FSMC_NWAIT,Wait1
SH.FSMC_NWAIT.ConfNb=1
SH.FSMC_NWE.0=FSMC_NWE,8b-dmux1
SH.FSMC_NWE.ConfNb=1
[bsp][stm32] add stm32l475-atk-pandora bsp
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SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2
SH.S_TIM3_CH2.ConfNb=1
SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3
SH.S_TIM3_CH3.ConfNb=1
SH.S_TIM3_CH4.0=TIM3_CH4,PWM Generation4 CH4
SH.S_TIM3_CH4.ConfNb=1
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
2022-09-29 00:37:39 +08:00
SPI1.CalculateBaudRate=18.0 MBits/s
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
[stm32f103-fire-arbitrary] support nandflash K9F1G08U0E && LPM init && partition create && partition read/write
2022-09-29 00:37:39 +08:00
SPI2.CalculateBaudRate=18.0 MBits/s
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualType=VM_MASTER
[bsp][stm32] add stm32l475-atk-pandora bsp
2018-12-17 10:44:30 +08:00
TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM3.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
TIM3.IPParameters=Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC
USART3.IPParameters=VirtualMode
USART3.VirtualMode=VM_ASYNC
[bsp][stm32] add more drivers for stm32 bsp
2018-12-10 09:48:01 +08:00
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
[bsp][stm32] add stm32l475-atk-pandora bsp
2018-12-17 10:44:30 +08:00
VP_TIM2_VS_ClockSourceINT.Mode=Internal
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
VP_TIM3_VS_ClockSourceINT.Mode=Internal
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
VP_TIM4_VS_ClockSourceINT.Mode=Internal
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
VP_TIM5_VS_ClockSourceINT.Mode=Internal
VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT
[bsp][STM32] Add bsp based on new framework
2018-11-29 17:00:22 +08:00
board=custom