2022-09-06 12:48:16 +08:00
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/*
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2023-08-15 18:41:20 +08:00
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* Copyright (c) 2022 HPMicro
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2022-09-06 12:48:16 +08:00
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#define DBG_TAG "pdm"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifdef BSP_USING_PDM
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#include "board.h"
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#include "drivers/audio.h"
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#include "hpm_i2s_drv.h"
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#include "hpm_pdm_drv.h"
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#include "drv_pdm.h"
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#include "hpm_dma_drv.h"
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#include "hpm_dmamux_drv.h"
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#include "hpm_l1c_drv.h"
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#include "hpm_dma_manager.h"
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/* PDM connect to I2S0 RX */
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#define PDM_DMA_REQ HPM_DMA_SRC_I2S0_RX
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#define PDM_I2S_DATA_LINE 0
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struct hpm_pdm
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{
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struct rt_audio_device audio;
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struct rt_audio_configure record_config;
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rt_uint8_t* rx_fifo;
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};
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struct hpm_pdm hpm_pdm_dev = { 0 };
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static hpm_dma_resource_t dma_resource = { 0 };
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static rt_err_t hpm_pdm_dma_transmit();
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void pdm_dma_callback(DMA_Type *ptr, uint32_t channel, void *user_data, uint32_t int_stat)
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{
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if (int_stat == DMA_CHANNEL_STATUS_TC) {
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rt_audio_rx_done(&hpm_pdm_dev.audio, hpm_pdm_dev.rx_fifo, PDM_FIFO_SIZE);
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hpm_pdm_dma_transmit();
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}
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}
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static rt_err_t hpm_pdm_getcaps(struct rt_audio_device* audio, struct rt_audio_caps* caps)
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{
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rt_err_t result = RT_EOK;
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RT_ASSERT(audio != RT_NULL);
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struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
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switch(caps->main_type)
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{
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case AUDIO_TYPE_INPUT:
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{
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switch(caps->sub_type)
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{
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case AUDIO_DSP_PARAM:
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caps->udata.config.samplerate = hpm_audio->record_config.samplerate;
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caps->udata.config.channels = hpm_audio->record_config.channels;
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caps->udata.config.samplebits = hpm_audio->record_config.samplebits;
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break;
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case AUDIO_DSP_SAMPLERATE:
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caps->udata.config.samplerate = hpm_audio->record_config.samplerate;
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break;
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case AUDIO_DSP_CHANNELS:
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caps->udata.config.channels = hpm_audio->record_config.channels;
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break;
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case AUDIO_DSP_SAMPLEBITS:
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caps->udata.config.samplebits = hpm_audio->record_config.samplebits;
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break;
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default:
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result = -RT_ERROR;
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break;
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}
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break;
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}
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default:
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result = -RT_ERROR;
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break;
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}
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return result;
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}
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static rt_err_t hpm_pdm_set_channels(uint32_t channel)
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{
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uint32_t mclk_hz;
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i2s_transfer_config_t transfer;
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mclk_hz = clock_get_frequency(clock_i2s0);
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i2s_get_default_transfer_config_for_pdm(&transfer);
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transfer.data_line = I2S_DATA_LINE_0;
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2023-08-15 18:41:20 +08:00
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if (channel == 1) {
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2022-09-06 12:48:16 +08:00
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transfer.channel_slot_mask = I2S_CHANNEL_SLOT_MASK(0);
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} else if(channel == 2) {
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transfer.channel_slot_mask = I2S_CHANNEL_SLOT_MASK(0) | I2S_CHANNEL_SLOT_MASK(1);
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} else {
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LOG_E("PDM not support channels number %d.\n", channel);
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return -RT_ERROR;
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}
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if (status_success != i2s_config_rx(PDM_I2S, mclk_hz, &transfer))
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{
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LOG_E("dao_i2s configure transfer failed\n");
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t hpm_pdm_configure(struct rt_audio_device* audio, struct rt_audio_caps* caps)
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{
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rt_err_t result = RT_EOK;
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RT_ASSERT(audio != RT_NULL);
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struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
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switch(caps->main_type)
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{
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case AUDIO_TYPE_INPUT:
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{
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switch(caps->sub_type)
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{
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case AUDIO_DSP_CHANNELS:
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{
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hpm_audio->record_config.channels = caps->udata.config.channels;
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hpm_pdm_set_channels(caps->udata.config.channels);
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break;
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}
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default:
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result = -RT_ERROR;
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break;
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}
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}
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default:
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result = -RT_ERROR;
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break;
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}
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return result;
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}
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static rt_err_t hpm_pdm_init(struct rt_audio_device* audio)
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{
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RT_ASSERT(audio != RT_NULL);
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i2s_config_t i2s_config;
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i2s_transfer_config_t transfer;
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pdm_config_t pdm_config;
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init_pdm_pins();
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board_init_pdm_clock();
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i2s_get_default_config(PDM_I2S, &i2s_config);
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i2s_enable_rx_dma_request(PDM_I2S);
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i2s_init(PDM_I2S, &i2s_config);
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i2s_get_default_transfer_config_for_pdm(&transfer);
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transfer.data_line = I2S_DATA_LINE_0;
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transfer.channel_slot_mask = I2S_CHANNEL_SLOT_MASK(0);
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if (status_success != i2s_config_rx(PDM_I2S, clock_get_frequency(clock_i2s0), &transfer))
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{
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LOG_E("pdm_i2s configure receive failed\n");
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return -RT_ERROR;
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}
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/* init audio configure */
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hpm_pdm_dev.record_config.channels = 1U;
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hpm_pdm_dev.record_config.samplebits = 32U; /* 数据为32位,实际有效位24bit,高位为0 */
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hpm_pdm_dev.record_config.samplerate = PDM_SOC_SAMPLE_RATE_IN_HZ; /* fix 16KHz */
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pdm_get_default_config(HPM_PDM, &pdm_config);
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if (status_success != pdm_init(HPM_PDM, &pdm_config)) {
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LOG_E("pdm init failed\n");
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t hpm_pdm_start(struct rt_audio_device* audio, int stream)
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{
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RT_ASSERT(audio != RT_NULL);
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struct hpm_pdm* hpm_audio = (struct hpm_pdm*)audio->parent.user_data;
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if (stream == AUDIO_STREAM_RECORD)
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{
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pdm_start(HPM_PDM);
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if (dma_manager_request_resource(&dma_resource) == status_success) {
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uint8_t dmamux_ch;
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dma_manager_install_interrupt_callback(&dma_resource, pdm_dma_callback, NULL);
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dma_manager_enable_dma_interrupt(&dma_resource, 1);
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dmamux_ch = DMA_SOC_CHN_TO_DMAMUX_CHN(dma_resource.base, dma_resource.channel);
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dmamux_config(HPM_DMAMUX, dmamux_ch, PDM_DMA_REQ, true);
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} else {
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LOG_E("no dma resource available for PDM transfer.\n");
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return -RT_ERROR;
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}
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if (RT_EOK != hpm_pdm_dma_transmit()) {
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2023-08-15 18:41:20 +08:00
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return RT_ERROR;
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2022-09-06 12:48:16 +08:00
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}
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}
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return RT_EOK;
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}
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static rt_err_t hpm_pdm_stop(struct rt_audio_device* audio, int stream)
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{
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RT_ASSERT(audio != RT_NULL);
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if (stream == AUDIO_STREAM_RECORD)
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{
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pdm_stop(HPM_PDM);
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}
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dma_manager_release_resource(&dma_resource);
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return RT_EOK;
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}
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static rt_err_t hpm_pdm_dma_transmit()
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{
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dma_channel_config_t ch_config = {0};
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dma_default_channel_config(dma_resource.base, &ch_config);
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ch_config.src_addr = (uint32_t)&PDM_I2S->RXD[PDM_I2S_DATA_LINE];
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ch_config.dst_addr = core_local_mem_to_sys_address(HPM_CORE0, (uint32_t)hpm_pdm_dev.rx_fifo);
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ch_config.src_width = DMA_TRANSFER_WIDTH_WORD;
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ch_config.dst_width = DMA_TRANSFER_WIDTH_WORD;
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ch_config.src_addr_ctrl = DMA_ADDRESS_CONTROL_FIXED;
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ch_config.dst_addr_ctrl = DMA_ADDRESS_CONTROL_INCREMENT;
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ch_config.size_in_byte = PDM_FIFO_SIZE;
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ch_config.src_mode = DMA_HANDSHAKE_MODE_HANDSHAKE;
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ch_config.src_burst_size = DMA_NUM_TRANSFER_PER_BURST_1T;
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2023-08-15 18:41:20 +08:00
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if (status_success != dma_setup_channel(dma_resource.base, dma_resource.channel, &ch_config, true)) {
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2022-09-06 12:48:16 +08:00
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LOG_E("dma setup channel failed\n");
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2023-08-15 18:41:20 +08:00
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return RT_ERROR;
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2022-09-06 12:48:16 +08:00
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}
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if (l1c_dc_is_enabled()) {
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/* cache invalidate for receive buff */
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l1c_dc_invalidate((uint32_t)hpm_pdm_dev.rx_fifo, PDM_FIFO_SIZE);
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}
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return RT_EOK;
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}
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static struct rt_audio_ops hpm_pdm_ops =
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{
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.getcaps = hpm_pdm_getcaps,
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.configure = hpm_pdm_configure,
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.init = hpm_pdm_init,
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.start = hpm_pdm_start,
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.stop = hpm_pdm_stop,
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.transmit = NULL,
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.buffer_info = NULL,
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};
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ATTR_ALIGN(HPM_L1C_CACHELINE_SIZE) uint8_t pdm_rx_fifo[PDM_FIFO_SIZE];
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int rt_hw_pdm_init(void)
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{
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hpm_pdm_dev.rx_fifo = pdm_rx_fifo;
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hpm_pdm_dev.audio.ops = &hpm_pdm_ops;
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LOG_I("audio pdm registered.\n");
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LOG_I("!!!Note: pdm depends on i2s0, they share clock.\n");
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rt_audio_register(&hpm_pdm_dev.audio, "pdm", RT_DEVICE_FLAG_RDONLY, &hpm_pdm_dev);
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_pdm_init);
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#endif /* BSP_USING_PDM */
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