2014-07-18 17:17:56 +08:00
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//*****************************************************************************
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//
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// sysexc.c - Routines for the System Exception Module.
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//
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2021-06-26 12:37:09 +08:00
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// Copyright (c) 2011-2020 Texas Instruments Incorporated. All rights reserved.
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2014-07-18 17:17:56 +08:00
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// Software License Agreement
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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2021-06-26 12:37:09 +08:00
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// documentation and/or other materials provided with the
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2014-07-18 17:17:56 +08:00
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// distribution.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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2021-06-26 12:37:09 +08:00
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//
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2014-07-18 17:17:56 +08:00
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2021-06-26 12:37:09 +08:00
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//
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// This is part of revision 2.2.0.295 of the Tiva Peripheral Driver Library.
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2014-07-18 17:17:56 +08:00
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup sysexc_api
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//! @{
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//
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//*****************************************************************************
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#include <stdbool.h>
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#include <stdint.h>
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#include "inc/hw_ints.h"
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#include "inc/hw_sysctl.h"
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#include "inc/hw_sysexc.h"
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#include "inc/hw_types.h"
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#include "driverlib/debug.h"
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#include "driverlib/interrupt.h"
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//*****************************************************************************
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//
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//! Returns the interrupt number for a system exception.
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//!
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//! This function returns the interrupt number for a system exception.
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//!
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//! \return Returns the system exception interrupt number.
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//
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//*****************************************************************************
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static uint32_t
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_SysExcIntNumberGet(void)
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{
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uint32_t ui32Int;
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//
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// Get the interrupt number based on the class.
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//
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if(CLASS_IS_TM4C123)
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{
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ui32Int = INT_SYSEXC_TM4C123;
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}
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else if(CLASS_IS_TM4C129)
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{
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ui32Int = INT_SYSEXC_TM4C129;
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}
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else
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{
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ui32Int = 0;
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}
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return(ui32Int);
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}
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//*****************************************************************************
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//
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//! Registers an interrupt handler for the system exception interrupt.
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//!
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//! \param pfnHandler is a pointer to the function to be called when the system
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//! exception interrupt occurs.
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//!
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//! This function places the address of the system exception interrupt handler
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//! into the interrupt vector table in SRAM. This function also enables the
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//! global interrupt in the interrupt controller; specific system exception
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//! interrupts must be enabled via SysExcIntEnable(). It is the interrupt
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//! handler's responsibility to clear the interrupt source.
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//!
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//! \sa IntRegister() for important information about registering interrupt
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//! handlers.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SysExcIntRegister(void (*pfnHandler)(void))
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{
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uint32_t ui32Int;
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//
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// Get the system exception interrupt number.
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//
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ui32Int = _SysExcIntNumberGet();
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ASSERT(ui32Int != 0);
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//
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// Register the interrupt handler.
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//
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IntRegister(ui32Int, pfnHandler);
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//
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// Enable the system exception interrupt.
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//
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IntEnable(ui32Int);
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}
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//*****************************************************************************
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//
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//! Unregisters the system exception interrupt handler.
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//!
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//! This function removes the system exception interrupt handler from the
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//! vector table in SRAM. This function also masks off the system exception
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//! interrupt in the interrupt controller so that the interrupt handler is no
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//! longer called.
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//!
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//! \sa IntRegister() for important information about registering interrupt
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//! handlers.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SysExcIntUnregister(void)
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{
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uint32_t ui32Int;
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//
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// Get the system exception interrupt number.
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//
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ui32Int = _SysExcIntNumberGet();
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ASSERT(ui32Int != 0);
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//
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// Disable the system exception interrupt.
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//
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IntDisable(ui32Int);
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//
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// Unregister the system exception interrupt handler.
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//
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IntUnregister(ui32Int);
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}
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//*****************************************************************************
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//
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//! Enables individual system exception interrupt sources.
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//!
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//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
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//!
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//! This function enables the indicated system exception interrupt sources.
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//! Only the sources that are enabled can be reflected to the processor
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//! interrupt; disabled sources have no effect on the processor.
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//!
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//! The \e ui32IntFlags parameter is the logical OR of any of the following:
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//!
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//! - \b SYSEXC_INT_FP_IXC - Floating-point inexact exception interrupt
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//! - \b SYSEXC_INT_FP_OFC - Floating-point overflow exception interrupt
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//! - \b SYSEXC_INT_FP_UFC - Floating-point underflow exception interrupt
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//! - \b SYSEXC_INT_FP_IOC - Floating-point invalid operation interrupt
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//! - \b SYSEXC_INT_FP_DZC - Floating-point divide by zero exception interrupt
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//! - \b SYSEXC_INT_FP_IDC - Floating-point input denormal exception interrupt
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SysExcIntEnable(uint32_t ui32IntFlags)
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{
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//
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// Enable the specified interrupts.
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//
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HWREG(SYSEXC_IM) |= ui32IntFlags;
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}
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//*****************************************************************************
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//
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//! Disables individual system exception interrupt sources.
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//!
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//! \param ui32IntFlags is the bit mask of the interrupt sources to be
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//! disabled.
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//!
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//! This function disables the indicated system exception interrupt sources.
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//! Only sources that are enabled can be reflected to the processor interrupt;
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//! disabled sources have no effect on the processor.
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//!
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//! The \e ui32IntFlags parameter is the logical OR of any of the following:
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//!
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//! - \b SYSEXC_INT_FP_IXC - Floating-point inexact exception interrupt
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//! - \b SYSEXC_INT_FP_OFC - Floating-point overflow exception interrupt
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//! - \b SYSEXC_INT_FP_UFC - Floating-point underflow exception interrupt
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//! - \b SYSEXC_INT_FP_IOC - Floating-point invalid operation interrupt
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//! - \b SYSEXC_INT_FP_DZC - Floating-point divide by zero exception interrupt
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//! - \b SYSEXC_INT_FP_IDC - Floating-point input denormal exception interrupt
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SysExcIntDisable(uint32_t ui32IntFlags)
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{
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//
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// Disable the specified interrupts.
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//
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HWREG(SYSEXC_IM) &= ~(ui32IntFlags);
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}
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//*****************************************************************************
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//
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//! Gets the current system exception interrupt status.
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//!
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//! \param bMasked is \b false if the raw interrupt status is required and
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//! \b true if the masked interrupt status is required.
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//!
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//! This function returns the system exception interrupt status. Either the
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//! raw interrupt status or the status of interrupts that are allowed to
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//! reflect to the processor can be returned.
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//!
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//! \return Returns the current system exception interrupt status, enumerated
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//! as the logical OR of \b SYSEXC_INT_FP_IXC, \b SYSEXC_INT_FP_OFC,
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//! \b SYSEXC_INT_FP_UFC, \b SYSEXC_INT_FP_IOC, \b SYSEXC_INT_FP_DZC, and
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//! \b SYSEXC_INT_FP_IDC.
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//
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//*****************************************************************************
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uint32_t
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SysExcIntStatus(bool bMasked)
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{
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//
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// Return either the interrupt status or the raw interrupt status as
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// requested.
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//
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if(bMasked)
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{
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return(HWREG(SYSEXC_MIS));
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}
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else
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{
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return(HWREG(SYSEXC_RIS));
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}
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}
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//*****************************************************************************
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//
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//! Clears system exception interrupt sources.
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//!
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//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
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//!
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//! This function clears the specified system exception interrupt sources, so
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//! that they no longer assert. This function must be called in the interrupt
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//! handler to keep the interrupt from being recognized again immediately upon
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//! exit.
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//!
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//! The \e ui32IntFlags parameter is the logical OR of any of the following:
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//!
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//! - \b SYSEXC_INT_FP_IXC - Floating-point inexact exception interrupt
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//! - \b SYSEXC_INT_FP_OFC - Floating-point overflow exception interrupt
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//! - \b SYSEXC_INT_FP_UFC - Floating-point underflow exception interrupt
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//! - \b SYSEXC_INT_FP_IOC - Floating-point invalid operation interrupt
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//! - \b SYSEXC_INT_FP_DZC - Floating-point divide by zero exception interrupt
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//! - \b SYSEXC_INT_FP_IDC - Floating-point input denormal exception interrupt
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//!
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//! \note Because there is a write buffer in the Cortex-M processor, it may
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//! take several clock cycles before the interrupt source is actually cleared.
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//! Therefore, it is recommended that the interrupt source be cleared early in
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//! the interrupt handler (as opposed to the very last action) to avoid
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//! returning from the interrupt handler before the interrupt source is
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//! actually cleared. Failure to do so may result in the interrupt handler
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//! being immediately reentered (because the interrupt controller still sees
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//! the interrupt source asserted).
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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SysExcIntClear(uint32_t ui32IntFlags)
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{
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//
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// Clear the requested interrupt sources.
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//
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HWREG(SYSEXC_IC) = ui32IntFlags;
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}
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//*****************************************************************************
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//
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// Close the Doxygen group.
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//! @}
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//
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//*****************************************************************************
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