238 lines
9.0 KiB
ArmAsm
238 lines
9.0 KiB
ArmAsm
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;/**************************************************************************//**
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; * @file startup_ARMCM0.s
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; * @brief CMSIS Core Device Startup File for
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; * ARMCM0 Device Series
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; * @version V1.08
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; * @date 23. November 2012
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; *
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; * @note
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; *
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; ******************************************************************************/
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;/* Copyright (c) 2011 - 2012 ARM LIMITED
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;
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; All rights reserved.
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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; - Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; - Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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; - Neither the name of ARM nor the names of its contributors may be used
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; to endorse or promote products derived from this software without
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; specific prior written permission.
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; *
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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; POSSIBILITY OF SUCH DAMAGE.
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; ---------------------------------------------------------------------------*/
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;/*
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20008000
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000400
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD TMR0_IRQHandler ; 0: TMR0
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DCD GPIO_IRQHandler ; 1: GPIO
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DCD SLAVE_IRQHandler ; 2: SLAVE
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DCD SPI0_IRQHandler ; 3: SPI0
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DCD BB_IRQHandler ; 4: BB
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DCD LLE_IRQHandler ; 5: LLE
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DCD USB_IRQHandler ; 6: USB
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DCD ETH_IRQHandler ; 7: ETH
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DCD TMR1_IRQHandler ; 8: TMR1
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DCD TMR2_IRQHandler ; 9: TMR2
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DCD UART0_IRQHandler ; 10: UART0
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DCD UART1_IRQHandler ; 11: UART1
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DCD RTC_IRQHandler ; 12: RTC
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DCD ADC_IRQHandler ; 13: ADC
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DCD SPI1_IRQHandler ; 14: SPI1
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DCD LED_IRQHandler ; 15: LED
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DCD TMR3_IRQHandler ; 16: TMR3
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DCD UART2_IRQHandler ; 17: UART2
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DCD UART3_IRQHandler ; 18: UART3
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DCD WDT_IRQHandler ; 19: WDT
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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;LDR R0, =0x1007058
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;MOV SP, R0
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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; B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT TMR0_IRQHandler [WEAK]; 0: TMR0
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EXPORT GPIO_IRQHandler [WEAK]; 1: GPIO
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EXPORT SLAVE_IRQHandler [WEAK]; 2: SLAVE
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EXPORT SPI0_IRQHandler [WEAK]; 3: SPI0
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EXPORT BB_IRQHandler [WEAK]; 4: BB
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EXPORT LLE_IRQHandler [WEAK]; 5: LLE
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EXPORT USB_IRQHandler [WEAK]; 6: USB
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EXPORT ETH_IRQHandler [WEAK]; 7: ETH
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EXPORT TMR1_IRQHandler [WEAK]; 8: TMR1
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EXPORT TMR2_IRQHandler [WEAK]; 9: TMR2
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EXPORT UART0_IRQHandler [WEAK]; 10: UART0
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EXPORT UART1_IRQHandler [WEAK]; 11: UART1
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EXPORT RTC_IRQHandler [WEAK]; 12: RTC
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EXPORT ADC_IRQHandler [WEAK]; 13: ADC
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EXPORT SPI1_IRQHandler [WEAK]; 14: SPI1
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EXPORT LED_IRQHandler [WEAK]; 15: LED
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EXPORT TMR3_IRQHandler [WEAK]; 16: TMR3
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EXPORT UART2_IRQHandler [WEAK]; 17: UART2
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EXPORT UART3_IRQHandler [WEAK]; 18: UART3
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EXPORT WDT_IRQHandler [WEAK]; 19: WDT
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TMR0_IRQHandler ; 0: TMR0
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GPIO_IRQHandler ; 1: GPIO
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SLAVE_IRQHandler ; 2: SLAVE
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SPI0_IRQHandler ; 3: SPI0
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BB_IRQHandler ; 4: BB
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LLE_IRQHandler ; 5: LLE
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USB_IRQHandler ; 6: USB
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ETH_IRQHandler ; 7: ETH
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TMR1_IRQHandler ; 8: TMR1
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TMR2_IRQHandler ; 9: TMR2
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UART0_IRQHandler ; 10: UART0
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UART1_IRQHandler ; 11: UART1
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RTC_IRQHandler ; 12: RTC
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ADC_IRQHandler ; 13: ADC
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SPI1_IRQHandler ; 14: SPI1
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LED_IRQHandler ; 15: LED
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TMR3_IRQHandler ; 16: TMR3
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UART2_IRQHandler ; 17: UART2
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UART3_IRQHandler ; 18: UART3
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WDT_IRQHandler ; 19: WDT
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B .
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ENDP
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ALIGN
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; User Initial Stack & Heap
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
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ALIGN
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ENDIF
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END
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