2020-08-07 21:35:33 +08:00
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/*
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2021-03-14 15:18:33 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2020-08-07 21:35:33 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-04-29 supperthomas first version
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*
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*/
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2020-04-14 22:17:27 +08:00
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#include <rtthread.h>
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#include <rthw.h>
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2020-08-07 21:35:33 +08:00
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#include <nrfx_systick.h>
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2020-04-14 22:17:27 +08:00
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2020-08-07 21:35:33 +08:00
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#include "board.h"
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#include "drv_uart.h"
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#include <nrfx_clock.h>
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2020-04-14 22:17:27 +08:00
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2020-08-07 21:35:33 +08:00
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/**
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* This is the timer interrupt service routine.
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*
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*/
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void SysTick_Handler(void)
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2020-04-14 22:17:27 +08:00
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{
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2020-08-07 21:35:33 +08:00
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/* enter interrupt */
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2020-04-14 22:17:27 +08:00
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rt_interrupt_enter();
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2020-08-07 21:35:33 +08:00
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rt_tick_increase();
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2020-04-14 22:17:27 +08:00
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/* leave interrupt */
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rt_interrupt_leave();
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}
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2020-09-27 23:25:08 +08:00
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static void clk_event_handler(nrfx_clock_evt_type_t event){}
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2020-08-07 21:35:33 +08:00
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void SysTick_Configuration(void)
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2020-04-14 22:17:27 +08:00
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{
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2020-09-27 23:25:08 +08:00
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nrfx_clock_init(clk_event_handler);
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nrfx_clock_enable();
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nrfx_clock_lfclk_start();
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2020-08-07 21:35:33 +08:00
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/* Set interrupt priority */
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NVIC_SetPriority(SysTick_IRQn, 0xf);
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2020-04-14 22:17:27 +08:00
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2020-08-07 21:35:33 +08:00
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/* Configure SysTick to interrupt at the requested rate. */
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nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
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nrf_systick_val_clear();
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nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
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| NRF_SYSTICK_CSR_ENABLE);
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2020-09-27 23:25:08 +08:00
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2020-04-14 22:17:27 +08:00
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}
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void rt_hw_board_init(void)
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{
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2020-08-07 21:35:33 +08:00
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rt_hw_interrupt_enable(0);
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2020-04-14 22:17:27 +08:00
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// sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
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/* Activate deep sleep mode */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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SysTick_Configuration();
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2020-08-07 21:35:33 +08:00
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#if defined(RT_USING_HEAP)
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rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
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#endif
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2020-04-14 22:17:27 +08:00
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2020-08-07 21:35:33 +08:00
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#ifdef RT_USING_SERIAL
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2020-04-14 22:17:27 +08:00
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rt_hw_uart_init();
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2020-08-07 21:35:33 +08:00
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#endif
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2020-04-14 22:17:27 +08:00
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#ifdef RT_USING_CONSOLE
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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2020-08-07 21:35:33 +08:00
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#ifdef BSP_USING_SOFTDEVICE
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extern uint32_t Image$$RW_IRAM1$$Base;
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uint32_t const *const m_ram_start = &Image$$RW_IRAM1$$Base;
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if ((uint32_t)m_ram_start == 0x20000000)
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{
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rt_kprintf("\r\n using softdevice the RAM couldn't be %p,please use the templete from package\r\n", m_ram_start);
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while (1);
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}
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else
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{
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rt_kprintf("\r\n using softdevice the RAM at %p\r\n", m_ram_start);
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}
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#endif
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2020-04-14 22:17:27 +08:00
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}
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