249 lines
12 KiB
C
249 lines
12 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* How to set up clock using clock driver functions:
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*
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* 1. Setup clock sources.
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*
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* 2. Setup voltage for the fastest of the clock outputs
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*
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* 3. Set up wait states of the flash.
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*
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* 4. Set up all dividers.
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*
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* 5. Set up all selectors to provide selected clocks.
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*/
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/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
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!!ClocksProfile
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product: Clocks v1.0
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processor: LPC54608J512
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package_id: LPC54608J512ET180
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mcu_data: ksdk2_0
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processor_version: 0.0.0
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board: LPCXpresso54608
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
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#include "fsl_power.h"
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#include "fsl_clock.h"
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#include "clock_config.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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/*******************************************************************************
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********************* Configuration BOARD_BootClockFRO12M ***********************
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******************************************************************************/
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/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
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!!Configuration
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name: BOARD_BootClockFRO12M
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outputs:
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- {id: System_clock.outFreq, value: 12 MHz}
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settings:
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- {id: SYSCON.EMCCLKDIV.scale, value: '1', locked: true}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
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/*******************************************************************************
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* Variables for BOARD_BootClockFRO12M configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockFRO12M configuration
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******************************************************************************/
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void BOARD_BootClockFRO12M(void)
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{
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(
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kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
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being below the voltage for current speed */
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CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
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POWER_SetVoltageForFreq(
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12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
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}
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/*******************************************************************************
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********************** Configuration BOARD_BootClockFROHF48M ***********************
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******************************************************************************/
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/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
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!!Configuration
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name: BOARD_BootClockFROHF48M
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outputs:
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- {id: System_clock.outFreq, value: 48 MHz}
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settings:
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- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
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/*******************************************************************************
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* Variables for BOARD_BootClockFROHF48M configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockFROHF48M configuration
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******************************************************************************/
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void BOARD_BootClockFROHF48M(void)
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{
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(
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kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
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being below the voltage for current speed */
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POWER_SetVoltageForFreq(
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48000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(48000000U); /*!< Set FLASH wait states for core */
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CLOCK_SetupFROClocking(48000000U); /*!< Set up high frequency FRO output to selected frequency */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
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}
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/*******************************************************************************
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********************* Configuration BOARD_BootClockFROHF96M **********************
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******************************************************************************/
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/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
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!!Configuration
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name: BOARD_BootClockFROHF96M
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outputs:
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- {id: System_clock.outFreq, value: 96 MHz}
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settings:
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- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
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sources:
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- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
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/*******************************************************************************
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* Variables for BOARD_BootClockFROHF96M configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockFROHF96M configuration
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******************************************************************************/
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void BOARD_BootClockFROHF96M(void)
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{
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(
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kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
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being below the voltage for current speed */
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POWER_SetVoltageForFreq(
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96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
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CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
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}
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/*******************************************************************************
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********************* Configuration BOARD_BootClockPLL180M **********************
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******************************************************************************/
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/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
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!!Configuration
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name: BOARD_BootClockPLL180M
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outputs:
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- {id: FRO12M_clock.outFreq, value: 12 MHz}
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- {id: FROHF_clock.outFreq, value: 48 MHz}
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- {id: SYSPLL_clock.outFreq, value: 180 MHz}
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- {id: System_clock.outFreq, value: 180 MHz}
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settings:
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- {id: SYSCON.M_MULT.scale, value: '30', locked: true}
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- {id: SYSCON.N_DIV.scale, value: '1', locked: true}
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- {id: SYSCON.PDEC.scale, value: '2', locked: true}
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- {id: SYSCON_PDRUNCFG0_PDEN_SYS_PLL_CFG, value: Power_up}
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sources:
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- {id: SYSCON._clk_in.outFreq, value: 12 MHz, enabled: true}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
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/*******************************************************************************
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* Variables for BOARD_BootClockPLL180M configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockPLL180M configuration
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******************************************************************************/
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void BOARD_BootClockPLL180M(void)
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{
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(
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kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
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being below the voltage for current speed */
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POWER_SetVoltageForFreq(
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12000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(12000000U); /*!< Set FLASH wait states for core */
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/*!< Set up SYS PLL */
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const pll_setup_t pllSetup = {
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.pllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U),
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.pllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)),
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.pllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)),
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.pllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)),
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.pllRate = 180000000U,
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.flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP};
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CLOCK_AttachClk(kEXT_CLK_to_SYS_PLL); /*!< Set sys pll clock source from external crystal */
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CLOCK_SetPLLFreq(&pllSetup); /*!< Configure PLL to the desired value */
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POWER_SetVoltageForFreq(
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180000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(180000000U); /*!< Set FLASH wait states for core */
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CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK); /*!< Switch System clock to SYS PLL 180MHz */
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/* Set SystemCoreClock variable. */
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SystemCoreClock = BOARD_BootClockPLL180M_CORE_CLOCK;
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}
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