129 lines
7.8 KiB
C
129 lines
7.8 KiB
C
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/***********************************************************************
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* Filename : hal_timer_ex.h
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* Description : timer driver header file
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* Author(s) : xwl
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* version : V1.0
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* Modify date : 2021-03-24
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***********************************************************************/
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#ifndef __HAL_TIMER_EX_H__
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#define __HAL_TIMER_EX_H__
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#include "ACM32Fxx_HAL.h"
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#define TIM_BDTR_DTG_Pos (0U)
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#define TIM_BDTR_DTG_Msk (0xFFUL << TIM_BDTR_DTG_Pos) /*!< 0x000000FF */
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#define TIM_BDTR_DTG TIM_BDTR_DTG_Msk /*!<DTG[0:7] bits (Dead-Time Generator set-up) */
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#define TIM_BDTR_DTG_0 (0x01UL << TIM_BDTR_DTG_Pos) /*!< 0x00000001 */
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#define TIM_BDTR_DTG_1 (0x02UL << TIM_BDTR_DTG_Pos) /*!< 0x00000002 */
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#define TIM_BDTR_DTG_2 (0x04UL << TIM_BDTR_DTG_Pos) /*!< 0x00000004 */
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#define TIM_BDTR_DTG_3 (0x08UL << TIM_BDTR_DTG_Pos) /*!< 0x00000008 */
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#define TIM_BDTR_DTG_4 (0x10UL << TIM_BDTR_DTG_Pos) /*!< 0x00000010 */
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#define TIM_BDTR_DTG_5 (0x20UL << TIM_BDTR_DTG_Pos) /*!< 0x00000020 */
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#define TIM_BDTR_DTG_6 (0x40UL << TIM_BDTR_DTG_Pos) /*!< 0x00000040 */
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#define TIM_BDTR_DTG_7 (0x80UL << TIM_BDTR_DTG_Pos)
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#define TIM_BDTR_LOCK_Pos (8U)
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#define TIM_BDTR_LOCK_Msk (0x3UL << TIM_BDTR_LOCK_Pos) /*!< 0x00000300 */
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#define TIM_BDTR_LOCK TIM_BDTR_LOCK_Msk /*!<LOCK[1:0] bits (Lock Configuration) */
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#define TIM_BDTR_LOCK_0 (0x1UL << TIM_BDTR_LOCK_Pos) /*!< 0x00000100 */
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#define TIM_BDTR_LOCK_1 (0x2UL << TIM_BDTR_LOCK_Pos)
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#define TIM_BDTR_OSSI_Pos (10U)
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#define TIM_BDTR_OSSI_Msk (0x1UL << TIM_BDTR_OSSI_Pos) /*!< 0x00000400 */
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#define TIM_BDTR_OSSI TIM_BDTR_OSSI_Msk /*!<Off-State Selection for Idle mode */
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#define TIM_BDTR_OSSR_Pos (11U)
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#define TIM_BDTR_OSSR_Msk (0x1UL << TIM_BDTR_OSSR_Pos) /*!< 0x00000800 */
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#define TIM_BDTR_OSSR TIM_BDTR_OSSR_Msk /*!<Off-State Selection for Run mode */
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#define TIM_BDTR_BKE_Pos (12U)
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#define TIM_BDTR_BKE_Msk (0x1UL << TIM_BDTR_BKE_Pos) /*!< 0x00001000 */
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#define TIM_BDTR_BKE TIM_BDTR_BKE_Msk /*!<Break enable for Break 1 */
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#define TIM_BDTR_BKP_Pos (13U)
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#define TIM_BDTR_BKP_Msk (0x1UL << TIM_BDTR_BKP_Pos) /*!< 0x00002000 */
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#define TIM_BDTR_BKP TIM_BDTR_BKP_Msk /*!<Break Polarity for Break 1 */
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#define TIM_BDTR_AOE_Pos (14U)
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#define TIM_BDTR_AOE_Msk (0x1UL << TIM_BDTR_AOE_Pos) /*!< 0x00004000 */
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#define TIM_BDTR_AOE TIM_BDTR_AOE_Msk /*!<Automatic Output enable */
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#define TIM_BDTR_MOE_Pos (15U)
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#define TIM_BDTR_MOE_Msk (0x1UL << TIM_BDTR_MOE_Pos) /*!< 0x00008000 */
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#define TIM_BDTR_MOE TIM_BDTR_MOE_Msk /*!<Main Output enable */
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#define TIM_BDTR_BKF_Pos (16U)
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#define TIM_BDTR_BKF_Msk (0xFUL << TIM_BDTR_BKF_Pos) /*!< 0x000F0000 */
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#define TIM_BDTR_BKF TIM_BDTR_BKF_Msk
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#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
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#ifdef HAL_COMP_MODULE_ENABLED
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#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
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#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
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#endif /* COMP1 && COMP2 */
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#define TIM_BREAKINPUT_BRK 0x00000001U
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#define TIM1_AF1_BKINE_Pos (0U)
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#define TIM1_AF1_BKINE_Msk (0x1UL << TIM1_AF1_BKINE_Pos) /*!< 0x00000001 */
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#define TIM1_AF1_BKINE TIM1_AF1_BKINE_Msk /*!<BRK BKIN input enable */
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#define TIM1_AF1_BKCMP1E_Pos (1U)
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#define TIM1_AF1_BKCMP1E_Msk (0x1UL << TIM1_AF1_BKCMP1E_Pos) /*!< 0x00000002 */
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#define TIM1_AF1_BKCMP1E TIM1_AF1_BKCMP1E_Msk /*!<BRK COMP1 enable */
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#define TIM1_AF1_BKCMP2E_Pos (2U)
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#define TIM1_AF1_BKCMP2E_Msk (0x1UL << TIM1_AF1_BKCMP2E_Pos) /*!< 0x00000004 */
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#define TIM1_AF1_BKCMP2E TIM1_AF1_BKCMP2E_Msk /*!<BRK COMP2 enable */
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#define TIM1_AF1_BKINP_Pos (9U)
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#define TIM1_AF1_BKINP_Msk (0x1UL << TIM1_AF1_BKINP_Pos) /*!< 0x00000200 */
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#define TIM1_AF1_BKINP TIM1_AF1_BKINP_Msk /*!<BRK BKIN input polarity */
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#define TIM1_AF1_BKCMP1P_Pos (10U)
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#define TIM1_AF1_BKCMP1P_Msk (0x1UL << TIM1_AF1_BKCMP1P_Pos) /*!< 0x00000400 */
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#define TIM1_AF1_BKCMP1P TIM1_AF1_BKCMP1P_Msk /*!<BRK COMP1 input polarity */
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#define TIM1_AF1_BKCMP2P_Pos (11U)
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#define TIM1_AF1_BKCMP2P_Msk (0x1UL << TIM1_AF1_BKCMP2P_Pos) /*!< 0x00000800 */
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#define TIM1_AF1_BKCMP2P TIM1_AF1_BKCMP2P_Msk
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typedef struct
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{
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uint32_t OffStateRunMode; // TIM off state in run mode
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uint32_t OffStateIDLEMode; // TIM off state in IDLE mode
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uint32_t LockLevel; // TIM Lock level
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uint32_t DeadTime; // TIM dead Time
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uint32_t BreakState; // TIM Break State
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uint32_t BreakPolarity; // TIM Break input polarity
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uint32_t BreakFilter; // Specifies the break input filter.
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uint32_t AutomaticOutput; // TIM Automatic Output Enable state
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} TIM_BreakDeadTimeConfigTypeDef;
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typedef struct
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{
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uint32_t Source; /*!< Specifies the source of the timer break input.
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This parameter can be a value of @ref TIMEx_Break_Input_Source */
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uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
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This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
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uint32_t Polarity; /*!< Specifies the break input source polarity.
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This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */
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}
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TIMEx_BreakInputConfigTypeDef;
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/******************* Bit definition for TIM_TISEL register *********************/
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#define TIM_TISEL_TI1SEL_Pos (0U)
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#define TIM_TISEL_TI1SEL_Msk (0xFUL << TIM_TISEL_TI1SEL_Pos) /*!< 0x0000000F */
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#define TIM_TISEL_TI1SEL TIM_TISEL_TI1SEL_Msk /*!<TI1SEL[3:0] bits (TIM1 TI1 SEL)*/
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#define TIM_TISEL_TI1SEL_0 (0x1UL << TIM_TISEL_TI1SEL_Pos) /*!< 0x00000001 */
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#define TIM_TISEL_TI1SEL_1 (0x2UL << TIM_TISEL_TI1SEL_Pos) /*!< 0x00000002 */
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#define TIM_TISEL_TI1SEL_2 (0x4UL << TIM_TISEL_TI1SEL_Pos) /*!< 0x00000004 */
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#define TIM_TISEL_TI1SEL_3 (0x8UL << TIM_TISEL_TI1SEL_Pos) /*!< 0x00000008 */
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#define TIM_TISEL_TI2SEL_Pos (8U)
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#define TIM_TISEL_TI2SEL_Msk (0xFUL << TIM_TISEL_TI2SEL_Pos) /*!< 0x00000F00 */
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#define TIM_TISEL_TI2SEL TIM_TISEL_TI2SEL_Msk /*!<TI2SEL[3:0] bits (TIM1 TI2 SEL)*/
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#define TIM_TISEL_TI2SEL_0 (0x1UL << TIM_TISEL_TI2SEL_Pos) /*!< 0x00000100 */
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#define TIM_TISEL_TI2SEL_1 (0x2UL << TIM_TISEL_TI2SEL_Pos) /*!< 0x00000200 */
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#define TIM_TISEL_TI2SEL_2 (0x4UL << TIM_TISEL_TI2SEL_Pos) /*!< 0x00000400 */
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#define TIM_TISEL_TI2SEL_3 (0x8UL << TIM_TISEL_TI2SEL_Pos) /*!< 0x00000800 */
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#endif
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