504 lines
15 KiB
C
504 lines
15 KiB
C
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//*****************************************************************************
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//
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// am_hal_gpio.c
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//! @file
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//!
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//! @brief Functions for interfacing with the GPIO module
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//!
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//! @addtogroup gpio2 GPIO
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//! @ingroup apollo2hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#include <stdint.h>
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#include <stdbool.h>
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#include "am_mcu_apollo.h"
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//*****************************************************************************
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//
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// Array of function pointers for handling GPIO interrupts.
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//
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//*****************************************************************************
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am_hal_gpio_handler_t am_hal_gpio_ppfnHandlers[64];
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//*****************************************************************************
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//
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//! @brief Read the configuration information for the given pin..
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//!
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//! @param ui32GPIONum is the GPIO number whose configuration we want to read.
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//!
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//! This function reads the PADREG, GPIO CFG, and ALTPAD registers for the
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//! given GPIO and returns them in the following format:
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//!
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//! ( (ALTPAD << 16) | (CFG << 8) | PADREG)
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//!
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//! This is the same format used by the \e am_hal_gpio_pin_config()
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//! function-like macro.
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//!
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//! @return Pin configuration information.
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//
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//*****************************************************************************
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uint32_t
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am_hal_gpio_pin_config_read(uint32_t ui32PinNumber)
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{
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uint32_t ui32CfgVal, ui32PadregVal, ui32AltPadVal;
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am_hal_debug_assert_msg(ui32PinNumber <= 63, "Invalid GPIO number.");
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ui32CfgVal = AM_HAL_GPIO_CFG_R(ui32PinNumber);
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ui32PadregVal = AM_HAL_GPIO_PADREG_R(ui32PinNumber);
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ui32AltPadVal = AM_HAL_GPIO_ALTPADREG_R(ui32PinNumber);
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return ( (ui32CfgVal << CFGVAL_GPIOCFG_S) |
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(ui32PadregVal << CFGVAL_PADREG_S) |
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(ui32AltPadVal << CFGVAL_ALTPAD_S) );
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}
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//*****************************************************************************
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//
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//! @brief Get the state of ALL GPIOs from the INPUT READ REGISTER.
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//!
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//! This function retrieves the state of ALL GPIOs from the INPUT READ
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//! REGISTER.
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//!
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//! @return the state for the requested GPIO or -1 for error.
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//
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//*****************************************************************************
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uint64_t
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am_hal_gpio_input_read(void)
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{
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//
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// Combine upper or lower GPIO words into one 64 bit return value.
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//
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uint64_t ui64RetVal;
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ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, RDB)) << 32;
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ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, RDA)) << 0;
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return ui64RetVal;
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}
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//*****************************************************************************
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//
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//! @brief Get the state of ALL GPIOs from the DATA OUTPUT REGISTER.
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//!
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//! This function retrieves the state of ALL GPIOs from the DATA OUTPUT
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//! REGISTER.
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//!
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//! @return the state for the requested GPIO or -1 for error.
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//
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//*****************************************************************************
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uint64_t
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am_hal_gpio_out_read(void)
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{
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//
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// Combine upper or lower GPIO words into one 64 bit return value.
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//
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uint64_t ui64RetVal;
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ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, WTB)) << 32;
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ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, WTA)) << 0;
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return ui64RetVal;
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}
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//*****************************************************************************
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//
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//! @brief Gets the state of one GPIO from the DATA ENABLE REGISTER.
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//!
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//! @param ui32BitNum - GPIO number.
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//!
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//! This function gets the state of one GPIO from the DATA ENABLE REGISTER.
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//!
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//! @return the current state for the requested GPIO.
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//
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//*****************************************************************************
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uint32_t
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am_hal_gpio_out_enable_bit_get(uint32_t ui32BitNum)
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{
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//
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// Return 0 or 1.
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//
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return (AM_HAL_GPIO_EN(ui32BitNum) & AM_HAL_GPIO_EN_M(ui32BitNum)) ? 1 : 0;
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}
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//*****************************************************************************
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//
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//! @brief Gets the state of ALL GPIOs from the DATA ENABLE REGISTER.
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//!
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//! @param ui32BitNum - GPIO number.
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//!
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//! This function gets the state of all GPIOs from the DATA ENABLE REGISTER.
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//!
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//! @return the current state for the ALL GPIOs.
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//
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//*****************************************************************************
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uint64_t
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am_hal_gpio_out_enable_get(void)
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{
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//
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// Combine upper or lower GPIO words into one 64 bit return value.
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//
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uint64_t ui64RetVal;
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ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, ENB)) << 32;
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ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, ENA)) << 0;
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return ui64RetVal;
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}
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//*****************************************************************************
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//
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//! @brief Enable selected GPIO Interrupts.
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//!
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//! @param ui64InterruptMask - GPIOs to enable interrupts on.
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//!
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//! Use this function to enable the GPIO interrupts.
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//!
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//! @return None
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//
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//*****************************************************************************
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void
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am_hal_gpio_int_enable(uint64_t ui64InterruptMask)
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{
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//
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// Enable the interrupts.
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//
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AM_REG(GPIO, INT1EN) |= (ui64InterruptMask >> 32);
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AM_REG(GPIO, INT0EN) |= (ui64InterruptMask & 0xFFFFFFFF);
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}
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//*****************************************************************************
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//
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//! @brief Enable selected GPIO Interrupts.
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//!
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//! Use this function to enable the GPIO interrupts.
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//!
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//! @return logical or of all enabled interrupts. Use AM_HAL_GPIO_BITx to mask
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//! interrupts of interest.
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//
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//*****************************************************************************
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uint64_t
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am_hal_gpio_int_enable_get(void)
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{
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//
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// Return enabled interrupts.
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//
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uint64_t ui64RetVal;
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ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, INT1EN)) << 32;
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ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, INT0EN)) << 0;
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return ui64RetVal;
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}
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//*****************************************************************************
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//
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//! @brief Disable selected GPIO Interrupts.
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//!
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//! @param ui64InterruptMask - GPIOs to disable interrupts on.
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//!
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//! Use this function to disable the GPIO interrupts.
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//!
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//! ui64InterruptMask should be a logical or of AM_HAL_GPIO_BITx defines.
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//!
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//! @return None
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//
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//*****************************************************************************
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void
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am_hal_gpio_int_disable(uint64_t ui64InterruptMask)
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{
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//
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// Disable the interrupts.
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//
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AM_CRITICAL_BEGIN_ASM
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AM_REG(GPIO, INT1EN) &= ~(ui64InterruptMask >> 32);
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AM_REG(GPIO, INT0EN) &= ~(ui64InterruptMask & 0xFFFFFFFF);
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AM_CRITICAL_END_ASM
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}
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//*****************************************************************************
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//
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//! @brief Clear selected GPIO Interrupts.
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//!
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//! @param ui64InterruptMask - GPIOs to clear interrupts on.
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//!
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//! Use this function to clear the GPIO interrupts.
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//!
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//! ui64InterruptMask should be a logical or of AM_HAL_GPIO_BITx defines.
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//!
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//! @return None
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//
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//*****************************************************************************
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void
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am_hal_gpio_int_clear(uint64_t ui64InterruptMask)
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{
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//
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// Clear the interrupts.
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//
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AM_CRITICAL_BEGIN_ASM
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AM_REG(GPIO, INT1CLR) = (ui64InterruptMask >> 32);
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AM_REG(GPIO, INT0CLR) = (ui64InterruptMask & 0xFFFFFFFF);
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AM_CRITICAL_END_ASM
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}
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//*****************************************************************************
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//
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//! @brief Set selected GPIO Interrupts.
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//!
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//! @param ui64InterruptMask - GPIOs to set interrupts on.
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//!
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//! Use this function to set the GPIO interrupts.
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//!
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//! ui64InterruptMask should be a logical or of AM_HAL_GPIO_BITx defines.
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//!
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//! @return None
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//
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//*****************************************************************************
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void
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am_hal_gpio_int_set(uint64_t ui64InterruptMask)
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{
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//
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// Set the interrupts.
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//
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AM_REG(GPIO, INT1SET) = (ui64InterruptMask >> 32);
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AM_REG(GPIO, INT0SET) = (ui64InterruptMask & 0xFFFFFFFF);
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}
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//*****************************************************************************
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//
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//! @brief Set selected GPIO Interrupts.
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//!
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//! @param bEnabledOnly - return the status of only the enabled interrupts.
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//!
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//! Use this function to set the GPIO interrupts.
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//!
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//! @return None
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//
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//*****************************************************************************
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uint64_t
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am_hal_gpio_int_status_get(bool bEnabledOnly)
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{
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uint64_t ui64RetVal, ui64Mask;
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//
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// Combine upper or lower GPIO words into one 64 bit return value.
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//
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ui64Mask = 0xFFFFFFFFFFFFFFFF;
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AM_CRITICAL_BEGIN_ASM
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ui64RetVal = ((uint64_t) AM_REGn(GPIO, 0, INT1STAT)) << 32;
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ui64RetVal |= ((uint64_t) AM_REGn(GPIO, 0, INT0STAT)) << 0;
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if ( bEnabledOnly )
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{
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ui64Mask = ((uint64_t) AM_REGn(GPIO, 0, INT1EN)) << 32;
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ui64Mask |= ((uint64_t) AM_REGn(GPIO, 0, INT0EN)) << 0;
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}
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ui64RetVal &= ui64Mask;
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AM_CRITICAL_END_ASM
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return ui64RetVal;
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}
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//*****************************************************************************
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//
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//! @brief Convenience function for responding to pin interrupts.
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//!
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//! @param ui64Status is the interrupt status as returned by
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//! am_hal_gpio_int_status_get()
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//!
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//! This function may be called from am_hal_gpio_isr() to read the status of
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//! the GPIO interrupts, determine which pin(s) caused the most recent
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//! interrupt, and call an interrupt handler function to respond. The interrupt
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//! handler to be called must be first registered with the
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//! am_hal_gpio_int_register() function.
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//!
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//! In the event that multiple GPIO interrupts are active, the corresponding
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//! interrupt handlers will be called in numerical order by GPIO number
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//! starting with the lowest GPIO number.
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//!
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//! @return None.
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//
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//*****************************************************************************
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void
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am_hal_gpio_int_service(uint64_t ui64Status)
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{
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uint32_t ui32Status;
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uint32_t ui32Clz;
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am_hal_gpio_handler_t pfnHandler;
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//
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// Handle any active interrupts in the lower 32 bits
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//
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ui32Status = (uint32_t) ui64Status;
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while ( ui32Status )
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{
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//
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// Pick one of any remaining active interrupt bits
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//
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#ifdef __IAR_SYSTEMS_ICC__
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ui32Clz = __CLZ(ui32Status);
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#else
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ui32Clz = __builtin_clz(ui32Status);
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#endif
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//
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// Turn off the bit we picked in the working copy
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//
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ui32Status &= ~(0x80000000 >> ui32Clz);
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|
|
//
|
||
|
|
// Check the bit handler table to see if there is an interrupt handler
|
||
|
|
// registered for this particular bit.
|
||
|
|
//
|
||
|
|
pfnHandler = am_hal_gpio_ppfnHandlers[31 - ui32Clz];
|
||
|
|
if ( pfnHandler )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// If we found an interrupt handler routine, call it now.
|
||
|
|
//
|
||
|
|
pfnHandler();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//
|
||
|
|
// Handle any active interrupts in the upper 32 bits
|
||
|
|
//
|
||
|
|
ui32Status = (uint32_t) (ui64Status >> 32);
|
||
|
|
while ( ui32Status )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Pick one of any remaining active interrupt bits
|
||
|
|
//
|
||
|
|
#ifdef __IAR_SYSTEMS_ICC__
|
||
|
|
ui32Clz = __CLZ(ui32Status);
|
||
|
|
#else
|
||
|
|
ui32Clz = __builtin_clz(ui32Status);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
//
|
||
|
|
// Turn off the bit we picked in the working copy
|
||
|
|
//
|
||
|
|
ui32Status &= ~(0x80000000 >> ui32Clz);
|
||
|
|
|
||
|
|
//
|
||
|
|
// Check the bit handler table to see if there is an interrupt handler
|
||
|
|
// registered for this particular bit.
|
||
|
|
//
|
||
|
|
pfnHandler = am_hal_gpio_ppfnHandlers[63 - ui32Clz];
|
||
|
|
if ( pfnHandler )
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// If we found an interrupt handler routine, call it now.
|
||
|
|
//
|
||
|
|
pfnHandler();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Register an interrupt handler for an individual GPIO pin.
|
||
|
|
//!
|
||
|
|
//! @param ui32GPIONumber - GPIO number to assign this interrupt handler to.
|
||
|
|
//! @param pfnHandler - Function to call when this GPIO interrupt is received.
|
||
|
|
//!
|
||
|
|
//! This function allows the caller to specify a function that should be called
|
||
|
|
//! any time a GPIO interrupt is received on a particular pin. Registering an
|
||
|
|
//! interrupt handler using this function adds the function pointer to an array
|
||
|
|
//! in SRAM. This interrupt handler will be called by am_hal_gpio_int_service()
|
||
|
|
//! whenever the ui64Status parameter indicates that the corresponding pin is
|
||
|
|
//! asserting it's interrupt.
|
||
|
|
//!
|
||
|
|
//! To remove an interrupt handler that has already been registered, the
|
||
|
|
//! pfnHandler parameter may be set to zero.
|
||
|
|
//!
|
||
|
|
//! @note This function will not have any effect unless the
|
||
|
|
//! am_hal_gpio_int_service() function is being used.
|
||
|
|
//!
|
||
|
|
//! @return None.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
void
|
||
|
|
am_hal_gpio_int_register(uint32_t ui32GPIONumber,
|
||
|
|
am_hal_gpio_handler_t pfnHandler)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check to make sure the GPIO number is valid. (Debug builds only)
|
||
|
|
//
|
||
|
|
am_hal_debug_assert_msg(ui32GPIONumber < 64, "GPIO number out of range.");
|
||
|
|
|
||
|
|
am_hal_gpio_ppfnHandlers[ui32GPIONumber] = pfnHandler;
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
//! @brief Get the state of one GPIO polarity bit.
|
||
|
|
//!
|
||
|
|
//! @param ui32BitNum - GPIO number.
|
||
|
|
//!
|
||
|
|
//! This function gets the state of one GPIO polarity bit.
|
||
|
|
//!
|
||
|
|
//! @note When the bit is a one the interrupt polarity is rising edge.
|
||
|
|
//!
|
||
|
|
//! @return the current polarity.
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
bool
|
||
|
|
am_hal_gpio_int_polarity_bit_get(uint32_t ui32BitNum)
|
||
|
|
{
|
||
|
|
//
|
||
|
|
// Check the GPIO_CFGx register's interrupt polarity bit corresponding to
|
||
|
|
// this pin number.
|
||
|
|
//
|
||
|
|
return (AM_REGVAL(AM_HAL_GPIO_CFG(ui32BitNum)) &
|
||
|
|
AM_HAL_GPIO_POL_M(ui32BitNum));
|
||
|
|
}
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// End Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|