2022-11-10 22:22:48 +08:00
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fxhci_debug.c
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* Date: 2022-02-11 13:33:12
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* LastEditTime: 2022-02-18 09:12:15
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* Description: This files is for implementation of XHCI debug utilities
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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2023-05-11 10:25:21 +08:00
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* 1.0 zhugengyu 2022/2/7 init commit
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2022-11-10 22:22:48 +08:00
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*/
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#include <inttypes.h>
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#include "fdebug.h"
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#include "fxhci_private.h"
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#define FUSB_DEBUG_TAG "FXHCI_DEBUG"
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#define FUSB_ERROR(format, ...) FT_DEBUG_PRINT_E(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_WARN(format, ...) FT_DEBUG_PRINT_W(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_INFO(format, ...) FT_DEBUG_PRINT_I(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_DEBUG(format, ...) FT_DEBUG_PRINT_D(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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void FXhciDumpSlotCtx(const FXhciSlotCtx *const sc)
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{
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FUSB_INFO("Slot Context (@%p): ", sc);
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FUSB_INFO(" FIELD1\t0x%08x ", sc->f1);
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FUSB_INFO(" FIELD2\t0x%08x ", sc->f2);
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FUSB_INFO(" FIELD3\t0x%08x ", sc->f3);
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FUSB_INFO(" FIELD4\t0x%08x ", sc->f4);
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FXHCI_SC_DUMP(FUSB_INFO, ROUTE, sc);
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FXHCI_SC_DUMP(FUSB_INFO, SPEED1, sc);
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FXHCI_SC_DUMP(FUSB_INFO, MTT, sc);
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FXHCI_SC_DUMP(FUSB_INFO, HUB, sc);
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FXHCI_SC_DUMP(FUSB_INFO, CTXENT, sc);
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FXHCI_SC_DUMP(FUSB_INFO, RHPORT, sc);
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FXHCI_SC_DUMP(FUSB_INFO, NPORTS, sc);
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FXHCI_SC_DUMP(FUSB_INFO, TTID, sc);
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FXHCI_SC_DUMP(FUSB_INFO, TTPORT, sc);
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FXHCI_SC_DUMP(FUSB_INFO, TTT, sc);
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FXHCI_SC_DUMP(FUSB_INFO, UADDR, sc);
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FXHCI_SC_DUMP(FUSB_INFO, STATE, sc);
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}
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void FXhciDumpEpCtx(const FXhciEpCtx *const ec)
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{
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FUSB_INFO("Endpoint Context (@%p): ", ec);
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FUSB_INFO(" FIELD1\t0x%08x ", ec->f1);
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FUSB_INFO(" FIELD2\t0x%08x ", ec->f2);
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FUSB_INFO(" TRDQ_L\t0x%08x ", ec->tr_dq_low);
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FUSB_INFO(" TRDQ_H\t0x%08x ", ec->tr_dq_high);
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FUSB_INFO(" FIELD5\t0x%08x ", ec->f5);
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FXHCI_EC_DUMP(FUSB_INFO, STATE, ec);
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FXHCI_EC_DUMP(FUSB_INFO, INTVAL, ec);
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FXHCI_EC_DUMP(FUSB_INFO, CERR, ec);
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FXHCI_EC_DUMP(FUSB_INFO, TYPE, ec);
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FXHCI_EC_DUMP(FUSB_INFO, MBS, ec);
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FXHCI_EC_DUMP(FUSB_INFO, MPS, ec);
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FXHCI_EC_DUMP(FUSB_INFO, DCS, ec);
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FXHCI_EC_DUMP(FUSB_INFO, AVRTRB, ec);
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FXHCI_EC_DUMP(FUSB_INFO, MXESIT, ec);
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}
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void FXhciDumpDevCtx(const FXhciDevCtx *const dc, const u32 ctx_mask)
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{
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unsigned int i;
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if (ctx_mask & 1)
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{
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2022-11-10 22:22:48 +08:00
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FXhciDumpSlotCtx(dc->slot);
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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for (i = 1; i <= FXHCI_SC_GET(CTXENT, dc->slot); ++i)
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{
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if (ctx_mask & (1 << i))
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2023-05-11 10:25:21 +08:00
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{
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2022-11-10 22:22:48 +08:00
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FXhciDumpEpCtx(dc->ep[i]);
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}
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2022-11-10 22:22:48 +08:00
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}
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}
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void FXhciDumpInputCtx(const FXhciInputCtx *const ic)
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{
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FUSB_INFO("Input Control add: 0x%08x ", *ic->add);
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FUSB_INFO("Input Control drop: 0x%08x ", *ic->drop);
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FXhciDumpDevCtx(&ic->dev, *ic->add);
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}
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void FXhciDumpTransferTrb(const FXhciTrb *const cur)
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{
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FUSB_INFO("Transfer TRB (@%p): ", cur);
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FUSB_INFO(" PTR_L\t0x%08x ", cur->ptr_low);
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FUSB_INFO(" PTR_H\t0x%08x ", cur->ptr_high);
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FUSB_INFO(" STATUS\t0x%08x ", cur->status);
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FUSB_INFO(" CNTRL\t0x%08x ", cur->control);
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FXHCI_TRB_DUMP(FUSB_INFO, TL, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, TDS, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, C, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, ISP, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, CH, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, IOC, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, IDT, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, TT, cur);
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FXHCI_TRB_DUMP(FUSB_INFO, DIR, cur);
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}
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static const FXhciTrb *FXhciNextTrb(const FXhciTrb *const cur)
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{
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if (FXHCI_TRB_GET(TT, cur) == FXHCI_TRB_LINK)
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{
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return (!cur->ptr_low) ? NULL : (void *)(uintptr)(cur->ptr_low);
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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else
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{
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2022-11-10 22:22:48 +08:00
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return cur + 1;
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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}
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void FXhciDumpTransferTrbs(const FXhciTrb *const first, const FXhciTrb *const last)
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{
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const FXhciTrb *cur;
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for (cur = first; cur; cur = FXhciNextTrb(cur))
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{
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FXhciDumpTransferTrb(cur);
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if (cur == last)
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{
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2022-11-10 22:22:48 +08:00
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break;
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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}
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}
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