2021-10-14 18:50:35 +08:00
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/**
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******************************************************************************
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* @file HAL_UART.c
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* @author IC Applications Department
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* @version V0.8
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* @date 2019_08_02
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* @brief This file provides all the UART firmware functions.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, HOLOCENE SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
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*/
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2021-10-14 18:50:35 +08:00
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/* Includes ------------------------------------------------------------------*/
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#include "HAL_uart.h"
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#include "HAL_rcc.h"
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/** @addtogroup StdPeriph_Driver
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* @{
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*/
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2021-10-14 19:21:16 +08:00
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/** @defgroup UART
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* @brief UART driver modules
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* @{
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*/
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/** @defgroup UART_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup UART_Private_Defines
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* @{
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*/
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/* UART UE Mask */
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#define GCR_UE_Set ((uint16_t)0x0001) /* UART Enable Mask */
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#define GCR_UE_Reset ((uint16_t)0xFFFE) /* UART Disable Mask */
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#define CCR_CLEAR_Mask ((uint32_t)0xFFFFFF30) /* UART CCR Mask */
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#define GCR_CLEAR_Mask ((uint32_t)0xFFFFFFE0) /* UART GCR Mask */
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/**
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* @}
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*/
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/** @defgroup UART_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup UART_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup UART_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup UART_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the UARTx peripheral registers to their
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* default reset values.
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3.
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* @retval : None
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*/
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void UART_DeInit(UART_TypeDef* UARTx)
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{
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/* Check the parameters */
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assert_param(IS_UART_ALL_PERIPH(UARTx));
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switch (*(uint32_t*)&UARTx)
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{
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case UART1_BASE:
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_UART1, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_UART1, DISABLE);
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break;
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default:
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break;
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}
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}
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/**
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* @brief Initializes the UARTx peripheral according to the specified
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* parameters in the UART_InitStruct .
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3.
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* @param UART_InitStruct: pointer to a UART_InitTypeDef structure
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* that contains the configuration information for the
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* specified UART peripheral.
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* @retval : None
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*/
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void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
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{
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uint32_t tmpreg = 0x00;
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RCC_ClocksTypeDef RCC_ClocksStatus;
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/* Check the parameters */
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assert_param(IS_UART_ALL_PERIPH(UARTx));
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assert_param(IS_UART_BAUDRATE(UART_InitStruct->UART_BaudRate));
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assert_param(IS_UART_WORD_LENGTH(UART_InitStruct->UART_WordLength));
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assert_param(IS_UART_STOPBITS(UART_InitStruct->UART_StopBits));
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assert_param(IS_UART_PARITY(UART_InitStruct->UART_Parity));
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assert_param(IS_UART_MODE(UART_InitStruct->UART_Mode));
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assert_param(IS_UART_HARDWARE_FLOW_CONTROL(UART_InitStruct->UART_HardwareFlowControl));
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/*---------------------------- UART CCR Configuration -----------------------*/
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/* get UART CCR values */
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tmpreg = UARTx->CCR;
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/* Clear spb,psel,pen bits */
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tmpreg &= CCR_CLEAR_Mask;
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/* Configure the UART Word Length,the UART Stop Bits,Parity ------------*/
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/* Set the char bits according to UART_WordLength value */
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/* Set spb bit according to UART_StopBits value */
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/* Set PEN bit according to UART_Parity value */
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tmpreg |= (uint32_t)UART_InitStruct->UART_WordLength |(uint32_t)UART_InitStruct->UART_StopBits |UART_InitStruct->UART_Parity;
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/* Write to UART CCR */
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UARTx->CCR = tmpreg;
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/*---------------------------- UART GCR Configuration -----------------------*/
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/* get UART GCR values */
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tmpreg = UARTx->GCR;
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/* Clear TXEN and RXEN ,autoflowen, mode ,uarten bits */
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tmpreg &= GCR_CLEAR_Mask;
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/* Set autorlowen bit according to UART_HardwareFlowControl value */
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/* Set rxen,txen bits according to UART_Mode value */
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tmpreg |= UART_InitStruct->UART_HardwareFlowControl | UART_InitStruct->UART_Mode ;
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/* Write to UART GCR */
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UARTx->GCR = tmpreg;
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/*---------------------------- UART BRR Configuration -----------------------*/
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/* Configure the UART Baud Rate -------------------------------------------RCC_ClocksStatus.PCLK1_Frequency;*/
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RCC_GetClocksFreq(&RCC_ClocksStatus);
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/* Determine the UART_baud*/
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tmpreg = ((RCC_ClocksStatus.PCLK1_Frequency)/(UART_InitStruct->UART_BaudRate)/16) ;
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/* Write to UART BRR */
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UARTx->BRR = tmpreg;
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}
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/**
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* @brief Fills each UART_InitStruct member with its default value.
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* @param UART_InitStruct: pointer to a UART_InitTypeDef structure
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* which will be initialized.
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* @retval : None
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*/
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void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
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{
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/* UART_InitStruct members default value */
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UART_InitStruct->UART_BaudRate = 9600;
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UART_InitStruct->UART_WordLength = UART_WordLength_8b;
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UART_InitStruct->UART_StopBits = UART_StopBits_1;
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UART_InitStruct->UART_Parity = UART_Parity_No ;
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UART_InitStruct->UART_Mode = UART_Mode_Rx | UART_Mode_Tx;
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UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
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}
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/**
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* @brief Enables or disables the specified UART peripheral.
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3.
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* @param NewState: new state of the UARTx peripheral.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_UART_ALL_PERIPH(UARTx));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected UART by setting the uarten bit in the GCR register */
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UARTx->GCR |= GCR_UE_Set;
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}
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else
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{
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/* Disable the selected UART by clearing the uarten bit in the GCR register */
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UARTx->GCR &= GCR_UE_Reset;
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}
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}
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/**
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* @brief Enables or disables the specified UART interrupts.
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3.
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* @param UART_IT: specifies the UART interrupt sources to be
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* enabled or disabled.
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* This parameter can be one of the following values:
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*
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* @arg UART_IT_ERR: Error interrupt(Frame error,)
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* @arg UART_IT_PE: Parity Error interrupt
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* @arg UART_OVER_ERR: overrun Error interrupt
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* @arg UART_TIMEOUT_ERR: timeout Error interrupt
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* @arg UART_IT_RXIEN: Receive Data register interrupt
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* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
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* @param NewState: new state of the specified UARTx interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void UART_ITConfig(UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_UART_ALL_PERIPH(UARTx));
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assert_param(IS_UART_CONFIG_IT(UART_IT));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the UART_IT interrupt */
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UARTx->IER |= UART_IT;
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}
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else
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{
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/* Disable the UART_IT interrupt */
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UARTx->IER &= ~ UART_IT;
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}
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}
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/**
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* @brief Enables or disables the UART’s DMA interface.
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3 .
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* @param UART_DMAReq: specifies the DMA request.
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* This parameter can be any combination of the following values:
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* @arg UART_DMAReq_EN: UART DMA transmit request
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*
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* @param NewState: new state of the DMA Request sources.
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* This parameter can be: ENABLE or DISABLE.
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* @note The DMA mode is not available for UART5.
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* @retval : None
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*/
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void UART_DMACmd(UART_TypeDef* UARTx, uint16_t UART_DMAReq, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_UART_1234_PERIPH(UARTx));
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assert_param(IS_UART_DMAREQ(UART_DMAReq));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the DMA transfer */
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UARTx->GCR |= UART_DMAReq;
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}
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else
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{
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/* Disable the DMA transfer */
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UARTx->GCR &= ~UART_DMAReq;
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}
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}
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/**
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* @brief Transmits single data through the UARTx peripheral.
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* @param UARTx: Select the UART or the UART peripheral.
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* This parameter can be one of the following values:
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* UART1, UART2, UART3.
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* @param Data: the data to transmit.
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* @retval : None
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*/
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void UART_SendData(UART_TypeDef* UARTx, uint16_t Data)
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{
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|
|
/* Check the parameters */
|
|
|
|
|
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
2021-10-14 19:21:16 +08:00
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|
|
|
assert_param(IS_UART_DATA(Data));
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|
|
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|
2021-10-14 18:50:35 +08:00
|
|
|
|
/* Transmit Data */
|
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|
|
|
UARTx->TDR = (Data & (uint16_t)0x00FF);
|
|
|
|
|
}
|
|
|
|
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|
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|
|
|
/**
|
|
|
|
|
* @brief Returns the most recent received data by the UARTx peripheral.
|
2021-10-14 19:21:16 +08:00
|
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|
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* @param UARTx: Select the UART or the UART peripheral.
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* UART1, UART2, UART3.
|
|
|
|
|
* @retval : The received data.
|
|
|
|
|
*/
|
|
|
|
|
uint16_t UART_ReceiveData(UART_TypeDef* UARTx)
|
|
|
|
|
{
|
|
|
|
|
/* Check the parameters */
|
|
|
|
|
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
2021-10-14 19:21:16 +08:00
|
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|
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|
2021-10-14 18:50:35 +08:00
|
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|
|
/* Receive Data */
|
|
|
|
|
return (uint16_t)(UARTx->RDR & (uint16_t)0x00FF);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Checks whether the specified UART flag is set or not.
|
2021-10-14 19:21:16 +08:00
|
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|
|
* @param UARTx: Select the UART or the UART peripheral.
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* UART1, UART2, UART3.
|
|
|
|
|
* @param UART_FLAG: specifies the flag to check.
|
|
|
|
|
* This parameter can be one of the following values:
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
|
|
|
|
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_FLAG_RXAVL:RX Buffer has a byte flag
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_FLAG_OVER:OverRun Error flag
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_FLAG_TXEPT: tx and shifter are emptys flag
|
|
|
|
|
* @retval : The new state of UART_FLAG (SET or RESET).
|
|
|
|
|
*/
|
|
|
|
|
FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, uint16_t UART_FLAG)
|
|
|
|
|
{
|
|
|
|
|
FlagStatus bitstatus = RESET;
|
|
|
|
|
/* Check the parameters */
|
|
|
|
|
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
|
|
|
|
assert_param(IS_UART_FLAG(UART_FLAG));
|
|
|
|
|
if ((UARTx->CSR & UART_FLAG) != (uint16_t)RESET)
|
|
|
|
|
{
|
|
|
|
|
bitstatus = SET;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
bitstatus = RESET;
|
|
|
|
|
}
|
|
|
|
|
return bitstatus;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Clears the UARTx's pending flags.
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @param UARTx: Select the UART or the UART peripheral.
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* UART1, UART2, UART3, UART4 or UART5.
|
|
|
|
|
* @param UART_FLAG: specifies the flag to clear.
|
|
|
|
|
* This parameter can be any combination of the following values:
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
|
|
|
|
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_FLAG_RXAVL:RX Buffer has a byte flag
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_FLAG_OVER:OverRun Error flag
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_FLAG_TXEPT: tx and shifter are emptys flag
|
|
|
|
|
* @retval : None
|
|
|
|
|
*/
|
|
|
|
|
void UART_ClearFlag(UART_TypeDef* UARTx, uint16_t UART_FLAG)
|
|
|
|
|
{
|
2021-10-14 19:21:16 +08:00
|
|
|
|
|
2021-10-14 18:50:35 +08:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Checks whether the specified UART interrupt has occurred or not.
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @param UARTx: Select the UART or the UART peripheral.
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* UART1, UART2, UART3.
|
|
|
|
|
* @param UART_IT: specifies the UART interrupt source to check.
|
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* @arg UART_IT_ERR: Error interrupt(Frame error,)
|
|
|
|
|
* @arg UART_IT_PE: Parity Error interrupt
|
|
|
|
|
* @arg UART_OVER_ERR: overrun Error interrupt
|
|
|
|
|
* @arg UART_TIMEOUT_ERR: timeout Error interrupt
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
|
|
|
|
|
* @retval : The new state of UART_IT (SET or RESET).
|
|
|
|
|
*/
|
|
|
|
|
ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT)
|
|
|
|
|
{
|
|
|
|
|
FlagStatus bitstatus = RESET;
|
|
|
|
|
/* Check the parameters */
|
|
|
|
|
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
|
|
|
|
assert_param(IS_UART_FLAG(UART_FLAG));
|
2021-10-14 19:21:16 +08:00
|
|
|
|
assert_param(IS_UART_PERIPH_FLAG(UARTx, UART_FLAG)); /* The CTS flag is not available for UART4 and UART5 */
|
2021-10-14 18:50:35 +08:00
|
|
|
|
if ((UARTx->ISR & UART_IT) != (uint16_t)RESET)
|
|
|
|
|
{
|
|
|
|
|
bitstatus = SET;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
bitstatus = RESET;
|
|
|
|
|
}
|
|
|
|
|
return bitstatus;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/**
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @brief Clears the UARTx’s interrupt pending bits.
|
|
|
|
|
* @param UARTx: Select the UART or the UART peripheral.
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* UART1, UART2, UART3, UART4 or UART5.
|
|
|
|
|
* @param UART_IT: specifies the interrupt pending bit to clear.
|
|
|
|
|
* This parameter can be one of the following values:
|
|
|
|
|
* @arg UART_IT_ERR: Error interrupt(Frame error,)
|
|
|
|
|
* @arg UART_IT_PE: Parity Error interrupt
|
|
|
|
|
* @arg UART_OVER_ERR: overrun Error interrupt
|
|
|
|
|
* @arg UART_TIMEOUT_ERR: timeout Error interrupt
|
2021-10-14 19:21:16 +08:00
|
|
|
|
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
2021-10-14 18:50:35 +08:00
|
|
|
|
* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
|
|
|
|
|
|
|
|
|
|
* @retval : None
|
|
|
|
|
*/
|
|
|
|
|
void UART_ClearITPendingBit(UART_TypeDef* UARTx, uint16_t UART_IT)
|
|
|
|
|
{
|
2021-10-14 19:21:16 +08:00
|
|
|
|
|
2021-10-14 18:50:35 +08:00
|
|
|
|
/* Check the parameters */
|
|
|
|
|
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
|
|
|
|
assert_param(IS_UART_CLEAR_IT(UART_IT));
|
|
|
|
|
assert_param(IS_UART_PERIPH_IT(UARTx, UART_IT)); /* The CTS interrupt is not available for UART4 and UART5 */
|
|
|
|
|
/*clear UART_IT pendings bit*/
|
|
|
|
|
UARTx->ICR = UART_IT;
|
|
|
|
|
}
|
|
|
|
|
/**
|
|
|
|
|
* @}
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @}
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @}
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
/*-------------------------(C) COPYRIGHT 2016 HOLOCENE ----------------------*/
|