2015-07-09 07:38:07 +08:00
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/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2010-06-25 Bernard first version
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* 2011-08-08 lgnq modified for Loongson LS1B
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* 2015-07-06 chinesebear modified for Loongson LS1C
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include "board.h"
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#include "uart.h"
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#include "ls1c.h"
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/**
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* @addtogroup Loongson LS1B
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*/
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/*@{*/
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/**
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* This is the timer interrupt service routine.
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*/
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void rt_hw_timer_handler(void)
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{
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unsigned int count;
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count = read_c0_compare();
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write_c0_compare(count);
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write_c0_count(0);
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/* increase a OS tick */
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rt_tick_increase();
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}
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/**
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* This function will initial OS timer
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*/
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void rt_hw_timer_init(void)
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{
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write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
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write_c0_count(0);
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}
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2017-08-10 15:35:03 +08:00
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/**
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* init hardware FPU
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*/
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void rt_hw_fpu_init(void)
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{
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rt_uint32_t c0_status = 0;
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rt_uint32_t c1_status = 0;
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2018-02-09 09:22:25 +08:00
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// 使能协处理器1--FPU
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2017-08-10 15:35:03 +08:00
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c0_status = read_c0_status();
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c0_status |= (ST0_CU1 | ST0_FR);
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write_c0_status(c0_status);
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2018-02-09 09:22:25 +08:00
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// 配置FPU
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2017-08-10 15:35:03 +08:00
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c1_status = read_c1_status();
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c1_status |= (FPU_CSR_FS | FPU_CSR_FO | FPU_CSR_FN); // set FS, FO, FN
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c1_status &= ~(FPU_CSR_ALL_E); // disable exception
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c1_status = (c1_status & (~FPU_CSR_RM)) | FPU_CSR_RN; // set RN
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write_c1_status(c1_status);
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return ;
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}
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2015-07-09 07:38:07 +08:00
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/**
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* This function will initial sam7s64 board.
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*/
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void rt_hw_board_init(void)
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{
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2018-03-17 18:59:50 +08:00
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#ifdef RT_USING_SERIAL
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2015-07-09 07:38:07 +08:00
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/* init hardware UART device */
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rt_hw_uart_init();
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#endif
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#ifdef RT_USING_CONSOLE
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/* set console device */
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2018-01-15 14:56:48 +08:00
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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2015-07-09 07:38:07 +08:00
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#endif
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2018-03-17 18:59:50 +08:00
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/* init operating system timer */
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rt_hw_timer_init();
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2015-07-09 07:38:07 +08:00
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2017-09-13 15:21:09 +08:00
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#ifdef RT_USING_FPU
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2017-08-10 15:35:03 +08:00
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/* init hardware fpu */
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rt_hw_fpu_init();
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2017-09-13 15:21:09 +08:00
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#endif
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2017-08-10 15:35:03 +08:00
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2018-03-17 18:59:50 +08:00
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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2018-01-15 14:56:48 +08:00
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2018-03-17 18:59:50 +08:00
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rt_kprintf("current sr: 0x%08x\n", read_c0_status());
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2018-01-15 14:56:48 +08:00
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}
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2015-07-09 07:38:07 +08:00
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#define __raw_out_put(unr) \
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while (*ptr) \
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{ \
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if (*ptr == '\n') \
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{ \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = '\r'; \
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} \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = *ptr; \
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ptr ++; \
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}
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_console_output(const char *ptr)
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{
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#if defined(RT_USING_UART0)
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__raw_out_put(0);
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#elif defined(RT_USING_UART2)
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__raw_out_put(2);
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#elif defined(RT_USING_UART3)
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__raw_out_put(3);
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#endif
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}
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/*@}*/
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