2021-02-18 13:29:12 +08:00
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#ifndef __SWM320_SRAM_H__
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#define __SWM320_SRAM_H__
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typedef struct {
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2021-05-06 10:10:29 +08:00
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uint8_t ClkDiv; //SRAM_CLKDIV_5...SRAM_CLKDIV_16，根据SRAM芯片所能跑的最高频率选择合适分频
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uint8_t DataWidth; //SRAM_DATAWIDTH_8、SRAM_DATAWIDTH_16
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2021-02-18 13:29:12 +08:00
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} SRAM_InitStructure;
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#define SRAM_CLKDIV_4 3
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#define SRAM_CLKDIV_5 4
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#define SRAM_CLKDIV_6 5
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#define SRAM_CLKDIV_7 6
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#define SRAM_CLKDIV_8 7
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#define SRAM_CLKDIV_9 8
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#define SRAM_CLKDIV_10 9
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#define SRAM_CLKDIV_11 10
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#define SRAM_CLKDIV_12 11
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#define SRAM_CLKDIV_13 12
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#define SRAM_CLKDIV_14 13
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#define SRAM_CLKDIV_15 14
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#define SRAM_CLKDIV_16 15
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#define SRAM_DATAWIDTH_8 1
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#define SRAM_DATAWIDTH_16 0
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void SRAM_Init(SRAM_InitStructure * initStruct);
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#endif //__SWM320_SRAM_H__
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