2022-11-10 22:22:48 +08:00
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fxhci_evt.c
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* Date: 2022-02-11 13:33:12
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* LastEditTime: 2022-02-18 09:13:09
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* Description: This files is for implementation of XHCI event
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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2023-05-11 10:25:21 +08:00
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* 1.0 zhugengyu 2022/2/7 init commit
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2022-11-10 22:22:48 +08:00
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*/
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#include "fsleep.h"
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#include "fdebug.h"
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#include "fxhci_private.h"
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#define FUSB_DEBUG_TAG "FXHCI-EVT"
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#define FUSB_ERROR(format, ...) FT_DEBUG_PRINT_E(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_WARN(format, ...) FT_DEBUG_PRINT_W(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_INFO(format, ...) FT_DEBUG_PRINT_I(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FUSB_DEBUG(format, ...) FT_DEBUG_PRINT_D(FUSB_DEBUG_TAG, format, ##__VA_ARGS__)
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/**
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* @name: FXhciResetEvtRing
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* @msg: 重置Event TRB ring
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* @return {*}
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* @param {FXhciEvtRing} *er, Event TRB ring实例
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*/
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void FXhciResetEvtRing(FXhciEvtRing *const er)
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{
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int i;
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for (i = 0; i < FXHCI_EVENT_RING_SIZE; ++i)
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2023-05-11 10:25:21 +08:00
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{
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2022-11-10 22:22:48 +08:00
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er->ring[i].control &= ~FXHCI_TRB_CYCLE;
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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er->cur = er->ring;
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er->last = er->ring + FXHCI_EVENT_RING_SIZE;
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er->ccs = 1;
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er->adv = 1;
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}
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static inline int FXhciEvtReady(const FXhciEvtRing *const er)
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{
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return (er->cur->control & FXHCI_TRB_CYCLE) == er->ccs;
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}
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void FXhciUpdateEvtDQ(FXhci *const xhci)
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{
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if (xhci->er.adv)
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{
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2023-05-11 10:25:21 +08:00
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FUSB_DEBUG("Updating dq ptr: @0x%lx -> %p.",
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2022-11-10 22:22:48 +08:00
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FXhciReadRt64(&xhci->mmio, 0, FXHCI_REG_RT_IR_ERDP),
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xhci->er.cur);
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FXhciWriteRt64(&xhci->mmio, 0, FXHCI_REG_RT_IR_ERDP, FXHCI_REG_RT_IR_ERDP_MASK & ((u64)(uintptr)xhci->er.cur));
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xhci->er.adv = 0;
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}
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}
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void FXhciAdvanceEvtRing(FXhci *const xhci)
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{
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xhci->er.cur++;
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xhci->er.adv = 1;
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if (xhci->er.cur == xhci->er.last)
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{
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2023-05-11 10:25:21 +08:00
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FUSB_DEBUG("Roll over in event ring.");
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2022-11-10 22:22:48 +08:00
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xhci->er.cur = xhci->er.ring;
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xhci->er.ccs ^= 1;
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FXhciUpdateEvtDQ(xhci);
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}
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}
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static void FXhciHandleTransferEvt(FXhci *const xhci)
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{
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const FXhciTrb *const ev = xhci->er.cur;
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const FXhciTransCode cc = FXHCI_TRB_GET(CC, ev); /* Completion Code */
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const int id = FXHCI_TRB_GET(ID, ev);
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const int ep = FXHCI_TRB_GET(EP, ev);
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FXhciIntrQ *intrq;
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if (id && id <= xhci->max_slots_en &&
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2023-05-11 10:25:21 +08:00
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(intrq = xhci->dev[id].interrupt_queues[ep]))
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2022-11-10 22:22:48 +08:00
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{
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/* It's a running interrupt endpoint */
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intrq->ready = (void *)(uintptr)(ev->ptr_low);
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if (cc == FXHCI_CC_SUCCESS || cc == FXHCI_CC_SHORT_PACKET)
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{
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FXHCI_TRB_SET(TL, intrq->ready,
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intrq->size - FXHCI_TRB_GET(EVTL, ev)); /* Transfer Length */
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}
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else
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{
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2023-05-11 10:25:21 +08:00
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FUSB_INFO("Interrupt transfer failed: %d.", cc);
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2022-11-10 22:22:48 +08:00
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FXHCI_TRB_SET(TL, intrq->ready, 0); /* Transfer Length */
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}
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}
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else if (cc == FXHCI_CC_STOPPED || cc == FXHCI_CC_STOPPED_LENGTH_INVALID)
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{
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/* Ignore 'Forced Stop Events' */
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}
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else
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{
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FUSB_WARN("Warning: \r\n"
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"Spurious transfer event for ID %d, EP %d: \r\n"
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" Pointer: 0x%08x%08x \r\n"
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" TL: 0x%06x \r\n"
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" CC: %d ",
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id, ep,
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ev->ptr_high, ev->ptr_low,
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FXHCI_TRB_GET(EVTL, ev), cc);
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}
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FXhciAdvanceEvtRing(xhci);
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}
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static void FXhciHandleCmdCompletionEvt(FXhci *const xhci)
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{
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const FXhciTrb *const ev = xhci->er.cur;
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FUSB_INFO("Warning: Spurious command completion event: \r\n"
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" Pointer: 0x%08x%08x \r\n"
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" CC: %d \r\n"
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" Slot ID: %d \r\n"
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" Cycle: %d ",
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ev->ptr_high, ev->ptr_low,
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FXHCI_TRB_GET(CC, ev), FXHCI_TRB_GET(ID, ev), ev->control & FXHCI_TRB_CYCLE);
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FXhciAdvanceEvtRing(xhci);
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}
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static void FXhciHandleHostCtrlEvt(FXhci *const xhci)
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{
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const FXhciTrb *const ev = xhci->er.cur;
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const FXhciTransCode cc = FXHCI_TRB_GET(CC, ev);
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switch (cc)
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{
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2023-05-11 10:25:21 +08:00
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case FXHCI_CC_EVENT_RING_FULL_ERROR:
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FUSB_INFO("Event ring full! (@%p).", xhci->er.cur);
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/*
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* If we get here, we have processed the whole queue:
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* xHC pushes this event, when it sees the ring full,
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* full of other events.
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* IMO it's save and necessary to update the dequeue
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* pointer here.
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*/
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FXhciAdvanceEvtRing(xhci);
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FXhciUpdateEvtDQ(xhci);
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break;
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default:
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FUSB_INFO("Warning: spurious host controller event: %d.", cc);
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FXhciAdvanceEvtRing(xhci);
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break;
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2022-11-10 22:22:48 +08:00
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}
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}
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/* handle standard types:
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* - command completion event
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* - port status change event
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* - transfer event
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* - host controller event
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*/
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static void FXhciHandleEvt(FXhci *const xhci)
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{
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const FXhciTrb *const ev = xhci->er.cur;
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const int trb_type = FXHCI_TRB_GET(TT, ev);
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switch (trb_type)
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{
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2023-05-11 10:25:21 +08:00
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/* Either pass along the event or advance event ring */
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case FXHCI_TRB_EV_TRANSFER:
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FXhciHandleTransferEvt(xhci);
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break;
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case FXHCI_TRB_EV_CMD_CMPL:
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FXhciHandleCmdCompletionEvt(xhci);
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break;
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case FXHCI_TRB_EV_PORTSC:
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FUSB_INFO("Port status change event for %d: %d. ",
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FXHCI_TRB_GET(PORT, ev), FXHCI_TRB_GET(CC, ev));
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/* We ignore the event as we look for the PORTSC
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registers instead, at a time when it suits _us_. */
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FXhciAdvanceEvtRing(xhci);
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break;
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case FXHCI_TRB_EV_HOST:
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FXhciHandleHostCtrlEvt(xhci);
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break;
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default:
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FUSB_INFO("Warning: spurious event: %d, completion code: %d.",
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trb_type, FXHCI_TRB_GET(CC, ev));
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FXhciAdvanceEvtRing(xhci);
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break;
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2022-11-10 22:22:48 +08:00
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}
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}
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void FXhciHandleEvts(FXhci *const xhci)
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{
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while (FXhciEvtReady(&xhci->er))
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2023-05-11 10:25:21 +08:00
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{
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2022-11-10 22:22:48 +08:00
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FXhciHandleEvt(xhci);
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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FXhciUpdateEvtDQ(xhci);
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return;
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}
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static unsigned long FXhciWaitForEvt(const FXhciEvtRing *const er,
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unsigned long *const timeout_us)
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{
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while (!FXhciEvtReady(er) && *timeout_us)
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{
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--*timeout_us;
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fsleep_microsec(1);
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}
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return *timeout_us;
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}
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static unsigned long FXhciWaitForEvtType(FXhci *const xhci,
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const int trb_type,
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unsigned long *const timeout_us)
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{
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while (FXhciWaitForEvt(&xhci->er, timeout_us))
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{
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if (FXHCI_TRB_GET(TT, xhci->er.cur) == (unsigned int)trb_type)
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2023-05-11 10:25:21 +08:00
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{
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2022-11-10 22:22:48 +08:00
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break;
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2023-05-11 10:25:21 +08:00
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}
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2022-11-10 22:22:48 +08:00
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FXhciHandleEvt(xhci);
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}
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return *timeout_us;
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}
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/*
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* Ref. xHCI Specification Revision 1.2, May 2019.
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* Section 4.6.1.2.
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*
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* Process events from xHCI Abort command.
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*
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* Returns FXHCI_CC_COMMAND_RING_STOPPED on success and FXHCI_CC_TIMEOUT on failure.
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*/
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FXhciTransCode FXhciWaitForCmdAborted(FXhci *const xhci, const FXhciTrb *const address)
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{
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/*
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* Specification says that something might be seriously wrong, if
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* we don't get a response after 5s. Still, let the caller decide,
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* what to do then.
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*/
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unsigned long timeout_us = FUSB_USB_MAX_PROCESSING_TIME_US; /* 5s */
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FXhciTransCode cc = FXHCI_CC_TIMEOUT;
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/*
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* Expects two command completion events:
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* The first with CC == COMMAND_ABORTED should point to address
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* (not present if command was not running),
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* the second with CC == COMMAND_RING_STOPPED should point to new dq.
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*/
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while (FXhciWaitForEvtType(xhci, FXHCI_TRB_EV_CMD_CMPL, &timeout_us))
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{
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if ((xhci->er.cur->ptr_low == (uintptr)(address)) &&
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2023-05-11 10:25:21 +08:00
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(xhci->er.cur->ptr_high == 0))
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2022-11-10 22:22:48 +08:00
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{
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cc = FXHCI_TRB_GET(CC, xhci->er.cur);
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FXhciAdvanceEvtRing(xhci);
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break;
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}
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FXhciHandleCmdCompletionEvt(xhci);
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}
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if (timeout_us == 0)
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{
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2023-05-11 10:25:21 +08:00
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FUSB_INFO("Warning: timeout waiting COMMAND_ABORTED or COMMAND_RING_STOPPED.");
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2022-11-10 22:22:48 +08:00
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goto update_and_return;
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}
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if (cc == FXHCI_CC_COMMAND_RING_STOPPED)
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{
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/* There may not have been a command to abort. */
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goto update_and_return;
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}
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timeout_us = FUSB_USB_MAX_PROCESSING_TIME_US; /* 5s */
|
|
|
|
|
while (FXhciWaitForEvtType(xhci, FXHCI_TRB_EV_CMD_CMPL, &timeout_us))
|
|
|
|
|
{
|
|
|
|
|
if (FXHCI_TRB_GET(CC, xhci->er.cur) == FXHCI_CC_COMMAND_RING_STOPPED)
|
|
|
|
|
{
|
|
|
|
|
cc = FXHCI_CC_COMMAND_RING_STOPPED;
|
|
|
|
|
FXhciAdvanceEvtRing(xhci);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FXhciHandleCmdCompletionEvt(xhci);
|
|
|
|
|
}
|
|
|
|
|
if (timeout_us == 0)
|
2023-05-11 10:25:21 +08:00
|
|
|
|
FUSB_INFO("Warning: timeout waiting for COMMAND_RING_STOPPED.");
|
2022-11-10 22:22:48 +08:00
|
|
|
|
|
|
|
|
|
update_and_return:
|
|
|
|
|
FXhciUpdateEvtDQ(xhci);
|
|
|
|
|
return cc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* returns cc of command in question (pointed to by `address`)
|
|
|
|
|
* caller should abort command if cc is FXHCI_CC_TIMEOUT
|
|
|
|
|
*/
|
|
|
|
|
FXhciTransCode FXhciWaitForCmdDone(FXhci *const xhci,
|
|
|
|
|
const FXhciTrb *const address,
|
|
|
|
|
const int clear_event)
|
|
|
|
|
{
|
|
|
|
|
unsigned long timeout_us = FUSB_USB_MAX_PROCESSING_TIME_US; /* 5s */
|
|
|
|
|
FXhciTransCode cc = FXHCI_CC_TIMEOUT;
|
|
|
|
|
|
|
|
|
|
while (FXhciWaitForEvtType(xhci, FXHCI_TRB_EV_CMD_CMPL, &timeout_us))
|
|
|
|
|
{
|
|
|
|
|
if ((xhci->er.cur->ptr_low == (uintptr)(address)) &&
|
2023-05-11 10:25:21 +08:00
|
|
|
|
(xhci->er.cur->ptr_high == 0))
|
2022-11-10 22:22:48 +08:00
|
|
|
|
{
|
|
|
|
|
cc = FXHCI_TRB_GET(CC, xhci->er.cur);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FXhciHandleCmdCompletionEvt(xhci);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!timeout_us)
|
|
|
|
|
{
|
2023-05-11 10:25:21 +08:00
|
|
|
|
FUSB_INFO("Warning: timeout waiting for FXHCI_TRB_EV_CMD_CMPL.");
|
2022-11-10 22:22:48 +08:00
|
|
|
|
}
|
|
|
|
|
else if (clear_event)
|
|
|
|
|
{
|
|
|
|
|
FXhciAdvanceEvtRing(xhci);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FXhciUpdateEvtDQ(xhci);
|
|
|
|
|
return cc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* returns amount of bytes transferred on success, negative CC on error */
|
|
|
|
|
FXhciTransCode FXhciWaitForTransfer(FXhci *const xhci, const int slot_id, const int ep_id)
|
|
|
|
|
{
|
|
|
|
|
/* 5s for all types of transfers */
|
|
|
|
|
unsigned long timeout_us = FUSB_USB_MAX_PROCESSING_TIME_US;
|
|
|
|
|
FXhciTransCode ret = FXHCI_CC_TIMEOUT;
|
|
|
|
|
while (FXhciWaitForEvtType(xhci, FXHCI_TRB_EV_TRANSFER, &timeout_us))
|
|
|
|
|
{
|
|
|
|
|
if (FXHCI_TRB_GET(ID, xhci->er.cur) == (unsigned int)slot_id &&
|
2023-05-11 10:25:21 +08:00
|
|
|
|
FXHCI_TRB_GET(EP, xhci->er.cur) == (unsigned int)ep_id)
|
2022-11-10 22:22:48 +08:00
|
|
|
|
{
|
|
|
|
|
ret = -FXHCI_TRB_GET(CC, xhci->er.cur);
|
|
|
|
|
if (ret == -FXHCI_CC_SUCCESS || ret == -FXHCI_CC_SHORT_PACKET)
|
2023-05-11 10:25:21 +08:00
|
|
|
|
{
|
2022-11-10 22:22:48 +08:00
|
|
|
|
ret = FXHCI_TRB_GET(EVTL, xhci->er.cur);
|
2023-05-11 10:25:21 +08:00
|
|
|
|
}
|
2022-11-10 22:22:48 +08:00
|
|
|
|
FXhciAdvanceEvtRing(xhci);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
FXhciHandleTransferEvt(xhci);
|
|
|
|
|
}
|
|
|
|
|
if (!timeout_us)
|
2023-05-11 10:25:21 +08:00
|
|
|
|
{
|
|
|
|
|
FUSB_INFO("Warning: timeout waiting for FXHCI_TRB_EV_TRANSFER. ");
|
|
|
|
|
}
|
2022-11-10 22:22:48 +08:00
|
|
|
|
|
|
|
|
|
FXhciUpdateEvtDQ(xhci);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|