2022-11-10 22:22:48 +08:00
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fadc_intr.c
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 08:28:45
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2023-05-11 10:25:21 +08:00
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* Description: This file is for adc interrupt handler implementation.
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2022-11-10 22:22:48 +08:00
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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2023-05-11 10:25:21 +08:00
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* 1.0 wangxiaodong 2022/4/25 init commit
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2022-11-10 22:22:48 +08:00
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*/
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2023-05-11 10:25:21 +08:00
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2022-11-10 22:22:48 +08:00
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#include "fparameters.h"
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#include "fassert.h"
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#include "fadc.h"
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#include "fadc_hw.h"
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#define FADC_DEBUG_TAG "FT_ADC_INTR"
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#define FADC_DEBUG(format, ...) FT_DEBUG_PRINT_D(FADC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FADC_INFO(format, ...) FT_DEBUG_PRINT_I(FADC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FADC_WARN(format, ...) FT_DEBUG_PRINT_W(FADC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FADC_ERROR(format, ...) FT_DEBUG_PRINT_E(FADC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FADC_CALL_INTR_EVENT_HANDLDER(instance_p, event) \
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if (instance_p->event_handler[event]) \
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instance_p->event_handler[event](instance_p->event_param[event])
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/**
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* @name: FAdcRegisterInterruptHandler
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* @msg: register FAdc interrupt handler function
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* @param {FAdc} *instance_p, pointer to the adc instance
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* @param {FAdcIntrEvtType} event_type, interrupt event type
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* @param {FAdcEvtHandler} handler, interrupt event handler
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* @param {void} *param, contains a pointer to the driver instance
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* @return {*}
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*/
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void FAdcRegisterInterruptHandler(FAdcCtrl *instance_p, FAdcIntrEventType event_type,
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FAdcIntrEventHandler handler, void *param)
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{
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FASSERT(instance_p);
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FASSERT(event_type < FADC_INTR_EVENT_NUM);
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instance_p->event_handler[event_type] = handler;
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instance_p->event_param[event_type] = param;
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}
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/**
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* @name: FAdcIntrHandler
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* @msg: This function is the interrupt handler for the driver.
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* It must be connected to an interrupt system by the application such that it
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* can be called when an interrupt occurs.
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* @param vector Irq num ,Don't need attention .
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* @param args contains a pointer to the driver instance
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*/
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void FAdcIntrHandler(s32 vector, void *args)
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{
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FASSERT(args != NULL);
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FAdcCtrl *pctrl = (FAdcCtrl *)args;
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u32 status = 0;
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u32 intrmask = 0;
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u32 channel = 0;
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uintptr base_addr = pctrl->config.base_addr;
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status = FADC_READ_REG32(base_addr, FADC_INTR_REG_OFFSET);
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/* channel convert complete irq mask */
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intrmask = FADC_READ_REG32(base_addr, FADC_INTRMASK_REG_OFFSET);
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/* adc error interrupt */
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if (status & FADC_INTR_REG_ERR)
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{
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/* clear error interrupt status */
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FADC_SETBIT(base_addr, FADC_INTR_REG_OFFSET, FADC_INTR_REG_ERR);
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/* write error clear register, adc_errclr_reg=0 */
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FADC_WRITE_REG32(base_addr, FADC_ERRCLR_REG_OFFSET, 0);
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FADC_CALL_INTR_EVENT_HANDLDER(pctrl, FADC_INTR_EVENT_ERROR);
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}
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if (status & FADC_INTR_REG_LIMIT_MASK)
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{
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for (channel = 0; channel < FADC_CHANNEL_NUM; channel++)
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{
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if (status & FADC_INTR_REG_DLIMIT(channel))
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{
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/* clear dlimit interrupt status */
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FADC_SETBIT(base_addr, FADC_INTR_REG_OFFSET, FADC_INTR_REG_DLIMIT(channel));
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FADC_CALL_INTR_EVENT_HANDLDER(pctrl, FADC_INTR_EVENT_DLIMIT);
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}
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if (status & FADC_INTR_REG_ULIMIT(channel))
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{
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/* clear ulimit interrupt status */
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FADC_SETBIT(base_addr, FADC_INTR_REG_OFFSET, FADC_INTR_REG_ULIMIT(channel));
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FADC_CALL_INTR_EVENT_HANDLDER(pctrl, FADC_INTR_EVENT_ULIMIT);
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}
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}
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}
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/* 有中断转换完成的情况下,根据adc_intr_reg寄存器的通道转换完成中断标志位bit0~7,读取转换结果 */
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if (status & FADC_INTR_REG_COVFIN_MASK)
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{
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for (channel = 0; channel < FADC_CHANNEL_NUM; channel++)
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{
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if (status & FADC_INTR_REG_COVFIN(channel))
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{
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pctrl->value[channel] = FADC_READ_REG32(base_addr, FADC_COV_RESULT_REG_OFFSET(channel)) & FADC_COV_RESULT_REG_MASK;
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FADC_CONVERT_COMPLETE(pctrl->convert_complete[channel]);
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/* clear convert finish interrupt status */
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FADC_SETBIT(base_addr, FADC_INTR_REG_OFFSET, FADC_INTR_REG_COVFIN(channel));
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}
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}
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FADC_CALL_INTR_EVENT_HANDLDER(pctrl, FADC_INTR_EVENT_COVFIN);
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}
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else
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{
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}
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return;
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}
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