679 lines
21 KiB
C
679 lines
21 KiB
C
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/*
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* The Clear BSD License
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* Copyright (c) 2017, NXP Semiconductor, Inc.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted (subject to the limitations in the disclaimer below) provided
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* that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_spdif.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.spdif"
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#endif
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/*******************************************************************************
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* Definitations
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******************************************************************************/
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enum _spdif_transfer_state
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{
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kSPDIF_Busy = 0x0U, /*!< SPDIF is busy */
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kSPDIF_Idle, /*!< Transfer is done. */
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kSPDIF_Error /*!< Transfer error occured. */
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};
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/*! @brief Typedef for spdif tx interrupt handler. */
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typedef void (*spdif_isr_t)(SPDIF_Type *base, spdif_handle_t *handle);
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get the instance number for SPDIF.
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*
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* @param base SPDIF base pointer.
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*/
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uint32_t SPDIF_GetInstance(SPDIF_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* Base pointer array */
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static SPDIF_Type *const s_spdifBases[] = SPDIF_BASE_PTRS;
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/*! @brief SPDIF handle pointer */
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spdif_handle_t *s_spdifHandle[ARRAY_SIZE(s_spdifBases)][2];
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/* IRQ number array */
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static const IRQn_Type s_spdifIRQ[] = SPDIF_IRQS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Clock name array */
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static const clock_ip_name_t s_spdifClock[] = SPDIF_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*! @brief Pointer to IRQ handler for each instance. */
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static spdif_isr_t s_spdifTxIsr;
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/*! @brief Pointer to IRQ handler for each instance. */
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static spdif_isr_t s_spdifRxIsr;
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/*! @brief Used for spdif gain */
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static uint8_t s_spdif_gain[8] = {24U, 16U, 12U, 8U, 6U, 4U, 3U, 1U};
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static uint8_t s_spdif_tx_watermark[4] = {16, 12, 8, 4};
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static uint8_t s_spdif_rx_watermark[4] = {1, 4, 8, 16};
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/*******************************************************************************
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* Code
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******************************************************************************/
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uint32_t SPDIF_GetInstance(SPDIF_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_spdifBases); instance++)
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{
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if (s_spdifBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_spdifBases));
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return instance;
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}
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void SPDIF_Init(SPDIF_Type *base, const spdif_config_t *config)
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{
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uint32_t val = 0;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Enable the SPDIF clock */
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CLOCK_EnableClock(s_spdifClock[SPDIF_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* Reset the internal logic */
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base->SCR |= SPDIF_SCR_SOFT_RESET_MASK;
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/* Waiting for reset finish */
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while (base->SCR & SPDIF_SCR_SOFT_RESET_MASK)
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{
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}
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/* Setting the SPDIF settings */
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base->SCR = SPDIF_SCR_RXFIFOFULL_SEL(config->rxFullSelect) | SPDIF_SCR_RXAUTOSYNC(config->isRxAutoSync) |
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SPDIF_SCR_TXAUTOSYNC(config->isRxAutoSync) | SPDIF_SCR_TXFIFOEMPTY_SEL(config->txFullSelect) |
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SPDIF_SCR_TXFIFO_CTRL(1U) | SPDIF_SCR_VALCTRL(config->validityConfig) |
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SPDIF_SCR_TXSEL(config->txSource) | SPDIF_SCR_USRC_SEL(config->uChannelSrc);
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/* Set DPLL clock source */
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base->SRPC = SPDIF_SRPC_CLKSRC_SEL(config->DPLLClkSource) | SPDIF_SRPC_GAINSEL(config->gain);
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/* Set SPDIF tx clock source */
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val = base->STC & ~SPDIF_STC_TXCLK_SOURCE_MASK;
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val |= SPDIF_STC_TXCLK_SOURCE(config->txClkSource);
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base->STC = val;
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}
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void SPDIF_Deinit(SPDIF_Type *base)
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{
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SPDIF_TxEnable(base, false);
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SPDIF_RxEnable(base, false);
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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CLOCK_DisableClock(s_spdifClock[SPDIF_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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void SPDIF_GetDefaultConfig(spdif_config_t *config)
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{
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config->isTxAutoSync = true;
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config->isRxAutoSync = true;
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config->DPLLClkSource = 1;
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config->txClkSource = 1;
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config->rxFullSelect = kSPDIF_RxFull8Samples;
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config->txFullSelect = kSPDIF_TxEmpty8Samples;
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config->uChannelSrc = kSPDIF_UChannelFromTx;
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config->txSource = kSPDIF_txNormal;
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config->validityConfig = kSPDIF_validityFlagAlwaysClear;
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config->gain = kSPDIF_GAIN_8;
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}
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void SPDIF_TxEnable(SPDIF_Type *base, bool enable)
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{
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uint32_t val = 0;
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if (enable)
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{
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/* Open Tx FIFO */
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val = base->SCR & (~SPDIF_SCR_TXFIFO_CTRL_MASK);
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val |= SPDIF_SCR_TXFIFO_CTRL(1U);
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base->SCR = val;
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/* Enable transfer clock */
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base->STC |= SPDIF_STC_TX_ALL_CLK_EN_MASK;
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}
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else
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{
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base->SCR &= ~(SPDIF_SCR_TXFIFO_CTRL_MASK | SPDIF_SCR_TXSEL_MASK);
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/* Disable transfer clock */
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base->STC &= ~SPDIF_STC_TX_ALL_CLK_EN_MASK;
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}
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}
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void SPDIF_TxSetSampleRate(SPDIF_Type *base, uint32_t sampleRate_Hz, uint32_t sourceClockFreq_Hz)
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{
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uint32_t clkDiv = sourceClockFreq_Hz / (sampleRate_Hz * 64);
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uint32_t mod = sourceClockFreq_Hz % (sampleRate_Hz * 64);
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uint32_t val = 0;
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uint8_t clockSource = (((base->STC) & SPDIF_STC_TXCLK_SOURCE_MASK) >> SPDIF_STC_TXCLK_SOURCE_SHIFT);
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/* Compute the nearest divider */
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if (mod > ((sampleRate_Hz * 64) / 2))
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{
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clkDiv += 1U;
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}
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/* If use divided systeme clock */
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if (clockSource == 5U)
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{
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if (clkDiv > 256)
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{
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val = base->STC & (~(SPDIF_STC_TXCLK_DF_MASK | SPDIF_STC_SYSCLK_DF_MASK));
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val |= SPDIF_STC_SYSCLK_DF(clkDiv / 128U - 1U) | SPDIF_STC_TXCLK_DF(127U);
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base->STC = val;
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}
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else
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{
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val = base->STC & (~(SPDIF_STC_TXCLK_DF_MASK | SPDIF_STC_SYSCLK_DF_MASK));
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val |= SPDIF_STC_SYSCLK_DF(1U) | SPDIF_STC_TXCLK_DF(clkDiv - 1U);
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base->STC = val;
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}
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}
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else
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{
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/* Other clock only uses txclk div */
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val = base->STC & (~(SPDIF_STC_TXCLK_DF_MASK | SPDIF_STC_SYSCLK_DF_MASK));
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val |= SPDIF_STC_TXCLK_DF(clkDiv - 1U);
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base->STC = val;
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}
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}
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uint32_t SPDIF_GetRxSampleRate(SPDIF_Type *base, uint32_t clockSourceFreq_Hz)
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{
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uint32_t gain = s_spdif_gain[((base->SRPC & SPDIF_SRPC_GAINSEL_MASK) >> SPDIF_SRPC_GAINSEL_SHIFT)];
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uint32_t measure = 0, sampleRate = 0;
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uint64_t temp = 0;
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/* Wait the DPLL locked */
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while ((base->SRPC & SPDIF_SRPC_LOCK_MASK) == 0U)
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{
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}
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/* Get the measure value */
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measure = base->SRFM;
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temp = (uint64_t)measure * (uint64_t)clockSourceFreq_Hz;
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temp /= (uint64_t)(1024 * 1024 * 128 * gain);
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sampleRate = (uint32_t)temp;
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return sampleRate;
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}
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void SPDIF_WriteBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size)
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{
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assert(buffer);
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assert(size / 6U == 0U);
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uint32_t i = 0, j = 0, data = 0;
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while (i < size)
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{
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/* Wait until it can write data */
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while ((SPDIF_GetStatusFlag(base) & kSPDIF_TxFIFOEmpty) == 0U)
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{
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}
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/* Write left channel data */
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for (j = 0; j < 3U; j++)
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{
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data |= ((uint32_t)(*buffer) << (j * 8U));
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buffer++;
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}
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SPDIF_WriteLeftData(base, data);
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/* Write right channel data */
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data = 0;
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for (j = 0; j < 3U; j++)
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{
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data |= ((uint32_t)(*buffer) << (j * 8U));
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buffer++;
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}
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SPDIF_WriteRightData(base, data);
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i += 6U;
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}
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}
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void SPDIF_ReadBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size)
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{
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assert(buffer);
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assert(size / 6U == 0U);
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uint32_t i = 0, j = 0, data = 0;
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while (i < size)
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{
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/* Wait until it can write data */
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while ((SPDIF_GetStatusFlag(base) & kSPDIF_RxFIFOFull) == 0U)
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{
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}
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/* Write left channel data */
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data = SPDIF_ReadLeftData(base);
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for (j = 0; j < 3U; j++)
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{
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*buffer = ((data >> (j * 8U)) & 0xFFU);
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buffer++;
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}
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/* Write right channel data */
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data = SPDIF_ReadRightData(base);
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for (j = 0; j < 3U; j++)
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{
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*buffer = ((data >> (j * 8U)) & 0xFFU);
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buffer++;
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}
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i += 6U;
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}
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}
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void SPDIF_TransferTxCreateHandle(SPDIF_Type *base,
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spdif_handle_t *handle,
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spdif_transfer_callback_t callback,
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void *userData)
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{
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assert(handle);
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/* Zero the handle */
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memset(handle, 0, sizeof(*handle));
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s_spdifHandle[SPDIF_GetInstance(base)][0] = handle;
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handle->callback = callback;
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handle->userData = userData;
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handle->watermark =
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s_spdif_tx_watermark[(base->SCR & SPDIF_SCR_TXFIFOEMPTY_SEL_MASK) >> SPDIF_SCR_TXFIFOEMPTY_SEL_SHIFT];
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/* Set the isr pointer */
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s_spdifTxIsr = SPDIF_TransferTxHandleIRQ;
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/* Enable Tx irq */
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EnableIRQ(s_spdifIRQ[SPDIF_GetInstance(base)]);
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}
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void SPDIF_TransferRxCreateHandle(SPDIF_Type *base,
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spdif_handle_t *handle,
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spdif_transfer_callback_t callback,
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void *userData)
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{
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assert(handle);
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/* Zero the handle */
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memset(handle, 0, sizeof(*handle));
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s_spdifHandle[SPDIF_GetInstance(base)][1] = handle;
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handle->callback = callback;
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handle->userData = userData;
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handle->watermark =
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s_spdif_rx_watermark[(base->SCR & SPDIF_SCR_RXFIFOFULL_SEL_MASK) >> SPDIF_SCR_RXFIFOFULL_SEL_SHIFT];
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|
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/* Set the isr pointer */
|
||
|
|
s_spdifRxIsr = SPDIF_TransferRxHandleIRQ;
|
||
|
|
|
||
|
|
/* Enable Rx irq */
|
||
|
|
EnableIRQ(s_spdifIRQ[SPDIF_GetInstance(base)]);
|
||
|
|
}
|
||
|
|
|
||
|
|
status_t SPDIF_TransferSendNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
/* Check if the queue is full */
|
||
|
|
if (handle->spdifQueue[handle->queueUser].data)
|
||
|
|
{
|
||
|
|
return kStatus_SPDIF_QueueFull;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Add into queue */
|
||
|
|
handle->transferSize[handle->queueUser] = xfer->dataSize;
|
||
|
|
handle->spdifQueue[handle->queueUser].data = xfer->data;
|
||
|
|
handle->spdifQueue[handle->queueUser].dataSize = xfer->dataSize;
|
||
|
|
handle->queueUser = (handle->queueUser + 1) % SPDIF_XFER_QUEUE_SIZE;
|
||
|
|
|
||
|
|
/* Set the state to busy */
|
||
|
|
handle->state = kSPDIF_Busy;
|
||
|
|
|
||
|
|
/* Enable interrupt */
|
||
|
|
SPDIF_EnableInterrupts(base, kSPDIF_TxFIFOEmpty);
|
||
|
|
|
||
|
|
/* Enable Tx transfer */
|
||
|
|
SPDIF_TxEnable(base, true);
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
status_t SPDIF_TransferReceiveNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
/* Check if the queue is full */
|
||
|
|
if (handle->spdifQueue[handle->queueUser].data)
|
||
|
|
{
|
||
|
|
return kStatus_SPDIF_QueueFull;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Add into queue */
|
||
|
|
handle->transferSize[handle->queueUser] = xfer->dataSize;
|
||
|
|
handle->spdifQueue[handle->queueUser].data = xfer->data;
|
||
|
|
handle->spdifQueue[handle->queueUser].dataSize = xfer->dataSize;
|
||
|
|
handle->spdifQueue[handle->queueUser].udata = xfer->udata;
|
||
|
|
handle->spdifQueue[handle->queueUser].qdata = xfer->qdata;
|
||
|
|
handle->queueUser = (handle->queueUser + 1) % SPDIF_XFER_QUEUE_SIZE;
|
||
|
|
|
||
|
|
/* Set state to busy */
|
||
|
|
handle->state = kSPDIF_Busy;
|
||
|
|
|
||
|
|
/* Enable interrupt */
|
||
|
|
SPDIF_EnableInterrupts(base, kSPDIF_UChannelReceiveRegisterFull | kSPDIF_QChannelReceiveRegisterFull |
|
||
|
|
kSPDIF_RxFIFOFull | kSPDIF_RxControlChannelChange);
|
||
|
|
|
||
|
|
/* Enable Rx transfer */
|
||
|
|
SPDIF_RxEnable(base, true);
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
status_t SPDIF_TransferGetSendCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
status_t status = kStatus_Success;
|
||
|
|
|
||
|
|
if (handle->state != kSPDIF_Busy)
|
||
|
|
{
|
||
|
|
status = kStatus_NoTransferInProgress;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
*count = (handle->transferSize[handle->queueDriver] - handle->spdifQueue[handle->queueDriver].dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status_t SPDIF_TransferGetReceiveCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
status_t status = kStatus_Success;
|
||
|
|
|
||
|
|
if (handle->state != kSPDIF_Busy)
|
||
|
|
{
|
||
|
|
status = kStatus_NoTransferInProgress;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
*count = (handle->transferSize[handle->queueDriver] - handle->spdifQueue[handle->queueDriver].dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
void SPDIF_TransferAbortSend(SPDIF_Type *base, spdif_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
/* Use FIFO request interrupt and fifo error */
|
||
|
|
SPDIF_DisableInterrupts(base, kSPDIF_TxFIFOEmpty);
|
||
|
|
|
||
|
|
handle->state = kSPDIF_Idle;
|
||
|
|
|
||
|
|
/* Clear the queue */
|
||
|
|
memset(handle->spdifQueue, 0, sizeof(spdif_transfer_t) * SPDIF_XFER_QUEUE_SIZE);
|
||
|
|
handle->queueDriver = 0;
|
||
|
|
handle->queueUser = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void SPDIF_TransferAbortReceive(SPDIF_Type *base, spdif_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
/* Disable interrupt */
|
||
|
|
SPDIF_DisableInterrupts(base, kSPDIF_UChannelReceiveRegisterFull | kSPDIF_QChannelReceiveRegisterFull |
|
||
|
|
kSPDIF_RxFIFOFull | kSPDIF_RxControlChannelChange);
|
||
|
|
|
||
|
|
handle->state = kSPDIF_Idle;
|
||
|
|
|
||
|
|
/* Clear the queue */
|
||
|
|
memset(handle->spdifQueue, 0, sizeof(spdif_transfer_t) * SPDIF_XFER_QUEUE_SIZE);
|
||
|
|
handle->queueDriver = 0;
|
||
|
|
handle->queueUser = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void SPDIF_TransferTxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
uint8_t *buffer = handle->spdifQueue[handle->queueDriver].data;
|
||
|
|
uint8_t dataSize = 0;
|
||
|
|
uint32_t i = 0, j = 0, data = 0;
|
||
|
|
|
||
|
|
/* Do Transfer */
|
||
|
|
if ((SPDIF_GetStatusFlag(base) & kSPDIF_TxFIFOEmpty) && (base->SIE & kSPDIF_TxFIFOEmpty))
|
||
|
|
{
|
||
|
|
dataSize = handle->watermark;
|
||
|
|
while (i < dataSize)
|
||
|
|
{
|
||
|
|
data = 0;
|
||
|
|
/* Write left channel data */
|
||
|
|
for (j = 0; j < 3U; j++)
|
||
|
|
{
|
||
|
|
data |= ((uint32_t)(*buffer) << (j * 8U));
|
||
|
|
buffer++;
|
||
|
|
}
|
||
|
|
SPDIF_WriteLeftData(base, data);
|
||
|
|
|
||
|
|
/* Write right channel data */
|
||
|
|
data = 0;
|
||
|
|
for (j = 0; j < 3U; j++)
|
||
|
|
{
|
||
|
|
data |= ((uint32_t)(*buffer) << (j * 8U));
|
||
|
|
buffer++;
|
||
|
|
}
|
||
|
|
SPDIF_WriteRightData(base, data);
|
||
|
|
|
||
|
|
i++;
|
||
|
|
}
|
||
|
|
handle->spdifQueue[handle->queueDriver].dataSize -= dataSize * 6U;
|
||
|
|
handle->spdifQueue[handle->queueDriver].data += dataSize * 6U;
|
||
|
|
|
||
|
|
/* If finished a blcok, call the callback function */
|
||
|
|
if (handle->spdifQueue[handle->queueDriver].dataSize == 0U)
|
||
|
|
{
|
||
|
|
memset(&handle->spdifQueue[handle->queueDriver], 0, sizeof(spdif_transfer_t));
|
||
|
|
handle->queueDriver = (handle->queueDriver + 1) % SPDIF_XFER_QUEUE_SIZE;
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_TxIdle, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If all data finished, just stop the transfer */
|
||
|
|
if (handle->spdifQueue[handle->queueDriver].data == NULL)
|
||
|
|
{
|
||
|
|
SPDIF_TransferAbortSend(base, handle);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void SPDIF_TransferRxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle);
|
||
|
|
|
||
|
|
uint8_t *buffer = NULL;
|
||
|
|
uint8_t dataSize = 0;
|
||
|
|
uint32_t i = 0, j = 0, data = 0;
|
||
|
|
|
||
|
|
/* Handle Cnew flag */
|
||
|
|
if (SPDIF_GetStatusFlag(base) & kSPDIF_RxControlChannelChange)
|
||
|
|
{
|
||
|
|
/* Clear the interrupt flag */
|
||
|
|
SPDIF_ClearStatusFlags(base, SPDIF_SIE_CNEW_MASK);
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_RxCnew, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle illegal symbol */
|
||
|
|
if (SPDIF_GetStatusFlag(base) & kSPDIF_RxIllegalSymbol)
|
||
|
|
{
|
||
|
|
SPDIF_ClearStatusFlags(base, kSPDIF_RxIllegalSymbol);
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_RxIllegalSymbol, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle Parity Bit Error */
|
||
|
|
if (SPDIF_GetStatusFlag(base) & kSPDIF_RxParityBitError)
|
||
|
|
{
|
||
|
|
SPDIF_ClearStatusFlags(base, kSPDIF_RxParityBitError);
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_RxParityBitError, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle DPlocked */
|
||
|
|
if (SPDIF_GetStatusFlag(base) & kSPDIF_RxDPLLLocked)
|
||
|
|
{
|
||
|
|
SPDIF_ClearStatusFlags(base, kSPDIF_RxDPLLLocked);
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_RxDPLLLocked, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle Q channel full flag */
|
||
|
|
if ((SPDIF_GetStatusFlag(base) & kSPDIF_QChannelReceiveRegisterFull) &&
|
||
|
|
(base->SIE & kSPDIF_QChannelReceiveRegisterFull))
|
||
|
|
{
|
||
|
|
buffer = handle->spdifQueue[handle->queueDriver].qdata;
|
||
|
|
data = SPDIF_ReadQChannel(base);
|
||
|
|
buffer[0] = data & 0xFFU;
|
||
|
|
buffer[1] = (data >> 8U) & 0xFFU;
|
||
|
|
buffer[2] = (data >> 16U) & 0xFFU;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle U channel full flag */
|
||
|
|
if ((SPDIF_GetStatusFlag(base) & kSPDIF_UChannelReceiveRegisterFull) &&
|
||
|
|
(base->SIE & kSPDIF_UChannelReceiveRegisterFull))
|
||
|
|
{
|
||
|
|
buffer = handle->spdifQueue[handle->queueDriver].udata;
|
||
|
|
data = SPDIF_ReadUChannel(base);
|
||
|
|
buffer[0] = data & 0xFFU;
|
||
|
|
buffer[1] = (data >> 8U) & 0xFFU;
|
||
|
|
buffer[2] = (data >> 16U) & 0xFFU;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Handle audio data transfer */
|
||
|
|
if ((SPDIF_GetStatusFlag(base) & kSPDIF_RxFIFOFull) && (base->SIE & kSPDIF_RxFIFOFull))
|
||
|
|
{
|
||
|
|
dataSize = handle->watermark;
|
||
|
|
buffer = handle->spdifQueue[handle->queueDriver].data;
|
||
|
|
while (i < dataSize)
|
||
|
|
{
|
||
|
|
/* Read left channel data */
|
||
|
|
data = SPDIF_ReadLeftData(base);
|
||
|
|
for (j = 0; j < 3U; j++)
|
||
|
|
{
|
||
|
|
*buffer = ((data >> (j * 8U)) & 0xFFU);
|
||
|
|
buffer++;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Read right channel data */
|
||
|
|
data = SPDIF_ReadRightData(base);
|
||
|
|
for (j = 0; j < 3U; j++)
|
||
|
|
{
|
||
|
|
*buffer = ((data >> (j * 8U)) & 0xFFU);
|
||
|
|
buffer++;
|
||
|
|
}
|
||
|
|
|
||
|
|
i++;
|
||
|
|
}
|
||
|
|
handle->spdifQueue[handle->queueDriver].dataSize -= dataSize * 6U;
|
||
|
|
handle->spdifQueue[handle->queueDriver].data += dataSize * 6U;
|
||
|
|
|
||
|
|
/* If finished a blcok, call the callback function */
|
||
|
|
if (handle->spdifQueue[handle->queueDriver].dataSize == 0U)
|
||
|
|
{
|
||
|
|
memset(&handle->spdifQueue[handle->queueDriver], 0, sizeof(spdif_transfer_t));
|
||
|
|
handle->queueDriver = (handle->queueDriver + 1) % SPDIF_XFER_QUEUE_SIZE;
|
||
|
|
if (handle->callback)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_SPDIF_RxIdle, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If all data finished, just stop the transfer */
|
||
|
|
if (handle->spdifQueue[handle->queueDriver].data == NULL)
|
||
|
|
{
|
||
|
|
SPDIF_TransferAbortReceive(base, handle);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#if defined(SPDIF)
|
||
|
|
void SPDIF_DriverIRQHandler(void)
|
||
|
|
{
|
||
|
|
if ((s_spdifHandle[0][0]) && s_spdifTxIsr)
|
||
|
|
{
|
||
|
|
s_spdifTxIsr(SPDIF, s_spdifHandle[0][0]);
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((s_spdifHandle[0][1]) && s_spdifRxIsr)
|
||
|
|
{
|
||
|
|
s_spdifRxIsr(SPDIF, s_spdifHandle[0][1]);
|
||
|
|
}
|
||
|
|
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
|
||
|
|
exception return operation might vector to incorrect interrupt */
|
||
|
|
#if defined __CORTEX_M && (__CORTEX_M == 4U)
|
||
|
|
__DSB();
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
#endif
|