2012-06-19 08:43:54 +08:00
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/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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2012-06-26 11:45:53 +08:00
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* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
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2012-06-19 08:43:54 +08:00
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2010-06-25 Bernard first version
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* 2011-08-08 lgnq modified for Loongson LS1B
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include "board.h"
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#include "uart.h"
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#include "ls1b.h"
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/**
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* @addtogroup Loongson LS1B
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*/
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/*@{*/
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/**
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* This is the timer interrupt service routine.
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*/
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void rt_hw_timer_handler(void)
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{
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2012-06-26 11:45:53 +08:00
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unsigned int count;
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2012-06-19 08:43:54 +08:00
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2012-06-26 11:45:53 +08:00
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count = read_c0_compare();
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write_c0_compare(count);
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write_c0_count(0);
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2012-06-19 08:43:54 +08:00
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/* increase a OS tick */
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rt_tick_increase();
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}
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/**
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* This function will initial OS timer
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*/
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void rt_hw_timer_init(void)
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{
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2012-06-26 11:45:53 +08:00
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write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
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write_c0_count(0);
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2012-06-19 08:43:54 +08:00
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}
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/**
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* This function will initial sam7s64 board.
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*/
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void rt_hw_board_init(void)
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{
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#ifdef RT_USING_UART
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/* init hardware UART device */
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rt_hw_uart_init();
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#endif
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#ifdef RT_USING_CONSOLE
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/* set console device */
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rt_console_set_device("uart0");
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#endif
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/* init operating system timer */
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rt_hw_timer_init();
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rt_kprintf("current sr: 0x%08x\n", read_c0_status());
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}
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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#define UARTLSR_TFE (1 << 5)
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#define UARTLSR_BI (1 << 4)
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#define UARTLSR_FE (1 << 3)
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#define UARTLSR_PE (1 << 2)
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#define UARTLSR_OE (1 << 1)
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#define UARTLSR_DR (1 << 0)
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2012-06-26 11:45:53 +08:00
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void rt_hw_console_output(const char *ptr)
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2012-06-19 08:43:54 +08:00
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{
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/* stream mode */
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while (*ptr)
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{
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if (*ptr == '\n')
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{
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/* FIFO status, contain valid data */
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while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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/* write data */
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UART_DAT(UART0_BASE) = '\r';
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}
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/* FIFO status, contain valid data */
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while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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/* write data */
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UART_DAT(UART0_BASE) = *ptr;
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ptr ++;
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}
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}
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/*@}*/
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