2018-11-29 17:00:22 +08:00
|
|
|
/*
|
|
|
|
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
|
|
|
|
*
|
|
|
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
|
|
|
*
|
|
|
|
|
* Change Logs:
|
|
|
|
|
* Date Author Notes
|
2019-01-22 10:00:45 +08:00
|
|
|
* 2018-11-06 balanceTWK first version
|
2020-09-04 10:23:08 +08:00
|
|
|
* 2020-06-16 thread-liu add stm32mp1
|
|
|
|
|
* 2020-09-01 thread-liu add GPIOZ
|
2020-09-18 18:33:13 +08:00
|
|
|
* 2020-09-18 geniusgogo optimization design pin-index algorithm
|
2018-11-29 17:00:22 +08:00
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef __DRV_GPIO_H__
|
|
|
|
|
#define __DRV_GPIO_H__
|
|
|
|
|
|
|
|
|
|
#include <drv_common.h>
|
2019-03-29 23:05:06 +08:00
|
|
|
#include <board.h>
|
2018-11-29 17:00:22 +08:00
|
|
|
|
2020-09-18 18:33:13 +08:00
|
|
|
#ifdef __cplusplus
|
|
|
|
|
extern "C" {
|
|
|
|
|
#endif
|
|
|
|
|
|
2019-10-10 11:06:21 +08:00
|
|
|
#define __STM32_PORT(port) GPIO##port##_BASE
|
2018-11-29 17:00:22 +08:00
|
|
|
|
2020-06-20 14:04:27 +08:00
|
|
|
#if defined(SOC_SERIES_STM32MP1)
|
2020-09-04 10:23:08 +08:00
|
|
|
#define GET_PIN(PORTx,PIN) (GPIO##PORTx == GPIOZ) ? (176 + PIN) : ((rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x1000UL) )) + PIN))
|
2020-06-20 14:04:27 +08:00
|
|
|
#else
|
2019-10-10 11:06:21 +08:00
|
|
|
#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
|
2020-06-20 14:04:27 +08:00
|
|
|
#endif
|
2018-11-29 17:00:22 +08:00
|
|
|
|
|
|
|
|
struct pin_irq_map
|
|
|
|
|
{
|
|
|
|
|
rt_uint16_t pinbit;
|
|
|
|
|
IRQn_Type irqno;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
int rt_hw_pin_init(void);
|
|
|
|
|
|
2020-09-18 18:33:13 +08:00
|
|
|
#ifdef __cplusplus
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
|
2018-11-29 17:00:22 +08:00
|
|
|
#endif /* __DRV_GPIO_H__ */
|
|
|
|
|
|
